; --------------------------------------------------------------------------------
; @Title: RCARV4M On-Chip Peripherals
; @Props: Confidential
; @Author: NEJ
; @Changelog: 2024-03-26 NEJ
; @Manufacturer: RENESAS - Renesas Technology, Corp.
; @Doc: Generated (TRACE32, build: 168047.), based on:
;       V4M_0p5_240318.svd (Ver. 1.0)
; @Core: Cortex-A76, Cortex-R52
; @Chip: RCARV4M, RCARV4M-CR52
; @Copyright: (C) 1989-2024 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: perrcarv4m.per 17692 2024-03-27 15:48:52Z kwisniewski $

AUTOINDENT.ON CENTER TREE
ENUMDELIMITER ","
base ad:0x0
sif (CORENAME()=="CORTEXR52")
AUTOINDENT.PUSH
AUTOINDENT.OFF
tree "Core Registers (Cortex-R52)"
AUTOINDENT.PUSH
AUTOINDENT.ON center tree
tree "ID Registers"
rgroup.long c15:0x0010++0x00
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
bitfld.long 0x00 12.--15. "STATE3,Thumb execution environment (thumb-EE) support" "Not supported,?..."
bitfld.long 0x00 8.--11. "STATE2,Support for jazelle extension" "Reserved,No cleaning,?..."
bitfld.long 0x00 4.--7. "STATE1,Thumb encoding supported by the processor type" "Reserved,Reserved,Reserved,After thumb-2,?..."
newline
bitfld.long 0x00 0.--3. "STATE0,ARM instruction set support" "Reserved,Supported,?..."
rgroup.long c15:0x0110++0x00
line.long 0x00 "ID_PFR1,Processor Feature Register 1"
bitfld.long 0x00 28.--31. "GIC_CPU,GIC CPU support" "Reserved,Enabled,?..."
bitfld.long 0x00 24.--27. "VF,Virtualization fractional support" "Not supported,?..."
bitfld.long 0x00 20.--23. "SF,Security fractional support" "Reserved,VBAR,?..."
newline
bitfld.long 0x00 16.--19. "GT,Generic timer support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "VE,Virtualization extensions support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "MPM,Microcontroller programmer's model support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "SE,Security extensions architecture v1 support" "Not supported,?..."
bitfld.long 0x00 0.--3. "PM,Standard ARMv4 programmer's model support" "Reserved,Supported,?..."
rgroup.long c15:0x0310++0x00
line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
rgroup.long c15:0x0410++0x00
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
bitfld.long 0x00 28.--31. "IS,Indicates innermost shareability domain implemented" "Non-cacheable,?..."
bitfld.long 0x00 24.--27. "FCSE,Fast context switch memory mappings support" "Not supported,?..."
bitfld.long 0x00 20.--23. "AR,Auxiliary register support" "Reserved,Reserved,Control/fault status,?..."
newline
bitfld.long 0x00 16.--19. "TCM,TCM and associated DMA support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "SL,Shareability levels" "Reserved,Implemented 2 levels,?..."
bitfld.long 0x00 8.--11. "OSS,Outer shareable support" "Non-cacheable,?..."
newline
bitfld.long 0x00 4.--7. "PMSA,Physical memory system architecture (PMSA) support" "Reserved,Reserved,Reserved,Reserved,ARMv8-R base+limit PMSA,?..."
bitfld.long 0x00 0.--3. "VMSA,Virtual memory system architecture (VMSA) support" "Not supported,?..."
rgroup.long c15:0x0510++0x00
line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
bitfld.long 0x00 28.--31. "BTB,Branch predictor" "Reserved,Reserved,Reserved,Reserved,No flushing,?..."
bitfld.long 0x00 24.--27. "L1TCO,Test and clean operations on data cache/harvard/unified architecture support" "Not supported,?..."
bitfld.long 0x00 20.--23. "L1UCMO,L1 cache/all maintenance operations/unified architecture support" "Not supported,?..."
newline
bitfld.long 0x00 16.--19. "L1HCMO,L1 Cache/all maintenance operations/harvard architecture support" "Not supported,?..."
bitfld.long 0x00 12.--15. "L1UCLMOSW,L1 cache line maintenance operations by set and way/unified architecture support" "Not supported,?..."
bitfld.long 0x00 8.--11. "L1HCLMOSW,L1 cache line maintenance operations by set and way/harvard architecture support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "L1UCLMOMVA,L1 cache line maintenance operations by MVA/unified architecture support" "Not supported,?..."
bitfld.long 0x00 0.--3. "L1HCLMOMVA,L1 cache line maintenance operations by MVA/harvard architecture" "Not supported,?..."
rgroup.long c15:0x0610++0x00
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
bitfld.long 0x00 28.--31. "HAF,Hardware access flag support" "Not supported,?..."
bitfld.long 0x00 24.--27. "WFI,Wait for interrupt stalling support" "Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "MBF,Memory barrier operations support" "Reserved,Reserved,DSB/ISB/DMB,?..."
newline
bitfld.long 0x00 16.--19. "UTLBMO,TLB maintenance operations/unified architecture support" "Not supported,?..."
bitfld.long 0x00 12.--15. "HTLBMO,TLB maintenance operations/harvard architecture support" "Not supported,?..."
bitfld.long 0x00 8.--11. "HL1CMRO,Cache maintenance range operations/harvard architecture support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "HL1BPCRO,Background prefetch cache range operations/harvard architecture support" "Not supported,?..."
bitfld.long 0x00 0.--3. "HL1FPCRO,Foreground prefetch cache range operations/harvard architecture support" "Not supported,?..."
rgroup.long c15:0x0710++0x00
line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3"
bitfld.long 0x00 28.--31. "SS,Supersection support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not supported"
bitfld.long 0x00 24.--27. "CMEMSZ,Cached memory size" "4GByte,?..."
bitfld.long 0x00 20.--23. "CW,Coherent walk. Indicates whether translation table updates require a clean to the point of unification" "Reserved,Not required,?..."
newline
bitfld.long 0x00 12.--15. "MB,Maintenance broadcast support" "Reserved,Reserved,Shareability/defined behavior,?..."
bitfld.long 0x00 8.--11. "BPM,Invalidate branch predictor support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "HCMOSW,Invalidate cache by set and way/clean by set and way/invalidate and clean by set and way support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "HCMOMVA,Invalidate cache MVA support" "Reserved,Supported,?..."
rgroup.long c15:0x0620++0x00
line.long 0x00 "ID_MMFR4,Memory Model Feature Register 4"
bitfld.long 0x00 4.--7. "AC2,Extension of ACTLR and HACTLR by ACTLR2 and HACTLR2" "Reserved,Supported,?..."
rgroup.long c15:0x0020++0x00
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
bitfld.long 0x00 24.--27. "DIVI,Divide instructions support" "Reserved,Reserved,T32/A32,?..."
bitfld.long 0x00 20.--23. "DEBI,Debug instructions support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "CI,Coprocessor instructions support" "Not supported,?..."
newline
bitfld.long 0x00 12.--15. "CBI,Combined compare and branch instructions support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "BI,Bitfield instructions support" "Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "BCI,Bit counting instructions support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "SI,Swap instructions support" "Not supported,?..."
rgroup.long c15:0x0120++0x00
line.long 0x00 "ID_ISAR1,Instruction Set Attributes Register 1"
bitfld.long 0x00 28.--31. "JI,Jazelle instructions support" "Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "INTI,Interwork instructions support" "Reserved,Reserved,Reserved,A32-BX like,?..."
bitfld.long 0x00 20.--23. "IMMI,Immediate instructions support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "ITEI,If then instructions support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "EXTI,Extend instructions support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "EARI,Exception A and R instructions support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 4.--7. "EXIN,Exception in ARM instructions support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "ENDI,Endian instructions support" "Reserved,Supported,?..."
rgroup.long c15:0x0220++0x00
line.long 0x00 "ID_ISAR2,Instruction Set Attributes Register 2"
bitfld.long 0x00 28.--31. "RI,Reversal instructions support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "PSRI,PSR instructions support" "Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "UMI,Advanced unsigned multiply instructions support" "Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "SMI,Advanced signed multiply instructions support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "MI,Multiply instructions support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "II,Multi-access interruptible instructions support" "Reserved,Restartable,?..."
newline
bitfld.long 0x00 4.--7. "MHI,Memory hint instructions support" "Reserved,Reserved,Reserved,Reserved,PLD/PLI/PLDW,?..."
bitfld.long 0x00 0.--3. "LSI,Load and store instructions support" "Reserved,Reserved,Supported,?..."
rgroup.long c15:0x0320++0x00
line.long 0x00 "ID_ISAR3,Instruction Set Attributes Register 3"
bitfld.long 0x00 28.--31. "TEEEI,Thumb-EE extensions support" "Not supported,?..."
bitfld.long 0x00 24.--27. "NOPI,True NOP instructions support" "Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "TCI,Thumb copy instructions support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "TBI,Table branch instructions support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "SPI,Synchronization primitive instructions support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "SVCI,SVC instructions support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 4.--7. "SIMDI,Single instruction multiple data (SIMD) instructions support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "SI,Saturate instructions support" "Reserved,Supported,?..."
rgroup.long c15:0x0420++0x00
line.long 0x00 "ID_ISAR4,Instruction Set Attributes Register 4"
bitfld.long 0x00 28.--31. "SWP_FRAC,Memory system locking support" "Not supported,?..."
bitfld.long 0x00 24.--27. "PSR_M_I,PSR_M instructions support" "Not supported,?..."
bitfld.long 0x00 20.--23. "SPRI,Synchronization primitive instructions" "Supported,?..."
newline
bitfld.long 0x00 16.--19. "BI,Barrier instructions support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "SMCI,SMC instructions support" "Not supported,?..."
bitfld.long 0x00 8.--11. "WBI,Write-back instructions support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 4.--7. "WSI,With-shift instructions support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "UI,Unprivileged instructions support" "Reserved,Reserved,Supported,?..."
rgroup.long c15:0x0520++0x00
line.long 0x00 "ID_ISAR5,Instruction Set Attribute Register 5"
bitfld.long 0x00 16.--19. "CRC32,CRC32 instructions support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "SHA2,SHA2 instructions support" "Not supported,?..."
bitfld.long 0x00 8.--11. "SHA1,SHA1 instructions support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "AES,AES instructions support" "Not supported,?..."
bitfld.long 0x00 0.--3. "SEVL,SEVL instructions support" "Reserved,Supported,?..."
rgroup.long c15:0x0210++0x00
line.long 0x00 "ID_DFR0,Debug Feature Register 0"
bitfld.long 0x00 24.--27. "PMM,Performance monitor model support" "Reserved,Reserved,Reserved,PMUv3,?..."
bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped debug model for M profile processors support" "Not supported,?..."
bitfld.long 0x00 16.--19. "TM_MM,Trace model (memory-mapped) support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-based trace debug model support" "Not supported,?..."
bitfld.long 0x00 0.--3. "CDM_CB,Secure debug model (Coprocessor) support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
rgroup.long c15:0x0000++0x00
line.long 0x00 "MIDR,Main ID Register"
hexmask.long.byte 0x00 24.--31. 1. "IMPL,Implementer code"
bitfld.long 0x00 20.--23. "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. "ARCH,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CPUID scheme"
hexmask.long.word 0x00 4.--15. 1. "PART,Primary part number"
newline
bitfld.long 0x00 0.--3. "REV,Revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long c15:0x0700++0x00
line.long 0x00 "MIDR,Main ID Register (Alias)"
hexmask.long.byte 0x00 24.--31. 1. "IMPL,Implementer code"
bitfld.long 0x00 20.--23. "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. "ARCH,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CPUID scheme"
hexmask.long.word 0x00 4.--15. 1. "PART,Primary part number"
newline
bitfld.long 0x00 0.--3. "REV,Revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long c15:0x0200++0x00
line.long 0x00 "TCMTR,TCM Type Register"
bitfld.long 0x00 29.--31. "TCMS,TCM implemented" "No TCMs,Reserved,Reserved,Reserved,1 TCMs,?..."
bitfld.long 0x00 2. "CTCM,CTCM implemented with non zero size" "Not implemented,Implemented"
bitfld.long 0x00 1. "BTCM,BTCM implemented with non zero size" "Not implemented,Implemented"
newline
bitfld.long 0x00 0. "ATCM,ATCM implemented with non zero size" "Not implemented,Implemented"
rgroup.long c15:0x0300++0x00
line.long 0x00 "TLBTR,TLB Type Register"
rgroup.long c15:0x0500++0x00
line.long 0x00 "MPIDR,Multiprocessor Affinity Register"
bitfld.long 0x00 30. "U,Single core system as distinct from core 0 in a cluster" "Part of a cluster,?..."
bitfld.long 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Largely independent,?..."
newline
hexmask.long.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. The least significant affinity field for this PE in the system"
hexmask.long.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. The intermediate affinity level field for this PE in the system"
hexmask.long.byte 0x00 0.--7. 1. "AFF0,Affinity level 0. The most significant affinity level field for this PE in the system"
rgroup.long c15:0x0600++0x00
line.long 0x00 "REVIDR,Revision ID Register"
hexmask.long.word 0x00 0.--11. 1. "IDNUMBER,Implementation-specific revision information"
rgroup.long c15:0x1700++0x00
line.long 0x00 "AIDR,Auxiliary ID Register"
tree.end
tree "System Control and Configuration"
group.long c15:0x0001++0x00
line.long 0x00 "SCTLR,System Control Register"
bitfld.long 0x00 30. "TE,Thumb exception enable" "A32,T32"
bitfld.long 0x00 25. "EE,Exception endianness" "Little,Big"
rbitfld.long 0x00 21. "FI,Fast interrupts configuration enable" "Disabled,Enabled"
newline
bitfld.long 0x00 20. "UWXN,Unprivileged write permission implies EL1 Execute Never (XN)" "Not forced,Forced"
bitfld.long 0x00 19. "WXN,Write permission implies Execute Never (XN)" "Not forced,Forced"
newline
bitfld.long 0x00 18. "NTWE,Do not trap WFE (Wait for Event) instruction" "Trapped,Not trapped"
bitfld.long 0x00 17. "BR,Background region enable" "Disabled,Enabled"
newline
bitfld.long 0x00 16. "NTWI,Do not trap WFI (Wait For Interrupt) instruction" "Trapped,Not trapped"
bitfld.long 0x00 12. "I,Instruction cache enable" "Disabled,Enabled"
newline
bitfld.long 0x00 8. "SED,SETEND instruction disable" "No,Yes"
bitfld.long 0x00 7. "ITD,IT instruction disable" "No,Yes"
bitfld.long 0x00 5. "CP15BEN,CP15* barrier operations enable" "Disabled,Enabled"
newline
bitfld.long 0x00 2. "C,Data/Unified cache enable" "Disabled,Enabled"
bitfld.long 0x00 1. "A,Alignment fault checking enable" "Disabled,Enabled"
bitfld.long 0x00 0. "M,EL1-controlled MPU enable" "Disabled,Enabled"
group.long c15:0x0201++0x00
line.long 0x00 "CPACR,Architectural Feature Access Control Register"
bitfld.long 0x00 31. "ASEDIS,Disable advanced SIMD extension functionality" "No,Yes"
bitfld.long 0x00 22.--23. "CP11,Coprocessor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x00 20.--21. "CP10,Coprocessor access control" "Denied,Privileged,Reserved,Full"
rgroup.long c15:0x0101++0x00
line.long 0x00 "ACTLR,Auxiliary Control Register"
rgroup.long c15:0x0301++0x00
line.long 0x00 "ACTLR2,Auxiliary Control Register 2"
rgroup.long c15:0x0211++0x00
line.long 0x00 "NSACR,Non-Secure Access Control Register"
group.long c15:0x000B++0x00
line.long 0x00 "IMP_SLAVEPCTLR,Slave Port Control Register"
bitfld.long 0x00 0.--1. "TCMACCLVL,Indicates the privilege level required for the AXIS to access the TCM" "Denied,Privileged,Reserved,Full"
group.long c15:0x000C++0x00
line.long 0x00 "VBAR,Vector Base Address Register"
hexmask.long 0x00 5.--31. 0x20 "VBA,Vector base address"
rgroup.long c15:0x010C++0x00
line.long 0x00 "RVBAR,Reset Vector Base Address Register"
hexmask.long 0x00 1.--31. 0x02 "ADDR,Reset address"
rgroup.long c15:0x001C++0x00
line.long 0x00 "ISR,Interrupt Status Register"
bitfld.long 0x00 8. "A,External abort pending flag" "Not pending,Pending"
bitfld.long 0x00 7. "I,Interrupt pending flag" "Not pending,Pending"
bitfld.long 0x00 6. "F,Fast interrupt pending flag" "Not pending,Pending"
group.long c15:0x0015++0x00
line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register"
bitfld.long 0x00 2.--4. "PORT,Memory or port that caused the fault" "AXIM,Flash interface,LLPP,Internal interface,ATCM,BTCM,CTCM,Overlap"
bitfld.long 0x00 0.--1. "TYPE,Fault type" "Other error,External bus control,TCM/cache/bus data,Bus timeout"
group.long c15:0x0115++0x00
line.long 0x00 "AIFSR,Auxiliary Instruction Fault Status Register"
bitfld.long 0x00 2.--4. "PORT,Memory or port that caused the fault" "AXIM,Flash interface,LLPP,Reserved,ATCM,BTCM,CTCM,Overlap"
bitfld.long 0x00 0.--1. "TYPE,Fault type" "Other error,External bus control,TCM/cache/bus data,Bus timeout"
group.long c15:0x0005++0x00
line.long 0x00 "DFSR,Data Fault Status Register"
bitfld.long 0x00 13. "CM,Cache maintenance fault" "No fault,Fault"
bitfld.long 0x00 12. "EXT,External abort qualifier" "DECERR,SLVERR"
newline
bitfld.long 0x00 11. "WNR,Access caused an abort type" "Read,Write"
bitfld.long 0x00 0.--5. "STATUS,Fault status bits" "Reserved,Reserved,Reserved,Reserved,Translation fault/0th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Permission fault/0th level,Reserved,Reserved,Reserved,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access,Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,LDREX or STREX,?..."
group.long c15:0x0105++0x00
line.long 0x00 "IFSR,Instruction Fault Status Register"
bitfld.long 0x00 16. "FNV,FAR not Valid for a Synchronous External abort" "Valid,?..."
bitfld.long 0x00 12. "EXT,External abort qualifier" "DECERR,SLVERR"
newline
bitfld.long 0x00 9. "LPAE,Translation table formats on Data Abort exception" "Reserved,Long-descriptor"
bitfld.long 0x00 0.--5. "STATUS,Fault status bits" "Reserved,Reserved,Reserved,Reserved,Translation fault/0th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Permission fault/0th level,Reserved,Reserved,Reserved,Synchronous external abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..."
group.long c15:0x0006++0x00
line.long 0x00 "DFAR,Data Fault Address Register"
group.long c15:0x0206++0x00
line.long 0x00 "IFAR,Instruction Fault Address Register"
rgroup.long c15:0x000D++0x00
line.long 0x00 "FCSEIDR,FCSE PID Register"
rgroup.long c15:0x103F++0x00
line.long 0x00 "IMP_CBAR,Configuration Base Address Register"
hexmask.long.word 0x00 21.--31. 0x20 "PERIPHBASE,Upper bits of base physical address of memory-mapped peripherals"
group.long c15:0x020D++0x00
line.long 0x00 "TPIDRURW,Thread Pointer ID Register Unprivileged Read-Write"
group.long c15:0x030D++0x00
line.long 0x00 "TPIDRURO,Thread Pointer ID Register Unprivileged Read-Only"
group.long c15:0x040D++0x00
line.long 0x00 "TPIDRPRW,Thread Pointer ID Register Privileged Read-Write"
tree "System Instructions"
wgroup.long c15:0x0017++0x00
line.long 0x00 "ICIALLUIS,ICIALLUIS"
wgroup.long c15:0x0617++0x00
line.long 0x00 "BPIALLIS,BPIALLIS"
wgroup.long c15:0x0057++0x00
line.long 0x00 "ICIALLU,ICIALLU"
wgroup.long c15:0x0157++0x00
line.long 0x00 "ICIMVAU,ICIMVAU"
wgroup.long c15:0x0457++0x00
line.long 0x00 "CP15ISB,CP15ISB"
wgroup.long c15:0x0657++0x00
line.long 0x00 "BPIALL,BPIALL"
wgroup.long c15:0x0757++0x00
line.long 0x00 "BPIMVA,BPIMVA"
wgroup.long c15:0x0167++0x00
line.long 0x00 "DCIMVAC,DCIMVAC"
wgroup.long c15:0x0267++0x00
line.long 0x00 "DCISW,DCISW"
wgroup.long c15:0x0087++0x00
line.long 0x00 "ATS1CPR,ATS1CPR"
wgroup.long c15:0x0187++0x00
line.long 0x00 "ATS1CPW,ATS1CPW"
wgroup.long c15:0x0287++0x00
line.long 0x00 "ATS1CUR,ATS1CUR"
wgroup.long c15:0x0387++0x00
line.long 0x00 "ATS1CUW,ATS1CUW"
wgroup.long c15:0x0487++0x00
line.long 0x00 "ATS12NSOPR,ATS12NSOPR"
wgroup.long c15:0x0587++0x00
line.long 0x00 "ATS12NSOPW,ATS12NSOPW"
wgroup.long c15:0x0687++0x00
line.long 0x00 "ATS12NSOUR,ATS12NSOUR"
wgroup.long c15:0x0787++0x00
line.long 0x00 "ATS12NSOUW,ATS12NSOUW"
wgroup.long c15:0x01A7++0x00
line.long 0x00 "DCCMVAC,DCCMVAC"
wgroup.long c15:0x02A7++0x00
line.long 0x00 "DCCSW,DCCSW"
wgroup.long c15:0x04A7++0x00
line.long 0x00 "CP15DSB,CP15DSB"
wgroup.long c15:0x05A7++0x00
line.long 0x00 "CP15DMB,CP15DMB"
wgroup.long c15:0x01B7++0x00
line.long 0x00 "DCCMVAU,DCCMVAU"
wgroup.long c15:0x01E7++0x00
line.long 0x00 "DCCIMVAC,DCCIMVAC"
wgroup.long c15:0x02E7++0x00
line.long 0x00 "DCCISW,DCCISW"
wgroup.long c15:0x4087++0x00
line.long 0x00 "ATS1HR,ATS1HR"
wgroup.long c15:0x4187++0x00
line.long 0x00 "ATS1HW,ATS1HW"
tree.end
tree.end
tree "MPU Control and Configuration"
group.long c15:0x0001++0x00
line.long 0x00 "SCTLR,System Control Register"
bitfld.long 0x00 30. "TE,Thumb exception enable" "A32,T32"
bitfld.long 0x00 25. "EE,Exception endianness" "Little,Big"
rbitfld.long 0x00 21. "FI,Fast interrupts configuration enable" "Disabled,Enabled"
newline
bitfld.long 0x00 20. "UWXN,Unprivileged write permission implies EL1 Execute Never (XN)" "Not forced,Forced"
bitfld.long 0x00 19. "WXN,Write permission implies Execute Never (XN)" "Not forced,Forced"
newline
bitfld.long 0x00 18. "NTWE,Do not trap WFE (Wait for Event) instruction" "Trapped,Not trapped"
bitfld.long 0x00 17. "BR,Background region enable" "Disabled,Enabled"
newline
bitfld.long 0x00 16. "NTWI,Do not trap WFI (Wait For Interrupt) instruction" "Trapped,Not trapped"
bitfld.long 0x00 12. "I,Instruction cache enable" "Disabled,Enabled"
newline
bitfld.long 0x00 8. "SED,SETEND instruction disable" "No,Yes"
bitfld.long 0x00 7. "ITD,IT instruction disable" "No,Yes"
bitfld.long 0x00 5. "CP15BEN,CP15* barrier operations enable" "Disabled,Enabled"
newline
bitfld.long 0x00 2. "C,Data/Unified cache enable" "Disabled,Enabled"
bitfld.long 0x00 1. "A,Alignment fault checking enable" "Disabled,Enabled"
bitfld.long 0x00 0. "M,EL1-controlled MPU enable" "Disabled,Enabled"
if (((per.l(c15:0x10070))&0x1)==0x0)
group.quad c15:0x10070++0x01
line.quad 0x00 "PAR,Physical Address Register"
hexmask.quad.byte 0x00 56.--63. 1. "ATTR,Memory attributes for the returned PA"
hexmask.quad.long 0x00 12.--31. 0x1000 "PA,Physical address"
newline
bitfld.quad 0x00 9. "NS,Non-secure" "Reserved,Yes"
bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer shareable,Inner shareable"
newline
bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
else
group.quad c15:0x10070++0x01
line.quad 0x00 "PAR,Physical Address Register"
bitfld.quad 0x00 9. "FSTAGE,Indicates the translation stage at which the translation aborted" "Stage 1,Stage 2"
bitfld.quad 0x00 8. "S2WLK,Translation aborted because of a stage 2 fault during a stage 1 translation table walk" "No,?..."
newline
bitfld.quad 0x00 1.--6. "FST,Fault Status Field" "Reserved,Reserved,Reserved,Reserved,Translation fault/0th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Permission fault/0th level,Reserved,Reserved,Reserved,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access,Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Unsupported Exclusive access,?..."
newline
bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
endif
tree.open "Memory Attribute Indirection Registers"
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.long c15:0x002A++0x00
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.long c15:0x012A++0x00
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
rgroup.long c15:0x003A++0x00
line.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0"
rgroup.long c15:0x013A++0x00
line.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1"
rgroup.long c15:0x403A++0x00
line.long 0x00 "HAMAIR0,Hypervisor Auxiliary Memory Attribute Indirection Register 0"
rgroup.long c15:0x413A++0x00
line.long 0x00 "HAMAIR1,Hypervisor Auxiliary Memory Attribute Indirection Register 1"
group.long c15:0x010D++0x00
line.long 0x00 "CONTEXTIDR,Context ID Register"
tree.end
newline
group.long c15:(0x0019+0x0)++0x00
line.long 0x00 "IMP_ATCMREGIONR,TCM Region Register A"
hexmask.long.long 0x00 13.--31. 0x2000 "BASEADDRESS,TCM base address"
bitfld.long 0x00 8. "WAITSTATES,Wait states for TCM accesses" "0,1"
newline
bitfld.long 0x00 2.--6. "SIZE,TCM size" "No TCM,Reserved,Reserved,Reserved,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,?..."
bitfld.long 0x00 1. "ENABLEEL2,Enable TCM at EL2" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "ENABLEEL10,Enable TCM at EL1 and EL0" "Disabled,Enabled"
group.long c15:(0x0019+0x100)++0x00
line.long 0x00 "IMP_BTCMREGIONR,TCM Region Register B"
hexmask.long.long 0x00 13.--31. 0x2000 "BASEADDRESS,TCM base address"
bitfld.long 0x00 8. "WAITSTATES,Wait states for TCM accesses" "0,1"
newline
bitfld.long 0x00 2.--6. "SIZE,TCM size" "No TCM,Reserved,Reserved,Reserved,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,?..."
bitfld.long 0x00 1. "ENABLEEL2,Enable TCM at EL2" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "ENABLEEL10,Enable TCM at EL1 and EL0" "Disabled,Enabled"
group.long c15:(0x0019+0x200)++0x00
line.long 0x00 "IMP_CTCMREGIONR,TCM Region Register C"
hexmask.long.long 0x00 13.--31. 0x2000 "BASEADDRESS,TCM base address"
bitfld.long 0x00 8. "WAITSTATES,Wait states for TCM accesses" "0,1"
newline
bitfld.long 0x00 2.--6. "SIZE,TCM size" "No TCM,Reserved,Reserved,Reserved,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,?..."
bitfld.long 0x00 1. "ENABLEEL2,Enable TCM at EL2" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "ENABLEEL10,Enable TCM at EL1 and EL0" "Disabled,Enabled"
group.long c15:0x1219++0x00
line.long 0x00 "IMP_MEMPROTCTLR,Memory Protection Control Register"
rbitfld.long 0x00 5. "FLASHPROTIMP,Flash protection implemented" "Not implemented,Implemented"
rbitfld.long 0x00 4. "RAMPROTIMP,RAM protection implemented" "Not implemented,Implemented"
newline
bitfld.long 0x00 1. "FLASHPROTEN,Flash interface protection enable" "Disabled,Enabled"
bitfld.long 0x00 0. "RAMPROTEN,TCM and L1 cache RAM protection enable" "Disabled,Enabled"
group.long c15:0x000F++0x00
line.long 0x00 "IMP_PERIPHPREGIONR,Peripheral Port Region Register"
hexmask.long.tbyte 0x00 12.--31. 0x10 "BASEADDRESS,Peripheral port region base address"
bitfld.long 0x00 2.--6. "SIZE,Peripheral port region size" "No peripheral port,Reserved,Reserved,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,?..."
newline
bitfld.long 0x00 1. "ENABLEEL2,Enable peripheral port at EL2" "Disabled,Enabled"
bitfld.long 0x00 0. "ENABLEEL10,Enable peripheral port at EL1 and EL0" "Disabled,Enabled"
group.long c15:0x010F++0x00
line.long 0x00 "IMP_FLASHIFREGIONR,Flash Interface Region Register"
hexmask.long.byte 0x00 27.--31. 0x08 "BASEADDRESS,Peripheral port region base address"
bitfld.long 0x00 2.--6. "SIZE,Flash interface region size" "No flash,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,128 MB,?..."
newline
bitfld.long 0x00 0. "ENABLE,Enable the flash interface" "Disabled,Enabled"
rgroup.long c15:0x002F++0x00
line.long 0x00 "IMP_BUILDOPTR,Build Options Register"
bitfld.long 0x00 30.--31. "LOCK_STEP,DCLS functionality implemented" "Not implemented,DCLS configuration,Split/lock configuration,?..."
bitfld.long 0x00 28.--29. "BUS_PROTECTION,Bus protection scheme implemented (signal integrity/interconnect protection)" "Not implemented,Implemented/Not implemented,Implemented,?..."
newline
bitfld.long 0x00 26.--27. "FLASH_DATA_ECC_SCHEME,Flash memory interface data ECC chunk size" "Reserved,64 bit,128 bit,?..."
bitfld.long 0x00 20.--23. "AXIS_ID_WIDTH,Width of AXIS interface ID signals" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 8. "NUM_GIC_EXT_DEV,Number of external device interfaces to the GIC" "0,1"
bitfld.long 0x00 0.--3. "NUM_CORES,Number of cores in the Cortex-R52 processor" "0,1,2,3,?..."
rgroup.long c15:0x072F++0x00
line.long 0x00 "IMP_PINOPTR,Pin Options Register"
hexmask.long.byte 0x00 24.--31. 1. "CFGAXISTCMBASEADDR,Value of the CFGAXISTCMBASEADDR signal"
bitfld.long 0x00 23. "CFGSLSPLIT,Value of the CFGSLSPLIT signal" "0,1"
newline
bitfld.long 0x00 21.--22. "CFGCLUSTERUTID,Value of the CFGCLUSTERUTID signal" "0,1,2,3"
bitfld.long 0x00 18. "CFGFLASHPROTEN,Value of the CFGFLASHPROTEN signal" "0,1"
newline
bitfld.long 0x00 17. "CFGRAMPROTEN,Value of the CFGRAMPROTEN signal" "0,1"
bitfld.long 0x00 16. "CFGINITREG,Value of the CFGINITREG signal" "0,1"
newline
bitfld.long 0x00 15. "CFGMRPEN,Value of the CFGMRPEN signal" "0,1"
bitfld.long 0x00 6. "CFGL1CACHEINVDISX,Value of the CFGL1CACHEINVDISx signal" "0,1"
newline
bitfld.long 0x00 5. "CFGENDIANNESSX,Value of the CFGENDIANNESSX signal" "0,1"
bitfld.long 0x00 4. "CFGTHUMBEXCEPTIONSX,Value of the CFGTHUMBEXCEPTIONSx signal" "0,1"
newline
bitfld.long 0x00 2. "CFGFLASHENX,Value of the CFGFLASHENx signal" "0,1"
bitfld.long 0x00 0. "CFGTCMBOOTX,Value of the CFGTCMBOOTx signal" "0,1"
group.long c15:0x113F++0x00
line.long 0x00 "IMP_QOSR,Quality Of Service Register"
bitfld.long 0x00 8.--11. "AWQOS[3:0],QoS identifier sent on the write address channel for each write transaction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "ARQOS[3:0],QoS identifier sent on the read address channel for each read transaction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long c15:0x123F++0x00
line.long 0x00 "IMP_BUSTIMEOUTR,Bus Timeout Register"
hexmask.long.byte 0x00 24.--31. 1. "MAXCYCLESBY16FLASH,Flash interface timeout value in cycles divided by 16"
hexmask.long.byte 0x00 16.--23. 1. "MAXCYCLESBY16LLPP,LLPP timeout value in cycles divided by 16"
newline
hexmask.long.byte 0x00 8.--15. 1. "MAXCYCLESBY16AXIM,AXIM interface timeout value in cycles divided by 16"
bitfld.long 0x00 6. "ABORTFLASH,Abort flash access" "Not aborted,Aborted"
newline
bitfld.long 0x00 5. "ABORTLLPP,Abort LLPP access" "Not aborted,Aborted"
bitfld.long 0x00 4. "ABORTAXIM,Abort AXIM access" "Not aborted,Aborted"
newline
bitfld.long 0x00 2. "ENABLEFLASH,Timeout counter enable for flash interface" "Disabled,Enabled"
bitfld.long 0x00 1. "ENABLELLPP,Timeout counter enable for LLPP" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "ENABLEAXIM,Timeout counter enable for AXIM interface" "Disabled,Enabled"
group.long c15:0x143F++0x00
line.long 0x00 "IMP_INTMONR,Interrupt Monitoring Register"
hexmask.long.byte 0x00 8.--15. 1. "MAXCYCLESBY16,Maximum count divided by 16"
bitfld.long 0x00 4. "MODE,Operation mode of the counter" "Watchdog,Maximum value monitor"
newline
bitfld.long 0x00 2. "ENABLESER,Enable counting of cycles in which physical system errors are masked" "Disabled,Enabled"
bitfld.long 0x00 1. "ENABLEIRQ,Enable counting of physical interrupts that cannot be taken" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "ENABLEFIQ,Enable counting of fast interrupts that cannot be taken" "Disabled,Enabled"
group.long c15:(0x200F+0x0)++0x00
line.long 0x00 "IMP_ICERR0,Instruction Cache Error Record Register 0"
hexmask.long.byte 0x00 24.--31. 1. "RAMID,RAM bank"
hexmask.long.byte 0x00 4.--10. 1. "INDEX,Instruction cache index"
newline
bitfld.long 0x00 0. "VALID,Register contents are valid" "Not valid,Valid"
group.long c15:(0x200F+0x100)++0x00
line.long 0x00 "IMP_ICERR1,Instruction Cache Error Record Register 1"
hexmask.long.byte 0x00 24.--31. 1. "RAMID,RAM bank"
hexmask.long.byte 0x00 4.--10. 1. "INDEX,Instruction cache index"
newline
bitfld.long 0x00 0. "VALID,Register contents are valid" "Not valid,Valid"
group.long c15:(0x201F+0x0)++0x00
line.long 0x00 "IMP_DCERR0,Data Cache Error Record Register 0"
hexmask.long.word 0x00 20.--31. 1. "RAMID,RAM bank"
hexmask.long.byte 0x00 4.--10. 1. "INDEX,Data cache index"
newline
bitfld.long 0x00 0. "VALID,Register contents are valid" "Not valid,Valid"
group.long c15:(0x201F+0x100)++0x00
line.long 0x00 "IMP_DCERR1,Data Cache Error Record Register 1"
hexmask.long.word 0x00 20.--31. 1. "RAMID,RAM bank"
hexmask.long.byte 0x00 4.--10. 1. "INDEX,Data cache index"
newline
bitfld.long 0x00 0. "VALID,Register contents are valid" "Not valid,Valid"
group.long c15:(0x202F+0x0)++0x00
line.long 0x00 "IMP_TCMERR0,TCM Error Record Register 0"
hexmask.long.byte 0x00 24.--31. 1. "RAMID,RAM bank"
hexmask.long.tbyte 0x00 4.--20. 1. "INDEX,Bits [19:3] of the access address"
newline
bitfld.long 0x00 1. "FATAL,Fatal error" "Correctable,Fatal"
bitfld.long 0x00 0. "VALID,Register contents are valid" "Not valid,Valid"
group.long c15:(0x202F+0x100)++0x00
line.long 0x00 "IMP_TCMERR1,TCM Error Record Register 1"
hexmask.long.byte 0x00 24.--31. 1. "RAMID,RAM bank"
hexmask.long.tbyte 0x00 4.--20. 1. "INDEX,Bits [19:3] of the access address"
newline
bitfld.long 0x00 1. "FATAL,Fatal error" "Correctable,Fatal"
bitfld.long 0x00 0. "VALID,Register contents are valid" "Not valid,Valid"
rgroup.long c15:(0x222F+0x0)++0x00
line.long 0x00 "IMP_TCMSYNDR0,TCM Syndrome Register 0"
hexmask.long.byte 0x00 8.--14. 1. "BANK1,Syndrome for a bank 1 error"
hexmask.long.byte 0x00 0.--7. 1. "BANK0,Syndrome for a bank 0 error"
rgroup.long c15:(0x222F+0x100)++0x00
line.long 0x00 "IMP_TCMSYNDR1,TCM Syndrome Register 1"
hexmask.long.byte 0x00 8.--14. 1. "BANK1,Syndrome for a bank 1 error"
hexmask.long.byte 0x00 0.--7. 1. "BANK0,Syndrome for a bank 0 error"
group.long c15:(0x203F+0x0)++0x00
line.long 0x00 "IMP_FLASHERR0,Flash Error Record Register 0"
hexmask.long 0x00 4.--28. 1. "INDEX,Bits [25:1] of the access address"
bitfld.long 0x00 2. "LATE,Late error" "Not late,Late"
newline
bitfld.long 0x00 1. "FATAL,Fatal error" "Correctable,Fatal"
bitfld.long 0x00 0. "VALID,Register contents are valid" "Not valid,Valid"
group.long c15:(0x203F+0x100)++0x00
line.long 0x00 "IMP_FLASHERR1,Flash Error Record Register 1"
hexmask.long 0x00 4.--28. 1. "INDEX,Bits [25:1] of the access address"
bitfld.long 0x00 2. "LATE,Late error" "Not late,Late"
newline
bitfld.long 0x00 1. "FATAL,Fatal error" "Correctable,Fatal"
bitfld.long 0x00 0. "VALID,Register contents are valid" "Not valid,Valid"
rgroup.long c15:0x400F++0x00
line.long 0x00 "IMP_TESTR0,Test Register 0"
bitfld.long 0x00 5. "VSEI,Virtual system error interrupt signal value" "0,1"
bitfld.long 0x00 4. "SEI,System error interrupt signal value" "0,1"
newline
bitfld.long 0x00 3. "VIRQ,Virtual IRQ interrupt signal value" "0,1"
bitfld.long 0x00 2. "IRQ,IRQ interrupt signal value" "0,1"
newline
bitfld.long 0x00 1. "VFIQ,Virtual FIQ interrupt signal value" "0,1"
bitfld.long 0x00 0. "FIQ,FIQ interrupt signal value" "0,1"
wgroup.long c15:0x410F++0x00
line.long 0x00 "IMP_TESTR1,Test Register 1"
tree.end
tree "Memory Protection Unit PL1"
rgroup.long c15:0x400++0x00
line.long 0x00 "MPUIR,MPU Type Register"
bitfld.long 0x00 8.--15. 1. "DREGION,Number of programmable memory regions" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16,Reserved,Reserved,Reserved,20,Reserved,Reserved,Reserved,24,?..."
bitfld.long 0x00 0. "NU,Not unified MPU" "Unified,?..."
if (((per.l(c15:0x400))&0xFF00)>=0x1800)
group.long c15:0x0126++0x00
line.long 0x00 "PRSELR,Protection Region Selection Register"
bitfld.long 0x00 0.--4. "REGION,Indicates the memory region accessed by PRBAR and PRBAR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
elif (((per.l(c15:0x400))&0xFF00)>=0x1400)
group.long c15:0x0126++0x00
line.long 0x00 "PRSELR,Protection Region Selection Register"
bitfld.long 0x00 0.--4. "REGION,Indicates the memory region accessed by PRBAR and PRBAR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,?..."
elif (((per.l(c15:0x400))&0xFF00)>=0x1000)
group.long c15:0x0126++0x00
line.long 0x00 "PRSELR,Protection Region Selection Register"
bitfld.long 0x00 0.--3. "REGION,Indicates the memory region accessed by PRBAR and PRBAR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
hgroup.long c15:0x0126++0x00
hide.long 0x00 "PRSELR,Protection Region Selection Register"
endif
group.long c15:0x0036++0x00
line.long 0x00 "PRBAR,Protection Region Base Address Register"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:0x0136++0x00
line.long 0x00 "PRLAR,Protection Region Limit Address Register"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
tree "MPU regions"
if (((per.l(c15:0x400))&0xFF00)>=0x1000)
group.long c15:(0x0086+0x0)++0x00 "Region 0"
line.long 0x00 "PRBAR0,Protection Region Base Address Register 0"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x0186+0x0)++0x00
line.long 0x00 "PRLAR0,Protection Region Limit Address Register 0"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x0486+0x0)++0x00 "Region 1"
line.long 0x00 "PRBAR1,Protection Region Base Address Register 1"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x0586+0x0)++0x00
line.long 0x00 "PRLAR1,Protection Region Limit Address Register 1"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x0086+0x10)++0x00 "Region 2"
line.long 0x00 "PRBAR2,Protection Region Base Address Register 2"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x0186+0x10)++0x00
line.long 0x00 "PRLAR2,Protection Region Limit Address Register 2"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x0486+0x10)++0x00 "Region 3"
line.long 0x00 "PRBAR3,Protection Region Base Address Register 3"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x0586+0x10)++0x00
line.long 0x00 "PRLAR3,Protection Region Limit Address Register 3"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x0086+0x20)++0x00 "Region 4"
line.long 0x00 "PRBAR4,Protection Region Base Address Register 4"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x0186+0x20)++0x00
line.long 0x00 "PRLAR4,Protection Region Limit Address Register 4"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x0486+0x20)++0x00 "Region 5"
line.long 0x00 "PRBAR5,Protection Region Base Address Register 5"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x0586+0x20)++0x00
line.long 0x00 "PRLAR5,Protection Region Limit Address Register 5"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x0086+0x30)++0x00 "Region 6"
line.long 0x00 "PRBAR6,Protection Region Base Address Register 6"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x0186+0x30)++0x00
line.long 0x00 "PRLAR6,Protection Region Limit Address Register 6"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x0486+0x30)++0x00 "Region 7"
line.long 0x00 "PRBAR7,Protection Region Base Address Register 7"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x0586+0x30)++0x00
line.long 0x00 "PRLAR7,Protection Region Limit Address Register 7"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x0086+0x40)++0x00 "Region 8"
line.long 0x00 "PRBAR8,Protection Region Base Address Register 8"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x0186+0x40)++0x00
line.long 0x00 "PRLAR8,Protection Region Limit Address Register 8"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x0486+0x40)++0x00 "Region 9"
line.long 0x00 "PRBAR9,Protection Region Base Address Register 9"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x0586+0x40)++0x00
line.long 0x00 "PRLAR9,Protection Region Limit Address Register 9"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x0086+0x50)++0x00 "Region 10"
line.long 0x00 "PRBAR10,Protection Region Base Address Register 10"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x0186+0x50)++0x00
line.long 0x00 "PRLAR10,Protection Region Limit Address Register 10"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x0486+0x50)++0x00 "Region 11"
line.long 0x00 "PRBAR11,Protection Region Base Address Register 11"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x0586+0x50)++0x00
line.long 0x00 "PRLAR11,Protection Region Limit Address Register 11"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x0086+0x60)++0x00 "Region 12"
line.long 0x00 "PRBAR12,Protection Region Base Address Register 12"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x0186+0x60)++0x00
line.long 0x00 "PRLAR12,Protection Region Limit Address Register 12"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x0486+0x60)++0x00 "Region 13"
line.long 0x00 "PRBAR13,Protection Region Base Address Register 13"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x0586+0x60)++0x00
line.long 0x00 "PRLAR13,Protection Region Limit Address Register 13"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x0086+0x70)++0x00 "Region 14"
line.long 0x00 "PRBAR14,Protection Region Base Address Register 14"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x0186+0x70)++0x00
line.long 0x00 "PRLAR14,Protection Region Limit Address Register 14"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x0486+0x70)++0x00 "Region 15"
line.long 0x00 "PRBAR15,Protection Region Base Address Register 15"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x0586+0x70)++0x00
line.long 0x00 "PRLAR15,Protection Region Limit Address Register 15"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
else
hgroup.long c15:(0x0086+0x0)++0x00 "Region 0 (not implemented)"
hide.long 0x00 "PRBAR0,Protection Region Base Address Register 0"
newline
hgroup.long c15:(0x0186+0x0)++0x00
hide.long 0x00 "PRLAR0,Protection Region Limit Address Register 0"
hgroup.long c15:(0x0486+0x0)++0x00 "Region 1 (not implemented)"
hide.long 0x00 "PRBAR1,Protection Region Base Address Register 1"
newline
hgroup.long c15:(0x0586+0x0)++0x00
hide.long 0x00 "PRLAR1,Protection Region Limit Address Register 1"
hgroup.long c15:(0x0086+0x10)++0x00 "Region 2 (not implemented)"
hide.long 0x00 "PRBAR2,Protection Region Base Address Register 2"
newline
hgroup.long c15:(0x0186+0x10)++0x00
hide.long 0x00 "PRLAR2,Protection Region Limit Address Register 2"
hgroup.long c15:(0x0486+0x10)++0x00 "Region 3 (not implemented)"
hide.long 0x00 "PRBAR3,Protection Region Base Address Register 3"
newline
hgroup.long c15:(0x0586+0x10)++0x00
hide.long 0x00 "PRLAR3,Protection Region Limit Address Register 3"
hgroup.long c15:(0x0086+0x20)++0x00 "Region 4 (not implemented)"
hide.long 0x00 "PRBAR4,Protection Region Base Address Register 4"
newline
hgroup.long c15:(0x0186+0x20)++0x00
hide.long 0x00 "PRLAR4,Protection Region Limit Address Register 4"
hgroup.long c15:(0x0486+0x20)++0x00 "Region 5 (not implemented)"
hide.long 0x00 "PRBAR5,Protection Region Base Address Register 5"
newline
hgroup.long c15:(0x0586+0x20)++0x00
hide.long 0x00 "PRLAR5,Protection Region Limit Address Register 5"
hgroup.long c15:(0x0086+0x30)++0x00 "Region 6 (not implemented)"
hide.long 0x00 "PRBAR6,Protection Region Base Address Register 6"
newline
hgroup.long c15:(0x0186+0x30)++0x00
hide.long 0x00 "PRLAR6,Protection Region Limit Address Register 6"
hgroup.long c15:(0x0486+0x30)++0x00 "Region 7 (not implemented)"
hide.long 0x00 "PRBAR7,Protection Region Base Address Register 7"
newline
hgroup.long c15:(0x0586+0x30)++0x00
hide.long 0x00 "PRLAR7,Protection Region Limit Address Register 7"
hgroup.long c15:(0x0086+0x40)++0x00 "Region 8 (not implemented)"
hide.long 0x00 "PRBAR8,Protection Region Base Address Register 8"
newline
hgroup.long c15:(0x0186+0x40)++0x00
hide.long 0x00 "PRLAR8,Protection Region Limit Address Register 8"
hgroup.long c15:(0x0486+0x40)++0x00 "Region 9 (not implemented)"
hide.long 0x00 "PRBAR9,Protection Region Base Address Register 9"
newline
hgroup.long c15:(0x0586+0x40)++0x00
hide.long 0x00 "PRLAR9,Protection Region Limit Address Register 9"
hgroup.long c15:(0x0086+0x50)++0x00 "Region 10 (not implemented)"
hide.long 0x00 "PRBAR10,Protection Region Base Address Register 10"
newline
hgroup.long c15:(0x0186+0x50)++0x00
hide.long 0x00 "PRLAR10,Protection Region Limit Address Register 10"
hgroup.long c15:(0x0486+0x50)++0x00 "Region 11 (not implemented)"
hide.long 0x00 "PRBAR11,Protection Region Base Address Register 11"
newline
hgroup.long c15:(0x0586+0x50)++0x00
hide.long 0x00 "PRLAR11,Protection Region Limit Address Register 11"
hgroup.long c15:(0x0086+0x60)++0x00 "Region 12 (not implemented)"
hide.long 0x00 "PRBAR12,Protection Region Base Address Register 12"
newline
hgroup.long c15:(0x0186+0x60)++0x00
hide.long 0x00 "PRLAR12,Protection Region Limit Address Register 12"
hgroup.long c15:(0x0486+0x60)++0x00 "Region 13 (not implemented)"
hide.long 0x00 "PRBAR13,Protection Region Base Address Register 13"
newline
hgroup.long c15:(0x0586+0x60)++0x00
hide.long 0x00 "PRLAR13,Protection Region Limit Address Register 13"
hgroup.long c15:(0x0086+0x70)++0x00 "Region 14 (not implemented)"
hide.long 0x00 "PRBAR14,Protection Region Base Address Register 14"
newline
hgroup.long c15:(0x0186+0x70)++0x00
hide.long 0x00 "PRLAR14,Protection Region Limit Address Register 14"
hgroup.long c15:(0x0486+0x70)++0x00 "Region 15 (not implemented)"
hide.long 0x00 "PRBAR15,Protection Region Base Address Register 15"
newline
hgroup.long c15:(0x0586+0x70)++0x00
hide.long 0x00 "PRLAR15,Protection Region Limit Address Register 15"
endif
if (((per.l(c15:0x400))&0xFF00)>=0x1400)
group.long c15:(0x1086+0x0)++0x00 "Region 16"
line.long 0x00 "PRBAR16,Protection Region Base Address Register 16"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "AP,Access Permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x1186+0x0)++0x00
line.long 0x00 "PRLAR16,Protection Region Limit Address Register 16"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x1486+0x0)++0x00 "Region 17"
line.long 0x00 "PRBAR17,Protection Region Base Address Register 17"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access Permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x1586+0x0)++0x00
line.long 0x00 "PRLAR17,Protection Region Limit Address Register 17"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x1086+0x10)++0x00 "Region 18"
line.long 0x00 "PRBAR18,Protection Region Base Address Register 18"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "AP,Access Permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x1186+0x10)++0x00
line.long 0x00 "PRLAR18,Protection Region Limit Address Register 18"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x1486+0x10)++0x00 "Region 19"
line.long 0x00 "PRBAR19,Protection Region Base Address Register 19"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access Permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x1586+0x10)++0x00
line.long 0x00 "PRLAR19,Protection Region Limit Address Register 19"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
else
hgroup.long c15:(0x1086+0x0)++0x00 "Region 16 (not implemented)"
hide.long 0x00 "PRBAR16,Protection Region Base Address Register 16"
newline
hgroup.long c15:(0x1186+0x0)++0x00
hide.long 0x00 "PRLAR16,Protection Region Limit Address Register 16"
hgroup.long c15:(0x1486+0x0)++0x00 "Region 17 (not implemented)"
hide.long 0x00 "PRBAR17,Protection Region Base Address Register 17"
newline
hgroup.long c15:(0x1586+0x0)++0x00
hide.long 0x00 "PRLAR17,Protection Region Limit Address Register 17"
hgroup.long c15:(0x1086+0x10)++0x00 "Region 18 (not implemented)"
hide.long 0x00 "PRBAR18,Protection Region Base Address Register 18"
newline
hgroup.long c15:(0x1186+0x10)++0x00
hide.long 0x00 "PRLAR18,Protection Region Limit Address Register 18"
hgroup.long c15:(0x1486+0x10)++0x00 "Region 19 (not implemented)"
hide.long 0x00 "PRBAR19,Protection Region Base Address Register 19"
newline
hgroup.long c15:(0x1586+0x10)++0x00
hide.long 0x00 "PRLAR19,Protection Region Limit Address Register 19"
endif
if (((per.l(c15:0x400))&0xFF00)>=0x1800)
group.long c15:(0x1086+0x20)++0x00 "Region 20"
line.long 0x00 "PRBAR20,Protection Region Base Address Register 20"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "AP,Access Permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x1186+0x20)++0x00
line.long 0x00 "PRLAR20,Protection Region Limit Address Register 20"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x1486+0x20)++0x00 "Region 21"
line.long 0x00 "PRBAR21,Protection Region Base Address Register 21"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access Permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x1586+0x20)++0x00
line.long 0x00 "PRLAR21,Protection Region Limit Address Register 21"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x1086+0x30)++0x00 "Region 22"
line.long 0x00 "PRBAR22,Protection Region Base Address Register 22"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "AP,Access Permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x1186+0x30)++0x00
line.long 0x00 "PRLAR22,Protection Region Limit Address Register 22"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x1486+0x30)++0x00 "Region 23"
line.long 0x00 "PRBAR23,Protection Region Base Address Register 23"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access Permission bits" "None/RW,R/W,None/RO,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x1586+0x30)++0x00
line.long 0x00 "PRLAR23,Protection Region Limit Address Register 23"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL1 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
else
hgroup.long c15:(0x1086+0x20)++0x00 "Region 20 (not implemented)"
hide.long 0x00 "PRBAR20,Protection Region Base Address Register 20"
newline
hgroup.long c15:(0x1186+0x20)++0x00
hide.long 0x00 "PRLAR20,Protection Region Limit Address Register 20"
hgroup.long c15:(0x1486+0x20)++0x00 "Region 21 (not implemented)"
hide.long 0x00 "PRBAR21,Protection Region Base Address Register 21"
newline
hgroup.long c15:(0x1586+0x20)++0x00
hide.long 0x00 "PRLAR21,Protection Region Limit Address Register 21"
hgroup.long c15:(0x1086+0x30)++0x00 "Region 22 (not implemented)"
hide.long 0x00 "PRBAR22,Protection Region Base Address Register 22"
newline
hgroup.long c15:(0x1186+0x30)++0x00
hide.long 0x00 "PRLAR22,Protection Region Limit Address Register 22"
hgroup.long c15:(0x1486+0x30)++0x00 "Region 23 (not implemented)"
hide.long 0x00 "PRBAR23,Protection Region Base Address Register 23"
newline
hgroup.long c15:(0x1586+0x30)++0x00
hide.long 0x00 "PRLAR23,Protection Region Limit Address Register 23"
endif
tree.end
tree.end
tree "Memory Protection Unit PL2"
rgroup.long c15:0x4400++0x00
line.long 0x00 "HMPUIR,Hypervisor MPU Type Register"
bitfld.long 0x00 0.--7. 1. "REGION,Identifies the number of implemented regions" "0,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16,Reserved,Reserved,Reserved,20,Reserved,Reserved,Reserved,24,?..."
if (((per.l(c15:0x4400))&0xFF)>=0x18)
group.long c15:0x4116++0x00
line.long 0x00 "HPRENR,Hypervisor MPU Region Enable Register"
bitfld.long 0x00 23. "EN23,Region enable 23" "Disabled,Enabled"
bitfld.long 0x00 22. "EN22,Region enable 22" "Disabled,Enabled"
bitfld.long 0x00 21. "EN21,Region enable 21" "Disabled,Enabled"
newline
bitfld.long 0x00 20. "EN20,Region enable 20" "Disabled,Enabled"
bitfld.long 0x00 19. "EN19,Region enable 19" "Disabled,Enabled"
bitfld.long 0x00 18. "EN18,Region enable 18" "Disabled,Enabled"
newline
bitfld.long 0x00 17. "EN17,Region enable 17" "Disabled,Enabled"
bitfld.long 0x00 16. "EN16,Region enable 16" "Disabled,Enabled"
bitfld.long 0x00 15. "EN15,Region enable 15" "Disabled,Enabled"
newline
bitfld.long 0x00 14. "EN14,Region enable 14" "Disabled,Enabled"
bitfld.long 0x00 13. "EN13,Region enable 13" "Disabled,Enabled"
bitfld.long 0x00 12. "EN12,Region enable 12" "Disabled,Enabled"
newline
bitfld.long 0x00 11. "EN11,Region enable 11" "Disabled,Enabled"
bitfld.long 0x00 10. "EN10,Region enable 10" "Disabled,Enabled"
bitfld.long 0x00 9. "EN9,Region enable 9" "Disabled,Enabled"
newline
bitfld.long 0x00 8. "EN8,Region enable 8" "Disabled,Enabled"
bitfld.long 0x00 7. "EN7,Region enable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "EN6,Region enable 6" "Disabled,Enabled"
newline
bitfld.long 0x00 5. "EN5,Region enable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "EN4,Region enable 4" "Disabled,Enabled"
bitfld.long 0x00 3. "EN3,Region enable 3" "Disabled,Enabled"
newline
bitfld.long 0x00 2. "EN2,Region enable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "EN1,Region enable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "EN0,Region enable 0" "Disabled,Enabled"
elif (((per.l(c15:0x4400))&0xFF)>=0x14)
group.long c15:0x4116++0x00
line.long 0x00 "HPRENR,Hypervisor MPU Region Enable Register"
bitfld.long 0x00 19. "EN19,Region enable 19" "Disabled,Enabled"
bitfld.long 0x00 18. "EN18,Region enable 18" "Disabled,Enabled"
bitfld.long 0x00 17. "EN17,Region enable 17" "Disabled,Enabled"
newline
bitfld.long 0x00 16. "EN16,Region enable 16" "Disabled,Enabled"
bitfld.long 0x00 15. "EN15,Region enable 15" "Disabled,Enabled"
bitfld.long 0x00 14. "EN14,Region enable 14" "Disabled,Enabled"
newline
bitfld.long 0x00 13. "EN13,Region enable 13" "Disabled,Enabled"
bitfld.long 0x00 12. "EN12,Region enable 12" "Disabled,Enabled"
bitfld.long 0x00 11. "EN11,Region enable 11" "Disabled,Enabled"
newline
bitfld.long 0x00 10. "EN10,Region enable 10" "Disabled,Enabled"
bitfld.long 0x00 9. "EN9,Region enable 9" "Disabled,Enabled"
bitfld.long 0x00 8. "EN8,Region enable 8" "Disabled,Enabled"
newline
bitfld.long 0x00 7. "EN7,Region enable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "EN6,Region enable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "EN5,Region enable 5" "Disabled,Enabled"
newline
bitfld.long 0x00 4. "EN4,Region enable 4" "Disabled,Enabled"
bitfld.long 0x00 3. "EN3,Region enable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "EN2,Region enable 2" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "EN1,Region enable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "EN0,Region enable 0" "Disabled,Enabled"
elif (((per.l(c15:0x4400))&0xFF)>=0x10)
group.long c15:0x4116++0x00
line.long 0x00 "HPRENR,Hypervisor MPU Region Enable Register"
bitfld.long 0x00 15. "EN15,Region enable 15" "Disabled,Enabled"
bitfld.long 0x00 14. "EN14,Region enable 14" "Disabled,Enabled"
bitfld.long 0x00 13. "EN13,Region enable 13" "Disabled,Enabled"
newline
bitfld.long 0x00 12. "EN12,Region enable 12" "Disabled,Enabled"
bitfld.long 0x00 11. "EN11,Region enable 11" "Disabled,Enabled"
bitfld.long 0x00 10. "EN10,Region enable 10" "Disabled,Enabled"
newline
bitfld.long 0x00 9. "EN9,Region enable 9" "Disabled,Enabled"
bitfld.long 0x00 8. "EN8,Region enable 8" "Disabled,Enabled"
bitfld.long 0x00 7. "EN7,Region enable 7" "Disabled,Enabled"
newline
bitfld.long 0x00 6. "EN6,Region enable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "EN5,Region enable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "EN4,Region enable 4" "Disabled,Enabled"
newline
bitfld.long 0x00 3. "EN3,Region enable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "EN2,Region enable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "EN1,Region enable 1" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "EN0,Region enable 0" "Disabled,Enabled"
else
rgroup.long c15:0x4116++0x00
line.long 0x00 "HPRENR,Hypervisor MPU Region Enable Register"
endif
if (((per.l(c15:0x4400))&0xFF)>=0x18)
group.long c15:0x4126++0x00
line.long 0x00 "HPRSELR,Hypervisor Protection Region Selection Register"
bitfld.long 0x00 0.--4. "REGION,The number of the current region visible in HPRBAR and HPRLAR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
elif (((per.l(c15:0x4400))&0xFF)>=0x14)
group.long c15:0x4126++0x00
line.long 0x00 "HPRSELR,Hypervisor Protection Region Selection Register"
bitfld.long 0x00 0.--4. "REGION,The number of the current region visible in HPRBAR and HPRLAR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,?..."
elif (((per.l(c15:0x4400))&0xFF)>=0x10)
group.long c15:0x4126++0x00
line.long 0x00 "HPRSELR,Hypervisor Protection Region Selection Register"
bitfld.long 0x00 0.--3. "REGION,The number of the current region visible in HPRBAR and HPRLAR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
hgroup.long c15:0x4126++0x00
hide.long 0x00 "HPRSELR,Hypervisor Protection Region Selection Register"
endif
group.long c15:0x4036++0x00
line.long 0x00 "HPRBAR,Hypervisor Protection Region Base Address Register"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:0x4136++0x00
line.long 0x00 "HPRLAR,Hypervisor Protection Region Limit Address Register"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
tree "MPU regions"
if (((per.l(c15:0x4400))&0xFF)>=0x10)
group.long c15:(0x4086+0x0)++0x00 "Region 0"
line.long 0x00 "HPRBAR0,Hypervisor Protection Region Base Address Register 0"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x4186+0x0)++0x00
line.long 0x00 "HPRLAR0,Hypervisor Protection Region Limit Address Register 0"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x4486+0x0)++0x00 "Region 1"
line.long 0x00 "HPRBAR1,Hypervisor Protection Region Base Address Register 1"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x4586+0x0)++0x00
line.long 0x00 "HPRLAR1,Hypervisor Protection Region Limit Address Register 1"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x4086+0x10)++0x00 "Region 2"
line.long 0x00 "HPRBAR2,Hypervisor Protection Region Base Address Register 2"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x4186+0x10)++0x00
line.long 0x00 "HPRLAR2,Hypervisor Protection Region Limit Address Register 2"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x4486+0x10)++0x00 "Region 3"
line.long 0x00 "HPRBAR3,Hypervisor Protection Region Base Address Register 3"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x4586+0x10)++0x00
line.long 0x00 "HPRLAR3,Hypervisor Protection Region Limit Address Register 3"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x4086+0x20)++0x00 "Region 4"
line.long 0x00 "HPRBAR4,Hypervisor Protection Region Base Address Register 4"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x4186+0x20)++0x00
line.long 0x00 "HPRLAR4,Hypervisor Protection Region Limit Address Register 4"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x4486+0x20)++0x00 "Region 5"
line.long 0x00 "HPRBAR5,Hypervisor Protection Region Base Address Register 5"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x4586+0x20)++0x00
line.long 0x00 "HPRLAR5,Hypervisor Protection Region Limit Address Register 5"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x4086+0x30)++0x00 "Region 6"
line.long 0x00 "HPRBAR6,Hypervisor Protection Region Base Address Register 6"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x4186+0x30)++0x00
line.long 0x00 "HPRLAR6,Hypervisor Protection Region Limit Address Register 6"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x4486+0x30)++0x00 "Region 7"
line.long 0x00 "HPRBAR7,Hypervisor Protection Region Base Address Register 7"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x4586+0x30)++0x00
line.long 0x00 "HPRLAR7,Hypervisor Protection Region Limit Address Register 7"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x4086+0x40)++0x00 "Region 8"
line.long 0x00 "HPRBAR8,Hypervisor Protection Region Base Address Register 8"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x4186+0x40)++0x00
line.long 0x00 "HPRLAR8,Hypervisor Protection Region Limit Address Register 8"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x4486+0x40)++0x00 "Region 9"
line.long 0x00 "HPRBAR9,Hypervisor Protection Region Base Address Register 9"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x4586+0x40)++0x00
line.long 0x00 "HPRLAR9,Hypervisor Protection Region Limit Address Register 9"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x4086+0x50)++0x00 "Region 10"
line.long 0x00 "HPRBAR10,Hypervisor Protection Region Base Address Register 10"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x4186+0x50)++0x00
line.long 0x00 "HPRLAR10,Hypervisor Protection Region Limit Address Register 10"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x4486+0x50)++0x00 "Region 11"
line.long 0x00 "HPRBAR11,Hypervisor Protection Region Base Address Register 11"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x4586+0x50)++0x00
line.long 0x00 "HPRLAR11,Hypervisor Protection Region Limit Address Register 11"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x4086+0x60)++0x00 "Region 12"
line.long 0x00 "HPRBAR12,Hypervisor Protection Region Base Address Register 12"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x4186+0x60)++0x00
line.long 0x00 "HPRLAR12,Hypervisor Protection Region Limit Address Register 12"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x4486+0x60)++0x00 "Region 13"
line.long 0x00 "HPRBAR13,Hypervisor Protection Region Base Address Register 13"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x4586+0x60)++0x00
line.long 0x00 "HPRLAR13,Hypervisor Protection Region Limit Address Register 13"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x4086+0x70)++0x00 "Region 14"
line.long 0x00 "HPRBAR14,Hypervisor Protection Region Base Address Register 14"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x4186+0x70)++0x00
line.long 0x00 "HPRLAR14,Hypervisor Protection Region Limit Address Register 14"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x4486+0x70)++0x00 "Region 15"
line.long 0x00 "HPRBAR15,Hypervisor Protection Region Base Address Register 15"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x4586+0x70)++0x00
line.long 0x00 "HPRLAR15,Hypervisor Protection Region Limit Address Register 15"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
else
hgroup.long c15:(0x4086+0x0)++0x00 "Region 0 (not implemented)"
hide.long 0x00 "HPRBAR0,Hypervisor Protection Region Base Address Register 0"
newline
hgroup.long c15:(0x4186+0x0)++0x00
hide.long 0x00 "HPRLAR0,Hypervisor Protection Region Limit Address Register 0"
hgroup.long c15:(0x4486+0x0)++0x00 "Region 1 (not implemented)"
hide.long 0x00 "HPRBAR1,Hypervisor Protection Region Base Address Register 1"
newline
hgroup.long c15:(0x4586+0x0)++0x00
hide.long 0x00 "HPRLAR1,Hypervisor Protection Region Limit Address Register 1"
hgroup.long c15:(0x4086+0x10)++0x00 "Region 2 (not implemented)"
hide.long 0x00 "HPRBAR2,Hypervisor Protection Region Base Address Register 2"
newline
hgroup.long c15:(0x4186+0x10)++0x00
hide.long 0x00 "HPRLAR2,Hypervisor Protection Region Limit Address Register 2"
hgroup.long c15:(0x4486+0x10)++0x00 "Region 3 (not implemented)"
hide.long 0x00 "HPRBAR3,Hypervisor Protection Region Base Address Register 3"
newline
hgroup.long c15:(0x4586+0x10)++0x00
hide.long 0x00 "HPRLAR3,Hypervisor Protection Region Limit Address Register 3"
hgroup.long c15:(0x4086+0x20)++0x00 "Region 4 (not implemented)"
hide.long 0x00 "HPRBAR4,Hypervisor Protection Region Base Address Register 4"
newline
hgroup.long c15:(0x4186+0x20)++0x00
hide.long 0x00 "HPRLAR4,Hypervisor Protection Region Limit Address Register 4"
hgroup.long c15:(0x4486+0x20)++0x00 "Region 5 (not implemented)"
hide.long 0x00 "HPRBAR5,Hypervisor Protection Region Base Address Register 5"
newline
hgroup.long c15:(0x4586+0x20)++0x00
hide.long 0x00 "HPRLAR5,Hypervisor Protection Region Limit Address Register 5"
hgroup.long c15:(0x4086+0x30)++0x00 "Region 6 (not implemented)"
hide.long 0x00 "HPRBAR6,Hypervisor Protection Region Base Address Register 6"
newline
hgroup.long c15:(0x4186+0x30)++0x00
hide.long 0x00 "HPRLAR6,Hypervisor Protection Region Limit Address Register 6"
hgroup.long c15:(0x4486+0x30)++0x00 "Region 7 (not implemented)"
hide.long 0x00 "HPRBAR7,Hypervisor Protection Region Base Address Register 7"
newline
hgroup.long c15:(0x4586+0x30)++0x00
hide.long 0x00 "HPRLAR7,Hypervisor Protection Region Limit Address Register 7"
hgroup.long c15:(0x4086+0x40)++0x00 "Region 8 (not implemented)"
hide.long 0x00 "HPRBAR8,Hypervisor Protection Region Base Address Register 8"
newline
hgroup.long c15:(0x4186+0x40)++0x00
hide.long 0x00 "HPRLAR8,Hypervisor Protection Region Limit Address Register 8"
hgroup.long c15:(0x4486+0x40)++0x00 "Region 9 (not implemented)"
hide.long 0x00 "HPRBAR9,Hypervisor Protection Region Base Address Register 9"
newline
hgroup.long c15:(0x4586+0x40)++0x00
hide.long 0x00 "HPRLAR9,Hypervisor Protection Region Limit Address Register 9"
hgroup.long c15:(0x4086+0x50)++0x00 "Region 10 (not implemented)"
hide.long 0x00 "HPRBAR10,Hypervisor Protection Region Base Address Register 10"
newline
hgroup.long c15:(0x4186+0x50)++0x00
hide.long 0x00 "HPRLAR10,Hypervisor Protection Region Limit Address Register 10"
hgroup.long c15:(0x4486+0x50)++0x00 "Region 11 (not implemented)"
hide.long 0x00 "HPRBAR11,Hypervisor Protection Region Base Address Register 11"
newline
hgroup.long c15:(0x4586+0x50)++0x00
hide.long 0x00 "HPRLAR11,Hypervisor Protection Region Limit Address Register 11"
hgroup.long c15:(0x4086+0x60)++0x00 "Region 12 (not implemented)"
hide.long 0x00 "HPRBAR12,Hypervisor Protection Region Base Address Register 12"
newline
hgroup.long c15:(0x4186+0x60)++0x00
hide.long 0x00 "HPRLAR12,Hypervisor Protection Region Limit Address Register 12"
hgroup.long c15:(0x4486+0x60)++0x00 "Region 13 (not implemented)"
hide.long 0x00 "HPRBAR13,Hypervisor Protection Region Base Address Register 13"
newline
hgroup.long c15:(0x4586+0x60)++0x00
hide.long 0x00 "HPRLAR13,Hypervisor Protection Region Limit Address Register 13"
hgroup.long c15:(0x4086+0x70)++0x00 "Region 14 (not implemented)"
hide.long 0x00 "HPRBAR14,Hypervisor Protection Region Base Address Register 14"
newline
hgroup.long c15:(0x4186+0x70)++0x00
hide.long 0x00 "HPRLAR14,Hypervisor Protection Region Limit Address Register 14"
hgroup.long c15:(0x4486+0x70)++0x00 "Region 15 (not implemented)"
hide.long 0x00 "HPRBAR15,Hypervisor Protection Region Base Address Register 15"
newline
hgroup.long c15:(0x4586+0x70)++0x00
hide.long 0x00 "HPRLAR15,Hypervisor Protection Region Limit Address Register 15"
endif
if (((per.l(c15:0x4400))&0xFF)>=0x14)
group.long c15:(0x5086+0x0)++0x00 "Region 16"
line.long 0x00 "HPRBAR16,Hypervisor Protection Region Base Address Register 16"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x5186+0x0)++0x00
line.long 0x00 "HPRLAR16,Hypervisor Protection Region Limit Address Register 16"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x5486+0x0)++0x00 "Region 17"
line.long 0x00 "HPRBAR17,Hypervisor Protection Region Base Address Register 17"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x5586+0x0)++0x00
line.long 0x00 "HPRLAR17,Hypervisor Protection Region Limit Address Register 17"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x5086+0x10)++0x00 "Region 18"
line.long 0x00 "HPRBAR18,Hypervisor Protection Region Base Address Register 18"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x5186+0x10)++0x00
line.long 0x00 "HPRLAR18,Hypervisor Protection Region Limit Address Register 18"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x5486+0x10)++0x00 "Region 19"
line.long 0x00 "HPRBAR19,Hypervisor Protection Region Base Address Register 19"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x5586+0x10)++0x00
line.long 0x00 "HPRLAR19,Hypervisor Protection Region Limit Address Register 19"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
else
hgroup.long c15:(0x5086+0x0)++0x00 "Region 16 (not implemented)"
hide.long 0x00 "HPRBAR16,Hypervisor Protection Region Base Address Register 16"
newline
hgroup.long c15:(0x5186+0x0)++0x00
hide.long 0x00 "HPRLAR16,Hypervisor Protection Region Limit Address Register 16"
hgroup.long c15:(0x5486+0x0)++0x00 "Region 17 (not implemented)"
hide.long 0x00 "HPRBAR17,Hypervisor Protection Region Base Address Register 17"
newline
hgroup.long c15:(0x5586+0x0)++0x00
hide.long 0x00 "HPRLAR17,Hypervisor Protection Region Limit Address Register 17"
hgroup.long c15:(0x5086+0x10)++0x00 "Region 18 (not implemented)"
hide.long 0x00 "HPRBAR18,Hypervisor Protection Region Base Address Register 18"
newline
hgroup.long c15:(0x5186+0x10)++0x00
hide.long 0x00 "HPRLAR18,Hypervisor Protection Region Limit Address Register 18"
hgroup.long c15:(0x5486+0x10)++0x00 "Region 19 (not implemented)"
hide.long 0x00 "HPRBAR19,Hypervisor Protection Region Base Address Register 19"
newline
hgroup.long c15:(0x5586+0x10)++0x00
hide.long 0x00 "HPRLAR19,Hypervisor Protection Region Limit Address Register 19"
endif
if (((per.l(c15:0x4400))&0xFF)>=0x18)
group.long c15:(0x5086+0x20)++0x00 "Region 20"
line.long 0x00 "HPRBAR20,Hypervisor Protection Region Base Address Register 20"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x5186+0x20)++0x00
line.long 0x00 "HPRLAR20,Hypervisor Protection Region Limit Address Register 20"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x5486+0x20)++0x00 "Region 21"
line.long 0x00 "HPRBAR21,Hypervisor Protection Region Base Address Register 21"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x5586+0x20)++0x00
line.long 0x00 "HPRLAR21,Hypervisor Protection Region Limit Address Register 21"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x5086+0x30)++0x00 "Region 22"
line.long 0x00 "HPRBAR22,Hypervisor Protection Region Base Address Register 22"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x5186+0x30)++0x00
line.long 0x00 "HPRLAR22,Hypervisor Protection Region Limit Address Register 22"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
group.long c15:(0x5486+0x30)++0x00 "Region 23"
line.long 0x00 "HPRBAR23,Hypervisor Protection Region Base Address Register 23"
hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W PL2 only,R/W,RO PL2 only,RO"
newline
bitfld.long 0x00 0. "XN,Execute-never" "0,1"
group.long c15:(0x5586+0x30)++0x00
line.long 0x00 "HPRLAR23,Hypervisor Protection Region Limit Address Register 23"
hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected PL2 MPU memory region"
bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled"
else
hgroup.long c15:(0x5086+0x20)++0x00 "Region 20 (not implemented)"
hide.long 0x00 "HPRBAR20,Hypervisor Protection Region Base Address Register 20"
newline
hgroup.long c15:(0x5186+0x20)++0x00
hide.long 0x00 "HPRLAR20,Hypervisor Protection Region Limit Address Register 20"
hgroup.long c15:(0x5486+0x20)++0x00 "Region 21 (not implemented)"
hide.long 0x00 "HPRBAR21,Hypervisor Protection Region Base Address Register 21"
newline
hgroup.long c15:(0x5586+0x20)++0x00
hide.long 0x00 "HPRLAR21,Hypervisor Protection Region Limit Address Register 21"
hgroup.long c15:(0x5086+0x30)++0x00 "Region 22 (not implemented)"
hide.long 0x00 "HPRBAR22,Hypervisor Protection Region Base Address Register 22"
newline
hgroup.long c15:(0x5186+0x30)++0x00
hide.long 0x00 "HPRLAR22,Hypervisor Protection Region Limit Address Register 22"
hgroup.long c15:(0x5486+0x30)++0x00 "Region 23 (not implemented)"
hide.long 0x00 "HPRBAR23,Hypervisor Protection Region Base Address Register 23"
newline
hgroup.long c15:(0x5586+0x30)++0x00
hide.long 0x00 "HPRLAR23,Hypervisor Protection Region Limit Address Register 23"
endif
tree.end
tree.end
tree "Virtualization Extensions"
group.long c15:0x4000++0x00
line.long 0x00 "VPIDR,Virtualization Processor ID Register"
hexmask.long.byte 0x00 24.--31. 1. "IMPL,Implementer code"
bitfld.long 0x00 20.--23. "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. "ARCH,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CPUID scheme"
hexmask.long.word 0x00 4.--15. 1. "PART,Primary part number"
newline
bitfld.long 0x00 0.--3. "REV,Minor revision of the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long c15:0x4500++0x00
line.long 0x00 "VMPIDR,Virtualization Multiprocessor ID Register"
bitfld.long 0x00 30. "U,Single core system as distinct from core 0 in a cluster" "Part of a cluster,?..."
bitfld.long 0x00 24. "MT,Multi-threading type approach for logical cores in lowest level of affinity" "Largely independent,?..."
newline
hexmask.long.byte 0x00 16.--23. 1. "AFF2,Affinity level 2"
hexmask.long.byte 0x00 8.--15. 1. "AFF1,Affinity level 1"
hexmask.long.byte 0x00 0.--7. 1. "AFF0,Affinity level 0"
group.long c15:0x420D++0x00
line.long 0x00 "HTPIDR,Hypervisor Software Thread ID Register"
group.long c15:0x4001++0x00
line.long 0x00 "HSCTLR,Hypervisor System Control Register"
bitfld.long 0x00 30. "TE,Thumb exception enable" "A32,T32"
bitfld.long 0x00 25. "EE,Exception endianness" "Little,Big"
bitfld.long 0x00 21. "FI,Fast interrupts configuration enable" "Disabled,Enabled"
newline
bitfld.long 0x00 19. "WXN,Write permission implies Execute Never (XN)" "Not forced,Forced"
bitfld.long 0x00 17. "BR,Background region enable" "Disabled,Enabled"
bitfld.long 0x00 12. "I,Instruction cache enable" "Disabled,Enabled"
newline
bitfld.long 0x00 8. "SED,SETEND instruction disable" "No,Yes"
bitfld.long 0x00 7. "ITD,IT instruction disable" "No,Yes"
bitfld.long 0x00 5. "CP15BEN,CP15* barrier operations enable" "Disabled,Enabled"
newline
bitfld.long 0x00 2. "C,Data cache enable" "Disabled,Enabled"
bitfld.long 0x00 1. "A,Alignment fault checking enable" "Disabled,Enabled"
bitfld.long 0x00 0. "M,EL2-controlled MPU enable" "Disabled,Enabled"
group.long c15:0x4002++0x00
line.long 0x00 "VSCTLR,Virtualization System Control Register"
hexmask.long.byte 0x00 16.--23. 1. "VMID,Virtual machine ID"
bitfld.long 0x00 2. "S2NIE,Stage-2 normal interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 1. "S2DMAD,Stage-2 device multiple access disable" "Disabled,Enabled"
group.long c15:0x4101++0x00
line.long 0x00 "HACTLR,Hypervisor Auxiliary Control Register"
bitfld.long 0x00 15. "TESTR1,Controls access to TESTR1 at EL0 and EL1" "Trapped,Enabled"
bitfld.long 0x00 13. "ERR,Controls access to IMP_DCERR0, IMP_DCERR1, IMP_ICERR0, IMP_ICERR1, IMP_TCMERR0, IMP_TCMERR1, IMP_FLASHERR0 and IMP_FLASHERR1 registers" "Trapped,Enabled"
bitfld.long 0x00 12. "INTMONR,Controls access to IMP_INTMONR at EL1" "Trapped,Enabled"
newline
bitfld.long 0x00 10. "BUSTIMEOUTR,Controls access to IMP_BUSTIMEOUTR at EL1" "Trapped,Enabled"
bitfld.long 0x00 9. "QOSR,Controls access to QOSR at EL1" "Trapped,Enabled"
bitfld.long 0x00 8. "PERIPHPREGIONR,Controls access to IMP_PERIPHPREGIONR at EL1" "Trapped,Enabled"
newline
bitfld.long 0x00 7. "FLASHIFREGIONR,Controls access to IMP_FLASHIFREGIONR at EL1" "Trapped,Enabled"
bitfld.long 0x00 1. "CDBGDCI,Controls access to CDBGDCI at EL1" "Trapped,Enabled"
bitfld.long 0x00 0. "CPUACTLR,IMP_CPUACTLR write access control" "Trapped,Enabled"
rgroup.long c15:0x4711++0x00
line.long 0x00 "HACR,Hypervisor Auxiliary Configuration Register"
group.long c15:0x4011++0x00
line.long 0x00 "HCR,Hypervisor Configuration Register"
bitfld.long 0x00 30. "TRVM,Trap read of virtual memory controls" "Disabled,Enabled"
bitfld.long 0x00 29. "HCD,HVC instruction disable" "No,Yes"
bitfld.long 0x00 27. "TGE,Trap general exceptions" "Disabled,Enabled"
newline
bitfld.long 0x00 26. "TVM,Trap virtual memory controls" "Disabled,Enabled"
bitfld.long 0x00 24. "TPU,Trap cache maintenance instructions that operate to the point of unification" "Disabled,Enabled"
bitfld.long 0x00 23. "TPC,Trap Data Cache maintenance operations that operate to the point of coherency" "Disabled,Enabled"
newline
bitfld.long 0x00 22. "TSW,Trap data/unified cache maintenance instructions by set/way" "Disabled,Enabled"
bitfld.long 0x00 21. "TAC,Trap ACTLR accesses" "Disabled,Enabled"
bitfld.long 0x00 20. "TIDCP,Trap lockdown" "Disabled,Enabled"
newline
bitfld.long 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled"
bitfld.long 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled"
bitfld.long 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled"
newline
bitfld.long 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled"
bitfld.long 0x00 14. "TWE,Trap WFE" "Disabled,Enabled"
bitfld.long 0x00 13. "TWI,Trap WFI" "Disabled,Enabled"
newline
bitfld.long 0x00 12. "DC,Default cacheable" "Disabled,Enabled"
bitfld.long 0x00 10.--11. "BSU,Barrier shareability upgrade" "No effect,Inner shareable,Outer shareable,Full system"
bitfld.long 0x00 9. "FB,Force broadcast" "Not forced,Forced"
newline
bitfld.long 0x00 8. "VA,Virtual asynchronous abort exception" "Not pending,Pending"
bitfld.long 0x00 7. "VI,Virtual IRQ exception" "Not pending,Pending"
bitfld.long 0x00 6. "VF,Virtual FIQ exception" "Not pending,Pending"
newline
bitfld.long 0x00 5. "AMO,A-bit mask override" "Disabled,Enabled"
bitfld.long 0x00 4. "IMO,I-bit mask override" "Disabled,Enabled"
bitfld.long 0x00 3. "FMO,F-bit mask override" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "SWIO,Set/Way Invalidation Override" "No override,Override"
bitfld.long 0x00 0. "VM,Second stage of translation enable" "Disabled,Enabled"
rgroup.long c15:0x4411++0x00
line.long 0x00 "HCR2,Hypervisor Configuration Register 2"
group.long c15:0x3054++0x00
line.long 0x00 "DSPSR,Debug Saved Program Status Register"
bitfld.long 0x00 31. "N,Negative condition flag" "Not negative,Negative"
bitfld.long 0x00 30. "Z,Zero condition flag" "Not zero,Zero"
bitfld.long 0x00 29. "C,Carry condition flag" "Not carry,Carry"
newline
bitfld.long 0x00 28. "V,Overflow condition flag" "No overflow,Overflow"
bitfld.long 0x00 27. "Q,Cumulative condition flag" "Not occurred,Occurred"
bitfld.long 0x00 21. "SS,Software step" "0,1"
newline
bitfld.long 0x00 20. "IL,Illegal execution state" "0,1"
bitfld.long 0x00 14.--15. 25.--26. "IT[4:7],IT block state bits for the T32 IT (if-then) instruction - base condition for the IT block" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--13. "IT[0:3],IT block state bits for the T32 IT (if-then) instruction - size of the IT block" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. "GE,Greater than or equal flags" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 9. "E,Endianness state bit" "Little,Big"
bitfld.long 0x00 8. "A,Asynchronous data abort mask bit" "Not masked,Masked"
newline
bitfld.long 0x00 7. "I,IRQ mask bit" "Not masked,Masked"
bitfld.long 0x00 6. "F,FIQ mask bit" "Not masked,Masked"
bitfld.long 0x00 5. "T,T32 Instruction set state" "A32,T32"
newline
bitfld.long 0x00 4. "M[4],Execution state that the exception was taken from" "Reserved,AArch32"
bitfld.long 0x00 0.--3. "M[3:0],Current PE mode" "User,FIQ,IRQ,Supervisor,Reserved,Reserved,Monitor,Abort,Reserved,Reserved,Hyp,Undefined,Reserved,Reserved,Reserved,System"
group.long c15:0x4111++0x00
line.long 0x00 "HDCR,Hypervisor Debug Control Register"
bitfld.long 0x00 21. "EPMAD,External debugger access to hypervisor performance monitors registers disabled" "No,Yes"
bitfld.long 0x00 17. "HPMD,Hypervisor performance monitors disable" "No,Yes"
bitfld.long 0x00 11. "TDRA,Trap debug ROM access" "No effect,Valid"
newline
bitfld.long 0x00 10. "TDOSA,Trap debug OS-related register access" "No effect,Valid"
bitfld.long 0x00 9. "TDA,Trap debug access" "No effect,Valid"
bitfld.long 0x00 8. "TDE,Trap debug exceptions" "No effect,Valid"
newline
bitfld.long 0x00 7. "HPME,Hypervisor performance monitors enable" "Disabled,Enabled"
bitfld.long 0x00 6. "TPM,Trap performance monitors accesses" "No effect,Valid"
bitfld.long 0x00 5. "TPMCR,Trap performance monitor control register accesses" "No effect,Valid"
newline
bitfld.long 0x00 0.--4. "HPMN,Defines the number of performance monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long c15:0x4211++0x00
line.long 0x00 "HCPTR,Hypervisor Architectural Feature Trap Register"
bitfld.long 0x00 31. "TCPAC,Trap coprocessor access control" "Not trapped,Trapped"
bitfld.long 0x00 15. "TASE,Trap advanced SIMD extensions" "Not trapped,Trapped"
newline
bitfld.long 0x00 11. "TCP11,Trap coprocessor 11" "Not trapped,Trapped"
bitfld.long 0x00 10. "TCP10,Trap coprocessor 10" "Not trapped,Trapped"
group.long c15:0x4311++0x00
line.long 0x00 "HSTR,Hypervisor System Trap Register"
bitfld.long 0x00 15. "T15,Trap to Hypervisor mode Non-secure priv 15" "No effect,Trap"
bitfld.long 0x00 13. "T13,Trap to Hypervisor mode Non-secure priv 13" "No effect,Trap"
bitfld.long 0x00 12. "T12,Trap to Hypervisor mode Non-secure priv 12" "No effect,Trap"
newline
bitfld.long 0x00 11. "T11,Trap to Hypervisor mode Non-secure priv 11" "No effect,Trap"
bitfld.long 0x00 10. "T10,Trap to Hypervisor mode Non-secure priv 10" "No effect,Trap"
bitfld.long 0x00 9. "T9,Trap to Hypervisor mode Non-secure priv 9" "No effect,Trap"
newline
bitfld.long 0x00 8. "T8,Trap to Hypervisor mode Non-secure priv 8" "No effect,Trap"
bitfld.long 0x00 7. "T7,Trap to Hypervisor mode Non-secure priv 7" "No effect,Trap"
bitfld.long 0x00 6. "T6,Trap to Hypervisor mode Non-secure priv 6" "No effect,Trap"
newline
bitfld.long 0x00 5. "T5,Trap to Hypervisor mode Non-secure priv 5" "No effect,Trap"
bitfld.long 0x00 3. "T3,Trap to Hypervisor mode Non-secure priv 3" "No effect,Trap"
bitfld.long 0x00 2. "T2,Trap to Hypervisor mode Non-secure priv 2" "No effect,Trap"
newline
bitfld.long 0x00 1. "T1,Trap to Hypervisor mode Non-secure priv 1" "No effect,Trap"
bitfld.long 0x00 0. "T0,Trap to Hypervisor mode Non-secure priv 0" "No effect,Trap"
rgroup.long c15:0x4301++0x00
line.long 0x00 "HACTLR2,Hypervisor Auxiliary Control Register 2"
group.long c15:0x3154++0x00
line.long 0x00 "DLR,Debug Link Register"
group.long c15:0x4015++0x00
line.long 0x00 "HADFSR,Hypervisor Auxiliary Data Fault Status Syndrome Register"
bitfld.long 0x00 2.--4. "PORT,Memory or port that caused the fault" "AXIM,Flash interface,LLPP,Internal interface,ATCM,BTCM,CTCM,?..."
bitfld.long 0x00 0.--1. "TYPE,Fault type" "Undefined,Response,ECC on data,Bus timeout"
group.long c15:0x4006++0x00
line.long 0x00 "HDFAR,Hypervisor Data Fault Address Register"
if (((per.l(c15:0x4025))&0xFC000000)==(0x00000000||0x38000000||0x88000000))
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
elif (((per.l(c15:0x4025))&0xFC000000)==0x04000000)
if (((per.l(c15:0x4025))&0x01000000)==0x01000000)
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
else
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
newline
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
endif
elif (((per.l(c15:0x4025))&0xFC000000)==(0x0C000000||0x14000000||0x20000000))
if (((per.l(c15:0x4025))&0x01000000)==0x01000000)
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 17.--19. "OPC2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 14.--16. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--8. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
else
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
newline
bitfld.long 0x00 17.--19. "OPC2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 14.--16. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--8. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
endif
elif (((per.l(c15:0x4025))&0xFC000000)==(0x10000000||0x30000000))
if (((per.l(c15:0x4025))&0x01000000)==0x01000000)
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 16.--19. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--13. "RT2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 5.--8. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
else
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
newline
bitfld.long 0x00 16.--19. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--13. "RT2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 5.--8. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
endif
elif (((per.l(c15:0x4025))&0xFC000000)==0x18000000)
if (((per.l(c15:0x4025))&0x01000000)==0x01000000)
if (((per.l(c15:0x4025))&0x08)==0x00)
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
hexmask.long.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction"
bitfld.long 0x00 5.--8. "RN,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,?..."
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
else
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
hexmask.long.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction"
newline
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,?..."
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
endif
else
if (((per.l(c15:0x4025))&0x08)==0x00)
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
newline
hexmask.long.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction"
bitfld.long 0x00 5.--8. "RN,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
else
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
newline
hexmask.long.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction"
newline
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
endif
endif
elif (((per.l(c15:0x4025))&0xFC000000)==0x1C000000)
if (((per.l(c15:0x4025))&0x01000000)==0x01000000)
if (((per.l(c15:0x4025))&0x20)==0x20)
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 5. "TA,Indicates trapped use of advanced SIMD functionality" "Not trapped,Trapped"
bitfld.long 0x00 0.--3. "COPROC,COPROC" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,0b1010,?..."
else
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 5. "TA,Indicates trapped use of advanced SIMD functionality" "Not trapped,Trapped"
endif
else
if (((per.l(c15:0x4025))&0x20)==0x20)
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
newline
bitfld.long 0x00 5. "TA,Indicates trapped use of advanced SIMD functionality" "Not trapped,Trapped"
bitfld.long 0x00 0.--3. "COPROC,COPROC" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,0b1010,?..."
else
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
newline
bitfld.long 0x00 5. "TA,Indicates trapped use of advanced SIMD functionality" "Not trapped,Trapped"
endif
endif
elif (((per.l(c15:0x4025))&0xFC000000)==(0x44000000||0x48000000))
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. 1. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((per.l(c15:0x4025))&0xFC000000)==(0x80000000||0x84000000))
if (((per.l(c15:0x4025))&0x3F)==0x10)
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not valid" "No,Yes"
newline
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction fault status code" "Reserved,Reserved,Reserved,Reserved,Translation fault,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Permission fault,Reserved,Reserved,Reserved,Synch. external abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synch. parity/ECC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug,?..."
else
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
newline
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction fault status code" "Reserved,Reserved,Reserved,Reserved,Translation fault,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Permission fault,Reserved,Reserved,Reserved,Synch. external abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synch. parity/ECC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug,?..."
endif
elif (((per.l(c15:0x4025))&0xFD00003F)==(0x95000010||0x91000010))
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
newline
bitfld.long 0x00 22.--23. "SAS,Syndrome access size" "Byte,Halfword,Word,Doubleword"
bitfld.long 0x00 21. "SSE,Syndrome sign extend" "Not required,Required"
bitfld.long 0x00 16.--19. "SRT,Syndrome register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.long 0x00 10. "FNV,FAR not valid" "No,Yes"
newline
bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR"
bitfld.long 0x00 8. "CM,Fault came from a cache maintenance instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 6. "WNR,Write not read" "Read,Write"
newline
bitfld.long 0x00 0.--5. "DFSC,Data fault status code" "Reserved,Reserved,Reserved,Reserved,Translation fault,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Permission fault,Reserved,Reserved,Reserved,Synch. external abort,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synch. parity/ECC,SError/parity/ECC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Cache lockdown fault,Unsupported Exclusive access,?..."
elif (((per.l(c15:0x4025))&0xFD000000)==(0x95000000||0x91000000))
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
newline
bitfld.long 0x00 22.--23. "SAS,Syndrome access size" "Byte,Halfword,Word,Doubleword"
bitfld.long 0x00 21. "SSE,Syndrome sign extend" "Not required,Required"
bitfld.long 0x00 16.--19. "SRT,Syndrome register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
newline
bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR"
bitfld.long 0x00 8. "CM,Fault came from a cache maintenance instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 6. "WNR,Write not read" "Read,Write"
newline
bitfld.long 0x00 0.--5. "DFSC,Data fault status code" "Reserved,Reserved,Reserved,Reserved,Translation fault,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Permission fault,Reserved,Reserved,Reserved,Synch. external abort,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synch. parity/ECC,SError/parity/ECC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Cache lockdown fault,Unsupported Exclusive access,?..."
elif (((per.l(c15:0x4025))&0xFD00003F)==(0x90000010||0x94000010))
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
newline
newline
newline
bitfld.long 0x00 10. "FNV,FAR not valid" "No,Yes"
newline
bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR"
bitfld.long 0x00 8. "CM,Fault came from a cache maintenance instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 6. "WNR,Write not read" "Read,Write"
newline
bitfld.long 0x00 0.--5. "DFSC,Data fault status code" "Reserved,Reserved,Reserved,Reserved,Translation fault,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Permission fault,Reserved,Reserved,Reserved,Synch. external abort,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synch. parity/ECC,SError/parity/ECC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Cache lockdown fault,Unsupported Exclusive access,?..."
elif (((per.l(c15:0x4025))&0xFD000000)==(0x90000000||0x94000000))
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
newline
newline
newline
newline
bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR"
bitfld.long 0x00 8. "CM,Fault came from a cache maintenance instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 6. "WNR,Write not read" "Read,Write"
newline
bitfld.long 0x00 0.--5. "DFSC,Data fault status code" "Reserved,Reserved,Reserved,Reserved,Translation fault,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Permission fault,Reserved,Reserved,Reserved,Synch. external abort,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synch. parity/ECC,SError/parity/ECC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Cache lockdown fault,Unsupported Exclusive access,?..."
else
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..."
bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
endif
group.long c15:0x4115++0x00
line.long 0x00 "HAIFSR,Hypervisor Auxiliary Instruction Fault Status Register"
bitfld.long 0x00 2.--4. "PORT,Memory or port that caused the fault" "AXIM,Flash interface,LLPP,Reserved,ATCM,BTCM,CTCM,UNKNOWN"
bitfld.long 0x00 0.--1. "TYPE,Fault type" "Undefined,Response,ECC on data,Bus timeout"
group.long c15:0x4206++0x00
line.long 0x00 "HIFAR,Hypervisor Instruction Fault Address Register"
group.long c15:0x4406++0x00
line.long 0x00 "HPFAR,Hypervisor IPA Fault Address Register"
hexmask.long 0x00 4.--31. 1. "FIPA,Faulting IPA bits"
tree.open "Hypervisor Memory Attribute Indirection Registers"
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
rgroup.long c15:0x403A++0x00
line.long 0x00 "HAMAIR0,Hypervisor Auxiliary Memory Attribute Indirection Register 0"
rgroup.long c15:0x413A++0x00
line.long 0x00 "HAMAIR1,Hypervisor Auxiliary Memory Attribute Indirection Register 1"
tree.end
newline
group.long c15:0x400C++0x00
line.long 0x00 "HVBAR,Hypervisor Vector Base Address Register"
hexmask.long 0x00 5.--31. 0x20 "VBA,Vector base address"
group.long c15:0x420C++0x00
line.long 0x00 "HRMR,Hypervisor Reset Management Register"
bitfld.long 0x00 1. "RR,Reset request" "Not requested,Requested"
group.long c15:0x1119++0x00
line.long 0x00 "IMP_BPCTLR,Branch Predictor Control Register"
bitfld.long 0x00 2. "DBPEL2DIS,Disable dynamic branch predictor when running at EL2" "No,Yes"
bitfld.long 0x00 1. "DBPEL1DIS,Disable dynamic branch predictor when running at EL1" "No,Yes"
bitfld.long 0x00 0. "DBPEL0DIS,Disable dynamic branch predictor when running at EL0" "No,Yes"
tree.end
tree "Cache Control and Configuration"
rgroup.long c15:0x0100++0x00
line.long 0x00 "CTR,Cache Type Register"
bitfld.long 0x00 24.--27. "CWG,Cache write-back granule" "Reserved,2 words,?..."
bitfld.long 0x00 20.--23. "ERG,Exclusives reservation granule" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x00 16.--19. "DMINLINE,D-cache minimum line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x00 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT"
bitfld.long 0x00 0.--3. "IMINLINE,I-cache minimum line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
group.long c15:0x2000++0x00
line.long 0x00 "CSSELR,Cache Size Selection Register"
rbitfld.long 0x00 1.--3. "LEVEL,Cache level of required cache" "Level 1,?..."
bitfld.long 0x00 0. "IND,Instruction/not data" "Data/unified,Instruction"
rgroup.long c15:0x1000++0x00
line.long 0x00 "CCSIDR,Current Cache Size ID Register"
bitfld.long 0x00 31. "WT,Write-through" "Not supported,Supported"
bitfld.long 0x00 30. "WB,Write-back" "Not supported,?..."
newline
bitfld.long 0x00 29. "RA,Read-allocate" "Reserved,Supported"
bitfld.long 0x00 28. "WA,Write-allocate" "Not supported,Supported"
newline
hexmask.long.word 0x00 13.--27. 1. 1. "SETS,Number of sets"
hexmask.long.word 0x00 3.--12. 1. 1. "ASSOC,Associativity"
newline
bitfld.long 0x00 0.--2. "LSIZE,Number of words in each cache line" "Reserved,Reserved,16,?..."
rgroup.long c15:0x1100++0x00
line.long 0x00 "CLIDR,Cache Level ID Register"
bitfld.long 0x00 30.--31. "ICB,Inner cache boundary" "Not disclosed,?..."
bitfld.long 0x00 27.--29. "LOUU,Level of unification" "Level 0,Level 1,?..."
bitfld.long 0x00 24.--26. "LOC,Level of coherency" "Level 0,Level 1,?..."
newline
bitfld.long 0x00 21.--23. "LOUIS,Level of unification inner shareable" "Level 0,Level 1,?..."
bitfld.long 0x00 18.--20. "CTYPE7,Cache type for levels 7" "No cache,?..."
newline
bitfld.long 0x00 15.--17. "CTYPE6,Cache type for levels 6" "No cache,?..."
bitfld.long 0x00 12.--14. "CTYPE5,Cache type for levels 5" "No cache,?..."
newline
bitfld.long 0x00 9.--11. "CTYPE4,Cache type for levels 4" "No cache,?..."
bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..."
newline
bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "No cache,?..."
bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "No cache,Instruction cache,Data cache,Both separated,?..."
group.long c15:0x1019++0x00
line.long 0x00 "IMP_CSCTLR,Cache Segregation Control Register"
bitfld.long 0x00 8.--10. "IFLW,Instruction cache flash ways" "Reserved,0,0-1,0-2,0-3,?..."
bitfld.long 0x00 0.--2. "DFLW,Data cache flash ways" "Reserved,0,0-1,0-2,0-3,?..."
group.quad c15:0x100F0++0x01
line.quad 0x00 "CPUACTLR,CPU Auxiliary Control Register"
bitfld.quad 0x00 47. "FIXEDDIV,Enable fixed latency for integer divide instructions" "Disabled,Enabled"
bitfld.quad 0x00 46. "ETACDIS,Disable PFU exception target address cache" "No,Yes"
bitfld.quad 0x00 45. "OOODIVDIS,Disable out-of-order completion of divide instructions" "No,Yes"
newline
bitfld.quad 0x00 41. "TLACDIS,Disable the store unit (STU) tag lookup avoidance cache" "No,Yes"
bitfld.quad 0x00 40. "FLASHNDDIS,Disable flash accesses use of non-flash-dedicated resources" "No,Yes"
bitfld.quad 0x00 39. "FLASHARBCTL,Flash interface arbitration control" "D-side,I-side"
newline
bitfld.quad 0x00 38. "AXIMARBCTL,AXIM interface arbitration control" "D-side,I-side"
bitfld.quad 0x00 33. "ISPECDIS,Disable I-side speculative access" "No,Yes"
bitfld.quad 0x00 32. "DSPECDIS,Disable D-side speculative access" "No,Yes"
newline
bitfld.quad 0x00 30. "FPDIDIS,Disable floating-point dual issue" "No,Yes"
bitfld.quad 0x00 29. "DIDIS,Disable Dual Issue" "No,Yes"
bitfld.quad 0x00 25.--26. "WSTRNOL1ACTL,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled streaming"
newline
bitfld.quad 0x00 19.--20. "DPFSTRCTL,Number of independent data prefetch streams" "1,2,3,4"
bitfld.quad 0x00 17. "STRIDECTL,Enable stride detection" "2,3"
bitfld.quad 0x00 13.--15. "L1DPFCTL,L1 Data prefetch control" "Disabled,1 outstanding prefetch,2 outstanding prefetch,3 outstanding prefetch,4 outstanding prefetch,5 outstanding prefetch,6 outstanding prefetch,8 outstanding prefetch"
newline
bitfld.quad 0x00 11. "L1IPFCTL,L1 Instruction prefetch control" "Disabled,Enabled"
bitfld.quad 0x00 10. "DMB2DSBEN,Enable data memory barrier behaving as data synchronization barrier" "Disabled,Enabled"
wgroup.long c15:0x10EF++0x00
line.long 0x00 "IMP_CDBGDCI,Invalidate All Register"
tree "Level 1 memory system"
rgroup.long c15:0x300F++0x00
line.long 0x00 "IMP_CDBGDR0,Cache Debug Data Register 0"
bitfld.long 0x00 22. "V,Valid" "0,1"
hexmask.long.tbyte 0x00 0.--21. 1. "TB,Tag bits"
rgroup.long c15:0x310F++0x00
line.long 0x00 "IMP_CDBGDR1,Cache Debug Data Register 1"
wgroup.long c15:0x302F++0x00
line.long 0x00 "IMP_CDBGDCT,Data Cache Tag Read Operation Register"
bitfld.long 0x00 30.--31. "CW,Cache way" "0,1,2,3"
hexmask.long.word 0x00 6.--12. 1. "SETIND,Set index"
wgroup.long c15:0x312F++0x00
line.long 0x00 "IMP_CDBGICT,Instruction Cache Tag Read Operation Register"
bitfld.long 0x00 30.--31. "CW,Cache way" "0,1,2,3"
hexmask.long.word 0x00 6.--12. 1. "SETIND,Set index"
wgroup.long c15:0x304F++0x00
line.long 0x00 "IMP_CDBGDCD,Data Cache Data Read Operation Register"
bitfld.long 0x00 30.--31. "CW,Cache way" "0,1,2,3"
hexmask.long.word 0x00 6.--12. 1. "SETIND,Set index"
bitfld.long 0x00 3.--5. "DO,Data offset" "0,1,2,3,4,5,6,7"
wgroup.long c15:0x314F++0x00
line.long 0x00 "IMP_CDBGICD,Instruction Cache Data Read Operation Register"
bitfld.long 0x00 30.--31. "CW,Cache way" "0,1,2,3"
hexmask.long.word 0x00 6.--12. 1. "SETIND,Set index"
bitfld.long 0x00 3.--5. "DO,Data offset" "0,1,2,3,4,5,6,7"
tree.end
tree.end
tree "System Performance Monitor"
group.long c15:0x00C9++0x00
line.long 0x00 "PMCR,Performance Monitors Control Register"
hexmask.long.byte 0x00 24.--31. 1. "IMP,Implementer code"
hexmask.long.byte 0x00 16.--23. 1. "IDCODE,Identification code"
rbitfld.long 0x00 11.--15. "N,Number of counters implemented" "Reserved,Reserved,Reserved,Reserved,4,?..."
bitfld.long 0x00 6. "LC,Long cycle counter enable" "Disabled,Enabled"
newline
bitfld.long 0x00 5. "DP,Disable CCNT when prohibited" "No,Yes"
bitfld.long 0x00 4. "X,Export enable" "Disabled,Enabled"
bitfld.long 0x00 3. "D,Clock divider" "Every cycle,64th cycle"
bitfld.long 0x00 2. "C,Clock counter reset" "No reset,Reset"
newline
bitfld.long 0x00 1. "P,Performance counter reset" "No reset,Reset"
bitfld.long 0x00 0. "E,All counters enable" "Disabled,Enabled"
group.long c15:0x01C9++0x00
line.long 0x00 "PMCNTENSET,Count Enable Set Register"
bitfld.long 0x00 31. "C,CCNT overflow interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x00 3. "P3,Event counter PMN 3 enable bit" "Disabled,Enabled"
bitfld.long 0x00 2. "P2,Event counter PMN 2 enable bit" "Disabled,Enabled"
bitfld.long 0x00 1. "P1,Event counter PMN 1 enable bit" "Disabled,Enabled"
bitfld.long 0x00 0. "P0,Event counter PMN 0 enable bit" "Disabled,Enabled"
group.long c15:0x02C9++0x00
line.long 0x00 "PMCNTENCLR,Count Enable Clear Register"
bitfld.long 0x00 31. "C,CCNT overflow interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x00 3. "P3,Event counter PMN 3 enable bit" "Disabled,Enabled"
bitfld.long 0x00 2. "P2,Event counter PMN 2 enable bit" "Disabled,Enabled"
bitfld.long 0x00 1. "P1,Event counter PMN 1 enable bit" "Disabled,Enabled"
bitfld.long 0x00 0. "P0,Event counter PMN 0 enable bit" "Disabled,Enabled"
group.long c15:0x03C9++0x00
line.long 0x00 "PMOVSR,Overflow Status Flags Register"
eventfld.long 0x00 31. "C,PMCCNTR overflow" "No overflow,Overflow"
newline
eventfld.long 0x00 3. "P3,PMN3 overflow" "No overflow,Overflow"
eventfld.long 0x00 2. "P2,PMN2 overflow" "No overflow,Overflow"
eventfld.long 0x00 1. "P1,PMN1 overflow" "No overflow,Overflow"
eventfld.long 0x00 0. "P0,PMN0 overflow" "No overflow,Overflow"
wgroup.long c15:0x04C9++0x00
line.long 0x00 "PMSWINC,Software Increment Register"
bitfld.long 0x00 3. "P3,PMN3 software increment" "No effect,Increment"
bitfld.long 0x00 2. "P2,PMN2 software increment" "No effect,Increment"
bitfld.long 0x00 1. "P1,PMN1 software increment" "No effect,Increment"
bitfld.long 0x00 0. "P0,PMN0 software increment" "No effect,Increment"
group.long c15:0x05C9++0x00
line.long 0x00 "PMSELR,Event Counter Selection Register"
bitfld.long 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.open "Common Event Identification Registers"
rgroup.long c15:0x06C9++0x00
line.long 0x00 "PMCEID0,Common Event Identification Register 0"
bitfld.long 0x00 30. "CHAIN,Chain" "Not implemented,Implemented"
bitfld.long 0x00 29. "BUS_CYCLES,Bus cycle" "Not implemented,Implemented"
bitfld.long 0x00 27. "INST_SPEC,Instruction speculatively executed" "Not implemented,Implemented"
bitfld.long 0x00 26. "MEMORY_ERROR,Local memory error" "Not implemented,Implemented"
newline
bitfld.long 0x00 25. "BUS_ACCESS,Bus access" "Not implemented,Implemented"
bitfld.long 0x00 20. "L1I_CACHE,Level 1 instruction cache access" "Not implemented,Implemented"
bitfld.long 0x00 19. "MEM_ACCESS,Data memory access" "Not implemented,Implemented"
bitfld.long 0x00 18. "BR_PRED,Predictable branch speculatively executed" "Not implemented,Implemented"
newline
bitfld.long 0x00 17. "CPU_CYCLES,CPU cycle" "Not implemented,Implemented"
bitfld.long 0x00 16. "BR_MIS_PRED,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented"
bitfld.long 0x00 15. "UNALIGNED_LDST_RETIRED,Instruction architecturally executed condition code check pass unaligned load or store" "Not implemented,Implemented"
bitfld.long 0x00 14. "BR_RETURN_RETIRED,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented"
newline
bitfld.long 0x00 13. "BR_IMMED_RETIRED,Instruction architecturally executed immediate branch" "Not implemented,Implemented"
bitfld.long 0x00 12. "PC_WRITE_RETIRED,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented"
bitfld.long 0x00 11. "CID_WRITE_RETIRED,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented"
bitfld.long 0x00 10. "EXC_RETURN,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented"
newline
bitfld.long 0x00 9. "EXC_TAKEN,Exception taken" "Not implemented,Implemented"
bitfld.long 0x00 8. "INST_RETIRED,Instruction architecturally executed" "Not implemented,Implemented"
bitfld.long 0x00 7. "ST_RETIRED,Instruction architecturally executed condition check pass store" "Not implemented,Implemented"
bitfld.long 0x00 6. "LD_RETIRED,Instruction architecturally executed condition check pass load" "Not implemented,Implemented"
newline
bitfld.long 0x00 4. "L1D_CACHE,Level 1 data cache access" "Not implemented,Implemented"
bitfld.long 0x00 3. "L1D_CACHE_REFILL,Level 1 data cache refill" "Not implemented,Implemented"
bitfld.long 0x00 1. "L1I_CACHE_REFILL,Level 1 instruction cache refill" "Not implemented,Implemented"
bitfld.long 0x00 0. "SW_INCR,Software increment" "Not implemented,Implemented"
rgroup.long c15:0x07C9++0x00
line.long 0x00 "PMCEID1,Common Event Identification Register 1"
bitfld.long 0x00 19. "STALL_BACKEND,No operation issued due to backend" "Not implemented,Implemented"
bitfld.long 0x00 18. "STALL_FRONTEND,No operation issued due to the frontend" "Not implemented,Implemented"
bitfld.long 0x00 17. "BR_MIS_PRED_RETIRED,Instruction architecturally executed mispredicted branch" "Not implemented,Implemented"
bitfld.long 0x00 16. "BR_RETIRED,Instruction architecturally executed branch" "Not implemented,Implemented"
tree.end
newline
group.long c15:0x00D9++0x00
line.long 0x00 "PMCCNTR,Performance Monitor Cycle Count Register [31:0]"
group.quad c15:0x10090++0x01
line.quad 0x00 "PMCCNTR,Performance Monitor Cycle Count Register [63:0]"
if (((per.l(c15:0x05C9))&0x1F)==0x1F)
group.long c15:0x01D9++0x00
line.long 0x00 "PMXEVTYPER,Selected Event Type and Filter Register - PMCCFILTR"
bitfld.long 0x00 31. "P,Privileged modes filtering" "Disabled,Enabled"
bitfld.long 0x00 30. "U,User modes filtering" "Disabled,Enabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering" "Disabled,Enabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering" "Disabled,Enabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering" "Disabled,Enabled"
elif (((per.l(c15:0x05C9))&0x1F)<=0x03)
group.long c15:0x01D9++0x00
line.long 0x00 "PMXEVTYPER,Selected Event Type and Filter Register - PMEVTYPER"
bitfld.long 0x00 31. "P,Privileged modes filtering" "Disabled,Enabled"
bitfld.long 0x00 30. "U,User modes filtering" "Disabled,Enabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering" "Disabled,Enabled"
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering" "Disabled,Enabled"
newline
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering" "Disabled,Enabled"
bitfld.long 0x00 25. "MT,Multithreading" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event number"
else
rgroup.long c15:0x01D9++0x00
line.long 0x00 "PMXEVTYPER,Selected Event Type and Filter Register"
endif
group.long c15:0x02D9++0x00
line.long 0x00 "PMXEVCNTR,Selected Event Counter Register"
group.long c15:0x00E9++0x00
line.long 0x00 "PMUSERENR,User Enable Register"
bitfld.long 0x00 3. "ER,Event counter read enable" "Disabled,Enabled"
bitfld.long 0x00 2. "CR,Cycle counter read enable" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled"
bitfld.long 0x00 0. "EN,User enable" "Disabled,Enabled"
group.long c15:0x01E9++0x00
line.long 0x00 "PMINTENSET,Interrupt Enable Set Register"
bitfld.long 0x00 31. "C,CCNT overflow interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x00 3. "P3,PMCNT3 overflow interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 2. "P2,PMCNT2 overflow interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 1. "P1,PMCNT1 overflow interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 0. "P0,PMCNT0 overflow interrupt enable" "Disabled,Enabled"
group.long c15:0x02E9++0x00
line.long 0x00 "PMINTENCLR,Interrupt Enable Clear Register"
eventfld.long 0x00 31. "C,CCNT overflow interrupt enable" "Disabled,Enabled"
newline
eventfld.long 0x00 3. "P3,PMCNT3 overflow interrupt enable" "Disabled,Enabled"
eventfld.long 0x00 2. "P2,PMCNT2 overflow interrupt enable" "Disabled,Enabled"
eventfld.long 0x00 1. "P1,PMCNT1 overflow interrupt enable" "Disabled,Enabled"
eventfld.long 0x00 0. "P0,PMCNT0 overflow interrupt enable" "Disabled,Enabled"
group.long c15:0x3E9++0x00
line.long 0x00 "PMOVSSET,Performance Monitor Overflow Flag Status Set Register"
group.long c15:(0x008E+0x0)++0x00
line.long 0x00 "PMEVCNTR0,Performance Monitors Event Count Register 0"
group.long c15:(0x00CE+0x0)++0x00
line.long 0x00 "PMEVTYPER0,Performance Monitors Event Type Register 0"
group.long c15:(0x008E+0x100)++0x00
line.long 0x00 "PMEVCNTR1,Performance Monitors Event Count Register 1"
group.long c15:(0x00CE+0x100)++0x00
line.long 0x00 "PMEVTYPER1,Performance Monitors Event Type Register 1"
group.long c15:(0x008E+0x200)++0x00
line.long 0x00 "PMEVCNTR2,Performance Monitors Event Count Register 2"
group.long c15:(0x00CE+0x200)++0x00
line.long 0x00 "PMEVTYPER2,Performance Monitors Event Type Register 2"
group.long c15:(0x008E+0x300)++0x00
line.long 0x00 "PMEVCNTR3,Performance Monitors Event Count Register 3"
group.long c15:(0x00CE+0x300)++0x00
line.long 0x00 "PMEVTYPER3,Performance Monitors Event Type Register 3"
group.long c15:0x07FE++0x00
line.long 0x00 "PMCCFILTR,Performance Monitors Cycle Count Filter Register"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
tree.end
tree "System Timer Registers"
rgroup.long c15:0x000E++0x00
line.long 0x00 "CNTFRQ,Counter Frequency Register"
rgroup.quad c15:0x100E0++0x01
line.quad 0x00 "CNTPCT,Counter Physical Count Register"
rgroup.quad c15:0x110E0++0x01
line.quad 0x00 "CNTVCT,Counter Virtual Count Register"
group.quad c15:0x140E0++0x01
line.quad 0x00 "CNTVOFF,Counter Virtual Offset Register"
group.long c15:0x001E++0x00
line.long 0x00 "CNTKCTL,Timer PL1 Control Register"
bitfld.long 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 mode" "Disabled,Enabled"
bitfld.long 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 mode" "Disabled,Enabled"
bitfld.long 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter, when that stream is enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
newline
bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 mode" "Disabled,Enabled"
bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 mode" "Disabled,Enabled"
group.long c15:0x401E++0x00
line.long 0x00 "CNTHCTL,Counter Non-secure PL2 Control Register"
bitfld.long 0x00 4.--7. "EVNTI,Selects which bit of CNTPCT is the trigger for the event stream generated from the physical counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTPCT trigger bit, defined by EVNTI" "0 to 1,1 to 0"
bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the physical counter" "Disabled,Enabled"
bitfld.long 0x00 1. "EL1PCEN,Controls whether the Non-secure copies of the physical timer registers are accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible"
newline
bitfld.long 0x00 0. "EL1PCTEN,Controls whether the physical counter, CNTPCT, is accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible"
group.long c15:0x002E++0x00
line.long 0x00 "CNTP_TVAL,Counter EL1 Physical Timer Value Register"
group.long c15:0x012E++0x00
line.long 0x00 "CNTP_CTL,Counter EL1 Physical Timer Control Register"
bitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad c15:0x120E0++0x01
line.quad 0x00 "CNTP_CVAL,Counter EL1 Physical Compare Value Register"
group.long c15:0x003E++0x00
line.long 0x00 "CNTV_TVAL,Counter EL1 Virtual Timer Value Register"
group.long c15:0x013E++0x00
line.long 0x00 "CNTV_CTL,Counter EL1 Virtual Timer Control Register"
bitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad c15:0x130E0++0x01
line.quad 0x00 "CNTV_CVAL,Counter EL1 Virtual Compare Value Register"
group.long c15:0x402E++0x00
line.long 0x00 "CNTHP_TVAL,Counter Non-secure EL2 Physical Timer Value Register"
group.long c15:0x412E++0x00
line.long 0x00 "CNTHP_CTL,Counter Non-secure EL2 Physical Timer Control Register"
bitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad c15:0x160E0++0x01
line.quad 0x00 "CNTHP_CVAL,Counter Non-secure EL2 Physical Compare Value Register"
tree.end
tree "Generic Interrupt Controller CPU Interface"
tree "AArch32 GIC Physical CPU Interface System Registers"
tree.open "Interrupt Controller Active Priorities Registers"
group.long c15:(0x048C+0x0)++0x00
line.long 0x00 "ICC_AP0R0,Interrupt Controller Active Priorities Group 0x0 Register"
bitfld.long 0x00 31. "P[31],Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P[30],Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P[29],Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
bitfld.long 0x00 28. "P[28],Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
newline
bitfld.long 0x00 27. "P[27],Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P[26],Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
bitfld.long 0x00 25. "P[25],Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P[24],Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
newline
bitfld.long 0x00 23. "P[23],Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
bitfld.long 0x00 22. "P[22],Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P[21],Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P[20],Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P[19],Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P[18],Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 17. "P[17],Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
bitfld.long 0x00 16. "P[16],Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
newline
bitfld.long 0x00 15. "P[15],Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P[14],Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
bitfld.long 0x00 13. "P[13],Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P[12],Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
newline
bitfld.long 0x00 11. "P[11],Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
bitfld.long 0x00 10. "P[10],Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P[9],Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P[8],Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P[7],Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P[6],Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P[5],Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
bitfld.long 0x00 4. "P[4],Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
newline
bitfld.long 0x00 3. "P[3],Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P[2],Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "P[1],Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P[0],Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
group.long c15:(0x048C+0xFFFFFFFFFFFFFC10)++0x00
line.long 0x00 "ICC_AP1R0,Interrupt Controller Active Priorities Group 0xFFFFFFFFFFFFFC10 Register"
bitfld.long 0x00 31. "P[31],Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P[30],Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P[29],Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
bitfld.long 0x00 28. "P[28],Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
newline
bitfld.long 0x00 27. "P[27],Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P[26],Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
bitfld.long 0x00 25. "P[25],Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P[24],Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
newline
bitfld.long 0x00 23. "P[23],Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
bitfld.long 0x00 22. "P[22],Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P[21],Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P[20],Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P[19],Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P[18],Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 17. "P[17],Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
bitfld.long 0x00 16. "P[16],Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
newline
bitfld.long 0x00 15. "P[15],Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P[14],Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
bitfld.long 0x00 13. "P[13],Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P[12],Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
newline
bitfld.long 0x00 11. "P[11],Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
bitfld.long 0x00 10. "P[10],Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P[9],Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P[8],Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P[7],Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P[6],Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P[5],Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
bitfld.long 0x00 4. "P[4],Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
newline
bitfld.long 0x00 3. "P[3],Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P[2],Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "P[1],Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P[0],Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
tree.end
newline
group.long c15:(0x038C+0x0)++0x00
line.long 0x00 "ICC_BPR0,Interrupt Controller Binary Point Register 0"
bitfld.long 0x00 0.--2. "BINARYPOINT,5-bit interrupt priority field control" "Reserved,Reserved,2,3,4,5,6,7"
group.long c15:(0x038C+0x40)++0x00
line.long 0x00 "ICC_BPR1,Interrupt Controller Binary Point Register 1"
bitfld.long 0x00 0.--2. "BINARYPOINT,5-bit interrupt priority field control" "Reserved,Reserved,2,3,4,5,6,7"
group.long c15:0x04CC++0x00
line.long 0x00 "ICC_CTLR,Interrupt Control Register for EL1"
rbitfld.long 0x00 15. "A3V,Affinity 3 valid" "Not supported,?..."
rbitfld.long 0x00 14. "SEIS,SEI support" "Not supported,?..."
rbitfld.long 0x00 11.--13. "IDBITS,Number of physical interrupt identifier bits supported" "16 bits,?..."
newline
rbitfld.long 0x00 8.--10. "PRIBITS,Number of priority bits implemented" "Reserved,Reserved,Reserved,Reserved,5,?..."
bitfld.long 0x00 1. "EOIMODE,Alias of ICC_MCTLR.EOImode_EL1" "0,1"
bitfld.long 0x00 0. "CBPR,Common binary point register" "0,1"
wgroup.long c15:0x01BC++0x00
line.long 0x00 "ICC_DIR,Interrupt Controller Deactivate Interrupt Register"
hexmask.long.word 0x00 0.--9. 1. "INTID,Interrupt ID"
wgroup.long c15:(0x018C+0x0)++0x00
line.long 0x00 "ICC_EOIR0,Interrupt Controller End Of Interrupt Register 0"
hexmask.long.word 0x00 0.--9. 1. "INTID,INTID from the corresponding ICC_IAR0 access"
rgroup.long c15:(0x028C+0x0)++0x00
line.long 0x00 "ICC_HPPIR0,Interrupt Controller Highest Priority Pending Interrupt Register 0"
hexmask.long.word 0x00 0.--9. 1. "INTID,INTID of the highest priority pending Group 0 interrupt"
rgroup.long c15:(0x008C+0x0)++0x00
line.long 0x00 "ICC_IAR0,Interrupt Controller Interrupt Acknowledge Register 0"
hexmask.long.word 0x00 0.--9. 1. "INTID,INTID of the signaled interrupt"
group.long c15:(0x06CC+0x0)++0x00
line.long 0x00 "ICC_IGRPEN0,Interrupt Controller Group Enable Register 0"
bitfld.long 0x00 0. "ENABLE,Enable group 0 interrupts" "Disabled,Enabled"
wgroup.long c15:(0x018C+0x40)++0x00
line.long 0x00 "ICC_EOIR1,Interrupt Controller End Of Interrupt Register 1"
hexmask.long.word 0x00 0.--9. 1. "INTID,INTID from the corresponding ICC_IAR0 access"
rgroup.long c15:(0x028C+0x40)++0x00
line.long 0x00 "ICC_HPPIR1,Interrupt Controller Highest Priority Pending Interrupt Register 1"
hexmask.long.word 0x00 0.--9. 1. "INTID,INTID of the highest priority pending Group 1 interrupt"
rgroup.long c15:(0x008C+0x40)++0x00
line.long 0x00 "ICC_IAR1,Interrupt Controller Interrupt Acknowledge Register 1"
hexmask.long.word 0x00 0.--9. 1. "INTID,INTID of the signaled interrupt"
group.long c15:(0x06CC+0x100)++0x00
line.long 0x00 "ICC_IGRPEN1,Interrupt Controller Group Enable Register 1"
bitfld.long 0x00 0. "ENABLE,Enable group 1 interrupts" "Disabled,Enabled"
group.long c15:0x0064++0x00
line.long 0x00 "ICC_PMR,Interrupt Controller Interrupt Priority Mask Register"
bitfld.long 0x00 3.--7. "PRIORITY,The priority mask level for the CPU interface" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest"
rgroup.long c15:0x03BC++0x00
line.long 0x00 "ICC_RPR,Interrupt Controller Running Priority Register"
hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Current running priority on the CPU interface"
wgroup.quad c15:(0x120C0-0x0)++0x01
line.quad 0x00 "ICC_SGI0R,SGI Generation Register 0"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Disabled,Enabled"
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
bitfld.quad 0x00 0.--4. "TARGETLIST,Target list" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
wgroup.quad c15:(0x120C0-0x2000)++0x01
line.quad 0x00 "ICC_SGI1R,SGI Generation Register 1"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Disabled,Enabled"
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
bitfld.quad 0x00 0.--4. "TARGETLIST,Target list" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
wgroup.quad c15:0x110C0++0x01
line.quad 0x00 "ICC_ASGI1R,Alias SGI Generation Register $2"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Disabled,Enabled"
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
bitfld.quad 0x00 0.--4. "TARGETLIST,Target list" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long c15:0x05CC++0x00
line.long 0x00 "ICC_SRE,System Register Enable Register for EL1"
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "Reserved,Yes"
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "Reserved,Yes"
bitfld.long 0x00 0. "SRE,System register enable" "Reserved,Enabled"
group.long c15:0x459C++0x00
line.long 0x00 "ICC_HSRE,System Register Enable Register for EL2"
bitfld.long 0x00 3. "ENABLE,Enable lower exception level access to ICC_SRE_EL1" "Reserved,Enabled"
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "Reserved,Yes"
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "Reserved,Yes"
newline
bitfld.long 0x00 0. "SRE,System register enable" "Reserved,Enabled"
tree.end
tree "AArch32 GIC Virtual CPU Interface System Registers"
tree.open "Interrupt Controller Active Priorities Registers"
group.long c15:(0x048C+0x0)++0x00
line.long 0x00 "ICV_AP0R0,Interrupt Controller Virtual Active Priorities Group 0x0 Register 0"
bitfld.long 0x00 31. "P[31],Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P[30],Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P[29],Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
bitfld.long 0x00 28. "P[28],Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
newline
bitfld.long 0x00 27. "P[27],Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P[26],Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
bitfld.long 0x00 25. "P[25],Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P[24],Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
newline
bitfld.long 0x00 23. "P[23],Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
bitfld.long 0x00 22. "P[22],Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P[21],Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P[20],Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P[19],Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P[18],Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 17. "P[17],Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
bitfld.long 0x00 16. "P[16],Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
newline
bitfld.long 0x00 15. "P[15],Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P[14],Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
bitfld.long 0x00 13. "P[13],Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P[12],Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
newline
bitfld.long 0x00 11. "P[11],Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
bitfld.long 0x00 10. "P[10],Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P[9],Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P[8],Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P[7],Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P[6],Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P[5],Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
bitfld.long 0x00 4. "P[4],Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
newline
bitfld.long 0x00 3. "P[3],Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P[2],Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "P[1],Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P[0],Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
group.long c15:(0x048C+0xFFFFFFFFFFFFFC10)++0x00
line.long 0x00 "ICV_AP1R0,Interrupt Controller Virtual Active Priorities Group 0xFFFFFFFFFFFFFC10 Register 0"
bitfld.long 0x00 31. "P[31],Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P[30],Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P[29],Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
bitfld.long 0x00 28. "P[28],Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
newline
bitfld.long 0x00 27. "P[27],Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P[26],Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
bitfld.long 0x00 25. "P[25],Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P[24],Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
newline
bitfld.long 0x00 23. "P[23],Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
bitfld.long 0x00 22. "P[22],Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P[21],Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P[20],Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P[19],Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P[18],Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 17. "P[17],Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
bitfld.long 0x00 16. "P[16],Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
newline
bitfld.long 0x00 15. "P[15],Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P[14],Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
bitfld.long 0x00 13. "P[13],Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P[12],Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
newline
bitfld.long 0x00 11. "P[11],Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
bitfld.long 0x00 10. "P[10],Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P[9],Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P[8],Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P[7],Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P[6],Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P[5],Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
bitfld.long 0x00 4. "P[4],Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
newline
bitfld.long 0x00 3. "P[3],Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P[2],Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "P[1],Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P[0],Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
tree.end
newline
group.long c15:0x04CC++0x00
line.long 0x00 "ICV_CTLR,Interrupt Controller Virtual Control Register"
rbitfld.long 0x00 15. "A3V,Affinity 3 valid" "Not supported,?..."
rbitfld.long 0x00 14. "SEIS,SEI support" "Not supported,?..."
rbitfld.long 0x00 11.--13. "IDBITS,Number of physical interrupt identifier bits supported" "16 bits,?..."
newline
rbitfld.long 0x00 8.--10. "PRIBITS,Number of priority bits implemented" "Reserved,Reserved,Reserved,Reserved,5,?..."
bitfld.long 0x00 1. "EOIMODE,Alias of ICC_MCTLR.EOImode_EL1" "0,1"
bitfld.long 0x00 0. "CBPR,Common binary point register" "0,1"
wgroup.long c15:0x01BC++0x00
line.long 0x00 "ICV_DIR,Interrupt Controller Virtual Deactivate Interrupt Register"
hexmask.long.word 0x00 0.--15. 1. "INTID,Interrupt ID"
hgroup.long c15:(0x008C+0x0)++0x00
hide.long 0x00 "ICV_IAR0,Interrupt Controller Vitrtual Interrupt Acknowledge Register 0"
wgroup.long c15:(0x018C+0x0)++0x00
line.long 0x00 "ICV_EOIR0,Interrupt Controller Vitrtual End Of Interrupt Register 0"
hexmask.long.word 0x00 0.--15. 1. "INTID,INTID from the corresponding ICC_IAR0 access"
rgroup.long c15:(0x028C+0x0)++0x00
line.long 0x00 "ICV_HPPIR0,Interrupt Controller Vitrtual Highest Priority Pending Interrupt Register 0"
hexmask.long.word 0x00 0.--15. 1. "INTID,INTID of the highest priority pending Group 0 interrupt"
group.long c15:(0x038C+0x0)++0x00
line.long 0x00 "ICV_BPR0,Interrupt Controller Vitrtual Binary Point Register 0"
bitfld.long 0x00 0.--2. "BINARYPOINT,5-bit interrupt priority field control" "Reserved,Reserved,2,3,4,5,6,7"
hgroup.long c15:(0x008C+0x40)++0x00
hide.long 0x00 "ICV_IAR1,Interrupt Controller Vitrtual Interrupt Acknowledge Register 1"
wgroup.long c15:(0x018C+0x40)++0x00
line.long 0x00 "ICV_EOIR1,Interrupt Controller Vitrtual End Of Interrupt Register 1"
hexmask.long.word 0x00 0.--15. 1. "INTID,INTID from the corresponding ICC_IAR1 access"
rgroup.long c15:(0x028C+0x40)++0x00
line.long 0x00 "ICV_HPPIR1,Interrupt Controller Vitrtual Highest Priority Pending Interrupt Register 1"
hexmask.long.word 0x00 0.--15. 1. "INTID,INTID of the highest priority pending Group 1 interrupt"
group.long c15:(0x038C+0x40)++0x00
line.long 0x00 "ICV_BPR1,Interrupt Controller Vitrtual Binary Point Register 1"
bitfld.long 0x00 0.--2. "BINARYPOINT,5-bit interrupt priority field control" "Reserved,Reserved,2,3,4,5,6,7"
group.long c15:0x07CC++0x00
line.long 0x00 "ICV_IGRPEN1,Interrupt Controller Virtual Group Enable Register 1"
bitfld.long 0x00 0. "ENABLE,Enable group 1 interrupts" "Disabled,Enabled"
group.long c15:0x06CC++0x00
line.long 0x00 "ICV_IGRPEN0,Interrupt Controller Virtual Interrupt Group 0 Enable Register"
bitfld.long 0x00 0. "ENABLE,Enable group 0 interrupts" "Disabled,Enabled"
group.long c15:0x0064++0x00
line.long 0x00 "ICV_PMR,Interrupt Controller Virtual Interrupt Priority Mask Register"
bitfld.long 0x00 3.--7. "PRIORITY,The priority mask level for the CPU interface" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest"
rgroup.long c15:0x03BC++0x00
line.long 0x00 "ICV_RPR,Interrupt Controller Virtual Running Priority Register"
hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Current running priority on the CPU interface"
tree.end
tree "AArch32 Virtual Interface Control System Registers"
tree.open "Interrupt Controller Hypervisor Active Priorities Register"
group.long c15:0x408C++0x00
line.long 0x00 "ICH_AP0R0,Interrupt Controller Hypervisor Active Priorities Group 0 Register 0"
bitfld.long 0x00 31. "P[31],Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P[30],Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P[29],Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
bitfld.long 0x00 28. "P[28],Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
newline
bitfld.long 0x00 27. "P[27],Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P[26],Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
bitfld.long 0x00 25. "P[25],Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P[24],Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
newline
bitfld.long 0x00 23. "P[23],Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
bitfld.long 0x00 22. "P[22],Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P[21],Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P[20],Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P[19],Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P[18],Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 17. "P[17],Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
bitfld.long 0x00 16. "P[16],Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
newline
bitfld.long 0x00 15. "P[15],Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P[14],Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
bitfld.long 0x00 13. "P[13],Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P[12],Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
newline
bitfld.long 0x00 11. "P[11],Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
bitfld.long 0x00 10. "P[10],Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P[9],Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P[8],Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P[7],Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P[6],Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P[5],Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
bitfld.long 0x00 4. "P[4],Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
newline
bitfld.long 0x00 3. "P[3],Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P[2],Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "P[1],Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P[0],Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
group.long c15:0x409C++0x00
line.long 0x00 "ICH_AP1R0,Interrupt Controller Hypervisor Active Priorities Group 1 Register 0"
bitfld.long 0x00 31. "P[31],Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P[30],Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P[29],Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
bitfld.long 0x00 28. "P[28],Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
newline
bitfld.long 0x00 27. "P[27],Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P[26],Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
bitfld.long 0x00 25. "P[25],Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P[24],Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
newline
bitfld.long 0x00 23. "P[23],Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
bitfld.long 0x00 22. "P[22],Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P[21],Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P[20],Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P[19],Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P[18],Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P[17],Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
bitfld.long 0x00 16. "P[16],Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
newline
bitfld.long 0x00 15. "P[15],Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P[14],Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
bitfld.long 0x00 13. "P[13],Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P[12],Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
newline
bitfld.long 0x00 11. "P[11],Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
bitfld.long 0x00 10. "P[10],Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P[9],Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P[8],Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P[7],Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P[6],Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P[5],Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
bitfld.long 0x00 4. "P[4],Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
newline
bitfld.long 0x00 3. "P[3],Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P[2],Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "P[1],Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P[0],Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
tree.end
newline
group.long c15:0x40BC++0x00
line.long 0x00 "ICH_HCR,Interrupt Controller Hypervisor Control Register"
bitfld.long 0x00 27.--31. "EOICOUNT,Number of successful write to a virtual EOIR or DIR resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 14. "TDIR,Trap virtual EL1 writes to ICC_DIR" "Not trapped,Trapped"
bitfld.long 0x00 12. "TALL1,Trap all virtual EL1 accesses to ICC_* system registers for Group 1 interrupts to EL2" "Not trapped,Trapped"
newline
bitfld.long 0x00 11. "TALL0,Trap all virtual EL1 accesses to ICC_* system registers for Group 0 interrupts to EL2" "Not trapped,Trapped"
bitfld.long 0x00 10. "TC,Trap all virtual EL1 accesses to system registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped"
bitfld.long 0x00 7. "VGRP1DIE,VM group 1 disabled interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 6. "VGRP1EIE,VM group 1 enabled interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x00 5. "VGRP0DIE,VM group 0 disabled interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 4. "VGRP0EIE,VM group 0 enabled interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 3. "NPIE,No pending interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 2. "LRENPIE,List register entry not present interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "UIE,Underflow interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled"
rgroup.long c15:0x41BC++0x00
line.long 0x00 "ICH_VTR,Interrupt Controller Hypervisor Control VGIC Type Register"
bitfld.long 0x00 29.--31. "PRIBITS,Priority bits" "Reserved,Reserved,Reserved,Reserved,5,?..."
bitfld.long 0x00 26.--28. "PREBITS,Preemption bits" "Reserved,Reserved,Reserved,Reserved,5,?..."
bitfld.long 0x00 23.--25. "IDBITS,The number of virtual interrupt identifier bits supported" "16 bits,?..."
bitfld.long 0x00 22. "SEIS,SEI Support" "Not supported,?..."
newline
bitfld.long 0x00 21. "A3V,Affinity 3 support" "Not supported,?..."
bitfld.long 0x00 20. "NV4,GICv4 direct injection of virtual interrupts not supported" "Reserved,Not supported"
bitfld.long 0x00 19. "TDS,Separate trapping EL1 writes to ICV_DIR supported" "Reserved,Supported"
bitfld.long 0x00 0.--4. "LISTREGS,The number of implemented List registers" "Reserved,Reserved,Reserved,4,?..."
rgroup.long c15:0x42BC++0x00
line.long 0x00 "ICH_MISR,Interrupt Controller Maintenance Interrupt Status Register"
bitfld.long 0x00 7. "VGRP1D,vPE group 1 disabled" "No,Yes"
bitfld.long 0x00 6. "VGRP1E,vPE group 1 enabled" "Disabled,Enabled"
bitfld.long 0x00 5. "VGRP0D,vPE group 0 disabled" "No,Yes"
bitfld.long 0x00 4. "VGRP0E,vPE group 0 enabled" "Disabled,Enabled"
newline
bitfld.long 0x00 3. "NP,No pending maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 2. "LRENP,List register entry not present" "Not present,Present"
bitfld.long 0x00 1. "U,Underflow assertion" "Not asserted,Asserted"
bitfld.long 0x00 0. "EOI,End of interrupt assertion" "Not asserted,Asserted"
rgroup.long c15:0x43BC++0x00
line.long 0x00 "ICH_EISR,Interrupt Controller End of Interrupt Status Register"
bitfld.long 0x00 3. "STATUS[3],EOI maintenance interrupt status bit for List (ICH_LR3) register 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "STATUS[2],EOI maintenance interrupt status bit for List (ICH_LR2) register 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "STATUS[1],EOI maintenance interrupt status bit for List (ICH_LR1) register 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "STATUS[0],EOI maintenance interrupt status bit for List (ICH_LR0) register 0" "No interrupt,Interrupt"
group.long c15:0x47BC++0x00
line.long 0x00 "ICH_VMCR,Interrupt Controller Virtual Machine Control Register"
bitfld.long 0x00 27.--31. "VPMR,Virtual priority mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 21.--23. "VBPR0,Virtual binary point register for group 0" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--20. "VBPR1,Virtual binary point register for group 1" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 9. "VEOIM,Virtual EOI mode" "Drop & interrupt,Drop"
newline
bitfld.long 0x00 4. "VCBPR,Virtual common binary point register" "Separate,Both"
bitfld.long 0x00 1. "VENG1,Virtual group 1 interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 0. "VENG0,Virtual group 0 interrupt enable" "Disabled,Enabled"
rgroup.long c15:0x45BC++0x00
line.long 0x00 "ICH_ELRSR,Interrupt Controller Empty List Register Status Register"
bitfld.long 0x00 3. "STATUS[3],Status bit for list (ICH_LR3) register 3" "Interrupt,No interrupt"
bitfld.long 0x00 2. "STATUS[2],Status bit for list (ICH_LR2) register 2" "Interrupt,No interrupt"
bitfld.long 0x00 1. "STATUS[1],Status bit for list (ICH_LR1) register 1" "Interrupt,No interrupt"
bitfld.long 0x00 0. "STATUS[0],Status bit for list (ICH_LR0) register 0" "Interrupt,No interrupt"
group.long c15:(0x40CC+0x0)++0x00
line.long 0x00 "ICH_LR0,Interrupt Controller List Register 0"
hexmask.long.word 0x00 0.--15. 1. "VINTID,Virtual INTID of the interrupt"
group.long c15:(0x40CC+0x100)++0x00
line.long 0x00 "ICH_LR1,Interrupt Controller List Register 1"
hexmask.long.word 0x00 0.--15. 1. "VINTID,Virtual INTID of the interrupt"
group.long c15:(0x40CC+0x200)++0x00
line.long 0x00 "ICH_LR2,Interrupt Controller List Register 2"
hexmask.long.word 0x00 0.--15. 1. "VINTID,Virtual INTID of the interrupt"
group.long c15:(0x40CC+0x300)++0x00
line.long 0x00 "ICH_LR3,Interrupt Controller List Register 3"
hexmask.long.word 0x00 0.--15. 1. "VINTID,Virtual INTID of the interrupt"
if (((per.l(c15:0x40EC+0x0))&0x20000000)==0x00)
group.long c15:(0x40EC+0x0)++0x00
line.long 0x00 "ICH_LRC0,Interrupt Controller List Register 0"
bitfld.long 0x00 30.--31. "STATE,Interrupt state" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Virtual interrupt maps directly to a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 28. "GROUP,Group for this virtual interrupt" "Group 0,Group 1"
newline
bitfld.long 0x00 19.--23. "PRIORITY,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 9. "EOI,End of interrupt" "Not EOI,EOI"
else
group.long c15:(0x40EC+0x0)++0x00
line.long 0x00 "ICH_LRC0,Interrupt Controller List Register 0"
bitfld.long 0x00 30.--31. "STATE,Interrupt state" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Virtual interrupt maps directly to a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 28. "GROUP,Group for this virtual interrupt" "Group 0,Group 1"
newline
bitfld.long 0x00 19.--23. "PRIORITY,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
endif
if (((per.l(c15:0x40EC+0x100))&0x20000000)==0x00)
group.long c15:(0x40EC+0x100)++0x00
line.long 0x00 "ICH_LRC1,Interrupt Controller List Register 1"
bitfld.long 0x00 30.--31. "STATE,Interrupt state" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Virtual interrupt maps directly to a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 28. "GROUP,Group for this virtual interrupt" "Group 0,Group 1"
newline
bitfld.long 0x00 19.--23. "PRIORITY,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 9. "EOI,End of interrupt" "Not EOI,EOI"
else
group.long c15:(0x40EC+0x100)++0x00
line.long 0x00 "ICH_LRC1,Interrupt Controller List Register 1"
bitfld.long 0x00 30.--31. "STATE,Interrupt state" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Virtual interrupt maps directly to a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 28. "GROUP,Group for this virtual interrupt" "Group 0,Group 1"
newline
bitfld.long 0x00 19.--23. "PRIORITY,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
endif
if (((per.l(c15:0x40EC+0x200))&0x20000000)==0x00)
group.long c15:(0x40EC+0x200)++0x00
line.long 0x00 "ICH_LRC2,Interrupt Controller List Register 2"
bitfld.long 0x00 30.--31. "STATE,Interrupt state" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Virtual interrupt maps directly to a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 28. "GROUP,Group for this virtual interrupt" "Group 0,Group 1"
newline
bitfld.long 0x00 19.--23. "PRIORITY,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 9. "EOI,End of interrupt" "Not EOI,EOI"
else
group.long c15:(0x40EC+0x200)++0x00
line.long 0x00 "ICH_LRC2,Interrupt Controller List Register 2"
bitfld.long 0x00 30.--31. "STATE,Interrupt state" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Virtual interrupt maps directly to a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 28. "GROUP,Group for this virtual interrupt" "Group 0,Group 1"
newline
bitfld.long 0x00 19.--23. "PRIORITY,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
endif
if (((per.l(c15:0x40EC+0x300))&0x20000000)==0x00)
group.long c15:(0x40EC+0x300)++0x00
line.long 0x00 "ICH_LRC3,Interrupt Controller List Register 3"
bitfld.long 0x00 30.--31. "STATE,Interrupt state" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Virtual interrupt maps directly to a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 28. "GROUP,Group for this virtual interrupt" "Group 0,Group 1"
newline
bitfld.long 0x00 19.--23. "PRIORITY,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 9. "EOI,End of interrupt" "Not EOI,EOI"
else
group.long c15:(0x40EC+0x300)++0x00
line.long 0x00 "ICH_LRC3,Interrupt Controller List Register 3"
bitfld.long 0x00 30.--31. "STATE,Interrupt state" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Virtual interrupt maps directly to a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 28. "GROUP,Group for this virtual interrupt" "Group 0,Group 1"
newline
bitfld.long 0x00 19.--23. "PRIORITY,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
endif
tree.end
tree.end
tree "Debug Registers"
tree "Coresight Management Registers"
rgroup.long c14:0x0000++0x00
line.long 0x00 "DBGDIDR,Debug ID Register"
bitfld.long 0x00 28.--31. "WRP,Number of watchpoint register pairs" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8,?..."
bitfld.long 0x00 24.--27. "BRP,Number of breakpoint register pairs" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8,?..."
newline
bitfld.long 0x00 20.--23. "CTX_CMP,Number of BRPs with context ID comparison capability" "Reserved,2,?..."
bitfld.long 0x00 16.--19. "VERSION,Debug architecture version" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8,?..."
newline
bitfld.long 0x00 14. "NSUHD_IMP,Secure user halting debug-mode" "Not supported,?..."
bitfld.long 0x00 12. "SE_IMP,Security extensions implemented" "Not implemented,?..."
rgroup.long c14:0x0060++0x00
line.long 0x00 "DBGWFAR,Debug Watchpoint Fault Address Register"
group.long c14:0x0070++0x00
line.long 0x00 "DBGVCR,Debug Vector Catch Register"
bitfld.long 0x00 7. "FIQVCE,FIQ vector catch enable" "Disabled,Enabled"
bitfld.long 0x00 6. "IRQVCE,IRQ vector catch enable" "Disabled,Enabled"
newline
bitfld.long 0x00 4. "DAVCE,Data abort vector catch enable" "Disabled,Enabled"
bitfld.long 0x00 3. "PAVCE,Prefetch abort vector catch enable" "Disabled,Enabled"
newline
bitfld.long 0x00 2. "SVCVCE,Supervisor call (SVC) vector catch enable" "Disabled,Enabled"
bitfld.long 0x00 1. "UIVCE,Undefined instruction vector catch enable" "Disabled,Enabled"
group.long c14:0x0200++0x00
line.long 0x00 "DBGDTRRXEXT,Debug Receive Register (External View)"
rgroup.long c14:0x0050++0x00
line.long 0x00 "DBGDTRRXINT,Debug Receive Register (Internal View)"
group.long c14:0x0020++0x00
line.long 0x00 "DBGDCCINT,Debug Comms Channel Interrupt Enable Register"
bitfld.long 0x00 30. "RX,DCC interrupt enable controls" "Disabled,Enabled"
bitfld.long 0x00 29. "TX,DCC interrupt enable controls" "Disabled,Enabled"
rgroup.long c14:0x0010++0x00
line.long 0x00 "DBGDSCRINT,Debug Status and Control Register (Internal View)"
bitfld.long 0x00 30. "RXFULL,DBGDTRRX register full" "Empty,Full"
bitfld.long 0x00 29. "TXFULL,DBGDTRTX register full" "Empty,Full"
newline
bitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure"
bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled"
newline
bitfld.long 0x00 12. "UDCCDIS,User mode access to communications channel disable" "No,Yes"
bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,Software breakpoint (BKPT),Reserved,Vector catch,Reserved,Reserved,Reserved,Reserved,Watchpoint,?..."
if (((per.l(c14:0x0411))&0x02)==0x02)
group.long c14:0x0220++0x00
line.long 0x00 "DBGDSCREXT,Debug Status and Control Register (External View)"
bitfld.long 0x00 30. "RXFULL,DBGDTRRX register full" "Empty,Full"
bitfld.long 0x00 29. "TXFULL,DBGDTRTX register full" "Empty,Full"
newline
bitfld.long 0x00 27. "RXO,DBGDTRRX overflow" "No overflow,Overflow"
bitfld.long 0x00 26. "TXU,DBGDTRTX underflow" "No underflow,Underflow"
newline
bitfld.long 0x00 22.--23. "INTDIS,Interrupt disable" "Don't disable interrupts,Disable interrupts targeting non-sec EL1,Disable interrupts targeting EL1 & EL2,Disable all interrupts"
bitfld.long 0x00 21. "TDA,Trap debug register access" "Not trapped,Trapped"
newline
rbitfld.long 0x00 18. "NS,Non-secure status bit" "Reserved,Non-secure"
bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled"
newline
bitfld.long 0x00 14. "HDE,Halting debug-mode" "Disabled,Enabled"
bitfld.long 0x00 12. "UDCCDIS,User mode access to communications channel disable" "No,Yes"
newline
bitfld.long 0x00 6. "ERR,Cummulative error flag" "Not error,Error"
bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,Software breakpoint (BKPT),Reserved,Vector catch,Reserved,Reserved,Reserved,Reserved,Watchpoint,?..."
else
group.long c14:0x0220++0x00
line.long 0x00 "DBGDSCREXT,Debug Status and Control Register (External View)"
rbitfld.long 0x00 30. "RXFULL,DBGDTRRX register full" "Empty,Full"
rbitfld.long 0x00 29. "TXFULL,DBGDTRTX register full" "Empty,Full"
newline
rbitfld.long 0x00 27. "RXO,DBGDTRRX overflow" "No overflow,Overflow"
rbitfld.long 0x00 26. "TXU,DBGDTRTX underflow" "No underflow,Underflow"
newline
rbitfld.long 0x00 22.--23. "INTDIS,Interrupt disable" "Don't disable interrupts,Disable interrupts targeting non-sec EL1,Disable interrupts targeting EL1 & EL2,Disable all interrupts"
rbitfld.long 0x00 21. "TDA,Trap debug register access" "Not trapped,Trapped"
newline
rbitfld.long 0x00 18. "NS,Non-secure status bit" "Reserved,Non-secure"
bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled"
newline
rbitfld.long 0x00 14. "HDE,Halting debug-mode" "Disabled,Enabled"
bitfld.long 0x00 12. "UDCCDIS,User mode access to communications channel disable" "No,Yes"
newline
rbitfld.long 0x00 6. "ERR,Cummulative error flag" "Not error,Error"
bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,Software breakpoint (BKPT),Reserved,Vector catch,Reserved,Reserved,Reserved,Reserved,Watchpoint,?..."
endif
group.long c14:0x0230++0x00
line.long 0x00 "DBGDTRTXEXT,Debug Transmit Register (External View)"
if (((per.l(c14:0x0411))&0x02)==0x02)
group.long c14:0x0260++0x00
line.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register"
else
rgroup.long c14:0x0260++0x00
line.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register"
endif
wgroup.long c14:0x0050++0x00
line.long 0x00 "DBGDTRTXINT,Debug Transmit Register (Internal View)"
rgroup.long c14:0x0707++0x00
line.long 0x00 "DBGDEVID2,Debug Device ID Register 2"
rgroup.long c14:0x0717++0x00
line.long 0x00 "DBGDEVID1,Debug Device ID Register 1"
bitfld.long 0x00 0.--3. "PCSROFFSET,PC samples returned offset" "Reserved,Reserved,No offset,?..."
rgroup.long c14:0x0727++0x00
line.long 0x00 "DBGDEVID0,Debug Device ID Register 0"
bitfld.long 0x00 28.--31. "CIDMASK,Level of support for the context ID matching breakpoint masking capability." "Not implemented,?..."
bitfld.long 0x00 24.--27. "AR,Debug external auxiliary control register support status" "Not supported,?..."
newline
bitfld.long 0x00 20.--23. "DL,Support for debug OS double lock register" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "VE,Specifies implementation of virtualization extension" "Reserved,Implemented,?..."
newline
bitfld.long 0x00 12.--15. "VC,Form of the vector catch event implemented" "Implemented,?..."
bitfld.long 0x00 8.--11. "BPAM,Level of support for immediate virtual address matching breakpoint masking capability" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented"
newline
bitfld.long 0x00 4.--7. "WPAM,Level of support for the DVA matching watchpoint masking capability" "Reserved,Implemented,?..."
bitfld.long 0x00 0.--3. "PCS,Level of support for program counter sampling using debug registers 40 and 43" "Reserved,Reserved,Reserved,Implemented,?..."
newline
tree.end
rgroup.long c14:0x0001++0x00
line.long 0x00 "DBGDRAR,Debug ROM Address Register"
hexmask.long 0x00 12.--31. 0x1000 "ROMADDR,ROM physical address"
newline
bitfld.long 0x00 0. "VALID,ROM table address valid" "Not valid,Valid"
rgroup.long c14:0x0002++0x00
line.long 0x00 "DBGDSAR,Debug Self Address Register"
wgroup.long c14:0x0401++0x00
line.long 0x00 "DBGOSLAR,Operating System Lock Access Register"
rgroup.long c14:0x0411++0x00
line.long 0x00 "DBGOSLSR,Operating System Lock Status Register"
bitfld.long 0x00 2. "NTT,32-bit access" "Not required,Required"
bitfld.long 0x00 1. "OSLK,Status of the OS Lock" "Not locked,Locked"
newline
bitfld.long 0x00 0. 3. "OSLM,OS Lock Model implemented Bit" "Reserved,Reserved,Implemented,?..."
group.long c14:0x0431++0x00
line.long 0x00 "DBGOSDLR,OS Double-lock Register"
bitfld.long 0x00 0. "DLK,OS double-lock control" "Not locked,Locked"
group.long c14:0x0441++0x00
line.long 0x00 "DBGPRCR,Device Power-Down and Reset Control Register"
bitfld.long 0x00 0. "CORENPDRQ,Core No Power down Request" "Powered down,Emulated"
group.long c14:0x0687++0x00
line.long 0x00 "DBGCLAIMSET,Debug Claim Tag Set Register"
bitfld.long 0x00 7. "CT7,Claim Tag 7 Set" "Not set,Set"
bitfld.long 0x00 6. "CT6,Claim Tag 6 Set" "Not set,Set"
newline
bitfld.long 0x00 5. "CT5,Claim Tag 5 Set" "Not set,Set"
bitfld.long 0x00 4. "CT4,Claim Tag 4 Set" "Not set,Set"
newline
bitfld.long 0x00 3. "CT3,Claim Tag 3 Set" "Not set,Set"
bitfld.long 0x00 2. "CT2,Claim Tag 2 Set" "Not set,Set"
newline
bitfld.long 0x00 1. "CT1,Claim Tag 1 Set" "Not set,Set"
bitfld.long 0x00 0. "CT0,Claim Tag 0 Set" "Not set,Set"
group.long c14:0x0697++0x00
line.long 0x00 "DBGCLAIMCLR,Debug Claim Tag Clear Register"
bitfld.long 0x00 7. "CT7,Claim Tag 7 Clear" "Not cleared,Cleared"
bitfld.long 0x00 6. "CT6,Claim Tag 6 Clear" "Not cleared,Cleared"
newline
bitfld.long 0x00 5. "CT5,Claim Tag 5 Clear" "Not cleared,Cleared"
bitfld.long 0x00 4. "CT4,Claim Tag 4 Clear" "Not cleared,Cleared"
newline
bitfld.long 0x00 3. "CT3,Claim Tag 3 Clear" "Not cleared,Cleared"
bitfld.long 0x00 2. "CT2,Claim Tag 2 Clear" "Not cleared,Cleared"
newline
bitfld.long 0x00 1. "CT1,Claim Tag 1 Clear" "Not cleared,Cleared"
bitfld.long 0x00 0. "CT0,Claim Tag 0 Clear" "Not cleared,Cleared"
rgroup.long c14:0x06E7++0x00
line.long 0x00 "DBGAUTHSTATUS,Debug Authentication Status Register"
bitfld.long 0x00 10.--11. "HNID,Hyp non-invasive debug" "Reserved,Reserved,Disabled,Enabled"
bitfld.long 0x00 8.--9. "HID,Hyp invasive debug"  "Reserved,Reserved,Disabled,Enabled"
newline
bitfld.long 0x00 6.--7. "SNID,Secure non-invasive debug" "Not implemented,?..."
bitfld.long 0x00 4.--5. "SID,Secure invasive debug" "Not implemented,?..."
newline
bitfld.long 0x00 2.--3. "NSNID,Non-secure non-invasive debug" "Reserved,Reserved,Disabled,Enabled"
bitfld.long 0x00 0.--1. "NSID,Non-secure invasive debug" "Reserved,Reserved,Disabled,Enabled"
rgroup.long c14:0x7000++0x00 "Jazelle Registers"
line.long 0x00 "JIDR,Jazelle ID Register"
rgroup.long c14:0x7001++0x00
line.long 0x00 "JOSCR,Jazelle OS Control Register"
rgroup.long c14:0x7002++0x00
line.long 0x00 "JMCR,Jazelle Main Configuration Register"
tree.end
tree "Breakpoint Registers"
tree "Breakpoint 0"
if (((per.l(c14:0x0500+0x0))&0xA00000)==0x0)
group.long c14:(0x0400+0x0)++0x00
line.long 0x00 "DBGBVR0,Debug Breakpoint Value Register"
hexmask.long 0x0 2.--31. 0x4 "VA,Address Value for comparison bits (31:2)"
elif (((per.l(c14:0x0500+0x0))&0xA00000)==(0xA00000||0x200000))
group.long c14:(0x0400+0x0)++0x00
line.long 0x00 "DBGBVR0,Debug Breakpoint Value Register"
else
rgroup.long c14:(0x0400+0x0)++0x00
line.long 0x00 "DBGBVR0,Debug Breakpoint Value Register"
endif
if ((per.l(c14:0x0500+0x0)&0x2000)==0x2000)
if ((per.l(c14:0x0500+0x0)&0xC000)==(0x0000||0x4000))
group.long c14:(0x0500+0x0)++0x00
line.long 0x00 "DBGBCR0,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif ((per.l(c14:0x0500+0x0)&0xC000)==0x8000)
group.long c14:(0x0500+0x0)++0x00
line.long 0x00 "DBGBCR0,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,Reserved,User/System"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.long c14:(0x0500+0x0)++0x00
line.long 0x00 "DBGBCR0,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,?..."
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
else
group.long c14:(0x0500+0x0)++0x00
line.long 0x00 "DBGBCR0,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System,System,User,User/System"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
tree.end
tree "Breakpoint 1"
if (((per.l(c14:0x0500+0x10))&0xA00000)==0x0)
group.long c14:(0x0400+0x10)++0x00
line.long 0x00 "DBGBVR1,Debug Breakpoint Value Register"
hexmask.long 0x0 2.--31. 0x4 "VA,Address Value for comparison bits (31:2)"
elif (((per.l(c14:0x0500+0x10))&0xA00000)==(0xA00000||0x200000))
group.long c14:(0x0400+0x10)++0x00
line.long 0x00 "DBGBVR1,Debug Breakpoint Value Register"
else
rgroup.long c14:(0x0400+0x10)++0x00
line.long 0x00 "DBGBVR1,Debug Breakpoint Value Register"
endif
if ((per.l(c14:0x0500+0x10)&0x2000)==0x2000)
if ((per.l(c14:0x0500+0x10)&0xC000)==(0x0000||0x4000))
group.long c14:(0x0500+0x10)++0x00
line.long 0x00 "DBGBCR1,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif ((per.l(c14:0x0500+0x10)&0xC000)==0x8000)
group.long c14:(0x0500+0x10)++0x00
line.long 0x00 "DBGBCR1,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,Reserved,User/System"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.long c14:(0x0500+0x10)++0x00
line.long 0x00 "DBGBCR1,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,?..."
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
else
group.long c14:(0x0500+0x10)++0x00
line.long 0x00 "DBGBCR1,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System,System,User,User/System"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
tree.end
tree "Breakpoint 2"
if (((per.l(c14:0x0500+0x20))&0xA00000)==0x0)
group.long c14:(0x0400+0x20)++0x00
line.long 0x00 "DBGBVR2,Debug Breakpoint Value Register"
hexmask.long 0x0 2.--31. 0x4 "VA,Address Value for comparison bits (31:2)"
elif (((per.l(c14:0x0500+0x20))&0xA00000)==(0xA00000||0x200000))
group.long c14:(0x0400+0x20)++0x00
line.long 0x00 "DBGBVR2,Debug Breakpoint Value Register"
else
rgroup.long c14:(0x0400+0x20)++0x00
line.long 0x00 "DBGBVR2,Debug Breakpoint Value Register"
endif
if ((per.l(c14:0x0500+0x20)&0x2000)==0x2000)
if ((per.l(c14:0x0500+0x20)&0xC000)==(0x0000||0x4000))
group.long c14:(0x0500+0x20)++0x00
line.long 0x00 "DBGBCR2,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif ((per.l(c14:0x0500+0x20)&0xC000)==0x8000)
group.long c14:(0x0500+0x20)++0x00
line.long 0x00 "DBGBCR2,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,Reserved,User/System"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.long c14:(0x0500+0x20)++0x00
line.long 0x00 "DBGBCR2,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,?..."
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
else
group.long c14:(0x0500+0x20)++0x00
line.long 0x00 "DBGBCR2,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System,System,User,User/System"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
tree.end
tree "Breakpoint 3"
if (((per.l(c14:0x0500+0x30))&0xA00000)==0x0)
group.long c14:(0x0400+0x30)++0x00
line.long 0x00 "DBGBVR3,Debug Breakpoint Value Register"
hexmask.long 0x0 2.--31. 0x4 "VA,Address Value for comparison bits (31:2)"
elif (((per.l(c14:0x0500+0x30))&0xA00000)==(0xA00000||0x200000))
group.long c14:(0x0400+0x30)++0x00
line.long 0x00 "DBGBVR3,Debug Breakpoint Value Register"
else
rgroup.long c14:(0x0400+0x30)++0x00
line.long 0x00 "DBGBVR3,Debug Breakpoint Value Register"
endif
if ((per.l(c14:0x0500+0x30)&0x2000)==0x2000)
if ((per.l(c14:0x0500+0x30)&0xC000)==(0x0000||0x4000))
group.long c14:(0x0500+0x30)++0x00
line.long 0x00 "DBGBCR3,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif ((per.l(c14:0x0500+0x30)&0xC000)==0x8000)
group.long c14:(0x0500+0x30)++0x00
line.long 0x00 "DBGBCR3,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,Reserved,User/System"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.long c14:(0x0500+0x30)++0x00
line.long 0x00 "DBGBCR3,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,?..."
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
else
group.long c14:(0x0500+0x30)++0x00
line.long 0x00 "DBGBCR3,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System,System,User,User/System"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
tree.end
tree "Breakpoint 4"
if (((per.l(c14:0x0500+0x40))&0xA00000)==0x0)
group.long c14:(0x0400+0x40)++0x00
line.long 0x00 "DBGBVR4,Debug Breakpoint Value Register"
hexmask.long 0x0 2.--31. 0x4 "VA,Address Value for comparison bits (31:2)"
elif (((per.l(c14:0x0500+0x40))&0xA00000)==(0xA00000||0x200000))
group.long c14:(0x0400+0x40)++0x00
line.long 0x00 "DBGBVR4,Debug Breakpoint Value Register"
else
rgroup.long c14:(0x0400+0x40)++0x00
line.long 0x00 "DBGBVR4,Debug Breakpoint Value Register"
endif
if ((per.l(c14:0x0500+0x40)&0x2000)==0x2000)
if ((per.l(c14:0x0500+0x40)&0xC000)==(0x0000||0x4000))
group.long c14:(0x0500+0x40)++0x00
line.long 0x00 "DBGBCR4,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif ((per.l(c14:0x0500+0x40)&0xC000)==0x8000)
group.long c14:(0x0500+0x40)++0x00
line.long 0x00 "DBGBCR4,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,Reserved,User/System"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.long c14:(0x0500+0x40)++0x00
line.long 0x00 "DBGBCR4,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,?..."
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
else
group.long c14:(0x0500+0x40)++0x00
line.long 0x00 "DBGBCR4,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System,System,User,User/System"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
tree.end
tree "Breakpoint 5"
if (((per.l(c14:0x0500+0x50))&0xA00000)==0x0)
group.long c14:(0x0400+0x50)++0x00
line.long 0x00 "DBGBVR5,Debug Breakpoint Value Register"
hexmask.long 0x0 2.--31. 0x4 "VA,Address Value for comparison bits (31:2)"
elif (((per.l(c14:0x0500+0x50))&0xA00000)==(0xA00000||0x200000))
group.long c14:(0x0400+0x50)++0x00
line.long 0x00 "DBGBVR5,Debug Breakpoint Value Register"
else
rgroup.long c14:(0x0400+0x50)++0x00
line.long 0x00 "DBGBVR5,Debug Breakpoint Value Register"
endif
if ((per.l(c14:0x0500+0x50)&0x2000)==0x2000)
if ((per.l(c14:0x0500+0x50)&0xC000)==(0x0000||0x4000))
group.long c14:(0x0500+0x50)++0x00
line.long 0x00 "DBGBCR5,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif ((per.l(c14:0x0500+0x50)&0xC000)==0x8000)
group.long c14:(0x0500+0x50)++0x00
line.long 0x00 "DBGBCR5,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,Reserved,User/System"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.long c14:(0x0500+0x50)++0x00
line.long 0x00 "DBGBCR5,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,?..."
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
else
group.long c14:(0x0500+0x50)++0x00
line.long 0x00 "DBGBCR5,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System,System,User,User/System"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
tree.end
tree "Breakpoint 6"
if (((per.l(c14:0x0500+0x60))&0xA00000)==0x0)
group.long c14:(0x0400+0x60)++0x00
line.long 0x00 "DBGBVR6,Debug Breakpoint Value Register"
hexmask.long 0x0 2.--31. 0x4 "VA,Address Value for comparison bits (31:2)"
elif (((per.l(c14:0x0500+0x60))&0xA00000)==(0xA00000||0x200000))
group.long c14:(0x0400+0x60)++0x00
line.long 0x00 "DBGBVR6,Debug Breakpoint Value Register"
else
rgroup.long c14:(0x0400+0x60)++0x00
line.long 0x00 "DBGBVR6,Debug Breakpoint Value Register"
endif
group.long c14:(0x0101+0x60)++0x00
line.long 0x00 "DBGBXVR6,Breakpoint Extended Value Register"
hexmask.long.byte 0x00 0.--7. 1. "VMID,VMID value for comparison"
if ((per.l(c14:0x0500+0x60)&0x2000)==0x2000)
if ((per.l(c14:0x0500+0x60)&0xC000)==(0x0000||0x4000))
group.long c14:(0x0500+0x60)++0x00
line.long 0x00 "DBGBCR6,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif ((per.l(c14:0x0500+0x60)&0xC000)==0x8000)
group.long c14:(0x0500+0x60)++0x00
line.long 0x00 "DBGBCR6,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,Reserved,User/System"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.long c14:(0x0500+0x60)++0x00
line.long 0x00 "DBGBCR6,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,?..."
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
else
group.long c14:(0x0500+0x60)++0x00
line.long 0x00 "DBGBCR6,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System,System,User,User/System"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
tree.end
tree "Breakpoint 7"
if (((per.l(c14:0x0500+0x70))&0xA00000)==0x0)
group.long c14:(0x0400+0x70)++0x00
line.long 0x00 "DBGBVR7,Debug Breakpoint Value Register"
hexmask.long 0x0 2.--31. 0x4 "VA,Address Value for comparison bits (31:2)"
elif (((per.l(c14:0x0500+0x70))&0xA00000)==(0xA00000||0x200000))
group.long c14:(0x0400+0x70)++0x00
line.long 0x00 "DBGBVR7,Debug Breakpoint Value Register"
else
rgroup.long c14:(0x0400+0x70)++0x00
line.long 0x00 "DBGBVR7,Debug Breakpoint Value Register"
endif
group.long c14:(0x0101+0x70)++0x00
line.long 0x00 "DBGBXVR7,Breakpoint Extended Value Register"
hexmask.long.byte 0x00 0.--7. 1. "VMID,VMID value for comparison"
if ((per.l(c14:0x0500+0x70)&0x2000)==0x2000)
if ((per.l(c14:0x0500+0x70)&0xC000)==(0x0000||0x4000))
group.long c14:(0x0500+0x70)++0x00
line.long 0x00 "DBGBCR7,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif ((per.l(c14:0x0500+0x70)&0xC000)==0x8000)
group.long c14:(0x0500+0x70)++0x00
line.long 0x00 "DBGBCR7,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,Reserved,User/System"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.long c14:(0x0500+0x70)++0x00
line.long 0x00 "DBGBCR7,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,?..."
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
else
group.long c14:(0x0500+0x70)++0x00
line.long 0x00 "DBGBCR7,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
newline
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System,System,User,User/System"
newline
bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
tree.end
tree.end
tree "Watchpoint Registers"
tree "Watchpoint 0"
group.long c14:(0x0600+0x0)++0x00
line.long 0x00 "DBGWVR0,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "VA,Address value"
if ((per.l(c14:0x0700+0x0)&0x2000)==0x2000)
if ((per.l(c14:(0x0700+0x0))&0xC000)==(0x0000||0x4000))
group.long c14:(0x0700+0x0)++0x00
line.long 0x00 "DBGWCR0,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
elif ((per.l(c14:0x0700+0x0)&0xC000)==0x8000)
group.long c14:(0x0700+0x0)++0x00
line.long 0x00 "DBGWCR0,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,Reserved,User/System"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
else
group.long c14:(0x0700+0x0)++0x00
line.long 0x00 "DBGWCR0,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,?..."
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
endif
else
group.long c14:(0x0700+0x0)++0x00
line.long 0x00 "DBGWCR0,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
endif
tree.end
tree "Watchpoint 1"
group.long c14:(0x0600+0x10)++0x00
line.long 0x00 "DBGWVR1,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "VA,Address value"
if ((per.l(c14:0x0700+0x10)&0x2000)==0x2000)
if ((per.l(c14:(0x0700+0x10))&0xC000)==(0x0000||0x4000))
group.long c14:(0x0700+0x10)++0x00
line.long 0x00 "DBGWCR1,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
elif ((per.l(c14:0x0700+0x10)&0xC000)==0x8000)
group.long c14:(0x0700+0x10)++0x00
line.long 0x00 "DBGWCR1,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,Reserved,User/System"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
else
group.long c14:(0x0700+0x10)++0x00
line.long 0x00 "DBGWCR1,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,?..."
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
endif
else
group.long c14:(0x0700+0x10)++0x00
line.long 0x00 "DBGWCR1,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
endif
tree.end
tree "Watchpoint 2"
group.long c14:(0x0600+0x20)++0x00
line.long 0x00 "DBGWVR2,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "VA,Address value"
if ((per.l(c14:0x0700+0x20)&0x2000)==0x2000)
if ((per.l(c14:(0x0700+0x20))&0xC000)==(0x0000||0x4000))
group.long c14:(0x0700+0x20)++0x00
line.long 0x00 "DBGWCR2,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
elif ((per.l(c14:0x0700+0x20)&0xC000)==0x8000)
group.long c14:(0x0700+0x20)++0x00
line.long 0x00 "DBGWCR2,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,Reserved,User/System"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
else
group.long c14:(0x0700+0x20)++0x00
line.long 0x00 "DBGWCR2,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,?..."
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
endif
else
group.long c14:(0x0700+0x20)++0x00
line.long 0x00 "DBGWCR2,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
endif
tree.end
tree "Watchpoint 3"
group.long c14:(0x0600+0x30)++0x00
line.long 0x00 "DBGWVR3,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "VA,Address value"
if ((per.l(c14:0x0700+0x30)&0x2000)==0x2000)
if ((per.l(c14:(0x0700+0x30))&0xC000)==(0x0000||0x4000))
group.long c14:(0x0700+0x30)++0x00
line.long 0x00 "DBGWCR3,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
elif ((per.l(c14:0x0700+0x30)&0xC000)==0x8000)
group.long c14:(0x0700+0x30)++0x00
line.long 0x00 "DBGWCR3,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,Reserved,User/System"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
else
group.long c14:(0x0700+0x30)++0x00
line.long 0x00 "DBGWCR3,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,?..."
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
endif
else
group.long c14:(0x0700+0x30)++0x00
line.long 0x00 "DBGWCR3,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
endif
tree.end
tree "Watchpoint 4"
group.long c14:(0x0600+0x40)++0x00
line.long 0x00 "DBGWVR4,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "VA,Address value"
if ((per.l(c14:0x0700+0x40)&0x2000)==0x2000)
if ((per.l(c14:(0x0700+0x40))&0xC000)==(0x0000||0x4000))
group.long c14:(0x0700+0x40)++0x00
line.long 0x00 "DBGWCR4,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
elif ((per.l(c14:0x0700+0x40)&0xC000)==0x8000)
group.long c14:(0x0700+0x40)++0x00
line.long 0x00 "DBGWCR4,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,Reserved,User/System"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
else
group.long c14:(0x0700+0x40)++0x00
line.long 0x00 "DBGWCR4,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,?..."
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
endif
else
group.long c14:(0x0700+0x40)++0x00
line.long 0x00 "DBGWCR4,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
endif
tree.end
tree "Watchpoint 5"
group.long c14:(0x0600+0x50)++0x00
line.long 0x00 "DBGWVR5,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "VA,Address value"
if ((per.l(c14:0x0700+0x50)&0x2000)==0x2000)
if ((per.l(c14:(0x0700+0x50))&0xC000)==(0x0000||0x4000))
group.long c14:(0x0700+0x50)++0x00
line.long 0x00 "DBGWCR5,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
elif ((per.l(c14:0x0700+0x50)&0xC000)==0x8000)
group.long c14:(0x0700+0x50)++0x00
line.long 0x00 "DBGWCR5,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,Reserved,User/System"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
else
group.long c14:(0x0700+0x50)++0x00
line.long 0x00 "DBGWCR5,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,?..."
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
endif
else
group.long c14:(0x0700+0x50)++0x00
line.long 0x00 "DBGWCR5,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
endif
tree.end
tree "Watchpoint 6"
group.long c14:(0x0600+0x60)++0x00
line.long 0x00 "DBGWVR6,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "VA,Address value"
if ((per.l(c14:0x0700+0x60)&0x2000)==0x2000)
if ((per.l(c14:(0x0700+0x60))&0xC000)==(0x0000||0x4000))
group.long c14:(0x0700+0x60)++0x00
line.long 0x00 "DBGWCR6,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
elif ((per.l(c14:0x0700+0x60)&0xC000)==0x8000)
group.long c14:(0x0700+0x60)++0x00
line.long 0x00 "DBGWCR6,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,Reserved,User/System"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
else
group.long c14:(0x0700+0x60)++0x00
line.long 0x00 "DBGWCR6,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,?..."
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
endif
else
group.long c14:(0x0700+0x60)++0x00
line.long 0x00 "DBGWCR6,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
endif
tree.end
tree "Watchpoint 7"
group.long c14:(0x0600+0x70)++0x00
line.long 0x00 "DBGWVR7,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "VA,Address value"
if ((per.l(c14:0x0700+0x70)&0x2000)==0x2000)
if ((per.l(c14:(0x0700+0x70))&0xC000)==(0x0000||0x4000))
group.long c14:(0x0700+0x70)++0x00
line.long 0x00 "DBGWCR7,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
elif ((per.l(c14:0x0700+0x70)&0xC000)==0x8000)
group.long c14:(0x0700+0x70)++0x00
line.long 0x00 "DBGWCR7,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,Reserved,User/System"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
else
group.long c14:(0x0700+0x70)++0x00
line.long 0x00 "DBGWCR7,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure"
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,?..."
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
endif
else
group.long c14:(0x0700+0x70)++0x00
line.long 0x00 "DBGWCR7,Watchpoint Control Register"
bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled"
hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select"
newline
bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both"
bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System"
bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled"
endif
tree.end
tree.end
AUTOINDENT.OFF
AUTOINDENT.POP
tree.open "Interrupt Controller (GIC-600)"
AUTOINDENT.PUSH
AUTOINDENT.OFF
base COMP.BASE("GICD",-1.)
width 17.
tree "Distributor Interface"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)))
group.long 0x0000++0x03
line.long 0x00 "GICD_CTLR,Distributor Control Register (Secure access)"
rbitfld.long 0x00 31. " RWP          ,Register Write Pending. Indicates whether a register write is in progress or not" "Not pending,Pending"
bitfld.long 0x00 7. "    E1NWF      ,Enable 1 of N Wakeup Functionality" "Disabled,Enabled"
bitfld.long 0x00 6. "       DS            ,Disable Security" "No,Yes"
textline "                          "
bitfld.long 0x00 5. " ARE_NS       ,Affinity Routing Enable" "Disabled,Enabled"
bitfld.long 0x00 4. "       ARE_S      ,Affinity Routing Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "       ENABLEGRP1S   ,Enable Secure Group 1 interrupts" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 1. " ENABLEGRP1NS ,Enable Secure Group 1 interrupts" "Disabled,Enabled"
bitfld.long 0x00 0. "       ENABLEGRP0 ,Enable Group 0 interrupts" "Disabled,Enabled"
elif (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)
group.long 0x0000++0x03
line.long 0x00 "GICD_CTLR,Distributor Control Register (Non-secure access)"
rbitfld.long 0x00 31. " RWP          ,Register Write Pending. Indicates whether a register write is in progress or not" "Not pending,Pending"
bitfld.long 0x00 7. "    E1NWF      ,Enable 1 of N Wakeup Functionality" "Disabled,Enabled"
bitfld.long 0x00 4. "       ARE_NS        ,Affinity Routing Enable" "Reserved,Enabled"
textline "                          "
bitfld.long 0x00 1. " ENABLEGRP1A  ,Enable Group 1 interrupts" "Disabled,Enabled"
bitfld.long 0x00 0. "       ENABLEGRP1 ,Enable Group 1 interrupts" "Disabled,Enabled"
else
group.long 0x0000++0x03
line.long 0x00 "GICD_CTLR,Distributor Control Register"
rbitfld.long 0x00 31. " RWP          ,Register Write Pending. Indicates whether a register write is in progress or not" "Not pending,Pending"
bitfld.long 0x00 7. "    E1NWF      ,Enable 1 of N Wakeup Functionality" "Disabled,Enabled"
rbitfld.long 0x00 6. "       DS            ,Disable Security" "Reserved,Yes"
textline "                          "
bitfld.long 0x00 4. " ARE          ,Affinity Routing Enable" "Reserved,Enabled"
bitfld.long 0x00 1. "       ENABLEGRP1 ,Enable Group 1 interrupts" "Disabled,Enabled"
bitfld.long 0x00 0. "       ENABLEGRP0    ,Enable Group 0 interrupts" "Disabled,Enabled"
endif
rgroup.long 0x0004++0x03
line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register"
bitfld.long 0x00 25. " NO1N          ,Indicates whether 1 of N SPI interrupts are supported" "Supported,Not supported"
bitfld.long 0x00 24. "    A3V        ,Indicates whether the Distributor supports nonzero values of Affinity level 3" "Not supported,Supported"
bitfld.long 0x00 19.--23. "  IDBITS     ,The number of interrupt identifier bits supported" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
textline "                          "
bitfld.long 0x00 18. " DVIS          ,Direct virtual LPI injection support" "Not supported,Supported"
bitfld.long 0x00 17. "    LPIS       ,Indicates whether the implementation supports LPIs" "Not supported,Supported"
bitfld.long 0x00 16. "  MBIS       ,Indicates whether the implementation supports message-based interrupts by writing to Distributor registers" "Not supported,Supported"
textline "                          "
bitfld.long 0x00 10. " SECURITYEXTN  ,Indicates whether interrupt controller implements the security extensions" "Not implemented,Implemented"
bitfld.long 0x00 5.--7. "  CPUNUMBER  ,Reports the number of PEs that can be used when affinity routing is not enabled" "1,2,3,4,5,6,7,8"
bitfld.long 0x00 0.--4. "              ITLN       ,Indicates the maximum SPI INTID that the GIC implementation supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Reserved"
rgroup.long 0x0008++0x03
line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register"
bitfld.long 0x00 24.--31. " PRODID        ,Indicates the product ID" "GIC-500,?,GIC-600,?..."
bitfld.long 0x00 16.--19. "          VAR        ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                          "
bitfld.long 0x00 12.--15. " REV           ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "               IMP        ,Implementer"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0020))
group.long 0x0020++0x03
line.long 0x00 "GICD_FCTLR,Function Control Register"
bitfld.long 0x00 21. " DCC           ,Disable Cache Conversion (DCC)" "Disable,Enable"
bitfld.long 0x00 18. "          SLPIA      ,Strict LPI Allocation (SLPIA).Controls whether LPI reverts to a fixed index behavior. This bit can only be written when in full sleep (quiescent)." "Not Strict,Strict"
bitfld.long 0x00 16.--17. "     NSACR      , Non-secure Access Control. This is the value that is used ifa SPI has an error." "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                          "
hexmask.long.word 0x00 4.--13. 1. " CGO           ,One bit per clock gate: 1 = Leave clock running. 0 = Use full clock gating."
bitfld.long 0x00 0. "             SIP        ,Scrub in progress. This bit is read and written by software. When a scrub is complete, the GIC clears the bit to 0." "Completed,In Progress"
else
group.long 0x0020++0x03
line.long 0x00 "GICD_FCTLR,Function Control Register"
bitfld.long 0x00 21. " DCC           ,Disable Cache Conversion (DCC)" "Disable,Enable"
bitfld.long 0x00 18. "          SLPIA      ,Strict LPI Allocation (SLPIA).Controls whether LPI reverts to a fixed index behavior. This bit can only be written when in full sleep (quiescent)." "Not Strict,Strict"
textline "                          "
hexmask.long.word 0x00 4.--13. 1. " CGO           ,One bit per clock gate: 1 = Leave clock running. 0 = Use full clock gating."
bitfld.long 0x00 0. "             SIP        ,Scrub in progress. This bit is read and written by software. When a scrub is complete, the GIC clears the bit to 0." "Completed,In Progress"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0024)))
group.long 0xE08++0x03
line.long 0x00 "GICD_SAC,Secure Access Control Register"
bitfld.long 0x00 2. " GICPNS        ,Allow Non-secure access to the GICP registers. This enables Non-secure access to Secure PMU data." "Not Allowed,Allowed"
bitfld.long 0x00 1. "      GICTNS     ,Allow Non-secure access to the GICT registers. This enables Non-secure access to Secure trace data." "Not Allowed,Allowed"
bitfld.long 0x00 0. "    DSL        ,Disable Security Lock. WriteOnce (WO) bit to lock GICD_CTLR.DS to be WO at its current value." "0,1"
else
hgroup.long 0xE08++0x03
hide.long 0x00 "GICD_SAC,Secure Access Control Register"
endif
wgroup.long 0x40++0x03
line.long 0x00 "GICD_SETSPI_NSR,Non-secure SPI Set Register"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
wgroup.long 0x48++0x03
line.long 0x00 "GICD_CLRSPI_NSR,Non-secure SPI Clear Register"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x50))
wgroup.long 0x50++0x03
line.long 0x00 "GICD_SETSPI_SR,Secure SPI Set Register (Secure access)"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
else
hgroup.long 0x50++0x03
hide.long 0x00 "GICD_SETSPI_SR,Secure SPI Set Register (Non-secure access)"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x58))
wgroup.long 0x58++0x03
line.long 0x00 "GICD_CLRSPI_SR,Secure SPI Clear Register (Secure access)"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
else
hgroup.long 0x58++0x03
hide.long 0x00 "GICD_CLRSPI_SR,Secure SPI Clear Register (Non-secure access)"
endif
tree "Message Based Alias Registers"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x10000)==0x10000)
wgroup.long 0x40++0x03
line.long 0x00 "GICA_SETSPI_NSR,Non-secure SPI Set Register"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
wgroup.long 0x48++0x03
line.long 0x00 "GICA_CLRSPI_NSR,Non-secure SPI Clear Register"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x50))
wgroup.long 0x50++0x03
line.long 0x00 "GICA_SETSPI_SR,Secure SPI Set Register (Secure access)"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
else
hgroup.long 0x50++0x03
hide.long 0x00 "GICA_SETSPI_SR,Secure SPI Set Register (Non-secure access)"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x58))
wgroup.long 0x58++0x03
line.long 0x00 "GICA_CLRSPI_SR,Secure SPI Clear Register (Secure access)"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
else
hgroup.long 0x58++0x03
hide.long 0x00 "GICA_CLRSPI_SR,Secure SPI Clear Register (Non-secure access)"
endif
else
hgroup.long 0x40++0x03
hide.long 0x00 "GICA_SETSPI_NSR,Non-secure SPI Set Register"
hgroup.long 0x48++0x03
hide.long 0x00 "GICA_CLRSPI_NSR,Non-secure SPI Clear Register"
hgroup.long 0x50++0x03
hide.long 0x00 "GICA_SETSPI_SR,Secure SPI Set Register"
hgroup.long 0x58++0x03
hide.long 0x00 "GICA_CLRSPI_SR,Secure SPI Clear Register"
endif
tree.end
width 17.
tree "Group Registers"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0080))
group.long 0x0080++0x03
line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Secure Access)"
bitfld.long 0x00 31. " GSB31  ,Group Status Bit 31" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB30  ,Group Status Bit 30" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB29  ,Group Status Bit 29" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB28  ,Group Status Bit 28" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB27  ,Group Status Bit 27" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB26  ,Group Status Bit 26" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB25  ,Group Status Bit 25" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB24  ,Group Status Bit 24" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB23  ,Group Status Bit 23" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB22  ,Group Status Bit 22" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB21  ,Group Status Bit 21" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB20  ,Group Status Bit 20" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB19  ,Group Status Bit 19" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB18  ,Group Status Bit 18" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB17  ,Group Status Bit 17" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB16  ,Group Status Bit 16" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB15  ,Group Status Bit 15" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB14  ,Group Status Bit 14" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB13  ,Group Status Bit 13" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB12  ,Group Status Bit 12" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB11  ,Group Status Bit 11" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB10  ,Group Status Bit 10" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB9   ,Group Status Bit 9" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB8   ,Group Status Bit 8" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB7   ,Group Status Bit 7" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB6   ,Group Status Bit 6" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB5   ,Group Status Bit 5" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB4   ,Group Status Bit 4" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB3   ,Group Status Bit 3" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB2   ,Group Status Bit 2" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB1   ,Group Status Bit 1" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB0   ,Group Status Bit 0" "Secure,Non-secure Group 1"
elif (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)
group.long 0x0080++0x03
line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0"
bitfld.long 0x00 31. " GSB31  ,Group Status Bit 31" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB30  ,Group Status Bit 30" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB29  ,Group Status Bit 29" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB28  ,Group Status Bit 28" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB27  ,Group Status Bit 27" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB26  ,Group Status Bit 26" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB25  ,Group Status Bit 25" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB24  ,Group Status Bit 24" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB23  ,Group Status Bit 23" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB22  ,Group Status Bit 22" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB21  ,Group Status Bit 21" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB20  ,Group Status Bit 20" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB19  ,Group Status Bit 19" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB18  ,Group Status Bit 18" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB17  ,Group Status Bit 17" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB16  ,Group Status Bit 16" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB15  ,Group Status Bit 15" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB14  ,Group Status Bit 14" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB13  ,Group Status Bit 13" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB12  ,Group Status Bit 12" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB11  ,Group Status Bit 11" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB10  ,Group Status Bit 10" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB9   ,Group Status Bit 9" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB8   ,Group Status Bit 8" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB7   ,Group Status Bit 7" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB6   ,Group Status Bit 6" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB5   ,Group Status Bit 5" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB4   ,Group Status Bit 4" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB3   ,Group Status Bit 3" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB2   ,Group Status Bit 2" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB1   ,Group Status Bit 1" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB0   ,Group Status Bit 0" "Group 0,Group 1"
else
hgroup.long 0x0080++0x03
hide.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Non-secure access)"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x84))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1))
group.long 0x0084++0x03
line.long 0x0 "GICD_IGROUPR1 ,Interrupt Group Register 1 (Secure Access)"
bitfld.long 0x00 31. " GSB63  ,Group Status Bit 63" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB62  ,Group Status Bit 62" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB61  ,Group Status Bit 61" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB60  ,Group Status Bit 60" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB59  ,Group Status Bit 59" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB58  ,Group Status Bit 58" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB57  ,Group Status Bit 57" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB56  ,Group Status Bit 56" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB55  ,Group Status Bit 55" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB54  ,Group Status Bit 54" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB53  ,Group Status Bit 53" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB52  ,Group Status Bit 52" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB51  ,Group Status Bit 51" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB50  ,Group Status Bit 50" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB49  ,Group Status Bit 49" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB48  ,Group Status Bit 48" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB47  ,Group Status Bit 47" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB46  ,Group Status Bit 46" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB45  ,Group Status Bit 45" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB44  ,Group Status Bit 44" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB43  ,Group Status Bit 43" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB42  ,Group Status Bit 42" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB41  ,Group Status Bit 41" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB40  ,Group Status Bit 40" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB39  ,Group Status Bit 39" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB38  ,Group Status Bit 38" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB37  ,Group Status Bit 37" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB36  ,Group Status Bit 36" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB35  ,Group Status Bit 35" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB34  ,Group Status Bit 34" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB33  ,Group Status Bit 33" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB32  ,Group Status Bit 32" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1))
group.long 0x0084++0x03
line.long 0x0 "GICD_IGROUPR1 ,Interrupt Group Register 1 "
bitfld.long 0x00 31. " GSB63  ,Group Status Bit 63" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB62  ,Group Status Bit 62" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB61  ,Group Status Bit 61" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB60  ,Group Status Bit 60" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB59  ,Group Status Bit 59" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB58  ,Group Status Bit 58" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB57  ,Group Status Bit 57" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB56  ,Group Status Bit 56" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB55  ,Group Status Bit 55" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB54  ,Group Status Bit 54" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB53  ,Group Status Bit 53" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB52  ,Group Status Bit 52" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB51  ,Group Status Bit 51" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB50  ,Group Status Bit 50" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB49  ,Group Status Bit 49" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB48  ,Group Status Bit 48" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB47  ,Group Status Bit 47" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB46  ,Group Status Bit 46" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB45  ,Group Status Bit 45" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB44  ,Group Status Bit 44" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB43  ,Group Status Bit 43" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB42  ,Group Status Bit 42" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB41  ,Group Status Bit 41" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB40  ,Group Status Bit 40" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB39  ,Group Status Bit 39" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB38  ,Group Status Bit 38" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB37  ,Group Status Bit 37" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB36  ,Group Status Bit 36" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB35  ,Group Status Bit 35" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB34  ,Group Status Bit 34" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB33  ,Group Status Bit 33" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB32  ,Group Status Bit 32" "Group 0,Group 1"
else
hgroup.long 0x0084++0x03
hide.long 0x0 "GICD_IGROUPR1 ,Interrupt Group Register 1 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x88))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x2))
group.long 0x0088++0x03
line.long 0x0 "GICD_IGROUPR2 ,Interrupt Group Register 2 (Secure Access)"
bitfld.long 0x00 31. " GSB95  ,Group Status Bit 95" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB94  ,Group Status Bit 94" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB93  ,Group Status Bit 93" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB92  ,Group Status Bit 92" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB91  ,Group Status Bit 91" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB90  ,Group Status Bit 90" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB89  ,Group Status Bit 89" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB88  ,Group Status Bit 88" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB87  ,Group Status Bit 87" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB86  ,Group Status Bit 86" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB85  ,Group Status Bit 85" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB84  ,Group Status Bit 84" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB83  ,Group Status Bit 83" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB82  ,Group Status Bit 82" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB81  ,Group Status Bit 81" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB80  ,Group Status Bit 80" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB79  ,Group Status Bit 79" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB78  ,Group Status Bit 78" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB77  ,Group Status Bit 77" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB76  ,Group Status Bit 76" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB75  ,Group Status Bit 75" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB74  ,Group Status Bit 74" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB73  ,Group Status Bit 73" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB72  ,Group Status Bit 72" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB71  ,Group Status Bit 71" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB70  ,Group Status Bit 70" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB69  ,Group Status Bit 69" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB68  ,Group Status Bit 68" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB67  ,Group Status Bit 67" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB66  ,Group Status Bit 66" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB65  ,Group Status Bit 65" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB64  ,Group Status Bit 64" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x2))
group.long 0x0088++0x03
line.long 0x0 "GICD_IGROUPR2 ,Interrupt Group Register 2 "
bitfld.long 0x00 31. " GSB95  ,Group Status Bit 95" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB94  ,Group Status Bit 94" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB93  ,Group Status Bit 93" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB92  ,Group Status Bit 92" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB91  ,Group Status Bit 91" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB90  ,Group Status Bit 90" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB89  ,Group Status Bit 89" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB88  ,Group Status Bit 88" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB87  ,Group Status Bit 87" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB86  ,Group Status Bit 86" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB85  ,Group Status Bit 85" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB84  ,Group Status Bit 84" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB83  ,Group Status Bit 83" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB82  ,Group Status Bit 82" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB81  ,Group Status Bit 81" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB80  ,Group Status Bit 80" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB79  ,Group Status Bit 79" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB78  ,Group Status Bit 78" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB77  ,Group Status Bit 77" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB76  ,Group Status Bit 76" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB75  ,Group Status Bit 75" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB74  ,Group Status Bit 74" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB73  ,Group Status Bit 73" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB72  ,Group Status Bit 72" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB71  ,Group Status Bit 71" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB70  ,Group Status Bit 70" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB69  ,Group Status Bit 69" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB68  ,Group Status Bit 68" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB67  ,Group Status Bit 67" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB66  ,Group Status Bit 66" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB65  ,Group Status Bit 65" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB64  ,Group Status Bit 64" "Group 0,Group 1"
else
hgroup.long 0x0088++0x03
hide.long 0x0 "GICD_IGROUPR2 ,Interrupt Group Register 2 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x8C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x3))
group.long 0x008C++0x03
line.long 0x0 "GICD_IGROUPR3 ,Interrupt Group Register 3 (Secure Access)"
bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB126 ,Group Status Bit 126" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB125 ,Group Status Bit 125" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB123 ,Group Status Bit 123" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB122 ,Group Status Bit 122" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB120 ,Group Status Bit 120" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB119 ,Group Status Bit 119" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB117 ,Group Status Bit 117" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB116 ,Group Status Bit 116" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB114 ,Group Status Bit 114" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB113 ,Group Status Bit 113" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB111 ,Group Status Bit 111" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB110 ,Group Status Bit 110" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB108 ,Group Status Bit 108" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB107 ,Group Status Bit 107" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB105 ,Group Status Bit 105" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB104 ,Group Status Bit 104" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB102 ,Group Status Bit 102" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB101 ,Group Status Bit 101" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB99  ,Group Status Bit 99" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB98  ,Group Status Bit 98" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB97  ,Group Status Bit 97" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB96  ,Group Status Bit 96" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x3))
group.long 0x008C++0x03
line.long 0x0 "GICD_IGROUPR3 ,Interrupt Group Register 3 "
bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB126 ,Group Status Bit 126" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB125 ,Group Status Bit 125" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB123 ,Group Status Bit 123" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB122 ,Group Status Bit 122" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB120 ,Group Status Bit 120" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB119 ,Group Status Bit 119" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB117 ,Group Status Bit 117" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB116 ,Group Status Bit 116" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB114 ,Group Status Bit 114" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB113 ,Group Status Bit 113" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB111 ,Group Status Bit 111" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB110 ,Group Status Bit 110" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB108 ,Group Status Bit 108" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB107 ,Group Status Bit 107" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB105 ,Group Status Bit 105" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB104 ,Group Status Bit 104" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB102 ,Group Status Bit 102" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB101 ,Group Status Bit 101" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB99  ,Group Status Bit 99" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB98  ,Group Status Bit 98" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB97  ,Group Status Bit 97" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB96  ,Group Status Bit 96" "Group 0,Group 1"
else
hgroup.long 0x008C++0x03
hide.long 0x0 "GICD_IGROUPR3 ,Interrupt Group Register 3 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x90))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x4))
group.long 0x0090++0x03
line.long 0x0 "GICD_IGROUPR4 ,Interrupt Group Register 4 (Secure Access)"
bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB158 ,Group Status Bit 158" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB157 ,Group Status Bit 157" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB155 ,Group Status Bit 155" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB154 ,Group Status Bit 154" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB152 ,Group Status Bit 152" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB151 ,Group Status Bit 151" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB149 ,Group Status Bit 149" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB148 ,Group Status Bit 148" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB146 ,Group Status Bit 146" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB145 ,Group Status Bit 145" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB143 ,Group Status Bit 143" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB142 ,Group Status Bit 142" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB140 ,Group Status Bit 140" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB139 ,Group Status Bit 139" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB137 ,Group Status Bit 137" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB136 ,Group Status Bit 136" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB134 ,Group Status Bit 134" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB133 ,Group Status Bit 133" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB131 ,Group Status Bit 131" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB130 ,Group Status Bit 130" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB128 ,Group Status Bit 128" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x4))
group.long 0x0090++0x03
line.long 0x0 "GICD_IGROUPR4 ,Interrupt Group Register 4 "
bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB158 ,Group Status Bit 158" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB157 ,Group Status Bit 157" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB155 ,Group Status Bit 155" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB154 ,Group Status Bit 154" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB152 ,Group Status Bit 152" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB151 ,Group Status Bit 151" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB149 ,Group Status Bit 149" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB148 ,Group Status Bit 148" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB146 ,Group Status Bit 146" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB145 ,Group Status Bit 145" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB143 ,Group Status Bit 143" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB142 ,Group Status Bit 142" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB140 ,Group Status Bit 140" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB139 ,Group Status Bit 139" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB137 ,Group Status Bit 137" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB136 ,Group Status Bit 136" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB134 ,Group Status Bit 134" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB133 ,Group Status Bit 133" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB131 ,Group Status Bit 131" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB130 ,Group Status Bit 130" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB128 ,Group Status Bit 128" "Group 0,Group 1"
else
hgroup.long 0x0090++0x03
hide.long 0x0 "GICD_IGROUPR4 ,Interrupt Group Register 4 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x94))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x5))
group.long 0x0094++0x03
line.long 0x0 "GICD_IGROUPR5 ,Interrupt Group Register 5 (Secure Access)"
bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB190 ,Group Status Bit 190" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB189 ,Group Status Bit 189" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB187 ,Group Status Bit 187" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB186 ,Group Status Bit 186" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB184 ,Group Status Bit 184" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB183 ,Group Status Bit 183" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB181 ,Group Status Bit 181" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB180 ,Group Status Bit 180" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB178 ,Group Status Bit 178" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB177 ,Group Status Bit 177" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB175 ,Group Status Bit 175" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB174 ,Group Status Bit 174" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB172 ,Group Status Bit 172" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB171 ,Group Status Bit 171" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB169 ,Group Status Bit 169" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB168 ,Group Status Bit 168" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB166 ,Group Status Bit 166" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB165 ,Group Status Bit 165" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB163 ,Group Status Bit 163" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB162 ,Group Status Bit 162" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB160 ,Group Status Bit 160" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x5))
group.long 0x0094++0x03
line.long 0x0 "GICD_IGROUPR5 ,Interrupt Group Register 5 "
bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB190 ,Group Status Bit 190" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB189 ,Group Status Bit 189" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB187 ,Group Status Bit 187" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB186 ,Group Status Bit 186" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB184 ,Group Status Bit 184" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB183 ,Group Status Bit 183" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB181 ,Group Status Bit 181" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB180 ,Group Status Bit 180" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB178 ,Group Status Bit 178" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB177 ,Group Status Bit 177" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB175 ,Group Status Bit 175" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB174 ,Group Status Bit 174" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB172 ,Group Status Bit 172" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB171 ,Group Status Bit 171" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB169 ,Group Status Bit 169" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB168 ,Group Status Bit 168" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB166 ,Group Status Bit 166" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB165 ,Group Status Bit 165" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB163 ,Group Status Bit 163" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB162 ,Group Status Bit 162" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB160 ,Group Status Bit 160" "Group 0,Group 1"
else
hgroup.long 0x0094++0x03
hide.long 0x0 "GICD_IGROUPR5 ,Interrupt Group Register 5 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x98))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x6))
group.long 0x0098++0x03
line.long 0x0 "GICD_IGROUPR6 ,Interrupt Group Register 6 (Secure Access)"
bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB222 ,Group Status Bit 222" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB221 ,Group Status Bit 221" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB219 ,Group Status Bit 219" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB218 ,Group Status Bit 218" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB216 ,Group Status Bit 216" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB215 ,Group Status Bit 215" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB213 ,Group Status Bit 213" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB212 ,Group Status Bit 212" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB210 ,Group Status Bit 210" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB209 ,Group Status Bit 209" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB207 ,Group Status Bit 207" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB206 ,Group Status Bit 206" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB204 ,Group Status Bit 204" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB203 ,Group Status Bit 203" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB201 ,Group Status Bit 201" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB200 ,Group Status Bit 200" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB198 ,Group Status Bit 198" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB197 ,Group Status Bit 197" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB195 ,Group Status Bit 195" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB194 ,Group Status Bit 194" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB192 ,Group Status Bit 192" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x6))
group.long 0x0098++0x03
line.long 0x0 "GICD_IGROUPR6 ,Interrupt Group Register 6 "
bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB222 ,Group Status Bit 222" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB221 ,Group Status Bit 221" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB219 ,Group Status Bit 219" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB218 ,Group Status Bit 218" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB216 ,Group Status Bit 216" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB215 ,Group Status Bit 215" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB213 ,Group Status Bit 213" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB212 ,Group Status Bit 212" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB210 ,Group Status Bit 210" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB209 ,Group Status Bit 209" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB207 ,Group Status Bit 207" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB206 ,Group Status Bit 206" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB204 ,Group Status Bit 204" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB203 ,Group Status Bit 203" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB201 ,Group Status Bit 201" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB200 ,Group Status Bit 200" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB198 ,Group Status Bit 198" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB197 ,Group Status Bit 197" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB195 ,Group Status Bit 195" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB194 ,Group Status Bit 194" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB192 ,Group Status Bit 192" "Group 0,Group 1"
else
hgroup.long 0x0098++0x03
hide.long 0x0 "GICD_IGROUPR6 ,Interrupt Group Register 6 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x9C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x7))
group.long 0x009C++0x03
line.long 0x0 "GICD_IGROUPR7 ,Interrupt Group Register 7 (Secure Access)"
bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB254 ,Group Status Bit 254" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB253 ,Group Status Bit 253" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB251 ,Group Status Bit 251" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB250 ,Group Status Bit 250" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB248 ,Group Status Bit 248" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB247 ,Group Status Bit 247" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB245 ,Group Status Bit 245" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB244 ,Group Status Bit 244" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB242 ,Group Status Bit 242" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB241 ,Group Status Bit 241" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB239 ,Group Status Bit 239" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB238 ,Group Status Bit 238" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB236 ,Group Status Bit 236" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB235 ,Group Status Bit 235" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB233 ,Group Status Bit 233" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB232 ,Group Status Bit 232" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB230 ,Group Status Bit 230" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB229 ,Group Status Bit 229" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB227 ,Group Status Bit 227" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB226 ,Group Status Bit 226" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB224 ,Group Status Bit 224" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x7))
group.long 0x009C++0x03
line.long 0x0 "GICD_IGROUPR7 ,Interrupt Group Register 7 "
bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB254 ,Group Status Bit 254" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB253 ,Group Status Bit 253" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB251 ,Group Status Bit 251" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB250 ,Group Status Bit 250" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB248 ,Group Status Bit 248" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB247 ,Group Status Bit 247" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB245 ,Group Status Bit 245" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB244 ,Group Status Bit 244" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB242 ,Group Status Bit 242" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB241 ,Group Status Bit 241" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB239 ,Group Status Bit 239" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB238 ,Group Status Bit 238" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB236 ,Group Status Bit 236" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB235 ,Group Status Bit 235" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB233 ,Group Status Bit 233" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB232 ,Group Status Bit 232" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB230 ,Group Status Bit 230" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB229 ,Group Status Bit 229" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB227 ,Group Status Bit 227" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB226 ,Group Status Bit 226" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB224 ,Group Status Bit 224" "Group 0,Group 1"
else
hgroup.long 0x009C++0x03
hide.long 0x0 "GICD_IGROUPR7 ,Interrupt Group Register 7 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xA0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x8))
group.long 0x00A0++0x03
line.long 0x0 "GICD_IGROUPR8 ,Interrupt Group Register 8 (Secure Access)"
bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB286 ,Group Status Bit 286" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB285 ,Group Status Bit 285" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB283 ,Group Status Bit 283" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB282 ,Group Status Bit 282" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB280 ,Group Status Bit 280" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB279 ,Group Status Bit 279" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB277 ,Group Status Bit 277" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB276 ,Group Status Bit 276" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB274 ,Group Status Bit 274" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB273 ,Group Status Bit 273" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB271 ,Group Status Bit 271" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB270 ,Group Status Bit 270" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB268 ,Group Status Bit 268" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB267 ,Group Status Bit 267" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB265 ,Group Status Bit 265" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB264 ,Group Status Bit 264" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB262 ,Group Status Bit 262" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB261 ,Group Status Bit 261" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB259 ,Group Status Bit 259" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB258 ,Group Status Bit 258" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB256 ,Group Status Bit 256" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x8))
group.long 0x00A0++0x03
line.long 0x0 "GICD_IGROUPR8 ,Interrupt Group Register 8 "
bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB286 ,Group Status Bit 286" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB285 ,Group Status Bit 285" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB283 ,Group Status Bit 283" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB282 ,Group Status Bit 282" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB280 ,Group Status Bit 280" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB279 ,Group Status Bit 279" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB277 ,Group Status Bit 277" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB276 ,Group Status Bit 276" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB274 ,Group Status Bit 274" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB273 ,Group Status Bit 273" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB271 ,Group Status Bit 271" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB270 ,Group Status Bit 270" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB268 ,Group Status Bit 268" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB267 ,Group Status Bit 267" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB265 ,Group Status Bit 265" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB264 ,Group Status Bit 264" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB262 ,Group Status Bit 262" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB261 ,Group Status Bit 261" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB259 ,Group Status Bit 259" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB258 ,Group Status Bit 258" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB256 ,Group Status Bit 256" "Group 0,Group 1"
else
hgroup.long 0x00A0++0x03
hide.long 0x0 "GICD_IGROUPR8 ,Interrupt Group Register 8 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xA4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x9))
group.long 0x00A4++0x03
line.long 0x0 "GICD_IGROUPR9 ,Interrupt Group Register 9 (Secure Access)"
bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB318 ,Group Status Bit 318" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB317 ,Group Status Bit 317" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB315 ,Group Status Bit 315" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB314 ,Group Status Bit 314" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB312 ,Group Status Bit 312" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB311 ,Group Status Bit 311" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB309 ,Group Status Bit 309" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB308 ,Group Status Bit 308" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB306 ,Group Status Bit 306" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB305 ,Group Status Bit 305" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB303 ,Group Status Bit 303" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB302 ,Group Status Bit 302" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB300 ,Group Status Bit 300" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB299 ,Group Status Bit 299" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB297 ,Group Status Bit 297" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB296 ,Group Status Bit 296" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB294 ,Group Status Bit 294" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB293 ,Group Status Bit 293" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB291 ,Group Status Bit 291" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB290 ,Group Status Bit 290" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB288 ,Group Status Bit 288" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x9))
group.long 0x00A4++0x03
line.long 0x0 "GICD_IGROUPR9 ,Interrupt Group Register 9 "
bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB318 ,Group Status Bit 318" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB317 ,Group Status Bit 317" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB315 ,Group Status Bit 315" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB314 ,Group Status Bit 314" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB312 ,Group Status Bit 312" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB311 ,Group Status Bit 311" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB309 ,Group Status Bit 309" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB308 ,Group Status Bit 308" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB306 ,Group Status Bit 306" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB305 ,Group Status Bit 305" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB303 ,Group Status Bit 303" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB302 ,Group Status Bit 302" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB300 ,Group Status Bit 300" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB299 ,Group Status Bit 299" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB297 ,Group Status Bit 297" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB296 ,Group Status Bit 296" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB294 ,Group Status Bit 294" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB293 ,Group Status Bit 293" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB291 ,Group Status Bit 291" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB290 ,Group Status Bit 290" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB288 ,Group Status Bit 288" "Group 0,Group 1"
else
hgroup.long 0x00A4++0x03
hide.long 0x0 "GICD_IGROUPR9 ,Interrupt Group Register 9 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xA8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xA))
group.long 0x00A8++0x03
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Secure Access)"
bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB350 ,Group Status Bit 350" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB349 ,Group Status Bit 349" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB347 ,Group Status Bit 347" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB346 ,Group Status Bit 346" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB344 ,Group Status Bit 344" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB343 ,Group Status Bit 343" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB341 ,Group Status Bit 341" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB340 ,Group Status Bit 340" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB338 ,Group Status Bit 338" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB337 ,Group Status Bit 337" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB335 ,Group Status Bit 335" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB334 ,Group Status Bit 334" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB332 ,Group Status Bit 332" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB331 ,Group Status Bit 331" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB329 ,Group Status Bit 329" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB328 ,Group Status Bit 328" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB326 ,Group Status Bit 326" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB325 ,Group Status Bit 325" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB323 ,Group Status Bit 323" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB322 ,Group Status Bit 322" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB320 ,Group Status Bit 320" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xA))
group.long 0x00A8++0x03
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10"
bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB350 ,Group Status Bit 350" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB349 ,Group Status Bit 349" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB347 ,Group Status Bit 347" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB346 ,Group Status Bit 346" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB344 ,Group Status Bit 344" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB343 ,Group Status Bit 343" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB341 ,Group Status Bit 341" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB340 ,Group Status Bit 340" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB338 ,Group Status Bit 338" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB337 ,Group Status Bit 337" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB335 ,Group Status Bit 335" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB334 ,Group Status Bit 334" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB332 ,Group Status Bit 332" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB331 ,Group Status Bit 331" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB329 ,Group Status Bit 329" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB328 ,Group Status Bit 328" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB326 ,Group Status Bit 326" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB325 ,Group Status Bit 325" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB323 ,Group Status Bit 323" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB322 ,Group Status Bit 322" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB320 ,Group Status Bit 320" "Group 0,Group 1"
else
hgroup.long 0x00A8++0x03
hide.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xAC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xB))
group.long 0x00AC++0x03
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Secure Access)"
bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB382 ,Group Status Bit 382" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB381 ,Group Status Bit 381" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB379 ,Group Status Bit 379" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB378 ,Group Status Bit 378" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB376 ,Group Status Bit 376" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB375 ,Group Status Bit 375" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB373 ,Group Status Bit 373" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB372 ,Group Status Bit 372" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB370 ,Group Status Bit 370" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB369 ,Group Status Bit 369" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB367 ,Group Status Bit 367" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB366 ,Group Status Bit 366" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB364 ,Group Status Bit 364" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB363 ,Group Status Bit 363" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB361 ,Group Status Bit 361" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB360 ,Group Status Bit 360" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB358 ,Group Status Bit 358" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB357 ,Group Status Bit 357" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB355 ,Group Status Bit 355" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB354 ,Group Status Bit 354" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB352 ,Group Status Bit 352" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xB))
group.long 0x00AC++0x03
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11"
bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB382 ,Group Status Bit 382" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB381 ,Group Status Bit 381" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB379 ,Group Status Bit 379" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB378 ,Group Status Bit 378" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB376 ,Group Status Bit 376" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB375 ,Group Status Bit 375" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB373 ,Group Status Bit 373" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB372 ,Group Status Bit 372" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB370 ,Group Status Bit 370" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB369 ,Group Status Bit 369" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB367 ,Group Status Bit 367" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB366 ,Group Status Bit 366" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB364 ,Group Status Bit 364" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB363 ,Group Status Bit 363" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB361 ,Group Status Bit 361" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB360 ,Group Status Bit 360" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB358 ,Group Status Bit 358" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB357 ,Group Status Bit 357" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB355 ,Group Status Bit 355" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB354 ,Group Status Bit 354" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB352 ,Group Status Bit 352" "Group 0,Group 1"
else
hgroup.long 0x00AC++0x03
hide.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xB0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xC))
group.long 0x00B0++0x03
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Secure Access)"
bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB414 ,Group Status Bit 414" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB413 ,Group Status Bit 413" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB411 ,Group Status Bit 411" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB410 ,Group Status Bit 410" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB408 ,Group Status Bit 408" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB407 ,Group Status Bit 407" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB405 ,Group Status Bit 405" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB404 ,Group Status Bit 404" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB402 ,Group Status Bit 402" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB401 ,Group Status Bit 401" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB399 ,Group Status Bit 399" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB398 ,Group Status Bit 398" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB396 ,Group Status Bit 396" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB395 ,Group Status Bit 395" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB393 ,Group Status Bit 393" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB392 ,Group Status Bit 392" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB390 ,Group Status Bit 390" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB389 ,Group Status Bit 389" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB387 ,Group Status Bit 387" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB386 ,Group Status Bit 386" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB384 ,Group Status Bit 384" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xC))
group.long 0x00B0++0x03
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12"
bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB414 ,Group Status Bit 414" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB413 ,Group Status Bit 413" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB411 ,Group Status Bit 411" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB410 ,Group Status Bit 410" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB408 ,Group Status Bit 408" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB407 ,Group Status Bit 407" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB405 ,Group Status Bit 405" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB404 ,Group Status Bit 404" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB402 ,Group Status Bit 402" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB401 ,Group Status Bit 401" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB399 ,Group Status Bit 399" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB398 ,Group Status Bit 398" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB396 ,Group Status Bit 396" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB395 ,Group Status Bit 395" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB393 ,Group Status Bit 393" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB392 ,Group Status Bit 392" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB390 ,Group Status Bit 390" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB389 ,Group Status Bit 389" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB387 ,Group Status Bit 387" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB386 ,Group Status Bit 386" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB384 ,Group Status Bit 384" "Group 0,Group 1"
else
hgroup.long 0x00B0++0x03
hide.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xB4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xD))
group.long 0x00B4++0x03
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Secure Access)"
bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB446 ,Group Status Bit 446" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB445 ,Group Status Bit 445" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB443 ,Group Status Bit 443" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB442 ,Group Status Bit 442" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB440 ,Group Status Bit 440" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB439 ,Group Status Bit 439" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB437 ,Group Status Bit 437" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB436 ,Group Status Bit 436" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB434 ,Group Status Bit 434" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB433 ,Group Status Bit 433" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB431 ,Group Status Bit 431" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB430 ,Group Status Bit 430" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB428 ,Group Status Bit 428" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB427 ,Group Status Bit 427" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB425 ,Group Status Bit 425" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB424 ,Group Status Bit 424" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB422 ,Group Status Bit 422" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB421 ,Group Status Bit 421" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB419 ,Group Status Bit 419" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB418 ,Group Status Bit 418" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB416 ,Group Status Bit 416" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xD))
group.long 0x00B4++0x03
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13"
bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB446 ,Group Status Bit 446" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB445 ,Group Status Bit 445" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB443 ,Group Status Bit 443" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB442 ,Group Status Bit 442" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB440 ,Group Status Bit 440" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB439 ,Group Status Bit 439" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB437 ,Group Status Bit 437" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB436 ,Group Status Bit 436" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB434 ,Group Status Bit 434" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB433 ,Group Status Bit 433" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB431 ,Group Status Bit 431" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB430 ,Group Status Bit 430" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB428 ,Group Status Bit 428" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB427 ,Group Status Bit 427" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB425 ,Group Status Bit 425" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB424 ,Group Status Bit 424" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB422 ,Group Status Bit 422" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB421 ,Group Status Bit 421" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB419 ,Group Status Bit 419" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB418 ,Group Status Bit 418" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB416 ,Group Status Bit 416" "Group 0,Group 1"
else
hgroup.long 0x00B4++0x03
hide.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xB8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xE))
group.long 0x00B8++0x03
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Secure Access)"
bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB478 ,Group Status Bit 478" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB477 ,Group Status Bit 477" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB475 ,Group Status Bit 475" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB474 ,Group Status Bit 474" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB472 ,Group Status Bit 472" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB471 ,Group Status Bit 471" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB469 ,Group Status Bit 469" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB468 ,Group Status Bit 468" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB466 ,Group Status Bit 466" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB465 ,Group Status Bit 465" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB463 ,Group Status Bit 463" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB462 ,Group Status Bit 462" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB460 ,Group Status Bit 460" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB459 ,Group Status Bit 459" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB457 ,Group Status Bit 457" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB456 ,Group Status Bit 456" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB454 ,Group Status Bit 454" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB453 ,Group Status Bit 453" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB451 ,Group Status Bit 451" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB450 ,Group Status Bit 450" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB448 ,Group Status Bit 448" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xE))
group.long 0x00B8++0x03
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14"
bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB478 ,Group Status Bit 478" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB477 ,Group Status Bit 477" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB475 ,Group Status Bit 475" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB474 ,Group Status Bit 474" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB472 ,Group Status Bit 472" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB471 ,Group Status Bit 471" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB469 ,Group Status Bit 469" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB468 ,Group Status Bit 468" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB466 ,Group Status Bit 466" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB465 ,Group Status Bit 465" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB463 ,Group Status Bit 463" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB462 ,Group Status Bit 462" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB460 ,Group Status Bit 460" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB459 ,Group Status Bit 459" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB457 ,Group Status Bit 457" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB456 ,Group Status Bit 456" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB454 ,Group Status Bit 454" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB453 ,Group Status Bit 453" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB451 ,Group Status Bit 451" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB450 ,Group Status Bit 450" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB448 ,Group Status Bit 448" "Group 0,Group 1"
else
hgroup.long 0x00B8++0x03
hide.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xBC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xF))
group.long 0x00BC++0x03
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Secure Access)"
bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB510 ,Group Status Bit 510" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB509 ,Group Status Bit 509" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB507 ,Group Status Bit 507" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB506 ,Group Status Bit 506" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB504 ,Group Status Bit 504" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB503 ,Group Status Bit 503" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB501 ,Group Status Bit 501" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB500 ,Group Status Bit 500" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB498 ,Group Status Bit 498" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB497 ,Group Status Bit 497" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB495 ,Group Status Bit 495" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB494 ,Group Status Bit 494" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB492 ,Group Status Bit 492" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB491 ,Group Status Bit 491" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB489 ,Group Status Bit 489" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB488 ,Group Status Bit 488" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB486 ,Group Status Bit 486" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB485 ,Group Status Bit 485" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB483 ,Group Status Bit 483" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB482 ,Group Status Bit 482" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB480 ,Group Status Bit 480" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xF))
group.long 0x00BC++0x03
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15"
bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB510 ,Group Status Bit 510" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB509 ,Group Status Bit 509" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB507 ,Group Status Bit 507" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB506 ,Group Status Bit 506" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB504 ,Group Status Bit 504" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB503 ,Group Status Bit 503" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB501 ,Group Status Bit 501" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB500 ,Group Status Bit 500" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB498 ,Group Status Bit 498" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB497 ,Group Status Bit 497" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB495 ,Group Status Bit 495" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB494 ,Group Status Bit 494" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB492 ,Group Status Bit 492" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB491 ,Group Status Bit 491" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB489 ,Group Status Bit 489" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB488 ,Group Status Bit 488" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB486 ,Group Status Bit 486" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB485 ,Group Status Bit 485" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB483 ,Group Status Bit 483" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB482 ,Group Status Bit 482" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB480 ,Group Status Bit 480" "Group 0,Group 1"
else
hgroup.long 0x00BC++0x03
hide.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xC0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10))
group.long 0x00C0++0x03
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Secure Access)"
bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB542 ,Group Status Bit 542" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB541 ,Group Status Bit 541" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB539 ,Group Status Bit 539" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB538 ,Group Status Bit 538" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB536 ,Group Status Bit 536" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB535 ,Group Status Bit 535" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB533 ,Group Status Bit 533" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB532 ,Group Status Bit 532" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB530 ,Group Status Bit 530" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB529 ,Group Status Bit 529" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB527 ,Group Status Bit 527" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB526 ,Group Status Bit 526" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB524 ,Group Status Bit 524" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB523 ,Group Status Bit 523" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB521 ,Group Status Bit 521" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB520 ,Group Status Bit 520" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB518 ,Group Status Bit 518" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB517 ,Group Status Bit 517" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB515 ,Group Status Bit 515" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB514 ,Group Status Bit 514" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB512 ,Group Status Bit 512" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10))
group.long 0x00C0++0x03
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16"
bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB542 ,Group Status Bit 542" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB541 ,Group Status Bit 541" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB539 ,Group Status Bit 539" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB538 ,Group Status Bit 538" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB536 ,Group Status Bit 536" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB535 ,Group Status Bit 535" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB533 ,Group Status Bit 533" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB532 ,Group Status Bit 532" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB530 ,Group Status Bit 530" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB529 ,Group Status Bit 529" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB527 ,Group Status Bit 527" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB526 ,Group Status Bit 526" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB524 ,Group Status Bit 524" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB523 ,Group Status Bit 523" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB521 ,Group Status Bit 521" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB520 ,Group Status Bit 520" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB518 ,Group Status Bit 518" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB517 ,Group Status Bit 517" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB515 ,Group Status Bit 515" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB514 ,Group Status Bit 514" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB512 ,Group Status Bit 512" "Group 0,Group 1"
else
hgroup.long 0x00C0++0x03
hide.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xC4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11))
group.long 0x00C4++0x03
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Secure Access)"
bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB574 ,Group Status Bit 574" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB573 ,Group Status Bit 573" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB571 ,Group Status Bit 571" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB570 ,Group Status Bit 570" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB568 ,Group Status Bit 568" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB567 ,Group Status Bit 567" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB565 ,Group Status Bit 565" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB564 ,Group Status Bit 564" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB562 ,Group Status Bit 562" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB561 ,Group Status Bit 561" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB559 ,Group Status Bit 559" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB558 ,Group Status Bit 558" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB556 ,Group Status Bit 556" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB555 ,Group Status Bit 555" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB553 ,Group Status Bit 553" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB552 ,Group Status Bit 552" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB550 ,Group Status Bit 550" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB549 ,Group Status Bit 549" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB547 ,Group Status Bit 547" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB546 ,Group Status Bit 546" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB544 ,Group Status Bit 544" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11))
group.long 0x00C4++0x03
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17"
bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB574 ,Group Status Bit 574" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB573 ,Group Status Bit 573" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB571 ,Group Status Bit 571" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB570 ,Group Status Bit 570" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB568 ,Group Status Bit 568" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB567 ,Group Status Bit 567" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB565 ,Group Status Bit 565" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB564 ,Group Status Bit 564" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB562 ,Group Status Bit 562" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB561 ,Group Status Bit 561" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB559 ,Group Status Bit 559" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB558 ,Group Status Bit 558" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB556 ,Group Status Bit 556" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB555 ,Group Status Bit 555" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB553 ,Group Status Bit 553" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB552 ,Group Status Bit 552" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB550 ,Group Status Bit 550" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB549 ,Group Status Bit 549" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB547 ,Group Status Bit 547" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB546 ,Group Status Bit 546" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB544 ,Group Status Bit 544" "Group 0,Group 1"
else
hgroup.long 0x00C4++0x03
hide.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xC8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12))
group.long 0x00C8++0x03
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Secure Access)"
bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB606 ,Group Status Bit 606" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB605 ,Group Status Bit 605" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB603 ,Group Status Bit 603" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB602 ,Group Status Bit 602" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB600 ,Group Status Bit 600" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB599 ,Group Status Bit 599" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB597 ,Group Status Bit 597" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB596 ,Group Status Bit 596" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB594 ,Group Status Bit 594" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB593 ,Group Status Bit 593" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB591 ,Group Status Bit 591" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB590 ,Group Status Bit 590" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB588 ,Group Status Bit 588" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB587 ,Group Status Bit 587" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB585 ,Group Status Bit 585" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB584 ,Group Status Bit 584" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB582 ,Group Status Bit 582" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB581 ,Group Status Bit 581" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB579 ,Group Status Bit 579" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB578 ,Group Status Bit 578" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB576 ,Group Status Bit 576" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12))
group.long 0x00C8++0x03
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18"
bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB606 ,Group Status Bit 606" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB605 ,Group Status Bit 605" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB603 ,Group Status Bit 603" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB602 ,Group Status Bit 602" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB600 ,Group Status Bit 600" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB599 ,Group Status Bit 599" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB597 ,Group Status Bit 597" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB596 ,Group Status Bit 596" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB594 ,Group Status Bit 594" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB593 ,Group Status Bit 593" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB591 ,Group Status Bit 591" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB590 ,Group Status Bit 590" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB588 ,Group Status Bit 588" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB587 ,Group Status Bit 587" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB585 ,Group Status Bit 585" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB584 ,Group Status Bit 584" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB582 ,Group Status Bit 582" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB581 ,Group Status Bit 581" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB579 ,Group Status Bit 579" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB578 ,Group Status Bit 578" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB576 ,Group Status Bit 576" "Group 0,Group 1"
else
hgroup.long 0x00C8++0x03
hide.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xCC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13))
group.long 0x00CC++0x03
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Secure Access)"
bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB638 ,Group Status Bit 638" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB637 ,Group Status Bit 637" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB635 ,Group Status Bit 635" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB634 ,Group Status Bit 634" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB632 ,Group Status Bit 632" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB631 ,Group Status Bit 631" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB629 ,Group Status Bit 629" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB628 ,Group Status Bit 628" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB626 ,Group Status Bit 626" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB625 ,Group Status Bit 625" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB623 ,Group Status Bit 623" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB622 ,Group Status Bit 622" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB620 ,Group Status Bit 620" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB619 ,Group Status Bit 619" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB617 ,Group Status Bit 617" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB616 ,Group Status Bit 616" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB614 ,Group Status Bit 614" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB613 ,Group Status Bit 613" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB611 ,Group Status Bit 611" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB610 ,Group Status Bit 610" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB608 ,Group Status Bit 608" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13))
group.long 0x00CC++0x03
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19"
bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB638 ,Group Status Bit 638" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB637 ,Group Status Bit 637" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB635 ,Group Status Bit 635" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB634 ,Group Status Bit 634" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB632 ,Group Status Bit 632" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB631 ,Group Status Bit 631" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB629 ,Group Status Bit 629" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB628 ,Group Status Bit 628" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB626 ,Group Status Bit 626" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB625 ,Group Status Bit 625" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB623 ,Group Status Bit 623" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB622 ,Group Status Bit 622" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB620 ,Group Status Bit 620" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB619 ,Group Status Bit 619" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB617 ,Group Status Bit 617" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB616 ,Group Status Bit 616" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB614 ,Group Status Bit 614" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB613 ,Group Status Bit 613" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB611 ,Group Status Bit 611" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB610 ,Group Status Bit 610" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB608 ,Group Status Bit 608" "Group 0,Group 1"
else
hgroup.long 0x00CC++0x03
hide.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xD0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14))
group.long 0x00D0++0x03
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Secure Access)"
bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB670 ,Group Status Bit 670" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB669 ,Group Status Bit 669" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB667 ,Group Status Bit 667" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB666 ,Group Status Bit 666" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB664 ,Group Status Bit 664" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB663 ,Group Status Bit 663" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB661 ,Group Status Bit 661" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB660 ,Group Status Bit 660" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB658 ,Group Status Bit 658" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB657 ,Group Status Bit 657" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB655 ,Group Status Bit 655" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB654 ,Group Status Bit 654" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB652 ,Group Status Bit 652" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB651 ,Group Status Bit 651" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB649 ,Group Status Bit 649" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB648 ,Group Status Bit 648" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB646 ,Group Status Bit 646" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB645 ,Group Status Bit 645" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB643 ,Group Status Bit 643" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB642 ,Group Status Bit 642" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB640 ,Group Status Bit 640" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14))
group.long 0x00D0++0x03
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20"
bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB670 ,Group Status Bit 670" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB669 ,Group Status Bit 669" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB667 ,Group Status Bit 667" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB666 ,Group Status Bit 666" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB664 ,Group Status Bit 664" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB663 ,Group Status Bit 663" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB661 ,Group Status Bit 661" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB660 ,Group Status Bit 660" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB658 ,Group Status Bit 658" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB657 ,Group Status Bit 657" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB655 ,Group Status Bit 655" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB654 ,Group Status Bit 654" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB652 ,Group Status Bit 652" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB651 ,Group Status Bit 651" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB649 ,Group Status Bit 649" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB648 ,Group Status Bit 648" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB646 ,Group Status Bit 646" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB645 ,Group Status Bit 645" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB643 ,Group Status Bit 643" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB642 ,Group Status Bit 642" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB640 ,Group Status Bit 640" "Group 0,Group 1"
else
hgroup.long 0x00D0++0x03
hide.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xD4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15))
group.long 0x00D4++0x03
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Secure Access)"
bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB702 ,Group Status Bit 702" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB701 ,Group Status Bit 701" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB699 ,Group Status Bit 699" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB698 ,Group Status Bit 698" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB696 ,Group Status Bit 696" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB695 ,Group Status Bit 695" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB693 ,Group Status Bit 693" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB692 ,Group Status Bit 692" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB690 ,Group Status Bit 690" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB689 ,Group Status Bit 689" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB687 ,Group Status Bit 687" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB686 ,Group Status Bit 686" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB684 ,Group Status Bit 684" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB683 ,Group Status Bit 683" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB681 ,Group Status Bit 681" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB680 ,Group Status Bit 680" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB678 ,Group Status Bit 678" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB677 ,Group Status Bit 677" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB675 ,Group Status Bit 675" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB674 ,Group Status Bit 674" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB672 ,Group Status Bit 672" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15))
group.long 0x00D4++0x03
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21"
bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB702 ,Group Status Bit 702" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB701 ,Group Status Bit 701" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB699 ,Group Status Bit 699" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB698 ,Group Status Bit 698" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB696 ,Group Status Bit 696" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB695 ,Group Status Bit 695" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB693 ,Group Status Bit 693" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB692 ,Group Status Bit 692" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB690 ,Group Status Bit 690" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB689 ,Group Status Bit 689" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB687 ,Group Status Bit 687" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB686 ,Group Status Bit 686" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB684 ,Group Status Bit 684" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB683 ,Group Status Bit 683" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB681 ,Group Status Bit 681" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB680 ,Group Status Bit 680" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB678 ,Group Status Bit 678" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB677 ,Group Status Bit 677" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB675 ,Group Status Bit 675" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB674 ,Group Status Bit 674" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB672 ,Group Status Bit 672" "Group 0,Group 1"
else
hgroup.long 0x00D4++0x03
hide.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xD8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16))
group.long 0x00D8++0x03
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Secure Access)"
bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB734 ,Group Status Bit 734" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB733 ,Group Status Bit 733" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB731 ,Group Status Bit 731" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB730 ,Group Status Bit 730" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB728 ,Group Status Bit 728" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB727 ,Group Status Bit 727" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB725 ,Group Status Bit 725" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB724 ,Group Status Bit 724" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB722 ,Group Status Bit 722" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB721 ,Group Status Bit 721" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB719 ,Group Status Bit 719" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB718 ,Group Status Bit 718" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB716 ,Group Status Bit 716" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB715 ,Group Status Bit 715" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB713 ,Group Status Bit 713" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB712 ,Group Status Bit 712" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB710 ,Group Status Bit 710" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB709 ,Group Status Bit 709" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB707 ,Group Status Bit 707" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB706 ,Group Status Bit 706" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB704 ,Group Status Bit 704" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16))
group.long 0x00D8++0x03
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22"
bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB734 ,Group Status Bit 734" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB733 ,Group Status Bit 733" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB731 ,Group Status Bit 731" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB730 ,Group Status Bit 730" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB728 ,Group Status Bit 728" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB727 ,Group Status Bit 727" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB725 ,Group Status Bit 725" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB724 ,Group Status Bit 724" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB722 ,Group Status Bit 722" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB721 ,Group Status Bit 721" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB719 ,Group Status Bit 719" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB718 ,Group Status Bit 718" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB716 ,Group Status Bit 716" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB715 ,Group Status Bit 715" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB713 ,Group Status Bit 713" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB712 ,Group Status Bit 712" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB710 ,Group Status Bit 710" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB709 ,Group Status Bit 709" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB707 ,Group Status Bit 707" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB706 ,Group Status Bit 706" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB704 ,Group Status Bit 704" "Group 0,Group 1"
else
hgroup.long 0x00D8++0x03
hide.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xDC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17))
group.long 0x00DC++0x03
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Secure Access)"
bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB766 ,Group Status Bit 766" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB765 ,Group Status Bit 765" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB763 ,Group Status Bit 763" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB762 ,Group Status Bit 762" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB760 ,Group Status Bit 760" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB759 ,Group Status Bit 759" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB757 ,Group Status Bit 757" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB756 ,Group Status Bit 756" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB754 ,Group Status Bit 754" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB753 ,Group Status Bit 753" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB751 ,Group Status Bit 751" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB750 ,Group Status Bit 750" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB748 ,Group Status Bit 748" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB747 ,Group Status Bit 747" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB745 ,Group Status Bit 745" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB744 ,Group Status Bit 744" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB742 ,Group Status Bit 742" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB741 ,Group Status Bit 741" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB739 ,Group Status Bit 739" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB738 ,Group Status Bit 738" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB736 ,Group Status Bit 736" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17))
group.long 0x00DC++0x03
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23"
bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB766 ,Group Status Bit 766" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB765 ,Group Status Bit 765" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB763 ,Group Status Bit 763" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB762 ,Group Status Bit 762" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB760 ,Group Status Bit 760" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB759 ,Group Status Bit 759" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB757 ,Group Status Bit 757" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB756 ,Group Status Bit 756" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB754 ,Group Status Bit 754" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB753 ,Group Status Bit 753" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB751 ,Group Status Bit 751" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB750 ,Group Status Bit 750" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB748 ,Group Status Bit 748" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB747 ,Group Status Bit 747" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB745 ,Group Status Bit 745" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB744 ,Group Status Bit 744" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB742 ,Group Status Bit 742" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB741 ,Group Status Bit 741" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB739 ,Group Status Bit 739" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB738 ,Group Status Bit 738" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB736 ,Group Status Bit 736" "Group 0,Group 1"
else
hgroup.long 0x00DC++0x03
hide.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18))
group.long 0x00E0++0x03
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Secure Access)"
bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB798 ,Group Status Bit 798" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB797 ,Group Status Bit 797" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB795 ,Group Status Bit 795" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB794 ,Group Status Bit 794" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB792 ,Group Status Bit 792" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB791 ,Group Status Bit 791" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB789 ,Group Status Bit 789" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB788 ,Group Status Bit 788" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB786 ,Group Status Bit 786" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB785 ,Group Status Bit 785" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB783 ,Group Status Bit 783" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB782 ,Group Status Bit 782" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB780 ,Group Status Bit 780" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB779 ,Group Status Bit 779" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB777 ,Group Status Bit 777" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB776 ,Group Status Bit 776" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB774 ,Group Status Bit 774" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB773 ,Group Status Bit 773" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB771 ,Group Status Bit 771" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB770 ,Group Status Bit 770" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB768 ,Group Status Bit 768" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18))
group.long 0x00E0++0x03
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24"
bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB798 ,Group Status Bit 798" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB797 ,Group Status Bit 797" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB795 ,Group Status Bit 795" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB794 ,Group Status Bit 794" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB792 ,Group Status Bit 792" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB791 ,Group Status Bit 791" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB789 ,Group Status Bit 789" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB788 ,Group Status Bit 788" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB786 ,Group Status Bit 786" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB785 ,Group Status Bit 785" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB783 ,Group Status Bit 783" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB782 ,Group Status Bit 782" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB780 ,Group Status Bit 780" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB779 ,Group Status Bit 779" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB777 ,Group Status Bit 777" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB776 ,Group Status Bit 776" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB774 ,Group Status Bit 774" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB773 ,Group Status Bit 773" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB771 ,Group Status Bit 771" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB770 ,Group Status Bit 770" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB768 ,Group Status Bit 768" "Group 0,Group 1"
else
hgroup.long 0x00E0++0x03
hide.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19))
group.long 0x00E4++0x03
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Secure Access)"
bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB830 ,Group Status Bit 830" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB829 ,Group Status Bit 829" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB827 ,Group Status Bit 827" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB826 ,Group Status Bit 826" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB824 ,Group Status Bit 824" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB823 ,Group Status Bit 823" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB821 ,Group Status Bit 821" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB820 ,Group Status Bit 820" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB818 ,Group Status Bit 818" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB817 ,Group Status Bit 817" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB815 ,Group Status Bit 815" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB814 ,Group Status Bit 814" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB812 ,Group Status Bit 812" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB811 ,Group Status Bit 811" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB809 ,Group Status Bit 809" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB808 ,Group Status Bit 808" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB806 ,Group Status Bit 806" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB805 ,Group Status Bit 805" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB803 ,Group Status Bit 803" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB802 ,Group Status Bit 802" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB800 ,Group Status Bit 800" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19))
group.long 0x00E4++0x03
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25"
bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB830 ,Group Status Bit 830" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB829 ,Group Status Bit 829" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB827 ,Group Status Bit 827" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB826 ,Group Status Bit 826" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB824 ,Group Status Bit 824" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB823 ,Group Status Bit 823" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB821 ,Group Status Bit 821" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB820 ,Group Status Bit 820" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB818 ,Group Status Bit 818" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB817 ,Group Status Bit 817" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB815 ,Group Status Bit 815" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB814 ,Group Status Bit 814" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB812 ,Group Status Bit 812" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB811 ,Group Status Bit 811" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB809 ,Group Status Bit 809" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB808 ,Group Status Bit 808" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB806 ,Group Status Bit 806" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB805 ,Group Status Bit 805" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB803 ,Group Status Bit 803" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB802 ,Group Status Bit 802" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB800 ,Group Status Bit 800" "Group 0,Group 1"
else
hgroup.long 0x00E4++0x03
hide.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A))
group.long 0x00E8++0x03
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Secure Access)"
bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB862 ,Group Status Bit 862" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB861 ,Group Status Bit 861" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB859 ,Group Status Bit 859" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB858 ,Group Status Bit 858" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB856 ,Group Status Bit 856" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB855 ,Group Status Bit 855" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB853 ,Group Status Bit 853" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB852 ,Group Status Bit 852" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB850 ,Group Status Bit 850" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB849 ,Group Status Bit 849" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB847 ,Group Status Bit 847" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB846 ,Group Status Bit 846" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB844 ,Group Status Bit 844" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB843 ,Group Status Bit 843" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB841 ,Group Status Bit 841" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB840 ,Group Status Bit 840" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB838 ,Group Status Bit 838" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB837 ,Group Status Bit 837" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB835 ,Group Status Bit 835" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB834 ,Group Status Bit 834" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB832 ,Group Status Bit 832" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A))
group.long 0x00E8++0x03
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26"
bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB862 ,Group Status Bit 862" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB861 ,Group Status Bit 861" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB859 ,Group Status Bit 859" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB858 ,Group Status Bit 858" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB856 ,Group Status Bit 856" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB855 ,Group Status Bit 855" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB853 ,Group Status Bit 853" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB852 ,Group Status Bit 852" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB850 ,Group Status Bit 850" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB849 ,Group Status Bit 849" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB847 ,Group Status Bit 847" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB846 ,Group Status Bit 846" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB844 ,Group Status Bit 844" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB843 ,Group Status Bit 843" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB841 ,Group Status Bit 841" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB840 ,Group Status Bit 840" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB838 ,Group Status Bit 838" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB837 ,Group Status Bit 837" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB835 ,Group Status Bit 835" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB834 ,Group Status Bit 834" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB832 ,Group Status Bit 832" "Group 0,Group 1"
else
hgroup.long 0x00E8++0x03
hide.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B))
group.long 0x00EC++0x03
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Secure Access)"
bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB894 ,Group Status Bit 894" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB893 ,Group Status Bit 893" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB891 ,Group Status Bit 891" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB890 ,Group Status Bit 890" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB888 ,Group Status Bit 888" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB887 ,Group Status Bit 887" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB885 ,Group Status Bit 885" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB884 ,Group Status Bit 884" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB882 ,Group Status Bit 882" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB881 ,Group Status Bit 881" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB879 ,Group Status Bit 879" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB878 ,Group Status Bit 878" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB876 ,Group Status Bit 876" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB875 ,Group Status Bit 875" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB873 ,Group Status Bit 873" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB872 ,Group Status Bit 872" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB870 ,Group Status Bit 870" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB869 ,Group Status Bit 869" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB867 ,Group Status Bit 867" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB866 ,Group Status Bit 866" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB864 ,Group Status Bit 864" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B))
group.long 0x00EC++0x03
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27"
bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB894 ,Group Status Bit 894" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB893 ,Group Status Bit 893" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB891 ,Group Status Bit 891" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB890 ,Group Status Bit 890" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB888 ,Group Status Bit 888" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB887 ,Group Status Bit 887" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB885 ,Group Status Bit 885" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB884 ,Group Status Bit 884" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB882 ,Group Status Bit 882" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB881 ,Group Status Bit 881" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB879 ,Group Status Bit 879" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB878 ,Group Status Bit 878" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB876 ,Group Status Bit 876" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB875 ,Group Status Bit 875" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB873 ,Group Status Bit 873" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB872 ,Group Status Bit 872" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB870 ,Group Status Bit 870" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB869 ,Group Status Bit 869" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB867 ,Group Status Bit 867" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB866 ,Group Status Bit 866" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB864 ,Group Status Bit 864" "Group 0,Group 1"
else
hgroup.long 0x00EC++0x03
hide.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xF0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C))
group.long 0x00F0++0x03
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Secure Access)"
bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB926 ,Group Status Bit 926" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB925 ,Group Status Bit 925" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB923 ,Group Status Bit 923" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB922 ,Group Status Bit 922" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB920 ,Group Status Bit 920" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB919 ,Group Status Bit 919" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB917 ,Group Status Bit 917" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB916 ,Group Status Bit 916" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB914 ,Group Status Bit 914" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB913 ,Group Status Bit 913" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB911 ,Group Status Bit 911" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB910 ,Group Status Bit 910" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB908 ,Group Status Bit 908" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB907 ,Group Status Bit 907" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB905 ,Group Status Bit 905" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB904 ,Group Status Bit 904" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB902 ,Group Status Bit 902" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB901 ,Group Status Bit 901" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB899 ,Group Status Bit 899" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB898 ,Group Status Bit 898" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB896 ,Group Status Bit 896" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C))
group.long 0x00F0++0x03
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28"
bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB926 ,Group Status Bit 926" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB925 ,Group Status Bit 925" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB923 ,Group Status Bit 923" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB922 ,Group Status Bit 922" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB920 ,Group Status Bit 920" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB919 ,Group Status Bit 919" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB917 ,Group Status Bit 917" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB916 ,Group Status Bit 916" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB914 ,Group Status Bit 914" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB913 ,Group Status Bit 913" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB911 ,Group Status Bit 911" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB910 ,Group Status Bit 910" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB908 ,Group Status Bit 908" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB907 ,Group Status Bit 907" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB905 ,Group Status Bit 905" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB904 ,Group Status Bit 904" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB902 ,Group Status Bit 902" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB901 ,Group Status Bit 901" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB899 ,Group Status Bit 899" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB898 ,Group Status Bit 898" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB896 ,Group Status Bit 896" "Group 0,Group 1"
else
hgroup.long 0x00F0++0x03
hide.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xF4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D))
group.long 0x00F4++0x03
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Secure Access)"
bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB958 ,Group Status Bit 958" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB957 ,Group Status Bit 957" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB955 ,Group Status Bit 955" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB954 ,Group Status Bit 954" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB952 ,Group Status Bit 952" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB951 ,Group Status Bit 951" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB949 ,Group Status Bit 949" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB948 ,Group Status Bit 948" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB946 ,Group Status Bit 946" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB945 ,Group Status Bit 945" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB943 ,Group Status Bit 943" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB942 ,Group Status Bit 942" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB940 ,Group Status Bit 940" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB939 ,Group Status Bit 939" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB937 ,Group Status Bit 937" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB936 ,Group Status Bit 936" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB934 ,Group Status Bit 934" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB933 ,Group Status Bit 933" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB931 ,Group Status Bit 931" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB930 ,Group Status Bit 930" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB928 ,Group Status Bit 928" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D))
group.long 0x00F4++0x03
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29"
bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB958 ,Group Status Bit 958" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB957 ,Group Status Bit 957" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB955 ,Group Status Bit 955" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB954 ,Group Status Bit 954" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB952 ,Group Status Bit 952" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB951 ,Group Status Bit 951" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB949 ,Group Status Bit 949" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB948 ,Group Status Bit 948" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB946 ,Group Status Bit 946" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB945 ,Group Status Bit 945" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB943 ,Group Status Bit 943" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB942 ,Group Status Bit 942" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB940 ,Group Status Bit 940" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB939 ,Group Status Bit 939" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB937 ,Group Status Bit 937" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB936 ,Group Status Bit 936" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB934 ,Group Status Bit 934" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB933 ,Group Status Bit 933" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB931 ,Group Status Bit 931" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB930 ,Group Status Bit 930" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB928 ,Group Status Bit 928" "Group 0,Group 1"
else
hgroup.long 0x00F4++0x03
hide.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xF8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E))
group.long 0x00F8++0x03
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Secure Access)"
bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB990 ,Group Status Bit 990" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB989 ,Group Status Bit 989" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB987 ,Group Status Bit 987" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB986 ,Group Status Bit 986" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB984 ,Group Status Bit 984" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB983 ,Group Status Bit 983" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB981 ,Group Status Bit 981" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB980 ,Group Status Bit 980" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB978 ,Group Status Bit 978" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB977 ,Group Status Bit 977" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB975 ,Group Status Bit 975" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB974 ,Group Status Bit 974" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB972 ,Group Status Bit 972" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB971 ,Group Status Bit 971" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB969 ,Group Status Bit 969" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB968 ,Group Status Bit 968" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB966 ,Group Status Bit 966" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB965 ,Group Status Bit 965" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB963 ,Group Status Bit 963" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB962 ,Group Status Bit 962" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB960 ,Group Status Bit 960" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E))
group.long 0x00F8++0x03
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30"
bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB990 ,Group Status Bit 990" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB989 ,Group Status Bit 989" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB987 ,Group Status Bit 987" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB986 ,Group Status Bit 986" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB984 ,Group Status Bit 984" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB983 ,Group Status Bit 983" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB981 ,Group Status Bit 981" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB980 ,Group Status Bit 980" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB978 ,Group Status Bit 978" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB977 ,Group Status Bit 977" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB975 ,Group Status Bit 975" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB974 ,Group Status Bit 974" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB972 ,Group Status Bit 972" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB971 ,Group Status Bit 971" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB969 ,Group Status Bit 969" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB968 ,Group Status Bit 968" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB966 ,Group Status Bit 966" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB965 ,Group Status Bit 965" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB963 ,Group Status Bit 963" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB962 ,Group Status Bit 962" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB960 ,Group Status Bit 960" "Group 0,Group 1"
else
hgroup.long 0x00F8++0x03
hide.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30"
endif
tree.end
width 24.
tree "Set/Clear Enable Registers"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x0100++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
else
group.long 0x0100++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB31   ,Set/Clear Enable Bit 31" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB30   ,Set/Clear Enable Bit 30" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB29   ,Set/Clear Enable Bit 29" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB28   ,Set/Clear Enable Bit 28" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB27   ,Set/Clear Enable Bit 27" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB26   ,Set/Clear Enable Bit 26" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB25   ,Set/Clear Enable Bit 25" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB24   ,Set/Clear Enable Bit 24" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB23   ,Set/Clear Enable Bit 23" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB22   ,Set/Clear Enable Bit 22" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB21   ,Set/Clear Enable Bit 21" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB20   ,Set/Clear Enable Bit 20" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB19   ,Set/Clear Enable Bit 19" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB18   ,Set/Clear Enable Bit 18" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB17   ,Set/Clear Enable Bit 17" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB16   ,Set/Clear Enable Bit 16" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB15   ,Set/Clear Enable Bit 15" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB14   ,Set/Clear Enable Bit 14" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB13   ,Set/Clear Enable Bit 13" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB12   ,Set/Clear Enable Bit 12" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB11   ,Set/Clear Enable Bit 11" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB10   ,Set/Clear Enable Bit 10" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB9    ,Set/Clear Enable Bit 9" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB8    ,Set/Clear Enable Bit 8" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB7    ,Set/Clear Enable Bit 7" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB6    ,Set/Clear Enable Bit 6" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB5    ,Set/Clear Enable Bit 5" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB4    ,Set/Clear Enable Bit 4" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB3    ,Set/Clear Enable Bit 3" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB2    ,Set/Clear Enable Bit 2" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB1    ,Set/Clear Enable Bit 1" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB0    ,Set/Clear Enable Bit 0" "Disabled,Enabled"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x0104++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB63   ,Set/Clear Enable Bit 63" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB62   ,Set/Clear Enable Bit 62" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB61   ,Set/Clear Enable Bit 61" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB60   ,Set/Clear Enable Bit 60" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB59   ,Set/Clear Enable Bit 59" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB58   ,Set/Clear Enable Bit 58" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB57   ,Set/Clear Enable Bit 57" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB56   ,Set/Clear Enable Bit 56" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB55   ,Set/Clear Enable Bit 55" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB54   ,Set/Clear Enable Bit 54" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB53   ,Set/Clear Enable Bit 53" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB52   ,Set/Clear Enable Bit 52" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB51   ,Set/Clear Enable Bit 51" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB50   ,Set/Clear Enable Bit 50" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB49   ,Set/Clear Enable Bit 49" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB48   ,Set/Clear Enable Bit 48" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB47   ,Set/Clear Enable Bit 47" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB46   ,Set/Clear Enable Bit 46" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB45   ,Set/Clear Enable Bit 45" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB44   ,Set/Clear Enable Bit 44" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB43   ,Set/Clear Enable Bit 43" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB42   ,Set/Clear Enable Bit 42" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB41   ,Set/Clear Enable Bit 41" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB40   ,Set/Clear Enable Bit 40" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB39   ,Set/Clear Enable Bit 39" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB38   ,Set/Clear Enable Bit 38" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB37   ,Set/Clear Enable Bit 37" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB36   ,Set/Clear Enable Bit 36" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB35   ,Set/Clear Enable Bit 35" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB34   ,Set/Clear Enable Bit 34" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB33   ,Set/Clear Enable Bit 33" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB32   ,Set/Clear Enable Bit 32" "Disabled,Enabled"
else
hgroup.long 0x0104++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x0108++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB95   ,Set/Clear Enable Bit 95" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB94   ,Set/Clear Enable Bit 94" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB93   ,Set/Clear Enable Bit 93" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB92   ,Set/Clear Enable Bit 92" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB91   ,Set/Clear Enable Bit 91" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB90   ,Set/Clear Enable Bit 90" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB89   ,Set/Clear Enable Bit 89" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB88   ,Set/Clear Enable Bit 88" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB87   ,Set/Clear Enable Bit 87" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB86   ,Set/Clear Enable Bit 86" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB85   ,Set/Clear Enable Bit 85" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB84   ,Set/Clear Enable Bit 84" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB83   ,Set/Clear Enable Bit 83" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB82   ,Set/Clear Enable Bit 82" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB81   ,Set/Clear Enable Bit 81" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB80   ,Set/Clear Enable Bit 80" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB79   ,Set/Clear Enable Bit 79" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB78   ,Set/Clear Enable Bit 78" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB77   ,Set/Clear Enable Bit 77" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB76   ,Set/Clear Enable Bit 76" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB75   ,Set/Clear Enable Bit 75" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB74   ,Set/Clear Enable Bit 74" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB73   ,Set/Clear Enable Bit 73" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB72   ,Set/Clear Enable Bit 72" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB71   ,Set/Clear Enable Bit 71" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB70   ,Set/Clear Enable Bit 70" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB69   ,Set/Clear Enable Bit 69" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB68   ,Set/Clear Enable Bit 68" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB67   ,Set/Clear Enable Bit 67" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB66   ,Set/Clear Enable Bit 66" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB65   ,Set/Clear Enable Bit 65" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB64   ,Set/Clear Enable Bit 64" "Disabled,Enabled"
else
hgroup.long 0x0108++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x010C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB127  ,Set/Clear Enable Bit 127" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB126  ,Set/Clear Enable Bit 126" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB125  ,Set/Clear Enable Bit 125" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB124  ,Set/Clear Enable Bit 124" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB123  ,Set/Clear Enable Bit 123" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB122  ,Set/Clear Enable Bit 122" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB121  ,Set/Clear Enable Bit 121" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB120  ,Set/Clear Enable Bit 120" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB119  ,Set/Clear Enable Bit 119" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB118  ,Set/Clear Enable Bit 118" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB117  ,Set/Clear Enable Bit 117" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB116  ,Set/Clear Enable Bit 116" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB115  ,Set/Clear Enable Bit 115" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB114  ,Set/Clear Enable Bit 114" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB113  ,Set/Clear Enable Bit 113" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB112  ,Set/Clear Enable Bit 112" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB111  ,Set/Clear Enable Bit 111" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB110  ,Set/Clear Enable Bit 110" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB109  ,Set/Clear Enable Bit 109" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB108  ,Set/Clear Enable Bit 108" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB107  ,Set/Clear Enable Bit 107" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB106  ,Set/Clear Enable Bit 106" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB105  ,Set/Clear Enable Bit 105" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB104  ,Set/Clear Enable Bit 104" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB103  ,Set/Clear Enable Bit 103" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB102  ,Set/Clear Enable Bit 102" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB101  ,Set/Clear Enable Bit 101" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB100  ,Set/Clear Enable Bit 100" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB99   ,Set/Clear Enable Bit 99" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB98   ,Set/Clear Enable Bit 98" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB97   ,Set/Clear Enable Bit 97" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB96   ,Set/Clear Enable Bit 96" "Disabled,Enabled"
else
hgroup.long 0x010C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x0110++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB159  ,Set/Clear Enable Bit 159" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB158  ,Set/Clear Enable Bit 158" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB157  ,Set/Clear Enable Bit 157" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB156  ,Set/Clear Enable Bit 156" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB155  ,Set/Clear Enable Bit 155" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB154  ,Set/Clear Enable Bit 154" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB153  ,Set/Clear Enable Bit 153" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB152  ,Set/Clear Enable Bit 152" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB151  ,Set/Clear Enable Bit 151" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB150  ,Set/Clear Enable Bit 150" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB149  ,Set/Clear Enable Bit 149" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB148  ,Set/Clear Enable Bit 148" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB147  ,Set/Clear Enable Bit 147" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB146  ,Set/Clear Enable Bit 146" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB145  ,Set/Clear Enable Bit 145" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB144  ,Set/Clear Enable Bit 144" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB143  ,Set/Clear Enable Bit 143" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB142  ,Set/Clear Enable Bit 142" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB141  ,Set/Clear Enable Bit 141" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB140  ,Set/Clear Enable Bit 140" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB139  ,Set/Clear Enable Bit 139" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB138  ,Set/Clear Enable Bit 138" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB137  ,Set/Clear Enable Bit 137" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB136  ,Set/Clear Enable Bit 136" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB135  ,Set/Clear Enable Bit 135" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB134  ,Set/Clear Enable Bit 134" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB133  ,Set/Clear Enable Bit 133" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB132  ,Set/Clear Enable Bit 132" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB131  ,Set/Clear Enable Bit 131" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB130  ,Set/Clear Enable Bit 130" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB129  ,Set/Clear Enable Bit 129" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB128  ,Set/Clear Enable Bit 128" "Disabled,Enabled"
else
hgroup.long 0x0110++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x0114++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB191  ,Set/Clear Enable Bit 191" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB190  ,Set/Clear Enable Bit 190" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB189  ,Set/Clear Enable Bit 189" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB188  ,Set/Clear Enable Bit 188" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB187  ,Set/Clear Enable Bit 187" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB186  ,Set/Clear Enable Bit 186" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB185  ,Set/Clear Enable Bit 185" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB184  ,Set/Clear Enable Bit 184" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB183  ,Set/Clear Enable Bit 183" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB182  ,Set/Clear Enable Bit 182" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB181  ,Set/Clear Enable Bit 181" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB180  ,Set/Clear Enable Bit 180" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB179  ,Set/Clear Enable Bit 179" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB178  ,Set/Clear Enable Bit 178" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB177  ,Set/Clear Enable Bit 177" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB176  ,Set/Clear Enable Bit 176" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB175  ,Set/Clear Enable Bit 175" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB174  ,Set/Clear Enable Bit 174" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB173  ,Set/Clear Enable Bit 173" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB172  ,Set/Clear Enable Bit 172" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB171  ,Set/Clear Enable Bit 171" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB170  ,Set/Clear Enable Bit 170" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB169  ,Set/Clear Enable Bit 169" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB168  ,Set/Clear Enable Bit 168" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB167  ,Set/Clear Enable Bit 167" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB166  ,Set/Clear Enable Bit 166" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB165  ,Set/Clear Enable Bit 165" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB164  ,Set/Clear Enable Bit 164" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB163  ,Set/Clear Enable Bit 163" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB162  ,Set/Clear Enable Bit 162" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB161  ,Set/Clear Enable Bit 161" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB160  ,Set/Clear Enable Bit 160" "Disabled,Enabled"
else
hgroup.long 0x0114++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x0118++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB223  ,Set/Clear Enable Bit 223" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB222  ,Set/Clear Enable Bit 222" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB221  ,Set/Clear Enable Bit 221" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB220  ,Set/Clear Enable Bit 220" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB219  ,Set/Clear Enable Bit 219" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB218  ,Set/Clear Enable Bit 218" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB217  ,Set/Clear Enable Bit 217" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB216  ,Set/Clear Enable Bit 216" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB215  ,Set/Clear Enable Bit 215" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB214  ,Set/Clear Enable Bit 214" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB213  ,Set/Clear Enable Bit 213" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB212  ,Set/Clear Enable Bit 212" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB211  ,Set/Clear Enable Bit 211" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB210  ,Set/Clear Enable Bit 210" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB209  ,Set/Clear Enable Bit 209" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB208  ,Set/Clear Enable Bit 208" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB207  ,Set/Clear Enable Bit 207" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB206  ,Set/Clear Enable Bit 206" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB205  ,Set/Clear Enable Bit 205" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB204  ,Set/Clear Enable Bit 204" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB203  ,Set/Clear Enable Bit 203" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB202  ,Set/Clear Enable Bit 202" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB201  ,Set/Clear Enable Bit 201" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB200  ,Set/Clear Enable Bit 200" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB199  ,Set/Clear Enable Bit 199" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB198  ,Set/Clear Enable Bit 198" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB197  ,Set/Clear Enable Bit 197" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB196  ,Set/Clear Enable Bit 196" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB195  ,Set/Clear Enable Bit 195" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB194  ,Set/Clear Enable Bit 194" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB193  ,Set/Clear Enable Bit 193" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB192  ,Set/Clear Enable Bit 192" "Disabled,Enabled"
else
hgroup.long 0x0118++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x011C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB255  ,Set/Clear Enable Bit 255" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB254  ,Set/Clear Enable Bit 254" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB253  ,Set/Clear Enable Bit 253" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB252  ,Set/Clear Enable Bit 252" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB251  ,Set/Clear Enable Bit 251" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB250  ,Set/Clear Enable Bit 250" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB249  ,Set/Clear Enable Bit 249" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB248  ,Set/Clear Enable Bit 248" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB247  ,Set/Clear Enable Bit 247" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB246  ,Set/Clear Enable Bit 246" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB245  ,Set/Clear Enable Bit 245" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB244  ,Set/Clear Enable Bit 244" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB243  ,Set/Clear Enable Bit 243" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB242  ,Set/Clear Enable Bit 242" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB241  ,Set/Clear Enable Bit 241" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB240  ,Set/Clear Enable Bit 240" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB239  ,Set/Clear Enable Bit 239" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB238  ,Set/Clear Enable Bit 238" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB237  ,Set/Clear Enable Bit 237" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB236  ,Set/Clear Enable Bit 236" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB235  ,Set/Clear Enable Bit 235" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB234  ,Set/Clear Enable Bit 234" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB233  ,Set/Clear Enable Bit 233" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB232  ,Set/Clear Enable Bit 232" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB231  ,Set/Clear Enable Bit 231" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB230  ,Set/Clear Enable Bit 230" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB229  ,Set/Clear Enable Bit 229" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB228  ,Set/Clear Enable Bit 228" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB227  ,Set/Clear Enable Bit 227" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB226  ,Set/Clear Enable Bit 226" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB225  ,Set/Clear Enable Bit 225" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB224  ,Set/Clear Enable Bit 224" "Disabled,Enabled"
else
hgroup.long 0x011C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x0120++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB287  ,Set/Clear Enable Bit 287" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB286  ,Set/Clear Enable Bit 286" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB285  ,Set/Clear Enable Bit 285" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB284  ,Set/Clear Enable Bit 284" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB283  ,Set/Clear Enable Bit 283" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB282  ,Set/Clear Enable Bit 282" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB281  ,Set/Clear Enable Bit 281" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB280  ,Set/Clear Enable Bit 280" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB279  ,Set/Clear Enable Bit 279" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB278  ,Set/Clear Enable Bit 278" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB277  ,Set/Clear Enable Bit 277" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB276  ,Set/Clear Enable Bit 276" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB275  ,Set/Clear Enable Bit 275" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB274  ,Set/Clear Enable Bit 274" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB273  ,Set/Clear Enable Bit 273" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB272  ,Set/Clear Enable Bit 272" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB271  ,Set/Clear Enable Bit 271" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB270  ,Set/Clear Enable Bit 270" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB269  ,Set/Clear Enable Bit 269" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB268  ,Set/Clear Enable Bit 268" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB267  ,Set/Clear Enable Bit 267" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB266  ,Set/Clear Enable Bit 266" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB265  ,Set/Clear Enable Bit 265" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB264  ,Set/Clear Enable Bit 264" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB263  ,Set/Clear Enable Bit 263" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB262  ,Set/Clear Enable Bit 262" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB261  ,Set/Clear Enable Bit 261" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB260  ,Set/Clear Enable Bit 260" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB259  ,Set/Clear Enable Bit 259" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB258  ,Set/Clear Enable Bit 258" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB257  ,Set/Clear Enable Bit 257" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB256  ,Set/Clear Enable Bit 256" "Disabled,Enabled"
else
hgroup.long 0x0120++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x0124++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB319  ,Set/Clear Enable Bit 319" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB318  ,Set/Clear Enable Bit 318" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB317  ,Set/Clear Enable Bit 317" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB316  ,Set/Clear Enable Bit 316" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB315  ,Set/Clear Enable Bit 315" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB314  ,Set/Clear Enable Bit 314" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB313  ,Set/Clear Enable Bit 313" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB312  ,Set/Clear Enable Bit 312" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB311  ,Set/Clear Enable Bit 311" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB310  ,Set/Clear Enable Bit 310" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB309  ,Set/Clear Enable Bit 309" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB308  ,Set/Clear Enable Bit 308" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB307  ,Set/Clear Enable Bit 307" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB306  ,Set/Clear Enable Bit 306" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB305  ,Set/Clear Enable Bit 305" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB304  ,Set/Clear Enable Bit 304" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB303  ,Set/Clear Enable Bit 303" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB302  ,Set/Clear Enable Bit 302" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB301  ,Set/Clear Enable Bit 301" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB300  ,Set/Clear Enable Bit 300" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB299  ,Set/Clear Enable Bit 299" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB298  ,Set/Clear Enable Bit 298" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB297  ,Set/Clear Enable Bit 297" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB296  ,Set/Clear Enable Bit 296" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB295  ,Set/Clear Enable Bit 295" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB294  ,Set/Clear Enable Bit 294" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB293  ,Set/Clear Enable Bit 293" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB292  ,Set/Clear Enable Bit 292" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB291  ,Set/Clear Enable Bit 291" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB290  ,Set/Clear Enable Bit 290" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB289  ,Set/Clear Enable Bit 289" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB288  ,Set/Clear Enable Bit 288" "Disabled,Enabled"
else
hgroup.long 0x0124++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x0128++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB351  ,Set/Clear Enable Bit 351" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB350  ,Set/Clear Enable Bit 350" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB349  ,Set/Clear Enable Bit 349" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB348  ,Set/Clear Enable Bit 348" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB347  ,Set/Clear Enable Bit 347" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB346  ,Set/Clear Enable Bit 346" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB345  ,Set/Clear Enable Bit 345" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB344  ,Set/Clear Enable Bit 344" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB343  ,Set/Clear Enable Bit 343" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB342  ,Set/Clear Enable Bit 342" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB341  ,Set/Clear Enable Bit 341" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB340  ,Set/Clear Enable Bit 340" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB339  ,Set/Clear Enable Bit 339" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB338  ,Set/Clear Enable Bit 338" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB337  ,Set/Clear Enable Bit 337" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB336  ,Set/Clear Enable Bit 336" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB335  ,Set/Clear Enable Bit 335" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB334  ,Set/Clear Enable Bit 334" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB333  ,Set/Clear Enable Bit 333" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB332  ,Set/Clear Enable Bit 332" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB331  ,Set/Clear Enable Bit 331" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB330  ,Set/Clear Enable Bit 330" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB329  ,Set/Clear Enable Bit 329" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB328  ,Set/Clear Enable Bit 328" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB327  ,Set/Clear Enable Bit 327" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB326  ,Set/Clear Enable Bit 326" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB325  ,Set/Clear Enable Bit 325" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB324  ,Set/Clear Enable Bit 324" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB323  ,Set/Clear Enable Bit 323" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB322  ,Set/Clear Enable Bit 322" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB321  ,Set/Clear Enable Bit 321" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB320  ,Set/Clear Enable Bit 320" "Disabled,Enabled"
else
hgroup.long 0x0128++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x012C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB383  ,Set/Clear Enable Bit 383" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB382  ,Set/Clear Enable Bit 382" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB381  ,Set/Clear Enable Bit 381" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB380  ,Set/Clear Enable Bit 380" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB379  ,Set/Clear Enable Bit 379" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB378  ,Set/Clear Enable Bit 378" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB377  ,Set/Clear Enable Bit 377" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB376  ,Set/Clear Enable Bit 376" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB375  ,Set/Clear Enable Bit 375" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB374  ,Set/Clear Enable Bit 374" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB373  ,Set/Clear Enable Bit 373" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB372  ,Set/Clear Enable Bit 372" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB371  ,Set/Clear Enable Bit 371" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB370  ,Set/Clear Enable Bit 370" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB369  ,Set/Clear Enable Bit 369" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB368  ,Set/Clear Enable Bit 368" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB367  ,Set/Clear Enable Bit 367" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB366  ,Set/Clear Enable Bit 366" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB365  ,Set/Clear Enable Bit 365" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB364  ,Set/Clear Enable Bit 364" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB363  ,Set/Clear Enable Bit 363" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB362  ,Set/Clear Enable Bit 362" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB361  ,Set/Clear Enable Bit 361" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB360  ,Set/Clear Enable Bit 360" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB359  ,Set/Clear Enable Bit 359" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB358  ,Set/Clear Enable Bit 358" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB357  ,Set/Clear Enable Bit 357" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB356  ,Set/Clear Enable Bit 356" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB355  ,Set/Clear Enable Bit 355" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB354  ,Set/Clear Enable Bit 354" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB353  ,Set/Clear Enable Bit 353" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB352  ,Set/Clear Enable Bit 352" "Disabled,Enabled"
else
hgroup.long 0x012C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x0130++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB415  ,Set/Clear Enable Bit 415" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB414  ,Set/Clear Enable Bit 414" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB413  ,Set/Clear Enable Bit 413" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB412  ,Set/Clear Enable Bit 412" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB411  ,Set/Clear Enable Bit 411" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB410  ,Set/Clear Enable Bit 410" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB409  ,Set/Clear Enable Bit 409" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB408  ,Set/Clear Enable Bit 408" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB407  ,Set/Clear Enable Bit 407" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB406  ,Set/Clear Enable Bit 406" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB405  ,Set/Clear Enable Bit 405" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB404  ,Set/Clear Enable Bit 404" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB403  ,Set/Clear Enable Bit 403" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB402  ,Set/Clear Enable Bit 402" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB401  ,Set/Clear Enable Bit 401" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB400  ,Set/Clear Enable Bit 400" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB399  ,Set/Clear Enable Bit 399" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB398  ,Set/Clear Enable Bit 398" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB397  ,Set/Clear Enable Bit 397" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB396  ,Set/Clear Enable Bit 396" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB395  ,Set/Clear Enable Bit 395" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB394  ,Set/Clear Enable Bit 394" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB393  ,Set/Clear Enable Bit 393" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB392  ,Set/Clear Enable Bit 392" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB391  ,Set/Clear Enable Bit 391" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB390  ,Set/Clear Enable Bit 390" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB389  ,Set/Clear Enable Bit 389" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB388  ,Set/Clear Enable Bit 388" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB387  ,Set/Clear Enable Bit 387" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB386  ,Set/Clear Enable Bit 386" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB385  ,Set/Clear Enable Bit 385" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB384  ,Set/Clear Enable Bit 384" "Disabled,Enabled"
else
hgroup.long 0x0130++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x0134++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB447  ,Set/Clear Enable Bit 447" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB446  ,Set/Clear Enable Bit 446" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB445  ,Set/Clear Enable Bit 445" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB444  ,Set/Clear Enable Bit 444" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB443  ,Set/Clear Enable Bit 443" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB442  ,Set/Clear Enable Bit 442" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB441  ,Set/Clear Enable Bit 441" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB440  ,Set/Clear Enable Bit 440" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB439  ,Set/Clear Enable Bit 439" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB438  ,Set/Clear Enable Bit 438" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB437  ,Set/Clear Enable Bit 437" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB436  ,Set/Clear Enable Bit 436" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB435  ,Set/Clear Enable Bit 435" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB434  ,Set/Clear Enable Bit 434" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB433  ,Set/Clear Enable Bit 433" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB432  ,Set/Clear Enable Bit 432" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB431  ,Set/Clear Enable Bit 431" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB430  ,Set/Clear Enable Bit 430" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB429  ,Set/Clear Enable Bit 429" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB428  ,Set/Clear Enable Bit 428" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB427  ,Set/Clear Enable Bit 427" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB426  ,Set/Clear Enable Bit 426" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB425  ,Set/Clear Enable Bit 425" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB424  ,Set/Clear Enable Bit 424" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB423  ,Set/Clear Enable Bit 423" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB422  ,Set/Clear Enable Bit 422" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB421  ,Set/Clear Enable Bit 421" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB420  ,Set/Clear Enable Bit 420" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB419  ,Set/Clear Enable Bit 419" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB418  ,Set/Clear Enable Bit 418" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB417  ,Set/Clear Enable Bit 417" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB416  ,Set/Clear Enable Bit 416" "Disabled,Enabled"
else
hgroup.long 0x0134++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x0138++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB479  ,Set/Clear Enable Bit 479" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB478  ,Set/Clear Enable Bit 478" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB477  ,Set/Clear Enable Bit 477" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB476  ,Set/Clear Enable Bit 476" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB475  ,Set/Clear Enable Bit 475" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB474  ,Set/Clear Enable Bit 474" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB473  ,Set/Clear Enable Bit 473" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB472  ,Set/Clear Enable Bit 472" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB471  ,Set/Clear Enable Bit 471" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB470  ,Set/Clear Enable Bit 470" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB469  ,Set/Clear Enable Bit 469" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB468  ,Set/Clear Enable Bit 468" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB467  ,Set/Clear Enable Bit 467" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB466  ,Set/Clear Enable Bit 466" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB465  ,Set/Clear Enable Bit 465" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB464  ,Set/Clear Enable Bit 464" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB463  ,Set/Clear Enable Bit 463" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB462  ,Set/Clear Enable Bit 462" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB461  ,Set/Clear Enable Bit 461" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB460  ,Set/Clear Enable Bit 460" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB459  ,Set/Clear Enable Bit 459" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB458  ,Set/Clear Enable Bit 458" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB457  ,Set/Clear Enable Bit 457" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB456  ,Set/Clear Enable Bit 456" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB455  ,Set/Clear Enable Bit 455" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB454  ,Set/Clear Enable Bit 454" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB453  ,Set/Clear Enable Bit 453" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB452  ,Set/Clear Enable Bit 452" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB451  ,Set/Clear Enable Bit 451" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB450  ,Set/Clear Enable Bit 450" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB449  ,Set/Clear Enable Bit 449" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB448  ,Set/Clear Enable Bit 448" "Disabled,Enabled"
else
hgroup.long 0x0138++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x013C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB511  ,Set/Clear Enable Bit 511" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB510  ,Set/Clear Enable Bit 510" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB509  ,Set/Clear Enable Bit 509" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB508  ,Set/Clear Enable Bit 508" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB507  ,Set/Clear Enable Bit 507" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB506  ,Set/Clear Enable Bit 506" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB505  ,Set/Clear Enable Bit 505" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB504  ,Set/Clear Enable Bit 504" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB503  ,Set/Clear Enable Bit 503" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB502  ,Set/Clear Enable Bit 502" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB501  ,Set/Clear Enable Bit 501" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB500  ,Set/Clear Enable Bit 500" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB499  ,Set/Clear Enable Bit 499" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB498  ,Set/Clear Enable Bit 498" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB497  ,Set/Clear Enable Bit 497" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB496  ,Set/Clear Enable Bit 496" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB495  ,Set/Clear Enable Bit 495" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB494  ,Set/Clear Enable Bit 494" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB493  ,Set/Clear Enable Bit 493" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB492  ,Set/Clear Enable Bit 492" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB491  ,Set/Clear Enable Bit 491" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB490  ,Set/Clear Enable Bit 490" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB489  ,Set/Clear Enable Bit 489" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB488  ,Set/Clear Enable Bit 488" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB487  ,Set/Clear Enable Bit 487" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB486  ,Set/Clear Enable Bit 486" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB485  ,Set/Clear Enable Bit 485" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB484  ,Set/Clear Enable Bit 484" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB483  ,Set/Clear Enable Bit 483" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB482  ,Set/Clear Enable Bit 482" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB481  ,Set/Clear Enable Bit 481" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB480  ,Set/Clear Enable Bit 480" "Disabled,Enabled"
else
hgroup.long 0x013C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0x0140++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB543  ,Set/Clear Enable Bit 543" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB542  ,Set/Clear Enable Bit 542" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB541  ,Set/Clear Enable Bit 541" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB540  ,Set/Clear Enable Bit 540" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB539  ,Set/Clear Enable Bit 539" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB538  ,Set/Clear Enable Bit 538" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB537  ,Set/Clear Enable Bit 537" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB536  ,Set/Clear Enable Bit 536" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB535  ,Set/Clear Enable Bit 535" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB534  ,Set/Clear Enable Bit 534" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB533  ,Set/Clear Enable Bit 533" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB532  ,Set/Clear Enable Bit 532" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB531  ,Set/Clear Enable Bit 531" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB530  ,Set/Clear Enable Bit 530" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB529  ,Set/Clear Enable Bit 529" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB528  ,Set/Clear Enable Bit 528" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB527  ,Set/Clear Enable Bit 527" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB526  ,Set/Clear Enable Bit 526" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB525  ,Set/Clear Enable Bit 525" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB524  ,Set/Clear Enable Bit 524" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB523  ,Set/Clear Enable Bit 523" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB522  ,Set/Clear Enable Bit 522" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB521  ,Set/Clear Enable Bit 521" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB520  ,Set/Clear Enable Bit 520" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB519  ,Set/Clear Enable Bit 519" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB518  ,Set/Clear Enable Bit 518" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB517  ,Set/Clear Enable Bit 517" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB516  ,Set/Clear Enable Bit 516" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB515  ,Set/Clear Enable Bit 515" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB514  ,Set/Clear Enable Bit 514" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB513  ,Set/Clear Enable Bit 513" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB512  ,Set/Clear Enable Bit 512" "Disabled,Enabled"
else
hgroup.long 0x0140++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0x0144++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB575  ,Set/Clear Enable Bit 575" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB574  ,Set/Clear Enable Bit 574" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB573  ,Set/Clear Enable Bit 573" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB572  ,Set/Clear Enable Bit 572" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB571  ,Set/Clear Enable Bit 571" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB570  ,Set/Clear Enable Bit 570" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB569  ,Set/Clear Enable Bit 569" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB568  ,Set/Clear Enable Bit 568" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB567  ,Set/Clear Enable Bit 567" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB566  ,Set/Clear Enable Bit 566" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB565  ,Set/Clear Enable Bit 565" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB564  ,Set/Clear Enable Bit 564" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB563  ,Set/Clear Enable Bit 563" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB562  ,Set/Clear Enable Bit 562" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB561  ,Set/Clear Enable Bit 561" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB560  ,Set/Clear Enable Bit 560" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB559  ,Set/Clear Enable Bit 559" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB558  ,Set/Clear Enable Bit 558" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB557  ,Set/Clear Enable Bit 557" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB556  ,Set/Clear Enable Bit 556" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB555  ,Set/Clear Enable Bit 555" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB554  ,Set/Clear Enable Bit 554" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB553  ,Set/Clear Enable Bit 553" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB552  ,Set/Clear Enable Bit 552" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB551  ,Set/Clear Enable Bit 551" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB550  ,Set/Clear Enable Bit 550" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB549  ,Set/Clear Enable Bit 549" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB548  ,Set/Clear Enable Bit 548" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB547  ,Set/Clear Enable Bit 547" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB546  ,Set/Clear Enable Bit 546" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB545  ,Set/Clear Enable Bit 545" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB544  ,Set/Clear Enable Bit 544" "Disabled,Enabled"
else
hgroup.long 0x0144++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0x0148++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB607  ,Set/Clear Enable Bit 607" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB606  ,Set/Clear Enable Bit 606" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB605  ,Set/Clear Enable Bit 605" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB604  ,Set/Clear Enable Bit 604" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB603  ,Set/Clear Enable Bit 603" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB602  ,Set/Clear Enable Bit 602" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB601  ,Set/Clear Enable Bit 601" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB600  ,Set/Clear Enable Bit 600" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB599  ,Set/Clear Enable Bit 599" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB598  ,Set/Clear Enable Bit 598" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB597  ,Set/Clear Enable Bit 597" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB596  ,Set/Clear Enable Bit 596" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB595  ,Set/Clear Enable Bit 595" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB594  ,Set/Clear Enable Bit 594" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB593  ,Set/Clear Enable Bit 593" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB592  ,Set/Clear Enable Bit 592" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB591  ,Set/Clear Enable Bit 591" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB590  ,Set/Clear Enable Bit 590" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB589  ,Set/Clear Enable Bit 589" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB588  ,Set/Clear Enable Bit 588" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB587  ,Set/Clear Enable Bit 587" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB586  ,Set/Clear Enable Bit 586" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB585  ,Set/Clear Enable Bit 585" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB584  ,Set/Clear Enable Bit 584" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB583  ,Set/Clear Enable Bit 583" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB582  ,Set/Clear Enable Bit 582" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB581  ,Set/Clear Enable Bit 581" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB580  ,Set/Clear Enable Bit 580" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB579  ,Set/Clear Enable Bit 579" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB578  ,Set/Clear Enable Bit 578" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB577  ,Set/Clear Enable Bit 577" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB576  ,Set/Clear Enable Bit 576" "Disabled,Enabled"
else
hgroup.long 0x0148++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0x014C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB639  ,Set/Clear Enable Bit 639" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB638  ,Set/Clear Enable Bit 638" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB637  ,Set/Clear Enable Bit 637" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB636  ,Set/Clear Enable Bit 636" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB635  ,Set/Clear Enable Bit 635" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB634  ,Set/Clear Enable Bit 634" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB633  ,Set/Clear Enable Bit 633" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB632  ,Set/Clear Enable Bit 632" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB631  ,Set/Clear Enable Bit 631" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB630  ,Set/Clear Enable Bit 630" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB629  ,Set/Clear Enable Bit 629" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB628  ,Set/Clear Enable Bit 628" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB627  ,Set/Clear Enable Bit 627" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB626  ,Set/Clear Enable Bit 626" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB625  ,Set/Clear Enable Bit 625" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB624  ,Set/Clear Enable Bit 624" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB623  ,Set/Clear Enable Bit 623" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB622  ,Set/Clear Enable Bit 622" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB621  ,Set/Clear Enable Bit 621" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB620  ,Set/Clear Enable Bit 620" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB619  ,Set/Clear Enable Bit 619" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB618  ,Set/Clear Enable Bit 618" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB617  ,Set/Clear Enable Bit 617" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB616  ,Set/Clear Enable Bit 616" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB615  ,Set/Clear Enable Bit 615" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB614  ,Set/Clear Enable Bit 614" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB613  ,Set/Clear Enable Bit 613" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB612  ,Set/Clear Enable Bit 612" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB611  ,Set/Clear Enable Bit 611" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB610  ,Set/Clear Enable Bit 610" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB609  ,Set/Clear Enable Bit 609" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB608  ,Set/Clear Enable Bit 608" "Disabled,Enabled"
else
hgroup.long 0x014C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0x0150++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB671  ,Set/Clear Enable Bit 671" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB670  ,Set/Clear Enable Bit 670" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB669  ,Set/Clear Enable Bit 669" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB668  ,Set/Clear Enable Bit 668" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB667  ,Set/Clear Enable Bit 667" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB666  ,Set/Clear Enable Bit 666" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB665  ,Set/Clear Enable Bit 665" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB664  ,Set/Clear Enable Bit 664" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB663  ,Set/Clear Enable Bit 663" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB662  ,Set/Clear Enable Bit 662" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB661  ,Set/Clear Enable Bit 661" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB660  ,Set/Clear Enable Bit 660" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB659  ,Set/Clear Enable Bit 659" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB658  ,Set/Clear Enable Bit 658" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB657  ,Set/Clear Enable Bit 657" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB656  ,Set/Clear Enable Bit 656" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB655  ,Set/Clear Enable Bit 655" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB654  ,Set/Clear Enable Bit 654" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB653  ,Set/Clear Enable Bit 653" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB652  ,Set/Clear Enable Bit 652" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB651  ,Set/Clear Enable Bit 651" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB650  ,Set/Clear Enable Bit 650" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB649  ,Set/Clear Enable Bit 649" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB648  ,Set/Clear Enable Bit 648" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB647  ,Set/Clear Enable Bit 647" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB646  ,Set/Clear Enable Bit 646" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB645  ,Set/Clear Enable Bit 645" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB644  ,Set/Clear Enable Bit 644" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB643  ,Set/Clear Enable Bit 643" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB642  ,Set/Clear Enable Bit 642" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB641  ,Set/Clear Enable Bit 641" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB640  ,Set/Clear Enable Bit 640" "Disabled,Enabled"
else
hgroup.long 0x0150++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0x0154++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB703  ,Set/Clear Enable Bit 703" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB702  ,Set/Clear Enable Bit 702" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB701  ,Set/Clear Enable Bit 701" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB700  ,Set/Clear Enable Bit 700" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB699  ,Set/Clear Enable Bit 699" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB698  ,Set/Clear Enable Bit 698" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB697  ,Set/Clear Enable Bit 697" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB696  ,Set/Clear Enable Bit 696" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB695  ,Set/Clear Enable Bit 695" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB694  ,Set/Clear Enable Bit 694" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB693  ,Set/Clear Enable Bit 693" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB692  ,Set/Clear Enable Bit 692" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB691  ,Set/Clear Enable Bit 691" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB690  ,Set/Clear Enable Bit 690" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB689  ,Set/Clear Enable Bit 689" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB688  ,Set/Clear Enable Bit 688" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB687  ,Set/Clear Enable Bit 687" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB686  ,Set/Clear Enable Bit 686" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB685  ,Set/Clear Enable Bit 685" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB684  ,Set/Clear Enable Bit 684" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB683  ,Set/Clear Enable Bit 683" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB682  ,Set/Clear Enable Bit 682" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB681  ,Set/Clear Enable Bit 681" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB680  ,Set/Clear Enable Bit 680" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB679  ,Set/Clear Enable Bit 679" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB678  ,Set/Clear Enable Bit 678" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB677  ,Set/Clear Enable Bit 677" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB676  ,Set/Clear Enable Bit 676" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB675  ,Set/Clear Enable Bit 675" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB674  ,Set/Clear Enable Bit 674" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB673  ,Set/Clear Enable Bit 673" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB672  ,Set/Clear Enable Bit 672" "Disabled,Enabled"
else
hgroup.long 0x0154++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0x0158++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB735  ,Set/Clear Enable Bit 735" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB734  ,Set/Clear Enable Bit 734" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB733  ,Set/Clear Enable Bit 733" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB732  ,Set/Clear Enable Bit 732" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB731  ,Set/Clear Enable Bit 731" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB730  ,Set/Clear Enable Bit 730" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB729  ,Set/Clear Enable Bit 729" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB728  ,Set/Clear Enable Bit 728" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB727  ,Set/Clear Enable Bit 727" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB726  ,Set/Clear Enable Bit 726" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB725  ,Set/Clear Enable Bit 725" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB724  ,Set/Clear Enable Bit 724" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB723  ,Set/Clear Enable Bit 723" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB722  ,Set/Clear Enable Bit 722" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB721  ,Set/Clear Enable Bit 721" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB720  ,Set/Clear Enable Bit 720" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB719  ,Set/Clear Enable Bit 719" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB718  ,Set/Clear Enable Bit 718" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB717  ,Set/Clear Enable Bit 717" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB716  ,Set/Clear Enable Bit 716" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB715  ,Set/Clear Enable Bit 715" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB714  ,Set/Clear Enable Bit 714" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB713  ,Set/Clear Enable Bit 713" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB712  ,Set/Clear Enable Bit 712" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB711  ,Set/Clear Enable Bit 711" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB710  ,Set/Clear Enable Bit 710" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB709  ,Set/Clear Enable Bit 709" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB708  ,Set/Clear Enable Bit 708" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB707  ,Set/Clear Enable Bit 707" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB706  ,Set/Clear Enable Bit 706" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB705  ,Set/Clear Enable Bit 705" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB704  ,Set/Clear Enable Bit 704" "Disabled,Enabled"
else
hgroup.long 0x0158++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0x015C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB767  ,Set/Clear Enable Bit 767" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB766  ,Set/Clear Enable Bit 766" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB765  ,Set/Clear Enable Bit 765" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB764  ,Set/Clear Enable Bit 764" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB763  ,Set/Clear Enable Bit 763" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB762  ,Set/Clear Enable Bit 762" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB761  ,Set/Clear Enable Bit 761" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB760  ,Set/Clear Enable Bit 760" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB759  ,Set/Clear Enable Bit 759" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB758  ,Set/Clear Enable Bit 758" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB757  ,Set/Clear Enable Bit 757" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB756  ,Set/Clear Enable Bit 756" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB755  ,Set/Clear Enable Bit 755" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB754  ,Set/Clear Enable Bit 754" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB753  ,Set/Clear Enable Bit 753" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB752  ,Set/Clear Enable Bit 752" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB751  ,Set/Clear Enable Bit 751" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB750  ,Set/Clear Enable Bit 750" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB749  ,Set/Clear Enable Bit 749" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB748  ,Set/Clear Enable Bit 748" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB747  ,Set/Clear Enable Bit 747" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB746  ,Set/Clear Enable Bit 746" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB745  ,Set/Clear Enable Bit 745" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB744  ,Set/Clear Enable Bit 744" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB743  ,Set/Clear Enable Bit 743" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB742  ,Set/Clear Enable Bit 742" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB741  ,Set/Clear Enable Bit 741" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB740  ,Set/Clear Enable Bit 740" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB739  ,Set/Clear Enable Bit 739" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB738  ,Set/Clear Enable Bit 738" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB737  ,Set/Clear Enable Bit 737" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB736  ,Set/Clear Enable Bit 736" "Disabled,Enabled"
else
hgroup.long 0x015C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0x0160++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB799  ,Set/Clear Enable Bit 799" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB798  ,Set/Clear Enable Bit 798" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB797  ,Set/Clear Enable Bit 797" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB796  ,Set/Clear Enable Bit 796" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB795  ,Set/Clear Enable Bit 795" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB794  ,Set/Clear Enable Bit 794" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB793  ,Set/Clear Enable Bit 793" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB792  ,Set/Clear Enable Bit 792" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB791  ,Set/Clear Enable Bit 791" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB790  ,Set/Clear Enable Bit 790" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB789  ,Set/Clear Enable Bit 789" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB788  ,Set/Clear Enable Bit 788" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB787  ,Set/Clear Enable Bit 787" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB786  ,Set/Clear Enable Bit 786" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB785  ,Set/Clear Enable Bit 785" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB784  ,Set/Clear Enable Bit 784" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB783  ,Set/Clear Enable Bit 783" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB782  ,Set/Clear Enable Bit 782" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB781  ,Set/Clear Enable Bit 781" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB780  ,Set/Clear Enable Bit 780" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB779  ,Set/Clear Enable Bit 779" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB778  ,Set/Clear Enable Bit 778" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB777  ,Set/Clear Enable Bit 777" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB776  ,Set/Clear Enable Bit 776" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB775  ,Set/Clear Enable Bit 775" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB774  ,Set/Clear Enable Bit 774" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB773  ,Set/Clear Enable Bit 773" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB772  ,Set/Clear Enable Bit 772" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB771  ,Set/Clear Enable Bit 771" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB770  ,Set/Clear Enable Bit 770" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB769  ,Set/Clear Enable Bit 769" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB768  ,Set/Clear Enable Bit 768" "Disabled,Enabled"
else
hgroup.long 0x0160++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0x0164++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB831  ,Set/Clear Enable Bit 831" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB830  ,Set/Clear Enable Bit 830" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB829  ,Set/Clear Enable Bit 829" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB828  ,Set/Clear Enable Bit 828" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB827  ,Set/Clear Enable Bit 827" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB826  ,Set/Clear Enable Bit 826" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB825  ,Set/Clear Enable Bit 825" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB824  ,Set/Clear Enable Bit 824" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB823  ,Set/Clear Enable Bit 823" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB822  ,Set/Clear Enable Bit 822" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB821  ,Set/Clear Enable Bit 821" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB820  ,Set/Clear Enable Bit 820" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB819  ,Set/Clear Enable Bit 819" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB818  ,Set/Clear Enable Bit 818" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB817  ,Set/Clear Enable Bit 817" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB816  ,Set/Clear Enable Bit 816" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB815  ,Set/Clear Enable Bit 815" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB814  ,Set/Clear Enable Bit 814" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB813  ,Set/Clear Enable Bit 813" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB812  ,Set/Clear Enable Bit 812" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB811  ,Set/Clear Enable Bit 811" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB810  ,Set/Clear Enable Bit 810" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB809  ,Set/Clear Enable Bit 809" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB808  ,Set/Clear Enable Bit 808" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB807  ,Set/Clear Enable Bit 807" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB806  ,Set/Clear Enable Bit 806" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB805  ,Set/Clear Enable Bit 805" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB804  ,Set/Clear Enable Bit 804" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB803  ,Set/Clear Enable Bit 803" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB802  ,Set/Clear Enable Bit 802" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB801  ,Set/Clear Enable Bit 801" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB800  ,Set/Clear Enable Bit 800" "Disabled,Enabled"
else
hgroup.long 0x0164++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0x0168++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB863  ,Set/Clear Enable Bit 863" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB862  ,Set/Clear Enable Bit 862" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB861  ,Set/Clear Enable Bit 861" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB860  ,Set/Clear Enable Bit 860" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB859  ,Set/Clear Enable Bit 859" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB858  ,Set/Clear Enable Bit 858" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB857  ,Set/Clear Enable Bit 857" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB856  ,Set/Clear Enable Bit 856" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB855  ,Set/Clear Enable Bit 855" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB854  ,Set/Clear Enable Bit 854" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB853  ,Set/Clear Enable Bit 853" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB852  ,Set/Clear Enable Bit 852" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB851  ,Set/Clear Enable Bit 851" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB850  ,Set/Clear Enable Bit 850" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB849  ,Set/Clear Enable Bit 849" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB848  ,Set/Clear Enable Bit 848" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB847  ,Set/Clear Enable Bit 847" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB846  ,Set/Clear Enable Bit 846" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB845  ,Set/Clear Enable Bit 845" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB844  ,Set/Clear Enable Bit 844" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB843  ,Set/Clear Enable Bit 843" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB842  ,Set/Clear Enable Bit 842" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB841  ,Set/Clear Enable Bit 841" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB840  ,Set/Clear Enable Bit 840" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB839  ,Set/Clear Enable Bit 839" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB838  ,Set/Clear Enable Bit 838" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB837  ,Set/Clear Enable Bit 837" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB836  ,Set/Clear Enable Bit 836" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB835  ,Set/Clear Enable Bit 835" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB834  ,Set/Clear Enable Bit 834" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB833  ,Set/Clear Enable Bit 833" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB832  ,Set/Clear Enable Bit 832" "Disabled,Enabled"
else
hgroup.long 0x0168++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0x016C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB895  ,Set/Clear Enable Bit 895" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB894  ,Set/Clear Enable Bit 894" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB893  ,Set/Clear Enable Bit 893" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB892  ,Set/Clear Enable Bit 892" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB891  ,Set/Clear Enable Bit 891" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB890  ,Set/Clear Enable Bit 890" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB889  ,Set/Clear Enable Bit 889" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB888  ,Set/Clear Enable Bit 888" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB887  ,Set/Clear Enable Bit 887" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB886  ,Set/Clear Enable Bit 886" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB885  ,Set/Clear Enable Bit 885" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB884  ,Set/Clear Enable Bit 884" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB883  ,Set/Clear Enable Bit 883" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB882  ,Set/Clear Enable Bit 882" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB881  ,Set/Clear Enable Bit 881" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB880  ,Set/Clear Enable Bit 880" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB879  ,Set/Clear Enable Bit 879" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB878  ,Set/Clear Enable Bit 878" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB877  ,Set/Clear Enable Bit 877" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB876  ,Set/Clear Enable Bit 876" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB875  ,Set/Clear Enable Bit 875" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB874  ,Set/Clear Enable Bit 874" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB873  ,Set/Clear Enable Bit 873" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB872  ,Set/Clear Enable Bit 872" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB871  ,Set/Clear Enable Bit 871" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB870  ,Set/Clear Enable Bit 870" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB869  ,Set/Clear Enable Bit 869" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB868  ,Set/Clear Enable Bit 868" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB867  ,Set/Clear Enable Bit 867" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB866  ,Set/Clear Enable Bit 866" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB865  ,Set/Clear Enable Bit 865" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB864  ,Set/Clear Enable Bit 864" "Disabled,Enabled"
else
hgroup.long 0x016C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0x0170++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB927  ,Set/Clear Enable Bit 927" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB926  ,Set/Clear Enable Bit 926" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB925  ,Set/Clear Enable Bit 925" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB924  ,Set/Clear Enable Bit 924" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB923  ,Set/Clear Enable Bit 923" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB922  ,Set/Clear Enable Bit 922" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB921  ,Set/Clear Enable Bit 921" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB920  ,Set/Clear Enable Bit 920" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB919  ,Set/Clear Enable Bit 919" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB918  ,Set/Clear Enable Bit 918" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB917  ,Set/Clear Enable Bit 917" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB916  ,Set/Clear Enable Bit 916" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB915  ,Set/Clear Enable Bit 915" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB914  ,Set/Clear Enable Bit 914" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB913  ,Set/Clear Enable Bit 913" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB912  ,Set/Clear Enable Bit 912" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB911  ,Set/Clear Enable Bit 911" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB910  ,Set/Clear Enable Bit 910" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB909  ,Set/Clear Enable Bit 909" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB908  ,Set/Clear Enable Bit 908" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB907  ,Set/Clear Enable Bit 907" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB906  ,Set/Clear Enable Bit 906" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB905  ,Set/Clear Enable Bit 905" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB904  ,Set/Clear Enable Bit 904" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB903  ,Set/Clear Enable Bit 903" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB902  ,Set/Clear Enable Bit 902" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB901  ,Set/Clear Enable Bit 901" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB900  ,Set/Clear Enable Bit 900" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB899  ,Set/Clear Enable Bit 899" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB898  ,Set/Clear Enable Bit 898" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB897  ,Set/Clear Enable Bit 897" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB896  ,Set/Clear Enable Bit 896" "Disabled,Enabled"
else
hgroup.long 0x0170++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0x0174++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB959  ,Set/Clear Enable Bit 959" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB958  ,Set/Clear Enable Bit 958" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB957  ,Set/Clear Enable Bit 957" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB956  ,Set/Clear Enable Bit 956" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB955  ,Set/Clear Enable Bit 955" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB954  ,Set/Clear Enable Bit 954" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB953  ,Set/Clear Enable Bit 953" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB952  ,Set/Clear Enable Bit 952" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB951  ,Set/Clear Enable Bit 951" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB950  ,Set/Clear Enable Bit 950" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB949  ,Set/Clear Enable Bit 949" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB948  ,Set/Clear Enable Bit 948" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB947  ,Set/Clear Enable Bit 947" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB946  ,Set/Clear Enable Bit 946" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB945  ,Set/Clear Enable Bit 945" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB944  ,Set/Clear Enable Bit 944" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB943  ,Set/Clear Enable Bit 943" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB942  ,Set/Clear Enable Bit 942" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB941  ,Set/Clear Enable Bit 941" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB940  ,Set/Clear Enable Bit 940" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB939  ,Set/Clear Enable Bit 939" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB938  ,Set/Clear Enable Bit 938" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB937  ,Set/Clear Enable Bit 937" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB936  ,Set/Clear Enable Bit 936" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB935  ,Set/Clear Enable Bit 935" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB934  ,Set/Clear Enable Bit 934" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB933  ,Set/Clear Enable Bit 933" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB932  ,Set/Clear Enable Bit 932" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB931  ,Set/Clear Enable Bit 931" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB930  ,Set/Clear Enable Bit 930" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB929  ,Set/Clear Enable Bit 929" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB928  ,Set/Clear Enable Bit 928" "Disabled,Enabled"
else
hgroup.long 0x0174++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0x0178++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB991  ,Set/Clear Enable Bit 991" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB990  ,Set/Clear Enable Bit 990" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB989  ,Set/Clear Enable Bit 989" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB988  ,Set/Clear Enable Bit 988" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB987  ,Set/Clear Enable Bit 987" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB986  ,Set/Clear Enable Bit 986" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB985  ,Set/Clear Enable Bit 985" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB984  ,Set/Clear Enable Bit 984" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB983  ,Set/Clear Enable Bit 983" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB982  ,Set/Clear Enable Bit 982" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB981  ,Set/Clear Enable Bit 981" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB980  ,Set/Clear Enable Bit 980" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB979  ,Set/Clear Enable Bit 979" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB978  ,Set/Clear Enable Bit 978" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB977  ,Set/Clear Enable Bit 977" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB976  ,Set/Clear Enable Bit 976" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB975  ,Set/Clear Enable Bit 975" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB974  ,Set/Clear Enable Bit 974" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB973  ,Set/Clear Enable Bit 973" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB972  ,Set/Clear Enable Bit 972" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB971  ,Set/Clear Enable Bit 971" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB970  ,Set/Clear Enable Bit 970" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB969  ,Set/Clear Enable Bit 969" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB968  ,Set/Clear Enable Bit 968" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB967  ,Set/Clear Enable Bit 967" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB966  ,Set/Clear Enable Bit 966" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB965  ,Set/Clear Enable Bit 965" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB964  ,Set/Clear Enable Bit 964" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB963  ,Set/Clear Enable Bit 963" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB962  ,Set/Clear Enable Bit 962" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB961  ,Set/Clear Enable Bit 961" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB960  ,Set/Clear Enable Bit 960" "Disabled,Enabled"
else
hgroup.long 0x0178++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
endif
tree.end
width 22.
tree "Set/Clear Pending Registers"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x0200++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
else
group.long 0x0200++0x03
line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND31   ,Set/Clear Pending Bit 31" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND30   ,Set/Clear Pending Bit 30" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND29   ,Set/Clear Pending Bit 29" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND28   ,Set/Clear Pending Bit 28" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND27   ,Set/Clear Pending Bit 27" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND26   ,Set/Clear Pending Bit 26" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND25   ,Set/Clear Pending Bit 25" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND24   ,Set/Clear Pending Bit 24" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND23   ,Set/Clear Pending Bit 23" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND22   ,Set/Clear Pending Bit 22" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND21   ,Set/Clear Pending Bit 21" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND20   ,Set/Clear Pending Bit 20" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND19   ,Set/Clear Pending Bit 19" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND18   ,Set/Clear Pending Bit 18" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND17   ,Set/Clear Pending Bit 17" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND16   ,Set/Clear Pending Bit 16" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND15   ,Set/Clear Pending Bit 15" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND14   ,Set/Clear Pending Bit 14" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND13   ,Set/Clear Pending Bit 13" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND12   ,Set/Clear Pending Bit 12" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND11   ,Set/Clear Pending Bit 11" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND10   ,Set/Clear Pending Bit 10" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND9    ,Set/Clear Pending Bit 9" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND8    ,Set/Clear Pending Bit 8" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND7    ,Set/Clear Pending Bit 7" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND6    ,Set/Clear Pending Bit 6" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND5    ,Set/Clear Pending Bit 5" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND4    ,Set/Clear Pending Bit 4" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND3    ,Set/Clear Pending Bit 3" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND2    ,Set/Clear Pending Bit 2" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND1    ,Set/Clear Pending Bit 1" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND0    ,Set/Clear Pending Bit 0" "Not pending,Pending"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x0204++0x03
line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND63   ,Set/Clear Pending Bit 63" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND62   ,Set/Clear Pending Bit 62" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND61   ,Set/Clear Pending Bit 61" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND60   ,Set/Clear Pending Bit 60" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND59   ,Set/Clear Pending Bit 59" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND58   ,Set/Clear Pending Bit 58" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND57   ,Set/Clear Pending Bit 57" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND56   ,Set/Clear Pending Bit 56" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND55   ,Set/Clear Pending Bit 55" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND54   ,Set/Clear Pending Bit 54" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND53   ,Set/Clear Pending Bit 53" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND52   ,Set/Clear Pending Bit 52" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND51   ,Set/Clear Pending Bit 51" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND50   ,Set/Clear Pending Bit 50" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND49   ,Set/Clear Pending Bit 49" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND48   ,Set/Clear Pending Bit 48" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND47   ,Set/Clear Pending Bit 47" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND46   ,Set/Clear Pending Bit 46" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND45   ,Set/Clear Pending Bit 45" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND44   ,Set/Clear Pending Bit 44" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND43   ,Set/Clear Pending Bit 43" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND42   ,Set/Clear Pending Bit 42" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND41   ,Set/Clear Pending Bit 41" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND40   ,Set/Clear Pending Bit 40" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND39   ,Set/Clear Pending Bit 39" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND38   ,Set/Clear Pending Bit 38" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND37   ,Set/Clear Pending Bit 37" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND36   ,Set/Clear Pending Bit 36" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND35   ,Set/Clear Pending Bit 35" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND34   ,Set/Clear Pending Bit 34" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND33   ,Set/Clear Pending Bit 33" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND32   ,Set/Clear Pending Bit 32" "Not pending,Pending"
else
hgroup.long 0x0204++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x0208++0x03
line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND95   ,Set/Clear Pending Bit 95" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND94   ,Set/Clear Pending Bit 94" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND93   ,Set/Clear Pending Bit 93" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND92   ,Set/Clear Pending Bit 92" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND91   ,Set/Clear Pending Bit 91" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND90   ,Set/Clear Pending Bit 90" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND89   ,Set/Clear Pending Bit 89" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND88   ,Set/Clear Pending Bit 88" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND87   ,Set/Clear Pending Bit 87" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND86   ,Set/Clear Pending Bit 86" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND85   ,Set/Clear Pending Bit 85" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND84   ,Set/Clear Pending Bit 84" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND83   ,Set/Clear Pending Bit 83" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND82   ,Set/Clear Pending Bit 82" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND81   ,Set/Clear Pending Bit 81" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND80   ,Set/Clear Pending Bit 80" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND79   ,Set/Clear Pending Bit 79" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND78   ,Set/Clear Pending Bit 78" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND77   ,Set/Clear Pending Bit 77" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND76   ,Set/Clear Pending Bit 76" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND75   ,Set/Clear Pending Bit 75" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND74   ,Set/Clear Pending Bit 74" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND73   ,Set/Clear Pending Bit 73" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND72   ,Set/Clear Pending Bit 72" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND71   ,Set/Clear Pending Bit 71" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND70   ,Set/Clear Pending Bit 70" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND69   ,Set/Clear Pending Bit 69" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND68   ,Set/Clear Pending Bit 68" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND67   ,Set/Clear Pending Bit 67" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND66   ,Set/Clear Pending Bit 66" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND65   ,Set/Clear Pending Bit 65" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND64   ,Set/Clear Pending Bit 64" "Not pending,Pending"
else
hgroup.long 0x0208++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x020C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND127  ,Set/Clear Pending Bit 127" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND126  ,Set/Clear Pending Bit 126" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND125  ,Set/Clear Pending Bit 125" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND124  ,Set/Clear Pending Bit 124" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND123  ,Set/Clear Pending Bit 123" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND122  ,Set/Clear Pending Bit 122" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND121  ,Set/Clear Pending Bit 121" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND120  ,Set/Clear Pending Bit 120" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND119  ,Set/Clear Pending Bit 119" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND118  ,Set/Clear Pending Bit 118" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND117  ,Set/Clear Pending Bit 117" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND116  ,Set/Clear Pending Bit 116" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND115  ,Set/Clear Pending Bit 115" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND114  ,Set/Clear Pending Bit 114" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND113  ,Set/Clear Pending Bit 113" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND112  ,Set/Clear Pending Bit 112" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND111  ,Set/Clear Pending Bit 111" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND110  ,Set/Clear Pending Bit 110" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND109  ,Set/Clear Pending Bit 109" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND108  ,Set/Clear Pending Bit 108" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND107  ,Set/Clear Pending Bit 107" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND106  ,Set/Clear Pending Bit 106" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND105  ,Set/Clear Pending Bit 105" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND104  ,Set/Clear Pending Bit 104" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND103  ,Set/Clear Pending Bit 103" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND102  ,Set/Clear Pending Bit 102" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND101  ,Set/Clear Pending Bit 101" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND100  ,Set/Clear Pending Bit 100" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND99   ,Set/Clear Pending Bit 99" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND98   ,Set/Clear Pending Bit 98" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND97   ,Set/Clear Pending Bit 97" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND96   ,Set/Clear Pending Bit 96" "Not pending,Pending"
else
hgroup.long 0x020C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x0210++0x03
line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND159  ,Set/Clear Pending Bit 159" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND158  ,Set/Clear Pending Bit 158" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND157  ,Set/Clear Pending Bit 157" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND156  ,Set/Clear Pending Bit 156" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND155  ,Set/Clear Pending Bit 155" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND154  ,Set/Clear Pending Bit 154" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND153  ,Set/Clear Pending Bit 153" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND152  ,Set/Clear Pending Bit 152" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND151  ,Set/Clear Pending Bit 151" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND150  ,Set/Clear Pending Bit 150" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND149  ,Set/Clear Pending Bit 149" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND148  ,Set/Clear Pending Bit 148" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND147  ,Set/Clear Pending Bit 147" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND146  ,Set/Clear Pending Bit 146" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND145  ,Set/Clear Pending Bit 145" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND144  ,Set/Clear Pending Bit 144" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND143  ,Set/Clear Pending Bit 143" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND142  ,Set/Clear Pending Bit 142" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND141  ,Set/Clear Pending Bit 141" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND140  ,Set/Clear Pending Bit 140" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND139  ,Set/Clear Pending Bit 139" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND138  ,Set/Clear Pending Bit 138" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND137  ,Set/Clear Pending Bit 137" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND136  ,Set/Clear Pending Bit 136" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND135  ,Set/Clear Pending Bit 135" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND134  ,Set/Clear Pending Bit 134" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND133  ,Set/Clear Pending Bit 133" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND132  ,Set/Clear Pending Bit 132" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND131  ,Set/Clear Pending Bit 131" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND130  ,Set/Clear Pending Bit 130" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND129  ,Set/Clear Pending Bit 129" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND128  ,Set/Clear Pending Bit 128" "Not pending,Pending"
else
hgroup.long 0x0210++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x0214++0x03
line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND191  ,Set/Clear Pending Bit 191" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND190  ,Set/Clear Pending Bit 190" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND189  ,Set/Clear Pending Bit 189" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND188  ,Set/Clear Pending Bit 188" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND187  ,Set/Clear Pending Bit 187" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND186  ,Set/Clear Pending Bit 186" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND185  ,Set/Clear Pending Bit 185" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND184  ,Set/Clear Pending Bit 184" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND183  ,Set/Clear Pending Bit 183" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND182  ,Set/Clear Pending Bit 182" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND181  ,Set/Clear Pending Bit 181" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND180  ,Set/Clear Pending Bit 180" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND179  ,Set/Clear Pending Bit 179" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND178  ,Set/Clear Pending Bit 178" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND177  ,Set/Clear Pending Bit 177" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND176  ,Set/Clear Pending Bit 176" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND175  ,Set/Clear Pending Bit 175" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND174  ,Set/Clear Pending Bit 174" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND173  ,Set/Clear Pending Bit 173" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND172  ,Set/Clear Pending Bit 172" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND171  ,Set/Clear Pending Bit 171" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND170  ,Set/Clear Pending Bit 170" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND169  ,Set/Clear Pending Bit 169" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND168  ,Set/Clear Pending Bit 168" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND167  ,Set/Clear Pending Bit 167" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND166  ,Set/Clear Pending Bit 166" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND165  ,Set/Clear Pending Bit 165" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND164  ,Set/Clear Pending Bit 164" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND163  ,Set/Clear Pending Bit 163" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND162  ,Set/Clear Pending Bit 162" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND161  ,Set/Clear Pending Bit 161" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND160  ,Set/Clear Pending Bit 160" "Not pending,Pending"
else
hgroup.long 0x0214++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x0218++0x03
line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND223  ,Set/Clear Pending Bit 223" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND222  ,Set/Clear Pending Bit 222" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND221  ,Set/Clear Pending Bit 221" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND220  ,Set/Clear Pending Bit 220" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND219  ,Set/Clear Pending Bit 219" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND218  ,Set/Clear Pending Bit 218" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND217  ,Set/Clear Pending Bit 217" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND216  ,Set/Clear Pending Bit 216" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND215  ,Set/Clear Pending Bit 215" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND214  ,Set/Clear Pending Bit 214" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND213  ,Set/Clear Pending Bit 213" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND212  ,Set/Clear Pending Bit 212" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND211  ,Set/Clear Pending Bit 211" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND210  ,Set/Clear Pending Bit 210" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND209  ,Set/Clear Pending Bit 209" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND208  ,Set/Clear Pending Bit 208" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND207  ,Set/Clear Pending Bit 207" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND206  ,Set/Clear Pending Bit 206" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND205  ,Set/Clear Pending Bit 205" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND204  ,Set/Clear Pending Bit 204" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND203  ,Set/Clear Pending Bit 203" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND202  ,Set/Clear Pending Bit 202" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND201  ,Set/Clear Pending Bit 201" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND200  ,Set/Clear Pending Bit 200" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND199  ,Set/Clear Pending Bit 199" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND198  ,Set/Clear Pending Bit 198" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND197  ,Set/Clear Pending Bit 197" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND196  ,Set/Clear Pending Bit 196" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND195  ,Set/Clear Pending Bit 195" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND194  ,Set/Clear Pending Bit 194" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND193  ,Set/Clear Pending Bit 193" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND192  ,Set/Clear Pending Bit 192" "Not pending,Pending"
else
hgroup.long 0x0218++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x021C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND255  ,Set/Clear Pending Bit 255" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND254  ,Set/Clear Pending Bit 254" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND253  ,Set/Clear Pending Bit 253" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND252  ,Set/Clear Pending Bit 252" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND251  ,Set/Clear Pending Bit 251" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND250  ,Set/Clear Pending Bit 250" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND249  ,Set/Clear Pending Bit 249" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND248  ,Set/Clear Pending Bit 248" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND247  ,Set/Clear Pending Bit 247" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND246  ,Set/Clear Pending Bit 246" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND245  ,Set/Clear Pending Bit 245" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND244  ,Set/Clear Pending Bit 244" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND243  ,Set/Clear Pending Bit 243" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND242  ,Set/Clear Pending Bit 242" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND241  ,Set/Clear Pending Bit 241" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND240  ,Set/Clear Pending Bit 240" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND239  ,Set/Clear Pending Bit 239" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND238  ,Set/Clear Pending Bit 238" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND237  ,Set/Clear Pending Bit 237" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND236  ,Set/Clear Pending Bit 236" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND235  ,Set/Clear Pending Bit 235" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND234  ,Set/Clear Pending Bit 234" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND233  ,Set/Clear Pending Bit 233" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND232  ,Set/Clear Pending Bit 232" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND231  ,Set/Clear Pending Bit 231" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND230  ,Set/Clear Pending Bit 230" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND229  ,Set/Clear Pending Bit 229" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND228  ,Set/Clear Pending Bit 228" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND227  ,Set/Clear Pending Bit 227" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND226  ,Set/Clear Pending Bit 226" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND225  ,Set/Clear Pending Bit 225" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND224  ,Set/Clear Pending Bit 224" "Not pending,Pending"
else
hgroup.long 0x021C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x0220++0x03
line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND287  ,Set/Clear Pending Bit 287" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND286  ,Set/Clear Pending Bit 286" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND285  ,Set/Clear Pending Bit 285" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND284  ,Set/Clear Pending Bit 284" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND283  ,Set/Clear Pending Bit 283" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND282  ,Set/Clear Pending Bit 282" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND281  ,Set/Clear Pending Bit 281" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND280  ,Set/Clear Pending Bit 280" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND279  ,Set/Clear Pending Bit 279" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND278  ,Set/Clear Pending Bit 278" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND277  ,Set/Clear Pending Bit 277" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND276  ,Set/Clear Pending Bit 276" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND275  ,Set/Clear Pending Bit 275" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND274  ,Set/Clear Pending Bit 274" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND273  ,Set/Clear Pending Bit 273" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND272  ,Set/Clear Pending Bit 272" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND271  ,Set/Clear Pending Bit 271" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND270  ,Set/Clear Pending Bit 270" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND269  ,Set/Clear Pending Bit 269" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND268  ,Set/Clear Pending Bit 268" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND267  ,Set/Clear Pending Bit 267" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND266  ,Set/Clear Pending Bit 266" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND265  ,Set/Clear Pending Bit 265" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND264  ,Set/Clear Pending Bit 264" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND263  ,Set/Clear Pending Bit 263" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND262  ,Set/Clear Pending Bit 262" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND261  ,Set/Clear Pending Bit 261" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND260  ,Set/Clear Pending Bit 260" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND259  ,Set/Clear Pending Bit 259" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND258  ,Set/Clear Pending Bit 258" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND257  ,Set/Clear Pending Bit 257" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND256  ,Set/Clear Pending Bit 256" "Not pending,Pending"
else
hgroup.long 0x0220++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x0224++0x03
line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND319  ,Set/Clear Pending Bit 319" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND318  ,Set/Clear Pending Bit 318" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND317  ,Set/Clear Pending Bit 317" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND316  ,Set/Clear Pending Bit 316" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND315  ,Set/Clear Pending Bit 315" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND314  ,Set/Clear Pending Bit 314" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND313  ,Set/Clear Pending Bit 313" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND312  ,Set/Clear Pending Bit 312" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND311  ,Set/Clear Pending Bit 311" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND310  ,Set/Clear Pending Bit 310" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND309  ,Set/Clear Pending Bit 309" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND308  ,Set/Clear Pending Bit 308" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND307  ,Set/Clear Pending Bit 307" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND306  ,Set/Clear Pending Bit 306" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND305  ,Set/Clear Pending Bit 305" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND304  ,Set/Clear Pending Bit 304" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND303  ,Set/Clear Pending Bit 303" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND302  ,Set/Clear Pending Bit 302" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND301  ,Set/Clear Pending Bit 301" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND300  ,Set/Clear Pending Bit 300" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND299  ,Set/Clear Pending Bit 299" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND298  ,Set/Clear Pending Bit 298" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND297  ,Set/Clear Pending Bit 297" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND296  ,Set/Clear Pending Bit 296" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND295  ,Set/Clear Pending Bit 295" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND294  ,Set/Clear Pending Bit 294" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND293  ,Set/Clear Pending Bit 293" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND292  ,Set/Clear Pending Bit 292" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND291  ,Set/Clear Pending Bit 291" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND290  ,Set/Clear Pending Bit 290" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND289  ,Set/Clear Pending Bit 289" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND288  ,Set/Clear Pending Bit 288" "Not pending,Pending"
else
hgroup.long 0x0224++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x0228++0x03
line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND351  ,Set/Clear Pending Bit 351" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND350  ,Set/Clear Pending Bit 350" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND349  ,Set/Clear Pending Bit 349" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND348  ,Set/Clear Pending Bit 348" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND347  ,Set/Clear Pending Bit 347" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND346  ,Set/Clear Pending Bit 346" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND345  ,Set/Clear Pending Bit 345" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND344  ,Set/Clear Pending Bit 344" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND343  ,Set/Clear Pending Bit 343" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND342  ,Set/Clear Pending Bit 342" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND341  ,Set/Clear Pending Bit 341" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND340  ,Set/Clear Pending Bit 340" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND339  ,Set/Clear Pending Bit 339" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND338  ,Set/Clear Pending Bit 338" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND337  ,Set/Clear Pending Bit 337" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND336  ,Set/Clear Pending Bit 336" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND335  ,Set/Clear Pending Bit 335" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND334  ,Set/Clear Pending Bit 334" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND333  ,Set/Clear Pending Bit 333" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND332  ,Set/Clear Pending Bit 332" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND331  ,Set/Clear Pending Bit 331" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND330  ,Set/Clear Pending Bit 330" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND329  ,Set/Clear Pending Bit 329" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND328  ,Set/Clear Pending Bit 328" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND327  ,Set/Clear Pending Bit 327" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND326  ,Set/Clear Pending Bit 326" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND325  ,Set/Clear Pending Bit 325" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND324  ,Set/Clear Pending Bit 324" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND323  ,Set/Clear Pending Bit 323" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND322  ,Set/Clear Pending Bit 322" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND321  ,Set/Clear Pending Bit 321" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND320  ,Set/Clear Pending Bit 320" "Not pending,Pending"
else
hgroup.long 0x0228++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x022C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND383  ,Set/Clear Pending Bit 383" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND382  ,Set/Clear Pending Bit 382" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND381  ,Set/Clear Pending Bit 381" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND380  ,Set/Clear Pending Bit 380" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND379  ,Set/Clear Pending Bit 379" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND378  ,Set/Clear Pending Bit 378" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND377  ,Set/Clear Pending Bit 377" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND376  ,Set/Clear Pending Bit 376" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND375  ,Set/Clear Pending Bit 375" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND374  ,Set/Clear Pending Bit 374" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND373  ,Set/Clear Pending Bit 373" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND372  ,Set/Clear Pending Bit 372" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND371  ,Set/Clear Pending Bit 371" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND370  ,Set/Clear Pending Bit 370" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND369  ,Set/Clear Pending Bit 369" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND368  ,Set/Clear Pending Bit 368" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND367  ,Set/Clear Pending Bit 367" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND366  ,Set/Clear Pending Bit 366" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND365  ,Set/Clear Pending Bit 365" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND364  ,Set/Clear Pending Bit 364" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND363  ,Set/Clear Pending Bit 363" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND362  ,Set/Clear Pending Bit 362" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND361  ,Set/Clear Pending Bit 361" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND360  ,Set/Clear Pending Bit 360" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND359  ,Set/Clear Pending Bit 359" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND358  ,Set/Clear Pending Bit 358" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND357  ,Set/Clear Pending Bit 357" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND356  ,Set/Clear Pending Bit 356" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND355  ,Set/Clear Pending Bit 355" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND354  ,Set/Clear Pending Bit 354" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND353  ,Set/Clear Pending Bit 353" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND352  ,Set/Clear Pending Bit 352" "Not pending,Pending"
else
hgroup.long 0x022C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x0230++0x03
line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND415  ,Set/Clear Pending Bit 415" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND414  ,Set/Clear Pending Bit 414" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND413  ,Set/Clear Pending Bit 413" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND412  ,Set/Clear Pending Bit 412" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND411  ,Set/Clear Pending Bit 411" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND410  ,Set/Clear Pending Bit 410" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND409  ,Set/Clear Pending Bit 409" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND408  ,Set/Clear Pending Bit 408" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND407  ,Set/Clear Pending Bit 407" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND406  ,Set/Clear Pending Bit 406" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND405  ,Set/Clear Pending Bit 405" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND404  ,Set/Clear Pending Bit 404" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND403  ,Set/Clear Pending Bit 403" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND402  ,Set/Clear Pending Bit 402" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND401  ,Set/Clear Pending Bit 401" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND400  ,Set/Clear Pending Bit 400" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND399  ,Set/Clear Pending Bit 399" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND398  ,Set/Clear Pending Bit 398" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND397  ,Set/Clear Pending Bit 397" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND396  ,Set/Clear Pending Bit 396" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND395  ,Set/Clear Pending Bit 395" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND394  ,Set/Clear Pending Bit 394" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND393  ,Set/Clear Pending Bit 393" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND392  ,Set/Clear Pending Bit 392" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND391  ,Set/Clear Pending Bit 391" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND390  ,Set/Clear Pending Bit 390" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND389  ,Set/Clear Pending Bit 389" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND388  ,Set/Clear Pending Bit 388" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND387  ,Set/Clear Pending Bit 387" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND386  ,Set/Clear Pending Bit 386" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND385  ,Set/Clear Pending Bit 385" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND384  ,Set/Clear Pending Bit 384" "Not pending,Pending"
else
hgroup.long 0x0230++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x0234++0x03
line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND447  ,Set/Clear Pending Bit 447" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND446  ,Set/Clear Pending Bit 446" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND445  ,Set/Clear Pending Bit 445" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND444  ,Set/Clear Pending Bit 444" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND443  ,Set/Clear Pending Bit 443" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND442  ,Set/Clear Pending Bit 442" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND441  ,Set/Clear Pending Bit 441" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND440  ,Set/Clear Pending Bit 440" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND439  ,Set/Clear Pending Bit 439" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND438  ,Set/Clear Pending Bit 438" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND437  ,Set/Clear Pending Bit 437" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND436  ,Set/Clear Pending Bit 436" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND435  ,Set/Clear Pending Bit 435" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND434  ,Set/Clear Pending Bit 434" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND433  ,Set/Clear Pending Bit 433" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND432  ,Set/Clear Pending Bit 432" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND431  ,Set/Clear Pending Bit 431" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND430  ,Set/Clear Pending Bit 430" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND429  ,Set/Clear Pending Bit 429" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND428  ,Set/Clear Pending Bit 428" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND427  ,Set/Clear Pending Bit 427" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND426  ,Set/Clear Pending Bit 426" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND425  ,Set/Clear Pending Bit 425" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND424  ,Set/Clear Pending Bit 424" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND423  ,Set/Clear Pending Bit 423" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND422  ,Set/Clear Pending Bit 422" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND421  ,Set/Clear Pending Bit 421" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND420  ,Set/Clear Pending Bit 420" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND419  ,Set/Clear Pending Bit 419" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND418  ,Set/Clear Pending Bit 418" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND417  ,Set/Clear Pending Bit 417" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND416  ,Set/Clear Pending Bit 416" "Not pending,Pending"
else
hgroup.long 0x0234++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x0238++0x03
line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND479  ,Set/Clear Pending Bit 479" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND478  ,Set/Clear Pending Bit 478" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND477  ,Set/Clear Pending Bit 477" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND476  ,Set/Clear Pending Bit 476" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND475  ,Set/Clear Pending Bit 475" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND474  ,Set/Clear Pending Bit 474" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND473  ,Set/Clear Pending Bit 473" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND472  ,Set/Clear Pending Bit 472" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND471  ,Set/Clear Pending Bit 471" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND470  ,Set/Clear Pending Bit 470" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND469  ,Set/Clear Pending Bit 469" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND468  ,Set/Clear Pending Bit 468" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND467  ,Set/Clear Pending Bit 467" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND466  ,Set/Clear Pending Bit 466" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND465  ,Set/Clear Pending Bit 465" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND464  ,Set/Clear Pending Bit 464" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND463  ,Set/Clear Pending Bit 463" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND462  ,Set/Clear Pending Bit 462" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND461  ,Set/Clear Pending Bit 461" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND460  ,Set/Clear Pending Bit 460" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND459  ,Set/Clear Pending Bit 459" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND458  ,Set/Clear Pending Bit 458" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND457  ,Set/Clear Pending Bit 457" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND456  ,Set/Clear Pending Bit 456" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND455  ,Set/Clear Pending Bit 455" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND454  ,Set/Clear Pending Bit 454" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND453  ,Set/Clear Pending Bit 453" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND452  ,Set/Clear Pending Bit 452" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND451  ,Set/Clear Pending Bit 451" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND450  ,Set/Clear Pending Bit 450" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND449  ,Set/Clear Pending Bit 449" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND448  ,Set/Clear Pending Bit 448" "Not pending,Pending"
else
hgroup.long 0x0238++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x023C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND511  ,Set/Clear Pending Bit 511" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND510  ,Set/Clear Pending Bit 510" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND509  ,Set/Clear Pending Bit 509" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND508  ,Set/Clear Pending Bit 508" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND507  ,Set/Clear Pending Bit 507" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND506  ,Set/Clear Pending Bit 506" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND505  ,Set/Clear Pending Bit 505" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND504  ,Set/Clear Pending Bit 504" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND503  ,Set/Clear Pending Bit 503" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND502  ,Set/Clear Pending Bit 502" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND501  ,Set/Clear Pending Bit 501" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND500  ,Set/Clear Pending Bit 500" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND499  ,Set/Clear Pending Bit 499" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND498  ,Set/Clear Pending Bit 498" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND497  ,Set/Clear Pending Bit 497" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND496  ,Set/Clear Pending Bit 496" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND495  ,Set/Clear Pending Bit 495" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND494  ,Set/Clear Pending Bit 494" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND493  ,Set/Clear Pending Bit 493" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND492  ,Set/Clear Pending Bit 492" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND491  ,Set/Clear Pending Bit 491" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND490  ,Set/Clear Pending Bit 490" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND489  ,Set/Clear Pending Bit 489" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND488  ,Set/Clear Pending Bit 488" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND487  ,Set/Clear Pending Bit 487" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND486  ,Set/Clear Pending Bit 486" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND485  ,Set/Clear Pending Bit 485" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND484  ,Set/Clear Pending Bit 484" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND483  ,Set/Clear Pending Bit 483" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND482  ,Set/Clear Pending Bit 482" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND481  ,Set/Clear Pending Bit 481" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND480  ,Set/Clear Pending Bit 480" "Not pending,Pending"
else
hgroup.long 0x023C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0x0240++0x03
line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND543  ,Set/Clear Pending Bit 543" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND542  ,Set/Clear Pending Bit 542" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND541  ,Set/Clear Pending Bit 541" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND540  ,Set/Clear Pending Bit 540" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND539  ,Set/Clear Pending Bit 539" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND538  ,Set/Clear Pending Bit 538" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND537  ,Set/Clear Pending Bit 537" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND536  ,Set/Clear Pending Bit 536" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND535  ,Set/Clear Pending Bit 535" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND534  ,Set/Clear Pending Bit 534" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND533  ,Set/Clear Pending Bit 533" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND532  ,Set/Clear Pending Bit 532" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND531  ,Set/Clear Pending Bit 531" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND530  ,Set/Clear Pending Bit 530" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND529  ,Set/Clear Pending Bit 529" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND528  ,Set/Clear Pending Bit 528" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND527  ,Set/Clear Pending Bit 527" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND526  ,Set/Clear Pending Bit 526" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND525  ,Set/Clear Pending Bit 525" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND524  ,Set/Clear Pending Bit 524" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND523  ,Set/Clear Pending Bit 523" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND522  ,Set/Clear Pending Bit 522" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND521  ,Set/Clear Pending Bit 521" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND520  ,Set/Clear Pending Bit 520" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND519  ,Set/Clear Pending Bit 519" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND518  ,Set/Clear Pending Bit 518" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND517  ,Set/Clear Pending Bit 517" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND516  ,Set/Clear Pending Bit 516" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND515  ,Set/Clear Pending Bit 515" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND514  ,Set/Clear Pending Bit 514" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND513  ,Set/Clear Pending Bit 513" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND512  ,Set/Clear Pending Bit 512" "Not pending,Pending"
else
hgroup.long 0x0240++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0x0244++0x03
line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND575  ,Set/Clear Pending Bit 575" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND574  ,Set/Clear Pending Bit 574" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND573  ,Set/Clear Pending Bit 573" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND572  ,Set/Clear Pending Bit 572" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND571  ,Set/Clear Pending Bit 571" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND570  ,Set/Clear Pending Bit 570" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND569  ,Set/Clear Pending Bit 569" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND568  ,Set/Clear Pending Bit 568" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND567  ,Set/Clear Pending Bit 567" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND566  ,Set/Clear Pending Bit 566" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND565  ,Set/Clear Pending Bit 565" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND564  ,Set/Clear Pending Bit 564" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND563  ,Set/Clear Pending Bit 563" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND562  ,Set/Clear Pending Bit 562" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND561  ,Set/Clear Pending Bit 561" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND560  ,Set/Clear Pending Bit 560" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND559  ,Set/Clear Pending Bit 559" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND558  ,Set/Clear Pending Bit 558" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND557  ,Set/Clear Pending Bit 557" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND556  ,Set/Clear Pending Bit 556" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND555  ,Set/Clear Pending Bit 555" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND554  ,Set/Clear Pending Bit 554" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND553  ,Set/Clear Pending Bit 553" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND552  ,Set/Clear Pending Bit 552" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND551  ,Set/Clear Pending Bit 551" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND550  ,Set/Clear Pending Bit 550" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND549  ,Set/Clear Pending Bit 549" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND548  ,Set/Clear Pending Bit 548" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND547  ,Set/Clear Pending Bit 547" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND546  ,Set/Clear Pending Bit 546" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND545  ,Set/Clear Pending Bit 545" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND544  ,Set/Clear Pending Bit 544" "Not pending,Pending"
else
hgroup.long 0x0244++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0x0248++0x03
line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND607  ,Set/Clear Pending Bit 607" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND606  ,Set/Clear Pending Bit 606" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND605  ,Set/Clear Pending Bit 605" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND604  ,Set/Clear Pending Bit 604" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND603  ,Set/Clear Pending Bit 603" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND602  ,Set/Clear Pending Bit 602" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND601  ,Set/Clear Pending Bit 601" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND600  ,Set/Clear Pending Bit 600" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND599  ,Set/Clear Pending Bit 599" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND598  ,Set/Clear Pending Bit 598" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND597  ,Set/Clear Pending Bit 597" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND596  ,Set/Clear Pending Bit 596" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND595  ,Set/Clear Pending Bit 595" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND594  ,Set/Clear Pending Bit 594" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND593  ,Set/Clear Pending Bit 593" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND592  ,Set/Clear Pending Bit 592" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND591  ,Set/Clear Pending Bit 591" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND590  ,Set/Clear Pending Bit 590" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND589  ,Set/Clear Pending Bit 589" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND588  ,Set/Clear Pending Bit 588" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND587  ,Set/Clear Pending Bit 587" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND586  ,Set/Clear Pending Bit 586" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND585  ,Set/Clear Pending Bit 585" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND584  ,Set/Clear Pending Bit 584" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND583  ,Set/Clear Pending Bit 583" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND582  ,Set/Clear Pending Bit 582" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND581  ,Set/Clear Pending Bit 581" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND580  ,Set/Clear Pending Bit 580" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND579  ,Set/Clear Pending Bit 579" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND578  ,Set/Clear Pending Bit 578" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND577  ,Set/Clear Pending Bit 577" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND576  ,Set/Clear Pending Bit 576" "Not pending,Pending"
else
hgroup.long 0x0248++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0x024C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND639  ,Set/Clear Pending Bit 639" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND638  ,Set/Clear Pending Bit 638" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND637  ,Set/Clear Pending Bit 637" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND636  ,Set/Clear Pending Bit 636" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND635  ,Set/Clear Pending Bit 635" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND634  ,Set/Clear Pending Bit 634" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND633  ,Set/Clear Pending Bit 633" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND632  ,Set/Clear Pending Bit 632" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND631  ,Set/Clear Pending Bit 631" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND630  ,Set/Clear Pending Bit 630" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND629  ,Set/Clear Pending Bit 629" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND628  ,Set/Clear Pending Bit 628" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND627  ,Set/Clear Pending Bit 627" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND626  ,Set/Clear Pending Bit 626" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND625  ,Set/Clear Pending Bit 625" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND624  ,Set/Clear Pending Bit 624" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND623  ,Set/Clear Pending Bit 623" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND622  ,Set/Clear Pending Bit 622" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND621  ,Set/Clear Pending Bit 621" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND620  ,Set/Clear Pending Bit 620" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND619  ,Set/Clear Pending Bit 619" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND618  ,Set/Clear Pending Bit 618" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND617  ,Set/Clear Pending Bit 617" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND616  ,Set/Clear Pending Bit 616" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND615  ,Set/Clear Pending Bit 615" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND614  ,Set/Clear Pending Bit 614" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND613  ,Set/Clear Pending Bit 613" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND612  ,Set/Clear Pending Bit 612" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND611  ,Set/Clear Pending Bit 611" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND610  ,Set/Clear Pending Bit 610" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND609  ,Set/Clear Pending Bit 609" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND608  ,Set/Clear Pending Bit 608" "Not pending,Pending"
else
hgroup.long 0x024C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0x0250++0x03
line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND671  ,Set/Clear Pending Bit 671" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND670  ,Set/Clear Pending Bit 670" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND669  ,Set/Clear Pending Bit 669" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND668  ,Set/Clear Pending Bit 668" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND667  ,Set/Clear Pending Bit 667" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND666  ,Set/Clear Pending Bit 666" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND665  ,Set/Clear Pending Bit 665" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND664  ,Set/Clear Pending Bit 664" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND663  ,Set/Clear Pending Bit 663" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND662  ,Set/Clear Pending Bit 662" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND661  ,Set/Clear Pending Bit 661" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND660  ,Set/Clear Pending Bit 660" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND659  ,Set/Clear Pending Bit 659" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND658  ,Set/Clear Pending Bit 658" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND657  ,Set/Clear Pending Bit 657" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND656  ,Set/Clear Pending Bit 656" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND655  ,Set/Clear Pending Bit 655" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND654  ,Set/Clear Pending Bit 654" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND653  ,Set/Clear Pending Bit 653" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND652  ,Set/Clear Pending Bit 652" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND651  ,Set/Clear Pending Bit 651" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND650  ,Set/Clear Pending Bit 650" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND649  ,Set/Clear Pending Bit 649" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND648  ,Set/Clear Pending Bit 648" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND647  ,Set/Clear Pending Bit 647" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND646  ,Set/Clear Pending Bit 646" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND645  ,Set/Clear Pending Bit 645" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND644  ,Set/Clear Pending Bit 644" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND643  ,Set/Clear Pending Bit 643" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND642  ,Set/Clear Pending Bit 642" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND641  ,Set/Clear Pending Bit 641" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND640  ,Set/Clear Pending Bit 640" "Not pending,Pending"
else
hgroup.long 0x0250++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0x0254++0x03
line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND703  ,Set/Clear Pending Bit 703" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND702  ,Set/Clear Pending Bit 702" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND701  ,Set/Clear Pending Bit 701" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND700  ,Set/Clear Pending Bit 700" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND699  ,Set/Clear Pending Bit 699" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND698  ,Set/Clear Pending Bit 698" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND697  ,Set/Clear Pending Bit 697" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND696  ,Set/Clear Pending Bit 696" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND695  ,Set/Clear Pending Bit 695" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND694  ,Set/Clear Pending Bit 694" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND693  ,Set/Clear Pending Bit 693" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND692  ,Set/Clear Pending Bit 692" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND691  ,Set/Clear Pending Bit 691" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND690  ,Set/Clear Pending Bit 690" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND689  ,Set/Clear Pending Bit 689" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND688  ,Set/Clear Pending Bit 688" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND687  ,Set/Clear Pending Bit 687" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND686  ,Set/Clear Pending Bit 686" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND685  ,Set/Clear Pending Bit 685" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND684  ,Set/Clear Pending Bit 684" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND683  ,Set/Clear Pending Bit 683" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND682  ,Set/Clear Pending Bit 682" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND681  ,Set/Clear Pending Bit 681" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND680  ,Set/Clear Pending Bit 680" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND679  ,Set/Clear Pending Bit 679" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND678  ,Set/Clear Pending Bit 678" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND677  ,Set/Clear Pending Bit 677" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND676  ,Set/Clear Pending Bit 676" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND675  ,Set/Clear Pending Bit 675" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND674  ,Set/Clear Pending Bit 674" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND673  ,Set/Clear Pending Bit 673" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND672  ,Set/Clear Pending Bit 672" "Not pending,Pending"
else
hgroup.long 0x0254++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0x0258++0x03
line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND735  ,Set/Clear Pending Bit 735" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND734  ,Set/Clear Pending Bit 734" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND733  ,Set/Clear Pending Bit 733" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND732  ,Set/Clear Pending Bit 732" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND731  ,Set/Clear Pending Bit 731" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND730  ,Set/Clear Pending Bit 730" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND729  ,Set/Clear Pending Bit 729" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND728  ,Set/Clear Pending Bit 728" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND727  ,Set/Clear Pending Bit 727" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND726  ,Set/Clear Pending Bit 726" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND725  ,Set/Clear Pending Bit 725" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND724  ,Set/Clear Pending Bit 724" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND723  ,Set/Clear Pending Bit 723" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND722  ,Set/Clear Pending Bit 722" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND721  ,Set/Clear Pending Bit 721" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND720  ,Set/Clear Pending Bit 720" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND719  ,Set/Clear Pending Bit 719" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND718  ,Set/Clear Pending Bit 718" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND717  ,Set/Clear Pending Bit 717" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND716  ,Set/Clear Pending Bit 716" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND715  ,Set/Clear Pending Bit 715" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND714  ,Set/Clear Pending Bit 714" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND713  ,Set/Clear Pending Bit 713" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND712  ,Set/Clear Pending Bit 712" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND711  ,Set/Clear Pending Bit 711" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND710  ,Set/Clear Pending Bit 710" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND709  ,Set/Clear Pending Bit 709" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND708  ,Set/Clear Pending Bit 708" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND707  ,Set/Clear Pending Bit 707" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND706  ,Set/Clear Pending Bit 706" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND705  ,Set/Clear Pending Bit 705" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND704  ,Set/Clear Pending Bit 704" "Not pending,Pending"
else
hgroup.long 0x0258++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0x025C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND767  ,Set/Clear Pending Bit 767" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND766  ,Set/Clear Pending Bit 766" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND765  ,Set/Clear Pending Bit 765" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND764  ,Set/Clear Pending Bit 764" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND763  ,Set/Clear Pending Bit 763" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND762  ,Set/Clear Pending Bit 762" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND761  ,Set/Clear Pending Bit 761" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND760  ,Set/Clear Pending Bit 760" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND759  ,Set/Clear Pending Bit 759" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND758  ,Set/Clear Pending Bit 758" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND757  ,Set/Clear Pending Bit 757" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND756  ,Set/Clear Pending Bit 756" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND755  ,Set/Clear Pending Bit 755" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND754  ,Set/Clear Pending Bit 754" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND753  ,Set/Clear Pending Bit 753" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND752  ,Set/Clear Pending Bit 752" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND751  ,Set/Clear Pending Bit 751" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND750  ,Set/Clear Pending Bit 750" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND749  ,Set/Clear Pending Bit 749" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND748  ,Set/Clear Pending Bit 748" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND747  ,Set/Clear Pending Bit 747" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND746  ,Set/Clear Pending Bit 746" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND745  ,Set/Clear Pending Bit 745" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND744  ,Set/Clear Pending Bit 744" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND743  ,Set/Clear Pending Bit 743" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND742  ,Set/Clear Pending Bit 742" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND741  ,Set/Clear Pending Bit 741" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND740  ,Set/Clear Pending Bit 740" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND739  ,Set/Clear Pending Bit 739" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND738  ,Set/Clear Pending Bit 738" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND737  ,Set/Clear Pending Bit 737" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND736  ,Set/Clear Pending Bit 736" "Not pending,Pending"
else
hgroup.long 0x025C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0x0260++0x03
line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND799  ,Set/Clear Pending Bit 799" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND798  ,Set/Clear Pending Bit 798" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND797  ,Set/Clear Pending Bit 797" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND796  ,Set/Clear Pending Bit 796" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND795  ,Set/Clear Pending Bit 795" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND794  ,Set/Clear Pending Bit 794" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND793  ,Set/Clear Pending Bit 793" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND792  ,Set/Clear Pending Bit 792" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND791  ,Set/Clear Pending Bit 791" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND790  ,Set/Clear Pending Bit 790" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND789  ,Set/Clear Pending Bit 789" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND788  ,Set/Clear Pending Bit 788" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND787  ,Set/Clear Pending Bit 787" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND786  ,Set/Clear Pending Bit 786" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND785  ,Set/Clear Pending Bit 785" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND784  ,Set/Clear Pending Bit 784" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND783  ,Set/Clear Pending Bit 783" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND782  ,Set/Clear Pending Bit 782" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND781  ,Set/Clear Pending Bit 781" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND780  ,Set/Clear Pending Bit 780" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND779  ,Set/Clear Pending Bit 779" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND778  ,Set/Clear Pending Bit 778" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND777  ,Set/Clear Pending Bit 777" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND776  ,Set/Clear Pending Bit 776" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND775  ,Set/Clear Pending Bit 775" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND774  ,Set/Clear Pending Bit 774" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND773  ,Set/Clear Pending Bit 773" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND772  ,Set/Clear Pending Bit 772" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND771  ,Set/Clear Pending Bit 771" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND770  ,Set/Clear Pending Bit 770" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND769  ,Set/Clear Pending Bit 769" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND768  ,Set/Clear Pending Bit 768" "Not pending,Pending"
else
hgroup.long 0x0260++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0x0264++0x03
line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND831  ,Set/Clear Pending Bit 831" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND830  ,Set/Clear Pending Bit 830" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND829  ,Set/Clear Pending Bit 829" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND828  ,Set/Clear Pending Bit 828" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND827  ,Set/Clear Pending Bit 827" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND826  ,Set/Clear Pending Bit 826" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND825  ,Set/Clear Pending Bit 825" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND824  ,Set/Clear Pending Bit 824" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND823  ,Set/Clear Pending Bit 823" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND822  ,Set/Clear Pending Bit 822" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND821  ,Set/Clear Pending Bit 821" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND820  ,Set/Clear Pending Bit 820" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND819  ,Set/Clear Pending Bit 819" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND818  ,Set/Clear Pending Bit 818" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND817  ,Set/Clear Pending Bit 817" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND816  ,Set/Clear Pending Bit 816" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND815  ,Set/Clear Pending Bit 815" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND814  ,Set/Clear Pending Bit 814" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND813  ,Set/Clear Pending Bit 813" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND812  ,Set/Clear Pending Bit 812" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND811  ,Set/Clear Pending Bit 811" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND810  ,Set/Clear Pending Bit 810" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND809  ,Set/Clear Pending Bit 809" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND808  ,Set/Clear Pending Bit 808" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND807  ,Set/Clear Pending Bit 807" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND806  ,Set/Clear Pending Bit 806" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND805  ,Set/Clear Pending Bit 805" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND804  ,Set/Clear Pending Bit 804" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND803  ,Set/Clear Pending Bit 803" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND802  ,Set/Clear Pending Bit 802" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND801  ,Set/Clear Pending Bit 801" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND800  ,Set/Clear Pending Bit 800" "Not pending,Pending"
else
hgroup.long 0x0264++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0x0268++0x03
line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND863  ,Set/Clear Pending Bit 863" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND862  ,Set/Clear Pending Bit 862" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND861  ,Set/Clear Pending Bit 861" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND860  ,Set/Clear Pending Bit 860" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND859  ,Set/Clear Pending Bit 859" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND858  ,Set/Clear Pending Bit 858" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND857  ,Set/Clear Pending Bit 857" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND856  ,Set/Clear Pending Bit 856" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND855  ,Set/Clear Pending Bit 855" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND854  ,Set/Clear Pending Bit 854" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND853  ,Set/Clear Pending Bit 853" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND852  ,Set/Clear Pending Bit 852" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND851  ,Set/Clear Pending Bit 851" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND850  ,Set/Clear Pending Bit 850" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND849  ,Set/Clear Pending Bit 849" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND848  ,Set/Clear Pending Bit 848" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND847  ,Set/Clear Pending Bit 847" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND846  ,Set/Clear Pending Bit 846" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND845  ,Set/Clear Pending Bit 845" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND844  ,Set/Clear Pending Bit 844" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND843  ,Set/Clear Pending Bit 843" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND842  ,Set/Clear Pending Bit 842" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND841  ,Set/Clear Pending Bit 841" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND840  ,Set/Clear Pending Bit 840" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND839  ,Set/Clear Pending Bit 839" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND838  ,Set/Clear Pending Bit 838" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND837  ,Set/Clear Pending Bit 837" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND836  ,Set/Clear Pending Bit 836" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND835  ,Set/Clear Pending Bit 835" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND834  ,Set/Clear Pending Bit 834" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND833  ,Set/Clear Pending Bit 833" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND832  ,Set/Clear Pending Bit 832" "Not pending,Pending"
else
hgroup.long 0x0268++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0x026C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND895  ,Set/Clear Pending Bit 895" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND894  ,Set/Clear Pending Bit 894" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND893  ,Set/Clear Pending Bit 893" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND892  ,Set/Clear Pending Bit 892" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND891  ,Set/Clear Pending Bit 891" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND890  ,Set/Clear Pending Bit 890" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND889  ,Set/Clear Pending Bit 889" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND888  ,Set/Clear Pending Bit 888" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND887  ,Set/Clear Pending Bit 887" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND886  ,Set/Clear Pending Bit 886" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND885  ,Set/Clear Pending Bit 885" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND884  ,Set/Clear Pending Bit 884" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND883  ,Set/Clear Pending Bit 883" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND882  ,Set/Clear Pending Bit 882" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND881  ,Set/Clear Pending Bit 881" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND880  ,Set/Clear Pending Bit 880" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND879  ,Set/Clear Pending Bit 879" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND878  ,Set/Clear Pending Bit 878" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND877  ,Set/Clear Pending Bit 877" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND876  ,Set/Clear Pending Bit 876" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND875  ,Set/Clear Pending Bit 875" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND874  ,Set/Clear Pending Bit 874" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND873  ,Set/Clear Pending Bit 873" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND872  ,Set/Clear Pending Bit 872" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND871  ,Set/Clear Pending Bit 871" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND870  ,Set/Clear Pending Bit 870" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND869  ,Set/Clear Pending Bit 869" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND868  ,Set/Clear Pending Bit 868" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND867  ,Set/Clear Pending Bit 867" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND866  ,Set/Clear Pending Bit 866" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND865  ,Set/Clear Pending Bit 865" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND864  ,Set/Clear Pending Bit 864" "Not pending,Pending"
else
hgroup.long 0x026C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0x0270++0x03
line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND927  ,Set/Clear Pending Bit 927" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND926  ,Set/Clear Pending Bit 926" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND925  ,Set/Clear Pending Bit 925" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND924  ,Set/Clear Pending Bit 924" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND923  ,Set/Clear Pending Bit 923" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND922  ,Set/Clear Pending Bit 922" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND921  ,Set/Clear Pending Bit 921" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND920  ,Set/Clear Pending Bit 920" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND919  ,Set/Clear Pending Bit 919" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND918  ,Set/Clear Pending Bit 918" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND917  ,Set/Clear Pending Bit 917" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND916  ,Set/Clear Pending Bit 916" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND915  ,Set/Clear Pending Bit 915" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND914  ,Set/Clear Pending Bit 914" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND913  ,Set/Clear Pending Bit 913" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND912  ,Set/Clear Pending Bit 912" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND911  ,Set/Clear Pending Bit 911" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND910  ,Set/Clear Pending Bit 910" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND909  ,Set/Clear Pending Bit 909" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND908  ,Set/Clear Pending Bit 908" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND907  ,Set/Clear Pending Bit 907" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND906  ,Set/Clear Pending Bit 906" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND905  ,Set/Clear Pending Bit 905" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND904  ,Set/Clear Pending Bit 904" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND903  ,Set/Clear Pending Bit 903" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND902  ,Set/Clear Pending Bit 902" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND901  ,Set/Clear Pending Bit 901" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND900  ,Set/Clear Pending Bit 900" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND899  ,Set/Clear Pending Bit 899" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND898  ,Set/Clear Pending Bit 898" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND897  ,Set/Clear Pending Bit 897" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND896  ,Set/Clear Pending Bit 896" "Not pending,Pending"
else
hgroup.long 0x0270++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0x0274++0x03
line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND959  ,Set/Clear Pending Bit 959" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND958  ,Set/Clear Pending Bit 958" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND957  ,Set/Clear Pending Bit 957" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND956  ,Set/Clear Pending Bit 956" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND955  ,Set/Clear Pending Bit 955" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND954  ,Set/Clear Pending Bit 954" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND953  ,Set/Clear Pending Bit 953" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND952  ,Set/Clear Pending Bit 952" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND951  ,Set/Clear Pending Bit 951" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND950  ,Set/Clear Pending Bit 950" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND949  ,Set/Clear Pending Bit 949" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND948  ,Set/Clear Pending Bit 948" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND947  ,Set/Clear Pending Bit 947" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND946  ,Set/Clear Pending Bit 946" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND945  ,Set/Clear Pending Bit 945" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND944  ,Set/Clear Pending Bit 944" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND943  ,Set/Clear Pending Bit 943" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND942  ,Set/Clear Pending Bit 942" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND941  ,Set/Clear Pending Bit 941" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND940  ,Set/Clear Pending Bit 940" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND939  ,Set/Clear Pending Bit 939" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND938  ,Set/Clear Pending Bit 938" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND937  ,Set/Clear Pending Bit 937" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND936  ,Set/Clear Pending Bit 936" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND935  ,Set/Clear Pending Bit 935" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND934  ,Set/Clear Pending Bit 934" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND933  ,Set/Clear Pending Bit 933" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND932  ,Set/Clear Pending Bit 932" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND931  ,Set/Clear Pending Bit 931" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND930  ,Set/Clear Pending Bit 930" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND929  ,Set/Clear Pending Bit 929" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND928  ,Set/Clear Pending Bit 928" "Not pending,Pending"
else
hgroup.long 0x0274++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0x0278++0x03
line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND991  ,Set/Clear Pending Bit 991" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND990  ,Set/Clear Pending Bit 990" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND989  ,Set/Clear Pending Bit 989" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND988  ,Set/Clear Pending Bit 988" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND987  ,Set/Clear Pending Bit 987" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND986  ,Set/Clear Pending Bit 986" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND985  ,Set/Clear Pending Bit 985" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND984  ,Set/Clear Pending Bit 984" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND983  ,Set/Clear Pending Bit 983" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND982  ,Set/Clear Pending Bit 982" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND981  ,Set/Clear Pending Bit 981" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND980  ,Set/Clear Pending Bit 980" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND979  ,Set/Clear Pending Bit 979" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND978  ,Set/Clear Pending Bit 978" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND977  ,Set/Clear Pending Bit 977" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND976  ,Set/Clear Pending Bit 976" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND975  ,Set/Clear Pending Bit 975" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND974  ,Set/Clear Pending Bit 974" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND973  ,Set/Clear Pending Bit 973" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND972  ,Set/Clear Pending Bit 972" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND971  ,Set/Clear Pending Bit 971" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND970  ,Set/Clear Pending Bit 970" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND969  ,Set/Clear Pending Bit 969" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND968  ,Set/Clear Pending Bit 968" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND967  ,Set/Clear Pending Bit 967" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND966  ,Set/Clear Pending Bit 966" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND965  ,Set/Clear Pending Bit 965" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND964  ,Set/Clear Pending Bit 964" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND963  ,Set/Clear Pending Bit 963" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND962  ,Set/Clear Pending Bit 962" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND961  ,Set/Clear Pending Bit 961" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND960  ,Set/Clear Pending Bit 960" "Not pending,Pending"
else
hgroup.long 0x0278++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
endif
tree.end
width 24.
tree "Set/Clear Active Registers"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x0300++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
else
group.long 0x0300++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE31  ,Set/Clear Active Bit 31" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE30  ,Set/Clear Active Bit 30" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE29  ,Set/Clear Active Bit 29" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE28  ,Set/Clear Active Bit 28" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE27  ,Set/Clear Active Bit 27" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE26  ,Set/Clear Active Bit 26" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE25  ,Set/Clear Active Bit 25" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE24  ,Set/Clear Active Bit 24" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE23  ,Set/Clear Active Bit 23" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE22  ,Set/Clear Active Bit 22" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE21  ,Set/Clear Active Bit 21" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE20  ,Set/Clear Active Bit 20" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE19  ,Set/Clear Active Bit 19" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE18  ,Set/Clear Active Bit 18" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE17  ,Set/Clear Active Bit 17" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE16  ,Set/Clear Active Bit 16" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE15  ,Set/Clear Active Bit 15" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE14  ,Set/Clear Active Bit 14" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE13  ,Set/Clear Active Bit 13" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE12  ,Set/Clear Active Bit 12" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE11  ,Set/Clear Active Bit 11" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE10  ,Set/Clear Active Bit 10" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE9   ,Set/Clear Active Bit 9" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE8   ,Set/Clear Active Bit 8" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE7   ,Set/Clear Active Bit 7" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE6   ,Set/Clear Active Bit 6" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE5   ,Set/Clear Active Bit 5" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE4   ,Set/Clear Active Bit 4" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE3   ,Set/Clear Active Bit 3" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE2   ,Set/Clear Active Bit 2" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE1   ,Set/Clear Active Bit 1" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE0   ,Set/Clear Active Bit 0" "Not active,Active"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x0304++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE63  ,Set/Clear Active Bit 63" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE62  ,Set/Clear Active Bit 62" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE61  ,Set/Clear Active Bit 61" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE60  ,Set/Clear Active Bit 60" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE59  ,Set/Clear Active Bit 59" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE58  ,Set/Clear Active Bit 58" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE57  ,Set/Clear Active Bit 57" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE56  ,Set/Clear Active Bit 56" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE55  ,Set/Clear Active Bit 55" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE54  ,Set/Clear Active Bit 54" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE53  ,Set/Clear Active Bit 53" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE52  ,Set/Clear Active Bit 52" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE51  ,Set/Clear Active Bit 51" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE50  ,Set/Clear Active Bit 50" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE49  ,Set/Clear Active Bit 49" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE48  ,Set/Clear Active Bit 48" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE47  ,Set/Clear Active Bit 47" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE46  ,Set/Clear Active Bit 46" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE45  ,Set/Clear Active Bit 45" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE44  ,Set/Clear Active Bit 44" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE43  ,Set/Clear Active Bit 43" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE42  ,Set/Clear Active Bit 42" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE41  ,Set/Clear Active Bit 41" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE40  ,Set/Clear Active Bit 40" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE39  ,Set/Clear Active Bit 39" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE38  ,Set/Clear Active Bit 38" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE37  ,Set/Clear Active Bit 37" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE36  ,Set/Clear Active Bit 36" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE35  ,Set/Clear Active Bit 35" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE34  ,Set/Clear Active Bit 34" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE33  ,Set/Clear Active Bit 33" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE32  ,Set/Clear Active Bit 32" "Not active,Active"
else
hgroup.long 0x0304++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x0308++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE95  ,Set/Clear Active Bit 95" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE94  ,Set/Clear Active Bit 94" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE93  ,Set/Clear Active Bit 93" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE92  ,Set/Clear Active Bit 92" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE91  ,Set/Clear Active Bit 91" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE90  ,Set/Clear Active Bit 90" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE89  ,Set/Clear Active Bit 89" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE88  ,Set/Clear Active Bit 88" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE87  ,Set/Clear Active Bit 87" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE86  ,Set/Clear Active Bit 86" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE85  ,Set/Clear Active Bit 85" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE84  ,Set/Clear Active Bit 84" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE83  ,Set/Clear Active Bit 83" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE82  ,Set/Clear Active Bit 82" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE81  ,Set/Clear Active Bit 81" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE80  ,Set/Clear Active Bit 80" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE79  ,Set/Clear Active Bit 79" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE78  ,Set/Clear Active Bit 78" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE77  ,Set/Clear Active Bit 77" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE76  ,Set/Clear Active Bit 76" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE75  ,Set/Clear Active Bit 75" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE74  ,Set/Clear Active Bit 74" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE73  ,Set/Clear Active Bit 73" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE72  ,Set/Clear Active Bit 72" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE71  ,Set/Clear Active Bit 71" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE70  ,Set/Clear Active Bit 70" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE69  ,Set/Clear Active Bit 69" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE68  ,Set/Clear Active Bit 68" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE67  ,Set/Clear Active Bit 67" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE66  ,Set/Clear Active Bit 66" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE65  ,Set/Clear Active Bit 65" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE64  ,Set/Clear Active Bit 64" "Not active,Active"
else
hgroup.long 0x0308++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x030C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE127 ,Set/Clear Active Bit 127" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE126 ,Set/Clear Active Bit 126" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE125 ,Set/Clear Active Bit 125" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE124 ,Set/Clear Active Bit 124" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE123 ,Set/Clear Active Bit 123" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE122 ,Set/Clear Active Bit 122" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE121 ,Set/Clear Active Bit 121" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE120 ,Set/Clear Active Bit 120" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE119 ,Set/Clear Active Bit 119" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE118 ,Set/Clear Active Bit 118" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE117 ,Set/Clear Active Bit 117" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE116 ,Set/Clear Active Bit 116" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE115 ,Set/Clear Active Bit 115" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE114 ,Set/Clear Active Bit 114" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE113 ,Set/Clear Active Bit 113" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE112 ,Set/Clear Active Bit 112" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE111 ,Set/Clear Active Bit 111" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE110 ,Set/Clear Active Bit 110" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE109 ,Set/Clear Active Bit 109" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE108 ,Set/Clear Active Bit 108" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE107 ,Set/Clear Active Bit 107" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE106 ,Set/Clear Active Bit 106" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE105 ,Set/Clear Active Bit 105" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE104 ,Set/Clear Active Bit 104" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE103 ,Set/Clear Active Bit 103" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE102 ,Set/Clear Active Bit 102" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE101 ,Set/Clear Active Bit 101" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE100 ,Set/Clear Active Bit 100" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE99  ,Set/Clear Active Bit 99" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE98  ,Set/Clear Active Bit 98" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE97  ,Set/Clear Active Bit 97" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE96  ,Set/Clear Active Bit 96" "Not active,Active"
else
hgroup.long 0x030C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x0310++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE159 ,Set/Clear Active Bit 159" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE158 ,Set/Clear Active Bit 158" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE157 ,Set/Clear Active Bit 157" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE156 ,Set/Clear Active Bit 156" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE155 ,Set/Clear Active Bit 155" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE154 ,Set/Clear Active Bit 154" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE153 ,Set/Clear Active Bit 153" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE152 ,Set/Clear Active Bit 152" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE151 ,Set/Clear Active Bit 151" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE150 ,Set/Clear Active Bit 150" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE149 ,Set/Clear Active Bit 149" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE148 ,Set/Clear Active Bit 148" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE147 ,Set/Clear Active Bit 147" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE146 ,Set/Clear Active Bit 146" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE145 ,Set/Clear Active Bit 145" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE144 ,Set/Clear Active Bit 144" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE143 ,Set/Clear Active Bit 143" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE142 ,Set/Clear Active Bit 142" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE141 ,Set/Clear Active Bit 141" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE140 ,Set/Clear Active Bit 140" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE139 ,Set/Clear Active Bit 139" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE138 ,Set/Clear Active Bit 138" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE137 ,Set/Clear Active Bit 137" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE136 ,Set/Clear Active Bit 136" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE135 ,Set/Clear Active Bit 135" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE134 ,Set/Clear Active Bit 134" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE133 ,Set/Clear Active Bit 133" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE132 ,Set/Clear Active Bit 132" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE131 ,Set/Clear Active Bit 131" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE130 ,Set/Clear Active Bit 130" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE129 ,Set/Clear Active Bit 129" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE128 ,Set/Clear Active Bit 128" "Not active,Active"
else
hgroup.long 0x0310++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x0314++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE191 ,Set/Clear Active Bit 191" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE190 ,Set/Clear Active Bit 190" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE189 ,Set/Clear Active Bit 189" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE188 ,Set/Clear Active Bit 188" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE187 ,Set/Clear Active Bit 187" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE186 ,Set/Clear Active Bit 186" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE185 ,Set/Clear Active Bit 185" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE184 ,Set/Clear Active Bit 184" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE183 ,Set/Clear Active Bit 183" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE182 ,Set/Clear Active Bit 182" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE181 ,Set/Clear Active Bit 181" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE180 ,Set/Clear Active Bit 180" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE179 ,Set/Clear Active Bit 179" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE178 ,Set/Clear Active Bit 178" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE177 ,Set/Clear Active Bit 177" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE176 ,Set/Clear Active Bit 176" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE175 ,Set/Clear Active Bit 175" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE174 ,Set/Clear Active Bit 174" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE173 ,Set/Clear Active Bit 173" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE172 ,Set/Clear Active Bit 172" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE171 ,Set/Clear Active Bit 171" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE170 ,Set/Clear Active Bit 170" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE169 ,Set/Clear Active Bit 169" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE168 ,Set/Clear Active Bit 168" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE167 ,Set/Clear Active Bit 167" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE166 ,Set/Clear Active Bit 166" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE165 ,Set/Clear Active Bit 165" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE164 ,Set/Clear Active Bit 164" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE163 ,Set/Clear Active Bit 163" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE162 ,Set/Clear Active Bit 162" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE161 ,Set/Clear Active Bit 161" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE160 ,Set/Clear Active Bit 160" "Not active,Active"
else
hgroup.long 0x0314++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x0318++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE223 ,Set/Clear Active Bit 223" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE222 ,Set/Clear Active Bit 222" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE221 ,Set/Clear Active Bit 221" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE220 ,Set/Clear Active Bit 220" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE219 ,Set/Clear Active Bit 219" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE218 ,Set/Clear Active Bit 218" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE217 ,Set/Clear Active Bit 217" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE216 ,Set/Clear Active Bit 216" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE215 ,Set/Clear Active Bit 215" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE214 ,Set/Clear Active Bit 214" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE213 ,Set/Clear Active Bit 213" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE212 ,Set/Clear Active Bit 212" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE211 ,Set/Clear Active Bit 211" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE210 ,Set/Clear Active Bit 210" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE209 ,Set/Clear Active Bit 209" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE208 ,Set/Clear Active Bit 208" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE207 ,Set/Clear Active Bit 207" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE206 ,Set/Clear Active Bit 206" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE205 ,Set/Clear Active Bit 205" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE204 ,Set/Clear Active Bit 204" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE203 ,Set/Clear Active Bit 203" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE202 ,Set/Clear Active Bit 202" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE201 ,Set/Clear Active Bit 201" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE200 ,Set/Clear Active Bit 200" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE199 ,Set/Clear Active Bit 199" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE198 ,Set/Clear Active Bit 198" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE197 ,Set/Clear Active Bit 197" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE196 ,Set/Clear Active Bit 196" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE195 ,Set/Clear Active Bit 195" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE194 ,Set/Clear Active Bit 194" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE193 ,Set/Clear Active Bit 193" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE192 ,Set/Clear Active Bit 192" "Not active,Active"
else
hgroup.long 0x0318++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x031C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE255 ,Set/Clear Active Bit 255" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE254 ,Set/Clear Active Bit 254" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE253 ,Set/Clear Active Bit 253" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE252 ,Set/Clear Active Bit 252" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE251 ,Set/Clear Active Bit 251" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE250 ,Set/Clear Active Bit 250" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE249 ,Set/Clear Active Bit 249" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE248 ,Set/Clear Active Bit 248" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE247 ,Set/Clear Active Bit 247" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE246 ,Set/Clear Active Bit 246" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE245 ,Set/Clear Active Bit 245" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE244 ,Set/Clear Active Bit 244" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE243 ,Set/Clear Active Bit 243" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE242 ,Set/Clear Active Bit 242" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE241 ,Set/Clear Active Bit 241" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE240 ,Set/Clear Active Bit 240" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE239 ,Set/Clear Active Bit 239" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE238 ,Set/Clear Active Bit 238" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE237 ,Set/Clear Active Bit 237" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE236 ,Set/Clear Active Bit 236" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE235 ,Set/Clear Active Bit 235" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE234 ,Set/Clear Active Bit 234" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE233 ,Set/Clear Active Bit 233" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE232 ,Set/Clear Active Bit 232" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE231 ,Set/Clear Active Bit 231" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE230 ,Set/Clear Active Bit 230" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE229 ,Set/Clear Active Bit 229" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE228 ,Set/Clear Active Bit 228" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE227 ,Set/Clear Active Bit 227" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE226 ,Set/Clear Active Bit 226" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE225 ,Set/Clear Active Bit 225" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE224 ,Set/Clear Active Bit 224" "Not active,Active"
else
hgroup.long 0x031C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x0320++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE287 ,Set/Clear Active Bit 287" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE286 ,Set/Clear Active Bit 286" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE285 ,Set/Clear Active Bit 285" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE284 ,Set/Clear Active Bit 284" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE283 ,Set/Clear Active Bit 283" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE282 ,Set/Clear Active Bit 282" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE281 ,Set/Clear Active Bit 281" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE280 ,Set/Clear Active Bit 280" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE279 ,Set/Clear Active Bit 279" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE278 ,Set/Clear Active Bit 278" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE277 ,Set/Clear Active Bit 277" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE276 ,Set/Clear Active Bit 276" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE275 ,Set/Clear Active Bit 275" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE274 ,Set/Clear Active Bit 274" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE273 ,Set/Clear Active Bit 273" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE272 ,Set/Clear Active Bit 272" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE271 ,Set/Clear Active Bit 271" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE270 ,Set/Clear Active Bit 270" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE269 ,Set/Clear Active Bit 269" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE268 ,Set/Clear Active Bit 268" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE267 ,Set/Clear Active Bit 267" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE266 ,Set/Clear Active Bit 266" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE265 ,Set/Clear Active Bit 265" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE264 ,Set/Clear Active Bit 264" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE263 ,Set/Clear Active Bit 263" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE262 ,Set/Clear Active Bit 262" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE261 ,Set/Clear Active Bit 261" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE260 ,Set/Clear Active Bit 260" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE259 ,Set/Clear Active Bit 259" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE258 ,Set/Clear Active Bit 258" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE257 ,Set/Clear Active Bit 257" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE256 ,Set/Clear Active Bit 256" "Not active,Active"
else
hgroup.long 0x0320++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x0324++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE319 ,Set/Clear Active Bit 319" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE318 ,Set/Clear Active Bit 318" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE317 ,Set/Clear Active Bit 317" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE316 ,Set/Clear Active Bit 316" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE315 ,Set/Clear Active Bit 315" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE314 ,Set/Clear Active Bit 314" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE313 ,Set/Clear Active Bit 313" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE312 ,Set/Clear Active Bit 312" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE311 ,Set/Clear Active Bit 311" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE310 ,Set/Clear Active Bit 310" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE309 ,Set/Clear Active Bit 309" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE308 ,Set/Clear Active Bit 308" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE307 ,Set/Clear Active Bit 307" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE306 ,Set/Clear Active Bit 306" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE305 ,Set/Clear Active Bit 305" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE304 ,Set/Clear Active Bit 304" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE303 ,Set/Clear Active Bit 303" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE302 ,Set/Clear Active Bit 302" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE301 ,Set/Clear Active Bit 301" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE300 ,Set/Clear Active Bit 300" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE299 ,Set/Clear Active Bit 299" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE298 ,Set/Clear Active Bit 298" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE297 ,Set/Clear Active Bit 297" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE296 ,Set/Clear Active Bit 296" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE295 ,Set/Clear Active Bit 295" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE294 ,Set/Clear Active Bit 294" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE293 ,Set/Clear Active Bit 293" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE292 ,Set/Clear Active Bit 292" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE291 ,Set/Clear Active Bit 291" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE290 ,Set/Clear Active Bit 290" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE289 ,Set/Clear Active Bit 289" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE288 ,Set/Clear Active Bit 288" "Not active,Active"
else
hgroup.long 0x0324++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x0328++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE351 ,Set/Clear Active Bit 351" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE350 ,Set/Clear Active Bit 350" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE349 ,Set/Clear Active Bit 349" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE348 ,Set/Clear Active Bit 348" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE347 ,Set/Clear Active Bit 347" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE346 ,Set/Clear Active Bit 346" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE345 ,Set/Clear Active Bit 345" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE344 ,Set/Clear Active Bit 344" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE343 ,Set/Clear Active Bit 343" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE342 ,Set/Clear Active Bit 342" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE341 ,Set/Clear Active Bit 341" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE340 ,Set/Clear Active Bit 340" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE339 ,Set/Clear Active Bit 339" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE338 ,Set/Clear Active Bit 338" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE337 ,Set/Clear Active Bit 337" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE336 ,Set/Clear Active Bit 336" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE335 ,Set/Clear Active Bit 335" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE334 ,Set/Clear Active Bit 334" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE333 ,Set/Clear Active Bit 333" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE332 ,Set/Clear Active Bit 332" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE331 ,Set/Clear Active Bit 331" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE330 ,Set/Clear Active Bit 330" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE329 ,Set/Clear Active Bit 329" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE328 ,Set/Clear Active Bit 328" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE327 ,Set/Clear Active Bit 327" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE326 ,Set/Clear Active Bit 326" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE325 ,Set/Clear Active Bit 325" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE324 ,Set/Clear Active Bit 324" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE323 ,Set/Clear Active Bit 323" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE322 ,Set/Clear Active Bit 322" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE321 ,Set/Clear Active Bit 321" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE320 ,Set/Clear Active Bit 320" "Not active,Active"
else
hgroup.long 0x0328++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x032C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE383 ,Set/Clear Active Bit 383" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE382 ,Set/Clear Active Bit 382" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE381 ,Set/Clear Active Bit 381" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE380 ,Set/Clear Active Bit 380" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE379 ,Set/Clear Active Bit 379" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE378 ,Set/Clear Active Bit 378" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE377 ,Set/Clear Active Bit 377" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE376 ,Set/Clear Active Bit 376" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE375 ,Set/Clear Active Bit 375" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE374 ,Set/Clear Active Bit 374" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE373 ,Set/Clear Active Bit 373" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE372 ,Set/Clear Active Bit 372" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE371 ,Set/Clear Active Bit 371" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE370 ,Set/Clear Active Bit 370" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE369 ,Set/Clear Active Bit 369" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE368 ,Set/Clear Active Bit 368" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE367 ,Set/Clear Active Bit 367" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE366 ,Set/Clear Active Bit 366" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE365 ,Set/Clear Active Bit 365" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE364 ,Set/Clear Active Bit 364" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE363 ,Set/Clear Active Bit 363" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE362 ,Set/Clear Active Bit 362" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE361 ,Set/Clear Active Bit 361" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE360 ,Set/Clear Active Bit 360" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE359 ,Set/Clear Active Bit 359" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE358 ,Set/Clear Active Bit 358" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE357 ,Set/Clear Active Bit 357" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE356 ,Set/Clear Active Bit 356" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE355 ,Set/Clear Active Bit 355" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE354 ,Set/Clear Active Bit 354" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE353 ,Set/Clear Active Bit 353" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE352 ,Set/Clear Active Bit 352" "Not active,Active"
else
hgroup.long 0x032C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x0330++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE415 ,Set/Clear Active Bit 415" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE414 ,Set/Clear Active Bit 414" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE413 ,Set/Clear Active Bit 413" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE412 ,Set/Clear Active Bit 412" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE411 ,Set/Clear Active Bit 411" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE410 ,Set/Clear Active Bit 410" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE409 ,Set/Clear Active Bit 409" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE408 ,Set/Clear Active Bit 408" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE407 ,Set/Clear Active Bit 407" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE406 ,Set/Clear Active Bit 406" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE405 ,Set/Clear Active Bit 405" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE404 ,Set/Clear Active Bit 404" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE403 ,Set/Clear Active Bit 403" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE402 ,Set/Clear Active Bit 402" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE401 ,Set/Clear Active Bit 401" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE400 ,Set/Clear Active Bit 400" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE399 ,Set/Clear Active Bit 399" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE398 ,Set/Clear Active Bit 398" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE397 ,Set/Clear Active Bit 397" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE396 ,Set/Clear Active Bit 396" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE395 ,Set/Clear Active Bit 395" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE394 ,Set/Clear Active Bit 394" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE393 ,Set/Clear Active Bit 393" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE392 ,Set/Clear Active Bit 392" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE391 ,Set/Clear Active Bit 391" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE390 ,Set/Clear Active Bit 390" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE389 ,Set/Clear Active Bit 389" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE388 ,Set/Clear Active Bit 388" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE387 ,Set/Clear Active Bit 387" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE386 ,Set/Clear Active Bit 386" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE385 ,Set/Clear Active Bit 385" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE384 ,Set/Clear Active Bit 384" "Not active,Active"
else
hgroup.long 0x0330++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x0334++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE447 ,Set/Clear Active Bit 447" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE446 ,Set/Clear Active Bit 446" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE445 ,Set/Clear Active Bit 445" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE444 ,Set/Clear Active Bit 444" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE443 ,Set/Clear Active Bit 443" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE442 ,Set/Clear Active Bit 442" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE441 ,Set/Clear Active Bit 441" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE440 ,Set/Clear Active Bit 440" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE439 ,Set/Clear Active Bit 439" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE438 ,Set/Clear Active Bit 438" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE437 ,Set/Clear Active Bit 437" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE436 ,Set/Clear Active Bit 436" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE435 ,Set/Clear Active Bit 435" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE434 ,Set/Clear Active Bit 434" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE433 ,Set/Clear Active Bit 433" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE432 ,Set/Clear Active Bit 432" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE431 ,Set/Clear Active Bit 431" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE430 ,Set/Clear Active Bit 430" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE429 ,Set/Clear Active Bit 429" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE428 ,Set/Clear Active Bit 428" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE427 ,Set/Clear Active Bit 427" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE426 ,Set/Clear Active Bit 426" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE425 ,Set/Clear Active Bit 425" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE424 ,Set/Clear Active Bit 424" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE423 ,Set/Clear Active Bit 423" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE422 ,Set/Clear Active Bit 422" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE421 ,Set/Clear Active Bit 421" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE420 ,Set/Clear Active Bit 420" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE419 ,Set/Clear Active Bit 419" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE418 ,Set/Clear Active Bit 418" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE417 ,Set/Clear Active Bit 417" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE416 ,Set/Clear Active Bit 416" "Not active,Active"
else
hgroup.long 0x0334++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x0338++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE479 ,Set/Clear Active Bit 479" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE478 ,Set/Clear Active Bit 478" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE477 ,Set/Clear Active Bit 477" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE476 ,Set/Clear Active Bit 476" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE475 ,Set/Clear Active Bit 475" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE474 ,Set/Clear Active Bit 474" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE473 ,Set/Clear Active Bit 473" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE472 ,Set/Clear Active Bit 472" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE471 ,Set/Clear Active Bit 471" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE470 ,Set/Clear Active Bit 470" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE469 ,Set/Clear Active Bit 469" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE468 ,Set/Clear Active Bit 468" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE467 ,Set/Clear Active Bit 467" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE466 ,Set/Clear Active Bit 466" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE465 ,Set/Clear Active Bit 465" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE464 ,Set/Clear Active Bit 464" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE463 ,Set/Clear Active Bit 463" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE462 ,Set/Clear Active Bit 462" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE461 ,Set/Clear Active Bit 461" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE460 ,Set/Clear Active Bit 460" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE459 ,Set/Clear Active Bit 459" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE458 ,Set/Clear Active Bit 458" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE457 ,Set/Clear Active Bit 457" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE456 ,Set/Clear Active Bit 456" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE455 ,Set/Clear Active Bit 455" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE454 ,Set/Clear Active Bit 454" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE453 ,Set/Clear Active Bit 453" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE452 ,Set/Clear Active Bit 452" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE451 ,Set/Clear Active Bit 451" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE450 ,Set/Clear Active Bit 450" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE449 ,Set/Clear Active Bit 449" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE448 ,Set/Clear Active Bit 448" "Not active,Active"
else
hgroup.long 0x0338++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x033C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE511 ,Set/Clear Active Bit 511" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE510 ,Set/Clear Active Bit 510" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE509 ,Set/Clear Active Bit 509" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE508 ,Set/Clear Active Bit 508" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE507 ,Set/Clear Active Bit 507" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE506 ,Set/Clear Active Bit 506" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE505 ,Set/Clear Active Bit 505" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE504 ,Set/Clear Active Bit 504" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE503 ,Set/Clear Active Bit 503" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE502 ,Set/Clear Active Bit 502" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE501 ,Set/Clear Active Bit 501" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE500 ,Set/Clear Active Bit 500" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE499 ,Set/Clear Active Bit 499" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE498 ,Set/Clear Active Bit 498" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE497 ,Set/Clear Active Bit 497" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE496 ,Set/Clear Active Bit 496" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE495 ,Set/Clear Active Bit 495" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE494 ,Set/Clear Active Bit 494" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE493 ,Set/Clear Active Bit 493" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE492 ,Set/Clear Active Bit 492" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE491 ,Set/Clear Active Bit 491" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE490 ,Set/Clear Active Bit 490" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE489 ,Set/Clear Active Bit 489" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE488 ,Set/Clear Active Bit 488" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE487 ,Set/Clear Active Bit 487" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE486 ,Set/Clear Active Bit 486" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE485 ,Set/Clear Active Bit 485" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE484 ,Set/Clear Active Bit 484" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE483 ,Set/Clear Active Bit 483" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE482 ,Set/Clear Active Bit 482" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE481 ,Set/Clear Active Bit 481" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE480 ,Set/Clear Active Bit 480" "Not active,Active"
else
hgroup.long 0x033C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0x0340++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE543 ,Set/Clear Active Bit 543" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE542 ,Set/Clear Active Bit 542" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE541 ,Set/Clear Active Bit 541" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE540 ,Set/Clear Active Bit 540" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE539 ,Set/Clear Active Bit 539" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE538 ,Set/Clear Active Bit 538" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE537 ,Set/Clear Active Bit 537" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE536 ,Set/Clear Active Bit 536" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE535 ,Set/Clear Active Bit 535" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE534 ,Set/Clear Active Bit 534" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE533 ,Set/Clear Active Bit 533" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE532 ,Set/Clear Active Bit 532" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE531 ,Set/Clear Active Bit 531" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE530 ,Set/Clear Active Bit 530" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE529 ,Set/Clear Active Bit 529" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE528 ,Set/Clear Active Bit 528" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE527 ,Set/Clear Active Bit 527" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE526 ,Set/Clear Active Bit 526" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE525 ,Set/Clear Active Bit 525" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE524 ,Set/Clear Active Bit 524" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE523 ,Set/Clear Active Bit 523" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE522 ,Set/Clear Active Bit 522" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE521 ,Set/Clear Active Bit 521" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE520 ,Set/Clear Active Bit 520" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE519 ,Set/Clear Active Bit 519" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE518 ,Set/Clear Active Bit 518" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE517 ,Set/Clear Active Bit 517" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE516 ,Set/Clear Active Bit 516" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE515 ,Set/Clear Active Bit 515" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE514 ,Set/Clear Active Bit 514" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE513 ,Set/Clear Active Bit 513" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE512 ,Set/Clear Active Bit 512" "Not active,Active"
else
hgroup.long 0x0340++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0x0344++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE575 ,Set/Clear Active Bit 575" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE574 ,Set/Clear Active Bit 574" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE573 ,Set/Clear Active Bit 573" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE572 ,Set/Clear Active Bit 572" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE571 ,Set/Clear Active Bit 571" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE570 ,Set/Clear Active Bit 570" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE569 ,Set/Clear Active Bit 569" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE568 ,Set/Clear Active Bit 568" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE567 ,Set/Clear Active Bit 567" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE566 ,Set/Clear Active Bit 566" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE565 ,Set/Clear Active Bit 565" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE564 ,Set/Clear Active Bit 564" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE563 ,Set/Clear Active Bit 563" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE562 ,Set/Clear Active Bit 562" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE561 ,Set/Clear Active Bit 561" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE560 ,Set/Clear Active Bit 560" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE559 ,Set/Clear Active Bit 559" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE558 ,Set/Clear Active Bit 558" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE557 ,Set/Clear Active Bit 557" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE556 ,Set/Clear Active Bit 556" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE555 ,Set/Clear Active Bit 555" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE554 ,Set/Clear Active Bit 554" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE553 ,Set/Clear Active Bit 553" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE552 ,Set/Clear Active Bit 552" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE551 ,Set/Clear Active Bit 551" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE550 ,Set/Clear Active Bit 550" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE549 ,Set/Clear Active Bit 549" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE548 ,Set/Clear Active Bit 548" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE547 ,Set/Clear Active Bit 547" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE546 ,Set/Clear Active Bit 546" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE545 ,Set/Clear Active Bit 545" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE544 ,Set/Clear Active Bit 544" "Not active,Active"
else
hgroup.long 0x0344++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0x0348++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE607 ,Set/Clear Active Bit 607" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE606 ,Set/Clear Active Bit 606" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE605 ,Set/Clear Active Bit 605" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE604 ,Set/Clear Active Bit 604" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE603 ,Set/Clear Active Bit 603" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE602 ,Set/Clear Active Bit 602" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE601 ,Set/Clear Active Bit 601" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE600 ,Set/Clear Active Bit 600" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE599 ,Set/Clear Active Bit 599" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE598 ,Set/Clear Active Bit 598" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE597 ,Set/Clear Active Bit 597" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE596 ,Set/Clear Active Bit 596" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE595 ,Set/Clear Active Bit 595" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE594 ,Set/Clear Active Bit 594" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE593 ,Set/Clear Active Bit 593" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE592 ,Set/Clear Active Bit 592" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE591 ,Set/Clear Active Bit 591" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE590 ,Set/Clear Active Bit 590" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE589 ,Set/Clear Active Bit 589" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE588 ,Set/Clear Active Bit 588" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE587 ,Set/Clear Active Bit 587" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE586 ,Set/Clear Active Bit 586" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE585 ,Set/Clear Active Bit 585" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE584 ,Set/Clear Active Bit 584" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE583 ,Set/Clear Active Bit 583" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE582 ,Set/Clear Active Bit 582" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE581 ,Set/Clear Active Bit 581" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE580 ,Set/Clear Active Bit 580" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE579 ,Set/Clear Active Bit 579" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE578 ,Set/Clear Active Bit 578" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE577 ,Set/Clear Active Bit 577" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE576 ,Set/Clear Active Bit 576" "Not active,Active"
else
hgroup.long 0x0348++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0x034C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE639 ,Set/Clear Active Bit 639" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE638 ,Set/Clear Active Bit 638" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE637 ,Set/Clear Active Bit 637" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE636 ,Set/Clear Active Bit 636" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE635 ,Set/Clear Active Bit 635" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE634 ,Set/Clear Active Bit 634" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE633 ,Set/Clear Active Bit 633" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE632 ,Set/Clear Active Bit 632" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE631 ,Set/Clear Active Bit 631" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE630 ,Set/Clear Active Bit 630" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE629 ,Set/Clear Active Bit 629" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE628 ,Set/Clear Active Bit 628" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE627 ,Set/Clear Active Bit 627" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE626 ,Set/Clear Active Bit 626" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE625 ,Set/Clear Active Bit 625" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE624 ,Set/Clear Active Bit 624" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE623 ,Set/Clear Active Bit 623" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE622 ,Set/Clear Active Bit 622" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE621 ,Set/Clear Active Bit 621" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE620 ,Set/Clear Active Bit 620" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE619 ,Set/Clear Active Bit 619" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE618 ,Set/Clear Active Bit 618" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE617 ,Set/Clear Active Bit 617" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE616 ,Set/Clear Active Bit 616" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE615 ,Set/Clear Active Bit 615" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE614 ,Set/Clear Active Bit 614" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE613 ,Set/Clear Active Bit 613" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE612 ,Set/Clear Active Bit 612" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE611 ,Set/Clear Active Bit 611" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE610 ,Set/Clear Active Bit 610" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE609 ,Set/Clear Active Bit 609" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE608 ,Set/Clear Active Bit 608" "Not active,Active"
else
hgroup.long 0x034C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0x0350++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE671 ,Set/Clear Active Bit 671" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE670 ,Set/Clear Active Bit 670" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE669 ,Set/Clear Active Bit 669" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE668 ,Set/Clear Active Bit 668" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE667 ,Set/Clear Active Bit 667" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE666 ,Set/Clear Active Bit 666" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE665 ,Set/Clear Active Bit 665" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE664 ,Set/Clear Active Bit 664" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE663 ,Set/Clear Active Bit 663" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE662 ,Set/Clear Active Bit 662" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE661 ,Set/Clear Active Bit 661" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE660 ,Set/Clear Active Bit 660" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE659 ,Set/Clear Active Bit 659" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE658 ,Set/Clear Active Bit 658" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE657 ,Set/Clear Active Bit 657" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE656 ,Set/Clear Active Bit 656" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE655 ,Set/Clear Active Bit 655" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE654 ,Set/Clear Active Bit 654" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE653 ,Set/Clear Active Bit 653" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE652 ,Set/Clear Active Bit 652" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE651 ,Set/Clear Active Bit 651" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE650 ,Set/Clear Active Bit 650" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE649 ,Set/Clear Active Bit 649" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE648 ,Set/Clear Active Bit 648" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE647 ,Set/Clear Active Bit 647" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE646 ,Set/Clear Active Bit 646" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE645 ,Set/Clear Active Bit 645" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE644 ,Set/Clear Active Bit 644" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE643 ,Set/Clear Active Bit 643" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE642 ,Set/Clear Active Bit 642" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE641 ,Set/Clear Active Bit 641" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE640 ,Set/Clear Active Bit 640" "Not active,Active"
else
hgroup.long 0x0350++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0x0354++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE703 ,Set/Clear Active Bit 703" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE702 ,Set/Clear Active Bit 702" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE701 ,Set/Clear Active Bit 701" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE700 ,Set/Clear Active Bit 700" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE699 ,Set/Clear Active Bit 699" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE698 ,Set/Clear Active Bit 698" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE697 ,Set/Clear Active Bit 697" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE696 ,Set/Clear Active Bit 696" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE695 ,Set/Clear Active Bit 695" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE694 ,Set/Clear Active Bit 694" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE693 ,Set/Clear Active Bit 693" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE692 ,Set/Clear Active Bit 692" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE691 ,Set/Clear Active Bit 691" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE690 ,Set/Clear Active Bit 690" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE689 ,Set/Clear Active Bit 689" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE688 ,Set/Clear Active Bit 688" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE687 ,Set/Clear Active Bit 687" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE686 ,Set/Clear Active Bit 686" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE685 ,Set/Clear Active Bit 685" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE684 ,Set/Clear Active Bit 684" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE683 ,Set/Clear Active Bit 683" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE682 ,Set/Clear Active Bit 682" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE681 ,Set/Clear Active Bit 681" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE680 ,Set/Clear Active Bit 680" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE679 ,Set/Clear Active Bit 679" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE678 ,Set/Clear Active Bit 678" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE677 ,Set/Clear Active Bit 677" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE676 ,Set/Clear Active Bit 676" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE675 ,Set/Clear Active Bit 675" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE674 ,Set/Clear Active Bit 674" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE673 ,Set/Clear Active Bit 673" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE672 ,Set/Clear Active Bit 672" "Not active,Active"
else
hgroup.long 0x0354++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0x0358++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE735 ,Set/Clear Active Bit 735" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE734 ,Set/Clear Active Bit 734" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE733 ,Set/Clear Active Bit 733" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE732 ,Set/Clear Active Bit 732" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE731 ,Set/Clear Active Bit 731" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE730 ,Set/Clear Active Bit 730" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE729 ,Set/Clear Active Bit 729" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE728 ,Set/Clear Active Bit 728" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE727 ,Set/Clear Active Bit 727" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE726 ,Set/Clear Active Bit 726" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE725 ,Set/Clear Active Bit 725" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE724 ,Set/Clear Active Bit 724" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE723 ,Set/Clear Active Bit 723" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE722 ,Set/Clear Active Bit 722" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE721 ,Set/Clear Active Bit 721" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE720 ,Set/Clear Active Bit 720" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE719 ,Set/Clear Active Bit 719" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE718 ,Set/Clear Active Bit 718" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE717 ,Set/Clear Active Bit 717" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE716 ,Set/Clear Active Bit 716" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE715 ,Set/Clear Active Bit 715" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE714 ,Set/Clear Active Bit 714" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE713 ,Set/Clear Active Bit 713" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE712 ,Set/Clear Active Bit 712" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE711 ,Set/Clear Active Bit 711" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE710 ,Set/Clear Active Bit 710" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE709 ,Set/Clear Active Bit 709" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE708 ,Set/Clear Active Bit 708" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE707 ,Set/Clear Active Bit 707" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE706 ,Set/Clear Active Bit 706" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE705 ,Set/Clear Active Bit 705" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE704 ,Set/Clear Active Bit 704" "Not active,Active"
else
hgroup.long 0x0358++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0x035C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE767 ,Set/Clear Active Bit 767" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE766 ,Set/Clear Active Bit 766" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE765 ,Set/Clear Active Bit 765" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE764 ,Set/Clear Active Bit 764" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE763 ,Set/Clear Active Bit 763" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE762 ,Set/Clear Active Bit 762" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE761 ,Set/Clear Active Bit 761" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE760 ,Set/Clear Active Bit 760" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE759 ,Set/Clear Active Bit 759" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE758 ,Set/Clear Active Bit 758" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE757 ,Set/Clear Active Bit 757" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE756 ,Set/Clear Active Bit 756" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE755 ,Set/Clear Active Bit 755" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE754 ,Set/Clear Active Bit 754" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE753 ,Set/Clear Active Bit 753" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE752 ,Set/Clear Active Bit 752" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE751 ,Set/Clear Active Bit 751" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE750 ,Set/Clear Active Bit 750" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE749 ,Set/Clear Active Bit 749" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE748 ,Set/Clear Active Bit 748" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE747 ,Set/Clear Active Bit 747" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE746 ,Set/Clear Active Bit 746" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE745 ,Set/Clear Active Bit 745" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE744 ,Set/Clear Active Bit 744" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE743 ,Set/Clear Active Bit 743" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE742 ,Set/Clear Active Bit 742" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE741 ,Set/Clear Active Bit 741" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE740 ,Set/Clear Active Bit 740" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE739 ,Set/Clear Active Bit 739" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE738 ,Set/Clear Active Bit 738" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE737 ,Set/Clear Active Bit 737" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE736 ,Set/Clear Active Bit 736" "Not active,Active"
else
hgroup.long 0x035C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0x0360++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE799 ,Set/Clear Active Bit 799" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE798 ,Set/Clear Active Bit 798" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE797 ,Set/Clear Active Bit 797" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE796 ,Set/Clear Active Bit 796" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE795 ,Set/Clear Active Bit 795" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE794 ,Set/Clear Active Bit 794" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE793 ,Set/Clear Active Bit 793" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE792 ,Set/Clear Active Bit 792" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE791 ,Set/Clear Active Bit 791" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE790 ,Set/Clear Active Bit 790" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE789 ,Set/Clear Active Bit 789" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE788 ,Set/Clear Active Bit 788" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE787 ,Set/Clear Active Bit 787" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE786 ,Set/Clear Active Bit 786" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE785 ,Set/Clear Active Bit 785" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE784 ,Set/Clear Active Bit 784" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE783 ,Set/Clear Active Bit 783" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE782 ,Set/Clear Active Bit 782" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE781 ,Set/Clear Active Bit 781" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE780 ,Set/Clear Active Bit 780" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE779 ,Set/Clear Active Bit 779" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE778 ,Set/Clear Active Bit 778" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE777 ,Set/Clear Active Bit 777" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE776 ,Set/Clear Active Bit 776" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE775 ,Set/Clear Active Bit 775" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE774 ,Set/Clear Active Bit 774" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE773 ,Set/Clear Active Bit 773" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE772 ,Set/Clear Active Bit 772" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE771 ,Set/Clear Active Bit 771" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE770 ,Set/Clear Active Bit 770" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE769 ,Set/Clear Active Bit 769" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE768 ,Set/Clear Active Bit 768" "Not active,Active"
else
hgroup.long 0x0360++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0x0364++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE831 ,Set/Clear Active Bit 831" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE830 ,Set/Clear Active Bit 830" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE829 ,Set/Clear Active Bit 829" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE828 ,Set/Clear Active Bit 828" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE827 ,Set/Clear Active Bit 827" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE826 ,Set/Clear Active Bit 826" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE825 ,Set/Clear Active Bit 825" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE824 ,Set/Clear Active Bit 824" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE823 ,Set/Clear Active Bit 823" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE822 ,Set/Clear Active Bit 822" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE821 ,Set/Clear Active Bit 821" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE820 ,Set/Clear Active Bit 820" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE819 ,Set/Clear Active Bit 819" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE818 ,Set/Clear Active Bit 818" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE817 ,Set/Clear Active Bit 817" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE816 ,Set/Clear Active Bit 816" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE815 ,Set/Clear Active Bit 815" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE814 ,Set/Clear Active Bit 814" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE813 ,Set/Clear Active Bit 813" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE812 ,Set/Clear Active Bit 812" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE811 ,Set/Clear Active Bit 811" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE810 ,Set/Clear Active Bit 810" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE809 ,Set/Clear Active Bit 809" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE808 ,Set/Clear Active Bit 808" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE807 ,Set/Clear Active Bit 807" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE806 ,Set/Clear Active Bit 806" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE805 ,Set/Clear Active Bit 805" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE804 ,Set/Clear Active Bit 804" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE803 ,Set/Clear Active Bit 803" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE802 ,Set/Clear Active Bit 802" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE801 ,Set/Clear Active Bit 801" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE800 ,Set/Clear Active Bit 800" "Not active,Active"
else
hgroup.long 0x0364++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0x0368++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE863 ,Set/Clear Active Bit 863" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE862 ,Set/Clear Active Bit 862" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE861 ,Set/Clear Active Bit 861" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE860 ,Set/Clear Active Bit 860" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE859 ,Set/Clear Active Bit 859" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE858 ,Set/Clear Active Bit 858" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE857 ,Set/Clear Active Bit 857" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE856 ,Set/Clear Active Bit 856" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE855 ,Set/Clear Active Bit 855" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE854 ,Set/Clear Active Bit 854" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE853 ,Set/Clear Active Bit 853" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE852 ,Set/Clear Active Bit 852" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE851 ,Set/Clear Active Bit 851" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE850 ,Set/Clear Active Bit 850" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE849 ,Set/Clear Active Bit 849" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE848 ,Set/Clear Active Bit 848" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE847 ,Set/Clear Active Bit 847" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE846 ,Set/Clear Active Bit 846" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE845 ,Set/Clear Active Bit 845" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE844 ,Set/Clear Active Bit 844" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE843 ,Set/Clear Active Bit 843" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE842 ,Set/Clear Active Bit 842" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE841 ,Set/Clear Active Bit 841" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE840 ,Set/Clear Active Bit 840" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE839 ,Set/Clear Active Bit 839" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE838 ,Set/Clear Active Bit 838" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE837 ,Set/Clear Active Bit 837" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE836 ,Set/Clear Active Bit 836" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE835 ,Set/Clear Active Bit 835" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE834 ,Set/Clear Active Bit 834" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE833 ,Set/Clear Active Bit 833" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE832 ,Set/Clear Active Bit 832" "Not active,Active"
else
hgroup.long 0x0368++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0x036C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE895 ,Set/Clear Active Bit 895" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE894 ,Set/Clear Active Bit 894" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE893 ,Set/Clear Active Bit 893" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE892 ,Set/Clear Active Bit 892" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE891 ,Set/Clear Active Bit 891" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE890 ,Set/Clear Active Bit 890" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE889 ,Set/Clear Active Bit 889" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE888 ,Set/Clear Active Bit 888" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE887 ,Set/Clear Active Bit 887" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE886 ,Set/Clear Active Bit 886" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE885 ,Set/Clear Active Bit 885" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE884 ,Set/Clear Active Bit 884" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE883 ,Set/Clear Active Bit 883" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE882 ,Set/Clear Active Bit 882" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE881 ,Set/Clear Active Bit 881" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE880 ,Set/Clear Active Bit 880" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE879 ,Set/Clear Active Bit 879" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE878 ,Set/Clear Active Bit 878" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE877 ,Set/Clear Active Bit 877" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE876 ,Set/Clear Active Bit 876" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE875 ,Set/Clear Active Bit 875" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE874 ,Set/Clear Active Bit 874" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE873 ,Set/Clear Active Bit 873" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE872 ,Set/Clear Active Bit 872" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE871 ,Set/Clear Active Bit 871" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE870 ,Set/Clear Active Bit 870" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE869 ,Set/Clear Active Bit 869" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE868 ,Set/Clear Active Bit 868" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE867 ,Set/Clear Active Bit 867" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE866 ,Set/Clear Active Bit 866" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE865 ,Set/Clear Active Bit 865" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE864 ,Set/Clear Active Bit 864" "Not active,Active"
else
hgroup.long 0x036C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0x0370++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE927 ,Set/Clear Active Bit 927" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE926 ,Set/Clear Active Bit 926" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE925 ,Set/Clear Active Bit 925" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE924 ,Set/Clear Active Bit 924" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE923 ,Set/Clear Active Bit 923" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE922 ,Set/Clear Active Bit 922" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE921 ,Set/Clear Active Bit 921" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE920 ,Set/Clear Active Bit 920" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE919 ,Set/Clear Active Bit 919" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE918 ,Set/Clear Active Bit 918" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE917 ,Set/Clear Active Bit 917" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE916 ,Set/Clear Active Bit 916" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE915 ,Set/Clear Active Bit 915" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE914 ,Set/Clear Active Bit 914" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE913 ,Set/Clear Active Bit 913" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE912 ,Set/Clear Active Bit 912" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE911 ,Set/Clear Active Bit 911" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE910 ,Set/Clear Active Bit 910" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE909 ,Set/Clear Active Bit 909" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE908 ,Set/Clear Active Bit 908" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE907 ,Set/Clear Active Bit 907" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE906 ,Set/Clear Active Bit 906" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE905 ,Set/Clear Active Bit 905" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE904 ,Set/Clear Active Bit 904" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE903 ,Set/Clear Active Bit 903" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE902 ,Set/Clear Active Bit 902" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE901 ,Set/Clear Active Bit 901" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE900 ,Set/Clear Active Bit 900" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE899 ,Set/Clear Active Bit 899" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE898 ,Set/Clear Active Bit 898" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE897 ,Set/Clear Active Bit 897" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE896 ,Set/Clear Active Bit 896" "Not active,Active"
else
hgroup.long 0x0370++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0x0374++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE959 ,Set/Clear Active Bit 959" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE958 ,Set/Clear Active Bit 958" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE957 ,Set/Clear Active Bit 957" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE956 ,Set/Clear Active Bit 956" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE955 ,Set/Clear Active Bit 955" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE954 ,Set/Clear Active Bit 954" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE953 ,Set/Clear Active Bit 953" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE952 ,Set/Clear Active Bit 952" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE951 ,Set/Clear Active Bit 951" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE950 ,Set/Clear Active Bit 950" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE949 ,Set/Clear Active Bit 949" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE948 ,Set/Clear Active Bit 948" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE947 ,Set/Clear Active Bit 947" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE946 ,Set/Clear Active Bit 946" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE945 ,Set/Clear Active Bit 945" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE944 ,Set/Clear Active Bit 944" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE943 ,Set/Clear Active Bit 943" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE942 ,Set/Clear Active Bit 942" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE941 ,Set/Clear Active Bit 941" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE940 ,Set/Clear Active Bit 940" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE939 ,Set/Clear Active Bit 939" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE938 ,Set/Clear Active Bit 938" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE937 ,Set/Clear Active Bit 937" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE936 ,Set/Clear Active Bit 936" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE935 ,Set/Clear Active Bit 935" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE934 ,Set/Clear Active Bit 934" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE933 ,Set/Clear Active Bit 933" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE932 ,Set/Clear Active Bit 932" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE931 ,Set/Clear Active Bit 931" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE930 ,Set/Clear Active Bit 930" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE929 ,Set/Clear Active Bit 929" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE928 ,Set/Clear Active Bit 928" "Not active,Active"
else
hgroup.long 0x0374++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0x0378++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE991 ,Set/Clear Active Bit 991" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE990 ,Set/Clear Active Bit 990" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE989 ,Set/Clear Active Bit 989" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE988 ,Set/Clear Active Bit 988" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE987 ,Set/Clear Active Bit 987" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE986 ,Set/Clear Active Bit 986" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE985 ,Set/Clear Active Bit 985" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE984 ,Set/Clear Active Bit 984" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE983 ,Set/Clear Active Bit 983" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE982 ,Set/Clear Active Bit 982" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE981 ,Set/Clear Active Bit 981" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE980 ,Set/Clear Active Bit 980" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE979 ,Set/Clear Active Bit 979" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE978 ,Set/Clear Active Bit 978" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE977 ,Set/Clear Active Bit 977" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE976 ,Set/Clear Active Bit 976" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE975 ,Set/Clear Active Bit 975" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE974 ,Set/Clear Active Bit 974" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE973 ,Set/Clear Active Bit 973" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE972 ,Set/Clear Active Bit 972" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE971 ,Set/Clear Active Bit 971" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE970 ,Set/Clear Active Bit 970" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE969 ,Set/Clear Active Bit 969" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE968 ,Set/Clear Active Bit 968" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE967 ,Set/Clear Active Bit 967" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE966 ,Set/Clear Active Bit 966" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE965 ,Set/Clear Active Bit 965" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE964 ,Set/Clear Active Bit 964" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE963 ,Set/Clear Active Bit 963" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE962 ,Set/Clear Active Bit 962" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE961 ,Set/Clear Active Bit 961" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE960 ,Set/Clear Active Bit 960" "Not active,Active"
else
hgroup.long 0x0378++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30"
endif
tree.end
width 20.
tree "Priority Registers"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x400++0x03
hide.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0"
hgroup.long 0x404++0x03
hide.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1"
hgroup.long 0x408++0x03
hide.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2"
hgroup.long 0x40C++0x03
hide.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3"
hgroup.long 0x410++0x03
hide.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4"
hgroup.long 0x414++0x03
hide.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5"
hgroup.long 0x418++0x03
hide.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6"
hgroup.long 0x41C++0x03
hide.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7"
else
group.long 0x400++0x03
line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0"
hexmask.long.byte 0x00 24.--31. 1. " INTID3    ,Interrupt ID3    Priority/Priority Byte Offset 3   "
hexmask.long.byte 0x00 16.--23. 1. "  INTID2    ,Interrupt ID2     Priority/Priority Byte Offset 2   "
hexmask.long.byte 0x00 8.--15. 1. "  INTID1    ,Interrupt ID1    Priority/Priority Byte Offset 1   "
hexmask.long.byte 0x00 0.--7. 1. "  INTID0    ,Interrupt ID0     Priority/Priority Byte Offset 0   "
group.long 0x404++0x03
line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1"
hexmask.long.byte 0x00 24.--31. 1. " INTID7    ,Interrupt ID7    Priority/Priority Byte Offset 7   "
hexmask.long.byte 0x00 16.--23. 1. "  INTID6    ,Interrupt ID6     Priority/Priority Byte Offset 6   "
hexmask.long.byte 0x00 8.--15. 1. "  INTID5    ,Interrupt ID5    Priority/Priority Byte Offset 5   "
hexmask.long.byte 0x00 0.--7. 1. "  INTID4    ,Interrupt ID4     Priority/Priority Byte Offset 4   "
group.long 0x408++0x03
line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2"
hexmask.long.byte 0x00 24.--31. 1. " INTID11   ,Interrupt ID11   Priority/Priority Byte Offset 11  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID10   ,Interrupt ID10    Priority/Priority Byte Offset 10  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID9    ,Interrupt ID9    Priority/Priority Byte Offset 9   "
hexmask.long.byte 0x00 0.--7. 1. "  INTID8    ,Interrupt ID8     Priority/Priority Byte Offset 8   "
group.long 0x40C++0x03
line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3"
hexmask.long.byte 0x00 24.--31. 1. " INTID15   ,Interrupt ID15   Priority/Priority Byte Offset 15  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID14   ,Interrupt ID14    Priority/Priority Byte Offset 14  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID13   ,Interrupt ID13   Priority/Priority Byte Offset 13  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID12   ,Interrupt ID12    Priority/Priority Byte Offset 12  "
group.long 0x410++0x03
line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4"
hexmask.long.byte 0x00 24.--31. 1. " INTID19   ,Interrupt ID19   Priority/Priority Byte Offset 19  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID18   ,Interrupt ID18    Priority/Priority Byte Offset 18  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID17   ,Interrupt ID17   Priority/Priority Byte Offset 17  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID16   ,Interrupt ID16    Priority/Priority Byte Offset 16  "
group.long 0x414++0x03
line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5"
hexmask.long.byte 0x00 24.--31. 1. " INTID23   ,Interrupt ID23   Priority/Priority Byte Offset 23  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID22   ,Interrupt ID22    Priority/Priority Byte Offset 22  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID21   ,Interrupt ID21   Priority/Priority Byte Offset 21  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID20   ,Interrupt ID20    Priority/Priority Byte Offset 20  "
group.long 0x418++0x03
line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6"
hexmask.long.byte 0x00 24.--31. 1. " INTID27   ,Interrupt ID27   Priority/Priority Byte Offset 27  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID26   ,Interrupt ID26    Priority/Priority Byte Offset 26  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID25   ,Interrupt ID25   Priority/Priority Byte Offset 25  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID24   ,Interrupt ID24    Priority/Priority Byte Offset 24  "
group.long 0x41C++0x03
line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7"
hexmask.long.byte 0x00 24.--31. 1. " INTID31   ,Interrupt ID31   Priority/Priority Byte Offset 31  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID30   ,Interrupt ID30    Priority/Priority Byte Offset 30  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID29   ,Interrupt ID29   Priority/Priority Byte Offset 29  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID28   ,Interrupt ID28    Priority/Priority Byte Offset 28  "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x420++0x03
line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
hexmask.long.byte 0x00 24.--31. 1. " INTID35   ,Interrupt ID35   Priority/Priority Byte Offset 35  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID34   ,Interrupt ID34    Priority/Priority Byte Offset 34  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID33   ,Interrupt ID33   Priority/Priority Byte Offset 33  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID32   ,Interrupt ID32    Priority/Priority Byte Offset 32  "
group.long 0x424++0x03
line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
hexmask.long.byte 0x00 24.--31. 1. " INTID39   ,Interrupt ID39   Priority/Priority Byte Offset 39  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID38   ,Interrupt ID38    Priority/Priority Byte Offset 38  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID37   ,Interrupt ID37   Priority/Priority Byte Offset 37  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID36   ,Interrupt ID36    Priority/Priority Byte Offset 36  "
group.long 0x428++0x03
line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
hexmask.long.byte 0x00 24.--31. 1. " INTID43   ,Interrupt ID43   Priority/Priority Byte Offset 43  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID42   ,Interrupt ID42    Priority/Priority Byte Offset 42  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID41   ,Interrupt ID41   Priority/Priority Byte Offset 41  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID40   ,Interrupt ID40    Priority/Priority Byte Offset 40  "
group.long 0x42C++0x03
line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
hexmask.long.byte 0x00 24.--31. 1. " INTID47   ,Interrupt ID47   Priority/Priority Byte Offset 47  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID46   ,Interrupt ID46    Priority/Priority Byte Offset 46  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID45   ,Interrupt ID45   Priority/Priority Byte Offset 45  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID44   ,Interrupt ID44    Priority/Priority Byte Offset 44  "
group.long 0x430++0x03
line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
hexmask.long.byte 0x00 24.--31. 1. " INTID51   ,Interrupt ID51   Priority/Priority Byte Offset 51  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID50   ,Interrupt ID50    Priority/Priority Byte Offset 50  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID49   ,Interrupt ID49   Priority/Priority Byte Offset 49  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID48   ,Interrupt ID48    Priority/Priority Byte Offset 48  "
group.long 0x434++0x03
line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
hexmask.long.byte 0x00 24.--31. 1. " INTID55   ,Interrupt ID55   Priority/Priority Byte Offset 55  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID54   ,Interrupt ID54    Priority/Priority Byte Offset 54  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID53   ,Interrupt ID53   Priority/Priority Byte Offset 53  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID52   ,Interrupt ID52    Priority/Priority Byte Offset 52  "
group.long 0x438++0x03
line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
hexmask.long.byte 0x00 24.--31. 1. " INTID59   ,Interrupt ID59   Priority/Priority Byte Offset 59  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID58   ,Interrupt ID58    Priority/Priority Byte Offset 58  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID57   ,Interrupt ID57   Priority/Priority Byte Offset 57  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID56   ,Interrupt ID56    Priority/Priority Byte Offset 56  "
group.long 0x43C++0x03
line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
hexmask.long.byte 0x00 24.--31. 1. " INTID63   ,Interrupt ID63   Priority/Priority Byte Offset 63  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID62   ,Interrupt ID62    Priority/Priority Byte Offset 62  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID61   ,Interrupt ID61   Priority/Priority Byte Offset 61  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID60   ,Interrupt ID60    Priority/Priority Byte Offset 60  "
else
hgroup.long 0x420++0x03
hide.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
hgroup.long 0x424++0x03
hide.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
hgroup.long 0x428++0x03
hide.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
hgroup.long 0x42C++0x03
hide.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
hgroup.long 0x430++0x03
hide.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
hgroup.long 0x434++0x03
hide.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
hgroup.long 0x438++0x03
hide.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
hgroup.long 0x43C++0x03
hide.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x440++0x03
line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
hexmask.long.byte 0x00 24.--31. 1. " INTID67   ,Interrupt ID67   Priority/Priority Byte Offset 67  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID66   ,Interrupt ID66    Priority/Priority Byte Offset 66  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID65   ,Interrupt ID65   Priority/Priority Byte Offset 65  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID64   ,Interrupt ID64    Priority/Priority Byte Offset 64  "
group.long 0x444++0x03
line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
hexmask.long.byte 0x00 24.--31. 1. " INTID71   ,Interrupt ID71   Priority/Priority Byte Offset 71  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID70   ,Interrupt ID70    Priority/Priority Byte Offset 70  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID69   ,Interrupt ID69   Priority/Priority Byte Offset 69  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID68   ,Interrupt ID68    Priority/Priority Byte Offset 68  "
group.long 0x448++0x03
line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
hexmask.long.byte 0x00 24.--31. 1. " INTID75   ,Interrupt ID75   Priority/Priority Byte Offset 75  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID74   ,Interrupt ID74    Priority/Priority Byte Offset 74  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID73   ,Interrupt ID73   Priority/Priority Byte Offset 73  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID72   ,Interrupt ID72    Priority/Priority Byte Offset 72  "
group.long 0x44C++0x03
line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
hexmask.long.byte 0x00 24.--31. 1. " INTID79   ,Interrupt ID79   Priority/Priority Byte Offset 79  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID78   ,Interrupt ID78    Priority/Priority Byte Offset 78  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID77   ,Interrupt ID77   Priority/Priority Byte Offset 77  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID76   ,Interrupt ID76    Priority/Priority Byte Offset 76  "
group.long 0x450++0x03
line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
hexmask.long.byte 0x00 24.--31. 1. " INTID83   ,Interrupt ID83   Priority/Priority Byte Offset 83  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID82   ,Interrupt ID82    Priority/Priority Byte Offset 82  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID81   ,Interrupt ID81   Priority/Priority Byte Offset 81  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID80   ,Interrupt ID80    Priority/Priority Byte Offset 80  "
group.long 0x454++0x03
line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
hexmask.long.byte 0x00 24.--31. 1. " INTID87   ,Interrupt ID87   Priority/Priority Byte Offset 87  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID86   ,Interrupt ID86    Priority/Priority Byte Offset 86  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID85   ,Interrupt ID85   Priority/Priority Byte Offset 85  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID84   ,Interrupt ID84    Priority/Priority Byte Offset 84  "
group.long 0x458++0x03
line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
hexmask.long.byte 0x00 24.--31. 1. " INTID91   ,Interrupt ID91   Priority/Priority Byte Offset 91  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID90   ,Interrupt ID90    Priority/Priority Byte Offset 90  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID89   ,Interrupt ID89   Priority/Priority Byte Offset 89  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID88   ,Interrupt ID88    Priority/Priority Byte Offset 88  "
group.long 0x45C++0x03
line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
hexmask.long.byte 0x00 24.--31. 1. " INTID95   ,Interrupt ID95   Priority/Priority Byte Offset 95  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID94   ,Interrupt ID94    Priority/Priority Byte Offset 94  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID93   ,Interrupt ID93   Priority/Priority Byte Offset 93  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID92   ,Interrupt ID92    Priority/Priority Byte Offset 92  "
else
hgroup.long 0x440++0x03
hide.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
hgroup.long 0x444++0x03
hide.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
hgroup.long 0x448++0x03
hide.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
hgroup.long 0x44C++0x03
hide.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
hgroup.long 0x450++0x03
hide.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
hgroup.long 0x454++0x03
hide.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
hgroup.long 0x458++0x03
hide.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
hgroup.long 0x45C++0x03
hide.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x460++0x03
line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
hexmask.long.byte 0x00 24.--31. 1. " INTID99   ,Interrupt ID99   Priority/Priority Byte Offset 99  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID98   ,Interrupt ID98    Priority/Priority Byte Offset 98  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID97   ,Interrupt ID97   Priority/Priority Byte Offset 97  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID96   ,Interrupt ID96    Priority/Priority Byte Offset 96  "
group.long 0x464++0x03
line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
hexmask.long.byte 0x00 24.--31. 1. " INTID103  ,Interrupt ID103  Priority/Priority Byte Offset 103 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID102  ,Interrupt ID102   Priority/Priority Byte Offset 102 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID101  ,Interrupt ID101  Priority/Priority Byte Offset 101 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID100  ,Interrupt ID100   Priority/Priority Byte Offset 100 "
group.long 0x468++0x03
line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
hexmask.long.byte 0x00 24.--31. 1. " INTID107  ,Interrupt ID107  Priority/Priority Byte Offset 107 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID106  ,Interrupt ID106   Priority/Priority Byte Offset 106 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID105  ,Interrupt ID105  Priority/Priority Byte Offset 105 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID104  ,Interrupt ID104   Priority/Priority Byte Offset 104 "
group.long 0x46C++0x03
line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
hexmask.long.byte 0x00 24.--31. 1. " INTID111  ,Interrupt ID111  Priority/Priority Byte Offset 111 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID110  ,Interrupt ID110   Priority/Priority Byte Offset 110 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID109  ,Interrupt ID109  Priority/Priority Byte Offset 109 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID108  ,Interrupt ID108   Priority/Priority Byte Offset 108 "
group.long 0x470++0x03
line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
hexmask.long.byte 0x00 24.--31. 1. " INTID115  ,Interrupt ID115  Priority/Priority Byte Offset 115 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID114  ,Interrupt ID114   Priority/Priority Byte Offset 114 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID113  ,Interrupt ID113  Priority/Priority Byte Offset 113 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID112  ,Interrupt ID112   Priority/Priority Byte Offset 112 "
group.long 0x474++0x03
line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
hexmask.long.byte 0x00 24.--31. 1. " INTID119  ,Interrupt ID119  Priority/Priority Byte Offset 119 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID118  ,Interrupt ID118   Priority/Priority Byte Offset 118 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID117  ,Interrupt ID117  Priority/Priority Byte Offset 117 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID116  ,Interrupt ID116   Priority/Priority Byte Offset 116 "
group.long 0x478++0x03
line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
hexmask.long.byte 0x00 24.--31. 1. " INTID123  ,Interrupt ID123  Priority/Priority Byte Offset 123 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID122  ,Interrupt ID122   Priority/Priority Byte Offset 122 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID121  ,Interrupt ID121  Priority/Priority Byte Offset 121 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID120  ,Interrupt ID120   Priority/Priority Byte Offset 120 "
group.long 0x47C++0x03
line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
hexmask.long.byte 0x00 24.--31. 1. " INTID127  ,Interrupt ID127  Priority/Priority Byte Offset 127 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID126  ,Interrupt ID126   Priority/Priority Byte Offset 126 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID125  ,Interrupt ID125  Priority/Priority Byte Offset 125 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID124  ,Interrupt ID124   Priority/Priority Byte Offset 124 "
else
hgroup.long 0x460++0x03
hide.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
hgroup.long 0x464++0x03
hide.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
hgroup.long 0x468++0x03
hide.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
hgroup.long 0x46C++0x03
hide.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
hgroup.long 0x470++0x03
hide.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
hgroup.long 0x474++0x03
hide.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
hgroup.long 0x478++0x03
hide.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
hgroup.long 0x47C++0x03
hide.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x480++0x03
line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
hexmask.long.byte 0x00 24.--31. 1. " INTID131  ,Interrupt ID131  Priority/Priority Byte Offset 131 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID130  ,Interrupt ID130   Priority/Priority Byte Offset 130 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID129  ,Interrupt ID129  Priority/Priority Byte Offset 129 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID128  ,Interrupt ID128   Priority/Priority Byte Offset 128 "
group.long 0x484++0x03
line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
hexmask.long.byte 0x00 24.--31. 1. " INTID135  ,Interrupt ID135  Priority/Priority Byte Offset 135 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID134  ,Interrupt ID134   Priority/Priority Byte Offset 134 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID133  ,Interrupt ID133  Priority/Priority Byte Offset 133 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID132  ,Interrupt ID132   Priority/Priority Byte Offset 132 "
group.long 0x488++0x03
line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
hexmask.long.byte 0x00 24.--31. 1. " INTID139  ,Interrupt ID139  Priority/Priority Byte Offset 139 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID138  ,Interrupt ID138   Priority/Priority Byte Offset 138 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID137  ,Interrupt ID137  Priority/Priority Byte Offset 137 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID136  ,Interrupt ID136   Priority/Priority Byte Offset 136 "
group.long 0x48C++0x03
line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
hexmask.long.byte 0x00 24.--31. 1. " INTID143  ,Interrupt ID143  Priority/Priority Byte Offset 143 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID142  ,Interrupt ID142   Priority/Priority Byte Offset 142 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID141  ,Interrupt ID141  Priority/Priority Byte Offset 141 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID140  ,Interrupt ID140   Priority/Priority Byte Offset 140 "
group.long 0x490++0x03
line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
hexmask.long.byte 0x00 24.--31. 1. " INTID147  ,Interrupt ID147  Priority/Priority Byte Offset 147 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID146  ,Interrupt ID146   Priority/Priority Byte Offset 146 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID145  ,Interrupt ID145  Priority/Priority Byte Offset 145 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID144  ,Interrupt ID144   Priority/Priority Byte Offset 144 "
group.long 0x494++0x03
line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
hexmask.long.byte 0x00 24.--31. 1. " INTID151  ,Interrupt ID151  Priority/Priority Byte Offset 151 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID150  ,Interrupt ID150   Priority/Priority Byte Offset 150 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID149  ,Interrupt ID149  Priority/Priority Byte Offset 149 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID148  ,Interrupt ID148   Priority/Priority Byte Offset 148 "
group.long 0x498++0x03
line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
hexmask.long.byte 0x00 24.--31. 1. " INTID155  ,Interrupt ID155  Priority/Priority Byte Offset 155 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID154  ,Interrupt ID154   Priority/Priority Byte Offset 154 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID153  ,Interrupt ID153  Priority/Priority Byte Offset 153 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID152  ,Interrupt ID152   Priority/Priority Byte Offset 152 "
group.long 0x49C++0x03
line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
hexmask.long.byte 0x00 24.--31. 1. " INTID159  ,Interrupt ID159  Priority/Priority Byte Offset 159 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID158  ,Interrupt ID158   Priority/Priority Byte Offset 158 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID157  ,Interrupt ID157  Priority/Priority Byte Offset 157 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID156  ,Interrupt ID156   Priority/Priority Byte Offset 156 "
else
hgroup.long 0x480++0x03
hide.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
hgroup.long 0x484++0x03
hide.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
hgroup.long 0x488++0x03
hide.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
hgroup.long 0x48C++0x03
hide.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
hgroup.long 0x490++0x03
hide.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
hgroup.long 0x494++0x03
hide.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
hgroup.long 0x498++0x03
hide.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
hgroup.long 0x49C++0x03
hide.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x4A0++0x03
line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
hexmask.long.byte 0x00 24.--31. 1. " INTID163  ,Interrupt ID163  Priority/Priority Byte Offset 163 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID162  ,Interrupt ID162   Priority/Priority Byte Offset 162 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID161  ,Interrupt ID161  Priority/Priority Byte Offset 161 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID160  ,Interrupt ID160   Priority/Priority Byte Offset 160 "
group.long 0x4A4++0x03
line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
hexmask.long.byte 0x00 24.--31. 1. " INTID167  ,Interrupt ID167  Priority/Priority Byte Offset 167 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID166  ,Interrupt ID166   Priority/Priority Byte Offset 166 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID165  ,Interrupt ID165  Priority/Priority Byte Offset 165 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID164  ,Interrupt ID164   Priority/Priority Byte Offset 164 "
group.long 0x4A8++0x03
line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
hexmask.long.byte 0x00 24.--31. 1. " INTID171  ,Interrupt ID171  Priority/Priority Byte Offset 171 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID170  ,Interrupt ID170   Priority/Priority Byte Offset 170 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID169  ,Interrupt ID169  Priority/Priority Byte Offset 169 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID168  ,Interrupt ID168   Priority/Priority Byte Offset 168 "
group.long 0x4AC++0x03
line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
hexmask.long.byte 0x00 24.--31. 1. " INTID175  ,Interrupt ID175  Priority/Priority Byte Offset 175 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID174  ,Interrupt ID174   Priority/Priority Byte Offset 174 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID173  ,Interrupt ID173  Priority/Priority Byte Offset 173 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID172  ,Interrupt ID172   Priority/Priority Byte Offset 172 "
group.long 0x4B0++0x03
line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
hexmask.long.byte 0x00 24.--31. 1. " INTID179  ,Interrupt ID179  Priority/Priority Byte Offset 179 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID178  ,Interrupt ID178   Priority/Priority Byte Offset 178 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID177  ,Interrupt ID177  Priority/Priority Byte Offset 177 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID176  ,Interrupt ID176   Priority/Priority Byte Offset 176 "
group.long 0x4B4++0x03
line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
hexmask.long.byte 0x00 24.--31. 1. " INTID183  ,Interrupt ID183  Priority/Priority Byte Offset 183 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID182  ,Interrupt ID182   Priority/Priority Byte Offset 182 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID181  ,Interrupt ID181  Priority/Priority Byte Offset 181 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID180  ,Interrupt ID180   Priority/Priority Byte Offset 180 "
group.long 0x4B8++0x03
line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
hexmask.long.byte 0x00 24.--31. 1. " INTID187  ,Interrupt ID187  Priority/Priority Byte Offset 187 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID186  ,Interrupt ID186   Priority/Priority Byte Offset 186 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID185  ,Interrupt ID185  Priority/Priority Byte Offset 185 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID184  ,Interrupt ID184   Priority/Priority Byte Offset 184 "
group.long 0x4BC++0x03
line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
hexmask.long.byte 0x00 24.--31. 1. " INTID191  ,Interrupt ID191  Priority/Priority Byte Offset 191 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID190  ,Interrupt ID190   Priority/Priority Byte Offset 190 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID189  ,Interrupt ID189  Priority/Priority Byte Offset 189 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID188  ,Interrupt ID188   Priority/Priority Byte Offset 188 "
else
hgroup.long 0x4A0++0x03
hide.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
hgroup.long 0x4A4++0x03
hide.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
hgroup.long 0x4A8++0x03
hide.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
hgroup.long 0x4AC++0x03
hide.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
hgroup.long 0x4B0++0x03
hide.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
hgroup.long 0x4B4++0x03
hide.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
hgroup.long 0x4B8++0x03
hide.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
hgroup.long 0x4BC++0x03
hide.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x4C0++0x03
line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
hexmask.long.byte 0x00 24.--31. 1. " INTID195  ,Interrupt ID195  Priority/Priority Byte Offset 195 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID194  ,Interrupt ID194   Priority/Priority Byte Offset 194 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID193  ,Interrupt ID193  Priority/Priority Byte Offset 193 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID192  ,Interrupt ID192   Priority/Priority Byte Offset 192 "
group.long 0x4C4++0x03
line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
hexmask.long.byte 0x00 24.--31. 1. " INTID199  ,Interrupt ID199  Priority/Priority Byte Offset 199 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID198  ,Interrupt ID198   Priority/Priority Byte Offset 198 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID197  ,Interrupt ID197  Priority/Priority Byte Offset 197 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID196  ,Interrupt ID196   Priority/Priority Byte Offset 196 "
group.long 0x4C8++0x03
line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
hexmask.long.byte 0x00 24.--31. 1. " INTID203  ,Interrupt ID203  Priority/Priority Byte Offset 203 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID202  ,Interrupt ID202   Priority/Priority Byte Offset 202 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID201  ,Interrupt ID201  Priority/Priority Byte Offset 201 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID200  ,Interrupt ID200   Priority/Priority Byte Offset 200 "
group.long 0x4CC++0x03
line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
hexmask.long.byte 0x00 24.--31. 1. " INTID207  ,Interrupt ID207  Priority/Priority Byte Offset 207 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID206  ,Interrupt ID206   Priority/Priority Byte Offset 206 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID205  ,Interrupt ID205  Priority/Priority Byte Offset 205 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID204  ,Interrupt ID204   Priority/Priority Byte Offset 204 "
group.long 0x4D0++0x03
line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
hexmask.long.byte 0x00 24.--31. 1. " INTID211  ,Interrupt ID211  Priority/Priority Byte Offset 211 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID210  ,Interrupt ID210   Priority/Priority Byte Offset 210 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID209  ,Interrupt ID209  Priority/Priority Byte Offset 209 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID208  ,Interrupt ID208   Priority/Priority Byte Offset 208 "
group.long 0x4D4++0x03
line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
hexmask.long.byte 0x00 24.--31. 1. " INTID215  ,Interrupt ID215  Priority/Priority Byte Offset 215 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID214  ,Interrupt ID214   Priority/Priority Byte Offset 214 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID213  ,Interrupt ID213  Priority/Priority Byte Offset 213 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID212  ,Interrupt ID212   Priority/Priority Byte Offset 212 "
group.long 0x4D8++0x03
line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
hexmask.long.byte 0x00 24.--31. 1. " INTID219  ,Interrupt ID219  Priority/Priority Byte Offset 219 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID218  ,Interrupt ID218   Priority/Priority Byte Offset 218 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID217  ,Interrupt ID217  Priority/Priority Byte Offset 217 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID216  ,Interrupt ID216   Priority/Priority Byte Offset 216 "
group.long 0x4DC++0x03
line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
hexmask.long.byte 0x00 24.--31. 1. " INTID223  ,Interrupt ID223  Priority/Priority Byte Offset 223 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID222  ,Interrupt ID222   Priority/Priority Byte Offset 222 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID221  ,Interrupt ID221  Priority/Priority Byte Offset 221 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID220  ,Interrupt ID220   Priority/Priority Byte Offset 220 "
else
hgroup.long 0x4C0++0x03
hide.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
hgroup.long 0x4C4++0x03
hide.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
hgroup.long 0x4C8++0x03
hide.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
hgroup.long 0x4CC++0x03
hide.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
hgroup.long 0x4D0++0x03
hide.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
hgroup.long 0x4D4++0x03
hide.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
hgroup.long 0x4D8++0x03
hide.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
hgroup.long 0x4DC++0x03
hide.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x4E0++0x03
line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
hexmask.long.byte 0x00 24.--31. 1. " INTID227  ,Interrupt ID227  Priority/Priority Byte Offset 227 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID226  ,Interrupt ID226   Priority/Priority Byte Offset 226 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID225  ,Interrupt ID225  Priority/Priority Byte Offset 225 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID224  ,Interrupt ID224   Priority/Priority Byte Offset 224 "
group.long 0x4E4++0x03
line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
hexmask.long.byte 0x00 24.--31. 1. " INTID231  ,Interrupt ID231  Priority/Priority Byte Offset 231 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID230  ,Interrupt ID230   Priority/Priority Byte Offset 230 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID229  ,Interrupt ID229  Priority/Priority Byte Offset 229 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID228  ,Interrupt ID228   Priority/Priority Byte Offset 228 "
group.long 0x4E8++0x03
line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
hexmask.long.byte 0x00 24.--31. 1. " INTID235  ,Interrupt ID235  Priority/Priority Byte Offset 235 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID234  ,Interrupt ID234   Priority/Priority Byte Offset 234 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID233  ,Interrupt ID233  Priority/Priority Byte Offset 233 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID232  ,Interrupt ID232   Priority/Priority Byte Offset 232 "
group.long 0x4EC++0x03
line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
hexmask.long.byte 0x00 24.--31. 1. " INTID239  ,Interrupt ID239  Priority/Priority Byte Offset 239 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID238  ,Interrupt ID238   Priority/Priority Byte Offset 238 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID237  ,Interrupt ID237  Priority/Priority Byte Offset 237 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID236  ,Interrupt ID236   Priority/Priority Byte Offset 236 "
group.long 0x4F0++0x03
line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
hexmask.long.byte 0x00 24.--31. 1. " INTID243  ,Interrupt ID243  Priority/Priority Byte Offset 243 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID242  ,Interrupt ID242   Priority/Priority Byte Offset 242 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID241  ,Interrupt ID241  Priority/Priority Byte Offset 241 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID240  ,Interrupt ID240   Priority/Priority Byte Offset 240 "
group.long 0x4F4++0x03
line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
hexmask.long.byte 0x00 24.--31. 1. " INTID247  ,Interrupt ID247  Priority/Priority Byte Offset 247 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID246  ,Interrupt ID246   Priority/Priority Byte Offset 246 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID245  ,Interrupt ID245  Priority/Priority Byte Offset 245 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID244  ,Interrupt ID244   Priority/Priority Byte Offset 244 "
group.long 0x4F8++0x03
line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
hexmask.long.byte 0x00 24.--31. 1. " INTID251  ,Interrupt ID251  Priority/Priority Byte Offset 251 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID250  ,Interrupt ID250   Priority/Priority Byte Offset 250 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID249  ,Interrupt ID249  Priority/Priority Byte Offset 249 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID248  ,Interrupt ID248   Priority/Priority Byte Offset 248 "
group.long 0x4FC++0x03
line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
hexmask.long.byte 0x00 24.--31. 1. " INTID255  ,Interrupt ID255  Priority/Priority Byte Offset 255 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID254  ,Interrupt ID254   Priority/Priority Byte Offset 254 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID253  ,Interrupt ID253  Priority/Priority Byte Offset 253 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID252  ,Interrupt ID252   Priority/Priority Byte Offset 252 "
else
hgroup.long 0x4E0++0x03
hide.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
hgroup.long 0x4E4++0x03
hide.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
hgroup.long 0x4E8++0x03
hide.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
hgroup.long 0x4EC++0x03
hide.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
hgroup.long 0x4F0++0x03
hide.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
hgroup.long 0x4F4++0x03
hide.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
hgroup.long 0x4F8++0x03
hide.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
hgroup.long 0x4FC++0x03
hide.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x500++0x03
line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
hexmask.long.byte 0x00 24.--31. 1. " INTID259  ,Interrupt ID259  Priority/Priority Byte Offset 259 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID258  ,Interrupt ID258   Priority/Priority Byte Offset 258 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID257  ,Interrupt ID257  Priority/Priority Byte Offset 257 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID256  ,Interrupt ID256   Priority/Priority Byte Offset 256 "
group.long 0x504++0x03
line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
hexmask.long.byte 0x00 24.--31. 1. " INTID263  ,Interrupt ID263  Priority/Priority Byte Offset 263 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID262  ,Interrupt ID262   Priority/Priority Byte Offset 262 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID261  ,Interrupt ID261  Priority/Priority Byte Offset 261 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID260  ,Interrupt ID260   Priority/Priority Byte Offset 260 "
group.long 0x508++0x03
line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
hexmask.long.byte 0x00 24.--31. 1. " INTID267  ,Interrupt ID267  Priority/Priority Byte Offset 267 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID266  ,Interrupt ID266   Priority/Priority Byte Offset 266 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID265  ,Interrupt ID265  Priority/Priority Byte Offset 265 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID264  ,Interrupt ID264   Priority/Priority Byte Offset 264 "
group.long 0x50C++0x03
line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
hexmask.long.byte 0x00 24.--31. 1. " INTID271  ,Interrupt ID271  Priority/Priority Byte Offset 271 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID270  ,Interrupt ID270   Priority/Priority Byte Offset 270 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID269  ,Interrupt ID269  Priority/Priority Byte Offset 269 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID268  ,Interrupt ID268   Priority/Priority Byte Offset 268 "
group.long 0x510++0x03
line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
hexmask.long.byte 0x00 24.--31. 1. " INTID275  ,Interrupt ID275  Priority/Priority Byte Offset 275 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID274  ,Interrupt ID274   Priority/Priority Byte Offset 274 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID273  ,Interrupt ID273  Priority/Priority Byte Offset 273 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID272  ,Interrupt ID272   Priority/Priority Byte Offset 272 "
group.long 0x514++0x03
line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
hexmask.long.byte 0x00 24.--31. 1. " INTID279  ,Interrupt ID279  Priority/Priority Byte Offset 279 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID278  ,Interrupt ID278   Priority/Priority Byte Offset 278 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID277  ,Interrupt ID277  Priority/Priority Byte Offset 277 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID276  ,Interrupt ID276   Priority/Priority Byte Offset 276 "
group.long 0x518++0x03
line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
hexmask.long.byte 0x00 24.--31. 1. " INTID283  ,Interrupt ID283  Priority/Priority Byte Offset 283 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID282  ,Interrupt ID282   Priority/Priority Byte Offset 282 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID281  ,Interrupt ID281  Priority/Priority Byte Offset 281 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID280  ,Interrupt ID280   Priority/Priority Byte Offset 280 "
group.long 0x51C++0x03
line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
hexmask.long.byte 0x00 24.--31. 1. " INTID287  ,Interrupt ID287  Priority/Priority Byte Offset 287 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID286  ,Interrupt ID286   Priority/Priority Byte Offset 286 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID285  ,Interrupt ID285  Priority/Priority Byte Offset 285 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID284  ,Interrupt ID284   Priority/Priority Byte Offset 284 "
else
hgroup.long 0x500++0x03
hide.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
hgroup.long 0x504++0x03
hide.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
hgroup.long 0x508++0x03
hide.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
hgroup.long 0x50C++0x03
hide.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
hgroup.long 0x510++0x03
hide.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
hgroup.long 0x514++0x03
hide.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
hgroup.long 0x518++0x03
hide.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
hgroup.long 0x51C++0x03
hide.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x520++0x03
line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
hexmask.long.byte 0x00 24.--31. 1. " INTID291  ,Interrupt ID291  Priority/Priority Byte Offset 291 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID290  ,Interrupt ID290   Priority/Priority Byte Offset 290 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID289  ,Interrupt ID289  Priority/Priority Byte Offset 289 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID288  ,Interrupt ID288   Priority/Priority Byte Offset 288 "
group.long 0x524++0x03
line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
hexmask.long.byte 0x00 24.--31. 1. " INTID295  ,Interrupt ID295  Priority/Priority Byte Offset 295 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID294  ,Interrupt ID294   Priority/Priority Byte Offset 294 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID293  ,Interrupt ID293  Priority/Priority Byte Offset 293 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID292  ,Interrupt ID292   Priority/Priority Byte Offset 292 "
group.long 0x528++0x03
line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
hexmask.long.byte 0x00 24.--31. 1. " INTID299  ,Interrupt ID299  Priority/Priority Byte Offset 299 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID298  ,Interrupt ID298   Priority/Priority Byte Offset 298 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID297  ,Interrupt ID297  Priority/Priority Byte Offset 297 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID296  ,Interrupt ID296   Priority/Priority Byte Offset 296 "
group.long 0x52C++0x03
line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
hexmask.long.byte 0x00 24.--31. 1. " INTID303  ,Interrupt ID303  Priority/Priority Byte Offset 303 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID302  ,Interrupt ID302   Priority/Priority Byte Offset 302 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID301  ,Interrupt ID301  Priority/Priority Byte Offset 301 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID300  ,Interrupt ID300   Priority/Priority Byte Offset 300 "
group.long 0x530++0x03
line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
hexmask.long.byte 0x00 24.--31. 1. " INTID307  ,Interrupt ID307  Priority/Priority Byte Offset 307 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID306  ,Interrupt ID306   Priority/Priority Byte Offset 306 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID305  ,Interrupt ID305  Priority/Priority Byte Offset 305 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID304  ,Interrupt ID304   Priority/Priority Byte Offset 304 "
group.long 0x534++0x03
line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
hexmask.long.byte 0x00 24.--31. 1. " INTID311  ,Interrupt ID311  Priority/Priority Byte Offset 311 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID310  ,Interrupt ID310   Priority/Priority Byte Offset 310 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID309  ,Interrupt ID309  Priority/Priority Byte Offset 309 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID308  ,Interrupt ID308   Priority/Priority Byte Offset 308 "
group.long 0x538++0x03
line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
hexmask.long.byte 0x00 24.--31. 1. " INTID315  ,Interrupt ID315  Priority/Priority Byte Offset 315 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID314  ,Interrupt ID314   Priority/Priority Byte Offset 314 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID313  ,Interrupt ID313  Priority/Priority Byte Offset 313 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID312  ,Interrupt ID312   Priority/Priority Byte Offset 312 "
group.long 0x53C++0x03
line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
hexmask.long.byte 0x00 24.--31. 1. " INTID319  ,Interrupt ID319  Priority/Priority Byte Offset 319 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID318  ,Interrupt ID318   Priority/Priority Byte Offset 318 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID317  ,Interrupt ID317  Priority/Priority Byte Offset 317 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID316  ,Interrupt ID316   Priority/Priority Byte Offset 316 "
else
hgroup.long 0x520++0x03
hide.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
hgroup.long 0x524++0x03
hide.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
hgroup.long 0x528++0x03
hide.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
hgroup.long 0x52C++0x03
hide.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
hgroup.long 0x530++0x03
hide.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
hgroup.long 0x534++0x03
hide.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
hgroup.long 0x538++0x03
hide.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
hgroup.long 0x53C++0x03
hide.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x540++0x03
line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
hexmask.long.byte 0x00 24.--31. 1. " INTID323  ,Interrupt ID323  Priority/Priority Byte Offset 323 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID322  ,Interrupt ID322   Priority/Priority Byte Offset 322 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID321  ,Interrupt ID321  Priority/Priority Byte Offset 321 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID320  ,Interrupt ID320   Priority/Priority Byte Offset 320 "
group.long 0x544++0x03
line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
hexmask.long.byte 0x00 24.--31. 1. " INTID327  ,Interrupt ID327  Priority/Priority Byte Offset 327 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID326  ,Interrupt ID326   Priority/Priority Byte Offset 326 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID325  ,Interrupt ID325  Priority/Priority Byte Offset 325 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID324  ,Interrupt ID324   Priority/Priority Byte Offset 324 "
group.long 0x548++0x03
line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
hexmask.long.byte 0x00 24.--31. 1. " INTID331  ,Interrupt ID331  Priority/Priority Byte Offset 331 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID330  ,Interrupt ID330   Priority/Priority Byte Offset 330 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID329  ,Interrupt ID329  Priority/Priority Byte Offset 329 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID328  ,Interrupt ID328   Priority/Priority Byte Offset 328 "
group.long 0x54C++0x03
line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
hexmask.long.byte 0x00 24.--31. 1. " INTID335  ,Interrupt ID335  Priority/Priority Byte Offset 335 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID334  ,Interrupt ID334   Priority/Priority Byte Offset 334 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID333  ,Interrupt ID333  Priority/Priority Byte Offset 333 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID332  ,Interrupt ID332   Priority/Priority Byte Offset 332 "
group.long 0x550++0x03
line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
hexmask.long.byte 0x00 24.--31. 1. " INTID339  ,Interrupt ID339  Priority/Priority Byte Offset 339 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID338  ,Interrupt ID338   Priority/Priority Byte Offset 338 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID337  ,Interrupt ID337  Priority/Priority Byte Offset 337 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID336  ,Interrupt ID336   Priority/Priority Byte Offset 336 "
group.long 0x554++0x03
line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
hexmask.long.byte 0x00 24.--31. 1. " INTID343  ,Interrupt ID343  Priority/Priority Byte Offset 343 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID342  ,Interrupt ID342   Priority/Priority Byte Offset 342 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID341  ,Interrupt ID341  Priority/Priority Byte Offset 341 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID340  ,Interrupt ID340   Priority/Priority Byte Offset 340 "
group.long 0x558++0x03
line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
hexmask.long.byte 0x00 24.--31. 1. " INTID347  ,Interrupt ID347  Priority/Priority Byte Offset 347 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID346  ,Interrupt ID346   Priority/Priority Byte Offset 346 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID345  ,Interrupt ID345  Priority/Priority Byte Offset 345 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID344  ,Interrupt ID344   Priority/Priority Byte Offset 344 "
group.long 0x55C++0x03
line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
hexmask.long.byte 0x00 24.--31. 1. " INTID351  ,Interrupt ID351  Priority/Priority Byte Offset 351 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID350  ,Interrupt ID350   Priority/Priority Byte Offset 350 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID349  ,Interrupt ID349  Priority/Priority Byte Offset 349 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID348  ,Interrupt ID348   Priority/Priority Byte Offset 348 "
else
hgroup.long 0x540++0x03
hide.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
hgroup.long 0x544++0x03
hide.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
hgroup.long 0x548++0x03
hide.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
hgroup.long 0x54C++0x03
hide.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
hgroup.long 0x550++0x03
hide.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
hgroup.long 0x554++0x03
hide.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
hgroup.long 0x558++0x03
hide.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
hgroup.long 0x55C++0x03
hide.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x560++0x03
line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
hexmask.long.byte 0x00 24.--31. 1. " INTID355  ,Interrupt ID355  Priority/Priority Byte Offset 355 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID354  ,Interrupt ID354   Priority/Priority Byte Offset 354 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID353  ,Interrupt ID353  Priority/Priority Byte Offset 353 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID352  ,Interrupt ID352   Priority/Priority Byte Offset 352 "
group.long 0x564++0x03
line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
hexmask.long.byte 0x00 24.--31. 1. " INTID359  ,Interrupt ID359  Priority/Priority Byte Offset 359 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID358  ,Interrupt ID358   Priority/Priority Byte Offset 358 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID357  ,Interrupt ID357  Priority/Priority Byte Offset 357 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID356  ,Interrupt ID356   Priority/Priority Byte Offset 356 "
group.long 0x568++0x03
line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
hexmask.long.byte 0x00 24.--31. 1. " INTID363  ,Interrupt ID363  Priority/Priority Byte Offset 363 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID362  ,Interrupt ID362   Priority/Priority Byte Offset 362 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID361  ,Interrupt ID361  Priority/Priority Byte Offset 361 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID360  ,Interrupt ID360   Priority/Priority Byte Offset 360 "
group.long 0x56C++0x03
line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
hexmask.long.byte 0x00 24.--31. 1. " INTID367  ,Interrupt ID367  Priority/Priority Byte Offset 367 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID366  ,Interrupt ID366   Priority/Priority Byte Offset 366 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID365  ,Interrupt ID365  Priority/Priority Byte Offset 365 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID364  ,Interrupt ID364   Priority/Priority Byte Offset 364 "
group.long 0x570++0x03
line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
hexmask.long.byte 0x00 24.--31. 1. " INTID371  ,Interrupt ID371  Priority/Priority Byte Offset 371 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID370  ,Interrupt ID370   Priority/Priority Byte Offset 370 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID369  ,Interrupt ID369  Priority/Priority Byte Offset 369 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID368  ,Interrupt ID368   Priority/Priority Byte Offset 368 "
group.long 0x574++0x03
line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
hexmask.long.byte 0x00 24.--31. 1. " INTID375  ,Interrupt ID375  Priority/Priority Byte Offset 375 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID374  ,Interrupt ID374   Priority/Priority Byte Offset 374 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID373  ,Interrupt ID373  Priority/Priority Byte Offset 373 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID372  ,Interrupt ID372   Priority/Priority Byte Offset 372 "
group.long 0x578++0x03
line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
hexmask.long.byte 0x00 24.--31. 1. " INTID379  ,Interrupt ID379  Priority/Priority Byte Offset 379 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID378  ,Interrupt ID378   Priority/Priority Byte Offset 378 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID377  ,Interrupt ID377  Priority/Priority Byte Offset 377 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID376  ,Interrupt ID376   Priority/Priority Byte Offset 376 "
group.long 0x57C++0x03
line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
hexmask.long.byte 0x00 24.--31. 1. " INTID383  ,Interrupt ID383  Priority/Priority Byte Offset 383 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID382  ,Interrupt ID382   Priority/Priority Byte Offset 382 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID381  ,Interrupt ID381  Priority/Priority Byte Offset 381 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID380  ,Interrupt ID380   Priority/Priority Byte Offset 380 "
else
hgroup.long 0x560++0x03
hide.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
hgroup.long 0x564++0x03
hide.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
hgroup.long 0x568++0x03
hide.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
hgroup.long 0x56C++0x03
hide.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
hgroup.long 0x570++0x03
hide.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
hgroup.long 0x574++0x03
hide.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
hgroup.long 0x578++0x03
hide.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
hgroup.long 0x57C++0x03
hide.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x580++0x03
line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
hexmask.long.byte 0x00 24.--31. 1. " INTID387  ,Interrupt ID387  Priority/Priority Byte Offset 387 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID386  ,Interrupt ID386   Priority/Priority Byte Offset 386 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID385  ,Interrupt ID385  Priority/Priority Byte Offset 385 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID384  ,Interrupt ID384   Priority/Priority Byte Offset 384 "
group.long 0x584++0x03
line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
hexmask.long.byte 0x00 24.--31. 1. " INTID391  ,Interrupt ID391  Priority/Priority Byte Offset 391 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID390  ,Interrupt ID390   Priority/Priority Byte Offset 390 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID389  ,Interrupt ID389  Priority/Priority Byte Offset 389 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID388  ,Interrupt ID388   Priority/Priority Byte Offset 388 "
group.long 0x588++0x03
line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
hexmask.long.byte 0x00 24.--31. 1. " INTID395  ,Interrupt ID395  Priority/Priority Byte Offset 395 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID394  ,Interrupt ID394   Priority/Priority Byte Offset 394 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID393  ,Interrupt ID393  Priority/Priority Byte Offset 393 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID392  ,Interrupt ID392   Priority/Priority Byte Offset 392 "
group.long 0x58C++0x03
line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
hexmask.long.byte 0x00 24.--31. 1. " INTID399  ,Interrupt ID399  Priority/Priority Byte Offset 399 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID398  ,Interrupt ID398   Priority/Priority Byte Offset 398 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID397  ,Interrupt ID397  Priority/Priority Byte Offset 397 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID396  ,Interrupt ID396   Priority/Priority Byte Offset 396 "
group.long 0x590++0x03
line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
hexmask.long.byte 0x00 24.--31. 1. " INTID403  ,Interrupt ID403  Priority/Priority Byte Offset 403 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID402  ,Interrupt ID402   Priority/Priority Byte Offset 402 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID401  ,Interrupt ID401  Priority/Priority Byte Offset 401 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID400  ,Interrupt ID400   Priority/Priority Byte Offset 400 "
group.long 0x594++0x03
line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
hexmask.long.byte 0x00 24.--31. 1. " INTID407  ,Interrupt ID407  Priority/Priority Byte Offset 407 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID406  ,Interrupt ID406   Priority/Priority Byte Offset 406 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID405  ,Interrupt ID405  Priority/Priority Byte Offset 405 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID404  ,Interrupt ID404   Priority/Priority Byte Offset 404 "
group.long 0x598++0x03
line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
hexmask.long.byte 0x00 24.--31. 1. " INTID411  ,Interrupt ID411  Priority/Priority Byte Offset 411 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID410  ,Interrupt ID410   Priority/Priority Byte Offset 410 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID409  ,Interrupt ID409  Priority/Priority Byte Offset 409 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID408  ,Interrupt ID408   Priority/Priority Byte Offset 408 "
group.long 0x59C++0x03
line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
hexmask.long.byte 0x00 24.--31. 1. " INTID415  ,Interrupt ID415  Priority/Priority Byte Offset 415 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID414  ,Interrupt ID414   Priority/Priority Byte Offset 414 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID413  ,Interrupt ID413  Priority/Priority Byte Offset 413 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID412  ,Interrupt ID412   Priority/Priority Byte Offset 412 "
else
hgroup.long 0x580++0x03
hide.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
hgroup.long 0x584++0x03
hide.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
hgroup.long 0x588++0x03
hide.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
hgroup.long 0x58C++0x03
hide.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
hgroup.long 0x590++0x03
hide.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
hgroup.long 0x594++0x03
hide.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
hgroup.long 0x598++0x03
hide.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
hgroup.long 0x59C++0x03
hide.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x5A0++0x03
line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
hexmask.long.byte 0x00 24.--31. 1. " INTID419  ,Interrupt ID419  Priority/Priority Byte Offset 419 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID418  ,Interrupt ID418   Priority/Priority Byte Offset 418 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID417  ,Interrupt ID417  Priority/Priority Byte Offset 417 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID416  ,Interrupt ID416   Priority/Priority Byte Offset 416 "
group.long 0x5A4++0x03
line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
hexmask.long.byte 0x00 24.--31. 1. " INTID423  ,Interrupt ID423  Priority/Priority Byte Offset 423 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID422  ,Interrupt ID422   Priority/Priority Byte Offset 422 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID421  ,Interrupt ID421  Priority/Priority Byte Offset 421 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID420  ,Interrupt ID420   Priority/Priority Byte Offset 420 "
group.long 0x5A8++0x03
line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
hexmask.long.byte 0x00 24.--31. 1. " INTID427  ,Interrupt ID427  Priority/Priority Byte Offset 427 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID426  ,Interrupt ID426   Priority/Priority Byte Offset 426 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID425  ,Interrupt ID425  Priority/Priority Byte Offset 425 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID424  ,Interrupt ID424   Priority/Priority Byte Offset 424 "
group.long 0x5AC++0x03
line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
hexmask.long.byte 0x00 24.--31. 1. " INTID431  ,Interrupt ID431  Priority/Priority Byte Offset 431 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID430  ,Interrupt ID430   Priority/Priority Byte Offset 430 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID429  ,Interrupt ID429  Priority/Priority Byte Offset 429 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID428  ,Interrupt ID428   Priority/Priority Byte Offset 428 "
group.long 0x5B0++0x03
line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
hexmask.long.byte 0x00 24.--31. 1. " INTID435  ,Interrupt ID435  Priority/Priority Byte Offset 435 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID434  ,Interrupt ID434   Priority/Priority Byte Offset 434 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID433  ,Interrupt ID433  Priority/Priority Byte Offset 433 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID432  ,Interrupt ID432   Priority/Priority Byte Offset 432 "
group.long 0x5B4++0x03
line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
hexmask.long.byte 0x00 24.--31. 1. " INTID439  ,Interrupt ID439  Priority/Priority Byte Offset 439 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID438  ,Interrupt ID438   Priority/Priority Byte Offset 438 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID437  ,Interrupt ID437  Priority/Priority Byte Offset 437 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID436  ,Interrupt ID436   Priority/Priority Byte Offset 436 "
group.long 0x5B8++0x03
line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
hexmask.long.byte 0x00 24.--31. 1. " INTID443  ,Interrupt ID443  Priority/Priority Byte Offset 443 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID442  ,Interrupt ID442   Priority/Priority Byte Offset 442 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID441  ,Interrupt ID441  Priority/Priority Byte Offset 441 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID440  ,Interrupt ID440   Priority/Priority Byte Offset 440 "
group.long 0x5BC++0x03
line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
hexmask.long.byte 0x00 24.--31. 1. " INTID447  ,Interrupt ID447  Priority/Priority Byte Offset 447 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID446  ,Interrupt ID446   Priority/Priority Byte Offset 446 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID445  ,Interrupt ID445  Priority/Priority Byte Offset 445 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID444  ,Interrupt ID444   Priority/Priority Byte Offset 444 "
else
hgroup.long 0x5A0++0x03
hide.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
hgroup.long 0x5A4++0x03
hide.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
hgroup.long 0x5A8++0x03
hide.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
hgroup.long 0x5AC++0x03
hide.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
hgroup.long 0x5B0++0x03
hide.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
hgroup.long 0x5B4++0x03
hide.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
hgroup.long 0x5B8++0x03
hide.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
hgroup.long 0x5BC++0x03
hide.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x5C0++0x03
line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
hexmask.long.byte 0x00 24.--31. 1. " INTID451  ,Interrupt ID451  Priority/Priority Byte Offset 451 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID450  ,Interrupt ID450   Priority/Priority Byte Offset 450 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID449  ,Interrupt ID449  Priority/Priority Byte Offset 449 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID448  ,Interrupt ID448   Priority/Priority Byte Offset 448 "
group.long 0x5C4++0x03
line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
hexmask.long.byte 0x00 24.--31. 1. " INTID455  ,Interrupt ID455  Priority/Priority Byte Offset 455 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID454  ,Interrupt ID454   Priority/Priority Byte Offset 454 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID453  ,Interrupt ID453  Priority/Priority Byte Offset 453 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID452  ,Interrupt ID452   Priority/Priority Byte Offset 452 "
group.long 0x5C8++0x03
line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
hexmask.long.byte 0x00 24.--31. 1. " INTID459  ,Interrupt ID459  Priority/Priority Byte Offset 459 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID458  ,Interrupt ID458   Priority/Priority Byte Offset 458 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID457  ,Interrupt ID457  Priority/Priority Byte Offset 457 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID456  ,Interrupt ID456   Priority/Priority Byte Offset 456 "
group.long 0x5CC++0x03
line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
hexmask.long.byte 0x00 24.--31. 1. " INTID463  ,Interrupt ID463  Priority/Priority Byte Offset 463 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID462  ,Interrupt ID462   Priority/Priority Byte Offset 462 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID461  ,Interrupt ID461  Priority/Priority Byte Offset 461 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID460  ,Interrupt ID460   Priority/Priority Byte Offset 460 "
group.long 0x5D0++0x03
line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
hexmask.long.byte 0x00 24.--31. 1. " INTID467  ,Interrupt ID467  Priority/Priority Byte Offset 467 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID466  ,Interrupt ID466   Priority/Priority Byte Offset 466 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID465  ,Interrupt ID465  Priority/Priority Byte Offset 465 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID464  ,Interrupt ID464   Priority/Priority Byte Offset 464 "
group.long 0x5D4++0x03
line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
hexmask.long.byte 0x00 24.--31. 1. " INTID471  ,Interrupt ID471  Priority/Priority Byte Offset 471 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID470  ,Interrupt ID470   Priority/Priority Byte Offset 470 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID469  ,Interrupt ID469  Priority/Priority Byte Offset 469 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID468  ,Interrupt ID468   Priority/Priority Byte Offset 468 "
group.long 0x5D8++0x03
line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
hexmask.long.byte 0x00 24.--31. 1. " INTID475  ,Interrupt ID475  Priority/Priority Byte Offset 475 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID474  ,Interrupt ID474   Priority/Priority Byte Offset 474 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID473  ,Interrupt ID473  Priority/Priority Byte Offset 473 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID472  ,Interrupt ID472   Priority/Priority Byte Offset 472 "
group.long 0x5DC++0x03
line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
hexmask.long.byte 0x00 24.--31. 1. " INTID479  ,Interrupt ID479  Priority/Priority Byte Offset 479 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID478  ,Interrupt ID478   Priority/Priority Byte Offset 478 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID477  ,Interrupt ID477  Priority/Priority Byte Offset 477 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID476  ,Interrupt ID476   Priority/Priority Byte Offset 476 "
else
hgroup.long 0x5C0++0x03
hide.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
hgroup.long 0x5C4++0x03
hide.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
hgroup.long 0x5C8++0x03
hide.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
hgroup.long 0x5CC++0x03
hide.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
hgroup.long 0x5D0++0x03
hide.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
hgroup.long 0x5D4++0x03
hide.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
hgroup.long 0x5D8++0x03
hide.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
hgroup.long 0x5DC++0x03
hide.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x5E0++0x03
line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
hexmask.long.byte 0x00 24.--31. 1. " INTID483  ,Interrupt ID483  Priority/Priority Byte Offset 483 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID482  ,Interrupt ID482   Priority/Priority Byte Offset 482 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID481  ,Interrupt ID481  Priority/Priority Byte Offset 481 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID480  ,Interrupt ID480   Priority/Priority Byte Offset 480 "
group.long 0x5E4++0x03
line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
hexmask.long.byte 0x00 24.--31. 1. " INTID487  ,Interrupt ID487  Priority/Priority Byte Offset 487 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID486  ,Interrupt ID486   Priority/Priority Byte Offset 486 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID485  ,Interrupt ID485  Priority/Priority Byte Offset 485 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID484  ,Interrupt ID484   Priority/Priority Byte Offset 484 "
group.long 0x5E8++0x03
line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
hexmask.long.byte 0x00 24.--31. 1. " INTID491  ,Interrupt ID491  Priority/Priority Byte Offset 491 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID490  ,Interrupt ID490   Priority/Priority Byte Offset 490 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID489  ,Interrupt ID489  Priority/Priority Byte Offset 489 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID488  ,Interrupt ID488   Priority/Priority Byte Offset 488 "
group.long 0x5EC++0x03
line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
hexmask.long.byte 0x00 24.--31. 1. " INTID495  ,Interrupt ID495  Priority/Priority Byte Offset 495 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID494  ,Interrupt ID494   Priority/Priority Byte Offset 494 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID493  ,Interrupt ID493  Priority/Priority Byte Offset 493 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID492  ,Interrupt ID492   Priority/Priority Byte Offset 492 "
group.long 0x5F0++0x03
line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
hexmask.long.byte 0x00 24.--31. 1. " INTID499  ,Interrupt ID499  Priority/Priority Byte Offset 499 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID498  ,Interrupt ID498   Priority/Priority Byte Offset 498 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID497  ,Interrupt ID497  Priority/Priority Byte Offset 497 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID496  ,Interrupt ID496   Priority/Priority Byte Offset 496 "
group.long 0x5F4++0x03
line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
hexmask.long.byte 0x00 24.--31. 1. " INTID503  ,Interrupt ID503  Priority/Priority Byte Offset 503 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID502  ,Interrupt ID502   Priority/Priority Byte Offset 502 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID501  ,Interrupt ID501  Priority/Priority Byte Offset 501 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID500  ,Interrupt ID500   Priority/Priority Byte Offset 500 "
group.long 0x5F8++0x03
line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
hexmask.long.byte 0x00 24.--31. 1. " INTID507  ,Interrupt ID507  Priority/Priority Byte Offset 507 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID506  ,Interrupt ID506   Priority/Priority Byte Offset 506 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID505  ,Interrupt ID505  Priority/Priority Byte Offset 505 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID504  ,Interrupt ID504   Priority/Priority Byte Offset 504 "
group.long 0x5FC++0x03
line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
hexmask.long.byte 0x00 24.--31. 1. " INTID511  ,Interrupt ID511  Priority/Priority Byte Offset 511 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID510  ,Interrupt ID510   Priority/Priority Byte Offset 510 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID509  ,Interrupt ID509  Priority/Priority Byte Offset 509 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID508  ,Interrupt ID508   Priority/Priority Byte Offset 508 "
else
hgroup.long 0x5E0++0x03
hide.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
hgroup.long 0x5E4++0x03
hide.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
hgroup.long 0x5E8++0x03
hide.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
hgroup.long 0x5EC++0x03
hide.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
hgroup.long 0x5F0++0x03
hide.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
hgroup.long 0x5F4++0x03
hide.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
hgroup.long 0x5F8++0x03
hide.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
hgroup.long 0x5FC++0x03
hide.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0x600++0x03
line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
hexmask.long.byte 0x00 24.--31. 1. " INTID515  ,Interrupt ID515  Priority/Priority Byte Offset 515 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID514  ,Interrupt ID514   Priority/Priority Byte Offset 514 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID513  ,Interrupt ID513  Priority/Priority Byte Offset 513 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID512  ,Interrupt ID512   Priority/Priority Byte Offset 512 "
group.long 0x604++0x03
line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
hexmask.long.byte 0x00 24.--31. 1. " INTID519  ,Interrupt ID519  Priority/Priority Byte Offset 519 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID518  ,Interrupt ID518   Priority/Priority Byte Offset 518 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID517  ,Interrupt ID517  Priority/Priority Byte Offset 517 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID516  ,Interrupt ID516   Priority/Priority Byte Offset 516 "
group.long 0x608++0x03
line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
hexmask.long.byte 0x00 24.--31. 1. " INTID523  ,Interrupt ID523  Priority/Priority Byte Offset 523 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID522  ,Interrupt ID522   Priority/Priority Byte Offset 522 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID521  ,Interrupt ID521  Priority/Priority Byte Offset 521 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID520  ,Interrupt ID520   Priority/Priority Byte Offset 520 "
group.long 0x60C++0x03
line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
hexmask.long.byte 0x00 24.--31. 1. " INTID527  ,Interrupt ID527  Priority/Priority Byte Offset 527 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID526  ,Interrupt ID526   Priority/Priority Byte Offset 526 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID525  ,Interrupt ID525  Priority/Priority Byte Offset 525 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID524  ,Interrupt ID524   Priority/Priority Byte Offset 524 "
group.long 0x610++0x03
line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
hexmask.long.byte 0x00 24.--31. 1. " INTID531  ,Interrupt ID531  Priority/Priority Byte Offset 531 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID530  ,Interrupt ID530   Priority/Priority Byte Offset 530 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID529  ,Interrupt ID529  Priority/Priority Byte Offset 529 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID528  ,Interrupt ID528   Priority/Priority Byte Offset 528 "
group.long 0x614++0x03
line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
hexmask.long.byte 0x00 24.--31. 1. " INTID535  ,Interrupt ID535  Priority/Priority Byte Offset 535 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID534  ,Interrupt ID534   Priority/Priority Byte Offset 534 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID533  ,Interrupt ID533  Priority/Priority Byte Offset 533 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID532  ,Interrupt ID532   Priority/Priority Byte Offset 532 "
group.long 0x618++0x03
line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
hexmask.long.byte 0x00 24.--31. 1. " INTID539  ,Interrupt ID539  Priority/Priority Byte Offset 539 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID538  ,Interrupt ID538   Priority/Priority Byte Offset 538 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID537  ,Interrupt ID537  Priority/Priority Byte Offset 537 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID536  ,Interrupt ID536   Priority/Priority Byte Offset 536 "
group.long 0x61C++0x03
line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
hexmask.long.byte 0x00 24.--31. 1. " INTID543  ,Interrupt ID543  Priority/Priority Byte Offset 543 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID542  ,Interrupt ID542   Priority/Priority Byte Offset 542 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID541  ,Interrupt ID541  Priority/Priority Byte Offset 541 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID540  ,Interrupt ID540   Priority/Priority Byte Offset 540 "
else
hgroup.long 0x600++0x03
hide.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
hgroup.long 0x604++0x03
hide.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
hgroup.long 0x608++0x03
hide.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
hgroup.long 0x60C++0x03
hide.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
hgroup.long 0x610++0x03
hide.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
hgroup.long 0x614++0x03
hide.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
hgroup.long 0x618++0x03
hide.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
hgroup.long 0x61C++0x03
hide.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0x620++0x03
line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
hexmask.long.byte 0x00 24.--31. 1. " INTID547  ,Interrupt ID547  Priority/Priority Byte Offset 547 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID546  ,Interrupt ID546   Priority/Priority Byte Offset 546 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID545  ,Interrupt ID545  Priority/Priority Byte Offset 545 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID544  ,Interrupt ID544   Priority/Priority Byte Offset 544 "
group.long 0x624++0x03
line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
hexmask.long.byte 0x00 24.--31. 1. " INTID551  ,Interrupt ID551  Priority/Priority Byte Offset 551 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID550  ,Interrupt ID550   Priority/Priority Byte Offset 550 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID549  ,Interrupt ID549  Priority/Priority Byte Offset 549 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID548  ,Interrupt ID548   Priority/Priority Byte Offset 548 "
group.long 0x628++0x03
line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
hexmask.long.byte 0x00 24.--31. 1. " INTID555  ,Interrupt ID555  Priority/Priority Byte Offset 555 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID554  ,Interrupt ID554   Priority/Priority Byte Offset 554 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID553  ,Interrupt ID553  Priority/Priority Byte Offset 553 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID552  ,Interrupt ID552   Priority/Priority Byte Offset 552 "
group.long 0x62C++0x03
line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
hexmask.long.byte 0x00 24.--31. 1. " INTID559  ,Interrupt ID559  Priority/Priority Byte Offset 559 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID558  ,Interrupt ID558   Priority/Priority Byte Offset 558 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID557  ,Interrupt ID557  Priority/Priority Byte Offset 557 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID556  ,Interrupt ID556   Priority/Priority Byte Offset 556 "
group.long 0x630++0x03
line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
hexmask.long.byte 0x00 24.--31. 1. " INTID563  ,Interrupt ID563  Priority/Priority Byte Offset 563 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID562  ,Interrupt ID562   Priority/Priority Byte Offset 562 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID561  ,Interrupt ID561  Priority/Priority Byte Offset 561 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID560  ,Interrupt ID560   Priority/Priority Byte Offset 560 "
group.long 0x634++0x03
line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
hexmask.long.byte 0x00 24.--31. 1. " INTID567  ,Interrupt ID567  Priority/Priority Byte Offset 567 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID566  ,Interrupt ID566   Priority/Priority Byte Offset 566 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID565  ,Interrupt ID565  Priority/Priority Byte Offset 565 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID564  ,Interrupt ID564   Priority/Priority Byte Offset 564 "
group.long 0x638++0x03
line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
hexmask.long.byte 0x00 24.--31. 1. " INTID571  ,Interrupt ID571  Priority/Priority Byte Offset 571 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID570  ,Interrupt ID570   Priority/Priority Byte Offset 570 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID569  ,Interrupt ID569  Priority/Priority Byte Offset 569 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID568  ,Interrupt ID568   Priority/Priority Byte Offset 568 "
group.long 0x63C++0x03
line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
hexmask.long.byte 0x00 24.--31. 1. " INTID575  ,Interrupt ID575  Priority/Priority Byte Offset 575 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID574  ,Interrupt ID574   Priority/Priority Byte Offset 574 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID573  ,Interrupt ID573  Priority/Priority Byte Offset 573 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID572  ,Interrupt ID572   Priority/Priority Byte Offset 572 "
else
hgroup.long 0x620++0x03
hide.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
hgroup.long 0x624++0x03
hide.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
hgroup.long 0x628++0x03
hide.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
hgroup.long 0x62C++0x03
hide.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
hgroup.long 0x630++0x03
hide.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
hgroup.long 0x634++0x03
hide.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
hgroup.long 0x638++0x03
hide.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
hgroup.long 0x63C++0x03
hide.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0x640++0x03
line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
hexmask.long.byte 0x00 24.--31. 1. " INTID579  ,Interrupt ID579  Priority/Priority Byte Offset 579 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID578  ,Interrupt ID578   Priority/Priority Byte Offset 578 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID577  ,Interrupt ID577  Priority/Priority Byte Offset 577 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID576  ,Interrupt ID576   Priority/Priority Byte Offset 576 "
group.long 0x644++0x03
line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
hexmask.long.byte 0x00 24.--31. 1. " INTID583  ,Interrupt ID583  Priority/Priority Byte Offset 583 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID582  ,Interrupt ID582   Priority/Priority Byte Offset 582 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID581  ,Interrupt ID581  Priority/Priority Byte Offset 581 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID580  ,Interrupt ID580   Priority/Priority Byte Offset 580 "
group.long 0x648++0x03
line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
hexmask.long.byte 0x00 24.--31. 1. " INTID587  ,Interrupt ID587  Priority/Priority Byte Offset 587 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID586  ,Interrupt ID586   Priority/Priority Byte Offset 586 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID585  ,Interrupt ID585  Priority/Priority Byte Offset 585 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID584  ,Interrupt ID584   Priority/Priority Byte Offset 584 "
group.long 0x64C++0x03
line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
hexmask.long.byte 0x00 24.--31. 1. " INTID591  ,Interrupt ID591  Priority/Priority Byte Offset 591 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID590  ,Interrupt ID590   Priority/Priority Byte Offset 590 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID589  ,Interrupt ID589  Priority/Priority Byte Offset 589 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID588  ,Interrupt ID588   Priority/Priority Byte Offset 588 "
group.long 0x650++0x03
line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
hexmask.long.byte 0x00 24.--31. 1. " INTID595  ,Interrupt ID595  Priority/Priority Byte Offset 595 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID594  ,Interrupt ID594   Priority/Priority Byte Offset 594 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID593  ,Interrupt ID593  Priority/Priority Byte Offset 593 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID592  ,Interrupt ID592   Priority/Priority Byte Offset 592 "
group.long 0x654++0x03
line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
hexmask.long.byte 0x00 24.--31. 1. " INTID599  ,Interrupt ID599  Priority/Priority Byte Offset 599 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID598  ,Interrupt ID598   Priority/Priority Byte Offset 598 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID597  ,Interrupt ID597  Priority/Priority Byte Offset 597 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID596  ,Interrupt ID596   Priority/Priority Byte Offset 596 "
group.long 0x658++0x03
line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
hexmask.long.byte 0x00 24.--31. 1. " INTID603  ,Interrupt ID603  Priority/Priority Byte Offset 603 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID602  ,Interrupt ID602   Priority/Priority Byte Offset 602 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID601  ,Interrupt ID601  Priority/Priority Byte Offset 601 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID600  ,Interrupt ID600   Priority/Priority Byte Offset 600 "
group.long 0x65C++0x03
line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
hexmask.long.byte 0x00 24.--31. 1. " INTID607  ,Interrupt ID607  Priority/Priority Byte Offset 607 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID606  ,Interrupt ID606   Priority/Priority Byte Offset 606 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID605  ,Interrupt ID605  Priority/Priority Byte Offset 605 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID604  ,Interrupt ID604   Priority/Priority Byte Offset 604 "
else
hgroup.long 0x640++0x03
hide.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
hgroup.long 0x644++0x03
hide.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
hgroup.long 0x648++0x03
hide.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
hgroup.long 0x64C++0x03
hide.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
hgroup.long 0x650++0x03
hide.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
hgroup.long 0x654++0x03
hide.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
hgroup.long 0x658++0x03
hide.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
hgroup.long 0x65C++0x03
hide.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0x660++0x03
line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
hexmask.long.byte 0x00 24.--31. 1. " INTID611  ,Interrupt ID611  Priority/Priority Byte Offset 611 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID610  ,Interrupt ID610   Priority/Priority Byte Offset 610 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID609  ,Interrupt ID609  Priority/Priority Byte Offset 609 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID608  ,Interrupt ID608   Priority/Priority Byte Offset 608 "
group.long 0x664++0x03
line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
hexmask.long.byte 0x00 24.--31. 1. " INTID615  ,Interrupt ID615  Priority/Priority Byte Offset 615 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID614  ,Interrupt ID614   Priority/Priority Byte Offset 614 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID613  ,Interrupt ID613  Priority/Priority Byte Offset 613 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID612  ,Interrupt ID612   Priority/Priority Byte Offset 612 "
group.long 0x668++0x03
line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
hexmask.long.byte 0x00 24.--31. 1. " INTID619  ,Interrupt ID619  Priority/Priority Byte Offset 619 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID618  ,Interrupt ID618   Priority/Priority Byte Offset 618 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID617  ,Interrupt ID617  Priority/Priority Byte Offset 617 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID616  ,Interrupt ID616   Priority/Priority Byte Offset 616 "
group.long 0x66C++0x03
line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
hexmask.long.byte 0x00 24.--31. 1. " INTID623  ,Interrupt ID623  Priority/Priority Byte Offset 623 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID622  ,Interrupt ID622   Priority/Priority Byte Offset 622 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID621  ,Interrupt ID621  Priority/Priority Byte Offset 621 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID620  ,Interrupt ID620   Priority/Priority Byte Offset 620 "
group.long 0x670++0x03
line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
hexmask.long.byte 0x00 24.--31. 1. " INTID627  ,Interrupt ID627  Priority/Priority Byte Offset 627 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID626  ,Interrupt ID626   Priority/Priority Byte Offset 626 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID625  ,Interrupt ID625  Priority/Priority Byte Offset 625 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID624  ,Interrupt ID624   Priority/Priority Byte Offset 624 "
group.long 0x674++0x03
line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
hexmask.long.byte 0x00 24.--31. 1. " INTID631  ,Interrupt ID631  Priority/Priority Byte Offset 631 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID630  ,Interrupt ID630   Priority/Priority Byte Offset 630 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID629  ,Interrupt ID629  Priority/Priority Byte Offset 629 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID628  ,Interrupt ID628   Priority/Priority Byte Offset 628 "
group.long 0x678++0x03
line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
hexmask.long.byte 0x00 24.--31. 1. " INTID635  ,Interrupt ID635  Priority/Priority Byte Offset 635 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID634  ,Interrupt ID634   Priority/Priority Byte Offset 634 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID633  ,Interrupt ID633  Priority/Priority Byte Offset 633 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID632  ,Interrupt ID632   Priority/Priority Byte Offset 632 "
group.long 0x67C++0x03
line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
hexmask.long.byte 0x00 24.--31. 1. " INTID639  ,Interrupt ID639  Priority/Priority Byte Offset 639 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID638  ,Interrupt ID638   Priority/Priority Byte Offset 638 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID637  ,Interrupt ID637  Priority/Priority Byte Offset 637 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID636  ,Interrupt ID636   Priority/Priority Byte Offset 636 "
else
hgroup.long 0x660++0x03
hide.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
hgroup.long 0x664++0x03
hide.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
hgroup.long 0x668++0x03
hide.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
hgroup.long 0x66C++0x03
hide.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
hgroup.long 0x670++0x03
hide.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
hgroup.long 0x674++0x03
hide.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
hgroup.long 0x678++0x03
hide.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
hgroup.long 0x67C++0x03
hide.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0x680++0x03
line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
hexmask.long.byte 0x00 24.--31. 1. " INTID643  ,Interrupt ID643  Priority/Priority Byte Offset 643 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID642  ,Interrupt ID642   Priority/Priority Byte Offset 642 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID641  ,Interrupt ID641  Priority/Priority Byte Offset 641 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID640  ,Interrupt ID640   Priority/Priority Byte Offset 640 "
group.long 0x684++0x03
line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
hexmask.long.byte 0x00 24.--31. 1. " INTID647  ,Interrupt ID647  Priority/Priority Byte Offset 647 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID646  ,Interrupt ID646   Priority/Priority Byte Offset 646 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID645  ,Interrupt ID645  Priority/Priority Byte Offset 645 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID644  ,Interrupt ID644   Priority/Priority Byte Offset 644 "
group.long 0x688++0x03
line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
hexmask.long.byte 0x00 24.--31. 1. " INTID651  ,Interrupt ID651  Priority/Priority Byte Offset 651 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID650  ,Interrupt ID650   Priority/Priority Byte Offset 650 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID649  ,Interrupt ID649  Priority/Priority Byte Offset 649 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID648  ,Interrupt ID648   Priority/Priority Byte Offset 648 "
group.long 0x68C++0x03
line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
hexmask.long.byte 0x00 24.--31. 1. " INTID655  ,Interrupt ID655  Priority/Priority Byte Offset 655 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID654  ,Interrupt ID654   Priority/Priority Byte Offset 654 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID653  ,Interrupt ID653  Priority/Priority Byte Offset 653 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID652  ,Interrupt ID652   Priority/Priority Byte Offset 652 "
group.long 0x690++0x03
line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
hexmask.long.byte 0x00 24.--31. 1. " INTID659  ,Interrupt ID659  Priority/Priority Byte Offset 659 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID658  ,Interrupt ID658   Priority/Priority Byte Offset 658 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID657  ,Interrupt ID657  Priority/Priority Byte Offset 657 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID656  ,Interrupt ID656   Priority/Priority Byte Offset 656 "
group.long 0x694++0x03
line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
hexmask.long.byte 0x00 24.--31. 1. " INTID663  ,Interrupt ID663  Priority/Priority Byte Offset 663 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID662  ,Interrupt ID662   Priority/Priority Byte Offset 662 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID661  ,Interrupt ID661  Priority/Priority Byte Offset 661 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID660  ,Interrupt ID660   Priority/Priority Byte Offset 660 "
group.long 0x698++0x03
line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
hexmask.long.byte 0x00 24.--31. 1. " INTID667  ,Interrupt ID667  Priority/Priority Byte Offset 667 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID666  ,Interrupt ID666   Priority/Priority Byte Offset 666 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID665  ,Interrupt ID665  Priority/Priority Byte Offset 665 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID664  ,Interrupt ID664   Priority/Priority Byte Offset 664 "
group.long 0x69C++0x03
line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
hexmask.long.byte 0x00 24.--31. 1. " INTID671  ,Interrupt ID671  Priority/Priority Byte Offset 671 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID670  ,Interrupt ID670   Priority/Priority Byte Offset 670 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID669  ,Interrupt ID669  Priority/Priority Byte Offset 669 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID668  ,Interrupt ID668   Priority/Priority Byte Offset 668 "
else
hgroup.long 0x680++0x03
hide.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
hgroup.long 0x684++0x03
hide.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
hgroup.long 0x688++0x03
hide.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
hgroup.long 0x68C++0x03
hide.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
hgroup.long 0x690++0x03
hide.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
hgroup.long 0x694++0x03
hide.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
hgroup.long 0x698++0x03
hide.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
hgroup.long 0x69C++0x03
hide.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0x6A0++0x03
line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
hexmask.long.byte 0x00 24.--31. 1. " INTID675  ,Interrupt ID675  Priority/Priority Byte Offset 675 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID674  ,Interrupt ID674   Priority/Priority Byte Offset 674 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID673  ,Interrupt ID673  Priority/Priority Byte Offset 673 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID672  ,Interrupt ID672   Priority/Priority Byte Offset 672 "
group.long 0x6A4++0x03
line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
hexmask.long.byte 0x00 24.--31. 1. " INTID679  ,Interrupt ID679  Priority/Priority Byte Offset 679 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID678  ,Interrupt ID678   Priority/Priority Byte Offset 678 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID677  ,Interrupt ID677  Priority/Priority Byte Offset 677 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID676  ,Interrupt ID676   Priority/Priority Byte Offset 676 "
group.long 0x6A8++0x03
line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
hexmask.long.byte 0x00 24.--31. 1. " INTID683  ,Interrupt ID683  Priority/Priority Byte Offset 683 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID682  ,Interrupt ID682   Priority/Priority Byte Offset 682 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID681  ,Interrupt ID681  Priority/Priority Byte Offset 681 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID680  ,Interrupt ID680   Priority/Priority Byte Offset 680 "
group.long 0x6AC++0x03
line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
hexmask.long.byte 0x00 24.--31. 1. " INTID687  ,Interrupt ID687  Priority/Priority Byte Offset 687 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID686  ,Interrupt ID686   Priority/Priority Byte Offset 686 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID685  ,Interrupt ID685  Priority/Priority Byte Offset 685 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID684  ,Interrupt ID684   Priority/Priority Byte Offset 684 "
group.long 0x6B0++0x03
line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
hexmask.long.byte 0x00 24.--31. 1. " INTID691  ,Interrupt ID691  Priority/Priority Byte Offset 691 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID690  ,Interrupt ID690   Priority/Priority Byte Offset 690 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID689  ,Interrupt ID689  Priority/Priority Byte Offset 689 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID688  ,Interrupt ID688   Priority/Priority Byte Offset 688 "
group.long 0x6B4++0x03
line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
hexmask.long.byte 0x00 24.--31. 1. " INTID695  ,Interrupt ID695  Priority/Priority Byte Offset 695 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID694  ,Interrupt ID694   Priority/Priority Byte Offset 694 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID693  ,Interrupt ID693  Priority/Priority Byte Offset 693 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID692  ,Interrupt ID692   Priority/Priority Byte Offset 692 "
group.long 0x6B8++0x03
line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
hexmask.long.byte 0x00 24.--31. 1. " INTID699  ,Interrupt ID699  Priority/Priority Byte Offset 699 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID698  ,Interrupt ID698   Priority/Priority Byte Offset 698 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID697  ,Interrupt ID697  Priority/Priority Byte Offset 697 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID696  ,Interrupt ID696   Priority/Priority Byte Offset 696 "
group.long 0x6BC++0x03
line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
hexmask.long.byte 0x00 24.--31. 1. " INTID703  ,Interrupt ID703  Priority/Priority Byte Offset 703 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID702  ,Interrupt ID702   Priority/Priority Byte Offset 702 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID701  ,Interrupt ID701  Priority/Priority Byte Offset 701 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID700  ,Interrupt ID700   Priority/Priority Byte Offset 700 "
else
hgroup.long 0x6A0++0x03
hide.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
hgroup.long 0x6A4++0x03
hide.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
hgroup.long 0x6A8++0x03
hide.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
hgroup.long 0x6AC++0x03
hide.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
hgroup.long 0x6B0++0x03
hide.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
hgroup.long 0x6B4++0x03
hide.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
hgroup.long 0x6B8++0x03
hide.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
hgroup.long 0x6BC++0x03
hide.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0x6C0++0x03
line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
hexmask.long.byte 0x00 24.--31. 1. " INTID707  ,Interrupt ID707  Priority/Priority Byte Offset 707 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID706  ,Interrupt ID706   Priority/Priority Byte Offset 706 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID705  ,Interrupt ID705  Priority/Priority Byte Offset 705 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID704  ,Interrupt ID704   Priority/Priority Byte Offset 704 "
group.long 0x6C4++0x03
line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
hexmask.long.byte 0x00 24.--31. 1. " INTID711  ,Interrupt ID711  Priority/Priority Byte Offset 711 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID710  ,Interrupt ID710   Priority/Priority Byte Offset 710 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID709  ,Interrupt ID709  Priority/Priority Byte Offset 709 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID708  ,Interrupt ID708   Priority/Priority Byte Offset 708 "
group.long 0x6C8++0x03
line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
hexmask.long.byte 0x00 24.--31. 1. " INTID715  ,Interrupt ID715  Priority/Priority Byte Offset 715 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID714  ,Interrupt ID714   Priority/Priority Byte Offset 714 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID713  ,Interrupt ID713  Priority/Priority Byte Offset 713 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID712  ,Interrupt ID712   Priority/Priority Byte Offset 712 "
group.long 0x6CC++0x03
line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
hexmask.long.byte 0x00 24.--31. 1. " INTID719  ,Interrupt ID719  Priority/Priority Byte Offset 719 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID718  ,Interrupt ID718   Priority/Priority Byte Offset 718 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID717  ,Interrupt ID717  Priority/Priority Byte Offset 717 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID716  ,Interrupt ID716   Priority/Priority Byte Offset 716 "
group.long 0x6D0++0x03
line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
hexmask.long.byte 0x00 24.--31. 1. " INTID723  ,Interrupt ID723  Priority/Priority Byte Offset 723 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID722  ,Interrupt ID722   Priority/Priority Byte Offset 722 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID721  ,Interrupt ID721  Priority/Priority Byte Offset 721 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID720  ,Interrupt ID720   Priority/Priority Byte Offset 720 "
group.long 0x6D4++0x03
line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
hexmask.long.byte 0x00 24.--31. 1. " INTID727  ,Interrupt ID727  Priority/Priority Byte Offset 727 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID726  ,Interrupt ID726   Priority/Priority Byte Offset 726 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID725  ,Interrupt ID725  Priority/Priority Byte Offset 725 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID724  ,Interrupt ID724   Priority/Priority Byte Offset 724 "
group.long 0x6D8++0x03
line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
hexmask.long.byte 0x00 24.--31. 1. " INTID731  ,Interrupt ID731  Priority/Priority Byte Offset 731 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID730  ,Interrupt ID730   Priority/Priority Byte Offset 730 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID729  ,Interrupt ID729  Priority/Priority Byte Offset 729 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID728  ,Interrupt ID728   Priority/Priority Byte Offset 728 "
group.long 0x6DC++0x03
line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
hexmask.long.byte 0x00 24.--31. 1. " INTID735  ,Interrupt ID735  Priority/Priority Byte Offset 735 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID734  ,Interrupt ID734   Priority/Priority Byte Offset 734 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID733  ,Interrupt ID733  Priority/Priority Byte Offset 733 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID732  ,Interrupt ID732   Priority/Priority Byte Offset 732 "
else
hgroup.long 0x6C0++0x03
hide.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
hgroup.long 0x6C4++0x03
hide.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
hgroup.long 0x6C8++0x03
hide.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
hgroup.long 0x6CC++0x03
hide.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
hgroup.long 0x6D0++0x03
hide.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
hgroup.long 0x6D4++0x03
hide.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
hgroup.long 0x6D8++0x03
hide.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
hgroup.long 0x6DC++0x03
hide.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0x6E0++0x03
line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
hexmask.long.byte 0x00 24.--31. 1. " INTID739  ,Interrupt ID739  Priority/Priority Byte Offset 739 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID738  ,Interrupt ID738   Priority/Priority Byte Offset 738 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID737  ,Interrupt ID737  Priority/Priority Byte Offset 737 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID736  ,Interrupt ID736   Priority/Priority Byte Offset 736 "
group.long 0x6E4++0x03
line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
hexmask.long.byte 0x00 24.--31. 1. " INTID743  ,Interrupt ID743  Priority/Priority Byte Offset 743 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID742  ,Interrupt ID742   Priority/Priority Byte Offset 742 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID741  ,Interrupt ID741  Priority/Priority Byte Offset 741 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID740  ,Interrupt ID740   Priority/Priority Byte Offset 740 "
group.long 0x6E8++0x03
line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
hexmask.long.byte 0x00 24.--31. 1. " INTID747  ,Interrupt ID747  Priority/Priority Byte Offset 747 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID746  ,Interrupt ID746   Priority/Priority Byte Offset 746 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID745  ,Interrupt ID745  Priority/Priority Byte Offset 745 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID744  ,Interrupt ID744   Priority/Priority Byte Offset 744 "
group.long 0x6EC++0x03
line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
hexmask.long.byte 0x00 24.--31. 1. " INTID751  ,Interrupt ID751  Priority/Priority Byte Offset 751 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID750  ,Interrupt ID750   Priority/Priority Byte Offset 750 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID749  ,Interrupt ID749  Priority/Priority Byte Offset 749 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID748  ,Interrupt ID748   Priority/Priority Byte Offset 748 "
group.long 0x6F0++0x03
line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
hexmask.long.byte 0x00 24.--31. 1. " INTID755  ,Interrupt ID755  Priority/Priority Byte Offset 755 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID754  ,Interrupt ID754   Priority/Priority Byte Offset 754 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID753  ,Interrupt ID753  Priority/Priority Byte Offset 753 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID752  ,Interrupt ID752   Priority/Priority Byte Offset 752 "
group.long 0x6F4++0x03
line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
hexmask.long.byte 0x00 24.--31. 1. " INTID759  ,Interrupt ID759  Priority/Priority Byte Offset 759 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID758  ,Interrupt ID758   Priority/Priority Byte Offset 758 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID757  ,Interrupt ID757  Priority/Priority Byte Offset 757 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID756  ,Interrupt ID756   Priority/Priority Byte Offset 756 "
group.long 0x6F8++0x03
line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
hexmask.long.byte 0x00 24.--31. 1. " INTID763  ,Interrupt ID763  Priority/Priority Byte Offset 763 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID762  ,Interrupt ID762   Priority/Priority Byte Offset 762 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID761  ,Interrupt ID761  Priority/Priority Byte Offset 761 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID760  ,Interrupt ID760   Priority/Priority Byte Offset 760 "
group.long 0x6FC++0x03
line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
hexmask.long.byte 0x00 24.--31. 1. " INTID767  ,Interrupt ID767  Priority/Priority Byte Offset 767 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID766  ,Interrupt ID766   Priority/Priority Byte Offset 766 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID765  ,Interrupt ID765  Priority/Priority Byte Offset 765 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID764  ,Interrupt ID764   Priority/Priority Byte Offset 764 "
else
hgroup.long 0x6E0++0x03
hide.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
hgroup.long 0x6E4++0x03
hide.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
hgroup.long 0x6E8++0x03
hide.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
hgroup.long 0x6EC++0x03
hide.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
hgroup.long 0x6F0++0x03
hide.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
hgroup.long 0x6F4++0x03
hide.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
hgroup.long 0x6F8++0x03
hide.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
hgroup.long 0x6FC++0x03
hide.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0x700++0x03
line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
hexmask.long.byte 0x00 24.--31. 1. " INTID771  ,Interrupt ID771  Priority/Priority Byte Offset 771 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID770  ,Interrupt ID770   Priority/Priority Byte Offset 770 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID769  ,Interrupt ID769  Priority/Priority Byte Offset 769 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID768  ,Interrupt ID768   Priority/Priority Byte Offset 768 "
group.long 0x704++0x03
line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
hexmask.long.byte 0x00 24.--31. 1. " INTID775  ,Interrupt ID775  Priority/Priority Byte Offset 775 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID774  ,Interrupt ID774   Priority/Priority Byte Offset 774 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID773  ,Interrupt ID773  Priority/Priority Byte Offset 773 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID772  ,Interrupt ID772   Priority/Priority Byte Offset 772 "
group.long 0x708++0x03
line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
hexmask.long.byte 0x00 24.--31. 1. " INTID779  ,Interrupt ID779  Priority/Priority Byte Offset 779 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID778  ,Interrupt ID778   Priority/Priority Byte Offset 778 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID777  ,Interrupt ID777  Priority/Priority Byte Offset 777 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID776  ,Interrupt ID776   Priority/Priority Byte Offset 776 "
group.long 0x70C++0x03
line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
hexmask.long.byte 0x00 24.--31. 1. " INTID783  ,Interrupt ID783  Priority/Priority Byte Offset 783 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID782  ,Interrupt ID782   Priority/Priority Byte Offset 782 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID781  ,Interrupt ID781  Priority/Priority Byte Offset 781 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID780  ,Interrupt ID780   Priority/Priority Byte Offset 780 "
group.long 0x710++0x03
line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
hexmask.long.byte 0x00 24.--31. 1. " INTID787  ,Interrupt ID787  Priority/Priority Byte Offset 787 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID786  ,Interrupt ID786   Priority/Priority Byte Offset 786 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID785  ,Interrupt ID785  Priority/Priority Byte Offset 785 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID784  ,Interrupt ID784   Priority/Priority Byte Offset 784 "
group.long 0x714++0x03
line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
hexmask.long.byte 0x00 24.--31. 1. " INTID791  ,Interrupt ID791  Priority/Priority Byte Offset 791 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID790  ,Interrupt ID790   Priority/Priority Byte Offset 790 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID789  ,Interrupt ID789  Priority/Priority Byte Offset 789 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID788  ,Interrupt ID788   Priority/Priority Byte Offset 788 "
group.long 0x718++0x03
line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
hexmask.long.byte 0x00 24.--31. 1. " INTID795  ,Interrupt ID795  Priority/Priority Byte Offset 795 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID794  ,Interrupt ID794   Priority/Priority Byte Offset 794 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID793  ,Interrupt ID793  Priority/Priority Byte Offset 793 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID792  ,Interrupt ID792   Priority/Priority Byte Offset 792 "
group.long 0x71C++0x03
line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
hexmask.long.byte 0x00 24.--31. 1. " INTID799  ,Interrupt ID799  Priority/Priority Byte Offset 799 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID798  ,Interrupt ID798   Priority/Priority Byte Offset 798 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID797  ,Interrupt ID797  Priority/Priority Byte Offset 797 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID796  ,Interrupt ID796   Priority/Priority Byte Offset 796 "
else
hgroup.long 0x700++0x03
hide.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
hgroup.long 0x704++0x03
hide.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
hgroup.long 0x708++0x03
hide.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
hgroup.long 0x70C++0x03
hide.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
hgroup.long 0x710++0x03
hide.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
hgroup.long 0x714++0x03
hide.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
hgroup.long 0x718++0x03
hide.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
hgroup.long 0x71C++0x03
hide.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0x720++0x03
line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
hexmask.long.byte 0x00 24.--31. 1. " INTID803  ,Interrupt ID803  Priority/Priority Byte Offset 803 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID802  ,Interrupt ID802   Priority/Priority Byte Offset 802 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID801  ,Interrupt ID801  Priority/Priority Byte Offset 801 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID800  ,Interrupt ID800   Priority/Priority Byte Offset 800 "
group.long 0x724++0x03
line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
hexmask.long.byte 0x00 24.--31. 1. " INTID807  ,Interrupt ID807  Priority/Priority Byte Offset 807 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID806  ,Interrupt ID806   Priority/Priority Byte Offset 806 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID805  ,Interrupt ID805  Priority/Priority Byte Offset 805 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID804  ,Interrupt ID804   Priority/Priority Byte Offset 804 "
group.long 0x728++0x03
line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
hexmask.long.byte 0x00 24.--31. 1. " INTID811  ,Interrupt ID811  Priority/Priority Byte Offset 811 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID810  ,Interrupt ID810   Priority/Priority Byte Offset 810 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID809  ,Interrupt ID809  Priority/Priority Byte Offset 809 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID808  ,Interrupt ID808   Priority/Priority Byte Offset 808 "
group.long 0x72C++0x03
line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
hexmask.long.byte 0x00 24.--31. 1. " INTID815  ,Interrupt ID815  Priority/Priority Byte Offset 815 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID814  ,Interrupt ID814   Priority/Priority Byte Offset 814 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID813  ,Interrupt ID813  Priority/Priority Byte Offset 813 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID812  ,Interrupt ID812   Priority/Priority Byte Offset 812 "
group.long 0x730++0x03
line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
hexmask.long.byte 0x00 24.--31. 1. " INTID819  ,Interrupt ID819  Priority/Priority Byte Offset 819 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID818  ,Interrupt ID818   Priority/Priority Byte Offset 818 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID817  ,Interrupt ID817  Priority/Priority Byte Offset 817 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID816  ,Interrupt ID816   Priority/Priority Byte Offset 816 "
group.long 0x734++0x03
line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
hexmask.long.byte 0x00 24.--31. 1. " INTID823  ,Interrupt ID823  Priority/Priority Byte Offset 823 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID822  ,Interrupt ID822   Priority/Priority Byte Offset 822 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID821  ,Interrupt ID821  Priority/Priority Byte Offset 821 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID820  ,Interrupt ID820   Priority/Priority Byte Offset 820 "
group.long 0x738++0x03
line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
hexmask.long.byte 0x00 24.--31. 1. " INTID827  ,Interrupt ID827  Priority/Priority Byte Offset 827 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID826  ,Interrupt ID826   Priority/Priority Byte Offset 826 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID825  ,Interrupt ID825  Priority/Priority Byte Offset 825 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID824  ,Interrupt ID824   Priority/Priority Byte Offset 824 "
group.long 0x73C++0x03
line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
hexmask.long.byte 0x00 24.--31. 1. " INTID831  ,Interrupt ID831  Priority/Priority Byte Offset 831 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID830  ,Interrupt ID830   Priority/Priority Byte Offset 830 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID829  ,Interrupt ID829  Priority/Priority Byte Offset 829 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID828  ,Interrupt ID828   Priority/Priority Byte Offset 828 "
else
hgroup.long 0x720++0x03
hide.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
hgroup.long 0x724++0x03
hide.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
hgroup.long 0x728++0x03
hide.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
hgroup.long 0x72C++0x03
hide.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
hgroup.long 0x730++0x03
hide.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
hgroup.long 0x734++0x03
hide.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
hgroup.long 0x738++0x03
hide.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
hgroup.long 0x73C++0x03
hide.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0x740++0x03
line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
hexmask.long.byte 0x00 24.--31. 1. " INTID835  ,Interrupt ID835  Priority/Priority Byte Offset 835 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID834  ,Interrupt ID834   Priority/Priority Byte Offset 834 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID833  ,Interrupt ID833  Priority/Priority Byte Offset 833 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID832  ,Interrupt ID832   Priority/Priority Byte Offset 832 "
group.long 0x744++0x03
line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
hexmask.long.byte 0x00 24.--31. 1. " INTID839  ,Interrupt ID839  Priority/Priority Byte Offset 839 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID838  ,Interrupt ID838   Priority/Priority Byte Offset 838 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID837  ,Interrupt ID837  Priority/Priority Byte Offset 837 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID836  ,Interrupt ID836   Priority/Priority Byte Offset 836 "
group.long 0x748++0x03
line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
hexmask.long.byte 0x00 24.--31. 1. " INTID843  ,Interrupt ID843  Priority/Priority Byte Offset 843 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID842  ,Interrupt ID842   Priority/Priority Byte Offset 842 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID841  ,Interrupt ID841  Priority/Priority Byte Offset 841 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID840  ,Interrupt ID840   Priority/Priority Byte Offset 840 "
group.long 0x74C++0x03
line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
hexmask.long.byte 0x00 24.--31. 1. " INTID847  ,Interrupt ID847  Priority/Priority Byte Offset 847 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID846  ,Interrupt ID846   Priority/Priority Byte Offset 846 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID845  ,Interrupt ID845  Priority/Priority Byte Offset 845 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID844  ,Interrupt ID844   Priority/Priority Byte Offset 844 "
group.long 0x750++0x03
line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
hexmask.long.byte 0x00 24.--31. 1. " INTID851  ,Interrupt ID851  Priority/Priority Byte Offset 851 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID850  ,Interrupt ID850   Priority/Priority Byte Offset 850 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID849  ,Interrupt ID849  Priority/Priority Byte Offset 849 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID848  ,Interrupt ID848   Priority/Priority Byte Offset 848 "
group.long 0x754++0x03
line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
hexmask.long.byte 0x00 24.--31. 1. " INTID855  ,Interrupt ID855  Priority/Priority Byte Offset 855 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID854  ,Interrupt ID854   Priority/Priority Byte Offset 854 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID853  ,Interrupt ID853  Priority/Priority Byte Offset 853 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID852  ,Interrupt ID852   Priority/Priority Byte Offset 852 "
group.long 0x758++0x03
line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
hexmask.long.byte 0x00 24.--31. 1. " INTID859  ,Interrupt ID859  Priority/Priority Byte Offset 859 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID858  ,Interrupt ID858   Priority/Priority Byte Offset 858 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID857  ,Interrupt ID857  Priority/Priority Byte Offset 857 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID856  ,Interrupt ID856   Priority/Priority Byte Offset 856 "
group.long 0x75C++0x03
line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
hexmask.long.byte 0x00 24.--31. 1. " INTID863  ,Interrupt ID863  Priority/Priority Byte Offset 863 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID862  ,Interrupt ID862   Priority/Priority Byte Offset 862 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID861  ,Interrupt ID861  Priority/Priority Byte Offset 861 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID860  ,Interrupt ID860   Priority/Priority Byte Offset 860 "
else
hgroup.long 0x740++0x03
hide.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
hgroup.long 0x744++0x03
hide.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
hgroup.long 0x748++0x03
hide.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
hgroup.long 0x74C++0x03
hide.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
hgroup.long 0x750++0x03
hide.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
hgroup.long 0x754++0x03
hide.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
hgroup.long 0x758++0x03
hide.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
hgroup.long 0x75C++0x03
hide.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0x760++0x03
line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
hexmask.long.byte 0x00 24.--31. 1. " INTID867  ,Interrupt ID867  Priority/Priority Byte Offset 867 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID866  ,Interrupt ID866   Priority/Priority Byte Offset 866 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID865  ,Interrupt ID865  Priority/Priority Byte Offset 865 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID864  ,Interrupt ID864   Priority/Priority Byte Offset 864 "
group.long 0x764++0x03
line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
hexmask.long.byte 0x00 24.--31. 1. " INTID871  ,Interrupt ID871  Priority/Priority Byte Offset 871 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID870  ,Interrupt ID870   Priority/Priority Byte Offset 870 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID869  ,Interrupt ID869  Priority/Priority Byte Offset 869 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID868  ,Interrupt ID868   Priority/Priority Byte Offset 868 "
group.long 0x768++0x03
line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
hexmask.long.byte 0x00 24.--31. 1. " INTID875  ,Interrupt ID875  Priority/Priority Byte Offset 875 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID874  ,Interrupt ID874   Priority/Priority Byte Offset 874 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID873  ,Interrupt ID873  Priority/Priority Byte Offset 873 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID872  ,Interrupt ID872   Priority/Priority Byte Offset 872 "
group.long 0x76C++0x03
line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
hexmask.long.byte 0x00 24.--31. 1. " INTID879  ,Interrupt ID879  Priority/Priority Byte Offset 879 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID878  ,Interrupt ID878   Priority/Priority Byte Offset 878 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID877  ,Interrupt ID877  Priority/Priority Byte Offset 877 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID876  ,Interrupt ID876   Priority/Priority Byte Offset 876 "
group.long 0x770++0x03
line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
hexmask.long.byte 0x00 24.--31. 1. " INTID883  ,Interrupt ID883  Priority/Priority Byte Offset 883 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID882  ,Interrupt ID882   Priority/Priority Byte Offset 882 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID881  ,Interrupt ID881  Priority/Priority Byte Offset 881 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID880  ,Interrupt ID880   Priority/Priority Byte Offset 880 "
group.long 0x774++0x03
line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
hexmask.long.byte 0x00 24.--31. 1. " INTID887  ,Interrupt ID887  Priority/Priority Byte Offset 887 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID886  ,Interrupt ID886   Priority/Priority Byte Offset 886 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID885  ,Interrupt ID885  Priority/Priority Byte Offset 885 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID884  ,Interrupt ID884   Priority/Priority Byte Offset 884 "
group.long 0x778++0x03
line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
hexmask.long.byte 0x00 24.--31. 1. " INTID891  ,Interrupt ID891  Priority/Priority Byte Offset 891 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID890  ,Interrupt ID890   Priority/Priority Byte Offset 890 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID889  ,Interrupt ID889  Priority/Priority Byte Offset 889 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID888  ,Interrupt ID888   Priority/Priority Byte Offset 888 "
group.long 0x77C++0x03
line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
hexmask.long.byte 0x00 24.--31. 1. " INTID895  ,Interrupt ID895  Priority/Priority Byte Offset 895 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID894  ,Interrupt ID894   Priority/Priority Byte Offset 894 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID893  ,Interrupt ID893  Priority/Priority Byte Offset 893 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID892  ,Interrupt ID892   Priority/Priority Byte Offset 892 "
else
hgroup.long 0x760++0x03
hide.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
hgroup.long 0x764++0x03
hide.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
hgroup.long 0x768++0x03
hide.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
hgroup.long 0x76C++0x03
hide.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
hgroup.long 0x770++0x03
hide.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
hgroup.long 0x774++0x03
hide.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
hgroup.long 0x778++0x03
hide.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
hgroup.long 0x77C++0x03
hide.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0x780++0x03
line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
hexmask.long.byte 0x00 24.--31. 1. " INTID899  ,Interrupt ID899  Priority/Priority Byte Offset 899 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID898  ,Interrupt ID898   Priority/Priority Byte Offset 898 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID897  ,Interrupt ID897  Priority/Priority Byte Offset 897 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID896  ,Interrupt ID896   Priority/Priority Byte Offset 896 "
group.long 0x784++0x03
line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
hexmask.long.byte 0x00 24.--31. 1. " INTID903  ,Interrupt ID903  Priority/Priority Byte Offset 903 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID902  ,Interrupt ID902   Priority/Priority Byte Offset 902 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID901  ,Interrupt ID901  Priority/Priority Byte Offset 901 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID900  ,Interrupt ID900   Priority/Priority Byte Offset 900 "
group.long 0x788++0x03
line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
hexmask.long.byte 0x00 24.--31. 1. " INTID907  ,Interrupt ID907  Priority/Priority Byte Offset 907 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID906  ,Interrupt ID906   Priority/Priority Byte Offset 906 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID905  ,Interrupt ID905  Priority/Priority Byte Offset 905 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID904  ,Interrupt ID904   Priority/Priority Byte Offset 904 "
group.long 0x78C++0x03
line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
hexmask.long.byte 0x00 24.--31. 1. " INTID911  ,Interrupt ID911  Priority/Priority Byte Offset 911 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID910  ,Interrupt ID910   Priority/Priority Byte Offset 910 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID909  ,Interrupt ID909  Priority/Priority Byte Offset 909 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID908  ,Interrupt ID908   Priority/Priority Byte Offset 908 "
group.long 0x790++0x03
line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
hexmask.long.byte 0x00 24.--31. 1. " INTID915  ,Interrupt ID915  Priority/Priority Byte Offset 915 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID914  ,Interrupt ID914   Priority/Priority Byte Offset 914 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID913  ,Interrupt ID913  Priority/Priority Byte Offset 913 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID912  ,Interrupt ID912   Priority/Priority Byte Offset 912 "
group.long 0x794++0x03
line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
hexmask.long.byte 0x00 24.--31. 1. " INTID919  ,Interrupt ID919  Priority/Priority Byte Offset 919 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID918  ,Interrupt ID918   Priority/Priority Byte Offset 918 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID917  ,Interrupt ID917  Priority/Priority Byte Offset 917 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID916  ,Interrupt ID916   Priority/Priority Byte Offset 916 "
group.long 0x798++0x03
line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
hexmask.long.byte 0x00 24.--31. 1. " INTID923  ,Interrupt ID923  Priority/Priority Byte Offset 923 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID922  ,Interrupt ID922   Priority/Priority Byte Offset 922 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID921  ,Interrupt ID921  Priority/Priority Byte Offset 921 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID920  ,Interrupt ID920   Priority/Priority Byte Offset 920 "
group.long 0x79C++0x03
line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
hexmask.long.byte 0x00 24.--31. 1. " INTID927  ,Interrupt ID927  Priority/Priority Byte Offset 927 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID926  ,Interrupt ID926   Priority/Priority Byte Offset 926 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID925  ,Interrupt ID925  Priority/Priority Byte Offset 925 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID924  ,Interrupt ID924   Priority/Priority Byte Offset 924 "
else
hgroup.long 0x780++0x03
hide.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
hgroup.long 0x784++0x03
hide.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
hgroup.long 0x788++0x03
hide.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
hgroup.long 0x78C++0x03
hide.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
hgroup.long 0x790++0x03
hide.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
hgroup.long 0x794++0x03
hide.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
hgroup.long 0x798++0x03
hide.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
hgroup.long 0x79C++0x03
hide.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0x7A0++0x03
line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
hexmask.long.byte 0x00 24.--31. 1. " INTID931  ,Interrupt ID931  Priority/Priority Byte Offset 931 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID930  ,Interrupt ID930   Priority/Priority Byte Offset 930 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID929  ,Interrupt ID929  Priority/Priority Byte Offset 929 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID928  ,Interrupt ID928   Priority/Priority Byte Offset 928 "
group.long 0x7A4++0x03
line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
hexmask.long.byte 0x00 24.--31. 1. " INTID935  ,Interrupt ID935  Priority/Priority Byte Offset 935 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID934  ,Interrupt ID934   Priority/Priority Byte Offset 934 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID933  ,Interrupt ID933  Priority/Priority Byte Offset 933 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID932  ,Interrupt ID932   Priority/Priority Byte Offset 932 "
group.long 0x7A8++0x03
line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
hexmask.long.byte 0x00 24.--31. 1. " INTID939  ,Interrupt ID939  Priority/Priority Byte Offset 939 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID938  ,Interrupt ID938   Priority/Priority Byte Offset 938 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID937  ,Interrupt ID937  Priority/Priority Byte Offset 937 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID936  ,Interrupt ID936   Priority/Priority Byte Offset 936 "
group.long 0x7AC++0x03
line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
hexmask.long.byte 0x00 24.--31. 1. " INTID943  ,Interrupt ID943  Priority/Priority Byte Offset 943 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID942  ,Interrupt ID942   Priority/Priority Byte Offset 942 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID941  ,Interrupt ID941  Priority/Priority Byte Offset 941 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID940  ,Interrupt ID940   Priority/Priority Byte Offset 940 "
group.long 0x7B0++0x03
line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
hexmask.long.byte 0x00 24.--31. 1. " INTID947  ,Interrupt ID947  Priority/Priority Byte Offset 947 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID946  ,Interrupt ID946   Priority/Priority Byte Offset 946 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID945  ,Interrupt ID945  Priority/Priority Byte Offset 945 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID944  ,Interrupt ID944   Priority/Priority Byte Offset 944 "
group.long 0x7B4++0x03
line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
hexmask.long.byte 0x00 24.--31. 1. " INTID951  ,Interrupt ID951  Priority/Priority Byte Offset 951 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID950  ,Interrupt ID950   Priority/Priority Byte Offset 950 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID949  ,Interrupt ID949  Priority/Priority Byte Offset 949 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID948  ,Interrupt ID948   Priority/Priority Byte Offset 948 "
group.long 0x7B8++0x03
line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
hexmask.long.byte 0x00 24.--31. 1. " INTID955  ,Interrupt ID955  Priority/Priority Byte Offset 955 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID954  ,Interrupt ID954   Priority/Priority Byte Offset 954 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID953  ,Interrupt ID953  Priority/Priority Byte Offset 953 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID952  ,Interrupt ID952   Priority/Priority Byte Offset 952 "
group.long 0x7BC++0x03
line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
hexmask.long.byte 0x00 24.--31. 1. " INTID959  ,Interrupt ID959  Priority/Priority Byte Offset 959 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID958  ,Interrupt ID958   Priority/Priority Byte Offset 958 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID957  ,Interrupt ID957  Priority/Priority Byte Offset 957 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID956  ,Interrupt ID956   Priority/Priority Byte Offset 956 "
else
hgroup.long 0x7A0++0x03
hide.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
hgroup.long 0x7A4++0x03
hide.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
hgroup.long 0x7A8++0x03
hide.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
hgroup.long 0x7AC++0x03
hide.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
hgroup.long 0x7B0++0x03
hide.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
hgroup.long 0x7B4++0x03
hide.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
hgroup.long 0x7B8++0x03
hide.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
hgroup.long 0x7BC++0x03
hide.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0x7C0++0x03
line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
hexmask.long.byte 0x00 24.--31. 1. " INTID963  ,Interrupt ID963  Priority/Priority Byte Offset 963 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID962  ,Interrupt ID962   Priority/Priority Byte Offset 962 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID961  ,Interrupt ID961  Priority/Priority Byte Offset 961 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID960  ,Interrupt ID960   Priority/Priority Byte Offset 960 "
group.long 0x7C4++0x03
line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
hexmask.long.byte 0x00 24.--31. 1. " INTID967  ,Interrupt ID967  Priority/Priority Byte Offset 967 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID966  ,Interrupt ID966   Priority/Priority Byte Offset 966 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID965  ,Interrupt ID965  Priority/Priority Byte Offset 965 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID964  ,Interrupt ID964   Priority/Priority Byte Offset 964 "
group.long 0x7C8++0x03
line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
hexmask.long.byte 0x00 24.--31. 1. " INTID971  ,Interrupt ID971  Priority/Priority Byte Offset 971 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID970  ,Interrupt ID970   Priority/Priority Byte Offset 970 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID969  ,Interrupt ID969  Priority/Priority Byte Offset 969 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID968  ,Interrupt ID968   Priority/Priority Byte Offset 968 "
group.long 0x7CC++0x03
line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
hexmask.long.byte 0x00 24.--31. 1. " INTID975  ,Interrupt ID975  Priority/Priority Byte Offset 975 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID974  ,Interrupt ID974   Priority/Priority Byte Offset 974 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID973  ,Interrupt ID973  Priority/Priority Byte Offset 973 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID972  ,Interrupt ID972   Priority/Priority Byte Offset 972 "
group.long 0x7D0++0x03
line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
hexmask.long.byte 0x00 24.--31. 1. " INTID979  ,Interrupt ID979  Priority/Priority Byte Offset 979 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID978  ,Interrupt ID978   Priority/Priority Byte Offset 978 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID977  ,Interrupt ID977  Priority/Priority Byte Offset 977 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID976  ,Interrupt ID976   Priority/Priority Byte Offset 976 "
group.long 0x7D4++0x03
line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
hexmask.long.byte 0x00 24.--31. 1. " INTID983  ,Interrupt ID983  Priority/Priority Byte Offset 983 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID982  ,Interrupt ID982   Priority/Priority Byte Offset 982 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID981  ,Interrupt ID981  Priority/Priority Byte Offset 981 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID980  ,Interrupt ID980   Priority/Priority Byte Offset 980 "
group.long 0x7D8++0x03
line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
hexmask.long.byte 0x00 24.--31. 1. " INTID987  ,Interrupt ID987  Priority/Priority Byte Offset 987 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID986  ,Interrupt ID986   Priority/Priority Byte Offset 986 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID985  ,Interrupt ID985  Priority/Priority Byte Offset 985 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID984  ,Interrupt ID984   Priority/Priority Byte Offset 984 "
group.long 0x7DC++0x03
line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
hexmask.long.byte 0x00 24.--31. 1. " INTID991  ,Interrupt ID991  Priority/Priority Byte Offset 991 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID990  ,Interrupt ID990   Priority/Priority Byte Offset 990 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID989  ,Interrupt ID989  Priority/Priority Byte Offset 989 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID988  ,Interrupt ID988   Priority/Priority Byte Offset 988 "
else
hgroup.long 0x7C0++0x03
hide.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
hgroup.long 0x7C4++0x03
hide.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
hgroup.long 0x7C8++0x03
hide.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
hgroup.long 0x7CC++0x03
hide.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
hgroup.long 0x7D0++0x03
hide.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
hgroup.long 0x7D4++0x03
hide.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
hgroup.long 0x7D8++0x03
hide.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
hgroup.long 0x7DC++0x03
hide.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
endif
tree.end
width 19.
tree "Interrupt Targets Registers"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x000000E0)>0x1)
hgroup.long 0x800++0x03
hide.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0"
hgroup.long 0x804++0x03
hide.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1"
hgroup.long 0x808++0x03
hide.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2"
hgroup.long 0x80C++0x03
hide.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3"
hgroup.long 0x810++0x03
hide.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4"
hgroup.long 0x814++0x03
hide.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5"
hgroup.long 0x818++0x03
hide.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6"
hgroup.long 0x81C++0x03
hide.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x820++0x03
line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO35   ,CPU Targets Byte Offset 35  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO34   ,CPU Targets Byte Offset 34  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO33   ,CPU Targets Byte Offset 33  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO32   ,CPU Targets Byte Offset 32  "
group.long 0x824++0x03
line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO39   ,CPU Targets Byte Offset 39  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO38   ,CPU Targets Byte Offset 38  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO37   ,CPU Targets Byte Offset 37  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO36   ,CPU Targets Byte Offset 36  "
group.long 0x828++0x03
line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO43   ,CPU Targets Byte Offset 43  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO42   ,CPU Targets Byte Offset 42  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO41   ,CPU Targets Byte Offset 41  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO40   ,CPU Targets Byte Offset 40  "
group.long 0x82C++0x03
line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO47   ,CPU Targets Byte Offset 47  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO46   ,CPU Targets Byte Offset 46  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO45   ,CPU Targets Byte Offset 45  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO44   ,CPU Targets Byte Offset 44  "
group.long 0x830++0x03
line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO51   ,CPU Targets Byte Offset 51  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO50   ,CPU Targets Byte Offset 50  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO49   ,CPU Targets Byte Offset 49  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO48   ,CPU Targets Byte Offset 48  "
group.long 0x834++0x03
line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO55   ,CPU Targets Byte Offset 55  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO54   ,CPU Targets Byte Offset 54  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO53   ,CPU Targets Byte Offset 53  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO52   ,CPU Targets Byte Offset 52  "
group.long 0x838++0x03
line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO59   ,CPU Targets Byte Offset 59  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO58   ,CPU Targets Byte Offset 58  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO57   ,CPU Targets Byte Offset 57  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO56   ,CPU Targets Byte Offset 56  "
group.long 0x83C++0x03
line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO63   ,CPU Targets Byte Offset 63  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO62   ,CPU Targets Byte Offset 62  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO61   ,CPU Targets Byte Offset 61  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO60   ,CPU Targets Byte Offset 60  "
else
hgroup.long 0x820++0x03
hide.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
hgroup.long 0x824++0x03
hide.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
hgroup.long 0x828++0x03
hide.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
hgroup.long 0x82C++0x03
hide.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
hgroup.long 0x830++0x03
hide.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
hgroup.long 0x834++0x03
hide.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
hgroup.long 0x838++0x03
hide.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
hgroup.long 0x83C++0x03
hide.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x840++0x03
line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO67   ,CPU Targets Byte Offset 67  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO66   ,CPU Targets Byte Offset 66  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO65   ,CPU Targets Byte Offset 65  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO64   ,CPU Targets Byte Offset 64  "
group.long 0x844++0x03
line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO71   ,CPU Targets Byte Offset 71  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO70   ,CPU Targets Byte Offset 70  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO69   ,CPU Targets Byte Offset 69  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO68   ,CPU Targets Byte Offset 68  "
group.long 0x848++0x03
line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO75   ,CPU Targets Byte Offset 75  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO74   ,CPU Targets Byte Offset 74  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO73   ,CPU Targets Byte Offset 73  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO72   ,CPU Targets Byte Offset 72  "
group.long 0x84C++0x03
line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO79   ,CPU Targets Byte Offset 79  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO78   ,CPU Targets Byte Offset 78  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO77   ,CPU Targets Byte Offset 77  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO76   ,CPU Targets Byte Offset 76  "
group.long 0x850++0x03
line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO83   ,CPU Targets Byte Offset 83  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO82   ,CPU Targets Byte Offset 82  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO81   ,CPU Targets Byte Offset 81  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO80   ,CPU Targets Byte Offset 80  "
group.long 0x854++0x03
line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO87   ,CPU Targets Byte Offset 87  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO86   ,CPU Targets Byte Offset 86  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO85   ,CPU Targets Byte Offset 85  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO84   ,CPU Targets Byte Offset 84  "
group.long 0x858++0x03
line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO91   ,CPU Targets Byte Offset 91  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO90   ,CPU Targets Byte Offset 90  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO89   ,CPU Targets Byte Offset 89  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO88   ,CPU Targets Byte Offset 88  "
group.long 0x85C++0x03
line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO95   ,CPU Targets Byte Offset 95  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO94   ,CPU Targets Byte Offset 94  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO93   ,CPU Targets Byte Offset 93  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO92   ,CPU Targets Byte Offset 92  "
else
hgroup.long 0x840++0x03
hide.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
hgroup.long 0x844++0x03
hide.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
hgroup.long 0x848++0x03
hide.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
hgroup.long 0x84C++0x03
hide.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
hgroup.long 0x850++0x03
hide.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
hgroup.long 0x854++0x03
hide.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
hgroup.long 0x858++0x03
hide.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
hgroup.long 0x85C++0x03
hide.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x860++0x03
line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO99   ,CPU Targets Byte Offset 99  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO98   ,CPU Targets Byte Offset 98  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO97   ,CPU Targets Byte Offset 97  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO96   ,CPU Targets Byte Offset 96  "
group.long 0x864++0x03
line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO103  ,CPU Targets Byte Offset 103 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO102  ,CPU Targets Byte Offset 102 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO101  ,CPU Targets Byte Offset 101 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO100  ,CPU Targets Byte Offset 100 "
group.long 0x868++0x03
line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO107  ,CPU Targets Byte Offset 107 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO106  ,CPU Targets Byte Offset 106 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO105  ,CPU Targets Byte Offset 105 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO104  ,CPU Targets Byte Offset 104 "
group.long 0x86C++0x03
line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO111  ,CPU Targets Byte Offset 111 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO110  ,CPU Targets Byte Offset 110 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO109  ,CPU Targets Byte Offset 109 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO108  ,CPU Targets Byte Offset 108 "
group.long 0x870++0x03
line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO115  ,CPU Targets Byte Offset 115 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO114  ,CPU Targets Byte Offset 114 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO113  ,CPU Targets Byte Offset 113 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO112  ,CPU Targets Byte Offset 112 "
group.long 0x874++0x03
line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO119  ,CPU Targets Byte Offset 119 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO118  ,CPU Targets Byte Offset 118 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO117  ,CPU Targets Byte Offset 117 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO116  ,CPU Targets Byte Offset 116 "
group.long 0x878++0x03
line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO123  ,CPU Targets Byte Offset 123 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO122  ,CPU Targets Byte Offset 122 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO121  ,CPU Targets Byte Offset 121 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO120  ,CPU Targets Byte Offset 120 "
group.long 0x87C++0x03
line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO127  ,CPU Targets Byte Offset 127 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO126  ,CPU Targets Byte Offset 126 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO125  ,CPU Targets Byte Offset 125 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO124  ,CPU Targets Byte Offset 124 "
else
hgroup.long 0x860++0x03
hide.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
hgroup.long 0x864++0x03
hide.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
hgroup.long 0x868++0x03
hide.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
hgroup.long 0x86C++0x03
hide.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
hgroup.long 0x870++0x03
hide.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
hgroup.long 0x874++0x03
hide.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
hgroup.long 0x878++0x03
hide.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
hgroup.long 0x87C++0x03
hide.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x880++0x03
line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO131  ,CPU Targets Byte Offset 131 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO130  ,CPU Targets Byte Offset 130 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO129  ,CPU Targets Byte Offset 129 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO128  ,CPU Targets Byte Offset 128 "
group.long 0x884++0x03
line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO135  ,CPU Targets Byte Offset 135 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO134  ,CPU Targets Byte Offset 134 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO133  ,CPU Targets Byte Offset 133 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO132  ,CPU Targets Byte Offset 132 "
group.long 0x888++0x03
line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO139  ,CPU Targets Byte Offset 139 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO138  ,CPU Targets Byte Offset 138 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO137  ,CPU Targets Byte Offset 137 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO136  ,CPU Targets Byte Offset 136 "
group.long 0x88C++0x03
line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO143  ,CPU Targets Byte Offset 143 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO142  ,CPU Targets Byte Offset 142 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO141  ,CPU Targets Byte Offset 141 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO140  ,CPU Targets Byte Offset 140 "
group.long 0x890++0x03
line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO147  ,CPU Targets Byte Offset 147 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO146  ,CPU Targets Byte Offset 146 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO145  ,CPU Targets Byte Offset 145 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO144  ,CPU Targets Byte Offset 144 "
group.long 0x894++0x03
line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO151  ,CPU Targets Byte Offset 151 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO150  ,CPU Targets Byte Offset 150 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO149  ,CPU Targets Byte Offset 149 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO148  ,CPU Targets Byte Offset 148 "
group.long 0x898++0x03
line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO155  ,CPU Targets Byte Offset 155 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO154  ,CPU Targets Byte Offset 154 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO153  ,CPU Targets Byte Offset 153 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO152  ,CPU Targets Byte Offset 152 "
group.long 0x89C++0x03
line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO159  ,CPU Targets Byte Offset 159 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO158  ,CPU Targets Byte Offset 158 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO157  ,CPU Targets Byte Offset 157 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO156  ,CPU Targets Byte Offset 156 "
else
hgroup.long 0x880++0x03
hide.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
hgroup.long 0x884++0x03
hide.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
hgroup.long 0x888++0x03
hide.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
hgroup.long 0x88C++0x03
hide.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
hgroup.long 0x890++0x03
hide.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
hgroup.long 0x894++0x03
hide.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
hgroup.long 0x898++0x03
hide.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
hgroup.long 0x89C++0x03
hide.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x8A0++0x03
line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO163  ,CPU Targets Byte Offset 163 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO162  ,CPU Targets Byte Offset 162 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO161  ,CPU Targets Byte Offset 161 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO160  ,CPU Targets Byte Offset 160 "
group.long 0x8A4++0x03
line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO167  ,CPU Targets Byte Offset 167 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO166  ,CPU Targets Byte Offset 166 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO165  ,CPU Targets Byte Offset 165 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO164  ,CPU Targets Byte Offset 164 "
group.long 0x8A8++0x03
line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO171  ,CPU Targets Byte Offset 171 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO170  ,CPU Targets Byte Offset 170 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO169  ,CPU Targets Byte Offset 169 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO168  ,CPU Targets Byte Offset 168 "
group.long 0x8AC++0x03
line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO175  ,CPU Targets Byte Offset 175 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO174  ,CPU Targets Byte Offset 174 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO173  ,CPU Targets Byte Offset 173 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO172  ,CPU Targets Byte Offset 172 "
group.long 0x8B0++0x03
line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO179  ,CPU Targets Byte Offset 179 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO178  ,CPU Targets Byte Offset 178 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO177  ,CPU Targets Byte Offset 177 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO176  ,CPU Targets Byte Offset 176 "
group.long 0x8B4++0x03
line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO183  ,CPU Targets Byte Offset 183 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO182  ,CPU Targets Byte Offset 182 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO181  ,CPU Targets Byte Offset 181 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO180  ,CPU Targets Byte Offset 180 "
group.long 0x8B8++0x03
line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO187  ,CPU Targets Byte Offset 187 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO186  ,CPU Targets Byte Offset 186 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO185  ,CPU Targets Byte Offset 185 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO184  ,CPU Targets Byte Offset 184 "
group.long 0x8BC++0x03
line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO191  ,CPU Targets Byte Offset 191 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO190  ,CPU Targets Byte Offset 190 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO189  ,CPU Targets Byte Offset 189 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO188  ,CPU Targets Byte Offset 188 "
else
hgroup.long 0x8A0++0x03
hide.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
hgroup.long 0x8A4++0x03
hide.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
hgroup.long 0x8A8++0x03
hide.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
hgroup.long 0x8AC++0x03
hide.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
hgroup.long 0x8B0++0x03
hide.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
hgroup.long 0x8B4++0x03
hide.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
hgroup.long 0x8B8++0x03
hide.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
hgroup.long 0x8BC++0x03
hide.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x8C0++0x03
line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO195  ,CPU Targets Byte Offset 195 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO194  ,CPU Targets Byte Offset 194 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO193  ,CPU Targets Byte Offset 193 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO192  ,CPU Targets Byte Offset 192 "
group.long 0x8C4++0x03
line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO199  ,CPU Targets Byte Offset 199 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO198  ,CPU Targets Byte Offset 198 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO197  ,CPU Targets Byte Offset 197 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO196  ,CPU Targets Byte Offset 196 "
group.long 0x8C8++0x03
line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO203  ,CPU Targets Byte Offset 203 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO202  ,CPU Targets Byte Offset 202 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO201  ,CPU Targets Byte Offset 201 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO200  ,CPU Targets Byte Offset 200 "
group.long 0x8CC++0x03
line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO207  ,CPU Targets Byte Offset 207 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO206  ,CPU Targets Byte Offset 206 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO205  ,CPU Targets Byte Offset 205 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO204  ,CPU Targets Byte Offset 204 "
group.long 0x8D0++0x03
line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO211  ,CPU Targets Byte Offset 211 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO210  ,CPU Targets Byte Offset 210 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO209  ,CPU Targets Byte Offset 209 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO208  ,CPU Targets Byte Offset 208 "
group.long 0x8D4++0x03
line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO215  ,CPU Targets Byte Offset 215 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO214  ,CPU Targets Byte Offset 214 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO213  ,CPU Targets Byte Offset 213 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO212  ,CPU Targets Byte Offset 212 "
group.long 0x8D8++0x03
line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO219  ,CPU Targets Byte Offset 219 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO218  ,CPU Targets Byte Offset 218 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO217  ,CPU Targets Byte Offset 217 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO216  ,CPU Targets Byte Offset 216 "
group.long 0x8DC++0x03
line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO223  ,CPU Targets Byte Offset 223 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO222  ,CPU Targets Byte Offset 222 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO221  ,CPU Targets Byte Offset 221 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO220  ,CPU Targets Byte Offset 220 "
else
hgroup.long 0x8C0++0x03
hide.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
hgroup.long 0x8C4++0x03
hide.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
hgroup.long 0x8C8++0x03
hide.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
hgroup.long 0x8CC++0x03
hide.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
hgroup.long 0x8D0++0x03
hide.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
hgroup.long 0x8D4++0x03
hide.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
hgroup.long 0x8D8++0x03
hide.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
hgroup.long 0x8DC++0x03
hide.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x8E0++0x03
line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO227  ,CPU Targets Byte Offset 227 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO226  ,CPU Targets Byte Offset 226 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO225  ,CPU Targets Byte Offset 225 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO224  ,CPU Targets Byte Offset 224 "
group.long 0x8E4++0x03
line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO231  ,CPU Targets Byte Offset 231 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO230  ,CPU Targets Byte Offset 230 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO229  ,CPU Targets Byte Offset 229 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO228  ,CPU Targets Byte Offset 228 "
group.long 0x8E8++0x03
line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO235  ,CPU Targets Byte Offset 235 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO234  ,CPU Targets Byte Offset 234 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO233  ,CPU Targets Byte Offset 233 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO232  ,CPU Targets Byte Offset 232 "
group.long 0x8EC++0x03
line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO239  ,CPU Targets Byte Offset 239 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO238  ,CPU Targets Byte Offset 238 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO237  ,CPU Targets Byte Offset 237 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO236  ,CPU Targets Byte Offset 236 "
group.long 0x8F0++0x03
line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO243  ,CPU Targets Byte Offset 243 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO242  ,CPU Targets Byte Offset 242 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO241  ,CPU Targets Byte Offset 241 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO240  ,CPU Targets Byte Offset 240 "
group.long 0x8F4++0x03
line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO247  ,CPU Targets Byte Offset 247 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO246  ,CPU Targets Byte Offset 246 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO245  ,CPU Targets Byte Offset 245 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO244  ,CPU Targets Byte Offset 244 "
group.long 0x8F8++0x03
line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO251  ,CPU Targets Byte Offset 251 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO250  ,CPU Targets Byte Offset 250 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO249  ,CPU Targets Byte Offset 249 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO248  ,CPU Targets Byte Offset 248 "
group.long 0x8FC++0x03
line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO255  ,CPU Targets Byte Offset 255 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO254  ,CPU Targets Byte Offset 254 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO253  ,CPU Targets Byte Offset 253 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO252  ,CPU Targets Byte Offset 252 "
else
hgroup.long 0x8E0++0x03
hide.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
hgroup.long 0x8E4++0x03
hide.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
hgroup.long 0x8E8++0x03
hide.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
hgroup.long 0x8EC++0x03
hide.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
hgroup.long 0x8F0++0x03
hide.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
hgroup.long 0x8F4++0x03
hide.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
hgroup.long 0x8F8++0x03
hide.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
hgroup.long 0x8FC++0x03
hide.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x900++0x03
line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO259  ,CPU Targets Byte Offset 259 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO258  ,CPU Targets Byte Offset 258 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO257  ,CPU Targets Byte Offset 257 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO256  ,CPU Targets Byte Offset 256 "
group.long 0x904++0x03
line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO263  ,CPU Targets Byte Offset 263 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO262  ,CPU Targets Byte Offset 262 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO261  ,CPU Targets Byte Offset 261 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO260  ,CPU Targets Byte Offset 260 "
group.long 0x908++0x03
line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO267  ,CPU Targets Byte Offset 267 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO266  ,CPU Targets Byte Offset 266 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO265  ,CPU Targets Byte Offset 265 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO264  ,CPU Targets Byte Offset 264 "
group.long 0x90C++0x03
line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO271  ,CPU Targets Byte Offset 271 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO270  ,CPU Targets Byte Offset 270 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO269  ,CPU Targets Byte Offset 269 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO268  ,CPU Targets Byte Offset 268 "
group.long 0x910++0x03
line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO275  ,CPU Targets Byte Offset 275 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO274  ,CPU Targets Byte Offset 274 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO273  ,CPU Targets Byte Offset 273 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO272  ,CPU Targets Byte Offset 272 "
group.long 0x914++0x03
line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO279  ,CPU Targets Byte Offset 279 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO278  ,CPU Targets Byte Offset 278 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO277  ,CPU Targets Byte Offset 277 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO276  ,CPU Targets Byte Offset 276 "
group.long 0x918++0x03
line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO283  ,CPU Targets Byte Offset 283 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO282  ,CPU Targets Byte Offset 282 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO281  ,CPU Targets Byte Offset 281 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO280  ,CPU Targets Byte Offset 280 "
group.long 0x91C++0x03
line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO287  ,CPU Targets Byte Offset 287 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO286  ,CPU Targets Byte Offset 286 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO285  ,CPU Targets Byte Offset 285 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO284  ,CPU Targets Byte Offset 284 "
else
hgroup.long 0x900++0x03
hide.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
hgroup.long 0x904++0x03
hide.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
hgroup.long 0x908++0x03
hide.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
hgroup.long 0x90C++0x03
hide.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
hgroup.long 0x910++0x03
hide.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
hgroup.long 0x914++0x03
hide.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
hgroup.long 0x918++0x03
hide.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
hgroup.long 0x91C++0x03
hide.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x920++0x03
line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO291  ,CPU Targets Byte Offset 291 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO290  ,CPU Targets Byte Offset 290 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO289  ,CPU Targets Byte Offset 289 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO288  ,CPU Targets Byte Offset 288 "
group.long 0x924++0x03
line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO295  ,CPU Targets Byte Offset 295 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO294  ,CPU Targets Byte Offset 294 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO293  ,CPU Targets Byte Offset 293 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO292  ,CPU Targets Byte Offset 292 "
group.long 0x928++0x03
line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO299  ,CPU Targets Byte Offset 299 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO298  ,CPU Targets Byte Offset 298 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO297  ,CPU Targets Byte Offset 297 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO296  ,CPU Targets Byte Offset 296 "
group.long 0x92C++0x03
line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO303  ,CPU Targets Byte Offset 303 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO302  ,CPU Targets Byte Offset 302 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO301  ,CPU Targets Byte Offset 301 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO300  ,CPU Targets Byte Offset 300 "
group.long 0x930++0x03
line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO307  ,CPU Targets Byte Offset 307 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO306  ,CPU Targets Byte Offset 306 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO305  ,CPU Targets Byte Offset 305 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO304  ,CPU Targets Byte Offset 304 "
group.long 0x934++0x03
line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO311  ,CPU Targets Byte Offset 311 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO310  ,CPU Targets Byte Offset 310 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO309  ,CPU Targets Byte Offset 309 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO308  ,CPU Targets Byte Offset 308 "
group.long 0x938++0x03
line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO315  ,CPU Targets Byte Offset 315 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO314  ,CPU Targets Byte Offset 314 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO313  ,CPU Targets Byte Offset 313 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO312  ,CPU Targets Byte Offset 312 "
group.long 0x93C++0x03
line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO319  ,CPU Targets Byte Offset 319 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO318  ,CPU Targets Byte Offset 318 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO317  ,CPU Targets Byte Offset 317 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO316  ,CPU Targets Byte Offset 316 "
else
hgroup.long 0x920++0x03
hide.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
hgroup.long 0x924++0x03
hide.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
hgroup.long 0x928++0x03
hide.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
hgroup.long 0x92C++0x03
hide.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
hgroup.long 0x930++0x03
hide.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
hgroup.long 0x934++0x03
hide.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
hgroup.long 0x938++0x03
hide.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
hgroup.long 0x93C++0x03
hide.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x940++0x03
line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO323  ,CPU Targets Byte Offset 323 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO322  ,CPU Targets Byte Offset 322 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO321  ,CPU Targets Byte Offset 321 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO320  ,CPU Targets Byte Offset 320 "
group.long 0x944++0x03
line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO327  ,CPU Targets Byte Offset 327 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO326  ,CPU Targets Byte Offset 326 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO325  ,CPU Targets Byte Offset 325 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO324  ,CPU Targets Byte Offset 324 "
group.long 0x948++0x03
line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO331  ,CPU Targets Byte Offset 331 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO330  ,CPU Targets Byte Offset 330 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO329  ,CPU Targets Byte Offset 329 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO328  ,CPU Targets Byte Offset 328 "
group.long 0x94C++0x03
line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO335  ,CPU Targets Byte Offset 335 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO334  ,CPU Targets Byte Offset 334 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO333  ,CPU Targets Byte Offset 333 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO332  ,CPU Targets Byte Offset 332 "
group.long 0x950++0x03
line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO339  ,CPU Targets Byte Offset 339 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO338  ,CPU Targets Byte Offset 338 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO337  ,CPU Targets Byte Offset 337 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO336  ,CPU Targets Byte Offset 336 "
group.long 0x954++0x03
line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO343  ,CPU Targets Byte Offset 343 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO342  ,CPU Targets Byte Offset 342 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO341  ,CPU Targets Byte Offset 341 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO340  ,CPU Targets Byte Offset 340 "
group.long 0x958++0x03
line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO347  ,CPU Targets Byte Offset 347 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO346  ,CPU Targets Byte Offset 346 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO345  ,CPU Targets Byte Offset 345 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO344  ,CPU Targets Byte Offset 344 "
group.long 0x95C++0x03
line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO351  ,CPU Targets Byte Offset 351 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO350  ,CPU Targets Byte Offset 350 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO349  ,CPU Targets Byte Offset 349 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO348  ,CPU Targets Byte Offset 348 "
else
hgroup.long 0x940++0x03
hide.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
hgroup.long 0x944++0x03
hide.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
hgroup.long 0x948++0x03
hide.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
hgroup.long 0x94C++0x03
hide.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
hgroup.long 0x950++0x03
hide.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
hgroup.long 0x954++0x03
hide.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
hgroup.long 0x958++0x03
hide.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
hgroup.long 0x95C++0x03
hide.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x960++0x03
line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO355  ,CPU Targets Byte Offset 355 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO354  ,CPU Targets Byte Offset 354 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO353  ,CPU Targets Byte Offset 353 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO352  ,CPU Targets Byte Offset 352 "
group.long 0x964++0x03
line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO359  ,CPU Targets Byte Offset 359 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO358  ,CPU Targets Byte Offset 358 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO357  ,CPU Targets Byte Offset 357 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO356  ,CPU Targets Byte Offset 356 "
group.long 0x968++0x03
line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO363  ,CPU Targets Byte Offset 363 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO362  ,CPU Targets Byte Offset 362 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO361  ,CPU Targets Byte Offset 361 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO360  ,CPU Targets Byte Offset 360 "
group.long 0x96C++0x03
line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO367  ,CPU Targets Byte Offset 367 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO366  ,CPU Targets Byte Offset 366 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO365  ,CPU Targets Byte Offset 365 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO364  ,CPU Targets Byte Offset 364 "
group.long 0x970++0x03
line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO371  ,CPU Targets Byte Offset 371 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO370  ,CPU Targets Byte Offset 370 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO369  ,CPU Targets Byte Offset 369 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO368  ,CPU Targets Byte Offset 368 "
group.long 0x974++0x03
line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO375  ,CPU Targets Byte Offset 375 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO374  ,CPU Targets Byte Offset 374 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO373  ,CPU Targets Byte Offset 373 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO372  ,CPU Targets Byte Offset 372 "
group.long 0x978++0x03
line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO379  ,CPU Targets Byte Offset 379 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO378  ,CPU Targets Byte Offset 378 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO377  ,CPU Targets Byte Offset 377 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO376  ,CPU Targets Byte Offset 376 "
group.long 0x97C++0x03
line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO383  ,CPU Targets Byte Offset 383 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO382  ,CPU Targets Byte Offset 382 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO381  ,CPU Targets Byte Offset 381 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO380  ,CPU Targets Byte Offset 380 "
else
hgroup.long 0x960++0x03
hide.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
hgroup.long 0x964++0x03
hide.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
hgroup.long 0x968++0x03
hide.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
hgroup.long 0x96C++0x03
hide.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
hgroup.long 0x970++0x03
hide.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
hgroup.long 0x974++0x03
hide.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
hgroup.long 0x978++0x03
hide.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
hgroup.long 0x97C++0x03
hide.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x980++0x03
line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO387  ,CPU Targets Byte Offset 387 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO386  ,CPU Targets Byte Offset 386 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO385  ,CPU Targets Byte Offset 385 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO384  ,CPU Targets Byte Offset 384 "
group.long 0x984++0x03
line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO391  ,CPU Targets Byte Offset 391 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO390  ,CPU Targets Byte Offset 390 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO389  ,CPU Targets Byte Offset 389 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO388  ,CPU Targets Byte Offset 388 "
group.long 0x988++0x03
line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO395  ,CPU Targets Byte Offset 395 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO394  ,CPU Targets Byte Offset 394 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO393  ,CPU Targets Byte Offset 393 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO392  ,CPU Targets Byte Offset 392 "
group.long 0x98C++0x03
line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO399  ,CPU Targets Byte Offset 399 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO398  ,CPU Targets Byte Offset 398 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO397  ,CPU Targets Byte Offset 397 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO396  ,CPU Targets Byte Offset 396 "
group.long 0x990++0x03
line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO403  ,CPU Targets Byte Offset 403 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO402  ,CPU Targets Byte Offset 402 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO401  ,CPU Targets Byte Offset 401 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO400  ,CPU Targets Byte Offset 400 "
group.long 0x994++0x03
line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO407  ,CPU Targets Byte Offset 407 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO406  ,CPU Targets Byte Offset 406 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO405  ,CPU Targets Byte Offset 405 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO404  ,CPU Targets Byte Offset 404 "
group.long 0x998++0x03
line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO411  ,CPU Targets Byte Offset 411 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO410  ,CPU Targets Byte Offset 410 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO409  ,CPU Targets Byte Offset 409 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO408  ,CPU Targets Byte Offset 408 "
group.long 0x99C++0x03
line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO415  ,CPU Targets Byte Offset 415 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO414  ,CPU Targets Byte Offset 414 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO413  ,CPU Targets Byte Offset 413 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO412  ,CPU Targets Byte Offset 412 "
else
hgroup.long 0x980++0x03
hide.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
hgroup.long 0x984++0x03
hide.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
hgroup.long 0x988++0x03
hide.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
hgroup.long 0x98C++0x03
hide.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
hgroup.long 0x990++0x03
hide.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
hgroup.long 0x994++0x03
hide.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
hgroup.long 0x998++0x03
hide.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
hgroup.long 0x99C++0x03
hide.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x9A0++0x03
line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO419  ,CPU Targets Byte Offset 419 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO418  ,CPU Targets Byte Offset 418 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO417  ,CPU Targets Byte Offset 417 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO416  ,CPU Targets Byte Offset 416 "
group.long 0x9A4++0x03
line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO423  ,CPU Targets Byte Offset 423 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO422  ,CPU Targets Byte Offset 422 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO421  ,CPU Targets Byte Offset 421 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO420  ,CPU Targets Byte Offset 420 "
group.long 0x9A8++0x03
line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO427  ,CPU Targets Byte Offset 427 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO426  ,CPU Targets Byte Offset 426 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO425  ,CPU Targets Byte Offset 425 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO424  ,CPU Targets Byte Offset 424 "
group.long 0x9AC++0x03
line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO431  ,CPU Targets Byte Offset 431 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO430  ,CPU Targets Byte Offset 430 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO429  ,CPU Targets Byte Offset 429 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO428  ,CPU Targets Byte Offset 428 "
group.long 0x9B0++0x03
line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO435  ,CPU Targets Byte Offset 435 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO434  ,CPU Targets Byte Offset 434 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO433  ,CPU Targets Byte Offset 433 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO432  ,CPU Targets Byte Offset 432 "
group.long 0x9B4++0x03
line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO439  ,CPU Targets Byte Offset 439 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO438  ,CPU Targets Byte Offset 438 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO437  ,CPU Targets Byte Offset 437 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO436  ,CPU Targets Byte Offset 436 "
group.long 0x9B8++0x03
line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO443  ,CPU Targets Byte Offset 443 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO442  ,CPU Targets Byte Offset 442 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO441  ,CPU Targets Byte Offset 441 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO440  ,CPU Targets Byte Offset 440 "
group.long 0x9BC++0x03
line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO447  ,CPU Targets Byte Offset 447 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO446  ,CPU Targets Byte Offset 446 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO445  ,CPU Targets Byte Offset 445 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO444  ,CPU Targets Byte Offset 444 "
else
hgroup.long 0x9A0++0x03
hide.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
hgroup.long 0x9A4++0x03
hide.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
hgroup.long 0x9A8++0x03
hide.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
hgroup.long 0x9AC++0x03
hide.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
hgroup.long 0x9B0++0x03
hide.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
hgroup.long 0x9B4++0x03
hide.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
hgroup.long 0x9B8++0x03
hide.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
hgroup.long 0x9BC++0x03
hide.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x9C0++0x03
line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO451  ,CPU Targets Byte Offset 451 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO450  ,CPU Targets Byte Offset 450 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO449  ,CPU Targets Byte Offset 449 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO448  ,CPU Targets Byte Offset 448 "
group.long 0x9C4++0x03
line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO455  ,CPU Targets Byte Offset 455 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO454  ,CPU Targets Byte Offset 454 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO453  ,CPU Targets Byte Offset 453 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO452  ,CPU Targets Byte Offset 452 "
group.long 0x9C8++0x03
line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO459  ,CPU Targets Byte Offset 459 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO458  ,CPU Targets Byte Offset 458 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO457  ,CPU Targets Byte Offset 457 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO456  ,CPU Targets Byte Offset 456 "
group.long 0x9CC++0x03
line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO463  ,CPU Targets Byte Offset 463 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO462  ,CPU Targets Byte Offset 462 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO461  ,CPU Targets Byte Offset 461 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO460  ,CPU Targets Byte Offset 460 "
group.long 0x9D0++0x03
line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO467  ,CPU Targets Byte Offset 467 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO466  ,CPU Targets Byte Offset 466 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO465  ,CPU Targets Byte Offset 465 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO464  ,CPU Targets Byte Offset 464 "
group.long 0x9D4++0x03
line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO471  ,CPU Targets Byte Offset 471 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO470  ,CPU Targets Byte Offset 470 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO469  ,CPU Targets Byte Offset 469 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO468  ,CPU Targets Byte Offset 468 "
group.long 0x9D8++0x03
line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO475  ,CPU Targets Byte Offset 475 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO474  ,CPU Targets Byte Offset 474 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO473  ,CPU Targets Byte Offset 473 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO472  ,CPU Targets Byte Offset 472 "
group.long 0x9DC++0x03
line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO479  ,CPU Targets Byte Offset 479 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO478  ,CPU Targets Byte Offset 478 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO477  ,CPU Targets Byte Offset 477 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO476  ,CPU Targets Byte Offset 476 "
else
hgroup.long 0x9C0++0x03
hide.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
hgroup.long 0x9C4++0x03
hide.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
hgroup.long 0x9C8++0x03
hide.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
hgroup.long 0x9CC++0x03
hide.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
hgroup.long 0x9D0++0x03
hide.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
hgroup.long 0x9D4++0x03
hide.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
hgroup.long 0x9D8++0x03
hide.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
hgroup.long 0x9DC++0x03
hide.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x9E0++0x03
line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO483  ,CPU Targets Byte Offset 483 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO482  ,CPU Targets Byte Offset 482 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO481  ,CPU Targets Byte Offset 481 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO480  ,CPU Targets Byte Offset 480 "
group.long 0x9E4++0x03
line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO487  ,CPU Targets Byte Offset 487 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO486  ,CPU Targets Byte Offset 486 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO485  ,CPU Targets Byte Offset 485 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO484  ,CPU Targets Byte Offset 484 "
group.long 0x9E8++0x03
line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO491  ,CPU Targets Byte Offset 491 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO490  ,CPU Targets Byte Offset 490 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO489  ,CPU Targets Byte Offset 489 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO488  ,CPU Targets Byte Offset 488 "
group.long 0x9EC++0x03
line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO495  ,CPU Targets Byte Offset 495 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO494  ,CPU Targets Byte Offset 494 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO493  ,CPU Targets Byte Offset 493 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO492  ,CPU Targets Byte Offset 492 "
group.long 0x9F0++0x03
line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO499  ,CPU Targets Byte Offset 499 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO498  ,CPU Targets Byte Offset 498 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO497  ,CPU Targets Byte Offset 497 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO496  ,CPU Targets Byte Offset 496 "
group.long 0x9F4++0x03
line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO503  ,CPU Targets Byte Offset 503 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO502  ,CPU Targets Byte Offset 502 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO501  ,CPU Targets Byte Offset 501 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO500  ,CPU Targets Byte Offset 500 "
group.long 0x9F8++0x03
line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO507  ,CPU Targets Byte Offset 507 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO506  ,CPU Targets Byte Offset 506 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO505  ,CPU Targets Byte Offset 505 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO504  ,CPU Targets Byte Offset 504 "
group.long 0x9FC++0x03
line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO511  ,CPU Targets Byte Offset 511 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO510  ,CPU Targets Byte Offset 510 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO509  ,CPU Targets Byte Offset 509 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO508  ,CPU Targets Byte Offset 508 "
else
hgroup.long 0x9E0++0x03
hide.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
hgroup.long 0x9E4++0x03
hide.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
hgroup.long 0x9E8++0x03
hide.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
hgroup.long 0x9EC++0x03
hide.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
hgroup.long 0x9F0++0x03
hide.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
hgroup.long 0x9F4++0x03
hide.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
hgroup.long 0x9F8++0x03
hide.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
hgroup.long 0x9FC++0x03
hide.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0xA00++0x03
line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO515  ,CPU Targets Byte Offset 515 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO514  ,CPU Targets Byte Offset 514 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO513  ,CPU Targets Byte Offset 513 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO512  ,CPU Targets Byte Offset 512 "
group.long 0xA04++0x03
line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO519  ,CPU Targets Byte Offset 519 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO518  ,CPU Targets Byte Offset 518 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO517  ,CPU Targets Byte Offset 517 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO516  ,CPU Targets Byte Offset 516 "
group.long 0xA08++0x03
line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO523  ,CPU Targets Byte Offset 523 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO522  ,CPU Targets Byte Offset 522 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO521  ,CPU Targets Byte Offset 521 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO520  ,CPU Targets Byte Offset 520 "
group.long 0xA0C++0x03
line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO527  ,CPU Targets Byte Offset 527 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO526  ,CPU Targets Byte Offset 526 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO525  ,CPU Targets Byte Offset 525 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO524  ,CPU Targets Byte Offset 524 "
group.long 0xA10++0x03
line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO531  ,CPU Targets Byte Offset 531 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO530  ,CPU Targets Byte Offset 530 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO529  ,CPU Targets Byte Offset 529 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO528  ,CPU Targets Byte Offset 528 "
group.long 0xA14++0x03
line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO535  ,CPU Targets Byte Offset 535 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO534  ,CPU Targets Byte Offset 534 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO533  ,CPU Targets Byte Offset 533 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO532  ,CPU Targets Byte Offset 532 "
group.long 0xA18++0x03
line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO539  ,CPU Targets Byte Offset 539 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO538  ,CPU Targets Byte Offset 538 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO537  ,CPU Targets Byte Offset 537 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO536  ,CPU Targets Byte Offset 536 "
group.long 0xA1C++0x03
line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO543  ,CPU Targets Byte Offset 543 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO542  ,CPU Targets Byte Offset 542 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO541  ,CPU Targets Byte Offset 541 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO540  ,CPU Targets Byte Offset 540 "
else
hgroup.long 0xA00++0x03
hide.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
hgroup.long 0xA04++0x03
hide.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
hgroup.long 0xA08++0x03
hide.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
hgroup.long 0xA0C++0x03
hide.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
hgroup.long 0xA10++0x03
hide.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
hgroup.long 0xA14++0x03
hide.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
hgroup.long 0xA18++0x03
hide.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
hgroup.long 0xA1C++0x03
hide.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0xA20++0x03
line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO547  ,CPU Targets Byte Offset 547 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO546  ,CPU Targets Byte Offset 546 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO545  ,CPU Targets Byte Offset 545 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO544  ,CPU Targets Byte Offset 544 "
group.long 0xA24++0x03
line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO551  ,CPU Targets Byte Offset 551 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO550  ,CPU Targets Byte Offset 550 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO549  ,CPU Targets Byte Offset 549 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO548  ,CPU Targets Byte Offset 548 "
group.long 0xA28++0x03
line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO555  ,CPU Targets Byte Offset 555 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO554  ,CPU Targets Byte Offset 554 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO553  ,CPU Targets Byte Offset 553 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO552  ,CPU Targets Byte Offset 552 "
group.long 0xA2C++0x03
line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO559  ,CPU Targets Byte Offset 559 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO558  ,CPU Targets Byte Offset 558 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO557  ,CPU Targets Byte Offset 557 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO556  ,CPU Targets Byte Offset 556 "
group.long 0xA30++0x03
line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO563  ,CPU Targets Byte Offset 563 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO562  ,CPU Targets Byte Offset 562 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO561  ,CPU Targets Byte Offset 561 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO560  ,CPU Targets Byte Offset 560 "
group.long 0xA34++0x03
line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO567  ,CPU Targets Byte Offset 567 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO566  ,CPU Targets Byte Offset 566 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO565  ,CPU Targets Byte Offset 565 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO564  ,CPU Targets Byte Offset 564 "
group.long 0xA38++0x03
line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO571  ,CPU Targets Byte Offset 571 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO570  ,CPU Targets Byte Offset 570 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO569  ,CPU Targets Byte Offset 569 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO568  ,CPU Targets Byte Offset 568 "
group.long 0xA3C++0x03
line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO575  ,CPU Targets Byte Offset 575 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO574  ,CPU Targets Byte Offset 574 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO573  ,CPU Targets Byte Offset 573 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO572  ,CPU Targets Byte Offset 572 "
else
hgroup.long 0xA20++0x03
hide.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
hgroup.long 0xA24++0x03
hide.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
hgroup.long 0xA28++0x03
hide.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
hgroup.long 0xA2C++0x03
hide.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
hgroup.long 0xA30++0x03
hide.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
hgroup.long 0xA34++0x03
hide.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
hgroup.long 0xA38++0x03
hide.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
hgroup.long 0xA3C++0x03
hide.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0xA40++0x03
line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO579  ,CPU Targets Byte Offset 579 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO578  ,CPU Targets Byte Offset 578 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO577  ,CPU Targets Byte Offset 577 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO576  ,CPU Targets Byte Offset 576 "
group.long 0xA44++0x03
line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO583  ,CPU Targets Byte Offset 583 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO582  ,CPU Targets Byte Offset 582 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO581  ,CPU Targets Byte Offset 581 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO580  ,CPU Targets Byte Offset 580 "
group.long 0xA48++0x03
line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO587  ,CPU Targets Byte Offset 587 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO586  ,CPU Targets Byte Offset 586 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO585  ,CPU Targets Byte Offset 585 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO584  ,CPU Targets Byte Offset 584 "
group.long 0xA4C++0x03
line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO591  ,CPU Targets Byte Offset 591 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO590  ,CPU Targets Byte Offset 590 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO589  ,CPU Targets Byte Offset 589 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO588  ,CPU Targets Byte Offset 588 "
group.long 0xA50++0x03
line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO595  ,CPU Targets Byte Offset 595 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO594  ,CPU Targets Byte Offset 594 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO593  ,CPU Targets Byte Offset 593 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO592  ,CPU Targets Byte Offset 592 "
group.long 0xA54++0x03
line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO599  ,CPU Targets Byte Offset 599 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO598  ,CPU Targets Byte Offset 598 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO597  ,CPU Targets Byte Offset 597 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO596  ,CPU Targets Byte Offset 596 "
group.long 0xA58++0x03
line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO603  ,CPU Targets Byte Offset 603 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO602  ,CPU Targets Byte Offset 602 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO601  ,CPU Targets Byte Offset 601 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO600  ,CPU Targets Byte Offset 600 "
group.long 0xA5C++0x03
line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO607  ,CPU Targets Byte Offset 607 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO606  ,CPU Targets Byte Offset 606 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO605  ,CPU Targets Byte Offset 605 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO604  ,CPU Targets Byte Offset 604 "
else
hgroup.long 0xA40++0x03
hide.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
hgroup.long 0xA44++0x03
hide.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
hgroup.long 0xA48++0x03
hide.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
hgroup.long 0xA4C++0x03
hide.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
hgroup.long 0xA50++0x03
hide.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
hgroup.long 0xA54++0x03
hide.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
hgroup.long 0xA58++0x03
hide.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
hgroup.long 0xA5C++0x03
hide.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0xA60++0x03
line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO611  ,CPU Targets Byte Offset 611 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO610  ,CPU Targets Byte Offset 610 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO609  ,CPU Targets Byte Offset 609 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO608  ,CPU Targets Byte Offset 608 "
group.long 0xA64++0x03
line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO615  ,CPU Targets Byte Offset 615 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO614  ,CPU Targets Byte Offset 614 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO613  ,CPU Targets Byte Offset 613 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO612  ,CPU Targets Byte Offset 612 "
group.long 0xA68++0x03
line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO619  ,CPU Targets Byte Offset 619 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO618  ,CPU Targets Byte Offset 618 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO617  ,CPU Targets Byte Offset 617 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO616  ,CPU Targets Byte Offset 616 "
group.long 0xA6C++0x03
line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO623  ,CPU Targets Byte Offset 623 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO622  ,CPU Targets Byte Offset 622 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO621  ,CPU Targets Byte Offset 621 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO620  ,CPU Targets Byte Offset 620 "
group.long 0xA70++0x03
line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO627  ,CPU Targets Byte Offset 627 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO626  ,CPU Targets Byte Offset 626 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO625  ,CPU Targets Byte Offset 625 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO624  ,CPU Targets Byte Offset 624 "
group.long 0xA74++0x03
line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO631  ,CPU Targets Byte Offset 631 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO630  ,CPU Targets Byte Offset 630 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO629  ,CPU Targets Byte Offset 629 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO628  ,CPU Targets Byte Offset 628 "
group.long 0xA78++0x03
line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO635  ,CPU Targets Byte Offset 635 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO634  ,CPU Targets Byte Offset 634 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO633  ,CPU Targets Byte Offset 633 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO632  ,CPU Targets Byte Offset 632 "
group.long 0xA7C++0x03
line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO639  ,CPU Targets Byte Offset 639 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO638  ,CPU Targets Byte Offset 638 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO637  ,CPU Targets Byte Offset 637 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO636  ,CPU Targets Byte Offset 636 "
else
hgroup.long 0xA60++0x03
hide.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
hgroup.long 0xA64++0x03
hide.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
hgroup.long 0xA68++0x03
hide.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
hgroup.long 0xA6C++0x03
hide.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
hgroup.long 0xA70++0x03
hide.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
hgroup.long 0xA74++0x03
hide.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
hgroup.long 0xA78++0x03
hide.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
hgroup.long 0xA7C++0x03
hide.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0xA80++0x03
line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO643  ,CPU Targets Byte Offset 643 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO642  ,CPU Targets Byte Offset 642 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO641  ,CPU Targets Byte Offset 641 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO640  ,CPU Targets Byte Offset 640 "
group.long 0xA84++0x03
line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO647  ,CPU Targets Byte Offset 647 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO646  ,CPU Targets Byte Offset 646 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO645  ,CPU Targets Byte Offset 645 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO644  ,CPU Targets Byte Offset 644 "
group.long 0xA88++0x03
line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO651  ,CPU Targets Byte Offset 651 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO650  ,CPU Targets Byte Offset 650 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO649  ,CPU Targets Byte Offset 649 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO648  ,CPU Targets Byte Offset 648 "
group.long 0xA8C++0x03
line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO655  ,CPU Targets Byte Offset 655 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO654  ,CPU Targets Byte Offset 654 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO653  ,CPU Targets Byte Offset 653 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO652  ,CPU Targets Byte Offset 652 "
group.long 0xA90++0x03
line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO659  ,CPU Targets Byte Offset 659 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO658  ,CPU Targets Byte Offset 658 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO657  ,CPU Targets Byte Offset 657 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO656  ,CPU Targets Byte Offset 656 "
group.long 0xA94++0x03
line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO663  ,CPU Targets Byte Offset 663 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO662  ,CPU Targets Byte Offset 662 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO661  ,CPU Targets Byte Offset 661 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO660  ,CPU Targets Byte Offset 660 "
group.long 0xA98++0x03
line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO667  ,CPU Targets Byte Offset 667 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO666  ,CPU Targets Byte Offset 666 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO665  ,CPU Targets Byte Offset 665 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO664  ,CPU Targets Byte Offset 664 "
group.long 0xA9C++0x03
line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO671  ,CPU Targets Byte Offset 671 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO670  ,CPU Targets Byte Offset 670 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO669  ,CPU Targets Byte Offset 669 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO668  ,CPU Targets Byte Offset 668 "
else
hgroup.long 0xA80++0x03
hide.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
hgroup.long 0xA84++0x03
hide.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
hgroup.long 0xA88++0x03
hide.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
hgroup.long 0xA8C++0x03
hide.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
hgroup.long 0xA90++0x03
hide.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
hgroup.long 0xA94++0x03
hide.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
hgroup.long 0xA98++0x03
hide.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
hgroup.long 0xA9C++0x03
hide.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0xAA0++0x03
line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO675  ,CPU Targets Byte Offset 675 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO674  ,CPU Targets Byte Offset 674 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO673  ,CPU Targets Byte Offset 673 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO672  ,CPU Targets Byte Offset 672 "
group.long 0xAA4++0x03
line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO679  ,CPU Targets Byte Offset 679 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO678  ,CPU Targets Byte Offset 678 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO677  ,CPU Targets Byte Offset 677 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO676  ,CPU Targets Byte Offset 676 "
group.long 0xAA8++0x03
line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO683  ,CPU Targets Byte Offset 683 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO682  ,CPU Targets Byte Offset 682 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO681  ,CPU Targets Byte Offset 681 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO680  ,CPU Targets Byte Offset 680 "
group.long 0xAAC++0x03
line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO687  ,CPU Targets Byte Offset 687 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO686  ,CPU Targets Byte Offset 686 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO685  ,CPU Targets Byte Offset 685 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO684  ,CPU Targets Byte Offset 684 "
group.long 0xAB0++0x03
line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO691  ,CPU Targets Byte Offset 691 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO690  ,CPU Targets Byte Offset 690 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO689  ,CPU Targets Byte Offset 689 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO688  ,CPU Targets Byte Offset 688 "
group.long 0xAB4++0x03
line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO695  ,CPU Targets Byte Offset 695 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO694  ,CPU Targets Byte Offset 694 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO693  ,CPU Targets Byte Offset 693 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO692  ,CPU Targets Byte Offset 692 "
group.long 0xAB8++0x03
line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO699  ,CPU Targets Byte Offset 699 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO698  ,CPU Targets Byte Offset 698 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO697  ,CPU Targets Byte Offset 697 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO696  ,CPU Targets Byte Offset 696 "
group.long 0xABC++0x03
line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO703  ,CPU Targets Byte Offset 703 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO702  ,CPU Targets Byte Offset 702 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO701  ,CPU Targets Byte Offset 701 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO700  ,CPU Targets Byte Offset 700 "
else
hgroup.long 0xAA0++0x03
hide.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
hgroup.long 0xAA4++0x03
hide.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
hgroup.long 0xAA8++0x03
hide.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
hgroup.long 0xAAC++0x03
hide.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
hgroup.long 0xAB0++0x03
hide.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
hgroup.long 0xAB4++0x03
hide.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
hgroup.long 0xAB8++0x03
hide.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
hgroup.long 0xABC++0x03
hide.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0xAC0++0x03
line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO707  ,CPU Targets Byte Offset 707 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO706  ,CPU Targets Byte Offset 706 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO705  ,CPU Targets Byte Offset 705 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO704  ,CPU Targets Byte Offset 704 "
group.long 0xAC4++0x03
line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO711  ,CPU Targets Byte Offset 711 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO710  ,CPU Targets Byte Offset 710 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO709  ,CPU Targets Byte Offset 709 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO708  ,CPU Targets Byte Offset 708 "
group.long 0xAC8++0x03
line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO715  ,CPU Targets Byte Offset 715 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO714  ,CPU Targets Byte Offset 714 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO713  ,CPU Targets Byte Offset 713 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO712  ,CPU Targets Byte Offset 712 "
group.long 0xACC++0x03
line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO719  ,CPU Targets Byte Offset 719 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO718  ,CPU Targets Byte Offset 718 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO717  ,CPU Targets Byte Offset 717 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO716  ,CPU Targets Byte Offset 716 "
group.long 0xAD0++0x03
line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO723  ,CPU Targets Byte Offset 723 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO722  ,CPU Targets Byte Offset 722 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO721  ,CPU Targets Byte Offset 721 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO720  ,CPU Targets Byte Offset 720 "
group.long 0xAD4++0x03
line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO727  ,CPU Targets Byte Offset 727 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO726  ,CPU Targets Byte Offset 726 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO725  ,CPU Targets Byte Offset 725 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO724  ,CPU Targets Byte Offset 724 "
group.long 0xAD8++0x03
line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO731  ,CPU Targets Byte Offset 731 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO730  ,CPU Targets Byte Offset 730 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO729  ,CPU Targets Byte Offset 729 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO728  ,CPU Targets Byte Offset 728 "
group.long 0xADC++0x03
line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO735  ,CPU Targets Byte Offset 735 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO734  ,CPU Targets Byte Offset 734 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO733  ,CPU Targets Byte Offset 733 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO732  ,CPU Targets Byte Offset 732 "
else
hgroup.long 0xAC0++0x03
hide.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
hgroup.long 0xAC4++0x03
hide.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
hgroup.long 0xAC8++0x03
hide.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
hgroup.long 0xACC++0x03
hide.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
hgroup.long 0xAD0++0x03
hide.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
hgroup.long 0xAD4++0x03
hide.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
hgroup.long 0xAD8++0x03
hide.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
hgroup.long 0xADC++0x03
hide.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0xAE0++0x03
line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO739  ,CPU Targets Byte Offset 739 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO738  ,CPU Targets Byte Offset 738 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO737  ,CPU Targets Byte Offset 737 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO736  ,CPU Targets Byte Offset 736 "
group.long 0xAE4++0x03
line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO743  ,CPU Targets Byte Offset 743 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO742  ,CPU Targets Byte Offset 742 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO741  ,CPU Targets Byte Offset 741 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO740  ,CPU Targets Byte Offset 740 "
group.long 0xAE8++0x03
line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO747  ,CPU Targets Byte Offset 747 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO746  ,CPU Targets Byte Offset 746 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO745  ,CPU Targets Byte Offset 745 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO744  ,CPU Targets Byte Offset 744 "
group.long 0xAEC++0x03
line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO751  ,CPU Targets Byte Offset 751 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO750  ,CPU Targets Byte Offset 750 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO749  ,CPU Targets Byte Offset 749 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO748  ,CPU Targets Byte Offset 748 "
group.long 0xAF0++0x03
line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO755  ,CPU Targets Byte Offset 755 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO754  ,CPU Targets Byte Offset 754 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO753  ,CPU Targets Byte Offset 753 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO752  ,CPU Targets Byte Offset 752 "
group.long 0xAF4++0x03
line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO759  ,CPU Targets Byte Offset 759 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO758  ,CPU Targets Byte Offset 758 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO757  ,CPU Targets Byte Offset 757 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO756  ,CPU Targets Byte Offset 756 "
group.long 0xAF8++0x03
line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO763  ,CPU Targets Byte Offset 763 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO762  ,CPU Targets Byte Offset 762 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO761  ,CPU Targets Byte Offset 761 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO760  ,CPU Targets Byte Offset 760 "
group.long 0xAFC++0x03
line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO767  ,CPU Targets Byte Offset 767 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO766  ,CPU Targets Byte Offset 766 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO765  ,CPU Targets Byte Offset 765 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO764  ,CPU Targets Byte Offset 764 "
else
hgroup.long 0xAE0++0x03
hide.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
hgroup.long 0xAE4++0x03
hide.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
hgroup.long 0xAE8++0x03
hide.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
hgroup.long 0xAEC++0x03
hide.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
hgroup.long 0xAF0++0x03
hide.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
hgroup.long 0xAF4++0x03
hide.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
hgroup.long 0xAF8++0x03
hide.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
hgroup.long 0xAFC++0x03
hide.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0xB00++0x03
line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO771  ,CPU Targets Byte Offset 771 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO770  ,CPU Targets Byte Offset 770 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO769  ,CPU Targets Byte Offset 769 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO768  ,CPU Targets Byte Offset 768 "
group.long 0xB04++0x03
line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO775  ,CPU Targets Byte Offset 775 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO774  ,CPU Targets Byte Offset 774 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO773  ,CPU Targets Byte Offset 773 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO772  ,CPU Targets Byte Offset 772 "
group.long 0xB08++0x03
line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO779  ,CPU Targets Byte Offset 779 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO778  ,CPU Targets Byte Offset 778 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO777  ,CPU Targets Byte Offset 777 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO776  ,CPU Targets Byte Offset 776 "
group.long 0xB0C++0x03
line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO783  ,CPU Targets Byte Offset 783 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO782  ,CPU Targets Byte Offset 782 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO781  ,CPU Targets Byte Offset 781 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO780  ,CPU Targets Byte Offset 780 "
group.long 0xB10++0x03
line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO787  ,CPU Targets Byte Offset 787 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO786  ,CPU Targets Byte Offset 786 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO785  ,CPU Targets Byte Offset 785 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO784  ,CPU Targets Byte Offset 784 "
group.long 0xB14++0x03
line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO791  ,CPU Targets Byte Offset 791 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO790  ,CPU Targets Byte Offset 790 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO789  ,CPU Targets Byte Offset 789 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO788  ,CPU Targets Byte Offset 788 "
group.long 0xB18++0x03
line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO795  ,CPU Targets Byte Offset 795 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO794  ,CPU Targets Byte Offset 794 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO793  ,CPU Targets Byte Offset 793 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO792  ,CPU Targets Byte Offset 792 "
group.long 0xB1C++0x03
line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO799  ,CPU Targets Byte Offset 799 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO798  ,CPU Targets Byte Offset 798 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO797  ,CPU Targets Byte Offset 797 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO796  ,CPU Targets Byte Offset 796 "
else
hgroup.long 0xB00++0x03
hide.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
hgroup.long 0xB04++0x03
hide.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
hgroup.long 0xB08++0x03
hide.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
hgroup.long 0xB0C++0x03
hide.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
hgroup.long 0xB10++0x03
hide.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
hgroup.long 0xB14++0x03
hide.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
hgroup.long 0xB18++0x03
hide.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
hgroup.long 0xB1C++0x03
hide.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0xB20++0x03
line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO803  ,CPU Targets Byte Offset 803 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO802  ,CPU Targets Byte Offset 802 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO801  ,CPU Targets Byte Offset 801 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO800  ,CPU Targets Byte Offset 800 "
group.long 0xB24++0x03
line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO807  ,CPU Targets Byte Offset 807 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO806  ,CPU Targets Byte Offset 806 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO805  ,CPU Targets Byte Offset 805 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO804  ,CPU Targets Byte Offset 804 "
group.long 0xB28++0x03
line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO811  ,CPU Targets Byte Offset 811 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO810  ,CPU Targets Byte Offset 810 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO809  ,CPU Targets Byte Offset 809 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO808  ,CPU Targets Byte Offset 808 "
group.long 0xB2C++0x03
line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO815  ,CPU Targets Byte Offset 815 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO814  ,CPU Targets Byte Offset 814 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO813  ,CPU Targets Byte Offset 813 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO812  ,CPU Targets Byte Offset 812 "
group.long 0xB30++0x03
line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO819  ,CPU Targets Byte Offset 819 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO818  ,CPU Targets Byte Offset 818 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO817  ,CPU Targets Byte Offset 817 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO816  ,CPU Targets Byte Offset 816 "
group.long 0xB34++0x03
line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO823  ,CPU Targets Byte Offset 823 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO822  ,CPU Targets Byte Offset 822 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO821  ,CPU Targets Byte Offset 821 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO820  ,CPU Targets Byte Offset 820 "
group.long 0xB38++0x03
line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO827  ,CPU Targets Byte Offset 827 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO826  ,CPU Targets Byte Offset 826 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO825  ,CPU Targets Byte Offset 825 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO824  ,CPU Targets Byte Offset 824 "
group.long 0xB3C++0x03
line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO831  ,CPU Targets Byte Offset 831 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO830  ,CPU Targets Byte Offset 830 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO829  ,CPU Targets Byte Offset 829 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO828  ,CPU Targets Byte Offset 828 "
else
hgroup.long 0xB20++0x03
hide.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
hgroup.long 0xB24++0x03
hide.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
hgroup.long 0xB28++0x03
hide.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
hgroup.long 0xB2C++0x03
hide.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
hgroup.long 0xB30++0x03
hide.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
hgroup.long 0xB34++0x03
hide.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
hgroup.long 0xB38++0x03
hide.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
hgroup.long 0xB3C++0x03
hide.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0xB40++0x03
line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO835  ,CPU Targets Byte Offset 835 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO834  ,CPU Targets Byte Offset 834 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO833  ,CPU Targets Byte Offset 833 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO832  ,CPU Targets Byte Offset 832 "
group.long 0xB44++0x03
line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO839  ,CPU Targets Byte Offset 839 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO838  ,CPU Targets Byte Offset 838 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO837  ,CPU Targets Byte Offset 837 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO836  ,CPU Targets Byte Offset 836 "
group.long 0xB48++0x03
line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO843  ,CPU Targets Byte Offset 843 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO842  ,CPU Targets Byte Offset 842 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO841  ,CPU Targets Byte Offset 841 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO840  ,CPU Targets Byte Offset 840 "
group.long 0xB4C++0x03
line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO847  ,CPU Targets Byte Offset 847 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO846  ,CPU Targets Byte Offset 846 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO845  ,CPU Targets Byte Offset 845 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO844  ,CPU Targets Byte Offset 844 "
group.long 0xB50++0x03
line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO851  ,CPU Targets Byte Offset 851 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO850  ,CPU Targets Byte Offset 850 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO849  ,CPU Targets Byte Offset 849 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO848  ,CPU Targets Byte Offset 848 "
group.long 0xB54++0x03
line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO855  ,CPU Targets Byte Offset 855 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO854  ,CPU Targets Byte Offset 854 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO853  ,CPU Targets Byte Offset 853 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO852  ,CPU Targets Byte Offset 852 "
group.long 0xB58++0x03
line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO859  ,CPU Targets Byte Offset 859 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO858  ,CPU Targets Byte Offset 858 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO857  ,CPU Targets Byte Offset 857 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO856  ,CPU Targets Byte Offset 856 "
group.long 0xB5C++0x03
line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO863  ,CPU Targets Byte Offset 863 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO862  ,CPU Targets Byte Offset 862 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO861  ,CPU Targets Byte Offset 861 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO860  ,CPU Targets Byte Offset 860 "
else
hgroup.long 0xB40++0x03
hide.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
hgroup.long 0xB44++0x03
hide.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
hgroup.long 0xB48++0x03
hide.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
hgroup.long 0xB4C++0x03
hide.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
hgroup.long 0xB50++0x03
hide.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
hgroup.long 0xB54++0x03
hide.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
hgroup.long 0xB58++0x03
hide.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
hgroup.long 0xB5C++0x03
hide.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0xB60++0x03
line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO867  ,CPU Targets Byte Offset 867 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO866  ,CPU Targets Byte Offset 866 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO865  ,CPU Targets Byte Offset 865 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO864  ,CPU Targets Byte Offset 864 "
group.long 0xB64++0x03
line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO871  ,CPU Targets Byte Offset 871 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO870  ,CPU Targets Byte Offset 870 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO869  ,CPU Targets Byte Offset 869 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO868  ,CPU Targets Byte Offset 868 "
group.long 0xB68++0x03
line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO875  ,CPU Targets Byte Offset 875 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO874  ,CPU Targets Byte Offset 874 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO873  ,CPU Targets Byte Offset 873 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO872  ,CPU Targets Byte Offset 872 "
group.long 0xB6C++0x03
line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO879  ,CPU Targets Byte Offset 879 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO878  ,CPU Targets Byte Offset 878 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO877  ,CPU Targets Byte Offset 877 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO876  ,CPU Targets Byte Offset 876 "
group.long 0xB70++0x03
line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO883  ,CPU Targets Byte Offset 883 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO882  ,CPU Targets Byte Offset 882 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO881  ,CPU Targets Byte Offset 881 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO880  ,CPU Targets Byte Offset 880 "
group.long 0xB74++0x03
line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO887  ,CPU Targets Byte Offset 887 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO886  ,CPU Targets Byte Offset 886 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO885  ,CPU Targets Byte Offset 885 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO884  ,CPU Targets Byte Offset 884 "
group.long 0xB78++0x03
line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO891  ,CPU Targets Byte Offset 891 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO890  ,CPU Targets Byte Offset 890 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO889  ,CPU Targets Byte Offset 889 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO888  ,CPU Targets Byte Offset 888 "
group.long 0xB7C++0x03
line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO895  ,CPU Targets Byte Offset 895 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO894  ,CPU Targets Byte Offset 894 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO893  ,CPU Targets Byte Offset 893 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO892  ,CPU Targets Byte Offset 892 "
else
hgroup.long 0xB60++0x03
hide.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
hgroup.long 0xB64++0x03
hide.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
hgroup.long 0xB68++0x03
hide.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
hgroup.long 0xB6C++0x03
hide.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
hgroup.long 0xB70++0x03
hide.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
hgroup.long 0xB74++0x03
hide.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
hgroup.long 0xB78++0x03
hide.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
hgroup.long 0xB7C++0x03
hide.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0xB80++0x03
line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO899  ,CPU Targets Byte Offset 899 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO898  ,CPU Targets Byte Offset 898 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO897  ,CPU Targets Byte Offset 897 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO896  ,CPU Targets Byte Offset 896 "
group.long 0xB84++0x03
line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO903  ,CPU Targets Byte Offset 903 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO902  ,CPU Targets Byte Offset 902 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO901  ,CPU Targets Byte Offset 901 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO900  ,CPU Targets Byte Offset 900 "
group.long 0xB88++0x03
line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO907  ,CPU Targets Byte Offset 907 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO906  ,CPU Targets Byte Offset 906 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO905  ,CPU Targets Byte Offset 905 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO904  ,CPU Targets Byte Offset 904 "
group.long 0xB8C++0x03
line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO911  ,CPU Targets Byte Offset 911 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO910  ,CPU Targets Byte Offset 910 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO909  ,CPU Targets Byte Offset 909 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO908  ,CPU Targets Byte Offset 908 "
group.long 0xB90++0x03
line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO915  ,CPU Targets Byte Offset 915 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO914  ,CPU Targets Byte Offset 914 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO913  ,CPU Targets Byte Offset 913 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO912  ,CPU Targets Byte Offset 912 "
group.long 0xB94++0x03
line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO919  ,CPU Targets Byte Offset 919 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO918  ,CPU Targets Byte Offset 918 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO917  ,CPU Targets Byte Offset 917 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO916  ,CPU Targets Byte Offset 916 "
group.long 0xB98++0x03
line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO923  ,CPU Targets Byte Offset 923 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO922  ,CPU Targets Byte Offset 922 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO921  ,CPU Targets Byte Offset 921 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO920  ,CPU Targets Byte Offset 920 "
group.long 0xB9C++0x03
line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO927  ,CPU Targets Byte Offset 927 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO926  ,CPU Targets Byte Offset 926 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO925  ,CPU Targets Byte Offset 925 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO924  ,CPU Targets Byte Offset 924 "
else
hgroup.long 0xB80++0x03
hide.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
hgroup.long 0xB84++0x03
hide.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
hgroup.long 0xB88++0x03
hide.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
hgroup.long 0xB8C++0x03
hide.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
hgroup.long 0xB90++0x03
hide.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
hgroup.long 0xB94++0x03
hide.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
hgroup.long 0xB98++0x03
hide.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
hgroup.long 0xB9C++0x03
hide.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0xBA0++0x03
line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO931  ,CPU Targets Byte Offset 931 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO930  ,CPU Targets Byte Offset 930 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO929  ,CPU Targets Byte Offset 929 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO928  ,CPU Targets Byte Offset 928 "
group.long 0xBA4++0x03
line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO935  ,CPU Targets Byte Offset 935 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO934  ,CPU Targets Byte Offset 934 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO933  ,CPU Targets Byte Offset 933 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO932  ,CPU Targets Byte Offset 932 "
group.long 0xBA8++0x03
line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO939  ,CPU Targets Byte Offset 939 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO938  ,CPU Targets Byte Offset 938 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO937  ,CPU Targets Byte Offset 937 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO936  ,CPU Targets Byte Offset 936 "
group.long 0xBAC++0x03
line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO943  ,CPU Targets Byte Offset 943 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO942  ,CPU Targets Byte Offset 942 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO941  ,CPU Targets Byte Offset 941 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO940  ,CPU Targets Byte Offset 940 "
group.long 0xBB0++0x03
line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO947  ,CPU Targets Byte Offset 947 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO946  ,CPU Targets Byte Offset 946 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO945  ,CPU Targets Byte Offset 945 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO944  ,CPU Targets Byte Offset 944 "
group.long 0xBB4++0x03
line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO951  ,CPU Targets Byte Offset 951 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO950  ,CPU Targets Byte Offset 950 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO949  ,CPU Targets Byte Offset 949 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO948  ,CPU Targets Byte Offset 948 "
group.long 0xBB8++0x03
line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO955  ,CPU Targets Byte Offset 955 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO954  ,CPU Targets Byte Offset 954 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO953  ,CPU Targets Byte Offset 953 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO952  ,CPU Targets Byte Offset 952 "
group.long 0xBBC++0x03
line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO959  ,CPU Targets Byte Offset 959 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO958  ,CPU Targets Byte Offset 958 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO957  ,CPU Targets Byte Offset 957 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO956  ,CPU Targets Byte Offset 956 "
else
hgroup.long 0xBA0++0x03
hide.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
hgroup.long 0xBA4++0x03
hide.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
hgroup.long 0xBA8++0x03
hide.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
hgroup.long 0xBAC++0x03
hide.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
hgroup.long 0xBB0++0x03
hide.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
hgroup.long 0xBB4++0x03
hide.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
hgroup.long 0xBB8++0x03
hide.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
hgroup.long 0xBBC++0x03
hide.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0xBC0++0x03
line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO963  ,CPU Targets Byte Offset 963 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO962  ,CPU Targets Byte Offset 962 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO961  ,CPU Targets Byte Offset 961 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO960  ,CPU Targets Byte Offset 960 "
group.long 0xBC4++0x03
line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO967  ,CPU Targets Byte Offset 967 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO966  ,CPU Targets Byte Offset 966 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO965  ,CPU Targets Byte Offset 965 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO964  ,CPU Targets Byte Offset 964 "
group.long 0xBC8++0x03
line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO971  ,CPU Targets Byte Offset 971 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO970  ,CPU Targets Byte Offset 970 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO969  ,CPU Targets Byte Offset 969 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO968  ,CPU Targets Byte Offset 968 "
group.long 0xBCC++0x03
line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO975  ,CPU Targets Byte Offset 975 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO974  ,CPU Targets Byte Offset 974 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO973  ,CPU Targets Byte Offset 973 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO972  ,CPU Targets Byte Offset 972 "
group.long 0xBD0++0x03
line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO979  ,CPU Targets Byte Offset 979 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO978  ,CPU Targets Byte Offset 978 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO977  ,CPU Targets Byte Offset 977 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO976  ,CPU Targets Byte Offset 976 "
group.long 0xBD4++0x03
line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO983  ,CPU Targets Byte Offset 983 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO982  ,CPU Targets Byte Offset 982 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO981  ,CPU Targets Byte Offset 981 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO980  ,CPU Targets Byte Offset 980 "
group.long 0xBD8++0x03
line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO987  ,CPU Targets Byte Offset 987 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO986  ,CPU Targets Byte Offset 986 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO985  ,CPU Targets Byte Offset 985 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO984  ,CPU Targets Byte Offset 984 "
group.long 0xBDC++0x03
line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO991  ,CPU Targets Byte Offset 991 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO990  ,CPU Targets Byte Offset 990 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO989  ,CPU Targets Byte Offset 989 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO988  ,CPU Targets Byte Offset 988 "
else
hgroup.long 0xBC0++0x03
hide.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
hgroup.long 0xBC4++0x03
hide.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
hgroup.long 0xBC8++0x03
hide.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
hgroup.long 0xBCC++0x03
hide.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
hgroup.long 0xBD0++0x03
hide.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
hgroup.long 0xBD4++0x03
hide.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
hgroup.long 0xBD8++0x03
hide.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
hgroup.long 0xBDC++0x03
hide.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
endif
else
hgroup.long 0x800++0x03
hide.long 0x00 "GICD_ITARGETSR0  ,Interrupt Processor Targets Register 0  "
hgroup.long 0x804++0x03
hide.long 0x00 "GICD_ITARGETSR1  ,Interrupt Processor Targets Register 1  "
hgroup.long 0x808++0x03
hide.long 0x00 "GICD_ITARGETSR2  ,Interrupt Processor Targets Register 2  "
hgroup.long 0x80C++0x03
hide.long 0x00 "GICD_ITARGETSR3  ,Interrupt Processor Targets Register 3  "
hgroup.long 0x810++0x03
hide.long 0x00 "GICD_ITARGETSR4  ,Interrupt Processor Targets Register 4  "
hgroup.long 0x814++0x03
hide.long 0x00 "GICD_ITARGETSR5  ,Interrupt Processor Targets Register 5  "
hgroup.long 0x818++0x03
hide.long 0x00 "GICD_ITARGETSR6  ,Interrupt Processor Targets Register 6  "
hgroup.long 0x81C++0x03
hide.long 0x00 "GICD_ITARGETSR7  ,Interrupt Processor Targets Register 7  "
hgroup.long 0x820++0x03
hide.long 0x00 "GICD_ITARGETSR8  ,Interrupt Processor Targets Register 8  "
hgroup.long 0x824++0x03
hide.long 0x00 "GICD_ITARGETSR9  ,Interrupt Processor Targets Register 9  "
hgroup.long 0x828++0x03
hide.long 0x00 "GICD_ITARGETSR10 ,Interrupt Processor Targets Register 10 "
hgroup.long 0x82C++0x03
hide.long 0x00 "GICD_ITARGETSR11 ,Interrupt Processor Targets Register 11 "
hgroup.long 0x830++0x03
hide.long 0x00 "GICD_ITARGETSR12 ,Interrupt Processor Targets Register 12 "
hgroup.long 0x834++0x03
hide.long 0x00 "GICD_ITARGETSR13 ,Interrupt Processor Targets Register 13 "
hgroup.long 0x838++0x03
hide.long 0x00 "GICD_ITARGETSR14 ,Interrupt Processor Targets Register 14 "
hgroup.long 0x83C++0x03
hide.long 0x00 "GICD_ITARGETSR15 ,Interrupt Processor Targets Register 15 "
hgroup.long 0x840++0x03
hide.long 0x00 "GICD_ITARGETSR16 ,Interrupt Processor Targets Register 16 "
hgroup.long 0x844++0x03
hide.long 0x00 "GICD_ITARGETSR17 ,Interrupt Processor Targets Register 17 "
hgroup.long 0x848++0x03
hide.long 0x00 "GICD_ITARGETSR18 ,Interrupt Processor Targets Register 18 "
hgroup.long 0x84C++0x03
hide.long 0x00 "GICD_ITARGETSR19 ,Interrupt Processor Targets Register 19 "
hgroup.long 0x850++0x03
hide.long 0x00 "GICD_ITARGETSR20 ,Interrupt Processor Targets Register 20 "
hgroup.long 0x854++0x03
hide.long 0x00 "GICD_ITARGETSR21 ,Interrupt Processor Targets Register 21 "
hgroup.long 0x858++0x03
hide.long 0x00 "GICD_ITARGETSR22 ,Interrupt Processor Targets Register 22 "
hgroup.long 0x85C++0x03
hide.long 0x00 "GICD_ITARGETSR23 ,Interrupt Processor Targets Register 23 "
hgroup.long 0x860++0x03
hide.long 0x00 "GICD_ITARGETSR24 ,Interrupt Processor Targets Register 24 "
hgroup.long 0x864++0x03
hide.long 0x00 "GICD_ITARGETSR25 ,Interrupt Processor Targets Register 25 "
hgroup.long 0x868++0x03
hide.long 0x00 "GICD_ITARGETSR26 ,Interrupt Processor Targets Register 26 "
hgroup.long 0x86C++0x03
hide.long 0x00 "GICD_ITARGETSR27 ,Interrupt Processor Targets Register 27 "
hgroup.long 0x870++0x03
hide.long 0x00 "GICD_ITARGETSR28 ,Interrupt Processor Targets Register 28 "
hgroup.long 0x874++0x03
hide.long 0x00 "GICD_ITARGETSR29 ,Interrupt Processor Targets Register 29 "
hgroup.long 0x878++0x03
hide.long 0x00 "GICD_ITARGETSR30 ,Interrupt Processor Targets Register 30 "
hgroup.long 0x87C++0x03
hide.long 0x00 "GICD_ITARGETSR31 ,Interrupt Processor Targets Register 31 "
hgroup.long 0x880++0x03
hide.long 0x00 "GICD_ITARGETSR32 ,Interrupt Processor Targets Register 32 "
hgroup.long 0x884++0x03
hide.long 0x00 "GICD_ITARGETSR33 ,Interrupt Processor Targets Register 33 "
hgroup.long 0x888++0x03
hide.long 0x00 "GICD_ITARGETSR34 ,Interrupt Processor Targets Register 34 "
hgroup.long 0x88C++0x03
hide.long 0x00 "GICD_ITARGETSR35 ,Interrupt Processor Targets Register 35 "
hgroup.long 0x890++0x03
hide.long 0x00 "GICD_ITARGETSR36 ,Interrupt Processor Targets Register 36 "
hgroup.long 0x894++0x03
hide.long 0x00 "GICD_ITARGETSR37 ,Interrupt Processor Targets Register 37 "
hgroup.long 0x898++0x03
hide.long 0x00 "GICD_ITARGETSR38 ,Interrupt Processor Targets Register 38 "
hgroup.long 0x89C++0x03
hide.long 0x00 "GICD_ITARGETSR39 ,Interrupt Processor Targets Register 39 "
hgroup.long 0x8A0++0x03
hide.long 0x00 "GICD_ITARGETSR40 ,Interrupt Processor Targets Register 40 "
hgroup.long 0x8A4++0x03
hide.long 0x00 "GICD_ITARGETSR41 ,Interrupt Processor Targets Register 41 "
hgroup.long 0x8A8++0x03
hide.long 0x00 "GICD_ITARGETSR42 ,Interrupt Processor Targets Register 42 "
hgroup.long 0x8AC++0x03
hide.long 0x00 "GICD_ITARGETSR43 ,Interrupt Processor Targets Register 43 "
hgroup.long 0x8B0++0x03
hide.long 0x00 "GICD_ITARGETSR44 ,Interrupt Processor Targets Register 44 "
hgroup.long 0x8B4++0x03
hide.long 0x00 "GICD_ITARGETSR45 ,Interrupt Processor Targets Register 45 "
hgroup.long 0x8B8++0x03
hide.long 0x00 "GICD_ITARGETSR46 ,Interrupt Processor Targets Register 46 "
hgroup.long 0x8BC++0x03
hide.long 0x00 "GICD_ITARGETSR47 ,Interrupt Processor Targets Register 47 "
hgroup.long 0x8C0++0x03
hide.long 0x00 "GICD_ITARGETSR48 ,Interrupt Processor Targets Register 48 "
hgroup.long 0x8C4++0x03
hide.long 0x00 "GICD_ITARGETSR49 ,Interrupt Processor Targets Register 49 "
hgroup.long 0x8C8++0x03
hide.long 0x00 "GICD_ITARGETSR50 ,Interrupt Processor Targets Register 50 "
hgroup.long 0x8CC++0x03
hide.long 0x00 "GICD_ITARGETSR51 ,Interrupt Processor Targets Register 51 "
hgroup.long 0x8D0++0x03
hide.long 0x00 "GICD_ITARGETSR52 ,Interrupt Processor Targets Register 52 "
hgroup.long 0x8D4++0x03
hide.long 0x00 "GICD_ITARGETSR53 ,Interrupt Processor Targets Register 53 "
hgroup.long 0x8D8++0x03
hide.long 0x00 "GICD_ITARGETSR54 ,Interrupt Processor Targets Register 54 "
hgroup.long 0x8DC++0x03
hide.long 0x00 "GICD_ITARGETSR55 ,Interrupt Processor Targets Register 55 "
hgroup.long 0x8E0++0x03
hide.long 0x00 "GICD_ITARGETSR56 ,Interrupt Processor Targets Register 56 "
hgroup.long 0x8E4++0x03
hide.long 0x00 "GICD_ITARGETSR57 ,Interrupt Processor Targets Register 57 "
hgroup.long 0x8E8++0x03
hide.long 0x00 "GICD_ITARGETSR58 ,Interrupt Processor Targets Register 58 "
hgroup.long 0x8EC++0x03
hide.long 0x00 "GICD_ITARGETSR59 ,Interrupt Processor Targets Register 59 "
hgroup.long 0x8F0++0x03
hide.long 0x00 "GICD_ITARGETSR60 ,Interrupt Processor Targets Register 60 "
hgroup.long 0x8F4++0x03
hide.long 0x00 "GICD_ITARGETSR61 ,Interrupt Processor Targets Register 61 "
hgroup.long 0x8F8++0x03
hide.long 0x00 "GICD_ITARGETSR62 ,Interrupt Processor Targets Register 62 "
hgroup.long 0x8FC++0x03
hide.long 0x00 "GICD_ITARGETSR63 ,Interrupt Processor Targets Register 63 "
hgroup.long 0x900++0x03
hide.long 0x00 "GICD_ITARGETSR64 ,Interrupt Processor Targets Register 64 "
hgroup.long 0x904++0x03
hide.long 0x00 "GICD_ITARGETSR65 ,Interrupt Processor Targets Register 65 "
hgroup.long 0x908++0x03
hide.long 0x00 "GICD_ITARGETSR66 ,Interrupt Processor Targets Register 66 "
hgroup.long 0x90C++0x03
hide.long 0x00 "GICD_ITARGETSR67 ,Interrupt Processor Targets Register 67 "
hgroup.long 0x910++0x03
hide.long 0x00 "GICD_ITARGETSR68 ,Interrupt Processor Targets Register 68 "
hgroup.long 0x914++0x03
hide.long 0x00 "GICD_ITARGETSR69 ,Interrupt Processor Targets Register 69 "
hgroup.long 0x918++0x03
hide.long 0x00 "GICD_ITARGETSR70 ,Interrupt Processor Targets Register 70 "
hgroup.long 0x91C++0x03
hide.long 0x00 "GICD_ITARGETSR71 ,Interrupt Processor Targets Register 71 "
hgroup.long 0x920++0x03
hide.long 0x00 "GICD_ITARGETSR72 ,Interrupt Processor Targets Register 72 "
hgroup.long 0x924++0x03
hide.long 0x00 "GICD_ITARGETSR73 ,Interrupt Processor Targets Register 73 "
hgroup.long 0x928++0x03
hide.long 0x00 "GICD_ITARGETSR74 ,Interrupt Processor Targets Register 74 "
hgroup.long 0x92C++0x03
hide.long 0x00 "GICD_ITARGETSR75 ,Interrupt Processor Targets Register 75 "
hgroup.long 0x930++0x03
hide.long 0x00 "GICD_ITARGETSR76 ,Interrupt Processor Targets Register 76 "
hgroup.long 0x934++0x03
hide.long 0x00 "GICD_ITARGETSR77 ,Interrupt Processor Targets Register 77 "
hgroup.long 0x938++0x03
hide.long 0x00 "GICD_ITARGETSR78 ,Interrupt Processor Targets Register 78 "
hgroup.long 0x93C++0x03
hide.long 0x00 "GICD_ITARGETSR79 ,Interrupt Processor Targets Register 79 "
hgroup.long 0x940++0x03
hide.long 0x00 "GICD_ITARGETSR80 ,Interrupt Processor Targets Register 80 "
hgroup.long 0x944++0x03
hide.long 0x00 "GICD_ITARGETSR81 ,Interrupt Processor Targets Register 81 "
hgroup.long 0x948++0x03
hide.long 0x00 "GICD_ITARGETSR82 ,Interrupt Processor Targets Register 82 "
hgroup.long 0x94C++0x03
hide.long 0x00 "GICD_ITARGETSR83 ,Interrupt Processor Targets Register 83 "
hgroup.long 0x950++0x03
hide.long 0x00 "GICD_ITARGETSR84 ,Interrupt Processor Targets Register 84 "
hgroup.long 0x954++0x03
hide.long 0x00 "GICD_ITARGETSR85 ,Interrupt Processor Targets Register 85 "
hgroup.long 0x958++0x03
hide.long 0x00 "GICD_ITARGETSR86 ,Interrupt Processor Targets Register 86 "
hgroup.long 0x95C++0x03
hide.long 0x00 "GICD_ITARGETSR87 ,Interrupt Processor Targets Register 87 "
hgroup.long 0x960++0x03
hide.long 0x00 "GICD_ITARGETSR88 ,Interrupt Processor Targets Register 88 "
hgroup.long 0x964++0x03
hide.long 0x00 "GICD_ITARGETSR89 ,Interrupt Processor Targets Register 89 "
hgroup.long 0x968++0x03
hide.long 0x00 "GICD_ITARGETSR90 ,Interrupt Processor Targets Register 90 "
hgroup.long 0x96C++0x03
hide.long 0x00 "GICD_ITARGETSR91 ,Interrupt Processor Targets Register 91 "
hgroup.long 0x970++0x03
hide.long 0x00 "GICD_ITARGETSR92 ,Interrupt Processor Targets Register 92 "
hgroup.long 0x974++0x03
hide.long 0x00 "GICD_ITARGETSR93 ,Interrupt Processor Targets Register 93 "
hgroup.long 0x978++0x03
hide.long 0x00 "GICD_ITARGETSR94 ,Interrupt Processor Targets Register 94 "
hgroup.long 0x97C++0x03
hide.long 0x00 "GICD_ITARGETSR95 ,Interrupt Processor Targets Register 95 "
hgroup.long 0x980++0x03
hide.long 0x00 "GICD_ITARGETSR96 ,Interrupt Processor Targets Register 96 "
hgroup.long 0x984++0x03
hide.long 0x00 "GICD_ITARGETSR97 ,Interrupt Processor Targets Register 97 "
hgroup.long 0x988++0x03
hide.long 0x00 "GICD_ITARGETSR98 ,Interrupt Processor Targets Register 98 "
hgroup.long 0x98C++0x03
hide.long 0x00 "GICD_ITARGETSR99 ,Interrupt Processor Targets Register 99 "
hgroup.long 0x990++0x03
hide.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
hgroup.long 0x994++0x03
hide.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
hgroup.long 0x998++0x03
hide.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
hgroup.long 0x99C++0x03
hide.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
hgroup.long 0x9A0++0x03
hide.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
hgroup.long 0x9A4++0x03
hide.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
hgroup.long 0x9A8++0x03
hide.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
hgroup.long 0x9AC++0x03
hide.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
hgroup.long 0x9B0++0x03
hide.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
hgroup.long 0x9B4++0x03
hide.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
hgroup.long 0x9B8++0x03
hide.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
hgroup.long 0x9BC++0x03
hide.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
hgroup.long 0x9C0++0x03
hide.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
hgroup.long 0x9C4++0x03
hide.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
hgroup.long 0x9C8++0x03
hide.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
hgroup.long 0x9CC++0x03
hide.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
hgroup.long 0x9D0++0x03
hide.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
hgroup.long 0x9D4++0x03
hide.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
hgroup.long 0x9D8++0x03
hide.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
hgroup.long 0x9DC++0x03
hide.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
hgroup.long 0x9E0++0x03
hide.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
hgroup.long 0x9E4++0x03
hide.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
hgroup.long 0x9E8++0x03
hide.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
hgroup.long 0x9EC++0x03
hide.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
hgroup.long 0x9F0++0x03
hide.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
hgroup.long 0x9F4++0x03
hide.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
hgroup.long 0x9F8++0x03
hide.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
hgroup.long 0x9FC++0x03
hide.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
hgroup.long 0xA00++0x03
hide.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
hgroup.long 0xA04++0x03
hide.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
hgroup.long 0xA08++0x03
hide.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
hgroup.long 0xA0C++0x03
hide.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
hgroup.long 0xA10++0x03
hide.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
hgroup.long 0xA14++0x03
hide.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
hgroup.long 0xA18++0x03
hide.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
hgroup.long 0xA1C++0x03
hide.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
hgroup.long 0xA20++0x03
hide.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
hgroup.long 0xA24++0x03
hide.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
hgroup.long 0xA28++0x03
hide.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
hgroup.long 0xA2C++0x03
hide.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
hgroup.long 0xA30++0x03
hide.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
hgroup.long 0xA34++0x03
hide.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
hgroup.long 0xA38++0x03
hide.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
hgroup.long 0xA3C++0x03
hide.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
hgroup.long 0xA40++0x03
hide.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
hgroup.long 0xA44++0x03
hide.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
hgroup.long 0xA48++0x03
hide.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
hgroup.long 0xA4C++0x03
hide.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
hgroup.long 0xA50++0x03
hide.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
hgroup.long 0xA54++0x03
hide.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
hgroup.long 0xA58++0x03
hide.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
hgroup.long 0xA5C++0x03
hide.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
hgroup.long 0xA60++0x03
hide.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
hgroup.long 0xA64++0x03
hide.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
hgroup.long 0xA68++0x03
hide.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
hgroup.long 0xA6C++0x03
hide.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
hgroup.long 0xA70++0x03
hide.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
hgroup.long 0xA74++0x03
hide.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
hgroup.long 0xA78++0x03
hide.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
hgroup.long 0xA7C++0x03
hide.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
hgroup.long 0xA80++0x03
hide.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
hgroup.long 0xA84++0x03
hide.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
hgroup.long 0xA88++0x03
hide.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
hgroup.long 0xA8C++0x03
hide.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
hgroup.long 0xA90++0x03
hide.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
hgroup.long 0xA94++0x03
hide.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
hgroup.long 0xA98++0x03
hide.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
hgroup.long 0xA9C++0x03
hide.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
hgroup.long 0xAA0++0x03
hide.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
hgroup.long 0xAA4++0x03
hide.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
hgroup.long 0xAA8++0x03
hide.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
hgroup.long 0xAAC++0x03
hide.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
hgroup.long 0xAB0++0x03
hide.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
hgroup.long 0xAB4++0x03
hide.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
hgroup.long 0xAB8++0x03
hide.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
hgroup.long 0xABC++0x03
hide.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
hgroup.long 0xAC0++0x03
hide.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
hgroup.long 0xAC4++0x03
hide.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
hgroup.long 0xAC8++0x03
hide.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
hgroup.long 0xACC++0x03
hide.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
hgroup.long 0xAD0++0x03
hide.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
hgroup.long 0xAD4++0x03
hide.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
hgroup.long 0xAD8++0x03
hide.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
hgroup.long 0xADC++0x03
hide.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
hgroup.long 0xAE0++0x03
hide.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
hgroup.long 0xAE4++0x03
hide.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
hgroup.long 0xAE8++0x03
hide.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
hgroup.long 0xAEC++0x03
hide.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
hgroup.long 0xAF0++0x03
hide.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
hgroup.long 0xAF4++0x03
hide.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
hgroup.long 0xAF8++0x03
hide.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
hgroup.long 0xAFC++0x03
hide.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
hgroup.long 0xB00++0x03
hide.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
hgroup.long 0xB04++0x03
hide.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
hgroup.long 0xB08++0x03
hide.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
hgroup.long 0xB0C++0x03
hide.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
hgroup.long 0xB10++0x03
hide.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
hgroup.long 0xB14++0x03
hide.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
hgroup.long 0xB18++0x03
hide.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
hgroup.long 0xB1C++0x03
hide.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
hgroup.long 0xB20++0x03
hide.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
hgroup.long 0xB24++0x03
hide.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
hgroup.long 0xB28++0x03
hide.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
hgroup.long 0xB2C++0x03
hide.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
hgroup.long 0xB30++0x03
hide.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
hgroup.long 0xB34++0x03
hide.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
hgroup.long 0xB38++0x03
hide.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
hgroup.long 0xB3C++0x03
hide.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
hgroup.long 0xB40++0x03
hide.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
hgroup.long 0xB44++0x03
hide.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
hgroup.long 0xB48++0x03
hide.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
hgroup.long 0xB4C++0x03
hide.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
hgroup.long 0xB50++0x03
hide.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
hgroup.long 0xB54++0x03
hide.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
hgroup.long 0xB58++0x03
hide.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
hgroup.long 0xB5C++0x03
hide.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
hgroup.long 0xB60++0x03
hide.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
hgroup.long 0xB64++0x03
hide.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
hgroup.long 0xB68++0x03
hide.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
hgroup.long 0xB6C++0x03
hide.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
hgroup.long 0xB70++0x03
hide.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
hgroup.long 0xB74++0x03
hide.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
hgroup.long 0xB78++0x03
hide.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
hgroup.long 0xB7C++0x03
hide.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
hgroup.long 0xB80++0x03
hide.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
hgroup.long 0xB84++0x03
hide.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
hgroup.long 0xB88++0x03
hide.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
hgroup.long 0xB8C++0x03
hide.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
hgroup.long 0xB90++0x03
hide.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
hgroup.long 0xB94++0x03
hide.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
hgroup.long 0xB98++0x03
hide.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
hgroup.long 0xB9C++0x03
hide.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
hgroup.long 0xBA0++0x03
hide.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
hgroup.long 0xBA4++0x03
hide.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
hgroup.long 0xBA8++0x03
hide.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
hgroup.long 0xBAC++0x03
hide.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
hgroup.long 0xBB0++0x03
hide.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
hgroup.long 0xBB4++0x03
hide.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
hgroup.long 0xBB8++0x03
hide.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
hgroup.long 0xBBC++0x03
hide.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
hgroup.long 0xBC0++0x03
hide.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
hgroup.long 0xBC4++0x03
hide.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
hgroup.long 0xBC8++0x03
hide.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
hgroup.long 0xBCC++0x03
hide.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
hgroup.long 0xBD0++0x03
hide.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
hgroup.long 0xBD4++0x03
hide.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
hgroup.long 0xBD8++0x03
hide.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
hgroup.long 0xBDC++0x03
hide.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
endif
tree.end
width 14.
tree "Configuration Registers"
rgroup.long 0xC00++0x03
line.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SGI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SGI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SGI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SGI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SGI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SGI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SGI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SGI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SGI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SGI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SGI)" "Level,Edge"
group.long 0xC04++0x03
line.long 0x00 "GICD_ICFGR1,Interrupt Configuration Register"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (PPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (PPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (PPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (PPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (PPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (PPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (PPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (PPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (PPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (PPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (PPI)" "Level,Edge"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1)
group.long 0xC08++0x03
line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC0C++0x03
line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC08++0x03
hide.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
hgroup.long 0xC0C++0x03
hide.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x2)
group.long 0xC10++0x03
line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC14++0x03
line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC10++0x03
hide.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
hgroup.long 0xC14++0x03
hide.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x3)
group.long 0xC18++0x03
line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC1C++0x03
line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC18++0x03
hide.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
hgroup.long 0xC1C++0x03
hide.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x4)
group.long 0xC20++0x03
line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC24++0x03
line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC20++0x03
hide.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
hgroup.long 0xC24++0x03
hide.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x5)
group.long 0xC28++0x03
line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC2C++0x03
line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC28++0x03
hide.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
hgroup.long 0xC2C++0x03
hide.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x6)
group.long 0xC30++0x03
line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC34++0x03
line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC30++0x03
hide.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
hgroup.long 0xC34++0x03
hide.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x7)
group.long 0xC38++0x03
line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC3C++0x03
line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC38++0x03
hide.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
hgroup.long 0xC3C++0x03
hide.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x8)
group.long 0xC40++0x03
line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC44++0x03
line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC40++0x03
hide.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
hgroup.long 0xC44++0x03
hide.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x9)
group.long 0xC48++0x03
line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC4C++0x03
line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC48++0x03
hide.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
hgroup.long 0xC4C++0x03
hide.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xA)
group.long 0xC50++0x03
line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC54++0x03
line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC50++0x03
hide.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
hgroup.long 0xC54++0x03
hide.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xB)
group.long 0xC58++0x03
line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC5C++0x03
line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC58++0x03
hide.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
hgroup.long 0xC5C++0x03
hide.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xC)
group.long 0xC60++0x03
line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC64++0x03
line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC60++0x03
hide.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
hgroup.long 0xC64++0x03
hide.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xD)
group.long 0xC68++0x03
line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC6C++0x03
line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC68++0x03
hide.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
hgroup.long 0xC6C++0x03
hide.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xE)
group.long 0xC70++0x03
line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC74++0x03
line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC70++0x03
hide.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
hgroup.long 0xC74++0x03
hide.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xF)
group.long 0xC78++0x03
line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC7C++0x03
line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC78++0x03
hide.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
hgroup.long 0xC7C++0x03
hide.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0xC80++0x03
line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC84++0x03
line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC80++0x03
hide.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
hgroup.long 0xC84++0x03
hide.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0xC88++0x03
line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC8C++0x03
line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC88++0x03
hide.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
hgroup.long 0xC8C++0x03
hide.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0xC90++0x03
line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC94++0x03
line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC90++0x03
hide.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
hgroup.long 0xC94++0x03
hide.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0xC98++0x03
line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC9C++0x03
line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC98++0x03
hide.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
hgroup.long 0xC9C++0x03
hide.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0xCA0++0x03
line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCA4++0x03
line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCA0++0x03
hide.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
hgroup.long 0xCA4++0x03
hide.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0xCA8++0x03
line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCAC++0x03
line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCA8++0x03
hide.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
hgroup.long 0xCAC++0x03
hide.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0xCB0++0x03
line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCB4++0x03
line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCB0++0x03
hide.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
hgroup.long 0xCB4++0x03
hide.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0xCB8++0x03
line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCBC++0x03
line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCB8++0x03
hide.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
hgroup.long 0xCBC++0x03
hide.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0xCC0++0x03
line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCC4++0x03
line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCC0++0x03
hide.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
hgroup.long 0xCC4++0x03
hide.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0xCC8++0x03
line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCCC++0x03
line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCC8++0x03
hide.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
hgroup.long 0xCCC++0x03
hide.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0xCD0++0x03
line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCD4++0x03
line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCD0++0x03
hide.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
hgroup.long 0xCD4++0x03
hide.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0xCD8++0x03
line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCDC++0x03
line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCD8++0x03
hide.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
hgroup.long 0xCDC++0x03
hide.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0xCE0++0x03
line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCE4++0x03
line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCE0++0x03
hide.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
hgroup.long 0xCE4++0x03
hide.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0xCE8++0x03
line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCEC++0x03
line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCE8++0x03
hide.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
hgroup.long 0xCEC++0x03
hide.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0xCF0++0x03
line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCF4++0x03
line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCF0++0x03
hide.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
hgroup.long 0xCF4++0x03
hide.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
endif
tree.end
width 17.
tree "Interrupt Group Modifier Registers"
hgroup.long 0x0D00++0x03
hide.long 0x0 "GICD_IGRPMODR0,Interrupt Group Modifier Register 0"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D00))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01))
group.long 0x0D04++0x03
line.long 0x0 "GICD_IGRPMODR1,Interrupt Group Modifier Register 1"
bitfld.long 0x00 31. " GMB63  ,Group Modifier Bit 63" "0,1"
bitfld.long 0x00 30. "  GMB62  ,Group Modifier Bit 62" "0,1"
bitfld.long 0x00 29. "  GMB61  ,Group Modifier Bit 61" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB60  ,Group Modifier Bit 60" "0,1"
bitfld.long 0x00 27. "  GMB59  ,Group Modifier Bit 59" "0,1"
bitfld.long 0x00 26. "  GMB58  ,Group Modifier Bit 58" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB57  ,Group Modifier Bit 57" "0,1"
bitfld.long 0x00 24. "  GMB56  ,Group Modifier Bit 56" "0,1"
bitfld.long 0x00 23. "  GMB55  ,Group Modifier Bit 55" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB54  ,Group Modifier Bit 54" "0,1"
bitfld.long 0x00 21. "  GMB53  ,Group Modifier Bit 53" "0,1"
bitfld.long 0x00 20. "  GMB52  ,Group Modifier Bit 52" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB51  ,Group Modifier Bit 51" "0,1"
bitfld.long 0x00 18. "  GMB50  ,Group Modifier Bit 50" "0,1"
bitfld.long 0x00 17. "  GMB49  ,Group Modifier Bit 49" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB48  ,Group Modifier Bit 48" "0,1"
bitfld.long 0x00 15. "  GMB47  ,Group Modifier Bit 47" "0,1"
bitfld.long 0x00 14. "  GMB46  ,Group Modifier Bit 46" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB45  ,Group Modifier Bit 45" "0,1"
bitfld.long 0x00 12. "  GMB44  ,Group Modifier Bit 44" "0,1"
bitfld.long 0x00 11. "  GMB43  ,Group Modifier Bit 43" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB42  ,Group Modifier Bit 42" "0,1"
bitfld.long 0x00 9. "  GMB41  ,Group Modifier Bit 41" "0,1"
bitfld.long 0x00 8. "  GMB40  ,Group Modifier Bit 40" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB39  ,Group Modifier Bit 39" "0,1"
bitfld.long 0x00 6. "  GMB38  ,Group Modifier Bit 38" "0,1"
bitfld.long 0x00 5. "  GMB37  ,Group Modifier Bit 37" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB36  ,Group Modifier Bit 36" "0,1"
bitfld.long 0x00 3. "  GMB35  ,Group Modifier Bit 35" "0,1"
bitfld.long 0x00 2. "  GMB34  ,Group Modifier Bit 34" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB33  ,Group Modifier Bit 33" "0,1"
bitfld.long 0x00 0. "  GMB32  ,Group Modifier Bit 32" "0,1"
else
hgroup.long 0x0D04++0x03
hide.long 0x0 "GICD_IGRPMODR1,Interrupt Group Modifier Register 1"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D08))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02))
group.long 0x0D08++0x03
line.long 0x0 "GICD_IGRPMODR2,Interrupt Group Modifier Register 2"
bitfld.long 0x00 31. " GMB95  ,Group Modifier Bit 95" "0,1"
bitfld.long 0x00 30. "  GMB94  ,Group Modifier Bit 94" "0,1"
bitfld.long 0x00 29. "  GMB93  ,Group Modifier Bit 93" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB92  ,Group Modifier Bit 92" "0,1"
bitfld.long 0x00 27. "  GMB91  ,Group Modifier Bit 91" "0,1"
bitfld.long 0x00 26. "  GMB90  ,Group Modifier Bit 90" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB89  ,Group Modifier Bit 89" "0,1"
bitfld.long 0x00 24. "  GMB88  ,Group Modifier Bit 88" "0,1"
bitfld.long 0x00 23. "  GMB87  ,Group Modifier Bit 87" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB86  ,Group Modifier Bit 86" "0,1"
bitfld.long 0x00 21. "  GMB85  ,Group Modifier Bit 85" "0,1"
bitfld.long 0x00 20. "  GMB84  ,Group Modifier Bit 84" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB83  ,Group Modifier Bit 83" "0,1"
bitfld.long 0x00 18. "  GMB82  ,Group Modifier Bit 82" "0,1"
bitfld.long 0x00 17. "  GMB81  ,Group Modifier Bit 81" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB80  ,Group Modifier Bit 80" "0,1"
bitfld.long 0x00 15. "  GMB79  ,Group Modifier Bit 79" "0,1"
bitfld.long 0x00 14. "  GMB78  ,Group Modifier Bit 78" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB77  ,Group Modifier Bit 77" "0,1"
bitfld.long 0x00 12. "  GMB76  ,Group Modifier Bit 76" "0,1"
bitfld.long 0x00 11. "  GMB75  ,Group Modifier Bit 75" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB74  ,Group Modifier Bit 74" "0,1"
bitfld.long 0x00 9. "  GMB73  ,Group Modifier Bit 73" "0,1"
bitfld.long 0x00 8. "  GMB72  ,Group Modifier Bit 72" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB71  ,Group Modifier Bit 71" "0,1"
bitfld.long 0x00 6. "  GMB70  ,Group Modifier Bit 70" "0,1"
bitfld.long 0x00 5. "  GMB69  ,Group Modifier Bit 69" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB68  ,Group Modifier Bit 68" "0,1"
bitfld.long 0x00 3. "  GMB67  ,Group Modifier Bit 67" "0,1"
bitfld.long 0x00 2. "  GMB66  ,Group Modifier Bit 66" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB65  ,Group Modifier Bit 65" "0,1"
bitfld.long 0x00 0. "  GMB64  ,Group Modifier Bit 64" "0,1"
else
hgroup.long 0x0D08++0x03
hide.long 0x0 "GICD_IGRPMODR2,Interrupt Group Modifier Register 2"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D0C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03))
group.long 0x0D0C++0x03
line.long 0x0 "GICD_IGRPMODR3,Interrupt Group Modifier Register 3"
bitfld.long 0x00 31. " GMB127 ,Group Modifier Bit 127" "0,1"
bitfld.long 0x00 30. "  GMB126 ,Group Modifier Bit 126" "0,1"
bitfld.long 0x00 29. "  GMB125 ,Group Modifier Bit 125" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB124 ,Group Modifier Bit 124" "0,1"
bitfld.long 0x00 27. "  GMB123 ,Group Modifier Bit 123" "0,1"
bitfld.long 0x00 26. "  GMB122 ,Group Modifier Bit 122" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB121 ,Group Modifier Bit 121" "0,1"
bitfld.long 0x00 24. "  GMB120 ,Group Modifier Bit 120" "0,1"
bitfld.long 0x00 23. "  GMB119 ,Group Modifier Bit 119" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB118 ,Group Modifier Bit 118" "0,1"
bitfld.long 0x00 21. "  GMB117 ,Group Modifier Bit 117" "0,1"
bitfld.long 0x00 20. "  GMB116 ,Group Modifier Bit 116" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB115 ,Group Modifier Bit 115" "0,1"
bitfld.long 0x00 18. "  GMB114 ,Group Modifier Bit 114" "0,1"
bitfld.long 0x00 17. "  GMB113 ,Group Modifier Bit 113" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB112 ,Group Modifier Bit 112" "0,1"
bitfld.long 0x00 15. "  GMB111 ,Group Modifier Bit 111" "0,1"
bitfld.long 0x00 14. "  GMB110 ,Group Modifier Bit 110" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB109 ,Group Modifier Bit 109" "0,1"
bitfld.long 0x00 12. "  GMB108 ,Group Modifier Bit 108" "0,1"
bitfld.long 0x00 11. "  GMB107 ,Group Modifier Bit 107" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB106 ,Group Modifier Bit 106" "0,1"
bitfld.long 0x00 9. "  GMB105 ,Group Modifier Bit 105" "0,1"
bitfld.long 0x00 8. "  GMB104 ,Group Modifier Bit 104" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB103 ,Group Modifier Bit 103" "0,1"
bitfld.long 0x00 6. "  GMB102 ,Group Modifier Bit 102" "0,1"
bitfld.long 0x00 5. "  GMB101 ,Group Modifier Bit 101" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB100 ,Group Modifier Bit 100" "0,1"
bitfld.long 0x00 3. "  GMB99  ,Group Modifier Bit 99" "0,1"
bitfld.long 0x00 2. "  GMB98  ,Group Modifier Bit 98" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB97  ,Group Modifier Bit 97" "0,1"
bitfld.long 0x00 0. "  GMB96  ,Group Modifier Bit 96" "0,1"
else
hgroup.long 0x0D0C++0x03
hide.long 0x0 "GICD_IGRPMODR3,Interrupt Group Modifier Register 3"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D10))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04))
group.long 0x0D10++0x03
line.long 0x0 "GICD_IGRPMODR4,Interrupt Group Modifier Register 4"
bitfld.long 0x00 31. " GMB159 ,Group Modifier Bit 159" "0,1"
bitfld.long 0x00 30. "  GMB158 ,Group Modifier Bit 158" "0,1"
bitfld.long 0x00 29. "  GMB157 ,Group Modifier Bit 157" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB156 ,Group Modifier Bit 156" "0,1"
bitfld.long 0x00 27. "  GMB155 ,Group Modifier Bit 155" "0,1"
bitfld.long 0x00 26. "  GMB154 ,Group Modifier Bit 154" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB153 ,Group Modifier Bit 153" "0,1"
bitfld.long 0x00 24. "  GMB152 ,Group Modifier Bit 152" "0,1"
bitfld.long 0x00 23. "  GMB151 ,Group Modifier Bit 151" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB150 ,Group Modifier Bit 150" "0,1"
bitfld.long 0x00 21. "  GMB149 ,Group Modifier Bit 149" "0,1"
bitfld.long 0x00 20. "  GMB148 ,Group Modifier Bit 148" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB147 ,Group Modifier Bit 147" "0,1"
bitfld.long 0x00 18. "  GMB146 ,Group Modifier Bit 146" "0,1"
bitfld.long 0x00 17. "  GMB145 ,Group Modifier Bit 145" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB144 ,Group Modifier Bit 144" "0,1"
bitfld.long 0x00 15. "  GMB143 ,Group Modifier Bit 143" "0,1"
bitfld.long 0x00 14. "  GMB142 ,Group Modifier Bit 142" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB141 ,Group Modifier Bit 141" "0,1"
bitfld.long 0x00 12. "  GMB140 ,Group Modifier Bit 140" "0,1"
bitfld.long 0x00 11. "  GMB139 ,Group Modifier Bit 139" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB138 ,Group Modifier Bit 138" "0,1"
bitfld.long 0x00 9. "  GMB137 ,Group Modifier Bit 137" "0,1"
bitfld.long 0x00 8. "  GMB136 ,Group Modifier Bit 136" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB135 ,Group Modifier Bit 135" "0,1"
bitfld.long 0x00 6. "  GMB134 ,Group Modifier Bit 134" "0,1"
bitfld.long 0x00 5. "  GMB133 ,Group Modifier Bit 133" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB132 ,Group Modifier Bit 132" "0,1"
bitfld.long 0x00 3. "  GMB131 ,Group Modifier Bit 131" "0,1"
bitfld.long 0x00 2. "  GMB130 ,Group Modifier Bit 130" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB129 ,Group Modifier Bit 129" "0,1"
bitfld.long 0x00 0. "  GMB128 ,Group Modifier Bit 128" "0,1"
else
hgroup.long 0x0D10++0x03
hide.long 0x0 "GICD_IGRPMODR4,Interrupt Group Modifier Register 4"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D14))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05))
group.long 0x0D14++0x03
line.long 0x0 "GICD_IGRPMODR5,Interrupt Group Modifier Register 5"
bitfld.long 0x00 31. " GMB191 ,Group Modifier Bit 191" "0,1"
bitfld.long 0x00 30. "  GMB190 ,Group Modifier Bit 190" "0,1"
bitfld.long 0x00 29. "  GMB189 ,Group Modifier Bit 189" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB188 ,Group Modifier Bit 188" "0,1"
bitfld.long 0x00 27. "  GMB187 ,Group Modifier Bit 187" "0,1"
bitfld.long 0x00 26. "  GMB186 ,Group Modifier Bit 186" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB185 ,Group Modifier Bit 185" "0,1"
bitfld.long 0x00 24. "  GMB184 ,Group Modifier Bit 184" "0,1"
bitfld.long 0x00 23. "  GMB183 ,Group Modifier Bit 183" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB182 ,Group Modifier Bit 182" "0,1"
bitfld.long 0x00 21. "  GMB181 ,Group Modifier Bit 181" "0,1"
bitfld.long 0x00 20. "  GMB180 ,Group Modifier Bit 180" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB179 ,Group Modifier Bit 179" "0,1"
bitfld.long 0x00 18. "  GMB178 ,Group Modifier Bit 178" "0,1"
bitfld.long 0x00 17. "  GMB177 ,Group Modifier Bit 177" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB176 ,Group Modifier Bit 176" "0,1"
bitfld.long 0x00 15. "  GMB175 ,Group Modifier Bit 175" "0,1"
bitfld.long 0x00 14. "  GMB174 ,Group Modifier Bit 174" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB173 ,Group Modifier Bit 173" "0,1"
bitfld.long 0x00 12. "  GMB172 ,Group Modifier Bit 172" "0,1"
bitfld.long 0x00 11. "  GMB171 ,Group Modifier Bit 171" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB170 ,Group Modifier Bit 170" "0,1"
bitfld.long 0x00 9. "  GMB169 ,Group Modifier Bit 169" "0,1"
bitfld.long 0x00 8. "  GMB168 ,Group Modifier Bit 168" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB167 ,Group Modifier Bit 167" "0,1"
bitfld.long 0x00 6. "  GMB166 ,Group Modifier Bit 166" "0,1"
bitfld.long 0x00 5. "  GMB165 ,Group Modifier Bit 165" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB164 ,Group Modifier Bit 164" "0,1"
bitfld.long 0x00 3. "  GMB163 ,Group Modifier Bit 163" "0,1"
bitfld.long 0x00 2. "  GMB162 ,Group Modifier Bit 162" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB161 ,Group Modifier Bit 161" "0,1"
bitfld.long 0x00 0. "  GMB160 ,Group Modifier Bit 160" "0,1"
else
hgroup.long 0x0D14++0x03
hide.long 0x0 "GICD_IGRPMODR5,Interrupt Group Modifier Register 5"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D18))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06))
group.long 0x0D18++0x03
line.long 0x0 "GICD_IGRPMODR6,Interrupt Group Modifier Register 6"
bitfld.long 0x00 31. " GMB223 ,Group Modifier Bit 223" "0,1"
bitfld.long 0x00 30. "  GMB222 ,Group Modifier Bit 222" "0,1"
bitfld.long 0x00 29. "  GMB221 ,Group Modifier Bit 221" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB220 ,Group Modifier Bit 220" "0,1"
bitfld.long 0x00 27. "  GMB219 ,Group Modifier Bit 219" "0,1"
bitfld.long 0x00 26. "  GMB218 ,Group Modifier Bit 218" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB217 ,Group Modifier Bit 217" "0,1"
bitfld.long 0x00 24. "  GMB216 ,Group Modifier Bit 216" "0,1"
bitfld.long 0x00 23. "  GMB215 ,Group Modifier Bit 215" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB214 ,Group Modifier Bit 214" "0,1"
bitfld.long 0x00 21. "  GMB213 ,Group Modifier Bit 213" "0,1"
bitfld.long 0x00 20. "  GMB212 ,Group Modifier Bit 212" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB211 ,Group Modifier Bit 211" "0,1"
bitfld.long 0x00 18. "  GMB210 ,Group Modifier Bit 210" "0,1"
bitfld.long 0x00 17. "  GMB209 ,Group Modifier Bit 209" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB208 ,Group Modifier Bit 208" "0,1"
bitfld.long 0x00 15. "  GMB207 ,Group Modifier Bit 207" "0,1"
bitfld.long 0x00 14. "  GMB206 ,Group Modifier Bit 206" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB205 ,Group Modifier Bit 205" "0,1"
bitfld.long 0x00 12. "  GMB204 ,Group Modifier Bit 204" "0,1"
bitfld.long 0x00 11. "  GMB203 ,Group Modifier Bit 203" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB202 ,Group Modifier Bit 202" "0,1"
bitfld.long 0x00 9. "  GMB201 ,Group Modifier Bit 201" "0,1"
bitfld.long 0x00 8. "  GMB200 ,Group Modifier Bit 200" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB199 ,Group Modifier Bit 199" "0,1"
bitfld.long 0x00 6. "  GMB198 ,Group Modifier Bit 198" "0,1"
bitfld.long 0x00 5. "  GMB197 ,Group Modifier Bit 197" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB196 ,Group Modifier Bit 196" "0,1"
bitfld.long 0x00 3. "  GMB195 ,Group Modifier Bit 195" "0,1"
bitfld.long 0x00 2. "  GMB194 ,Group Modifier Bit 194" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB193 ,Group Modifier Bit 193" "0,1"
bitfld.long 0x00 0. "  GMB192 ,Group Modifier Bit 192" "0,1"
else
hgroup.long 0x0D18++0x03
hide.long 0x0 "GICD_IGRPMODR6,Interrupt Group Modifier Register 6"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D1C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07))
group.long 0x0D1C++0x03
line.long 0x0 "GICD_IGRPMODR7,Interrupt Group Modifier Register 7"
bitfld.long 0x00 31. " GMB255 ,Group Modifier Bit 255" "0,1"
bitfld.long 0x00 30. "  GMB254 ,Group Modifier Bit 254" "0,1"
bitfld.long 0x00 29. "  GMB253 ,Group Modifier Bit 253" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB252 ,Group Modifier Bit 252" "0,1"
bitfld.long 0x00 27. "  GMB251 ,Group Modifier Bit 251" "0,1"
bitfld.long 0x00 26. "  GMB250 ,Group Modifier Bit 250" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB249 ,Group Modifier Bit 249" "0,1"
bitfld.long 0x00 24. "  GMB248 ,Group Modifier Bit 248" "0,1"
bitfld.long 0x00 23. "  GMB247 ,Group Modifier Bit 247" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB246 ,Group Modifier Bit 246" "0,1"
bitfld.long 0x00 21. "  GMB245 ,Group Modifier Bit 245" "0,1"
bitfld.long 0x00 20. "  GMB244 ,Group Modifier Bit 244" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB243 ,Group Modifier Bit 243" "0,1"
bitfld.long 0x00 18. "  GMB242 ,Group Modifier Bit 242" "0,1"
bitfld.long 0x00 17. "  GMB241 ,Group Modifier Bit 241" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB240 ,Group Modifier Bit 240" "0,1"
bitfld.long 0x00 15. "  GMB239 ,Group Modifier Bit 239" "0,1"
bitfld.long 0x00 14. "  GMB238 ,Group Modifier Bit 238" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB237 ,Group Modifier Bit 237" "0,1"
bitfld.long 0x00 12. "  GMB236 ,Group Modifier Bit 236" "0,1"
bitfld.long 0x00 11. "  GMB235 ,Group Modifier Bit 235" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB234 ,Group Modifier Bit 234" "0,1"
bitfld.long 0x00 9. "  GMB233 ,Group Modifier Bit 233" "0,1"
bitfld.long 0x00 8. "  GMB232 ,Group Modifier Bit 232" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB231 ,Group Modifier Bit 231" "0,1"
bitfld.long 0x00 6. "  GMB230 ,Group Modifier Bit 230" "0,1"
bitfld.long 0x00 5. "  GMB229 ,Group Modifier Bit 229" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB228 ,Group Modifier Bit 228" "0,1"
bitfld.long 0x00 3. "  GMB227 ,Group Modifier Bit 227" "0,1"
bitfld.long 0x00 2. "  GMB226 ,Group Modifier Bit 226" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB225 ,Group Modifier Bit 225" "0,1"
bitfld.long 0x00 0. "  GMB224 ,Group Modifier Bit 224" "0,1"
else
hgroup.long 0x0D1C++0x03
hide.long 0x0 "GICD_IGRPMODR7,Interrupt Group Modifier Register 7"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D20))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08))
group.long 0x0D20++0x03
line.long 0x0 "GICD_IGRPMODR8,Interrupt Group Modifier Register 8"
bitfld.long 0x00 31. " GMB287 ,Group Modifier Bit 287" "0,1"
bitfld.long 0x00 30. "  GMB286 ,Group Modifier Bit 286" "0,1"
bitfld.long 0x00 29. "  GMB285 ,Group Modifier Bit 285" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB284 ,Group Modifier Bit 284" "0,1"
bitfld.long 0x00 27. "  GMB283 ,Group Modifier Bit 283" "0,1"
bitfld.long 0x00 26. "  GMB282 ,Group Modifier Bit 282" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB281 ,Group Modifier Bit 281" "0,1"
bitfld.long 0x00 24. "  GMB280 ,Group Modifier Bit 280" "0,1"
bitfld.long 0x00 23. "  GMB279 ,Group Modifier Bit 279" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB278 ,Group Modifier Bit 278" "0,1"
bitfld.long 0x00 21. "  GMB277 ,Group Modifier Bit 277" "0,1"
bitfld.long 0x00 20. "  GMB276 ,Group Modifier Bit 276" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB275 ,Group Modifier Bit 275" "0,1"
bitfld.long 0x00 18. "  GMB274 ,Group Modifier Bit 274" "0,1"
bitfld.long 0x00 17. "  GMB273 ,Group Modifier Bit 273" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB272 ,Group Modifier Bit 272" "0,1"
bitfld.long 0x00 15. "  GMB271 ,Group Modifier Bit 271" "0,1"
bitfld.long 0x00 14. "  GMB270 ,Group Modifier Bit 270" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB269 ,Group Modifier Bit 269" "0,1"
bitfld.long 0x00 12. "  GMB268 ,Group Modifier Bit 268" "0,1"
bitfld.long 0x00 11. "  GMB267 ,Group Modifier Bit 267" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB266 ,Group Modifier Bit 266" "0,1"
bitfld.long 0x00 9. "  GMB265 ,Group Modifier Bit 265" "0,1"
bitfld.long 0x00 8. "  GMB264 ,Group Modifier Bit 264" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB263 ,Group Modifier Bit 263" "0,1"
bitfld.long 0x00 6. "  GMB262 ,Group Modifier Bit 262" "0,1"
bitfld.long 0x00 5. "  GMB261 ,Group Modifier Bit 261" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB260 ,Group Modifier Bit 260" "0,1"
bitfld.long 0x00 3. "  GMB259 ,Group Modifier Bit 259" "0,1"
bitfld.long 0x00 2. "  GMB258 ,Group Modifier Bit 258" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB257 ,Group Modifier Bit 257" "0,1"
bitfld.long 0x00 0. "  GMB256 ,Group Modifier Bit 256" "0,1"
else
hgroup.long 0x0D20++0x03
hide.long 0x0 "GICD_IGRPMODR8,Interrupt Group Modifier Register 8"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D24))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09))
group.long 0x0D24++0x03
line.long 0x0 "GICD_IGRPMODR9,Interrupt Group Modifier Register 9"
bitfld.long 0x00 31. " GMB319 ,Group Modifier Bit 319" "0,1"
bitfld.long 0x00 30. "  GMB318 ,Group Modifier Bit 318" "0,1"
bitfld.long 0x00 29. "  GMB317 ,Group Modifier Bit 317" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB316 ,Group Modifier Bit 316" "0,1"
bitfld.long 0x00 27. "  GMB315 ,Group Modifier Bit 315" "0,1"
bitfld.long 0x00 26. "  GMB314 ,Group Modifier Bit 314" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB313 ,Group Modifier Bit 313" "0,1"
bitfld.long 0x00 24. "  GMB312 ,Group Modifier Bit 312" "0,1"
bitfld.long 0x00 23. "  GMB311 ,Group Modifier Bit 311" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB310 ,Group Modifier Bit 310" "0,1"
bitfld.long 0x00 21. "  GMB309 ,Group Modifier Bit 309" "0,1"
bitfld.long 0x00 20. "  GMB308 ,Group Modifier Bit 308" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB307 ,Group Modifier Bit 307" "0,1"
bitfld.long 0x00 18. "  GMB306 ,Group Modifier Bit 306" "0,1"
bitfld.long 0x00 17. "  GMB305 ,Group Modifier Bit 305" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB304 ,Group Modifier Bit 304" "0,1"
bitfld.long 0x00 15. "  GMB303 ,Group Modifier Bit 303" "0,1"
bitfld.long 0x00 14. "  GMB302 ,Group Modifier Bit 302" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB301 ,Group Modifier Bit 301" "0,1"
bitfld.long 0x00 12. "  GMB300 ,Group Modifier Bit 300" "0,1"
bitfld.long 0x00 11. "  GMB299 ,Group Modifier Bit 299" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB298 ,Group Modifier Bit 298" "0,1"
bitfld.long 0x00 9. "  GMB297 ,Group Modifier Bit 297" "0,1"
bitfld.long 0x00 8. "  GMB296 ,Group Modifier Bit 296" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB295 ,Group Modifier Bit 295" "0,1"
bitfld.long 0x00 6. "  GMB294 ,Group Modifier Bit 294" "0,1"
bitfld.long 0x00 5. "  GMB293 ,Group Modifier Bit 293" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB292 ,Group Modifier Bit 292" "0,1"
bitfld.long 0x00 3. "  GMB291 ,Group Modifier Bit 291" "0,1"
bitfld.long 0x00 2. "  GMB290 ,Group Modifier Bit 290" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB289 ,Group Modifier Bit 289" "0,1"
bitfld.long 0x00 0. "  GMB288 ,Group Modifier Bit 288" "0,1"
else
hgroup.long 0x0D24++0x03
hide.long 0x0 "GICD_IGRPMODR9,Interrupt Group Modifier Register 9"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D28))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A))
group.long 0x0D28++0x03
line.long 0x0 "GICD_IGRPMODR10,Interrupt Group Modifier Register 10"
bitfld.long 0x00 31. " GMB351 ,Group Modifier Bit 351" "0,1"
bitfld.long 0x00 30. "  GMB350 ,Group Modifier Bit 350" "0,1"
bitfld.long 0x00 29. "  GMB349 ,Group Modifier Bit 349" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB348 ,Group Modifier Bit 348" "0,1"
bitfld.long 0x00 27. "  GMB347 ,Group Modifier Bit 347" "0,1"
bitfld.long 0x00 26. "  GMB346 ,Group Modifier Bit 346" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB345 ,Group Modifier Bit 345" "0,1"
bitfld.long 0x00 24. "  GMB344 ,Group Modifier Bit 344" "0,1"
bitfld.long 0x00 23. "  GMB343 ,Group Modifier Bit 343" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB342 ,Group Modifier Bit 342" "0,1"
bitfld.long 0x00 21. "  GMB341 ,Group Modifier Bit 341" "0,1"
bitfld.long 0x00 20. "  GMB340 ,Group Modifier Bit 340" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB339 ,Group Modifier Bit 339" "0,1"
bitfld.long 0x00 18. "  GMB338 ,Group Modifier Bit 338" "0,1"
bitfld.long 0x00 17. "  GMB337 ,Group Modifier Bit 337" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB336 ,Group Modifier Bit 336" "0,1"
bitfld.long 0x00 15. "  GMB335 ,Group Modifier Bit 335" "0,1"
bitfld.long 0x00 14. "  GMB334 ,Group Modifier Bit 334" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB333 ,Group Modifier Bit 333" "0,1"
bitfld.long 0x00 12. "  GMB332 ,Group Modifier Bit 332" "0,1"
bitfld.long 0x00 11. "  GMB331 ,Group Modifier Bit 331" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB330 ,Group Modifier Bit 330" "0,1"
bitfld.long 0x00 9. "  GMB329 ,Group Modifier Bit 329" "0,1"
bitfld.long 0x00 8. "  GMB328 ,Group Modifier Bit 328" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB327 ,Group Modifier Bit 327" "0,1"
bitfld.long 0x00 6. "  GMB326 ,Group Modifier Bit 326" "0,1"
bitfld.long 0x00 5. "  GMB325 ,Group Modifier Bit 325" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB324 ,Group Modifier Bit 324" "0,1"
bitfld.long 0x00 3. "  GMB323 ,Group Modifier Bit 323" "0,1"
bitfld.long 0x00 2. "  GMB322 ,Group Modifier Bit 322" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB321 ,Group Modifier Bit 321" "0,1"
bitfld.long 0x00 0. "  GMB320 ,Group Modifier Bit 320" "0,1"
else
hgroup.long 0x0D28++0x03
hide.long 0x0 "GICD_IGRPMODR10,Interrupt Group Modifier Register 10"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D2C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B))
group.long 0x0D2C++0x03
line.long 0x0 "GICD_IGRPMODR11,Interrupt Group Modifier Register 11"
bitfld.long 0x00 31. " GMB383 ,Group Modifier Bit 383" "0,1"
bitfld.long 0x00 30. "  GMB382 ,Group Modifier Bit 382" "0,1"
bitfld.long 0x00 29. "  GMB381 ,Group Modifier Bit 381" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB380 ,Group Modifier Bit 380" "0,1"
bitfld.long 0x00 27. "  GMB379 ,Group Modifier Bit 379" "0,1"
bitfld.long 0x00 26. "  GMB378 ,Group Modifier Bit 378" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB377 ,Group Modifier Bit 377" "0,1"
bitfld.long 0x00 24. "  GMB376 ,Group Modifier Bit 376" "0,1"
bitfld.long 0x00 23. "  GMB375 ,Group Modifier Bit 375" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB374 ,Group Modifier Bit 374" "0,1"
bitfld.long 0x00 21. "  GMB373 ,Group Modifier Bit 373" "0,1"
bitfld.long 0x00 20. "  GMB372 ,Group Modifier Bit 372" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB371 ,Group Modifier Bit 371" "0,1"
bitfld.long 0x00 18. "  GMB370 ,Group Modifier Bit 370" "0,1"
bitfld.long 0x00 17. "  GMB369 ,Group Modifier Bit 369" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB368 ,Group Modifier Bit 368" "0,1"
bitfld.long 0x00 15. "  GMB367 ,Group Modifier Bit 367" "0,1"
bitfld.long 0x00 14. "  GMB366 ,Group Modifier Bit 366" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB365 ,Group Modifier Bit 365" "0,1"
bitfld.long 0x00 12. "  GMB364 ,Group Modifier Bit 364" "0,1"
bitfld.long 0x00 11. "  GMB363 ,Group Modifier Bit 363" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB362 ,Group Modifier Bit 362" "0,1"
bitfld.long 0x00 9. "  GMB361 ,Group Modifier Bit 361" "0,1"
bitfld.long 0x00 8. "  GMB360 ,Group Modifier Bit 360" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB359 ,Group Modifier Bit 359" "0,1"
bitfld.long 0x00 6. "  GMB358 ,Group Modifier Bit 358" "0,1"
bitfld.long 0x00 5. "  GMB357 ,Group Modifier Bit 357" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB356 ,Group Modifier Bit 356" "0,1"
bitfld.long 0x00 3. "  GMB355 ,Group Modifier Bit 355" "0,1"
bitfld.long 0x00 2. "  GMB354 ,Group Modifier Bit 354" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB353 ,Group Modifier Bit 353" "0,1"
bitfld.long 0x00 0. "  GMB352 ,Group Modifier Bit 352" "0,1"
else
hgroup.long 0x0D2C++0x03
hide.long 0x0 "GICD_IGRPMODR11,Interrupt Group Modifier Register 11"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D30))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C))
group.long 0x0D30++0x03
line.long 0x0 "GICD_IGRPMODR12,Interrupt Group Modifier Register 12"
bitfld.long 0x00 31. " GMB415 ,Group Modifier Bit 415" "0,1"
bitfld.long 0x00 30. "  GMB414 ,Group Modifier Bit 414" "0,1"
bitfld.long 0x00 29. "  GMB413 ,Group Modifier Bit 413" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB412 ,Group Modifier Bit 412" "0,1"
bitfld.long 0x00 27. "  GMB411 ,Group Modifier Bit 411" "0,1"
bitfld.long 0x00 26. "  GMB410 ,Group Modifier Bit 410" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB409 ,Group Modifier Bit 409" "0,1"
bitfld.long 0x00 24. "  GMB408 ,Group Modifier Bit 408" "0,1"
bitfld.long 0x00 23. "  GMB407 ,Group Modifier Bit 407" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB406 ,Group Modifier Bit 406" "0,1"
bitfld.long 0x00 21. "  GMB405 ,Group Modifier Bit 405" "0,1"
bitfld.long 0x00 20. "  GMB404 ,Group Modifier Bit 404" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB403 ,Group Modifier Bit 403" "0,1"
bitfld.long 0x00 18. "  GMB402 ,Group Modifier Bit 402" "0,1"
bitfld.long 0x00 17. "  GMB401 ,Group Modifier Bit 401" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB400 ,Group Modifier Bit 400" "0,1"
bitfld.long 0x00 15. "  GMB399 ,Group Modifier Bit 399" "0,1"
bitfld.long 0x00 14. "  GMB398 ,Group Modifier Bit 398" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB397 ,Group Modifier Bit 397" "0,1"
bitfld.long 0x00 12. "  GMB396 ,Group Modifier Bit 396" "0,1"
bitfld.long 0x00 11. "  GMB395 ,Group Modifier Bit 395" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB394 ,Group Modifier Bit 394" "0,1"
bitfld.long 0x00 9. "  GMB393 ,Group Modifier Bit 393" "0,1"
bitfld.long 0x00 8. "  GMB392 ,Group Modifier Bit 392" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB391 ,Group Modifier Bit 391" "0,1"
bitfld.long 0x00 6. "  GMB390 ,Group Modifier Bit 390" "0,1"
bitfld.long 0x00 5. "  GMB389 ,Group Modifier Bit 389" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB388 ,Group Modifier Bit 388" "0,1"
bitfld.long 0x00 3. "  GMB387 ,Group Modifier Bit 387" "0,1"
bitfld.long 0x00 2. "  GMB386 ,Group Modifier Bit 386" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB385 ,Group Modifier Bit 385" "0,1"
bitfld.long 0x00 0. "  GMB384 ,Group Modifier Bit 384" "0,1"
else
hgroup.long 0x0D30++0x03
hide.long 0x0 "GICD_IGRPMODR12,Interrupt Group Modifier Register 12"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D34))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D))
group.long 0x0D34++0x03
line.long 0x0 "GICD_IGRPMODR13,Interrupt Group Modifier Register 13"
bitfld.long 0x00 31. " GMB447 ,Group Modifier Bit 447" "0,1"
bitfld.long 0x00 30. "  GMB446 ,Group Modifier Bit 446" "0,1"
bitfld.long 0x00 29. "  GMB445 ,Group Modifier Bit 445" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB444 ,Group Modifier Bit 444" "0,1"
bitfld.long 0x00 27. "  GMB443 ,Group Modifier Bit 443" "0,1"
bitfld.long 0x00 26. "  GMB442 ,Group Modifier Bit 442" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB441 ,Group Modifier Bit 441" "0,1"
bitfld.long 0x00 24. "  GMB440 ,Group Modifier Bit 440" "0,1"
bitfld.long 0x00 23. "  GMB439 ,Group Modifier Bit 439" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB438 ,Group Modifier Bit 438" "0,1"
bitfld.long 0x00 21. "  GMB437 ,Group Modifier Bit 437" "0,1"
bitfld.long 0x00 20. "  GMB436 ,Group Modifier Bit 436" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB435 ,Group Modifier Bit 435" "0,1"
bitfld.long 0x00 18. "  GMB434 ,Group Modifier Bit 434" "0,1"
bitfld.long 0x00 17. "  GMB433 ,Group Modifier Bit 433" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB432 ,Group Modifier Bit 432" "0,1"
bitfld.long 0x00 15. "  GMB431 ,Group Modifier Bit 431" "0,1"
bitfld.long 0x00 14. "  GMB430 ,Group Modifier Bit 430" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB429 ,Group Modifier Bit 429" "0,1"
bitfld.long 0x00 12. "  GMB428 ,Group Modifier Bit 428" "0,1"
bitfld.long 0x00 11. "  GMB427 ,Group Modifier Bit 427" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB426 ,Group Modifier Bit 426" "0,1"
bitfld.long 0x00 9. "  GMB425 ,Group Modifier Bit 425" "0,1"
bitfld.long 0x00 8. "  GMB424 ,Group Modifier Bit 424" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB423 ,Group Modifier Bit 423" "0,1"
bitfld.long 0x00 6. "  GMB422 ,Group Modifier Bit 422" "0,1"
bitfld.long 0x00 5. "  GMB421 ,Group Modifier Bit 421" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB420 ,Group Modifier Bit 420" "0,1"
bitfld.long 0x00 3. "  GMB419 ,Group Modifier Bit 419" "0,1"
bitfld.long 0x00 2. "  GMB418 ,Group Modifier Bit 418" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB417 ,Group Modifier Bit 417" "0,1"
bitfld.long 0x00 0. "  GMB416 ,Group Modifier Bit 416" "0,1"
else
hgroup.long 0x0D34++0x03
hide.long 0x0 "GICD_IGRPMODR13,Interrupt Group Modifier Register 13"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D38))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E))
group.long 0x0D38++0x03
line.long 0x0 "GICD_IGRPMODR14,Interrupt Group Modifier Register 14"
bitfld.long 0x00 31. " GMB479 ,Group Modifier Bit 479" "0,1"
bitfld.long 0x00 30. "  GMB478 ,Group Modifier Bit 478" "0,1"
bitfld.long 0x00 29. "  GMB477 ,Group Modifier Bit 477" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB476 ,Group Modifier Bit 476" "0,1"
bitfld.long 0x00 27. "  GMB475 ,Group Modifier Bit 475" "0,1"
bitfld.long 0x00 26. "  GMB474 ,Group Modifier Bit 474" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB473 ,Group Modifier Bit 473" "0,1"
bitfld.long 0x00 24. "  GMB472 ,Group Modifier Bit 472" "0,1"
bitfld.long 0x00 23. "  GMB471 ,Group Modifier Bit 471" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB470 ,Group Modifier Bit 470" "0,1"
bitfld.long 0x00 21. "  GMB469 ,Group Modifier Bit 469" "0,1"
bitfld.long 0x00 20. "  GMB468 ,Group Modifier Bit 468" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB467 ,Group Modifier Bit 467" "0,1"
bitfld.long 0x00 18. "  GMB466 ,Group Modifier Bit 466" "0,1"
bitfld.long 0x00 17. "  GMB465 ,Group Modifier Bit 465" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB464 ,Group Modifier Bit 464" "0,1"
bitfld.long 0x00 15. "  GMB463 ,Group Modifier Bit 463" "0,1"
bitfld.long 0x00 14. "  GMB462 ,Group Modifier Bit 462" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB461 ,Group Modifier Bit 461" "0,1"
bitfld.long 0x00 12. "  GMB460 ,Group Modifier Bit 460" "0,1"
bitfld.long 0x00 11. "  GMB459 ,Group Modifier Bit 459" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB458 ,Group Modifier Bit 458" "0,1"
bitfld.long 0x00 9. "  GMB457 ,Group Modifier Bit 457" "0,1"
bitfld.long 0x00 8. "  GMB456 ,Group Modifier Bit 456" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB455 ,Group Modifier Bit 455" "0,1"
bitfld.long 0x00 6. "  GMB454 ,Group Modifier Bit 454" "0,1"
bitfld.long 0x00 5. "  GMB453 ,Group Modifier Bit 453" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB452 ,Group Modifier Bit 452" "0,1"
bitfld.long 0x00 3. "  GMB451 ,Group Modifier Bit 451" "0,1"
bitfld.long 0x00 2. "  GMB450 ,Group Modifier Bit 450" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB449 ,Group Modifier Bit 449" "0,1"
bitfld.long 0x00 0. "  GMB448 ,Group Modifier Bit 448" "0,1"
else
hgroup.long 0x0D38++0x03
hide.long 0x0 "GICD_IGRPMODR14,Interrupt Group Modifier Register 14"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D3C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F))
group.long 0x0D3C++0x03
line.long 0x0 "GICD_IGRPMODR15,Interrupt Group Modifier Register 15"
bitfld.long 0x00 31. " GMB511 ,Group Modifier Bit 511" "0,1"
bitfld.long 0x00 30. "  GMB510 ,Group Modifier Bit 510" "0,1"
bitfld.long 0x00 29. "  GMB509 ,Group Modifier Bit 509" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB508 ,Group Modifier Bit 508" "0,1"
bitfld.long 0x00 27. "  GMB507 ,Group Modifier Bit 507" "0,1"
bitfld.long 0x00 26. "  GMB506 ,Group Modifier Bit 506" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB505 ,Group Modifier Bit 505" "0,1"
bitfld.long 0x00 24. "  GMB504 ,Group Modifier Bit 504" "0,1"
bitfld.long 0x00 23. "  GMB503 ,Group Modifier Bit 503" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB502 ,Group Modifier Bit 502" "0,1"
bitfld.long 0x00 21. "  GMB501 ,Group Modifier Bit 501" "0,1"
bitfld.long 0x00 20. "  GMB500 ,Group Modifier Bit 500" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB499 ,Group Modifier Bit 499" "0,1"
bitfld.long 0x00 18. "  GMB498 ,Group Modifier Bit 498" "0,1"
bitfld.long 0x00 17. "  GMB497 ,Group Modifier Bit 497" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB496 ,Group Modifier Bit 496" "0,1"
bitfld.long 0x00 15. "  GMB495 ,Group Modifier Bit 495" "0,1"
bitfld.long 0x00 14. "  GMB494 ,Group Modifier Bit 494" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB493 ,Group Modifier Bit 493" "0,1"
bitfld.long 0x00 12. "  GMB492 ,Group Modifier Bit 492" "0,1"
bitfld.long 0x00 11. "  GMB491 ,Group Modifier Bit 491" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB490 ,Group Modifier Bit 490" "0,1"
bitfld.long 0x00 9. "  GMB489 ,Group Modifier Bit 489" "0,1"
bitfld.long 0x00 8. "  GMB488 ,Group Modifier Bit 488" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB487 ,Group Modifier Bit 487" "0,1"
bitfld.long 0x00 6. "  GMB486 ,Group Modifier Bit 486" "0,1"
bitfld.long 0x00 5. "  GMB485 ,Group Modifier Bit 485" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB484 ,Group Modifier Bit 484" "0,1"
bitfld.long 0x00 3. "  GMB483 ,Group Modifier Bit 483" "0,1"
bitfld.long 0x00 2. "  GMB482 ,Group Modifier Bit 482" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB481 ,Group Modifier Bit 481" "0,1"
bitfld.long 0x00 0. "  GMB480 ,Group Modifier Bit 480" "0,1"
else
hgroup.long 0x0D3C++0x03
hide.long 0x0 "GICD_IGRPMODR15,Interrupt Group Modifier Register 15"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D40))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10))
group.long 0x0D40++0x03
line.long 0x0 "GICD_IGRPMODR16,Interrupt Group Modifier Register 16"
bitfld.long 0x00 31. " GMB543 ,Group Modifier Bit 543" "0,1"
bitfld.long 0x00 30. "  GMB542 ,Group Modifier Bit 542" "0,1"
bitfld.long 0x00 29. "  GMB541 ,Group Modifier Bit 541" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB540 ,Group Modifier Bit 540" "0,1"
bitfld.long 0x00 27. "  GMB539 ,Group Modifier Bit 539" "0,1"
bitfld.long 0x00 26. "  GMB538 ,Group Modifier Bit 538" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB537 ,Group Modifier Bit 537" "0,1"
bitfld.long 0x00 24. "  GMB536 ,Group Modifier Bit 536" "0,1"
bitfld.long 0x00 23. "  GMB535 ,Group Modifier Bit 535" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB534 ,Group Modifier Bit 534" "0,1"
bitfld.long 0x00 21. "  GMB533 ,Group Modifier Bit 533" "0,1"
bitfld.long 0x00 20. "  GMB532 ,Group Modifier Bit 532" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB531 ,Group Modifier Bit 531" "0,1"
bitfld.long 0x00 18. "  GMB530 ,Group Modifier Bit 530" "0,1"
bitfld.long 0x00 17. "  GMB529 ,Group Modifier Bit 529" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB528 ,Group Modifier Bit 528" "0,1"
bitfld.long 0x00 15. "  GMB527 ,Group Modifier Bit 527" "0,1"
bitfld.long 0x00 14. "  GMB526 ,Group Modifier Bit 526" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB525 ,Group Modifier Bit 525" "0,1"
bitfld.long 0x00 12. "  GMB524 ,Group Modifier Bit 524" "0,1"
bitfld.long 0x00 11. "  GMB523 ,Group Modifier Bit 523" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB522 ,Group Modifier Bit 522" "0,1"
bitfld.long 0x00 9. "  GMB521 ,Group Modifier Bit 521" "0,1"
bitfld.long 0x00 8. "  GMB520 ,Group Modifier Bit 520" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB519 ,Group Modifier Bit 519" "0,1"
bitfld.long 0x00 6. "  GMB518 ,Group Modifier Bit 518" "0,1"
bitfld.long 0x00 5. "  GMB517 ,Group Modifier Bit 517" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB516 ,Group Modifier Bit 516" "0,1"
bitfld.long 0x00 3. "  GMB515 ,Group Modifier Bit 515" "0,1"
bitfld.long 0x00 2. "  GMB514 ,Group Modifier Bit 514" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB513 ,Group Modifier Bit 513" "0,1"
bitfld.long 0x00 0. "  GMB512 ,Group Modifier Bit 512" "0,1"
else
hgroup.long 0x0D40++0x03
hide.long 0x0 "GICD_IGRPMODR16,Interrupt Group Modifier Register 16"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D44))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11))
group.long 0x0D44++0x03
line.long 0x0 "GICD_IGRPMODR17,Interrupt Group Modifier Register 17"
bitfld.long 0x00 31. " GMB575 ,Group Modifier Bit 575" "0,1"
bitfld.long 0x00 30. "  GMB574 ,Group Modifier Bit 574" "0,1"
bitfld.long 0x00 29. "  GMB573 ,Group Modifier Bit 573" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB572 ,Group Modifier Bit 572" "0,1"
bitfld.long 0x00 27. "  GMB571 ,Group Modifier Bit 571" "0,1"
bitfld.long 0x00 26. "  GMB570 ,Group Modifier Bit 570" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB569 ,Group Modifier Bit 569" "0,1"
bitfld.long 0x00 24. "  GMB568 ,Group Modifier Bit 568" "0,1"
bitfld.long 0x00 23. "  GMB567 ,Group Modifier Bit 567" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB566 ,Group Modifier Bit 566" "0,1"
bitfld.long 0x00 21. "  GMB565 ,Group Modifier Bit 565" "0,1"
bitfld.long 0x00 20. "  GMB564 ,Group Modifier Bit 564" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB563 ,Group Modifier Bit 563" "0,1"
bitfld.long 0x00 18. "  GMB562 ,Group Modifier Bit 562" "0,1"
bitfld.long 0x00 17. "  GMB561 ,Group Modifier Bit 561" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB560 ,Group Modifier Bit 560" "0,1"
bitfld.long 0x00 15. "  GMB559 ,Group Modifier Bit 559" "0,1"
bitfld.long 0x00 14. "  GMB558 ,Group Modifier Bit 558" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB557 ,Group Modifier Bit 557" "0,1"
bitfld.long 0x00 12. "  GMB556 ,Group Modifier Bit 556" "0,1"
bitfld.long 0x00 11. "  GMB555 ,Group Modifier Bit 555" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB554 ,Group Modifier Bit 554" "0,1"
bitfld.long 0x00 9. "  GMB553 ,Group Modifier Bit 553" "0,1"
bitfld.long 0x00 8. "  GMB552 ,Group Modifier Bit 552" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB551 ,Group Modifier Bit 551" "0,1"
bitfld.long 0x00 6. "  GMB550 ,Group Modifier Bit 550" "0,1"
bitfld.long 0x00 5. "  GMB549 ,Group Modifier Bit 549" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB548 ,Group Modifier Bit 548" "0,1"
bitfld.long 0x00 3. "  GMB547 ,Group Modifier Bit 547" "0,1"
bitfld.long 0x00 2. "  GMB546 ,Group Modifier Bit 546" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB545 ,Group Modifier Bit 545" "0,1"
bitfld.long 0x00 0. "  GMB544 ,Group Modifier Bit 544" "0,1"
else
hgroup.long 0x0D44++0x03
hide.long 0x0 "GICD_IGRPMODR17,Interrupt Group Modifier Register 17"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D48))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12))
group.long 0x0D48++0x03
line.long 0x0 "GICD_IGRPMODR18,Interrupt Group Modifier Register 18"
bitfld.long 0x00 31. " GMB607 ,Group Modifier Bit 607" "0,1"
bitfld.long 0x00 30. "  GMB606 ,Group Modifier Bit 606" "0,1"
bitfld.long 0x00 29. "  GMB605 ,Group Modifier Bit 605" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB604 ,Group Modifier Bit 604" "0,1"
bitfld.long 0x00 27. "  GMB603 ,Group Modifier Bit 603" "0,1"
bitfld.long 0x00 26. "  GMB602 ,Group Modifier Bit 602" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB601 ,Group Modifier Bit 601" "0,1"
bitfld.long 0x00 24. "  GMB600 ,Group Modifier Bit 600" "0,1"
bitfld.long 0x00 23. "  GMB599 ,Group Modifier Bit 599" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB598 ,Group Modifier Bit 598" "0,1"
bitfld.long 0x00 21. "  GMB597 ,Group Modifier Bit 597" "0,1"
bitfld.long 0x00 20. "  GMB596 ,Group Modifier Bit 596" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB595 ,Group Modifier Bit 595" "0,1"
bitfld.long 0x00 18. "  GMB594 ,Group Modifier Bit 594" "0,1"
bitfld.long 0x00 17. "  GMB593 ,Group Modifier Bit 593" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB592 ,Group Modifier Bit 592" "0,1"
bitfld.long 0x00 15. "  GMB591 ,Group Modifier Bit 591" "0,1"
bitfld.long 0x00 14. "  GMB590 ,Group Modifier Bit 590" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB589 ,Group Modifier Bit 589" "0,1"
bitfld.long 0x00 12. "  GMB588 ,Group Modifier Bit 588" "0,1"
bitfld.long 0x00 11. "  GMB587 ,Group Modifier Bit 587" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB586 ,Group Modifier Bit 586" "0,1"
bitfld.long 0x00 9. "  GMB585 ,Group Modifier Bit 585" "0,1"
bitfld.long 0x00 8. "  GMB584 ,Group Modifier Bit 584" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB583 ,Group Modifier Bit 583" "0,1"
bitfld.long 0x00 6. "  GMB582 ,Group Modifier Bit 582" "0,1"
bitfld.long 0x00 5. "  GMB581 ,Group Modifier Bit 581" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB580 ,Group Modifier Bit 580" "0,1"
bitfld.long 0x00 3. "  GMB579 ,Group Modifier Bit 579" "0,1"
bitfld.long 0x00 2. "  GMB578 ,Group Modifier Bit 578" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB577 ,Group Modifier Bit 577" "0,1"
bitfld.long 0x00 0. "  GMB576 ,Group Modifier Bit 576" "0,1"
else
hgroup.long 0x0D48++0x03
hide.long 0x0 "GICD_IGRPMODR18,Interrupt Group Modifier Register 18"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D4C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13))
group.long 0x0D4C++0x03
line.long 0x0 "GICD_IGRPMODR19,Interrupt Group Modifier Register 19"
bitfld.long 0x00 31. " GMB639 ,Group Modifier Bit 639" "0,1"
bitfld.long 0x00 30. "  GMB638 ,Group Modifier Bit 638" "0,1"
bitfld.long 0x00 29. "  GMB637 ,Group Modifier Bit 637" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB636 ,Group Modifier Bit 636" "0,1"
bitfld.long 0x00 27. "  GMB635 ,Group Modifier Bit 635" "0,1"
bitfld.long 0x00 26. "  GMB634 ,Group Modifier Bit 634" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB633 ,Group Modifier Bit 633" "0,1"
bitfld.long 0x00 24. "  GMB632 ,Group Modifier Bit 632" "0,1"
bitfld.long 0x00 23. "  GMB631 ,Group Modifier Bit 631" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB630 ,Group Modifier Bit 630" "0,1"
bitfld.long 0x00 21. "  GMB629 ,Group Modifier Bit 629" "0,1"
bitfld.long 0x00 20. "  GMB628 ,Group Modifier Bit 628" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB627 ,Group Modifier Bit 627" "0,1"
bitfld.long 0x00 18. "  GMB626 ,Group Modifier Bit 626" "0,1"
bitfld.long 0x00 17. "  GMB625 ,Group Modifier Bit 625" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB624 ,Group Modifier Bit 624" "0,1"
bitfld.long 0x00 15. "  GMB623 ,Group Modifier Bit 623" "0,1"
bitfld.long 0x00 14. "  GMB622 ,Group Modifier Bit 622" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB621 ,Group Modifier Bit 621" "0,1"
bitfld.long 0x00 12. "  GMB620 ,Group Modifier Bit 620" "0,1"
bitfld.long 0x00 11. "  GMB619 ,Group Modifier Bit 619" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB618 ,Group Modifier Bit 618" "0,1"
bitfld.long 0x00 9. "  GMB617 ,Group Modifier Bit 617" "0,1"
bitfld.long 0x00 8. "  GMB616 ,Group Modifier Bit 616" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB615 ,Group Modifier Bit 615" "0,1"
bitfld.long 0x00 6. "  GMB614 ,Group Modifier Bit 614" "0,1"
bitfld.long 0x00 5. "  GMB613 ,Group Modifier Bit 613" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB612 ,Group Modifier Bit 612" "0,1"
bitfld.long 0x00 3. "  GMB611 ,Group Modifier Bit 611" "0,1"
bitfld.long 0x00 2. "  GMB610 ,Group Modifier Bit 610" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB609 ,Group Modifier Bit 609" "0,1"
bitfld.long 0x00 0. "  GMB608 ,Group Modifier Bit 608" "0,1"
else
hgroup.long 0x0D4C++0x03
hide.long 0x0 "GICD_IGRPMODR19,Interrupt Group Modifier Register 19"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D50))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14))
group.long 0x0D50++0x03
line.long 0x0 "GICD_IGRPMODR20,Interrupt Group Modifier Register 20"
bitfld.long 0x00 31. " GMB671 ,Group Modifier Bit 671" "0,1"
bitfld.long 0x00 30. "  GMB670 ,Group Modifier Bit 670" "0,1"
bitfld.long 0x00 29. "  GMB669 ,Group Modifier Bit 669" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB668 ,Group Modifier Bit 668" "0,1"
bitfld.long 0x00 27. "  GMB667 ,Group Modifier Bit 667" "0,1"
bitfld.long 0x00 26. "  GMB666 ,Group Modifier Bit 666" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB665 ,Group Modifier Bit 665" "0,1"
bitfld.long 0x00 24. "  GMB664 ,Group Modifier Bit 664" "0,1"
bitfld.long 0x00 23. "  GMB663 ,Group Modifier Bit 663" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB662 ,Group Modifier Bit 662" "0,1"
bitfld.long 0x00 21. "  GMB661 ,Group Modifier Bit 661" "0,1"
bitfld.long 0x00 20. "  GMB660 ,Group Modifier Bit 660" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB659 ,Group Modifier Bit 659" "0,1"
bitfld.long 0x00 18. "  GMB658 ,Group Modifier Bit 658" "0,1"
bitfld.long 0x00 17. "  GMB657 ,Group Modifier Bit 657" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB656 ,Group Modifier Bit 656" "0,1"
bitfld.long 0x00 15. "  GMB655 ,Group Modifier Bit 655" "0,1"
bitfld.long 0x00 14. "  GMB654 ,Group Modifier Bit 654" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB653 ,Group Modifier Bit 653" "0,1"
bitfld.long 0x00 12. "  GMB652 ,Group Modifier Bit 652" "0,1"
bitfld.long 0x00 11. "  GMB651 ,Group Modifier Bit 651" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB650 ,Group Modifier Bit 650" "0,1"
bitfld.long 0x00 9. "  GMB649 ,Group Modifier Bit 649" "0,1"
bitfld.long 0x00 8. "  GMB648 ,Group Modifier Bit 648" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB647 ,Group Modifier Bit 647" "0,1"
bitfld.long 0x00 6. "  GMB646 ,Group Modifier Bit 646" "0,1"
bitfld.long 0x00 5. "  GMB645 ,Group Modifier Bit 645" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB644 ,Group Modifier Bit 644" "0,1"
bitfld.long 0x00 3. "  GMB643 ,Group Modifier Bit 643" "0,1"
bitfld.long 0x00 2. "  GMB642 ,Group Modifier Bit 642" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB641 ,Group Modifier Bit 641" "0,1"
bitfld.long 0x00 0. "  GMB640 ,Group Modifier Bit 640" "0,1"
else
hgroup.long 0x0D50++0x03
hide.long 0x0 "GICD_IGRPMODR20,Interrupt Group Modifier Register 20"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D54))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15))
group.long 0x0D54++0x03
line.long 0x0 "GICD_IGRPMODR21,Interrupt Group Modifier Register 21"
bitfld.long 0x00 31. " GMB703 ,Group Modifier Bit 703" "0,1"
bitfld.long 0x00 30. "  GMB702 ,Group Modifier Bit 702" "0,1"
bitfld.long 0x00 29. "  GMB701 ,Group Modifier Bit 701" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB700 ,Group Modifier Bit 700" "0,1"
bitfld.long 0x00 27. "  GMB699 ,Group Modifier Bit 699" "0,1"
bitfld.long 0x00 26. "  GMB698 ,Group Modifier Bit 698" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB697 ,Group Modifier Bit 697" "0,1"
bitfld.long 0x00 24. "  GMB696 ,Group Modifier Bit 696" "0,1"
bitfld.long 0x00 23. "  GMB695 ,Group Modifier Bit 695" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB694 ,Group Modifier Bit 694" "0,1"
bitfld.long 0x00 21. "  GMB693 ,Group Modifier Bit 693" "0,1"
bitfld.long 0x00 20. "  GMB692 ,Group Modifier Bit 692" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB691 ,Group Modifier Bit 691" "0,1"
bitfld.long 0x00 18. "  GMB690 ,Group Modifier Bit 690" "0,1"
bitfld.long 0x00 17. "  GMB689 ,Group Modifier Bit 689" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB688 ,Group Modifier Bit 688" "0,1"
bitfld.long 0x00 15. "  GMB687 ,Group Modifier Bit 687" "0,1"
bitfld.long 0x00 14. "  GMB686 ,Group Modifier Bit 686" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB685 ,Group Modifier Bit 685" "0,1"
bitfld.long 0x00 12. "  GMB684 ,Group Modifier Bit 684" "0,1"
bitfld.long 0x00 11. "  GMB683 ,Group Modifier Bit 683" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB682 ,Group Modifier Bit 682" "0,1"
bitfld.long 0x00 9. "  GMB681 ,Group Modifier Bit 681" "0,1"
bitfld.long 0x00 8. "  GMB680 ,Group Modifier Bit 680" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB679 ,Group Modifier Bit 679" "0,1"
bitfld.long 0x00 6. "  GMB678 ,Group Modifier Bit 678" "0,1"
bitfld.long 0x00 5. "  GMB677 ,Group Modifier Bit 677" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB676 ,Group Modifier Bit 676" "0,1"
bitfld.long 0x00 3. "  GMB675 ,Group Modifier Bit 675" "0,1"
bitfld.long 0x00 2. "  GMB674 ,Group Modifier Bit 674" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB673 ,Group Modifier Bit 673" "0,1"
bitfld.long 0x00 0. "  GMB672 ,Group Modifier Bit 672" "0,1"
else
hgroup.long 0x0D54++0x03
hide.long 0x0 "GICD_IGRPMODR21,Interrupt Group Modifier Register 21"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D58))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16))
group.long 0x0D58++0x03
line.long 0x0 "GICD_IGRPMODR22,Interrupt Group Modifier Register 22"
bitfld.long 0x00 31. " GMB735 ,Group Modifier Bit 735" "0,1"
bitfld.long 0x00 30. "  GMB734 ,Group Modifier Bit 734" "0,1"
bitfld.long 0x00 29. "  GMB733 ,Group Modifier Bit 733" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB732 ,Group Modifier Bit 732" "0,1"
bitfld.long 0x00 27. "  GMB731 ,Group Modifier Bit 731" "0,1"
bitfld.long 0x00 26. "  GMB730 ,Group Modifier Bit 730" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB729 ,Group Modifier Bit 729" "0,1"
bitfld.long 0x00 24. "  GMB728 ,Group Modifier Bit 728" "0,1"
bitfld.long 0x00 23. "  GMB727 ,Group Modifier Bit 727" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB726 ,Group Modifier Bit 726" "0,1"
bitfld.long 0x00 21. "  GMB725 ,Group Modifier Bit 725" "0,1"
bitfld.long 0x00 20. "  GMB724 ,Group Modifier Bit 724" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB723 ,Group Modifier Bit 723" "0,1"
bitfld.long 0x00 18. "  GMB722 ,Group Modifier Bit 722" "0,1"
bitfld.long 0x00 17. "  GMB721 ,Group Modifier Bit 721" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB720 ,Group Modifier Bit 720" "0,1"
bitfld.long 0x00 15. "  GMB719 ,Group Modifier Bit 719" "0,1"
bitfld.long 0x00 14. "  GMB718 ,Group Modifier Bit 718" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB717 ,Group Modifier Bit 717" "0,1"
bitfld.long 0x00 12. "  GMB716 ,Group Modifier Bit 716" "0,1"
bitfld.long 0x00 11. "  GMB715 ,Group Modifier Bit 715" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB714 ,Group Modifier Bit 714" "0,1"
bitfld.long 0x00 9. "  GMB713 ,Group Modifier Bit 713" "0,1"
bitfld.long 0x00 8. "  GMB712 ,Group Modifier Bit 712" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB711 ,Group Modifier Bit 711" "0,1"
bitfld.long 0x00 6. "  GMB710 ,Group Modifier Bit 710" "0,1"
bitfld.long 0x00 5. "  GMB709 ,Group Modifier Bit 709" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB708 ,Group Modifier Bit 708" "0,1"
bitfld.long 0x00 3. "  GMB707 ,Group Modifier Bit 707" "0,1"
bitfld.long 0x00 2. "  GMB706 ,Group Modifier Bit 706" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB705 ,Group Modifier Bit 705" "0,1"
bitfld.long 0x00 0. "  GMB704 ,Group Modifier Bit 704" "0,1"
else
hgroup.long 0x0D58++0x03
hide.long 0x0 "GICD_IGRPMODR22,Interrupt Group Modifier Register 22"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D5C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17))
group.long 0x0D5C++0x03
line.long 0x0 "GICD_IGRPMODR23,Interrupt Group Modifier Register 23"
bitfld.long 0x00 31. " GMB767 ,Group Modifier Bit 767" "0,1"
bitfld.long 0x00 30. "  GMB766 ,Group Modifier Bit 766" "0,1"
bitfld.long 0x00 29. "  GMB765 ,Group Modifier Bit 765" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB764 ,Group Modifier Bit 764" "0,1"
bitfld.long 0x00 27. "  GMB763 ,Group Modifier Bit 763" "0,1"
bitfld.long 0x00 26. "  GMB762 ,Group Modifier Bit 762" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB761 ,Group Modifier Bit 761" "0,1"
bitfld.long 0x00 24. "  GMB760 ,Group Modifier Bit 760" "0,1"
bitfld.long 0x00 23. "  GMB759 ,Group Modifier Bit 759" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB758 ,Group Modifier Bit 758" "0,1"
bitfld.long 0x00 21. "  GMB757 ,Group Modifier Bit 757" "0,1"
bitfld.long 0x00 20. "  GMB756 ,Group Modifier Bit 756" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB755 ,Group Modifier Bit 755" "0,1"
bitfld.long 0x00 18. "  GMB754 ,Group Modifier Bit 754" "0,1"
bitfld.long 0x00 17. "  GMB753 ,Group Modifier Bit 753" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB752 ,Group Modifier Bit 752" "0,1"
bitfld.long 0x00 15. "  GMB751 ,Group Modifier Bit 751" "0,1"
bitfld.long 0x00 14. "  GMB750 ,Group Modifier Bit 750" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB749 ,Group Modifier Bit 749" "0,1"
bitfld.long 0x00 12. "  GMB748 ,Group Modifier Bit 748" "0,1"
bitfld.long 0x00 11. "  GMB747 ,Group Modifier Bit 747" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB746 ,Group Modifier Bit 746" "0,1"
bitfld.long 0x00 9. "  GMB745 ,Group Modifier Bit 745" "0,1"
bitfld.long 0x00 8. "  GMB744 ,Group Modifier Bit 744" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB743 ,Group Modifier Bit 743" "0,1"
bitfld.long 0x00 6. "  GMB742 ,Group Modifier Bit 742" "0,1"
bitfld.long 0x00 5. "  GMB741 ,Group Modifier Bit 741" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB740 ,Group Modifier Bit 740" "0,1"
bitfld.long 0x00 3. "  GMB739 ,Group Modifier Bit 739" "0,1"
bitfld.long 0x00 2. "  GMB738 ,Group Modifier Bit 738" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB737 ,Group Modifier Bit 737" "0,1"
bitfld.long 0x00 0. "  GMB736 ,Group Modifier Bit 736" "0,1"
else
hgroup.long 0x0D5C++0x03
hide.long 0x0 "GICD_IGRPMODR23,Interrupt Group Modifier Register 23"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D60))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18))
group.long 0x0D60++0x03
line.long 0x0 "GICD_IGRPMODR24,Interrupt Group Modifier Register 24"
bitfld.long 0x00 31. " GMB799 ,Group Modifier Bit 799" "0,1"
bitfld.long 0x00 30. "  GMB798 ,Group Modifier Bit 798" "0,1"
bitfld.long 0x00 29. "  GMB797 ,Group Modifier Bit 797" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB796 ,Group Modifier Bit 796" "0,1"
bitfld.long 0x00 27. "  GMB795 ,Group Modifier Bit 795" "0,1"
bitfld.long 0x00 26. "  GMB794 ,Group Modifier Bit 794" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB793 ,Group Modifier Bit 793" "0,1"
bitfld.long 0x00 24. "  GMB792 ,Group Modifier Bit 792" "0,1"
bitfld.long 0x00 23. "  GMB791 ,Group Modifier Bit 791" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB790 ,Group Modifier Bit 790" "0,1"
bitfld.long 0x00 21. "  GMB789 ,Group Modifier Bit 789" "0,1"
bitfld.long 0x00 20. "  GMB788 ,Group Modifier Bit 788" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB787 ,Group Modifier Bit 787" "0,1"
bitfld.long 0x00 18. "  GMB786 ,Group Modifier Bit 786" "0,1"
bitfld.long 0x00 17. "  GMB785 ,Group Modifier Bit 785" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB784 ,Group Modifier Bit 784" "0,1"
bitfld.long 0x00 15. "  GMB783 ,Group Modifier Bit 783" "0,1"
bitfld.long 0x00 14. "  GMB782 ,Group Modifier Bit 782" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB781 ,Group Modifier Bit 781" "0,1"
bitfld.long 0x00 12. "  GMB780 ,Group Modifier Bit 780" "0,1"
bitfld.long 0x00 11. "  GMB779 ,Group Modifier Bit 779" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB778 ,Group Modifier Bit 778" "0,1"
bitfld.long 0x00 9. "  GMB777 ,Group Modifier Bit 777" "0,1"
bitfld.long 0x00 8. "  GMB776 ,Group Modifier Bit 776" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB775 ,Group Modifier Bit 775" "0,1"
bitfld.long 0x00 6. "  GMB774 ,Group Modifier Bit 774" "0,1"
bitfld.long 0x00 5. "  GMB773 ,Group Modifier Bit 773" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB772 ,Group Modifier Bit 772" "0,1"
bitfld.long 0x00 3. "  GMB771 ,Group Modifier Bit 771" "0,1"
bitfld.long 0x00 2. "  GMB770 ,Group Modifier Bit 770" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB769 ,Group Modifier Bit 769" "0,1"
bitfld.long 0x00 0. "  GMB768 ,Group Modifier Bit 768" "0,1"
else
hgroup.long 0x0D60++0x03
hide.long 0x0 "GICD_IGRPMODR24,Interrupt Group Modifier Register 24"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D64))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19))
group.long 0x0D64++0x03
line.long 0x0 "GICD_IGRPMODR25,Interrupt Group Modifier Register 25"
bitfld.long 0x00 31. " GMB831 ,Group Modifier Bit 831" "0,1"
bitfld.long 0x00 30. "  GMB830 ,Group Modifier Bit 830" "0,1"
bitfld.long 0x00 29. "  GMB829 ,Group Modifier Bit 829" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB828 ,Group Modifier Bit 828" "0,1"
bitfld.long 0x00 27. "  GMB827 ,Group Modifier Bit 827" "0,1"
bitfld.long 0x00 26. "  GMB826 ,Group Modifier Bit 826" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB825 ,Group Modifier Bit 825" "0,1"
bitfld.long 0x00 24. "  GMB824 ,Group Modifier Bit 824" "0,1"
bitfld.long 0x00 23. "  GMB823 ,Group Modifier Bit 823" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB822 ,Group Modifier Bit 822" "0,1"
bitfld.long 0x00 21. "  GMB821 ,Group Modifier Bit 821" "0,1"
bitfld.long 0x00 20. "  GMB820 ,Group Modifier Bit 820" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB819 ,Group Modifier Bit 819" "0,1"
bitfld.long 0x00 18. "  GMB818 ,Group Modifier Bit 818" "0,1"
bitfld.long 0x00 17. "  GMB817 ,Group Modifier Bit 817" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB816 ,Group Modifier Bit 816" "0,1"
bitfld.long 0x00 15. "  GMB815 ,Group Modifier Bit 815" "0,1"
bitfld.long 0x00 14. "  GMB814 ,Group Modifier Bit 814" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB813 ,Group Modifier Bit 813" "0,1"
bitfld.long 0x00 12. "  GMB812 ,Group Modifier Bit 812" "0,1"
bitfld.long 0x00 11. "  GMB811 ,Group Modifier Bit 811" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB810 ,Group Modifier Bit 810" "0,1"
bitfld.long 0x00 9. "  GMB809 ,Group Modifier Bit 809" "0,1"
bitfld.long 0x00 8. "  GMB808 ,Group Modifier Bit 808" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB807 ,Group Modifier Bit 807" "0,1"
bitfld.long 0x00 6. "  GMB806 ,Group Modifier Bit 806" "0,1"
bitfld.long 0x00 5. "  GMB805 ,Group Modifier Bit 805" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB804 ,Group Modifier Bit 804" "0,1"
bitfld.long 0x00 3. "  GMB803 ,Group Modifier Bit 803" "0,1"
bitfld.long 0x00 2. "  GMB802 ,Group Modifier Bit 802" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB801 ,Group Modifier Bit 801" "0,1"
bitfld.long 0x00 0. "  GMB800 ,Group Modifier Bit 800" "0,1"
else
hgroup.long 0x0D64++0x03
hide.long 0x0 "GICD_IGRPMODR25,Interrupt Group Modifier Register 25"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D68))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01A))
group.long 0x0D68++0x03
line.long 0x0 "GICD_IGRPMODR26,Interrupt Group Modifier Register 26"
bitfld.long 0x00 31. " GMB863 ,Group Modifier Bit 863" "0,1"
bitfld.long 0x00 30. "  GMB862 ,Group Modifier Bit 862" "0,1"
bitfld.long 0x00 29. "  GMB861 ,Group Modifier Bit 861" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB860 ,Group Modifier Bit 860" "0,1"
bitfld.long 0x00 27. "  GMB859 ,Group Modifier Bit 859" "0,1"
bitfld.long 0x00 26. "  GMB858 ,Group Modifier Bit 858" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB857 ,Group Modifier Bit 857" "0,1"
bitfld.long 0x00 24. "  GMB856 ,Group Modifier Bit 856" "0,1"
bitfld.long 0x00 23. "  GMB855 ,Group Modifier Bit 855" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB854 ,Group Modifier Bit 854" "0,1"
bitfld.long 0x00 21. "  GMB853 ,Group Modifier Bit 853" "0,1"
bitfld.long 0x00 20. "  GMB852 ,Group Modifier Bit 852" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB851 ,Group Modifier Bit 851" "0,1"
bitfld.long 0x00 18. "  GMB850 ,Group Modifier Bit 850" "0,1"
bitfld.long 0x00 17. "  GMB849 ,Group Modifier Bit 849" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB848 ,Group Modifier Bit 848" "0,1"
bitfld.long 0x00 15. "  GMB847 ,Group Modifier Bit 847" "0,1"
bitfld.long 0x00 14. "  GMB846 ,Group Modifier Bit 846" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB845 ,Group Modifier Bit 845" "0,1"
bitfld.long 0x00 12. "  GMB844 ,Group Modifier Bit 844" "0,1"
bitfld.long 0x00 11. "  GMB843 ,Group Modifier Bit 843" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB842 ,Group Modifier Bit 842" "0,1"
bitfld.long 0x00 9. "  GMB841 ,Group Modifier Bit 841" "0,1"
bitfld.long 0x00 8. "  GMB840 ,Group Modifier Bit 840" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB839 ,Group Modifier Bit 839" "0,1"
bitfld.long 0x00 6. "  GMB838 ,Group Modifier Bit 838" "0,1"
bitfld.long 0x00 5. "  GMB837 ,Group Modifier Bit 837" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB836 ,Group Modifier Bit 836" "0,1"
bitfld.long 0x00 3. "  GMB835 ,Group Modifier Bit 835" "0,1"
bitfld.long 0x00 2. "  GMB834 ,Group Modifier Bit 834" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB833 ,Group Modifier Bit 833" "0,1"
bitfld.long 0x00 0. "  GMB832 ,Group Modifier Bit 832" "0,1"
else
hgroup.long 0x0D68++0x03
hide.long 0x0 "GICD_IGRPMODR26,Interrupt Group Modifier Register 26"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D6C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B))
group.long 0x0D6C++0x03
line.long 0x0 "GICD_IGRPMODR27,Interrupt Group Modifier Register 27"
bitfld.long 0x00 31. " GMB895 ,Group Modifier Bit 895" "0,1"
bitfld.long 0x00 30. "  GMB894 ,Group Modifier Bit 894" "0,1"
bitfld.long 0x00 29. "  GMB893 ,Group Modifier Bit 893" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB892 ,Group Modifier Bit 892" "0,1"
bitfld.long 0x00 27. "  GMB891 ,Group Modifier Bit 891" "0,1"
bitfld.long 0x00 26. "  GMB890 ,Group Modifier Bit 890" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB889 ,Group Modifier Bit 889" "0,1"
bitfld.long 0x00 24. "  GMB888 ,Group Modifier Bit 888" "0,1"
bitfld.long 0x00 23. "  GMB887 ,Group Modifier Bit 887" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB886 ,Group Modifier Bit 886" "0,1"
bitfld.long 0x00 21. "  GMB885 ,Group Modifier Bit 885" "0,1"
bitfld.long 0x00 20. "  GMB884 ,Group Modifier Bit 884" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB883 ,Group Modifier Bit 883" "0,1"
bitfld.long 0x00 18. "  GMB882 ,Group Modifier Bit 882" "0,1"
bitfld.long 0x00 17. "  GMB881 ,Group Modifier Bit 881" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB880 ,Group Modifier Bit 880" "0,1"
bitfld.long 0x00 15. "  GMB879 ,Group Modifier Bit 879" "0,1"
bitfld.long 0x00 14. "  GMB878 ,Group Modifier Bit 878" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB877 ,Group Modifier Bit 877" "0,1"
bitfld.long 0x00 12. "  GMB876 ,Group Modifier Bit 876" "0,1"
bitfld.long 0x00 11. "  GMB875 ,Group Modifier Bit 875" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB874 ,Group Modifier Bit 874" "0,1"
bitfld.long 0x00 9. "  GMB873 ,Group Modifier Bit 873" "0,1"
bitfld.long 0x00 8. "  GMB872 ,Group Modifier Bit 872" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB871 ,Group Modifier Bit 871" "0,1"
bitfld.long 0x00 6. "  GMB870 ,Group Modifier Bit 870" "0,1"
bitfld.long 0x00 5. "  GMB869 ,Group Modifier Bit 869" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB868 ,Group Modifier Bit 868" "0,1"
bitfld.long 0x00 3. "  GMB867 ,Group Modifier Bit 867" "0,1"
bitfld.long 0x00 2. "  GMB866 ,Group Modifier Bit 866" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB865 ,Group Modifier Bit 865" "0,1"
bitfld.long 0x00 0. "  GMB864 ,Group Modifier Bit 864" "0,1"
else
hgroup.long 0x0D6C++0x03
hide.long 0x0 "GICD_IGRPMODR27,Interrupt Group Modifier Register 27"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D70))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C))
group.long 0x0D70++0x03
line.long 0x0 "GICD_IGRPMODR28,Interrupt Group Modifier Register 28"
bitfld.long 0x00 31. " GMB927 ,Group Modifier Bit 927" "0,1"
bitfld.long 0x00 30. "  GMB926 ,Group Modifier Bit 926" "0,1"
bitfld.long 0x00 29. "  GMB925 ,Group Modifier Bit 925" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB924 ,Group Modifier Bit 924" "0,1"
bitfld.long 0x00 27. "  GMB923 ,Group Modifier Bit 923" "0,1"
bitfld.long 0x00 26. "  GMB922 ,Group Modifier Bit 922" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB921 ,Group Modifier Bit 921" "0,1"
bitfld.long 0x00 24. "  GMB920 ,Group Modifier Bit 920" "0,1"
bitfld.long 0x00 23. "  GMB919 ,Group Modifier Bit 919" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB918 ,Group Modifier Bit 918" "0,1"
bitfld.long 0x00 21. "  GMB917 ,Group Modifier Bit 917" "0,1"
bitfld.long 0x00 20. "  GMB916 ,Group Modifier Bit 916" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB915 ,Group Modifier Bit 915" "0,1"
bitfld.long 0x00 18. "  GMB914 ,Group Modifier Bit 914" "0,1"
bitfld.long 0x00 17. "  GMB913 ,Group Modifier Bit 913" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB912 ,Group Modifier Bit 912" "0,1"
bitfld.long 0x00 15. "  GMB911 ,Group Modifier Bit 911" "0,1"
bitfld.long 0x00 14. "  GMB910 ,Group Modifier Bit 910" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB909 ,Group Modifier Bit 909" "0,1"
bitfld.long 0x00 12. "  GMB908 ,Group Modifier Bit 908" "0,1"
bitfld.long 0x00 11. "  GMB907 ,Group Modifier Bit 907" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB906 ,Group Modifier Bit 906" "0,1"
bitfld.long 0x00 9. "  GMB905 ,Group Modifier Bit 905" "0,1"
bitfld.long 0x00 8. "  GMB904 ,Group Modifier Bit 904" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB903 ,Group Modifier Bit 903" "0,1"
bitfld.long 0x00 6. "  GMB902 ,Group Modifier Bit 902" "0,1"
bitfld.long 0x00 5. "  GMB901 ,Group Modifier Bit 901" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB900 ,Group Modifier Bit 900" "0,1"
bitfld.long 0x00 3. "  GMB899 ,Group Modifier Bit 899" "0,1"
bitfld.long 0x00 2. "  GMB898 ,Group Modifier Bit 898" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB897 ,Group Modifier Bit 897" "0,1"
bitfld.long 0x00 0. "  GMB896 ,Group Modifier Bit 896" "0,1"
else
hgroup.long 0x0D70++0x03
hide.long 0x0 "GICD_IGRPMODR28,Interrupt Group Modifier Register 28"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D74))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D))
group.long 0x0D74++0x03
line.long 0x0 "GICD_IGRPMODR29,Interrupt Group Modifier Register 29"
bitfld.long 0x00 31. " GMB959 ,Group Modifier Bit 959" "0,1"
bitfld.long 0x00 30. "  GMB958 ,Group Modifier Bit 958" "0,1"
bitfld.long 0x00 29. "  GMB957 ,Group Modifier Bit 957" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB956 ,Group Modifier Bit 956" "0,1"
bitfld.long 0x00 27. "  GMB955 ,Group Modifier Bit 955" "0,1"
bitfld.long 0x00 26. "  GMB954 ,Group Modifier Bit 954" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB953 ,Group Modifier Bit 953" "0,1"
bitfld.long 0x00 24. "  GMB952 ,Group Modifier Bit 952" "0,1"
bitfld.long 0x00 23. "  GMB951 ,Group Modifier Bit 951" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB950 ,Group Modifier Bit 950" "0,1"
bitfld.long 0x00 21. "  GMB949 ,Group Modifier Bit 949" "0,1"
bitfld.long 0x00 20. "  GMB948 ,Group Modifier Bit 948" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB947 ,Group Modifier Bit 947" "0,1"
bitfld.long 0x00 18. "  GMB946 ,Group Modifier Bit 946" "0,1"
bitfld.long 0x00 17. "  GMB945 ,Group Modifier Bit 945" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB944 ,Group Modifier Bit 944" "0,1"
bitfld.long 0x00 15. "  GMB943 ,Group Modifier Bit 943" "0,1"
bitfld.long 0x00 14. "  GMB942 ,Group Modifier Bit 942" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB941 ,Group Modifier Bit 941" "0,1"
bitfld.long 0x00 12. "  GMB940 ,Group Modifier Bit 940" "0,1"
bitfld.long 0x00 11. "  GMB939 ,Group Modifier Bit 939" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB938 ,Group Modifier Bit 938" "0,1"
bitfld.long 0x00 9. "  GMB937 ,Group Modifier Bit 937" "0,1"
bitfld.long 0x00 8. "  GMB936 ,Group Modifier Bit 936" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB935 ,Group Modifier Bit 935" "0,1"
bitfld.long 0x00 6. "  GMB934 ,Group Modifier Bit 934" "0,1"
bitfld.long 0x00 5. "  GMB933 ,Group Modifier Bit 933" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB932 ,Group Modifier Bit 932" "0,1"
bitfld.long 0x00 3. "  GMB931 ,Group Modifier Bit 931" "0,1"
bitfld.long 0x00 2. "  GMB930 ,Group Modifier Bit 930" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB929 ,Group Modifier Bit 929" "0,1"
bitfld.long 0x00 0. "  GMB928 ,Group Modifier Bit 928" "0,1"
else
hgroup.long 0x0D74++0x03
hide.long 0x0 "GICD_IGRPMODR29,Interrupt Group Modifier Register 29"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D78))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E))
group.long 0x0D78++0x03
line.long 0x0 "GICD_IGRPMODR30,Interrupt Group Modifier Register 30"
bitfld.long 0x00 31. " GMB991 ,Group Modifier Bit 991" "0,1"
bitfld.long 0x00 30. "  GMB990 ,Group Modifier Bit 990" "0,1"
bitfld.long 0x00 29. "  GMB989 ,Group Modifier Bit 989" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB988 ,Group Modifier Bit 988" "0,1"
bitfld.long 0x00 27. "  GMB987 ,Group Modifier Bit 987" "0,1"
bitfld.long 0x00 26. "  GMB986 ,Group Modifier Bit 986" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB985 ,Group Modifier Bit 985" "0,1"
bitfld.long 0x00 24. "  GMB984 ,Group Modifier Bit 984" "0,1"
bitfld.long 0x00 23. "  GMB983 ,Group Modifier Bit 983" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB982 ,Group Modifier Bit 982" "0,1"
bitfld.long 0x00 21. "  GMB981 ,Group Modifier Bit 981" "0,1"
bitfld.long 0x00 20. "  GMB980 ,Group Modifier Bit 980" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB979 ,Group Modifier Bit 979" "0,1"
bitfld.long 0x00 18. "  GMB978 ,Group Modifier Bit 978" "0,1"
bitfld.long 0x00 17. "  GMB977 ,Group Modifier Bit 977" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB976 ,Group Modifier Bit 976" "0,1"
bitfld.long 0x00 15. "  GMB975 ,Group Modifier Bit 975" "0,1"
bitfld.long 0x00 14. "  GMB974 ,Group Modifier Bit 974" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB973 ,Group Modifier Bit 973" "0,1"
bitfld.long 0x00 12. "  GMB972 ,Group Modifier Bit 972" "0,1"
bitfld.long 0x00 11. "  GMB971 ,Group Modifier Bit 971" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB970 ,Group Modifier Bit 970" "0,1"
bitfld.long 0x00 9. "  GMB969 ,Group Modifier Bit 969" "0,1"
bitfld.long 0x00 8. "  GMB968 ,Group Modifier Bit 968" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB967 ,Group Modifier Bit 967" "0,1"
bitfld.long 0x00 6. "  GMB966 ,Group Modifier Bit 966" "0,1"
bitfld.long 0x00 5. "  GMB965 ,Group Modifier Bit 965" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB964 ,Group Modifier Bit 964" "0,1"
bitfld.long 0x00 3. "  GMB963 ,Group Modifier Bit 963" "0,1"
bitfld.long 0x00 2. "  GMB962 ,Group Modifier Bit 962" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB961 ,Group Modifier Bit 961" "0,1"
bitfld.long 0x00 0. "  GMB960 ,Group Modifier Bit 960" "0,1"
else
hgroup.long 0x0D78++0x03
hide.long 0x0 "GICD_IGRPMODR30,Interrupt Group Modifier Register 30"
endif
tree.end
width 14.
tree "Non-secure Access Control Registers"
hgroup.long 0x0E00++0x03
hide.long 0x00 "GICD_NSACR0,Non-secure Access Control Register 0"
hgroup.long 0xE04++0x03
hide.long 0x00 "GICD_NSACR1,Non-secure Access Control Register 1"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE08)))
group.long 0xE08++0x03
line.long 0x00 "GICD_NSACR2,Non-secure Access Control Register 2"
bitfld.long 0x00 30.--31. " NS_ACCESS47  ,Controls Non-secure access of the interrupt with ID47 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS46  ,Controls Non-secure access of the interrupt with ID46 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS45  ,Controls Non-secure access of the interrupt with ID45 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS44  ,Controls Non-secure access of the interrupt with ID44 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS43  ,Controls Non-secure access of the interrupt with ID43 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS42  ,Controls Non-secure access of the interrupt with ID42 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS41  ,Controls Non-secure access of the interrupt with ID41 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS40  ,Controls Non-secure access of the interrupt with ID40 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS39  ,Controls Non-secure access of the interrupt with ID39 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS38  ,Controls Non-secure access of the interrupt with ID38 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS37  ,Controls Non-secure access of the interrupt with ID37 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS36  ,Controls Non-secure access of the interrupt with ID36 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS35  ,Controls Non-secure access of the interrupt with ID35 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS34  ,Controls Non-secure access of the interrupt with ID34 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS33  ,Controls Non-secure access of the interrupt with ID33 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS32  ,Controls Non-secure access of the interrupt with ID32 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE08++0x03
hide.long 0x00 "GICD_NSACR2,Non-secure Access Control Register 2"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE0C)))
group.long 0xE0C++0x03
line.long 0x00 "GICD_NSACR3,Non-secure Access Control Register 3"
bitfld.long 0x00 30.--31. " NS_ACCESS63  ,Controls Non-secure access of the interrupt with ID63 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS62  ,Controls Non-secure access of the interrupt with ID62 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS61  ,Controls Non-secure access of the interrupt with ID61 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS60  ,Controls Non-secure access of the interrupt with ID60 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS59  ,Controls Non-secure access of the interrupt with ID59 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS58  ,Controls Non-secure access of the interrupt with ID58 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS57  ,Controls Non-secure access of the interrupt with ID57 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS56  ,Controls Non-secure access of the interrupt with ID56 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS55  ,Controls Non-secure access of the interrupt with ID55 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS54  ,Controls Non-secure access of the interrupt with ID54 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS53  ,Controls Non-secure access of the interrupt with ID53 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS52  ,Controls Non-secure access of the interrupt with ID52 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS51  ,Controls Non-secure access of the interrupt with ID51 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS50  ,Controls Non-secure access of the interrupt with ID50 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS49  ,Controls Non-secure access of the interrupt with ID49 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS48  ,Controls Non-secure access of the interrupt with ID48 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE0C++0x03
hide.long 0x00 "GICD_NSACR3,Non-secure Access Control Register 3"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE10)))
group.long 0xE10++0x03
line.long 0x00 "GICD_NSACR4,Non-secure Access Control Register 4"
bitfld.long 0x00 30.--31. " NS_ACCESS79  ,Controls Non-secure access of the interrupt with ID79 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS78  ,Controls Non-secure access of the interrupt with ID78 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS77  ,Controls Non-secure access of the interrupt with ID77 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS76  ,Controls Non-secure access of the interrupt with ID76 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS75  ,Controls Non-secure access of the interrupt with ID75 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS74  ,Controls Non-secure access of the interrupt with ID74 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS73  ,Controls Non-secure access of the interrupt with ID73 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS72  ,Controls Non-secure access of the interrupt with ID72 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS71  ,Controls Non-secure access of the interrupt with ID71 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS70  ,Controls Non-secure access of the interrupt with ID70 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS69  ,Controls Non-secure access of the interrupt with ID69 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS68  ,Controls Non-secure access of the interrupt with ID68 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS67  ,Controls Non-secure access of the interrupt with ID67 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS66  ,Controls Non-secure access of the interrupt with ID66 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS65  ,Controls Non-secure access of the interrupt with ID65 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS64  ,Controls Non-secure access of the interrupt with ID64 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE10++0x03
hide.long 0x00 "GICD_NSACR4,Non-secure Access Control Register 4"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE14)))
group.long 0xE14++0x03
line.long 0x00 "GICD_NSACR5,Non-secure Access Control Register 5"
bitfld.long 0x00 30.--31. " NS_ACCESS95  ,Controls Non-secure access of the interrupt with ID95 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS94  ,Controls Non-secure access of the interrupt with ID94 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS93  ,Controls Non-secure access of the interrupt with ID93 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS92  ,Controls Non-secure access of the interrupt with ID92 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS91  ,Controls Non-secure access of the interrupt with ID91 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS90  ,Controls Non-secure access of the interrupt with ID90 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS89  ,Controls Non-secure access of the interrupt with ID89 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS88  ,Controls Non-secure access of the interrupt with ID88 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS87  ,Controls Non-secure access of the interrupt with ID87 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS86  ,Controls Non-secure access of the interrupt with ID86 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS85  ,Controls Non-secure access of the interrupt with ID85 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS84  ,Controls Non-secure access of the interrupt with ID84 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS83  ,Controls Non-secure access of the interrupt with ID83 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS82  ,Controls Non-secure access of the interrupt with ID82 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS81  ,Controls Non-secure access of the interrupt with ID81 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS80  ,Controls Non-secure access of the interrupt with ID80 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE14++0x03
hide.long 0x00 "GICD_NSACR5,Non-secure Access Control Register 5"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE18)))
group.long 0xE18++0x03
line.long 0x00 "GICD_NSACR6,Non-secure Access Control Register 6"
bitfld.long 0x00 30.--31. " NS_ACCESS111 ,Controls Non-secure access of the interrupt with ID111" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS110 ,Controls Non-secure access of the interrupt with ID110" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS109 ,Controls Non-secure access of the interrupt with ID109" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS108 ,Controls Non-secure access of the interrupt with ID108" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS107 ,Controls Non-secure access of the interrupt with ID107" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS106 ,Controls Non-secure access of the interrupt with ID106" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS105 ,Controls Non-secure access of the interrupt with ID105" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS104 ,Controls Non-secure access of the interrupt with ID104" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS103 ,Controls Non-secure access of the interrupt with ID103" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS102 ,Controls Non-secure access of the interrupt with ID102" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS101 ,Controls Non-secure access of the interrupt with ID101" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS100 ,Controls Non-secure access of the interrupt with ID100" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS99  ,Controls Non-secure access of the interrupt with ID99 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS98  ,Controls Non-secure access of the interrupt with ID98 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS97  ,Controls Non-secure access of the interrupt with ID97 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS96  ,Controls Non-secure access of the interrupt with ID96 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE18++0x03
hide.long 0x00 "GICD_NSACR6,Non-secure Access Control Register 6"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE1C)))
group.long 0xE1C++0x03
line.long 0x00 "GICD_NSACR7,Non-secure Access Control Register 7"
bitfld.long 0x00 30.--31. " NS_ACCESS127 ,Controls Non-secure access of the interrupt with ID127" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS126 ,Controls Non-secure access of the interrupt with ID126" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS125 ,Controls Non-secure access of the interrupt with ID125" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS124 ,Controls Non-secure access of the interrupt with ID124" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS123 ,Controls Non-secure access of the interrupt with ID123" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS122 ,Controls Non-secure access of the interrupt with ID122" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS121 ,Controls Non-secure access of the interrupt with ID121" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS120 ,Controls Non-secure access of the interrupt with ID120" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS119 ,Controls Non-secure access of the interrupt with ID119" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS118 ,Controls Non-secure access of the interrupt with ID118" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS117 ,Controls Non-secure access of the interrupt with ID117" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS116 ,Controls Non-secure access of the interrupt with ID116" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS115 ,Controls Non-secure access of the interrupt with ID115" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS114 ,Controls Non-secure access of the interrupt with ID114" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS113 ,Controls Non-secure access of the interrupt with ID113" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS112 ,Controls Non-secure access of the interrupt with ID112" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE1C++0x03
hide.long 0x00 "GICD_NSACR7,Non-secure Access Control Register 7"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE20)))
group.long 0xE20++0x03
line.long 0x00 "GICD_NSACR8,Non-secure Access Control Register 8"
bitfld.long 0x00 30.--31. " NS_ACCESS143 ,Controls Non-secure access of the interrupt with ID143" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS142 ,Controls Non-secure access of the interrupt with ID142" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS141 ,Controls Non-secure access of the interrupt with ID141" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS140 ,Controls Non-secure access of the interrupt with ID140" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS139 ,Controls Non-secure access of the interrupt with ID139" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS138 ,Controls Non-secure access of the interrupt with ID138" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS137 ,Controls Non-secure access of the interrupt with ID137" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS136 ,Controls Non-secure access of the interrupt with ID136" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS135 ,Controls Non-secure access of the interrupt with ID135" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS134 ,Controls Non-secure access of the interrupt with ID134" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS133 ,Controls Non-secure access of the interrupt with ID133" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS132 ,Controls Non-secure access of the interrupt with ID132" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS131 ,Controls Non-secure access of the interrupt with ID131" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS130 ,Controls Non-secure access of the interrupt with ID130" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS129 ,Controls Non-secure access of the interrupt with ID129" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS128 ,Controls Non-secure access of the interrupt with ID128" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE20++0x03
hide.long 0x00 "GICD_NSACR8,Non-secure Access Control Register 8"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE24)))
group.long 0xE24++0x03
line.long 0x00 "GICD_NSACR9,Non-secure Access Control Register 9"
bitfld.long 0x00 30.--31. " NS_ACCESS159 ,Controls Non-secure access of the interrupt with ID159" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS158 ,Controls Non-secure access of the interrupt with ID158" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS157 ,Controls Non-secure access of the interrupt with ID157" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS156 ,Controls Non-secure access of the interrupt with ID156" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS155 ,Controls Non-secure access of the interrupt with ID155" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS154 ,Controls Non-secure access of the interrupt with ID154" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS153 ,Controls Non-secure access of the interrupt with ID153" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS152 ,Controls Non-secure access of the interrupt with ID152" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS151 ,Controls Non-secure access of the interrupt with ID151" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS150 ,Controls Non-secure access of the interrupt with ID150" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS149 ,Controls Non-secure access of the interrupt with ID149" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS148 ,Controls Non-secure access of the interrupt with ID148" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS147 ,Controls Non-secure access of the interrupt with ID147" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS146 ,Controls Non-secure access of the interrupt with ID146" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS145 ,Controls Non-secure access of the interrupt with ID145" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS144 ,Controls Non-secure access of the interrupt with ID144" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE24++0x03
hide.long 0x00 "GICD_NSACR9,Non-secure Access Control Register 9"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE28)))
group.long 0xE28++0x03
line.long 0x00 "GICD_NSACR10,Non-secure Access Control Register 10"
bitfld.long 0x00 30.--31. " NS_ACCESS175 ,Controls Non-secure access of the interrupt with ID175" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS174 ,Controls Non-secure access of the interrupt with ID174" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS173 ,Controls Non-secure access of the interrupt with ID173" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS172 ,Controls Non-secure access of the interrupt with ID172" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS171 ,Controls Non-secure access of the interrupt with ID171" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS170 ,Controls Non-secure access of the interrupt with ID170" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS169 ,Controls Non-secure access of the interrupt with ID169" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS168 ,Controls Non-secure access of the interrupt with ID168" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS167 ,Controls Non-secure access of the interrupt with ID167" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS166 ,Controls Non-secure access of the interrupt with ID166" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS165 ,Controls Non-secure access of the interrupt with ID165" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS164 ,Controls Non-secure access of the interrupt with ID164" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS163 ,Controls Non-secure access of the interrupt with ID163" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS162 ,Controls Non-secure access of the interrupt with ID162" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS161 ,Controls Non-secure access of the interrupt with ID161" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS160 ,Controls Non-secure access of the interrupt with ID160" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE28++0x03
hide.long 0x00 "GICD_NSACR10,Non-secure Access Control Register 10"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE2C)))
group.long 0xE2C++0x03
line.long 0x00 "GICD_NSACR11,Non-secure Access Control Register 11"
bitfld.long 0x00 30.--31. " NS_ACCESS191 ,Controls Non-secure access of the interrupt with ID191" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS190 ,Controls Non-secure access of the interrupt with ID190" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS189 ,Controls Non-secure access of the interrupt with ID189" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS188 ,Controls Non-secure access of the interrupt with ID188" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS187 ,Controls Non-secure access of the interrupt with ID187" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS186 ,Controls Non-secure access of the interrupt with ID186" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS185 ,Controls Non-secure access of the interrupt with ID185" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS184 ,Controls Non-secure access of the interrupt with ID184" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS183 ,Controls Non-secure access of the interrupt with ID183" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS182 ,Controls Non-secure access of the interrupt with ID182" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS181 ,Controls Non-secure access of the interrupt with ID181" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS180 ,Controls Non-secure access of the interrupt with ID180" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS179 ,Controls Non-secure access of the interrupt with ID179" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS178 ,Controls Non-secure access of the interrupt with ID178" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS177 ,Controls Non-secure access of the interrupt with ID177" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS176 ,Controls Non-secure access of the interrupt with ID176" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE2C++0x03
hide.long 0x00 "GICD_NSACR11,Non-secure Access Control Register 11"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE30)))
group.long 0xE30++0x03
line.long 0x00 "GICD_NSACR12,Non-secure Access Control Register 12"
bitfld.long 0x00 30.--31. " NS_ACCESS207 ,Controls Non-secure access of the interrupt with ID207" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS206 ,Controls Non-secure access of the interrupt with ID206" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS205 ,Controls Non-secure access of the interrupt with ID205" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS204 ,Controls Non-secure access of the interrupt with ID204" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS203 ,Controls Non-secure access of the interrupt with ID203" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS202 ,Controls Non-secure access of the interrupt with ID202" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS201 ,Controls Non-secure access of the interrupt with ID201" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS200 ,Controls Non-secure access of the interrupt with ID200" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS199 ,Controls Non-secure access of the interrupt with ID199" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS198 ,Controls Non-secure access of the interrupt with ID198" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS197 ,Controls Non-secure access of the interrupt with ID197" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS196 ,Controls Non-secure access of the interrupt with ID196" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS195 ,Controls Non-secure access of the interrupt with ID195" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS194 ,Controls Non-secure access of the interrupt with ID194" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS193 ,Controls Non-secure access of the interrupt with ID193" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS192 ,Controls Non-secure access of the interrupt with ID192" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE30++0x03
hide.long 0x00 "GICD_NSACR12,Non-secure Access Control Register 12"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE34)))
group.long 0xE34++0x03
line.long 0x00 "GICD_NSACR13,Non-secure Access Control Register 13"
bitfld.long 0x00 30.--31. " NS_ACCESS223 ,Controls Non-secure access of the interrupt with ID223" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS222 ,Controls Non-secure access of the interrupt with ID222" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS221 ,Controls Non-secure access of the interrupt with ID221" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS220 ,Controls Non-secure access of the interrupt with ID220" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS219 ,Controls Non-secure access of the interrupt with ID219" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS218 ,Controls Non-secure access of the interrupt with ID218" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS217 ,Controls Non-secure access of the interrupt with ID217" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS216 ,Controls Non-secure access of the interrupt with ID216" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS215 ,Controls Non-secure access of the interrupt with ID215" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS214 ,Controls Non-secure access of the interrupt with ID214" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS213 ,Controls Non-secure access of the interrupt with ID213" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS212 ,Controls Non-secure access of the interrupt with ID212" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS211 ,Controls Non-secure access of the interrupt with ID211" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS210 ,Controls Non-secure access of the interrupt with ID210" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS209 ,Controls Non-secure access of the interrupt with ID209" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS208 ,Controls Non-secure access of the interrupt with ID208" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE34++0x03
hide.long 0x00 "GICD_NSACR13,Non-secure Access Control Register 13"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE38)))
group.long 0xE38++0x03
line.long 0x00 "GICD_NSACR14,Non-secure Access Control Register 14"
bitfld.long 0x00 30.--31. " NS_ACCESS239 ,Controls Non-secure access of the interrupt with ID239" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS238 ,Controls Non-secure access of the interrupt with ID238" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS237 ,Controls Non-secure access of the interrupt with ID237" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS236 ,Controls Non-secure access of the interrupt with ID236" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS235 ,Controls Non-secure access of the interrupt with ID235" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS234 ,Controls Non-secure access of the interrupt with ID234" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS233 ,Controls Non-secure access of the interrupt with ID233" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS232 ,Controls Non-secure access of the interrupt with ID232" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS231 ,Controls Non-secure access of the interrupt with ID231" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS230 ,Controls Non-secure access of the interrupt with ID230" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS229 ,Controls Non-secure access of the interrupt with ID229" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS228 ,Controls Non-secure access of the interrupt with ID228" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS227 ,Controls Non-secure access of the interrupt with ID227" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS226 ,Controls Non-secure access of the interrupt with ID226" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS225 ,Controls Non-secure access of the interrupt with ID225" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS224 ,Controls Non-secure access of the interrupt with ID224" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE38++0x03
hide.long 0x00 "GICD_NSACR14,Non-secure Access Control Register 14"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE3C)))
group.long 0xE3C++0x03
line.long 0x00 "GICD_NSACR15,Non-secure Access Control Register 15"
bitfld.long 0x00 30.--31. " NS_ACCESS255 ,Controls Non-secure access of the interrupt with ID255" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS254 ,Controls Non-secure access of the interrupt with ID254" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS253 ,Controls Non-secure access of the interrupt with ID253" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS252 ,Controls Non-secure access of the interrupt with ID252" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS251 ,Controls Non-secure access of the interrupt with ID251" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS250 ,Controls Non-secure access of the interrupt with ID250" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS249 ,Controls Non-secure access of the interrupt with ID249" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS248 ,Controls Non-secure access of the interrupt with ID248" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS247 ,Controls Non-secure access of the interrupt with ID247" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS246 ,Controls Non-secure access of the interrupt with ID246" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS245 ,Controls Non-secure access of the interrupt with ID245" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS244 ,Controls Non-secure access of the interrupt with ID244" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS243 ,Controls Non-secure access of the interrupt with ID243" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS242 ,Controls Non-secure access of the interrupt with ID242" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS241 ,Controls Non-secure access of the interrupt with ID241" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS240 ,Controls Non-secure access of the interrupt with ID240" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE3C++0x03
hide.long 0x00 "GICD_NSACR15,Non-secure Access Control Register 15"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE40)))
group.long 0xE40++0x03
line.long 0x00 "GICD_NSACR16,Non-secure Access Control Register 16"
bitfld.long 0x00 30.--31. " NS_ACCESS271 ,Controls Non-secure access of the interrupt with ID271" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS270 ,Controls Non-secure access of the interrupt with ID270" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS269 ,Controls Non-secure access of the interrupt with ID269" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS268 ,Controls Non-secure access of the interrupt with ID268" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS267 ,Controls Non-secure access of the interrupt with ID267" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS266 ,Controls Non-secure access of the interrupt with ID266" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS265 ,Controls Non-secure access of the interrupt with ID265" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS264 ,Controls Non-secure access of the interrupt with ID264" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS263 ,Controls Non-secure access of the interrupt with ID263" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS262 ,Controls Non-secure access of the interrupt with ID262" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS261 ,Controls Non-secure access of the interrupt with ID261" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS260 ,Controls Non-secure access of the interrupt with ID260" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS259 ,Controls Non-secure access of the interrupt with ID259" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS258 ,Controls Non-secure access of the interrupt with ID258" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS257 ,Controls Non-secure access of the interrupt with ID257" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS256 ,Controls Non-secure access of the interrupt with ID256" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE40++0x03
hide.long 0x00 "GICD_NSACR16,Non-secure Access Control Register 16"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE44)))
group.long 0xE44++0x03
line.long 0x00 "GICD_NSACR17,Non-secure Access Control Register 17"
bitfld.long 0x00 30.--31. " NS_ACCESS287 ,Controls Non-secure access of the interrupt with ID287" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS286 ,Controls Non-secure access of the interrupt with ID286" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS285 ,Controls Non-secure access of the interrupt with ID285" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS284 ,Controls Non-secure access of the interrupt with ID284" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS283 ,Controls Non-secure access of the interrupt with ID283" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS282 ,Controls Non-secure access of the interrupt with ID282" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS281 ,Controls Non-secure access of the interrupt with ID281" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS280 ,Controls Non-secure access of the interrupt with ID280" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS279 ,Controls Non-secure access of the interrupt with ID279" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS278 ,Controls Non-secure access of the interrupt with ID278" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS277 ,Controls Non-secure access of the interrupt with ID277" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS276 ,Controls Non-secure access of the interrupt with ID276" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS275 ,Controls Non-secure access of the interrupt with ID275" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS274 ,Controls Non-secure access of the interrupt with ID274" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS273 ,Controls Non-secure access of the interrupt with ID273" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS272 ,Controls Non-secure access of the interrupt with ID272" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE44++0x03
hide.long 0x00 "GICD_NSACR17,Non-secure Access Control Register 17"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE48)))
group.long 0xE48++0x03
line.long 0x00 "GICD_NSACR18,Non-secure Access Control Register 18"
bitfld.long 0x00 30.--31. " NS_ACCESS303 ,Controls Non-secure access of the interrupt with ID303" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS302 ,Controls Non-secure access of the interrupt with ID302" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS301 ,Controls Non-secure access of the interrupt with ID301" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS300 ,Controls Non-secure access of the interrupt with ID300" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS299 ,Controls Non-secure access of the interrupt with ID299" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS298 ,Controls Non-secure access of the interrupt with ID298" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS297 ,Controls Non-secure access of the interrupt with ID297" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS296 ,Controls Non-secure access of the interrupt with ID296" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS295 ,Controls Non-secure access of the interrupt with ID295" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS294 ,Controls Non-secure access of the interrupt with ID294" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS293 ,Controls Non-secure access of the interrupt with ID293" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS292 ,Controls Non-secure access of the interrupt with ID292" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS291 ,Controls Non-secure access of the interrupt with ID291" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS290 ,Controls Non-secure access of the interrupt with ID290" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS289 ,Controls Non-secure access of the interrupt with ID289" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS288 ,Controls Non-secure access of the interrupt with ID288" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE48++0x03
hide.long 0x00 "GICD_NSACR18,Non-secure Access Control Register 18"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE4C)))
group.long 0xE4C++0x03
line.long 0x00 "GICD_NSACR19,Non-secure Access Control Register 19"
bitfld.long 0x00 30.--31. " NS_ACCESS319 ,Controls Non-secure access of the interrupt with ID319" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS318 ,Controls Non-secure access of the interrupt with ID318" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS317 ,Controls Non-secure access of the interrupt with ID317" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS316 ,Controls Non-secure access of the interrupt with ID316" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS315 ,Controls Non-secure access of the interrupt with ID315" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS314 ,Controls Non-secure access of the interrupt with ID314" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS313 ,Controls Non-secure access of the interrupt with ID313" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS312 ,Controls Non-secure access of the interrupt with ID312" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS311 ,Controls Non-secure access of the interrupt with ID311" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS310 ,Controls Non-secure access of the interrupt with ID310" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS309 ,Controls Non-secure access of the interrupt with ID309" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS308 ,Controls Non-secure access of the interrupt with ID308" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS307 ,Controls Non-secure access of the interrupt with ID307" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS306 ,Controls Non-secure access of the interrupt with ID306" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS305 ,Controls Non-secure access of the interrupt with ID305" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS304 ,Controls Non-secure access of the interrupt with ID304" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE4C++0x03
hide.long 0x00 "GICD_NSACR19,Non-secure Access Control Register 19"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE50)))
group.long 0xE50++0x03
line.long 0x00 "GICD_NSACR20,Non-secure Access Control Register 20"
bitfld.long 0x00 30.--31. " NS_ACCESS335 ,Controls Non-secure access of the interrupt with ID335" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS334 ,Controls Non-secure access of the interrupt with ID334" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS333 ,Controls Non-secure access of the interrupt with ID333" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS332 ,Controls Non-secure access of the interrupt with ID332" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS331 ,Controls Non-secure access of the interrupt with ID331" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS330 ,Controls Non-secure access of the interrupt with ID330" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS329 ,Controls Non-secure access of the interrupt with ID329" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS328 ,Controls Non-secure access of the interrupt with ID328" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS327 ,Controls Non-secure access of the interrupt with ID327" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS326 ,Controls Non-secure access of the interrupt with ID326" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS325 ,Controls Non-secure access of the interrupt with ID325" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS324 ,Controls Non-secure access of the interrupt with ID324" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS323 ,Controls Non-secure access of the interrupt with ID323" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS322 ,Controls Non-secure access of the interrupt with ID322" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS321 ,Controls Non-secure access of the interrupt with ID321" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS320 ,Controls Non-secure access of the interrupt with ID320" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE50++0x03
hide.long 0x00 "GICD_NSACR20,Non-secure Access Control Register 20"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE54)))
group.long 0xE54++0x03
line.long 0x00 "GICD_NSACR21,Non-secure Access Control Register 21"
bitfld.long 0x00 30.--31. " NS_ACCESS351 ,Controls Non-secure access of the interrupt with ID351" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS350 ,Controls Non-secure access of the interrupt with ID350" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS349 ,Controls Non-secure access of the interrupt with ID349" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS348 ,Controls Non-secure access of the interrupt with ID348" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS347 ,Controls Non-secure access of the interrupt with ID347" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS346 ,Controls Non-secure access of the interrupt with ID346" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS345 ,Controls Non-secure access of the interrupt with ID345" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS344 ,Controls Non-secure access of the interrupt with ID344" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS343 ,Controls Non-secure access of the interrupt with ID343" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS342 ,Controls Non-secure access of the interrupt with ID342" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS341 ,Controls Non-secure access of the interrupt with ID341" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS340 ,Controls Non-secure access of the interrupt with ID340" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS339 ,Controls Non-secure access of the interrupt with ID339" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS338 ,Controls Non-secure access of the interrupt with ID338" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS337 ,Controls Non-secure access of the interrupt with ID337" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS336 ,Controls Non-secure access of the interrupt with ID336" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE54++0x03
hide.long 0x00 "GICD_NSACR21,Non-secure Access Control Register 21"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE58)))
group.long 0xE58++0x03
line.long 0x00 "GICD_NSACR22,Non-secure Access Control Register 22"
bitfld.long 0x00 30.--31. " NS_ACCESS367 ,Controls Non-secure access of the interrupt with ID367" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS366 ,Controls Non-secure access of the interrupt with ID366" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS365 ,Controls Non-secure access of the interrupt with ID365" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS364 ,Controls Non-secure access of the interrupt with ID364" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS363 ,Controls Non-secure access of the interrupt with ID363" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS362 ,Controls Non-secure access of the interrupt with ID362" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS361 ,Controls Non-secure access of the interrupt with ID361" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS360 ,Controls Non-secure access of the interrupt with ID360" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS359 ,Controls Non-secure access of the interrupt with ID359" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS358 ,Controls Non-secure access of the interrupt with ID358" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS357 ,Controls Non-secure access of the interrupt with ID357" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS356 ,Controls Non-secure access of the interrupt with ID356" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS355 ,Controls Non-secure access of the interrupt with ID355" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS354 ,Controls Non-secure access of the interrupt with ID354" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS353 ,Controls Non-secure access of the interrupt with ID353" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS352 ,Controls Non-secure access of the interrupt with ID352" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE58++0x03
hide.long 0x00 "GICD_NSACR22,Non-secure Access Control Register 22"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE5C)))
group.long 0xE5C++0x03
line.long 0x00 "GICD_NSACR23,Non-secure Access Control Register 23"
bitfld.long 0x00 30.--31. " NS_ACCESS383 ,Controls Non-secure access of the interrupt with ID383" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS382 ,Controls Non-secure access of the interrupt with ID382" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS381 ,Controls Non-secure access of the interrupt with ID381" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS380 ,Controls Non-secure access of the interrupt with ID380" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS379 ,Controls Non-secure access of the interrupt with ID379" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS378 ,Controls Non-secure access of the interrupt with ID378" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS377 ,Controls Non-secure access of the interrupt with ID377" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS376 ,Controls Non-secure access of the interrupt with ID376" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS375 ,Controls Non-secure access of the interrupt with ID375" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS374 ,Controls Non-secure access of the interrupt with ID374" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS373 ,Controls Non-secure access of the interrupt with ID373" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS372 ,Controls Non-secure access of the interrupt with ID372" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS371 ,Controls Non-secure access of the interrupt with ID371" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS370 ,Controls Non-secure access of the interrupt with ID370" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS369 ,Controls Non-secure access of the interrupt with ID369" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS368 ,Controls Non-secure access of the interrupt with ID368" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE5C++0x03
hide.long 0x00 "GICD_NSACR23,Non-secure Access Control Register 23"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE60)))
group.long 0xE60++0x03
line.long 0x00 "GICD_NSACR24,Non-secure Access Control Register 24"
bitfld.long 0x00 30.--31. " NS_ACCESS399 ,Controls Non-secure access of the interrupt with ID399" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS398 ,Controls Non-secure access of the interrupt with ID398" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS397 ,Controls Non-secure access of the interrupt with ID397" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS396 ,Controls Non-secure access of the interrupt with ID396" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS395 ,Controls Non-secure access of the interrupt with ID395" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS394 ,Controls Non-secure access of the interrupt with ID394" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS393 ,Controls Non-secure access of the interrupt with ID393" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS392 ,Controls Non-secure access of the interrupt with ID392" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS391 ,Controls Non-secure access of the interrupt with ID391" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS390 ,Controls Non-secure access of the interrupt with ID390" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS389 ,Controls Non-secure access of the interrupt with ID389" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS388 ,Controls Non-secure access of the interrupt with ID388" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS387 ,Controls Non-secure access of the interrupt with ID387" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS386 ,Controls Non-secure access of the interrupt with ID386" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS385 ,Controls Non-secure access of the interrupt with ID385" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS384 ,Controls Non-secure access of the interrupt with ID384" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE60++0x03
hide.long 0x00 "GICD_NSACR24,Non-secure Access Control Register 24"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE64)))
group.long 0xE64++0x03
line.long 0x00 "GICD_NSACR25,Non-secure Access Control Register 25"
bitfld.long 0x00 30.--31. " NS_ACCESS415 ,Controls Non-secure access of the interrupt with ID415" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS414 ,Controls Non-secure access of the interrupt with ID414" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS413 ,Controls Non-secure access of the interrupt with ID413" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS412 ,Controls Non-secure access of the interrupt with ID412" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS411 ,Controls Non-secure access of the interrupt with ID411" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS410 ,Controls Non-secure access of the interrupt with ID410" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS409 ,Controls Non-secure access of the interrupt with ID409" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS408 ,Controls Non-secure access of the interrupt with ID408" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS407 ,Controls Non-secure access of the interrupt with ID407" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS406 ,Controls Non-secure access of the interrupt with ID406" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS405 ,Controls Non-secure access of the interrupt with ID405" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS404 ,Controls Non-secure access of the interrupt with ID404" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS403 ,Controls Non-secure access of the interrupt with ID403" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS402 ,Controls Non-secure access of the interrupt with ID402" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS401 ,Controls Non-secure access of the interrupt with ID401" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS400 ,Controls Non-secure access of the interrupt with ID400" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE64++0x03
hide.long 0x00 "GICD_NSACR25,Non-secure Access Control Register 25"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE68)))
group.long 0xE68++0x03
line.long 0x00 "GICD_NSACR26,Non-secure Access Control Register 26"
bitfld.long 0x00 30.--31. " NS_ACCESS431 ,Controls Non-secure access of the interrupt with ID431" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS430 ,Controls Non-secure access of the interrupt with ID430" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS429 ,Controls Non-secure access of the interrupt with ID429" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS428 ,Controls Non-secure access of the interrupt with ID428" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS427 ,Controls Non-secure access of the interrupt with ID427" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS426 ,Controls Non-secure access of the interrupt with ID426" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS425 ,Controls Non-secure access of the interrupt with ID425" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS424 ,Controls Non-secure access of the interrupt with ID424" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS423 ,Controls Non-secure access of the interrupt with ID423" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS422 ,Controls Non-secure access of the interrupt with ID422" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS421 ,Controls Non-secure access of the interrupt with ID421" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS420 ,Controls Non-secure access of the interrupt with ID420" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS419 ,Controls Non-secure access of the interrupt with ID419" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS418 ,Controls Non-secure access of the interrupt with ID418" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS417 ,Controls Non-secure access of the interrupt with ID417" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS416 ,Controls Non-secure access of the interrupt with ID416" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE68++0x03
hide.long 0x00 "GICD_NSACR26,Non-secure Access Control Register 26"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE6C)))
group.long 0xE6C++0x03
line.long 0x00 "GICD_NSACR27,Non-secure Access Control Register 27"
bitfld.long 0x00 30.--31. " NS_ACCESS447 ,Controls Non-secure access of the interrupt with ID447" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS446 ,Controls Non-secure access of the interrupt with ID446" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS445 ,Controls Non-secure access of the interrupt with ID445" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS444 ,Controls Non-secure access of the interrupt with ID444" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS443 ,Controls Non-secure access of the interrupt with ID443" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS442 ,Controls Non-secure access of the interrupt with ID442" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS441 ,Controls Non-secure access of the interrupt with ID441" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS440 ,Controls Non-secure access of the interrupt with ID440" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS439 ,Controls Non-secure access of the interrupt with ID439" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS438 ,Controls Non-secure access of the interrupt with ID438" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS437 ,Controls Non-secure access of the interrupt with ID437" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS436 ,Controls Non-secure access of the interrupt with ID436" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS435 ,Controls Non-secure access of the interrupt with ID435" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS434 ,Controls Non-secure access of the interrupt with ID434" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS433 ,Controls Non-secure access of the interrupt with ID433" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS432 ,Controls Non-secure access of the interrupt with ID432" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE6C++0x03
hide.long 0x00 "GICD_NSACR27,Non-secure Access Control Register 27"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE70)))
group.long 0xE70++0x03
line.long 0x00 "GICD_NSACR28,Non-secure Access Control Register 28"
bitfld.long 0x00 30.--31. " NS_ACCESS463 ,Controls Non-secure access of the interrupt with ID463" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS462 ,Controls Non-secure access of the interrupt with ID462" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS461 ,Controls Non-secure access of the interrupt with ID461" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS460 ,Controls Non-secure access of the interrupt with ID460" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS459 ,Controls Non-secure access of the interrupt with ID459" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS458 ,Controls Non-secure access of the interrupt with ID458" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS457 ,Controls Non-secure access of the interrupt with ID457" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS456 ,Controls Non-secure access of the interrupt with ID456" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS455 ,Controls Non-secure access of the interrupt with ID455" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS454 ,Controls Non-secure access of the interrupt with ID454" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS453 ,Controls Non-secure access of the interrupt with ID453" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS452 ,Controls Non-secure access of the interrupt with ID452" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS451 ,Controls Non-secure access of the interrupt with ID451" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS450 ,Controls Non-secure access of the interrupt with ID450" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS449 ,Controls Non-secure access of the interrupt with ID449" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS448 ,Controls Non-secure access of the interrupt with ID448" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE70++0x03
hide.long 0x00 "GICD_NSACR28,Non-secure Access Control Register 28"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE74)))
group.long 0xE74++0x03
line.long 0x00 "GICD_NSACR29,Non-secure Access Control Register 29"
bitfld.long 0x00 30.--31. " NS_ACCESS479 ,Controls Non-secure access of the interrupt with ID479" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS478 ,Controls Non-secure access of the interrupt with ID478" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS477 ,Controls Non-secure access of the interrupt with ID477" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS476 ,Controls Non-secure access of the interrupt with ID476" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS475 ,Controls Non-secure access of the interrupt with ID475" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS474 ,Controls Non-secure access of the interrupt with ID474" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS473 ,Controls Non-secure access of the interrupt with ID473" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS472 ,Controls Non-secure access of the interrupt with ID472" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS471 ,Controls Non-secure access of the interrupt with ID471" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS470 ,Controls Non-secure access of the interrupt with ID470" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS469 ,Controls Non-secure access of the interrupt with ID469" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS468 ,Controls Non-secure access of the interrupt with ID468" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS467 ,Controls Non-secure access of the interrupt with ID467" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS466 ,Controls Non-secure access of the interrupt with ID466" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS465 ,Controls Non-secure access of the interrupt with ID465" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS464 ,Controls Non-secure access of the interrupt with ID464" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE74++0x03
hide.long 0x00 "GICD_NSACR29,Non-secure Access Control Register 29"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE78)))
group.long 0xE78++0x03
line.long 0x00 "GICD_NSACR30,Non-secure Access Control Register 30"
bitfld.long 0x00 30.--31. " NS_ACCESS495 ,Controls Non-secure access of the interrupt with ID495" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS494 ,Controls Non-secure access of the interrupt with ID494" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS493 ,Controls Non-secure access of the interrupt with ID493" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS492 ,Controls Non-secure access of the interrupt with ID492" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS491 ,Controls Non-secure access of the interrupt with ID491" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS490 ,Controls Non-secure access of the interrupt with ID490" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS489 ,Controls Non-secure access of the interrupt with ID489" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS488 ,Controls Non-secure access of the interrupt with ID488" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS487 ,Controls Non-secure access of the interrupt with ID487" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS486 ,Controls Non-secure access of the interrupt with ID486" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS485 ,Controls Non-secure access of the interrupt with ID485" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS484 ,Controls Non-secure access of the interrupt with ID484" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS483 ,Controls Non-secure access of the interrupt with ID483" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS482 ,Controls Non-secure access of the interrupt with ID482" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS481 ,Controls Non-secure access of the interrupt with ID481" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS480 ,Controls Non-secure access of the interrupt with ID480" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE78++0x03
hide.long 0x00 "GICD_NSACR30,Non-secure Access Control Register 30"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE7C)))
group.long 0xE7C++0x03
line.long 0x00 "GICD_NSACR31,Non-secure Access Control Register 31"
bitfld.long 0x00 30.--31. " NS_ACCESS511 ,Controls Non-secure access of the interrupt with ID511" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS510 ,Controls Non-secure access of the interrupt with ID510" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS509 ,Controls Non-secure access of the interrupt with ID509" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS508 ,Controls Non-secure access of the interrupt with ID508" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS507 ,Controls Non-secure access of the interrupt with ID507" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS506 ,Controls Non-secure access of the interrupt with ID506" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS505 ,Controls Non-secure access of the interrupt with ID505" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS504 ,Controls Non-secure access of the interrupt with ID504" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS503 ,Controls Non-secure access of the interrupt with ID503" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS502 ,Controls Non-secure access of the interrupt with ID502" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS501 ,Controls Non-secure access of the interrupt with ID501" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS500 ,Controls Non-secure access of the interrupt with ID500" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS499 ,Controls Non-secure access of the interrupt with ID499" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS498 ,Controls Non-secure access of the interrupt with ID498" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS497 ,Controls Non-secure access of the interrupt with ID497" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS496 ,Controls Non-secure access of the interrupt with ID496" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE7C++0x03
hide.long 0x00 "GICD_NSACR31,Non-secure Access Control Register 31"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE80)))
group.long 0xE80++0x03
line.long 0x00 "GICD_NSACR32,Non-secure Access Control Register 32"
bitfld.long 0x00 30.--31. " NS_ACCESS527 ,Controls Non-secure access of the interrupt with ID527" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS526 ,Controls Non-secure access of the interrupt with ID526" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS525 ,Controls Non-secure access of the interrupt with ID525" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS524 ,Controls Non-secure access of the interrupt with ID524" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS523 ,Controls Non-secure access of the interrupt with ID523" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS522 ,Controls Non-secure access of the interrupt with ID522" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS521 ,Controls Non-secure access of the interrupt with ID521" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS520 ,Controls Non-secure access of the interrupt with ID520" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS519 ,Controls Non-secure access of the interrupt with ID519" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS518 ,Controls Non-secure access of the interrupt with ID518" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS517 ,Controls Non-secure access of the interrupt with ID517" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS516 ,Controls Non-secure access of the interrupt with ID516" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS515 ,Controls Non-secure access of the interrupt with ID515" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS514 ,Controls Non-secure access of the interrupt with ID514" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS513 ,Controls Non-secure access of the interrupt with ID513" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS512 ,Controls Non-secure access of the interrupt with ID512" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE80++0x03
hide.long 0x00 "GICD_NSACR32,Non-secure Access Control Register 32"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE84)))
group.long 0xE84++0x03
line.long 0x00 "GICD_NSACR33,Non-secure Access Control Register 33"
bitfld.long 0x00 30.--31. " NS_ACCESS543 ,Controls Non-secure access of the interrupt with ID543" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS542 ,Controls Non-secure access of the interrupt with ID542" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS541 ,Controls Non-secure access of the interrupt with ID541" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS540 ,Controls Non-secure access of the interrupt with ID540" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS539 ,Controls Non-secure access of the interrupt with ID539" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS538 ,Controls Non-secure access of the interrupt with ID538" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS537 ,Controls Non-secure access of the interrupt with ID537" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS536 ,Controls Non-secure access of the interrupt with ID536" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS535 ,Controls Non-secure access of the interrupt with ID535" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS534 ,Controls Non-secure access of the interrupt with ID534" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS533 ,Controls Non-secure access of the interrupt with ID533" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS532 ,Controls Non-secure access of the interrupt with ID532" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS531 ,Controls Non-secure access of the interrupt with ID531" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS530 ,Controls Non-secure access of the interrupt with ID530" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS529 ,Controls Non-secure access of the interrupt with ID529" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS528 ,Controls Non-secure access of the interrupt with ID528" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE84++0x03
hide.long 0x00 "GICD_NSACR33,Non-secure Access Control Register 33"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE88)))
group.long 0xE88++0x03
line.long 0x00 "GICD_NSACR34,Non-secure Access Control Register 34"
bitfld.long 0x00 30.--31. " NS_ACCESS559 ,Controls Non-secure access of the interrupt with ID559" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS558 ,Controls Non-secure access of the interrupt with ID558" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS557 ,Controls Non-secure access of the interrupt with ID557" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS556 ,Controls Non-secure access of the interrupt with ID556" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS555 ,Controls Non-secure access of the interrupt with ID555" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS554 ,Controls Non-secure access of the interrupt with ID554" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS553 ,Controls Non-secure access of the interrupt with ID553" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS552 ,Controls Non-secure access of the interrupt with ID552" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS551 ,Controls Non-secure access of the interrupt with ID551" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS550 ,Controls Non-secure access of the interrupt with ID550" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS549 ,Controls Non-secure access of the interrupt with ID549" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS548 ,Controls Non-secure access of the interrupt with ID548" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS547 ,Controls Non-secure access of the interrupt with ID547" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS546 ,Controls Non-secure access of the interrupt with ID546" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS545 ,Controls Non-secure access of the interrupt with ID545" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS544 ,Controls Non-secure access of the interrupt with ID544" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE88++0x03
hide.long 0x00 "GICD_NSACR34,Non-secure Access Control Register 34"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE8C)))
group.long 0xE8C++0x03
line.long 0x00 "GICD_NSACR35,Non-secure Access Control Register 35"
bitfld.long 0x00 30.--31. " NS_ACCESS575 ,Controls Non-secure access of the interrupt with ID575" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS574 ,Controls Non-secure access of the interrupt with ID574" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS573 ,Controls Non-secure access of the interrupt with ID573" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS572 ,Controls Non-secure access of the interrupt with ID572" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS571 ,Controls Non-secure access of the interrupt with ID571" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS570 ,Controls Non-secure access of the interrupt with ID570" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS569 ,Controls Non-secure access of the interrupt with ID569" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS568 ,Controls Non-secure access of the interrupt with ID568" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS567 ,Controls Non-secure access of the interrupt with ID567" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS566 ,Controls Non-secure access of the interrupt with ID566" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS565 ,Controls Non-secure access of the interrupt with ID565" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS564 ,Controls Non-secure access of the interrupt with ID564" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS563 ,Controls Non-secure access of the interrupt with ID563" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS562 ,Controls Non-secure access of the interrupt with ID562" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS561 ,Controls Non-secure access of the interrupt with ID561" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS560 ,Controls Non-secure access of the interrupt with ID560" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE8C++0x03
hide.long 0x00 "GICD_NSACR35,Non-secure Access Control Register 35"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE90)))
group.long 0xE90++0x03
line.long 0x00 "GICD_NSACR36,Non-secure Access Control Register 36"
bitfld.long 0x00 30.--31. " NS_ACCESS591 ,Controls Non-secure access of the interrupt with ID591" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS590 ,Controls Non-secure access of the interrupt with ID590" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS589 ,Controls Non-secure access of the interrupt with ID589" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS588 ,Controls Non-secure access of the interrupt with ID588" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS587 ,Controls Non-secure access of the interrupt with ID587" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS586 ,Controls Non-secure access of the interrupt with ID586" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS585 ,Controls Non-secure access of the interrupt with ID585" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS584 ,Controls Non-secure access of the interrupt with ID584" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS583 ,Controls Non-secure access of the interrupt with ID583" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS582 ,Controls Non-secure access of the interrupt with ID582" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS581 ,Controls Non-secure access of the interrupt with ID581" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS580 ,Controls Non-secure access of the interrupt with ID580" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS579 ,Controls Non-secure access of the interrupt with ID579" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS578 ,Controls Non-secure access of the interrupt with ID578" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS577 ,Controls Non-secure access of the interrupt with ID577" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS576 ,Controls Non-secure access of the interrupt with ID576" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE90++0x03
hide.long 0x00 "GICD_NSACR36,Non-secure Access Control Register 36"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE94)))
group.long 0xE94++0x03
line.long 0x00 "GICD_NSACR37,Non-secure Access Control Register 37"
bitfld.long 0x00 30.--31. " NS_ACCESS607 ,Controls Non-secure access of the interrupt with ID607" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS606 ,Controls Non-secure access of the interrupt with ID606" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS605 ,Controls Non-secure access of the interrupt with ID605" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS604 ,Controls Non-secure access of the interrupt with ID604" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS603 ,Controls Non-secure access of the interrupt with ID603" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS602 ,Controls Non-secure access of the interrupt with ID602" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS601 ,Controls Non-secure access of the interrupt with ID601" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS600 ,Controls Non-secure access of the interrupt with ID600" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS599 ,Controls Non-secure access of the interrupt with ID599" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS598 ,Controls Non-secure access of the interrupt with ID598" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS597 ,Controls Non-secure access of the interrupt with ID597" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS596 ,Controls Non-secure access of the interrupt with ID596" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS595 ,Controls Non-secure access of the interrupt with ID595" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS594 ,Controls Non-secure access of the interrupt with ID594" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS593 ,Controls Non-secure access of the interrupt with ID593" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS592 ,Controls Non-secure access of the interrupt with ID592" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE94++0x03
hide.long 0x00 "GICD_NSACR37,Non-secure Access Control Register 37"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE98)))
group.long 0xE98++0x03
line.long 0x00 "GICD_NSACR38,Non-secure Access Control Register 38"
bitfld.long 0x00 30.--31. " NS_ACCESS623 ,Controls Non-secure access of the interrupt with ID623" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS622 ,Controls Non-secure access of the interrupt with ID622" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS621 ,Controls Non-secure access of the interrupt with ID621" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS620 ,Controls Non-secure access of the interrupt with ID620" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS619 ,Controls Non-secure access of the interrupt with ID619" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS618 ,Controls Non-secure access of the interrupt with ID618" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS617 ,Controls Non-secure access of the interrupt with ID617" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS616 ,Controls Non-secure access of the interrupt with ID616" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS615 ,Controls Non-secure access of the interrupt with ID615" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS614 ,Controls Non-secure access of the interrupt with ID614" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS613 ,Controls Non-secure access of the interrupt with ID613" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS612 ,Controls Non-secure access of the interrupt with ID612" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS611 ,Controls Non-secure access of the interrupt with ID611" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS610 ,Controls Non-secure access of the interrupt with ID610" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS609 ,Controls Non-secure access of the interrupt with ID609" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS608 ,Controls Non-secure access of the interrupt with ID608" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE98++0x03
hide.long 0x00 "GICD_NSACR38,Non-secure Access Control Register 38"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE9C)))
group.long 0xE9C++0x03
line.long 0x00 "GICD_NSACR39,Non-secure Access Control Register 39"
bitfld.long 0x00 30.--31. " NS_ACCESS639 ,Controls Non-secure access of the interrupt with ID639" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS638 ,Controls Non-secure access of the interrupt with ID638" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS637 ,Controls Non-secure access of the interrupt with ID637" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS636 ,Controls Non-secure access of the interrupt with ID636" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS635 ,Controls Non-secure access of the interrupt with ID635" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS634 ,Controls Non-secure access of the interrupt with ID634" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS633 ,Controls Non-secure access of the interrupt with ID633" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS632 ,Controls Non-secure access of the interrupt with ID632" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS631 ,Controls Non-secure access of the interrupt with ID631" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS630 ,Controls Non-secure access of the interrupt with ID630" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS629 ,Controls Non-secure access of the interrupt with ID629" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS628 ,Controls Non-secure access of the interrupt with ID628" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS627 ,Controls Non-secure access of the interrupt with ID627" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS626 ,Controls Non-secure access of the interrupt with ID626" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS625 ,Controls Non-secure access of the interrupt with ID625" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS624 ,Controls Non-secure access of the interrupt with ID624" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE9C++0x03
hide.long 0x00 "GICD_NSACR39,Non-secure Access Control Register 39"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEA0)))
group.long 0xEA0++0x03
line.long 0x00 "GICD_NSACR40,Non-secure Access Control Register 40"
bitfld.long 0x00 30.--31. " NS_ACCESS655 ,Controls Non-secure access of the interrupt with ID655" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS654 ,Controls Non-secure access of the interrupt with ID654" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS653 ,Controls Non-secure access of the interrupt with ID653" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS652 ,Controls Non-secure access of the interrupt with ID652" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS651 ,Controls Non-secure access of the interrupt with ID651" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS650 ,Controls Non-secure access of the interrupt with ID650" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS649 ,Controls Non-secure access of the interrupt with ID649" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS648 ,Controls Non-secure access of the interrupt with ID648" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS647 ,Controls Non-secure access of the interrupt with ID647" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS646 ,Controls Non-secure access of the interrupt with ID646" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS645 ,Controls Non-secure access of the interrupt with ID645" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS644 ,Controls Non-secure access of the interrupt with ID644" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS643 ,Controls Non-secure access of the interrupt with ID643" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS642 ,Controls Non-secure access of the interrupt with ID642" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS641 ,Controls Non-secure access of the interrupt with ID641" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS640 ,Controls Non-secure access of the interrupt with ID640" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEA0++0x03
hide.long 0x00 "GICD_NSACR40,Non-secure Access Control Register 40"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEA4)))
group.long 0xEA4++0x03
line.long 0x00 "GICD_NSACR41,Non-secure Access Control Register 41"
bitfld.long 0x00 30.--31. " NS_ACCESS671 ,Controls Non-secure access of the interrupt with ID671" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS670 ,Controls Non-secure access of the interrupt with ID670" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS669 ,Controls Non-secure access of the interrupt with ID669" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS668 ,Controls Non-secure access of the interrupt with ID668" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS667 ,Controls Non-secure access of the interrupt with ID667" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS666 ,Controls Non-secure access of the interrupt with ID666" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS665 ,Controls Non-secure access of the interrupt with ID665" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS664 ,Controls Non-secure access of the interrupt with ID664" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS663 ,Controls Non-secure access of the interrupt with ID663" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS662 ,Controls Non-secure access of the interrupt with ID662" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS661 ,Controls Non-secure access of the interrupt with ID661" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS660 ,Controls Non-secure access of the interrupt with ID660" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS659 ,Controls Non-secure access of the interrupt with ID659" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS658 ,Controls Non-secure access of the interrupt with ID658" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS657 ,Controls Non-secure access of the interrupt with ID657" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS656 ,Controls Non-secure access of the interrupt with ID656" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEA4++0x03
hide.long 0x00 "GICD_NSACR41,Non-secure Access Control Register 41"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEA8)))
group.long 0xEA8++0x03
line.long 0x00 "GICD_NSACR42,Non-secure Access Control Register 42"
bitfld.long 0x00 30.--31. " NS_ACCESS687 ,Controls Non-secure access of the interrupt with ID687" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS686 ,Controls Non-secure access of the interrupt with ID686" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS685 ,Controls Non-secure access of the interrupt with ID685" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS684 ,Controls Non-secure access of the interrupt with ID684" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS683 ,Controls Non-secure access of the interrupt with ID683" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS682 ,Controls Non-secure access of the interrupt with ID682" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS681 ,Controls Non-secure access of the interrupt with ID681" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS680 ,Controls Non-secure access of the interrupt with ID680" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS679 ,Controls Non-secure access of the interrupt with ID679" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS678 ,Controls Non-secure access of the interrupt with ID678" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS677 ,Controls Non-secure access of the interrupt with ID677" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS676 ,Controls Non-secure access of the interrupt with ID676" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS675 ,Controls Non-secure access of the interrupt with ID675" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS674 ,Controls Non-secure access of the interrupt with ID674" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS673 ,Controls Non-secure access of the interrupt with ID673" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS672 ,Controls Non-secure access of the interrupt with ID672" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEA8++0x03
hide.long 0x00 "GICD_NSACR42,Non-secure Access Control Register 42"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEAC)))
group.long 0xEAC++0x03
line.long 0x00 "GICD_NSACR43,Non-secure Access Control Register 43"
bitfld.long 0x00 30.--31. " NS_ACCESS703 ,Controls Non-secure access of the interrupt with ID703" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS702 ,Controls Non-secure access of the interrupt with ID702" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS701 ,Controls Non-secure access of the interrupt with ID701" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS700 ,Controls Non-secure access of the interrupt with ID700" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS699 ,Controls Non-secure access of the interrupt with ID699" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS698 ,Controls Non-secure access of the interrupt with ID698" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS697 ,Controls Non-secure access of the interrupt with ID697" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS696 ,Controls Non-secure access of the interrupt with ID696" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS695 ,Controls Non-secure access of the interrupt with ID695" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS694 ,Controls Non-secure access of the interrupt with ID694" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS693 ,Controls Non-secure access of the interrupt with ID693" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS692 ,Controls Non-secure access of the interrupt with ID692" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS691 ,Controls Non-secure access of the interrupt with ID691" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS690 ,Controls Non-secure access of the interrupt with ID690" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS689 ,Controls Non-secure access of the interrupt with ID689" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS688 ,Controls Non-secure access of the interrupt with ID688" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEAC++0x03
hide.long 0x00 "GICD_NSACR43,Non-secure Access Control Register 43"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEB0)))
group.long 0xEB0++0x03
line.long 0x00 "GICD_NSACR44,Non-secure Access Control Register 44"
bitfld.long 0x00 30.--31. " NS_ACCESS719 ,Controls Non-secure access of the interrupt with ID719" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS718 ,Controls Non-secure access of the interrupt with ID718" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS717 ,Controls Non-secure access of the interrupt with ID717" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS716 ,Controls Non-secure access of the interrupt with ID716" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS715 ,Controls Non-secure access of the interrupt with ID715" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS714 ,Controls Non-secure access of the interrupt with ID714" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS713 ,Controls Non-secure access of the interrupt with ID713" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS712 ,Controls Non-secure access of the interrupt with ID712" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS711 ,Controls Non-secure access of the interrupt with ID711" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS710 ,Controls Non-secure access of the interrupt with ID710" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS709 ,Controls Non-secure access of the interrupt with ID709" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS708 ,Controls Non-secure access of the interrupt with ID708" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS707 ,Controls Non-secure access of the interrupt with ID707" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS706 ,Controls Non-secure access of the interrupt with ID706" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS705 ,Controls Non-secure access of the interrupt with ID705" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS704 ,Controls Non-secure access of the interrupt with ID704" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEB0++0x03
hide.long 0x00 "GICD_NSACR44,Non-secure Access Control Register 44"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEB4)))
group.long 0xEB4++0x03
line.long 0x00 "GICD_NSACR45,Non-secure Access Control Register 45"
bitfld.long 0x00 30.--31. " NS_ACCESS735 ,Controls Non-secure access of the interrupt with ID735" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS734 ,Controls Non-secure access of the interrupt with ID734" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS733 ,Controls Non-secure access of the interrupt with ID733" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS732 ,Controls Non-secure access of the interrupt with ID732" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS731 ,Controls Non-secure access of the interrupt with ID731" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS730 ,Controls Non-secure access of the interrupt with ID730" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS729 ,Controls Non-secure access of the interrupt with ID729" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS728 ,Controls Non-secure access of the interrupt with ID728" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS727 ,Controls Non-secure access of the interrupt with ID727" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS726 ,Controls Non-secure access of the interrupt with ID726" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS725 ,Controls Non-secure access of the interrupt with ID725" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS724 ,Controls Non-secure access of the interrupt with ID724" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS723 ,Controls Non-secure access of the interrupt with ID723" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS722 ,Controls Non-secure access of the interrupt with ID722" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS721 ,Controls Non-secure access of the interrupt with ID721" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS720 ,Controls Non-secure access of the interrupt with ID720" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEB4++0x03
hide.long 0x00 "GICD_NSACR45,Non-secure Access Control Register 45"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEB8)))
group.long 0xEB8++0x03
line.long 0x00 "GICD_NSACR46,Non-secure Access Control Register 46"
bitfld.long 0x00 30.--31. " NS_ACCESS751 ,Controls Non-secure access of the interrupt with ID751" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS750 ,Controls Non-secure access of the interrupt with ID750" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS749 ,Controls Non-secure access of the interrupt with ID749" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS748 ,Controls Non-secure access of the interrupt with ID748" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS747 ,Controls Non-secure access of the interrupt with ID747" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS746 ,Controls Non-secure access of the interrupt with ID746" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS745 ,Controls Non-secure access of the interrupt with ID745" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS744 ,Controls Non-secure access of the interrupt with ID744" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS743 ,Controls Non-secure access of the interrupt with ID743" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS742 ,Controls Non-secure access of the interrupt with ID742" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS741 ,Controls Non-secure access of the interrupt with ID741" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS740 ,Controls Non-secure access of the interrupt with ID740" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS739 ,Controls Non-secure access of the interrupt with ID739" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS738 ,Controls Non-secure access of the interrupt with ID738" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS737 ,Controls Non-secure access of the interrupt with ID737" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS736 ,Controls Non-secure access of the interrupt with ID736" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEB8++0x03
hide.long 0x00 "GICD_NSACR46,Non-secure Access Control Register 46"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEBC)))
group.long 0xEBC++0x03
line.long 0x00 "GICD_NSACR47,Non-secure Access Control Register 47"
bitfld.long 0x00 30.--31. " NS_ACCESS767 ,Controls Non-secure access of the interrupt with ID767" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS766 ,Controls Non-secure access of the interrupt with ID766" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS765 ,Controls Non-secure access of the interrupt with ID765" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS764 ,Controls Non-secure access of the interrupt with ID764" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS763 ,Controls Non-secure access of the interrupt with ID763" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS762 ,Controls Non-secure access of the interrupt with ID762" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS761 ,Controls Non-secure access of the interrupt with ID761" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS760 ,Controls Non-secure access of the interrupt with ID760" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS759 ,Controls Non-secure access of the interrupt with ID759" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS758 ,Controls Non-secure access of the interrupt with ID758" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS757 ,Controls Non-secure access of the interrupt with ID757" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS756 ,Controls Non-secure access of the interrupt with ID756" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS755 ,Controls Non-secure access of the interrupt with ID755" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS754 ,Controls Non-secure access of the interrupt with ID754" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS753 ,Controls Non-secure access of the interrupt with ID753" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS752 ,Controls Non-secure access of the interrupt with ID752" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEBC++0x03
hide.long 0x00 "GICD_NSACR47,Non-secure Access Control Register 47"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEC0)))
group.long 0xEC0++0x03
line.long 0x00 "GICD_NSACR48,Non-secure Access Control Register 48"
bitfld.long 0x00 30.--31. " NS_ACCESS783 ,Controls Non-secure access of the interrupt with ID783" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS782 ,Controls Non-secure access of the interrupt with ID782" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS781 ,Controls Non-secure access of the interrupt with ID781" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS780 ,Controls Non-secure access of the interrupt with ID780" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS779 ,Controls Non-secure access of the interrupt with ID779" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS778 ,Controls Non-secure access of the interrupt with ID778" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS777 ,Controls Non-secure access of the interrupt with ID777" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS776 ,Controls Non-secure access of the interrupt with ID776" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS775 ,Controls Non-secure access of the interrupt with ID775" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS774 ,Controls Non-secure access of the interrupt with ID774" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS773 ,Controls Non-secure access of the interrupt with ID773" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS772 ,Controls Non-secure access of the interrupt with ID772" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS771 ,Controls Non-secure access of the interrupt with ID771" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS770 ,Controls Non-secure access of the interrupt with ID770" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS769 ,Controls Non-secure access of the interrupt with ID769" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS768 ,Controls Non-secure access of the interrupt with ID768" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEC0++0x03
hide.long 0x00 "GICD_NSACR48,Non-secure Access Control Register 48"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEC4)))
group.long 0xEC4++0x03
line.long 0x00 "GICD_NSACR49,Non-secure Access Control Register 49"
bitfld.long 0x00 30.--31. " NS_ACCESS799 ,Controls Non-secure access of the interrupt with ID799" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS798 ,Controls Non-secure access of the interrupt with ID798" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS797 ,Controls Non-secure access of the interrupt with ID797" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS796 ,Controls Non-secure access of the interrupt with ID796" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS795 ,Controls Non-secure access of the interrupt with ID795" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS794 ,Controls Non-secure access of the interrupt with ID794" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS793 ,Controls Non-secure access of the interrupt with ID793" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS792 ,Controls Non-secure access of the interrupt with ID792" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS791 ,Controls Non-secure access of the interrupt with ID791" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS790 ,Controls Non-secure access of the interrupt with ID790" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS789 ,Controls Non-secure access of the interrupt with ID789" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS788 ,Controls Non-secure access of the interrupt with ID788" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS787 ,Controls Non-secure access of the interrupt with ID787" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS786 ,Controls Non-secure access of the interrupt with ID786" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS785 ,Controls Non-secure access of the interrupt with ID785" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS784 ,Controls Non-secure access of the interrupt with ID784" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEC4++0x03
hide.long 0x00 "GICD_NSACR49,Non-secure Access Control Register 49"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEC8)))
group.long 0xEC8++0x03
line.long 0x00 "GICD_NSACR50,Non-secure Access Control Register 50"
bitfld.long 0x00 30.--31. " NS_ACCESS815 ,Controls Non-secure access of the interrupt with ID815" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS814 ,Controls Non-secure access of the interrupt with ID814" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS813 ,Controls Non-secure access of the interrupt with ID813" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS812 ,Controls Non-secure access of the interrupt with ID812" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS811 ,Controls Non-secure access of the interrupt with ID811" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS810 ,Controls Non-secure access of the interrupt with ID810" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS809 ,Controls Non-secure access of the interrupt with ID809" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS808 ,Controls Non-secure access of the interrupt with ID808" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS807 ,Controls Non-secure access of the interrupt with ID807" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS806 ,Controls Non-secure access of the interrupt with ID806" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS805 ,Controls Non-secure access of the interrupt with ID805" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS804 ,Controls Non-secure access of the interrupt with ID804" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS803 ,Controls Non-secure access of the interrupt with ID803" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS802 ,Controls Non-secure access of the interrupt with ID802" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS801 ,Controls Non-secure access of the interrupt with ID801" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS800 ,Controls Non-secure access of the interrupt with ID800" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEC8++0x03
hide.long 0x00 "GICD_NSACR50,Non-secure Access Control Register 50"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xECC)))
group.long 0xECC++0x03
line.long 0x00 "GICD_NSACR51,Non-secure Access Control Register 51"
bitfld.long 0x00 30.--31. " NS_ACCESS831 ,Controls Non-secure access of the interrupt with ID831" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS830 ,Controls Non-secure access of the interrupt with ID830" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS829 ,Controls Non-secure access of the interrupt with ID829" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS828 ,Controls Non-secure access of the interrupt with ID828" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS827 ,Controls Non-secure access of the interrupt with ID827" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS826 ,Controls Non-secure access of the interrupt with ID826" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS825 ,Controls Non-secure access of the interrupt with ID825" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS824 ,Controls Non-secure access of the interrupt with ID824" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS823 ,Controls Non-secure access of the interrupt with ID823" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS822 ,Controls Non-secure access of the interrupt with ID822" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS821 ,Controls Non-secure access of the interrupt with ID821" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS820 ,Controls Non-secure access of the interrupt with ID820" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS819 ,Controls Non-secure access of the interrupt with ID819" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS818 ,Controls Non-secure access of the interrupt with ID818" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS817 ,Controls Non-secure access of the interrupt with ID817" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS816 ,Controls Non-secure access of the interrupt with ID816" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xECC++0x03
hide.long 0x00 "GICD_NSACR51,Non-secure Access Control Register 51"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xED0)))
group.long 0xED0++0x03
line.long 0x00 "GICD_NSACR52,Non-secure Access Control Register 52"
bitfld.long 0x00 30.--31. " NS_ACCESS847 ,Controls Non-secure access of the interrupt with ID847" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS846 ,Controls Non-secure access of the interrupt with ID846" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS845 ,Controls Non-secure access of the interrupt with ID845" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS844 ,Controls Non-secure access of the interrupt with ID844" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS843 ,Controls Non-secure access of the interrupt with ID843" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS842 ,Controls Non-secure access of the interrupt with ID842" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS841 ,Controls Non-secure access of the interrupt with ID841" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS840 ,Controls Non-secure access of the interrupt with ID840" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS839 ,Controls Non-secure access of the interrupt with ID839" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS838 ,Controls Non-secure access of the interrupt with ID838" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS837 ,Controls Non-secure access of the interrupt with ID837" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS836 ,Controls Non-secure access of the interrupt with ID836" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS835 ,Controls Non-secure access of the interrupt with ID835" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS834 ,Controls Non-secure access of the interrupt with ID834" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS833 ,Controls Non-secure access of the interrupt with ID833" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS832 ,Controls Non-secure access of the interrupt with ID832" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xED0++0x03
hide.long 0x00 "GICD_NSACR52,Non-secure Access Control Register 52"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xED4)))
group.long 0xED4++0x03
line.long 0x00 "GICD_NSACR53,Non-secure Access Control Register 53"
bitfld.long 0x00 30.--31. " NS_ACCESS863 ,Controls Non-secure access of the interrupt with ID863" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS862 ,Controls Non-secure access of the interrupt with ID862" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS861 ,Controls Non-secure access of the interrupt with ID861" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS860 ,Controls Non-secure access of the interrupt with ID860" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS859 ,Controls Non-secure access of the interrupt with ID859" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS858 ,Controls Non-secure access of the interrupt with ID858" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS857 ,Controls Non-secure access of the interrupt with ID857" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS856 ,Controls Non-secure access of the interrupt with ID856" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS855 ,Controls Non-secure access of the interrupt with ID855" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS854 ,Controls Non-secure access of the interrupt with ID854" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS853 ,Controls Non-secure access of the interrupt with ID853" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS852 ,Controls Non-secure access of the interrupt with ID852" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS851 ,Controls Non-secure access of the interrupt with ID851" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS850 ,Controls Non-secure access of the interrupt with ID850" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS849 ,Controls Non-secure access of the interrupt with ID849" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS848 ,Controls Non-secure access of the interrupt with ID848" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xED4++0x03
hide.long 0x00 "GICD_NSACR53,Non-secure Access Control Register 53"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xED8)))
group.long 0xED8++0x03
line.long 0x00 "GICD_NSACR54,Non-secure Access Control Register 54"
bitfld.long 0x00 30.--31. " NS_ACCESS879 ,Controls Non-secure access of the interrupt with ID879" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS878 ,Controls Non-secure access of the interrupt with ID878" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS877 ,Controls Non-secure access of the interrupt with ID877" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS876 ,Controls Non-secure access of the interrupt with ID876" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS875 ,Controls Non-secure access of the interrupt with ID875" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS874 ,Controls Non-secure access of the interrupt with ID874" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS873 ,Controls Non-secure access of the interrupt with ID873" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS872 ,Controls Non-secure access of the interrupt with ID872" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS871 ,Controls Non-secure access of the interrupt with ID871" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS870 ,Controls Non-secure access of the interrupt with ID870" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS869 ,Controls Non-secure access of the interrupt with ID869" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS868 ,Controls Non-secure access of the interrupt with ID868" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS867 ,Controls Non-secure access of the interrupt with ID867" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS866 ,Controls Non-secure access of the interrupt with ID866" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS865 ,Controls Non-secure access of the interrupt with ID865" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS864 ,Controls Non-secure access of the interrupt with ID864" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xED8++0x03
hide.long 0x00 "GICD_NSACR54,Non-secure Access Control Register 54"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEDC)))
group.long 0xEDC++0x03
line.long 0x00 "GICD_NSACR55,Non-secure Access Control Register 55"
bitfld.long 0x00 30.--31. " NS_ACCESS895 ,Controls Non-secure access of the interrupt with ID895" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS894 ,Controls Non-secure access of the interrupt with ID894" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS893 ,Controls Non-secure access of the interrupt with ID893" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS892 ,Controls Non-secure access of the interrupt with ID892" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS891 ,Controls Non-secure access of the interrupt with ID891" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS890 ,Controls Non-secure access of the interrupt with ID890" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS889 ,Controls Non-secure access of the interrupt with ID889" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS888 ,Controls Non-secure access of the interrupt with ID888" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS887 ,Controls Non-secure access of the interrupt with ID887" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS886 ,Controls Non-secure access of the interrupt with ID886" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS885 ,Controls Non-secure access of the interrupt with ID885" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS884 ,Controls Non-secure access of the interrupt with ID884" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS883 ,Controls Non-secure access of the interrupt with ID883" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS882 ,Controls Non-secure access of the interrupt with ID882" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS881 ,Controls Non-secure access of the interrupt with ID881" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS880 ,Controls Non-secure access of the interrupt with ID880" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEDC++0x03
hide.long 0x00 "GICD_NSACR55,Non-secure Access Control Register 55"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEE0)))
group.long 0xEE0++0x03
line.long 0x00 "GICD_NSACR56,Non-secure Access Control Register 56"
bitfld.long 0x00 30.--31. " NS_ACCESS911 ,Controls Non-secure access of the interrupt with ID911" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS910 ,Controls Non-secure access of the interrupt with ID910" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS909 ,Controls Non-secure access of the interrupt with ID909" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS908 ,Controls Non-secure access of the interrupt with ID908" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS907 ,Controls Non-secure access of the interrupt with ID907" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS906 ,Controls Non-secure access of the interrupt with ID906" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS905 ,Controls Non-secure access of the interrupt with ID905" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS904 ,Controls Non-secure access of the interrupt with ID904" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS903 ,Controls Non-secure access of the interrupt with ID903" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS902 ,Controls Non-secure access of the interrupt with ID902" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS901 ,Controls Non-secure access of the interrupt with ID901" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS900 ,Controls Non-secure access of the interrupt with ID900" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS899 ,Controls Non-secure access of the interrupt with ID899" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS898 ,Controls Non-secure access of the interrupt with ID898" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS897 ,Controls Non-secure access of the interrupt with ID897" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS896 ,Controls Non-secure access of the interrupt with ID896" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEE0++0x03
hide.long 0x00 "GICD_NSACR56,Non-secure Access Control Register 56"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEE4)))
group.long 0xEE4++0x03
line.long 0x00 "GICD_NSACR57,Non-secure Access Control Register 57"
bitfld.long 0x00 30.--31. " NS_ACCESS927 ,Controls Non-secure access of the interrupt with ID927" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS926 ,Controls Non-secure access of the interrupt with ID926" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS925 ,Controls Non-secure access of the interrupt with ID925" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS924 ,Controls Non-secure access of the interrupt with ID924" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS923 ,Controls Non-secure access of the interrupt with ID923" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS922 ,Controls Non-secure access of the interrupt with ID922" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS921 ,Controls Non-secure access of the interrupt with ID921" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS920 ,Controls Non-secure access of the interrupt with ID920" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS919 ,Controls Non-secure access of the interrupt with ID919" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS918 ,Controls Non-secure access of the interrupt with ID918" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS917 ,Controls Non-secure access of the interrupt with ID917" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS916 ,Controls Non-secure access of the interrupt with ID916" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS915 ,Controls Non-secure access of the interrupt with ID915" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS914 ,Controls Non-secure access of the interrupt with ID914" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS913 ,Controls Non-secure access of the interrupt with ID913" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS912 ,Controls Non-secure access of the interrupt with ID912" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEE4++0x03
hide.long 0x00 "GICD_NSACR57,Non-secure Access Control Register 57"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEE8)))
group.long 0xEE8++0x03
line.long 0x00 "GICD_NSACR58,Non-secure Access Control Register 58"
bitfld.long 0x00 30.--31. " NS_ACCESS943 ,Controls Non-secure access of the interrupt with ID943" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS942 ,Controls Non-secure access of the interrupt with ID942" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS941 ,Controls Non-secure access of the interrupt with ID941" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS940 ,Controls Non-secure access of the interrupt with ID940" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS939 ,Controls Non-secure access of the interrupt with ID939" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS938 ,Controls Non-secure access of the interrupt with ID938" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS937 ,Controls Non-secure access of the interrupt with ID937" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS936 ,Controls Non-secure access of the interrupt with ID936" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS935 ,Controls Non-secure access of the interrupt with ID935" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS934 ,Controls Non-secure access of the interrupt with ID934" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS933 ,Controls Non-secure access of the interrupt with ID933" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS932 ,Controls Non-secure access of the interrupt with ID932" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS931 ,Controls Non-secure access of the interrupt with ID931" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS930 ,Controls Non-secure access of the interrupt with ID930" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS929 ,Controls Non-secure access of the interrupt with ID929" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS928 ,Controls Non-secure access of the interrupt with ID928" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEE8++0x03
hide.long 0x00 "GICD_NSACR58,Non-secure Access Control Register 58"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEEC)))
group.long 0xEEC++0x03
line.long 0x00 "GICD_NSACR59,Non-secure Access Control Register 59"
bitfld.long 0x00 30.--31. " NS_ACCESS959 ,Controls Non-secure access of the interrupt with ID959" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS958 ,Controls Non-secure access of the interrupt with ID958" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS957 ,Controls Non-secure access of the interrupt with ID957" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS956 ,Controls Non-secure access of the interrupt with ID956" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS955 ,Controls Non-secure access of the interrupt with ID955" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS954 ,Controls Non-secure access of the interrupt with ID954" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS953 ,Controls Non-secure access of the interrupt with ID953" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS952 ,Controls Non-secure access of the interrupt with ID952" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS951 ,Controls Non-secure access of the interrupt with ID951" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS950 ,Controls Non-secure access of the interrupt with ID950" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS949 ,Controls Non-secure access of the interrupt with ID949" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS948 ,Controls Non-secure access of the interrupt with ID948" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS947 ,Controls Non-secure access of the interrupt with ID947" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS946 ,Controls Non-secure access of the interrupt with ID946" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS945 ,Controls Non-secure access of the interrupt with ID945" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS944 ,Controls Non-secure access of the interrupt with ID944" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEEC++0x03
hide.long 0x00 "GICD_NSACR59,Non-secure Access Control Register 59"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEF0)))
group.long 0xEF0++0x03
line.long 0x00 "GICD_NSACR60,Non-secure Access Control Register 60"
bitfld.long 0x00 30.--31. " NS_ACCESS975 ,Controls Non-secure access of the interrupt with ID975" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS974 ,Controls Non-secure access of the interrupt with ID974" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS973 ,Controls Non-secure access of the interrupt with ID973" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS972 ,Controls Non-secure access of the interrupt with ID972" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS971 ,Controls Non-secure access of the interrupt with ID971" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS970 ,Controls Non-secure access of the interrupt with ID970" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS969 ,Controls Non-secure access of the interrupt with ID969" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS968 ,Controls Non-secure access of the interrupt with ID968" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS967 ,Controls Non-secure access of the interrupt with ID967" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS966 ,Controls Non-secure access of the interrupt with ID966" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS965 ,Controls Non-secure access of the interrupt with ID965" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS964 ,Controls Non-secure access of the interrupt with ID964" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS963 ,Controls Non-secure access of the interrupt with ID963" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS962 ,Controls Non-secure access of the interrupt with ID962" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS961 ,Controls Non-secure access of the interrupt with ID961" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS960 ,Controls Non-secure access of the interrupt with ID960" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEF0++0x03
hide.long 0x00 "GICD_NSACR60,Non-secure Access Control Register 60"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEF4)))
group.long 0xEF4++0x03
line.long 0x00 "GICD_NSACR61,Non-secure Access Control Register 61"
bitfld.long 0x00 30.--31. " NS_ACCESS991 ,Controls Non-secure access of the interrupt with ID991" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS990 ,Controls Non-secure access of the interrupt with ID990" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS989 ,Controls Non-secure access of the interrupt with ID989" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS988 ,Controls Non-secure access of the interrupt with ID988" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS987 ,Controls Non-secure access of the interrupt with ID987" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS986 ,Controls Non-secure access of the interrupt with ID986" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS985 ,Controls Non-secure access of the interrupt with ID985" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS984 ,Controls Non-secure access of the interrupt with ID984" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS983 ,Controls Non-secure access of the interrupt with ID983" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS982 ,Controls Non-secure access of the interrupt with ID982" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS981 ,Controls Non-secure access of the interrupt with ID981" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS980 ,Controls Non-secure access of the interrupt with ID980" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS979 ,Controls Non-secure access of the interrupt with ID979" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS978 ,Controls Non-secure access of the interrupt with ID978" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS977 ,Controls Non-secure access of the interrupt with ID977" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS976 ,Controls Non-secure access of the interrupt with ID976" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEF4++0x03
hide.long 0x00 "GICD_NSACR61,Non-secure Access Control Register 61"
endif
tree.end
width 25.
tree "Software Generated Interrupt"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x0F00++0x03
hide.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
hgroup.long 0xF10++0x03
hide.long 0x00 "GICD_CLR_PENDSGIR0,SGI Clear Pending Register 0"
hgroup.long 0xF14++0x03
hide.long 0x00 "GICD_CLR_PENDSGIR1,SGI Clear Pending Register 1"
hgroup.long 0xF18++0x03
hide.long 0x00 "GICD_CLR_PENDSGIR2,SGI Clear Pending Register 2"
hgroup.long 0xF1C++0x03
hide.long 0x00 "GICD_CLR_PENDSGIR3,SGI Clear Pending Register 3"
hgroup.long 0xF20++0x03
hide.long 0x00 "GICD_SET_PENDSGIR0,SGI Set Pending Register 0"
hgroup.long 0xF24++0x03
hide.long 0x00 "GICD_SET_PENDSGIR1,SGI Set Pending Register 1"
hgroup.long 0xF28++0x03
hide.long 0x00 "GICD_SET_PENDSGIR2,SGI Set Pending Register 2"
hgroup.long 0xF2C++0x03
hide.long 0x00 "GICD_SET_PENDSGIR3,SGI Set Pending Register 3"
else
wgroup.long 0x0F00++0x03
line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
group.long 0xF10++0x03
line.long 0x00 "GICD_CLR_PENDSGIR0,SGI Clear Pending Register 0"
group.long 0xF14++0x03
line.long 0x00 "GICD_CLR_PENDSGIR1,SGI Clear Pending Register 1"
group.long 0xF18++0x03
line.long 0x00 "GICD_CLR_PENDSGIR2,SGI Clear Pending Register 2"
group.long 0xF1C++0x03
line.long 0x00 "GICD_CLR_PENDSGIR3,SGI Clear Pending Register 3"
group.long 0xF20++0x03
line.long 0x00 "GICD_SET_PENDSGIR0,SGI Set Pending Register 0"
group.long 0xF24++0x03
line.long 0x00 "GICD_SET_PENDSGIR1,SGI Set Pending Register 1"
group.long 0xF28++0x03
line.long 0x00 "GICD_SET_PENDSGIR2,SGI Set Pending Register 2"
group.long 0xF2C++0x03
line.long 0x00 "GICD_SET_PENDSGIR3,SGI Set Pending Register 3"
endif
tree.end
width 24.
tree "Interrupt Routing Registers"
group.quad 0x6100++0x07
line.quad 0x00 "GICD_IROUTER32 ,Interrupt Routing Register 32 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6108++0x07
line.quad 0x00 "GICD_IROUTER33 ,Interrupt Routing Register 33 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6110++0x07
line.quad 0x00 "GICD_IROUTER34 ,Interrupt Routing Register 34 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6118++0x07
line.quad 0x00 "GICD_IROUTER35 ,Interrupt Routing Register 35 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6120++0x07
line.quad 0x00 "GICD_IROUTER36 ,Interrupt Routing Register 36 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6128++0x07
line.quad 0x00 "GICD_IROUTER37 ,Interrupt Routing Register 37 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6130++0x07
line.quad 0x00 "GICD_IROUTER38 ,Interrupt Routing Register 38 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6138++0x07
line.quad 0x00 "GICD_IROUTER39 ,Interrupt Routing Register 39 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6140++0x07
line.quad 0x00 "GICD_IROUTER40 ,Interrupt Routing Register 40 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6148++0x07
line.quad 0x00 "GICD_IROUTER41 ,Interrupt Routing Register 41 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6150++0x07
line.quad 0x00 "GICD_IROUTER42 ,Interrupt Routing Register 42 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6158++0x07
line.quad 0x00 "GICD_IROUTER43 ,Interrupt Routing Register 43 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6160++0x07
line.quad 0x00 "GICD_IROUTER44 ,Interrupt Routing Register 44 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6168++0x07
line.quad 0x00 "GICD_IROUTER45 ,Interrupt Routing Register 45 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6170++0x07
line.quad 0x00 "GICD_IROUTER46 ,Interrupt Routing Register 46 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6178++0x07
line.quad 0x00 "GICD_IROUTER47 ,Interrupt Routing Register 47 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6180++0x07
line.quad 0x00 "GICD_IROUTER48 ,Interrupt Routing Register 48 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6188++0x07
line.quad 0x00 "GICD_IROUTER49 ,Interrupt Routing Register 49 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6190++0x07
line.quad 0x00 "GICD_IROUTER50 ,Interrupt Routing Register 50 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6198++0x07
line.quad 0x00 "GICD_IROUTER51 ,Interrupt Routing Register 51 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61A0++0x07
line.quad 0x00 "GICD_IROUTER52 ,Interrupt Routing Register 52 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61A8++0x07
line.quad 0x00 "GICD_IROUTER53 ,Interrupt Routing Register 53 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61B0++0x07
line.quad 0x00 "GICD_IROUTER54 ,Interrupt Routing Register 54 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61B8++0x07
line.quad 0x00 "GICD_IROUTER55 ,Interrupt Routing Register 55 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61C0++0x07
line.quad 0x00 "GICD_IROUTER56 ,Interrupt Routing Register 56 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61C8++0x07
line.quad 0x00 "GICD_IROUTER57 ,Interrupt Routing Register 57 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61D0++0x07
line.quad 0x00 "GICD_IROUTER58 ,Interrupt Routing Register 58 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61D8++0x07
line.quad 0x00 "GICD_IROUTER59 ,Interrupt Routing Register 59 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61E0++0x07
line.quad 0x00 "GICD_IROUTER60 ,Interrupt Routing Register 60 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61E8++0x07
line.quad 0x00 "GICD_IROUTER61 ,Interrupt Routing Register 61 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61F0++0x07
line.quad 0x00 "GICD_IROUTER62 ,Interrupt Routing Register 62 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61F8++0x07
line.quad 0x00 "GICD_IROUTER63 ,Interrupt Routing Register 63 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6200++0x07
line.quad 0x00 "GICD_IROUTER64 ,Interrupt Routing Register 64 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6208++0x07
line.quad 0x00 "GICD_IROUTER65 ,Interrupt Routing Register 65 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6210++0x07
line.quad 0x00 "GICD_IROUTER66 ,Interrupt Routing Register 66 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6218++0x07
line.quad 0x00 "GICD_IROUTER67 ,Interrupt Routing Register 67 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6220++0x07
line.quad 0x00 "GICD_IROUTER68 ,Interrupt Routing Register 68 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6228++0x07
line.quad 0x00 "GICD_IROUTER69 ,Interrupt Routing Register 69 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6230++0x07
line.quad 0x00 "GICD_IROUTER70 ,Interrupt Routing Register 70 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6238++0x07
line.quad 0x00 "GICD_IROUTER71 ,Interrupt Routing Register 71 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6240++0x07
line.quad 0x00 "GICD_IROUTER72 ,Interrupt Routing Register 72 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6248++0x07
line.quad 0x00 "GICD_IROUTER73 ,Interrupt Routing Register 73 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6250++0x07
line.quad 0x00 "GICD_IROUTER74 ,Interrupt Routing Register 74 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6258++0x07
line.quad 0x00 "GICD_IROUTER75 ,Interrupt Routing Register 75 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6260++0x07
line.quad 0x00 "GICD_IROUTER76 ,Interrupt Routing Register 76 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6268++0x07
line.quad 0x00 "GICD_IROUTER77 ,Interrupt Routing Register 77 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6270++0x07
line.quad 0x00 "GICD_IROUTER78 ,Interrupt Routing Register 78 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6278++0x07
line.quad 0x00 "GICD_IROUTER79 ,Interrupt Routing Register 79 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6280++0x07
line.quad 0x00 "GICD_IROUTER80 ,Interrupt Routing Register 80 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6288++0x07
line.quad 0x00 "GICD_IROUTER81 ,Interrupt Routing Register 81 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6290++0x07
line.quad 0x00 "GICD_IROUTER82 ,Interrupt Routing Register 82 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6298++0x07
line.quad 0x00 "GICD_IROUTER83 ,Interrupt Routing Register 83 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62A0++0x07
line.quad 0x00 "GICD_IROUTER84 ,Interrupt Routing Register 84 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62A8++0x07
line.quad 0x00 "GICD_IROUTER85 ,Interrupt Routing Register 85 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62B0++0x07
line.quad 0x00 "GICD_IROUTER86 ,Interrupt Routing Register 86 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62B8++0x07
line.quad 0x00 "GICD_IROUTER87 ,Interrupt Routing Register 87 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62C0++0x07
line.quad 0x00 "GICD_IROUTER88 ,Interrupt Routing Register 88 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62C8++0x07
line.quad 0x00 "GICD_IROUTER89 ,Interrupt Routing Register 89 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62D0++0x07
line.quad 0x00 "GICD_IROUTER90 ,Interrupt Routing Register 90 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62D8++0x07
line.quad 0x00 "GICD_IROUTER91 ,Interrupt Routing Register 91 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62E0++0x07
line.quad 0x00 "GICD_IROUTER92 ,Interrupt Routing Register 92 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62E8++0x07
line.quad 0x00 "GICD_IROUTER93 ,Interrupt Routing Register 93 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62F0++0x07
line.quad 0x00 "GICD_IROUTER94 ,Interrupt Routing Register 94 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62F8++0x07
line.quad 0x00 "GICD_IROUTER95 ,Interrupt Routing Register 95 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6300++0x07
line.quad 0x00 "GICD_IROUTER96 ,Interrupt Routing Register 96 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6308++0x07
line.quad 0x00 "GICD_IROUTER97 ,Interrupt Routing Register 97 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6310++0x07
line.quad 0x00 "GICD_IROUTER98 ,Interrupt Routing Register 98 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6318++0x07
line.quad 0x00 "GICD_IROUTER99 ,Interrupt Routing Register 99 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6320++0x07
line.quad 0x00 "GICD_IROUTER100,Interrupt Routing Register 100"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6328++0x07
line.quad 0x00 "GICD_IROUTER101,Interrupt Routing Register 101"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6330++0x07
line.quad 0x00 "GICD_IROUTER102,Interrupt Routing Register 102"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6338++0x07
line.quad 0x00 "GICD_IROUTER103,Interrupt Routing Register 103"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6340++0x07
line.quad 0x00 "GICD_IROUTER104,Interrupt Routing Register 104"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6348++0x07
line.quad 0x00 "GICD_IROUTER105,Interrupt Routing Register 105"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6350++0x07
line.quad 0x00 "GICD_IROUTER106,Interrupt Routing Register 106"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6358++0x07
line.quad 0x00 "GICD_IROUTER107,Interrupt Routing Register 107"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6360++0x07
line.quad 0x00 "GICD_IROUTER108,Interrupt Routing Register 108"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6368++0x07
line.quad 0x00 "GICD_IROUTER109,Interrupt Routing Register 109"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6370++0x07
line.quad 0x00 "GICD_IROUTER110,Interrupt Routing Register 110"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6378++0x07
line.quad 0x00 "GICD_IROUTER111,Interrupt Routing Register 111"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6380++0x07
line.quad 0x00 "GICD_IROUTER112,Interrupt Routing Register 112"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6388++0x07
line.quad 0x00 "GICD_IROUTER113,Interrupt Routing Register 113"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6390++0x07
line.quad 0x00 "GICD_IROUTER114,Interrupt Routing Register 114"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6398++0x07
line.quad 0x00 "GICD_IROUTER115,Interrupt Routing Register 115"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63A0++0x07
line.quad 0x00 "GICD_IROUTER116,Interrupt Routing Register 116"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63A8++0x07
line.quad 0x00 "GICD_IROUTER117,Interrupt Routing Register 117"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63B0++0x07
line.quad 0x00 "GICD_IROUTER118,Interrupt Routing Register 118"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63B8++0x07
line.quad 0x00 "GICD_IROUTER119,Interrupt Routing Register 119"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63C0++0x07
line.quad 0x00 "GICD_IROUTER120,Interrupt Routing Register 120"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63C8++0x07
line.quad 0x00 "GICD_IROUTER121,Interrupt Routing Register 121"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63D0++0x07
line.quad 0x00 "GICD_IROUTER122,Interrupt Routing Register 122"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63D8++0x07
line.quad 0x00 "GICD_IROUTER123,Interrupt Routing Register 123"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63E0++0x07
line.quad 0x00 "GICD_IROUTER124,Interrupt Routing Register 124"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63E8++0x07
line.quad 0x00 "GICD_IROUTER125,Interrupt Routing Register 125"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63F0++0x07
line.quad 0x00 "GICD_IROUTER126,Interrupt Routing Register 126"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63F8++0x07
line.quad 0x00 "GICD_IROUTER127,Interrupt Routing Register 127"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6400++0x07
line.quad 0x00 "GICD_IROUTER128,Interrupt Routing Register 128"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6408++0x07
line.quad 0x00 "GICD_IROUTER129,Interrupt Routing Register 129"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6410++0x07
line.quad 0x00 "GICD_IROUTER130,Interrupt Routing Register 130"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6418++0x07
line.quad 0x00 "GICD_IROUTER131,Interrupt Routing Register 131"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6420++0x07
line.quad 0x00 "GICD_IROUTER132,Interrupt Routing Register 132"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6428++0x07
line.quad 0x00 "GICD_IROUTER133,Interrupt Routing Register 133"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6430++0x07
line.quad 0x00 "GICD_IROUTER134,Interrupt Routing Register 134"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6438++0x07
line.quad 0x00 "GICD_IROUTER135,Interrupt Routing Register 135"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6440++0x07
line.quad 0x00 "GICD_IROUTER136,Interrupt Routing Register 136"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6448++0x07
line.quad 0x00 "GICD_IROUTER137,Interrupt Routing Register 137"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6450++0x07
line.quad 0x00 "GICD_IROUTER138,Interrupt Routing Register 138"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6458++0x07
line.quad 0x00 "GICD_IROUTER139,Interrupt Routing Register 139"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6460++0x07
line.quad 0x00 "GICD_IROUTER140,Interrupt Routing Register 140"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6468++0x07
line.quad 0x00 "GICD_IROUTER141,Interrupt Routing Register 141"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6470++0x07
line.quad 0x00 "GICD_IROUTER142,Interrupt Routing Register 142"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6478++0x07
line.quad 0x00 "GICD_IROUTER143,Interrupt Routing Register 143"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6480++0x07
line.quad 0x00 "GICD_IROUTER144,Interrupt Routing Register 144"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6488++0x07
line.quad 0x00 "GICD_IROUTER145,Interrupt Routing Register 145"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6490++0x07
line.quad 0x00 "GICD_IROUTER146,Interrupt Routing Register 146"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6498++0x07
line.quad 0x00 "GICD_IROUTER147,Interrupt Routing Register 147"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64A0++0x07
line.quad 0x00 "GICD_IROUTER148,Interrupt Routing Register 148"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64A8++0x07
line.quad 0x00 "GICD_IROUTER149,Interrupt Routing Register 149"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64B0++0x07
line.quad 0x00 "GICD_IROUTER150,Interrupt Routing Register 150"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64B8++0x07
line.quad 0x00 "GICD_IROUTER151,Interrupt Routing Register 151"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64C0++0x07
line.quad 0x00 "GICD_IROUTER152,Interrupt Routing Register 152"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64C8++0x07
line.quad 0x00 "GICD_IROUTER153,Interrupt Routing Register 153"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64D0++0x07
line.quad 0x00 "GICD_IROUTER154,Interrupt Routing Register 154"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64D8++0x07
line.quad 0x00 "GICD_IROUTER155,Interrupt Routing Register 155"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64E0++0x07
line.quad 0x00 "GICD_IROUTER156,Interrupt Routing Register 156"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64E8++0x07
line.quad 0x00 "GICD_IROUTER157,Interrupt Routing Register 157"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64F0++0x07
line.quad 0x00 "GICD_IROUTER158,Interrupt Routing Register 158"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64F8++0x07
line.quad 0x00 "GICD_IROUTER159,Interrupt Routing Register 159"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6500++0x07
line.quad 0x00 "GICD_IROUTER160,Interrupt Routing Register 160"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6508++0x07
line.quad 0x00 "GICD_IROUTER161,Interrupt Routing Register 161"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6510++0x07
line.quad 0x00 "GICD_IROUTER162,Interrupt Routing Register 162"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6518++0x07
line.quad 0x00 "GICD_IROUTER163,Interrupt Routing Register 163"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6520++0x07
line.quad 0x00 "GICD_IROUTER164,Interrupt Routing Register 164"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6528++0x07
line.quad 0x00 "GICD_IROUTER165,Interrupt Routing Register 165"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6530++0x07
line.quad 0x00 "GICD_IROUTER166,Interrupt Routing Register 166"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6538++0x07
line.quad 0x00 "GICD_IROUTER167,Interrupt Routing Register 167"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6540++0x07
line.quad 0x00 "GICD_IROUTER168,Interrupt Routing Register 168"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6548++0x07
line.quad 0x00 "GICD_IROUTER169,Interrupt Routing Register 169"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6550++0x07
line.quad 0x00 "GICD_IROUTER170,Interrupt Routing Register 170"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6558++0x07
line.quad 0x00 "GICD_IROUTER171,Interrupt Routing Register 171"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6560++0x07
line.quad 0x00 "GICD_IROUTER172,Interrupt Routing Register 172"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6568++0x07
line.quad 0x00 "GICD_IROUTER173,Interrupt Routing Register 173"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6570++0x07
line.quad 0x00 "GICD_IROUTER174,Interrupt Routing Register 174"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6578++0x07
line.quad 0x00 "GICD_IROUTER175,Interrupt Routing Register 175"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6580++0x07
line.quad 0x00 "GICD_IROUTER176,Interrupt Routing Register 176"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6588++0x07
line.quad 0x00 "GICD_IROUTER177,Interrupt Routing Register 177"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6590++0x07
line.quad 0x00 "GICD_IROUTER178,Interrupt Routing Register 178"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6598++0x07
line.quad 0x00 "GICD_IROUTER179,Interrupt Routing Register 179"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65A0++0x07
line.quad 0x00 "GICD_IROUTER180,Interrupt Routing Register 180"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65A8++0x07
line.quad 0x00 "GICD_IROUTER181,Interrupt Routing Register 181"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65B0++0x07
line.quad 0x00 "GICD_IROUTER182,Interrupt Routing Register 182"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65B8++0x07
line.quad 0x00 "GICD_IROUTER183,Interrupt Routing Register 183"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65C0++0x07
line.quad 0x00 "GICD_IROUTER184,Interrupt Routing Register 184"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65C8++0x07
line.quad 0x00 "GICD_IROUTER185,Interrupt Routing Register 185"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65D0++0x07
line.quad 0x00 "GICD_IROUTER186,Interrupt Routing Register 186"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65D8++0x07
line.quad 0x00 "GICD_IROUTER187,Interrupt Routing Register 187"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65E0++0x07
line.quad 0x00 "GICD_IROUTER188,Interrupt Routing Register 188"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65E8++0x07
line.quad 0x00 "GICD_IROUTER189,Interrupt Routing Register 189"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65F0++0x07
line.quad 0x00 "GICD_IROUTER190,Interrupt Routing Register 190"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65F8++0x07
line.quad 0x00 "GICD_IROUTER191,Interrupt Routing Register 191"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6600++0x07
line.quad 0x00 "GICD_IROUTER192,Interrupt Routing Register 192"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6608++0x07
line.quad 0x00 "GICD_IROUTER193,Interrupt Routing Register 193"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6610++0x07
line.quad 0x00 "GICD_IROUTER194,Interrupt Routing Register 194"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6618++0x07
line.quad 0x00 "GICD_IROUTER195,Interrupt Routing Register 195"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6620++0x07
line.quad 0x00 "GICD_IROUTER196,Interrupt Routing Register 196"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6628++0x07
line.quad 0x00 "GICD_IROUTER197,Interrupt Routing Register 197"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6630++0x07
line.quad 0x00 "GICD_IROUTER198,Interrupt Routing Register 198"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6638++0x07
line.quad 0x00 "GICD_IROUTER199,Interrupt Routing Register 199"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6640++0x07
line.quad 0x00 "GICD_IROUTER200,Interrupt Routing Register 200"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6648++0x07
line.quad 0x00 "GICD_IROUTER201,Interrupt Routing Register 201"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6650++0x07
line.quad 0x00 "GICD_IROUTER202,Interrupt Routing Register 202"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6658++0x07
line.quad 0x00 "GICD_IROUTER203,Interrupt Routing Register 203"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6660++0x07
line.quad 0x00 "GICD_IROUTER204,Interrupt Routing Register 204"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6668++0x07
line.quad 0x00 "GICD_IROUTER205,Interrupt Routing Register 205"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6670++0x07
line.quad 0x00 "GICD_IROUTER206,Interrupt Routing Register 206"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6678++0x07
line.quad 0x00 "GICD_IROUTER207,Interrupt Routing Register 207"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6680++0x07
line.quad 0x00 "GICD_IROUTER208,Interrupt Routing Register 208"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6688++0x07
line.quad 0x00 "GICD_IROUTER209,Interrupt Routing Register 209"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6690++0x07
line.quad 0x00 "GICD_IROUTER210,Interrupt Routing Register 210"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6698++0x07
line.quad 0x00 "GICD_IROUTER211,Interrupt Routing Register 211"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66A0++0x07
line.quad 0x00 "GICD_IROUTER212,Interrupt Routing Register 212"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66A8++0x07
line.quad 0x00 "GICD_IROUTER213,Interrupt Routing Register 213"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66B0++0x07
line.quad 0x00 "GICD_IROUTER214,Interrupt Routing Register 214"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66B8++0x07
line.quad 0x00 "GICD_IROUTER215,Interrupt Routing Register 215"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66C0++0x07
line.quad 0x00 "GICD_IROUTER216,Interrupt Routing Register 216"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66C8++0x07
line.quad 0x00 "GICD_IROUTER217,Interrupt Routing Register 217"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66D0++0x07
line.quad 0x00 "GICD_IROUTER218,Interrupt Routing Register 218"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66D8++0x07
line.quad 0x00 "GICD_IROUTER219,Interrupt Routing Register 219"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66E0++0x07
line.quad 0x00 "GICD_IROUTER220,Interrupt Routing Register 220"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66E8++0x07
line.quad 0x00 "GICD_IROUTER221,Interrupt Routing Register 221"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66F0++0x07
line.quad 0x00 "GICD_IROUTER222,Interrupt Routing Register 222"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66F8++0x07
line.quad 0x00 "GICD_IROUTER223,Interrupt Routing Register 223"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6700++0x07
line.quad 0x00 "GICD_IROUTER224,Interrupt Routing Register 224"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6708++0x07
line.quad 0x00 "GICD_IROUTER225,Interrupt Routing Register 225"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6710++0x07
line.quad 0x00 "GICD_IROUTER226,Interrupt Routing Register 226"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6718++0x07
line.quad 0x00 "GICD_IROUTER227,Interrupt Routing Register 227"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6720++0x07
line.quad 0x00 "GICD_IROUTER228,Interrupt Routing Register 228"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6728++0x07
line.quad 0x00 "GICD_IROUTER229,Interrupt Routing Register 229"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6730++0x07
line.quad 0x00 "GICD_IROUTER230,Interrupt Routing Register 230"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6738++0x07
line.quad 0x00 "GICD_IROUTER231,Interrupt Routing Register 231"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6740++0x07
line.quad 0x00 "GICD_IROUTER232,Interrupt Routing Register 232"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6748++0x07
line.quad 0x00 "GICD_IROUTER233,Interrupt Routing Register 233"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6750++0x07
line.quad 0x00 "GICD_IROUTER234,Interrupt Routing Register 234"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6758++0x07
line.quad 0x00 "GICD_IROUTER235,Interrupt Routing Register 235"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6760++0x07
line.quad 0x00 "GICD_IROUTER236,Interrupt Routing Register 236"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6768++0x07
line.quad 0x00 "GICD_IROUTER237,Interrupt Routing Register 237"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6770++0x07
line.quad 0x00 "GICD_IROUTER238,Interrupt Routing Register 238"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6778++0x07
line.quad 0x00 "GICD_IROUTER239,Interrupt Routing Register 239"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6780++0x07
line.quad 0x00 "GICD_IROUTER240,Interrupt Routing Register 240"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6788++0x07
line.quad 0x00 "GICD_IROUTER241,Interrupt Routing Register 241"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6790++0x07
line.quad 0x00 "GICD_IROUTER242,Interrupt Routing Register 242"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6798++0x07
line.quad 0x00 "GICD_IROUTER243,Interrupt Routing Register 243"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67A0++0x07
line.quad 0x00 "GICD_IROUTER244,Interrupt Routing Register 244"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67A8++0x07
line.quad 0x00 "GICD_IROUTER245,Interrupt Routing Register 245"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67B0++0x07
line.quad 0x00 "GICD_IROUTER246,Interrupt Routing Register 246"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67B8++0x07
line.quad 0x00 "GICD_IROUTER247,Interrupt Routing Register 247"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67C0++0x07
line.quad 0x00 "GICD_IROUTER248,Interrupt Routing Register 248"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67C8++0x07
line.quad 0x00 "GICD_IROUTER249,Interrupt Routing Register 249"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67D0++0x07
line.quad 0x00 "GICD_IROUTER250,Interrupt Routing Register 250"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67D8++0x07
line.quad 0x00 "GICD_IROUTER251,Interrupt Routing Register 251"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67E0++0x07
line.quad 0x00 "GICD_IROUTER252,Interrupt Routing Register 252"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67E8++0x07
line.quad 0x00 "GICD_IROUTER253,Interrupt Routing Register 253"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67F0++0x07
line.quad 0x00 "GICD_IROUTER254,Interrupt Routing Register 254"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67F8++0x07
line.quad 0x00 "GICD_IROUTER255,Interrupt Routing Register 255"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6800++0x07
line.quad 0x00 "GICD_IROUTER256,Interrupt Routing Register 256"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6808++0x07
line.quad 0x00 "GICD_IROUTER257,Interrupt Routing Register 257"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6810++0x07
line.quad 0x00 "GICD_IROUTER258,Interrupt Routing Register 258"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6818++0x07
line.quad 0x00 "GICD_IROUTER259,Interrupt Routing Register 259"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6820++0x07
line.quad 0x00 "GICD_IROUTER260,Interrupt Routing Register 260"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6828++0x07
line.quad 0x00 "GICD_IROUTER261,Interrupt Routing Register 261"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6830++0x07
line.quad 0x00 "GICD_IROUTER262,Interrupt Routing Register 262"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6838++0x07
line.quad 0x00 "GICD_IROUTER263,Interrupt Routing Register 263"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6840++0x07
line.quad 0x00 "GICD_IROUTER264,Interrupt Routing Register 264"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6848++0x07
line.quad 0x00 "GICD_IROUTER265,Interrupt Routing Register 265"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6850++0x07
line.quad 0x00 "GICD_IROUTER266,Interrupt Routing Register 266"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6858++0x07
line.quad 0x00 "GICD_IROUTER267,Interrupt Routing Register 267"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6860++0x07
line.quad 0x00 "GICD_IROUTER268,Interrupt Routing Register 268"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6868++0x07
line.quad 0x00 "GICD_IROUTER269,Interrupt Routing Register 269"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6870++0x07
line.quad 0x00 "GICD_IROUTER270,Interrupt Routing Register 270"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6878++0x07
line.quad 0x00 "GICD_IROUTER271,Interrupt Routing Register 271"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6880++0x07
line.quad 0x00 "GICD_IROUTER272,Interrupt Routing Register 272"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6888++0x07
line.quad 0x00 "GICD_IROUTER273,Interrupt Routing Register 273"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6890++0x07
line.quad 0x00 "GICD_IROUTER274,Interrupt Routing Register 274"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6898++0x07
line.quad 0x00 "GICD_IROUTER275,Interrupt Routing Register 275"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68A0++0x07
line.quad 0x00 "GICD_IROUTER276,Interrupt Routing Register 276"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68A8++0x07
line.quad 0x00 "GICD_IROUTER277,Interrupt Routing Register 277"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68B0++0x07
line.quad 0x00 "GICD_IROUTER278,Interrupt Routing Register 278"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68B8++0x07
line.quad 0x00 "GICD_IROUTER279,Interrupt Routing Register 279"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68C0++0x07
line.quad 0x00 "GICD_IROUTER280,Interrupt Routing Register 280"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68C8++0x07
line.quad 0x00 "GICD_IROUTER281,Interrupt Routing Register 281"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68D0++0x07
line.quad 0x00 "GICD_IROUTER282,Interrupt Routing Register 282"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68D8++0x07
line.quad 0x00 "GICD_IROUTER283,Interrupt Routing Register 283"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68E0++0x07
line.quad 0x00 "GICD_IROUTER284,Interrupt Routing Register 284"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68E8++0x07
line.quad 0x00 "GICD_IROUTER285,Interrupt Routing Register 285"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68F0++0x07
line.quad 0x00 "GICD_IROUTER286,Interrupt Routing Register 286"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68F8++0x07
line.quad 0x00 "GICD_IROUTER287,Interrupt Routing Register 287"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6900++0x07
line.quad 0x00 "GICD_IROUTER288,Interrupt Routing Register 288"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6908++0x07
line.quad 0x00 "GICD_IROUTER289,Interrupt Routing Register 289"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6910++0x07
line.quad 0x00 "GICD_IROUTER290,Interrupt Routing Register 290"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6918++0x07
line.quad 0x00 "GICD_IROUTER291,Interrupt Routing Register 291"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6920++0x07
line.quad 0x00 "GICD_IROUTER292,Interrupt Routing Register 292"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6928++0x07
line.quad 0x00 "GICD_IROUTER293,Interrupt Routing Register 293"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6930++0x07
line.quad 0x00 "GICD_IROUTER294,Interrupt Routing Register 294"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6938++0x07
line.quad 0x00 "GICD_IROUTER295,Interrupt Routing Register 295"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6940++0x07
line.quad 0x00 "GICD_IROUTER296,Interrupt Routing Register 296"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6948++0x07
line.quad 0x00 "GICD_IROUTER297,Interrupt Routing Register 297"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6950++0x07
line.quad 0x00 "GICD_IROUTER298,Interrupt Routing Register 298"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6958++0x07
line.quad 0x00 "GICD_IROUTER299,Interrupt Routing Register 299"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6960++0x07
line.quad 0x00 "GICD_IROUTER300,Interrupt Routing Register 300"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6968++0x07
line.quad 0x00 "GICD_IROUTER301,Interrupt Routing Register 301"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6970++0x07
line.quad 0x00 "GICD_IROUTER302,Interrupt Routing Register 302"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6978++0x07
line.quad 0x00 "GICD_IROUTER303,Interrupt Routing Register 303"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6980++0x07
line.quad 0x00 "GICD_IROUTER304,Interrupt Routing Register 304"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6988++0x07
line.quad 0x00 "GICD_IROUTER305,Interrupt Routing Register 305"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6990++0x07
line.quad 0x00 "GICD_IROUTER306,Interrupt Routing Register 306"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6998++0x07
line.quad 0x00 "GICD_IROUTER307,Interrupt Routing Register 307"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69A0++0x07
line.quad 0x00 "GICD_IROUTER308,Interrupt Routing Register 308"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69A8++0x07
line.quad 0x00 "GICD_IROUTER309,Interrupt Routing Register 309"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69B0++0x07
line.quad 0x00 "GICD_IROUTER310,Interrupt Routing Register 310"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69B8++0x07
line.quad 0x00 "GICD_IROUTER311,Interrupt Routing Register 311"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69C0++0x07
line.quad 0x00 "GICD_IROUTER312,Interrupt Routing Register 312"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69C8++0x07
line.quad 0x00 "GICD_IROUTER313,Interrupt Routing Register 313"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69D0++0x07
line.quad 0x00 "GICD_IROUTER314,Interrupt Routing Register 314"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69D8++0x07
line.quad 0x00 "GICD_IROUTER315,Interrupt Routing Register 315"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69E0++0x07
line.quad 0x00 "GICD_IROUTER316,Interrupt Routing Register 316"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69E8++0x07
line.quad 0x00 "GICD_IROUTER317,Interrupt Routing Register 317"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69F0++0x07
line.quad 0x00 "GICD_IROUTER318,Interrupt Routing Register 318"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69F8++0x07
line.quad 0x00 "GICD_IROUTER319,Interrupt Routing Register 319"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A00++0x07
line.quad 0x00 "GICD_IROUTER320,Interrupt Routing Register 320"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A08++0x07
line.quad 0x00 "GICD_IROUTER321,Interrupt Routing Register 321"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A10++0x07
line.quad 0x00 "GICD_IROUTER322,Interrupt Routing Register 322"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A18++0x07
line.quad 0x00 "GICD_IROUTER323,Interrupt Routing Register 323"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A20++0x07
line.quad 0x00 "GICD_IROUTER324,Interrupt Routing Register 324"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A28++0x07
line.quad 0x00 "GICD_IROUTER325,Interrupt Routing Register 325"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A30++0x07
line.quad 0x00 "GICD_IROUTER326,Interrupt Routing Register 326"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A38++0x07
line.quad 0x00 "GICD_IROUTER327,Interrupt Routing Register 327"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A40++0x07
line.quad 0x00 "GICD_IROUTER328,Interrupt Routing Register 328"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A48++0x07
line.quad 0x00 "GICD_IROUTER329,Interrupt Routing Register 329"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A50++0x07
line.quad 0x00 "GICD_IROUTER330,Interrupt Routing Register 330"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A58++0x07
line.quad 0x00 "GICD_IROUTER331,Interrupt Routing Register 331"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A60++0x07
line.quad 0x00 "GICD_IROUTER332,Interrupt Routing Register 332"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A68++0x07
line.quad 0x00 "GICD_IROUTER333,Interrupt Routing Register 333"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A70++0x07
line.quad 0x00 "GICD_IROUTER334,Interrupt Routing Register 334"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A78++0x07
line.quad 0x00 "GICD_IROUTER335,Interrupt Routing Register 335"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A80++0x07
line.quad 0x00 "GICD_IROUTER336,Interrupt Routing Register 336"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A88++0x07
line.quad 0x00 "GICD_IROUTER337,Interrupt Routing Register 337"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A90++0x07
line.quad 0x00 "GICD_IROUTER338,Interrupt Routing Register 338"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A98++0x07
line.quad 0x00 "GICD_IROUTER339,Interrupt Routing Register 339"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AA0++0x07
line.quad 0x00 "GICD_IROUTER340,Interrupt Routing Register 340"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AA8++0x07
line.quad 0x00 "GICD_IROUTER341,Interrupt Routing Register 341"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AB0++0x07
line.quad 0x00 "GICD_IROUTER342,Interrupt Routing Register 342"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AB8++0x07
line.quad 0x00 "GICD_IROUTER343,Interrupt Routing Register 343"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AC0++0x07
line.quad 0x00 "GICD_IROUTER344,Interrupt Routing Register 344"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AC8++0x07
line.quad 0x00 "GICD_IROUTER345,Interrupt Routing Register 345"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AD0++0x07
line.quad 0x00 "GICD_IROUTER346,Interrupt Routing Register 346"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AD8++0x07
line.quad 0x00 "GICD_IROUTER347,Interrupt Routing Register 347"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AE0++0x07
line.quad 0x00 "GICD_IROUTER348,Interrupt Routing Register 348"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AE8++0x07
line.quad 0x00 "GICD_IROUTER349,Interrupt Routing Register 349"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AF0++0x07
line.quad 0x00 "GICD_IROUTER350,Interrupt Routing Register 350"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AF8++0x07
line.quad 0x00 "GICD_IROUTER351,Interrupt Routing Register 351"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B00++0x07
line.quad 0x00 "GICD_IROUTER352,Interrupt Routing Register 352"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B08++0x07
line.quad 0x00 "GICD_IROUTER353,Interrupt Routing Register 353"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B10++0x07
line.quad 0x00 "GICD_IROUTER354,Interrupt Routing Register 354"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B18++0x07
line.quad 0x00 "GICD_IROUTER355,Interrupt Routing Register 355"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B20++0x07
line.quad 0x00 "GICD_IROUTER356,Interrupt Routing Register 356"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B28++0x07
line.quad 0x00 "GICD_IROUTER357,Interrupt Routing Register 357"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B30++0x07
line.quad 0x00 "GICD_IROUTER358,Interrupt Routing Register 358"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B38++0x07
line.quad 0x00 "GICD_IROUTER359,Interrupt Routing Register 359"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B40++0x07
line.quad 0x00 "GICD_IROUTER360,Interrupt Routing Register 360"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B48++0x07
line.quad 0x00 "GICD_IROUTER361,Interrupt Routing Register 361"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B50++0x07
line.quad 0x00 "GICD_IROUTER362,Interrupt Routing Register 362"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B58++0x07
line.quad 0x00 "GICD_IROUTER363,Interrupt Routing Register 363"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B60++0x07
line.quad 0x00 "GICD_IROUTER364,Interrupt Routing Register 364"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B68++0x07
line.quad 0x00 "GICD_IROUTER365,Interrupt Routing Register 365"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B70++0x07
line.quad 0x00 "GICD_IROUTER366,Interrupt Routing Register 366"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B78++0x07
line.quad 0x00 "GICD_IROUTER367,Interrupt Routing Register 367"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B80++0x07
line.quad 0x00 "GICD_IROUTER368,Interrupt Routing Register 368"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B88++0x07
line.quad 0x00 "GICD_IROUTER369,Interrupt Routing Register 369"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B90++0x07
line.quad 0x00 "GICD_IROUTER370,Interrupt Routing Register 370"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B98++0x07
line.quad 0x00 "GICD_IROUTER371,Interrupt Routing Register 371"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BA0++0x07
line.quad 0x00 "GICD_IROUTER372,Interrupt Routing Register 372"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BA8++0x07
line.quad 0x00 "GICD_IROUTER373,Interrupt Routing Register 373"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BB0++0x07
line.quad 0x00 "GICD_IROUTER374,Interrupt Routing Register 374"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BB8++0x07
line.quad 0x00 "GICD_IROUTER375,Interrupt Routing Register 375"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BC0++0x07
line.quad 0x00 "GICD_IROUTER376,Interrupt Routing Register 376"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BC8++0x07
line.quad 0x00 "GICD_IROUTER377,Interrupt Routing Register 377"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BD0++0x07
line.quad 0x00 "GICD_IROUTER378,Interrupt Routing Register 378"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BD8++0x07
line.quad 0x00 "GICD_IROUTER379,Interrupt Routing Register 379"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BE0++0x07
line.quad 0x00 "GICD_IROUTER380,Interrupt Routing Register 380"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BE8++0x07
line.quad 0x00 "GICD_IROUTER381,Interrupt Routing Register 381"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BF0++0x07
line.quad 0x00 "GICD_IROUTER382,Interrupt Routing Register 382"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BF8++0x07
line.quad 0x00 "GICD_IROUTER383,Interrupt Routing Register 383"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C00++0x07
line.quad 0x00 "GICD_IROUTER384,Interrupt Routing Register 384"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C08++0x07
line.quad 0x00 "GICD_IROUTER385,Interrupt Routing Register 385"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C10++0x07
line.quad 0x00 "GICD_IROUTER386,Interrupt Routing Register 386"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C18++0x07
line.quad 0x00 "GICD_IROUTER387,Interrupt Routing Register 387"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C20++0x07
line.quad 0x00 "GICD_IROUTER388,Interrupt Routing Register 388"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C28++0x07
line.quad 0x00 "GICD_IROUTER389,Interrupt Routing Register 389"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C30++0x07
line.quad 0x00 "GICD_IROUTER390,Interrupt Routing Register 390"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C38++0x07
line.quad 0x00 "GICD_IROUTER391,Interrupt Routing Register 391"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C40++0x07
line.quad 0x00 "GICD_IROUTER392,Interrupt Routing Register 392"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C48++0x07
line.quad 0x00 "GICD_IROUTER393,Interrupt Routing Register 393"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C50++0x07
line.quad 0x00 "GICD_IROUTER394,Interrupt Routing Register 394"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C58++0x07
line.quad 0x00 "GICD_IROUTER395,Interrupt Routing Register 395"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C60++0x07
line.quad 0x00 "GICD_IROUTER396,Interrupt Routing Register 396"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C68++0x07
line.quad 0x00 "GICD_IROUTER397,Interrupt Routing Register 397"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C70++0x07
line.quad 0x00 "GICD_IROUTER398,Interrupt Routing Register 398"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C78++0x07
line.quad 0x00 "GICD_IROUTER399,Interrupt Routing Register 399"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C80++0x07
line.quad 0x00 "GICD_IROUTER400,Interrupt Routing Register 400"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C88++0x07
line.quad 0x00 "GICD_IROUTER401,Interrupt Routing Register 401"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C90++0x07
line.quad 0x00 "GICD_IROUTER402,Interrupt Routing Register 402"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C98++0x07
line.quad 0x00 "GICD_IROUTER403,Interrupt Routing Register 403"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CA0++0x07
line.quad 0x00 "GICD_IROUTER404,Interrupt Routing Register 404"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CA8++0x07
line.quad 0x00 "GICD_IROUTER405,Interrupt Routing Register 405"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CB0++0x07
line.quad 0x00 "GICD_IROUTER406,Interrupt Routing Register 406"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CB8++0x07
line.quad 0x00 "GICD_IROUTER407,Interrupt Routing Register 407"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CC0++0x07
line.quad 0x00 "GICD_IROUTER408,Interrupt Routing Register 408"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CC8++0x07
line.quad 0x00 "GICD_IROUTER409,Interrupt Routing Register 409"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CD0++0x07
line.quad 0x00 "GICD_IROUTER410,Interrupt Routing Register 410"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CD8++0x07
line.quad 0x00 "GICD_IROUTER411,Interrupt Routing Register 411"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CE0++0x07
line.quad 0x00 "GICD_IROUTER412,Interrupt Routing Register 412"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CE8++0x07
line.quad 0x00 "GICD_IROUTER413,Interrupt Routing Register 413"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CF0++0x07
line.quad 0x00 "GICD_IROUTER414,Interrupt Routing Register 414"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CF8++0x07
line.quad 0x00 "GICD_IROUTER415,Interrupt Routing Register 415"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D00++0x07
line.quad 0x00 "GICD_IROUTER416,Interrupt Routing Register 416"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D08++0x07
line.quad 0x00 "GICD_IROUTER417,Interrupt Routing Register 417"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D10++0x07
line.quad 0x00 "GICD_IROUTER418,Interrupt Routing Register 418"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D18++0x07
line.quad 0x00 "GICD_IROUTER419,Interrupt Routing Register 419"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D20++0x07
line.quad 0x00 "GICD_IROUTER420,Interrupt Routing Register 420"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D28++0x07
line.quad 0x00 "GICD_IROUTER421,Interrupt Routing Register 421"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D30++0x07
line.quad 0x00 "GICD_IROUTER422,Interrupt Routing Register 422"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D38++0x07
line.quad 0x00 "GICD_IROUTER423,Interrupt Routing Register 423"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D40++0x07
line.quad 0x00 "GICD_IROUTER424,Interrupt Routing Register 424"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D48++0x07
line.quad 0x00 "GICD_IROUTER425,Interrupt Routing Register 425"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D50++0x07
line.quad 0x00 "GICD_IROUTER426,Interrupt Routing Register 426"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D58++0x07
line.quad 0x00 "GICD_IROUTER427,Interrupt Routing Register 427"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D60++0x07
line.quad 0x00 "GICD_IROUTER428,Interrupt Routing Register 428"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D68++0x07
line.quad 0x00 "GICD_IROUTER429,Interrupt Routing Register 429"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D70++0x07
line.quad 0x00 "GICD_IROUTER430,Interrupt Routing Register 430"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D78++0x07
line.quad 0x00 "GICD_IROUTER431,Interrupt Routing Register 431"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D80++0x07
line.quad 0x00 "GICD_IROUTER432,Interrupt Routing Register 432"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D88++0x07
line.quad 0x00 "GICD_IROUTER433,Interrupt Routing Register 433"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D90++0x07
line.quad 0x00 "GICD_IROUTER434,Interrupt Routing Register 434"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D98++0x07
line.quad 0x00 "GICD_IROUTER435,Interrupt Routing Register 435"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DA0++0x07
line.quad 0x00 "GICD_IROUTER436,Interrupt Routing Register 436"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DA8++0x07
line.quad 0x00 "GICD_IROUTER437,Interrupt Routing Register 437"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DB0++0x07
line.quad 0x00 "GICD_IROUTER438,Interrupt Routing Register 438"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DB8++0x07
line.quad 0x00 "GICD_IROUTER439,Interrupt Routing Register 439"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DC0++0x07
line.quad 0x00 "GICD_IROUTER440,Interrupt Routing Register 440"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DC8++0x07
line.quad 0x00 "GICD_IROUTER441,Interrupt Routing Register 441"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DD0++0x07
line.quad 0x00 "GICD_IROUTER442,Interrupt Routing Register 442"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DD8++0x07
line.quad 0x00 "GICD_IROUTER443,Interrupt Routing Register 443"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DE0++0x07
line.quad 0x00 "GICD_IROUTER444,Interrupt Routing Register 444"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DE8++0x07
line.quad 0x00 "GICD_IROUTER445,Interrupt Routing Register 445"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DF0++0x07
line.quad 0x00 "GICD_IROUTER446,Interrupt Routing Register 446"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DF8++0x07
line.quad 0x00 "GICD_IROUTER447,Interrupt Routing Register 447"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E00++0x07
line.quad 0x00 "GICD_IROUTER448,Interrupt Routing Register 448"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E08++0x07
line.quad 0x00 "GICD_IROUTER449,Interrupt Routing Register 449"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E10++0x07
line.quad 0x00 "GICD_IROUTER450,Interrupt Routing Register 450"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E18++0x07
line.quad 0x00 "GICD_IROUTER451,Interrupt Routing Register 451"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E20++0x07
line.quad 0x00 "GICD_IROUTER452,Interrupt Routing Register 452"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E28++0x07
line.quad 0x00 "GICD_IROUTER453,Interrupt Routing Register 453"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E30++0x07
line.quad 0x00 "GICD_IROUTER454,Interrupt Routing Register 454"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E38++0x07
line.quad 0x00 "GICD_IROUTER455,Interrupt Routing Register 455"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E40++0x07
line.quad 0x00 "GICD_IROUTER456,Interrupt Routing Register 456"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E48++0x07
line.quad 0x00 "GICD_IROUTER457,Interrupt Routing Register 457"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E50++0x07
line.quad 0x00 "GICD_IROUTER458,Interrupt Routing Register 458"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E58++0x07
line.quad 0x00 "GICD_IROUTER459,Interrupt Routing Register 459"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E60++0x07
line.quad 0x00 "GICD_IROUTER460,Interrupt Routing Register 460"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E68++0x07
line.quad 0x00 "GICD_IROUTER461,Interrupt Routing Register 461"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E70++0x07
line.quad 0x00 "GICD_IROUTER462,Interrupt Routing Register 462"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E78++0x07
line.quad 0x00 "GICD_IROUTER463,Interrupt Routing Register 463"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E80++0x07
line.quad 0x00 "GICD_IROUTER464,Interrupt Routing Register 464"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E88++0x07
line.quad 0x00 "GICD_IROUTER465,Interrupt Routing Register 465"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E90++0x07
line.quad 0x00 "GICD_IROUTER466,Interrupt Routing Register 466"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E98++0x07
line.quad 0x00 "GICD_IROUTER467,Interrupt Routing Register 467"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EA0++0x07
line.quad 0x00 "GICD_IROUTER468,Interrupt Routing Register 468"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EA8++0x07
line.quad 0x00 "GICD_IROUTER469,Interrupt Routing Register 469"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EB0++0x07
line.quad 0x00 "GICD_IROUTER470,Interrupt Routing Register 470"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EB8++0x07
line.quad 0x00 "GICD_IROUTER471,Interrupt Routing Register 471"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EC0++0x07
line.quad 0x00 "GICD_IROUTER472,Interrupt Routing Register 472"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EC8++0x07
line.quad 0x00 "GICD_IROUTER473,Interrupt Routing Register 473"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6ED0++0x07
line.quad 0x00 "GICD_IROUTER474,Interrupt Routing Register 474"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6ED8++0x07
line.quad 0x00 "GICD_IROUTER475,Interrupt Routing Register 475"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EE0++0x07
line.quad 0x00 "GICD_IROUTER476,Interrupt Routing Register 476"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EE8++0x07
line.quad 0x00 "GICD_IROUTER477,Interrupt Routing Register 477"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EF0++0x07
line.quad 0x00 "GICD_IROUTER478,Interrupt Routing Register 478"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EF8++0x07
line.quad 0x00 "GICD_IROUTER479,Interrupt Routing Register 479"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F00++0x07
line.quad 0x00 "GICD_IROUTER480,Interrupt Routing Register 480"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F08++0x07
line.quad 0x00 "GICD_IROUTER481,Interrupt Routing Register 481"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F10++0x07
line.quad 0x00 "GICD_IROUTER482,Interrupt Routing Register 482"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F18++0x07
line.quad 0x00 "GICD_IROUTER483,Interrupt Routing Register 483"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F20++0x07
line.quad 0x00 "GICD_IROUTER484,Interrupt Routing Register 484"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F28++0x07
line.quad 0x00 "GICD_IROUTER485,Interrupt Routing Register 485"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F30++0x07
line.quad 0x00 "GICD_IROUTER486,Interrupt Routing Register 486"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F38++0x07
line.quad 0x00 "GICD_IROUTER487,Interrupt Routing Register 487"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F40++0x07
line.quad 0x00 "GICD_IROUTER488,Interrupt Routing Register 488"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F48++0x07
line.quad 0x00 "GICD_IROUTER489,Interrupt Routing Register 489"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F50++0x07
line.quad 0x00 "GICD_IROUTER490,Interrupt Routing Register 490"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F58++0x07
line.quad 0x00 "GICD_IROUTER491,Interrupt Routing Register 491"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F60++0x07
line.quad 0x00 "GICD_IROUTER492,Interrupt Routing Register 492"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F68++0x07
line.quad 0x00 "GICD_IROUTER493,Interrupt Routing Register 493"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F70++0x07
line.quad 0x00 "GICD_IROUTER494,Interrupt Routing Register 494"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F78++0x07
line.quad 0x00 "GICD_IROUTER495,Interrupt Routing Register 495"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F80++0x07
line.quad 0x00 "GICD_IROUTER496,Interrupt Routing Register 496"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F88++0x07
line.quad 0x00 "GICD_IROUTER497,Interrupt Routing Register 497"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F90++0x07
line.quad 0x00 "GICD_IROUTER498,Interrupt Routing Register 498"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F98++0x07
line.quad 0x00 "GICD_IROUTER499,Interrupt Routing Register 499"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FA0++0x07
line.quad 0x00 "GICD_IROUTER500,Interrupt Routing Register 500"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FA8++0x07
line.quad 0x00 "GICD_IROUTER501,Interrupt Routing Register 501"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FB0++0x07
line.quad 0x00 "GICD_IROUTER502,Interrupt Routing Register 502"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FB8++0x07
line.quad 0x00 "GICD_IROUTER503,Interrupt Routing Register 503"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FC0++0x07
line.quad 0x00 "GICD_IROUTER504,Interrupt Routing Register 504"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FC8++0x07
line.quad 0x00 "GICD_IROUTER505,Interrupt Routing Register 505"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FD0++0x07
line.quad 0x00 "GICD_IROUTER506,Interrupt Routing Register 506"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FD8++0x07
line.quad 0x00 "GICD_IROUTER507,Interrupt Routing Register 507"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FE0++0x07
line.quad 0x00 "GICD_IROUTER508,Interrupt Routing Register 508"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FE8++0x07
line.quad 0x00 "GICD_IROUTER509,Interrupt Routing Register 509"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FF0++0x07
line.quad 0x00 "GICD_IROUTER510,Interrupt Routing Register 510"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FF8++0x07
line.quad 0x00 "GICD_IROUTER511,Interrupt Routing Register 511"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7000++0x07
line.quad 0x00 "GICD_IROUTER512,Interrupt Routing Register 512"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7008++0x07
line.quad 0x00 "GICD_IROUTER513,Interrupt Routing Register 513"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7010++0x07
line.quad 0x00 "GICD_IROUTER514,Interrupt Routing Register 514"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7018++0x07
line.quad 0x00 "GICD_IROUTER515,Interrupt Routing Register 515"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7020++0x07
line.quad 0x00 "GICD_IROUTER516,Interrupt Routing Register 516"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7028++0x07
line.quad 0x00 "GICD_IROUTER517,Interrupt Routing Register 517"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7030++0x07
line.quad 0x00 "GICD_IROUTER518,Interrupt Routing Register 518"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7038++0x07
line.quad 0x00 "GICD_IROUTER519,Interrupt Routing Register 519"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7040++0x07
line.quad 0x00 "GICD_IROUTER520,Interrupt Routing Register 520"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7048++0x07
line.quad 0x00 "GICD_IROUTER521,Interrupt Routing Register 521"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7050++0x07
line.quad 0x00 "GICD_IROUTER522,Interrupt Routing Register 522"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7058++0x07
line.quad 0x00 "GICD_IROUTER523,Interrupt Routing Register 523"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7060++0x07
line.quad 0x00 "GICD_IROUTER524,Interrupt Routing Register 524"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7068++0x07
line.quad 0x00 "GICD_IROUTER525,Interrupt Routing Register 525"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7070++0x07
line.quad 0x00 "GICD_IROUTER526,Interrupt Routing Register 526"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7078++0x07
line.quad 0x00 "GICD_IROUTER527,Interrupt Routing Register 527"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7080++0x07
line.quad 0x00 "GICD_IROUTER528,Interrupt Routing Register 528"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7088++0x07
line.quad 0x00 "GICD_IROUTER529,Interrupt Routing Register 529"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7090++0x07
line.quad 0x00 "GICD_IROUTER530,Interrupt Routing Register 530"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7098++0x07
line.quad 0x00 "GICD_IROUTER531,Interrupt Routing Register 531"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70A0++0x07
line.quad 0x00 "GICD_IROUTER532,Interrupt Routing Register 532"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70A8++0x07
line.quad 0x00 "GICD_IROUTER533,Interrupt Routing Register 533"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70B0++0x07
line.quad 0x00 "GICD_IROUTER534,Interrupt Routing Register 534"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70B8++0x07
line.quad 0x00 "GICD_IROUTER535,Interrupt Routing Register 535"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70C0++0x07
line.quad 0x00 "GICD_IROUTER536,Interrupt Routing Register 536"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70C8++0x07
line.quad 0x00 "GICD_IROUTER537,Interrupt Routing Register 537"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70D0++0x07
line.quad 0x00 "GICD_IROUTER538,Interrupt Routing Register 538"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70D8++0x07
line.quad 0x00 "GICD_IROUTER539,Interrupt Routing Register 539"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70E0++0x07
line.quad 0x00 "GICD_IROUTER540,Interrupt Routing Register 540"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70E8++0x07
line.quad 0x00 "GICD_IROUTER541,Interrupt Routing Register 541"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70F0++0x07
line.quad 0x00 "GICD_IROUTER542,Interrupt Routing Register 542"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70F8++0x07
line.quad 0x00 "GICD_IROUTER543,Interrupt Routing Register 543"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7100++0x07
line.quad 0x00 "GICD_IROUTER544,Interrupt Routing Register 544"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7108++0x07
line.quad 0x00 "GICD_IROUTER545,Interrupt Routing Register 545"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7110++0x07
line.quad 0x00 "GICD_IROUTER546,Interrupt Routing Register 546"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7118++0x07
line.quad 0x00 "GICD_IROUTER547,Interrupt Routing Register 547"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7120++0x07
line.quad 0x00 "GICD_IROUTER548,Interrupt Routing Register 548"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7128++0x07
line.quad 0x00 "GICD_IROUTER549,Interrupt Routing Register 549"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7130++0x07
line.quad 0x00 "GICD_IROUTER550,Interrupt Routing Register 550"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7138++0x07
line.quad 0x00 "GICD_IROUTER551,Interrupt Routing Register 551"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7140++0x07
line.quad 0x00 "GICD_IROUTER552,Interrupt Routing Register 552"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7148++0x07
line.quad 0x00 "GICD_IROUTER553,Interrupt Routing Register 553"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7150++0x07
line.quad 0x00 "GICD_IROUTER554,Interrupt Routing Register 554"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7158++0x07
line.quad 0x00 "GICD_IROUTER555,Interrupt Routing Register 555"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7160++0x07
line.quad 0x00 "GICD_IROUTER556,Interrupt Routing Register 556"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7168++0x07
line.quad 0x00 "GICD_IROUTER557,Interrupt Routing Register 557"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7170++0x07
line.quad 0x00 "GICD_IROUTER558,Interrupt Routing Register 558"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7178++0x07
line.quad 0x00 "GICD_IROUTER559,Interrupt Routing Register 559"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7180++0x07
line.quad 0x00 "GICD_IROUTER560,Interrupt Routing Register 560"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7188++0x07
line.quad 0x00 "GICD_IROUTER561,Interrupt Routing Register 561"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7190++0x07
line.quad 0x00 "GICD_IROUTER562,Interrupt Routing Register 562"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7198++0x07
line.quad 0x00 "GICD_IROUTER563,Interrupt Routing Register 563"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71A0++0x07
line.quad 0x00 "GICD_IROUTER564,Interrupt Routing Register 564"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71A8++0x07
line.quad 0x00 "GICD_IROUTER565,Interrupt Routing Register 565"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71B0++0x07
line.quad 0x00 "GICD_IROUTER566,Interrupt Routing Register 566"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71B8++0x07
line.quad 0x00 "GICD_IROUTER567,Interrupt Routing Register 567"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71C0++0x07
line.quad 0x00 "GICD_IROUTER568,Interrupt Routing Register 568"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71C8++0x07
line.quad 0x00 "GICD_IROUTER569,Interrupt Routing Register 569"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71D0++0x07
line.quad 0x00 "GICD_IROUTER570,Interrupt Routing Register 570"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71D8++0x07
line.quad 0x00 "GICD_IROUTER571,Interrupt Routing Register 571"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71E0++0x07
line.quad 0x00 "GICD_IROUTER572,Interrupt Routing Register 572"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71E8++0x07
line.quad 0x00 "GICD_IROUTER573,Interrupt Routing Register 573"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71F0++0x07
line.quad 0x00 "GICD_IROUTER574,Interrupt Routing Register 574"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71F8++0x07
line.quad 0x00 "GICD_IROUTER575,Interrupt Routing Register 575"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7200++0x07
line.quad 0x00 "GICD_IROUTER576,Interrupt Routing Register 576"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7208++0x07
line.quad 0x00 "GICD_IROUTER577,Interrupt Routing Register 577"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7210++0x07
line.quad 0x00 "GICD_IROUTER578,Interrupt Routing Register 578"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7218++0x07
line.quad 0x00 "GICD_IROUTER579,Interrupt Routing Register 579"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7220++0x07
line.quad 0x00 "GICD_IROUTER580,Interrupt Routing Register 580"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7228++0x07
line.quad 0x00 "GICD_IROUTER581,Interrupt Routing Register 581"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7230++0x07
line.quad 0x00 "GICD_IROUTER582,Interrupt Routing Register 582"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7238++0x07
line.quad 0x00 "GICD_IROUTER583,Interrupt Routing Register 583"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7240++0x07
line.quad 0x00 "GICD_IROUTER584,Interrupt Routing Register 584"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7248++0x07
line.quad 0x00 "GICD_IROUTER585,Interrupt Routing Register 585"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7250++0x07
line.quad 0x00 "GICD_IROUTER586,Interrupt Routing Register 586"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7258++0x07
line.quad 0x00 "GICD_IROUTER587,Interrupt Routing Register 587"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7260++0x07
line.quad 0x00 "GICD_IROUTER588,Interrupt Routing Register 588"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7268++0x07
line.quad 0x00 "GICD_IROUTER589,Interrupt Routing Register 589"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7270++0x07
line.quad 0x00 "GICD_IROUTER590,Interrupt Routing Register 590"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7278++0x07
line.quad 0x00 "GICD_IROUTER591,Interrupt Routing Register 591"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7280++0x07
line.quad 0x00 "GICD_IROUTER592,Interrupt Routing Register 592"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7288++0x07
line.quad 0x00 "GICD_IROUTER593,Interrupt Routing Register 593"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7290++0x07
line.quad 0x00 "GICD_IROUTER594,Interrupt Routing Register 594"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7298++0x07
line.quad 0x00 "GICD_IROUTER595,Interrupt Routing Register 595"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72A0++0x07
line.quad 0x00 "GICD_IROUTER596,Interrupt Routing Register 596"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72A8++0x07
line.quad 0x00 "GICD_IROUTER597,Interrupt Routing Register 597"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72B0++0x07
line.quad 0x00 "GICD_IROUTER598,Interrupt Routing Register 598"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72B8++0x07
line.quad 0x00 "GICD_IROUTER599,Interrupt Routing Register 599"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72C0++0x07
line.quad 0x00 "GICD_IROUTER600,Interrupt Routing Register 600"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72C8++0x07
line.quad 0x00 "GICD_IROUTER601,Interrupt Routing Register 601"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72D0++0x07
line.quad 0x00 "GICD_IROUTER602,Interrupt Routing Register 602"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72D8++0x07
line.quad 0x00 "GICD_IROUTER603,Interrupt Routing Register 603"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72E0++0x07
line.quad 0x00 "GICD_IROUTER604,Interrupt Routing Register 604"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72E8++0x07
line.quad 0x00 "GICD_IROUTER605,Interrupt Routing Register 605"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72F0++0x07
line.quad 0x00 "GICD_IROUTER606,Interrupt Routing Register 606"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72F8++0x07
line.quad 0x00 "GICD_IROUTER607,Interrupt Routing Register 607"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7300++0x07
line.quad 0x00 "GICD_IROUTER608,Interrupt Routing Register 608"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7308++0x07
line.quad 0x00 "GICD_IROUTER609,Interrupt Routing Register 609"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7310++0x07
line.quad 0x00 "GICD_IROUTER610,Interrupt Routing Register 610"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7318++0x07
line.quad 0x00 "GICD_IROUTER611,Interrupt Routing Register 611"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7320++0x07
line.quad 0x00 "GICD_IROUTER612,Interrupt Routing Register 612"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7328++0x07
line.quad 0x00 "GICD_IROUTER613,Interrupt Routing Register 613"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7330++0x07
line.quad 0x00 "GICD_IROUTER614,Interrupt Routing Register 614"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7338++0x07
line.quad 0x00 "GICD_IROUTER615,Interrupt Routing Register 615"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7340++0x07
line.quad 0x00 "GICD_IROUTER616,Interrupt Routing Register 616"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7348++0x07
line.quad 0x00 "GICD_IROUTER617,Interrupt Routing Register 617"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7350++0x07
line.quad 0x00 "GICD_IROUTER618,Interrupt Routing Register 618"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7358++0x07
line.quad 0x00 "GICD_IROUTER619,Interrupt Routing Register 619"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7360++0x07
line.quad 0x00 "GICD_IROUTER620,Interrupt Routing Register 620"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7368++0x07
line.quad 0x00 "GICD_IROUTER621,Interrupt Routing Register 621"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7370++0x07
line.quad 0x00 "GICD_IROUTER622,Interrupt Routing Register 622"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7378++0x07
line.quad 0x00 "GICD_IROUTER623,Interrupt Routing Register 623"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7380++0x07
line.quad 0x00 "GICD_IROUTER624,Interrupt Routing Register 624"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7388++0x07
line.quad 0x00 "GICD_IROUTER625,Interrupt Routing Register 625"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7390++0x07
line.quad 0x00 "GICD_IROUTER626,Interrupt Routing Register 626"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7398++0x07
line.quad 0x00 "GICD_IROUTER627,Interrupt Routing Register 627"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73A0++0x07
line.quad 0x00 "GICD_IROUTER628,Interrupt Routing Register 628"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73A8++0x07
line.quad 0x00 "GICD_IROUTER629,Interrupt Routing Register 629"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73B0++0x07
line.quad 0x00 "GICD_IROUTER630,Interrupt Routing Register 630"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73B8++0x07
line.quad 0x00 "GICD_IROUTER631,Interrupt Routing Register 631"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73C0++0x07
line.quad 0x00 "GICD_IROUTER632,Interrupt Routing Register 632"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73C8++0x07
line.quad 0x00 "GICD_IROUTER633,Interrupt Routing Register 633"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73D0++0x07
line.quad 0x00 "GICD_IROUTER634,Interrupt Routing Register 634"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73D8++0x07
line.quad 0x00 "GICD_IROUTER635,Interrupt Routing Register 635"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73E0++0x07
line.quad 0x00 "GICD_IROUTER636,Interrupt Routing Register 636"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73E8++0x07
line.quad 0x00 "GICD_IROUTER637,Interrupt Routing Register 637"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73F0++0x07
line.quad 0x00 "GICD_IROUTER638,Interrupt Routing Register 638"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73F8++0x07
line.quad 0x00 "GICD_IROUTER639,Interrupt Routing Register 639"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7400++0x07
line.quad 0x00 "GICD_IROUTER640,Interrupt Routing Register 640"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7408++0x07
line.quad 0x00 "GICD_IROUTER641,Interrupt Routing Register 641"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7410++0x07
line.quad 0x00 "GICD_IROUTER642,Interrupt Routing Register 642"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7418++0x07
line.quad 0x00 "GICD_IROUTER643,Interrupt Routing Register 643"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7420++0x07
line.quad 0x00 "GICD_IROUTER644,Interrupt Routing Register 644"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7428++0x07
line.quad 0x00 "GICD_IROUTER645,Interrupt Routing Register 645"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7430++0x07
line.quad 0x00 "GICD_IROUTER646,Interrupt Routing Register 646"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7438++0x07
line.quad 0x00 "GICD_IROUTER647,Interrupt Routing Register 647"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7440++0x07
line.quad 0x00 "GICD_IROUTER648,Interrupt Routing Register 648"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7448++0x07
line.quad 0x00 "GICD_IROUTER649,Interrupt Routing Register 649"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7450++0x07
line.quad 0x00 "GICD_IROUTER650,Interrupt Routing Register 650"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7458++0x07
line.quad 0x00 "GICD_IROUTER651,Interrupt Routing Register 651"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7460++0x07
line.quad 0x00 "GICD_IROUTER652,Interrupt Routing Register 652"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7468++0x07
line.quad 0x00 "GICD_IROUTER653,Interrupt Routing Register 653"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7470++0x07
line.quad 0x00 "GICD_IROUTER654,Interrupt Routing Register 654"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7478++0x07
line.quad 0x00 "GICD_IROUTER655,Interrupt Routing Register 655"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7480++0x07
line.quad 0x00 "GICD_IROUTER656,Interrupt Routing Register 656"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7488++0x07
line.quad 0x00 "GICD_IROUTER657,Interrupt Routing Register 657"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7490++0x07
line.quad 0x00 "GICD_IROUTER658,Interrupt Routing Register 658"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7498++0x07
line.quad 0x00 "GICD_IROUTER659,Interrupt Routing Register 659"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74A0++0x07
line.quad 0x00 "GICD_IROUTER660,Interrupt Routing Register 660"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74A8++0x07
line.quad 0x00 "GICD_IROUTER661,Interrupt Routing Register 661"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74B0++0x07
line.quad 0x00 "GICD_IROUTER662,Interrupt Routing Register 662"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74B8++0x07
line.quad 0x00 "GICD_IROUTER663,Interrupt Routing Register 663"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74C0++0x07
line.quad 0x00 "GICD_IROUTER664,Interrupt Routing Register 664"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74C8++0x07
line.quad 0x00 "GICD_IROUTER665,Interrupt Routing Register 665"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74D0++0x07
line.quad 0x00 "GICD_IROUTER666,Interrupt Routing Register 666"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74D8++0x07
line.quad 0x00 "GICD_IROUTER667,Interrupt Routing Register 667"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74E0++0x07
line.quad 0x00 "GICD_IROUTER668,Interrupt Routing Register 668"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74E8++0x07
line.quad 0x00 "GICD_IROUTER669,Interrupt Routing Register 669"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74F0++0x07
line.quad 0x00 "GICD_IROUTER670,Interrupt Routing Register 670"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74F8++0x07
line.quad 0x00 "GICD_IROUTER671,Interrupt Routing Register 671"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7500++0x07
line.quad 0x00 "GICD_IROUTER672,Interrupt Routing Register 672"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7508++0x07
line.quad 0x00 "GICD_IROUTER673,Interrupt Routing Register 673"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7510++0x07
line.quad 0x00 "GICD_IROUTER674,Interrupt Routing Register 674"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7518++0x07
line.quad 0x00 "GICD_IROUTER675,Interrupt Routing Register 675"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7520++0x07
line.quad 0x00 "GICD_IROUTER676,Interrupt Routing Register 676"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7528++0x07
line.quad 0x00 "GICD_IROUTER677,Interrupt Routing Register 677"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7530++0x07
line.quad 0x00 "GICD_IROUTER678,Interrupt Routing Register 678"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7538++0x07
line.quad 0x00 "GICD_IROUTER679,Interrupt Routing Register 679"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7540++0x07
line.quad 0x00 "GICD_IROUTER680,Interrupt Routing Register 680"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7548++0x07
line.quad 0x00 "GICD_IROUTER681,Interrupt Routing Register 681"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7550++0x07
line.quad 0x00 "GICD_IROUTER682,Interrupt Routing Register 682"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7558++0x07
line.quad 0x00 "GICD_IROUTER683,Interrupt Routing Register 683"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7560++0x07
line.quad 0x00 "GICD_IROUTER684,Interrupt Routing Register 684"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7568++0x07
line.quad 0x00 "GICD_IROUTER685,Interrupt Routing Register 685"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7570++0x07
line.quad 0x00 "GICD_IROUTER686,Interrupt Routing Register 686"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7578++0x07
line.quad 0x00 "GICD_IROUTER687,Interrupt Routing Register 687"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7580++0x07
line.quad 0x00 "GICD_IROUTER688,Interrupt Routing Register 688"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7588++0x07
line.quad 0x00 "GICD_IROUTER689,Interrupt Routing Register 689"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7590++0x07
line.quad 0x00 "GICD_IROUTER690,Interrupt Routing Register 690"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7598++0x07
line.quad 0x00 "GICD_IROUTER691,Interrupt Routing Register 691"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75A0++0x07
line.quad 0x00 "GICD_IROUTER692,Interrupt Routing Register 692"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75A8++0x07
line.quad 0x00 "GICD_IROUTER693,Interrupt Routing Register 693"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75B0++0x07
line.quad 0x00 "GICD_IROUTER694,Interrupt Routing Register 694"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75B8++0x07
line.quad 0x00 "GICD_IROUTER695,Interrupt Routing Register 695"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75C0++0x07
line.quad 0x00 "GICD_IROUTER696,Interrupt Routing Register 696"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75C8++0x07
line.quad 0x00 "GICD_IROUTER697,Interrupt Routing Register 697"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75D0++0x07
line.quad 0x00 "GICD_IROUTER698,Interrupt Routing Register 698"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75D8++0x07
line.quad 0x00 "GICD_IROUTER699,Interrupt Routing Register 699"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75E0++0x07
line.quad 0x00 "GICD_IROUTER700,Interrupt Routing Register 700"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75E8++0x07
line.quad 0x00 "GICD_IROUTER701,Interrupt Routing Register 701"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75F0++0x07
line.quad 0x00 "GICD_IROUTER702,Interrupt Routing Register 702"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75F8++0x07
line.quad 0x00 "GICD_IROUTER703,Interrupt Routing Register 703"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7600++0x07
line.quad 0x00 "GICD_IROUTER704,Interrupt Routing Register 704"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7608++0x07
line.quad 0x00 "GICD_IROUTER705,Interrupt Routing Register 705"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7610++0x07
line.quad 0x00 "GICD_IROUTER706,Interrupt Routing Register 706"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7618++0x07
line.quad 0x00 "GICD_IROUTER707,Interrupt Routing Register 707"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7620++0x07
line.quad 0x00 "GICD_IROUTER708,Interrupt Routing Register 708"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7628++0x07
line.quad 0x00 "GICD_IROUTER709,Interrupt Routing Register 709"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7630++0x07
line.quad 0x00 "GICD_IROUTER710,Interrupt Routing Register 710"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7638++0x07
line.quad 0x00 "GICD_IROUTER711,Interrupt Routing Register 711"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7640++0x07
line.quad 0x00 "GICD_IROUTER712,Interrupt Routing Register 712"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7648++0x07
line.quad 0x00 "GICD_IROUTER713,Interrupt Routing Register 713"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7650++0x07
line.quad 0x00 "GICD_IROUTER714,Interrupt Routing Register 714"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7658++0x07
line.quad 0x00 "GICD_IROUTER715,Interrupt Routing Register 715"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7660++0x07
line.quad 0x00 "GICD_IROUTER716,Interrupt Routing Register 716"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7668++0x07
line.quad 0x00 "GICD_IROUTER717,Interrupt Routing Register 717"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7670++0x07
line.quad 0x00 "GICD_IROUTER718,Interrupt Routing Register 718"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7678++0x07
line.quad 0x00 "GICD_IROUTER719,Interrupt Routing Register 719"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7680++0x07
line.quad 0x00 "GICD_IROUTER720,Interrupt Routing Register 720"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7688++0x07
line.quad 0x00 "GICD_IROUTER721,Interrupt Routing Register 721"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7690++0x07
line.quad 0x00 "GICD_IROUTER722,Interrupt Routing Register 722"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7698++0x07
line.quad 0x00 "GICD_IROUTER723,Interrupt Routing Register 723"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76A0++0x07
line.quad 0x00 "GICD_IROUTER724,Interrupt Routing Register 724"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76A8++0x07
line.quad 0x00 "GICD_IROUTER725,Interrupt Routing Register 725"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76B0++0x07
line.quad 0x00 "GICD_IROUTER726,Interrupt Routing Register 726"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76B8++0x07
line.quad 0x00 "GICD_IROUTER727,Interrupt Routing Register 727"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76C0++0x07
line.quad 0x00 "GICD_IROUTER728,Interrupt Routing Register 728"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76C8++0x07
line.quad 0x00 "GICD_IROUTER729,Interrupt Routing Register 729"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76D0++0x07
line.quad 0x00 "GICD_IROUTER730,Interrupt Routing Register 730"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76D8++0x07
line.quad 0x00 "GICD_IROUTER731,Interrupt Routing Register 731"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76E0++0x07
line.quad 0x00 "GICD_IROUTER732,Interrupt Routing Register 732"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76E8++0x07
line.quad 0x00 "GICD_IROUTER733,Interrupt Routing Register 733"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76F0++0x07
line.quad 0x00 "GICD_IROUTER734,Interrupt Routing Register 734"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76F8++0x07
line.quad 0x00 "GICD_IROUTER735,Interrupt Routing Register 735"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7700++0x07
line.quad 0x00 "GICD_IROUTER736,Interrupt Routing Register 736"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7708++0x07
line.quad 0x00 "GICD_IROUTER737,Interrupt Routing Register 737"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7710++0x07
line.quad 0x00 "GICD_IROUTER738,Interrupt Routing Register 738"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7718++0x07
line.quad 0x00 "GICD_IROUTER739,Interrupt Routing Register 739"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7720++0x07
line.quad 0x00 "GICD_IROUTER740,Interrupt Routing Register 740"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7728++0x07
line.quad 0x00 "GICD_IROUTER741,Interrupt Routing Register 741"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7730++0x07
line.quad 0x00 "GICD_IROUTER742,Interrupt Routing Register 742"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7738++0x07
line.quad 0x00 "GICD_IROUTER743,Interrupt Routing Register 743"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7740++0x07
line.quad 0x00 "GICD_IROUTER744,Interrupt Routing Register 744"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7748++0x07
line.quad 0x00 "GICD_IROUTER745,Interrupt Routing Register 745"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7750++0x07
line.quad 0x00 "GICD_IROUTER746,Interrupt Routing Register 746"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7758++0x07
line.quad 0x00 "GICD_IROUTER747,Interrupt Routing Register 747"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7760++0x07
line.quad 0x00 "GICD_IROUTER748,Interrupt Routing Register 748"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7768++0x07
line.quad 0x00 "GICD_IROUTER749,Interrupt Routing Register 749"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7770++0x07
line.quad 0x00 "GICD_IROUTER750,Interrupt Routing Register 750"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7778++0x07
line.quad 0x00 "GICD_IROUTER751,Interrupt Routing Register 751"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7780++0x07
line.quad 0x00 "GICD_IROUTER752,Interrupt Routing Register 752"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7788++0x07
line.quad 0x00 "GICD_IROUTER753,Interrupt Routing Register 753"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7790++0x07
line.quad 0x00 "GICD_IROUTER754,Interrupt Routing Register 754"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7798++0x07
line.quad 0x00 "GICD_IROUTER755,Interrupt Routing Register 755"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77A0++0x07
line.quad 0x00 "GICD_IROUTER756,Interrupt Routing Register 756"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77A8++0x07
line.quad 0x00 "GICD_IROUTER757,Interrupt Routing Register 757"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77B0++0x07
line.quad 0x00 "GICD_IROUTER758,Interrupt Routing Register 758"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77B8++0x07
line.quad 0x00 "GICD_IROUTER759,Interrupt Routing Register 759"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77C0++0x07
line.quad 0x00 "GICD_IROUTER760,Interrupt Routing Register 760"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77C8++0x07
line.quad 0x00 "GICD_IROUTER761,Interrupt Routing Register 761"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77D0++0x07
line.quad 0x00 "GICD_IROUTER762,Interrupt Routing Register 762"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77D8++0x07
line.quad 0x00 "GICD_IROUTER763,Interrupt Routing Register 763"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77E0++0x07
line.quad 0x00 "GICD_IROUTER764,Interrupt Routing Register 764"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77E8++0x07
line.quad 0x00 "GICD_IROUTER765,Interrupt Routing Register 765"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77F0++0x07
line.quad 0x00 "GICD_IROUTER766,Interrupt Routing Register 766"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77F8++0x07
line.quad 0x00 "GICD_IROUTER767,Interrupt Routing Register 767"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7800++0x07
line.quad 0x00 "GICD_IROUTER768,Interrupt Routing Register 768"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7808++0x07
line.quad 0x00 "GICD_IROUTER769,Interrupt Routing Register 769"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7810++0x07
line.quad 0x00 "GICD_IROUTER770,Interrupt Routing Register 770"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7818++0x07
line.quad 0x00 "GICD_IROUTER771,Interrupt Routing Register 771"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7820++0x07
line.quad 0x00 "GICD_IROUTER772,Interrupt Routing Register 772"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7828++0x07
line.quad 0x00 "GICD_IROUTER773,Interrupt Routing Register 773"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7830++0x07
line.quad 0x00 "GICD_IROUTER774,Interrupt Routing Register 774"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7838++0x07
line.quad 0x00 "GICD_IROUTER775,Interrupt Routing Register 775"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7840++0x07
line.quad 0x00 "GICD_IROUTER776,Interrupt Routing Register 776"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7848++0x07
line.quad 0x00 "GICD_IROUTER777,Interrupt Routing Register 777"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7850++0x07
line.quad 0x00 "GICD_IROUTER778,Interrupt Routing Register 778"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7858++0x07
line.quad 0x00 "GICD_IROUTER779,Interrupt Routing Register 779"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7860++0x07
line.quad 0x00 "GICD_IROUTER780,Interrupt Routing Register 780"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7868++0x07
line.quad 0x00 "GICD_IROUTER781,Interrupt Routing Register 781"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7870++0x07
line.quad 0x00 "GICD_IROUTER782,Interrupt Routing Register 782"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7878++0x07
line.quad 0x00 "GICD_IROUTER783,Interrupt Routing Register 783"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7880++0x07
line.quad 0x00 "GICD_IROUTER784,Interrupt Routing Register 784"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7888++0x07
line.quad 0x00 "GICD_IROUTER785,Interrupt Routing Register 785"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7890++0x07
line.quad 0x00 "GICD_IROUTER786,Interrupt Routing Register 786"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7898++0x07
line.quad 0x00 "GICD_IROUTER787,Interrupt Routing Register 787"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78A0++0x07
line.quad 0x00 "GICD_IROUTER788,Interrupt Routing Register 788"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78A8++0x07
line.quad 0x00 "GICD_IROUTER789,Interrupt Routing Register 789"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78B0++0x07
line.quad 0x00 "GICD_IROUTER790,Interrupt Routing Register 790"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78B8++0x07
line.quad 0x00 "GICD_IROUTER791,Interrupt Routing Register 791"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78C0++0x07
line.quad 0x00 "GICD_IROUTER792,Interrupt Routing Register 792"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78C8++0x07
line.quad 0x00 "GICD_IROUTER793,Interrupt Routing Register 793"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78D0++0x07
line.quad 0x00 "GICD_IROUTER794,Interrupt Routing Register 794"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78D8++0x07
line.quad 0x00 "GICD_IROUTER795,Interrupt Routing Register 795"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78E0++0x07
line.quad 0x00 "GICD_IROUTER796,Interrupt Routing Register 796"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78E8++0x07
line.quad 0x00 "GICD_IROUTER797,Interrupt Routing Register 797"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78F0++0x07
line.quad 0x00 "GICD_IROUTER798,Interrupt Routing Register 798"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78F8++0x07
line.quad 0x00 "GICD_IROUTER799,Interrupt Routing Register 799"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7900++0x07
line.quad 0x00 "GICD_IROUTER800,Interrupt Routing Register 800"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7908++0x07
line.quad 0x00 "GICD_IROUTER801,Interrupt Routing Register 801"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7910++0x07
line.quad 0x00 "GICD_IROUTER802,Interrupt Routing Register 802"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7918++0x07
line.quad 0x00 "GICD_IROUTER803,Interrupt Routing Register 803"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7920++0x07
line.quad 0x00 "GICD_IROUTER804,Interrupt Routing Register 804"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7928++0x07
line.quad 0x00 "GICD_IROUTER805,Interrupt Routing Register 805"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7930++0x07
line.quad 0x00 "GICD_IROUTER806,Interrupt Routing Register 806"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7938++0x07
line.quad 0x00 "GICD_IROUTER807,Interrupt Routing Register 807"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7940++0x07
line.quad 0x00 "GICD_IROUTER808,Interrupt Routing Register 808"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7948++0x07
line.quad 0x00 "GICD_IROUTER809,Interrupt Routing Register 809"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7950++0x07
line.quad 0x00 "GICD_IROUTER810,Interrupt Routing Register 810"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7958++0x07
line.quad 0x00 "GICD_IROUTER811,Interrupt Routing Register 811"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7960++0x07
line.quad 0x00 "GICD_IROUTER812,Interrupt Routing Register 812"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7968++0x07
line.quad 0x00 "GICD_IROUTER813,Interrupt Routing Register 813"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7970++0x07
line.quad 0x00 "GICD_IROUTER814,Interrupt Routing Register 814"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7978++0x07
line.quad 0x00 "GICD_IROUTER815,Interrupt Routing Register 815"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7980++0x07
line.quad 0x00 "GICD_IROUTER816,Interrupt Routing Register 816"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7988++0x07
line.quad 0x00 "GICD_IROUTER817,Interrupt Routing Register 817"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7990++0x07
line.quad 0x00 "GICD_IROUTER818,Interrupt Routing Register 818"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7998++0x07
line.quad 0x00 "GICD_IROUTER819,Interrupt Routing Register 819"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79A0++0x07
line.quad 0x00 "GICD_IROUTER820,Interrupt Routing Register 820"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79A8++0x07
line.quad 0x00 "GICD_IROUTER821,Interrupt Routing Register 821"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79B0++0x07
line.quad 0x00 "GICD_IROUTER822,Interrupt Routing Register 822"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79B8++0x07
line.quad 0x00 "GICD_IROUTER823,Interrupt Routing Register 823"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79C0++0x07
line.quad 0x00 "GICD_IROUTER824,Interrupt Routing Register 824"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79C8++0x07
line.quad 0x00 "GICD_IROUTER825,Interrupt Routing Register 825"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79D0++0x07
line.quad 0x00 "GICD_IROUTER826,Interrupt Routing Register 826"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79D8++0x07
line.quad 0x00 "GICD_IROUTER827,Interrupt Routing Register 827"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79E0++0x07
line.quad 0x00 "GICD_IROUTER828,Interrupt Routing Register 828"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79E8++0x07
line.quad 0x00 "GICD_IROUTER829,Interrupt Routing Register 829"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79F0++0x07
line.quad 0x00 "GICD_IROUTER830,Interrupt Routing Register 830"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79F8++0x07
line.quad 0x00 "GICD_IROUTER831,Interrupt Routing Register 831"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A00++0x07
line.quad 0x00 "GICD_IROUTER832,Interrupt Routing Register 832"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A08++0x07
line.quad 0x00 "GICD_IROUTER833,Interrupt Routing Register 833"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A10++0x07
line.quad 0x00 "GICD_IROUTER834,Interrupt Routing Register 834"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A18++0x07
line.quad 0x00 "GICD_IROUTER835,Interrupt Routing Register 835"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A20++0x07
line.quad 0x00 "GICD_IROUTER836,Interrupt Routing Register 836"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A28++0x07
line.quad 0x00 "GICD_IROUTER837,Interrupt Routing Register 837"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A30++0x07
line.quad 0x00 "GICD_IROUTER838,Interrupt Routing Register 838"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A38++0x07
line.quad 0x00 "GICD_IROUTER839,Interrupt Routing Register 839"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A40++0x07
line.quad 0x00 "GICD_IROUTER840,Interrupt Routing Register 840"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A48++0x07
line.quad 0x00 "GICD_IROUTER841,Interrupt Routing Register 841"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A50++0x07
line.quad 0x00 "GICD_IROUTER842,Interrupt Routing Register 842"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A58++0x07
line.quad 0x00 "GICD_IROUTER843,Interrupt Routing Register 843"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A60++0x07
line.quad 0x00 "GICD_IROUTER844,Interrupt Routing Register 844"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A68++0x07
line.quad 0x00 "GICD_IROUTER845,Interrupt Routing Register 845"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A70++0x07
line.quad 0x00 "GICD_IROUTER846,Interrupt Routing Register 846"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A78++0x07
line.quad 0x00 "GICD_IROUTER847,Interrupt Routing Register 847"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A80++0x07
line.quad 0x00 "GICD_IROUTER848,Interrupt Routing Register 848"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A88++0x07
line.quad 0x00 "GICD_IROUTER849,Interrupt Routing Register 849"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A90++0x07
line.quad 0x00 "GICD_IROUTER850,Interrupt Routing Register 850"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A98++0x07
line.quad 0x00 "GICD_IROUTER851,Interrupt Routing Register 851"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AA0++0x07
line.quad 0x00 "GICD_IROUTER852,Interrupt Routing Register 852"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AA8++0x07
line.quad 0x00 "GICD_IROUTER853,Interrupt Routing Register 853"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AB0++0x07
line.quad 0x00 "GICD_IROUTER854,Interrupt Routing Register 854"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AB8++0x07
line.quad 0x00 "GICD_IROUTER855,Interrupt Routing Register 855"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AC0++0x07
line.quad 0x00 "GICD_IROUTER856,Interrupt Routing Register 856"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AC8++0x07
line.quad 0x00 "GICD_IROUTER857,Interrupt Routing Register 857"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AD0++0x07
line.quad 0x00 "GICD_IROUTER858,Interrupt Routing Register 858"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AD8++0x07
line.quad 0x00 "GICD_IROUTER859,Interrupt Routing Register 859"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AE0++0x07
line.quad 0x00 "GICD_IROUTER860,Interrupt Routing Register 860"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AE8++0x07
line.quad 0x00 "GICD_IROUTER861,Interrupt Routing Register 861"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AF0++0x07
line.quad 0x00 "GICD_IROUTER862,Interrupt Routing Register 862"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AF8++0x07
line.quad 0x00 "GICD_IROUTER863,Interrupt Routing Register 863"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B00++0x07
line.quad 0x00 "GICD_IROUTER864,Interrupt Routing Register 864"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B08++0x07
line.quad 0x00 "GICD_IROUTER865,Interrupt Routing Register 865"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B10++0x07
line.quad 0x00 "GICD_IROUTER866,Interrupt Routing Register 866"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B18++0x07
line.quad 0x00 "GICD_IROUTER867,Interrupt Routing Register 867"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B20++0x07
line.quad 0x00 "GICD_IROUTER868,Interrupt Routing Register 868"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B28++0x07
line.quad 0x00 "GICD_IROUTER869,Interrupt Routing Register 869"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B30++0x07
line.quad 0x00 "GICD_IROUTER870,Interrupt Routing Register 870"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B38++0x07
line.quad 0x00 "GICD_IROUTER871,Interrupt Routing Register 871"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B40++0x07
line.quad 0x00 "GICD_IROUTER872,Interrupt Routing Register 872"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B48++0x07
line.quad 0x00 "GICD_IROUTER873,Interrupt Routing Register 873"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B50++0x07
line.quad 0x00 "GICD_IROUTER874,Interrupt Routing Register 874"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B58++0x07
line.quad 0x00 "GICD_IROUTER875,Interrupt Routing Register 875"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B60++0x07
line.quad 0x00 "GICD_IROUTER876,Interrupt Routing Register 876"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B68++0x07
line.quad 0x00 "GICD_IROUTER877,Interrupt Routing Register 877"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B70++0x07
line.quad 0x00 "GICD_IROUTER878,Interrupt Routing Register 878"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B78++0x07
line.quad 0x00 "GICD_IROUTER879,Interrupt Routing Register 879"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B80++0x07
line.quad 0x00 "GICD_IROUTER880,Interrupt Routing Register 880"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B88++0x07
line.quad 0x00 "GICD_IROUTER881,Interrupt Routing Register 881"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B90++0x07
line.quad 0x00 "GICD_IROUTER882,Interrupt Routing Register 882"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B98++0x07
line.quad 0x00 "GICD_IROUTER883,Interrupt Routing Register 883"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BA0++0x07
line.quad 0x00 "GICD_IROUTER884,Interrupt Routing Register 884"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BA8++0x07
line.quad 0x00 "GICD_IROUTER885,Interrupt Routing Register 885"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BB0++0x07
line.quad 0x00 "GICD_IROUTER886,Interrupt Routing Register 886"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BB8++0x07
line.quad 0x00 "GICD_IROUTER887,Interrupt Routing Register 887"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BC0++0x07
line.quad 0x00 "GICD_IROUTER888,Interrupt Routing Register 888"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BC8++0x07
line.quad 0x00 "GICD_IROUTER889,Interrupt Routing Register 889"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BD0++0x07
line.quad 0x00 "GICD_IROUTER890,Interrupt Routing Register 890"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BD8++0x07
line.quad 0x00 "GICD_IROUTER891,Interrupt Routing Register 891"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BE0++0x07
line.quad 0x00 "GICD_IROUTER892,Interrupt Routing Register 892"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BE8++0x07
line.quad 0x00 "GICD_IROUTER893,Interrupt Routing Register 893"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BF0++0x07
line.quad 0x00 "GICD_IROUTER894,Interrupt Routing Register 894"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BF8++0x07
line.quad 0x00 "GICD_IROUTER895,Interrupt Routing Register 895"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C00++0x07
line.quad 0x00 "GICD_IROUTER896,Interrupt Routing Register 896"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C08++0x07
line.quad 0x00 "GICD_IROUTER897,Interrupt Routing Register 897"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C10++0x07
line.quad 0x00 "GICD_IROUTER898,Interrupt Routing Register 898"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C18++0x07
line.quad 0x00 "GICD_IROUTER899,Interrupt Routing Register 899"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C20++0x07
line.quad 0x00 "GICD_IROUTER900,Interrupt Routing Register 900"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C28++0x07
line.quad 0x00 "GICD_IROUTER901,Interrupt Routing Register 901"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C30++0x07
line.quad 0x00 "GICD_IROUTER902,Interrupt Routing Register 902"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C38++0x07
line.quad 0x00 "GICD_IROUTER903,Interrupt Routing Register 903"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C40++0x07
line.quad 0x00 "GICD_IROUTER904,Interrupt Routing Register 904"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C48++0x07
line.quad 0x00 "GICD_IROUTER905,Interrupt Routing Register 905"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C50++0x07
line.quad 0x00 "GICD_IROUTER906,Interrupt Routing Register 906"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C58++0x07
line.quad 0x00 "GICD_IROUTER907,Interrupt Routing Register 907"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C60++0x07
line.quad 0x00 "GICD_IROUTER908,Interrupt Routing Register 908"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C68++0x07
line.quad 0x00 "GICD_IROUTER909,Interrupt Routing Register 909"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C70++0x07
line.quad 0x00 "GICD_IROUTER910,Interrupt Routing Register 910"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C78++0x07
line.quad 0x00 "GICD_IROUTER911,Interrupt Routing Register 911"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C80++0x07
line.quad 0x00 "GICD_IROUTER912,Interrupt Routing Register 912"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C88++0x07
line.quad 0x00 "GICD_IROUTER913,Interrupt Routing Register 913"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C90++0x07
line.quad 0x00 "GICD_IROUTER914,Interrupt Routing Register 914"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C98++0x07
line.quad 0x00 "GICD_IROUTER915,Interrupt Routing Register 915"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CA0++0x07
line.quad 0x00 "GICD_IROUTER916,Interrupt Routing Register 916"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CA8++0x07
line.quad 0x00 "GICD_IROUTER917,Interrupt Routing Register 917"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CB0++0x07
line.quad 0x00 "GICD_IROUTER918,Interrupt Routing Register 918"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CB8++0x07
line.quad 0x00 "GICD_IROUTER919,Interrupt Routing Register 919"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CC0++0x07
line.quad 0x00 "GICD_IROUTER920,Interrupt Routing Register 920"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CC8++0x07
line.quad 0x00 "GICD_IROUTER921,Interrupt Routing Register 921"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CD0++0x07
line.quad 0x00 "GICD_IROUTER922,Interrupt Routing Register 922"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CD8++0x07
line.quad 0x00 "GICD_IROUTER923,Interrupt Routing Register 923"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CE0++0x07
line.quad 0x00 "GICD_IROUTER924,Interrupt Routing Register 924"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CE8++0x07
line.quad 0x00 "GICD_IROUTER925,Interrupt Routing Register 925"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CF0++0x07
line.quad 0x00 "GICD_IROUTER926,Interrupt Routing Register 926"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CF8++0x07
line.quad 0x00 "GICD_IROUTER927,Interrupt Routing Register 927"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D00++0x07
line.quad 0x00 "GICD_IROUTER928,Interrupt Routing Register 928"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D08++0x07
line.quad 0x00 "GICD_IROUTER929,Interrupt Routing Register 929"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D10++0x07
line.quad 0x00 "GICD_IROUTER930,Interrupt Routing Register 930"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D18++0x07
line.quad 0x00 "GICD_IROUTER931,Interrupt Routing Register 931"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D20++0x07
line.quad 0x00 "GICD_IROUTER932,Interrupt Routing Register 932"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D28++0x07
line.quad 0x00 "GICD_IROUTER933,Interrupt Routing Register 933"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D30++0x07
line.quad 0x00 "GICD_IROUTER934,Interrupt Routing Register 934"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D38++0x07
line.quad 0x00 "GICD_IROUTER935,Interrupt Routing Register 935"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D40++0x07
line.quad 0x00 "GICD_IROUTER936,Interrupt Routing Register 936"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D48++0x07
line.quad 0x00 "GICD_IROUTER937,Interrupt Routing Register 937"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D50++0x07
line.quad 0x00 "GICD_IROUTER938,Interrupt Routing Register 938"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D58++0x07
line.quad 0x00 "GICD_IROUTER939,Interrupt Routing Register 939"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D60++0x07
line.quad 0x00 "GICD_IROUTER940,Interrupt Routing Register 940"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D68++0x07
line.quad 0x00 "GICD_IROUTER941,Interrupt Routing Register 941"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D70++0x07
line.quad 0x00 "GICD_IROUTER942,Interrupt Routing Register 942"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D78++0x07
line.quad 0x00 "GICD_IROUTER943,Interrupt Routing Register 943"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D80++0x07
line.quad 0x00 "GICD_IROUTER944,Interrupt Routing Register 944"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D88++0x07
line.quad 0x00 "GICD_IROUTER945,Interrupt Routing Register 945"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D90++0x07
line.quad 0x00 "GICD_IROUTER946,Interrupt Routing Register 946"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D98++0x07
line.quad 0x00 "GICD_IROUTER947,Interrupt Routing Register 947"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DA0++0x07
line.quad 0x00 "GICD_IROUTER948,Interrupt Routing Register 948"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DA8++0x07
line.quad 0x00 "GICD_IROUTER949,Interrupt Routing Register 949"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DB0++0x07
line.quad 0x00 "GICD_IROUTER950,Interrupt Routing Register 950"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DB8++0x07
line.quad 0x00 "GICD_IROUTER951,Interrupt Routing Register 951"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DC0++0x07
line.quad 0x00 "GICD_IROUTER952,Interrupt Routing Register 952"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DC8++0x07
line.quad 0x00 "GICD_IROUTER953,Interrupt Routing Register 953"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DD0++0x07
line.quad 0x00 "GICD_IROUTER954,Interrupt Routing Register 954"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DD8++0x07
line.quad 0x00 "GICD_IROUTER955,Interrupt Routing Register 955"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DE0++0x07
line.quad 0x00 "GICD_IROUTER956,Interrupt Routing Register 956"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DE8++0x07
line.quad 0x00 "GICD_IROUTER957,Interrupt Routing Register 957"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DF0++0x07
line.quad 0x00 "GICD_IROUTER958,Interrupt Routing Register 958"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DF8++0x07
line.quad 0x00 "GICD_IROUTER959,Interrupt Routing Register 959"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E00++0x07
line.quad 0x00 "GICD_IROUTER960,Interrupt Routing Register 960"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E08++0x07
line.quad 0x00 "GICD_IROUTER961,Interrupt Routing Register 961"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E10++0x07
line.quad 0x00 "GICD_IROUTER962,Interrupt Routing Register 962"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E18++0x07
line.quad 0x00 "GICD_IROUTER963,Interrupt Routing Register 963"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E20++0x07
line.quad 0x00 "GICD_IROUTER964,Interrupt Routing Register 964"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E28++0x07
line.quad 0x00 "GICD_IROUTER965,Interrupt Routing Register 965"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E30++0x07
line.quad 0x00 "GICD_IROUTER966,Interrupt Routing Register 966"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E38++0x07
line.quad 0x00 "GICD_IROUTER967,Interrupt Routing Register 967"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E40++0x07
line.quad 0x00 "GICD_IROUTER968,Interrupt Routing Register 968"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E48++0x07
line.quad 0x00 "GICD_IROUTER969,Interrupt Routing Register 969"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E50++0x07
line.quad 0x00 "GICD_IROUTER970,Interrupt Routing Register 970"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E58++0x07
line.quad 0x00 "GICD_IROUTER971,Interrupt Routing Register 971"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E60++0x07
line.quad 0x00 "GICD_IROUTER972,Interrupt Routing Register 972"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E68++0x07
line.quad 0x00 "GICD_IROUTER973,Interrupt Routing Register 973"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E70++0x07
line.quad 0x00 "GICD_IROUTER974,Interrupt Routing Register 974"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E78++0x07
line.quad 0x00 "GICD_IROUTER975,Interrupt Routing Register 975"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E80++0x07
line.quad 0x00 "GICD_IROUTER976,Interrupt Routing Register 976"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E88++0x07
line.quad 0x00 "GICD_IROUTER977,Interrupt Routing Register 977"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E90++0x07
line.quad 0x00 "GICD_IROUTER978,Interrupt Routing Register 978"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E98++0x07
line.quad 0x00 "GICD_IROUTER979,Interrupt Routing Register 979"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EA0++0x07
line.quad 0x00 "GICD_IROUTER980,Interrupt Routing Register 980"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EA8++0x07
line.quad 0x00 "GICD_IROUTER981,Interrupt Routing Register 981"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EB0++0x07
line.quad 0x00 "GICD_IROUTER982,Interrupt Routing Register 982"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EB8++0x07
line.quad 0x00 "GICD_IROUTER983,Interrupt Routing Register 983"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EC0++0x07
line.quad 0x00 "GICD_IROUTER984,Interrupt Routing Register 984"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EC8++0x07
line.quad 0x00 "GICD_IROUTER985,Interrupt Routing Register 985"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7ED0++0x07
line.quad 0x00 "GICD_IROUTER986,Interrupt Routing Register 986"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7ED8++0x07
line.quad 0x00 "GICD_IROUTER987,Interrupt Routing Register 987"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EE0++0x07
line.quad 0x00 "GICD_IROUTER988,Interrupt Routing Register 988"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EE8++0x07
line.quad 0x00 "GICD_IROUTER989,Interrupt Routing Register 989"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EF0++0x07
line.quad 0x00 "GICD_IROUTER990,Interrupt Routing Register 990"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EF8++0x07
line.quad 0x00 "GICD_IROUTER991,Interrupt Routing Register 991"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
tree.end
width 22.
tree "Interrupt Class Registers"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=1.)
group.long (0xE000+0x8)++0x03
line.long 0x0 "GICD_ICLAR2,Interrupt Class Register 2"
bitfld.long 0x00 31. " SPI047_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI047_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI046_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI046_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI045_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI045_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI044_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI044_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI043_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI043_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI042_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI042_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI041_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI041_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI040_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI040_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI039_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI039_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI038_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI038_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI037_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI037_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI036_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI036_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI035_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI035_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI034_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI034_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI033_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI033_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI032_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI032_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x8)++0x03
hide.long 0x0 "GICD_ICLAR2,Interrupt Class Register 2"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=1.)
group.long (0xE000+0xc)++0x03
line.long 0x0 "GICD_ICLAR3,Interrupt Class Register 3"
bitfld.long 0x00 31. " SPI063_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI063_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI062_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI062_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI061_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI061_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI060_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI060_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI059_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI059_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI058_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI058_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI057_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI057_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI056_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI056_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI055_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI055_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI054_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI054_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI053_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI053_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI052_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI052_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI051_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI051_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI050_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI050_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI049_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI049_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI048_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI048_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xc)++0x03
hide.long 0x0 "GICD_ICLAR3,Interrupt Class Register 3"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=2.)
group.long (0xE000+0x10)++0x03
line.long 0x0 "GICD_ICLAR4,Interrupt Class Register 4"
bitfld.long 0x00 31. " SPI079_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI079_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI078_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI078_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI077_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI077_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI076_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI076_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI075_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI075_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI074_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI074_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI073_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI073_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI072_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI072_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI071_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI071_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI070_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI070_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI069_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI069_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI068_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI068_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI067_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI067_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI066_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI066_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI065_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI065_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI064_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI064_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x10)++0x03
hide.long 0x0 "GICD_ICLAR4,Interrupt Class Register 4"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=2.)
group.long (0xE000+0x14)++0x03
line.long 0x0 "GICD_ICLAR5,Interrupt Class Register 5"
bitfld.long 0x00 31. " SPI095_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI095_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI094_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI094_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI093_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI093_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI092_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI092_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI091_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI091_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI090_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI090_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI089_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI089_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI088_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI088_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI087_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI087_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI086_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI086_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI085_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI085_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI084_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI084_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI083_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI083_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI082_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI082_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI081_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI081_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI080_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI080_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x14)++0x03
hide.long 0x0 "GICD_ICLAR5,Interrupt Class Register 5"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=3.)
group.long (0xE000+0x18)++0x03
line.long 0x0 "GICD_ICLAR6,Interrupt Class Register 6"
bitfld.long 0x00 31. " SPI111_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI111_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI110_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI110_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI109_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI109_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI108_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI108_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI107_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI107_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI106_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI106_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI105_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI105_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI104_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI104_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI103_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI103_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI102_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI102_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI101_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI101_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI100_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI100_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI099_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI099_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI098_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI098_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI097_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI097_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI096_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI096_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x18)++0x03
hide.long 0x0 "GICD_ICLAR6,Interrupt Class Register 6"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=3.)
group.long (0xE000+0x1c)++0x03
line.long 0x0 "GICD_ICLAR7,Interrupt Class Register 7"
bitfld.long 0x00 31. " SPI127_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI127_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI126_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI126_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI125_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI125_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI124_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI124_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI123_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI123_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI122_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI122_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI121_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI121_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI120_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI120_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI119_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI119_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI118_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI118_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI117_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI117_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI116_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI116_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI115_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI115_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI114_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI114_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI113_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI113_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI112_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI112_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x1c)++0x03
hide.long 0x0 "GICD_ICLAR7,Interrupt Class Register 7"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=4.)
group.long (0xE000+0x20)++0x03
line.long 0x0 "GICD_ICLAR8,Interrupt Class Register 8"
bitfld.long 0x00 31. " SPI143_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI143_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI142_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI142_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI141_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI141_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI140_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI140_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI139_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI139_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI138_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI138_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI137_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI137_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI136_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI136_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI135_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI135_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI134_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI134_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI133_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI133_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI132_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI132_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI131_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI131_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI130_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI130_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI129_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI129_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI128_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI128_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x20)++0x03
hide.long 0x0 "GICD_ICLAR8,Interrupt Class Register 8"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=4.)
group.long (0xE000+0x24)++0x03
line.long 0x0 "GICD_ICLAR9,Interrupt Class Register 9"
bitfld.long 0x00 31. " SPI159_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI159_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI158_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI158_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI157_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI157_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI156_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI156_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI155_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI155_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI154_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI154_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI153_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI153_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI152_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI152_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI151_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI151_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI150_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI150_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI149_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI149_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI148_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI148_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI147_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI147_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI146_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI146_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI145_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI145_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI144_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI144_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x24)++0x03
hide.long 0x0 "GICD_ICLAR9,Interrupt Class Register 9"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=5.)
group.long (0xE000+0x28)++0x03
line.long 0x0 "GICD_ICLAR10,Interrupt Class Register 10"
bitfld.long 0x00 31. " SPI175_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI175_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI174_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI174_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI173_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI173_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI172_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI172_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI171_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI171_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI170_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI170_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI169_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI169_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI168_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI168_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI167_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI167_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI166_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI166_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI165_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI165_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI164_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI164_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI163_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI163_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI162_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI162_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI161_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI161_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI160_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI160_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x28)++0x03
hide.long 0x0 "GICD_ICLAR10,Interrupt Class Register 10"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=5.)
group.long (0xE000+0x2c)++0x03
line.long 0x0 "GICD_ICLAR11,Interrupt Class Register 11"
bitfld.long 0x00 31. " SPI191_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI191_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI190_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI190_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI189_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI189_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI188_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI188_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI187_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI187_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI186_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI186_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI185_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI185_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI184_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI184_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI183_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI183_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI182_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI182_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI181_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI181_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI180_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI180_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI179_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI179_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI178_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI178_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI177_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI177_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI176_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI176_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x2c)++0x03
hide.long 0x0 "GICD_ICLAR11,Interrupt Class Register 11"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=6.)
group.long (0xE000+0x30)++0x03
line.long 0x0 "GICD_ICLAR12,Interrupt Class Register 12"
bitfld.long 0x00 31. " SPI207_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI207_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI206_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI206_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI205_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI205_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI204_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI204_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI203_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI203_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI202_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI202_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI201_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI201_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI200_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI200_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI199_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI199_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI198_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI198_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI197_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI197_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI196_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI196_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI195_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI195_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI194_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI194_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI193_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI193_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI192_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI192_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x30)++0x03
hide.long 0x0 "GICD_ICLAR12,Interrupt Class Register 12"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=6.)
group.long (0xE000+0x34)++0x03
line.long 0x0 "GICD_ICLAR13,Interrupt Class Register 13"
bitfld.long 0x00 31. " SPI223_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI223_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI222_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI222_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI221_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI221_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI220_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI220_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI219_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI219_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI218_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI218_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI217_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI217_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI216_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI216_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI215_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI215_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI214_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI214_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI213_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI213_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI212_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI212_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI211_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI211_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI210_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI210_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI209_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI209_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI208_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI208_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x34)++0x03
hide.long 0x0 "GICD_ICLAR13,Interrupt Class Register 13"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=7.)
group.long (0xE000+0x38)++0x03
line.long 0x0 "GICD_ICLAR14,Interrupt Class Register 14"
bitfld.long 0x00 31. " SPI239_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI239_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI238_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI238_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI237_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI237_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI236_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI236_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI235_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI235_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI234_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI234_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI233_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI233_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI232_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI232_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI231_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI231_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI230_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI230_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI229_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI229_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI228_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI228_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI227_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI227_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI226_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI226_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI225_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI225_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI224_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI224_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x38)++0x03
hide.long 0x0 "GICD_ICLAR14,Interrupt Class Register 14"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=7.)
group.long (0xE000+0x3c)++0x03
line.long 0x0 "GICD_ICLAR15,Interrupt Class Register 15"
bitfld.long 0x00 31. " SPI255_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI255_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI254_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI254_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI253_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI253_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI252_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI252_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI251_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI251_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI250_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI250_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI249_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI249_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI248_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI248_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI247_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI247_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI246_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI246_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI245_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI245_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI244_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI244_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI243_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI243_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI242_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI242_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI241_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI241_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI240_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI240_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x3c)++0x03
hide.long 0x0 "GICD_ICLAR15,Interrupt Class Register 15"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=8.)
group.long (0xE000+0x40)++0x03
line.long 0x0 "GICD_ICLAR16,Interrupt Class Register 16"
bitfld.long 0x00 31. " SPI271_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI271_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI270_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI270_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI269_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI269_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI268_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI268_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI267_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI267_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI266_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI266_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI265_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI265_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI264_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI264_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI263_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI263_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI262_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI262_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI261_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI261_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI260_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI260_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI259_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI259_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI258_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI258_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI257_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI257_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI256_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI256_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x40)++0x03
hide.long 0x0 "GICD_ICLAR16,Interrupt Class Register 16"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=8.)
group.long (0xE000+0x44)++0x03
line.long 0x0 "GICD_ICLAR17,Interrupt Class Register 17"
bitfld.long 0x00 31. " SPI287_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI287_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI286_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI286_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI285_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI285_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI284_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI284_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI283_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI283_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI282_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI282_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI281_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI281_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI280_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI280_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI279_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI279_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI278_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI278_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI277_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI277_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI276_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI276_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI275_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI275_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI274_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI274_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI273_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI273_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI272_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI272_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x44)++0x03
hide.long 0x0 "GICD_ICLAR17,Interrupt Class Register 17"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=9.)
group.long (0xE000+0x48)++0x03
line.long 0x0 "GICD_ICLAR18,Interrupt Class Register 18"
bitfld.long 0x00 31. " SPI303_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI303_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI302_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI302_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI301_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI301_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI300_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI300_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI299_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI299_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI298_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI298_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI297_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI297_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI296_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI296_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI295_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI295_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI294_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI294_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI293_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI293_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI292_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI292_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI291_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI291_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI290_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI290_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI289_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI289_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI288_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI288_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x48)++0x03
hide.long 0x0 "GICD_ICLAR18,Interrupt Class Register 18"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=9.)
group.long (0xE000+0x4c)++0x03
line.long 0x0 "GICD_ICLAR19,Interrupt Class Register 19"
bitfld.long 0x00 31. " SPI319_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI319_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI318_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI318_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI317_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI317_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI316_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI316_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI315_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI315_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI314_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI314_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI313_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI313_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI312_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI312_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI311_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI311_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI310_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI310_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI309_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI309_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI308_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI308_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI307_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI307_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI306_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI306_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI305_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI305_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI304_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI304_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x4c)++0x03
hide.long 0x0 "GICD_ICLAR19,Interrupt Class Register 19"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=10.)
group.long (0xE000+0x50)++0x03
line.long 0x0 "GICD_ICLAR20,Interrupt Class Register 20"
bitfld.long 0x00 31. " SPI335_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI335_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI334_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI334_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI333_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI333_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI332_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI332_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI331_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI331_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI330_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI330_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI329_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI329_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI328_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI328_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI327_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI327_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI326_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI326_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI325_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI325_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI324_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI324_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI323_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI323_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI322_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI322_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI321_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI321_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI320_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI320_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x50)++0x03
hide.long 0x0 "GICD_ICLAR20,Interrupt Class Register 20"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=10.)
group.long (0xE000+0x54)++0x03
line.long 0x0 "GICD_ICLAR21,Interrupt Class Register 21"
bitfld.long 0x00 31. " SPI351_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI351_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI350_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI350_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI349_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI349_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI348_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI348_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI347_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI347_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI346_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI346_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI345_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI345_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI344_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI344_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI343_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI343_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI342_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI342_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI341_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI341_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI340_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI340_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI339_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI339_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI338_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI338_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI337_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI337_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI336_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI336_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x54)++0x03
hide.long 0x0 "GICD_ICLAR21,Interrupt Class Register 21"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=11.)
group.long (0xE000+0x58)++0x03
line.long 0x0 "GICD_ICLAR22,Interrupt Class Register 22"
bitfld.long 0x00 31. " SPI367_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI367_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI366_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI366_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI365_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI365_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI364_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI364_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI363_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI363_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI362_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI362_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI361_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI361_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI360_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI360_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI359_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI359_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI358_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI358_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI357_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI357_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI356_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI356_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI355_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI355_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI354_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI354_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI353_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI353_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI352_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI352_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x58)++0x03
hide.long 0x0 "GICD_ICLAR22,Interrupt Class Register 22"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=11.)
group.long (0xE000+0x5c)++0x03
line.long 0x0 "GICD_ICLAR23,Interrupt Class Register 23"
bitfld.long 0x00 31. " SPI383_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI383_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI382_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI382_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI381_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI381_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI380_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI380_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI379_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI379_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI378_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI378_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI377_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI377_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI376_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI376_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI375_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI375_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI374_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI374_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI373_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI373_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI372_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI372_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI371_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI371_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI370_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI370_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI369_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI369_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI368_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI368_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x5c)++0x03
hide.long 0x0 "GICD_ICLAR23,Interrupt Class Register 23"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=12.)
group.long (0xE000+0x60)++0x03
line.long 0x0 "GICD_ICLAR24,Interrupt Class Register 24"
bitfld.long 0x00 31. " SPI399_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI399_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI398_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI398_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI397_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI397_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI396_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI396_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI395_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI395_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI394_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI394_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI393_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI393_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI392_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI392_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI391_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI391_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI390_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI390_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI389_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI389_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI388_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI388_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI387_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI387_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI386_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI386_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI385_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI385_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI384_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI384_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x60)++0x03
hide.long 0x0 "GICD_ICLAR24,Interrupt Class Register 24"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=12.)
group.long (0xE000+0x64)++0x03
line.long 0x0 "GICD_ICLAR25,Interrupt Class Register 25"
bitfld.long 0x00 31. " SPI415_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI415_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI414_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI414_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI413_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI413_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI412_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI412_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI411_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI411_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI410_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI410_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI409_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI409_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI408_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI408_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI407_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI407_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI406_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI406_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI405_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI405_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI404_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI404_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI403_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI403_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI402_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI402_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI401_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI401_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI400_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI400_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x64)++0x03
hide.long 0x0 "GICD_ICLAR25,Interrupt Class Register 25"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=13.)
group.long (0xE000+0x68)++0x03
line.long 0x0 "GICD_ICLAR26,Interrupt Class Register 26"
bitfld.long 0x00 31. " SPI431_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI431_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI430_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI430_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI429_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI429_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI428_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI428_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI427_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI427_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI426_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI426_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI425_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI425_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI424_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI424_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI423_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI423_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI422_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI422_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI421_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI421_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI420_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI420_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI419_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI419_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI418_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI418_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI417_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI417_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI416_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI416_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x68)++0x03
hide.long 0x0 "GICD_ICLAR26,Interrupt Class Register 26"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=13.)
group.long (0xE000+0x6c)++0x03
line.long 0x0 "GICD_ICLAR27,Interrupt Class Register 27"
bitfld.long 0x00 31. " SPI447_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI447_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI446_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI446_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI445_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI445_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI444_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI444_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI443_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI443_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI442_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI442_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI441_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI441_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI440_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI440_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI439_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI439_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI438_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI438_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI437_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI437_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI436_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI436_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI435_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI435_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI434_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI434_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI433_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI433_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI432_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI432_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x6c)++0x03
hide.long 0x0 "GICD_ICLAR27,Interrupt Class Register 27"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=14.)
group.long (0xE000+0x70)++0x03
line.long 0x0 "GICD_ICLAR28,Interrupt Class Register 28"
bitfld.long 0x00 31. " SPI463_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI463_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI462_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI462_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI461_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI461_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI460_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI460_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI459_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI459_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI458_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI458_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI457_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI457_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI456_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI456_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI455_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI455_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI454_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI454_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI453_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI453_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI452_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI452_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI451_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI451_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI450_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI450_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI449_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI449_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI448_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI448_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x70)++0x03
hide.long 0x0 "GICD_ICLAR28,Interrupt Class Register 28"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=14.)
group.long (0xE000+0x74)++0x03
line.long 0x0 "GICD_ICLAR29,Interrupt Class Register 29"
bitfld.long 0x00 31. " SPI479_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI479_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI478_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI478_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI477_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI477_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI476_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI476_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI475_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI475_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI474_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI474_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI473_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI473_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI472_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI472_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI471_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI471_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI470_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI470_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI469_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI469_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI468_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI468_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI467_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI467_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI466_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI466_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI465_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI465_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI464_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI464_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x74)++0x03
hide.long 0x0 "GICD_ICLAR29,Interrupt Class Register 29"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=15.)
group.long (0xE000+0x78)++0x03
line.long 0x0 "GICD_ICLAR30,Interrupt Class Register 30"
bitfld.long 0x00 31. " SPI495_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI495_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI494_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI494_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI493_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI493_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI492_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI492_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI491_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI491_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI490_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI490_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI489_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI489_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI488_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI488_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI487_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI487_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI486_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI486_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI485_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI485_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI484_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI484_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI483_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI483_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI482_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI482_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI481_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI481_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI480_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI480_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x78)++0x03
hide.long 0x0 "GICD_ICLAR30,Interrupt Class Register 30"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=15.)
group.long (0xE000+0x7c)++0x03
line.long 0x0 "GICD_ICLAR31,Interrupt Class Register 31"
bitfld.long 0x00 31. " SPI511_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI511_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI510_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI510_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI509_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI509_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI508_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI508_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI507_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI507_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI506_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI506_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI505_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI505_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI504_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI504_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI503_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI503_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI502_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI502_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI501_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI501_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI500_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI500_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI499_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI499_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI498_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI498_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI497_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI497_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI496_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI496_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x7c)++0x03
hide.long 0x0 "GICD_ICLAR31,Interrupt Class Register 31"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=16.)
group.long (0xE000+0x80)++0x03
line.long 0x0 "GICD_ICLAR32,Interrupt Class Register 32"
bitfld.long 0x00 31. " SPI527_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI527_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI526_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI526_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI525_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI525_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI524_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI524_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI523_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI523_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI522_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI522_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI521_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI521_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI520_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI520_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI519_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI519_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI518_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI518_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI517_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI517_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI516_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI516_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI515_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI515_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI514_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI514_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI513_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI513_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI512_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI512_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x80)++0x03
hide.long 0x0 "GICD_ICLAR32,Interrupt Class Register 32"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=16.)
group.long (0xE000+0x84)++0x03
line.long 0x0 "GICD_ICLAR33,Interrupt Class Register 33"
bitfld.long 0x00 31. " SPI543_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI543_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI542_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI542_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI541_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI541_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI540_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI540_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI539_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI539_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI538_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI538_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI537_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI537_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI536_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI536_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI535_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI535_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI534_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI534_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI533_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI533_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI532_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI532_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI531_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI531_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI530_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI530_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI529_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI529_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI528_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI528_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x84)++0x03
hide.long 0x0 "GICD_ICLAR33,Interrupt Class Register 33"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=17.)
group.long (0xE000+0x88)++0x03
line.long 0x0 "GICD_ICLAR34,Interrupt Class Register 34"
bitfld.long 0x00 31. " SPI559_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI559_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI558_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI558_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI557_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI557_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI556_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI556_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI555_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI555_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI554_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI554_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI553_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI553_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI552_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI552_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI551_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI551_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI550_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI550_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI549_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI549_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI548_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI548_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI547_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI547_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI546_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI546_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI545_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI545_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI544_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI544_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x88)++0x03
hide.long 0x0 "GICD_ICLAR34,Interrupt Class Register 34"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=17.)
group.long (0xE000+0x8c)++0x03
line.long 0x0 "GICD_ICLAR35,Interrupt Class Register 35"
bitfld.long 0x00 31. " SPI575_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI575_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI574_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI574_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI573_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI573_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI572_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI572_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI571_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI571_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI570_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI570_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI569_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI569_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI568_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI568_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI567_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI567_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI566_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI566_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI565_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI565_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI564_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI564_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI563_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI563_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI562_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI562_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI561_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI561_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI560_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI560_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x8c)++0x03
hide.long 0x0 "GICD_ICLAR35,Interrupt Class Register 35"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=18.)
group.long (0xE000+0x90)++0x03
line.long 0x0 "GICD_ICLAR36,Interrupt Class Register 36"
bitfld.long 0x00 31. " SPI591_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI591_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI590_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI590_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI589_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI589_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI588_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI588_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI587_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI587_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI586_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI586_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI585_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI585_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI584_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI584_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI583_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI583_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI582_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI582_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI581_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI581_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI580_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI580_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI579_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI579_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI578_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI578_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI577_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI577_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI576_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI576_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x90)++0x03
hide.long 0x0 "GICD_ICLAR36,Interrupt Class Register 36"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=18.)
group.long (0xE000+0x94)++0x03
line.long 0x0 "GICD_ICLAR37,Interrupt Class Register 37"
bitfld.long 0x00 31. " SPI607_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI607_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI606_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI606_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI605_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI605_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI604_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI604_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI603_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI603_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI602_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI602_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI601_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI601_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI600_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI600_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI599_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI599_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI598_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI598_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI597_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI597_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI596_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI596_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI595_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI595_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI594_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI594_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI593_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI593_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI592_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI592_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x94)++0x03
hide.long 0x0 "GICD_ICLAR37,Interrupt Class Register 37"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=19.)
group.long (0xE000+0x98)++0x03
line.long 0x0 "GICD_ICLAR38,Interrupt Class Register 38"
bitfld.long 0x00 31. " SPI623_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI623_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI622_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI622_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI621_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI621_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI620_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI620_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI619_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI619_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI618_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI618_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI617_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI617_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI616_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI616_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI615_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI615_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI614_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI614_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI613_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI613_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI612_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI612_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI611_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI611_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI610_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI610_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI609_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI609_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI608_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI608_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x98)++0x03
hide.long 0x0 "GICD_ICLAR38,Interrupt Class Register 38"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=19.)
group.long (0xE000+0x9c)++0x03
line.long 0x0 "GICD_ICLAR39,Interrupt Class Register 39"
bitfld.long 0x00 31. " SPI639_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI639_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI638_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI638_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI637_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI637_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI636_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI636_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI635_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI635_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI634_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI634_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI633_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI633_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI632_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI632_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI631_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI631_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI630_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI630_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI629_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI629_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI628_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI628_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI627_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI627_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI626_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI626_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI625_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI625_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI624_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI624_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x9c)++0x03
hide.long 0x0 "GICD_ICLAR39,Interrupt Class Register 39"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=20.)
group.long (0xE000+0xa0)++0x03
line.long 0x0 "GICD_ICLAR40,Interrupt Class Register 40"
bitfld.long 0x00 31. " SPI655_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI655_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI654_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI654_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI653_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI653_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI652_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI652_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI651_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI651_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI650_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI650_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI649_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI649_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI648_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI648_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI647_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI647_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI646_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI646_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI645_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI645_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI644_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI644_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI643_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI643_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI642_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI642_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI641_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI641_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI640_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI640_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xa0)++0x03
hide.long 0x0 "GICD_ICLAR40,Interrupt Class Register 40"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=20.)
group.long (0xE000+0xa4)++0x03
line.long 0x0 "GICD_ICLAR41,Interrupt Class Register 41"
bitfld.long 0x00 31. " SPI671_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI671_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI670_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI670_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI669_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI669_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI668_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI668_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI667_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI667_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI666_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI666_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI665_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI665_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI664_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI664_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI663_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI663_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI662_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI662_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI661_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI661_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI660_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI660_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI659_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI659_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI658_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI658_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI657_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI657_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI656_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI656_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xa4)++0x03
hide.long 0x0 "GICD_ICLAR41,Interrupt Class Register 41"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=21.)
group.long (0xE000+0xa8)++0x03
line.long 0x0 "GICD_ICLAR42,Interrupt Class Register 42"
bitfld.long 0x00 31. " SPI687_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI687_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI686_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI686_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI685_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI685_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI684_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI684_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI683_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI683_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI682_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI682_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI681_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI681_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI680_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI680_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI679_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI679_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI678_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI678_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI677_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI677_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI676_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI676_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI675_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI675_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI674_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI674_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI673_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI673_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI672_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI672_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xa8)++0x03
hide.long 0x0 "GICD_ICLAR42,Interrupt Class Register 42"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=21.)
group.long (0xE000+0xac)++0x03
line.long 0x0 "GICD_ICLAR43,Interrupt Class Register 43"
bitfld.long 0x00 31. " SPI703_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI703_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI702_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI702_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI701_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI701_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI700_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI700_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI699_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI699_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI698_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI698_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI697_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI697_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI696_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI696_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI695_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI695_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI694_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI694_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI693_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI693_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI692_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI692_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI691_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI691_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI690_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI690_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI689_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI689_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI688_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI688_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xac)++0x03
hide.long 0x0 "GICD_ICLAR43,Interrupt Class Register 43"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=22.)
group.long (0xE000+0xb0)++0x03
line.long 0x0 "GICD_ICLAR44,Interrupt Class Register 44"
bitfld.long 0x00 31. " SPI719_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI719_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI718_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI718_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI717_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI717_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI716_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI716_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI715_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI715_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI714_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI714_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI713_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI713_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI712_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI712_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI711_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI711_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI710_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI710_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI709_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI709_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI708_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI708_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI707_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI707_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI706_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI706_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI705_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI705_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI704_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI704_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xb0)++0x03
hide.long 0x0 "GICD_ICLAR44,Interrupt Class Register 44"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=22.)
group.long (0xE000+0xb4)++0x03
line.long 0x0 "GICD_ICLAR45,Interrupt Class Register 45"
bitfld.long 0x00 31. " SPI735_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI735_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI734_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI734_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI733_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI733_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI732_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI732_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI731_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI731_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI730_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI730_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI729_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI729_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI728_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI728_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI727_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI727_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI726_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI726_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI725_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI725_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI724_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI724_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI723_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI723_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI722_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI722_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI721_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI721_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI720_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI720_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xb4)++0x03
hide.long 0x0 "GICD_ICLAR45,Interrupt Class Register 45"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=23.)
group.long (0xE000+0xb8)++0x03
line.long 0x0 "GICD_ICLAR46,Interrupt Class Register 46"
bitfld.long 0x00 31. " SPI751_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI751_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI750_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI750_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI749_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI749_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI748_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI748_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI747_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI747_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI746_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI746_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI745_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI745_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI744_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI744_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI743_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI743_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI742_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI742_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI741_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI741_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI740_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI740_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI739_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI739_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI738_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI738_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI737_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI737_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI736_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI736_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xb8)++0x03
hide.long 0x0 "GICD_ICLAR46,Interrupt Class Register 46"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=23.)
group.long (0xE000+0xbc)++0x03
line.long 0x0 "GICD_ICLAR47,Interrupt Class Register 47"
bitfld.long 0x00 31. " SPI767_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI767_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI766_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI766_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI765_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI765_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI764_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI764_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI763_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI763_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI762_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI762_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI761_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI761_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI760_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI760_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI759_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI759_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI758_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI758_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI757_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI757_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI756_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI756_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI755_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI755_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI754_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI754_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI753_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI753_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI752_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI752_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xbc)++0x03
hide.long 0x0 "GICD_ICLAR47,Interrupt Class Register 47"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=24.)
group.long (0xE000+0xc0)++0x03
line.long 0x0 "GICD_ICLAR48,Interrupt Class Register 48"
bitfld.long 0x00 31. " SPI783_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI783_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI782_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI782_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI781_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI781_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI780_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI780_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI779_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI779_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI778_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI778_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI777_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI777_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI776_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI776_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI775_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI775_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI774_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI774_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI773_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI773_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI772_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI772_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI771_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI771_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI770_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI770_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI769_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI769_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI768_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI768_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xc0)++0x03
hide.long 0x0 "GICD_ICLAR48,Interrupt Class Register 48"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=24.)
group.long (0xE000+0xc4)++0x03
line.long 0x0 "GICD_ICLAR49,Interrupt Class Register 49"
bitfld.long 0x00 31. " SPI799_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI799_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI798_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI798_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI797_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI797_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI796_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI796_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI795_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI795_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI794_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI794_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI793_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI793_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI792_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI792_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI791_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI791_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI790_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI790_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI789_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI789_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI788_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI788_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI787_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI787_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI786_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI786_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI785_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI785_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI784_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI784_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xc4)++0x03
hide.long 0x0 "GICD_ICLAR49,Interrupt Class Register 49"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=25.)
group.long (0xE000+0xc8)++0x03
line.long 0x0 "GICD_ICLAR50,Interrupt Class Register 50"
bitfld.long 0x00 31. " SPI815_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI815_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI814_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI814_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI813_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI813_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI812_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI812_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI811_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI811_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI810_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI810_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI809_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI809_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI808_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI808_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI807_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI807_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI806_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI806_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI805_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI805_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI804_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI804_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI803_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI803_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI802_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI802_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI801_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI801_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI800_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI800_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xc8)++0x03
hide.long 0x0 "GICD_ICLAR50,Interrupt Class Register 50"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=25.)
group.long (0xE000+0xcc)++0x03
line.long 0x0 "GICD_ICLAR51,Interrupt Class Register 51"
bitfld.long 0x00 31. " SPI831_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI831_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI830_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI830_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI829_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI829_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI828_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI828_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI827_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI827_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI826_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI826_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI825_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI825_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI824_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI824_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI823_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI823_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI822_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI822_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI821_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI821_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI820_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI820_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI819_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI819_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI818_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI818_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI817_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI817_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI816_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI816_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xcc)++0x03
hide.long 0x0 "GICD_ICLAR51,Interrupt Class Register 51"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=26.)
group.long (0xE000+0xd0)++0x03
line.long 0x0 "GICD_ICLAR52,Interrupt Class Register 52"
bitfld.long 0x00 31. " SPI847_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI847_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI846_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI846_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI845_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI845_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI844_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI844_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI843_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI843_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI842_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI842_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI841_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI841_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI840_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI840_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI839_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI839_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI838_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI838_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI837_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI837_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI836_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI836_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI835_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI835_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI834_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI834_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI833_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI833_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI832_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI832_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xd0)++0x03
hide.long 0x0 "GICD_ICLAR52,Interrupt Class Register 52"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=26.)
group.long (0xE000+0xd4)++0x03
line.long 0x0 "GICD_ICLAR53,Interrupt Class Register 53"
bitfld.long 0x00 31. " SPI863_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI863_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI862_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI862_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI861_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI861_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI860_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI860_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI859_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI859_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI858_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI858_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI857_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI857_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI856_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI856_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI855_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI855_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI854_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI854_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI853_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI853_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI852_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI852_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI851_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI851_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI850_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI850_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI849_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI849_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI848_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI848_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xd4)++0x03
hide.long 0x0 "GICD_ICLAR53,Interrupt Class Register 53"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=27.)
group.long (0xE000+0xd8)++0x03
line.long 0x0 "GICD_ICLAR54,Interrupt Class Register 54"
bitfld.long 0x00 31. " SPI879_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI879_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI878_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI878_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI877_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI877_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI876_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI876_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI875_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI875_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI874_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI874_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI873_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI873_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI872_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI872_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI871_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI871_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI870_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI870_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI869_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI869_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI868_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI868_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI867_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI867_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI866_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI866_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI865_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI865_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI864_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI864_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xd8)++0x03
hide.long 0x0 "GICD_ICLAR54,Interrupt Class Register 54"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=27.)
group.long (0xE000+0xdc)++0x03
line.long 0x0 "GICD_ICLAR55,Interrupt Class Register 55"
bitfld.long 0x00 31. " SPI895_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI895_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI894_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI894_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI893_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI893_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI892_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI892_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI891_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI891_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI890_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI890_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI889_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI889_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI888_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI888_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI887_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI887_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI886_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI886_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI885_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI885_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI884_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI884_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI883_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI883_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI882_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI882_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI881_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI881_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI880_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI880_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xdc)++0x03
hide.long 0x0 "GICD_ICLAR55,Interrupt Class Register 55"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=28.)
group.long (0xE000+0xe0)++0x03
line.long 0x0 "GICD_ICLAR56,Interrupt Class Register 56"
bitfld.long 0x00 31. " SPI911_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI911_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI910_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI910_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI909_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI909_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI908_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI908_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI907_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI907_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI906_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI906_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI905_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI905_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI904_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI904_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI903_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI903_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI902_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI902_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI901_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI901_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI900_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI900_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI899_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI899_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI898_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI898_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI897_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI897_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI896_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI896_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xe0)++0x03
hide.long 0x0 "GICD_ICLAR56,Interrupt Class Register 56"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=28.)
group.long (0xE000+0xe4)++0x03
line.long 0x0 "GICD_ICLAR57,Interrupt Class Register 57"
bitfld.long 0x00 31. " SPI927_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI927_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI926_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI926_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI925_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI925_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI924_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI924_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI923_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI923_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI922_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI922_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI921_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI921_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI920_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI920_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI919_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI919_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI918_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI918_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI917_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI917_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI916_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI916_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI915_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI915_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI914_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI914_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI913_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI913_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI912_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI912_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xe4)++0x03
hide.long 0x0 "GICD_ICLAR57,Interrupt Class Register 57"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=29.)
group.long (0xE000+0xe8)++0x03
line.long 0x0 "GICD_ICLAR58,Interrupt Class Register 58"
bitfld.long 0x00 31. " SPI943_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI943_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI942_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI942_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI941_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI941_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI940_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI940_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI939_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI939_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI938_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI938_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI937_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI937_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI936_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI936_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI935_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI935_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI934_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI934_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI933_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI933_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI932_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI932_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI931_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI931_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI930_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI930_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI929_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI929_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI928_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI928_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xe8)++0x03
hide.long 0x0 "GICD_ICLAR58,Interrupt Class Register 58"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=29.)
group.long (0xE000+0xec)++0x03
line.long 0x0 "GICD_ICLAR59,Interrupt Class Register 59"
bitfld.long 0x00 31. " SPI959_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI959_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI958_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI958_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI957_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI957_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI956_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI956_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI955_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI955_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI954_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI954_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI953_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI953_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI952_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI952_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI951_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI951_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI950_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI950_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI949_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI949_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI948_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI948_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI947_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI947_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI946_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI946_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI945_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI945_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI944_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI944_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xec)++0x03
hide.long 0x0 "GICD_ICLAR59,Interrupt Class Register 59"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=30.)
group.long (0xE000+0xf0)++0x03
line.long 0x0 "GICD_ICLAR60,Interrupt Class Register 60"
bitfld.long 0x00 31. " SPI975_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI975_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI974_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI974_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI973_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI973_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI972_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI972_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI971_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI971_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI970_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI970_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI969_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI969_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI968_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI968_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI967_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI967_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI966_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI966_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI965_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI965_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI964_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI964_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI963_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI963_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI962_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI962_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI961_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI961_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI960_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI960_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xf0)++0x03
hide.long 0x0 "GICD_ICLAR60,Interrupt Class Register 60"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=30.)
group.long (0xE000+0xf4)++0x03
line.long 0x0 "GICD_ICLAR61,Interrupt Class Register 61"
bitfld.long 0x00 31. " SPI991_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI991_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI990_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI990_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI989_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI989_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI988_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI988_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI987_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI987_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI986_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI986_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI985_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI985_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI984_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI984_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI983_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI983_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI982_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI982_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI981_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI981_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI980_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI980_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI979_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI979_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI978_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI978_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI977_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI977_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI976_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI976_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xf4)++0x03
hide.long 0x0 "GICD_ICLAR61,Interrupt Class Register 61"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
tree.end
tree "Interrupt Error Registers"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=1.)
group.long (0xE100+0x4)++0x03
line.long 0x0 "GICD_IERRR1,Interrupt Error Register 1"
bitfld.long 0x00 31. " SPI049_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI048_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI047_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI046_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI047_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI046_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI045_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI044_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI045_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI044_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI043_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI042_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI043_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI042_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI041_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI040_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI041_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI040_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI039_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI038_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI039_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI038_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI037_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI036_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI037_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI036_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI035_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI034_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI035_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI034_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI033_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI032_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x4)++0x03
hide.long 0x0 "GICD_IERRR1,Interrupt Error Register 1"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=2.)
group.long (0xE100+0x8)++0x03
line.long 0x0 "GICD_IERRR2,Interrupt Error Register 2"
bitfld.long 0x00 31. " SPI081_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI080_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI079_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI078_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI079_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI078_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI077_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI076_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI077_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI076_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI075_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI074_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI075_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI074_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI073_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI072_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI073_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI072_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI071_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI070_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI071_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI070_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI069_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI068_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI069_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI068_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI067_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI066_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI067_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI066_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI065_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI064_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x8)++0x03
hide.long 0x0 "GICD_IERRR2,Interrupt Error Register 2"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=3.)
group.long (0xE100+0xc)++0x03
line.long 0x0 "GICD_IERRR3,Interrupt Error Register 3"
bitfld.long 0x00 31. " SPI113_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI112_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI111_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI110_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI111_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI110_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI109_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI108_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI109_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI108_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI107_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI106_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI107_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI106_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI105_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI104_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI105_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI104_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI103_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI102_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI103_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI102_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI101_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI100_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI101_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI100_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI099_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI098_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI099_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI098_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI097_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI096_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0xc)++0x03
hide.long 0x0 "GICD_IERRR3,Interrupt Error Register 3"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=4.)
group.long (0xE100+0x10)++0x03
line.long 0x0 "GICD_IERRR4,Interrupt Error Register 4"
bitfld.long 0x00 31. " SPI145_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI144_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI143_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI142_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI143_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI142_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI141_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI140_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI141_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI140_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI139_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI138_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI139_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI138_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI137_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI136_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI137_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI136_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI135_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI134_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI135_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI134_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI133_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI132_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI133_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI132_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI131_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI130_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI131_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI130_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI129_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI128_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x10)++0x03
hide.long 0x0 "GICD_IERRR4,Interrupt Error Register 4"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=5.)
group.long (0xE100+0x14)++0x03
line.long 0x0 "GICD_IERRR5,Interrupt Error Register 5"
bitfld.long 0x00 31. " SPI177_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI176_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI175_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI174_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI175_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI174_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI173_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI172_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI173_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI172_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI171_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI170_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI171_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI170_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI169_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI168_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI169_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI168_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI167_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI166_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI167_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI166_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI165_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI164_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI165_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI164_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI163_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI162_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI163_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI162_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI161_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI160_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x14)++0x03
hide.long 0x0 "GICD_IERRR5,Interrupt Error Register 5"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=6.)
group.long (0xE100+0x18)++0x03
line.long 0x0 "GICD_IERRR6,Interrupt Error Register 6"
bitfld.long 0x00 31. " SPI209_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI208_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI207_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI206_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI207_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI206_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI205_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI204_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI205_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI204_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI203_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI202_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI203_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI202_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI201_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI200_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI201_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI200_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI199_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI198_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI199_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI198_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI197_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI196_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI197_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI196_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI195_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI194_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI195_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI194_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI193_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI192_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x18)++0x03
hide.long 0x0 "GICD_IERRR6,Interrupt Error Register 6"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=7.)
group.long (0xE100+0x1c)++0x03
line.long 0x0 "GICD_IERRR7,Interrupt Error Register 7"
bitfld.long 0x00 31. " SPI241_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI240_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI239_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI238_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI239_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI238_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI237_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI236_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI237_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI236_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI235_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI234_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI235_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI234_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI233_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI232_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI233_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI232_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI231_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI230_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI231_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI230_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI229_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI228_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI229_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI228_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI227_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI226_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI227_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI226_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI225_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI224_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x1c)++0x03
hide.long 0x0 "GICD_IERRR7,Interrupt Error Register 7"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=8.)
group.long (0xE100+0x20)++0x03
line.long 0x0 "GICD_IERRR8,Interrupt Error Register 8"
bitfld.long 0x00 31. " SPI273_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI272_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI271_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI270_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI271_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI270_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI269_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI268_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI269_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI268_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI267_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI266_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI267_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI266_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI265_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI264_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI265_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI264_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI263_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI262_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI263_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI262_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI261_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI260_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI261_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI260_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI259_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI258_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI259_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI258_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI257_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI256_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x20)++0x03
hide.long 0x0 "GICD_IERRR8,Interrupt Error Register 8"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=9.)
group.long (0xE100+0x24)++0x03
line.long 0x0 "GICD_IERRR9,Interrupt Error Register 9"
bitfld.long 0x00 31. " SPI305_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI304_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI303_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI302_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI303_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI302_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI301_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI300_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI301_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI300_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI299_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI298_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI299_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI298_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI297_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI296_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI297_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI296_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI295_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI294_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI295_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI294_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI293_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI292_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI293_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI292_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI291_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI290_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI291_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI290_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI289_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI288_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x24)++0x03
hide.long 0x0 "GICD_IERRR9,Interrupt Error Register 9"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=10.)
group.long (0xE100+0x28)++0x03
line.long 0x0 "GICD_IERRR10,Interrupt Error Register 10"
bitfld.long 0x00 31. " SPI337_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI336_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI335_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI334_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI335_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI334_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI333_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI332_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI333_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI332_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI331_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI330_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI331_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI330_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI329_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI328_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI329_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI328_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI327_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI326_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI327_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI326_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI325_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI324_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI325_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI324_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI323_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI322_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI323_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI322_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI321_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI320_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x28)++0x03
hide.long 0x0 "GICD_IERRR10,Interrupt Error Register 10"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=11.)
group.long (0xE100+0x2c)++0x03
line.long 0x0 "GICD_IERRR11,Interrupt Error Register 11"
bitfld.long 0x00 31. " SPI369_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI368_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI367_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI366_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI367_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI366_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI365_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI364_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI365_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI364_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI363_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI362_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI363_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI362_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI361_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI360_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI361_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI360_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI359_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI358_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI359_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI358_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI357_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI356_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI357_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI356_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI355_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI354_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI355_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI354_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI353_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI352_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x2c)++0x03
hide.long 0x0 "GICD_IERRR11,Interrupt Error Register 11"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=12.)
group.long (0xE100+0x30)++0x03
line.long 0x0 "GICD_IERRR12,Interrupt Error Register 12"
bitfld.long 0x00 31. " SPI401_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI400_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI399_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI398_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI399_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI398_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI397_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI396_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI397_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI396_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI395_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI394_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI395_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI394_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI393_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI392_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI393_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI392_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI391_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI390_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI391_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI390_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI389_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI388_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI389_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI388_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI387_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI386_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI387_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI386_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI385_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI384_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x30)++0x03
hide.long 0x0 "GICD_IERRR12,Interrupt Error Register 12"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=13.)
group.long (0xE100+0x34)++0x03
line.long 0x0 "GICD_IERRR13,Interrupt Error Register 13"
bitfld.long 0x00 31. " SPI433_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI432_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI431_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI430_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI431_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI430_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI429_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI428_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI429_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI428_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI427_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI426_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI427_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI426_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI425_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI424_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI425_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI424_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI423_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI422_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI423_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI422_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI421_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI420_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI421_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI420_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI419_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI418_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI419_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI418_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI417_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI416_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x34)++0x03
hide.long 0x0 "GICD_IERRR13,Interrupt Error Register 13"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=14.)
group.long (0xE100+0x38)++0x03
line.long 0x0 "GICD_IERRR14,Interrupt Error Register 14"
bitfld.long 0x00 31. " SPI465_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI464_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI463_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI462_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI463_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI462_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI461_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI460_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI461_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI460_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI459_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI458_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI459_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI458_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI457_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI456_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI457_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI456_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI455_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI454_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI455_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI454_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI453_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI452_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI453_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI452_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI451_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI450_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI451_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI450_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI449_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI448_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x38)++0x03
hide.long 0x0 "GICD_IERRR14,Interrupt Error Register 14"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=15.)
group.long (0xE100+0x3c)++0x03
line.long 0x0 "GICD_IERRR15,Interrupt Error Register 15"
bitfld.long 0x00 31. " SPI497_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI496_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI495_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI494_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI495_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI494_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI493_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI492_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI493_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI492_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI491_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI490_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI491_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI490_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI489_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI488_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI489_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI488_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI487_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI486_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI487_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI486_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI485_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI484_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI485_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI484_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI483_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI482_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI483_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI482_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI481_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI480_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x3c)++0x03
hide.long 0x0 "GICD_IERRR15,Interrupt Error Register 15"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=16.)
group.long (0xE100+0x40)++0x03
line.long 0x0 "GICD_IERRR16,Interrupt Error Register 16"
bitfld.long 0x00 31. " SPI529_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI528_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI527_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI526_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI527_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI526_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI525_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI524_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI525_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI524_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI523_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI522_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI523_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI522_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI521_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI520_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI521_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI520_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI519_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI518_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI519_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI518_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI517_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI516_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI517_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI516_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI515_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI514_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI515_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI514_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI513_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI512_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x40)++0x03
hide.long 0x0 "GICD_IERRR16,Interrupt Error Register 16"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=17.)
group.long (0xE100+0x44)++0x03
line.long 0x0 "GICD_IERRR17,Interrupt Error Register 17"
bitfld.long 0x00 31. " SPI561_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI560_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI559_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI558_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI559_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI558_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI557_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI556_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI557_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI556_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI555_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI554_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI555_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI554_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI553_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI552_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI553_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI552_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI551_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI550_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI551_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI550_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI549_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI548_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI549_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI548_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI547_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI546_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI547_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI546_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI545_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI544_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x44)++0x03
hide.long 0x0 "GICD_IERRR17,Interrupt Error Register 17"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=18.)
group.long (0xE100+0x48)++0x03
line.long 0x0 "GICD_IERRR18,Interrupt Error Register 18"
bitfld.long 0x00 31. " SPI593_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI592_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI591_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI590_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI591_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI590_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI589_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI588_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI589_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI588_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI587_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI586_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI587_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI586_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI585_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI584_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI585_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI584_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI583_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI582_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI583_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI582_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI581_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI580_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI581_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI580_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI579_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI578_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI579_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI578_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI577_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI576_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x48)++0x03
hide.long 0x0 "GICD_IERRR18,Interrupt Error Register 18"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=19.)
group.long (0xE100+0x4c)++0x03
line.long 0x0 "GICD_IERRR19,Interrupt Error Register 19"
bitfld.long 0x00 31. " SPI625_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI624_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI623_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI622_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI623_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI622_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI621_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI620_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI621_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI620_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI619_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI618_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI619_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI618_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI617_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI616_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI617_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI616_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI615_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI614_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI615_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI614_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI613_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI612_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI613_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI612_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI611_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI610_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI611_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI610_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI609_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI608_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x4c)++0x03
hide.long 0x0 "GICD_IERRR19,Interrupt Error Register 19"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=20.)
group.long (0xE100+0x50)++0x03
line.long 0x0 "GICD_IERRR20,Interrupt Error Register 20"
bitfld.long 0x00 31. " SPI657_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI656_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI655_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI654_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI655_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI654_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI653_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI652_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI653_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI652_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI651_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI650_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI651_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI650_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI649_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI648_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI649_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI648_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI647_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI646_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI647_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI646_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI645_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI644_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI645_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI644_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI643_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI642_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI643_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI642_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI641_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI640_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x50)++0x03
hide.long 0x0 "GICD_IERRR20,Interrupt Error Register 20"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=21.)
group.long (0xE100+0x54)++0x03
line.long 0x0 "GICD_IERRR21,Interrupt Error Register 21"
bitfld.long 0x00 31. " SPI689_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI688_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI687_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI686_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI687_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI686_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI685_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI684_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI685_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI684_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI683_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI682_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI683_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI682_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI681_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI680_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI681_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI680_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI679_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI678_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI679_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI678_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI677_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI676_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI677_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI676_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI675_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI674_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI675_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI674_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI673_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI672_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x54)++0x03
hide.long 0x0 "GICD_IERRR21,Interrupt Error Register 21"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=22.)
group.long (0xE100+0x58)++0x03
line.long 0x0 "GICD_IERRR22,Interrupt Error Register 22"
bitfld.long 0x00 31. " SPI721_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI720_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI719_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI718_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI719_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI718_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI717_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI716_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI717_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI716_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI715_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI714_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI715_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI714_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI713_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI712_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI713_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI712_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI711_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI710_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI711_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI710_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI709_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI708_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI709_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI708_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI707_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI706_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI707_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI706_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI705_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI704_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x58)++0x03
hide.long 0x0 "GICD_IERRR22,Interrupt Error Register 22"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=23.)
group.long (0xE100+0x5c)++0x03
line.long 0x0 "GICD_IERRR23,Interrupt Error Register 23"
bitfld.long 0x00 31. " SPI753_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI752_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI751_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI750_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI751_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI750_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI749_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI748_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI749_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI748_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI747_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI746_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI747_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI746_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI745_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI744_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI745_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI744_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI743_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI742_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI743_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI742_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI741_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI740_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI741_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI740_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI739_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI738_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI739_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI738_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI737_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI736_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x5c)++0x03
hide.long 0x0 "GICD_IERRR23,Interrupt Error Register 23"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=24.)
group.long (0xE100+0x60)++0x03
line.long 0x0 "GICD_IERRR24,Interrupt Error Register 24"
bitfld.long 0x00 31. " SPI785_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI784_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI783_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI782_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI783_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI782_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI781_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI780_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI781_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI780_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI779_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI778_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI779_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI778_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI777_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI776_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI777_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI776_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI775_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI774_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI775_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI774_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI773_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI772_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI773_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI772_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI771_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI770_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI771_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI770_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI769_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI768_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x60)++0x03
hide.long 0x0 "GICD_IERRR24,Interrupt Error Register 24"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=25.)
group.long (0xE100+0x64)++0x03
line.long 0x0 "GICD_IERRR25,Interrupt Error Register 25"
bitfld.long 0x00 31. " SPI817_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI816_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI815_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI814_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI815_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI814_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI813_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI812_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI813_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI812_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI811_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI810_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI811_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI810_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI809_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI808_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI809_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI808_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI807_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI806_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI807_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI806_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI805_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI804_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI805_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI804_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI803_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI802_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI803_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI802_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI801_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI800_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x64)++0x03
hide.long 0x0 "GICD_IERRR25,Interrupt Error Register 25"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=26.)
group.long (0xE100+0x68)++0x03
line.long 0x0 "GICD_IERRR26,Interrupt Error Register 26"
bitfld.long 0x00 31. " SPI849_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI848_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI847_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI846_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI847_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI846_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI845_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI844_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI845_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI844_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI843_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI842_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI843_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI842_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI841_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI840_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI841_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI840_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI839_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI838_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI839_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI838_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI837_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI836_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI837_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI836_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI835_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI834_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI835_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI834_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI833_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI832_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x68)++0x03
hide.long 0x0 "GICD_IERRR26,Interrupt Error Register 26"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=27.)
group.long (0xE100+0x6c)++0x03
line.long 0x0 "GICD_IERRR27,Interrupt Error Register 27"
bitfld.long 0x00 31. " SPI881_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI880_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI879_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI878_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI879_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI878_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI877_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI876_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI877_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI876_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI875_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI874_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI875_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI874_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI873_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI872_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI873_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI872_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI871_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI870_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI871_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI870_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI869_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI868_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI869_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI868_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI867_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI866_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI867_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI866_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI865_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI864_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x6c)++0x03
hide.long 0x0 "GICD_IERRR27,Interrupt Error Register 27"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=28.)
group.long (0xE100+0x70)++0x03
line.long 0x0 "GICD_IERRR28,Interrupt Error Register 28"
bitfld.long 0x00 31. " SPI913_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI912_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI911_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI910_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI911_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI910_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI909_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI908_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI909_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI908_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI907_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI906_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI907_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI906_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI905_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI904_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI905_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI904_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI903_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI902_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI903_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI902_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI901_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI900_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI901_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI900_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI899_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI898_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI899_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI898_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI897_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI896_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x70)++0x03
hide.long 0x0 "GICD_IERRR28,Interrupt Error Register 28"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=29.)
group.long (0xE100+0x74)++0x03
line.long 0x0 "GICD_IERRR29,Interrupt Error Register 29"
bitfld.long 0x00 31. " SPI945_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI944_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI943_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI942_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI943_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI942_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI941_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI940_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI941_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI940_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI939_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI938_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI939_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI938_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI937_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI936_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI937_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI936_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI935_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI934_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI935_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI934_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI933_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI932_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI933_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI932_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI931_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI930_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI931_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI930_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI929_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI928_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x74)++0x03
hide.long 0x0 "GICD_IERRR29,Interrupt Error Register 29"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=30.)
group.long (0xE100+0x78)++0x03
line.long 0x0 "GICD_IERRR30,Interrupt Error Register 30"
bitfld.long 0x00 31. " SPI977_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI976_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI975_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI974_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI975_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI974_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI973_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI972_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI973_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI972_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI971_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI970_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI971_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI970_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI969_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI968_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI969_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI968_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI967_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI966_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI967_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI966_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI965_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI964_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI965_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI964_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI963_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI962_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI963_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI962_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI961_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI960_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x78)++0x03
hide.long 0x0 "GICD_IERRR30,Interrupt Error Register 30"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
tree.end
width 14.
tree "Peripheral/Component ID Registers"
rgroup.quad 0xF000++0x07
line.quad 0x00 "GICD_CFGID,Configuration ID Register"
bitfld.quad 0x00 44.--47. "   AFF3    ,Returns the Affinity3 bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 40.--43. "               AFF2  ,Returns the Affinity2 bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 36.--39. "             AFF1  ,Returns the Affinity1 bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                               "
bitfld.quad 0x00 32.--35. "   AFF0    ,Returns the Affinity0 bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 15.--20. "               SPIS  ,SPI Groups" "0,1,2,3,4,5,6,7,8,9,10,%d..."
bitfld.quad 0x00 14. "             AFSL  ,Chip affinity selection level" "0,1"
textline "                               "
bitfld.quad 0x00 13. "   DLPI    ,Direct LPI registers supported" "Not Supported,Supported"
bitfld.quad 0x00 12. "    LPIS  ,LPI supported" "Not Supported,Supported"
bitfld.quad 0x00 4.--7. "  SNUM  ,Chip number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                               "
bitfld.quad 0x00 0. "   SO      ,Chip offline" "OFFLINE,ONLINE"
rgroup.long 0xFFE0++0x03
line.long 0x00 "GICD_PIDR0,Peripheral ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. "           PART_0  ,Part number[7:0]"
rgroup.long 0xFFE4++0x03
line.long 0x00 "GICD_PIDR1,Peripheral ID1 Register"
bitfld.long 0x00 4.--7. "           DES_1   ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "               PART_1 ,         Part number[11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFE8++0x03
line.long 0x00 "GICD_PIDR2,Peripheral ID2 Register"
bitfld.long 0x00 4.--7. "           ARCHREV ,Identifies the version of the GIC architecture with which the GIC-600 complies" "Reserved,Reserved,Reserved,v3.0,?..."
bitfld.long 0x00 3. "         JEDEC  ,Indicates that a JEDEC-assigned JEP106 identity code is used" "Not Used,Used"
bitfld.long 0x00 0.--2. "      DES_1 ,JEP106 identity code [6:4]" "0,1,2,3,4,5,6,7"
rgroup.long 0xFFEC++0x03
line.long 0x00 "GICD_PIDR3,Peripheral ID3 Register"
bitfld.long 0x00 4.--7. "           REVAND  ,Manufacturer defined revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "               CMOD   ,Indicates if the customer has modified the behavior of the component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFD0++0x03
line.long 0x00 "GICD_PIDR4,Peripheral ID4 Register"
bitfld.long 0x00 4.--7. "           SIZE    ,64 KB software visible page" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "               DES_2  ,ARM implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0xFFD4++0x03
hide.long 0x00 "GICD_PIDR5,Peripheral ID5 Register"
hgroup.long 0xFFD8++0x03
hide.long 0x00 "GICD_PIDR6,Peripheral ID6 Register"
hgroup.long 0xFFDC++0x03
hide.long 0x00 "GICD_PIDR7,Peripheral ID7 Register"
rgroup.long 0xFFF0++0x03
line.long 0x00 "GICD_CIDR0,Component ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. "           FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF4++0x03
line.long 0x00 "GICD_CIDR1,Component ID1 Register"
hexmask.long.byte 0x00 0.--7. 1. "           FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF8++0x03
line.long 0x00 "GICD_CIDR2,Component ID2 Register"
hexmask.long.byte 0x00 0.--7. 1. "           FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFFC++0x03
line.long 0x00 "GICD_CIDR3,Component ID3 Register"
hexmask.long.byte 0x00 0.--7. 1. "           FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
tree.end
tree.end
width 0x0B
base (COMP.BASE("GICD",-1.)+0x20000)
AUTOINDENT.ON CENTER TREE
tree "Trace and Debug"
tree "Error Record 0: Software error in GICD programming"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((0.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR0FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (0.==0.)
group.quad ((0.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR0CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((0.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR0STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((0.&0x1)==0x0)
group.quad ((0.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR0CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((0.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR0STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((0.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR0CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((0.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR0STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+0.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((0.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR0ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((0.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR0ADDR,Error Record Address Register"
else
group.quad ((0.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR0ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((0.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR0MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((0.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR0FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((0.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR0CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((0.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR0STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((0.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR0ADDR,Error Record Address Register"
hgroup.quad ((0.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR0MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((0.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR0FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (0.==0.)
group.quad ((0.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR0CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((0.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR0STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((0.&0x1)==0x0)
group.quad ((0.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR0CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((0.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR0STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((0.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR0CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((0.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR0STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+0.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((0.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR0ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((0.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR0ADDR,Error Record Address Register"
else
group.quad ((0.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR0ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((0.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR0MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((0.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR0FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((0.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR0CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((0.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR0STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((0.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR0ADDR,Error Record Address Register"
hgroup.quad ((0.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR0MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 1: Correctable SPI RAM errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((1.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR1FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (1.==0.)
group.quad ((1.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR1CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((1.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR1STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((1.&0x1)==0x0)
group.quad ((1.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR1CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((1.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR1STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((1.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR1CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((1.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR1STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+1.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((1.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR1ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((1.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR1ADDR,Error Record Address Register"
else
group.quad ((1.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR1ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((1.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR1MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((1.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR1FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((1.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR1CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((1.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR1STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((1.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR1ADDR,Error Record Address Register"
hgroup.quad ((1.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR1MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((1.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR1FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (1.==0.)
group.quad ((1.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR1CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((1.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR1STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((1.&0x1)==0x0)
group.quad ((1.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR1CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((1.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR1STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((1.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR1CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((1.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR1STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+1.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((1.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR1ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((1.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR1ADDR,Error Record Address Register"
else
group.quad ((1.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR1ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((1.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR1MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((1.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR1FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((1.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR1CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((1.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR1STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((1.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR1ADDR,Error Record Address Register"
hgroup.quad ((1.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR1MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 2: Uncorrectable SPI RAM errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((2.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR2FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (2.==0.)
group.quad ((2.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR2CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((2.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR2STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((2.&0x1)==0x0)
group.quad ((2.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR2CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((2.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR2STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((2.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR2CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((2.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR2STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+2.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((2.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR2ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((2.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR2ADDR,Error Record Address Register"
else
group.quad ((2.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR2ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((2.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR2MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((2.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR2FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((2.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR2CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((2.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR2STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((2.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR2ADDR,Error Record Address Register"
hgroup.quad ((2.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR2MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((2.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR2FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (2.==0.)
group.quad ((2.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR2CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((2.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR2STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((2.&0x1)==0x0)
group.quad ((2.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR2CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((2.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR2STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((2.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR2CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((2.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR2STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+2.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((2.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR2ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((2.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR2ADDR,Error Record Address Register"
else
group.quad ((2.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR2ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((2.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR2MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((2.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR2FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((2.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR2CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((2.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR2STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((2.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR2ADDR,Error Record Address Register"
hgroup.quad ((2.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR2MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 3: Correctable SGI RAM errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((3.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR3FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (3.==0.)
group.quad ((3.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR3CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((3.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR3STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((3.&0x1)==0x0)
group.quad ((3.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR3CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((3.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR3STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((3.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR3CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((3.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR3STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+3.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((3.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR3ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((3.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR3ADDR,Error Record Address Register"
else
group.quad ((3.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR3ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((3.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR3MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((3.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR3FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((3.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR3CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((3.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR3STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((3.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR3ADDR,Error Record Address Register"
hgroup.quad ((3.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR3MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((3.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR3FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (3.==0.)
group.quad ((3.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR3CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((3.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR3STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((3.&0x1)==0x0)
group.quad ((3.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR3CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((3.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR3STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((3.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR3CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((3.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR3STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+3.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((3.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR3ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((3.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR3ADDR,Error Record Address Register"
else
group.quad ((3.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR3ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((3.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR3MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((3.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR3FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((3.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR3CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((3.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR3STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((3.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR3ADDR,Error Record Address Register"
hgroup.quad ((3.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR3MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 4: Uncorrectable SGI RAM errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((4.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR4FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (4.==0.)
group.quad ((4.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR4CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((4.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR4STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((4.&0x1)==0x0)
group.quad ((4.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR4CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((4.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR4STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((4.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR4CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((4.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR4STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+4.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((4.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR4ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((4.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR4ADDR,Error Record Address Register"
else
group.quad ((4.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR4ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((4.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR4MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((4.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR4FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((4.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR4CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((4.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR4STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((4.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR4ADDR,Error Record Address Register"
hgroup.quad ((4.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR4MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((4.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR4FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (4.==0.)
group.quad ((4.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR4CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((4.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR4STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((4.&0x1)==0x0)
group.quad ((4.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR4CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((4.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR4STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((4.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR4CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((4.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR4STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+4.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((4.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR4ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((4.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR4ADDR,Error Record Address Register"
else
group.quad ((4.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR4ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((4.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR4MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((4.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR4FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((4.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR4CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((4.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR4STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((4.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR4ADDR,Error Record Address Register"
hgroup.quad ((4.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR4MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 5: Correctable TGT cache errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((5.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR5FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (5.==0.)
group.quad ((5.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR5CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((5.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR5STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((5.&0x1)==0x0)
group.quad ((5.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR5CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((5.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR5STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((5.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR5CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((5.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR5STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+5.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((5.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR5ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((5.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR5ADDR,Error Record Address Register"
else
group.quad ((5.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR5ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((5.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR5MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((5.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR5FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((5.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR5CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((5.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR5STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((5.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR5ADDR,Error Record Address Register"
hgroup.quad ((5.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR5MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((5.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR5FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (5.==0.)
group.quad ((5.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR5CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((5.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR5STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((5.&0x1)==0x0)
group.quad ((5.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR5CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((5.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR5STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((5.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR5CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((5.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR5STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+5.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((5.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR5ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((5.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR5ADDR,Error Record Address Register"
else
group.quad ((5.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR5ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((5.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR5MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((5.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR5FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((5.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR5CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((5.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR5STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((5.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR5ADDR,Error Record Address Register"
hgroup.quad ((5.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR5MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 6: Uncorrectable TGT cache errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((6.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR6FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (6.==0.)
group.quad ((6.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR6CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((6.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR6STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((6.&0x1)==0x0)
group.quad ((6.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR6CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((6.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR6STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((6.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR6CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((6.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR6STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+6.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((6.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR6ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((6.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR6ADDR,Error Record Address Register"
else
group.quad ((6.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR6ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((6.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR6MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((6.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR6FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((6.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR6CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((6.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR6STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((6.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR6ADDR,Error Record Address Register"
hgroup.quad ((6.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR6MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((6.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR6FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (6.==0.)
group.quad ((6.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR6CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((6.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR6STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((6.&0x1)==0x0)
group.quad ((6.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR6CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((6.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR6STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((6.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR6CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((6.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR6STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+6.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((6.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR6ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((6.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR6ADDR,Error Record Address Register"
else
group.quad ((6.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR6ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((6.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR6MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((6.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR6FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((6.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR6CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((6.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR6STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((6.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR6ADDR,Error Record Address Register"
hgroup.quad ((6.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR6MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 7: Correctable PPI RAM errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((7.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR7FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (7.==0.)
group.quad ((7.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR7CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((7.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR7STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((7.&0x1)==0x0)
group.quad ((7.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR7CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((7.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR7STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((7.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR7CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((7.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR7STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+7.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((7.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR7ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((7.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR7ADDR,Error Record Address Register"
else
group.quad ((7.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR7ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((7.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR7MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((7.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR7FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((7.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR7CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((7.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR7STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((7.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR7ADDR,Error Record Address Register"
hgroup.quad ((7.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR7MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((7.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR7FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (7.==0.)
group.quad ((7.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR7CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((7.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR7STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((7.&0x1)==0x0)
group.quad ((7.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR7CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((7.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR7STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((7.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR7CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((7.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR7STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+7.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((7.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR7ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((7.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR7ADDR,Error Record Address Register"
else
group.quad ((7.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR7ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((7.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR7MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((7.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR7FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((7.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR7CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((7.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR7STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((7.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR7ADDR,Error Record Address Register"
hgroup.quad ((7.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR7MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 8: Uncorrectable PPI RAM errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((8.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR8FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (8.==0.)
group.quad ((8.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR8CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((8.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR8STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((8.&0x1)==0x0)
group.quad ((8.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR8CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((8.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR8STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((8.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR8CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((8.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR8STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+8.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((8.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR8ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((8.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR8ADDR,Error Record Address Register"
else
group.quad ((8.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR8ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((8.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR8MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((8.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR8FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((8.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR8CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((8.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR8STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((8.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR8ADDR,Error Record Address Register"
hgroup.quad ((8.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR8MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((8.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR8FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (8.==0.)
group.quad ((8.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR8CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((8.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR8STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((8.&0x1)==0x0)
group.quad ((8.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR8CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((8.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR8STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((8.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR8CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((8.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR8STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+8.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((8.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR8ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((8.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR8ADDR,Error Record Address Register"
else
group.quad ((8.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR8ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((8.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR8MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((8.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR8FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((8.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR8CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((8.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR8STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((8.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR8ADDR,Error Record Address Register"
hgroup.quad ((8.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR8MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 9: Correctable LPI RAM errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((9.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR9FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (9.==0.)
group.quad ((9.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR9CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((9.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR9STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((9.&0x1)==0x0)
group.quad ((9.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR9CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((9.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR9STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((9.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR9CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((9.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR9STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+9.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((9.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR9ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((9.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR9ADDR,Error Record Address Register"
else
group.quad ((9.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR9ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((9.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR9MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((9.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR9FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((9.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR9CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((9.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR9STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((9.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR9ADDR,Error Record Address Register"
hgroup.quad ((9.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR9MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((9.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR9FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (9.==0.)
group.quad ((9.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR9CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((9.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR9STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((9.&0x1)==0x0)
group.quad ((9.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR9CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((9.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR9STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((9.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR9CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((9.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR9STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+9.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((9.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR9ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((9.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR9ADDR,Error Record Address Register"
else
group.quad ((9.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR9ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((9.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR9MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((9.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR9FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((9.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR9CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((9.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR9STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((9.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR9ADDR,Error Record Address Register"
hgroup.quad ((9.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR9MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 10: Uncorrectable LPI RAM errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((10.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR10FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (10.==0.)
group.quad ((10.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR10CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((10.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR10STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((10.&0x1)==0x0)
group.quad ((10.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR10CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((10.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR10STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((10.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR10CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((10.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR10STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+10.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((10.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR10ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((10.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR10ADDR,Error Record Address Register"
else
group.quad ((10.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR10ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((10.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR10MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((10.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR10FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((10.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR10CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((10.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR10STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((10.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR10ADDR,Error Record Address Register"
hgroup.quad ((10.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR10MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((10.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR10FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (10.==0.)
group.quad ((10.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR10CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((10.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR10STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((10.&0x1)==0x0)
group.quad ((10.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR10CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((10.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR10STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((10.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR10CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((10.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR10STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+10.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((10.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR10ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((10.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR10ADDR,Error Record Address Register"
else
group.quad ((10.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR10ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((10.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR10MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((10.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR10FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((10.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR10CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((10.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR10STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((10.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR10ADDR,Error Record Address Register"
hgroup.quad ((10.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR10MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 11: Correctable error from ITS RAM"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((11.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR11FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (11.==0.)
group.quad ((11.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR11CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((11.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR11STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((11.&0x1)==0x0)
group.quad ((11.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR11CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((11.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR11STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((11.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR11CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((11.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR11STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+11.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((11.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR11ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((11.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR11ADDR,Error Record Address Register"
else
group.quad ((11.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR11ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((11.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR11MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((11.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR11FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((11.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR11CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((11.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR11STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((11.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR11ADDR,Error Record Address Register"
hgroup.quad ((11.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR11MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((11.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR11FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (11.==0.)
group.quad ((11.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR11CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((11.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR11STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((11.&0x1)==0x0)
group.quad ((11.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR11CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((11.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR11STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((11.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR11CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((11.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR11STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+11.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((11.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR11ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((11.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR11ADDR,Error Record Address Register"
else
group.quad ((11.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR11ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((11.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR11MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((11.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR11FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((11.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR11CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((11.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR11STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((11.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR11ADDR,Error Record Address Register"
hgroup.quad ((11.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR11MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 12: Uncorrectable error from ITS RAM"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((12.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR12FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (12.==0.)
group.quad ((12.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR12CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((12.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR12STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((12.&0x1)==0x0)
group.quad ((12.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR12CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((12.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR12STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((12.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR12CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((12.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR12STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+12.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((12.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR12ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((12.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR12ADDR,Error Record Address Register"
else
group.quad ((12.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR12ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((12.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR12MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((12.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR12FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((12.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR12CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((12.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR12STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((12.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR12ADDR,Error Record Address Register"
hgroup.quad ((12.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR12MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((12.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR12FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (12.==0.)
group.quad ((12.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR12CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((12.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR12STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((12.&0x1)==0x0)
group.quad ((12.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR12CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((12.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR12STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((12.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR12CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((12.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR12STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+12.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((12.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR12ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((12.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR12ADDR,Error Record Address Register"
else
group.quad ((12.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR12ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((12.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR12MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((12.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR12FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((12.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR12CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((12.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR12STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((12.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR12ADDR,Error Record Address Register"
hgroup.quad ((12.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR12MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 13: Software error in ITS"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((13.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR13FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (13.==0.)
group.quad ((13.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR13CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((13.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR13STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((13.&0x1)==0x0)
group.quad ((13.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR13CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((13.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR13STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((13.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR13CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((13.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR13STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+13.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((13.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR13ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((13.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR13ADDR,Error Record Address Register"
else
group.quad ((13.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR13ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((13.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR13MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((13.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR13FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((13.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR13CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((13.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR13STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((13.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR13ADDR,Error Record Address Register"
hgroup.quad ((13.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR13MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((13.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR13FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (13.==0.)
group.quad ((13.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR13CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((13.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR13STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((13.&0x1)==0x0)
group.quad ((13.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR13CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((13.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR13STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((13.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR13CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((13.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR13STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+13.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((13.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR13ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((13.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR13ADDR,Error Record Address Register"
else
group.quad ((13.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR13ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((13.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR13MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((13.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR13FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((13.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR13CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((13.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR13STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((13.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR13ADDR,Error Record Address Register"
hgroup.quad ((13.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR13MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Common Registers"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
group.quad ((10.*0x40)+0x028)++0x07
line.quad 0x00 "GICT_ERR10MISC1,Error Record Miscellaneous Register 1"
hexmask.quad.quad 0x00 0.--63. 1. " INFO ,Value represents either data that is written to the LPI RAM when an uncorrectable error is detected, or ITS software information for one of 13, or more, error records."
else
hgroup.quad (((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x028)++0x07
hide.quad 0x00 "GICT_ERR10MISC1,Error Record Miscellaneous Register 1"
endif
rgroup.quad 0xE000++0x07
line.quad 0x00 "GICT_ERRGSR,Group Status Register"
rgroup.long 0xFFBC++0x03
line.long 0x00 "GICT_ERRDEVARCH,Device Architecture register"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
rgroup.long 0xFFC8++0x03
line.long 0x00 "GICT_ERRIDR,Error Record ID Register"
bitfld.long 0x00 0.--15. " NUM , Identifies the device configuration." "?,?,?,?,?,?,?,?,?,?,No LPI available,?,LPI available but no ITS,?,LPI available and 1*ITS,LPI available and 2*ITS,LPI available and 3*ITS,?..."
else
hgroup.long 0xFFC8++0x03
hide.long 0x00 "GICT_ERRIDR,Error Record ID Register"
endif
tree.end
width 12.
tree "Peripheral/Component ID Registers"
rgroup.long 0xFFE0++0x03
line.long 0x00 "GICT_PIDR0,Peripheral ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. " PART_0  ,Part number[7:0]"
rgroup.long 0xFFE4++0x03
line.long 0x00 "GICT_PIDR1,Peripheral ID1 Register"
bitfld.long 0x00 4.--7. " DES_1   ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        PART_1 ,         Part number[11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFE8++0x03
line.long 0x00 "GICT_PIDR2,Peripheral ID2 Register"
bitfld.long 0x00 4.--7. " ARCHREV ,Identifies the version of the GIC architecture with which the GIC-600 complies" "Reserved,Reserved,Reserved,v3.0,?..."
bitfld.long 0x00 3. "  JEDEC  ,Indicates that a JEDEC-assigned JEP106 identity code is used" "Low,High"
bitfld.long 0x00 0.--2. "  DES_1 ,JEP106 identity code [6:4]" "0,1,2,3,4,5,6,7"
rgroup.long 0xFFEC++0x03
line.long 0x00 "GICT_PIDR3,Peripheral ID3 Register"
bitfld.long 0x00 4.--7. " REVAND  ,Manufacturer defined revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        CMOD   ,Indicates if the customer has modified the behavior of the component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFD0++0x03
line.long 0x00 "GICT_PIDR4,Peripheral ID4 Register"
bitfld.long 0x00 4.--7. " SIZE    ,64 KB software visible page" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        DES_2  ,ARM implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0xFFD4++0x03
hide.long 0x00 "GICT_PIDR5,Peripheral ID5 Register"
hgroup.long 0xFFD8++0x03
hide.long 0x00 "GICT_PIDR6,Peripheral ID6 Register"
hgroup.long 0xFFDC++0x03
hide.long 0x00 "GICT_PIDR7,Peripheral ID7 Register"
rgroup.long 0xFFF0++0x03
line.long 0x00 "GICT_CIDR0,Component ID0 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF4++0x03
line.long 0x00 "GICT_CIDR1,Component ID1 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF8++0x03
line.long 0x00 "GICT_CIDR2,Component ID2 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFFC++0x03
line.long 0x00 "GICT_CIDR3,Component ID3 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
tree.end
tree.end
AUTOINDENT.OFF
base (COMP.BASE("GICD",-1.)+0x30000)
AUTOINDENT.ON CENTER TREE
tree "Performance Monitoring Unit"
group.long (0x000+0x0)++0x03
line.long 0x00 "GICP_EVCNTR0,Event Counter Register"
hexmask.long.long 0x00 0.--31. 1. " COUNT ,Counter value. If the counter is enabled, the counter value increments when an event matching GICP_EVTYPERn.EVENT occurs."
group.long (0x400+0x0)++0x03
line.long 0x00 "GICP_EVTYPER0,Event Type Configuration Register"
bitfld.long 0x00 31. " OVFCAP ,When set to 1, an overflow of counter n triggers a capture if GICP_CAPR.CAPTURE is set." "0,1"
bitfld.long 0x00 16.--17. "  EVENTTYPE ,Event tracking type." "Count,Accumulate,Maximum,Reserved"
hexmask.long.byte 0x00 0.--7. 1. "  EVENT ,Event identifier. All events reset to an UNKNOWN value. Registers corresponding to unimplemented counters are RES0. See table in TRM"
rgroup.long (0x600+0x0)++0x03
line.long 0x00 "GICP_SVR0,Shadow Value Registers"
hexmask.long.long 0x00 0.--31. 1. " COUNT,Captured counter value.This field holds the captured counter values of the corresponding entry in GICP_EVCNTRn."
group.long (0xA00+0x0)++0x03
line.long 0x00 "GICP_FR0,Filter Registers"
bitfld.long 0x00 30.--31. " FILTERTYPE ,Filter Type." "Core,INTID,Chip/ITS,Reserved"
bitfld.long 0x00 29. "  FILTERENCODING ,Filter Encoding." "Range,Exact"
hexmask.long.byte 0x00 0.--15. 1. "  Filter ,If the corresponding GICP_EVTYPERn.EVENT indicates an event that cannot be filtered, then the value in this register is ignored."
NEWLINE
group.long (0x000+0x4)++0x03
line.long 0x00 "GICP_EVCNTR1,Event Counter Register"
hexmask.long.long 0x00 0.--31. 1. " COUNT ,Counter value. If the counter is enabled, the counter value increments when an event matching GICP_EVTYPERn.EVENT occurs."
group.long (0x400+0x4)++0x03
line.long 0x00 "GICP_EVTYPER1,Event Type Configuration Register"
bitfld.long 0x00 31. " OVFCAP ,When set to 1, an overflow of counter n triggers a capture if GICP_CAPR.CAPTURE is set." "0,1"
bitfld.long 0x00 16.--17. "  EVENTTYPE ,Event tracking type." "Count,Accumulate,Maximum,Reserved"
hexmask.long.byte 0x00 0.--7. 1. "  EVENT ,Event identifier. All events reset to an UNKNOWN value. Registers corresponding to unimplemented counters are RES0. See table in TRM"
rgroup.long (0x600+0x4)++0x03
line.long 0x00 "GICP_SVR1,Shadow Value Registers"
hexmask.long.long 0x00 0.--31. 1. " COUNT,Captured counter value.This field holds the captured counter values of the corresponding entry in GICP_EVCNTRn."
group.long (0xA00+0x4)++0x03
line.long 0x00 "GICP_FR1,Filter Registers"
bitfld.long 0x00 30.--31. " FILTERTYPE ,Filter Type." "Core,INTID,Chip/ITS,Reserved"
bitfld.long 0x00 29. "  FILTERENCODING ,Filter Encoding." "Range,Exact"
hexmask.long.byte 0x00 0.--15. 1. "  Filter ,If the corresponding GICP_EVTYPERn.EVENT indicates an event that cannot be filtered, then the value in this register is ignored."
NEWLINE
group.long (0x000+0x8)++0x03
line.long 0x00 "GICP_EVCNTR2,Event Counter Register"
hexmask.long.long 0x00 0.--31. 1. " COUNT ,Counter value. If the counter is enabled, the counter value increments when an event matching GICP_EVTYPERn.EVENT occurs."
group.long (0x400+0x8)++0x03
line.long 0x00 "GICP_EVTYPER2,Event Type Configuration Register"
bitfld.long 0x00 31. " OVFCAP ,When set to 1, an overflow of counter n triggers a capture if GICP_CAPR.CAPTURE is set." "0,1"
bitfld.long 0x00 16.--17. "  EVENTTYPE ,Event tracking type." "Count,Accumulate,Maximum,Reserved"
hexmask.long.byte 0x00 0.--7. 1. "  EVENT ,Event identifier. All events reset to an UNKNOWN value. Registers corresponding to unimplemented counters are RES0. See table in TRM"
rgroup.long (0x600+0x8)++0x03
line.long 0x00 "GICP_SVR2,Shadow Value Registers"
hexmask.long.long 0x00 0.--31. 1. " COUNT,Captured counter value.This field holds the captured counter values of the corresponding entry in GICP_EVCNTRn."
group.long (0xA00+0x8)++0x03
line.long 0x00 "GICP_FR2,Filter Registers"
bitfld.long 0x00 30.--31. " FILTERTYPE ,Filter Type." "Core,INTID,Chip/ITS,Reserved"
bitfld.long 0x00 29. "  FILTERENCODING ,Filter Encoding." "Range,Exact"
hexmask.long.byte 0x00 0.--15. 1. "  Filter ,If the corresponding GICP_EVTYPERn.EVENT indicates an event that cannot be filtered, then the value in this register is ignored."
NEWLINE
group.long (0x000+0xC)++0x03
line.long 0x00 "GICP_EVCNTR3,Event Counter Register"
hexmask.long.long 0x00 0.--31. 1. " COUNT ,Counter value. If the counter is enabled, the counter value increments when an event matching GICP_EVTYPERn.EVENT occurs."
group.long (0x400+0xC)++0x03
line.long 0x00 "GICP_EVTYPER3,Event Type Configuration Register"
bitfld.long 0x00 31. " OVFCAP ,When set to 1, an overflow of counter n triggers a capture if GICP_CAPR.CAPTURE is set." "0,1"
bitfld.long 0x00 16.--17. "  EVENTTYPE ,Event tracking type." "Count,Accumulate,Maximum,Reserved"
hexmask.long.byte 0x00 0.--7. 1. "  EVENT ,Event identifier. All events reset to an UNKNOWN value. Registers corresponding to unimplemented counters are RES0. See table in TRM"
rgroup.long (0x600+0xC)++0x03
line.long 0x00 "GICP_SVR3,Shadow Value Registers"
hexmask.long.long 0x00 0.--31. 1. " COUNT,Captured counter value.This field holds the captured counter values of the corresponding entry in GICP_EVCNTRn."
group.long (0xA00+0xC)++0x03
line.long 0x00 "GICP_FR3,Filter Registers"
bitfld.long 0x00 30.--31. " FILTERTYPE ,Filter Type." "Core,INTID,Chip/ITS,Reserved"
bitfld.long 0x00 29. "  FILTERENCODING ,Filter Encoding." "Range,Exact"
hexmask.long.byte 0x00 0.--15. 1. "  Filter ,If the corresponding GICP_EVTYPERn.EVENT indicates an event that cannot be filtered, then the value in this register is ignored."
NEWLINE
group.long (0x000+0x10)++0x03
line.long 0x00 "GICP_EVCNTR4,Event Counter Register"
hexmask.long.long 0x00 0.--31. 1. " COUNT ,Counter value. If the counter is enabled, the counter value increments when an event matching GICP_EVTYPERn.EVENT occurs."
group.long (0x400+0x10)++0x03
line.long 0x00 "GICP_EVTYPER4,Event Type Configuration Register"
bitfld.long 0x00 31. " OVFCAP ,When set to 1, an overflow of counter n triggers a capture if GICP_CAPR.CAPTURE is set." "0,1"
bitfld.long 0x00 16.--17. "  EVENTTYPE ,Event tracking type." "Count,Accumulate,Maximum,Reserved"
hexmask.long.byte 0x00 0.--7. 1. "  EVENT ,Event identifier. All events reset to an UNKNOWN value. Registers corresponding to unimplemented counters are RES0. See table in TRM"
rgroup.long (0x600+0x10)++0x03
line.long 0x00 "GICP_SVR4,Shadow Value Registers"
hexmask.long.long 0x00 0.--31. 1. " COUNT,Captured counter value.This field holds the captured counter values of the corresponding entry in GICP_EVCNTRn."
group.long (0xA00+0x10)++0x03
line.long 0x00 "GICP_FR4,Filter Registers"
bitfld.long 0x00 30.--31. " FILTERTYPE ,Filter Type." "Core,INTID,Chip/ITS,Reserved"
bitfld.long 0x00 29. "  FILTERENCODING ,Filter Encoding." "Range,Exact"
hexmask.long.byte 0x00 0.--15. 1. "  Filter ,If the corresponding GICP_EVTYPERn.EVENT indicates an event that cannot be filtered, then the value in this register is ignored."
NEWLINE
group.quad 0xC00++0x07
line.quad 0x00 "GICP_CNTENSET0,Counter Enable Set Register 0"
bitfld.quad 0x00 4. " CNTEN4  ,Counter disable. Writing 1 to a bit location sets the enable for the associated counter. Writing 0 to a bit location has no effect. To disable a counter, use the GICP_CNTENCLR0 register. Reads return the state of the counter enables." "0,1"
bitfld.quad 0x00 3. " CNTEN3  ,Counter disable. Writing 1 to a bit location sets the enable for the associated counter. Writing 0 to a bit location has no effect. To disable a counter, use the GICP_CNTENCLR0 register. Reads return the state of the counter enables." "0,1"
bitfld.quad 0x00 2. " CNTEN2  ,Counter disable. Writing 1 to a bit location sets the enable for the associated counter. Writing 0 to a bit location has no effect. To disable a counter, use the GICP_CNTENCLR0 register. Reads return the state of the counter enables." "0,1"
NEWLINE
bitfld.quad 0x00 1. " CNTEN1  ,Counter disable. Writing 1 to a bit location sets the enable for the associated counter. Writing 0 to a bit location has no effect. To disable a counter, use the GICP_CNTENCLR0 register. Reads return the state of the counter enables." "0,1"
bitfld.quad 0x00 0. " CNTEN0  ,Counter disable. Writing 1 to a bit location sets the enable for the associated counter. Writing 0 to a bit location has no effect. To disable a counter, use the GICP_CNTENCLR0 register. Reads return the state of the counter enables." "0,1"
group.quad 0xC20++0x07
line.quad 0x00 "GICP_INTENCLR0,Counter Enable Clear Register 0"
bitfld.quad 0x00 4. " CNTEN4  ,Counter disable. Writing 1 to a bit location clears the enable for the associated counter. Writing 0 to a bit location has no effect. To enable a counter, use the GICP_CNTENSET0 register. Reads return the state of the counter enables." "0,1"
bitfld.quad 0x00 3. " CNTEN3  ,Counter disable. Writing 1 to a bit location clears the enable for the associated counter. Writing 0 to a bit location has no effect. To enable a counter, use the GICP_CNTENSET0 register. Reads return the state of the counter enables." "0,1"
bitfld.quad 0x00 2. " CNTEN2  ,Counter disable. Writing 1 to a bit location clears the enable for the associated counter. Writing 0 to a bit location has no effect. To enable a counter, use the GICP_CNTENSET0 register. Reads return the state of the counter enables." "0,1"
NEWLINE
bitfld.quad 0x00 1. " CNTEN1  ,Counter disable. Writing 1 to a bit location clears the enable for the associated counter. Writing 0 to a bit location has no effect. To enable a counter, use the GICP_CNTENSET0 register. Reads return the state of the counter enables." "0,1"
bitfld.quad 0x00 0. " CNTEN0  ,Counter disable. Writing 1 to a bit location clears the enable for the associated counter. Writing 0 to a bit location has no effect. To enable a counter, use the GICP_CNTENSET0 register. Reads return the state of the counter enables." "0,1"
group.quad 0xC40++0x07
line.quad 0x00 "GICP_INTENSET0,Interrupt Contribution Enable Set Register 0"
bitfld.quad 0x00 4. " INTEN4  ,Interrupt enable. Writing 1 sets the interrupt enable for the associated counter. Writing 0 has no effect. To disable a counter interrupt enable, use the GICP_INTENCLR0 register. Reads return the state of the interrupt enables." "0,1"
bitfld.quad 0x00 3. "  INTEN3  ,Interrupt enable. Writing 1 sets the interrupt enable for the associated counter. Writing 0 has no effect. To disable a counter interrupt enable, use the GICP_INTENCLR0 register. Reads return the state of the interrupt enables." "0,1"
bitfld.quad 0x00 2. "  INTEN2  ,Interrupt enable. Writing 1 sets the interrupt enable for the associated counter. Writing 0 has no effect. To disable a counter interrupt enable, use the GICP_INTENCLR0 register. Reads return the state of the interrupt enables." "0,1"
NEWLINE
bitfld.quad 0x00 1. " INTEN1  ,Interrupt enable. Writing 1 sets the interrupt enable for the associated counter. Writing 0 has no effect. To disable a counter interrupt enable, use the GICP_INTENCLR0 register. Reads return the state of the interrupt enables." "0,1"
bitfld.quad 0x00 0. "  INTEN0  ,Interrupt enable. Writing 1 sets the interrupt enable for the associated counter. Writing 0 has no effect. To disable a counter interrupt enable, use the GICP_INTENCLR0 register. Reads return the state of the interrupt enables." "0,1"
group.quad 0xC60++0x07
line.quad 0x00 "GICP_INTENCLR0,Interrupt Contribution Enable Clear Register 0"
bitfld.quad 0x00 4. " INTEN4  ,Interrupt enable. Writing 1 clears the interrupt enable for the associated counter. Writing 0 has no effect. To enable a counter interrupt enable, use the GICP_INTENSET0 register. Reads return the state of the interrupt enables." "0,1"
bitfld.quad 0x00 3. "  INTEN3  ,Interrupt enable. Writing 1 clears the interrupt enable for the associated counter. Writing 0 has no effect. To enable a counter interrupt enable, use the GICP_INTENSET0 register. Reads return the state of the interrupt enables." "0,1"
bitfld.quad 0x00 2. "  INTEN2  ,Interrupt enable. Writing 1 clears the interrupt enable for the associated counter. Writing 0 has no effect. To enable a counter interrupt enable, use the GICP_INTENSET0 register. Reads return the state of the interrupt enables." "0,1"
NEWLINE
bitfld.quad 0x00 1. " INTEN1  ,Interrupt enable. Writing 1 clears the interrupt enable for the associated counter. Writing 0 has no effect. To enable a counter interrupt enable, use the GICP_INTENSET0 register. Reads return the state of the interrupt enables." "0,1"
bitfld.quad 0x00 0. "  INTEN0  ,Interrupt enable. Writing 1 clears the interrupt enable for the associated counter. Writing 0 has no effect. To enable a counter interrupt enable, use the GICP_INTENSET0 register. Reads return the state of the interrupt enables." "0,1"
group.quad 0xC80++0x07
line.quad 0x00 "GICP_OVSCLR0,Overflow Status Clear Register 0"
bitfld.quad 0x00 4. " OVS4  ,Overflow status. Writing 1 clears the overflow status for the associated counter. Writing 0 has no effect. To set the counter overflow status, use the GICP_OVSSET0 register. Reads return the state of the overflow status bits." "0,1"
bitfld.quad 0x00 3. "  OVS3  ,Overflow status. Writing 1 clears the overflow status for the associated counter. Writing 0 has no effect. To set the counter overflow status, use the GICP_OVSSET0 register. Reads return the state of the overflow status bits." "0,1"
bitfld.quad 0x00 2. "  OVS2  ,Overflow status. Writing 1 clears the overflow status for the associated counter. Writing 0 has no effect. To set the counter overflow status, use the GICP_OVSSET0 register. Reads return the state of the overflow status bits." "0,1"
NEWLINE
bitfld.quad 0x00 1. " OVS1  ,Overflow status. Writing 1 clears the overflow status for the associated counter. Writing 0 has no effect. To set the counter overflow status, use the GICP_OVSSET0 register. Reads return the state of the overflow status bits." "0,1"
bitfld.quad 0x00 0. "  OVS0  ,Overflow status. Writing 1 clears the overflow status for the associated counter. Writing 0 has no effect. To set the counter overflow status, use the GICP_OVSSET0 register. Reads return the state of the overflow status bits." "0,1"
group.quad 0xCC0++0x07
line.quad 0x00 "GICP_OVSSET0,Overflow Status Set Register 0"
bitfld.quad 0x00 4. " OVS4  ,Writing 1 sets the overflow status for the associated counter. Writing 0 has no effect. To clear a counter overflow status, use the GICP_OVSCLR0 register. Reads return the state of the overflow status bits." "0,1"
bitfld.quad 0x00 3. "  OVS3  ,Writing 1 sets the overflow status for the associated counter. Writing 0 has no effect. To clear a counter overflow status, use the GICP_OVSCLR0 register. Reads return the state of the overflow status bits." "0,1"
bitfld.quad 0x00 2. "  OVS2  ,Writing 1 sets the overflow status for the associated counter. Writing 0 has no effect. To clear a counter overflow status, use the GICP_OVSCLR0 register. Reads return the state of the overflow status bits." "0,1"
NEWLINE
bitfld.quad 0x00 1. " OVS1  ,Writing 1 sets the overflow status for the associated counter. Writing 0 has no effect. To clear a counter overflow status, use the GICP_OVSCLR0 register. Reads return the state of the overflow status bits." "0,1"
bitfld.quad 0x00 0. "  OVS0  ,Writing 1 sets the overflow status for the associated counter. Writing 0 has no effect. To clear a counter overflow status, use the GICP_OVSCLR0 register. Reads return the state of the overflow status bits." "0,1"
wgroup.long 0xD88++0x03
line.long 0x00 "GICP_CAPR,Counter Shadow Value Capture Register"
bitfld.long 0x00 0. " CAPTURE  ,When GICP_CFGR.CAPTURE == 1, a write of 1 to this bit triggers a capture of all values within the PMU into their respective shadow registers. When GICP_CFGR.CAPTURE == 0, this bit is zero." "-,1"
rgroup.long 0xE00++0x03
line.long 0x00 "GICP_CFGR,Configuration Information Register"
bitfld.long 0x00 22. " CAPTURE  ,Indicates if the GIC supports capture." "Not Supported,Supported"
hexmask.long.byte 0x00 8.--13. 1. " SIZE  ,Indicates the counter width+1."
hexmask.long.byte 0x00 0.--5.  1. " NCTR  ,Indicates the amount of available counters+1."
group.long 0xE04++0x03
line.long 0x00 "GICP_CR,Control Register"
bitfld.long 0x00 0. " E  ,Global counter enable. This bit takes precedence over the GICP_CNTENSET0.CNTEN bits." "Disabled,Enabled"
rgroup.long 0xFCC++0x03
line.long 0x00 "GICP_PMDEVTYPE,-"
NEWLINE
tree "Peripheral/Component ID Registers"
rgroup.long 0xFE0++0x03
line.long 0x00 "GICP_PIDR0,Peripheral ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. " PART_0  ,Part number[7:0]"
rgroup.long 0xFE4++0x03
line.long 0x00 "GICP_PIDR1,Peripheral ID1 Register"
bitfld.long 0x00 4.--7. " DES_1   ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        PART_1 ,         Part number[11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFE8++0x03
line.long 0x00 "GICP_PIDR2,Peripheral ID2 Register"
bitfld.long 0x00 4.--7. " ARCHREV ,Identifies the version of the GIC architecture with which the GIC-600 complies" "Reserved,Reserved,Reserved,v3.0,?..."
bitfld.long 0x00 3. "  JEDEC  ,Indicates that a JEDEC-assigned JEP106 identity code is used" "Low,High"
bitfld.long 0x00 0.--2. "  DES_1 ,JEP106 identity code [6:4]" "0,1,2,3,4,5,6,7"
rgroup.long 0xFEC++0x03
line.long 0x00 "GICP_PIDR3,Peripheral ID3 Register"
bitfld.long 0x00 4.--7. " REVAND  ,Manufacturer defined revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        CMOD   ,Indicates if the customer has modified the behavior of the component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFD0++0x03
line.long 0x00 "GICP_PIDR4,Peripheral ID4 Register"
bitfld.long 0x00 4.--7. " SIZE    ,64 KB software visible page" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        DES_2  ,ARM implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0xFD4++0x03
hide.long 0x00 "GICP_PIDR5,Peripheral ID5 Register"
hgroup.long 0xFD8++0x03
hide.long 0x00 "GICP_PIDR6,Peripheral ID6 Register"
hgroup.long 0xFDC++0x03
hide.long 0x00 "GICP_PIDR7,Peripheral ID7 Register"
rgroup.long 0xFF0++0x03
line.long 0x00 "GICP_CIDR0,Component ID0 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFF4++0x03
line.long 0x00 "GICP_CIDR1,Component ID1 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFF8++0x03
line.long 0x00 "GICP_CIDR2,Component ID2 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFC++0x03
line.long 0x00 "GICP_CIDR3,Component ID3 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
tree.end
tree.end
AUTOINDENT.OFF
base (COMP.BASE("GICD",-1.)+0x40000)
AUTOINDENT.ON CENTER TREE
tree "Interrupt Translation Service"
group.long 0x00++0x03
line.long 0x00 "GITS_CTLR,ITS Control Register"
rbitfld.long 0x00 31. "  QUIESCENT  ,Indicates completion of all ITS operations" "Not quiescent,Quiescent"
bitfld.long 0x00 0. "  ENABLED  ,Controls whether the ITS is enabled" "Disabled,Enabled"
rgroup.long 0x04++0x03
line.long 0x00 "GITS_IIDR,ITS Implementer Identification Register"
bitfld.long 0x00 24.--31. "  PRODID  ,Indicates the product ID" "GIC-500,?,GIC-600,?..."
bitfld.long 0x00 16.--19. "  VAR  ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
NEWLINE
bitfld.long 0x00 12.--15. "  REV  ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "  IMP  ,Implementer"
if (((per.q((COMP.BASE("GICD",-1.)+0x40000)+0x0008))&0x1000000000)==0x1000000000)&&(((per.q((COMP.BASE("GICD",-1.)+0x40000)+0x0008))&0xFF000000)!=0x00)
rgroup.quad 0x08++0x07
line.quad 0x00 "GITS_TYPER,ITS Type Register"
bitfld.quad 0x00 37. "  VMOVP  ,Indicates the form of the VMOVP command" "All ITSs,One ITS"
bitfld.quad 0x00 36. "  CIL  ,Collection ID Limit" "0,1"
NEWLINE
bitfld.quad 0x00 32.--35. "  CIDBITS  ,Number of Collection ID bits set by " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 24.--31. 1. "  HCC  ,Hardware Collection Count"
NEWLINE
bitfld.quad 0x00 19. "  PTA  ,Indicates the format of the target address" "Not suppported,Supported"
bitfld.quad 0x00 18. "  SEIS  ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not suppported,Supported"
NEWLINE
bitfld.quad 0x00 13.--17. "  DEVBITS  ,The number of DeviceID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 8.--12. "  ID_BITS  ,The number of EventID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
NEWLINE
rbitfld.quad 0x00 4.--7. "  ITT_ENTRY_SIZE  ,The number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 2. "  CCT  ,Cumulative Collection Tables" "0,1"
elif (((per.q((COMP.BASE("GICD",-1.)+0x40000)+0x0008))&0x1000000000)==0x1000000000)
rgroup.quad 0x08++0x07
line.quad 0x00 "GITS_TYPER,ITS Type Register"
bitfld.quad 0x00 37. "  VMOVP  ,Indicates the form of the VMOVP command" "All ITSs,One ITS"
bitfld.quad 0x00 36. "  CIL  ,Collection ID Limit" "0,1"
NEWLINE
bitfld.quad 0x00 32.--35. "  CIDBITS  ,Number of Collection ID bits minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 24.--31. 1. "  HCC  ,Hardware Collection Count"
NEWLINE
bitfld.quad 0x00 19. "  PTA  ,Indicates the format of the target address" "Not suppported,Supported"
bitfld.quad 0x00 18. "  SEIS  ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not suppported,Supported"
NEWLINE
bitfld.quad 0x00 13.--17. "  DEVBITS  ,The number of DeviceID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 8.--12. "  ID_BITS  ,The number of EventID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
NEWLINE
rbitfld.quad 0x00 4.--7. "  ITT_ENTRY_SIZE  ,The number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
elif (((per.q((COMP.BASE("GICD",-1.)+0x40000)+0x0008))&0xFF000000)!=0x00)
rgroup.quad 0x08++0x07
line.quad 0x00 "GITS_TYPER,ITS Type Register"
bitfld.quad 0x00 37. "  VMOVP  ,Indicates the form of the VMOVP command" "All ITSs,One ITS"
bitfld.quad 0x00 36. "  CIL  ,Collection ID Limit" "0,1"
NEWLINE
hexmask.quad.byte 0x00 24.--31. 1. "  HCC  ,Hardware Collection Count"
bitfld.quad 0x00 19. "  PTA  ,Indicates the format of the target address" "Not suppported,Supported"
NEWLINE
bitfld.quad 0x00 18. "  SEIS  ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not suppported,Supported"
bitfld.quad 0x00 13.--17. "  DEVBITS  ,The number of DeviceID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
NEWLINE
bitfld.quad 0x00 8.--12. "  ID_BITS  ,The number of EventID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.quad 0x00 4.--7. "  ITT_ENTRY_SIZE  ,The number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
NEWLINE
bitfld.quad 0x00 2. "  CCT  ,Cumulative Collection Tables" "0,1"
else
rgroup.quad 0x08++0x07
line.quad 0x00 "GITS_TYPER,ITS Type Register"
bitfld.quad 0x00 37. "  VMOVP  ,Indicates the form of the VMOVP command" "All ITSs,One ITS"
bitfld.quad 0x00 36. "  CIL  ,Collection ID Limit" "0,1"
NEWLINE
hexmask.quad.byte 0x00 24.--31. 1. "  HCC  ,Hardware Collection Count"
bitfld.quad 0x00 19. "  PTA  ,Indicates the format of the target address" "Not suppported,Supported"
NEWLINE
bitfld.quad 0x00 18. "  SEIS  ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not suppported,Supported"
bitfld.quad 0x00 13.--17. "  DEVBITS  ,The number of DeviceID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
NEWLINE
bitfld.quad 0x00 8.--12. "  ID_BITS  ,The number of EventID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.quad 0x00 4.--7. "  ITT_ENTRY_SIZE  ,The number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long 0x20++0x03
line.long 0x00 "GITS_FCTLR,Function Control Register"
bitfld.long 0x00 31. "  DCC  ,Disable Cache Conversion (DCC)." "Disabled,Enabled"
bitfld.long 0x00 30. "  PWE  ,Powerdown While Enabled. Request GITS_CTLR.Quiescent to indicate ITS is quiescent." "Disabled,Enabled"
NEWLINE
bitfld.long 0x00 18. "  IEC  ,Invalidate Event Cache." "Disabled,Enabled"
bitfld.long 0x00 17. "  IDC  ,Invalidate Device Cache." "Disabled,Enabled"
NEWLINE
bitfld.long 0x00 16. "  ICC  ,Invalidate Collection Cache." "Disabled,Enabled"
bitfld.long 0x00 9. "  QD  ,Q Deny. Indicates if Q-Channel requests are denied." "Not denied,Denied"
NEWLINE
bitfld.long 0x00 8. "  AEE  ,Access Error Enable. Indicates if reporting of slave access errors is enabled." "Disabled,Enabled"
hexmask.long.byte 0x00 4.--7. 1. "  CGO  ,One bit per clock gate. Indicates if full clock gating is active."
NEWLINE
bitfld.long 0x00 3. "  CEE  ,Command error enable." "Disabled,Enabled"
bitfld.long 0x00 2. "  UEE  ,Unmapped error enable. Indicates if unmapped interrupt errors are enabled" "Disabled,Enabled"
NEWLINE
bitfld.long 0x00 1. "  LTE  ,Latency tracking enable. Indicates if latency tracking of interrupts is enabled" "Disabled,Enabled"
bitfld.long 0x00 0. "  SIP  ,Scrub in progress. This bit is read and written by software. When a scrub is complete, the GIC clears the bit to 0." "Completed,In Progress"
group.quad 0x28++0x07
line.quad 0x00 "GITS_OPR,Operations Register"
bitfld.quad 0x00 60.--63. "  LOCKTYPE  ,Lock-Type. Supported lock types" "Track,Trial,ITS lock,ITS unlock,Track abort,?,LPI lock, LPI unlock, ITS unlock all,?,?,?,?,?,?,?"
hexmask.quad.long 0x00 32.--59. 1. "  DEVICEID  ,Device-ID. 0-maximum DeviceID supported."
NEWLINE
hexmask.quad.word 0x00 0.--15. 1. "  EVENTID  ,Event-ID. 8192-maximum EventID supported."
rgroup.quad 0x30++0x07
line.quad 0x00 "GITS_OPSR,Operation Status Register"
bitfld.quad 0x00 63. "  REQUESTCOMPLETE  ,Request to GITS_OPR completed." "In Progress,Completed"
bitfld.quad 0x00 62. "  REQUESTPASS  ,Request to GITS_OPR completed without error." "Not passed,Passed"
NEWLINE
bitfld.quad 0x00 61. "  REQUESTINPROGRESS  ,Translation in progress." "Completed,In Progress"
bitfld.quad 0x00 48. "  ENTRYLOCKED  ,Locked entry in cache corresponds to request." "Unlocked,Locked"
NEWLINE
hexmask.quad.word 0x00 32.--44. 1. "  TARGET  ,Target of interrupt requested."
hexmask.quad.word 0x00  0.--15. 1. "  PID  ,Physical ID of interrupt requested."
group.quad 0x80++0x07
line.quad 0x00 "GITS_CBASER,The command queue control register"
bitfld.quad 0x00 63. "  VALID  ,Indicates whether software has allocated memory for the command queue" "Not allocated,Allocated"
bitfld.quad 0x00 59.--61. "  INNERCACHE  ,Indicates the Inner Cacheability attributes of accesses to the command queue" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
NEWLINE
bitfld.quad 0x00 53.--55. "  OUTERCACHE  ,Indicates the Outer Cacheability attributes of accesses to the command queue" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
hexmask.quad 0x00 12.--51. 0x10 "  PHYSICAL_ADDRESS  ,Bits [51:12] of the base physical address of the command queue"
NEWLINE
bitfld.quad 0x00 10.--11. "  SHAREABILITY  ,Indicates the Shareability attributes of accesses to the command queue" "Non-shareable,Inner Shareable,Outer Shareable,?..."
hexmask.quad.byte 0x00 0.--7. 1. "  SIZE  ,The number of 4KB pages of physical memory allocated to the command queue minus one"
group.quad 0x88++0x7
line.quad 0x00 "GITS_CWRITER,The command queue write pointer"
hexmask.quad.word 0x00 5.--19. 0x20 "  OFFSET  ,Bits [19:5] of the offset from GITS_CBASER"
bitfld.quad 0x00 0. "  RETRY  ,Restarts the processing of commands by the ITS if it stalled because of a command error" "No effect,Restarted"
group.quad 0x90++0x07
line.quad 0x00 "GITS_CREADR,The command queue read pointer"
hexmask.quad.word 0x00 5.--19. 0x20 "  OFFSET  ,Bits [19:5] of the offset from GITS_CBASER"
bitfld.quad 0x00 0. "  STALLED  ,Reports whether the processing of commands is stalled because of a command error" "Not stalled,Stalled"
if (((per.q((COMP.BASE("GICD",-1.)+0x40000)+0x0100))&0x700000000000000)==0x00)
group.quad 0x100++0x07
line.quad 0x00 "GITS_BASER0,ITS table control register"
bitfld.quad 0x00 63. "  VALID  ,Indicates whether software has allocated memory for the translation table" "Not allocated,Allocated"
bitfld.quad 0x00 62. "  INDIRECT  ,This field indicates whether an implemented register specifies a single flat table or a two-level table where the first level contains a list of descriptors" "Single Level,Two Level"
NEWLINE
bitfld.quad 0x00 59.--61. "  INNERCACHE  ,Indicates the Inner Cacheability attributes of accesses to the table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
rbitfld.quad 0x00 56.--58. "  TYPE  ,Specifies the type of entity that requires entries in the corresponding translation table" "Unimplemented,Devices,Reserved,Reserved,Interrupt collections,?..."
NEWLINE
bitfld.quad 0x00 53.--55. "  OUTERCACHE  ,Indicates the Outer Cacheability attributes of accesses to the table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
rbitfld.quad 0x00 48.--52. "  ENTRY_SIZE  ,Specifies the number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
NEWLINE
hexmask.quad 0x00 12.--47. 1. "  PHYSICAL_ADDRESS  ,Physical Address"
bitfld.quad 0x00 10.--11. "  SHAREABILITY  ,Indicates the Shareability attributes of accesses to the table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
NEWLINE
bitfld.quad 0x00 8.--9. "  PAGE_SIZE  ,The size of page that the translation table uses" "4KB,16KB,64KB,?..."
else
group.quad 0x100++0x07
line.quad 0x00 "GITS_BASER0,ITS table control register"
bitfld.quad 0x00 63. "  VALID  ,Indicates whether software has allocated memory for the translation table" "Not allocated,Allocated"
bitfld.quad 0x00 62. "  INDIRECT  ,This field indicates whether an implemented register specifies a single flat table or a two-level table where the first level contains a list of descriptors" "Single Level,Two Level"
NEWLINE
bitfld.quad 0x00 59.--61. "  INNERCACHE  ,Indicates the Inner Cacheability attributes of accesses to the table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
rbitfld.quad 0x00 56.--58. "  TYPE  ,Specifies the type of entity that requires entries in the corresponding translation table" "Unimplemented,Devices,Reserved,Reserved,Interrupt collections,?..."
NEWLINE
bitfld.quad 0x00 53.--55. "  OUTERCACHE  ,Indicates the Outer Cacheability attributes of accesses to the table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
rbitfld.quad 0x00 48.--52. "  ENTRY_SIZE  ,Specifies the number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
NEWLINE
hexmask.quad 0x00 12.--47. 0x10 "  PHYSICAL_ADDRESS  ,Physical Address"
bitfld.quad 0x00 10.--11. "  SHAREABILITY  ,Indicates the Shareability attributes of accesses to the table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
NEWLINE
bitfld.quad 0x00 8.--9. "  PAGE_SIZE  ,The size of page that the translation table uses" "4KB,16KB,64KB,?..."
hexmask.quad.byte 0x00 0.--7. 1. "  SIZE  ,The number of pages of physical memory allocated to the table minus one"
endif
if (((per.q((COMP.BASE("GICD",-1.)+0x40000)+0x0108))&0x700000000000000)==0x00)
group.quad 0x108++0x07
line.quad 0x00 "GITS_BASER1,ITS table control register"
bitfld.quad 0x00 63. "  VALID  ,Indicates whether software has allocated memory for the translation table" "Not allocated,Allocated"
bitfld.quad 0x00 62. "  INDIRECT  ,This field indicates whether an implemented register specifies a single flat table or a two-level table where the first level contains a list of descriptors" "Single Level,Two Level"
NEWLINE
bitfld.quad 0x00 59.--61. "  INNERCACHE  ,Indicates the Inner Cacheability attributes of accesses to the table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
rbitfld.quad 0x00 56.--58. "  TYPE  ,Specifies the type of entity that requires entries in the corresponding translation table" "Unimplemented,Devices,Reserved,Reserved,Interrupt collections,?..."
NEWLINE
bitfld.quad 0x00 53.--55. "  OUTERCACHE  ,Indicates the Outer Cacheability attributes of accesses to the table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
rbitfld.quad 0x00 48.--52. "  ENTRY_SIZE  ,Specifies the number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
NEWLINE
hexmask.quad 0x00 12.--47. 1. "  PHYSICAL_ADDRESS  ,Physical Address"
bitfld.quad 0x00 10.--11. "  SHAREABILITY  ,Indicates the Shareability attributes of accesses to the table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
NEWLINE
bitfld.quad 0x00 8.--9. "  PAGE_SIZE  ,The size of page that the translation table uses" "4KB,16KB,64KB,?..."
else
group.quad 0x108++0x07
line.quad 0x00 "GITS_BASER1,ITS table control register"
bitfld.quad 0x00 63. "  VALID  ,Indicates whether software has allocated memory for the translation table" "Not allocated,Allocated"
bitfld.quad 0x00 62. "  INDIRECT  ,This field indicates whether an implemented register specifies a single flat table or a two-level table where the first level contains a list of descriptors" "Single Level,Two Level"
NEWLINE
bitfld.quad 0x00 59.--61. "  INNERCACHE  ,Indicates the Inner Cacheability attributes of accesses to the table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
rbitfld.quad 0x00 56.--58. "  TYPE  ,Specifies the type of entity that requires entries in the corresponding translation table" "Unimplemented,Devices,Reserved,Reserved,Interrupt collections,?..."
NEWLINE
bitfld.quad 0x00 53.--55. "  OUTERCACHE  ,Indicates the Outer Cacheability attributes of accesses to the table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
rbitfld.quad 0x00 48.--52. "  ENTRY_SIZE  ,Specifies the number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
NEWLINE
hexmask.quad 0x00 12.--47. 0x10 "  PHYSICAL_ADDRESS  ,Physical Address"
bitfld.quad 0x00 10.--11. "  SHAREABILITY  ,Indicates the Shareability attributes of accesses to the table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
NEWLINE
bitfld.quad 0x00 8.--9. "  PAGE_SIZE  ,The size of page that the translation table uses" "4KB,16KB,64KB,?..."
hexmask.quad.byte 0x00 0.--7. 1. "  SIZE  ,The number of pages of physical memory allocated to the table minus one"
endif
NEWLINE
rgroup.long 0xFFE0++0x03
line.long 0x00 "GITS_CFGID,Configuration ID Register"
hexmask.long.byte 0x00 0.--3. 1. "  ITSNUMBER  ,Returns the ITS block ID. The its_id[7:0] tie-off signal controls the ID value. Each ITS block must have a unique ID."
rgroup.long 0xFFE0++0x03
line.long 0x00 "GITS_PIDR0,Peripheral ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. "  PART_0  ,Part number[7:0]"
rgroup.long 0xFFE4++0x03
line.long 0x00 "GITS_PIDR1,Peripheral ID1 Register"
bitfld.long 0x00 4.--7. "  DES_1  ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "  PART_1  ,         Part number[11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFE8++0x03
line.long 0x00 "GITS_PIDR2,Peripheral ID2 Register"
bitfld.long 0x00 4.--7. "  ARCHREV  ,Identifies the version of the GIC architecture with which the GIC-600 complies." "Reserved,Reserved,Reserved,v3.0,?..."
bitfld.long 0x00 3. "  JEDEC  ,Indicates that a JEDEC-assigned JEP106 identity code is used." "Low,High"
NEWLINE
bitfld.long 0x00 0.--2. "  DES_1  ,JEP106 identity code [6:4]. Bits[3:0] of the JEP106 identity code are assigned to GITS_PIDR1." "0,1,2,3,4,5,6,7"
rgroup.long 0xFFEC++0x03
line.long 0x00 "GITS_PIDR3,Peripheral ID3 Register"
bitfld.long 0x00 4.--7. "  REVAND  ,Manufacturer defined revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "  CMOD  ,Indicates if the customer has modified the behavior of the component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFD0++0x03
line.long 0x00 "GITS_PIDR4,Peripheral ID4 Register"
bitfld.long 0x00 4.--7. "  SIZE  ,64 KB software visible page" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "  DES_2  ,ARM implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0xFFD4++0x03
hide.long 0x00 "GITS_PIDR5,Peripheral ID5 Register"
hgroup.long 0xFFD8++0x03
hide.long 0x00 "GITS_PIDR6,Peripheral ID6 Register"
hgroup.long 0xFFDC++0x03
hide.long 0x00 "GITS_PIDR7,Peripheral ID7 Register"
rgroup.long 0xFFF0++0x03
line.long 0x00 "GITS_CIDR0,Component ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. "  FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF4++0x03
line.long 0x00 "GITS_CIDR1,Component ID1 Register"
hexmask.long.byte 0x00 0.--7. 1. "  FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF8++0x03
line.long 0x00 "GITS_CIDR2,Component ID2 Register"
hexmask.long.byte 0x00 0.--7. 1. "  FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFFC++0x03
line.long 0x00 "GITS_CIDR3,Component ID3 Register"
hexmask.long.byte 0x00 0.--7. 1. "  FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
NEWLINE
base (COMP.BASE("GICD",-1.)+0x40000)+0x10000
if (((per.l((COMP.BASE("GICD",-1.)+0x40000)))&0x01)==0x01)
wgroup.long 0x40++0x03
line.long 0x00 "GITS_TRANSLATER,ITS Translation Register"
else
hgroup.long 0x40++0x03
hide.long 0x00 "GITS_TRANSLATER,ITS Translation Register"
endif
tree.end
AUTOINDENT.OFF
base COMP.BASE("GICR",-1.)
AUTOINDENT.ON CENTER TREE
tree "Redistributor Interface"
tree "Control Registers"
if (((per.q(COMP.BASE("GICR",-1.)+0x08))&0x21)==0x21)
group.long 0x0000++0x03
line.long 0x00 "GICR_CTLR,Redistributor Control Register"
rbitfld.long 0x00 31. "         UWP       ,Upstream Write Pending. Indicates whether all upstream writes have been communicated to the Distributor" "Not pending,Pending"
bitfld.long 0x00 26. "       DPG1S          ,Disable Processor selection for Group 1 Secure interrupts" "No,Yes"
NEWLINE
bitfld.long 0x00 25. "             DPG1NS           ,Disable Processor selection for Group 1 Non-secure interrupts" "No,Yes"
bitfld.long 0x00 24. " DPG0      ,Disable Processor selection for Group 0 interrupts" "No,Yes"
NEWLINE
bitfld.long 0x00 3. "               RWP            ,Register Write Pending. Indicates whether a register write for the current Security state is in progress or not" "Not pending,Pending"
bitfld.long 0x00 0. "     ENABLE_LPIS      ,Enables LPIs in implementations where affinity routing is enabled for Security state" "Disabled,Enabled"
elif (((per.q(COMP.BASE("GICR",-1.)+0x08))&0x21)==0x20)
group.long 0x0000++0x03
line.long 0x00 "GICR_CTLR,Redistributor Control Register"
rbitfld.long 0x00 31. "         UWP       ,Upstream Write Pending. Indicates whether all upstream writes have been communicated to the Distributor" "Not pending,Pending"
bitfld.long 0x00 26. "       DPG1S          ,Disable Processor selection for Group 1 Secure interrupts" "No,Yes"
NEWLINE
bitfld.long 0x00 25. "             DPG1NS           ,Disable Processor selection for Group 1 Non-secure interrupts" "No,Yes"
bitfld.long 0x00 24. " DPG0      ,Disable Processor selection for Group 0 interrupts" "No,Yes"
NEWLINE
bitfld.long 0x00 3. "               RWP            ,Register Write Pending. Indicates whether a register write for the current Security state is in progress or not" "Not pending,Pending"
elif (((per.q(COMP.BASE("GICR",-1.)+0x08))&0x21)==0x01)
group.long 0x0000++0x03
line.long 0x00 "GICR_CTLR,Redistributor Control Register"
rbitfld.long 0x00 31. "         UWP       ,Upstream Write Pending. Indicates whether all upstream writes have been communicated to the Distributor" "Not pending,Pending"
bitfld.long 0x00 3. "       RWP            ,Register Write Pending. Indicates whether a register write for the current Security state is in progress or not" "Not pending,Pending"
NEWLINE
bitfld.long 0x00 0. "     ENABLE_LPIS      ,Enables LPIs in implementations where affinity routing is enabled for Security state" "Disabled,Enabled"
else
group.long 0x0000++0x03
line.long 0x00 "GICR_CTLR,Redistributor Control Register"
rbitfld.long 0x00 31. "         UWP       ,Upstream Write Pending. Indicates whether all upstream writes have been communicated to the Distributor" "Not pending,Pending"
bitfld.long 0x00 3. "       RWP            ,Register Write Pending. Indicates whether a register write for the current Security state is in progress or not" "Not pending,Pending"
endif
rgroup.long 0x0004++0x03
line.long 0x00 "GICR_IIDR,Distributor Implementer Identification Register"
bitfld.long 0x00 24.--31. "         PRODID    ,Indicates the product ID" "GIC-500,?,GIC-600,?..."
bitfld.long 0x00 16.--19. "           VAR            ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
NEWLINE
bitfld.long 0x00 12.--15. " REV       ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "                IMP            ,Implementer"
rgroup.quad 0x0008++0x07
line.quad 0x00 "GICR_TYPER,Interrupt Controller Type Register"
hexmask.quad.byte 0x00 56.--63. 1. " AFF3      ,Affinity level 3 value for the Redistributor"
hexmask.quad.byte 0x00 48.--55. 1. "                AFF2           ,Affinity level 2 value for the Redistributor"
NEWLINE
hexmask.quad.byte 0x00 40.--47. 1. "              AFF1             ,Affinity level 1 value for the Redistributor"
hexmask.quad.byte 0x00 32.--39. 1. " AFF0      ,Affinity level 0 value for the Redistributor"
NEWLINE
bitfld.quad 0x00 24.--25. "                COMMONLPIAFF   ,The affinity level at which Redistributors share a LPI Configuration table" "Single Core CFG,Chip by AF3, Chip by AF2, Reserved"
hexmask.quad.word 0x00 8.--23. 1. "  PROCESSOR_NUMBER ,A unique identifier for the PE"
NEWLINE
bitfld.quad 0x00 5. " DPGS      ,Sets support for GICR_CTLR.DPG* bits" "Not supported,Supported"
bitfld.quad 0x00 4. "     LAST           ,Indicates whether this Redistributor is the highest-numbered Redistributor in a series of contiguous Redistributor pages" "Not highest,Highest"
NEWLINE
bitfld.quad 0x00 3. "     DIRECTLPI        ,Indicates whether this Redistributor supports direct injection of LPIs" "Not supported,Supported"
bitfld.quad 0x00 0. " PLPIS     ,Indicates whether the GIC implementation supports physical LPIs" "Not supported,Supported"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)||((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICR",-1.)+0x0014))))
group.long 0x0014++0x03
line.long 0x00 "GICR_WAKER,Power Management Control Register"
bitfld.long 0x00 31. "         QUIESCENT ,This bit shows that the GIC-600 is idle and can be powered down if required" "Not quiescent,Quiescent"
bitfld.long 0x00 2. "     CHILDRENASLEEP ,Indicates the bus between the CPU interface and this Redistributor is quiescent" "Not quiescent,Quiescent"
NEWLINE
bitfld.long 0x00 1. "   PROCESSORASLEEP  ,Indicates if this Redistributor must assert a WakeRequest if there is a pending interrupt targeted at the connected core" "No,Yes"
bitfld.long 0x00 0. " SLEEP     ,Indicates if GIC-600 ensures that all the caches are consistent with external memory and that it is safe to power off" "No,Yes"
NEWLINE
else
hgroup.long 0x0014++0x03
hide.long 0x00 "GICR_WAKER,Power Management Control Register"
endif
group.long 0x0020++0x03
line.long 0x00 "GICR_FCTLR,Function Control Register"
bitfld.long 0x00 31. " QD        ,Q Deny. Indicates if Q-Channel requests are denied." "Not denied,Denied"
hexmask.long.byte 0x00 4.--6. 1. "           CGO        ,One bit per clock gate. Indicates if full clock gating is active."
NEWLINE
bitfld.long 0x00 0. "             SIP        ,Scrub in progress. This bit is read and written by software. When a scrub is complete, the GIC clears the bit to 0." "Completed,In Progress"
group.long 0x0024++0x03
line.long 0x00 "GICR_PWRR,Power Register"
hexmask.long.byte 0x00 16.--23. 1. " RDG    ,RDGroup. This read-only field indicates the number of the current Redistributor. Must be packed from 0."
hexmask.long.byte 0x00  8.--15. 1. "    RDGO    ,RDGroupOffset.This read-only field indicates the offset of the current core that is connected to the current Redistributor. Must be packed from 0 but does not necessarily map to a single cluster because the AXI4-Stream bus can be subdivided."
NEWLINE
rbitfld.long 0x00 3. "       RDGPO      ,RDGroupPoweredOff. This read-only bit indicates if group is powered and accessable or if it can be powered down" "Powered,Not powered"
rbitfld.long 0x00 2. " RDGPD      ,RDGroupPowerDown. This read-only bit indicates the intentional power state of the Redistributor. The Redistributor has reached its intentional power state when RDGPD = RDGPO." "Powered,Not powered"
NEWLINE
eventfld.long  0x00 1. "    RDAG      ,RDApplyGroup. This write-only bit applies the RDPD value to all Redistributors in the group. If the RDPD value cannot be applied to all cores in the group, then the GIC ignores this request." "-,Apply"
bitfld.long  0x00 0. "    RDPD      ,RDPowerDown. Writes to 1 ignored if GICR_WAKER.ProcessorSleep != 1. Writes ignored if RDGPD != RDGPO and changing to not match RDGPD. If all other cores have RDPD == 1, then setting this bit to 1 also sets RDGPD = 1." "Powered,Not powered"
group.long 0x0028++0x03
line.long 0x00 "GICR_CLASS,Class Register"
bitfld.long 0x00 0. " CLASS    ,Interrupt class." "0,1"
group.quad 0x070++0x07
line.quad 0x00 "GICR_PROPBASER,Common LPI configuration table base register"
bitfld.quad 0x00 56.--58. " OUTERCACHE       ,Indicates the Outer Cacheability attributes of accesses to the LPI Configuration table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
hexmask.quad 0x00 12.--51. 0x10 "  PHYSICAL_ADDRESS ,Bits [51:12] of the physical address containing the LPI Configuration table"
NEWLINE
bitfld.quad 0x00 10.--11. " SHAREABILITY     ,Indicates the Shareability attributes of accesses to the LPI Configuration table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
bitfld.quad 0x00 7.--9. "                  INNERCACHE       ,Indicates the Inner Cacheability attributes of accesses to the LPI Configuration table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
NEWLINE
bitfld.quad 0x00 0.--4. " IDBITS           ,The number of bits of LPI INTID supported minus one by the LPI Configuration table starting at Physical_Address"
group.quad 0x78++0x07
line.long 0x00 "GICR_PENDBASER,LPI pending table base register"
bitfld.quad 0x00 62. "         PTZ              ,Pending Table Zero" "Not zero,Zero" 
bitfld.quad 0x00 56.--58. "                         OUTERCACHE       ,Indicates the Outer Cacheability attributes of accesses to the LPI Pending table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
NEWLINE
hexmask.quad 0x00 16.--51. 0x10 " PHYSICAL_ADDRESS ,Bits [51:16] of the physical address containing the LPI Pending table"
bitfld.quad 0x00 10.--11. "                 SHAREABILITY     ,Indicates the Shareability attributes of accesses to the LPI Pending table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
NEWLINE
bitfld.quad 0x00 7.--9. " INNERCACHE       ,Indicates the Inner Cacheability attributes of accesses to the LPI Pending table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
NEWLINE
tree.end
tree "SGI and PPI Registers"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICR",-1.)+0x10080))
group.long 0x10080++0x03
line.long 0x0 "GICR_IGROUPR0,Interrupt Group Register 0"
bitfld.long 0x00 31. "         GSB31 ,Group Status Bit 31" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB30 ,Group Status Bit 30" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 29. "  GSB29 ,Group Status Bit 29" "Secure,Non-secure Group 1"
bitfld.long 0x00 28. "         GSB28 ,Group Status Bit 28" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 27. "  GSB27 ,Group Status Bit 27" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB26 ,Group Status Bit 26" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 25. "         GSB25 ,Group Status Bit 25" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB24 ,Group Status Bit 24" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 23. "  GSB23 ,Group Status Bit 23" "Secure,Non-secure Group 1"
bitfld.long 0x00 22. "         GSB22 ,Group Status Bit 22" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 21. "  GSB21 ,Group Status Bit 21" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB20 ,Group Status Bit 20" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 19. "         GSB19 ,Group Status Bit 19" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB18 ,Group Status Bit 18" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 17. "  GSB17 ,Group Status Bit 17" "Secure,Non-secure Group 1"
bitfld.long 0x00 16. "         GSB16 ,Group Status Bit 16" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 15. "  GSB15 ,Group Status Bit 15" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB14 ,Group Status Bit 14" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 13. "         GSB13 ,Group Status Bit 13" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB12 ,Group Status Bit 12" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 11. "  GSB11 ,Group Status Bit 11" "Secure,Non-secure Group 1"
bitfld.long 0x00 10. "         GSB10 ,Group Status Bit 10" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 9. "  GSB9  ,Group Status Bit 9" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB8  ,Group Status Bit 8" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 7. "         GSB7  ,Group Status Bit 7" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB6  ,Group Status Bit 6" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 5. "  GSB5  ,Group Status Bit 5" "Secure,Non-secure Group 1"
bitfld.long 0x00 4. "         GSB4  ,Group Status Bit 4" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 3. "  GSB3  ,Group Status Bit 3" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB2  ,Group Status Bit 2" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 1. "         GSB1  ,Group Status Bit 1" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB0  ,Group Status Bit 0" "Secure,Non-secure Group 1"
elif (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x000)
group.long 0x10080++0x03
line.long 0x0 "GICR_IGROUPR0,Interrupt Group Register 0"
bitfld.long 0x00 31. "         GSB31 ,Group Status Bit 31" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB30 ,Group Status Bit 30" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 29. "             GSB29 ,Group Status Bit 29" "Group 0,Group 1"
bitfld.long 0x00 28. "         GSB28 ,Group Status Bit 28" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 27. "             GSB27 ,Group Status Bit 27" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB26 ,Group Status Bit 26" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 25. "         GSB25 ,Group Status Bit 25" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB24 ,Group Status Bit 24" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 23. "             GSB23 ,Group Status Bit 23" "Group 0,Group 1"
bitfld.long 0x00 22. "         GSB22 ,Group Status Bit 22" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 21. "             GSB21 ,Group Status Bit 21" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB20 ,Group Status Bit 20" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 19. "         GSB19 ,Group Status Bit 19" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB18 ,Group Status Bit 18" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 17. "             GSB17 ,Group Status Bit 17" "Group 0,Group 1"
bitfld.long 0x00 16. "         GSB16 ,Group Status Bit 16" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 15. "             GSB15 ,Group Status Bit 15" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB14 ,Group Status Bit 14" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 13. "         GSB13 ,Group Status Bit 13" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB12 ,Group Status Bit 12" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 11. "             GSB11 ,Group Status Bit 11" "Group 0,Group 1"
bitfld.long 0x00 10. "         GSB10 ,Group Status Bit 10" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 9. "             GSB9  ,Group Status Bit 9" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB8  ,Group Status Bit 8" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 7. "         GSB7  ,Group Status Bit 7" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB6  ,Group Status Bit 6" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 5. "             GSB5  ,Group Status Bit 5" "Group 0,Group 1"
bitfld.long 0x00 4. "         GSB4  ,Group Status Bit 4" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 3. "             GSB3  ,Group Status Bit 3" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB2  ,Group Status Bit 2" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 1. "         GSB1  ,Group Status Bit 1" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB0  ,Group Status Bit 0" "Group 0,Group 1"
else
hgroup.long 0x10080++0x03
hide.long 0x00 "GICR_IGROUPR0,Interrupt Group Register 0"
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
endif
NEWLINE
width 24.
group.long 0x10100++0x03
line.long 0x0 "GICR_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "  SET/CLRENB31    ,Set/Clear Enable Bit 31" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRENB30    ,Set/Clear Enable Bit 30" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRENB29    ,Set/Clear Enable Bit 29" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  SET/CLRENB28    ,Set/Clear Enable Bit 28" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRENB27    ,Set/Clear Enable Bit 27" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRENB26    ,Set/Clear Enable Bit 26" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 25. 0x00 25. 0x80 25. "  SET/CLRENB25    ,Set/Clear Enable Bit 25" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRENB24    ,Set/Clear Enable Bit 24" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRENB23    ,Set/Clear Enable Bit 23" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  SET/CLRENB22    ,Set/Clear Enable Bit 22" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRENB21    ,Set/Clear Enable Bit 21" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRENB20    ,Set/Clear Enable Bit 20" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 19. 0x00 19. 0x80 19. "  SET/CLRENB19    ,Set/Clear Enable Bit 19" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRENB18    ,Set/Clear Enable Bit 18" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRENB17    ,Set/Clear Enable Bit 17" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  SET/CLRENB16    ,Set/Clear Enable Bit 16" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRENB15    ,Set/Clear Enable Bit 15" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRENB14    ,Set/Clear Enable Bit 14" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 13. 0x00 13. 0x80 13. "  SET/CLRENB13    ,Set/Clear Enable Bit 13" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRENB12    ,Set/Clear Enable Bit 12" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRENB11    ,Set/Clear Enable Bit 11" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  SET/CLRENB10    ,Set/Clear Enable Bit 10" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRENB9     ,Set/Clear Enable Bit 9" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRENB8     ,Set/Clear Enable Bit 8" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 7. 0x00 7. 0x80 7. "  SET/CLRENB7     ,Set/Clear Enable Bit 7" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRENB6     ,Set/Clear Enable Bit 6" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRENB5     ,Set/Clear Enable Bit 5" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  SET/CLRENB4     ,Set/Clear Enable Bit 4" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRENB3     ,Set/Clear Enable Bit 3" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRENB2     ,Set/Clear Enable Bit 2" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 1. 0x00 1. 0x80 1. "  SET/CLRENB1     ,Set/Clear Enable Bit 1" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRENB0     ,Set/Clear Enable Bit 0" "Disabled,Enabled"
group.long 0x10200++0x03
line.long 0x0 "GICR_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "  SET/CLRPEND31   ,Set/Clear Pending Bit 31" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRPEND30   ,Set/Clear Pending Bit 30" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRPEND29   ,Set/Clear Pending Bit 29" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  SET/CLRPEND28   ,Set/Clear Pending Bit 28" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRPEND27   ,Set/Clear Pending Bit 27" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRPEND26   ,Set/Clear Pending Bit 26" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 25. 0x00 25. 0x80 25. "  SET/CLRPEND25   ,Set/Clear Pending Bit 25" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRPEND24   ,Set/Clear Pending Bit 24" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRPEND23   ,Set/Clear Pending Bit 23" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  SET/CLRPEND22   ,Set/Clear Pending Bit 22" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRPEND21   ,Set/Clear Pending Bit 21" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRPEND20   ,Set/Clear Pending Bit 20" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 19. 0x00 19. 0x80 19. "  SET/CLRPEND19   ,Set/Clear Pending Bit 19" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRPEND18   ,Set/Clear Pending Bit 18" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRPEND17   ,Set/Clear Pending Bit 17" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  SET/CLRPEND16   ,Set/Clear Pending Bit 16" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRPEND15   ,Set/Clear Pending Bit 15" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRPEND14   ,Set/Clear Pending Bit 14" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 13. 0x00 13. 0x80 13. "  SET/CLRPEND13   ,Set/Clear Pending Bit 13" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRPEND12   ,Set/Clear Pending Bit 12" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRPEND11   ,Set/Clear Pending Bit 11" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  SET/CLRPEND10   ,Set/Clear Pending Bit 10" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRPEND9    ,Set/Clear Pending Bit 9" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRPEND8    ,Set/Clear Pending Bit 8" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 7. 0x00 7. 0x80 7. "  SET/CLRPEND7    ,Set/Clear Pending Bit 7" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRPEND6    ,Set/Clear Pending Bit 6" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRPEND5    ,Set/Clear Pending Bit 5" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  SET/CLRPEND4    ,Set/Clear Pending Bit 4" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRPEND3    ,Set/Clear Pending Bit 3" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRPEND2    ,Set/Clear Pending Bit 2" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 1. 0x00 1. 0x80 1. "  SET/CLRPEND1    ,Set/Clear Pending Bit 1" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRPEND0    ,Set/Clear Pending Bit 0" "Not pending,Pending"
group.long 0x10300++0x03
line.long 0x0 "GICR_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "  SET/CLRACTIVE31 ,Set/Clear Active Bit 31" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE30 ,Set/Clear Active Bit 30" "Not active,Active"
NEWLINE
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE29 ,Set/Clear Active Bit 29" "Not active,Active"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  SET/CLRACTIVE28 ,Set/Clear Active Bit 28" "Not active,Active"
NEWLINE
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE27 ,Set/Clear Active Bit 27" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE26 ,Set/Clear Active Bit 26" "Not active,Active"
NEWLINE
setclrfld.long 0x00 25. 0x00 25. 0x80 25. "  SET/CLRACTIVE25 ,Set/Clear Active Bit 25" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE24 ,Set/Clear Active Bit 24" "Not active,Active"
NEWLINE
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE23 ,Set/Clear Active Bit 23" "Not active,Active"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  SET/CLRACTIVE22 ,Set/Clear Active Bit 22" "Not active,Active"
NEWLINE
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE21 ,Set/Clear Active Bit 21" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE20 ,Set/Clear Active Bit 20" "Not active,Active"
NEWLINE
setclrfld.long 0x00 19. 0x00 19. 0x80 19. "  SET/CLRACTIVE19 ,Set/Clear Active Bit 19" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE18 ,Set/Clear Active Bit 18" "Not active,Active"
NEWLINE
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE17 ,Set/Clear Active Bit 17" "Not active,Active"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  SET/CLRACTIVE16 ,Set/Clear Active Bit 16" "Not active,Active"
NEWLINE
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE15 ,Set/Clear Active Bit 15" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE14 ,Set/Clear Active Bit 14" "Not active,Active"
NEWLINE
setclrfld.long 0x00 13. 0x00 13. 0x80 13. "  SET/CLRACTIVE13 ,Set/Clear Active Bit 13" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE12 ,Set/Clear Active Bit 12" "Not active,Active"
NEWLINE
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE11 ,Set/Clear Active Bit 11" "Not active,Active"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  SET/CLRACTIVE10 ,Set/Clear Active Bit 10" "Not active,Active"
NEWLINE
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE9  ,Set/Clear Active Bit 9" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE8  ,Set/Clear Active Bit 8" "Not active,Active"
NEWLINE
setclrfld.long 0x00 7. 0x00 7. 0x80 7. "  SET/CLRACTIVE7  ,Set/Clear Active Bit 7" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE6  ,Set/Clear Active Bit 6" "Not active,Active"
NEWLINE
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE5  ,Set/Clear Active Bit 5" "Not active,Active"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  SET/CLRACTIVE4  ,Set/Clear Active Bit 4" "Not active,Active"
NEWLINE
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE3  ,Set/Clear Active Bit 3" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE2  ,Set/Clear Active Bit 2" "Not active,Active"
NEWLINE
setclrfld.long 0x00 1. 0x00 1. 0x80 1. "  SET/CLRACTIVE1  ,Set/Clear Active Bit 1" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE0  ,Set/Clear Active Bit 0" "Not active,Active"
NEWLINE
width 18.
group.long 0x10400++0x03
line.long 0x00 "GICR_IPRIORITYR0,Interrupt Priority Register 0"
hexmask.long.byte 0x00 24.--31. 1. " INTID3    ,Interrupt ID3    Priority/Priority Byte Offset 3   "
hexmask.long.byte 0x00 16.--23. 1. "     INTID2    ,Interrupt ID2    Priority/Priority Byte Offset 2   "
NEWLINE
hexmask.long.byte 0x00 8.--15. 1. "     INTID1    ,Interrupt ID1    Priority/Priority Byte Offset 1   "
hexmask.long.byte 0x00 0.--7. 1. "     INTID0    ,Interrupt ID0    Priority/Priority Byte Offset 0   "
group.long 0x10404++0x03
line.long 0x00 "GICR_IPRIORITYR1,Interrupt Priority Register 1"
hexmask.long.byte 0x00 24.--31. 1. " INTID7    ,Interrupt ID7    Priority/Priority Byte Offset 7   "
hexmask.long.byte 0x00 16.--23. 1. "     INTID6    ,Interrupt ID6    Priority/Priority Byte Offset 6   "
NEWLINE
hexmask.long.byte 0x00 8.--15. 1. "     INTID5    ,Interrupt ID5    Priority/Priority Byte Offset 5   "
hexmask.long.byte 0x00 0.--7. 1. "     INTID4    ,Interrupt ID4    Priority/Priority Byte Offset 4   "
group.long 0x10408++0x03
line.long 0x00 "GICR_IPRIORITYR2,Interrupt Priority Register 2"
hexmask.long.byte 0x00 24.--31. 1. " INTID11   ,Interrupt ID11   Priority/Priority Byte Offset 11  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID10   ,Interrupt ID10   Priority/Priority Byte Offset 10  "
NEWLINE
hexmask.long.byte 0x00 8.--15. 1. "     INTID9    ,Interrupt ID9    Priority/Priority Byte Offset 9   "
hexmask.long.byte 0x00 0.--7. 1. "     INTID8    ,Interrupt ID8    Priority/Priority Byte Offset 8   "
group.long 0x1040C++0x03
line.long 0x00 "GICR_IPRIORITYR3,Interrupt Priority Register 3"
hexmask.long.byte 0x00 24.--31. 1. " INTID15   ,Interrupt ID15   Priority/Priority Byte Offset 15  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID14   ,Interrupt ID14   Priority/Priority Byte Offset 14  "
NEWLINE
hexmask.long.byte 0x00 8.--15. 1. "     INTID13   ,Interrupt ID13   Priority/Priority Byte Offset 13  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID12   ,Interrupt ID12   Priority/Priority Byte Offset 12  "
group.long 0x10410++0x03
line.long 0x00 "GICR_IPRIORITYR4,Interrupt Priority Register 4"
hexmask.long.byte 0x00 24.--31. 1. " INTID19   ,Interrupt ID19   Priority/Priority Byte Offset 19  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID18   ,Interrupt ID18   Priority/Priority Byte Offset 18  "
NEWLINE
hexmask.long.byte 0x00 8.--15. 1. "     INTID17   ,Interrupt ID17   Priority/Priority Byte Offset 17  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID16   ,Interrupt ID16   Priority/Priority Byte Offset 16  "
group.long 0x10414++0x03
line.long 0x00 "GICR_IPRIORITYR5,Interrupt Priority Register 5"
hexmask.long.byte 0x00 24.--31. 1. " INTID23   ,Interrupt ID23   Priority/Priority Byte Offset 23  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID22   ,Interrupt ID22   Priority/Priority Byte Offset 22  "
NEWLINE
hexmask.long.byte 0x00 8.--15. 1. "     INTID21   ,Interrupt ID21   Priority/Priority Byte Offset 21  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID20   ,Interrupt ID20   Priority/Priority Byte Offset 20  "
group.long 0x10418++0x03
line.long 0x00 "GICR_IPRIORITYR6,Interrupt Priority Register 6"
hexmask.long.byte 0x00 24.--31. 1. " INTID27   ,Interrupt ID27   Priority/Priority Byte Offset 27  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID26   ,Interrupt ID26   Priority/Priority Byte Offset 26  "
NEWLINE
hexmask.long.byte 0x00 8.--15. 1. "     INTID25   ,Interrupt ID25   Priority/Priority Byte Offset 25  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID24   ,Interrupt ID24   Priority/Priority Byte Offset 24  "
group.long 0x1041C++0x03
line.long 0x00 "GICR_IPRIORITYR7,Interrupt Priority Register 7"
hexmask.long.byte 0x00 24.--31. 1. " INTID31   ,Interrupt ID31   Priority/Priority Byte Offset 31  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID30   ,Interrupt ID30   Priority/Priority Byte Offset 30  "
NEWLINE
hexmask.long.byte 0x00 8.--15. 1. "     INTID29   ,Interrupt ID29   Priority/Priority Byte Offset 29  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID28   ,Interrupt ID28   Priority/Priority Byte Offset 28  "
NEWLINE
rgroup.long 0x10C00++0x03
line.long 0x00 "GICR_ICFGR0,Interrupt Configuration Register"
bitfld.long 0x00 31. " ICF15   ,Interrupt Configuration 15 (SGI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14   ,Interrupt Configuration 14 (SGI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 27. "  ICF13   ,Interrupt Configuration 13 (SGI)" "Level,Edge"
bitfld.long 0x00 25. " ICF12   ,Interrupt Configuration 12 (SGI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 23. "  ICF11   ,Interrupt Configuration 11 (SGI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10   ,Interrupt Configuration 10 (SGI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 19. " ICF9    ,Interrupt Configuration 9 (SGI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8    ,Interrupt Configuration 8 (SGI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 15. "  ICF7    ,Interrupt Configuration 7 (SGI)" "Level,Edge"
bitfld.long 0x00 13. " ICF6    ,Interrupt Configuration 6 (SGI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 11. "  ICF5    ,Interrupt Configuration 5 (SGI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4    ,Interrupt Configuration 4 (SGI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 7. " ICF3    ,Interrupt Configuration 3 (SGI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2    ,Interrupt Configuration 2 (SGI)" "Level,Edge"
group.long 0x10C04++0x03
line.long 0x00 "GICR_ICFGR1,Interrupt Configuration Register"
bitfld.long 0x00 31. " ICF15   ,Interrupt Configuration 15 (PPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14   ,Interrupt Configuration 14 (PPI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 27. "  ICF13   ,Interrupt Configuration 13 (PPI)" "Level,Edge"
bitfld.long 0x00 25. " ICF12   ,Interrupt Configuration 12 (PPI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 23. "  ICF11   ,Interrupt Configuration 11 (PPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10   ,Interrupt Configuration 10 (PPI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 19. " ICF9    ,Interrupt Configuration 9 (PPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8    ,Interrupt Configuration 8 (PPI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 15. "  ICF7    ,Interrupt Configuration 7 (PPI)" "Level,Edge"
bitfld.long 0x00 13. " ICF6    ,Interrupt Configuration 6 (PPI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 11. "  ICF5    ,Interrupt Configuration 5 (PPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4    ,Interrupt Configuration 4 (PPI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 7. " ICF3    ,Interrupt Configuration 3 (PPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2    ,Interrupt Configuration 2 (PPI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 3. "  ICF1    ,Interrupt Configuration 1 (PPI)" "Level,Edge"
NEWLINE
width 18.
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICR",-1.)+0x10D00))
group.long 0x10D00++0x03
line.long 0x0 "GICR_IGRPMODR0,Interrupt Group Modifier Register 0"
bitfld.long 0x00 31. " GMB31 ,Group Modifier Bit 31" "0,1"
bitfld.long 0x00 30. "  GMB30 ,Group Modifier Bit 30" "0,1"
NEWLINE
bitfld.long 0x00 29. "  GMB29 ,Group Modifier Bit 29" "0,1"
bitfld.long 0x00 28. " GMB28 ,Group Modifier Bit 28" "0,1"
NEWLINE
bitfld.long 0x00 27. "  GMB27 ,Group Modifier Bit 27" "0,1"
bitfld.long 0x00 26. "  GMB26 ,Group Modifier Bit 26" "0,1"
NEWLINE
bitfld.long 0x00 25. " GMB25 ,Group Modifier Bit 25" "0,1"
bitfld.long 0x00 24. "  GMB24 ,Group Modifier Bit 24" "0,1"
NEWLINE
bitfld.long 0x00 23. "  GMB23 ,Group Modifier Bit 23" "0,1"
bitfld.long 0x00 22. " GMB22 ,Group Modifier Bit 22" "0,1"
NEWLINE
bitfld.long 0x00 21. "  GMB21 ,Group Modifier Bit 21" "0,1"
bitfld.long 0x00 20. "  GMB20 ,Group Modifier Bit 20" "0,1"
NEWLINE
bitfld.long 0x00 19. " GMB19 ,Group Modifier Bit 19" "0,1"
bitfld.long 0x00 18. "  GMB18 ,Group Modifier Bit 18" "0,1"
NEWLINE
bitfld.long 0x00 17. "  GMB17 ,Group Modifier Bit 17" "0,1"
bitfld.long 0x00 16. " GMB16 ,Group Modifier Bit 16" "0,1"
NEWLINE
bitfld.long 0x00 15. "  GMB15 ,Group Modifier Bit 15" "0,1"
bitfld.long 0x00 14. "  GMB14 ,Group Modifier Bit 14" "0,1"
NEWLINE
bitfld.long 0x00 13. " GMB13 ,Group Modifier Bit 13" "0,1"
bitfld.long 0x00 12. "  GMB12 ,Group Modifier Bit 12" "0,1"
NEWLINE
bitfld.long 0x00 11. "  GMB11 ,Group Modifier Bit 11" "0,1"
bitfld.long 0x00 10. " GMB10 ,Group Modifier Bit 10" "0,1"
NEWLINE
bitfld.long 0x00 9. "  GMB9  ,Group Modifier Bit 9" "0,1"
bitfld.long 0x00 8. "  GMB8  ,Group Modifier Bit 8" "0,1"
NEWLINE
bitfld.long 0x00 7. " GMB7  ,Group Modifier Bit 7" "0,1"
bitfld.long 0x00 6. "  GMB6  ,Group Modifier Bit 6" "0,1"
NEWLINE
bitfld.long 0x00 5. "  GMB5  ,Group Modifier Bit 5" "0,1"
bitfld.long 0x00 4. " GMB4  ,Group Modifier Bit 4" "0,1"
NEWLINE
bitfld.long 0x00 3. "  GMB3  ,Group Modifier Bit 3" "0,1"
bitfld.long 0x00 2. "  GMB2  ,Group Modifier Bit 2" "0,1"
NEWLINE
bitfld.long 0x00 1. " GMB1  ,Group Modifier Bit 1" "0,1"
bitfld.long 0x00 0. "  GMB0  ,Group Modifier Bit 0" "0,1"
NEWLINE
else
hgroup.long 0x10D00++0x03
hide.long 0x0 "GICR_IGRPMODR0,Interrupt Group Modifier Register 0"
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICR",-1.)+0x10E00))
group.long 0x10E00++0x03
line.long 0x00 "GICR_NSACR,Non-secure Access Control Register"
bitfld.long 0x00 30.--31. " NS_ACCESS15 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID15" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 28.--29. "  NS_ACCESS14 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID14" "No access,G0S,G0S/G1S,?..."
NEWLINE
bitfld.long 0x00 26.--27. "  NS_ACCESS13 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID13" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 24.--25. " NS_ACCESS12 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID12" "No access,G0S,G0S/G1S,?..."
NEWLINE
bitfld.long 0x00 22.--23. "  NS_ACCESS11 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID11" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 20.--21. "  NS_ACCESS10 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID10" "No access,G0S,G0S/G1S,?..."
NEWLINE
bitfld.long 0x00 18.--19. " NS_ACCESS9  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID9" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 16.--17. "  NS_ACCESS8  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID8" "No access,G0S,G0S/G1S,?..."
NEWLINE
bitfld.long 0x00 14.--15. "  NS_ACCESS7  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID7" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 12.--13. " NS_ACCESS6  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID6" "No access,G0S,G0S/G1S,?..."
NEWLINE
bitfld.long 0x00 10.--11. "  NS_ACCESS5  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID5" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 8.--9. "  NS_ACCESS4  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID4" "No access,G0S,G0S/G1S,?..."
NEWLINE
bitfld.long 0x00 6.--7. " NS_ACCESS3  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID3" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 4.--5. "  NS_ACCESS2  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID2" "No access,G0S,G0S/G1S,?..."
NEWLINE
bitfld.long 0x00 2.--3. "  NS_ACCESS1  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID1" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 0.--1. " NS_ACCESS0  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID0" "No access,G0S,G0S/G1S,?..."
NEWLINE
else
hgroup.long 0x10E00++0x03
hide.long 0x00 "GICR_NSACR,Non-secure Access Control Register"
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
endif
rgroup.long 0x1C000++0x03
line.long 0x00 "GICR_MISCSTATUSR,Miscellaneous Status Register"
bitfld.long 0x00 31. " CPU_AS     ,CPU active state. This bit returns the actual status of the cpu_active signal for the core corresponding to the Redistributor whose register is being read" "Low,High"
bitfld.long 0x00 30. " WAKEREQUEST     ,This bit indicates if a wake request is active" "Not active,Active"
NEWLINE
bitfld.long 0x00 3. "  ENABLEGRP1_S ,EnableGrp1 Secure" "0,1"
bitfld.long 0x00 2. " ENABLEGRP1_S ,EnableGrp1 Secure" "0,1"
NEWLINE
bitfld.long 0x00 1. "     ENABLEGRP1_NS ,EnableGrp1 Non-secure" "0,1"
bitfld.long 0x00 0. " ENABLEGRP0 ,EnableGrp0" "0,1"
NEWLINE
rgroup.long 0x1C008++0x03
line.long 0x00 "GICR_IERRV,Interrupt Error Valid Register"
bitfld.long 0x00 31. "     VALID31 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 30. "     VALID30 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 29. "     VALID29 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 28. "     VALID28 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 27. "     VALID27 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 26. "     VALID26 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 25. "     VALID25 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 24. "     VALID24 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 23. "     VALID23 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 22. "     VALID22 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 21. "     VALID21 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 20. "     VALID20 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 19. "     VALID19 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 18. "     VALID18 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 17. "     VALID17 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 16. "     VALID16 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 15. "     VALID15 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 14. "     VALID14 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 13. "     VALID13 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 12. "     VALID12 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 11. "     VALID11 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 10. "     VALID10 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 9. "     VALID9  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 8. "     VALID8  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 7. "     VALID7  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 6. "     VALID6  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 5. "     VALID5  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 4. "     VALID4  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 3. "     VALID3  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 2. "     VALID2  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 1. "     VALID1  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 0. "     VALID0  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
NEWLINE
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)||((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICR",-1.)+0x1C010))))
//(GICD_TYPER.SECURITYEXTN == 1 [Implemented] && Accessed address is secure)
group.quad 0x1C010++0x07
line.quad 0x00 "GICR_SGIDR,SGI Default Register"
bitfld.quad 0x00 62. " GRPMOD16 ,As GRPMOD register." "0,1"
bitfld.quad 0x00 61. "     GRP16 ,As GRP register." "0,1"
bitfld.quad 0x00 60. "     NSACR16 ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 58. " GRPMOD15 ,As GRPMOD register." "0,1"
bitfld.quad 0x00 57. "     GRP15 ,As GRP register." "0,1"
bitfld.quad 0x00 56. "     NSACR15 ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 54. " GRPMOD14 ,As GRPMOD register." "0,1"
bitfld.quad 0x00 53. "     GRP14 ,As GRP register." "0,1"
bitfld.quad 0x00 52. "     NSACR14 ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 50. " GRPMOD13 ,As GRPMOD register." "0,1"
bitfld.quad 0x00 49. "     GRP13 ,As GRP register." "0,1"
bitfld.quad 0x00 48. "     NSACR13 ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 46. " GRPMOD12 ,As GRPMOD register." "0,1"
bitfld.quad 0x00 45. "     GRP12 ,As GRP register." "0,1"
bitfld.quad 0x00 44. "     NSACR12 ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 42. " GRPMOD11 ,As GRPMOD register." "0,1"
bitfld.quad 0x00 41. "     GRP11 ,As GRP register." "0,1"
bitfld.quad 0x00 40. "     NSACR11 ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 38. " GRPMOD10 ,As GRPMOD register." "0,1"
bitfld.quad 0x00 37. "     GRP10 ,As GRP register." "0,1"
bitfld.quad 0x00 36. "     NSACR10 ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 34. " GRPMOD9  ,As GRPMOD register." "0,1"
bitfld.quad 0x00 33. "     GRP9  ,As GRP register." "0,1"
bitfld.quad 0x00 32. "     NSACR9  ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 30. " GRPMOD8  ,As GRPMOD register." "0,1"
bitfld.quad 0x00 29. "     GRP8  ,As GRP register." "0,1"
bitfld.quad 0x00 28. "     NSACR8  ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 26. " GRPMOD7  ,As GRPMOD register." "0,1"
bitfld.quad 0x00 25. "     GRP7  ,As GRP register." "0,1"
bitfld.quad 0x00 24. "     NSACR7  ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 22. " GRPMOD6  ,As GRPMOD register." "0,1"
bitfld.quad 0x00 21. "     GRP6  ,As GRP register." "0,1"
bitfld.quad 0x00 20. "     NSACR6  ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 18. " GRPMOD5  ,As GRPMOD register." "0,1"
bitfld.quad 0x00 17. "     GRP5  ,As GRP register." "0,1"
bitfld.quad 0x00 16. "     NSACR5  ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 14. " GRPMOD4  ,As GRPMOD register." "0,1"
bitfld.quad 0x00 13. "     GRP4  ,As GRP register." "0,1"
bitfld.quad 0x00 12. "     NSACR4  ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 10. " GRPMOD3  ,As GRPMOD register." "0,1"
bitfld.quad 0x00 9. "     GRP3  ,As GRP register." "0,1"
bitfld.quad 0x00 8. "     NSACR3  ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 6. " GRPMOD2  ,As GRPMOD register." "0,1"
bitfld.quad 0x00 5. "     GRP2  ,As GRP register." "0,1"
bitfld.quad 0x00 4. "     NSACR2  ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 2. " GRPMOD1  ,As GRPMOD register." "0,1"
bitfld.quad 0x00 1. "     GRP1  ,As GRP register." "0,1"
bitfld.quad 0x00 0. "     NSACR1  ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
else
hgroup.quad 0x1C010++0x07
hide.quad 0x00 "GICR_SGIDR,SGI Default Register"
endif
rgroup.long 0x1C080++0x03
line.long 0x00 "GICR_PPISR,Private Peripheral Interrupt Status Register"
bitfld.long 0x00 31. "         PPI31S     ,Actual status of the PPI31 input signal" "Low,High"
bitfld.long 0x00 30. "          PPI30S       ,Actual status of the PPI30 input signal" "Low,High"
NEWLINE
bitfld.long 0x00 29. "          PPI29S        ,Actual status of the PPI29 input signal" "Low,High"
bitfld.long 0x00 28. "         PPI28S     ,Actual status of the PPI28 input signal" "Low,High"
NEWLINE
bitfld.long 0x00 27. "          PPI27S       ,Actual status of the PPI27 input signal" "Low,High"
bitfld.long 0x00 26. "          PPI26S        ,Actual status of the PPI26 input signal" "Low,High"
NEWLINE
bitfld.long 0x00 25. "         PPI25S     ,Actual status of the PPI25 input signal" "Low,High"
bitfld.long 0x00 24. "          PPI24S       ,Actual status of the PPI24 input signal" "Low,High"
NEWLINE
bitfld.long 0x00 23. "          PPI23S        ,Actual status of the PPI23 input signal" "Low,High"
bitfld.long 0x00 22. "         PPI22S     ,Actual status of the PPI22 input signal" "Low,High"
NEWLINE
bitfld.long 0x00 21. "          PPI21S       ,Actual status of the PPI21 input signal" "Low,High"
bitfld.long 0x00 20. "          PPI20S        ,Actual status of the PPI20 input signal" "Low,High"
NEWLINE
bitfld.long 0x00 19. "         PPI19S     ,Actual status of the PPI19 input signal" "Low,High"
bitfld.long 0x00 18. "          PPI18S       ,Actual status of the PPI18 input signal" "Low,High"
NEWLINE
bitfld.long 0x00 17. "          PPI17S        ,Actual status of the PPI17 input signal" "Low,High"
bitfld.long 0x00 16. "         PPI16S     ,Actual status of the PPI16 input signal" "Low,High"
rgroup.long 0x1F000++0x03
line.long 0x00 "GICR_CFGID0,Configuration ID0 Register"
bitfld.long 0x00 28.--31. "         AF3WIDTH ,Affinity 3 width." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "          AF2WIDTH ,Affinity 2 width." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
NEWLINE
bitfld.long 0x00 20.--23. "          AF1WIDTH ,Affinity 1 width." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "         AF0WIDTH ,Affinity 0 width." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
NEWLINE
bitfld.long 0x00 12.--15. "          TGT0LISTWIDTH ,The Target0 list width - 1." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 11. "          ECCSUPPORT ,This bit indicates if ECC is supported." "Not supported,Supported"
NEWLINE
hexmask.long.word 0x00 0.--8. 1. "         PPINUMBER  ,RedistributorID. The ppi_id[15:0] tie-off signal sets the value of the ID. Each Redistributor must have a unique ID."
rgroup.long 0x1F004++0x03
line.long 0x00 "GICR_CFGID1,Configuration ID1 Register"
bitfld.long 0x00 28.--31. "         VERSION       ,Identifies the major and minor revisions and product quality status of the GIC-600." "?,Ver0 (r0p0),?,Ver1 (r0p1),Ver2 (r0p2),?..."
hexmask.long.byte 0x00 24.--27. 1. "         USERVALUE       ,Modification value that you can set."
NEWLINE
hexmask.long.byte 0x00 16.--19. 1. "         PPIPERPROC       ,The number of Redistributors that each core supports - 1."
bitfld.long 0x00 12. "         DIRECTUPSTREAM, Indicates a direct upstream connection." "0,1"
NEWLINE
hexmask.long.word 0x00  4.--11. 1. "         NUMCPUS       ,The number of cores that are integrated in this Redistributor."
tree.end
width 12.
tree "Peripheral/Component ID Registers"
rgroup.long 0xFFE0++0x03
line.long 0x00 "GICR_PIDR0,Peripheral ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. " PART_0  ,Part number[7:0]"
rgroup.long 0xFFE4++0x03
line.long 0x00 "GICR_PIDR1,Peripheral ID1 Register"
bitfld.long 0x00 4.--7. " DES_1   ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        PART_1 ,         Part number[11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFE8++0x03
line.long 0x00 "GICR_PIDR2,Peripheral ID2 Register"
bitfld.long 0x00 4.--7. " ARCHREV ,Identifies the version of the GIC architecture with which the GIC-600 complies" "Reserved,Reserved,Reserved,v3.0,?..."
bitfld.long 0x00 3. "  JEDEC  ,Indicates that a JEDEC-assigned JEP106 identity code is used" "Low,High"
bitfld.long 0x00 0.--2. "  DES_1 ,JEP106 identity code [6:4]" "0,1,2,3,4,5,6,7"
rgroup.long 0xFFEC++0x03
line.long 0x00 "GICR_PIDR3,Peripheral ID3 Register"
bitfld.long 0x00 4.--7. " REVAND  ,Manufacturer defined revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        CMOD   ,Indicates if the customer has modified the behavior of the component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFD0++0x03
line.long 0x00 "GICR_PIDR4,Peripheral ID4 Register"
bitfld.long 0x00 4.--7. " SIZE    ,64 KB software visible page" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        DES_2  ,ARM implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0xFFD4++0x03
hide.long 0x00 "GICR_PIDR5,Peripheral ID5 Register"
hgroup.long 0xFFD8++0x03
hide.long 0x00 "GICR_PIDR6,Peripheral ID6 Register"
hgroup.long 0xFFDC++0x03
hide.long 0x00 "GICR_PIDR7,Peripheral ID7 Register"
rgroup.long 0xFFF0++0x03
line.long 0x00 "GICR_CIDR0,Component ID0 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF4++0x03
line.long 0x00 "GICR_CIDR1,Component ID1 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF8++0x03
line.long 0x00 "GICR_CIDR2,Component ID2 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFFC++0x03
line.long 0x00 "GICR_CIDR3,Component ID3 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
tree.end
tree.end
AUTOINDENT.OFF
sif COMP.AVAILABLE("GICC")
base COMP.BASE("GICC",-1.)
width 14.
tree "CPU Interface"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICC",-1.)))
group.long 0x00++0x03
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
bitfld.long 0x00 10. " EOIMODENS     ,Controls the behavior of Non-secure accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 9. "  EOIMODES      ,Controls the behavior of Secure accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 8. "  IRQBYPDISGRP1 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
textline "                       "
bitfld.long 0x00 7. " FIQBYPDISGRP1 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
bitfld.long 0x00 6. "          IRQBYPDISGRP0 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 0" "Signaled,Not signaled"
bitfld.long 0x00 5. "          FIQBYPDISGRP0 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 0" "Signaled,Not signaled"
textline "                       "
bitfld.long 0x00 4. " CBPR          ,Controls whether GICC_BPR provides common control of preemption to Group 0 and Group 1 interrupts" "Group 0,Both"
bitfld.long 0x00 3. "               FIQEN         ,Controls whether the CPU interface signals Group 0 interrupts to a target PE using the FIQ or IRQ signal" "IRQ,FIQ"
bitfld.long 0x00 1. "                   ENABLEGRP1    ,Enables the signaling of Group 1 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 0. " ENABLEGRP0    ,Enables the signaling of Group 0 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
elif (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)
group.long 0x00++0x03
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
bitfld.long 0x00 9. " EOIMODENS     ,Controls the behavior of Non-secure accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 6. "  IRQBYPDISGRP1 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
bitfld.long 0x00 5. "          FIQBYPDISGRP1 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
textline "                       "
bitfld.long 0x00 0. " ENABLEGRP1    ,Enables the signaling of Group 1 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
else
group.long 0x00++0x03
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
bitfld.long 0x00 9. " EOIMODE       ,Controls the behavior of accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 8. "  IRQBYPDISGRP1 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
bitfld.long 0x00 7. "          FIQBYPDISGRP1 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
textline "                       "
bitfld.long 0x00 6. " IRQBYPDISGRP0 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 0" "Signaled,Not signaled"
bitfld.long 0x00 5. "          FIQBYPDISGRP0 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 0" "Signaled,Not signaled"
bitfld.long 0x00 4. "          CBPR          ,Controls whether GICC_BPR provides common control of preemption to Group 0 and Group 1 interrupts" "Group 0,Both"
textline "                       "
bitfld.long 0x00 3. " FIQEN         ,Controls whether the CPU interface signals Group 0 interrupts to a target PE using the FIQ or IRQ signal" "IRQ,FIQ"
bitfld.long 0x00 1. "                   ENABLEGRP1    ,Enables the signaling of Group 1 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
bitfld.long 0x00 0. "              ENABLEGRP0    ,Enables the signaling of Group 0 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
endif
textline "                       "
group.long 0x04++0x03
line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register"
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface"
group.long 0x08++0x03
line.long 0x00 "GICC_BPR,Binary Point Register"
bitfld.long 0x00 0.--2. " BP       ,Binary point" "0,1,2,3,4,5,6,7"
hgroup.long 0x0C++0x03
hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register"
in
wgroup.long 0x10++0x03
line.long 0x00 "GICC_EOIR,End Of Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
rgroup.long 0x14++0x03
line.long 0x00 "GICC_RPR,Running Priority Register"
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority value of highest priority interrupt"
rgroup.long 0x18++0x03
line.long 0x00 "GICC_HPPIR,Highest Priority Pending Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
group.long 0x1C++0x03
line.long 0x00 "GICC_ABPR,Aliased Binary Point Register"
bitfld.long 0x00 0.--2. " BP       ,Binary point" "0,1,2,3,4,5,6,7"
hgroup.long 0x20++0x03
hide.long 0x00 "GICC_AIAR,Aliased Interrupt Acknowledge Register"
in
wgroup.long 0x24++0x03
line.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
rgroup.long 0x28++0x03
line.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
rgroup.long 0x2C++0x03
line.long 0x00 "GICC_STATUSR,CPU Interface Status Register"
bitfld.long 0x00 4. " ASV      ,Attempted security violation" "Not detected,Detected"
bitfld.long 0x00 3. "  WROD    ,Write to an RO location" "Not detected,Detected"
bitfld.long 0x00 2. "  RWOD ,Read of a WO location" "Not detected,Detected"
textline "                       "
bitfld.long 0x00 1. " WRD      ,Write to a reserved location" "Not detected,Detected"
bitfld.long 0x00 0. "  RRD     ,Read of a reserved location" "Not detected,Detected"
group.long 0xD0++0x03
line.long 0x00 "GICC_APR0,Active Priorities Register 0"
group.long 0xD4++0x03
line.long 0x00 "GICC_APR1,Active Priorities Register 1"
group.long 0xD8++0x03
line.long 0x00 "GICC_APR2,Active Priorities Register 2"
group.long 0xDC++0x03
line.long 0x00 "GICC_APR3,Active Priorities Register 3"
group.long 0xE0++0x03
line.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register 0"
group.long 0xE4++0x03
line.long 0x00 "GICC_NSAPR1,Non-Secure Active Priorities Register 1"
group.long 0xE8++0x03
line.long 0x00 "GICC_NSAPR2,Non-Secure Active Priorities Register 2"
group.long 0xEC++0x03
line.long 0x00 "GICC_NSAPR3,Non-Secure Active Priorities Register 3"
rgroup.long 0xFC++0x03
line.long 0x00 "GICC_IIDR,CPU Interface Identification Register"
hexmask.long.word 0x00 20.--31. 1. " PRODID   ,Product ID"
bitfld.long 0x00 16.--19. "          ARCHVER ,The version of the GIC architecture that is implemented" ",,,GICv3,?..."
bitfld.long 0x00 12.--15. "         REV  ,Revision number for the CPU interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "            IMP ,Implementer"
wgroup.long 0x1000++0x03
line.long 0x00 "GICC_DIR,Deactivate Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
tree.end
width 0x0b
endif
sif COMP.AVAILABLE("GICH")
base COMP.BASE("GICH",-1.)
width 13.
tree "Virtual CPU Control Interface"
group.long 0x00++0x03
line.long 0x00 "GICH_HCR,Hypervisor Control Register"
bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 7. "             VGRP1DIE ,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 6. "      VGRP1EIE ,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "             VGRP0DIE ,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 4. " VGRP0EIE ,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "       NPIE     ,No Pending Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "      LRENPIE  ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "             UIE      ,Underflow Interrupt Enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. " EN       ,Virtual CPU interface Enable" "Disabled,Enabled"
rgroup.long 0x04++0x03
line.long 0x00 "GICH_VTR,Virtual Type Register"
bitfld.long 0x00 29.--31. " PRIBITS  ,Number of priority bits" "1,2,3,4,5,6,7,8"
bitfld.long 0x00 26.--28. "              PREBITS  ,Number of pre-emption bits" "1,2,3,4,5,6,7,8"
bitfld.long 0x00 23.--25. "             IDBITS   ,The number of virtual interrupt identifier bits supported" "16 bits,24 bits,?..."
textline "                      "
bitfld.long 0x00 22. " SEIS     ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not supported,Supported"
bitfld.long 0x00 21. "  A3V      ,Affinity 3 valid" "Invalid,Valid"
bitfld.long 0x00 0.--4. "       LISTREGS ,List regs number" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
group.long 0x08++0x03
line.long 0x00 "GICH_VMCR,Virtual Machine Control Register"
hexmask.long.byte 0x00 24.--31. 1. " VPMR     ,Virtual priority mask"
bitfld.long 0x00 21.--23. "             VBPR0    ,Defines the point at which the priority value fields split into two parts the group priority field and the subpriority field (group 0)" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--20. "             VBPR1    ,Defines the point at which the priority value fields split into two parts the group priority field and the subpriority field (group 1)" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 9. "                    VEOIM    ,Virtual EOImode. DP - Drop the priority / ID - interrupt deactivate" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
textline "                      "
bitfld.long 0x00 4. " VCBPR    ,Virtual Common Binary Point Register" "ABPR,BPR"
bitfld.long 0x00 3. "           VFIQEN   ,Virtual FIQ enable" "Disabled,Enabled"
bitfld.long 0x00 2. "      VACKCTL  ,Virtual AckCtl" "INTID=1022,INTID=corresponding"
bitfld.long 0x00 1. "  VENG1    ,Virtual interrupt enable for group 1" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. " VENG0    ,Virtual interrupt enable for group 0" "Disabled,Enabled"
rgroup.long 0x10++0x03
line.long 0x00 "GICH_MISR,Maintenance Interrupt Status Register"
bitfld.long 0x00 7. " VGRP1D   ,vPE Group 1 Disabled maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 6. "   VGRP1E   ,vPE Group 1 Enabled maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 5. "  VGRP0D   ,vPE Group 0 Disabled maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 4. "         VGRP0E   ,vPE Group 0 Enabled maintenance interrupt assertion" "Not asserted,Asserted"
textline "                      "
bitfld.long 0x00 3. " NP       ,No Pending maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 2. "   LRENP    ,List Register Entry Not Present maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 1. "  U        ,Underflow maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 0. "         EOI      ,End Of Interrupt maintenance interrupt assertion" "Not asserted,Asserted"
rgroup.long 0x20++0x03
line.long 0x00 "GICH_EISR0,End of Interrupt Status Register"
bitfld.long 0x00 15. " STATUS15 ,EOI maintenance interrupt status for List register 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "   STATUS14 ,EOI maintenance interrupt status for List register 14" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  STATUS13 ,EOI maintenance interrupt status for List register 13" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 12. " STATUS12 ,EOI maintenance interrupt status for List register 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "   STATUS11 ,EOI maintenance interrupt status for List register 11" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  STATUS10 ,EOI maintenance interrupt status for List register 10" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 9. " STATUS9  ,EOI maintenance interrupt status for List register 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "   STATUS8  ,EOI maintenance interrupt status for List register 8" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  STATUS7  ,EOI maintenance interrupt status for List register 7" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 6. " STATUS6  ,EOI maintenance interrupt status for List register 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "   STATUS5  ,EOI maintenance interrupt status for List register 5" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  STATUS4  ,EOI maintenance interrupt status for List register 4" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 3. " STATUS3  ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "   STATUS2  ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  STATUS1  ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 0. " STATUS0  ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt"
rgroup.long 0x30++0x03
line.long 0x00 "GICH_ELRSR0,Empty List register Status Register"
bitfld.long 0x00 15. " STATUS15 ,Status bit for List register 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "   STATUS14 ,Status bit for List register 14" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  STATUS13 ,Status bit for List register 13" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 12. " STATUS12 ,Status bit for List register 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "   STATUS11 ,Status bit for List register 11" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  STATUS10 ,Status bit for List register 10" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 9. " STATUS9  ,Status bit for List register 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "   STATUS8  ,Status bit for List register 8" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  STATUS7  ,Status bit for List register 7" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 6. " STATUS6  ,Status bit for List register 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "   STATUS5  ,Status bit for List register 5" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  STATUS4  ,Status bit for List register 4" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 3. " STATUS3  ,Status bit for List register 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "   STATUS2  ,Status bit for List register 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  STATUS1  ,Status bit for List register 1" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 0. " STATUS0  ,Status bit for List register 0" "No interrupt,Interrupt"
textline "                      "
group.long 0xF0++0x03
line.long 0x00 "GICH_APR0,Active Priorities Register 0"
bitfld.long 0x00 31. "  P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "  P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "  P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "  P28 ,Active Priority 28" "0,1"
textline "                       "
bitfld.long 0x00 27. " P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "  P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "  P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "  P24 ,Active Priority 24" "0,1"
textline "                       "
bitfld.long 0x00 23. " P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "  P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "  P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "  P20 ,Active Priority 20" "0,1"
textline "                       "
bitfld.long 0x00 19. " P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "  P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "  P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "  P16 ,Active Priority 16" "0,1"
textline "                       "
bitfld.long 0x00 15. " P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "  P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "  P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "  P12 ,Active Priority 12" "0,1"
textline "                       "
bitfld.long 0x00 11. " P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "  P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "  P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "  P8  ,Active Priority 8" "0,1"
textline "                       "
bitfld.long 0x00 7. " P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "  P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "  P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "  P4  ,Active Priority 4" "0,1"
textline "                       "
bitfld.long 0x00 3. " P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "  P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "  P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "  P0  ,Active Priority 0" "0,1"
group.long 0xF4++0x03
line.long 0x00 "GICH_APR1,Active Priorities Register 1"
bitfld.long 0x00 31. "  P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "  P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "  P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "  P28 ,Active Priority 28" "0,1"
textline "                       "
bitfld.long 0x00 27. " P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "  P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "  P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "  P24 ,Active Priority 24" "0,1"
textline "                       "
bitfld.long 0x00 23. " P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "  P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "  P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "  P20 ,Active Priority 20" "0,1"
textline "                       "
bitfld.long 0x00 19. " P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "  P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "  P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "  P16 ,Active Priority 16" "0,1"
textline "                       "
bitfld.long 0x00 15. " P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "  P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "  P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "  P12 ,Active Priority 12" "0,1"
textline "                       "
bitfld.long 0x00 11. " P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "  P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "  P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "  P8  ,Active Priority 8" "0,1"
textline "                       "
bitfld.long 0x00 7. " P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "  P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "  P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "  P4  ,Active Priority 4" "0,1"
textline "                       "
bitfld.long 0x00 3. " P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "  P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "  P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "  P0  ,Active Priority 0" "0,1"
group.long 0xF8++0x03
line.long 0x00 "GICH_APR2,Active Priorities Register 2"
bitfld.long 0x00 31. "  P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "  P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "  P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "  P28 ,Active Priority 28" "0,1"
textline "                       "
bitfld.long 0x00 27. " P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "  P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "  P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "  P24 ,Active Priority 24" "0,1"
textline "                       "
bitfld.long 0x00 23. " P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "  P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "  P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "  P20 ,Active Priority 20" "0,1"
textline "                       "
bitfld.long 0x00 19. " P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "  P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "  P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "  P16 ,Active Priority 16" "0,1"
textline "                       "
bitfld.long 0x00 15. " P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "  P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "  P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "  P12 ,Active Priority 12" "0,1"
textline "                       "
bitfld.long 0x00 11. " P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "  P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "  P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "  P8  ,Active Priority 8" "0,1"
textline "                       "
bitfld.long 0x00 7. " P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "  P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "  P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "  P4  ,Active Priority 4" "0,1"
textline "                       "
bitfld.long 0x00 3. " P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "  P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "  P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "  P0  ,Active Priority 0" "0,1"
group.long 0xFC++0x03
line.long 0x00 "GICH_APR3,Active Priorities Register 3"
bitfld.long 0x00 31. "  P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "  P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "  P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "  P28 ,Active Priority 28" "0,1"
textline "                       "
bitfld.long 0x00 27. " P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "  P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "  P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "  P24 ,Active Priority 24" "0,1"
textline "                       "
bitfld.long 0x00 23. " P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "  P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "  P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "  P20 ,Active Priority 20" "0,1"
textline "                       "
bitfld.long 0x00 19. " P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "  P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "  P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "  P16 ,Active Priority 16" "0,1"
textline "                       "
bitfld.long 0x00 15. " P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "  P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "  P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "  P12 ,Active Priority 12" "0,1"
textline "                       "
bitfld.long 0x00 11. " P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "  P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "  P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "  P8  ,Active Priority 8" "0,1"
textline "                       "
bitfld.long 0x00 7. " P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "  P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "  P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "  P4  ,Active Priority 4" "0,1"
textline "                       "
bitfld.long 0x00 3. " P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "  P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "  P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "  P0  ,Active Priority 0" "0,1"
textline "                       "
group.long 0x100++0x03
line.long 0x00 "GICH_LR0,List Register 0"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x104++0x03
line.long 0x00 "GICH_LR1,List Register 1"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x108++0x03
line.long 0x00 "GICH_LR2,List Register 2"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x10C++0x03
line.long 0x00 "GICH_LR3,List Register 3"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x110++0x03
line.long 0x00 "GICH_LR4,List Register 4"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x114++0x03
line.long 0x00 "GICH_LR5,List Register 5"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x118++0x03
line.long 0x00 "GICH_LR6,List Register 6"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x11C++0x03
line.long 0x00 "GICH_LR7,List Register 7"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x120++0x03
line.long 0x00 "GICH_LR8,List Register 8"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x124++0x03
line.long 0x00 "GICH_LR9,List Register 9"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x128++0x03
line.long 0x00 "GICH_LR10,List Register 10"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x12C++0x03
line.long 0x00 "GICH_LR11,List Register 11"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x130++0x03
line.long 0x00 "GICH_LR12,List Register 12"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x134++0x03
line.long 0x00 "GICH_LR13,List Register 13"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x138++0x03
line.long 0x00 "GICH_LR14,List Register 14"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
tree.end
width 0x0b
endif
sif COMP.AVAILABLE("GICV")
base COMP.BASE("GICV",-1.)
width 14.
tree "Virtual CPU Interface"
group.long 0x00++0x03
line.long 0x00 "GICV_CTLR,VM Control Register"
bitfld.long 0x00 9. " EOIMODE    ,Controls the behaviour of Non-secure accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 4. "  CBPR       ,Controls whether GICV_BPR affects both Group 0 and Group 1 interrupts" "Group 0,Both"
bitfld.long 0x00 3. "       FIQEN ,FIQ Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "      ACKCTL ,Acknowledge control. Return ID of the corresponding interrupt" "1022,Corresponding"
textline "                      "
bitfld.long 0x00 1. "  ENABLEGRP1 ,Enables the signalling of Group 1 interrupts by the CPU interface to the virtual machine" "Disabled,Enabled"
bitfld.long 0x00 0. "              ENABLEGRP0 ,Enables the signalling of Group 0 interrupts by the CPU interface to the virtual machine" "Disabled,Enabled"
group.long 0x04++0x03
line.long 0x00 "GICV_PMR,VM Priority Mask Register"
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY   ,Priority mask level for the virtual CPU interface"
group.long 0x08++0x03
line.long 0x00 "GICV_BPR,VM Binary Point Register"
bitfld.long 0x00 0.--2. " BP         ,Binary point" "0,1,2,3,4,5,6,7"
rgroup.long 0x0C++0x03
line.long 0x00 "GICV_IAR,VM Interrupt Acknowledge Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
wgroup.long 0x10++0x03
line.long 0x00 "GICV_EOIR,VM End Of Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
rgroup.long 0x14++0x03
line.long 0x00 "GICV_RPR,VM Running Priority Register"
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY   ,Priority value of highest priority interrupt"
rgroup.long 0x18++0x03
line.long 0x00 "GICV_HPPIR,VM Highest Priority Pending Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
group.long 0x1C++0x03
line.long 0x00 "GICV_ABPR,VM Aliased Binary Point Register"
bitfld.long 0x00 0.--2. " BP         ,Binary point" "0,1,2,3,4,5,6,7"
rgroup.long 0x20++0x03
line.long 0x00 "GICV_AIAR,VM Aliased Interrupt Acknowledge Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
wgroup.long 0x24++0x03
line.long 0x00 "GICV_AEOIR,VM Aliased End of Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
rgroup.long 0x28++0x03
line.long 0x00 "GICV_AHPPIR,VM Aliased Highest Priority Pending Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
textline ""
group.long 0xD0++0x03
line.long 0x00 "GICV_APR0,VM Active Priority Register 0"
bitfld.long 0x00 31. " P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "   P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "   P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "   P28 ,Active Priority 28" "0,1"
textline "                      "
bitfld.long 0x00 27. "  P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "   P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "   P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "   P24 ,Active Priority 24" "0,1"
textline "                      "
bitfld.long 0x00 23. "  P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "   P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "   P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "   P20 ,Active Priority 20" "0,1"
textline "                      "
bitfld.long 0x00 19. "  P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "   P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "   P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "   P16 ,Active Priority 16" "0,1"
textline "                      "
bitfld.long 0x00 15. "  P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "   P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "   P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "   P12 ,Active Priority 12" "0,1"
textline "                      "
bitfld.long 0x00 11. "  P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "   P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "   P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "   P8  ,Active Priority 8" "0,1"
textline "                      "
bitfld.long 0x00 7. "  P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "   P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "   P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "   P4  ,Active Priority 4" "0,1"
textline "                      "
bitfld.long 0x00 3. "  P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "   P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "   P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "   P0  ,Active Priority 0" "0,1"
group.long 0xD4++0x03
line.long 0x00 "GICV_APR1,VM Active Priority Register 1"
bitfld.long 0x00 31. " P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "   P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "   P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "   P28 ,Active Priority 28" "0,1"
textline "                      "
bitfld.long 0x00 27. "  P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "   P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "   P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "   P24 ,Active Priority 24" "0,1"
textline "                      "
bitfld.long 0x00 23. "  P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "   P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "   P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "   P20 ,Active Priority 20" "0,1"
textline "                      "
bitfld.long 0x00 19. "  P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "   P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "   P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "   P16 ,Active Priority 16" "0,1"
textline "                      "
bitfld.long 0x00 15. "  P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "   P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "   P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "   P12 ,Active Priority 12" "0,1"
textline "                      "
bitfld.long 0x00 11. "  P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "   P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "   P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "   P8  ,Active Priority 8" "0,1"
textline "                      "
bitfld.long 0x00 7. "  P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "   P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "   P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "   P4  ,Active Priority 4" "0,1"
textline "                      "
bitfld.long 0x00 3. "  P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "   P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "   P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "   P0  ,Active Priority 0" "0,1"
group.long 0xD8++0x03
line.long 0x00 "GICV_APR2,VM Active Priority Register 2"
bitfld.long 0x00 31. " P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "   P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "   P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "   P28 ,Active Priority 28" "0,1"
textline "                      "
bitfld.long 0x00 27. "  P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "   P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "   P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "   P24 ,Active Priority 24" "0,1"
textline "                      "
bitfld.long 0x00 23. "  P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "   P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "   P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "   P20 ,Active Priority 20" "0,1"
textline "                      "
bitfld.long 0x00 19. "  P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "   P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "   P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "   P16 ,Active Priority 16" "0,1"
textline "                      "
bitfld.long 0x00 15. "  P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "   P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "   P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "   P12 ,Active Priority 12" "0,1"
textline "                      "
bitfld.long 0x00 11. "  P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "   P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "   P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "   P8  ,Active Priority 8" "0,1"
textline "                      "
bitfld.long 0x00 7. "  P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "   P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "   P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "   P4  ,Active Priority 4" "0,1"
textline "                      "
bitfld.long 0x00 3. "  P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "   P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "   P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "   P0  ,Active Priority 0" "0,1"
group.long 0xDC++0x03
line.long 0x00 "GICV_APR3,VM Active Priority Register 3"
bitfld.long 0x00 31. " P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "   P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "   P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "   P28 ,Active Priority 28" "0,1"
textline "                      "
bitfld.long 0x00 27. "  P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "   P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "   P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "   P24 ,Active Priority 24" "0,1"
textline "                      "
bitfld.long 0x00 23. "  P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "   P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "   P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "   P20 ,Active Priority 20" "0,1"
textline "                      "
bitfld.long 0x00 19. "  P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "   P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "   P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "   P16 ,Active Priority 16" "0,1"
textline "                      "
bitfld.long 0x00 15. "  P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "   P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "   P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "   P12 ,Active Priority 12" "0,1"
textline "                      "
bitfld.long 0x00 11. "  P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "   P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "   P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "   P8  ,Active Priority 8" "0,1"
textline "                      "
bitfld.long 0x00 7. "  P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "   P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "   P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "   P4  ,Active Priority 4" "0,1"
textline "                      "
bitfld.long 0x00 3. "  P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "   P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "   P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "   P0  ,Active Priority 0" "0,1"
textline "                      "
rgroup.long 0xFC++0x03
line.long 0x00 "GICV_IIDR,Virtual Machine CPU Interface Identification Register"
hexmask.long.word 0x00 20.--31. 1. " PRODID     ,Product ID"
bitfld.long 0x00 16.--19. "    ARCHVER ,The version of the GIC architecture that is implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "  REV ,Revision number for the CPU interface" ",,,GICv3,?..."
hexmask.long.word 0x00 0.--11. 1. "  IMP ,Implementer"
wgroup.long 0x1000++0x03
line.long 0x00 "GICV_DIR,VM Deactivate Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
tree.end
width 0x0b
endif
width 0x0B
AUTOINDENT.POP
tree.end
tree.end
AUTOINDENT.POP
endif
sif (CORENAME()=="CORTEXA76")
tree "Core Registers (Cortex-A76)"
AUTOINDENT.PUSH
AUTOINDENT.ON center tree
tree.open ("AArch64")
tree "ID Registers"
rgroup.quad spr:0x30000++0x00
line.quad 0x00 "MIDR_EL1,Main ID Register"
hexmask.quad.byte 0x00 24.--31. 1. "IMPL,Implementer code"
bitfld.quad 0x00 20.--23. "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 16.--19. "ARCH,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ID reg. defined"
newline
hexmask.quad.word 0x00 4.--15. 1. "PART,Primary part number"
bitfld.quad 0x00 0.--3. "REV,Revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.quad spr:0x30040++0x00
line.quad 0x00 "ID_AA64PFR0_EL1,AArch64 Processor Feature Register 0"
bitfld.quad 0x00 60.--63. "CSV3,Speculative use of faulting data" "Reserved,Forbidden,?..."
bitfld.quad 0x00 56.--59. "CSV2,Speculative use of out of context branch targets / Additional SCXTNUM_ELx registers support" "Reserved,Not supported,?..."
bitfld.quad 0x00 28.--31. "RAS,Reliability, Availability, and Serviceability (RAS) Extension support" "Not supported,RASv1p0 (ARMv8.2),?..."
newline
bitfld.quad 0x00 24.--27. "GIC,System register GIC CPU interface support" "Not supported,Up to GICv4,?..."
bitfld.quad 0x00 20.--23. "ADVSIMD,Advanced SIMD support" "Reserved,Supported + FP16,?..."
bitfld.quad 0x00 16.--19. "FP,Floating-point" "Reserved,Supported + FP16,?..."
newline
bitfld.quad 0x00 12.--15. "EL3_ELH,EL3 exception level handling" "Reserved,AArch64,?..."
bitfld.quad 0x00 8.--11. "EL2_ELH,EL2 exception level handling" "Reserved,AArch64,?..."
bitfld.quad 0x00 4.--7. "EL1_ELH,EL1 exception level handling" "Reserved,AArch64,?..."
newline
bitfld.quad 0x00 0.--3. "EL0_ELH,EL0 exception level handling" "Reserved,Reserved,AArch64/AArch32,?..."
rgroup.quad spr:0x30050++0x00
line.quad 0x00 "ID_AA64DFR0_EL1,AArch64 Debug Feature Register 0"
bitfld.quad 0x00 28.--31. "CTX_CMPS,Number of breakpoints that are context-aware" "Reserved,2,?..."
bitfld.quad 0x00 20.--23. "WRPS,Number of watchpoints" "Reserved,Reserved,Reserved,4,?..."
bitfld.quad 0x00 12.--15. "BRPS,Number of breakpoints" "Reserved,Reserved,Reserved,Reserved,Reserved,6,?..."
newline
bitfld.quad 0x00 8.--11. "PMEV,Performance Monitor Extension (PMU) version" "Reserved,Reserved,Reserved,Reserved,PMUv3p1 (ARMv8.2),?..."
bitfld.quad 0x00 4.--7. "TRACEVER,Trace extension version. Indicates whether System register interface to a PE trace unit is implemented" "Not supported,?..."
bitfld.quad 0x00 0.--3. "DEBUGVER,Debug architecture version" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8.2,?..."
rgroup.quad spr:0x30060++0x00
line.quad 0x00 "ID_AA64ISAR0_EL1,AArch64 Instruction Set Attribute Register 0"
bitfld.quad 0x00 44.--47. "DP,Dot Product instructions support in AArch64 state" "Reserved,Supported,?..."
bitfld.quad 0x00 28.--31. "RDM,Rounding Double Multiply Add/Subtract instructions (SQRDMLAH/SQRDMLSH) support" "Reserved,Supported,?..."
bitfld.quad 0x00 20.--23. "ATOMIC,Atomic instructions support in AArch64 state" "Reserved,Reserved,Supported,?..."
newline
bitfld.quad 0x00 16.--19. "CRC32,CRC32 instructions support in AArch64 state" "Reserved,Supported,?..."
bitfld.quad 0x00 12.--15. "SHA2,SHA2 instructions support in AArch64 state" "Not supported,Supported,?..."
bitfld.quad 0x00 8.--11. "SHA1,SHA1 instructions support in AArch64 state" "Not supported,Supported,?..."
newline
bitfld.quad 0x00 4.--7. "AES,AES instructions (AESE/AESD/AESMC/AESIMC/PMULL/PMULL2) support in AArch64 state" "Not supported,Reserved,Supported,?..."
rgroup.quad spr:0x30070++0x00
line.quad 0x00 "ID_AA64MMFR0_EL1,AArch64 Memory Model Feature Register 0"
bitfld.quad 0x00 28.--31. "TGRAN4,4KB memory translation granule size support" "Supported,?..."
bitfld.quad 0x00 24.--27. "TGRAN64,64KB memory translation granule size support" "Supported,?..."
bitfld.quad 0x00 20.--23. "TGRAN16,16KB memory translation granule size support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 16.--19. "BIGENDEL0,Mixed-endian support only at EL0" "Not supported,?..."
bitfld.quad 0x00 12.--15. "SNSMEM,Secure versus Non-secure Memory distinction" "Reserved,Supported,?..."
bitfld.quad 0x00 8.--11. "BIGEND,Mixed-endian configuration support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 4.--7. "ASIDBITS,Number of ASID bits" "Reserved,Reserved,16 bits,?..."
bitfld.quad 0x00 0.--3. "PARANGE,Physical address range supported" "Reserved,Reserved,40 bits/1 TB,?..."
rgroup.quad spr:0x30041++0x00
line.quad 0x00 "ID_AA64PFR1_EL1,AArch64 Processor Feature Register 1"
bitfld.quad 0x00 4.--7. "SSBS,Speculative Store Bypass Safe (SSBS) support. Indicates whether AArch64 provides the PSTATE.SSBS mechanism" "Reserved,Supported,?..."
rgroup.quad spr:0x30051++0x00
line.quad 0x00 "ID_AA64DFR1_EL1,AArch64 Debug Feature Register 1"
rgroup.quad spr:0x30061++0x00
line.quad 0x00 "ID_AA64ISAR1_EL1,AArch64 Instruction Set Attribute Register 1"
bitfld.quad 0x00 20.--23. "LRCPC,LDAPUR*/STLUR*/LDAPR* instructions support" "Reserved,LDAPR*,?..."
bitfld.quad 0x00 0.--3. "DPB,DC CVAP and DC CVADP instructions support" "Reserved,DC CVAP,?..."
rgroup.quad spr:0x30071++0x00
line.quad 0x00 "ID_AA64MMFR1_EL1,AArch64 Memory Model Feature Register 1"
bitfld.quad 0x00 28.--31. "XNX,EL0/EL1 execute-never control distinction at stage 2 support" "Reserved,Supported,?..."
bitfld.quad 0x00 24.--27. "SPECSEI,Describes whether the PE can generate SError interrupt exceptions from speculative reads of memory" "Not possible,?..."
bitfld.quad 0x00 20.--23. "PAN,Privileged Access Never (PAN) support" "Reserved,Reserved,Extended,?..."
newline
bitfld.quad 0x00 16.--19. "LO,Limited Order Regions support" "Reserved,Supported,?..."
bitfld.quad 0x00 12.--15. "HD,Hierarchical Permission Disables support" "Reserved,Reserved,Extended,?..."
bitfld.quad 0x00 8.--11. "VH,Virtualization Host Extensions support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 4.--7. "VMID,Number of VMID bits" "Reserved,Reserved,16 bits,?..."
bitfld.quad 0x00 0.--3. "HAFDBS,Hardware updates to Access flag and Dirty state in translation tables support" "Reserved,Reserved,Supported,?..."
rgroup.quad spr:0x30072++0x00
line.quad 0x00 "ID_AA64MMFR2_EL1,AArch64 Memory Model Feature Register 2"
bitfld.quad 0x00 16.--19. "LVA,Larger VA support" "Supported 48-bit,?..."
bitfld.quad 0x00 12.--15. "IESB,SCTLR_ELx.IESB bit support" "Reserved,Supported,?..."
bitfld.quad 0x00 8.--11. "LSM,LSMAOE and nTLSMD bits support" "Not supported,?..."
newline
bitfld.quad 0x00 4.--7. "UAO,User Access Override support" "Reserved,Supported,?..."
bitfld.quad 0x00 0.--3. "CNP,Common not Private translations support" "Reserved,Supported,?..."
rgroup.quad spr:0x30054++0x00
line.quad 0x00 "ID_AA64AFR0_EL1,AArch64 Auxiliary Feature Register 0"
rgroup.quad spr:0x30055++0x00
line.quad 0x00 "ID_AA64AFR1_EL1,AArch64 Auxiliary Feature Register 1"
rgroup.quad spr:0x30010++0x00
line.quad 0x00 "ID_PFR0_EL1,AArch32 Processor Feature Register 0"
bitfld.quad 0x00 28.--31. "RAS,Reliability, Availability and Serviceability (RAS) Extension support" "Reserved,RASv1p0 (ARMv8.2),?..."
bitfld.quad 0x00 16.--19. "CSV2,Speculative use of out of context branch targets" "Not supported,Forbidden,?..."
bitfld.quad 0x00 12.--15. "STATE3,T32EE instruction set support" "Not supported,?..."
newline
bitfld.quad 0x00 8.--11. "STATE2,Jazelle extension support" "Reserved,Supported,?..."
bitfld.quad 0x00 4.--7. "STATE1,T32 instruction set support" "Reserved,Reserved,Reserved,After Thumb-2,?..."
bitfld.quad 0x00 0.--3. "STATE0,A32 instruction set support" "Reserved,Supported,?..."
rgroup.quad spr:0x30011++0x00
line.quad 0x00 "ID_PFR1_EL1,AArch32 Processor Feature Register 1"
bitfld.quad 0x00 28.--31. "GIC_CPU,System register GIC CPU interface support" "Not supported,Up to GICv4,?..."
bitfld.quad 0x00 24.--27. "VIRT_FRAC,Virtualization fractional support" "Not supported,?..."
bitfld.quad 0x00 20.--23. "SEC_FRAC,Security fractional support" "Not supported,?..."
newline
bitfld.quad 0x00 16.--19. "GENTIMER,Generic timer support" "Reserved,Supported,?..."
bitfld.quad 0x00 12.--15. "VIRTUALIZATION,Virtualization extensions support" "Not supported,?..."
bitfld.quad 0x00 8.--11. "MPM,Microcontroller programmer's model support" "Not supported,?..."
newline
bitfld.quad 0x00 4.--7. "SE,Security extensions architecture v1 support" "Not supported,?..."
bitfld.quad 0x00 0.--3. "PM,Standard ARMv4 programmer's model support" "Not supported,?..."
rgroup.quad spr:0x30034++0x00
line.quad 0x00 "ID_PFR2_EL1,AArch32 Processor Feature Register 2"
bitfld.quad 0x00 4.--7. "SSBS,Speculative Store Bypass Safe (SSBS) support" "Reserved,Supported,?..."
bitfld.quad 0x00 0.--3. "CSV3,Speculative use of faulting data" "Reserved,Forbidden,?..."
rgroup.quad spr:0x30012++0x00
line.quad 0x00 "ID_DFR0_EL1,AArch32 Debug Feature Register 0"
bitfld.quad 0x00 24.--27. "PMM,Performance Monitor Model support" "Reserved,Reserved,Reserved,Reserved,PMUv3,?..."
bitfld.quad 0x00 20.--23. "M_PROF_DBG,M Profile Debug support" "Not supported,?..."
bitfld.quad 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model support" "Not supported,?..."
bitfld.quad 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Support v8.2,?..."
bitfld.quad 0x00 0.--3. "CDM_CB,Coprocessor Debug Model support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Support v8.2,?..."
rgroup.quad spr:0x30013++0x00
line.quad 0x00 "ID_AFR0_EL1,AArch32 Auxiliary Feature Register 0"
rgroup.quad spr:0x30014++0x00
line.quad 0x00 "ID_MMFR0_EL1,AArch32 Memory Model Feature Register 0"
bitfld.quad 0x00 28.--31. "IS,Indicates the innermost shareability domain implemented" "Reserved,HW coherency,?..."
bitfld.quad 0x00 24.--27. "FCSE,Fast Context Switch Memory Mappings support" "Not supported,?..."
bitfld.quad 0x00 20.--23. "AR,Auxiliary Register support" "Reserved,Reserved,Supported,?..."
newline
bitfld.quad 0x00 16.--19. "TCM,TCM and Associated DMA support" "Not supported,?..."
bitfld.quad 0x00 12.--15. "SL,Shareability levels" "Reserved,Implemented 2 levels,?..."
bitfld.quad 0x00 8.--11. "OSS,Indicates the outermost shareability domain implemented" "Reserved,HW coherency,?..."
newline
bitfld.quad 0x00 4.--7. "PMSA,Protected Memory System Architecture (PMSA) support" "Not supported,?..."
bitfld.quad 0x00 0.--3. "VMSA,Virtual Memory System Architecture (VMSA) support" "Reserved,Reserved,Reserved,Reserved,Reserved,VMSAv7/PXN/L-DESC,?..."
rgroup.quad spr:0x30015++0x00
line.quad 0x00 "ID_MMFR1_EL1,AArch32 Memory Model Feature Register 1"
bitfld.quad 0x00 28.--31. "BTB,Branch Predictor" "Reserved,Reserved,Reserved,Reserved,No flushing,?..."
bitfld.quad 0x00 24.--27. "L1TCO,Test and Clean Operations on Data Cache/Harvard/Unified Architecture support" "Not supported,?..."
bitfld.quad 0x00 20.--23. "L1UCMO,L1 Cache/All Maintenance Operations/Unified Architecture support" "Not supported,?..."
newline
bitfld.quad 0x00 16.--19. "L1HCMO,L1 Cache/All Maintenance Operations/Harvard Architecture support" "Not supported,?..."
bitfld.quad 0x00 12.--15. "L1UCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture support" "Not supported,?..."
bitfld.quad 0x00 8.--11. "L1HCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture support" "Not supported,?..."
newline
bitfld.quad 0x00 4.--7. "L1UCLMOMVA,L1 Cache Line Maintenance Operations by VA/Unified Architecture support" "Not supported,?..."
bitfld.quad 0x00 0.--3. "L1HCLMOMVA,L1 Cache Line Maintenance Operations by VA/Harvard Architecture support" "Not supported,?..."
rgroup.quad spr:0x30016++0x00
line.quad 0x00 "ID_MMFR2_EL1,AArch32 Memory Model Feature Register 2"
bitfld.quad 0x00 28.--31. "HAF,Hardware Access Flag support" "Not supported,?..."
bitfld.quad 0x00 24.--27. "WFI,Wait for Interrupt Stalling support" "Reserved,Supported,?..."
bitfld.quad 0x00 20.--23. "MBF,Memory Barrier Operations support" "Reserved,Reserved,DSB/ISB/DMB,?..."
newline
bitfld.quad 0x00 16.--19. "UTLBMO,TLB Maintenance Operations/Unified Architecture support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,All operations,?..."
bitfld.quad 0x00 12.--15. "HTLBMO,TLB Maintenance Operations/Harvard Architecture support" "Not supported,?..."
bitfld.quad 0x00 8.--11. "HL1CMRO,Cache Maintenance Range Operations/Harvard Architecture support" "Not supported,?..."
newline
bitfld.quad 0x00 4.--7. "HL1BPCRO,Background Prefetch Cache Range Operations/Harvard Architecture support" "Not supported,?..."
bitfld.quad 0x00 0.--3. "HL1FPCRO,Foreground Prefetch Cache Range Operations/Harvard Architecture support" "Not supported,?..."
rgroup.quad spr:0x30017++0x00
line.quad 0x00 "ID_MMFR3_EL1,AArch32 Memory Model Feature Register 3"
bitfld.quad 0x00 28.--31. "SS,Supersection support" "Supported,?..."
bitfld.quad 0x00 24.--27. "CMEMSZ,Cache memory size" "Reserved,Reserved,1TByte,?..."
bitfld.quad 0x00 20.--23. "CW,Coherent walk. Indicates whether translation table updates require a clean to the point of unification" "Reserved,Not required,?..."
newline
bitfld.quad 0x00 16.--19. "PAN,Privileged Access Never support" "Reserved,Reserved,Extended,?..."
bitfld.quad 0x00 12.--15. "MB,Maintenance broadcast support" "Reserved,Reserved,Shareability,?..."
bitfld.quad 0x00 8.--11. "BPM,Invalidate Branch predictor support" "Reserved,Reserved,VA,?..."
newline
bitfld.quad 0x00 4.--7. "HCMOSW,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way support" "Reserved,Supported,?..."
bitfld.quad 0x00 0.--3. "HCMOMVA,Invalidate Cache MVA support" "Reserved,Supported,?..."
rgroup.quad spr:0x30026++0x00
line.quad 0x00 "ID_MMFR4_EL1,AArch32 Memory Model Feature Register 4"
bitfld.quad 0x00 20.--23. "LSM,Load/store multiple" "Not supported,?..."
bitfld.quad 0x00 16.--19. "HD,Hierarchical Permission Disabled support" "Reserved,Reserved,Extended,?..."
bitfld.quad 0x00 12.--15. "CNP,Common not Private support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 8.--11. "XNX,EL0/EL1 execute control distinction at stage2 bit support" "Reserved,Supported,?..."
bitfld.quad 0x00 4.--7. "AC2,Indicates the extension of the HACTLR register using HACTLR2" "Reserved,Supported,?..."
bitfld.quad 0x00 0.--3. "SPECSEI,Describes whether the PE can generate SError interrupt exceptions from speculative reads of memory" "Not possible,?..."
rgroup.quad spr:0x30020++0x00
line.quad 0x00 "ID_ISAR0_EL1,AArch32 Instruction Set Attribute Register 0"
bitfld.quad 0x00 24.--27. "DIVI,Divide instructions support" "Reserved,Reserved,T32/A32,?..."
bitfld.quad 0x00 20.--23. "DEBI,Debug instructions support" "Reserved,Supported,?..."
bitfld.quad 0x00 16.--19. "CI,Coprocessor instructions support" "Not supported,?..."
newline
bitfld.quad 0x00 12.--15. "CBI,Combined Compare and Branch instructions support" "Reserved,Supported,?..."
bitfld.quad 0x00 8.--11. "BI,Bitfield instructions support" "Reserved,Supported,?..."
bitfld.quad 0x00 4.--7. "BCI,Bit Counting instructions support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 0.--3. "SI,Swap instructions support" "Not supported,?..."
rgroup.quad spr:0x30021++0x00
line.quad 0x00 "ID_ISAR1_EL1,AArch32 Instruction Set Attribute Register 1"
bitfld.quad 0x00 28.--31. "JI,Jazelle instructions support" "Reserved,Supported,?..."
bitfld.quad 0x00 24.--27. "INTI,Interwork instructions support" "Reserved,Reserved,Reserved,A32-BX like,?..."
bitfld.quad 0x00 20.--23. "IMMI,Immediate instructions support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 16.--19. "ITEI,If then instructions support" "Reserved,Supported,?..."
bitfld.quad 0x00 12.--15. "EXTI,Extend instructions support" "Reserved,Reserved,Fully supported,?..."
bitfld.quad 0x00 8.--11. "EARI,Exception A and R instructions support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 4.--7. "EXIN,Exception in A32 instructions support" "Reserved,Supported,?..."
bitfld.quad 0x00 0.--3. "ENDI,Endian instructions support" "Reserved,Supported,?..."
rgroup.quad spr:0x30022++0x00
line.quad 0x00 "ID_ISAR2_EL1,AArch32 Instruction Set Attribute Register 2"
bitfld.quad 0x00 28.--31. "RI,Reversal Instructions support" "Reserved,Reserved,REV/REV16/REVSH/RBIT,?..."
bitfld.quad 0x00 24.--27. "PSRI,PSR Instructions support" "Reserved,Supported,?..."
bitfld.quad 0x00 20.--23. "UMI,Advanced Unsigned Multiply Instructions support" "Reserved,Reserved,UMULL/UMLAL/UMAAL,?..."
newline
bitfld.quad 0x00 16.--19. "SMI,Advanced Signed Multiply Instructions support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.quad 0x00 12.--15. "MI,Multiply Instructions support" "Reserved,Reserved,MUL/MLA/MLS,?..."
bitfld.quad 0x00 8.--11. "II,Multi-Access Interruptible Instructions support" "Not supported,?..."
newline
bitfld.quad 0x00 4.--7. "MHI,Memory Hint Instructions support" "Reserved,Reserved,Reserved,Reserved,PLD/PLI/PLDW,?..."
bitfld.quad 0x00 0.--3. "LSI,Load and Store Instructions support" "Reserved,Reserved,Supported,?..."
rgroup.quad spr:0x30023++0x00
line.quad 0x00 "ID_ISAR3_EL1,AArch32 Instruction Set Attribute Register 3"
bitfld.quad 0x00 28.--31. "T32EE,T32EE Instructions support" "Not supported,?..."
bitfld.quad 0x00 24.--27. "NOPI,True NOP instructions support" "Reserved,Supported,?..."
bitfld.quad 0x00 20.--23. "TCI,Thumb copy instructions support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 16.--19. "TBI,Table branch instructions support" "Reserved,Supported,?..."
bitfld.quad 0x00 12.--15. "SPI,Synchronization primitive instructions support [LDREX/STREX/CLREX/LDREXB/STREXB/STREXH/LDREXD/STREXD]" "Reserved,Reserved,Supported,?..."
bitfld.quad 0x00 8.--11. "SVCI,SVC instructions support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 4.--7. "SIMDI,Single instruction multiple data (SIMD) Instructions support" "Reserved,Reserved,Reserved,Full support,?..."
bitfld.quad 0x00 0.--3. "SI,Saturate instructions support" "Reserved,Supported,?..."
rgroup.quad spr:0x30024++0x00
line.quad 0x00 "ID_ISAR4_EL1,AArch32 Instruction Set Attribute Register 4"
bitfld.quad 0x00 28.--31. "SWP_FRAC,Memory System Locking support" "Not supported,?..."
bitfld.quad 0x00 24.--27. "PSR_M_I,PSR_M Instructions support" "Not supported,?..."
bitfld.quad 0x00 20.--23. "SPRI,Synchronization Primitive instructions" "Full support,?..."
newline
bitfld.quad 0x00 16.--19. "BI,Barrier instructions in A32/T32 support" "Reserved,DMB/DSB/ISB,?..."
bitfld.quad 0x00 12.--15. "SMCI,SMC Instructions support" "Not supported,?..."
bitfld.quad 0x00 8.--11. "WBI,Write-Back Instructions support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 4.--7. "WSI,With-Shift Instructions support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.quad 0x00 0.--3. "UI,Unprivileged Instructions support" "Reserved,Reserved,Supported,?..."
rgroup.quad spr:0x30025++0x00
line.quad 0x00 "ID_ISAR5_EL1,AArch32 Instruction Set Attribute Register 5"
bitfld.quad 0x00 24.--27. "RDM,VQRDMLAH and VQRDMLSH instructions support" "Reserved,Supported,?..."
bitfld.quad 0x00 16.--19. "CRC32,CRC32 instructions support" "Reserved,Supported,?..."
bitfld.quad 0x00 12.--15. "SHA2,SHA2 instructions support" "Not supported,Supported,?..."
newline
bitfld.quad 0x00 8.--11. "SHA1,SHA1 instructions support" "Not supported,Supported,?..."
bitfld.quad 0x00 4.--7. "AES,AES instructions support" "Not supported,Reserved,Fully supported,?..."
bitfld.quad 0x00 0.--3. "SEVL,SEVL instructions support" "Reserved,Supported,?..."
rgroup.quad spr:0x30027++0x00
line.quad 0x00 "ID_ISAR6_EL1,AArch32 Instruction Set Attribute Register 6"
bitfld.quad 0x00 4.--7. "DP,Indicates support for dot product instructions (UDOT/VSDOT) in AArch32 state" "Reserved,Implemented,?..."
rgroup.quad spr:0x33001++0x00
line.quad 0x00 "CTR_EL0,Cache Type Register"
bitfld.quad 0x00 28. "IDC,Data cache clean requirements for instruction to data coherence" "Required,Not required"
bitfld.quad 0x00 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,64 bytes,?..."
bitfld.quad 0x00 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,64 bytes,?..."
newline
bitfld.quad 0x00 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,64 bytes,?..."
bitfld.quad 0x00 14.--15. "L1IP,Level 1 instruction cache policy" "Reserved,Reserved,Reserved,PIPT"
bitfld.quad 0x00 0.--3. "IMINLINE,Smallest instruction cache line size" "Reserved,Reserved,Reserved,Reserved,64 bytes,?..."
rgroup.quad spr:0x30005++0x00
line.quad 0x00 "MPIDR_EL1,Multiprocessor Affinity Register"
hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3"
bitfld.quad 0x00 30. "U,Uniprocessor" "Multiprocessor,?..."
bitfld.quad 0x00 24. "MT,Indicates whether the lowest level of affinity consists of logical processors that are implemented using a multi-threading type approach" "Reserved,Very interdependent"
newline
hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1"
hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0"
rgroup.quad spr:0x30006++0x00
line.quad 0x00 "REVIDR_EL1,Revision ID Register"
rgroup.quad spr:0x33007++0x00
line.quad 0x00 "DCZID_EL0,Data Cache Zero ID Register"
bitfld.quad 0x00 4. "DZP,Data zero prohibited. Indicates whether use of rDC ZVA instructions is permitted or prohibited" "Permitted,Prohibited"
bitfld.quad 0x00 0.--3. "BLOCK,Block size" "Reserved,Reserved,Reserved,Reserved,64 bytes,?..."
rgroup.quad spr:0x30030++0x00
line.quad 0x00 "MVFR0_EL1,AArch32 Media And VFP Feature Register 0"
bitfld.quad 0x00 28.--31. "FPROUND,Indicates whether the floating point implementation provides support for rounding modes" "Reserved,Implemented,?..."
bitfld.quad 0x00 24.--27. "FPSHVEC,Indicates whether the floating-point implementation provides support for the use of short vectors" "Not implemented,?..."
bitfld.quad 0x00 20.--23. "FPSQRT,Indicates whether the floating-point implementation provides support for the ARMv6 VFP square root operations" "Reserved,Implemented,?..."
newline
bitfld.quad 0x00 16.--19. "FPDIVIDE,Indicates whether the floating-point implementation provides support for VFP divide operations" "Reserved,Implemented,?..."
bitfld.quad 0x00 12.--15. "FPTRAP,Indicates whether the floating-point implementation provides support for exception trapping" "Not implemented,?..."
bitfld.quad 0x00 8.--11. "FPDP,Indicates whether the floating-point implementation provides support for double-precision operations" "Reserved,Reserved,Implemented,?..."
newline
bitfld.quad 0x00 4.--7. "FPSP,Indicates whether the floating-point implementation provides support for single-precision operations" "Reserved,Reserved,Implemented (VFPv3/VFPv4),?..."
bitfld.quad 0x00 0.--3. "SIMDREG,Indicates whether the Advanced SIMD and floating-point implementation provides support for the Advanced SIMD and floating-point register bank" "Reserved,Reserved,32x64-bit registers,?..."
rgroup.quad spr:0x30031++0x00
line.quad 0x00 "MVFR1_EL1,AArch32 Media And VFP Feature Register 1"
bitfld.quad 0x00 28.--31. "SIMDFMAC,Indicates whether the Advanced SIMD implementation provides fused multiply accumulate instructions" "Reserved,Implemented,?..."
bitfld.quad 0x00 24.--27. "FPHP,Indicates the level of half-precision floating-point support" "Reserved,Reserved,Reserved,Conversions/Arithmetic,?..."
bitfld.quad 0x00 20.--23. "SIMDHP,Indicates the level of half-precision floating-point support" "Reserved,Reserved,Conversions/Arithmetic,?..."
newline
bitfld.quad 0x00 16.--19. "SIMDSP,Indicates whether the floating-point and Advanced SIMD implementation provides single-precision floating-point instructions" "Reserved,Implemented,?..."
bitfld.quad 0x00 12.--15. "SIMDINT,Indicates whether the floating-point and Advanced SIMD implementation provides integer instructions" "Reserved,Implemented,?..."
bitfld.quad 0x00 8.--11. "SIMDLS,Indicates whether the floating-point and Advanced SIMD implementation provides load/store instructions" "Reserved,Implemented,?..."
newline
bitfld.quad 0x00 4.--7. "FPDNAN,Indicates whether the floating-point implementation provides support only for the Default NaN mode" "Reserved,Propagation of NaN values,?..."
bitfld.quad 0x00 0.--3. "FPFTZ,Indicates whether the floating-point implementation provides support only for the Flush-to-Zero mode of operation" "Reserved,Implemented,?..."
rgroup.quad spr:0x30032++0x00
line.quad 0x00 "MVFR2_EL1,AArch32 Media And VFP Feature Register 2"
bitfld.quad 0x00 4.--7. "FPMISC,Indicates whether the floating-point implementation provides support for miscellaneous VFP features" "Reserved,Reserved,Reserved,Reserved,Fully supported,?..."
bitfld.quad 0x00 0.--3. "SIMDMISC,Indicates whether the Advanced SIMD implementation provides support for miscellaneous Advanced SIMD features" "Reserved,Reserved,Reserved,Fully supported,?..."
rgroup.quad spr:0x31007++0x00
line.quad 0x00 "AIDR_EL1,Auxiliary ID Register"
group.quad spr:0x34000++0x00
line.quad 0x00 "VPIDR_EL2,Virtualization Processor ID Register"
hexmask.quad.byte 0x00 24.--31. 1. "IMPL,Implementer code"
bitfld.quad 0x00 20.--23. "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 16.--19. "ARCH,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ID reg. defined"
newline
hexmask.quad.word 0x00 4.--15. 1. "PART,Primary part number"
bitfld.quad 0x00 0.--3. "REV,Revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad spr:0x34005++0x00
line.quad 0x00 "VMPIDR_EL2,Virtualization Multiprocessor ID Register"
hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3"
bitfld.quad 0x00 30. "U,Uniprocessor" "Multiprocessor,Uniprocessor"
bitfld.quad 0x00 24. "MT,Indicates whether the lowest level of affinity consists of logical processors that are implemented using a multi-threading type approach" "Largely independent,Very interdependent"
newline
hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1"
hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0"
tree.end
tree "System Control And Configuration"
group.quad spr:0x30100++0x00
line.quad 0x00 "SCTLR_EL1,System Control Register (EL1)"
bitfld.quad 0x00 44. "DSSBS,Default PSTATE.SSBS value on Exception Entry" "0,1"
bitfld.quad 0x00 26. "UCI,Traps EL0 execution of cache maintenance instructions" "Trapped,Not trapped"
newline
bitfld.quad 0x00 25. "EE,Endianness of data accesses at EL1 and stage 1 translation table walks in the EL1&0 translation regime" "Little,Big"
bitfld.quad 0x00 24. "E0E,Endianness of explicit data accesses at EL0" "Little,Big"
newline
bitfld.quad 0x00 23. "SPAN,Set PSTATE.PAN bit on taking an exception to the EL1 exception level" "Set,Unchanged"
bitfld.quad 0x00 21. "IESB,Implicit Error Synchronization event enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 19. "WXN,Write permission implies XN (Execute Never)" "Disabled,Enabled"
bitfld.quad 0x00 18. "NTWE,Traps EL0 execution of WFE instructions" "Trapped,Not trapped"
newline
bitfld.quad 0x00 16. "NTWI,Traps EL0 execution of WFI instructions" "Trapped,Not trapped"
bitfld.quad 0x00 15. "UCT,Traps EL0 accesses to the CTR_EL0 register" "Trapped,Not trapped"
newline
bitfld.quad 0x00 14. "DZE,Traps EL0 execution of DC ZVA instructions" "Trapped,Not trapped"
bitfld.quad 0x00 12. "I,Instruction cache enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 9. "UMA,User Mask Access. Traps EL0 execution of MSR and MRS instructions that access the PSTATE.{D, A, I, F} masks" "Trapped,Not trapped"
bitfld.quad 0x00 8. "SED,SETEND instruction availability" "No,Yes"
newline
bitfld.quad 0x00 7. "ITD,IT Disable" "No,Yes"
bitfld.quad 0x00 5. "CP15BEN,CP15 Barrier operation enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "SA0,SP Alignment check enable for EL0" "Disabled,Enabled"
bitfld.quad 0x00 3. "SA,SP Alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "C,Data/Unified cache enable" "Disabled,Enabled"
bitfld.quad 0x00 1. "A,Alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "M,MMU enable for EL1&0 stage 1 address translation" "Disabled,Enabled"
group.quad spr:0x35100++0x00
line.quad 0x00 "SCTLR_EL12,System Control Register (EL12)"
bitfld.quad 0x00 44. "DSSBS,Default PSTATE.SSBS value on Exception Entry" "0,1"
bitfld.quad 0x00 26. "UCI,Traps EL0 execution of cache maintenance instructions" "Trapped,Not trapped"
newline
bitfld.quad 0x00 25. "EE,Endianness of data accesses at EL1 and stage 1 translation table walks in the EL1&0 translation regime" "Little,Big"
bitfld.quad 0x00 24. "E0E,Endianness of explicit data accesses at EL0" "Little,Big"
newline
bitfld.quad 0x00 23. "SPAN,Set PSTATE.PAN bit on taking an exception to the EL1 exception level" "Set,Unchanged"
bitfld.quad 0x00 21. "IESB,Implicit Error Synchronization event enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 19. "WXN,Write permission implies XN (Execute Never)" "Disabled,Enabled"
bitfld.quad 0x00 18. "NTWE,Traps EL0 execution of WFE instructions" "Trapped,Not trapped"
newline
bitfld.quad 0x00 16. "NTWI,Traps EL0 execution of WFI instructions" "Trapped,Not trapped"
bitfld.quad 0x00 15. "UCT,Traps EL0 accesses to the CTR_EL0 register" "Trapped,Not trapped"
newline
bitfld.quad 0x00 14. "DZE,Traps EL0 execution of DC ZVA instructions" "Trapped,Not trapped"
bitfld.quad 0x00 12. "I,Instruction cache enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 9. "UMA,User Mask Access. Traps EL0 execution of MSR and MRS instructions that access the PSTATE.{D, A, I, F} masks" "Trapped,Not trapped"
bitfld.quad 0x00 8. "SED,SETEND instruction availability" "No,Yes"
newline
bitfld.quad 0x00 7. "ITD,IT Disable" "No,Yes"
bitfld.quad 0x00 5. "CP15BEN,CP15 Barrier operation enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "SA0,SP Alignment check enable for EL0" "Disabled,Enabled"
bitfld.quad 0x00 3. "SA,SP Alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "C,Data/Unified cache enable" "Disabled,Enabled"
bitfld.quad 0x00 1. "A,Alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "M,MMU enable for EL1&0 stage 1 address translation" "Disabled,Enabled"
if (((per.q(spr:0x34110))&0x408000000)==0x408000000)
group.quad spr:0x34100++0x00
line.quad 0x00 "SCTLR_EL2,System Control Register (EL2)"
bitfld.quad 0x00 44. "DSSBS,Default PSTATE.SSBS value on Exception Entry" "0,1"
bitfld.quad 0x00 26. "UCI,Traps EL0 execution of cache maintenance instructions" "Trapped,Not trapped"
newline
bitfld.quad 0x00 25. "EE,Endianness of data accesses at EL2 and stage 1 translation table walks in the EL2&0 translation regime" "Little,Big"
bitfld.quad 0x00 24. "E0E,Endianness of explicit data accesses at EL0" "Little,Big"
newline
bitfld.quad 0x00 23. "SPAN,Set PSTATE.PAN bit on taking an exception to the EL2 exception level" "Set,Unchanged"
bitfld.quad 0x00 21. "IESB,Implicit Error Synchronization event enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 19. "WXN,Write permission implies XN (Execute Never)" "Disabled,Enabled"
bitfld.quad 0x00 18. "NTWE,Traps EL0 execution of WFE instructions" "Trapped,Not trapped"
newline
bitfld.quad 0x00 16. "NTWI,Traps EL0 execution of WFI instructions" "Trapped,Not trapped"
bitfld.quad 0x00 15. "UCT,Traps EL0 accesses to the CTR_EL0 register" "Trapped,Not trapped"
newline
bitfld.quad 0x00 14. "DZE,Traps EL0 execution of DC ZVA instructions" "Trapped,Not trapped"
bitfld.quad 0x00 12. "I,Instruction cache enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 8. "SED,SETEND instruction availability" "No,Yes"
bitfld.quad 0x00 7. "ITD,IT Disable" "No,Yes"
newline
bitfld.quad 0x00 5. "CP15BEN,CP15 Barrier operation enable" "Disabled,Enabled"
bitfld.quad 0x00 4. "SA0,SP Alignment check enable for EL0" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "SA,SP Alignment check enable" "Disabled,Enabled"
bitfld.quad 0x00 2. "C,Data/Unified cache enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 1. "A,Alignment check enable" "Disabled,Enabled"
bitfld.quad 0x00 0. "M,MMU enable for EL2&0 stage 1 address translation" "Disabled,Enabled"
else
group.quad spr:0x34100++0x00
line.quad 0x00 "SCTLR_EL2,System Control Register (EL2)"
bitfld.quad 0x00 44. "DSSBS,Default PSTATE.SSBS value on Exception Entry" "0,1"
bitfld.quad 0x00 25. "EE,Endianness of data accesses at EL2 and stage 1 translation table walks in the EL2&0 translation regime" "Little,Big"
newline
bitfld.quad 0x00 21. "IESB,Implicit Error Synchronization event enable" "Disabled,Enabled"
bitfld.quad 0x00 19. "WXN,Write permission implies XN (Execute Never)" "Disabled,Enabled"
newline
bitfld.quad 0x00 12. "I,Instruction cache enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "SA,SP Alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "C,Data/Unified cache enable" "Disabled,Enabled"
bitfld.quad 0x00 1. "A,Alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "M,MMU enable for EL2&0 stage 1 address translation" "Disabled,Enabled"
endif
group.quad spr:0x36100++0x00
line.quad 0x00 "SCTLR_EL3,System Control Register (EL3)"
bitfld.quad 0x00 44. "DSSBS,Default PSTATE.SSBS value on Exception Entry" "0,1"
bitfld.quad 0x00 25. "EE,Endianness of data accesses at EL3 and stage 1 translation table walks in the EL3&0 translation regime" "Little,Big"
newline
bitfld.quad 0x00 21. "IESB,Implicit Error Synchronization event enable" "Disabled,Enabled"
bitfld.quad 0x00 19. "WXN,Write permission implies XN (Execute Never)" "Disabled,Enabled"
newline
bitfld.quad 0x00 12. "I,Instruction cache enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "SA,Stack Alignment Check Enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "C,Data/Unified Cache enable" "Disabled,Enabled"
bitfld.quad 0x00 1. "A,Alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "M,MMU enable for EL3&0 stage 1 address translation" "Disabled,Enabled"
group.quad spr:0x30101++0x00
line.quad 0x00 "ACTLR_EL1,Auxiliary Control Register (EL1)"
group.quad spr:0x34101++0x00
line.quad 0x00 "ACTLR_EL2,Auxiliary Control Register (EL2)"
bitfld.quad 0x00 12. "CLUSTERPMUEN,Performance management registers enable" "Trapped,Not trapped"
bitfld.quad 0x00 11. "SMEN,Scheme management registers enable" "Trapped,Not trapped"
newline
bitfld.quad 0x00 10. "TSIDEN,Thread scheme ID register enable" "Trapped,Not trapped"
bitfld.quad 0x00 7. "PWREN,Power Control Registers enable" "Trapped,Not trapped"
newline
bitfld.quad 0x00 5. "ERXPFGEN,Error Record Register enable" "Trapped,Not trapped"
bitfld.quad 0x00 4. "AMEN,Activity Monitor enable" "Trapped,Not trapped"
newline
bitfld.quad 0x00 1. "ECTLREN,Extended control registers enable" "Trapped,Not trapped"
bitfld.quad 0x00 0. "ACTLREN,Auxiliary Control Registers enable" "Trapped,Not trapped"
group.quad spr:0x36101++0x00
line.quad 0x00 "ACTLR_EL3,Auxiliary Control Register (EL3)"
bitfld.quad 0x00 12. "CLUSTERPMUEN,Performance management registers enable" "Trapped,Not trapped"
bitfld.quad 0x00 11. "SMEN,Scheme management registers enable" "Trapped,Not trapped"
newline
bitfld.quad 0x00 10. "TSIDEN,Thread scheme ID register enable" "Trapped,Not trapped"
bitfld.quad 0x00 7. "PWREN,Power Control Registers enable" "Trapped,Not trapped"
newline
bitfld.quad 0x00 5. "ERXPFGEN,Error Record Register enable" "Trapped,Not trapped"
bitfld.quad 0x00 4. "AMEN,Activity Monitor enable" "Trapped,Not trapped"
newline
bitfld.quad 0x00 1. "ECTLREN,Extended control registers enable" "Trapped,Not trapped"
bitfld.quad 0x00 0. "ACTLREN,Auxiliary Control Registers enable" "Trapped,Not trapped"
group.quad spr:0x36111++0x00
line.quad 0x00 "SDER32_EL3,Secure Debug Enable Register"
group.quad spr:0x30F70++0x00
line.quad 0x00 "ATCR_EL1,CPU Auxiliary Translation Control Register (EL1)"
bitfld.quad 0x00 13. "HWVAL160,Value of PBHA[1] on memory accesses due to page table walks using TTBR1_EL1 if HWEN160 is set" "0,1"
bitfld.quad 0x00 12. "HWVAL159,Value of PBHA[0] on memory accesses due to page table walks using TTBR1_EL1 if HWEN159 is set" "0,1"
newline
bitfld.quad 0x00 9. "HWVAL060,Value of PBHA[1] on memory accesses due to page table walks using TTBR0_EL1 if HWEN060 is set" "0,1"
bitfld.quad 0x00 8. "HWVAL059,Value of PBHA[0] on memory accesses due to page table walks using TTBR0_EL1 if HWEN059 is set" "0,1"
newline
bitfld.quad 0x00 5. "HWEN160,Enable use of PBHA[1] on memory accesses due to page table walks using TTBR1_EL1" "0,1"
bitfld.quad 0x00 4. "HWEN159,Enable use of PBHA[0] on memory accesses due to page table walks using TTBR1_EL1" "0,1"
newline
bitfld.quad 0x00 1. "HWEN060,Enable use of PBHA[1] on memory accesses due to page table walks using TTBR0_EL1" "0,1"
bitfld.quad 0x00 0. "HWEN059,Enable use of PBHA[0] on memory accesses due to page table walks using TTBR0_EL1" "0,1"
if (((per.q(spr:0x34110))&0x400000000)==0x400000000)
group.quad spr:0x30F70++0x00
line.quad 0x00 "ATCR_EL12,CPU Auxiliary Translation Control Register (EL12)"
bitfld.quad 0x00 13. "HWVAL160,Value of PBHA[1] on memory accesses due to page table walks using TTBR1_EL1 if HWEN160 is set" "0,1"
bitfld.quad 0x00 12. "HWVAL159,Value of PBHA[0] on memory accesses due to page table walks using TTBR1_EL1 if HWEN159 is set" "0,1"
newline
bitfld.quad 0x00 9. "HWVAL060,Value of PBHA[1] on memory accesses due to page table walks using TTBR0_EL1 if HWEN060 is set" "0,1"
bitfld.quad 0x00 8. "HWVAL059,Value of PBHA[0] on memory accesses due to page table walks using TTBR0_EL1 if HWEN059 is set" "0,1"
newline
bitfld.quad 0x00 5. "HWEN160,Enable use of PBHA[1] on memory accesses due to page table walks using TTBR1_EL1" "0,1"
bitfld.quad 0x00 4. "HWEN159,Enable use of PBHA[0] on memory accesses due to page table walks using TTBR1_EL1" "0,1"
newline
bitfld.quad 0x00 1. "HWEN060,Enable use of PBHA[1] on memory accesses due to page table walks using TTBR0_EL1" "0,1"
bitfld.quad 0x00 0. "HWEN059,Enable use of PBHA[0] on memory accesses due to page table walks using TTBR0_EL1" "0,1"
else
group.quad spr:0x35F70++0x00
line.quad 0x00 "ATCR_EL12,CPU Auxiliary Translation Control Register (EL12)"
endif
group.quad spr:0x34F70++0x00
line.quad 0x00 "ATCR_EL2,CPU Auxiliary Translation Control Register (EL2)"
bitfld.quad 0x00 13. "HWVAL160,Value of PBHA[1] on memory accesses due to page table walks using TTBR1_EL2 if HWEN160 is set" "0,1"
bitfld.quad 0x00 12. "HWVAL159,Value of PBHA[0] on memory accesses due to page table walks using TTBR1_EL2 if HWEN159 is set" "0,1"
newline
bitfld.quad 0x00 9. "HWVAL060,Value of PBHA[1] on memory accesses due to page table walks using TTBR0_EL2 if HWEN060 is set" "0,1"
bitfld.quad 0x00 8. "HWVAL059,Value of PBHA[0] on memory accesses due to page table walks using TTBR0_EL2 if HWEN059 is set" "0,1"
newline
bitfld.quad 0x00 5. "HWEN160,Enable use of PBHA[1] on memory accesses due to page table walks using TTBR1_EL2" "0,1"
bitfld.quad 0x00 4. "HWEN159,Enable use of PBHA[0] on memory accesses due to page table walks using TTBR1_EL2" "0,1"
newline
bitfld.quad 0x00 1. "HWEN060,Enable use of PBHA[1] on memory accesses due to page table walks using TTBR0_EL2" "0,1"
bitfld.quad 0x00 0. "HWEN059,Enable use of PBHA[0] on memory accesses due to page table walks using TTBR0_EL2" "0,1"
group.quad spr:0x36F70++0x00
line.quad 0x00 "ATCR_EL3,CPU Auxiliary Translation Control Register (EL3)"
bitfld.quad 0x00 9. "HWVAL060,Value of PBHA[1] on memory accesses due to page table walks using TTBR0_EL3 if HWEN060 is set" "0,1"
bitfld.quad 0x00 8. "HWVAL059,Value of PBHA[0] on memory accesses due to page table walks using TTBR0_EL3 if HWEN059 is set" "0,1"
newline
bitfld.quad 0x00 1. "HWEN060,Enable use of PBHA[1] on memory accesses due to page table walks using TTBR0_EL3" "0,1"
bitfld.quad 0x00 0. "HWEN059,Enable use of PBHA[0] on memory accesses due to page table walks using TTBR0_EL3" "0,1"
group.quad spr:0x34F71++0x00
line.quad 0x00 "AVTCR_EL2,CPU Virtualization Auxiliary Translation Control Register (EL2)"
bitfld.quad 0x00 9. "HWVAL060,Value of PBHA[1] on memory accesses due to page table walks using TTBR0_EL2 if HWEN060 is set" "0,1"
bitfld.quad 0x00 8. "HWVAL059,Value of PBHA[0] on memory accesses due to page table walks using TTBR0_EL2 if HWEN059 is set" "0,1"
newline
bitfld.quad 0x00 1. "HWEN060,Enable use of PBHA[1] on memory accesses due to page table walks using TTBR0_EL2" "0,1"
bitfld.quad 0x00 0. "HWEN059,Enable use of PBHA[0] on memory accesses due to page table walks using TTBR0_EL2" "0,1"
rgroup.quad spr:0x30F00++0x00
line.quad 0x00 "CPUCFR_EL1,CPU Configuration Register"
bitfld.quad 0x00 0.--1. "ECC,Indicates whether ECC is present or not" "Not present,Present,?..."
group.quad spr:0x30F10++0x00
line.quad 0x00 "CPUACTLR_EL1,CPU Auxiliary Control Register"
group.quad spr:0x30F11++0x00
line.quad 0x00 "CPUACTLR2_EL1,CPU Auxiliary Control Register 2"
group.quad spr:0x30F12++0x00
line.quad 0x00 "CPUACTLR3_EL1,CPU Auxiliary Control Register 3"
group.quad spr:0x30F14++0x00
line.quad 0x00 "CPUECTLR_EL1,CPU Extended Control Register"
bitfld.quad 0x00 61. "MXP_EN,Max-power throttle enable" "Disabled,Enabled"
bitfld.quad 0x00 57.--58. "MXP_TP,Percentage of throttling in the load-store and vector execute units" "60%,50%,40%,30%"
newline
bitfld.quad 0x00 55.--56. "MXP_ATHR,Peak activity threshold at which max-power throttling is triggered" "70%,60%,50%,40%"
bitfld.quad 0x00 54. "MM_VMID_THR,VMID filter threshold" "16,32"
newline
bitfld.quad 0x00 53. "MM_ASP_EN,Allocation of splintered pages in L2 TLB disable" "No,Yes"
bitfld.quad 0x00 52. "MM_CH_DIS,Contiguous hint disable" "No,Yes"
newline
bitfld.quad 0x00 51. "MM_TLBPF_DIS,L2 TLB prefetcher disable" "No,Yes"
bitfld.quad 0x00 49.--50. "HPA_MODE,Hardware page aggregation mode" "Moderately conservative,Aggressive,Moderately aggressive,Conservative"
newline
bitfld.quad 0x00 48. "HPA_CAP,Limited or full hardware page aggregation selection" "Limited,Full"
bitfld.quad 0x00 47. "HPA_L1_DIS,HPA in L1 TLBs disable" "No,Yes"
newline
bitfld.quad 0x00 46. "HPA_DIS,Hardware page aggregation disable" "No,Yes"
bitfld.quad 0x00 43. "L2_FLUSH,Allocation behavior of copybacks caused by L2 cache hardware flush" "Not allocated,Allocated"
newline
bitfld.quad 0x00 40.--41. "PFT_MM,DRAM prefetch using PrefetchTgt transactions for table walk requests" "Disabled,Conservatively,Aggressively,Always"
bitfld.quad 0x00 38.--39. "PFT_LS,DRAM prefetch using PrefetchTgt transactions for load and store requests" "Disabled,Conservatively,Aggressively,Always"
newline
bitfld.quad 0x00 36.--37. "PFT_IF,DRAM prefetch using PrefetchTgt transactions for instruction fetch requests" "Disabled,Conservatively,Aggressively,Always"
bitfld.quad 0x00 35. "CA_UCLEAN_EVICT_EN,Enable sending WriteEvict transactions on the CPU CHI interface" "Disabled,Enabled"
newline
bitfld.quad 0x00 34. "CA_EVICT_DIS,Disable sending of Evict transactions on the CPU CHI interface" "No,Yes"
bitfld.quad 0x00 32. "ATOMIC_ACQ_NEAR,An atomic instruction to WB memory with acquire semantics" "Exclusive,Make up to 1"
newline
bitfld.quad 0x00 31. "ATOMIC_ST_NEAR,A store atomic instruction to WB memory that does not hit in the cache in Exclusive state" "Exclusive,Make up to 1"
bitfld.quad 0x00 30. "ATOMIC_REL_NEAR,An atomic instruction to WB memory with release semantics that does not hit in the cache in Exclusive state" "Exclusive,Make up to 1"
newline
bitfld.quad 0x00 29. "ATOMIC_LD_NEAR,A load atomic (including SWP & CAS) instruction to WB memory that does not hit in the cache in Exclusive state" "Exclusive,Make up to 1"
bitfld.quad 0x00 28. "TLD_PRED_DIS,Transient load prediction disable" "No,Yes"
newline
bitfld.quad 0x00 26. "DTLB_CABT_EN,TLB conflict data abort exception enable" "Disabled,Enabled"
bitfld.quad 0x00 24.--25. "WS_THR_L2,Threshold for direct stream to L2 cache on store" "256B,4KB,8KB,Disabled"
newline
bitfld.quad 0x00 22.--23. "WS_THR_L3,Threshold for direct stream to L3 cache on store" "768B,16KB,32KB,Disabled"
bitfld.quad 0x00 20.--21. "WS_THR_L4,Threshold for direct stream to L4 cache on store" "16KB,64KB,128KB,Disabled"
newline
bitfld.quad 0x00 18.--19. "WS_THR_DRAM,Threshold for direct stream to DRAM on store" "64KB,1MB designated as outer-allocate,1MB irrespective of outer-allocate,Disabled"
bitfld.quad 0x00 17. "WS_THR_DCZVA,Have DCZVA use a lower WS_THR_L2 configuration" "Normal store,One lower stream"
newline
bitfld.quad 0x00 15. "PF_DIS,Data-side hardware prefetching disable" "No,Yes"
bitfld.quad 0x00 12.--13. "PF_SS_L2_DIST,Single cache line stride prefetching L2 distance" "22,28,34,40"
newline
bitfld.quad 0x00 8. "PF_STI_DIS,Store prefetches at issue (not overriden by CPUECTLR_EL1[15]) disable" "No,Yes"
bitfld.quad 0x00 7. "PF_STS_DIS,Store-stride prefetches disable" "No,Yes"
newline
bitfld.quad 0x00 5. "RPF_DIS,Region prefetcher disable" "No,Yes"
bitfld.quad 0x00 4. "RPF_LO_CONF,Region prefetcher training behavior" "Limited,Always"
newline
bitfld.quad 0x00 3. "RPF_PHIT_EN,Region prefetcher propagation on hit enable" "Disabled,Enabled"
bitfld.quad 0x00 0. "EXTLLC,Internal or external Last-level cache in the system" "Internal,External"
group.quad spr:0x36F80++0x00
line.quad 0x00 "CPUPSELR_EL3,Selected Instruction Private Select Register"
group.quad spr:0x36F81++0x00
line.quad 0x00 "CPUPCR_EL3,Selected Instruction Private Control Register"
group.quad spr:0x36F82++0x00
line.quad 0x00 "CPUPOR_EL3,Selected Instruction Private Opcode Register"
group.quad spr:0x36F83++0x00
line.quad 0x00 "CPUPMR_EL3,Selected Instruction Private Mask Register"
group.quad spr:0x30F27++0x00
line.quad 0x00 "CPUPWRCTLR_EL1,CPU Power Control Register"
bitfld.quad 0x00 7.--9. "WFE_RET_CTRL,Wait for Event retention control" "Disabled,2 AT ticks,8 AT ticks,32 AT ticks,64 AT ticks,128 AT ticks,256 AT ticks,512 AT ticks"
bitfld.quad 0x00 4.--6. "WFI_RET_CTRL,Wait for Interrupt retention control" "Disabled,2 AT ticks,8 AT ticks,32 AT ticks,64 AT ticks,128 AT ticks,256 AT ticks,512 AT ticks"
newline
bitfld.quad 0x00 0. "CORE_PWRDN_EN,Indicates to the power controller if the CPU wants to power down when it enters WFE/WFI state" "Not requested,Requested"
group.quad spr:0x30102++0x00
line.quad 0x00 "CPACR_EL1,Architectural Feature Access Control Register (EL1)"
bitfld.quad 0x00 20.--21. "FPEN,Trap EL0/EL1 instructions that access the Advanced SIMD and floating-point registers" "EL0/EL1,EL0,EL0/EL1,Not trapped"
group.quad spr:0x35102++0x00
line.quad 0x00 "CPACR_EL12,Architectural Feature Access Control Register (EL12)"
bitfld.quad 0x00 20.--21. "FPEN,Trap EL0/EL1 instructions that access the Advanced SIMD and floating-point registers" "EL0/EL1,EL0,EL0/EL1,Not trapped"
group.quad spr:0x34112++0x00
line.quad 0x00 "CPTR_EL2,Architectural Feature Trap Register (EL2)"
bitfld.quad 0x00 31. "TCPAC,Trap accesses to CPACR_EL1 register" "Not trapped,Trapped"
bitfld.quad 0x00 10. "TFP,Trap EL0/EL1/EL2 instructions that access the Advanced SIMD and floating-point functionality" "Not trapped,Trapped"
group.quad spr:0x36112++0x00
line.quad 0x00 "CPTR_EL3,Architectural Feature Trap Register (EL3)"
bitfld.quad 0x00 31. "TCPAC,Trap accesses to CPACR_EL1 register" "Not trapped,Trapped"
bitfld.quad 0x00 10. "TFP,Trap EL0/EL1/EL2 instructions that access the Advanced SIMD and floating-point functionality" "Not trapped,Trapped"
group.quad spr:0x36110++0x00
line.quad 0x00 "SCR_EL3,Secure Configuration Register"
bitfld.quad 0x00 15. "TERR,Trap Error record accesses" "Not trapped,Trapped"
bitfld.quad 0x00 14. "TLOR,Trap access to the LOR Registers from Non-secure EL1 and EL2 to EL3" "Not trapped,Trapped"
newline
bitfld.quad 0x00 13. "TWE,Trap EL2/EL1/EL0 execution of WFE instructions to EL3" "Not trapped,Trapped"
bitfld.quad 0x00 12. "TWI,Trap EL2/EL1/EL0 execution of WFI instructions to EL3" "Not trapped,Trapped"
newline
bitfld.quad 0x00 11. "ST,Trap Secure EL1 accesses to the Counter-timer Physical Secure timer registers to EL3" "Trapped,Not trapped"
bitfld.quad 0x00 8. "HCE,Hypervisor Call instruction (HVC) enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 7. "SMD,Secure Monitor Call instruction (SMC) disable" "No,Yes"
bitfld.quad 0x00 3. "EA,External abort and SError interrupt routing" "Abort,Monitor"
newline
bitfld.quad 0x00 2. "FIQ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor"
bitfld.quad 0x00 1. "IRQ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor"
newline
bitfld.quad 0x00 0. "NS,Secure mode" "Secure,Non-secure"
if (((per.q(spr:0x34110))&0x8000000)==0x0000000)&&(((per.q(spr:0x34110))&0x08)==0x08)&&(((per.q(spr:0x34110))&0x10)==0x10)&&(((per.q(spr:0x34110))&0x20)==0x20)
group.quad spr:0x34110++0x00
line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register"
bitfld.quad 0x00 37. "TEA,Route synchronous external abort exceptions to EL2" "Disabled,Enabled"
bitfld.quad 0x00 36. "TERR,Trap Error record accesses" "Not trapped,Trapped"
newline
bitfld.quad 0x00 35. "TLOR,Trap access to the LOR Registers from Non-secure EL1 to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 34. "E2H,EL2 Host" "Disabled,Enabled"
newline
bitfld.quad 0x00 33. "ID,Stage 2 instruction cache disable" "No,Yes"
bitfld.quad 0x00 32. "CD,Stage 2 data cache disable" "No,Yes"
newline
bitfld.quad 0x00 30. "TRVM,Trap reads of virtual memory controls" "Not trapped,Trapped"
bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Not trapped,Trapped"
newline
bitfld.quad 0x00 27. "TGE,Trap General Exceptions from EL0" "Disabled,Enabled"
bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unification to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 23. "TPCP,Trap Data/Unified Cache maintenance instructions to Point of Coherency to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Registers" "Not trapped,Trapped"
bitfld.quad 0x00 20. "TIDCP,Trap IMPLEMENTATION DEFINED functionality" "Not trapped,Trapped"
newline
bitfld.quad 0x00 19. "TSC,Trap SMC instructions" "Not trapped,Trapped"
bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Not trapped,Trapped"
newline
bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Not trapped,Trapped"
bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Not trapped,Trapped"
newline
bitfld.quad 0x00 14. "TWE,Trap WFE instructions" "Not trapped,Trapped"
bitfld.quad 0x00 13. "TWI,Trap WFI instructions" "Not trapped,Trapped"
newline
bitfld.quad 0x00 12. "DC,Default Cacheability" "Disabled,Enabled"
bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. Determines the minimum shareability domain that is applied to any barrier instruction executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System"
newline
bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced"
bitfld.quad 0x00 8. "VSE,Virtual SError interrupt" "No pending,Pending"
newline
bitfld.quad 0x00 7. "VI,Virtual IRQ interrupt" "Not pending,Pending"
bitfld.quad 0x00 6. "VF,Virtual FIQ interrupt" "Not pending,Pending"
newline
bitfld.quad 0x00 5. "AMO,Physical SError interrupt routing" "Disabled,Enabled"
bitfld.quad 0x00 4. "IMO,Physical IRQ routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "FMO,Physical FIQ routing" "Disabled,Enabled"
bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "VM,Virtualization enable. Enables stage 2 address translation for the EL1&0 translation regime" "Disabled,Enabled"
elif (((per.q(spr:0x34110))&0x8000000)==0x0000000)&&(((per.q(spr:0x34110))&0x10)==0x10)&&(((per.q(spr:0x34110))&0x20)==0x20)
group.quad spr:0x34110++0x00
line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register"
bitfld.quad 0x00 37. "TEA,Route synchronous external abort exceptions to EL2" "Disabled,Enabled"
bitfld.quad 0x00 36. "TERR,Trap Error record accesses" "Not trapped,Trapped"
newline
bitfld.quad 0x00 35. "TLOR,Trap access to the LOR Registers from Non-secure EL1 to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 34. "E2H,EL2 Host" "Disabled,Enabled"
newline
bitfld.quad 0x00 33. "ID,Stage 2 instruction cache disable" "No,Yes"
bitfld.quad 0x00 32. "CD,Stage 2 data cache disable" "No,Yes"
newline
bitfld.quad 0x00 30. "TRVM,Trap reads of virtual memory controls" "Not trapped,Trapped"
bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Not trapped,Trapped"
newline
bitfld.quad 0x00 27. "TGE,Trap General Exceptions from EL0" "Disabled,Enabled"
bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unification to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 23. "TPCP,Trap Data/Unified Cache maintenance instructions to Point of Coherency to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Registers" "Not trapped,Trapped"
bitfld.quad 0x00 20. "TIDCP,Trap IMPLEMENTATION DEFINED functionality" "Not trapped,Trapped"
newline
bitfld.quad 0x00 19. "TSC,Trap SMC instructions" "Not trapped,Trapped"
bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Not trapped,Trapped"
newline
bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Not trapped,Trapped"
bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Not trapped,Trapped"
newline
bitfld.quad 0x00 14. "TWE,Trap WFE instructions" "Not trapped,Trapped"
bitfld.quad 0x00 13. "TWI,Trap WFI instructions" "Not trapped,Trapped"
newline
bitfld.quad 0x00 12. "DC,Default Cacheability" "Disabled,Enabled"
bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. Determines the minimum shareability domain that is applied to any barrier instruction executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System"
newline
bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced"
bitfld.quad 0x00 8. "VSE,Virtual SError interrupt" "No pending,Pending"
newline
bitfld.quad 0x00 7. "VI,Virtual IRQ interrupt" "Not pending,Pending"
bitfld.quad 0x00 5. "AMO,Physical SError interrupt routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "IMO,Physical IRQ routing" "Disabled,Enabled"
bitfld.quad 0x00 3. "FMO,Physical FIQ routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
bitfld.quad 0x00 0. "VM,Virtualization enable. Enables stage 2 address translation for the EL1&0 translation regime" "Disabled,Enabled"
elif (((per.q(spr:0x34110))&0x8000000)==0x0000000)&&(((per.q(spr:0x34110))&0x08)==0x08)&&(((per.q(spr:0x34110))&0x10)==0x10)
group.quad spr:0x34110++0x00
line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register"
bitfld.quad 0x00 37. "TEA,Route synchronous external abort exceptions to EL2" "Disabled,Enabled"
bitfld.quad 0x00 36. "TERR,Trap Error record accesses" "Not trapped,Trapped"
newline
bitfld.quad 0x00 35. "TLOR,Trap access to the LOR Registers from Non-secure EL1 to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 34. "E2H,EL2 Host" "Disabled,Enabled"
newline
bitfld.quad 0x00 33. "ID,Stage 2 instruction cache disable" "No,Yes"
bitfld.quad 0x00 32. "CD,Stage 2 data cache disable" "No,Yes"
newline
bitfld.quad 0x00 30. "TRVM,Trap reads of virtual memory controls" "Not trapped,Trapped"
bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Not trapped,Trapped"
newline
bitfld.quad 0x00 27. "TGE,Trap General Exceptions from EL0" "Disabled,Enabled"
bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unification to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 23. "TPCP,Trap Data/Unified Cache maintenance instructions to Point of Coherency to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Registers" "Not trapped,Trapped"
bitfld.quad 0x00 20. "TIDCP,Trap IMPLEMENTATION DEFINED functionality" "Not trapped,Trapped"
newline
bitfld.quad 0x00 19. "TSC,Trap SMC instructions" "Not trapped,Trapped"
bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Not trapped,Trapped"
newline
bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Not trapped,Trapped"
bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Not trapped,Trapped"
newline
bitfld.quad 0x00 14. "TWE,Trap WFE instructions" "Not trapped,Trapped"
bitfld.quad 0x00 13. "TWI,Trap WFI instructions" "Not trapped,Trapped"
newline
bitfld.quad 0x00 12. "DC,Default Cacheability" "Disabled,Enabled"
bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. Determines the minimum shareability domain that is applied to any barrier instruction executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System"
newline
bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced"
bitfld.quad 0x00 8. "VSE,Virtual SError interrupt" "No pending,Pending"
newline
bitfld.quad 0x00 7. "VI,Virtual IRQ interrupt" "Not pending,Pending"
bitfld.quad 0x00 6. "VF,Virtual FIQ interrupt" "Not pending,Pending"
newline
bitfld.quad 0x00 5. "AMO,Physical SError interrupt routing" "Disabled,Enabled"
bitfld.quad 0x00 4. "IMO,Physical IRQ routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "FMO,Physical FIQ routing" "Disabled,Enabled"
bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "VM,Virtualization enable. Enables stage 2 address translation for the EL1&0 translation regime" "Disabled,Enabled"
elif (((per.q(spr:0x34110))&0x8000000)==0x0000000)&&(((per.q(spr:0x34110))&0x08)==0x08)&&(((per.q(spr:0x34110))&0x20)==0x20)
group.quad spr:0x34110++0x00
line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register"
bitfld.quad 0x00 37. "TEA,Route synchronous external abort exceptions to EL2" "Disabled,Enabled"
bitfld.quad 0x00 36. "TERR,Trap Error record accesses" "Not trapped,Trapped"
newline
bitfld.quad 0x00 35. "TLOR,Trap access to the LOR Registers from Non-secure EL1 to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 34. "E2H,EL2 Host" "Disabled,Enabled"
newline
bitfld.quad 0x00 33. "ID,Stage 2 instruction cache disable" "No,Yes"
bitfld.quad 0x00 32. "CD,Stage 2 data cache disable" "No,Yes"
newline
bitfld.quad 0x00 30. "TRVM,Trap reads of virtual memory controls" "Not trapped,Trapped"
bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Not trapped,Trapped"
newline
bitfld.quad 0x00 27. "TGE,Trap General Exceptions from EL0" "Disabled,Enabled"
bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unification to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 23. "TPCP,Trap Data/Unified Cache maintenance instructions to Point of Coherency to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Registers" "Not trapped,Trapped"
bitfld.quad 0x00 20. "TIDCP,Trap IMPLEMENTATION DEFINED functionality" "Not trapped,Trapped"
newline
bitfld.quad 0x00 19. "TSC,Trap SMC instructions" "Not trapped,Trapped"
bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Not trapped,Trapped"
newline
bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Not trapped,Trapped"
bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Not trapped,Trapped"
newline
bitfld.quad 0x00 14. "TWE,Trap WFE instructions" "Not trapped,Trapped"
bitfld.quad 0x00 13. "TWI,Trap WFI instructions" "Not trapped,Trapped"
newline
bitfld.quad 0x00 12. "DC,Default Cacheability" "Disabled,Enabled"
bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. Determines the minimum shareability domain that is applied to any barrier instruction executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System"
newline
bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced"
bitfld.quad 0x00 8. "VSE,Virtual SError interrupt" "No pending,Pending"
newline
bitfld.quad 0x00 6. "VF,Virtual FIQ interrupt" "Not pending,Pending"
bitfld.quad 0x00 5. "AMO,Physical SError interrupt routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "IMO,Physical IRQ routing" "Disabled,Enabled"
bitfld.quad 0x00 3. "FMO,Physical FIQ routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
bitfld.quad 0x00 0. "VM,Virtualization enable. Enables stage 2 address translation for the EL1&0 translation regime" "Disabled,Enabled"
elif (((per.q(spr:0x34110))&0x8000000)==0x0000000)&&(((per.q(spr:0x34110))&0x08)==0x08)
group.quad spr:0x34110++0x00
line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register"
bitfld.quad 0x00 37. "TEA,Route synchronous external abort exceptions to EL2" "Disabled,Enabled"
bitfld.quad 0x00 36. "TERR,Trap Error record accesses" "Not trapped,Trapped"
newline
bitfld.quad 0x00 35. "TLOR,Trap access to the LOR Registers from Non-secure EL1 to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 34. "E2H,EL2 Host" "Disabled,Enabled"
newline
bitfld.quad 0x00 33. "ID,Stage 2 instruction cache disable" "No,Yes"
bitfld.quad 0x00 32. "CD,Stage 2 data cache disable" "No,Yes"
newline
bitfld.quad 0x00 30. "TRVM,Trap reads of virtual memory controls" "Not trapped,Trapped"
bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Not trapped,Trapped"
newline
bitfld.quad 0x00 27. "TGE,Trap General Exceptions from EL0" "Disabled,Enabled"
bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unification to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 23. "TPCP,Trap Data/Unified Cache maintenance instructions to Point of Coherency to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Registers" "Not trapped,Trapped"
bitfld.quad 0x00 20. "TIDCP,Trap IMPLEMENTATION DEFINED functionality" "Not trapped,Trapped"
newline
bitfld.quad 0x00 19. "TSC,Trap SMC instructions" "Not trapped,Trapped"
bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Not trapped,Trapped"
newline
bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Not trapped,Trapped"
bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Not trapped,Trapped"
newline
bitfld.quad 0x00 14. "TWE,Trap WFE instructions" "Not trapped,Trapped"
bitfld.quad 0x00 13. "TWI,Trap WFI instructions" "Not trapped,Trapped"
newline
bitfld.quad 0x00 12. "DC,Default Cacheability" "Disabled,Enabled"
bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. Determines the minimum shareability domain that is applied to any barrier instruction executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System"
newline
bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced"
bitfld.quad 0x00 6. "VF,Virtual FIQ interrupt" "Not pending,Pending"
newline
bitfld.quad 0x00 5. "AMO,Physical SError interrupt routing" "Disabled,Enabled"
bitfld.quad 0x00 4. "IMO,Physical IRQ routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "FMO,Physical FIQ routing" "Disabled,Enabled"
bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "VM,Virtualization enable. Enables stage 2 address translation for the EL1&0 translation regime" "Disabled,Enabled"
elif (((per.q(spr:0x34110))&0x8000000)==0x0000000)&&(((per.q(spr:0x34110))&0x10)==0x10)
group.quad spr:0x34110++0x00
line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register"
bitfld.quad 0x00 37. "TEA,Route synchronous external abort exceptions to EL2" "Disabled,Enabled"
bitfld.quad 0x00 36. "TERR,Trap Error record accesses" "Not trapped,Trapped"
newline
bitfld.quad 0x00 35. "TLOR,Trap access to the LOR Registers from Non-secure EL1 to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 34. "E2H,EL2 Host" "Disabled,Enabled"
newline
bitfld.quad 0x00 33. "ID,Stage 2 instruction cache disable" "No,Yes"
bitfld.quad 0x00 32. "CD,Stage 2 data cache disable" "No,Yes"
newline
bitfld.quad 0x00 30. "TRVM,Trap reads of virtual memory controls" "Not trapped,Trapped"
bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Not trapped,Trapped"
newline
bitfld.quad 0x00 27. "TGE,Trap General Exceptions from EL0" "Disabled,Enabled"
bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unification to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 23. "TPCP,Trap Data/Unified Cache maintenance instructions to Point of Coherency to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Registers" "Not trapped,Trapped"
bitfld.quad 0x00 20. "TIDCP,Trap IMPLEMENTATION DEFINED functionality" "Not trapped,Trapped"
newline
bitfld.quad 0x00 19. "TSC,Trap SMC instructions" "Not trapped,Trapped"
bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Not trapped,Trapped"
newline
bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Not trapped,Trapped"
bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Not trapped,Trapped"
newline
bitfld.quad 0x00 14. "TWE,Trap WFE instructions" "Not trapped,Trapped"
bitfld.quad 0x00 13. "TWI,Trap WFI instructions" "Not trapped,Trapped"
newline
bitfld.quad 0x00 12. "DC,Default Cacheability" "Disabled,Enabled"
bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. Determines the minimum shareability domain that is applied to any barrier instruction executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System"
newline
bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced"
bitfld.quad 0x00 7. "VI,Virtual IRQ interrupt" "Not pending,Pending"
newline
bitfld.quad 0x00 5. "AMO,Physical SError interrupt routing" "Disabled,Enabled"
bitfld.quad 0x00 4. "IMO,Physical IRQ routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "FMO,Physical FIQ routing" "Disabled,Enabled"
bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "VM,Virtualization enable. Enables stage 2 address translation for the EL1&0 translation regime" "Disabled,Enabled"
elif (((per.q(spr:0x34110))&0x8000000)==0x0000000)&&(((per.q(spr:0x34110))&0x20)==0x20)
group.quad spr:0x34110++0x00
line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register"
bitfld.quad 0x00 37. "TEA,Route synchronous external abort exceptions to EL2" "Disabled,Enabled"
bitfld.quad 0x00 36. "TERR,Trap Error record accesses" "Not trapped,Trapped"
newline
bitfld.quad 0x00 35. "TLOR,Trap access to the LOR Registers from Non-secure EL1 to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 34. "E2H,EL2 Host" "Disabled,Enabled"
newline
bitfld.quad 0x00 33. "ID,Stage 2 instruction cache disable" "No,Yes"
bitfld.quad 0x00 32. "CD,Stage 2 data cache disable" "No,Yes"
newline
bitfld.quad 0x00 30. "TRVM,Trap reads of virtual memory controls" "Not trapped,Trapped"
bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Not trapped,Trapped"
newline
bitfld.quad 0x00 27. "TGE,Trap General Exceptions from EL0" "Disabled,Enabled"
bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unification to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 23. "TPCP,Trap Data/Unified Cache maintenance instructions to Point of Coherency to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Registers" "Not trapped,Trapped"
bitfld.quad 0x00 20. "TIDCP,Trap IMPLEMENTATION DEFINED functionality" "Not trapped,Trapped"
newline
bitfld.quad 0x00 19. "TSC,Trap SMC instructions" "Not trapped,Trapped"
bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Not trapped,Trapped"
newline
bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Not trapped,Trapped"
bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Not trapped,Trapped"
newline
bitfld.quad 0x00 14. "TWE,Trap WFE instructions" "Not trapped,Trapped"
bitfld.quad 0x00 13. "TWI,Trap WFI instructions" "Not trapped,Trapped"
newline
bitfld.quad 0x00 12. "DC,Default Cacheability" "Disabled,Enabled"
bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. Determines the minimum shareability domain that is applied to any barrier instruction executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System"
newline
bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced"
bitfld.quad 0x00 8. "VSE,Virtual SError interrupt" "No pending,Pending"
newline
bitfld.quad 0x00 5. "AMO,Physical SError interrupt routing" "Disabled,Enabled"
bitfld.quad 0x00 4. "IMO,Physical IRQ routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "FMO,Physical FIQ routing" "Disabled,Enabled"
bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "VM,Virtualization enable. Enables stage 2 address translation for the EL1&0 translation regime" "Disabled,Enabled"
else
group.quad spr:0x34110++0x00
line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register"
bitfld.quad 0x00 37. "TEA,Route synchronous external abort exceptions to EL2" "Disabled,Enabled"
bitfld.quad 0x00 36. "TERR,Trap Error record accesses" "Not trapped,Trapped"
newline
bitfld.quad 0x00 35. "TLOR,Trap access to the LOR Registers from Non-secure EL1 to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 34. "E2H,EL2 Host" "Disabled,Enabled"
newline
bitfld.quad 0x00 33. "ID,Stage 2 instruction cache disable" "No,Yes"
bitfld.quad 0x00 32. "CD,Stage 2 data cache disable" "No,Yes"
newline
bitfld.quad 0x00 30. "TRVM,Trap reads of virtual memory controls" "Not trapped,Trapped"
bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Not trapped,Trapped"
newline
bitfld.quad 0x00 27. "TGE,Trap General Exceptions from EL0" "Disabled,Enabled"
bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unification to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 23. "TPCP,Trap Data/Unified Cache maintenance instructions to Point of Coherency to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Registers" "Not trapped,Trapped"
bitfld.quad 0x00 20. "TIDCP,Trap IMPLEMENTATION DEFINED functionality" "Not trapped,Trapped"
newline
bitfld.quad 0x00 19. "TSC,Trap SMC instructions" "Not trapped,Trapped"
bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Not trapped,Trapped"
newline
bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Not trapped,Trapped"
bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Not trapped,Trapped"
newline
bitfld.quad 0x00 14. "TWE,Trap WFE instructions" "Not trapped,Trapped"
bitfld.quad 0x00 13. "TWI,Trap WFI instructions" "Not trapped,Trapped"
newline
bitfld.quad 0x00 12. "DC,Default Cacheability" "Disabled,Enabled"
bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. Determines the minimum shareability domain that is applied to any barrier instruction executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System"
newline
bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced"
bitfld.quad 0x00 5. "AMO,Physical SError interrupt routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "IMO,Physical IRQ routing" "Disabled,Enabled"
bitfld.quad 0x00 3. "FMO,Physical FIQ routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
bitfld.quad 0x00 0. "VM,Virtualization enable. Enables stage 2 address translation for the EL1&0 translation regime" "Disabled,Enabled"
endif
group.quad spr:0x30510++0x00
line.quad 0x00 "AFSR0_EL1,Auxiliary Fault Status Register 0 (EL1)"
group.quad spr:0x35510++0x00
line.quad 0x00 "AFSR0_EL12,Auxiliary Fault Status Register 0 (EL12)"
group.quad spr:0x30511++0x00
line.quad 0x00 "AFSR1_EL1,Auxiliary Fault Status Register 1 (EL1)"
group.quad spr:0x35511++0x00
line.quad 0x00 "AFSR1_EL12,Auxiliary Fault Status Register 1 (EL12)"
group.quad spr:0x34510++0x00
line.quad 0x00 "AFSR0_EL2,Auxiliary Fault Status Register 0 (EL2)"
group.quad spr:0x34511++0x00
line.quad 0x00 "AFSR1_EL2,Auxiliary Fault Status Register 1 (EL2)"
group.quad spr:0x36510++0x00
line.quad 0x00 "AFSR0_EL3,Auxiliary Fault Status Register 0 (EL3)"
group.quad spr:0x36511++0x00
line.quad 0x00 "AFSR1_EL3,Auxiliary Fault Status Register 1 (EL3)"
tree.open "Exception Syndrome Registers"
if (((per.q(spr:0x30520))&0xFC000000)==(0x00000000||0x38000000||0x64000000||0x88000000||0x98000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((per.q(spr:0x30520))&0xFC000000)==0x04000000)
if (((per.q(spr:0x30520))&0x01000000)==0x01000000)
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.quad 0x00 0. "TI,Trapped instruction" "WFI,WFE"
else
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
newline
bitfld.quad 0x00 0. "TI,Trapped instruction" "WFI,WFE"
endif
elif (((per.q(spr:0x30520))&0xFC000000)==(0x0C000000||0x14000000||0x20000000))
if (((per.q(spr:0x30520))&0x01000000)==0x01000000)
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 17.--19. "OPC2,Opc2 value from issued instruction" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 14.--16. "OPC1,Opc1 value from issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 10.--13. "CRn,CRn value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 5.--9. "RT,Rt value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 1.--4. "CRm,CRm value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(MCR),Read(MRC/VMRS)"
else
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 17.--19. "OPC2,Opc2 value from issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 14.--16. "OPC1,Opc1 value from issued instruction" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 10.--13. "CRn,CRn value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 5.--9. "RT,Rt value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 1.--4. "CRm,CRm value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(MCR),Read(MRC/VMRS)"
endif
elif (((per.q(spr:0x30520))&0xFC000000)==(0x10000000||0x30000000))
if (((per.q(spr:0x30520))&0x01000000)==0x01000000)
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 16.--19. "OPC1,Opc1 value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 10.--14. "RT2,Rt2 value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 5.--9. "RT,Rt value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 1.--4. "CRm,CRm value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(MCR),Read(MRC/VMRS)"
else
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 16.--19. "OPC1,Opc1 value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 10.--14. "RT2,Rt2 value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 5.--9. "RT,Rt value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 1.--4. "CRm,CRm value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(MCRR),Read(MRRC)"
endif
elif (((per.q(spr:0x30520))&0xFC000000)==0x18000000)
if (((per.q(spr:0x30520))&0x01000000)==0x01000000)
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.quad.byte 0x00 12.--19. 1. "IMM8,Immediate value from issued instruction"
bitfld.quad 0x00 5.--9. "RN,Rn value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 4. "OFFSET,Indicated whether offset is added or subtracted" "Subtract,Add"
bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Unindexed,Post-indexed,Offset,Pre-indexed,?..."
newline
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(STC),Read(LDC)"
else
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
hexmask.quad.byte 0x00 12.--19. 1. "IMM8,Immediate value from issued instruction"
newline
bitfld.quad 0x00 5.--9. "RN,Rn value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 4. "OFFSET,Indicated whether offset is added or subtracted" "Subtract,Add"
newline
bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Unindexed,Post-indexed,Offset,Pre-indexed,?..."
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(STC),Read(LDC)"
endif
elif (((per.q(spr:0x30520))&0xFC000000)==(0x1C000000||0x64000000))
if (((per.q(spr:0x30520))&0x01000000)==0x01000000)
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
else
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
endif
elif (((per.q(spr:0x30520))&0xFC000000)==(0x44000000||0x48000000||0x54000000||0x58000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.quad.word 0x00 0.--15. 1. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((per.q(spr:0x30520))&0xFC000000)==0x60000000)
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 20.--21. "OP0,The Op0 value from the issued instruction" "0,1,2,3"
bitfld.quad 0x00 17.--19. "OP2,The Op2 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 14.--16. "OP1,The Op1 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 10.--13. "CRN,The CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 5.--9. "RT,The Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 1.--4. "CRM,The CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 0. "DIR,Indicates the direction of the trapped instruction" "Write/MSR,Read/MRS"
elif (((per.q(spr:0x30520))&0xFC000000)==(0x80000000||0x84000000||0x90000000||0x94000000))
if (((per.q(spr:0x30520))&0x3F)==0x10)
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 11.--12. "SET,Synchronous Error Type" "UER,Reserved,UC,UEO"
bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes"
newline
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Unsupported atomic hardware,?..."
else
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Unsupported atomic hardware,?..."
endif
elif (((per.q(spr:0x30520))&0xFD000000)==(0x91000000||0x95000000))
if (((per.q(spr:0x30520))&0x3F)==0x10)
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.quad 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.quad 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.quad 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL1 code" "Not generated,Generated"
bitfld.quad 0x00 11.--12. "SET,Synchronous Error Type" "UER,Reserved,UC,UEO"
newline
bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Synchronous tag check fail,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,Reserved,Reserved,Lockdown,Unsupported Exclusive access,?..."
else
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.quad 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.quad 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.quad 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL1 code" "Not generated,Generated"
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Synchronous tag check fail,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,Reserved,Reserved,Lockdown,Unsupported Exclusive access,?..."
endif
elif (((per.q(spr:0x30520))&0xFD000000)==(0x90000000||0x94000000))
if (((per.q(spr:0x30520))&0x3F)==0x10)
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
newline
bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL1 code" "Not generated,Generated"
bitfld.quad 0x00 11.--12. "SET,Synchronous Error Type" "UER,Reserved,UC,UEO"
newline
bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Synchronous tag check fail,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,Reserved,Reserved,Lockdown,Unsupported Exclusive access,?..."
else
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
newline
bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL1 code" "Not generated,Generated"
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Synchronous tag check fail,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,Reserved,Reserved,Lockdown,Unsupported Exclusive access,?..."
endif
elif (((per.q(spr:0x30520))&0xFC800000)==0xB0800000)
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.quad 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.quad 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((per.q(spr:0x30520))&0xFC800000)==(0xA0000000||0xB0000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((per.q(spr:0x30520))&0xFD000000)==0xBC000000)
if (((per.q(spr:0x30520))&0x3F)==0x11)
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "IDS,Implementation defined syndrome" "Not hold,Hold"
bitfld.quad 0x00 13. "IESB,Implicit Error Synchronization Barrier" "Not synchronized,Synchronized"
newline
bitfld.quad 0x00 10.--12. "AET,Asynchronous Error Type" "UC,UEU,UEO,UER,Reserved,Reserved,CE,?..."
bitfld.quad 0x00 9. "EA,External abort type" "No,Yes"
newline
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Uncategorized,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous,?..."
else
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "IDS,Implementation defined syndrome" "Not hold,Hold"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Uncategorized,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous,?..."
endif
elif (((per.q(spr:0x30520))&0xFD000000)==0xBD000000)
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "IDS,Implementation defined syndrome" "Not hold,Hold"
hexmask.quad.tbyte 0x00 0.--23. 1. "ISS,Additional information about the SError interrupt"
elif (((per.q(spr:0x30520))&0xFC000000)==(0xC0000000||0xC4000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug exception,?..."
elif (((per.q(spr:0x30520))&0xFD000000)==(0xC9000000||0xCD000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
bitfld.quad 0x00 6. "EX,Exclusive operation" "No,Yes"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug exception,?..."
elif (((per.q(spr:0x30520))&0xFD000000)==(0xC8000000||0xCC000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug exception,?..."
elif (((per.q(spr:0x30520))&0xFC000000)==(0xD0000000||0xD4000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL1 code" "Not generated,Generated"
bitfld.quad 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug exception,?..."
elif (((per.q(spr:0x30520))&0xFC000000)==(0xE0000000||0xF0000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.quad.word 0x00 0.--15. 1. "COMMENT,Set to the instruction comment field value"
else
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
endif
if (((per.q(spr:0x35520))&0xFC000000)==(0x00000000||0x38000000||0x64000000||0x88000000||0x98000000))
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((per.q(spr:0x35520))&0xFC000000)==0x04000000)
if (((per.q(spr:0x35520))&0x01000000)==0x01000000)
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.quad 0x00 0. "TI,Trapped instruction" "WFI,WFE"
else
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 0. "TI,Trapped instruction" "WFI,WFE"
endif
elif (((per.q(spr:0x35520))&0xFC000000)==(0x0C000000||0x14000000||0x20000000))
if (((per.q(spr:0x35520))&0x01000000)==0x01000000)
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 17.--19. "OPC2,Opc2 value from issued instruction" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 14.--16. "OPC1,Opc1 value from issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 10.--13. "CRn,CRn value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 5.--9. "RT,Rt value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 1.--4. "CRm,CRm value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(MCR),Read(MRC/VMRS)"
else
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 17.--19. "OPC2,Opc2 value from issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 14.--16. "OPC1,Opc1 value from issued instruction" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 10.--13. "CRn,CRn value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 5.--9. "RT,Rt value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 1.--4. "CRm,CRm value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(MCR),Read(MRC/VMRS)"
endif
elif (((per.q(spr:0x35520))&0xFC000000)==(0x10000000||0x30000000))
if (((per.q(spr:0x35520))&0x01000000)==0x01000000)
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 16.--19. "OPC1,Opc1 value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 10.--14. "RT2,Rt2 value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 5.--9. "RT,Rt value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 1.--4. "CRm,CRm value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(MCR),Read(MRC/VMRS)"
else
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 16.--19. "OPC1,Opc1 value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 10.--14. "RT2,Rt2 value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 5.--9. "RT,Rt value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 1.--4. "CRm,CRm value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(MCRR),Read(MRRC)"
endif
elif (((per.q(spr:0x35520))&0xFC000000)==0x18000000)
if (((per.q(spr:0x35520))&0x01000000)==0x01000000)
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.quad.byte 0x00 12.--19. 1. "IMM8,Immediate value from issued instruction"
bitfld.quad 0x00 5.--9. "RN,Rn value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 4. "OFFSET,Indicated whether offset is added or subtracted" "Subtract,Add"
bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Unindexed,Post-indexed,Offset,Pre-indexed,?..."
newline
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(STC),Read(LDC)"
else
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
hexmask.quad.byte 0x00 12.--19. 1. "IMM8,Immediate value from issued instruction"
newline
bitfld.quad 0x00 5.--9. "RN,Rn value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 4. "OFFSET,Indicated whether offset is added or subtracted" "Subtract,Add"
newline
bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Unindexed,Post-indexed,Offset,Pre-indexed,?..."
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(STC),Read(LDC)"
endif
elif (((per.q(spr:0x35520))&0xFC000000)==(0x1C000000||0x64000000))
if (((per.q(spr:0x35520))&0x01000000)==0x01000000)
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
else
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
endif
elif (((per.q(spr:0x35520))&0xFC000000)==(0x44000000||0x48000000||0x54000000||0x58000000))
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.quad.word 0x00 0.--15. 1. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((per.q(spr:0x35520))&0xFC000000)==0x60000000)
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 20.--21. "OP0,The Op0 value from the issued instruction" "0,1,2,3"
bitfld.quad 0x00 17.--19. "OP2,The Op2 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 14.--16. "OP1,The Op1 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 10.--13. "CRN,The CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 5.--9. "RT,The Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 1.--4. "CRM,The CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 0. "DIR,Indicates the direction of the trapped instruction" "Write/MSR,Read/MRS"
elif (((per.q(spr:0x35520))&0xFC000000)==(0x80000000||0x84000000||0x90000000||0x94000000))
if (((per.q(spr:0x35520))&0x3F)==0x10)
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 11.--12. "SET,Synchronous Error Type" "UER,Reserved,UC,UEO"
newline
bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Unsupported atomic hardware,?..."
else
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Unsupported atomic hardware,?..."
endif
elif (((per.q(spr:0x35520))&0xFD000000)==(0x91000000||0x95000000))
if (((per.q(spr:0x35520))&0x3F)==0x10)
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.quad 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.quad 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.quad 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL12 code" "Not generated,Generated"
bitfld.quad 0x00 11.--12. "SET,Synchronous Error Type" "UER,Reserved,UC,UEO"
newline
bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Synchronous tag check fail,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,Reserved,Reserved,Lockdown,Unsupported Exclusive access,?..."
else
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.quad 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.quad 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.quad 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL12 code" "Not generated,Generated"
newline
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Synchronous tag check fail,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,Reserved,Reserved,Lockdown,Unsupported Exclusive access,?..."
endif
elif (((per.q(spr:0x35520))&0xFD000000)==(0x90000000||0x94000000))
if (((per.q(spr:0x35520))&0x3F)==0x10)
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
newline
bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL12 code" "Not generated,Generated"
bitfld.quad 0x00 11.--12. "SET,Synchronous Error Type" "UER,Reserved,UC,UEO"
newline
bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Synchronous tag check fail,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,Reserved,Reserved,Lockdown,Unsupported Exclusive access,?..."
else
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
newline
bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL12 code" "Not generated,Generated"
newline
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Synchronous tag check fail,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,Reserved,Reserved,Lockdown,Unsupported Exclusive access,?..."
endif
elif (((per.q(spr:0x35520))&0xFC800000)==0xB0800000)
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.quad 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.quad 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((per.q(spr:0x35520))&0xFC800000)==(0xA0000000||0xB0000000))
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((per.q(spr:0x35520))&0xFD000000)==0xBC000000)
if (((per.q(spr:0x35520))&0x3F)==0x11)
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "IDS,Implementation defined syndrome" "Not hold,Hold"
bitfld.quad 0x00 13. "IESB,Implicit Error Synchronization Barrier" "Not synchronized,Synchronized"
newline
bitfld.quad 0x00 10.--12. "AET,Asynchronous Error Type" "UC,UEU,UEO,UER,Reserved,Reserved,CE,?..."
bitfld.quad 0x00 9. "EA,External abort type" "No,Yes"
newline
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Uncategorized,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous,?..."
else
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "IDS,Implementation defined syndrome" "Not hold,Hold"
newline
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Uncategorized,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous,?..."
endif
elif (((per.q(spr:0x35520))&0xFD000000)==0xBD000000)
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "IDS,Implementation defined syndrome" "Not hold,Hold"
hexmask.quad.tbyte 0x00 0.--23. 1. "ISS,Additional information about the SError interrupt"
elif (((per.q(spr:0x35520))&0xFC000000)==(0xC0000000||0xC4000000))
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug exception,?..."
elif (((per.q(spr:0x35520))&0xFD000000)==(0xC9000000||0xCD000000))
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
bitfld.quad 0x00 6. "EX,Exclusive operation" "No,Yes"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug exception,?..."
elif (((per.q(spr:0x35520))&0xFD000000)==(0xC8000000||0xCC000000))
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug exception,?..."
elif (((per.q(spr:0x35520))&0xFC000000)==(0xD0000000||0xD4000000))
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL12 code" "Not generated,Generated"
newline
bitfld.quad 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
newline
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug exception,?..."
elif (((per.q(spr:0x35520))&0xFC000000)==(0xE0000000||0xF0000000))
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.quad.word 0x00 0.--15. 1. "COMMENT,Set to the instruction comment field value"
else
group.quad spr:0x35520++0x00
line.quad 0x00 "ESR_EL12,Exception Syndrome Register (EL12)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
endif
if (((per.q(spr:0x34520))&0xFC000000)==(0x00000000||0x38000000||0x64000000||0x88000000||0x98000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((per.q(spr:0x34520))&0xFC000000)==0x04000000)
if (((per.q(spr:0x34520))&0x01000000)==0x01000000)
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.quad 0x00 0. "TI,Trapped instruction" "WFI,WFE"
else
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
newline
bitfld.quad 0x00 0. "TI,Trapped instruction" "WFI,WFE"
endif
elif (((per.q(spr:0x34520))&0xFC000000)==(0x0C000000||0x14000000||0x20000000))
if (((per.q(spr:0x34520))&0x01000000)==0x01000000)
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 17.--19. "OPC2,Opc2 value from issued instruction" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 14.--16. "OPC1,Opc1 value from issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 10.--13. "CRn,CRn value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 5.--9. "RT,Rt value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 1.--4. "CRm,CRm value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(MCR),Read(MRC/VMRS)"
else
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 17.--19. "OPC2,Opc2 value from issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 14.--16. "OPC1,Opc1 value from issued instruction" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 10.--13. "CRn,CRn value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 5.--9. "RT,Rt value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 1.--4. "CRm,CRm value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(MCR),Read(MRC/VMRS)"
endif
elif (((per.q(spr:0x34520))&0xFC000000)==(0x10000000||0x30000000))
if (((per.q(spr:0x34520))&0x01000000)==0x01000000)
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 16.--19. "OPC1,Opc1 value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 10.--14. "RT2,Rt2 value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 5.--9. "RT,Rt value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 1.--4. "CRm,CRm value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(MCR),Read(MRC/VMRS)"
else
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 16.--19. "OPC1,Opc1 value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 10.--14. "RT2,Rt2 value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 5.--9. "RT,Rt value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 1.--4. "CRm,CRm value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(MCRR),Read(MRRC)"
endif
elif (((per.q(spr:0x34520))&0xFC000000)==0x18000000)
if (((per.q(spr:0x34520))&0x01000000)==0x01000000)
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.quad.byte 0x00 12.--19. 1. "IMM8,Immediate value from issued instruction"
bitfld.quad 0x00 5.--9. "RN,Rn value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 4. "OFFSET,Indicated whether offset is added or subtracted" "Subtract,Add"
bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Unindexed,Post-indexed,Offset,Pre-indexed,?..."
newline
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(STC),Read(LDC)"
else
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
hexmask.quad.byte 0x00 12.--19. 1. "IMM8,Immediate value from issued instruction"
newline
bitfld.quad 0x00 5.--9. "RN,Rn value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 4. "OFFSET,Indicated whether offset is added or subtracted" "Subtract,Add"
newline
bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Unindexed,Post-indexed,Offset,Pre-indexed,?..."
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(STC),Read(LDC)"
endif
elif (((per.q(spr:0x34520))&0xFC000000)==(0x1C000000||0x64000000))
if (((per.q(spr:0x34520))&0x01000000)==0x01000000)
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
else
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
endif
elif (((per.q(spr:0x34520))&0xFC000000)==(0x44000000||0x48000000||0x54000000||0x58000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.quad.word 0x00 0.--15. 1. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((per.q(spr:0x34520))&0xFC000000)==(0x4C000000||0x5C000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
hexmask.quad.word 0x00 0.--15. 1. "IMM16,The value of the immediate field from the SMC instruction"
elif (((per.q(spr:0x34520))&0xFC000000)==0x60000000)
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 20.--21. "OP0,The Op0 value from the issued instruction" "0,1,2,3"
bitfld.quad 0x00 17.--19. "OP2,The Op2 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 14.--16. "OP1,The Op1 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 10.--13. "CRN,The CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 5.--9. "RT,The Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 1.--4. "CRM,The CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 0. "DIR,Indicates the direction of the trapped instruction" "Write/MSR,Read/MRS"
elif (((per.q(spr:0x34520))&0xFC000000)==(0x80000000||0x84000000||0x90000000||0x94000000))
if (((per.q(spr:0x34520))&0x3F)==0x10)
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 11.--12. "SET,Synchronous Error Type" "UER,Reserved,UC,UEO"
newline
bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Unsupported atomic hardware,?..."
else
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
newline
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Unsupported atomic hardware,?..."
endif
elif (((per.q(spr:0x34520))&0xFD000000)==(0x91000000||0x95000000))
if (((per.q(spr:0x34520))&0x3F)==0x10)
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.quad 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.quad 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.quad 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL2 code" "Not generated,Generated"
bitfld.quad 0x00 11.--12. "SET,Synchronous Error Type" "UER,Reserved,UC,UEO"
newline
bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Synchronous tag check fail,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,Reserved,Reserved,Lockdown,Unsupported Exclusive access,?..."
else
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.quad 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.quad 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.quad 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL2 code" "Not generated,Generated"
newline
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Synchronous tag check fail,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,Reserved,Reserved,Lockdown,Unsupported Exclusive access,?..."
endif
elif (((per.q(spr:0x34520))&0xFD000000)==(0x90000000||0x94000000))
if (((per.q(spr:0x34520))&0x3F)==0x10)
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
newline
bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL2 code" "Not generated,Generated"
bitfld.quad 0x00 11.--12. "SET,Synchronous Error Type" "UER,Reserved,UC,UEO"
newline
bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Synchronous tag check fail,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,Reserved,Reserved,Lockdown,Unsupported Exclusive access,?..."
else
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
newline
bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL2 code" "Not generated,Generated"
newline
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Synchronous tag check fail,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,Reserved,Reserved,Lockdown,Unsupported Exclusive access,?..."
endif
elif (((per.q(spr:0x34520))&0xFC800000)==0xB0800000)
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
newline
bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.quad 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.quad 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.quad 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((per.q(spr:0x34520))&0xFC800000)==(0xA0000000||0xB0000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((per.q(spr:0x34520))&0xFD000000)==0xBC000000)
if (((per.q(spr:0x34520))&0x3F)==0x11)
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "IDS,Implementation defined syndrome" "Not hold,Hold"
bitfld.quad 0x00 13. "IESB,Implicit Error Synchronization Barrier" "Not synchronized,Synchronized"
newline
bitfld.quad 0x00 10.--12. "AET,Asynchronous Error Type" "UC,UEU,UEO,UER,Reserved,Reserved,CE,?..."
bitfld.quad 0x00 9. "EA,External abort type" "No,Yes"
newline
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Uncategorized,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous,?..."
else
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "IDS,Implementation defined syndrome" "Not hold,Hold"
newline
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Uncategorized,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous,?..."
endif
elif (((per.q(spr:0x34520))&0xFD000000)==0xBD000000)
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "IDS,Implementation defined syndrome" "Not hold,Hold"
hexmask.quad.tbyte 0x00 0.--23. 1. "ISS,Additional information about the SError interrupt"
elif (((per.q(spr:0x34520))&0xFC000000)==(0xC0000000||0xC4000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug exception,?..."
elif (((per.q(spr:0x34520))&0xFD000000)==(0xC9000000||0xCD000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
bitfld.quad 0x00 6. "EX,Exclusive operation" "No,Yes"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug exception,?..."
elif (((per.q(spr:0x34520))&0xFD000000)==(0xC8000000||0xCC000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug exception,?..."
elif (((per.q(spr:0x34520))&0xFC000000)==(0xD0000000||0xD4000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL2 code" "Not generated,Generated"
newline
bitfld.quad 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
newline
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug exception,?..."
elif (((per.q(spr:0x34520))&0xFC000000)==(0xE0000000||0xF0000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.quad.word 0x00 0.--15. 1. "COMMENT,Set to the instruction comment field value"
else
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
endif
if (((per.q(spr:0x36520))&0xFC000000)==(0x00000000||0x38000000||0x64000000||0x88000000||0x98000000))
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((per.q(spr:0x36520))&0xFC000000)==0x04000000)
if (((per.q(spr:0x36520))&0x01000000)==0x01000000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.quad 0x00 0. "TI,Trapped instruction" "WFI,WFE"
else
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
newline
bitfld.quad 0x00 0. "TI,Trapped instruction" "WFI,WFE"
endif
elif (((per.q(spr:0x36520))&0xFC000000)==(0x0C000000||0x14000000||0x20000000))
if (((per.q(spr:0x36520))&0x01000000)==0x01000000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 17.--19. "OPC2,Opc2 value from issued instruction" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 14.--16. "OPC1,Opc1 value from issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 10.--13. "CRn,CRn value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 5.--9. "RT,Rt value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 1.--4. "CRm,CRm value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(MCR),Read(MRC/VMRS)"
else
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 17.--19. "OPC2,Opc2 value from issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 14.--16. "OPC1,Opc1 value from issued instruction" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 10.--13. "CRn,CRn value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 5.--9. "RT,Rt value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 1.--4. "CRm,CRm value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(MCR),Read(MRC/VMRS)"
endif
elif (((per.q(spr:0x36520))&0xFC000000)==(0x10000000||0x30000000))
if (((per.q(spr:0x36520))&0x01000000)==0x01000000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 16.--19. "OPC1,Opc1 value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 10.--14. "RT2,Rt2 value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 5.--9. "RT,Rt value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 1.--4. "CRm,CRm value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(MCR),Read(MRC/VMRS)"
else
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 16.--19. "OPC1,Opc1 value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 10.--14. "RT2,Rt2 value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 5.--9. "RT,Rt value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 1.--4. "CRm,CRm value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(MCRR),Read(MRRC)"
endif
elif (((per.q(spr:0x36520))&0xFC000000)==0x18000000)
if (((per.q(spr:0x36520))&0x01000000)==0x01000000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.quad.byte 0x00 12.--19. 1. "IMM8,Immediate value from issued instruction"
bitfld.quad 0x00 5.--9. "RN,Rn value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 4. "OFFSET,Indicated whether offset is added or subtracted" "Subtract,Add"
bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Unindexed,Post-indexed,Offset,Pre-indexed,?..."
newline
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(STC),Read(LDC)"
else
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
hexmask.quad.byte 0x00 12.--19. 1. "IMM8,Immediate value from issued instruction"
newline
bitfld.quad 0x00 5.--9. "RN,Rn value from issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 4. "OFFSET,Indicated whether offset is added or subtracted" "Subtract,Add"
newline
bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Unindexed,Post-indexed,Offset,Pre-indexed,?..."
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write(STC),Read(LDC)"
endif
elif (((per.q(spr:0x36520))&0xFC000000)==(0x1C000000||0x64000000))
if (((per.q(spr:0x36520))&0x01000000)==0x01000000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
else
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
endif
elif (((per.q(spr:0x36520))&0xFC000000)==(0x44000000||0x48000000||0x54000000||0x58000000))
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.quad.word 0x00 0.--15. 1. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((per.q(spr:0x36520))&0xFC000000)==(0x4C000000||0x5C000000))
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
hexmask.quad.word 0x00 0.--15. 1. "IMM16,The value of the immediate field from the SMC instruction"
elif (((per.q(spr:0x36520))&0xFC000000)==0x60000000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 20.--21. "OP0,The Op0 value from the issued instruction" "0,1,2,3"
bitfld.quad 0x00 17.--19. "OP2,The Op2 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 14.--16. "OP1,The Op1 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 10.--13. "CRN,The CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 5.--9. "RT,The Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 1.--4. "CRM,The CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 0. "DIR,Indicates the direction of the trapped instruction" "Write/MSR,Read/MRS"
elif (((per.l(spr:0x36520))&0xFC000000)==0x7C000000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Exception_PACTrap,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.quad 0x00 0.--24. 1. "IMPL_DEF,Implementation defined"
elif (((per.q(spr:0x36520))&0xFC000000)==(0x80000000||0x84000000||0x90000000||0x94000000))
if (((per.q(spr:0x36520))&0x3F)==0x10)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 11.--12. "SET,Synchronous Error Type" "UER,Reserved,UC,UEO"
newline
bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Unsupported atomic hardware,?..."
else
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
newline
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Unsupported atomic hardware,?..."
endif
elif (((per.q(spr:0x36520))&0xFD000000)==(0x91000000||0x95000000))
if (((per.q(spr:0x36520))&0x3F)==0x10)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.quad 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.quad 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.quad 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL3 code" "Not generated,Generated"
bitfld.quad 0x00 11.--12. "SET,Synchronous Error Type" "UER,Reserved,UC,UEO"
newline
bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Synchronous tag check fail,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,Reserved,Reserved,Lockdown,Unsupported Exclusive access,?..."
else
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.quad 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.quad 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.quad 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL3 code" "Not generated,Generated"
newline
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Synchronous tag check fail,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,Reserved,Reserved,Lockdown,Unsupported Exclusive access,?..."
endif
elif (((per.q(spr:0x36520))&0xFD000000)==(0x90000000||0x94000000))
if (((per.q(spr:0x36520))&0x3F)==0x10)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
newline
bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL3 code" "Not generated,Generated"
bitfld.quad 0x00 11.--12. "SET,Synchronous Error Type" "UER,Reserved,UC,UEO"
newline
bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Synchronous tag check fail,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,Reserved,Reserved,Lockdown,Unsupported Exclusive access,?..."
else
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
newline
bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL3 code" "Not generated,Generated"
newline
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Synchronous tag check fail,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,Reserved,Reserved,Lockdown,Unsupported Exclusive access,?..."
endif
elif (((per.q(spr:0x36520))&0xFC800000)==0xB0800000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.quad 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.quad 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((per.q(spr:0x36520))&0xFC800000)==(0xA0000000||0xB0000000))
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((per.q(spr:0x36520))&0xFD000000)==0xBC000000)
if (((per.q(spr:0x36520))&0x3F)==0x11)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "IDS,Implementation defined syndrome" "Not hold,Hold"
bitfld.quad 0x00 13. "IESB,Implicit Error Synchronization Barrier" "Not synchronized,Synchronized"
newline
bitfld.quad 0x00 10.--12. "AET,Asynchronous Error Type" "UC,UEU,UEO,UER,Reserved,Reserved,CE,?..."
bitfld.quad 0x00 9. "EA,External abort type" "No,Yes"
newline
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Uncategorized,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous,?..."
else
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "IDS,Implementation defined syndrome" "Not hold,Hold"
newline
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Uncategorized,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous,?..."
endif
elif (((per.q(spr:0x36520))&0xFD000000)==0xBD000000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "IDS,Implementation defined syndrome" "Not hold,Hold"
hexmask.quad.tbyte 0x00 0.--23. 1. "ISS,Additional information about the SError interrupt"
elif (((per.q(spr:0x36520))&0xFC000000)==(0xC0000000||0xC4000000))
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug exception,?..."
elif (((per.q(spr:0x36520))&0xFD000000)==(0xC9000000||0xCD000000))
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
bitfld.quad 0x00 6. "EX,Exclusive operation" "No,Yes"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug exception,?..."
elif (((per.q(spr:0x36520))&0xFD000000)==(0xC8000000||0xCC000000))
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug exception,?..."
elif (((per.q(spr:0x36520))&0xFC000000)==(0xD0000000||0xD4000000))
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 13. "VNCR,Fault came from use of VNCR_EL2 register by EL3 code" "Not generated,Generated"
bitfld.quad 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug exception,?..."
elif (((per.q(spr:0x36520))&0xFC000000)==(0xE0000000||0xF0000000))
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.quad.word 0x00 0.--15. 1. "COMMENT,Set to the instruction comment field value"
else
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,Reserved,Reserved,Reserved,Reserved,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,Reserved,BTI instruction,Illegal execution,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Access to SVE,Reserved,TSTART instructions,Authorization failure,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/AArch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..."
endif
tree.end
newline
rgroup.quad spr:0x30530++0x00
line.quad 0x00 "ERRIDR_EL1,Error ID Register"
hexmask.quad.word 0x00 0.--15. 1. "NUM,Number of records that can be accessed through the Error Record system registers"
group.quad spr:0x30531++0x00
line.quad 0x00 "ERRSELR_EL1,Error Record Select Register"
bitfld.quad 0x00 0. "SEL,Selects the record accessed through the ERX registers" "Record 0,Record 1"
if (((per.q(spr:0x30531))&0x01)==0x00)
rgroup.quad spr:0x30540++0x00
line.quad 0x00 "ERXFR_EL1,Selected Error Record Feature Register - ERR0FR - Record 0"
bitfld.quad 0x00 18.--19. "CEO,Corrected error overwrite" "No overwrite,?..."
bitfld.quad 0x00 16.--17. "DUI,Error recovery interrupt for deferred errors" "Not supported,?..."
newline
bitfld.quad 0x00 15. "RP,Repeat counter" "Reserved,Implemented"
bitfld.quad 0x00 12.--14. "CEC,Corrected error counter" "Reserved,Reserved,Implemented/8-bit,?..."
newline
bitfld.quad 0x00 10.--11. "CFI,Fault handling interrupt for corrected errors" "Reserved,Reserved,Implemented,?..."
bitfld.quad 0x00 8.--9. "UE,In-band uncorrected error reporting" "Reserved,Implemented,?..."
newline
bitfld.quad 0x00 6.--7. "FI,Fault handling interrupt" "Reserved,Reserved,Implemented,?..."
bitfld.quad 0x00 4.--5. "UI,Error recovery interrupt for uncorrected errors" "Reserved,Reserved,Implemented,?..."
newline
bitfld.quad 0x00 0.--1. "ED,Error detection and correction[Lock/Split]" "Reserved,Reserved,Implemented,?..."
group.quad spr:0x30541++0x00
line.quad 0x00 "ERXCTLR_EL1,Selected Error Record Control Register - ER0CTLR - Record 0"
bitfld.quad 0x00 8. "CFI,Fault handling interrupt for corrected errors enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "FI,Fault handling interrupt enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "UI,Uncorrected error recovery interrupt enable" "Disabled,Enabled"
bitfld.quad 0x00 0. "ED,Error detection and correction enable" "Disabled,Enabled"
group.quad spr:0x30542++0x00
line.quad 0x00 "ERXSTATUS_EL1,Selected Error Record Status Register - ER0STATUS - Record 0"
bitfld.quad 0x00 31. "AV,Address valid" "Not valid,Valid"
bitfld.quad 0x00 30. "V,Status register valid" "Not valid,Valid"
newline
bitfld.quad 0x00 29. "UE,Uncorrected Error" "No error,>=1 error"
bitfld.quad 0x00 28. "ER,Error reported" "No error,Error"
newline
bitfld.quad 0x00 27. "OF,Error overflow" "No error,>=1 error"
bitfld.quad 0x00 26. "MV,Miscellaneous registers valid" "Not valid,Valid"
newline
bitfld.quad 0x00 24.--25. "CE,Corrected errors" "No error,>=1 transient,>=1 error,>=1 persistent"
bitfld.quad 0x00 23. "DE,Deferred errors" "No error,>=1 error"
newline
bitfld.quad 0x00 22. "PN,Poison" "Cannot distinguish,?..."
bitfld.quad 0x00 20.--21. "UET,Uncorrected error type" "UC,?..."
newline
bitfld.quad 0x00 0.--4. "SERR,Primary error code" "No error,Reserved,Internal data buffer,Reserved,Reserved,Reserved,Cache data RAM,Cache tag/dirty RAM,TLB data RAM,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Cache copyback,Not supported,?..."
group.quad spr:0x30544++0x00
line.quad 0x00 "ERXPFGF_EL1,Selected Pseudo Fault Generation Feature Register - ER0PFGF - Record 0"
bitfld.quad 0x00 31. "PFG,Pseudo fault generation" "Reserved,Supported"
bitfld.quad 0x00 30. "R,Restartable bit" "Reserved,Supported"
newline
bitfld.quad 0x00 6. "CE,Corrected error generation" "Reserved,Supported"
bitfld.quad 0x00 5. "DE,Deferred error generation" "Reserved,Supported"
newline
bitfld.quad 0x00 4. "UEO,Latent or restartable error generation" "Not supported,?..."
bitfld.quad 0x00 3. "UER,Signalled or recoverable error generation" "Not supported,?..."
newline
bitfld.quad 0x00 2. "UEU,Unrecoverable error generation" "Not supported,?..."
bitfld.quad 0x00 1. "UC,Uncontainable error generation" "Reserved,Supported"
group.quad spr:0x30545++0x00
line.quad 0x00 "ERXPFGCTL_EL1,Selected Error Pseudo Fault Generation Control Register - ER0PFGCTL - Record 0"
bitfld.quad 0x00 31. "CDNEN,Countdown enable. Control transfers from the value that is held in the ERR0PFGCDN into the Error Generation Counter" "Disabled,Enabled"
bitfld.quad 0x00 30. "R,Restart. Controls whether on reaching zero the Error Generation Counter restarts from the ext-CLUSTERRAS_ERR0PFGCDN value or stops" "Disabled,Enabled"
newline
bitfld.quad 0x00 6. "CE,Corrected error generation enable" "No error,Non-specific"
bitfld.quad 0x00 5. "DE,Deferred error generation enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 1. "UC,Uncontainable error generation enable" "Disabled,Enabled"
group.quad spr:0x30546++0x00
line.quad 0x00 "ERXPFGCDN_EL1,Selected Error Pseudo Fault Generation Count Down Register - ER0PFGCDN_EL1 - Record 0"
hexmask.quad.long 0x00 0.--31. 1. "CDN,Countdown value"
group.quad spr:0x30543++0x00
line.quad 0x00 "ERXADDR_EL1,Selected Error Record Address Register"
bitfld.quad 0x00 63. "NS,Non-secure attribute" "Secure,Non-secure"
hexmask.quad 0x00 0.--39. 1. "PADDR,Physical Address"
group.quad spr:0x30550++0x00
line.quad 0x00 "ERXMISC0_EL1,Selected Error Record Miscellaneous Register 0 - ER0MISC0_EL1 - Record 0"
bitfld.quad 0x00 47. "OFO,Sticky overflow bit for other errors" "No overflow,Overflow"
hexmask.quad.byte 0x00 40.--46. 1. "CECO,Corrected error count for other errors"
newline
bitfld.quad 0x00 39. "OFR,Sticky overflow bit for repeat errors" "No overflow,Overflow"
hexmask.quad.byte 0x00 32.--38. 1. "CECR,Corrected error count for repeat errors"
newline
bitfld.quad 0x00 28.--31. "WAY,Indicates the way that contained the error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 25. "SUBBANK,Dependent on unit from which error was detected" "0,1"
newline
bitfld.quad 0x00 23.--24. "BANK,Dependent on unit from which error was detected" "0,1,2,3"
bitfld.quad 0x00 19.--22. "SUBARRAY,Dependent on unit from which error was detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.quad.word 0x00 6.--18. 1. "INDEX,Indicates the index that contained the error"
bitfld.quad 0x00 4.--5. "ARRAY,Dependent on unit from which error was detected" "L2 Tag RAM/LS Tag RAM 0/Tag,L2 Data RAM/LS Tag RAM1/Data,LS Data RAM/Micro-OP cache,CHI Error/LS Tag RAM 2"
newline
bitfld.quad 0x00 0.--3. "UNIT,Unit which detected error" "Reserved,L1 Instruction Cache,Reserved,Reserved,L1 Data Cache,L2 TLB,Reserved,Reserved,L2 Cache,?..."
else
rgroup.quad spr:0x30540++0x00
line.quad 0x00 "ERXFR_EL1,Selected Error Record Feature Register - CLUSTERRAS_ERR1FR - Record 1"
bitfld.quad 0x00 18.--19. "CEO,Corrected error overwrite" "No overwrite,?..."
bitfld.quad 0x00 16.--17. "DUI,Error recovery interrupt for deferred errors" "Not supported,?..."
newline
bitfld.quad 0x00 15. "RP,Repeat counter" "Reserved,Implemented"
bitfld.quad 0x00 12.--14. "CEC,Corrected error counter" "Reserved,Reserved,Implemented/8-bit,?..."
newline
bitfld.quad 0x00 10.--11. "CFI,Fault handling interrupt for corrected errors" "Reserved,Reserved,Implemented,?..."
bitfld.quad 0x00 8.--9. "UE,In-band uncorrected error reporting" "Reserved,Implemented,?..."
newline
bitfld.quad 0x00 6.--7. "FI,Fault handling interrupt" "Reserved,Reserved,Implemented,?..."
bitfld.quad 0x00 4.--5. "UI,Error recovery interrupt for uncorrected errors" "Reserved,Reserved,Implemented,?..."
newline
bitfld.quad 0x00 2.--3. "DE,Deferred error enable" "Reserved,Enabled,?..."
bitfld.quad 0x00 0.--1. "ED,Error detection and correction[Lock/Split]" "Reserved,Reserved,Implemented,?..."
group.quad spr:0x30541++0x00
line.quad 0x00 "ERXCTLR_EL1,Selected Error Record Control Register - CLUSTERRAS_ER1CTLR - Record 1"
bitfld.quad 0x00 8. "CFI,Fault handling interrupt for corrected errors enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "FI,Fault handling interrupt enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "UI,Uncorrected error recovery interrupt enable" "Disabled,Enabled"
bitfld.quad 0x00 0. "ED,Error detection and correction enable" "Disabled,Enabled"
group.quad spr:0x30542++0x00
line.quad 0x00 "ERXSTATUS_EL1,Selected Error Record Status Register - CLUSTERRAS_ER1STATUS - Record 1"
bitfld.quad 0x00 31. "AV,Address valid" "Not valid,?..."
bitfld.quad 0x00 30. "V,Status register valid" "Not valid,Valid"
newline
bitfld.quad 0x00 29. "UE,Uncorrected Error" "No error,>=1 error"
bitfld.quad 0x00 28. "ER,Error reported" "No error,?..."
newline
bitfld.quad 0x00 27. "OF,Error overflow" "No error,>=1 error"
bitfld.quad 0x00 26. "MV,Miscellaneous registers valid" "Not valid,Valid"
newline
bitfld.quad 0x00 24.--25. "CE,Corrected errors" "No error,Reserved,>=1 error,?..."
bitfld.quad 0x00 23. "DE,Deferred errors" "No error,>=1 error"
newline
bitfld.quad 0x00 22. "PN,Poison" "Corrupt,Poison"
bitfld.quad 0x00 20.--21. "UET,Uncorrected error type" "Uncontainable,?..."
newline
hexmask.quad.byte 0x00 8.--15. 1. "IERR,Implementation defined error code"
hexmask.quad.byte 0x00 0.--7. 1. "SERR,Architecturally-defined primary error code"
group.quad spr:0x30544++0x00
line.quad 0x00 "ERXPFGF_EL1,Selected Pseudo Fault Generation Feature Register - CLUSTERRAS_ER1PFGF - Record 1"
bitfld.quad 0x00 31. "PFG,Pseudo fault generation" "Not supported,Supported"
bitfld.quad 0x00 30. "R,Restartable bit" "Not supported,Supported"
newline
bitfld.quad 0x00 6. "CE,Corrected error generation" "Not supported,Supported"
bitfld.quad 0x00 5. "DE,Deferred error generation" "Not supported,Supported"
newline
bitfld.quad 0x00 4. "UEO,Latent or restartable error generation" "Not supported,Supported"
bitfld.quad 0x00 3. "UER,Signaled or recoverable error generation" "Not supported,Supported"
newline
bitfld.quad 0x00 2. "UEU,Unrecoverable error generation" "Not supported,Supported"
bitfld.quad 0x00 1. "UC,Uncontainable error generation" "Reserved,Supported"
group.quad spr:0x30545++0x00
line.quad 0x00 "ERXPFGCTL_EL1,Selected Error Pseudo Fault Generation Control Register - CLUSTERRAS_ER1PFGCTL - Record 1"
bitfld.quad 0x00 31. "CDNEN,Countdown enable. Control transfers from the value that is held in the ERR0PFGCDN into the Error Generation Counter" "Disabled,Enabled"
bitfld.quad 0x00 30. "R,Restart. Controls whether on reaching zero the Error Generation Counter restarts from the ext-CLUSTERRAS_ERR0PFGCDN value or stops" "Disabled,Enabled"
newline
bitfld.quad 0x00 6. "CE,Corrected error generation enable" "Disabled,Enabled"
bitfld.quad 0x00 5. "DE,Deferred error generation enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 1. "UC,Uncontainable error generation enable" "Disabled,Enabled"
group.quad spr:0x30546++0x00
line.quad 0x00 "ERXPFGCDN_EL1,Selected Error Pseudo Fault Generation Count Down Register - CLUSTERRAS_ER1PFGCDN - Record 1"
hexmask.quad.long 0x00 0.--31. 1. "CDN,Countdown value"
group.quad spr:0x30550++0x00
line.quad 0x00 "ERXMISC0_EL1,Selected Error Record Miscellaneous Register 0 - CLUSTERRAS_ER0MISC0 - Record 0 - DSU RAMs"
bitfld.quad 0x00 47. "OFO,Sticky overflow bit for other errors" "No overflow,Overflow"
hexmask.quad.byte 0x00 40.--46. 1. "CECO,Corrected error count for other errors"
newline
bitfld.quad 0x00 39. "OFR,Sticky overflow bit for repeat errors" "No overflow,Overflow"
hexmask.quad.byte 0x00 32.--38. 1. "CECR,Corrected error count for repeat errors"
newline
bitfld.quad 0x00 28.--31. "WAY,Indicates the way that contained the error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.tbyte 0x00 6.--23. 1. "INDX,Indicates the index that contained the error"
newline
bitfld.quad 0x00 1.--3. "LVL,Indicates the level that contained the error" "Reserved,Reserved,Level 3,?..."
bitfld.quad 0x00 0. "IND,Indicates the type of cache that contained the error" "Data,?..."
group.quad spr:0x30551++0x00
line.quad 0x00 "ERXMISC1_EL1,Selected Error Record Miscellaneous Register 1 - CLUSTERRAS_ER1MISC1 - Record 1"
group.quad spr:0x30552++0x00
line.quad 0x00 "ERXMISC2_EL1,Selected Error Record Miscellaneous Register 2 - CLUSTERRAS_ER1MISC2 - Record 1"
group.quad spr:0x30553++0x00
line.quad 0x00 "ERXMISC3_EL1,Selected Error Record Miscellaneous Register 3 - CLUSTERRAS_ER1MISC3 - Record 1"
endif
group.quad spr:0x30C11++0x00
line.quad 0x00 "DISR_EL1,Deferred Interrupt Status Register"
bitfld.quad 0x00 31. "A,Asynchronous SError interrupt deferred" "No,Yes"
bitfld.quad 0x00 24. "IDS,Indicates the deferred SError interrupt type" "Architecturally defined,?..."
newline
bitfld.quad 0x00 10.--12. "AET,Asynchronous error type" "UC,UEU,?..."
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 0.--5. "DFSC,Fault status code" "Uncategorized,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Async. SError,?..."
group.quad spr:0x34523++0x00
line.quad 0x00 "VSESR_EL2,Virtual SError Exception Syndrome Register"
bitfld.quad 0x00 24. "IDS,Indicates the deferred SError interrupt type" "Architecturally defined,?..."
hexmask.quad.tbyte 0x00 0.--23. 1. "ISS,Implementation defined SError interrupt syndrome"
group.quad spr:0x34C11++0x00
line.quad 0x00 "VDISR_EL2,Virtual Deferred Interrupt Status Register"
bitfld.quad 0x00 31. "A,Asynchronous SError interrupt deferred" "No,Yes"
bitfld.quad 0x00 24. "IDS,Indicates the deferred SError interrupt type" "Architecturally defined,?..."
newline
hexmask.quad.tbyte 0x00 0.--23. 1. "ISS,Implementation defined SError interrupt syndrome"
group.quad spr:0x30600++0x00
line.quad 0x00 "FAR_EL1,Fault Address Register (EL1)"
group.quad spr:0x35600++0x00
line.quad 0x00 "FAR_EL12,Fault Address Register (EL12)"
group.quad spr:0x34600++0x00
line.quad 0x00 "FAR_EL2,Fault Address Register (EL2)"
group.quad spr:0x36600++0x00
line.quad 0x00 "FAR_EL3,Fault Address Register (EL3)"
group.quad spr:0x34604++0x00
line.quad 0x00 "HPFAR_EL2,Hypervisor IPA Fault Address Register"
hexmask.quad.long 0x00 4.--31. 0x10 "FIPA[39:12],Bits [39:12] of the faulting intermediate physical address"
group.quad spr:0x30C00++0x00
line.quad 0x00 "VBAR_EL1,Vector Base Address Register (EL1)"
hexmask.quad 0x00 11.--63. 0x08 "VBA,Vector base address"
group.quad spr:0x35C00++0x00
line.quad 0x00 "VBAR_EL12,Vector Base Address Register (EL12)"
hexmask.quad 0x00 11.--63. 0x08 "VBA,Vector base address"
group.quad spr:0x34C00++0x00
line.quad 0x00 "VBAR_EL2,Vector Base Address Register (EL2)"
hexmask.quad 0x00 11.--63. 0x08 "VBA,Vector base address"
group.quad spr:0x36C00++0x00
line.quad 0x00 "VBAR_EL3,Vector Base Address Register (EL3)"
hexmask.quad 0x00 11.--63. 0x08 "VBA,Vector base address"
rgroup.quad spr:0x36C01++0x00
line.quad 0x00 "RVBAR_EL3,Reset Vector Base Address Register"
group.quad spr:0x36C02++0x00
line.quad 0x00 "RMR_EL3,Reset Management Register"
bitfld.quad 0x00 1. "RR,Reset Request" "Not requested,Requested"
rgroup.quad spr:0x30C10++0x00
line.quad 0x00 "ISR_EL1,Interrupt Status Register"
bitfld.quad 0x00 8. "A,SError interrupt pending bit" "Not pending,Pending"
bitfld.quad 0x00 7. "I,IRQ pending bit" "Not pending,Pending"
newline
bitfld.quad 0x00 6. "F,FIQ pending bit" "Not pending,Pending"
group.quad spr:0x30D01++0x00
line.quad 0x00 "CONTEXTIDR_EL1,Context ID Register (EL1)"
hexmask.quad.long 0x00 0.--31. 1. "PROCID,Process identifier"
group.quad spr:0x35D01++0x00
line.quad 0x00 "CONTEXTIDR_EL12,Context ID Register (EL12)"
hexmask.quad.long 0x00 0.--31. 1. "PROCID,Process identifier"
group.quad spr:0x34D01++0x00
line.quad 0x00 "CONTEXTIDR_EL2,Context ID Register (EL2)"
hexmask.quad.long 0x00 0.--31. 1. "PROCID,Process identifier"
group.quad spr:0x33D02++0x00
line.quad 0x00 "TPIDR_EL0,Software Thread ID Register (EL0)"
group.quad spr:0x33D03++0x00
line.quad 0x00 "TPIDRRO_EL0,Read-Only Software Thread ID Register (EL0)"
group.quad spr:0x30D04++0x00
line.quad 0x00 "TPIDR_EL1,Software Thread ID Register (EL1)"
group.quad spr:0x34D02++0x00
line.quad 0x00 "TPIDR_EL2,Software Thread ID Register (EL2)"
group.quad spr:0x36D02++0x00
line.quad 0x00 "TPIDR_EL3,Software Thread ID Register (EL3)"
tree.end
tree "System Instructions"
wgroup.quad spr:0x10710++0x00
line.quad 0x00 "IC_IALLUIS,IC_IALLUIS"
wgroup.quad spr:0x10750++0x00
line.quad 0x00 "IC_IALLU,IC_IALLU"
wgroup.quad spr:0x13751++0x00
line.quad 0x00 "IC_IVAU,IC_IVAU"
wgroup.quad spr:0x13741++0x00
line.quad 0x00 "DC_ZVA,DC_ZVA"
wgroup.quad spr:0x10761++0x00
line.quad 0x00 "DC_IVAC,DC_IVAC"
wgroup.quad spr:0x10762++0x00
line.quad 0x00 "DC_ISW,DC_ISW"
wgroup.quad spr:0x137A1++0x00
line.quad 0x00 "DC_CVAC,DC_CVAC"
wgroup.quad spr:0x137C1++0x00
line.quad 0x00 "DC_CVAP,DC_CVAP"
wgroup.quad spr:0x107A2++0x00
line.quad 0x00 "DC_CSW,DC_CSW"
wgroup.quad spr:0x137B1++0x00
line.quad 0x00 "DC_CVAU,DC_CVAU"
wgroup.quad spr:0x137E1++0x00
line.quad 0x00 "DC_CIVAC,DC_CIVAC"
wgroup.quad spr:0x107E2++0x00
line.quad 0x00 "DC_CISW,DC_CISW"
wgroup.quad spr:0x10780++0x00
line.quad 0x00 "AT_S1E1R,AT_S1E1R"
wgroup.quad spr:0x10781++0x00
line.quad 0x00 "AT_S1E1W,AT_S1E1W"
wgroup.quad spr:0x10782++0x00
line.quad 0x00 "AT_S1E0R,AT_S1E0R"
wgroup.quad spr:0x10790++0x00
line.quad 0x00 "AT_S1E1RP,AT_S1E1RP"
wgroup.quad spr:0x10791++0x00
line.quad 0x00 "AT_S1E1WP,AT_S1E1WP"
wgroup.quad spr:0x10783++0x00
line.quad 0x00 "AT_S1E0W,AT_S1E0W"
wgroup.quad spr:0x14784++0x00
line.quad 0x00 "AT_S12E1R,AT_S12E1R"
wgroup.quad spr:0x14785++0x00
line.quad 0x00 "AT_S12E1W,AT_S12E1W"
wgroup.quad spr:0x14786++0x00
line.quad 0x00 "AT_S12E0R,AT_S12E0R"
wgroup.quad spr:0x14787++0x00
line.quad 0x00 "AT_S12E0W,AT_S12E0W"
wgroup.quad spr:0x14780++0x00
line.quad 0x00 "AT_S1E2R,AT_S1E2R"
wgroup.quad spr:0x14781++0x00
line.quad 0x00 "AT_S1E2W,AT_S1E2W"
wgroup.quad spr:0x16780++0x00
line.quad 0x00 "AT_S1E3R,AT_S1E3R"
wgroup.quad spr:0x16781++0x00
line.quad 0x00 "AT_S1E3W,AT_S1E3W"
wgroup.quad spr:0x10870++0x00
line.quad 0x00 "TLBI_VMALLE1,TLBI_VMALLE1"
wgroup.quad spr:0x10871++0x00
line.quad 0x00 "TLBI_VAE1,TLBI_VAE1"
wgroup.quad spr:0x10872++0x00
line.quad 0x00 "TLBI_ASIDE1,TLBI_ASIDE1"
wgroup.quad spr:0x10873++0x00
line.quad 0x00 "TLBI_VAAE1,TLBI_VAAE1"
wgroup.quad spr:0x10875++0x00
line.quad 0x00 "TLBI_VALE1,TLBI_VALE1"
wgroup.quad spr:0x10877++0x00
line.quad 0x00 "TLBI_VAALE1,TLBI_VAALE1"
wgroup.quad spr:0x10830++0x00
line.quad 0x00 "TLBI_VMALLE1IS,TLBI_VMALLE1IS"
wgroup.quad spr:0x10831++0x00
line.quad 0x00 "TLBI_VAE1IS,TLBI_VAE1IS"
wgroup.quad spr:0x10832++0x00
line.quad 0x00 "TLBI_ASIDE1IS,TLBI_ASIDE1IS"
wgroup.quad spr:0x10833++0x00
line.quad 0x00 "TLBI_VAAE1IS,TLBI_VAAE1IS"
wgroup.quad spr:0x10835++0x00
line.quad 0x00 "TLBI_VALE1IS,TLBI_VALE1IS"
wgroup.quad spr:0x10837++0x00
line.quad 0x00 "TLBI_VAALE1IS,TLBI_VAALE1IS"
wgroup.quad spr:0x14801++0x00
line.quad 0x00 "TLBI_IPAS2E1IS,TLBI_IPAS2E1IS"
wgroup.quad spr:0x14805++0x00
line.quad 0x00 "TLBI_IPAS2LE1IS,TLBI_IPAS2LE1IS"
wgroup.quad spr:0x14841++0x00
line.quad 0x00 "TLBI_IPAS2E1,TLBI_IPAS2E1"
wgroup.quad spr:0x14845++0x00
line.quad 0x00 "TLBI_IPAS2LE1,TLBI_IPAS2LE1"
wgroup.quad spr:0x14871++0x00
line.quad 0x00 "TLBI_VAE2,TLBI_VAE2"
wgroup.quad spr:0x14875++0x00
line.quad 0x00 "TLBI_VALE2,TLBI_VALE2"
wgroup.quad spr:0x14876++0x00
line.quad 0x00 "TLBI_VMALLS12E1,TLBI_VMALLS12E1"
wgroup.quad spr:0x14831++0x00
line.quad 0x00 "TLBI_VAE2IS,TLBI_VAE2IS"
wgroup.quad spr:0x14835++0x00
line.quad 0x00 "TLBI_VALE2IS,TLBI_VALE2IS"
wgroup.quad spr:0x14836++0x00
line.quad 0x00 "TLBI_VMALLS12E1IS,TLBI_VMALLS12E1IS"
wgroup.quad spr:0x16871++0x00
line.quad 0x00 "TLBI_VAE3,TLBI_VAE3"
wgroup.quad spr:0x16875++0x00
line.quad 0x00 "TLBI_VALE3,TLBI_VALE3"
wgroup.quad spr:0x16831++0x00
line.quad 0x00 "TLBI_VAE3IS,TLBI_VAE3IS"
wgroup.quad spr:0x16835++0x00
line.quad 0x00 "TLBI_VALE3IS,TLBI_VALE3IS"
wgroup.quad spr:0x14870++0x00
line.quad 0x00 "TLBI_ALLE2,TLBI_ALLE2"
wgroup.quad spr:0x14830++0x00
line.quad 0x00 "TLBI_ALLE2IS,TLBI_ALLE2IS"
wgroup.quad spr:0x14874++0x00
line.quad 0x00 "TLBI_ALLE1,TLBI_ALLE1"
wgroup.quad spr:0x14834++0x00
line.quad 0x00 "TLBI_ALLE1IS,TLBI_ALLE1IS"
wgroup.quad spr:0x16870++0x00
line.quad 0x00 "TLBI_ALLE3,TLBI_ALLE3"
wgroup.quad spr:0x16830++0x00
line.quad 0x00 "TLBI_ALLE3IS,TLBI_ALLE3IS"
tree.end
tree "Memory Management Unit"
tree.open "Hypervisor System Register"
group.quad spr:0x34113++0x00
line.quad 0x00 "HSTR_EL2,Hypervisor System Trap Register"
bitfld.quad 0x00 15. "T15,Trap to Hypervisor mode Non-secure priv 15" "No effect,Trap"
bitfld.quad 0x00 13. "T13,Trap to Hypervisor mode Non-secure priv 13" "No effect,Trap"
bitfld.quad 0x00 12. "T12,Trap to Hypervisor mode Non-secure priv 12" "No effect,Trap"
bitfld.quad 0x00 11. "T11,Trap to Hypervisor mode Non-secure priv 11" "No effect,Trap"
newline
bitfld.quad 0x00 10. "T10,Trap to Hypervisor mode Non-secure priv 10" "No effect,Trap"
bitfld.quad 0x00 9. "T9,Trap to Hypervisor mode Non-secure priv 9" "No effect,Trap"
bitfld.quad 0x00 8. "T8,Trap to Hypervisor mode Non-secure priv 8" "No effect,Trap"
bitfld.quad 0x00 7. "T7,Trap to Hypervisor mode Non-secure priv 7" "No effect,Trap"
newline
bitfld.quad 0x00 6. "T6,Trap to Hypervisor mode Non-secure priv 6" "No effect,Trap"
bitfld.quad 0x00 5. "T5,Trap to Hypervisor mode Non-secure priv 5" "No effect,Trap"
bitfld.quad 0x00 3. "T3,Trap to Hypervisor mode Non-secure priv 3" "No effect,Trap"
bitfld.quad 0x00 2. "T2,Trap to Hypervisor mode Non-secure priv 2" "No effect,Trap"
newline
bitfld.quad 0x00 1. "T1,Trap to Hypervisor mode Non-secure priv 1" "No effect,Trap"
bitfld.quad 0x00 0. "T0,Trap to Hypervisor mode Non-secure priv 0" "No effect,Trap"
group.quad spr:0x34117++0x00
line.quad 0x00 "HACR_EL2,Hypervisor Auxiliary Control Register"
tree.end
newline
group.quad spr:0x30200++0x00
line.quad 0x00 "TTBR0_EL1,Translation Table Base Register 0 (EL1)"
hexmask.quad.word 0x00 48.--63. 0x01 "ASID,ASID for the translation table base address"
hexmask.quad 0x00 1.--47. 0x02 "BADDR[1:47],Translation table base address"
newline
bitfld.quad 0x00 0. "CNP,Common not private" "Private,Common"
group.quad spr:0x30201++0x00
line.quad 0x00 "TTBR1_EL1,Translation Table Base Register 1 (EL1)"
hexmask.quad.word 0x00 48.--63. 0x01 "ASID,ASID for the translation table base address"
hexmask.quad 0x00 1.--47. 0x02 "BADDR[1:47],Translation table base address"
newline
bitfld.quad 0x00 0. "CNP,Common not private" "Private,Common"
group.quad spr:0x35200++0x00
line.quad 0x00 "TTBR0_EL12,Translation Table Base Register 0 (EL12)"
hexmask.quad.word 0x00 48.--63. 0x01 "ASID,ASID for the translation table base address"
hexmask.quad 0x00 1.--47. 0x02 "BADDR[1:47],Translation table base address"
newline
bitfld.quad 0x00 0. "CNP,Common not private" "Private,Common"
group.quad spr:0x35201++0x00
line.quad 0x00 "TTBR1_EL12,Translation Table Base Register 1 (EL12)"
hexmask.quad.word 0x00 48.--63. 0x01 "ASID,ASID for the translation table base address"
hexmask.quad 0x00 1.--47. 0x02 "BADDR[1:47],Translation table base address"
newline
bitfld.quad 0x00 0. "CNP,Common not private" "Private,Common"
group.quad spr:0x34200++0x00
line.quad 0x00 "TTBR0_EL2,Translation Table Base Register 0 (EL2)"
hexmask.quad.word 0x00 48.--63. 0x01 "ASID,ASID for the translation table base address"
hexmask.quad 0x00 1.--47. 0x02 "BADDR[1:47],Translation table base address"
newline
bitfld.quad 0x00 0. "CNP,Common not private" "Private,Common"
group.quad spr:0x34201++0x00
line.quad 0x00 "TTBR1_EL2,Translation Table Base Register 1 (EL2)"
hexmask.quad.word 0x00 48.--63. 0x01 "ASID,ASID for the translation table base address"
hexmask.quad 0x00 1.--47. 0x02 "BADDR[1:47],Translation table base address"
newline
bitfld.quad 0x00 0. "CNP,Common not private" "Private,Common"
group.quad spr:0x36200++0x00
line.quad 0x00 "TTBR0_EL3,Translation Table Base Register 0 (EL3)"
hexmask.quad 0x00 1.--47. 0x02 "BADDR[1:47],Translation table base address"
bitfld.quad 0x00 0. "CNP,Common not private" "Private,Common"
group.quad spr:0x34210++0x00
line.quad 0x00 "VTTBR_EL2,Virtualization Translation Table Base Register"
hexmask.quad.word 0x00 48.--63. 1. "VMID,The VMID for the translation table"
hexmask.quad 0x00 1.--47. 0x02 "BADDR[1:47],Translation table base address"
newline
bitfld.quad 0x00 0. "CNP,Common not Private" "Private,Common"
group.quad spr:0x30202++0x00
line.quad 0x00 "TCR_EL1,Translation Control Register (EL1)"
bitfld.quad 0x00 50. "HWU162,Hardware use of bit[62] of the stage 1 translation table block or page entry for translations using TTBR1_EL1" "Not possible,Possible"
bitfld.quad 0x00 49. "HWU161,Hardware use of bit[61] of the stage 1 translation table block or page entry for translations using TTBR1_EL1" "Not possible,Possible"
newline
bitfld.quad 0x00 48. "HWU160,Hardware use of bit[60] of the stage 1 translation table block or page entry for translations using TTBR1_EL1" "Not possible,Possible"
bitfld.quad 0x00 47. "HWU159,Hardware use of bit[59] of the stage 1 translation table block or page entry for translations using TTBR1_EL1" "Not possible,Possible"
newline
bitfld.quad 0x00 46. "HWU062,Hardware use of bit[62] of the stage 1 translation table block or page entry for translations using TTBR0_EL1" "Not possible,Possible"
bitfld.quad 0x00 45. "HWU061,Hardware use of bit[61] of the stage 1 translation table block or page entry for translations using TTBR0_EL1" "Not possible,Possible"
newline
bitfld.quad 0x00 44. "HWU060,Hardware use of bit[60] of the stage 1 translation table block or page entry for translations using TTBR0_EL1" "Not possible,Possible"
bitfld.quad 0x00 43. "HWU059,Hardware use of bit[59] of the stage 1 translation table block or page entry for translations using TTBR0_EL1" "Not possible,Possible"
newline
bitfld.quad 0x00 42. "HPD1,Hierarchical permission disable for the TTBR1 region" "No,Yes"
bitfld.quad 0x00 41. "HPD0,Hierarchical permission disable for the TTBR0 region" "No,Yes"
newline
bitfld.quad 0x00 40. "HD,Hardware management of dirty state in stage 1 translations" "Disabled,Enabled"
bitfld.quad 0x00 39. "HA,Hardware Access flag update in stage 1 translations" "Disabled,Enabled"
newline
bitfld.quad 0x00 38. "TBI1,Top Byte ignored. Indicates whether the top byte of an address is used for address match for the TTBR1_EL1 region or ignored and used for tagged addresses" "Used,Ignored"
bitfld.quad 0x00 37. "TBI0,Top Byte ignored. Indicates whether the top byte of an address is used for address match for the TTBR0_EL1 region or ignored and used for tagged addresses" "Used,Ignored"
newline
bitfld.quad 0x00 36. "AS,ASID size" "8 bit,16 bit"
bitfld.quad 0x00 32.--34. "IPS,Intermediate physical address size" "32-bit/4GB,36-bit/64GB,40-bit/1TB,42-bit/4TB,44-bit/16TB,48-bit/256TB,?..."
newline
bitfld.quad 0x00 30.--31. "TG1,TTBR1_EL1 granule size" "Reserved,16KB,4KB,64KB"
bitfld.quad 0x00 28.--29. "SH1,Shareability attributes for TTBR1_EL1" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
newline
bitfld.quad 0x00 26.--27. "ORGN1,Outer cacheability attributes for TTBR1_EL1 as described in LPAE" "Outer Non-cacheable,Outer WB WA cacheable,Outer WT no WA cacheable,Outer WB no WA cacheable"
bitfld.quad 0x00 24.--25. "IRGN1,Inner cacheability attributes for TTBR1_EL1 as described in LPAE" "Inner Non-cacheable,Inner WB WA cacheable,Inner WT no WA cacheable,Inner WB no WA cacheable"
newline
bitfld.quad 0x00 23. "EPD1,Translation table walk disable for TTBR1_EL1 as described in LPAE" "No,Yes"
bitfld.quad 0x00 22. "A1,Selects whether TTBR0_EL1 or TTBR1_EL1 defines the ASID" "TTBR0_EL1,TTBR1_EL1"
newline
bitfld.quad 0x00 16.--21. "T1SZ,Size offset of the memory region addressed by TTBR1_EL1 The region size is 2^(64-T1SZ) bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL1 granule size" "4KB,64KB,16KB,?..."
newline
bitfld.quad 0x00 12.--13. "SH0,Shareability attributes for TTBR0_EL1 as described in LPAE" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attributes for TTBR0_EL1 as described in LPAE" "Outer Non-cacheable,Outer WB WA cacheable,Outer WT no WA cacheable,Outer WB no WA cacheable"
newline
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attributes for TTBR0_EL1 as described in LPAE" "Inner Non-cacheable,Inner WB WA cacheable,Inner WT no WA cacheable,Inner WB no WA cacheable"
bitfld.quad 0x00 7. "EPD0,Translation table walk disable for TTBR0_EL1 as described in LPAE" "No,Yes"
newline
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL1 The region size is 2^(64-T0SZ) bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.quad spr:0x35202++0x00
line.quad 0x00 "TCR_EL12,Translation Control Register (EL12)"
bitfld.quad 0x00 50. "HWU162,Hardware use of bit[62] of the stage 1 translation table block or page entry for translations using TTBR1_EL1" "Not possible,Possible"
bitfld.quad 0x00 49. "HWU161,Hardware use of bit[61] of the stage 1 translation table block or page entry for translations using TTBR1_EL1" "Not possible,Possible"
newline
bitfld.quad 0x00 48. "HWU160,Hardware use of bit[60] of the stage 1 translation table block or page entry for translations using TTBR1_EL1" "Not possible,Possible"
bitfld.quad 0x00 47. "HWU159,Hardware use of bit[59] of the stage 1 translation table block or page entry for translations using TTBR1_EL1" "Not possible,Possible"
newline
bitfld.quad 0x00 46. "HWU062,Hardware use of bit[62] of the stage 1 translation table block or page entry for translations using TTBR0_EL1" "Not possible,Possible"
bitfld.quad 0x00 45. "HWU061,Hardware use of bit[61] of the stage 1 translation table block or page entry for translations using TTBR0_EL1" "Not possible,Possible"
newline
bitfld.quad 0x00 44. "HWU060,Hardware use of bit[60] of the stage 1 translation table block or page entry for translations using TTBR0_EL1" "Not possible,Possible"
bitfld.quad 0x00 43. "HWU059,Hardware use of bit[59] of the stage 1 translation table block or page entry for translations using TTBR0_EL1" "Not possible,Possible"
newline
bitfld.quad 0x00 42. "HPD1,Hierarchical permission disable for the TTBR1 region" "No,Yes"
bitfld.quad 0x00 41. "HPD0,Hierarchical permission disable for the TTBR0 region" "No,Yes"
newline
bitfld.quad 0x00 40. "HD,Hardware management of dirty state in stage 1 translations" "Disabled,Enabled"
bitfld.quad 0x00 39. "HA,Hardware Access flag update in stage 1 translations" "Disabled,Enabled"
newline
bitfld.quad 0x00 38. "TBI1,Top Byte ignored. Indicates whether the top byte of an address is used for address match for the TTBR1_EL1 region or ignored and used for tagged addresses" "Used,Ignored"
bitfld.quad 0x00 37. "TBI0,Top Byte ignored. Indicates whether the top byte of an address is used for address match for the TTBR0_EL1 region or ignored and used for tagged addresses" "Used,Ignored"
newline
bitfld.quad 0x00 36. "AS,ASID size" "8 bit,16 bit"
bitfld.quad 0x00 32.--34. "IPS,Intermediate physical address size" "32-bit/4GB,36-bit/64GB,40-bit/1TB,42-bit/4TB,44-bit/16TB,48-bit/256TB,?..."
newline
bitfld.quad 0x00 30.--31. "TG1,TTBR1_EL1 granule size" "Reserved,16KB,4KB,64KB"
bitfld.quad 0x00 28.--29. "SH1,Shareability attributes for TTBR1_EL1" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
newline
bitfld.quad 0x00 26.--27. "ORGN1,Outer cacheability attributes for TTBR1_EL1 as described in LPAE" "Outer Non-cacheable,Outer WB WA cacheable,Outer WT no WA cacheable,Outer WB no WA cacheable"
bitfld.quad 0x00 24.--25. "IRGN1,Inner cacheability attributes for TTBR1_EL1 as described in LPAE" "Inner Non-cacheable,Inner WB WA cacheable,Inner WT no WA cacheable,Inner WB no WA cacheable"
newline
bitfld.quad 0x00 23. "EPD1,Translation table walk disable for TTBR1_EL1 as described in LPAE" "No,Yes"
bitfld.quad 0x00 22. "A1,Selects whether TTBR0_EL1 or TTBR1_EL1 defines the ASID" "TTBR0_EL1,TTBR1_EL1"
newline
bitfld.quad 0x00 16.--21. "T1SZ,Size offset of the memory region addressed by TTBR1_EL1 The region size is 2^(64-T1SZ) bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL1 granule size" "4KB,64KB,16KB,?..."
newline
bitfld.quad 0x00 12.--13. "SH0,Shareability attributes for TTBR0_EL1 as described in LPAE" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attributes for TTBR0_EL1 as described in LPAE" "Outer Non-cacheable,Outer WB WA cacheable,Outer WT no WA cacheable,Outer WB no WA cacheable"
newline
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attributes for TTBR0_EL1 as described in LPAE" "Inner Non-cacheable,Inner WB WA cacheable,Inner WT no WA cacheable,Inner WB no WA cacheable"
bitfld.quad 0x00 7. "EPD0,Translation table walk disable for TTBR0_EL1 as described in LPAE" "No,Yes"
newline
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL1 The region size is 2^(64-T0SZ) bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
if (((per.q(spr:0x34110))&0x400000000)==0x000000000)
group.quad spr:0x34202++0x00
line.quad 0x00 "TCR_EL2,Translation Control Register (EL2)"
bitfld.quad 0x00 28. "HWU62,Hardware use of bit[62] of the stage 1 translation table block or page entry" "Not possible,Possible"
bitfld.quad 0x00 27. "HWU61,Hardware use of bit[61] of the stage 1 translation table block or page entry" "Not possible,Possible"
newline
bitfld.quad 0x00 26. "HWU60,Hardware use of bit[60] of the stage 1 translation table block or page entry" "Not possible,Possible"
bitfld.quad 0x00 25. "HWU59,Hardware use of bit[59] of the stage 1 translation table block or page entry" "Not possible,Possible"
newline
bitfld.quad 0x00 24. "HPD,Hierarchical permission disable" "No,Yes"
bitfld.quad 0x00 22. "HD,Hardware management of dirty state in stage 1 translations" "Disabled,Enabled"
newline
bitfld.quad 0x00 21. "HA,Hardware Access flag update in stage 1 translations" "Disabled,Enabled"
bitfld.quad 0x00 20. "TBI,Top Byte ignored. Indicates whether the top byte of an address is used for address match for the TTBR0_EL2 region or ignored and used for tagged addresses" "Used,Ignored"
newline
bitfld.quad 0x00 16.--18. "PS,Physical address size" "32-bit/4GB,36-bit/64GB,40-bit/1TB,42-bit/4TB,44-bit/16TB,48-bit/256TB,?..."
bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL2 granule size" "4KB,64KB,16KB,?..."
newline
bitfld.quad 0x00 12.--13. "SH0,Shareability attributes for TTBR0_EL2 as described in LPAE" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attributes for TTBR0_EL2 as described in LPAE" "Outer Non-cacheable,Outer WB WA cacheable,Outer WT no WA cacheable,Outer WB no WA cacheable"
newline
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attributes for TTBR_EL2 as described in LPAE" "Inner Non-cacheable,Inner WB WA cacheable,Inner WT no WA cacheable,Inner WB no WA cacheable"
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL2 The region size is 2^(64-T0SZ) bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.quad spr:0x34202++0x00
line.quad 0x00 "TCR_EL2,Translation Control Register (EL2)"
bitfld.quad 0x00 50. "HWU162,Hardware use of bit[62] of the stage 1 translation table block or page entry for translations using TTBR1_EL2" "Not possible,Possible"
bitfld.quad 0x00 49. "HWU161,Hardware use of bit[61] of the stage 1 translation table block or page entry for translations using TTBR1_EL2" "Not possible,Possible"
newline
bitfld.quad 0x00 48. "HWU160,Hardware use of bit[60] of the stage 1 translation table block or page entry for translations using TTBR1_EL2" "Not possible,Possible"
bitfld.quad 0x00 47. "HWU159,Hardware use of bit[59] of the stage 1 translation table block or page entry for translations using TTBR1_EL2" "Not possible,Possible"
newline
bitfld.quad 0x00 46. "HWU062,Hardware use of bit[62] of the stage 1 translation table block or page entry for translations using TTBR0_EL2" "Not possible,Possible"
bitfld.quad 0x00 45. "HWU061,Hardware use of bit[61] of the stage 1 translation table block or page entry for translations using TTBR0_EL2" "Not possible,Possible"
newline
bitfld.quad 0x00 44. "HWU060,Hardware use of bit[60] of the stage 1 translation table block or page entry for translations using TTBR0_EL2" "Not possible,Possible"
bitfld.quad 0x00 43. "HWU059,Hardware use of bit[59] of the stage 1 translation table block or page entry for translations using TTBR0_EL2" "Not possible,Possible"
newline
bitfld.quad 0x00 42. "HPD1,Hierarchical permission disable for the TTBR1_EL2 region" "No,Yes"
bitfld.quad 0x00 41. "HPD0,Hierarchical Permission Disable for the TTBR0_EL2 region" "No,Yes"
newline
bitfld.quad 0x00 40. "HD,Hardware management of dirty state in stage 1 translations" "Disabled,Enabled"
bitfld.quad 0x00 39. "HA,Hardware Access flag update in stage 1 translations" "Disabled,Enabled"
newline
bitfld.quad 0x00 38. "TBI1,Top Byte ignored. Indicates whether the top byte of an address is used for address match for the TTBR1_EL2 region or ignored and used for tagged addresses" "Used,Ignored"
bitfld.quad 0x00 37. "TBI0,Top Byte ignored. Indicates whether the top byte of an address is used for address match for the TTBR0_EL2 region or ignored and used for tagged addresses" "Used,Ignored"
newline
bitfld.quad 0x00 36. "AS,ASID size" "8 bit,16 bit"
bitfld.quad 0x00 32.--34. "IPS,Intermediate physical address size" "32-bit/4GB,36-bit/64GB,40-bit/1TB,42-bit/4TB,44-bit/16TB,48-bit/256TB,?..."
newline
bitfld.quad 0x00 30.--31. "TG1,TTBR1_EL1 granule size" "Reserved,16KB,4KB,64KB"
bitfld.quad 0x00 28.--29. "SH1,Shareability attributes for TTBR1_EL2 as described in LPAE" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
newline
bitfld.quad 0x00 26.--27. "ORGN1,Outer cacheability attributes for TTBR1_EL2 as described in LPAE" "Outer Non-cacheable,Outer WB WA cacheable,Outer WT no WA cacheable,Outer WB no WA cacheable"
bitfld.quad 0x00 24.--25. "IRGN1,Inner cacheability attributes for TTBR1_EL2 as described in LPAE" "Inner Non-cacheable,Inner WB WA cacheable,Inner WT no WA cacheable,Inner WB no WA cacheable"
newline
bitfld.quad 0x00 23. "EPD1,Translation table walk disable for TTBR1_EL2 as described in LPAE" "No,Yes"
bitfld.quad 0x00 22. "A1,Selects whether TTBR0_EL2 or TTBR1_EL2 defines the ASID" "TTBR0_EL2,TTBR1_EL2"
newline
bitfld.quad 0x00 16.--21. "T1SZ,Size offset of the memory region for TTBR1_EL2 The region size is 2^(64-T1SZ) bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL2 granule size" "4KB,64KB,16KB,?..."
newline
bitfld.quad 0x00 12.--13. "SH0,Shareability attributes for TTBR0_EL2 as described in LPAE" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attributes for TTBR0_EL2 as described in LPAE" "Outer Non-cacheable,Outer WB WA cacheable,Outer WT no WA cacheable,Outer WB no WA cacheable"
newline
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attributes for TTBR0_EL2 as described in LPAE" "Inner Non-cacheable,Inner WB WA cacheable,Inner WT no WA cacheable,Inner WB no WA cacheable"
bitfld.quad 0x00 7. "EPD0,Translation table walk disable for TTBR0_EL2 as described in LPAE" "No,Yes"
newline
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region for TTBR0_EL2 The region size is 2^(64-T0SZ) bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.quad spr:0x36202++0x00
line.quad 0x00 "TCR_EL3,Translation Control Register (EL3)"
bitfld.quad 0x00 28. "HWU62,Hardware use of bit[62] of the stage 1 translation table block or page entry" "Not possible,Possible"
bitfld.quad 0x00 27. "HWU61,Hardware use of bit[61] of the stage 1 translation table block or page entry" "Not possible,Possible"
newline
bitfld.quad 0x00 26. "HWU60,Hardware use of bit[60] of the stage 1 translation table block or page entry" "Not possible,Possible"
bitfld.quad 0x00 25. "HWU59,Hardware use of bit[59] of the stage 1 translation table block or page entry" "Not possible,Possible"
newline
bitfld.quad 0x00 24. "HPD,Hierarchical permission disable" "No,Yes"
bitfld.quad 0x00 22. "HD,Hardware management of dirty state in stage 1 translations" "Disabled,Enabled"
newline
bitfld.quad 0x00 21. "HA,Hardware Access flag update in stage 1 translations" "Disabled,Enabled"
bitfld.quad 0x00 20. "TBI,Top Byte ignored. Indicates whether the top byte of an address is used for address match for the TTBR0_EL3 region or ignored and used for tagged addresses" "Used,Ignored"
newline
bitfld.quad 0x00 16.--18. "PS,Physical address size" "32-bit/4GB,36-bit/64GB,40-bit/1TB,42-bit/4TB,44-bit/16TB,48-bit/256TB,?..."
bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL3 granule size" "4KB,64KB,16KB,?..."
newline
bitfld.quad 0x00 12.--13. "SH0,Shareability attributes for TTBR0_EL3 as described in LPAE" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attributes for TTBR0_EL3 as described in LPAE" "Outer Non-cacheable,Outer WB WA cacheable,Outer WT cacheable,Outer WB no WA cacheable"
newline
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attributes for TTBR0_EL3 as described in LPAE" "Inner Non-cacheable,Inner WB WA cacheable,Inner WT cacheable,Inner WB no WA cacheable"
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL3. The region size is 2^(64-T0SZ) bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.quad spr:0x34212++0x00
line.quad 0x00 "VTCR_EL2,Virtualization Translation Control Register"
bitfld.quad 0x00 28. "HWU62,Hardware use of bit[62] of the stage 2 translation table block or page entry" "Not possible,Possible"
bitfld.quad 0x00 27. "HWU61,Hardware use of bit[61] of the stage 2 translation table block or page entry" "Not possible,Possible"
newline
bitfld.quad 0x00 26. "HWU60,Hardware use of bit[60] of the stage 2 translation table block or page entry" "Not possible,Possible"
bitfld.quad 0x00 25. "HWU59,Hardware use of bit[59] of the stage 2 translation table block or page entry" "Not possible,Possible"
newline
bitfld.quad 0x00 22. "HD,Hardware management of dirty state in stage 2 translations" "Disabled,Enabled"
bitfld.quad 0x00 21. "HA,Hardware Update of the Access Bit Enable - Stage 2" "Disabled,Enabled"
newline
bitfld.quad 0x00 19. "VS,VMID size" "8 bit,16 bit"
bitfld.quad 0x00 16.--18. "PS,Physical address size for the second stage of translation" "32-bit/4GB,36-bit/64GB,40-bit/1TB,42-bit/4TB,44-bit/16TB,48-bit/256TB,?..."
newline
bitfld.quad 0x00 14.--15. "TG0,VTTBR_EL2 granule size" "4KB,64KB,16KB,?..."
bitfld.quad 0x00 12.--13. "SH0,Shareability attributes for VTTBR_EL2 as described in LPAE" "Non-shareable,Reserved,Outer shareable,Inner shareable"
newline
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attributes for VTTBR_EL2 as described in LPAE" "Outer Non-cacheable,Outer WB WA cacheable,Outer WT no WA cacheable,Outer WB no WA cacheable"
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attributes for VTTBR_EL2 as described in LPAE" "Inner Non-cacheable,Inner WB WA cacheable,Inner WT no WA cacheable,Inner WB no WA cacheable"
newline
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by VTTBR_EL2 The region size is 2^(64-T0SZ) bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
if (((per.q(spr:0x30740))&0x01)==0x00)
group.quad spr:0x30740++0x00
line.quad 0x00 "PAR_EL1,Physical Address Register"
hexmask.quad.byte 0x00 56.--63. 1. "ATTR,Memory attributes for the returned PA"
hexmask.quad 0x00 12.--47. 0x10 "PA[47:12],Physical Address"
bitfld.quad 0x00 9. "NS,The NS attribute for a translation table entry read from Secure translation regime" "No,Yes"
newline
bitfld.quad 0x00 7.--8. "SH,Shareability attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
newline
bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
else
group.quad spr:0x30740++0x00
line.quad 0x00 "PAR_EL1,Physical Address Register"
bitfld.quad 0x00 9. "S,Indicates the translation stage at which the translation aborted" "Stage 1,Stage 2"
bitfld.quad 0x00 8. "PTW,Translation aborted because of a stage 2 fault during a stage 1 translation table walk" "No,Yes"
newline
bitfld.quad 0x00 1.--6. "FST,Fault status field" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Reserved,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,?..."
newline
bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
endif
newline
tree.open "Memory Attribute Indirection Registers"
group.quad spr:0x30A20++0x00
line.quad 0x00 "MAIR_EL1,Memory Attribute Indirection Register (EL1)"
bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.quad spr:0x35A20++0x00
line.quad 0x00 "MAIR_EL12,Memory Attribute Indirection Register (EL12)"
bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.quad spr:0x34A20++0x00
line.quad 0x00 "MAIR_EL2,Memory Attribute Indirection Register (EL2)"
bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.quad spr:0x36A20++0x00
line.quad 0x00 "MAIR_EL3,Memory Attribute Indirection Register (EL3)"
bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.quad spr:0x30A30++0x00
line.quad 0x00 "AMAIR_EL1,Auxiliary Memory Attribute Indirection Register (EL1)"
group.quad spr:0x35A30++0x00
line.quad 0x00 "AMAIR_EL12,Auxiliary Memory Attribute Indirection Register (EL12)"
group.quad spr:0x34A30++0x00
line.quad 0x00 "AMAIR_EL2,Auxiliary Memory Attribute Indirection Register (EL2)"
group.quad spr:0x36A30++0x00
line.quad 0x00 "AMAIR_EL3,Auxiliary Memory Attribute Indirection Register (EL3)"
tree.end
newline
group.quad spr:0x34300++0x00
line.quad 0x00 "DACR32_EL2,Domain Access Control Register"
tree.end
tree "Virtualization Extensions"
group.quad spr:0x34111++0x00
line.quad 0x00 "MDCR_EL2,Monitor Debug Configuration Register (EL2)"
bitfld.quad 0x00 17. "HPMD,Guest Performance Monitors disable" "No,Yes"
bitfld.quad 0x00 11. "TDRA,Trap debug ROM address register access" "Not trapped,Trapped"
bitfld.quad 0x00 10. "TDOSA,Trap debug OS-related register access" "Not trapped,Trapped"
newline
bitfld.quad 0x00 9. "TDA,Trap debug access" "Not trapped,Trapped"
bitfld.quad 0x00 8. "TDE,Route debug exceptions from Non-secure EL1 and EL0 to EL2" "Disabled,Enabled"
bitfld.quad 0x00 7. "HPME,Hypervisor Performance Monitors enable" "Disabled,Enabled"
bitfld.quad 0x00 6. "TPM,Trap Performance Monitors accesses" "Not trapped,Trapped"
newline
bitfld.quad 0x00 5. "TPMCR,Trap PMCR_EL0 or PMCR accesses" "Not trapped,Trapped"
bitfld.quad 0x00 0.--4. "HPMN,Defines the number of event counters that are accessible from EL3/EL2/EL1 and from EL0 if permitted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.quad spr:0x36131++0x00
line.quad 0x00 "MDCR_EL3,Monitor Debug Configuration Register (EL3)"
bitfld.quad 0x00 21. "EPMAD,External debugger register access disable" "No,Yes"
bitfld.quad 0x00 20. "EDAD,External debugger access to breakpoint and watchpoint registers disabled" "No,Yes"
newline
bitfld.quad 0x00 17. "SPME,Secure performance monitors enable" "Disabled,Enabled"
bitfld.quad 0x00 16. "SDD,Secure (monitor) debug disable" "No,Yes"
newline
bitfld.quad 0x00 10. "TDOSA,Trap valid accesses to OS-related debug registers to EL3" "No effect,Trapped"
bitfld.quad 0x00 9. "TDA,Trap valid Non-secure accesses to Debug registers to EL3" "No effect,Trapped"
bitfld.quad 0x00 6. "TPM,Trap Non-secure EL0/EL1/EL2 accesses to Performance Monitors registers that are not UNALLOCATED or trapped to a lower exception level to EL3" "No effect,Trapped"
rgroup.quad spr:0x30012++0x00
line.quad 0x00 "ID_DFR0_EL1,AArch32 Debug Feature Register 0"
bitfld.quad 0x00 24.--27. "PMM,Performance Monitor Model support" "Reserved,Reserved,Reserved,Reserved,PMUv3,?..."
bitfld.quad 0x00 20.--23. "M_PROF_DBG,M Profile Debug support" "Not supported,?..."
bitfld.quad 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model support" "Not supported,?..."
bitfld.quad 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Support v8.2,?..."
bitfld.quad 0x00 0.--3. "CDM_CB,Coprocessor Debug Model support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Support v8.2,?..."
tree.end
tree "Cache Control And Configuration"
rgroup.quad spr:0x33001++0x00
line.quad 0x00 "CTR_EL0,Cache Type Register"
bitfld.quad 0x00 28. "IDC,Data cache clean requirements for instruction to data coherence" "Required,Not required"
bitfld.quad 0x00 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,64 bytes,?..."
newline
bitfld.quad 0x00 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,64 bytes,?..."
bitfld.quad 0x00 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,64 bytes,?..."
newline
bitfld.quad 0x00 14.--15. "L1IP,Level 1 instruction cache policy" "Reserved,Reserved,Reserved,PIPT"
bitfld.quad 0x00 0.--3. "IMINLINE,Smallest instruction cache line size" "Reserved,Reserved,Reserved,Reserved,64 bytes,?..."
group.quad spr:0x32000++0x00
line.quad 0x00 "CSSELR_EL1,Cache Size Selection Register"
bitfld.quad 0x00 1.--3. "LEVEL,Cache level of required cache" "Level 1,Level 2,Level 3,?..."
bitfld.quad 0x00 0. "IND,Instruction/Not data" "Data/Unified,Instruction"
rgroup.quad spr:0x31000++0x00
line.quad 0x00 "CCSIDR_EL1,Cache Size And ID Register"
bitfld.quad 0x00 31. "WT,Write-Through" "Not Supported,?..."
bitfld.quad 0x00 30. "WB,Write-Back" "Not Supported,Supported"
newline
bitfld.quad 0x00 29. "RA,Read-Allocate" "Not Supported,Supported"
bitfld.quad 0x00 28. "WA,Write-Allocate" "Not Supported,Supported"
newline
hexmask.quad.word 0x00 13.--27. 1. 1. "SETS,Number of sets"
hexmask.quad.word 0x00 3.--12. 1. 1. "ASSOC,Associativity"
newline
bitfld.quad 0x00 0.--2. "LSIZE,Line size" "16 bytes,32 bytes,64 bytes,128 bytes,?..."
rgroup.quad spr:0x31001++0x00
line.quad 0x00 "CLIDR_EL1,Cache Level ID Register"
bitfld.quad 0x00 30.--32. "ICB,Inner cache boundary" "Reserved,Reserved,Level 2,Level 3,?..."
bitfld.quad 0x00 27.--29. "LOUU,Level of unification uniprocessor" "Clean/Invalidate not required,?..."
bitfld.quad 0x00 24.--26. "LOC,Level 3 of coherency" "Reserved,Reserved,Not implemented,Implemented,?..."
newline
bitfld.quad 0x00 21.--23. "LOUIS,Level of unification inner shareable" "Clean/Invalidate not required,?..."
bitfld.quad 0x00 6.--8. "CTYPE3,Cache type for levels 3" "Not implemented,Reserved,Reserved,Reserved,Implemented,?..."
newline
bitfld.quad 0x00 3.--5. "CTYPE2,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified cache,?..."
bitfld.quad 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate instruction,?..."
tree.end
tree "System Performance Monitor"
group.quad spr:0x339C0++0x00
line.quad 0x00 "PMCR_EL0,Performance Monitors Control Register"
hexmask.quad.byte 0x00 24.--31. 1. "IMP,Implementer code"
hexmask.quad.byte 0x00 16.--23. 1. "IDCODE,Identification code"
newline
bitfld.quad 0x00 11.--15. "N,Number of event counters implemented" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,6,?..."
bitfld.quad 0x00 6. "LC,Long cycle counter enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 5. "DP,Disable cycle counter when event counting is prohibited" "No,Yes"
bitfld.quad 0x00 4. "X,Export of events enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "D,Clock Divider" "Every cycle,64th cycle"
newline
bitfld.quad 0x00 2. "C,Cycle Counter reset" "No effect,Reset"
bitfld.quad 0x00 1. "P,Event Counter reset" "No effect,Reset"
bitfld.quad 0x00 0. "E,All Counters enable" "Disabled,Enabled"
if (((per.q(spr:0x339C0))&0xF800)==0x3000)
group.quad spr:0x339C1++0x00
line.quad 0x00 "PMCNTENSET_EL0,Performance Monitors Count Enable Set Register"
bitfld.quad 0x00 31. "C,Cycle counter register PMCCNTR_EL0 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
newline
bitfld.quad 0x00 5. "P5,Event counter PMEVCNTR5_EL0 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.quad 0x00 4. "P4,Event counter PMEVCNTR4_EL0 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.quad 0x00 3. "P3,Event counter PMEVCNTR3_EL0 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
newline
bitfld.quad 0x00 2. "P2,Event counter PMEVCNTR2_EL0 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.quad 0x00 1. "P1,Event counter PMEVCNTR1_EL0 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.quad 0x00 0. "P0,Event counter PMEVCNTR0_EL0 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
group.quad spr:0x339C2++0x00
line.quad 0x00 "PMCNTENCLR_EL0,Performance Monitors Count Enable Clear Register"
bitfld.quad 0x00 31. "C,Cycle counter register PMCCNTR_EL0 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
newline
bitfld.quad 0x00 5. "P5,Event counter PMEVCNTR5_EL0 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
bitfld.quad 0x00 4. "P4,Event counter PMEVCNTR4_EL0 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
bitfld.quad 0x00 3. "P3,Event counter PMEVCNTR3_EL0 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
newline
bitfld.quad 0x00 2. "P2,Event counter PMEVCNTR2_EL0 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
bitfld.quad 0x00 1. "P1,Event counter PMEVCNTR1_EL0 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
bitfld.quad 0x00 0. "P0,Event counter PMEVCNTR0_EL0 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
group.quad spr:0x339C3++0x00
line.quad 0x00 "PMOVSCLR_EL0,Performance Monitors Overflow Status Flags Clear Register"
eventfld.quad 0x00 31. "C,Cycle counter register PMCCNTR_EL0 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
newline
eventfld.quad 0x00 5. "P5,Event counter PMEVCNTR5_EL0 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.quad 0x00 4. "P4,Event counter PMEVCNTR4_EL0 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.quad 0x00 3. "P3,Event counter PMEVCNTR3_EL0 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
newline
eventfld.quad 0x00 2. "P2,Event counter PMEVCNTR2_EL0 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.quad 0x00 1. "P1,Event counter PMEVCNTR1_EL0 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.quad 0x00 0. "P0,Event counter PMEVCNTR0_EL0 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
wgroup.quad spr:0x339C4++0x00
line.quad 0x00 "PMSWINC_EL0,Performance Monitors Software Increment Register"
bitfld.quad 0x00 5. "P5,Event counter PMEVCNTR5_EL0 software increment bit" "No effect,Increment"
bitfld.quad 0x00 4. "P4,Event counter PMEVCNTR4_EL0 software increment bit" "No effect,Increment"
bitfld.quad 0x00 3. "P3,Event counter PMEVCNTR3_EL0 software increment bit" "No effect,Increment"
newline
bitfld.quad 0x00 2. "P2,Event counter PMEVCNTR2_EL0 software increment bit" "No effect,Increment"
bitfld.quad 0x00 1. "P1,Event counter PMEVCNTR1_EL0 software increment bit" "No effect,Increment"
bitfld.quad 0x00 0. "P0,Event counter PMEVCNTR0_EL0 software increment bit" "No effect,Increment"
group.quad spr:0x339C5++0x00
line.quad 0x00 "PMSELR_EL0,Performance Monitors Event Counter Selection Register"
bitfld.quad 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,31"
else
group.quad spr:0x339C1++0x00
line.quad 0x00 "PMCNTENSET_EL0,Performance Monitors Count Enable Set Register"
bitfld.quad 0x00 31. "C,Cycle counter register PMCCNTR_EL0 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
group.quad spr:0x339C2++0x00
line.quad 0x00 "PMCNTENCLR_EL0,Performance Monitors Count Enable Clear Register"
bitfld.quad 0x00 31. "C,Cycle counter register PMCCNTR_EL0 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
group.quad spr:0x339C3++0x00
line.quad 0x00 "PMOVSCLR_EL0,Performance Monitors Overflow Status Flags Clear Register"
eventfld.quad 0x00 31. "C,Cycle counter register PMCCNTR_EL0 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
rgroup.quad spr:0x339C4++0x00
line.quad 0x00 "PMSWINC_EL0,Performance Monitors Software Increment Register"
group.quad spr:0x339C5++0x00
line.quad 0x00 "PMSELR_EL0,Performance Monitors Event Counter Selection Register"
bitfld.quad 0x00 0.--4. "SEL,Current event counter select" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,31"
endif
tree.open "Common Event Identification Registers"
rgroup.quad spr:0x339C6++0x00
line.quad 0x00 "PMCEID0_EL0,Performance Monitors Common Event Identification Register 0"
bitfld.quad 0x00 31. "L1D_CACHE_ALLOCATE,Level 1 data cache allocate" "Not implemented,?..."
bitfld.quad 0x00 30. "CHAIN,Chain" "Reserved,Implemented"
bitfld.quad 0x00 29. "BUS_CYCLES,Bus cycle" "Reserved,Implemented"
newline
bitfld.quad 0x00 28. "TTBR_WRITE_RETIRED,TTBR write retired" "Reserved,Implemented"
bitfld.quad 0x00 27. "INST_SPEC,Instruction speculatively executed" "Reserved,Implemented"
bitfld.quad 0x00 26. "MEMORY_ERROR,Local memory error" "Reserved,Implemented"
newline
bitfld.quad 0x00 25. "BUS_ACCESS,Bus access" "Reserved,Implemented"
bitfld.quad 0x00 24. "L2D_CACHE_WB,Level 2 data cache write-back" "Reserved,Implemented"
bitfld.quad 0x00 23. "L2D_CACHE_REFILL,Level 2 data cache refill" "Reserved,Implemented"
newline
bitfld.quad 0x00 22. "L2D_CACHE,Level 2 data cache access" "Reserved,Implemented"
bitfld.quad 0x00 21. "L1D_CACHE_WB,Level 1 data cache write-back" "Reserved,Implemented"
bitfld.quad 0x00 20. "L1I_CACHE,Level 1 instruction cache access" "Reserved,Implemented"
newline
bitfld.quad 0x00 19. "MEM_ACCESS,Data memory access" "Reserved,Implemented"
bitfld.quad 0x00 18. "BR_PRED,Predictable branch speculatively executed" "Reserved,Implemented"
bitfld.quad 0x00 17. "CPU_CYCLES,CPU Cycle" "Reserved,Implemented"
newline
bitfld.quad 0x00 16. "BR_MIS_PRED,Mispredicted or not predicted branch speculatively executed" "Reserved,Implemented"
bitfld.quad 0x00 15. "UNALIGNED_LDST_RETIRED,UNALIGNED_LDST_RETIRED" "Not implemented,?..."
bitfld.quad 0x00 14. "BR_RETURN_RETIRED,Instruction architecturally executed condition check pass procedure return" "Not implemented,?..."
newline
bitfld.quad 0x00 13. "BR_IMMED_RETIRED,Instruction architecturally executed immediate branch" "Not implemented,?..."
bitfld.quad 0x00 12. "PC_WRITE_RETIRED,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,?..."
bitfld.quad 0x00 11. "CID_WRITE_RETIRED,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Reserved,Implemented"
newline
bitfld.quad 0x00 10. "EXC_RETURN,Instruction architecturally executed condition check pass exception return" "Reserved,Implemented"
bitfld.quad 0x00 9. "EXC_TAKEN,Exception taken" "Reserved,Implemented"
bitfld.quad 0x00 8. "INST_RETIRED,Instruction architecturally executed" "Reserved,Implemented"
newline
bitfld.quad 0x00 7. "ST_RETIRED,Instruction architecturally executed condition check pass store" "Not implemented,?..."
bitfld.quad 0x00 6. "LD_RETIRED,Instruction architecturally executed condition check pass load" "Not implemented,?..."
bitfld.quad 0x00 5. "L1D_TLB_REFILL,Level 1 data TLB refill" "Reserved,Implemented"
newline
bitfld.quad 0x00 4. "L1D_CACHE,Level 1 data cache access" "Reserved,Implemented"
bitfld.quad 0x00 3. "L1D_CACHE_REFILL,Level 1 data cache refill" "Reserved,Implemented"
bitfld.quad 0x00 2. "L1I_TLB_REFILL,Level 1 instruction TLB refill" "Reserved,Implemented"
newline
bitfld.quad 0x00 1. "L1I_CACHE_REFILL,Level 1 instruction cache refill" "Reserved,Implemented"
bitfld.quad 0x00 0. "SW_INCR,Instruction architecturally executed condition check pass software increment" "Reserved,Implemented"
rgroup.quad spr:0x339C7++0x00
line.quad 0x00 "PMCEID1_EL0,Performance Monitors Common Event Identification Register 1"
bitfld.quad 0x00 23. "LL_CACHE_MISS_RD,Attributable last level cache memory read miss" "Reserved,Implemented"
newline
bitfld.quad 0x00 22. "LL_CACHE_RD,Attributable last level cache memory read" "Reserved,Implemented"
bitfld.quad 0x00 21. "ITLB_WLK,Attributable instruction TLB access with at least one translation table walk" "Reserved,Implemented"
bitfld.quad 0x00 20. "DTLB_WLK,Attributable data or unified TLB access with at least one translation table walk" "Reserved,Implemented"
newline
bitfld.quad 0x00 17. "REMOTE_ACCESS,Attributable access to another socket in a multi-socket system" "Reserved,Implemented"
bitfld.quad 0x00 15. "L2D_TLB,Attributable Level 2 data or unified TLB access" "Reserved,Implemented"
newline
bitfld.quad 0x00 14. "L2I_TLB_REFILL,Attributable Level 2 instruction TLB refill" "Not implemented,?..."
bitfld.quad 0x00 13. "L2D_TLB_REFILL,Attributable Level 2 data or unified TLB refill" "Reserved,Implemented"
bitfld.quad 0x00 11. "L3D_CACHE,Attributable Level 3 data or unified cache access" "Reserved,Implemented"
newline
bitfld.quad 0x00 10. "L3D_CACHE_REFILL,Attributable Level 3 data or unified cache refill" "Reserved,Implemented"
bitfld.quad 0x00 9. "L3D_CACHE_ALLOCATE,Attributable Level 3 data or unified cache allocation without refill" "Reserved,Implemented"
newline
bitfld.quad 0x00 6. "L1I_TLB,Level 1 instruction TLB access" "Reserved,Implemented"
bitfld.quad 0x00 5. "L1D_TLB,Level 1 data or unified TLB access" "Reserved,Implemented"
newline
bitfld.quad 0x00 4. "STALL_BACKEND,No operation issued due to backend" "Reserved,Implemented"
bitfld.quad 0x00 3. "STALL_FRONTEND,No operation issued due to the frontend" "Reserved,Implemented"
bitfld.quad 0x00 2. "BR_MIS_PRED_RETIRED,Instruction architecturally executed mispredicted branch" "Reserved,Implemented"
newline
bitfld.quad 0x00 1. "BR_RETIRED,Instruction architecturally executed branch" "Reserved,Implemented"
bitfld.quad 0x00 0. "L2D_CACHE_ALLOCATE,Level 2 data cache allocate" "Reserved,Implemented"
tree.end
newline
group.quad spr:0x339D0++0x00
line.quad 0x00 "PMCCNTR_EL0,Performance Monitors Cycle Count Register"
if (((per.l(spr:0x339C5))&0x1F)==0x1F)
group.quad spr:0x339D1++0x00
line.quad 0x00 "PMXEVTYPER_EL0,Performance Monitors Selected Event Type Register - PMCCFILTR_EL0"
bitfld.quad 0x00 31. "P,Count events in EL1 disable" "No,Yes"
bitfld.quad 0x00 30. "U,Count events in EL0 disable" "No,Yes"
bitfld.quad 0x00 29. "NSK,Count events in non-secure EL1 [P=0/1]" "Yes/No,No/Yes"
newline
bitfld.quad 0x00 28. "NSU,Count events in non-secure EL0 [U=0/1]" "Yes/No,No/Yes"
bitfld.quad 0x00 27. "NSH,Count events in non-secure EL2" "Disabled,Enabled"
bitfld.quad 0x00 26. "M,Count events in secure EL3 [P=0/1]" "Yes/No,No/Yes"
else
group.quad spr:0x339D1++0x00
line.quad 0x00 "PMXEVTYPER_EL0,Performance Monitors Selected Event Type Register - PMEVTYPER<n>_EL0"
bitfld.quad 0x00 31. "P,Count events in EL1 disable" "No,Yes"
bitfld.quad 0x00 30. "U,Count events in EL0 disable" "No,Yes"
bitfld.quad 0x00 29. "NSK,Count events in non-secure EL1 [P=0/1]" "Yes/No,No/Yes"
newline
bitfld.quad 0x00 28. "NSU,Count events in non-secure EL0 [U=0/1]" "Yes/No,No/Yes"
bitfld.quad 0x00 27. "NSH,Count events in non-secure EL2" "Disabled,Enabled"
bitfld.quad 0x00 26. "M,Count events in secure EL3 [P=0/1]" "Yes/No,No/Yes"
newline
hexmask.quad.word 0x00 0.--15. 1. "EVTCOUNT,Event to count"
endif
group.quad spr:0x339D2++0x00
line.quad 0x00 "PMXEVCNTR_EL0,Performance Monitors Selected Event Counter Register"
group.quad spr:0x339E0++0x00
line.quad 0x00 "PMUSERENR_EL0,Performance Monitors User Enable Register"
bitfld.quad 0x00 3. "ER,Event counter read enable" "Disabled,Enabled"
bitfld.quad 0x00 2. "CR,Cycle counter read enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled"
bitfld.quad 0x00 0. "EN,EL0 access enable bit" "Disabled,Enabled"
group.quad spr:0x309E1++0x00
line.quad 0x00 "PMINTENSET_EL1,Performance Monitors Interrupt Enable Set Register"
bitfld.quad 0x00 31. "C,Cycle counter register PMCCNTR_EL0 overflow interrupt request enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
newline
bitfld.quad 0x00 5. "P5,Event counter PMEVCNTR5_EL0 overflow interrupt request enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.quad 0x00 4. "P4,Event counter PMEVCNTR4_EL0 overflow interrupt request enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.quad 0x00 3. "P3,Event counter PMEVCNTR3_EL0 overflow interrupt request enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
newline
bitfld.quad 0x00 2. "P2,Event counter PMEVCNTR2_EL0 overflow interrupt request enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.quad 0x00 1. "P1,Event counter PMEVCNTR1_EL0 overflow interrupt request enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.quad 0x00 0. "P0,Event counter PMEVCNTR0_EL0 overflow interrupt request enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
group.quad spr:0x309E2++0x00
line.quad 0x00 "PMINTENCLR_EL1,Performance Monitors Interrupt Enable Clear Register"
eventfld.quad 0x00 31. "C,Cycle counter register PMCCNTR_EL0 overflow interrupt request disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
newline
eventfld.quad 0x00 5. "P5,Event counter PMEVCNTR5_EL0 overflow interrupt request disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.quad 0x00 4. "P4,Event counter PMEVCNTR4_EL0 overflow interrupt request disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.quad 0x00 3. "P3,Event counter PMEVCNTR3_EL0 overflow interrupt request disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
newline
eventfld.quad 0x00 2. "P2,Event counter PMEVCNTR2_EL0 overflow interrupt request disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.quad 0x00 1. "P1,Event counter PMEVCNTR1_EL0 overflow interrupt request disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.quad 0x00 0. "P0,Event counter PMEVCNTR0_EL0 overflow interrupt request disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
group.quad spr:0x339E3++0x00
line.quad 0x00 "PMOVSSET_EL0,Performance Monitors Overflow Status Flags Set Register"
bitfld.quad 0x00 31. "C,Cycle counter overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set overflow"
newline
bitfld.quad 0x00 5. "P5,Event counter PMEVCNTR5_EL0 overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set overflow"
bitfld.quad 0x00 4. "P4,Event counter PMEVCNTR4_EL0 overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set overflow"
bitfld.quad 0x00 3. "P3,Event counter PMEVCNTR3_EL0 overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set overflow"
newline
bitfld.quad 0x00 2. "P2,Event counter PMEVCNTR2_EL0 overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set overflow"
bitfld.quad 0x00 1. "P1,Event counter PMEVCNTR1_EL0 overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set overflow"
bitfld.quad 0x00 0. "P0,Event counter PMEVCNTR0_EL0 overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set overflow"
group.quad spr:(0x33E80+0x0)++0x00
line.quad 0x00 "PMEVCNTR0_EL0,Performance Monitors Event Count Register 0"
group.quad spr:(0x33E80+0x1)++0x00
line.quad 0x00 "PMEVCNTR1_EL0,Performance Monitors Event Count Register 1"
group.quad spr:(0x33E80+0x2)++0x00
line.quad 0x00 "PMEVCNTR2_EL0,Performance Monitors Event Count Register 2"
group.quad spr:(0x33E80+0x3)++0x00
line.quad 0x00 "PMEVCNTR3_EL0,Performance Monitors Event Count Register 3"
group.quad spr:(0x33E80+0x4)++0x00
line.quad 0x00 "PMEVCNTR4_EL0,Performance Monitors Event Count Register 4"
group.quad spr:(0x33E80+0x5)++0x00
line.quad 0x00 "PMEVCNTR5_EL0,Performance Monitors Event Count Register 5"
group.quad spr:(0x33EC0+0x0)++0x00
line.quad 0x00 "PMEVTYPER0_EL0,Performance Monitors Event Type Register 0"
bitfld.quad 0x00 31. "P,Count events in EL1 disable" "No,Yes"
bitfld.quad 0x00 30. "U,Count events in EL0 disable" "No,Yes"
bitfld.quad 0x00 29. "NSK,Count events in non-secure EL1 [P=0/1]" "Yes/No,No/Yes"
newline
bitfld.quad 0x00 28. "NSU,Count events in non-secure EL0 [U=0/1]" "Yes/No,No/Yes"
bitfld.quad 0x00 27. "NSH,Count events in non-secure EL2" "Disabled,Enabled"
bitfld.quad 0x00 26. "M,Count events in secure EL3" "Disabled,Enabled"
newline
hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,Event number"
group.quad spr:(0x33EC0+0x1)++0x00
line.quad 0x00 "PMEVTYPER1_EL0,Performance Monitors Event Type Register 1"
bitfld.quad 0x00 31. "P,Count events in EL1 disable" "No,Yes"
bitfld.quad 0x00 30. "U,Count events in EL0 disable" "No,Yes"
bitfld.quad 0x00 29. "NSK,Count events in non-secure EL1 [P=0/1]" "Yes/No,No/Yes"
newline
bitfld.quad 0x00 28. "NSU,Count events in non-secure EL0 [U=0/1]" "Yes/No,No/Yes"
bitfld.quad 0x00 27. "NSH,Count events in non-secure EL2" "Disabled,Enabled"
bitfld.quad 0x00 26. "M,Count events in secure EL3" "Disabled,Enabled"
newline
hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,Event number"
group.quad spr:(0x33EC0+0x2)++0x00
line.quad 0x00 "PMEVTYPER2_EL0,Performance Monitors Event Type Register 2"
bitfld.quad 0x00 31. "P,Count events in EL1 disable" "No,Yes"
bitfld.quad 0x00 30. "U,Count events in EL0 disable" "No,Yes"
bitfld.quad 0x00 29. "NSK,Count events in non-secure EL1 [P=0/1]" "Yes/No,No/Yes"
newline
bitfld.quad 0x00 28. "NSU,Count events in non-secure EL0 [U=0/1]" "Yes/No,No/Yes"
bitfld.quad 0x00 27. "NSH,Count events in non-secure EL2" "Disabled,Enabled"
bitfld.quad 0x00 26. "M,Count events in secure EL3" "Disabled,Enabled"
newline
hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,Event number"
group.quad spr:(0x33EC0+0x3)++0x00
line.quad 0x00 "PMEVTYPER3_EL0,Performance Monitors Event Type Register 3"
bitfld.quad 0x00 31. "P,Count events in EL1 disable" "No,Yes"
bitfld.quad 0x00 30. "U,Count events in EL0 disable" "No,Yes"
bitfld.quad 0x00 29. "NSK,Count events in non-secure EL1 [P=0/1]" "Yes/No,No/Yes"
newline
bitfld.quad 0x00 28. "NSU,Count events in non-secure EL0 [U=0/1]" "Yes/No,No/Yes"
bitfld.quad 0x00 27. "NSH,Count events in non-secure EL2" "Disabled,Enabled"
bitfld.quad 0x00 26. "M,Count events in secure EL3" "Disabled,Enabled"
newline
hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,Event number"
group.quad spr:(0x33EC0+0x4)++0x00
line.quad 0x00 "PMEVTYPER4_EL0,Performance Monitors Event Type Register 4"
bitfld.quad 0x00 31. "P,Count events in EL1 disable" "No,Yes"
bitfld.quad 0x00 30. "U,Count events in EL0 disable" "No,Yes"
bitfld.quad 0x00 29. "NSK,Count events in non-secure EL1 [P=0/1]" "Yes/No,No/Yes"
newline
bitfld.quad 0x00 28. "NSU,Count events in non-secure EL0 [U=0/1]" "Yes/No,No/Yes"
bitfld.quad 0x00 27. "NSH,Count events in non-secure EL2" "Disabled,Enabled"
bitfld.quad 0x00 26. "M,Count events in secure EL3" "Disabled,Enabled"
newline
hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,Event number"
group.quad spr:(0x33EC0+0x5)++0x00
line.quad 0x00 "PMEVTYPER5_EL0,Performance Monitors Event Type Register 5"
bitfld.quad 0x00 31. "P,Count events in EL1 disable" "No,Yes"
bitfld.quad 0x00 30. "U,Count events in EL0 disable" "No,Yes"
bitfld.quad 0x00 29. "NSK,Count events in non-secure EL1 [P=0/1]" "Yes/No,No/Yes"
newline
bitfld.quad 0x00 28. "NSU,Count events in non-secure EL0 [U=0/1]" "Yes/No,No/Yes"
bitfld.quad 0x00 27. "NSH,Count events in non-secure EL2" "Disabled,Enabled"
bitfld.quad 0x00 26. "M,Count events in secure EL3" "Disabled,Enabled"
newline
hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,Event number"
group.quad spr:0x33EF7++0x00
line.quad 0x00 "PMCCFILTR_EL0,Performance Monitors Cycle Count Filter Register"
bitfld.quad 0x00 31. "P,Count events in EL1 disable" "No,Yes"
bitfld.quad 0x00 30. "U,Count events in EL0 disable" "No,Yes"
bitfld.quad 0x00 29. "NSK,Count events in non-secure EL1 [P=0/1]" "Yes/No,No/Yes"
newline
bitfld.quad 0x00 28. "NSU,Count events in non-secure EL0 [U=0/1]" "Yes/No,No/Yes"
bitfld.quad 0x00 27. "NSH,Count events in non-secure EL2" "Disabled,Enabled"
bitfld.quad 0x00 26. "M,Count events in secure EL3" "Disabled,Enabled"
tree.end
tree "System Timer Registers"
group.quad spr:0x33E00++0x00
line.quad 0x00 "CNTFRQ_EL0,Counter-timer Frequency Register"
hexmask.quad.long 0x00 0.--31. 1. "CF,Clock frequency"
rgroup.quad spr:0x33E01++0x00
line.quad 0x00 "CNTPCT_EL0,Counter-timer Physical Count Register"
rgroup.quad spr:0x33E02++0x00
line.quad 0x00 "CNTVCT_EL0,Counter-timer Virtual Count Register"
group.quad spr:0x34E03++0x00
line.quad 0x00 "CNTVOFF_EL2,Counter-timer Virtual Offset Register"
group.quad spr:0x30E10++0x00
line.quad 0x00 "CNTKCTL_EL1,Counter-timer Kernel Control Register"
bitfld.quad 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 mode" "Disabled,Enabled"
bitfld.quad 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 mode" "Disabled,Enabled"
newline
bitfld.quad 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from that counter when that stream is enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit defined by EVNTI generates an event when the event stream is enabled" "0 to 1,1 to 0"
newline
bitfld.quad 0x00 2. "EVNTEN,Enables the generation of an event stream from the corresponding counter" "Disabled,Enabled"
bitfld.quad 0x00 1. "EL0VCTEN,Controls whether the virtual counter CNTVCT and the frequency register CNTFRQ are accessible from EL0 mode" "Disabled,Enabled"
bitfld.quad 0x00 0. "EL0PCTEN,Controls whether the physical counter CNTPCT and the frequency register CNTFRQ are accessible from EL0 mode" "Disabled,Enabled"
group.quad spr:0x35E10++0x00
line.quad 0x00 "CNTKCTL_EL12,Counter-timer Kernel Control Register"
bitfld.quad 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 mode" "Disabled,Enabled"
bitfld.quad 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 mode" "Disabled,Enabled"
newline
bitfld.quad 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from that counter when that stream is enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit defined by EVNTI generates an event when the event stream is enabled" "0 to 1,1 to 0"
newline
bitfld.quad 0x00 2. "EVNTEN,Enables the generation of an event stream from the corresponding counter" "Disabled,Enabled"
bitfld.quad 0x00 1. "EL0VCTEN,Controls whether the virtual counter CNTVCT and the frequency register CNTFRQ are accessible from EL0 mode" "Disabled,Enabled"
bitfld.quad 0x00 0. "EL0PCTEN,Controls whether the physical counter CNTPCT and the frequency register CNTFRQ are accessible from EL0 mode" "Disabled,Enabled"
if (((per.q(spr:0x34110))&0x400000000)==0x400000000)
group.quad spr:0x34E10++0x00
line.quad 0x00 "CNTHCTL_EL2,Counter-timer Hypervisor Control Register"
bitfld.quad 0x00 11. "EL1PTEN,Physical timer register accessing instructions are accessible from Non-secure EL1 and EL0" "Not accessible,Accessible"
bitfld.quad 0x00 10. "EL1PCTEN,Physical counter is accessible from Non-secure EL1 and EL0" "Not accessible,Accessible"
newline
bitfld.quad 0x00 9. "EL0PTEN,Physical timer register accessing instructions are accessible from Non-secure EL0" "Not accessible,Accessible"
bitfld.quad 0x00 8. "EL0VTEN,Virtual timer register accessing instructions are accessible from Non-secure EL0" "Not accessible,Accessible"
newline
bitfld.quad 0x00 4.--7. "EVNTI,Selects which bit of CNTPCT is the trigger for the event stream generated from the physical counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit defined by EVNTI generates an event when the event stream is enabled" "0 to 1,1 to 0"
newline
bitfld.quad 0x00 2. "EVNTEN,Enables the generation of an event stream from the physical counter" "Disabled,Enabled"
bitfld.quad 0x00 1. "EL0VCTEN,Virtual counter register accessing instructions are accessible from Non-secure EL0" "Not accessible,Accessible"
newline
bitfld.quad 0x00 0. "EL0PCTEN,Physical counter is accessible from Non-secure EL0 modes" "Not accessible,Accessible"
else
group.quad spr:0x34E10++0x00
line.quad 0x00 "CNTHCTL_EL2,Counter-timer Hypervisor Control Register"
bitfld.quad 0x00 4.--7. "EVNTI,Selects which bit of CNTPCT is the trigger for the event stream generated from the physical counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit defined by EVNTI generates an event when the event stream is enabled" "0 to 1,1 to 0"
newline
bitfld.quad 0x00 2. "EVNTEN,Enables the generation of an event stream from the physical counter" "Disabled,Enabled"
bitfld.quad 0x00 1. "EL1PCEN,Physical timer register is accessible from Non-secure EL1 and EL0" "Not accessible,Accessible"
newline
bitfld.quad 0x00 0. "EL1PCTEN,Physical counter register is accessible from Non-secure EL1 and EL0" "Not accessible,Accessible"
endif
group.quad spr:0x33E20++0x00
line.quad 0x00 "CNTP_TVAL_EL0,Counter-timer Physical Timer TimerValue Register"
hexmask.quad.long 0x00 0.--31. 1. "TV,TimerValue view of the EL1 physical timer"
group.quad spr:0x35E20++0x00
line.quad 0x00 "CNTP_TVAL_EL02,Counter-timer Physical Timer TimerValue Register"
hexmask.quad.long 0x00 0.--31. 1. "TV,TimerValue view of the EL1 physical timer"
group.quad spr:0x33E21++0x00
line.quad 0x00 "CNTP_CTL_EL0,Counter-timer Physical Timer Control Register"
rbitfld.quad 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.quad 0x00 1. "IMASK,Timer interrupt mask" "Not masked,Masked"
bitfld.quad 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad spr:0x35E21++0x00
line.quad 0x00 "CNTP_CTL_EL02,Counter-timer Physical Timer Control Register"
rbitfld.quad 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.quad 0x00 1. "IMASK,Timer interrupt mask" "Not masked,Masked"
bitfld.quad 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad spr:0x33E22++0x00
line.quad 0x00 "CNTP_CVAL_EL0,Counter-timer Physical Timer CompareValue Register"
group.quad spr:0x35E22++0x00
line.quad 0x00 "CNTP_CVAL_EL02,Counter-timer Physical Timer CompareValue Register"
group.quad spr:0x33E30++0x00
line.quad 0x00 "CNTV_TVAL_EL0,Counter-timer Virtual Timer TimerValue Register"
hexmask.quad.long 0x00 0.--31. 1. "TV,TimerValue view of the EL1 virtual timer"
group.quad spr:0x35E30++0x00
line.quad 0x00 "CNTV_TVAL_EL02,Counter-timer Virtual Timer TimerValue Register"
hexmask.quad.long 0x00 0.--31. 1. "TV,TimerValue view of the EL1 virtual timer"
group.quad spr:0x33E31++0x00
line.quad 0x00 "CNTV_CTL_EL0,Counter-timer Virtual Timer Control Register"
rbitfld.quad 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.quad 0x00 1. "IMASK,Timer interrupt mask" "Not masked,Masked"
bitfld.quad 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad spr:0x35E31++0x00
line.quad 0x00 "CNTV_CTL_EL02,Counter-timer Virtual Timer Control Register"
rbitfld.quad 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.quad 0x00 1. "IMASK,Timer interrupt mask" "Not masked,Masked"
bitfld.quad 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad spr:0x33E32++0x00
line.quad 0x00 "CNTV_CVAL_EL0,Counter-timer Virtual Timer CompareValue Register"
group.quad spr:0x35E32++0x00
line.quad 0x00 "CNTV_CVAL_EL02,Counter-timer Virtual Timer CompareValue Register"
group.quad spr:0x34E20++0x00
line.quad 0x00 "CNTHP_TVAL_EL2,Counter-timer Hypervisor Physical Timer TimerValue Register"
hexmask.quad.long 0x00 0.--31. 1. "TV,TimerValue view of the EL2 physical timer"
group.quad spr:0x34E21++0x00
line.quad 0x00 "CNTHP_CTL_EL2,Counter-timer Hypervisor Physical Timer Control Register"
rbitfld.quad 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.quad 0x00 1. "IMASK,Timer interrupt mask" "Not masked,Masked"
bitfld.quad 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad spr:0x34E22++0x00
line.quad 0x00 "CNTHP_CVAL_EL2,Counter-timer Hypervisor Physical Timer CompareValue Register"
group.quad spr:0x34E30++0x00
line.quad 0x00 "CNTHV_TVAL_EL2,Counter-timer Hypervisor Virtual Timer Value Register"
hexmask.quad.long 0x00 0.--31. 1. "TV,TimerValue view of the EL2 virtual timer"
group.quad spr:0x34E31++0x00
line.quad 0x00 "CNTHV_CTL_EL2,Counter-timer Hypervisor Virtual Timer Control Register"
rbitfld.quad 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.quad 0x00 1. "IMASK,Timer interrupt mask" "Not masked,Masked"
bitfld.quad 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad spr:0x34E32++0x00
line.quad 0x00 "CNTHV_CVAL_EL2,Counter-Timer Hypervisor Virtual Timer CompareValue Register"
group.quad spr:0x37E20++0x00
line.quad 0x00 "CNTPS_TVAL_EL1,Counter-timer Physical Secure Timer TimerValue Register"
hexmask.quad.long 0x00 0.--31. 1. "TV,TimerValue view of the EL2 physical timer"
group.quad spr:0x37E21++0x00
line.quad 0x00 "CNTPS_CTL_EL1,Counter-timer Physical Secure Timer Control Register"
rbitfld.quad 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.quad 0x00 1. "IMASK,Timer interrupt mask" "Not masked,Masked"
bitfld.quad 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad spr:0x37E22++0x00
line.quad 0x00 "CNTPS_CVAL_EL1,Counter-timer Physical Secure Timer CompareValue Register"
tree.end
tree "Generic Interrupt Controller CPU Interface"
tree "AArch64 GIC Physical CPU Interface System Registers"
tree.open "Interrupt Controller Active Priorities Registers"
group.quad spr:0x30C84++0x00
line.quad 0x00 "ICC_AP0R0_EL1,Interrupt Controller Active Priorities Group 0 Register 0 (EL1)"
bitfld.quad 0x00 31. "P[31],Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.quad 0x00 30. "[30],Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.quad 0x00 29. "[29],Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
bitfld.quad 0x00 28. "[28],Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 27. "[27],Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.quad 0x00 26. "[26],Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
bitfld.quad 0x00 25. "[25],Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.quad 0x00 24. "[24],Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 23. "[23],Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
bitfld.quad 0x00 22. "[22],Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.quad 0x00 21. "[21],Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.quad 0x00 20. "[20],Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 19. "[19],Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.quad 0x00 18. "[18],Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.quad 0x00 17. "[17],Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
bitfld.quad 0x00 16. "[16],Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 15. "[15],Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.quad 0x00 14. "[14],Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
bitfld.quad 0x00 13. "[13],Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.quad 0x00 12. "[12],Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 11. "[11],Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
bitfld.quad 0x00 10. "[10],Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.quad 0x00 9. "[9],Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.quad 0x00 8. "[8],Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 7. "[7],Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.quad 0x00 6. "[6],Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.quad 0x00 5. "[5],Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
bitfld.quad 0x00 4. "[4],Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 3. "[3],Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.quad 0x00 2. "[2],Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
bitfld.quad 0x00 1. "[1],Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.quad 0x00 0. "[0],Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
group.quad spr:0x30C90++0x00
line.quad 0x00 "ICC_AP1R0_EL1,Interrupt Controller Active Priorities Group 1 Register 0 (EL1)"
bitfld.quad 0x00 31. "P[31],Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.quad 0x00 30. "[30],Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.quad 0x00 29. "[29],Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
bitfld.quad 0x00 28. "[28],Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 27. "[27],Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.quad 0x00 26. "[26],Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
bitfld.quad 0x00 25. "[25],Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.quad 0x00 24. "[24],Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 23. "[23],Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
bitfld.quad 0x00 22. "[22],Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.quad 0x00 21. "[21],Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.quad 0x00 20. "[20],Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 19. "[19],Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.quad 0x00 18. "[18],Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.quad 0x00 17. "[17],Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
bitfld.quad 0x00 16. "[16],Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 15. "[15],Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.quad 0x00 14. "[14],Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
bitfld.quad 0x00 13. "[13],Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.quad 0x00 12. "[12],Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 11. "[11],Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
bitfld.quad 0x00 10. "[10],Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.quad 0x00 9. "[9],Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.quad 0x00 8. "[8],Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 7. "[7],Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.quad 0x00 6. "[6],Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.quad 0x00 5. "[5],Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
bitfld.quad 0x00 4. "[4],Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 3. "[3],Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.quad 0x00 2. "[2],Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
bitfld.quad 0x00 1. "[1],Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.quad 0x00 0. "[0],Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
tree.end
newline
if (((per.q(spr:0x30CB6))&0x10000000000)==0x00)
wgroup.quad spr:0x30CB6++0x00
line.quad 0x00 "ICC_ASGI1R_EL1,Interrupt Controller Alias Software Generated Interrupt Group 1 Register (EL1)"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
newline
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated"
else
wgroup.quad spr:0x30CB6++0x00
line.quad 0x00 "ICC_ASGI1R_EL1,Interrupt Controller Alias Software Generated Interrupt Group 1 Register (EL1)"
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.quad spr:0x30C83++0x00
line.quad 0x00 "ICC_BPR0_EL1,Interrupt Controller Binary Point Register 0 (EL1)"
bitfld.quad 0x00 0.--2. "BINARYPOINT,Interrupt priority field control and interrupt preemption control" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]"
group.quad spr:0x30CC3++0x00
line.quad 0x00 "ICC_BPR1_EL1,Interrupt Controller Binary Point Register 1 (EL1)"
bitfld.quad 0x00 0.--2. "BINARYPOINT,Interrupt priority field control and interrupt preemption control" "Reserved,[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]"
group.quad spr:0x30CC4++0x00
line.quad 0x00 "ICC_CTLR_EL1,Interrupt Controller Control Register (EL1)"
rbitfld.quad 0x00 15. "A3V,Affinity 3 valid" "Reserved,Non-zero"
rbitfld.quad 0x00 14. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,?..."
rbitfld.quad 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,?..."
newline
rbitfld.quad 0x00 8.--10. "PRIBITS,The number of priority bits implemented" "Reserved,Reserved,Reserved,Reserved,5 bits (32 levels),?..."
bitfld.quad 0x00 6. "PMHE,Controls whether the priority mask register is used as a hint for interrupt distribution" "Disabled,Enabled"
bitfld.quad 0x00 1. "EOIMODE,Controls whether a write to an end of interrupt register also deactivates the interrupt" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "CBPR,Controls whether the same register is used for interrupt preemption of both group 0 and group 1 interrupts" "Separate registers,Same register"
group.quad spr:0x36CC4++0x00
line.quad 0x00 "ICC_CTLR_EL3,Interrupt Controller Control Register (EL3)"
rbitfld.quad 0x00 17. "NDS,Disable security not supported" "Reserved,Not supported"
rbitfld.quad 0x00 15. "A3V,Affinity 3 valid" "Reserved,Supported"
rbitfld.quad 0x00 14. "SEIS,Indicates whether the CPU interface supports generation of SEIs" "Not supported,?..."
newline
rbitfld.quad 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,?..."
rbitfld.quad 0x00 8.--10. "PRIBITS,The number of priority bits implemented" "Reserved,Reserved,Reserved,Reserved,5 bits (32 levels),?..."
bitfld.quad 0x00 6. "PMHE,Priority mask hint enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "EOIMODE_EL1NS,Controls whether a write to an end of interrupt register also deactivates the interrupt (non-secure EL1 and EL2)" "Priority drop/Deactivation,Priority drop"
bitfld.quad 0x00 3. "EOIMODE_EL1S,Controls whether a write to an end of interrupt register also deactivates the interrupt (secure EL1)" "Priority drop/Deactivation,Priority drop"
bitfld.quad 0x00 2. "EOIMODE_EL3,Controls whether a write to an end of interrupt register also deactivates the interrupt (EL3)" "Enabled,Disabled"
newline
bitfld.quad 0x00 1. "CBPR_EL1NS,Controls whether the same register is used for interrupt preemption of both group 0 and group 1 non-secure interrupts at EL1" "Separate registers,Same register"
bitfld.quad 0x00 0. "CBPR_EL1S,Controls whether the same register is used for interrupt preemption of both group 0 and group 1 secure interrupts in secure non-monitor modes" "Separate registers,Same register"
wgroup.quad spr:0x30CB1++0x00
line.quad 0x00 "ICC_DIR_EL1,Interrupt Controller Deactivate Interrupt Register"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the interrupt to be deactivated"
wgroup.quad spr:0x30C81++0x00
line.quad 0x00 "ICC_EOIR0_EL1,Interrupt Controller End Of Interrupt Register 0"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR0 access"
wgroup.quad spr:0x30CC1++0x00
line.quad 0x00 "ICC_EOIR1_EL1,Interrupt Controller End Of Interrupt Register 1"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR1 access"
rgroup.quad spr:0x30C82++0x00
line.quad 0x00 "ICC_HPPIR0_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 0"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level"
rgroup.quad spr:0x30CC2++0x00
line.quad 0x00 "ICC_HPPIR1_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 1"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level"
newline
hgroup.quad spr:0x30C80++0x00
hide.long 0x00 "ICC_IAR0_EL1,Interrupt Acknowledge Register 0"
in
hgroup.quad spr:0x30CC0++0x00
hide.long 0x00 "ICC_IAR1_EL1,Interrupt Acknowledge Register 1"
in
newline
group.quad spr:0x30CC6++0x00
line.quad 0x00 "ICC_IGRPEN0_EL1,Interrupt Controller Interrupt Group 0 Enable Register"
bitfld.quad 0x00 0. "ENABLE,Group 0 interrupts enable" "Disabled,Enabled"
group.quad spr:0x30CC7++0x00
line.quad 0x00 "ICC_IGRPEN1_EL1,Interrupt Controller Interrupt Group 1 Enable Register"
bitfld.quad 0x00 0. "ENABLE,Group 1 interrupts enable" "Disabled,Enabled"
group.quad spr:0x36CC7++0x00
line.quad 0x00 "ICC_IGRPEN1_EL3,Interrupt Controller Interrupt Group 1 Enable Register (EL3)"
bitfld.quad 0x00 1. "ENABLEGRP1S,Group 1 interrupts enable for the secure state" "Disabled,Enabled"
bitfld.quad 0x00 0. "ENABLEGRP1NS,Group 1 interrupts enable for the non-secure state" "Disabled,Enabled"
group.quad spr:0x30460++0x00
line.quad 0x00 "ICC_PMR_EL1,Interrupt Controller Interrupt Priority Mask Register"
hexmask.quad.byte 0x00 0.--7. 1. "PRIORITY,The priority mask level for the CPU interface"
rgroup.quad spr:0x30CB3++0x00
line.quad 0x00 "ICC_RPR_EL1,Interrupt Controller Running Priority Register"
hexmask.quad.byte 0x00 0.--7. 1. "PRIORITY,The current running priority on the CPU interface"
if (((per.q(spr:0x30CB7))&0x10000000000)==0x00)
wgroup.quad spr:0x30CB7++0x00
line.quad 0x00 "ICC_SGI0R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated."
else
wgroup.quad spr:0x30CB7++0x00
line.quad 0x00 "ICC_SGI0R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register"
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
if (((per.q(spr:0x30CB5))&0x10000000000)==0x00)
wgroup.quad spr:0x30CB5++0x00
line.quad 0x00 "ICC_SGI1R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
newline
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
newline
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated"
else
wgroup.quad spr:0x30CB5++0x00
line.quad 0x00 "ICC_SGI1R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register"
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.quad spr:0x30CC5++0x00
line.quad 0x00 "ICC_SRE_EL1,Interrupt Controller System Register Enable Register (EL1)"
bitfld.quad 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.quad 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
bitfld.quad 0x00 0. "SRE,System register enable" "Disabled,Enabled"
group.quad spr:0x34C95++0x00
line.quad 0x00 "ICC_SRE_EL2,Interrupt Controller System Register Enable Register (EL2)"
bitfld.quad 0x00 3. "ENABLE,Enables lower exception level access to ICC_SRE_EL1" "Trapped,Not trapped"
bitfld.quad 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.quad 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
newline
bitfld.quad 0x00 0. "SRE,System register Enable" "Disabled,Enabled"
group.quad spr:0x36CC5++0x00
line.quad 0x00 "ICC_SRE_EL3,Interrupt Controller System Register Enable Register (EL3)"
bitfld.quad 0x00 3. "ENABLE,Enables lower exception level access to ICC_SRE_EL1 and ICC_SRE_EL2" "Trapped,Not trapped"
bitfld.quad 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.quad 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
newline
bitfld.quad 0x00 0. "SRE,System register enable" "Disabled,Enabled"
tree.end
tree "AArch64 GIC Virtual CPU Interface System Registers"
tree.open "Interrupt Controller Active Priorities Registers"
group.quad spr:0x30C84++0x00
line.quad 0x00 "ICV_AP0R0_EL1,Interrupt Controller Active Priorities Group 0 Register 0 (EL1)"
bitfld.quad 0x00 31. "P[31],Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.quad 0x00 30. "[30],Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.quad 0x00 29. "[29],Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
bitfld.quad 0x00 28. "[28],Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 27. "[27],Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.quad 0x00 26. "[26],Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
bitfld.quad 0x00 25. "[25],Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.quad 0x00 24. "[24],Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 23. "[23],Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
bitfld.quad 0x00 22. "[22],Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.quad 0x00 21. "[21],Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.quad 0x00 20. "[20],Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 19. "[19],Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.quad 0x00 18. "[18],Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.quad 0x00 17. "[17],Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
bitfld.quad 0x00 16. "[16],Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 15. "[15],Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.quad 0x00 14. "[14],Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
bitfld.quad 0x00 13. "[13],Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.quad 0x00 12. "[12],Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 11. "[11],Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
bitfld.quad 0x00 10. "[10],Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.quad 0x00 9. "[9],Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.quad 0x00 8. "[8],Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 7. "[7],Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.quad 0x00 6. "[6],Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.quad 0x00 5. "[5],Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
bitfld.quad 0x00 4. "[4],Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 3. "[3],Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.quad 0x00 2. "[2],Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
bitfld.quad 0x00 1. "[1],Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.quad 0x00 0. "[0],Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
group.quad spr:0x30C90++0x00
line.quad 0x00 "ICV_AP1R0_EL1,Interrupt Controller Active Priorities Group 1 Register 0 (EL1)"
bitfld.quad 0x00 31. "P[31],Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.quad 0x00 30. "[30],Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.quad 0x00 29. "[29],Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
bitfld.quad 0x00 28. "[28],Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 27. "[27],Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.quad 0x00 26. "[26],Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
bitfld.quad 0x00 25. "[25],Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.quad 0x00 24. "[24],Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 23. "[23],Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
bitfld.quad 0x00 22. "[22],Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.quad 0x00 21. "[21],Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.quad 0x00 20. "[20],Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 19. "[19],Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.quad 0x00 18. "[18],Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.quad 0x00 17. "[17],Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
bitfld.quad 0x00 16. "[16],Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 15. "[15],Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.quad 0x00 14. "[14],Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
bitfld.quad 0x00 13. "[13],Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.quad 0x00 12. "[12],Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 11. "[11],Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
bitfld.quad 0x00 10. "[10],Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.quad 0x00 9. "[9],Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.quad 0x00 8. "[8],Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 7. "[7],Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.quad 0x00 6. "[6],Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.quad 0x00 5. "[5],Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
bitfld.quad 0x00 4. "[4],Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 3. "[3],Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.quad 0x00 2. "[2],Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
bitfld.quad 0x00 1. "[1],Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.quad 0x00 0. "[0],Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
tree.end
newline
group.quad spr:0x30C83++0x00
line.quad 0x00 "ICV_BPR0_EL1,Interrupt Controller Binary Point Register 0 (EL1)"
bitfld.quad 0x00 0.--2. "BINARYPOINT,Interrupt priority field control and interrupt preemption control" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]"
group.quad spr:0x30CC3++0x00
line.quad 0x00 "ICV_BPR1_EL1,Interrupt Controller Binary Point Register 1 (EL1)"
bitfld.quad 0x00 0.--2. "BINARYPOINT,Interrupt priority field control and interrupt preemption control" "Reserved,[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]"
group.quad spr:0x30CC4++0x00
line.quad 0x00 "ICV_CTLR_EL1,Interrupt Controller Virtual Control Register (EL1)"
rbitfld.quad 0x00 15. "A3V,Affinity 3 valid" "Reserved,Non-zero"
rbitfld.quad 0x00 14. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,?..."
rbitfld.quad 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,?..."
newline
rbitfld.quad 0x00 8.--10. "PRIBITS,The number of priority bits implemented" "Reserved,Reserved,Reserved,Reserved,5 bits (32 levels),?..."
bitfld.quad 0x00 1. "EOIMODE,Controls whether a write to an end of interrupt register also deactivates the interrupt" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "CBPR,Controls whether the same register is used for interrupt preemption of both group 0 and group 1 interrupts" "Separate registers,Same register"
wgroup.quad spr:0x30CB1++0x00
line.quad 0x00 "ICV_DIR_EL1,Interrupt Controller Deactivate Interrupt Register"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the interrupt to be deactivated"
wgroup.quad spr:0x30C81++0x00
line.quad 0x00 "ICV_EOIR0_EL1,Interrupt Controller End Of Interrupt Register 0"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR0 access"
wgroup.quad spr:0x30CC1++0x00
line.quad 0x00 "ICV_EOIR1_EL1,Interrupt Controller End Of Interrupt Register 1"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR1 access"
rgroup.quad spr:0x30C82++0x00
line.quad 0x00 "ICV_HPPIR0_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 0"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level"
rgroup.quad spr:0x30CC2++0x00
line.quad 0x00 "ICV_HPPIR1_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 1"
rgroup.quad spr:0x30C80++0x00
line.quad 0x00 "ICV_IAR0_EL1,Interrupt Controller Interrupt Acknowledge Register 0"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the signaled interrupt"
rgroup.quad spr:0x30CC0++0x00
line.quad 0x00 "ICV_IAR1_EL1,Interrupt Controller Interrupt Acknowledge Register 1"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the signaled interrupt"
group.quad spr:0x30CC6++0x00
line.quad 0x00 "ICV_IGRPEN0_EL1,Interrupt Controller Interrupt Group 0 Enable Register"
bitfld.quad 0x00 0. "ENABLE,Group 0 interrupts enable" "Disabled,Enabled"
group.quad spr:0x30CC7++0x00
line.quad 0x00 "ICV_IGRPEN1_EL1,Interrupt Controller Interrupt Group 1 Enable Register"
bitfld.quad 0x00 0. "ENABLE,Group 1 interrupts enable" "Disabled,Enabled"
group.quad spr:0x30460++0x00
line.quad 0x00 "ICV_PMR_EL1,Interrupt Controller Interrupt Priority Mask Register"
hexmask.quad.byte 0x00 0.--7. 1. "PRIORITY,The priority mask level for the CPU interface"
rgroup.quad spr:0x30CB3++0x00
line.quad 0x00 "ICV_RPR_EL1,Interrupt Controller Running Priority Register"
hexmask.quad.byte 0x00 0.--7. 1. "PRIORITY,The current running priority on the CPU interface"
tree.end
tree "AArch64 Virtual Interface Control System Register Summary"
tree.open "Interrupt Controller Hypervisor Active Priorities Registers"
group.quad spr:0x34C80++0x00
line.quad 0x00 "ICH_AP0R0_EL2,Interrupt Controller Hypervisor Active Priorities Group 0 Register 0"
bitfld.quad 0x00 31. "P[31],Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.quad 0x00 30. "[30],Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.quad 0x00 29. "[29],Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
bitfld.quad 0x00 28. "[28],Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 27. "[27],Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.quad 0x00 26. "[26],Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
bitfld.quad 0x00 25. "[25],Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.quad 0x00 24. "[24],Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 23. "[23],Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
bitfld.quad 0x00 22. "[22],Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.quad 0x00 21. "[21],Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.quad 0x00 20. "[20],Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 19. "[19],Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.quad 0x00 18. "[18],Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.quad 0x00 17. "[17],Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
bitfld.quad 0x00 16. "[16],Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 15. "[15],Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.quad 0x00 14. "[14],Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
bitfld.quad 0x00 13. "[13],Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.quad 0x00 12. "[12],Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 11. "[11],Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
bitfld.quad 0x00 10. "[10],Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.quad 0x00 9. "[9],Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.quad 0x00 8. "[8],Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 7. "[7],Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.quad 0x00 6. "[6],Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.quad 0x00 5. "[5],Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
bitfld.quad 0x00 4. "[4],Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 3. "[3],Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.quad 0x00 2. "[2],Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
bitfld.quad 0x00 1. "[1],Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.quad 0x00 0. "[0],Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
group.quad spr:0x34C90++0x00
line.quad 0x00 "ICH_AP1R0_EL2,Interrupt Controller Hypervisor Active Priorities Group 1 Register 0"
bitfld.quad 0x00 31. "P[31],Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.quad 0x00 30. "[30],Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.quad 0x00 29. "[29],Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
bitfld.quad 0x00 28. "[28],Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 27. "[27],Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.quad 0x00 26. "[26],Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
bitfld.quad 0x00 25. "[25],Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.quad 0x00 24. "[24],Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 23. "[23],Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
bitfld.quad 0x00 22. "[22],Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.quad 0x00 21. "[21],Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.quad 0x00 20. "[20],Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 19. "[19],Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.quad 0x00 18. "[18],Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.quad 0x00 17. "[17],Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
bitfld.quad 0x00 16. "[16],Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 15. "[15],Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.quad 0x00 14. "[14],Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
bitfld.quad 0x00 13. "[13],Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.quad 0x00 12. "[12],Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 11. "[11],Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
bitfld.quad 0x00 10. "[10],Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.quad 0x00 9. "[9],Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.quad 0x00 8. "[8],Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 7. "[7],Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.quad 0x00 6. "[6],Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.quad 0x00 5. "[5],Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
bitfld.quad 0x00 4. "[4],Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 3. "[3],Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.quad 0x00 2. "[2],Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
bitfld.quad 0x00 1. "[1],Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.quad 0x00 0. "[0],Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
tree.end
newline
rgroup.quad spr:0x34CB3++0x00
line.quad 0x00 "ICH_EISR_EL2,Interrupt Controller End Of Interrupt Status Register"
bitfld.quad 0x00 3. "STATUS3,EOI maintenance interrupt status bit for list register 3" "No interrupt,Interrupt"
bitfld.quad 0x00 2. "STATUS2,EOI maintenance interrupt status bit for list register 2" "No interrupt,Interrupt"
bitfld.quad 0x00 1. "STATUS1,EOI maintenance interrupt status bit for list register 1" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 0. "STATUS0,EOI maintenance interrupt status bit for list register 0" "No interrupt,Interrupt"
rgroup.quad spr:0x34CB5++0x00
line.quad 0x00 "ICH_ELRSR_EL2,Interrupt Controller Empty List Register Status Register"
bitfld.quad 0x00 3. "STATUS3,Status bit for list register 3" "Interrupt,No interrupt"
bitfld.quad 0x00 2. "STATUS2,Status bit for list register 2" "Interrupt,No interrupt"
bitfld.quad 0x00 1. "STATUS1,Status bit for list register 1" "Interrupt,No interrupt"
newline
bitfld.quad 0x00 0. "STATUS0,Status bit for list register 0" "Interrupt,No interrupt"
group.quad spr:0x34CB0++0x00
line.quad 0x00 "ICH_HCR_EL2,Interrupt Controller Hypervisor Control Register"
bitfld.quad 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 14. "TDIR,Trap non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped"
bitfld.quad 0x00 13. "TSEI, Trap all locally generated SEIs" "Not trapped,?..."
newline
bitfld.quad 0x00 12. "TALL1,Trap all non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 11. "TALL0,Trap all non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 10. "TC,Trap all non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 7. "VGRP1DIE,VM Group 1 disabled interrupt enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 6. "VGRP1EIE,VM group 1 enabled interrupt enable" "Disabled,Enabled"
bitfld.quad 0x00 5. "VGRP0DIE,VM group 0 disabled interrupt enable" "Disabled,Enabled"
bitfld.quad 0x00 4. "VGRP0EIE,VM Group 0 enabled interrupt enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "NPIE,No pending interrupt enable" "Disabled,Enabled"
bitfld.quad 0x00 2. "LRENPIE,List register entry not present interrupt enable" "Disabled,Enabled"
bitfld.quad 0x00 1. "UIE,Underflow interrupt enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled"
if (((per.q(spr:(0x34CC0+0x0)))&0x2000000000000000)==0x00)
group.quad spr:(0x34CC0+0x0)++0x00
line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
bitfld.quad 0x00 41. "PINTID_EOI,End of interrupt" "Interrupt,No interrupt"
hexmask.quad.long 0x00 0.--31. 1. "VINTID,Virtual INTID of the interrupt"
else
group.quad spr:(0x34CC0+0x0)++0x00
line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID for hardware interrupts"
hexmask.quad.long 0x00 0.--31. 1. "VINTID,Virtual INTID of the interrupt"
endif
if (((per.q(spr:(0x34CC0+0x1)))&0x2000000000000000)==0x00)
group.quad spr:(0x34CC0+0x1)++0x00
line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
bitfld.quad 0x00 41. "PINTID_EOI,End of interrupt" "Interrupt,No interrupt"
hexmask.quad.long 0x00 0.--31. 1. "VINTID,Virtual INTID of the interrupt"
else
group.quad spr:(0x34CC0+0x1)++0x00
line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID for hardware interrupts"
hexmask.quad.long 0x00 0.--31. 1. "VINTID,Virtual INTID of the interrupt"
endif
if (((per.q(spr:(0x34CC0+0x2)))&0x2000000000000000)==0x00)
group.quad spr:(0x34CC0+0x2)++0x00
line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
bitfld.quad 0x00 41. "PINTID_EOI,End of interrupt" "Interrupt,No interrupt"
hexmask.quad.long 0x00 0.--31. 1. "VINTID,Virtual INTID of the interrupt"
else
group.quad spr:(0x34CC0+0x2)++0x00
line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID for hardware interrupts"
hexmask.quad.long 0x00 0.--31. 1. "VINTID,Virtual INTID of the interrupt"
endif
if (((per.q(spr:(0x34CC0+0x3)))&0x2000000000000000)==0x00)
group.quad spr:(0x34CC0+0x3)++0x00
line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
bitfld.quad 0x00 41. "PINTID_EOI,End of interrupt" "Interrupt,No interrupt"
hexmask.quad.long 0x00 0.--31. 1. "VINTID,Virtual INTID of the interrupt"
else
group.quad spr:(0x34CC0+0x3)++0x00
line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID for hardware interrupts"
hexmask.quad.long 0x00 0.--31. 1. "VINTID,Virtual INTID of the interrupt"
endif
rgroup.quad spr:0x34CB2++0x00
line.quad 0x00 "ICH_MISR_EL2,Interrupt Controller Maintenance Interrupt State Register"
bitfld.quad 0x00 7. "VGRP1D,VPE group 1 disabled" "Not asserted,Asserted"
bitfld.quad 0x00 6. "VGRP1E,VPE group 1 enabled" "Not asserted,Asserted"
bitfld.quad 0x00 5. "VGRP0D,VPE group 0 disabled" "Not asserted,Asserted"
newline
bitfld.quad 0x00 4. "VGRP0E,VPE Group 0 enabled" "Not asserted,Asserted"
bitfld.quad 0x00 3. "NP,No pending" "Not asserted,Asserted"
bitfld.quad 0x00 2. "LRENP,List register entry not present" "Not asserted,Asserted"
newline
bitfld.quad 0x00 1. "U,Underflow" "Not asserted,Asserted"
bitfld.quad 0x00 0. "EOI,End of interrupt" "Not asserted,Asserted"
group.quad spr:0x34CB7++0x00
line.quad 0x00 "ICH_VMCR_EL2,Interrupt Controller Virtual Machine Control Register"
hexmask.quad.byte 0x00 24.--31. 1. "VPMR,The priority mask level for the virtual CPU interface"
bitfld.quad 0x00 21.--23. "VBPR0,Virtual binary point register group 0" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]"
bitfld.quad 0x00 18.--20. "VBPR1,Virtual binary point register group 1" "Reserved,[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]"
newline
bitfld.quad 0x00 9. "VEOIM,Controls whether a write to an End of Interrupt register also deactivates the virtual interrupt" "Disabled,Enabled"
bitfld.quad 0x00 4. "VCBPR,Virtual common binary point register" "Separate registers,Same register"
bitfld.quad 0x00 3. "VFIQEN,Virtual FIQ enable" "Virtual IRQs,Virtual FIQs"
newline
bitfld.quad 0x00 1. "VENG1,Virtual group 1 interrupt enable" "Disabled,Enabled"
bitfld.quad 0x00 0. "VENG0,Virtual group 0 interrupt enable" "Disabled,Enabled"
rgroup.quad spr:0x34CB1++0x00
line.quad 0x00 "ICH_VTR_EL2,Interrupt Controller VGIC Type Register"
bitfld.quad 0x00 29.--31. "PRIBITS,The number of virtual priority bits implemented" "Reserved,Reserved,Reserved,Reserved,5 bits (32 levels),?..."
bitfld.quad 0x00 26.--28. "PREBITS,The number of virtual preemption bits implemented" "Reserved,Reserved,Reserved,Reserved,5 bits,?..."
bitfld.quad 0x00 23.--25. "IDBITS,The number of virtual interrupt identifier bits supported" "16 bits,?..."
newline
bitfld.quad 0x00 22. "SEIS,Indicates whethesr the virtual CPU interface supports local generation of SEIs" "Not supported,?..."
bitfld.quad 0x00 21. "A3V,Affinity 3 valid" "Reserved,Non-zero"
bitfld.quad 0x00 20. "NV4,GICv4 direct injection of virtual interrupts not supported" "Supported,?..."
newline
bitfld.quad 0x00 19. "TDS,Separate trapping of Non-secure EL1 writes to ICV_DIR_EL1 supported" "Reserved,Supported"
bitfld.quad 0x00 0.--4. "LISTREGS,The number of implemented list registers" "Reserved,Reserved,Reserved,4,?..."
tree.end
tree.end
tree "Debug Registers"
rgroup.quad spr:0x23010++0x00
line.quad 0x00 "MDCCSR_EL0,Monitor DCC Status Register"
bitfld.quad 0x00 30. "RXFULL,DTRRX register full" "Empty,Full"
bitfld.quad 0x00 29. "TXFULL,DTRTX register full" "Empty,Full"
group.quad spr:0x20020++0x00
line.quad 0x00 "MDCCINT_EL1,Monitor DCC Interrupt Enable Register"
bitfld.quad 0x00 30. "RX,DCC interrupt request enable control for DTRRX" "Disabled,Enabled"
bitfld.quad 0x00 29. "TX,DCC interrupt request enable control for DTRTX" "Disabled,Enabled"
group.quad spr:0x23040++0x00
line.quad 0x00 "DBGDTR_EL0,Half Duplex Data Transfer Register"
hexmask.quad.long 0x00 32.--63. 1. "HIGHWORD,Writes to this register set DTRRX to the value in this field and do not change RXfull"
hexmask.quad.long 0x00 0.--31. 1. "LOWWORD,Writes to this register set DTRTX to the value in this field and set TXfull"
rgroup.quad spr:0x23050++0x00
line.quad 0x00 "DBGDTRRX_EL0,Full Duplex Receive Data Transfer Register"
hexmask.quad.long 0x00 0.--31. 1. "UDTRRX,Update DTRRX"
wgroup.quad spr:0x23050++0x00
line.quad 0x00 "DBGDTRTX_EL0,Full Duplex Transmit Data Transfer Register"
hexmask.quad.long 0x00 0.--31. 1. "RDTRTX,Return DTRTX"
group.quad spr:0x20002++0x00
line.quad 0x00 "OSDTRRX_EL1,OS Lock Data Transfer Register"
hexmask.quad.long 0x00 0.--31. 1. "UDTRRX,Update DTRRX without side-effect"
if (((per.l(spr:0x20114)&0x02)==0x00))
group.quad spr:0x20022++0x00
line.quad 0x00 "MDSCR_EL1,Monitor Debug System Control Register"
rbitfld.quad 0x00 31. "TFO,Trace Filter override" "Disabled,Enabled"
rbitfld.quad 0x00 30. "RXFULL,DBGDTRRX Register full save/restore bit" "Empty,Full"
rbitfld.quad 0x00 29. "TXFULL,DBGDTRTX Register full save/restore bit" "Empty,Full"
rbitfld.quad 0x00 27. "RXO,Save/restore bit" "Low,High"
newline
rbitfld.quad 0x00 26. "TXU,Save/restore bit" "Low,High"
rbitfld.quad 0x00 22.--23. "INTDIS,Save/restore bits" "0,1,2,3"
rbitfld.quad 0x00 21. "TDA,Save/restore bit" "Low,High"
bitfld.quad 0x00 15. "MDE,Monitor debug events" "Disabled,Enabled"
newline
rbitfld.quad 0x00 14. "HDE,Save/restore bit" "Low,High"
bitfld.quad 0x00 13. "KDE,Local (kernel) debug enable" "Disabled,Enabled"
bitfld.quad 0x00 12. "TDCC,Trap accesses to the debug comms channel in EL0" "Disabled,Enabled"
rbitfld.quad 0x00 6. "ERR,Save/restore bit" "Low,High"
newline
bitfld.quad 0x00 0. "SS,Software step control" "Disabled,Enabled"
else
group.quad spr:0x20022++0x00
line.quad 0x00 "MDSCR_EL1,Monitor Debug System Control Register"
bitfld.quad 0x00 31. "TFO,Trace Filter override" "Disabled,Enabled"
bitfld.quad 0x00 30. "RXFULL,DBGDTRRX Register full save/restore bit" "Empty,Full"
bitfld.quad 0x00 29. "TXFULL,DBGDTRTX Register full save/restore bit" "Empty,Full"
bitfld.quad 0x00 27. "RXO,Save/restore bit" "Low,High"
newline
bitfld.quad 0x00 26. "TXU,Save/restore bit" "Low,High"
bitfld.quad 0x00 22.--23. "INTDIS,Save/restore bits" "0,1,2,3"
bitfld.quad 0x00 21. "TDA,Save/restore bit" "Low,High"
bitfld.quad 0x00 15. "MDE,Monitor debug events" "Disabled,Enabled"
newline
bitfld.quad 0x00 14. "HDE,Save/restore bit" "Low,High"
bitfld.quad 0x00 13. "KDE,Local (kernel) debug enable" "Disabled,Enabled"
bitfld.quad 0x00 12. "TDCC,Trap accesses to the debug comms channel in EL0" "Disabled,Enabled"
bitfld.quad 0x00 6. "ERR,Save/restore bit" "Low,High"
newline
bitfld.quad 0x00 0. "SS,Software step control" "Disabled,Enabled"
endif
group.quad spr:0x20032++0x00
line.quad 0x00 "OSDTRTX_EL1,OS Lock Data Transfer Register"
hexmask.quad.long 0x00 0.--31. 1. "RDTRRX,Return DTRRX without side-effect"
if (((per.q(spr:0x20114)&0x02)==0x02))
group.quad spr:0x20062++0x00
line.quad 0x00 "OSECCR_EL1,OS Lock Exception Catch Control Register"
hexmask.quad.long 0x00 0.--31. 1. "EDECCR,Used for save/restore to EDECCR over powerdown"
else
rgroup.quad spr:0x20062++0x00
line.quad 0x00 "OSECCR_EL1,OS Lock Exception Catch Control Register"
endif
rgroup.quad spr:0x20100++0x00
line.quad 0x00 "MDRAR_EL1,Debug ROM Address Register"
hexmask.quad 0x00 12.--47. 0x10 "ROMADDR,ROM base physical address"
bitfld.quad 0x00 0.--1. "VALID,ROM address valid" "Invalid,Reserved,Reserved,Valid"
wgroup.quad spr:0x20104++0x00
line.quad 0x00 "OSLAR_EL1,OS Lock Access Register"
bitfld.quad 0x00 0. "OSLK,OS lock" "Unlock,Lock"
rgroup.quad spr:0x20114++0x00
line.quad 0x00 "OSLSR_EL1,OS Lock Status Register"
bitfld.quad 0x00 2. "NTT,Not 32-bit access" "Low,High"
bitfld.quad 0x00 1. "OSLK,OS lock status" "Not locked,Locked"
bitfld.quad 0x00 0. 3. "OSLM,OS lock model implemented field" "Not implemented,Reserved,Implemented,?..."
group.quad spr:0x20134++0x00
line.quad 0x00 "OSDLR_EL1,OS Double-lock Register"
bitfld.quad 0x00 0. "DLK,OS double-lock control" "Not locked,Locked"
group.quad spr:0x20144++0x00
line.quad 0x00 "DBGPRCR_EL1,Debug Power/Reset Control Register"
bitfld.quad 0x00 0. "CORENPDRQ,Core no powerdown request" "Powered down,Emulated"
group.quad spr:0x20786++0x00
line.quad 0x00 "DBGCLAIMSET_EL1,Claim Tag Register Set"
bitfld.quad 0x00 7. "CT7,Claim Tag 7 Set" "Not set,Set"
bitfld.quad 0x00 6. "CT6,Claim Tag 6 Set" "Not set,Set"
bitfld.quad 0x00 5. "CT5,Claim Tag 5 Set" "Not set,Set"
bitfld.quad 0x00 4. "CT4,Claim Tag 4 Set" "Not set,Set"
newline
bitfld.quad 0x00 3. "CT3,Claim Tag 3 Set" "Not set,Set"
bitfld.quad 0x00 2. "CT2,Claim Tag 2 Set" "Not set,Set"
bitfld.quad 0x00 1. "CT1,Claim Tag 1 Set" "Not set,Set"
bitfld.quad 0x00 0. "CT0,Claim Tag 0 Set" "Not set,Set"
group.quad spr:0x20796++0x00
line.quad 0x00 "DBGCLAIMCLR_EL1,Claim Tag Register Clear"
bitfld.quad 0x00 7. "CT7,Claim Tag 7 Clear" "Not cleared,Cleared"
bitfld.quad 0x00 6. "CT6,Claim Tag 6 Clear" "Not cleared,Cleared"
bitfld.quad 0x00 5. "CT5,Claim Tag 5 Clear" "Not cleared,Cleared"
bitfld.quad 0x00 4. "CT4,Claim Tag 4 Clear" "Not cleared,Cleared"
newline
bitfld.quad 0x00 3. "CT3,Claim Tag 3 Clear" "Not cleared,Cleared"
bitfld.quad 0x00 2. "CT2,Claim Tag 2 Clear" "Not cleared,Cleared"
bitfld.quad 0x00 1. "CT1,Claim Tag 1 Clear" "Not cleared,Cleared"
bitfld.quad 0x00 0. "CT0,Claim Tag 0 Clear" "Not cleared,Cleared"
rgroup.quad spr:0x207E6++0x00
line.quad 0x00 "DBGAUTHSTATUS_EL1,Authentication Status Register"
bitfld.quad 0x00 26.--27. "RTNID,Root non-invasive debug" "Not implemented,Reserved,Disabled,Enabled"
bitfld.quad 0x00 24.--25. "RTID,Root invasive debug" "Not implemented,Reserved,Disabled,Enabled"
bitfld.quad 0x00 14.--15. "RLNID,Realm non-invasive debug" "Not implemented,Reserved,Disabled,Enabled"
bitfld.quad 0x00 12.--13. "RLID,Realm invasive debug" "Not implemented,Reserved,Disabled,Enabled"
newline
bitfld.quad 0x00 6.--7. "SNID,Secure non-invasive debug" "Not implemented,Reserved,Implemented and disabled,Implemented and enabled"
bitfld.quad 0x00 4.--5. "SID,Secure invasive debug" "Not implemented,Reserved,Implemented and disabled,Implemented and enabled"
bitfld.quad 0x00 2.--3. "NSNID,Non-secure non-invasive debug" "Not implemented,Reserved,Reserved,Implemented and enabled"
bitfld.quad 0x00 0.--1. "NSID,Non-secure invasive debug" "Not implemented,Reserved,Implemented and disabled,Implemented and enabled"
group.quad spr:0x30400++0x00
line.quad 0x00 "SPSR_EL1,Saved Program Status Register (EL1)"
bitfld.quad 0x00 31. "N,Negative condition flag" "Not negative,Negative"
bitfld.quad 0x00 30. "Z,Zero condition flag" "Not zero,Zero"
bitfld.quad 0x00 29. "C,Carry condition flag" "Not carry,Carry"
bitfld.quad 0x00 28. "V,Overflow condition flag" "No overflow,Overflow"
newline
bitfld.quad 0x00 25. "TCO,Tag check override" "Unaffected,Unchecked"
bitfld.quad 0x00 24. "DIT,Data Independent Timing" "No,Yes"
bitfld.quad 0x00 23. "UAO,User Access Override" "Standard routines,New routines"
bitfld.quad 0x00 22. "PAN,Privileged Access Never" "No,Yes"
newline
bitfld.quad 0x00 21. "SS,Software step" "0,1"
bitfld.quad 0x00 20. "IL,Illegal Execution state" "0,1"
bitfld.quad 0x00 12. "SSBS,Speculative store bypass safe mechanism" "Not permitted,Permitted"
bitfld.quad 0x00 10.--11. "BTYPE,Branch Type Indicator" "0,1,2,3"
newline
bitfld.quad 0x00 9. "D,Process state D mask" "Not masked,Masked"
bitfld.quad 0x00 8. "A,SError interrupt mask bit" "Not masked,Masked"
bitfld.quad 0x00 7. "I,IRQ mask bit" "Not masked,Masked"
bitfld.quad 0x00 6. "F,FIQ mask bit" "Not masked,Masked"
newline
bitfld.quad 0x00 4. "M[4],Execution state that the exception was taken from" "AArch64,AArch32"
bitfld.quad 0x00 0.--3. "M[3:0],Current PE mode" "El0t,Reserved,Reserved,Reserved,EL1t,EL1h,?..."
group.quad spr:0x35400++0x00
line.quad 0x00 "SPSR_EL12,Saved Program Status Register (EL12)"
bitfld.quad 0x00 31. "N,Negative condition flag" "Not negative,Negative"
bitfld.quad 0x00 30. "Z,Zero condition flag" "Not zero,Zero"
bitfld.quad 0x00 29. "C,Carry condition flag" "Not carry,Carry"
bitfld.quad 0x00 28. "V,Overflow condition flag" "No overflow,Overflow"
newline
bitfld.quad 0x00 25. "TCO,Tag check override" "Unaffected,Unchecked"
bitfld.quad 0x00 24. "DIT,Data Independent Timing" "No,Yes"
bitfld.quad 0x00 23. "UAO,User Access Override" "Standard routines,New routines"
bitfld.quad 0x00 22. "PAN,Privileged Access Never" "No,Yes"
newline
bitfld.quad 0x00 21. "SS,Software step" "0,1"
bitfld.quad 0x00 20. "IL,Illegal Execution state" "0,1"
bitfld.quad 0x00 12. "SSBS,Speculative store bypass safe mechanism" "Not permitted,Permitted"
bitfld.quad 0x00 10.--11. "BTYPE,Branch Type Indicator" "0,1,2,3"
newline
bitfld.quad 0x00 9. "D,Process state D mask" "Not masked,Masked"
bitfld.quad 0x00 8. "A,SError interrupt mask bit" "Not masked,Masked"
bitfld.quad 0x00 7. "I,IRQ mask bit" "Not masked,Masked"
bitfld.quad 0x00 6. "F,FIQ mask bit" "Not masked,Masked"
newline
bitfld.quad 0x00 4. "M[4],Execution state that the exception was taken from" "AArch64,AArch32"
bitfld.quad 0x00 0.--3. "M[3:0],Current PE mode" "El0t,Reserved,Reserved,Reserved,EL1t,EL1h,?..."
group.quad spr:0x34400++0x00
line.quad 0x00 "SPSR_EL2,Saved Program Status Register (EL2)"
bitfld.quad 0x00 31. "N,Negative condition flag" "Not negative,Negative"
bitfld.quad 0x00 30. "Z,Zero condition flag" "Not zero,Zero"
bitfld.quad 0x00 29. "C,Carry condition flag" "Not carry,Carry"
bitfld.quad 0x00 28. "V,Overflow condition flag" "No overflow,Overflow"
newline
bitfld.quad 0x00 25. "TCO,Tag check override" "Unaffected,Unchecked"
bitfld.quad 0x00 24. "DIT,Data Independent Timing" "No,Yes"
bitfld.quad 0x00 23. "UAO,User Access Override" "Standard routines,New routines"
bitfld.quad 0x00 22. "PAN,Privileged Access Never" "No,Yes"
newline
bitfld.quad 0x00 21. "SS,Software step" "0,1"
bitfld.quad 0x00 20. "IL,Illegal Execution state" "0,1"
bitfld.quad 0x00 12. "SSBS,Speculative store bypass safe mechanism" "Not permitted,Permitted"
bitfld.quad 0x00 10.--11. "BTYPE,Branch Type Indicator" "0,1,2,3"
newline
bitfld.quad 0x00 9. "D,Process state D mask" "Not masked,Masked"
bitfld.quad 0x00 8. "A,SError interrupt mask bit" "Not masked,Masked"
bitfld.quad 0x00 7. "I,IRQ mask bit" "Not masked,Masked"
bitfld.quad 0x00 6. "F,FIQ mask bit" "Not masked,Masked"
newline
bitfld.quad 0x00 4. "M[4],Execution state that the exception was taken from" "AArch64,AArch32"
bitfld.quad 0x00 0.--3. "M[3:0],Current PE mode" "El0t,Reserved,Reserved,Reserved,EL1t,EL1h,Reserved,Reserved,EL2t,EL2h,?..."
group.quad spr:0x36400++0x00
line.quad 0x00 "SPSR_EL3,Saved Program Status Register (EL3)"
bitfld.quad 0x00 31. "N,Negative condition flag" "Not negative,Negative"
bitfld.quad 0x00 30. "Z,Zero condition flag" "Not zero,Zero"
bitfld.quad 0x00 29. "C,Carry condition flag" "Not carry,Carry"
bitfld.quad 0x00 28. "V,Overflow condition flag" "No overflow,Overflow"
newline
bitfld.quad 0x00 25. "TCO,Tag check override" "Unaffected,Unchecked"
bitfld.quad 0x00 24. "DIT,Data Independent Timing" "No,Yes"
bitfld.quad 0x00 23. "UAO,User Access Override" "Standard routines,New routines"
bitfld.quad 0x00 22. "PAN,Privileged Access Never" "No,Yes"
newline
bitfld.quad 0x00 21. "SS,Software step" "0,1"
bitfld.quad 0x00 20. "IL,Illegal Execution state" "0,1"
bitfld.quad 0x00 12. "SSBS,Speculative store bypass safe mechanism" "Not permitted,Permitted"
bitfld.quad 0x00 10.--11. "BTYPE,Branch Type Indicator" "0,1,2,3"
newline
bitfld.quad 0x00 9. "D,Process state D mask" "Not masked,Masked"
bitfld.quad 0x00 8. "A,SError interrupt mask bit" "Not masked,Masked"
bitfld.quad 0x00 7. "I,IRQ mask bit" "Not masked,Masked"
bitfld.quad 0x00 6. "F,FIQ mask bit" "Not masked,Masked"
newline
bitfld.quad 0x00 4. "M[4],Execution state that the exception was taken from" "AArch64,AArch32"
bitfld.quad 0x00 0.--3. "M[3:0],Current PE mode" "El0t,Reserved,Reserved,Reserved,EL1t,EL1h,Reserved,Reserved,EL2t,EL2h,Reserved,Reserved,EL3t,EL3h,?..."
group.quad spr:0x33450++0x00
line.quad 0x00 "DSPSR_EL0,Debug Saved Program Status Register"
bitfld.quad 0x00 31. "N,Negative condition flag" "Not negative,Negative"
bitfld.quad 0x00 30. "Z,Zero condition flag" "Not zero,Zero"
bitfld.quad 0x00 29. "C,Carry condition flag" "Not carry,Carry"
bitfld.quad 0x00 28. "V,Overflow condition flag" "No overflow,Overflow"
newline
bitfld.quad 0x00 25. "TCO,Tag check override" "Unaffected,Unchecked"
bitfld.quad 0x00 24. "DIT,Data Independent Timing" "No,Yes"
bitfld.quad 0x00 23. "UAO,User Access Override" "Standard routines,New routines"
bitfld.quad 0x00 22. "PAN,Privileged Access Never" "No,Yes"
newline
bitfld.quad 0x00 21. "SS,Software step" "0,1"
bitfld.quad 0x00 20. "IL,Illegal Execution state" "0,1"
bitfld.quad 0x00 12. "SSBS,Speculative store bypass safe mechanism" "Not permitted,Permitted"
bitfld.quad 0x00 10.--11. "BTYPE,Branch Type Indicator" "0,1,2,3"
newline
bitfld.quad 0x00 9. "D,Process state D mask" "Not masked,Masked"
bitfld.quad 0x00 8. "A,SError interrupt mask bit" "Not masked,Masked"
bitfld.quad 0x00 7. "I,IRQ mask bit" "Not masked,Masked"
bitfld.quad 0x00 6. "F,FIQ mask bit" "Not masked,Masked"
newline
bitfld.quad 0x00 4. "M[4],Execution state that the exception was taken from" "AArch64,AArch32"
bitfld.quad 0x00 0.--3. "M[3:0],Current PE mode" "El0t,Reserved,Reserved,Reserved,EL1t,EL1h,Reserved,Reserved,EL2t,EL2h,Reserved,Reserved,EL3t,EL3h,?..."
group.quad spr:0x33451++0x00
line.quad 0x00 "DLR_EL0,Debug Link Register"
group.quad spr:0x30423++0x00
line.quad 0x00 "PAN,Privileged Access Never"
bitfld.quad 0x00 22. "PAN,Privileged access never disabled" "No,Yes"
group.quad spr:0x30401++0x00
line.quad 0x00 "ELR_EL1,Exception Link Register (EL1)"
group.quad spr:0x34401++0x00
line.quad 0x00 "ELR_EL2,Exception Link Register (EL2)"
group.quad spr:0x36401++0x00
line.quad 0x00 "ELR_EL3,Exception Link Register (EL3)"
group.quad spr:0x30410++0x00
line.quad 0x00 "SP_EL0,Stack Pointer (EL0)"
group.quad spr:0x34410++0x00
line.quad 0x00 "SP_EL1,Stack Pointer (EL1)"
group.quad spr:0x36410++0x00
line.quad 0x00 "SP_EL2,Stack Pointer (EL2)"
group.quad spr:0x30420++0x00
line.quad 0x00 "SPSel,Stack Pointer Select"
bitfld.quad 0x00 0. "SP,Stack pointer to use" "SP_EL0,SP_ELx"
group.quad spr:0x33426++0x00
line.quad 0x00 "SSBS,Speculative Store Bypass Safe"
bitfld.quad 0x00 12. "SSBS,Speculative Store Bypass Safe" "Disabled,Enabled"
group.quad spr:0x30424++0x00
line.quad 0x00 "UAO,User Access Override"
bitfld.quad 0x00 23. "UAO,User access override" "0,1"
group.quad spr:0x34431++0x00
line.quad 0x00 "SPSR_ABT,Saved Program Status Register (Abort Mode)"
bitfld.quad 0x00 31. "N,Negative condition flag" "Not negative,Negative"
bitfld.quad 0x00 30. "Z,Zero condition flag" "Not zero,Zero"
bitfld.quad 0x00 29. "C,Carry condition flag" "Not carry,Carry"
bitfld.quad 0x00 28. "V,Overflow condition flag" "No overflow,Overflow"
newline
bitfld.quad 0x00 27. "Q,Cumulative condition flag" "Not occurred,Occurred"
bitfld.quad 0x00 23. "SSBS,Speculative store bypass safe mechanism" "Not permitted,Permitted"
bitfld.quad 0x00 22. "PAN,Privileged access never" "No,Yes"
bitfld.quad 0x00 21. "DIT,Data independent timing" "0,1"
newline
bitfld.quad 0x00 20. "IL,Illegal Execution state" "0,1"
bitfld.quad 0x00 13.--15. "IT[5:7],IT block state bits for the T32 IT (If-Then) instruction - base condition for the IT block" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 25.--26. 10.--12. "IT[0:4],IT block state bits for the T32 IT (If-Then) instruction - size of the IT block" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 16.--19. "GE,Greater than or Equal flags" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 9. "E,Endianness state bit" "Little,Big"
bitfld.quad 0x00 8. "A,Asynchronous data abort mask bit" "Not masked,Masked"
bitfld.quad 0x00 7. "I,IRQ mask bit" "Not masked,Masked"
bitfld.quad 0x00 6. "F,FIQ mask bit" "Not masked,Masked"
newline
bitfld.quad 0x00 5. "T,T32 Instruction set state" "A32,T32"
bitfld.quad 0x00 4. "M[4],Execution state that the exception was taken from" "AArch64,AArch32"
bitfld.quad 0x00 0.--3. "M[3:0],Current PE mode" "User,FIQ,IRQ,Supervisor,Reserved,Reserved,Monitor,Abort,Reserved,Reserved,Hyp,Undefined,Reserved,Reserved,Reserved,System"
group.quad spr:0x34433++0x00
line.quad 0x00 "SPSR_FIQ,Saved Program Status Register (FIQ Mode)"
bitfld.quad 0x00 31. "N,Negative condition flag" "Not negative,Negative"
bitfld.quad 0x00 30. "Z,Zero condition flag" "Not zero,Zero"
bitfld.quad 0x00 29. "C,Carry condition flag" "Not carry,Carry"
bitfld.quad 0x00 28. "V,Overflow condition flag" "No overflow,Overflow"
newline
bitfld.quad 0x00 27. "Q,Cumulative condition flag" "Not occurred,Occurred"
bitfld.quad 0x00 23. "SSBS,Speculative store bypass safe mechanism" "Not permitted,Permitted"
bitfld.quad 0x00 22. "PAN,Privileged access never" "No,Yes"
bitfld.quad 0x00 21. "DIT,Data independent timing" "0,1"
newline
bitfld.quad 0x00 20. "IL,Illegal Execution state" "0,1"
bitfld.quad 0x00 13.--15. "IT[5:7],IT block state bits for the T32 IT (If-Then) instruction - base condition for the IT block" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 25.--26. 10.--12. "IT[0:4],IT block state bits for the T32 IT (If-Then) instruction - size of the IT block" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 16.--19. "GE,Greater than or Equal flags" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 9. "E,Endianness state bit" "Little,Big"
bitfld.quad 0x00 8. "A,Asynchronous data abort mask bit" "Not masked,Masked"
bitfld.quad 0x00 7. "I,IRQ mask bit" "Not masked,Masked"
bitfld.quad 0x00 6. "F,FIQ mask bit" "Not masked,Masked"
newline
bitfld.quad 0x00 5. "T,T32 Instruction set state" "A32,T32"
bitfld.quad 0x00 4. "M[4],Execution state that the exception was taken from" "AArch64,AArch32"
bitfld.quad 0x00 0.--3. "M[3:0],Current PE mode" "User,FIQ,IRQ,Supervisor,Reserved,Reserved,Monitor,Abort,Reserved,Reserved,Reserved,Undefined,Reserved,Reserved,Reserved,System"
group.quad spr:0x34430++0x00
line.quad 0x00 "SPSR_IRQ,Saved Program Status Register (IRQ Mode)"
bitfld.quad 0x00 31. "N,Negative condition flag" "Not negative,Negative"
bitfld.quad 0x00 30. "Z,Zero condition flag" "Not zero,Zero"
bitfld.quad 0x00 29. "C,Carry condition flag" "Not carry,Carry"
bitfld.quad 0x00 28. "V,Overflow condition flag" "No overflow,Overflow"
newline
bitfld.quad 0x00 27. "Q,Cumulative condition flag" "Not occurred,Occurred"
bitfld.quad 0x00 23. "SSBS,Speculative store bypass safe mechanism" "Not permitted,Permitted"
bitfld.quad 0x00 22. "PAN,Privileged access never" "No,Yes"
bitfld.quad 0x00 21. "DIT,Data independent timing" "0,1"
newline
bitfld.quad 0x00 20. "IL,Illegal Execution state" "0,1"
bitfld.quad 0x00 13.--15. "IT[5:7],IT block state bits for the T32 IT (If-Then) instruction - base condition for the IT block" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 25.--26. 10.--12. "IT[0:4],IT block state bits for the T32 IT (If-Then) instruction - size of the IT block" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 16.--19. "GE,Greater than or Equal flags" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 9. "E,Endianness state bit" "Little,Big"
bitfld.quad 0x00 8. "A,Asynchronous data abort mask bit" "Not masked,Masked"
bitfld.quad 0x00 7. "I,IRQ mask bit" "Not masked,Masked"
bitfld.quad 0x00 6. "F,FIQ mask bit" "Not masked,Masked"
newline
bitfld.quad 0x00 5. "T,T32 Instruction set state" "A32,T32"
bitfld.quad 0x00 4. "M[4],Execution state that the exception was taken from" "AArch64,AArch32"
bitfld.quad 0x00 0.--3. "M[3:0],Current PE mode" "User,FIQ,IRQ,Supervisor,Reserved,Reserved,Monitor,Abort,Reserved,Reserved,Reserved,Undefined,Reserved,Reserved,Reserved,System"
group.quad spr:0x34432++0x00
line.quad 0x00 "SPSR_UND,Saved Program Status Register (Undefined MODE)"
bitfld.quad 0x00 31. "N,Negative condition flag" "Not negative,Negative"
bitfld.quad 0x00 30. "Z,Zero condition flag" "Not zero,Zero"
bitfld.quad 0x00 29. "C,Carry condition flag" "Not carry,Carry"
bitfld.quad 0x00 28. "V,Overflow condition flag" "No overflow,Overflow"
newline
bitfld.quad 0x00 27. "Q,Cumulative condition flag" "Not occurred,Occurred"
bitfld.quad 0x00 23. "SSBS,Speculative store bypass safe mechanism" "Not permitted,Permitted"
bitfld.quad 0x00 22. "PAN,Privileged access never" "No,Yes"
bitfld.quad 0x00 21. "DIT,Data independent timing" "0,1"
newline
bitfld.quad 0x00 20. "IL,Illegal Execution state" "0,1"
bitfld.quad 0x00 13.--15. "IT[5:7],IT block state bits for the T32 IT (If-Then) instruction - base condition for the IT block" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 25.--26. 10.--12. "IT[0:4],IT block state bits for the T32 IT (If-Then) instruction - size of the IT block" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 16.--19. "GE,Greater than or Equal flags" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 9. "E,Endianness state bit" "Little,Big"
bitfld.quad 0x00 8. "A,Asynchronous data abort mask bit" "Not masked,Masked"
bitfld.quad 0x00 7. "I,IRQ mask bit" "Not masked,Masked"
bitfld.quad 0x00 6. "F,FIQ mask bit" "Not masked,Masked"
newline
bitfld.quad 0x00 5. "T,T32 Instruction set state" "A32,T32"
bitfld.quad 0x00 4. "M[4],Execution state that the exception was taken from" "AArch64,AArch32"
bitfld.quad 0x00 0.--3. "M[3:0],Current PE mode" "User,FIQ,IRQ,Supervisor,Reserved,Reserved,Monitor,Abort,Reserved,Reserved,Hyp,Undefined,Reserved,Reserved,Reserved,System"
rgroup.quad spr:0x30422++0x00
line.quad 0x00 "CURRENTEL,Current Exception Level"
bitfld.quad 0x00 2.--3. "EL,Current exception level" "EL0,EL1,EL2,EL3"
group.quad spr:0x33421++0x00
line.quad 0x00 "DAIF,Interrupt Mask Bits"
bitfld.quad 0x00 9. "D,Process state D mask" "Not masked,Masked"
bitfld.quad 0x00 8. "A,SError interrupt mask bit" "Not masked,Masked"
bitfld.quad 0x00 7. "I,IRQ mask bit" "Not masked,Masked"
bitfld.quad 0x00 6. "F,FIQ mask bit" "Not masked,Masked"
group.quad spr:0x33420++0x00
line.quad 0x00 "NZCV,Condition Flags"
bitfld.quad 0x00 31. "N,Negative condition flag" "Not occurred,Occurred"
bitfld.quad 0x00 30. "Z,Zero condition flag" "Not occurred,Occurred"
bitfld.quad 0x00 29. "C,Carry condition flag" "Not occurred,Occurred"
bitfld.quad 0x00 28. "V,Overflow condition flag" "Not occurred,Occurred"
rgroup.quad spr:0x36F10++0x00
line.quad 0x00 "DDATA0_EL3,DDATA0_EL3"
rgroup.quad spr:0x36F11++0x00
line.quad 0x00 "DDATA1_EL3,DDATA1_EL3"
rgroup.quad spr:0x36F12++0x00
line.quad 0x00 "DDATA2_EL3,DDATA2_EL3"
rgroup.quad spr:0x36F00++0x00
line.quad 0x00 "IDATA0_EL3,DDATA0_EL3"
rgroup.quad spr:0x36F01++0x00
line.quad 0x00 "IDATA1_EL3,DDATA1_EL3"
rgroup.quad spr:0x36F02++0x00
line.quad 0x00 "IDATA2_EL3,DDATA2_EL3"
tree.end
tree "Activity Monitors Unit"
group.quad spr:0x33F97++0x00
line.quad 0x00 "AMCNTENCLR_EL0,Activity Monitors Count Enable Clear Register"
bitfld.quad 0x00 4. "P4,AMEVCNTR4 disable bit [read/write]" "Disabled/No effect,Enabled/Disables"
newline
bitfld.quad 0x00 3. "P3,AMEVCNTR3 disable bit [read/write]" "Disabled/No effect,Enabled/Disables"
bitfld.quad 0x00 2. "P2,AMEVCNTR2 disable bit [read/write]" "Disabled/No effect,Enabled/Disables"
bitfld.quad 0x00 1. "P1,AMEVCNTR1 disable bit [read/write]" "Disabled/No effect,Enabled/Disables"
bitfld.quad 0x00 0. "P0,AMEVCNTR0 disable bit [read/write]" "Disabled/No effect,Enabled/Disables"
group.quad spr:0x33F96++0x00
line.quad 0x00 "AMCNTENSET_EL0,Activity Monitors Count Enable Set Register"
bitfld.quad 0x00 4. "P4,AMEVCNTR4 enable bit [read/write]" "Disabled/No effect,Enabled/Enables"
bitfld.quad 0x00 3. "P3,AMEVCNTR3 enable bit [read/write]" "Disabled/No effect,Enabled/Enables"
bitfld.quad 0x00 2. "P2,AMEVCNTR2 enable bit [read/write]" "Disabled/No effect,Enabled/Enables"
bitfld.quad 0x00 1. "P1,AMEVCNTR1 enable bit [read/write]" "Disabled/No effect,Enabled/Enables"
newline
bitfld.quad 0x00 0. "P0,AMEVCNTR0 enable bit" "Disabled/No effect,Enabled/Enables"
rgroup.quad spr:0x33FA6++0x00
line.quad 0x00 "AMCFGR_EL0,Activity Monitors Configuration Register"
bitfld.quad 0x00 8.--13. "SIZE,Size of counters" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
hexmask.quad.byte 0x00 0.--7. 1. 1. "N,Number of activity counters implemented"
group.quad spr:0x33FA7++0x00
line.quad 0x00 "AMUSERENR_EL0,Activity Monitor EL0 Enable access"
bitfld.quad 0x00 0. "EN,Traps EL0 accesses to the activity monitor registers to EL1" "Trapped,Not trapped"
newline
group.quad spr:0x33F90++0x00
line.quad 0x00 "AMEVCNTR0_EL0,Activity Monitor Event Counter Register 0"
group.quad spr:(0x33F90+0x10)++0x00
line.quad 0x00 "AMEVTYPER0_EL0,Activity Monitor Event Type Register 0"
hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,EVTCOUNT"
group.quad spr:0x33F91++0x00
line.quad 0x00 "AMEVCNTR1_EL0,Activity Monitor Event Counter Register 1"
group.quad spr:(0x33F91+0x10)++0x00
line.quad 0x00 "AMEVTYPER1_EL0,Activity Monitor Event Type Register 1"
hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,EVTCOUNT"
group.quad spr:0x33F92++0x00
line.quad 0x00 "AMEVCNTR2_EL0,Activity Monitor Event Counter Register 2"
group.quad spr:(0x33F92+0x10)++0x00
line.quad 0x00 "AMEVTYPER2_EL0,Activity Monitor Event Type Register 2"
hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,EVTCOUNT"
group.quad spr:0x33F93++0x00
line.quad 0x00 "AMEVCNTR3_EL0,Activity Monitor Event Counter Register 3"
group.quad spr:(0x33F93+0x10)++0x00
line.quad 0x00 "AMEVTYPER3_EL0,Activity Monitor Event Type Register 3"
hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,EVTCOUNT"
group.quad spr:0x33F94++0x00
line.quad 0x00 "AMEVCNTR4_EL0,Activity Monitor Event Counter Register 4"
group.quad spr:(0x33F94+0x10)++0x00
line.quad 0x00 "AMEVTYPER4_EL0,Activity Monitor Event Type Register 4"
hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,EVTCOUNT"
tree.end
tree "Breakpoint Registers"
tree "Breakpoint 0"
if (((per.q(spr:0x20005+0x0))&0xF00000)<=0x100000)
group.quad spr:(0x20004+0x0)++0x00
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x04 "VA,Bits[48:2] of the address value for comparison"
elif (((per.q(spr:0x20005+0x0))&0xF00000)>=0x200000)&&(((per.q(spr:0x20005+0x0))&0xF00000)<=0x300000)||(((per.q(spr:0x20005+0x0))&0xF00000)>=0x600000)&&(((per.q(spr:0x20005+0x0))&0xF00000)<=0x700000)
group.quad spr:(0x20004+0x0)++0x00
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x0))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x0))&0xF00000)<=0x900000)&&(((per.l(spr:0x34212))&0x80000)==0x00)
group.quad spr:(0x20004+0x0)++0x00
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
elif (((per.q(spr:0x20005+0x0))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x0))&0xF00000)<=0x900000)&&(((per.l(spr:0x34212))&0x80000)==0x80000)
group.quad spr:(0x20004+0x0)++0x00
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison"
elif (((per.q(spr:0x20005+0x0))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x0))&0xF00000)<=0xB00000)&&(((per.l(spr:0x34212))&0x80000)==0x00)
group.quad spr:(0x20004+0x0)++0x00
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
newline
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x0))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x0))&0xF00000)<=0xB00000)&&(((per.l(spr:0x34212))&0x80000)==0x80000)
group.quad spr:(0x20004+0x0)++0x00
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison"
newline
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x0))&0xF00000)>=0xC00000)&&(((per.q(spr:0x20005+0x0))&0xF00000)<=0xD00000)
group.quad spr:(0x20004+0x0)++0x00
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x0))&0xF00000)>=0xE00000)
group.quad spr:(0x20004+0x0)++0x00
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison"
newline
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
else
rgroup.quad spr:(0x20004+0x0)++0x00
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
endif
if (((per.q(spr:0x20005+0x0))&0x2000)==0x2000)
if (((per.q(spr:0x20005+0x0))&0xC000)==0x0000)
group.quad spr:(0x20005+0x0)++0x00
line.quad 0x00 "DBGBCR0_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor/TrustZone,Reserved,Any mode"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif (((per.q(spr:0x20005+0x0))&0xC000)==0x4000)
group.quad spr:(0x20005+0x0)++0x00
line.quad 0x00 "DBGBCR0_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif (((per.q(spr:0x20005+0x0))&0xC000)==0x8000)
group.quad spr:(0x20005+0x0)++0x00
line.quad 0x00 "DBGBCR0_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "TrustZone,System/Supervisor/TrustZone,Reserved,Any mode"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.quad spr:(0x20005+0x0)++0x00
line.quad 0x00 "DBGBCR0_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
else
if (((per.q(spr:0x20005+0x0))&0xC000)==0x00)||(((per.q(spr:0x20005+0x0))&0xC000)==0x4000)||(((per.q(spr:0x20005+0x0))&0xC000)==0x8000)
group.quad spr:(0x20005+0x0)++0x00
line.quad 0x00 "DBGBCR0_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,User,User/System"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.quad spr:(0x20005+0x0)++0x00
line.quad 0x00 "DBGBCR0_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
endif
tree.end
tree "Breakpoint 1"
if (((per.q(spr:0x20005+0x10))&0xF00000)<=0x100000)
group.quad spr:(0x20004+0x10)++0x00
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x04 "VA,Bits[48:2] of the address value for comparison"
elif (((per.q(spr:0x20005+0x10))&0xF00000)>=0x200000)&&(((per.q(spr:0x20005+0x10))&0xF00000)<=0x300000)||(((per.q(spr:0x20005+0x10))&0xF00000)>=0x600000)&&(((per.q(spr:0x20005+0x10))&0xF00000)<=0x700000)
group.quad spr:(0x20004+0x10)++0x00
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x10))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x10))&0xF00000)<=0x900000)&&(((per.l(spr:0x34212))&0x80000)==0x00)
group.quad spr:(0x20004+0x10)++0x00
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
elif (((per.q(spr:0x20005+0x10))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x10))&0xF00000)<=0x900000)&&(((per.l(spr:0x34212))&0x80000)==0x80000)
group.quad spr:(0x20004+0x10)++0x00
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison"
elif (((per.q(spr:0x20005+0x10))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x10))&0xF00000)<=0xB00000)&&(((per.l(spr:0x34212))&0x80000)==0x00)
group.quad spr:(0x20004+0x10)++0x00
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
newline
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x10))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x10))&0xF00000)<=0xB00000)&&(((per.l(spr:0x34212))&0x80000)==0x80000)
group.quad spr:(0x20004+0x10)++0x00
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison"
newline
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x10))&0xF00000)>=0xC00000)&&(((per.q(spr:0x20005+0x10))&0xF00000)<=0xD00000)
group.quad spr:(0x20004+0x10)++0x00
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x10))&0xF00000)>=0xE00000)
group.quad spr:(0x20004+0x10)++0x00
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison"
newline
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
else
rgroup.quad spr:(0x20004+0x10)++0x00
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
endif
if (((per.q(spr:0x20005+0x10))&0x2000)==0x2000)
if (((per.q(spr:0x20005+0x10))&0xC000)==0x0000)
group.quad spr:(0x20005+0x10)++0x00
line.quad 0x00 "DBGBCR1_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor/TrustZone,Reserved,Any mode"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif (((per.q(spr:0x20005+0x10))&0xC000)==0x4000)
group.quad spr:(0x20005+0x10)++0x00
line.quad 0x00 "DBGBCR1_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif (((per.q(spr:0x20005+0x10))&0xC000)==0x8000)
group.quad spr:(0x20005+0x10)++0x00
line.quad 0x00 "DBGBCR1_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "TrustZone,System/Supervisor/TrustZone,Reserved,Any mode"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.quad spr:(0x20005+0x10)++0x00
line.quad 0x00 "DBGBCR1_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
else
if (((per.q(spr:0x20005+0x10))&0xC000)==0x00)||(((per.q(spr:0x20005+0x10))&0xC000)==0x4000)||(((per.q(spr:0x20005+0x10))&0xC000)==0x8000)
group.quad spr:(0x20005+0x10)++0x00
line.quad 0x00 "DBGBCR1_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,User,User/System"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.quad spr:(0x20005+0x10)++0x00
line.quad 0x00 "DBGBCR1_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
endif
tree.end
tree "Breakpoint 2"
if (((per.q(spr:0x20005+0x20))&0xF00000)<=0x100000)
group.quad spr:(0x20004+0x20)++0x00
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x04 "VA,Bits[48:2] of the address value for comparison"
elif (((per.q(spr:0x20005+0x20))&0xF00000)>=0x200000)&&(((per.q(spr:0x20005+0x20))&0xF00000)<=0x300000)||(((per.q(spr:0x20005+0x20))&0xF00000)>=0x600000)&&(((per.q(spr:0x20005+0x20))&0xF00000)<=0x700000)
group.quad spr:(0x20004+0x20)++0x00
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x20))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x20))&0xF00000)<=0x900000)&&(((per.l(spr:0x34212))&0x80000)==0x00)
group.quad spr:(0x20004+0x20)++0x00
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
elif (((per.q(spr:0x20005+0x20))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x20))&0xF00000)<=0x900000)&&(((per.l(spr:0x34212))&0x80000)==0x80000)
group.quad spr:(0x20004+0x20)++0x00
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison"
elif (((per.q(spr:0x20005+0x20))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x20))&0xF00000)<=0xB00000)&&(((per.l(spr:0x34212))&0x80000)==0x00)
group.quad spr:(0x20004+0x20)++0x00
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
newline
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x20))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x20))&0xF00000)<=0xB00000)&&(((per.l(spr:0x34212))&0x80000)==0x80000)
group.quad spr:(0x20004+0x20)++0x00
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison"
newline
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x20))&0xF00000)>=0xC00000)&&(((per.q(spr:0x20005+0x20))&0xF00000)<=0xD00000)
group.quad spr:(0x20004+0x20)++0x00
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x20))&0xF00000)>=0xE00000)
group.quad spr:(0x20004+0x20)++0x00
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison"
newline
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
else
rgroup.quad spr:(0x20004+0x20)++0x00
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
endif
if (((per.q(spr:0x20005+0x20))&0x2000)==0x2000)
if (((per.q(spr:0x20005+0x20))&0xC000)==0x0000)
group.quad spr:(0x20005+0x20)++0x00
line.quad 0x00 "DBGBCR2_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor/TrustZone,Reserved,Any mode"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif (((per.q(spr:0x20005+0x20))&0xC000)==0x4000)
group.quad spr:(0x20005+0x20)++0x00
line.quad 0x00 "DBGBCR2_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif (((per.q(spr:0x20005+0x20))&0xC000)==0x8000)
group.quad spr:(0x20005+0x20)++0x00
line.quad 0x00 "DBGBCR2_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "TrustZone,System/Supervisor/TrustZone,Reserved,Any mode"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.quad spr:(0x20005+0x20)++0x00
line.quad 0x00 "DBGBCR2_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
else
if (((per.q(spr:0x20005+0x20))&0xC000)==0x00)||(((per.q(spr:0x20005+0x20))&0xC000)==0x4000)||(((per.q(spr:0x20005+0x20))&0xC000)==0x8000)
group.quad spr:(0x20005+0x20)++0x00
line.quad 0x00 "DBGBCR2_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,User,User/System"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.quad spr:(0x20005+0x20)++0x00
line.quad 0x00 "DBGBCR2_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
endif
tree.end
tree "Breakpoint 3"
if (((per.q(spr:0x20005+0x30))&0xF00000)<=0x100000)
group.quad spr:(0x20004+0x30)++0x00
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x04 "VA,Bits[48:2] of the address value for comparison"
elif (((per.q(spr:0x20005+0x30))&0xF00000)>=0x200000)&&(((per.q(spr:0x20005+0x30))&0xF00000)<=0x300000)||(((per.q(spr:0x20005+0x30))&0xF00000)>=0x600000)&&(((per.q(spr:0x20005+0x30))&0xF00000)<=0x700000)
group.quad spr:(0x20004+0x30)++0x00
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x30))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x30))&0xF00000)<=0x900000)&&(((per.l(spr:0x34212))&0x80000)==0x00)
group.quad spr:(0x20004+0x30)++0x00
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
elif (((per.q(spr:0x20005+0x30))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x30))&0xF00000)<=0x900000)&&(((per.l(spr:0x34212))&0x80000)==0x80000)
group.quad spr:(0x20004+0x30)++0x00
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison"
elif (((per.q(spr:0x20005+0x30))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x30))&0xF00000)<=0xB00000)&&(((per.l(spr:0x34212))&0x80000)==0x00)
group.quad spr:(0x20004+0x30)++0x00
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
newline
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x30))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x30))&0xF00000)<=0xB00000)&&(((per.l(spr:0x34212))&0x80000)==0x80000)
group.quad spr:(0x20004+0x30)++0x00
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison"
newline
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x30))&0xF00000)>=0xC00000)&&(((per.q(spr:0x20005+0x30))&0xF00000)<=0xD00000)
group.quad spr:(0x20004+0x30)++0x00
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x30))&0xF00000)>=0xE00000)
group.quad spr:(0x20004+0x30)++0x00
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison"
newline
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
else
rgroup.quad spr:(0x20004+0x30)++0x00
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
endif
if (((per.q(spr:0x20005+0x30))&0x2000)==0x2000)
if (((per.q(spr:0x20005+0x30))&0xC000)==0x0000)
group.quad spr:(0x20005+0x30)++0x00
line.quad 0x00 "DBGBCR3_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor/TrustZone,Reserved,Any mode"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif (((per.q(spr:0x20005+0x30))&0xC000)==0x4000)
group.quad spr:(0x20005+0x30)++0x00
line.quad 0x00 "DBGBCR3_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif (((per.q(spr:0x20005+0x30))&0xC000)==0x8000)
group.quad spr:(0x20005+0x30)++0x00
line.quad 0x00 "DBGBCR3_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "TrustZone,System/Supervisor/TrustZone,Reserved,Any mode"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.quad spr:(0x20005+0x30)++0x00
line.quad 0x00 "DBGBCR3_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
else
if (((per.q(spr:0x20005+0x30))&0xC000)==0x00)||(((per.q(spr:0x20005+0x30))&0xC000)==0x4000)||(((per.q(spr:0x20005+0x30))&0xC000)==0x8000)
group.quad spr:(0x20005+0x30)++0x00
line.quad 0x00 "DBGBCR3_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,User,User/System"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.quad spr:(0x20005+0x30)++0x00
line.quad 0x00 "DBGBCR3_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
endif
tree.end
tree "Breakpoint 4"
if (((per.q(spr:0x20005+0x40))&0xF00000)<=0x100000)
group.quad spr:(0x20004+0x40)++0x00
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x04 "VA,Bits[48:2] of the address value for comparison"
elif (((per.q(spr:0x20005+0x40))&0xF00000)>=0x200000)&&(((per.q(spr:0x20005+0x40))&0xF00000)<=0x300000)||(((per.q(spr:0x20005+0x40))&0xF00000)>=0x600000)&&(((per.q(spr:0x20005+0x40))&0xF00000)<=0x700000)
group.quad spr:(0x20004+0x40)++0x00
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x40))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x40))&0xF00000)<=0x900000)&&(((per.l(spr:0x34212))&0x80000)==0x00)
group.quad spr:(0x20004+0x40)++0x00
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
elif (((per.q(spr:0x20005+0x40))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x40))&0xF00000)<=0x900000)&&(((per.l(spr:0x34212))&0x80000)==0x80000)
group.quad spr:(0x20004+0x40)++0x00
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison"
elif (((per.q(spr:0x20005+0x40))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x40))&0xF00000)<=0xB00000)&&(((per.l(spr:0x34212))&0x80000)==0x00)
group.quad spr:(0x20004+0x40)++0x00
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
newline
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x40))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x40))&0xF00000)<=0xB00000)&&(((per.l(spr:0x34212))&0x80000)==0x80000)
group.quad spr:(0x20004+0x40)++0x00
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison"
newline
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x40))&0xF00000)>=0xC00000)&&(((per.q(spr:0x20005+0x40))&0xF00000)<=0xD00000)
group.quad spr:(0x20004+0x40)++0x00
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x40))&0xF00000)>=0xE00000)
group.quad spr:(0x20004+0x40)++0x00
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison"
newline
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
else
rgroup.quad spr:(0x20004+0x40)++0x00
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
endif
if (((per.q(spr:0x20005+0x40))&0x2000)==0x2000)
if (((per.q(spr:0x20005+0x40))&0xC000)==0x0000)
group.quad spr:(0x20005+0x40)++0x00
line.quad 0x00 "DBGBCR4_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor/TrustZone,Reserved,Any mode"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif (((per.q(spr:0x20005+0x40))&0xC000)==0x4000)
group.quad spr:(0x20005+0x40)++0x00
line.quad 0x00 "DBGBCR4_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif (((per.q(spr:0x20005+0x40))&0xC000)==0x8000)
group.quad spr:(0x20005+0x40)++0x00
line.quad 0x00 "DBGBCR4_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "TrustZone,System/Supervisor/TrustZone,Reserved,Any mode"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.quad spr:(0x20005+0x40)++0x00
line.quad 0x00 "DBGBCR4_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
else
if (((per.q(spr:0x20005+0x40))&0xC000)==0x00)||(((per.q(spr:0x20005+0x40))&0xC000)==0x4000)||(((per.q(spr:0x20005+0x40))&0xC000)==0x8000)
group.quad spr:(0x20005+0x40)++0x00
line.quad 0x00 "DBGBCR4_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,User,User/System"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.quad spr:(0x20005+0x40)++0x00
line.quad 0x00 "DBGBCR4_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
endif
tree.end
tree "Breakpoint 5"
if (((per.q(spr:0x20005+0x50))&0xF00000)<=0x100000)
group.quad spr:(0x20004+0x50)++0x00
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x04 "VA,Bits[48:2] of the address value for comparison"
elif (((per.q(spr:0x20005+0x50))&0xF00000)>=0x200000)&&(((per.q(spr:0x20005+0x50))&0xF00000)<=0x300000)||(((per.q(spr:0x20005+0x50))&0xF00000)>=0x600000)&&(((per.q(spr:0x20005+0x50))&0xF00000)<=0x700000)
group.quad spr:(0x20004+0x50)++0x00
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x50))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x50))&0xF00000)<=0x900000)&&(((per.l(spr:0x34212))&0x80000)==0x00)
group.quad spr:(0x20004+0x50)++0x00
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
elif (((per.q(spr:0x20005+0x50))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x50))&0xF00000)<=0x900000)&&(((per.l(spr:0x34212))&0x80000)==0x80000)
group.quad spr:(0x20004+0x50)++0x00
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison"
elif (((per.q(spr:0x20005+0x50))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x50))&0xF00000)<=0xB00000)&&(((per.l(spr:0x34212))&0x80000)==0x00)
group.quad spr:(0x20004+0x50)++0x00
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
newline
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x50))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x50))&0xF00000)<=0xB00000)&&(((per.l(spr:0x34212))&0x80000)==0x80000)
group.quad spr:(0x20004+0x50)++0x00
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison"
newline
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x50))&0xF00000)>=0xC00000)&&(((per.q(spr:0x20005+0x50))&0xF00000)<=0xD00000)
group.quad spr:(0x20004+0x50)++0x00
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison"
elif (((per.q(spr:0x20005+0x50))&0xF00000)>=0xE00000)
group.quad spr:(0x20004+0x50)++0x00
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison"
newline
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison"
else
rgroup.quad spr:(0x20004+0x50)++0x00
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
endif
if (((per.q(spr:0x20005+0x50))&0x2000)==0x2000)
if (((per.q(spr:0x20005+0x50))&0xC000)==0x0000)
group.quad spr:(0x20005+0x50)++0x00
line.quad 0x00 "DBGBCR5_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor/TrustZone,Reserved,Any mode"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif (((per.q(spr:0x20005+0x50))&0xC000)==0x4000)
group.quad spr:(0x20005+0x50)++0x00
line.quad 0x00 "DBGBCR5_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
elif (((per.q(spr:0x20005+0x50))&0xC000)==0x8000)
group.quad spr:(0x20005+0x50)++0x00
line.quad 0x00 "DBGBCR5_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "TrustZone,System/Supervisor/TrustZone,Reserved,Any mode"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.quad spr:(0x20005+0x50)++0x00
line.quad 0x00 "DBGBCR5_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
else
if (((per.q(spr:0x20005+0x50))&0xC000)==0x00)||(((per.q(spr:0x20005+0x50))&0xC000)==0x4000)||(((per.q(spr:0x20005+0x50))&0xC000)==0x8000)
group.quad spr:(0x20005+0x50)++0x00
line.quad 0x00 "DBGBCR5_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,User,User/System"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
else
group.quad spr:(0x20005+0x50)++0x00
line.quad 0x00 "DBGBCR5_EL1,Breakpoint Control Register"
bitfld.quad 0x00 20.--23. "BT,Breakpoint type" "Unlinked address match,Linked address match,Unlinked Context ID match,Linked Context ID match,Reserved,Reserved,Unlinked CONTEXTIDR_EL1 match,Linked CONTEXTIDR_EL1 match,Unlinked VMID match,Linked VMID match,Unlinked VMID + Context ID match,Linked VMID + Context ID match,Unlinked CONTEXTIDR_EL2 match,Linked CONTEXTIDR_EL2 match,Unlinked full Context ID match,Linked full Context ID match"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
newline
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1"
newline
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor"
newline
bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled"
endif
endif
tree.end
tree.end
tree "Watchpoint Registers"
tree "Watchpoint 0"
group.quad spr:(0x20006+0x0)++0x00
line.quad 0x00 "DBGWVR0_EL1,Watchpoint Value Register (AArch64)"
hexmask.quad 0x00 2.--48. 0x04 "VA,Data address"
if (((per.q(spr:0x20007+0x0))&0x2000)==0x2000)
if (((per.q(spr:0x20007+0x0))&0xC000)==0x0000)
group.quad spr:(0x20007+0x0)++0x00
line.quad 0x00 "DBGWCR0_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Reserved,TrustZone/Supervisor/System,Reserved,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
elif (((per.q(spr:0x20007+0x0))&0xC000)==0x4000)
group.quad spr:(0x20007+0x0)++0x00
line.quad 0x00 "DBGWCR0_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,Supervisor/System,Reserved,Supervisor/System/User"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
elif (((per.q(spr:0x20007+0x0))&0xC000)==0x8000)
group.quad spr:(0x20007+0x0)++0x00
line.quad 0x00 "DBGWCR0_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "TrustZone,TrustZone/Supervisor/System,Reserved,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
else
group.quad spr:(0x20007+0x0)++0x00
line.quad 0x00 "DBGWCR0_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,Supervisor/System,Reserved,Supervisor/System/User"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
endif
else
if (((per.q(spr:0x20007+0x0))&0xC000)==0x00)||(((per.q(spr:0x20007+0x0))&0xC000)==0x4000)||(((per.q(spr:0x20007+0x0))&0xC000)==0x8000)
group.quad spr:(0x20007+0x0)++0x00
line.quad 0x00 "DBGWCR0_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,System/User"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
else
group.quad spr:(0x20007+0x0)++0x00
line.quad 0x00 "DBGWCR0_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,Supervisor/System,Reserved,Supervisor/System/User"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
endif
endif
tree.end
tree "Watchpoint 1"
group.quad spr:(0x20006+0x10)++0x00
line.quad 0x00 "DBGWVR1_EL1,Watchpoint Value Register (AArch64)"
hexmask.quad 0x00 2.--48. 0x04 "VA,Data address"
if (((per.q(spr:0x20007+0x10))&0x2000)==0x2000)
if (((per.q(spr:0x20007+0x10))&0xC000)==0x0000)
group.quad spr:(0x20007+0x10)++0x00
line.quad 0x00 "DBGWCR1_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Reserved,TrustZone/Supervisor/System,Reserved,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
elif (((per.q(spr:0x20007+0x10))&0xC000)==0x4000)
group.quad spr:(0x20007+0x10)++0x00
line.quad 0x00 "DBGWCR1_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,Supervisor/System,Reserved,Supervisor/System/User"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
elif (((per.q(spr:0x20007+0x10))&0xC000)==0x8000)
group.quad spr:(0x20007+0x10)++0x00
line.quad 0x00 "DBGWCR1_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "TrustZone,TrustZone/Supervisor/System,Reserved,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
else
group.quad spr:(0x20007+0x10)++0x00
line.quad 0x00 "DBGWCR1_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,Supervisor/System,Reserved,Supervisor/System/User"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
endif
else
if (((per.q(spr:0x20007+0x10))&0xC000)==0x00)||(((per.q(spr:0x20007+0x10))&0xC000)==0x4000)||(((per.q(spr:0x20007+0x10))&0xC000)==0x8000)
group.quad spr:(0x20007+0x10)++0x00
line.quad 0x00 "DBGWCR1_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,System/User"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
else
group.quad spr:(0x20007+0x10)++0x00
line.quad 0x00 "DBGWCR1_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,Supervisor/System,Reserved,Supervisor/System/User"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
endif
endif
tree.end
tree "Watchpoint 2"
group.quad spr:(0x20006+0x20)++0x00
line.quad 0x00 "DBGWVR2_EL1,Watchpoint Value Register (AArch64)"
hexmask.quad 0x00 2.--48. 0x04 "VA,Data address"
if (((per.q(spr:0x20007+0x20))&0x2000)==0x2000)
if (((per.q(spr:0x20007+0x20))&0xC000)==0x0000)
group.quad spr:(0x20007+0x20)++0x00
line.quad 0x00 "DBGWCR2_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Reserved,TrustZone/Supervisor/System,Reserved,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
elif (((per.q(spr:0x20007+0x20))&0xC000)==0x4000)
group.quad spr:(0x20007+0x20)++0x00
line.quad 0x00 "DBGWCR2_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,Supervisor/System,Reserved,Supervisor/System/User"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
elif (((per.q(spr:0x20007+0x20))&0xC000)==0x8000)
group.quad spr:(0x20007+0x20)++0x00
line.quad 0x00 "DBGWCR2_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "TrustZone,TrustZone/Supervisor/System,Reserved,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
else
group.quad spr:(0x20007+0x20)++0x00
line.quad 0x00 "DBGWCR2_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,Supervisor/System,Reserved,Supervisor/System/User"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
endif
else
if (((per.q(spr:0x20007+0x20))&0xC000)==0x00)||(((per.q(spr:0x20007+0x20))&0xC000)==0x4000)||(((per.q(spr:0x20007+0x20))&0xC000)==0x8000)
group.quad spr:(0x20007+0x20)++0x00
line.quad 0x00 "DBGWCR2_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,System/User"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
else
group.quad spr:(0x20007+0x20)++0x00
line.quad 0x00 "DBGWCR2_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,Supervisor/System,Reserved,Supervisor/System/User"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
endif
endif
tree.end
tree "Watchpoint 3"
group.quad spr:(0x20006+0x30)++0x00
line.quad 0x00 "DBGWVR3_EL1,Watchpoint Value Register (AArch64)"
hexmask.quad 0x00 2.--48. 0x04 "VA,Data address"
if (((per.q(spr:0x20007+0x30))&0x2000)==0x2000)
if (((per.q(spr:0x20007+0x30))&0xC000)==0x0000)
group.quad spr:(0x20007+0x30)++0x00
line.quad 0x00 "DBGWCR3_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Reserved,TrustZone/Supervisor/System,Reserved,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
elif (((per.q(spr:0x20007+0x30))&0xC000)==0x4000)
group.quad spr:(0x20007+0x30)++0x00
line.quad 0x00 "DBGWCR3_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,Supervisor/System,Reserved,Supervisor/System/User"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
elif (((per.q(spr:0x20007+0x30))&0xC000)==0x8000)
group.quad spr:(0x20007+0x30)++0x00
line.quad 0x00 "DBGWCR3_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "TrustZone,TrustZone/Supervisor/System,Reserved,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
else
group.quad spr:(0x20007+0x30)++0x00
line.quad 0x00 "DBGWCR3_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,Supervisor/System,Reserved,Supervisor/System/User"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
endif
else
if (((per.q(spr:0x20007+0x30))&0xC000)==0x00)||(((per.q(spr:0x20007+0x30))&0xC000)==0x4000)||(((per.q(spr:0x20007+0x30))&0xC000)==0x8000)
group.quad spr:(0x20007+0x30)++0x00
line.quad 0x00 "DBGWCR3_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,System/User"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
else
group.quad spr:(0x20007+0x30)++0x00
line.quad 0x00 "DBGWCR3_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure"
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.word 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,Supervisor/System,Reserved,Supervisor/System/User"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
endif
endif
tree.end
tree.end
tree "LORegions Registers"
group.quad spr:0x30A40++0x00
line.quad 0x00 "LORSA_EL1,LORegion Start Address"
hexmask.quad.long 0x00 16.--47. 0x01 "SA,Start physical address bits[47:16]"
bitfld.quad 0x00 0. "VALID,Indicates whether the LORegion Descriptor is enabled" "Not valid,Valid"
group.quad spr:0x30A41++0x00
line.quad 0x00 "LOREA_EL1,LORegion End Address"
hexmask.quad.long 0x00 16.--47. 0x01 "EA,End physical address bits[47:16]"
group.quad spr:0x30A42++0x00
line.quad 0x00 "LORN_EL1,LORegion Number"
hexmask.quad.byte 0x00 0.--7. 1. "NUM,Number of the LORegion described in the current LORegion descriptor selected by LORC_EL1.DS"
group.quad spr:0x30A43++0x00
line.quad 0x00 "LORC_EL1,LORegion Control"
hexmask.quad.word 0x00 2.--9. 1. "DS,Descriptor select"
bitfld.quad 0x00 0. "EN,Enable" "Disabled,Enabled"
rgroup.quad spr:0x30A47++0x00
line.quad 0x00 "LORID_EL1,LORegionID"
hexmask.quad.byte 0x00 16.--23. 1. "LD,Number of LORegion descriptors supported by the PE"
hexmask.quad.byte 0x00 0.--7. 1. "LR,Number of LORegions supported by the PE"
tree.end
tree "DynamIQ Shared Unit"
tree "Cluster Control Registers"
if (((per.l(spr:0x30F30))&0x2000)==(0x00))
rgroup.quad spr:0x30F30++0x00
line.quad 0x00 "CLUSTERCFR_EL1,Cluster Configuration Register"
bitfld.quad 0x00 24.--27. "PE,Number of PEs" "1,2,?..."
bitfld.quad 0x00 23. "L3_DATA_RAM_WD,L3 data RAM write delay" "Not limited,Limited"
newline
bitfld.quad 0x00 21. "CRSP7,Core 7 register slice present" "Not present,Present"
bitfld.quad 0x00 20. "CRSP6,Core 6 register slice present" "Not present,Present"
bitfld.quad 0x00 19. "CRSP5,Core 5 register slice present" "Not present,Present"
newline
bitfld.quad 0x00 18. "CRSP4,Core 4 register slice present" "Not present,Present"
bitfld.quad 0x00 17. "CRSP3,Core 3 register slice present" "Not present,Present"
bitfld.quad 0x00 16. "CRSP2,Core 2 register slice present" "Not present,Present"
newline
bitfld.quad 0x00 15. "CRSP1,Core 1 register slice present" "Not present,Present"
bitfld.quad 0x00 14. "CRSP0,Core 0 register slice present" "Not present,Present"
bitfld.quad 0x00 13. "BIE,Bus interface extended" "Single,Dual"
newline
bitfld.quad 0x00 12. "PPP,Peripheral port present" "Not present,Present"
newline
bitfld.quad 0x00 11. "ACP,ACP interface present" "Not present,Present"
bitfld.quad 0x00 9.--10. "BUS_INTERFACE,Bus interface configuration" "Single 128-bit ACE,Dual 128-bit ACE,Single 128-bit CHI,Single 256-bit CHI"
bitfld.quad 0x00 8. "SCU_L3_ECC,SCU-L3 is configured with ECC" "No ECC,ECC"
newline
bitfld.quad 0x00 7. "L3_DATA_RAM_RS,L3 data RAM register slice present" "Not present,Present"
bitfld.quad 0x00 6. "L3_DATA_RAM_RL,L3 data RAM read latency" "2 cycles,3 cycles"
bitfld.quad 0x00 5. "L3_DATA_RAM_WL,L3 data RAM write latency" "1 cycle,2 cycles"
newline
bitfld.quad 0x00 4. "L3_CACHE_PRESENT,L3 cache present" "Not present,Present"
bitfld.quad 0x00 0.--2. "NOC,Number of cores present in the cluster" "1,2,3,4,5,6,7,8"
else
rgroup.quad spr:0x30F30++0x00
line.quad 0x00 "CLUSTERCFR_EL1,Cluster Configuration Register"
bitfld.quad 0x00 24.--27. "PE,Number of PEs" "1,2,?..."
bitfld.quad 0x00 23. "L3_DATA_RAM_WD,,L3 data RAM write delay" "Not limited,Limited"
newline
bitfld.quad 0x00 21. "CRSP7,Core 7 register slice present" "Not present,Present"
bitfld.quad 0x00 20. "CRSP6,Core 6 register slice present" "Not present,Present"
bitfld.quad 0x00 19. "CRSP5,Core 5 register slice present" "Not present,Present"
newline
bitfld.quad 0x00 18. "CRSP4,Core 4 register slice present" "Not present,Present"
bitfld.quad 0x00 17. "CRSP3,Core 3 register slice present" "Not present,Present"
bitfld.quad 0x00 16. "CRSP2,Core 2 register slice present" "Not present,Present"
newline
bitfld.quad 0x00 15. "CRSP1,Core 1 register slice present" "Not present,Present"
bitfld.quad 0x00 14. "CRSP0,Core 0 register slice present" "Not present,Present"
bitfld.quad 0x00 13. "BIE,Bus interface extended" "Single,Dual"
newline
bitfld.quad 0x00 12. "PPP,Peripheral port present" "Not present,Present"
newline
bitfld.quad 0x00 11. "ACP,ACP interface present" "Not present,Present"
bitfld.quad 0x00 9.--10. "BUS_INTERFACE,Bus interface configuration" "Single 128-bit ACE,Dual 128-bit ACE,Single 128-bit CHI,Dual 256-bit CHI"
bitfld.quad 0x00 8. "SCU_L3_ECC,SCU-L3 is configured with ECC" "No ECC,ECC"
newline
bitfld.quad 0x00 7. "L3_DATA_RAM_RS,L3 data RAM register slice present" "Not present,Present"
bitfld.quad 0x00 6. "L3_DATA_RAM_RL,L3 data RAM read latency" "2 cycles,3 cycles"
bitfld.quad 0x00 5. "L3_DATA_RAM_WL,L3 data RAM write latency" "1 cycle,2 cycles"
newline
bitfld.quad 0x00 4. "L3_CACHE_PRESENT,L3 cache present" "Not present,Present"
bitfld.quad 0x00 0.--2. "NOC,Number of cores present in the cluster" "1,2,3,4,5,6,7,8"
endif
rgroup.quad spr:0x30F31++0x00
line.quad 0x00 "CLUSTERIDR_EL1,Cluster Main Revision Register"
hexmask.quad.byte 0x00 4.--7. 1. "VARIANT,Indicates the variant of the DSU"
hexmask.quad.byte 0x00 0.--3. 1. "REVISION,Indicates the minor revision number of the DSU"
rgroup.quad spr:0x30F32++0x00
line.quad 0x00 "CLUSTERREVIDR_EL1,Cluster ECO ID Register"
group.quad spr:0x30F33++0x00
line.quad 0x00 "CLUSTERACTLR_EL1,Cluster Auxiliary Control Register"
group.quad spr:0x30F34++0x00
line.quad 0x00 "CLUSTERECTLR_EL1,Cluster Extended Control Register"
bitfld.quad 0x00 14. "CUEC,Cache UniqueClean eviction control" "Disabled,Enabled"
bitfld.quad 0x00 8.--10. "PMD,Prefetch matching delay" "1,2,4,8,16,32,64,128"
bitfld.quad 0x00 7. "DICA,Disable interconnect cacheable atomics" "No,Yes"
newline
bitfld.quad 0x00 4. "IDPS,Interconnect data poisoning support" "Not supported,Supported"
bitfld.quad 0x00 3. "CTEC,Disables send evict transactions on the ACE/CHI master" "No,Yes"
bitfld.quad 0x00 2. "CFUCEC,Disables WriteEvict requests on the ACE/CHI master (Powering down part/All L3 cache)" "No,Yes"
newline
bitfld.quad 0x00 0. "DNCWL,Enable normal non-cachable writes to all master interfaces" "Disabled,Enabled"
group.quad spr:0x30F35++0x00
line.quad 0x00 "CLUSTERPWRCTLR_EL1,Cluster Power Control Register"
bitfld.quad 0x00 4.--7. "CPPR,Cache portion power request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 0.--2. "FRC,Functional retention control [Number of Architectural Timer ticks required before retention entry]" "Disabled,2 AT ticks,8 AT ticks,32 AT ticks,64 AT ticks,128 AT ticks,256 AT ticks,512 AT ticks"
group.quad spr:0x30F36++0x00
line.quad 0x00 "CLUSTERPWRDN_EL1,Cluster Power Down Register"
bitfld.quad 0x00 1. "MRR,Memory retention required" "Not required,Required"
bitfld.quad 0x00 0. "CPR,Cluster power required" "Not required,Required"
rgroup.quad spr:0x30F37++0x00
line.quad 0x00 "CLUSTERPWRSTAT_EL1,Cluster Power Status Register"
bitfld.quad 0x00 4.--7. "CPPS,This bits indicates which cache portions are currently powered up and available" "No ways,Ways 0-3,Reserved,Ways 0-7,Reserved,Reserved,Reserved,Ways 0-11,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ways 0-15"
bitfld.quad 0x00 1. "RWPD,Enabled memory retention when all cores are powered down" "Disabled,Enabled"
bitfld.quad 0x00 0. "DCPD,Disabled cluster power down when all cores are powered down" "No,Yes"
group.quad spr:0x30F40++0x00
line.quad 0x00 "CLUSTERTHREADSID_EL1,Cluster Thread Scheme ID Register"
bitfld.quad 0x00 0.--2. "SCHEME_ID_THREAD,Scheme ID for current thread" "0,1,2,3,4,5,6,7"
group.quad spr:0x30F41++0x00
line.quad 0x00 "CLUSTERACPSID_EL1,Cluster ACP Scheme ID Register"
bitfld.quad 0x00 0.--2. "SCHEME_ID_ACP,Scheme ID for ACP transactions" "0,1,2,3,4,5,6,7"
group.quad spr:0x30F42++0x00
line.quad 0x00 "CLUSTERSTASHSID_EL1,Cluster Stash Scheme ID Register"
bitfld.quad 0x00 0.--2. "SCHEME_ID_SR,Scheme ID for stash requests received from the interconnect" "0,1,2,3,4,5,6,7"
group.quad spr:0x30F43++0x00
line.quad 0x00 "CLUSTERPARTCR_EL1,Cluster Partition Control Register"
bitfld.quad 0x00 31. "W3_ID7,Way group 3 is assigned as private to scheme ID 7" "Not assigned,Assigned"
bitfld.quad 0x00 30. "W2_ID7,Way group 2 is assigned as private to scheme ID 7" "Not assigned,Assigned"
bitfld.quad 0x00 29. "W1_ID7,Way group 1 is assigned as private to scheme ID 7" "Not assigned,Assigned"
newline
bitfld.quad 0x00 28. "W0_ID7,Way group 0 is assigned as private to scheme ID 7" "Not assigned,Assigned"
bitfld.quad 0x00 27. "W3_ID6,Way group 3 is assigned as private to scheme ID 6" "Not assigned,Assigned"
bitfld.quad 0x00 26. "W2_ID6,Way group 2 is assigned as private to scheme ID 6" "Not assigned,Assigned"
newline
bitfld.quad 0x00 25. "W1_ID6,Way group 1 is assigned as private to scheme ID 6" "Not assigned,Assigned"
bitfld.quad 0x00 24. "W0_ID6,Way group 0 is assigned as private to scheme ID 6" "Not assigned,Assigned"
bitfld.quad 0x00 23. "W3_ID5,Way group 3 is assigned as private to scheme ID 5" "Not assigned,Assigned"
newline
bitfld.quad 0x00 22. "W2_ID5,Way group 2 is assigned as private to scheme ID 5" "Not assigned,Assigned"
bitfld.quad 0x00 21. "W1_ID5,Way group 1 is assigned as private to scheme ID 5" "Not assigned,Assigned"
bitfld.quad 0x00 20. "W0_ID5,Way group 0 is assigned as private to scheme ID 5" "Not assigned,Assigned"
newline
bitfld.quad 0x00 19. "W3_ID4,Way group 3 is assigned as private to scheme ID 4" "Not assigned,Assigned"
bitfld.quad 0x00 18. "W2_ID4,Way group 2 is assigned as private to scheme ID 4" "Not assigned,Assigned"
bitfld.quad 0x00 17. "W1_ID4,Way group 1 is assigned as private to scheme ID 4" "Not assigned,Assigned"
newline
bitfld.quad 0x00 16. "W0_ID4,Way group 0 is assigned as private to scheme ID 4" "Not assigned,Assigned"
bitfld.quad 0x00 15. "W3_ID3,Way group 3 is assigned as private to scheme ID 3" "Not assigned,Assigned"
bitfld.quad 0x00 14. "W2_ID3,Way group 2 is assigned as private to scheme ID 3" "Not assigned,Assigned"
newline
bitfld.quad 0x00 13. "W1_ID3,Way group 1 is assigned as private to scheme ID 3" "Not assigned,Assigned"
bitfld.quad 0x00 12. "W0_ID3,Way group 0 is assigned as private to scheme ID 3" "Not assigned,Assigned"
bitfld.quad 0x00 11. "W3_ID2,Way group 3 is assigned as private to scheme ID 2" "Not assigned,Assigned"
newline
bitfld.quad 0x00 10. "W2_ID2,Way group 2 is assigned as private to scheme ID 2" "Not assigned,Assigned"
bitfld.quad 0x00 9. "W1_ID2,Way group 1 is assigned as private to scheme ID 2" "Not assigned,Assigned"
bitfld.quad 0x00 8. "W0_ID2,Way group 0 is assigned as private to scheme ID 2" "Not assigned,Assigned"
newline
bitfld.quad 0x00 7. "W3_ID1,Way group 3 is assigned as private to scheme ID 1" "Not assigned,Assigned"
bitfld.quad 0x00 6. "W2_ID1,Way group 2 is assigned as private to scheme ID 1" "Not assigned,Assigned"
bitfld.quad 0x00 5. "W1_ID1,Way group 1 is assigned as private to scheme ID 1" "Not assigned,Assigned"
newline
bitfld.quad 0x00 4. "W0_ID1,Way group 0 is assigned as private to scheme ID 1" "Not assigned,Assigned"
bitfld.quad 0x00 3. "W3_ID0,Way group 3 is assigned as private to scheme ID 0" "Not assigned,Assigned"
bitfld.quad 0x00 2. "W2_ID0,Way group 2 is assigned as private to scheme ID 0" "Not assigned,Assigned"
newline
bitfld.quad 0x00 1. "W1_ID0,Way group 1 is assigned as private to scheme ID 0" "Not assigned,Assigned"
bitfld.quad 0x00 0. "W0_ID0,Way group 0 is assigned as private to scheme ID 0" "Not assigned,Assigned"
group.quad spr:0x30F44++0x00
line.quad 0x00 "CLUSTERBUSQOS_EL1,Cluster Bus QoS Control Register"
bitfld.quad 0x00 28.--31. "CHI_BUS_QOS_SCHEME_ID7,Value driven on the CHI bus QoS field for scheme ID 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 24.--27. "CHI_BUS_QOS_SCHEME_ID6,Value driven on the CHI bus QoS field for scheme ID 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 20.--23. "CHI_BUS_QOS_SCHEME_ID5,Value driven on the CHI bus QoS field for scheme ID 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 16.--19. "CHI_BUS_QOS_SCHEME_ID4,Value driven on the CHI bus QoS field for scheme ID 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 12.--15. "CHI_BUS_QOS_SCHEME_ID3,Value driven on the CHI bus QoS field for scheme ID 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 8.--11. "CHI_BUS_QOS_SCHEME_ID2,Value driven on the CHI bus QoS field for scheme ID 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 4.--7. "CHI_BUS_QOS_SCHEME_ID1,Value driven on the CHI bus QoS field for scheme ID 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 0.--3. "CHI_BUS_QOS_SCHEME_ID0,Value driven on the CHI bus QoS field for scheme ID 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad spr:0x30F45++0x00
line.quad 0x00 "CLUSTERL3HIT_EL1,Cluster L3 Hit Counter Register"
hexmask.quad.long 0x00 0.--31. 1. "HITCNT,Count of number of L3 hits for use in portion control calculations"
group.quad spr:0x30F46++0x00
line.quad 0x00 "CLUSTERL3MISS_EL1,Cluster L3 Miss Counter Register"
hexmask.quad.long 0x00 0.--31. 1. "MISSCNT,Count of number of L3 misses for use in portion control calculations"
group.quad spr:0x30F47++0x00
line.quad 0x00 "CLUSTERTHREADSIDOVR_EL1,Cluster Thread Scheme ID Override Register"
bitfld.quad 0x00 16.--18. "SCHEME_ID_MASK,A bit set in the mask causes the matching bit to be taken from this register rather than from the CLUSTERTHREADSID_EL1 register" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 0.--2. "SCHEME_ID_THREAD,Scheme ID for this thread if masked" "0,1,2,3,4,5,6,7"
tree.end
tree "Error System Registers"
rgroup.quad spr:0x30530++0x00
line.quad 0x00 "ERRIDR_EL1,Error ID Register"
hexmask.quad.word 0x00 0.--15. 1. "NUM,Number of records that can be accessed through the Error Record system registers"
group.quad spr:0x30531++0x00
line.quad 0x00 "ERRSELR_EL1,Error Record Select Register"
bitfld.quad 0x00 0. "SEL,Selects the record accessed through the ERX registers" "Record 0,Record 1"
if (((per.q(spr:0x30531))&0x01)==0x00)
rgroup.quad spr:0x30540++0x00
line.quad 0x00 "ERXFR_EL1,Selected Error Record Feature Register - ERR0FR - Record 0"
bitfld.quad 0x00 18.--19. "CEO,Corrected error overwrite" "No overwrite,?..."
newline
bitfld.quad 0x00 16.--17. "DUI,Error recovery interrupt for deferred errors" "Not supported,?..."
bitfld.quad 0x00 15. "RP,Repeat counter" "Reserved,Implemented"
newline
bitfld.quad 0x00 12.--14. "CEC,Corrected error counter" "Reserved,Reserved,Implemented/8-bit,?..."
bitfld.quad 0x00 10.--11. "CFI,Fault handling interrupt for corrected errors" "Reserved,Reserved,Implemented,?..."
newline
bitfld.quad 0x00 8.--9. "UE,In-band uncorrected error reporting" "Reserved,Implemented,?..."
bitfld.quad 0x00 6.--7. "FI,Fault handling interrupt" "Reserved,Reserved,Implemented,?..."
newline
bitfld.quad 0x00 4.--5. "UI,Error recovery interrupt for uncorrected errors" "Reserved,Reserved,Implemented,?..."
bitfld.quad 0x00 0.--1. "ED,Error detection and correction[Lock/Split]" "Reserved,Reserved,Implemented,?..."
group.quad spr:0x30541++0x00
line.quad 0x00 "ERXCTLR_EL1,Selected Error Record Control Register - ER0CTLR - Record 0"
bitfld.quad 0x00 8. "CFI,Fault handling interrupt for corrected errors enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "FI,Fault handling interrupt enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "UI,Uncorrected error recovery interrupt enable" "Disabled,Enabled"
bitfld.quad 0x00 0. "ED,Error detection and correction enable" "Disabled,Enabled"
group.quad spr:0x30542++0x00
line.quad 0x00 "ERXSTATUS_EL1,Selected Error Record Status Register - ER0STATUS - Record 0"
bitfld.quad 0x00 31. "AV,Address valid" "Not valid,Valid"
bitfld.quad 0x00 30. "V,Status register valid" "Not valid,Valid"
newline
bitfld.quad 0x00 29. "UE,Uncorrected Error" "No error,>=1 error"
bitfld.quad 0x00 28. "ER,Error reported" "No error,Error"
newline
bitfld.quad 0x00 27. "OF,Error overflow" "No error,>=1 error"
bitfld.quad 0x00 26. "MV,Miscellaneous registers valid" "Not valid,Valid"
newline
bitfld.quad 0x00 24.--25. "CE,Corrected errors" "No error,>=1 transient,>=1 error,>=1 persistent"
bitfld.quad 0x00 23. "DE,Deferred errors" "No error,>=1 error"
newline
bitfld.quad 0x00 22. "PN,Poison" "Cannot distinguish,?..."
bitfld.quad 0x00 20.--21. "UET,Uncorrected error type" "UC,?..."
bitfld.quad 0x00 0.--4. "SERR,Primary error code" "No error,Reserved,Internal data buffer,Reserved,Reserved,Reserved,Cache data RAM,Cache tag/dirty RAM,TLB data RAM,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Cache copyback,Not supported,?..."
group.quad spr:0x30F20++0x00
line.quad 0x00 "ERXPFGF_EL1,Selected Pseudo Fault Generation Feature Register - ER0PFGF - Record 0"
bitfld.quad 0x00 31. "PFG,Pseudo fault generation" "Reserved,Supported"
bitfld.quad 0x00 30. "R,Restartable bit" "Reserved,Supported"
newline
bitfld.quad 0x00 6. "CE,Corrected error generation" "Reserved,Supported"
newline
bitfld.quad 0x00 5. "DE,Deferred error generation" "Reserved,Supported"
bitfld.quad 0x00 4. "UEO,Latent or restartable error generation" "Not supported,?..."
newline
bitfld.quad 0x00 3. "UER,Signalled or recoverable error generation" "Not supported,?..."
bitfld.quad 0x00 2. "UEU,Unrecoverable error generation" "Not supported,?..."
newline
bitfld.quad 0x00 1. "UC,Uncontainable error generation" "Reserved,Supported"
group.quad spr:0x30F21++0x00
line.quad 0x00 "ERXPFGCTL_EL1,Selected Error Pseudo Fault Generation Control Register - ER0PFGCTL - Record 0"
bitfld.quad 0x00 31. "CDNEN,Countdown enable. Control transfers from the value that is held in the ERR0PFGCDN into the Error Generation Counter" "Disabled,Enabled"
bitfld.quad 0x00 30. "R,Restart. Controls whether on reaching zero the Error Generation Counter restarts from the ext-CLUSTERRAS_ERR0PFGCDN value or stops" "Disabled,Enabled"
newline
bitfld.quad 0x00 6. "CE,Corrected error generation enable" "No error,Non-specific"
bitfld.quad 0x00 5. "DE,Deferred error generation enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 1. "UC,Uncontainable error generation enable" "Disabled,Enabled"
group.quad spr:0x30F22++0x00
line.quad 0x00 "ERXPFGCDN_EL1,Selected Error Pseudo Fault Generation Count Down Register - ER0PFGCDN_EL1 - Record 0"
hexmask.quad.long 0x00 0.--31. 1. "CDN,Countdown value"
group.quad spr:0x30543++0x00
line.quad 0x00 "ERXADDR_EL1,Selected Error Record Address Register"
bitfld.quad 0x00 63. "NS,Non-secure attribute" "Secure,Non-secure"
hexmask.quad 0x00 0.--39. 1. "PADDR,Physical Address"
group.quad spr:0x30550++0x00
line.quad 0x00 "ERXMISC0_EL1,Selected Error Record Miscellaneous Register 0 - ER0MISC0_EL1 - Record 0"
bitfld.quad 0x00 47. "OFO,Sticky overflow bit for other errors" "No overflow,Overflow"
hexmask.quad.byte 0x00 40.--46. 1. "CECO,Corrected error count for other errors"
newline
bitfld.quad 0x00 39. "OFR,Sticky overflow bit for repeat errors" "No overflow,Overflow"
hexmask.quad.byte 0x00 32.--38. 1. "CECR,Corrected error count for repeat errors"
newline
bitfld.quad 0x00 28.--31. "WAY,Indicates the way that contained the error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 25. "SUBBANK,Dependent on unit from which error was detected" "0,1"
newline
bitfld.quad 0x00 23.--24. "BANK,Dependent on unit from which error was detected" "0,1,2,3"
bitfld.quad 0x00 19.--22. "SUBARRAY,Dependent on unit from which error was detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.quad.word 0x00 6.--18. 1. "INDEX,Indicates the index that contained the error"
bitfld.quad 0x00 4.--5. "ARRAY,Dependent on unit from which error was detected" "L2 Tag RAM/LS Tag RAM 0/Tag,L2 Data RAM/LS Tag RAM1/Data,LS Data RAM/Micro-OP cache,CHI Error/LS Tag RAM 2"
bitfld.quad 0x00 0.--3. "UNIT,Unit which detected error" "Reserved,L1 Instruction Cache,Reserved,Reserved,L1 Data Cache,L2 TLB,Reserved,Reserved,L2 Cache,?..."
group.quad spr:0x30551++0x00
line.quad 0x00 "ERXMISC1_EL1,Selected Error Record Miscellaneous Register 1"
else
rgroup.quad spr:0x30540++0x00
line.quad 0x00 "ERXFR_EL1,Selected Error Record Feature Register - CLUSTERRAS_ERR1FR - Record 1"
bitfld.quad 0x00 18.--19. "CEO,Corrected error overwrite" "No overwrite,?..."
bitfld.quad 0x00 16.--17. "DUI,Error recovery interrupt for deferred errors" "Not supported,?..."
newline
bitfld.quad 0x00 15. "RP,Repeat counter" "Reserved,Implemented"
bitfld.quad 0x00 12.--14. "CEC,Corrected error counter" "Reserved,Reserved,Implemented/8-bit,?..."
newline
bitfld.quad 0x00 10.--11. "CFI,Fault handling interrupt for corrected errors" "Reserved,Reserved,Implemented,?..."
bitfld.quad 0x00 8.--9. "UE,In-band uncorrected error reporting" "Reserved,Implemented,?..."
newline
bitfld.quad 0x00 6.--7. "FI,Fault handling interrupt" "Reserved,Reserved,Implemented,?..."
bitfld.quad 0x00 4.--5. "UI,Error recovery interrupt for uncorrected errors" "Reserved,Reserved,Implemented,?..."
newline
bitfld.quad 0x00 2.--3. "DE,Deferred error enable" "Reserved,Enabled,?..."
bitfld.quad 0x00 0.--1. "ED,Error detection and correction[Lock/Split]" "Reserved,Reserved,Implemented,?..."
group.quad spr:0x30541++0x00
line.quad 0x00 "ERXCTLR_EL1,Selected Error Record Control Register - CLUSTERRAS_ER1CTLR - Record 1"
bitfld.quad 0x00 8. "CFI,Fault handling interrupt for corrected errors enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "FI,Fault handling interrupt enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "UI,Uncorrected error recovery interrupt enable" "Disabled,Enabled"
bitfld.quad 0x00 0. "ED,Error detection and correction enable" "Disabled,Enabled"
group.quad spr:0x30542++0x00
line.quad 0x00 "ERXSTATUS_EL1,Selected Error Record Status Register - CLUSTERRAS_ER1STATUS - Record 1"
bitfld.quad 0x00 31. "AV,Address valid" "Not valid,?..."
bitfld.quad 0x00 30. "V,Status register valid" "Not valid,Valid"
newline
bitfld.quad 0x00 29. "UE,Uncorrected Error" "No error,>=1 error"
bitfld.quad 0x00 28. "ER,Error reported" "No error,?..."
newline
bitfld.quad 0x00 27. "OF,Error overflow" "No error,>=1 error"
bitfld.quad 0x00 26. "MV,Miscellaneous registers valid" "Not valid,Valid"
newline
bitfld.quad 0x00 24.--25. "CE,Corrected errors" "No error,Reserved,>=1 error,?..."
bitfld.quad 0x00 23. "DE,Deferred errors" "No error,>=1 error"
newline
bitfld.quad 0x00 22. "PN,Poison" "Corrupt,Poison"
bitfld.quad 0x00 20.--21. "UET,Uncorrected error type" "Uncontainable,?..."
newline
hexmask.quad.byte 0x00 8.--15. 1. "IERR,Implementation defined error code"
newline
hexmask.quad.byte 0x00 0.--7. 1. "SERR,Architecturally-defined primary error code"
group.quad spr:0x30F20++0x00
line.quad 0x00 "ERXPFGF_EL1,Selected Pseudo Fault Generation Feature Register - CLUSTERRAS_ER1PFGF - Record 1"
bitfld.quad 0x00 31. "PFG,Pseudo fault generation" "Not supported,Supported"
bitfld.quad 0x00 30. "R,Restartable bit" "Not supported,Supported"
newline
bitfld.quad 0x00 6. "CE,Corrected error generation" "Not supported,Supported"
newline
bitfld.quad 0x00 5. "DE,Deferred error generation" "Not supported,Supported"
bitfld.quad 0x00 4. "UEO,Latent or restartable error generation" "Not supported,Supported"
newline
bitfld.quad 0x00 3. "UER,Signaled or recoverable error generation" "Not supported,Supported"
bitfld.quad 0x00 2. "UEU,Unrecoverable error generation" "Not supported,Supported"
newline
bitfld.quad 0x00 1. "UC,Uncontainable error generation" "Reserved,Supported"
group.quad spr:0x30F21++0x00
line.quad 0x00 "ERXPFGCTL_EL1,Selected Error Pseudo Fault Generation Control Register - CLUSTERRAS_ER1PFGCTL - Record 1"
bitfld.quad 0x00 31. "CDNEN,Countdown enable. Control transfers from the value that is held in the ERR0PFGCDN into the Error Generation Counter" "Disabled,Enabled"
bitfld.quad 0x00 30. "R,Restart. Controls whether on reaching zero the Error Generation Counter restarts from the ext-CLUSTERRAS_ERR0PFGCDN value or stops" "Disabled,Enabled"
newline
bitfld.quad 0x00 6. "CE,Corrected error generation enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 5. "DE,Deferred error generation enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 1. "UC,Uncontainable error generation enable" "Disabled,Enabled"
group.quad spr:0x30F22++0x00
line.quad 0x00 "ERXPFGCDN_EL1,Selected Error Pseudo Fault Generation Count Down Register - CLUSTERRAS_ER1PFGCDN - Record 1"
hexmask.quad.long 0x00 0.--31. 1. "CDN,Countdown value"
group.quad spr:0x30550++0x00
line.quad 0x00 "ERXMISC0_EL1,Selected Error Record Miscellaneous Register 0 - CLUSTERRAS_ER0MISC0 - Record 0 - DSU RAMs"
bitfld.quad 0x00 47. "OFO,Sticky overflow bit for other errors" "No overflow,Overflow"
hexmask.quad.byte 0x00 40.--46. 1. "CECO,Corrected error count for other errors"
newline
bitfld.quad 0x00 39. "OFR,Sticky overflow bit for repeat errors" "No overflow,Overflow"
hexmask.quad.byte 0x00 32.--38. 1. "CECR,Corrected error count for repeat errors"
newline
bitfld.quad 0x00 28.--31. "WAY,Indicates the way that contained the error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.tbyte 0x00 6.--23. 1. "INDX,Indicates the index that contained the error"
newline
bitfld.quad 0x00 1.--3. "LVL,Indicates the level that contained the error" "Reserved,Reserved,Level 3,?..."
bitfld.quad 0x00 0. "IND,Indicates the type of cache that contained the error" "Data,?..."
group.quad spr:0x30551++0x00
line.quad 0x00 "ERXMISC1_EL1,Selected Error Record Miscellaneous Register 1 - CLUSTERRAS_ER1MISC1 - Record 1"
group.quad spr:0x30552++0x00
line.quad 0x00 "ERXMISC2_EL1,Selected Error Record Miscellaneous Register 2 - CLUSTERRAS_ER1MISC2 - Record 1"
group.quad spr:0x30553++0x00
line.quad 0x00 "ERXMISC3_EL1,Selected Error Record Miscellaneous Register 3 - CLUSTERRAS_ER1MISC3 - Record 1"
endif
newline
tree.end
tree "Cluster PMU Registers"
group.quad spr:0x30F50++0x00
line.quad 0x00 "CLUSTERPMCR_EL1,Cluster Performance Monitors Control Register (EL1)"
hexmask.quad.byte 0x00 24.--31. 1. "IMP,Implementer code"
hexmask.quad.byte 0x00 16.--23. 1. "IDCODE,Identification code"
bitfld.quad 0x00 11.--15. "N,Number of counters implemented" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,6,?..."
newline
bitfld.quad 0x00 2. "C,Clock Counter Reset" "No reset,Reset"
bitfld.quad 0x00 1. "P,Event Counter Reset" "No reset,Reset"
bitfld.quad 0x00 0. "E,All Counters Enable" "Disabled,Enabled"
group.quad spr:0x30F51++0x00
line.quad 0x00 "CLUSTERPMCNTENSET_EL1,Cluster Performance Monitors Count Enable Set Register (EL1)"
bitfld.quad 0x00 31. "C,Enables the cycle counter register [Read/Write]" "Disabled/No effect,Enabled/Enable"
newline
bitfld.quad 0x00 5. "P5,Event counter CLUSTERPMEVCNTR5 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.quad 0x00 4. "P4,Event counter CLUSTERPMEVCNTR4 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.quad 0x00 3. "P3,Event counter CLUSTERPMEVCNTR3 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
newline
bitfld.quad 0x00 2. "P2,Event counter CLUSTERPMEVCNTR2 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.quad 0x00 1. "P1,Event counter CLUSTERPMEVCNTR1 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.quad 0x00 0. "P0,Event counter CLUSTERPMEVCNTR0 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
group.quad spr:0x30F52++0x00
line.quad 0x00 "CLUSTERPMCNTENCLR_EL1,Cluster Performance Monitors Count Enable Clear Register (EL1)"
bitfld.quad 0x00 31. "C,Disables the cycle counter register [Read/Write]" "Disabled/No effect,Enabled/Disable"
newline
bitfld.quad 0x00 5. "P5,Event counter CLUSTERPMEVCNTR5 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
bitfld.quad 0x00 4. "P4,Event counter CLUSTERPMEVCNTR4 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
bitfld.quad 0x00 3. "P3,Event counter CLUSTERPMEVCNTR3 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
newline
bitfld.quad 0x00 2. "P2,Event counter CLUSTERPMEVCNTR2 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
bitfld.quad 0x00 1. "P1,Event counter CLUSTERPMEVCNTR1 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
bitfld.quad 0x00 0. "P0,Event counter CLUSTERPMEVCNTR0 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
group.quad spr:0x30F53++0x00
line.quad 0x00 "CLUSTERPMOVSSET_EL1,Cluster Performance Monitors Overflow Flag Status Set Register (EL1)"
bitfld.quad 0x00 31. "C,PMCCNTR overflow bit [Read/Write]" "No overflow/No effect,Overflow/Set"
newline
bitfld.quad 0x00 5. "P5,CLUSTERPMEVCNTR5 Overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set"
bitfld.quad 0x00 4. "P4,CLUSTERPMEVCNTR4 Overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set"
bitfld.quad 0x00 3. "P3,CLUSTERPMEVCNTR3 Overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set"
newline
bitfld.quad 0x00 2. "P2,CLUSTERPMEVCNTR2 Overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set"
bitfld.quad 0x00 1. "P1,CLUSTERPMEVCNTR1 Overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set"
bitfld.quad 0x00 0. "P0,CLUSTERPMEVCNTR0 Overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set"
group.quad spr:0x30F54++0x00
line.quad 0x00 "CLUSTERPMOVSCLR_EL1,Cluster Performance Monitors Overflow Flag Status Clear Register (EL1)"
eventfld.quad 0x00 31. "C,PMCCNTR overflow bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
newline
eventfld.quad 0x00 5. "P5,CLUSTERPMEVCNTR5 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.quad 0x00 4. "P4,CLUSTERPMEVCNTR4 Overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.quad 0x00 3. "P3,CLUSTERPMEVCNTR3 Overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
newline
eventfld.quad 0x00 2. "P2,CLUSTERPMEVCNTR2 Overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.quad 0x00 1. "P1,CLUSTERPMEVCNTR1 Overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.quad 0x00 0. "P0,CLUSTERPMEVCNTR0 Overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
group.quad spr:0x30F55++0x00
line.quad 0x00 "CLUSTERPMSELR_EL1,Cluster Performance Monitors Event Counter Selection Register (EL1)"
bitfld.quad 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.quad spr:0x30F56++0x00
line.quad 0x00 "CLUSTERPMINTENSET_EL1,Cluster Performance Monitors Interrupt Enable Set Register (EL1)"
bitfld.quad 0x00 31. "C,PMCCNTR Overflow Interrupt Request Enable [Read/Write]" "Disabled/No effect,Enabled/Enable"
newline
bitfld.quad 0x00 5. "P5,CLUSTERPMEVCNTR5 Overflow Interrupt Request Enable [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.quad 0x00 4. "P4,CLUSTERPMEVCNTR4 Overflow Interrupt Request Enable [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.quad 0x00 3. "P3,CLUSTERPMEVCNTR3 Overflow Interrupt Request Enable [Read/Write]" "Disabled/No effect,Enabled/Enable"
newline
bitfld.quad 0x00 2. "P2,CLUSTERPMEVCNTR2 Overflow Interrupt Request Enable [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.quad 0x00 1. "P1,CLUSTERPMEVCNTR1 Overflow Interrupt Request Enable [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.quad 0x00 0. "P0,CLUSTERPMEVCNTR0 Overflow Interrupt Request Enable [Read/Write]" "Disabled/No effect,Enabled/Enable"
group.quad spr:0x30F57++0x00
line.quad 0x00 "CLUSTERPMINTENCLR_EL1,Cluster Performance Monitors Interrupt Enable Clear Register (EL1)"
eventfld.quad 0x00 31. "C,PMCCNTR Overflow Interrupt Request Disable [Read/Write]" "Disabled/No effect,Enabled/Disable"
newline
eventfld.quad 0x00 5. "P5,CLUSTERPMEVCNTR5 Overflow Interrupt Disable [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.quad 0x00 4. "P4,CLUSTERPMEVCNTR4 Overflow Interrupt Disable [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.quad 0x00 3. "P3,CLUSTERPMEVCNTR3 Overflow Interrupt Disable [Read/Write]" "Disabled/No effect,Enabled/Disable"
newline
eventfld.quad 0x00 2. "P2,CLUSTERPMEVCNTR2 Overflow Interrupt Disable [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.quad 0x00 1. "P1,CLUSTERPMEVCNTR1 Overflow Interrupt Disable [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.quad 0x00 0. "P0,CLUSTERPMEVCNTR0 Overflow Interrupt Disable [Read/Write]" "Disabled/No effect,Enabled/Disable"
group.quad spr:0x30F60++0x00
line.quad 0x00 "CLUSTERPMCCNTR_EL1,Cluster Performance Monitors Cycle Counter (EL1)"
group.quad spr:0x30F61++0x00
line.quad 0x00 "CLUSTERPMXEVTYPER_EL1,Cluster Selected Event Type and Filter Register (EL1)"
bitfld.quad 0x00 31. "S,Disable counting of events that are generated by Secure transactions" "No,Yes"
bitfld.quad 0x00 29. "NS,Disable counting of events that are generated by Non-secure transactions" "No,Yes"
newline
hexmask.quad.word 0x00 0.--15. 1. "EVTCOUNT,Event number"
group.quad spr:0x30F62++0x00
line.quad 0x00 "CLUSTERPMXEVCNTR_EL1,Cluster Performance Monitors Selected Event Counter Register (EL1)"
group.quad spr:0x36F63++0x00
line.quad 0x00 "CLUSTERPMMDCR_EL3,Cluster Monitor Debug Configuration Register (EL3)"
bitfld.quad 0x00 0. "SPME,Secure performance monitors enable" "Disabled,Enabled"
tree.open "Common Event Identification Registers"
rgroup.quad spr:0x30F64++0x00
line.quad 0x00 "CLUSTERPMCEID0_EL1,Cluster Performance Monitors Common Event Identification Register 0 (EL1)"
bitfld.quad 0x00 30. "CHAIN,CHAIN event implemented" "Reserved,Implemented"
bitfld.quad 0x00 29. "BUS_CYCLES,BUS_CYCLES event implemented" "Reserved,Implemented"
newline
bitfld.quad 0x00 26. "MEMORY_ERROR,MEMORY_ERROR event implemented" "Reserved,Implemented"
bitfld.quad 0x00 25. "BUS_ACCESS,BUS_ACCESS event implemented" "Reserved,Implemented"
bitfld.quad 0x00 17. "CYCLES,CYCLES event implemented" "Reserved,Implemented"
rgroup.quad spr:0x30F65++0x00
line.quad 0x00 "CLUSTERPMCEID1_EL1,Cluster Common Event Identification ID1 Register (EL1)"
bitfld.quad 0x00 12. "L3D_CACHE_WB,Attributable Level 3 data or unified cache write-back" "Reserved,Implemented"
bitfld.quad 0x00 11. "L3D_CACHE,Attributable Level 3 data or unified cache access" "Reserved,Implemented"
bitfld.quad 0x00 10. "L3D_CACHE_REFILL,Attributable Level 3 data or unified cache refill" "Reserved,Implemented"
newline
bitfld.quad 0x00 9. "L3D_CACHE_ALLOCATE,Attributable Level 3 data or unified cache allocation without refill" "Reserved,Implemented"
tree.end
newline
group.quad spr:0x30F66++0x00
line.quad 0x00 "CLUSTERPMCLAIMSET_EL1,Cluster Performance Monitor Claim Tag Set Register (EL1)"
bitfld.quad 0x00 3. "SET[3],Set the claim tag bit 3 [Write/Read]" "No effect/Not implemented,Set/Implemented"
bitfld.quad 0x00 2. "[2],Set the claim tag bit 2 [Write/Read]" "No effect/Not implemented,Set/Implemented"
bitfld.quad 0x00 1. "[1],Set the claim tag bit 1 [Write/Read]" "No effect/Not implemented,Set/Implemented"
newline
bitfld.quad 0x00 0. "[0],Set the claim tag bit 0 [Write/Read]" "No effect/Not implemented,Set/Implemented"
group.quad spr:0x30F67++0x00
line.quad 0x00 "CLUSTERPMCLAIMCLR_EL1,Cluster Performance Monitor Claim Tag Clear Register (EL1)"
bitfld.quad 0x00 3. "CLR[3],Clear the claim tag bit 3 [Write/Read]" "No effect/Not implemented,Clear/Implemented"
bitfld.quad 0x00 2. "[2],Clear the claim tag bit 2 [Write/Read]" "No effect/Not implemented,Clear/Implemented"
bitfld.quad 0x00 1. "[1],Clear the claim tag bit 1 [Write/Read]" "No effect/Not implemented,Clear/Implemented"
newline
bitfld.quad 0x00 0. "[0],Clear the claim tag bit 0 [Write/Read]" "No effect/Not implemented,Clear/Implemented"
tree.end
tree.end
tree.end
tree.open ("AArch32")
tree "System Control and Configuration"
group.long c15:0x020D++0x00
line.long 0x00 "TPIDRURW,PL0 Read/Write Software Thread ID Register"
group.long c15:0x030D++0x00
line.long 0x00 "TPIDRURO,PL0 Read-Only Software Thread ID Register"
tree.end
tree "System Instructions"
wgroup.long c15:0x0017++0x00
line.long 0x00 "ICIALLUIS,ICIALLUIS"
wgroup.long c15:0x0057++0x00
line.long 0x00 "ICIALLU,ICIALLU"
wgroup.long c15:0x0157++0x00
line.long 0x00 "ICIMVAU,ICIMVAU"
wgroup.long c15:0x3147++0x00
line.long 0x00 "DCZVA,DCZVA"
wgroup.long c15:0x0167++0x00
line.long 0x00 "DCIMVAC,DCIMVAC"
wgroup.long c15:0x0267++0x00
line.long 0x00 "DCISW,DCISW"
wgroup.long c15:0x01A7++0x00
line.long 0x00 "DCCMVAC,DCCMVAC"
wgroup.long c15:0x02A7++0x00
line.long 0x00 "DCCSW,DCCSW"
wgroup.long c15:0x01B7++0x00
line.long 0x00 "DCCMVAU,DCCMVAU"
wgroup.long c15:0x01E7++0x00
line.long 0x00 "DCCIMVAC,DCCIMVAC"
wgroup.long c15:0x02E7++0x00
line.long 0x00 "DCCISW,DCCISW"
wgroup.long c15:0x0087++0x00
line.long 0x00 "ATS1CPR,ATS1CPR"
wgroup.long c15:0x0097++0x00
line.long 0x00 "ATS1CPRP,ATS1CPRP"
wgroup.long c15:0x0187++0x00
line.long 0x00 "ATS1CPW,ATS1CPW"
wgroup.long c15:0x0197++0x00
line.long 0x00 "ATS1CPWP,ATS1CPWP"
wgroup.long c15:0x0287++0x00
line.long 0x00 "ATS1CUR,ATS1CUR"
wgroup.long c15:0x0387++0x00
line.long 0x00 "ATS1CUW,ATS1CUW"
wgroup.long c15:0x0487++0x00
line.long 0x00 "ATS12NSOPR,ATS12NSOPR"
wgroup.long c15:0x0587++0x00
line.long 0x00 "ATS12NSOPW,ATS12NSOPW"
wgroup.long c15:0x0687++0x00
line.long 0x00 "ATS12NSOUR,ATS12NSOUR"
wgroup.long c15:0x0787++0x00
line.long 0x00 "ATS12NSOUW,ATS12NSOUW"
wgroup.long c15:0x4087++0x00
line.long 0x00 "ATS1HR,ATS1HR"
wgroup.long c15:0x4187++0x00
line.long 0x00 "ATS1HW,ATS1HW"
wgroup.long c15:0x0078++0x00
line.long 0x00 "TLBIALL,TLBIALL"
wgroup.long c15:0x0178++0x00
line.long 0x00 "TLBIMVA,TLBIMVA"
wgroup.long c15:0x4178++0x00
line.long 0x00 "TLBIMVAH,Invalidate Hyp unified TLB entry by MVA"
wgroup.long c15:0x0278++0x00
line.long 0x00 "TLBIASID,TLBIASID"
wgroup.long c15:0x0378++0x00
line.long 0x00 "TLBIMVAA,TLBIMVAA"
wgroup.long c15:0x0578++0x00
line.long 0x00 "TLBIMVAL,TLBIMVAL"
wgroup.long c15:0x0778++0x00
line.long 0x00 "TLBIMVAAL,TLBIMVAAL"
wgroup.long c15:0x0038++0x00
line.long 0x00 "TLBIALLIS,TLBIALLIS"
wgroup.long c15:0x0138++0x00
line.long 0x00 "TLBIMVAIS,TLBIMVAIS"
wgroup.long c15:0x0238++0x00
line.long 0x00 "TLBIASIDIS,TLBIASIDIS"
wgroup.long c15:0x0338++0x00
line.long 0x00 "TLBIMVAAIS,TLBIMVAAIS"
wgroup.long c15:0x0538++0x00
line.long 0x00 "TLBIMVALIS,TLBIMVALIS"
wgroup.long c15:0x0738++0x00
line.long 0x00 "TLBIMVAALI,TLBIMVAALI"
wgroup.long c15:0x4108++0x00
line.long 0x00 "TLBIIPAS2IS,TLBIIPAS2IS"
wgroup.long c15:0x4508++0x00
line.long 0x00 "TLBIIPAS2LIS,TLBIIPAS2LIS"
wgroup.long c15:0x4148++0x00
line.long 0x00 "TLBIIPAS2,TLBIIPAS2"
wgroup.long c15:0x4548++0x00
line.long 0x00 "TLBIIPAS2L,TLBIIPAS2L"
wgroup.long c15:0x4178++0x00
line.long 0x00 "TLBIIPAS2L,TLBIIPAS2L"
wgroup.long c15:0x4578++0x00
line.long 0x00 "TLBIMVALH,TLBIMVALH"
wgroup.long c15:0x4138++0x00
line.long 0x00 "TLBIMVAHIS,TLBIMVAHIS"
wgroup.long c15:0x4538++0x00
line.long 0x00 "TLBIMVALHIS,TLBIMVALHIS"
wgroup.long c15:0x4078++0x00
line.long 0x00 "TLBIALLH,TLBIALLH"
wgroup.long c15:0x4038++0x00
line.long 0x00 "TLBIALLHIS,TLBIALLHIS"
wgroup.long c15:0x4478++0x00
line.long 0x00 "TLBIALLNSNH,TLBIALLNSNH"
wgroup.long c15:0x4438++0x00
line.long 0x00 "TLBIALLNSNHIS,TLBIALLNSNHIS"
wgroup.long c15:0x0457++0x00
line.long 0x00 "CP15ISB,CP15ISB"
wgroup.long c15:0x04A7++0x00
line.long 0x00 "CP15DSB,CP15DSB"
wgroup.long c15:0x05A7++0x00
line.long 0x00 "CP15DMB,CP15DMB"
tree.end
tree "Virtualization Extensions"
group.long c15:0x3054++0x00
line.long 0x00 "DSPSR,Debug Saved Program Status Register"
bitfld.long 0x00 31. "N,Negative condition flag" "Not negative,Negative"
bitfld.long 0x00 30. "Z,Zero condition flag" "Not zero,Zero"
bitfld.long 0x00 29. "C,Carry condition flag" "Not carry,Carry"
bitfld.long 0x00 28. "V,Overflow condition flag" "No overflow,Overflow"
newline
bitfld.long 0x00 27. "Q,Cumulative condition flag" "Not occurred,Occurred"
bitfld.long 0x00 22. "PAN,Privileged access never" "No,Yes"
bitfld.long 0x00 21. "SS,Software step" "0,1"
bitfld.long 0x00 20. "IL,Illegal execution state" "0,1"
newline
bitfld.long 0x00 14.--15. 25.--26. "IT[4:7],IT block state bits for the T32 IT (If-Then) instruction - base condition for the IT block" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--13. "IT[0:3],IT block state bits for the T32 IT (If-Then) instruction - size of the IT block" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "GE,Greater than or equal flags" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 9. "E,Endianness state bit" "Little,Big"
newline
bitfld.long 0x00 8. "A,Asynchronous data abort mask bit" "Not masked,Masked"
bitfld.long 0x00 7. "I,IRQ mask bit" "Not masked,Masked"
bitfld.long 0x00 6. "F,FIQ mask bit" "Not masked,Masked"
bitfld.long 0x00 5. "T,T32 Instruction set state" "A32,T32"
newline
bitfld.long 0x00 4. "M[4],Execution state that the exception was taken from" ",AArch32"
bitfld.long 0x00 0.--3. "M[3:0],Current PE mode" "User,FIQ,IRQ,Supervisor,,,Monitor,Abort,,,Hyp,Undefined,,,,System"
group.long c15:0x3154++0x00
line.long 0x00 "DLR,Debug Link Register"
tree.end
tree "System Performance Monitor"
group.long c15:0x00C9++0x00
line.long 0x00 "PMCR,Performance Monitors Control Register"
hexmask.long.byte 0x00 24.--31. 1. "IMP,Implementer code"
hexmask.long.byte 0x00 16.--23. 1. "IDCODE,Identification code"
newline
rbitfld.long 0x00 11.--15. "N,Number of event counters implemented" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,6,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,20,?..."
bitfld.long 0x00 7. "LP,Long event counter enable" "Disabled,Enabled"
bitfld.long 0x00 6. "LC,Long cycle counter enable" "Disabled,Enabled"
bitfld.long 0x00 5. "DP,Disable cycle counter when event counting is prohibited" "No,Yes"
newline
bitfld.long 0x00 3. "D,Clock Divider" "Every cycle,64th cycle"
bitfld.long 0x00 2. "C,Clock Counter reset" "No effect,Reset"
bitfld.long 0x00 1. "P,Performance Counter reset" "No effect,Reset"
bitfld.long 0x00 0. "E,All Counters enable" "Disabled,Enabled"
group.long c15:0x01C9++0x00
line.long 0x00 "PMCNTENSET,Performance Monitors Count Enable Set Register"
bitfld.long 0x00 31. "C,Cycle counter register PMCCNTR enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
newline
bitfld.long 0x00 5. "P5,Event counter PMEVCNTR5 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.long 0x00 4. "P4,Event counter PMEVCNTR4 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.long 0x00 3. "P3,Event counter PMEVCNTR3 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
newline
bitfld.long 0x00 2. "P2,Event counter PMEVCNTR2 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.long 0x00 1. "P1,Event counter PMEVCNTR1 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
bitfld.long 0x00 0. "P0,Event counter PMEVCNTR0 enable bit [Read/Write]" "Disabled/No effect,Enabled/Enable"
group.long c15:0x02C9++0x00
line.long 0x00 "PMCNTENCLR,Performance Monitors Count Enable Clear Register"
bitfld.long 0x00 31. "C,Cycle counter register PMCCNTR disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
newline
bitfld.long 0x00 5. "P5,Event counter PMEVCNTR5 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
bitfld.long 0x00 4. "P4,Event counter PMEVCNTR4 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
bitfld.long 0x00 3. "P3,Event counter PMEVCNTR3 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
newline
bitfld.long 0x00 2. "P2,Event counter PMEVCNTR2 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
bitfld.long 0x00 1. "P1,Event counter PMEVCNTR1 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
bitfld.long 0x00 0. "P0,Event counter PMEVCNTR0 disable bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
group.long c15:0x03C9++0x00
line.long 0x00 "PMOVSR,Performance Monitors Overflow Flag Status Register"
eventfld.long 0x00 31. "C,Cycle counter register PMCCNTR overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
newline
eventfld.long 0x00 5. "P5,Event counter PMEVCNTR5 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.long 0x00 4. "P4,Event counter PMEVCNTR4 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.long 0x00 3. "P3,Event counter PMEVCNTR3 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
newline
eventfld.long 0x00 2. "P2,Event counter PMEVCNTR2 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.long 0x00 1. "P1,Event counter PMEVCNTR1 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.long 0x00 0. "P0,Event counter PMEVCNTR0 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
wgroup.long c15:0x04C9++0x00
line.long 0x00 "PMSWINC,Performance Monitors Software Increment Register"
bitfld.long 0x00 5. "P5,Event counter PMEVCNTR5 software increment bit" "No effect,Increment"
bitfld.long 0x00 4. "P4,Event counter PMEVCNTR4 software increment bit" "No effect,Increment"
bitfld.long 0x00 3. "P3,Event counter PMEVCNTR3 software increment bit" "No effect,Increment"
newline
bitfld.long 0x00 2. "P2,Event counter PMEVCNTR2 software increment bit" "No effect,Increment"
bitfld.long 0x00 1. "P1,Event counter PMEVCNTR1 software increment bit" "No effect,Increment"
bitfld.long 0x00 0. "P0,Event counter PMEVCNTR0 software increment bit" "No effect,Increment"
group.long c15:0x05C9++0x00
line.long 0x00 "PMSELR,Performance Monitors Event Counter Selection Register"
bitfld.long 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,31"
tree.open "Common Event Identification Registers"
rgroup.long c15:0x06C9++0x00
line.long 0x00 "PMCEID0,Performance Monitors Common Event Identification Register 0"
bitfld.long 0x00 31. "L1D_CACHE_ALLOCATE,Level 1 data cache allocate" "Not implemented,?..."
bitfld.long 0x00 30. "CHAIN,Chain" "Reserved,Implemented"
bitfld.long 0x00 29. "BUS_CYCLES,Bus cycle" "Reserved,Implemented"
newline
bitfld.long 0x00 28. "TTBR_WRITE_RETIRED,TTBR write retired" "Reserved,Implemented"
bitfld.long 0x00 27. "INST_SPEC,Instruction speculatively executed" "Reserved,Implemented"
bitfld.long 0x00 26. "MEMORY_ERROR,Local memory error" "Reserved,Implemented"
newline
bitfld.long 0x00 25. "BUS_ACCESS,Bus access" "Reserved,Implemented"
bitfld.long 0x00 24. "L2D_CACHE_WB,Level 2 data cache write-back" "Reserved,Implemented"
bitfld.long 0x00 23. "L2D_CACHE_REFILL,Level 2 data cache refill" "Reserved,Implemented"
newline
bitfld.long 0x00 22. "L2D_CACHE,Level 2 data cache access" "Reserved,Implemented"
bitfld.long 0x00 21. "L1D_CACHE_WB,Level 1 data cache write-back" "Reserved,Implemented"
bitfld.long 0x00 20. "L1I_CACHE,Level 1 instruction cache access" "Reserved,Implemented"
newline
bitfld.long 0x00 19. "MEM_ACCESS,Data memory access" "Reserved,Implemented"
bitfld.long 0x00 18. "BR_PRED,Predictable branch speculatively executed" "Reserved,Implemented"
bitfld.long 0x00 17. "CPU_CYCLES,CPU Cycle" "Reserved,Implemented"
newline
bitfld.long 0x00 16. "BR_MIS_PRED,Mispredicted or not predicted branch speculatively executed" "Reserved,Implemented"
bitfld.long 0x00 15. "UNALIGNED_LDST_RETIRED,UNALIGNED_LDST_RETIRED" "Not implemented,?..."
bitfld.long 0x00 14. "BR_RETURN_RETIRED,Instruction architecturally executed condition check pass procedure return" "Not implemented,?..."
newline
bitfld.long 0x00 13. "BR_IMMED_RETIRED,Instruction architecturally executed immediate branch" "Not implemented,?..."
bitfld.long 0x00 12. "PC_WRITE_RETIRED,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,?..."
bitfld.long 0x00 11. "CID_WRITE_RETIRED,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Reserved,Implemented"
newline
bitfld.long 0x00 10. "EXC_RETURN,Instruction architecturally executed condition check pass exception return" "Reserved,Implemented"
bitfld.long 0x00 9. "EXC_TAKEN,Exception taken" "Reserved,Implemented"
bitfld.long 0x00 8. "INST_RETIRED,Instruction architecturally executed" "Reserved,Implemented"
newline
bitfld.long 0x00 7. "ST_RETIRED,Instruction architecturally executed condition check pass store" "Not implemented,?..."
bitfld.long 0x00 6. "LD_RETIRED,Instruction architecturally executed condition check pass load" "Not implemented,?..."
bitfld.long 0x00 5. "L1D_TLB_REFILL,Level 1 data TLB refill" "Reserved,Implemented"
newline
bitfld.long 0x00 4. "L1D_CACHE,Level 1 data cache access" "Reserved,Implemented"
bitfld.long 0x00 3. "L1D_CACHE_REFILL,Level 1 data cache refill" "Reserved,Implemented"
bitfld.long 0x00 2. "L1I_TLB_REFILL,Level 1 instruction TLB refill" "Reserved,Implemented"
newline
bitfld.long 0x00 1. "L1I_CACHE_REFILL,Level 1 instruction cache refill" "Reserved,Implemented"
bitfld.long 0x00 0. "SW_INCR,Instruction architecturally executed condition check pass software increment" "Reserved,Implemented"
rgroup.long c15:0x07C9++0x00
line.long 0x00 "PMCEID1,Performance Monitors Common Event Identification Register 1"
bitfld.long 0x00 23. "LL_CACHE_MISS_RD,Attributable last level cache memory read miss" "Reserved,Implemented"
newline
bitfld.long 0x00 22. "LL_CACHE_RD,Attributable last level cache memory read" "Reserved,Implemented"
bitfld.long 0x00 21. "ITLB_WLK,Attributable instruction TLB access with at least one translation table walk" "Reserved,Implemented"
bitfld.long 0x00 20. "DTLB_WLK,Attributable data or unified TLB access with at least one translation table walk" "Reserved,Implemented"
newline
bitfld.long 0x00 17. "REMOTE_ACCESS,Attributable access to another socket in a multi-socket system" "Reserved,Implemented"
bitfld.long 0x00 15. "L2D_TLB,Attributable Level 2 data or unified TLB access" "Reserved,Implemented"
newline
bitfld.long 0x00 13. "L2D_TLB_REFILL,Attributable Level 2 data or unified TLB refill" "Reserved,Implemented"
bitfld.long 0x00 11. "L3D_CACHE,Attributable Level 3 data or unified cache access" "Reserved,Implemented"
newline
bitfld.long 0x00 10. "L3D_CACHE_REFILL,Attributable Level 3 data or unified cache refill" "Reserved,Implemented"
bitfld.long 0x00 9. "L3D_CACHE_ALLOCATE,Attributable Level 3 data or unified cache allocation without refill" "Reserved,Implemented"
newline
bitfld.long 0x00 6. "L1I_TLB,Level 1 instruction TLB access" "Reserved,Implemented"
bitfld.long 0x00 5. "L1D_TLB,Level 1 data or unified TLB access" "Reserved,Implemented"
newline
bitfld.long 0x00 4. "STALL_BACKEND,No operation issued due to backend" "Reserved,Implemented"
bitfld.long 0x00 3. "STALL_FRONTEND,No operation issued due to the frontend" "Reserved,Implemented"
bitfld.long 0x00 2. "BR_MIS_PRED_RETIRED,Instruction architecturally executed mispredicted branch" "Reserved,Implemented"
newline
bitfld.long 0x00 1. "BR_RETIRED,Instruction architecturally executed branch" "Reserved,Implemented"
bitfld.long 0x00 0. "L2D_CACHE_ALLOCATE,Level 2 data cache allocate" "Reserved,Implemented"
rgroup.long c15:0x04E9++0x00
line.long 0x00 "PMCEID2,Common Event Identification Register"
rgroup.long c15:0x05E9++0x00
line.long 0x00 "PMCEID3,Common Event Identification Register"
tree.end
newline
group.long c15:0x00D9++0x00
line.long 0x00 "PMCCNTR,Performance Monitors Cycle Count Register (32-bit)"
group.quad c15:0x10090++0x01
line.quad 0x00 "PMCCNTR,Performance Monitors Cycle Count Register (64-bit)"
if (((per.l(c15:0x05C9))&0x1F)==0x1F)
group.long c15:0x01D9++0x00
line.long 0x00 "PMXEVTYPER,Performance Monitors Selected Event Type Register - PMCCFILTR"
bitfld.long 0x00 31. "P,Count events in EL1 disable" "No,Yes"
bitfld.long 0x00 30. "U,Count events in EL0 disable" "No,Yes"
bitfld.long 0x00 29. "NSK,Count events in non-secure EL1 [P=0/1]" "Yes/No,No/Yes"
bitfld.long 0x00 28. "NSU,Count events in non-secure EL0 [U=0/1]" "Yes/No,No/Yes"
newline
bitfld.long 0x00 27. "NSH,Count events in non-secure EL2" "Disabled,Enabled"
elif (((per.l(c15:0x05C9))&0x1F)<=0x05)
group.long c15:0x01D9++0x00
line.long 0x00 "PMXEVTYPER,Performance Monitors Selected Event Type Register - PMEVTYPER"
bitfld.long 0x00 31. "P,Count events in EL1 disable" "No,Yes"
bitfld.long 0x00 30. "U,Count events in EL0 disable" "No,Yes"
bitfld.long 0x00 29. "NSK,Count events in non-secure EL1 [P=0/1]" "Yes/No,No/Yes"
bitfld.long 0x00 28. "NSU,Count events in non-secure EL0 [U=0/1]" "Yes/No,No/Yes"
newline
bitfld.long 0x00 27. "NSH,Count events in non-secure EL2" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Count events in secure EL3 [P=0/1]" "Yes/No,No/Yes"
newline
hexmask.long.word 0x00 0.--15. 1. "EVTCOUNT,Event to count"
else
rgroup.long c15:0x01D9++0x00
line.long 0x00 "PMXEVTYPER,Performance Monitors Selected Event Type Register - PMEVTYPER"
endif
group.long c15:0x02D9++0x00
line.long 0x00 "PMXEVCNTR,Performance Monitors Selected Event Counter Register"
group.long c15:0x00E9++0x00
line.long 0x00 "PMUSERENR,Performance Monitors User Enable Register"
bitfld.long 0x00 3. "ER,Event counter read enable" "Disabled,Enabled"
bitfld.long 0x00 2. "CR,Cycle counter read enable" "Disabled,Enabled"
bitfld.long 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled"
bitfld.long 0x00 0. "EN,EL0 access enable bit" "Disabled,Enabled"
newline
group.long c15:0x03E9++0x00
line.long 0x00 "PMOVSSET,Performance Monitors Overflow Status Flags Set Register"
bitfld.long 0x00 31. "C,Cycle counter overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set overflow"
newline
bitfld.long 0x00 5. "P5,Event counter PMEVCNTR5 overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set overflow"
bitfld.long 0x00 4. "P4,Event counter PMEVCNTR4 overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set overflow"
bitfld.long 0x00 3. "P3,Event counter PMEVCNTR3 overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set overflow"
newline
bitfld.long 0x00 2. "P2,Event counter PMEVCNTR2 overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set overflow"
bitfld.long 0x00 1. "P1,Event counter PMEVCNTR1 overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set overflow"
bitfld.long 0x00 0. "P0,Event counter PMEVCNTR0 overflow set bit [Read/Write]" "No overflow/No effect,Overflow/Set overflow"
group.long c15:(0x008E+0x0)++0x00
line.long 0x00 "PMEVCNTR0,Performance Monitors Event Counter Register 0"
group.long c15:(0x008E+0x100)++0x00
line.long 0x00 "PMEVCNTR1,Performance Monitors Event Counter Register 1"
group.long c15:(0x008E+0x200)++0x00
line.long 0x00 "PMEVCNTR2,Performance Monitors Event Counter Register 2"
group.long c15:(0x008E+0x300)++0x00
line.long 0x00 "PMEVCNTR3,Performance Monitors Event Counter Register 3"
group.long c15:(0x008E+0x400)++0x00
line.long 0x00 "PMEVCNTR4,Performance Monitors Event Counter Register 4"
group.long c15:(0x008E+0x500)++0x00
line.long 0x00 "PMEVCNTR5,Performance Monitors Event Counter Register 5"
group.long c15:(0x00CE+0x0)++0x00
line.long 0x00 "PMEVTYPER0,Performance Monitors Event Type Register 0"
bitfld.long 0x00 31. "P,Count events in EL1 disable" "No,Yes"
bitfld.long 0x00 30. "U,Count events in EL0 disable" "No,Yes"
bitfld.long 0x00 29. "NSK,Count events in non-secure EL1 [P=0/1]" "Yes/No,No/Yes"
newline
bitfld.long 0x00 28. "NSU,Count events in non-secure EL0 [U=0/1]" "Yes/No,No/Yes"
bitfld.long 0x00 27. "NSH,Count events in non-secure EL2" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Count events in secure EL3" "Disabled,Enabled"
newline
bitfld.long 0x00 24. "SH,Count events in secure EL2 [NSH=0/1]" "Yes/No,No/Yes"
hexmask.long.word 0x00 0.--15. 1. "EVTCOUNT,Event number"
group.long c15:(0x00CE+0x100)++0x00
line.long 0x00 "PMEVTYPER1,Performance Monitors Event Type Register 1"
bitfld.long 0x00 31. "P,Count events in EL1 disable" "No,Yes"
bitfld.long 0x00 30. "U,Count events in EL0 disable" "No,Yes"
bitfld.long 0x00 29. "NSK,Count events in non-secure EL1 [P=0/1]" "Yes/No,No/Yes"
newline
bitfld.long 0x00 28. "NSU,Count events in non-secure EL0 [U=0/1]" "Yes/No,No/Yes"
bitfld.long 0x00 27. "NSH,Count events in non-secure EL2" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Count events in secure EL3" "Disabled,Enabled"
newline
bitfld.long 0x00 24. "SH,Count events in secure EL2 [NSH=0/1]" "Yes/No,No/Yes"
hexmask.long.word 0x00 0.--15. 1. "EVTCOUNT,Event number"
group.long c15:(0x00CE+0x200)++0x00
line.long 0x00 "PMEVTYPER2,Performance Monitors Event Type Register 2"
bitfld.long 0x00 31. "P,Count events in EL1 disable" "No,Yes"
bitfld.long 0x00 30. "U,Count events in EL0 disable" "No,Yes"
bitfld.long 0x00 29. "NSK,Count events in non-secure EL1 [P=0/1]" "Yes/No,No/Yes"
newline
bitfld.long 0x00 28. "NSU,Count events in non-secure EL0 [U=0/1]" "Yes/No,No/Yes"
bitfld.long 0x00 27. "NSH,Count events in non-secure EL2" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Count events in secure EL3" "Disabled,Enabled"
newline
bitfld.long 0x00 24. "SH,Count events in secure EL2 [NSH=0/1]" "Yes/No,No/Yes"
hexmask.long.word 0x00 0.--15. 1. "EVTCOUNT,Event number"
group.long c15:(0x00CE+0x300)++0x00
line.long 0x00 "PMEVTYPER3,Performance Monitors Event Type Register 3"
bitfld.long 0x00 31. "P,Count events in EL1 disable" "No,Yes"
bitfld.long 0x00 30. "U,Count events in EL0 disable" "No,Yes"
bitfld.long 0x00 29. "NSK,Count events in non-secure EL1 [P=0/1]" "Yes/No,No/Yes"
newline
bitfld.long 0x00 28. "NSU,Count events in non-secure EL0 [U=0/1]" "Yes/No,No/Yes"
bitfld.long 0x00 27. "NSH,Count events in non-secure EL2" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Count events in secure EL3" "Disabled,Enabled"
newline
bitfld.long 0x00 24. "SH,Count events in secure EL2 [NSH=0/1]" "Yes/No,No/Yes"
hexmask.long.word 0x00 0.--15. 1. "EVTCOUNT,Event number"
group.long c15:(0x00CE+0x400)++0x00
line.long 0x00 "PMEVTYPER4,Performance Monitors Event Type Register 4"
bitfld.long 0x00 31. "P,Count events in EL1 disable" "No,Yes"
bitfld.long 0x00 30. "U,Count events in EL0 disable" "No,Yes"
bitfld.long 0x00 29. "NSK,Count events in non-secure EL1 [P=0/1]" "Yes/No,No/Yes"
newline
bitfld.long 0x00 28. "NSU,Count events in non-secure EL0 [U=0/1]" "Yes/No,No/Yes"
bitfld.long 0x00 27. "NSH,Count events in non-secure EL2" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Count events in secure EL3" "Disabled,Enabled"
newline
bitfld.long 0x00 24. "SH,Count events in secure EL2 [NSH=0/1]" "Yes/No,No/Yes"
hexmask.long.word 0x00 0.--15. 1. "EVTCOUNT,Event number"
group.long c15:(0x00CE+0x500)++0x00
line.long 0x00 "PMEVTYPER5,Performance Monitors Event Type Register 5"
bitfld.long 0x00 31. "P,Count events in EL1 disable" "No,Yes"
bitfld.long 0x00 30. "U,Count events in EL0 disable" "No,Yes"
bitfld.long 0x00 29. "NSK,Count events in non-secure EL1 [P=0/1]" "Yes/No,No/Yes"
newline
bitfld.long 0x00 28. "NSU,Count events in non-secure EL0 [U=0/1]" "Yes/No,No/Yes"
bitfld.long 0x00 27. "NSH,Count events in non-secure EL2" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Count events in secure EL3" "Disabled,Enabled"
newline
bitfld.long 0x00 24. "SH,Count events in secure EL2 [NSH=0/1]" "Yes/No,No/Yes"
hexmask.long.word 0x00 0.--15. 1. "EVTCOUNT,Event number"
group.long c15:0x07FE++0x00
line.long 0x00 "PMCCFILTR,Performance Monitors Cycle Count Filter Register"
bitfld.long 0x00 31. "P,Count events in EL1 disable" "No,Yes"
bitfld.long 0x00 30. "U,Count events in EL0 disable" "No,Yes"
bitfld.long 0x00 29. "NSK,Count events in non-secure EL1 [P=0/1]" "Yes/No,No/Yes"
bitfld.long 0x00 28. "NSU,Count events in non-secure EL0 [U=0/1]" "Yes/No,No/Yes"
newline
bitfld.long 0x00 26. "M,Count events in secure EL3" "Disabled,Enabled"
tree.end
tree "System Timer Registers"
rgroup.long c15:0x000E++0x00
line.long 0x00 "CNTFRQ,Counter-timer Frequency Register"
rgroup.quad c15:0x100E0++0x01
line.quad 0x00 "CNTPCT,Counter-timer Physical Count Register"
rgroup.quad c15:0x110E0++0x01
line.quad 0x00 "CNTVCT,Counter-timer Virtual Count Register"
group.long c15:0x002E++0x00
line.long 0x00 "CNTP_TVAL,Counter-timer Physical Timer TimerValue Register"
group.long c15:0x012E++0x00
line.long 0x00 "CNTP_CTL,Counter-timer Physical Timer Control Register"
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad c15:0x120E0++0x01
line.quad 0x00 "CNTP_CVAL,Counter-timer Physical Timer CompareValue Register"
group.long c15:0x003E++0x00
line.long 0x00 "CNTV_TVAL,Counter-timer Virtual Timer TimerValue Register"
group.long c15:0x013E++0x00
line.long 0x00 "CNTV_CTL,Counter-timer Virtual Timer Control Register"
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad c15:0x130E0++0x01
line.quad 0x00 "CNTV_CVAL,Counter-timer Virtual Timer CompareValue Register"
tree.end
tree "Debug Registers"
rgroup.long c14:0x0010++0x00
line.long 0x00 "DBGDSCRINT,Debug Status And Control Register (Internal View)"
bitfld.long 0x00 30. "RXFULL,DBGDTRRX register full" "Empty,Full"
bitfld.long 0x00 29. "TXFULL,DBGDTRTX register full" "Empty,Full"
newline
bitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure"
bitfld.long 0x00 17. "SPNIDDIS,Secure privileged non-invasive debug disable" "No,Yes"
bitfld.long 0x00 16. "SPIDDIS,Secure privileged invasive debug disable" "No,Yes"
newline
bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled"
bitfld.long 0x00 12. "UDCCDIS,User mode access to communications channel disable" "No,Yes"
bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,Software Breakpoint (BKPT),Reserved,Vector catch,Reserved,Reserved,Reserved,Reserved,Watchpoint,?..."
wgroup.long c14:0x0050++0x00
line.long 0x00 "DBGDTRTXINT,Debug Data Transmit Register (Internal View)"
rgroup.long c14:0x0050++0x00
line.long 0x00 "DBGDTRRXINT,Debug Data Receive Register (Internal View)"
tree.end
tree.end
AUTOINDENT.OFF
AUTOINDENT.POP
tree.open "Interrupt Controller (GIC-600)"
AUTOINDENT.PUSH
AUTOINDENT.OFF
base COMP.BASE("GICD",-1.)
width 17.
tree "Distributor Interface"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)))
group.long 0x0000++0x03
line.long 0x00 "GICD_CTLR,Distributor Control Register (Secure access)"
rbitfld.long 0x00 31. " RWP          ,Register Write Pending. Indicates whether a register write is in progress or not" "Not pending,Pending"
bitfld.long 0x00 7. "    E1NWF      ,Enable 1 of N Wakeup Functionality" "Disabled,Enabled"
bitfld.long 0x00 6. "       DS            ,Disable Security" "No,Yes"
textline "                          "
bitfld.long 0x00 5. " ARE_NS       ,Affinity Routing Enable" "Disabled,Enabled"
bitfld.long 0x00 4. "       ARE_S      ,Affinity Routing Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "       ENABLEGRP1S   ,Enable Secure Group 1 interrupts" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 1. " ENABLEGRP1NS ,Enable Secure Group 1 interrupts" "Disabled,Enabled"
bitfld.long 0x00 0. "       ENABLEGRP0 ,Enable Group 0 interrupts" "Disabled,Enabled"
elif (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)
group.long 0x0000++0x03
line.long 0x00 "GICD_CTLR,Distributor Control Register (Non-secure access)"
rbitfld.long 0x00 31. " RWP          ,Register Write Pending. Indicates whether a register write is in progress or not" "Not pending,Pending"
bitfld.long 0x00 7. "    E1NWF      ,Enable 1 of N Wakeup Functionality" "Disabled,Enabled"
bitfld.long 0x00 4. "       ARE_NS        ,Affinity Routing Enable" "Reserved,Enabled"
textline "                          "
bitfld.long 0x00 1. " ENABLEGRP1A  ,Enable Group 1 interrupts" "Disabled,Enabled"
bitfld.long 0x00 0. "       ENABLEGRP1 ,Enable Group 1 interrupts" "Disabled,Enabled"
else
group.long 0x0000++0x03
line.long 0x00 "GICD_CTLR,Distributor Control Register"
rbitfld.long 0x00 31. " RWP          ,Register Write Pending. Indicates whether a register write is in progress or not" "Not pending,Pending"
bitfld.long 0x00 7. "    E1NWF      ,Enable 1 of N Wakeup Functionality" "Disabled,Enabled"
rbitfld.long 0x00 6. "       DS            ,Disable Security" "Reserved,Yes"
textline "                          "
bitfld.long 0x00 4. " ARE          ,Affinity Routing Enable" "Reserved,Enabled"
bitfld.long 0x00 1. "       ENABLEGRP1 ,Enable Group 1 interrupts" "Disabled,Enabled"
bitfld.long 0x00 0. "       ENABLEGRP0    ,Enable Group 0 interrupts" "Disabled,Enabled"
endif
rgroup.long 0x0004++0x03
line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register"
bitfld.long 0x00 25. " NO1N          ,Indicates whether 1 of N SPI interrupts are supported" "Supported,Not supported"
bitfld.long 0x00 24. "    A3V        ,Indicates whether the Distributor supports nonzero values of Affinity level 3" "Not supported,Supported"
bitfld.long 0x00 19.--23. "  IDBITS     ,The number of interrupt identifier bits supported" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
textline "                          "
bitfld.long 0x00 18. " DVIS          ,Direct virtual LPI injection support" "Not supported,Supported"
bitfld.long 0x00 17. "    LPIS       ,Indicates whether the implementation supports LPIs" "Not supported,Supported"
bitfld.long 0x00 16. "  MBIS       ,Indicates whether the implementation supports message-based interrupts by writing to Distributor registers" "Not supported,Supported"
textline "                          "
bitfld.long 0x00 10. " SECURITYEXTN  ,Indicates whether interrupt controller implements the security extensions" "Not implemented,Implemented"
bitfld.long 0x00 5.--7. "  CPUNUMBER  ,Reports the number of PEs that can be used when affinity routing is not enabled" "1,2,3,4,5,6,7,8"
bitfld.long 0x00 0.--4. "              ITLN       ,Indicates the maximum SPI INTID that the GIC implementation supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Reserved"
rgroup.long 0x0008++0x03
line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register"
bitfld.long 0x00 24.--31. " PRODID        ,Indicates the product ID" "GIC-500,?,GIC-600,?..."
bitfld.long 0x00 16.--19. "          VAR        ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                          "
bitfld.long 0x00 12.--15. " REV           ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "               IMP        ,Implementer"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0020))
group.long 0x0020++0x03
line.long 0x00 "GICD_FCTLR,Function Control Register"
bitfld.long 0x00 21. " DCC           ,Disable Cache Conversion (DCC)" "Disable,Enable"
bitfld.long 0x00 18. "          SLPIA      ,Strict LPI Allocation (SLPIA).Controls whether LPI reverts to a fixed index behavior. This bit can only be written when in full sleep (quiescent)." "Not Strict,Strict"
bitfld.long 0x00 16.--17. "     NSACR      , Non-secure Access Control. This is the value that is used ifa SPI has an error." "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                          "
hexmask.long.word 0x00 4.--13. 1. " CGO           ,One bit per clock gate: 1 = Leave clock running. 0 = Use full clock gating."
bitfld.long 0x00 0. "             SIP        ,Scrub in progress. This bit is read and written by software. When a scrub is complete, the GIC clears the bit to 0." "Completed,In Progress"
else
group.long 0x0020++0x03
line.long 0x00 "GICD_FCTLR,Function Control Register"
bitfld.long 0x00 21. " DCC           ,Disable Cache Conversion (DCC)" "Disable,Enable"
bitfld.long 0x00 18. "          SLPIA      ,Strict LPI Allocation (SLPIA).Controls whether LPI reverts to a fixed index behavior. This bit can only be written when in full sleep (quiescent)." "Not Strict,Strict"
textline "                          "
hexmask.long.word 0x00 4.--13. 1. " CGO           ,One bit per clock gate: 1 = Leave clock running. 0 = Use full clock gating."
bitfld.long 0x00 0. "             SIP        ,Scrub in progress. This bit is read and written by software. When a scrub is complete, the GIC clears the bit to 0." "Completed,In Progress"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0024)))
group.long 0xE08++0x03
line.long 0x00 "GICD_SAC,Secure Access Control Register"
bitfld.long 0x00 2. " GICPNS        ,Allow Non-secure access to the GICP registers. This enables Non-secure access to Secure PMU data." "Not Allowed,Allowed"
bitfld.long 0x00 1. "      GICTNS     ,Allow Non-secure access to the GICT registers. This enables Non-secure access to Secure trace data." "Not Allowed,Allowed"
bitfld.long 0x00 0. "    DSL        ,Disable Security Lock. WriteOnce (WO) bit to lock GICD_CTLR.DS to be WO at its current value." "0,1"
else
hgroup.long 0xE08++0x03
hide.long 0x00 "GICD_SAC,Secure Access Control Register"
endif
wgroup.long 0x40++0x03
line.long 0x00 "GICD_SETSPI_NSR,Non-secure SPI Set Register"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
wgroup.long 0x48++0x03
line.long 0x00 "GICD_CLRSPI_NSR,Non-secure SPI Clear Register"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x50))
wgroup.long 0x50++0x03
line.long 0x00 "GICD_SETSPI_SR,Secure SPI Set Register (Secure access)"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
else
hgroup.long 0x50++0x03
hide.long 0x00 "GICD_SETSPI_SR,Secure SPI Set Register (Non-secure access)"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x58))
wgroup.long 0x58++0x03
line.long 0x00 "GICD_CLRSPI_SR,Secure SPI Clear Register (Secure access)"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
else
hgroup.long 0x58++0x03
hide.long 0x00 "GICD_CLRSPI_SR,Secure SPI Clear Register (Non-secure access)"
endif
tree "Message Based Alias Registers"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x10000)==0x10000)
wgroup.long 0x40++0x03
line.long 0x00 "GICA_SETSPI_NSR,Non-secure SPI Set Register"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
wgroup.long 0x48++0x03
line.long 0x00 "GICA_CLRSPI_NSR,Non-secure SPI Clear Register"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x50))
wgroup.long 0x50++0x03
line.long 0x00 "GICA_SETSPI_SR,Secure SPI Set Register (Secure access)"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
else
hgroup.long 0x50++0x03
hide.long 0x00 "GICA_SETSPI_SR,Secure SPI Set Register (Non-secure access)"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x58))
wgroup.long 0x58++0x03
line.long 0x00 "GICA_CLRSPI_SR,Secure SPI Clear Register (Secure access)"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
else
hgroup.long 0x58++0x03
hide.long 0x00 "GICA_CLRSPI_SR,Secure SPI Clear Register (Non-secure access)"
endif
else
hgroup.long 0x40++0x03
hide.long 0x00 "GICA_SETSPI_NSR,Non-secure SPI Set Register"
hgroup.long 0x48++0x03
hide.long 0x00 "GICA_CLRSPI_NSR,Non-secure SPI Clear Register"
hgroup.long 0x50++0x03
hide.long 0x00 "GICA_SETSPI_SR,Secure SPI Set Register"
hgroup.long 0x58++0x03
hide.long 0x00 "GICA_CLRSPI_SR,Secure SPI Clear Register"
endif
tree.end
width 17.
tree "Group Registers"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0080))
group.long 0x0080++0x03
line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Secure Access)"
bitfld.long 0x00 31. " GSB31  ,Group Status Bit 31" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB30  ,Group Status Bit 30" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB29  ,Group Status Bit 29" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB28  ,Group Status Bit 28" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB27  ,Group Status Bit 27" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB26  ,Group Status Bit 26" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB25  ,Group Status Bit 25" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB24  ,Group Status Bit 24" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB23  ,Group Status Bit 23" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB22  ,Group Status Bit 22" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB21  ,Group Status Bit 21" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB20  ,Group Status Bit 20" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB19  ,Group Status Bit 19" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB18  ,Group Status Bit 18" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB17  ,Group Status Bit 17" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB16  ,Group Status Bit 16" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB15  ,Group Status Bit 15" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB14  ,Group Status Bit 14" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB13  ,Group Status Bit 13" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB12  ,Group Status Bit 12" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB11  ,Group Status Bit 11" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB10  ,Group Status Bit 10" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB9   ,Group Status Bit 9" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB8   ,Group Status Bit 8" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB7   ,Group Status Bit 7" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB6   ,Group Status Bit 6" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB5   ,Group Status Bit 5" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB4   ,Group Status Bit 4" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB3   ,Group Status Bit 3" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB2   ,Group Status Bit 2" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB1   ,Group Status Bit 1" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB0   ,Group Status Bit 0" "Secure,Non-secure Group 1"
elif (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)
group.long 0x0080++0x03
line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0"
bitfld.long 0x00 31. " GSB31  ,Group Status Bit 31" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB30  ,Group Status Bit 30" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB29  ,Group Status Bit 29" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB28  ,Group Status Bit 28" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB27  ,Group Status Bit 27" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB26  ,Group Status Bit 26" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB25  ,Group Status Bit 25" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB24  ,Group Status Bit 24" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB23  ,Group Status Bit 23" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB22  ,Group Status Bit 22" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB21  ,Group Status Bit 21" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB20  ,Group Status Bit 20" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB19  ,Group Status Bit 19" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB18  ,Group Status Bit 18" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB17  ,Group Status Bit 17" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB16  ,Group Status Bit 16" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB15  ,Group Status Bit 15" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB14  ,Group Status Bit 14" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB13  ,Group Status Bit 13" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB12  ,Group Status Bit 12" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB11  ,Group Status Bit 11" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB10  ,Group Status Bit 10" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB9   ,Group Status Bit 9" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB8   ,Group Status Bit 8" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB7   ,Group Status Bit 7" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB6   ,Group Status Bit 6" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB5   ,Group Status Bit 5" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB4   ,Group Status Bit 4" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB3   ,Group Status Bit 3" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB2   ,Group Status Bit 2" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB1   ,Group Status Bit 1" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB0   ,Group Status Bit 0" "Group 0,Group 1"
else
hgroup.long 0x0080++0x03
hide.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Non-secure access)"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x84))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1))
group.long 0x0084++0x03
line.long 0x0 "GICD_IGROUPR1 ,Interrupt Group Register 1 (Secure Access)"
bitfld.long 0x00 31. " GSB63  ,Group Status Bit 63" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB62  ,Group Status Bit 62" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB61  ,Group Status Bit 61" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB60  ,Group Status Bit 60" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB59  ,Group Status Bit 59" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB58  ,Group Status Bit 58" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB57  ,Group Status Bit 57" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB56  ,Group Status Bit 56" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB55  ,Group Status Bit 55" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB54  ,Group Status Bit 54" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB53  ,Group Status Bit 53" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB52  ,Group Status Bit 52" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB51  ,Group Status Bit 51" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB50  ,Group Status Bit 50" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB49  ,Group Status Bit 49" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB48  ,Group Status Bit 48" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB47  ,Group Status Bit 47" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB46  ,Group Status Bit 46" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB45  ,Group Status Bit 45" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB44  ,Group Status Bit 44" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB43  ,Group Status Bit 43" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB42  ,Group Status Bit 42" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB41  ,Group Status Bit 41" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB40  ,Group Status Bit 40" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB39  ,Group Status Bit 39" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB38  ,Group Status Bit 38" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB37  ,Group Status Bit 37" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB36  ,Group Status Bit 36" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB35  ,Group Status Bit 35" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB34  ,Group Status Bit 34" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB33  ,Group Status Bit 33" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB32  ,Group Status Bit 32" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1))
group.long 0x0084++0x03
line.long 0x0 "GICD_IGROUPR1 ,Interrupt Group Register 1 "
bitfld.long 0x00 31. " GSB63  ,Group Status Bit 63" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB62  ,Group Status Bit 62" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB61  ,Group Status Bit 61" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB60  ,Group Status Bit 60" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB59  ,Group Status Bit 59" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB58  ,Group Status Bit 58" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB57  ,Group Status Bit 57" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB56  ,Group Status Bit 56" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB55  ,Group Status Bit 55" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB54  ,Group Status Bit 54" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB53  ,Group Status Bit 53" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB52  ,Group Status Bit 52" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB51  ,Group Status Bit 51" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB50  ,Group Status Bit 50" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB49  ,Group Status Bit 49" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB48  ,Group Status Bit 48" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB47  ,Group Status Bit 47" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB46  ,Group Status Bit 46" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB45  ,Group Status Bit 45" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB44  ,Group Status Bit 44" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB43  ,Group Status Bit 43" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB42  ,Group Status Bit 42" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB41  ,Group Status Bit 41" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB40  ,Group Status Bit 40" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB39  ,Group Status Bit 39" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB38  ,Group Status Bit 38" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB37  ,Group Status Bit 37" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB36  ,Group Status Bit 36" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB35  ,Group Status Bit 35" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB34  ,Group Status Bit 34" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB33  ,Group Status Bit 33" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB32  ,Group Status Bit 32" "Group 0,Group 1"
else
hgroup.long 0x0084++0x03
hide.long 0x0 "GICD_IGROUPR1 ,Interrupt Group Register 1 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x88))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x2))
group.long 0x0088++0x03
line.long 0x0 "GICD_IGROUPR2 ,Interrupt Group Register 2 (Secure Access)"
bitfld.long 0x00 31. " GSB95  ,Group Status Bit 95" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB94  ,Group Status Bit 94" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB93  ,Group Status Bit 93" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB92  ,Group Status Bit 92" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB91  ,Group Status Bit 91" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB90  ,Group Status Bit 90" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB89  ,Group Status Bit 89" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB88  ,Group Status Bit 88" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB87  ,Group Status Bit 87" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB86  ,Group Status Bit 86" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB85  ,Group Status Bit 85" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB84  ,Group Status Bit 84" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB83  ,Group Status Bit 83" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB82  ,Group Status Bit 82" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB81  ,Group Status Bit 81" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB80  ,Group Status Bit 80" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB79  ,Group Status Bit 79" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB78  ,Group Status Bit 78" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB77  ,Group Status Bit 77" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB76  ,Group Status Bit 76" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB75  ,Group Status Bit 75" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB74  ,Group Status Bit 74" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB73  ,Group Status Bit 73" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB72  ,Group Status Bit 72" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB71  ,Group Status Bit 71" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB70  ,Group Status Bit 70" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB69  ,Group Status Bit 69" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB68  ,Group Status Bit 68" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB67  ,Group Status Bit 67" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB66  ,Group Status Bit 66" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB65  ,Group Status Bit 65" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB64  ,Group Status Bit 64" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x2))
group.long 0x0088++0x03
line.long 0x0 "GICD_IGROUPR2 ,Interrupt Group Register 2 "
bitfld.long 0x00 31. " GSB95  ,Group Status Bit 95" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB94  ,Group Status Bit 94" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB93  ,Group Status Bit 93" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB92  ,Group Status Bit 92" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB91  ,Group Status Bit 91" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB90  ,Group Status Bit 90" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB89  ,Group Status Bit 89" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB88  ,Group Status Bit 88" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB87  ,Group Status Bit 87" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB86  ,Group Status Bit 86" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB85  ,Group Status Bit 85" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB84  ,Group Status Bit 84" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB83  ,Group Status Bit 83" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB82  ,Group Status Bit 82" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB81  ,Group Status Bit 81" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB80  ,Group Status Bit 80" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB79  ,Group Status Bit 79" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB78  ,Group Status Bit 78" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB77  ,Group Status Bit 77" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB76  ,Group Status Bit 76" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB75  ,Group Status Bit 75" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB74  ,Group Status Bit 74" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB73  ,Group Status Bit 73" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB72  ,Group Status Bit 72" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB71  ,Group Status Bit 71" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB70  ,Group Status Bit 70" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB69  ,Group Status Bit 69" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB68  ,Group Status Bit 68" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB67  ,Group Status Bit 67" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB66  ,Group Status Bit 66" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB65  ,Group Status Bit 65" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB64  ,Group Status Bit 64" "Group 0,Group 1"
else
hgroup.long 0x0088++0x03
hide.long 0x0 "GICD_IGROUPR2 ,Interrupt Group Register 2 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x8C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x3))
group.long 0x008C++0x03
line.long 0x0 "GICD_IGROUPR3 ,Interrupt Group Register 3 (Secure Access)"
bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB126 ,Group Status Bit 126" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB125 ,Group Status Bit 125" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB123 ,Group Status Bit 123" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB122 ,Group Status Bit 122" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB120 ,Group Status Bit 120" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB119 ,Group Status Bit 119" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB117 ,Group Status Bit 117" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB116 ,Group Status Bit 116" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB114 ,Group Status Bit 114" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB113 ,Group Status Bit 113" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB111 ,Group Status Bit 111" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB110 ,Group Status Bit 110" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB108 ,Group Status Bit 108" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB107 ,Group Status Bit 107" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB105 ,Group Status Bit 105" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB104 ,Group Status Bit 104" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB102 ,Group Status Bit 102" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB101 ,Group Status Bit 101" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB99  ,Group Status Bit 99" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB98  ,Group Status Bit 98" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB97  ,Group Status Bit 97" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB96  ,Group Status Bit 96" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x3))
group.long 0x008C++0x03
line.long 0x0 "GICD_IGROUPR3 ,Interrupt Group Register 3 "
bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB126 ,Group Status Bit 126" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB125 ,Group Status Bit 125" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB123 ,Group Status Bit 123" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB122 ,Group Status Bit 122" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB120 ,Group Status Bit 120" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB119 ,Group Status Bit 119" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB117 ,Group Status Bit 117" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB116 ,Group Status Bit 116" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB114 ,Group Status Bit 114" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB113 ,Group Status Bit 113" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB111 ,Group Status Bit 111" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB110 ,Group Status Bit 110" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB108 ,Group Status Bit 108" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB107 ,Group Status Bit 107" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB105 ,Group Status Bit 105" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB104 ,Group Status Bit 104" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB102 ,Group Status Bit 102" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB101 ,Group Status Bit 101" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB99  ,Group Status Bit 99" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB98  ,Group Status Bit 98" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB97  ,Group Status Bit 97" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB96  ,Group Status Bit 96" "Group 0,Group 1"
else
hgroup.long 0x008C++0x03
hide.long 0x0 "GICD_IGROUPR3 ,Interrupt Group Register 3 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x90))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x4))
group.long 0x0090++0x03
line.long 0x0 "GICD_IGROUPR4 ,Interrupt Group Register 4 (Secure Access)"
bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB158 ,Group Status Bit 158" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB157 ,Group Status Bit 157" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB155 ,Group Status Bit 155" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB154 ,Group Status Bit 154" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB152 ,Group Status Bit 152" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB151 ,Group Status Bit 151" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB149 ,Group Status Bit 149" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB148 ,Group Status Bit 148" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB146 ,Group Status Bit 146" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB145 ,Group Status Bit 145" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB143 ,Group Status Bit 143" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB142 ,Group Status Bit 142" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB140 ,Group Status Bit 140" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB139 ,Group Status Bit 139" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB137 ,Group Status Bit 137" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB136 ,Group Status Bit 136" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB134 ,Group Status Bit 134" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB133 ,Group Status Bit 133" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB131 ,Group Status Bit 131" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB130 ,Group Status Bit 130" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB128 ,Group Status Bit 128" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x4))
group.long 0x0090++0x03
line.long 0x0 "GICD_IGROUPR4 ,Interrupt Group Register 4 "
bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB158 ,Group Status Bit 158" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB157 ,Group Status Bit 157" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB155 ,Group Status Bit 155" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB154 ,Group Status Bit 154" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB152 ,Group Status Bit 152" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB151 ,Group Status Bit 151" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB149 ,Group Status Bit 149" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB148 ,Group Status Bit 148" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB146 ,Group Status Bit 146" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB145 ,Group Status Bit 145" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB143 ,Group Status Bit 143" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB142 ,Group Status Bit 142" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB140 ,Group Status Bit 140" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB139 ,Group Status Bit 139" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB137 ,Group Status Bit 137" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB136 ,Group Status Bit 136" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB134 ,Group Status Bit 134" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB133 ,Group Status Bit 133" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB131 ,Group Status Bit 131" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB130 ,Group Status Bit 130" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB128 ,Group Status Bit 128" "Group 0,Group 1"
else
hgroup.long 0x0090++0x03
hide.long 0x0 "GICD_IGROUPR4 ,Interrupt Group Register 4 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x94))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x5))
group.long 0x0094++0x03
line.long 0x0 "GICD_IGROUPR5 ,Interrupt Group Register 5 (Secure Access)"
bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB190 ,Group Status Bit 190" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB189 ,Group Status Bit 189" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB187 ,Group Status Bit 187" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB186 ,Group Status Bit 186" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB184 ,Group Status Bit 184" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB183 ,Group Status Bit 183" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB181 ,Group Status Bit 181" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB180 ,Group Status Bit 180" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB178 ,Group Status Bit 178" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB177 ,Group Status Bit 177" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB175 ,Group Status Bit 175" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB174 ,Group Status Bit 174" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB172 ,Group Status Bit 172" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB171 ,Group Status Bit 171" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB169 ,Group Status Bit 169" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB168 ,Group Status Bit 168" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB166 ,Group Status Bit 166" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB165 ,Group Status Bit 165" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB163 ,Group Status Bit 163" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB162 ,Group Status Bit 162" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB160 ,Group Status Bit 160" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x5))
group.long 0x0094++0x03
line.long 0x0 "GICD_IGROUPR5 ,Interrupt Group Register 5 "
bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB190 ,Group Status Bit 190" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB189 ,Group Status Bit 189" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB187 ,Group Status Bit 187" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB186 ,Group Status Bit 186" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB184 ,Group Status Bit 184" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB183 ,Group Status Bit 183" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB181 ,Group Status Bit 181" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB180 ,Group Status Bit 180" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB178 ,Group Status Bit 178" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB177 ,Group Status Bit 177" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB175 ,Group Status Bit 175" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB174 ,Group Status Bit 174" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB172 ,Group Status Bit 172" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB171 ,Group Status Bit 171" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB169 ,Group Status Bit 169" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB168 ,Group Status Bit 168" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB166 ,Group Status Bit 166" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB165 ,Group Status Bit 165" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB163 ,Group Status Bit 163" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB162 ,Group Status Bit 162" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB160 ,Group Status Bit 160" "Group 0,Group 1"
else
hgroup.long 0x0094++0x03
hide.long 0x0 "GICD_IGROUPR5 ,Interrupt Group Register 5 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x98))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x6))
group.long 0x0098++0x03
line.long 0x0 "GICD_IGROUPR6 ,Interrupt Group Register 6 (Secure Access)"
bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB222 ,Group Status Bit 222" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB221 ,Group Status Bit 221" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB219 ,Group Status Bit 219" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB218 ,Group Status Bit 218" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB216 ,Group Status Bit 216" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB215 ,Group Status Bit 215" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB213 ,Group Status Bit 213" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB212 ,Group Status Bit 212" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB210 ,Group Status Bit 210" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB209 ,Group Status Bit 209" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB207 ,Group Status Bit 207" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB206 ,Group Status Bit 206" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB204 ,Group Status Bit 204" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB203 ,Group Status Bit 203" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB201 ,Group Status Bit 201" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB200 ,Group Status Bit 200" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB198 ,Group Status Bit 198" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB197 ,Group Status Bit 197" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB195 ,Group Status Bit 195" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB194 ,Group Status Bit 194" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB192 ,Group Status Bit 192" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x6))
group.long 0x0098++0x03
line.long 0x0 "GICD_IGROUPR6 ,Interrupt Group Register 6 "
bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB222 ,Group Status Bit 222" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB221 ,Group Status Bit 221" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB219 ,Group Status Bit 219" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB218 ,Group Status Bit 218" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB216 ,Group Status Bit 216" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB215 ,Group Status Bit 215" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB213 ,Group Status Bit 213" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB212 ,Group Status Bit 212" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB210 ,Group Status Bit 210" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB209 ,Group Status Bit 209" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB207 ,Group Status Bit 207" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB206 ,Group Status Bit 206" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB204 ,Group Status Bit 204" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB203 ,Group Status Bit 203" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB201 ,Group Status Bit 201" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB200 ,Group Status Bit 200" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB198 ,Group Status Bit 198" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB197 ,Group Status Bit 197" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB195 ,Group Status Bit 195" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB194 ,Group Status Bit 194" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB192 ,Group Status Bit 192" "Group 0,Group 1"
else
hgroup.long 0x0098++0x03
hide.long 0x0 "GICD_IGROUPR6 ,Interrupt Group Register 6 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x9C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x7))
group.long 0x009C++0x03
line.long 0x0 "GICD_IGROUPR7 ,Interrupt Group Register 7 (Secure Access)"
bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB254 ,Group Status Bit 254" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB253 ,Group Status Bit 253" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB251 ,Group Status Bit 251" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB250 ,Group Status Bit 250" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB248 ,Group Status Bit 248" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB247 ,Group Status Bit 247" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB245 ,Group Status Bit 245" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB244 ,Group Status Bit 244" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB242 ,Group Status Bit 242" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB241 ,Group Status Bit 241" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB239 ,Group Status Bit 239" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB238 ,Group Status Bit 238" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB236 ,Group Status Bit 236" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB235 ,Group Status Bit 235" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB233 ,Group Status Bit 233" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB232 ,Group Status Bit 232" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB230 ,Group Status Bit 230" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB229 ,Group Status Bit 229" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB227 ,Group Status Bit 227" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB226 ,Group Status Bit 226" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB224 ,Group Status Bit 224" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x7))
group.long 0x009C++0x03
line.long 0x0 "GICD_IGROUPR7 ,Interrupt Group Register 7 "
bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB254 ,Group Status Bit 254" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB253 ,Group Status Bit 253" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB251 ,Group Status Bit 251" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB250 ,Group Status Bit 250" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB248 ,Group Status Bit 248" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB247 ,Group Status Bit 247" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB245 ,Group Status Bit 245" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB244 ,Group Status Bit 244" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB242 ,Group Status Bit 242" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB241 ,Group Status Bit 241" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB239 ,Group Status Bit 239" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB238 ,Group Status Bit 238" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB236 ,Group Status Bit 236" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB235 ,Group Status Bit 235" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB233 ,Group Status Bit 233" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB232 ,Group Status Bit 232" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB230 ,Group Status Bit 230" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB229 ,Group Status Bit 229" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB227 ,Group Status Bit 227" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB226 ,Group Status Bit 226" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB224 ,Group Status Bit 224" "Group 0,Group 1"
else
hgroup.long 0x009C++0x03
hide.long 0x0 "GICD_IGROUPR7 ,Interrupt Group Register 7 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xA0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x8))
group.long 0x00A0++0x03
line.long 0x0 "GICD_IGROUPR8 ,Interrupt Group Register 8 (Secure Access)"
bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB286 ,Group Status Bit 286" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB285 ,Group Status Bit 285" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB283 ,Group Status Bit 283" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB282 ,Group Status Bit 282" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB280 ,Group Status Bit 280" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB279 ,Group Status Bit 279" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB277 ,Group Status Bit 277" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB276 ,Group Status Bit 276" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB274 ,Group Status Bit 274" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB273 ,Group Status Bit 273" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB271 ,Group Status Bit 271" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB270 ,Group Status Bit 270" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB268 ,Group Status Bit 268" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB267 ,Group Status Bit 267" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB265 ,Group Status Bit 265" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB264 ,Group Status Bit 264" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB262 ,Group Status Bit 262" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB261 ,Group Status Bit 261" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB259 ,Group Status Bit 259" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB258 ,Group Status Bit 258" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB256 ,Group Status Bit 256" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x8))
group.long 0x00A0++0x03
line.long 0x0 "GICD_IGROUPR8 ,Interrupt Group Register 8 "
bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB286 ,Group Status Bit 286" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB285 ,Group Status Bit 285" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB283 ,Group Status Bit 283" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB282 ,Group Status Bit 282" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB280 ,Group Status Bit 280" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB279 ,Group Status Bit 279" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB277 ,Group Status Bit 277" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB276 ,Group Status Bit 276" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB274 ,Group Status Bit 274" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB273 ,Group Status Bit 273" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB271 ,Group Status Bit 271" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB270 ,Group Status Bit 270" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB268 ,Group Status Bit 268" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB267 ,Group Status Bit 267" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB265 ,Group Status Bit 265" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB264 ,Group Status Bit 264" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB262 ,Group Status Bit 262" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB261 ,Group Status Bit 261" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB259 ,Group Status Bit 259" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB258 ,Group Status Bit 258" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB256 ,Group Status Bit 256" "Group 0,Group 1"
else
hgroup.long 0x00A0++0x03
hide.long 0x0 "GICD_IGROUPR8 ,Interrupt Group Register 8 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xA4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x9))
group.long 0x00A4++0x03
line.long 0x0 "GICD_IGROUPR9 ,Interrupt Group Register 9 (Secure Access)"
bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB318 ,Group Status Bit 318" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB317 ,Group Status Bit 317" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB315 ,Group Status Bit 315" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB314 ,Group Status Bit 314" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB312 ,Group Status Bit 312" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB311 ,Group Status Bit 311" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB309 ,Group Status Bit 309" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB308 ,Group Status Bit 308" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB306 ,Group Status Bit 306" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB305 ,Group Status Bit 305" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB303 ,Group Status Bit 303" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB302 ,Group Status Bit 302" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB300 ,Group Status Bit 300" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB299 ,Group Status Bit 299" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB297 ,Group Status Bit 297" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB296 ,Group Status Bit 296" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB294 ,Group Status Bit 294" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB293 ,Group Status Bit 293" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB291 ,Group Status Bit 291" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB290 ,Group Status Bit 290" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB288 ,Group Status Bit 288" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x9))
group.long 0x00A4++0x03
line.long 0x0 "GICD_IGROUPR9 ,Interrupt Group Register 9 "
bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB318 ,Group Status Bit 318" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB317 ,Group Status Bit 317" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB315 ,Group Status Bit 315" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB314 ,Group Status Bit 314" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB312 ,Group Status Bit 312" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB311 ,Group Status Bit 311" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB309 ,Group Status Bit 309" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB308 ,Group Status Bit 308" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB306 ,Group Status Bit 306" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB305 ,Group Status Bit 305" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB303 ,Group Status Bit 303" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB302 ,Group Status Bit 302" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB300 ,Group Status Bit 300" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB299 ,Group Status Bit 299" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB297 ,Group Status Bit 297" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB296 ,Group Status Bit 296" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB294 ,Group Status Bit 294" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB293 ,Group Status Bit 293" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB291 ,Group Status Bit 291" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB290 ,Group Status Bit 290" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB288 ,Group Status Bit 288" "Group 0,Group 1"
else
hgroup.long 0x00A4++0x03
hide.long 0x0 "GICD_IGROUPR9 ,Interrupt Group Register 9 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xA8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xA))
group.long 0x00A8++0x03
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Secure Access)"
bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB350 ,Group Status Bit 350" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB349 ,Group Status Bit 349" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB347 ,Group Status Bit 347" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB346 ,Group Status Bit 346" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB344 ,Group Status Bit 344" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB343 ,Group Status Bit 343" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB341 ,Group Status Bit 341" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB340 ,Group Status Bit 340" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB338 ,Group Status Bit 338" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB337 ,Group Status Bit 337" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB335 ,Group Status Bit 335" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB334 ,Group Status Bit 334" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB332 ,Group Status Bit 332" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB331 ,Group Status Bit 331" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB329 ,Group Status Bit 329" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB328 ,Group Status Bit 328" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB326 ,Group Status Bit 326" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB325 ,Group Status Bit 325" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB323 ,Group Status Bit 323" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB322 ,Group Status Bit 322" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB320 ,Group Status Bit 320" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xA))
group.long 0x00A8++0x03
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10"
bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB350 ,Group Status Bit 350" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB349 ,Group Status Bit 349" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB347 ,Group Status Bit 347" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB346 ,Group Status Bit 346" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB344 ,Group Status Bit 344" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB343 ,Group Status Bit 343" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB341 ,Group Status Bit 341" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB340 ,Group Status Bit 340" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB338 ,Group Status Bit 338" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB337 ,Group Status Bit 337" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB335 ,Group Status Bit 335" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB334 ,Group Status Bit 334" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB332 ,Group Status Bit 332" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB331 ,Group Status Bit 331" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB329 ,Group Status Bit 329" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB328 ,Group Status Bit 328" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB326 ,Group Status Bit 326" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB325 ,Group Status Bit 325" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB323 ,Group Status Bit 323" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB322 ,Group Status Bit 322" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB320 ,Group Status Bit 320" "Group 0,Group 1"
else
hgroup.long 0x00A8++0x03
hide.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xAC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xB))
group.long 0x00AC++0x03
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Secure Access)"
bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB382 ,Group Status Bit 382" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB381 ,Group Status Bit 381" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB379 ,Group Status Bit 379" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB378 ,Group Status Bit 378" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB376 ,Group Status Bit 376" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB375 ,Group Status Bit 375" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB373 ,Group Status Bit 373" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB372 ,Group Status Bit 372" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB370 ,Group Status Bit 370" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB369 ,Group Status Bit 369" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB367 ,Group Status Bit 367" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB366 ,Group Status Bit 366" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB364 ,Group Status Bit 364" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB363 ,Group Status Bit 363" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB361 ,Group Status Bit 361" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB360 ,Group Status Bit 360" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB358 ,Group Status Bit 358" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB357 ,Group Status Bit 357" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB355 ,Group Status Bit 355" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB354 ,Group Status Bit 354" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB352 ,Group Status Bit 352" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xB))
group.long 0x00AC++0x03
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11"
bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB382 ,Group Status Bit 382" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB381 ,Group Status Bit 381" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB379 ,Group Status Bit 379" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB378 ,Group Status Bit 378" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB376 ,Group Status Bit 376" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB375 ,Group Status Bit 375" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB373 ,Group Status Bit 373" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB372 ,Group Status Bit 372" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB370 ,Group Status Bit 370" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB369 ,Group Status Bit 369" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB367 ,Group Status Bit 367" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB366 ,Group Status Bit 366" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB364 ,Group Status Bit 364" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB363 ,Group Status Bit 363" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB361 ,Group Status Bit 361" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB360 ,Group Status Bit 360" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB358 ,Group Status Bit 358" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB357 ,Group Status Bit 357" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB355 ,Group Status Bit 355" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB354 ,Group Status Bit 354" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB352 ,Group Status Bit 352" "Group 0,Group 1"
else
hgroup.long 0x00AC++0x03
hide.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xB0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xC))
group.long 0x00B0++0x03
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Secure Access)"
bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB414 ,Group Status Bit 414" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB413 ,Group Status Bit 413" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB411 ,Group Status Bit 411" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB410 ,Group Status Bit 410" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB408 ,Group Status Bit 408" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB407 ,Group Status Bit 407" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB405 ,Group Status Bit 405" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB404 ,Group Status Bit 404" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB402 ,Group Status Bit 402" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB401 ,Group Status Bit 401" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB399 ,Group Status Bit 399" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB398 ,Group Status Bit 398" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB396 ,Group Status Bit 396" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB395 ,Group Status Bit 395" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB393 ,Group Status Bit 393" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB392 ,Group Status Bit 392" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB390 ,Group Status Bit 390" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB389 ,Group Status Bit 389" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB387 ,Group Status Bit 387" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB386 ,Group Status Bit 386" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB384 ,Group Status Bit 384" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xC))
group.long 0x00B0++0x03
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12"
bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB414 ,Group Status Bit 414" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB413 ,Group Status Bit 413" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB411 ,Group Status Bit 411" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB410 ,Group Status Bit 410" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB408 ,Group Status Bit 408" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB407 ,Group Status Bit 407" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB405 ,Group Status Bit 405" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB404 ,Group Status Bit 404" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB402 ,Group Status Bit 402" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB401 ,Group Status Bit 401" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB399 ,Group Status Bit 399" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB398 ,Group Status Bit 398" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB396 ,Group Status Bit 396" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB395 ,Group Status Bit 395" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB393 ,Group Status Bit 393" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB392 ,Group Status Bit 392" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB390 ,Group Status Bit 390" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB389 ,Group Status Bit 389" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB387 ,Group Status Bit 387" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB386 ,Group Status Bit 386" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB384 ,Group Status Bit 384" "Group 0,Group 1"
else
hgroup.long 0x00B0++0x03
hide.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xB4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xD))
group.long 0x00B4++0x03
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Secure Access)"
bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB446 ,Group Status Bit 446" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB445 ,Group Status Bit 445" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB443 ,Group Status Bit 443" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB442 ,Group Status Bit 442" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB440 ,Group Status Bit 440" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB439 ,Group Status Bit 439" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB437 ,Group Status Bit 437" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB436 ,Group Status Bit 436" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB434 ,Group Status Bit 434" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB433 ,Group Status Bit 433" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB431 ,Group Status Bit 431" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB430 ,Group Status Bit 430" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB428 ,Group Status Bit 428" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB427 ,Group Status Bit 427" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB425 ,Group Status Bit 425" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB424 ,Group Status Bit 424" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB422 ,Group Status Bit 422" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB421 ,Group Status Bit 421" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB419 ,Group Status Bit 419" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB418 ,Group Status Bit 418" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB416 ,Group Status Bit 416" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xD))
group.long 0x00B4++0x03
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13"
bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB446 ,Group Status Bit 446" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB445 ,Group Status Bit 445" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB443 ,Group Status Bit 443" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB442 ,Group Status Bit 442" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB440 ,Group Status Bit 440" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB439 ,Group Status Bit 439" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB437 ,Group Status Bit 437" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB436 ,Group Status Bit 436" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB434 ,Group Status Bit 434" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB433 ,Group Status Bit 433" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB431 ,Group Status Bit 431" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB430 ,Group Status Bit 430" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB428 ,Group Status Bit 428" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB427 ,Group Status Bit 427" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB425 ,Group Status Bit 425" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB424 ,Group Status Bit 424" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB422 ,Group Status Bit 422" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB421 ,Group Status Bit 421" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB419 ,Group Status Bit 419" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB418 ,Group Status Bit 418" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB416 ,Group Status Bit 416" "Group 0,Group 1"
else
hgroup.long 0x00B4++0x03
hide.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xB8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xE))
group.long 0x00B8++0x03
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Secure Access)"
bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB478 ,Group Status Bit 478" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB477 ,Group Status Bit 477" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB475 ,Group Status Bit 475" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB474 ,Group Status Bit 474" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB472 ,Group Status Bit 472" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB471 ,Group Status Bit 471" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB469 ,Group Status Bit 469" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB468 ,Group Status Bit 468" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB466 ,Group Status Bit 466" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB465 ,Group Status Bit 465" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB463 ,Group Status Bit 463" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB462 ,Group Status Bit 462" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB460 ,Group Status Bit 460" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB459 ,Group Status Bit 459" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB457 ,Group Status Bit 457" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB456 ,Group Status Bit 456" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB454 ,Group Status Bit 454" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB453 ,Group Status Bit 453" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB451 ,Group Status Bit 451" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB450 ,Group Status Bit 450" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB448 ,Group Status Bit 448" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xE))
group.long 0x00B8++0x03
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14"
bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB478 ,Group Status Bit 478" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB477 ,Group Status Bit 477" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB475 ,Group Status Bit 475" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB474 ,Group Status Bit 474" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB472 ,Group Status Bit 472" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB471 ,Group Status Bit 471" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB469 ,Group Status Bit 469" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB468 ,Group Status Bit 468" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB466 ,Group Status Bit 466" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB465 ,Group Status Bit 465" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB463 ,Group Status Bit 463" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB462 ,Group Status Bit 462" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB460 ,Group Status Bit 460" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB459 ,Group Status Bit 459" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB457 ,Group Status Bit 457" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB456 ,Group Status Bit 456" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB454 ,Group Status Bit 454" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB453 ,Group Status Bit 453" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB451 ,Group Status Bit 451" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB450 ,Group Status Bit 450" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB448 ,Group Status Bit 448" "Group 0,Group 1"
else
hgroup.long 0x00B8++0x03
hide.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xBC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xF))
group.long 0x00BC++0x03
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Secure Access)"
bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB510 ,Group Status Bit 510" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB509 ,Group Status Bit 509" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB507 ,Group Status Bit 507" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB506 ,Group Status Bit 506" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB504 ,Group Status Bit 504" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB503 ,Group Status Bit 503" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB501 ,Group Status Bit 501" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB500 ,Group Status Bit 500" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB498 ,Group Status Bit 498" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB497 ,Group Status Bit 497" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB495 ,Group Status Bit 495" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB494 ,Group Status Bit 494" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB492 ,Group Status Bit 492" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB491 ,Group Status Bit 491" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB489 ,Group Status Bit 489" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB488 ,Group Status Bit 488" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB486 ,Group Status Bit 486" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB485 ,Group Status Bit 485" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB483 ,Group Status Bit 483" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB482 ,Group Status Bit 482" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB480 ,Group Status Bit 480" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xF))
group.long 0x00BC++0x03
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15"
bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB510 ,Group Status Bit 510" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB509 ,Group Status Bit 509" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB507 ,Group Status Bit 507" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB506 ,Group Status Bit 506" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB504 ,Group Status Bit 504" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB503 ,Group Status Bit 503" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB501 ,Group Status Bit 501" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB500 ,Group Status Bit 500" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB498 ,Group Status Bit 498" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB497 ,Group Status Bit 497" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB495 ,Group Status Bit 495" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB494 ,Group Status Bit 494" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB492 ,Group Status Bit 492" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB491 ,Group Status Bit 491" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB489 ,Group Status Bit 489" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB488 ,Group Status Bit 488" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB486 ,Group Status Bit 486" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB485 ,Group Status Bit 485" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB483 ,Group Status Bit 483" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB482 ,Group Status Bit 482" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB480 ,Group Status Bit 480" "Group 0,Group 1"
else
hgroup.long 0x00BC++0x03
hide.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xC0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10))
group.long 0x00C0++0x03
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Secure Access)"
bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB542 ,Group Status Bit 542" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB541 ,Group Status Bit 541" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB539 ,Group Status Bit 539" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB538 ,Group Status Bit 538" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB536 ,Group Status Bit 536" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB535 ,Group Status Bit 535" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB533 ,Group Status Bit 533" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB532 ,Group Status Bit 532" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB530 ,Group Status Bit 530" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB529 ,Group Status Bit 529" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB527 ,Group Status Bit 527" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB526 ,Group Status Bit 526" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB524 ,Group Status Bit 524" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB523 ,Group Status Bit 523" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB521 ,Group Status Bit 521" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB520 ,Group Status Bit 520" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB518 ,Group Status Bit 518" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB517 ,Group Status Bit 517" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB515 ,Group Status Bit 515" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB514 ,Group Status Bit 514" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB512 ,Group Status Bit 512" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10))
group.long 0x00C0++0x03
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16"
bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB542 ,Group Status Bit 542" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB541 ,Group Status Bit 541" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB539 ,Group Status Bit 539" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB538 ,Group Status Bit 538" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB536 ,Group Status Bit 536" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB535 ,Group Status Bit 535" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB533 ,Group Status Bit 533" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB532 ,Group Status Bit 532" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB530 ,Group Status Bit 530" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB529 ,Group Status Bit 529" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB527 ,Group Status Bit 527" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB526 ,Group Status Bit 526" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB524 ,Group Status Bit 524" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB523 ,Group Status Bit 523" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB521 ,Group Status Bit 521" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB520 ,Group Status Bit 520" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB518 ,Group Status Bit 518" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB517 ,Group Status Bit 517" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB515 ,Group Status Bit 515" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB514 ,Group Status Bit 514" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB512 ,Group Status Bit 512" "Group 0,Group 1"
else
hgroup.long 0x00C0++0x03
hide.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xC4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11))
group.long 0x00C4++0x03
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Secure Access)"
bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB574 ,Group Status Bit 574" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB573 ,Group Status Bit 573" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB571 ,Group Status Bit 571" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB570 ,Group Status Bit 570" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB568 ,Group Status Bit 568" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB567 ,Group Status Bit 567" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB565 ,Group Status Bit 565" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB564 ,Group Status Bit 564" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB562 ,Group Status Bit 562" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB561 ,Group Status Bit 561" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB559 ,Group Status Bit 559" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB558 ,Group Status Bit 558" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB556 ,Group Status Bit 556" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB555 ,Group Status Bit 555" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB553 ,Group Status Bit 553" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB552 ,Group Status Bit 552" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB550 ,Group Status Bit 550" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB549 ,Group Status Bit 549" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB547 ,Group Status Bit 547" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB546 ,Group Status Bit 546" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB544 ,Group Status Bit 544" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11))
group.long 0x00C4++0x03
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17"
bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB574 ,Group Status Bit 574" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB573 ,Group Status Bit 573" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB571 ,Group Status Bit 571" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB570 ,Group Status Bit 570" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB568 ,Group Status Bit 568" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB567 ,Group Status Bit 567" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB565 ,Group Status Bit 565" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB564 ,Group Status Bit 564" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB562 ,Group Status Bit 562" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB561 ,Group Status Bit 561" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB559 ,Group Status Bit 559" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB558 ,Group Status Bit 558" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB556 ,Group Status Bit 556" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB555 ,Group Status Bit 555" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB553 ,Group Status Bit 553" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB552 ,Group Status Bit 552" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB550 ,Group Status Bit 550" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB549 ,Group Status Bit 549" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB547 ,Group Status Bit 547" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB546 ,Group Status Bit 546" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB544 ,Group Status Bit 544" "Group 0,Group 1"
else
hgroup.long 0x00C4++0x03
hide.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xC8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12))
group.long 0x00C8++0x03
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Secure Access)"
bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB606 ,Group Status Bit 606" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB605 ,Group Status Bit 605" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB603 ,Group Status Bit 603" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB602 ,Group Status Bit 602" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB600 ,Group Status Bit 600" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB599 ,Group Status Bit 599" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB597 ,Group Status Bit 597" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB596 ,Group Status Bit 596" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB594 ,Group Status Bit 594" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB593 ,Group Status Bit 593" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB591 ,Group Status Bit 591" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB590 ,Group Status Bit 590" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB588 ,Group Status Bit 588" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB587 ,Group Status Bit 587" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB585 ,Group Status Bit 585" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB584 ,Group Status Bit 584" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB582 ,Group Status Bit 582" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB581 ,Group Status Bit 581" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB579 ,Group Status Bit 579" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB578 ,Group Status Bit 578" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB576 ,Group Status Bit 576" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12))
group.long 0x00C8++0x03
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18"
bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB606 ,Group Status Bit 606" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB605 ,Group Status Bit 605" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB603 ,Group Status Bit 603" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB602 ,Group Status Bit 602" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB600 ,Group Status Bit 600" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB599 ,Group Status Bit 599" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB597 ,Group Status Bit 597" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB596 ,Group Status Bit 596" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB594 ,Group Status Bit 594" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB593 ,Group Status Bit 593" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB591 ,Group Status Bit 591" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB590 ,Group Status Bit 590" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB588 ,Group Status Bit 588" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB587 ,Group Status Bit 587" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB585 ,Group Status Bit 585" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB584 ,Group Status Bit 584" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB582 ,Group Status Bit 582" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB581 ,Group Status Bit 581" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB579 ,Group Status Bit 579" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB578 ,Group Status Bit 578" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB576 ,Group Status Bit 576" "Group 0,Group 1"
else
hgroup.long 0x00C8++0x03
hide.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xCC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13))
group.long 0x00CC++0x03
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Secure Access)"
bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB638 ,Group Status Bit 638" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB637 ,Group Status Bit 637" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB635 ,Group Status Bit 635" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB634 ,Group Status Bit 634" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB632 ,Group Status Bit 632" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB631 ,Group Status Bit 631" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB629 ,Group Status Bit 629" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB628 ,Group Status Bit 628" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB626 ,Group Status Bit 626" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB625 ,Group Status Bit 625" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB623 ,Group Status Bit 623" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB622 ,Group Status Bit 622" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB620 ,Group Status Bit 620" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB619 ,Group Status Bit 619" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB617 ,Group Status Bit 617" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB616 ,Group Status Bit 616" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB614 ,Group Status Bit 614" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB613 ,Group Status Bit 613" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB611 ,Group Status Bit 611" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB610 ,Group Status Bit 610" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB608 ,Group Status Bit 608" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13))
group.long 0x00CC++0x03
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19"
bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB638 ,Group Status Bit 638" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB637 ,Group Status Bit 637" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB635 ,Group Status Bit 635" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB634 ,Group Status Bit 634" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB632 ,Group Status Bit 632" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB631 ,Group Status Bit 631" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB629 ,Group Status Bit 629" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB628 ,Group Status Bit 628" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB626 ,Group Status Bit 626" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB625 ,Group Status Bit 625" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB623 ,Group Status Bit 623" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB622 ,Group Status Bit 622" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB620 ,Group Status Bit 620" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB619 ,Group Status Bit 619" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB617 ,Group Status Bit 617" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB616 ,Group Status Bit 616" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB614 ,Group Status Bit 614" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB613 ,Group Status Bit 613" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB611 ,Group Status Bit 611" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB610 ,Group Status Bit 610" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB608 ,Group Status Bit 608" "Group 0,Group 1"
else
hgroup.long 0x00CC++0x03
hide.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xD0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14))
group.long 0x00D0++0x03
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Secure Access)"
bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB670 ,Group Status Bit 670" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB669 ,Group Status Bit 669" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB667 ,Group Status Bit 667" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB666 ,Group Status Bit 666" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB664 ,Group Status Bit 664" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB663 ,Group Status Bit 663" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB661 ,Group Status Bit 661" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB660 ,Group Status Bit 660" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB658 ,Group Status Bit 658" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB657 ,Group Status Bit 657" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB655 ,Group Status Bit 655" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB654 ,Group Status Bit 654" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB652 ,Group Status Bit 652" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB651 ,Group Status Bit 651" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB649 ,Group Status Bit 649" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB648 ,Group Status Bit 648" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB646 ,Group Status Bit 646" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB645 ,Group Status Bit 645" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB643 ,Group Status Bit 643" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB642 ,Group Status Bit 642" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB640 ,Group Status Bit 640" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14))
group.long 0x00D0++0x03
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20"
bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB670 ,Group Status Bit 670" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB669 ,Group Status Bit 669" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB667 ,Group Status Bit 667" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB666 ,Group Status Bit 666" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB664 ,Group Status Bit 664" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB663 ,Group Status Bit 663" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB661 ,Group Status Bit 661" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB660 ,Group Status Bit 660" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB658 ,Group Status Bit 658" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB657 ,Group Status Bit 657" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB655 ,Group Status Bit 655" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB654 ,Group Status Bit 654" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB652 ,Group Status Bit 652" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB651 ,Group Status Bit 651" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB649 ,Group Status Bit 649" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB648 ,Group Status Bit 648" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB646 ,Group Status Bit 646" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB645 ,Group Status Bit 645" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB643 ,Group Status Bit 643" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB642 ,Group Status Bit 642" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB640 ,Group Status Bit 640" "Group 0,Group 1"
else
hgroup.long 0x00D0++0x03
hide.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xD4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15))
group.long 0x00D4++0x03
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Secure Access)"
bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB702 ,Group Status Bit 702" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB701 ,Group Status Bit 701" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB699 ,Group Status Bit 699" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB698 ,Group Status Bit 698" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB696 ,Group Status Bit 696" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB695 ,Group Status Bit 695" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB693 ,Group Status Bit 693" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB692 ,Group Status Bit 692" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB690 ,Group Status Bit 690" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB689 ,Group Status Bit 689" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB687 ,Group Status Bit 687" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB686 ,Group Status Bit 686" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB684 ,Group Status Bit 684" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB683 ,Group Status Bit 683" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB681 ,Group Status Bit 681" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB680 ,Group Status Bit 680" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB678 ,Group Status Bit 678" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB677 ,Group Status Bit 677" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB675 ,Group Status Bit 675" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB674 ,Group Status Bit 674" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB672 ,Group Status Bit 672" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15))
group.long 0x00D4++0x03
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21"
bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB702 ,Group Status Bit 702" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB701 ,Group Status Bit 701" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB699 ,Group Status Bit 699" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB698 ,Group Status Bit 698" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB696 ,Group Status Bit 696" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB695 ,Group Status Bit 695" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB693 ,Group Status Bit 693" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB692 ,Group Status Bit 692" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB690 ,Group Status Bit 690" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB689 ,Group Status Bit 689" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB687 ,Group Status Bit 687" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB686 ,Group Status Bit 686" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB684 ,Group Status Bit 684" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB683 ,Group Status Bit 683" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB681 ,Group Status Bit 681" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB680 ,Group Status Bit 680" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB678 ,Group Status Bit 678" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB677 ,Group Status Bit 677" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB675 ,Group Status Bit 675" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB674 ,Group Status Bit 674" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB672 ,Group Status Bit 672" "Group 0,Group 1"
else
hgroup.long 0x00D4++0x03
hide.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xD8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16))
group.long 0x00D8++0x03
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Secure Access)"
bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB734 ,Group Status Bit 734" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB733 ,Group Status Bit 733" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB731 ,Group Status Bit 731" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB730 ,Group Status Bit 730" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB728 ,Group Status Bit 728" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB727 ,Group Status Bit 727" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB725 ,Group Status Bit 725" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB724 ,Group Status Bit 724" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB722 ,Group Status Bit 722" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB721 ,Group Status Bit 721" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB719 ,Group Status Bit 719" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB718 ,Group Status Bit 718" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB716 ,Group Status Bit 716" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB715 ,Group Status Bit 715" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB713 ,Group Status Bit 713" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB712 ,Group Status Bit 712" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB710 ,Group Status Bit 710" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB709 ,Group Status Bit 709" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB707 ,Group Status Bit 707" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB706 ,Group Status Bit 706" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB704 ,Group Status Bit 704" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16))
group.long 0x00D8++0x03
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22"
bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB734 ,Group Status Bit 734" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB733 ,Group Status Bit 733" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB731 ,Group Status Bit 731" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB730 ,Group Status Bit 730" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB728 ,Group Status Bit 728" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB727 ,Group Status Bit 727" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB725 ,Group Status Bit 725" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB724 ,Group Status Bit 724" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB722 ,Group Status Bit 722" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB721 ,Group Status Bit 721" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB719 ,Group Status Bit 719" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB718 ,Group Status Bit 718" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB716 ,Group Status Bit 716" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB715 ,Group Status Bit 715" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB713 ,Group Status Bit 713" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB712 ,Group Status Bit 712" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB710 ,Group Status Bit 710" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB709 ,Group Status Bit 709" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB707 ,Group Status Bit 707" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB706 ,Group Status Bit 706" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB704 ,Group Status Bit 704" "Group 0,Group 1"
else
hgroup.long 0x00D8++0x03
hide.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xDC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17))
group.long 0x00DC++0x03
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Secure Access)"
bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB766 ,Group Status Bit 766" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB765 ,Group Status Bit 765" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB763 ,Group Status Bit 763" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB762 ,Group Status Bit 762" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB760 ,Group Status Bit 760" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB759 ,Group Status Bit 759" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB757 ,Group Status Bit 757" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB756 ,Group Status Bit 756" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB754 ,Group Status Bit 754" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB753 ,Group Status Bit 753" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB751 ,Group Status Bit 751" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB750 ,Group Status Bit 750" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB748 ,Group Status Bit 748" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB747 ,Group Status Bit 747" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB745 ,Group Status Bit 745" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB744 ,Group Status Bit 744" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB742 ,Group Status Bit 742" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB741 ,Group Status Bit 741" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB739 ,Group Status Bit 739" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB738 ,Group Status Bit 738" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB736 ,Group Status Bit 736" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17))
group.long 0x00DC++0x03
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23"
bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB766 ,Group Status Bit 766" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB765 ,Group Status Bit 765" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB763 ,Group Status Bit 763" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB762 ,Group Status Bit 762" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB760 ,Group Status Bit 760" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB759 ,Group Status Bit 759" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB757 ,Group Status Bit 757" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB756 ,Group Status Bit 756" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB754 ,Group Status Bit 754" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB753 ,Group Status Bit 753" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB751 ,Group Status Bit 751" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB750 ,Group Status Bit 750" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB748 ,Group Status Bit 748" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB747 ,Group Status Bit 747" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB745 ,Group Status Bit 745" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB744 ,Group Status Bit 744" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB742 ,Group Status Bit 742" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB741 ,Group Status Bit 741" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB739 ,Group Status Bit 739" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB738 ,Group Status Bit 738" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB736 ,Group Status Bit 736" "Group 0,Group 1"
else
hgroup.long 0x00DC++0x03
hide.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18))
group.long 0x00E0++0x03
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Secure Access)"
bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB798 ,Group Status Bit 798" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB797 ,Group Status Bit 797" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB795 ,Group Status Bit 795" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB794 ,Group Status Bit 794" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB792 ,Group Status Bit 792" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB791 ,Group Status Bit 791" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB789 ,Group Status Bit 789" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB788 ,Group Status Bit 788" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB786 ,Group Status Bit 786" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB785 ,Group Status Bit 785" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB783 ,Group Status Bit 783" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB782 ,Group Status Bit 782" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB780 ,Group Status Bit 780" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB779 ,Group Status Bit 779" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB777 ,Group Status Bit 777" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB776 ,Group Status Bit 776" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB774 ,Group Status Bit 774" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB773 ,Group Status Bit 773" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB771 ,Group Status Bit 771" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB770 ,Group Status Bit 770" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB768 ,Group Status Bit 768" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18))
group.long 0x00E0++0x03
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24"
bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB798 ,Group Status Bit 798" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB797 ,Group Status Bit 797" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB795 ,Group Status Bit 795" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB794 ,Group Status Bit 794" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB792 ,Group Status Bit 792" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB791 ,Group Status Bit 791" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB789 ,Group Status Bit 789" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB788 ,Group Status Bit 788" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB786 ,Group Status Bit 786" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB785 ,Group Status Bit 785" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB783 ,Group Status Bit 783" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB782 ,Group Status Bit 782" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB780 ,Group Status Bit 780" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB779 ,Group Status Bit 779" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB777 ,Group Status Bit 777" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB776 ,Group Status Bit 776" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB774 ,Group Status Bit 774" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB773 ,Group Status Bit 773" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB771 ,Group Status Bit 771" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB770 ,Group Status Bit 770" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB768 ,Group Status Bit 768" "Group 0,Group 1"
else
hgroup.long 0x00E0++0x03
hide.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19))
group.long 0x00E4++0x03
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Secure Access)"
bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB830 ,Group Status Bit 830" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB829 ,Group Status Bit 829" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB827 ,Group Status Bit 827" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB826 ,Group Status Bit 826" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB824 ,Group Status Bit 824" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB823 ,Group Status Bit 823" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB821 ,Group Status Bit 821" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB820 ,Group Status Bit 820" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB818 ,Group Status Bit 818" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB817 ,Group Status Bit 817" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB815 ,Group Status Bit 815" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB814 ,Group Status Bit 814" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB812 ,Group Status Bit 812" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB811 ,Group Status Bit 811" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB809 ,Group Status Bit 809" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB808 ,Group Status Bit 808" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB806 ,Group Status Bit 806" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB805 ,Group Status Bit 805" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB803 ,Group Status Bit 803" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB802 ,Group Status Bit 802" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB800 ,Group Status Bit 800" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19))
group.long 0x00E4++0x03
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25"
bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB830 ,Group Status Bit 830" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB829 ,Group Status Bit 829" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB827 ,Group Status Bit 827" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB826 ,Group Status Bit 826" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB824 ,Group Status Bit 824" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB823 ,Group Status Bit 823" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB821 ,Group Status Bit 821" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB820 ,Group Status Bit 820" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB818 ,Group Status Bit 818" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB817 ,Group Status Bit 817" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB815 ,Group Status Bit 815" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB814 ,Group Status Bit 814" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB812 ,Group Status Bit 812" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB811 ,Group Status Bit 811" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB809 ,Group Status Bit 809" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB808 ,Group Status Bit 808" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB806 ,Group Status Bit 806" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB805 ,Group Status Bit 805" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB803 ,Group Status Bit 803" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB802 ,Group Status Bit 802" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB800 ,Group Status Bit 800" "Group 0,Group 1"
else
hgroup.long 0x00E4++0x03
hide.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A))
group.long 0x00E8++0x03
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Secure Access)"
bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB862 ,Group Status Bit 862" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB861 ,Group Status Bit 861" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB859 ,Group Status Bit 859" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB858 ,Group Status Bit 858" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB856 ,Group Status Bit 856" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB855 ,Group Status Bit 855" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB853 ,Group Status Bit 853" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB852 ,Group Status Bit 852" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB850 ,Group Status Bit 850" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB849 ,Group Status Bit 849" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB847 ,Group Status Bit 847" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB846 ,Group Status Bit 846" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB844 ,Group Status Bit 844" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB843 ,Group Status Bit 843" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB841 ,Group Status Bit 841" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB840 ,Group Status Bit 840" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB838 ,Group Status Bit 838" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB837 ,Group Status Bit 837" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB835 ,Group Status Bit 835" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB834 ,Group Status Bit 834" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB832 ,Group Status Bit 832" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A))
group.long 0x00E8++0x03
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26"
bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB862 ,Group Status Bit 862" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB861 ,Group Status Bit 861" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB859 ,Group Status Bit 859" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB858 ,Group Status Bit 858" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB856 ,Group Status Bit 856" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB855 ,Group Status Bit 855" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB853 ,Group Status Bit 853" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB852 ,Group Status Bit 852" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB850 ,Group Status Bit 850" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB849 ,Group Status Bit 849" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB847 ,Group Status Bit 847" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB846 ,Group Status Bit 846" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB844 ,Group Status Bit 844" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB843 ,Group Status Bit 843" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB841 ,Group Status Bit 841" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB840 ,Group Status Bit 840" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB838 ,Group Status Bit 838" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB837 ,Group Status Bit 837" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB835 ,Group Status Bit 835" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB834 ,Group Status Bit 834" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB832 ,Group Status Bit 832" "Group 0,Group 1"
else
hgroup.long 0x00E8++0x03
hide.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B))
group.long 0x00EC++0x03
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Secure Access)"
bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB894 ,Group Status Bit 894" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB893 ,Group Status Bit 893" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB891 ,Group Status Bit 891" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB890 ,Group Status Bit 890" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB888 ,Group Status Bit 888" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB887 ,Group Status Bit 887" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB885 ,Group Status Bit 885" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB884 ,Group Status Bit 884" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB882 ,Group Status Bit 882" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB881 ,Group Status Bit 881" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB879 ,Group Status Bit 879" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB878 ,Group Status Bit 878" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB876 ,Group Status Bit 876" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB875 ,Group Status Bit 875" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB873 ,Group Status Bit 873" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB872 ,Group Status Bit 872" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB870 ,Group Status Bit 870" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB869 ,Group Status Bit 869" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB867 ,Group Status Bit 867" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB866 ,Group Status Bit 866" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB864 ,Group Status Bit 864" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B))
group.long 0x00EC++0x03
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27"
bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB894 ,Group Status Bit 894" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB893 ,Group Status Bit 893" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB891 ,Group Status Bit 891" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB890 ,Group Status Bit 890" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB888 ,Group Status Bit 888" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB887 ,Group Status Bit 887" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB885 ,Group Status Bit 885" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB884 ,Group Status Bit 884" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB882 ,Group Status Bit 882" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB881 ,Group Status Bit 881" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB879 ,Group Status Bit 879" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB878 ,Group Status Bit 878" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB876 ,Group Status Bit 876" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB875 ,Group Status Bit 875" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB873 ,Group Status Bit 873" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB872 ,Group Status Bit 872" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB870 ,Group Status Bit 870" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB869 ,Group Status Bit 869" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB867 ,Group Status Bit 867" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB866 ,Group Status Bit 866" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB864 ,Group Status Bit 864" "Group 0,Group 1"
else
hgroup.long 0x00EC++0x03
hide.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xF0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C))
group.long 0x00F0++0x03
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Secure Access)"
bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB926 ,Group Status Bit 926" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB925 ,Group Status Bit 925" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB923 ,Group Status Bit 923" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB922 ,Group Status Bit 922" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB920 ,Group Status Bit 920" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB919 ,Group Status Bit 919" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB917 ,Group Status Bit 917" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB916 ,Group Status Bit 916" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB914 ,Group Status Bit 914" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB913 ,Group Status Bit 913" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB911 ,Group Status Bit 911" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB910 ,Group Status Bit 910" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB908 ,Group Status Bit 908" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB907 ,Group Status Bit 907" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB905 ,Group Status Bit 905" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB904 ,Group Status Bit 904" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB902 ,Group Status Bit 902" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB901 ,Group Status Bit 901" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB899 ,Group Status Bit 899" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB898 ,Group Status Bit 898" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB896 ,Group Status Bit 896" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C))
group.long 0x00F0++0x03
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28"
bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB926 ,Group Status Bit 926" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB925 ,Group Status Bit 925" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB923 ,Group Status Bit 923" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB922 ,Group Status Bit 922" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB920 ,Group Status Bit 920" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB919 ,Group Status Bit 919" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB917 ,Group Status Bit 917" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB916 ,Group Status Bit 916" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB914 ,Group Status Bit 914" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB913 ,Group Status Bit 913" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB911 ,Group Status Bit 911" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB910 ,Group Status Bit 910" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB908 ,Group Status Bit 908" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB907 ,Group Status Bit 907" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB905 ,Group Status Bit 905" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB904 ,Group Status Bit 904" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB902 ,Group Status Bit 902" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB901 ,Group Status Bit 901" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB899 ,Group Status Bit 899" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB898 ,Group Status Bit 898" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB896 ,Group Status Bit 896" "Group 0,Group 1"
else
hgroup.long 0x00F0++0x03
hide.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xF4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D))
group.long 0x00F4++0x03
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Secure Access)"
bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB958 ,Group Status Bit 958" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB957 ,Group Status Bit 957" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB955 ,Group Status Bit 955" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB954 ,Group Status Bit 954" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB952 ,Group Status Bit 952" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB951 ,Group Status Bit 951" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB949 ,Group Status Bit 949" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB948 ,Group Status Bit 948" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB946 ,Group Status Bit 946" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB945 ,Group Status Bit 945" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB943 ,Group Status Bit 943" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB942 ,Group Status Bit 942" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB940 ,Group Status Bit 940" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB939 ,Group Status Bit 939" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB937 ,Group Status Bit 937" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB936 ,Group Status Bit 936" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB934 ,Group Status Bit 934" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB933 ,Group Status Bit 933" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB931 ,Group Status Bit 931" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB930 ,Group Status Bit 930" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB928 ,Group Status Bit 928" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D))
group.long 0x00F4++0x03
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29"
bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB958 ,Group Status Bit 958" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB957 ,Group Status Bit 957" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB955 ,Group Status Bit 955" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB954 ,Group Status Bit 954" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB952 ,Group Status Bit 952" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB951 ,Group Status Bit 951" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB949 ,Group Status Bit 949" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB948 ,Group Status Bit 948" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB946 ,Group Status Bit 946" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB945 ,Group Status Bit 945" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB943 ,Group Status Bit 943" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB942 ,Group Status Bit 942" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB940 ,Group Status Bit 940" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB939 ,Group Status Bit 939" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB937 ,Group Status Bit 937" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB936 ,Group Status Bit 936" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB934 ,Group Status Bit 934" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB933 ,Group Status Bit 933" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB931 ,Group Status Bit 931" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB930 ,Group Status Bit 930" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB928 ,Group Status Bit 928" "Group 0,Group 1"
else
hgroup.long 0x00F4++0x03
hide.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xF8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E))
group.long 0x00F8++0x03
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Secure Access)"
bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB990 ,Group Status Bit 990" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB989 ,Group Status Bit 989" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB987 ,Group Status Bit 987" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB986 ,Group Status Bit 986" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB984 ,Group Status Bit 984" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB983 ,Group Status Bit 983" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB981 ,Group Status Bit 981" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB980 ,Group Status Bit 980" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB978 ,Group Status Bit 978" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB977 ,Group Status Bit 977" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB975 ,Group Status Bit 975" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB974 ,Group Status Bit 974" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB972 ,Group Status Bit 972" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB971 ,Group Status Bit 971" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB969 ,Group Status Bit 969" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB968 ,Group Status Bit 968" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB966 ,Group Status Bit 966" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB965 ,Group Status Bit 965" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB963 ,Group Status Bit 963" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB962 ,Group Status Bit 962" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB960 ,Group Status Bit 960" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E))
group.long 0x00F8++0x03
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30"
bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB990 ,Group Status Bit 990" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB989 ,Group Status Bit 989" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB987 ,Group Status Bit 987" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB986 ,Group Status Bit 986" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB984 ,Group Status Bit 984" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB983 ,Group Status Bit 983" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB981 ,Group Status Bit 981" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB980 ,Group Status Bit 980" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB978 ,Group Status Bit 978" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB977 ,Group Status Bit 977" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB975 ,Group Status Bit 975" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB974 ,Group Status Bit 974" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB972 ,Group Status Bit 972" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB971 ,Group Status Bit 971" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB969 ,Group Status Bit 969" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB968 ,Group Status Bit 968" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB966 ,Group Status Bit 966" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB965 ,Group Status Bit 965" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB963 ,Group Status Bit 963" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB962 ,Group Status Bit 962" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB960 ,Group Status Bit 960" "Group 0,Group 1"
else
hgroup.long 0x00F8++0x03
hide.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30"
endif
tree.end
width 24.
tree "Set/Clear Enable Registers"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x0100++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
else
group.long 0x0100++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB31   ,Set/Clear Enable Bit 31" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB30   ,Set/Clear Enable Bit 30" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB29   ,Set/Clear Enable Bit 29" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB28   ,Set/Clear Enable Bit 28" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB27   ,Set/Clear Enable Bit 27" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB26   ,Set/Clear Enable Bit 26" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB25   ,Set/Clear Enable Bit 25" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB24   ,Set/Clear Enable Bit 24" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB23   ,Set/Clear Enable Bit 23" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB22   ,Set/Clear Enable Bit 22" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB21   ,Set/Clear Enable Bit 21" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB20   ,Set/Clear Enable Bit 20" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB19   ,Set/Clear Enable Bit 19" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB18   ,Set/Clear Enable Bit 18" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB17   ,Set/Clear Enable Bit 17" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB16   ,Set/Clear Enable Bit 16" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB15   ,Set/Clear Enable Bit 15" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB14   ,Set/Clear Enable Bit 14" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB13   ,Set/Clear Enable Bit 13" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB12   ,Set/Clear Enable Bit 12" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB11   ,Set/Clear Enable Bit 11" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB10   ,Set/Clear Enable Bit 10" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB9    ,Set/Clear Enable Bit 9" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB8    ,Set/Clear Enable Bit 8" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB7    ,Set/Clear Enable Bit 7" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB6    ,Set/Clear Enable Bit 6" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB5    ,Set/Clear Enable Bit 5" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB4    ,Set/Clear Enable Bit 4" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB3    ,Set/Clear Enable Bit 3" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB2    ,Set/Clear Enable Bit 2" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB1    ,Set/Clear Enable Bit 1" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB0    ,Set/Clear Enable Bit 0" "Disabled,Enabled"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x0104++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB63   ,Set/Clear Enable Bit 63" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB62   ,Set/Clear Enable Bit 62" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB61   ,Set/Clear Enable Bit 61" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB60   ,Set/Clear Enable Bit 60" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB59   ,Set/Clear Enable Bit 59" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB58   ,Set/Clear Enable Bit 58" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB57   ,Set/Clear Enable Bit 57" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB56   ,Set/Clear Enable Bit 56" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB55   ,Set/Clear Enable Bit 55" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB54   ,Set/Clear Enable Bit 54" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB53   ,Set/Clear Enable Bit 53" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB52   ,Set/Clear Enable Bit 52" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB51   ,Set/Clear Enable Bit 51" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB50   ,Set/Clear Enable Bit 50" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB49   ,Set/Clear Enable Bit 49" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB48   ,Set/Clear Enable Bit 48" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB47   ,Set/Clear Enable Bit 47" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB46   ,Set/Clear Enable Bit 46" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB45   ,Set/Clear Enable Bit 45" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB44   ,Set/Clear Enable Bit 44" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB43   ,Set/Clear Enable Bit 43" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB42   ,Set/Clear Enable Bit 42" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB41   ,Set/Clear Enable Bit 41" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB40   ,Set/Clear Enable Bit 40" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB39   ,Set/Clear Enable Bit 39" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB38   ,Set/Clear Enable Bit 38" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB37   ,Set/Clear Enable Bit 37" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB36   ,Set/Clear Enable Bit 36" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB35   ,Set/Clear Enable Bit 35" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB34   ,Set/Clear Enable Bit 34" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB33   ,Set/Clear Enable Bit 33" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB32   ,Set/Clear Enable Bit 32" "Disabled,Enabled"
else
hgroup.long 0x0104++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x0108++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB95   ,Set/Clear Enable Bit 95" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB94   ,Set/Clear Enable Bit 94" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB93   ,Set/Clear Enable Bit 93" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB92   ,Set/Clear Enable Bit 92" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB91   ,Set/Clear Enable Bit 91" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB90   ,Set/Clear Enable Bit 90" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB89   ,Set/Clear Enable Bit 89" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB88   ,Set/Clear Enable Bit 88" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB87   ,Set/Clear Enable Bit 87" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB86   ,Set/Clear Enable Bit 86" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB85   ,Set/Clear Enable Bit 85" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB84   ,Set/Clear Enable Bit 84" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB83   ,Set/Clear Enable Bit 83" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB82   ,Set/Clear Enable Bit 82" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB81   ,Set/Clear Enable Bit 81" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB80   ,Set/Clear Enable Bit 80" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB79   ,Set/Clear Enable Bit 79" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB78   ,Set/Clear Enable Bit 78" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB77   ,Set/Clear Enable Bit 77" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB76   ,Set/Clear Enable Bit 76" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB75   ,Set/Clear Enable Bit 75" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB74   ,Set/Clear Enable Bit 74" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB73   ,Set/Clear Enable Bit 73" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB72   ,Set/Clear Enable Bit 72" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB71   ,Set/Clear Enable Bit 71" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB70   ,Set/Clear Enable Bit 70" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB69   ,Set/Clear Enable Bit 69" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB68   ,Set/Clear Enable Bit 68" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB67   ,Set/Clear Enable Bit 67" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB66   ,Set/Clear Enable Bit 66" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB65   ,Set/Clear Enable Bit 65" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB64   ,Set/Clear Enable Bit 64" "Disabled,Enabled"
else
hgroup.long 0x0108++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x010C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB127  ,Set/Clear Enable Bit 127" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB126  ,Set/Clear Enable Bit 126" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB125  ,Set/Clear Enable Bit 125" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB124  ,Set/Clear Enable Bit 124" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB123  ,Set/Clear Enable Bit 123" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB122  ,Set/Clear Enable Bit 122" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB121  ,Set/Clear Enable Bit 121" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB120  ,Set/Clear Enable Bit 120" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB119  ,Set/Clear Enable Bit 119" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB118  ,Set/Clear Enable Bit 118" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB117  ,Set/Clear Enable Bit 117" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB116  ,Set/Clear Enable Bit 116" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB115  ,Set/Clear Enable Bit 115" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB114  ,Set/Clear Enable Bit 114" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB113  ,Set/Clear Enable Bit 113" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB112  ,Set/Clear Enable Bit 112" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB111  ,Set/Clear Enable Bit 111" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB110  ,Set/Clear Enable Bit 110" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB109  ,Set/Clear Enable Bit 109" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB108  ,Set/Clear Enable Bit 108" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB107  ,Set/Clear Enable Bit 107" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB106  ,Set/Clear Enable Bit 106" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB105  ,Set/Clear Enable Bit 105" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB104  ,Set/Clear Enable Bit 104" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB103  ,Set/Clear Enable Bit 103" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB102  ,Set/Clear Enable Bit 102" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB101  ,Set/Clear Enable Bit 101" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB100  ,Set/Clear Enable Bit 100" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB99   ,Set/Clear Enable Bit 99" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB98   ,Set/Clear Enable Bit 98" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB97   ,Set/Clear Enable Bit 97" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB96   ,Set/Clear Enable Bit 96" "Disabled,Enabled"
else
hgroup.long 0x010C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x0110++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB159  ,Set/Clear Enable Bit 159" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB158  ,Set/Clear Enable Bit 158" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB157  ,Set/Clear Enable Bit 157" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB156  ,Set/Clear Enable Bit 156" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB155  ,Set/Clear Enable Bit 155" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB154  ,Set/Clear Enable Bit 154" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB153  ,Set/Clear Enable Bit 153" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB152  ,Set/Clear Enable Bit 152" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB151  ,Set/Clear Enable Bit 151" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB150  ,Set/Clear Enable Bit 150" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB149  ,Set/Clear Enable Bit 149" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB148  ,Set/Clear Enable Bit 148" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB147  ,Set/Clear Enable Bit 147" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB146  ,Set/Clear Enable Bit 146" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB145  ,Set/Clear Enable Bit 145" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB144  ,Set/Clear Enable Bit 144" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB143  ,Set/Clear Enable Bit 143" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB142  ,Set/Clear Enable Bit 142" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB141  ,Set/Clear Enable Bit 141" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB140  ,Set/Clear Enable Bit 140" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB139  ,Set/Clear Enable Bit 139" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB138  ,Set/Clear Enable Bit 138" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB137  ,Set/Clear Enable Bit 137" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB136  ,Set/Clear Enable Bit 136" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB135  ,Set/Clear Enable Bit 135" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB134  ,Set/Clear Enable Bit 134" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB133  ,Set/Clear Enable Bit 133" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB132  ,Set/Clear Enable Bit 132" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB131  ,Set/Clear Enable Bit 131" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB130  ,Set/Clear Enable Bit 130" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB129  ,Set/Clear Enable Bit 129" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB128  ,Set/Clear Enable Bit 128" "Disabled,Enabled"
else
hgroup.long 0x0110++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x0114++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB191  ,Set/Clear Enable Bit 191" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB190  ,Set/Clear Enable Bit 190" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB189  ,Set/Clear Enable Bit 189" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB188  ,Set/Clear Enable Bit 188" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB187  ,Set/Clear Enable Bit 187" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB186  ,Set/Clear Enable Bit 186" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB185  ,Set/Clear Enable Bit 185" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB184  ,Set/Clear Enable Bit 184" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB183  ,Set/Clear Enable Bit 183" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB182  ,Set/Clear Enable Bit 182" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB181  ,Set/Clear Enable Bit 181" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB180  ,Set/Clear Enable Bit 180" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB179  ,Set/Clear Enable Bit 179" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB178  ,Set/Clear Enable Bit 178" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB177  ,Set/Clear Enable Bit 177" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB176  ,Set/Clear Enable Bit 176" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB175  ,Set/Clear Enable Bit 175" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB174  ,Set/Clear Enable Bit 174" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB173  ,Set/Clear Enable Bit 173" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB172  ,Set/Clear Enable Bit 172" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB171  ,Set/Clear Enable Bit 171" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB170  ,Set/Clear Enable Bit 170" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB169  ,Set/Clear Enable Bit 169" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB168  ,Set/Clear Enable Bit 168" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB167  ,Set/Clear Enable Bit 167" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB166  ,Set/Clear Enable Bit 166" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB165  ,Set/Clear Enable Bit 165" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB164  ,Set/Clear Enable Bit 164" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB163  ,Set/Clear Enable Bit 163" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB162  ,Set/Clear Enable Bit 162" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB161  ,Set/Clear Enable Bit 161" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB160  ,Set/Clear Enable Bit 160" "Disabled,Enabled"
else
hgroup.long 0x0114++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x0118++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB223  ,Set/Clear Enable Bit 223" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB222  ,Set/Clear Enable Bit 222" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB221  ,Set/Clear Enable Bit 221" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB220  ,Set/Clear Enable Bit 220" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB219  ,Set/Clear Enable Bit 219" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB218  ,Set/Clear Enable Bit 218" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB217  ,Set/Clear Enable Bit 217" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB216  ,Set/Clear Enable Bit 216" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB215  ,Set/Clear Enable Bit 215" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB214  ,Set/Clear Enable Bit 214" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB213  ,Set/Clear Enable Bit 213" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB212  ,Set/Clear Enable Bit 212" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB211  ,Set/Clear Enable Bit 211" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB210  ,Set/Clear Enable Bit 210" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB209  ,Set/Clear Enable Bit 209" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB208  ,Set/Clear Enable Bit 208" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB207  ,Set/Clear Enable Bit 207" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB206  ,Set/Clear Enable Bit 206" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB205  ,Set/Clear Enable Bit 205" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB204  ,Set/Clear Enable Bit 204" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB203  ,Set/Clear Enable Bit 203" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB202  ,Set/Clear Enable Bit 202" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB201  ,Set/Clear Enable Bit 201" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB200  ,Set/Clear Enable Bit 200" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB199  ,Set/Clear Enable Bit 199" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB198  ,Set/Clear Enable Bit 198" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB197  ,Set/Clear Enable Bit 197" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB196  ,Set/Clear Enable Bit 196" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB195  ,Set/Clear Enable Bit 195" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB194  ,Set/Clear Enable Bit 194" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB193  ,Set/Clear Enable Bit 193" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB192  ,Set/Clear Enable Bit 192" "Disabled,Enabled"
else
hgroup.long 0x0118++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x011C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB255  ,Set/Clear Enable Bit 255" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB254  ,Set/Clear Enable Bit 254" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB253  ,Set/Clear Enable Bit 253" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB252  ,Set/Clear Enable Bit 252" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB251  ,Set/Clear Enable Bit 251" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB250  ,Set/Clear Enable Bit 250" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB249  ,Set/Clear Enable Bit 249" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB248  ,Set/Clear Enable Bit 248" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB247  ,Set/Clear Enable Bit 247" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB246  ,Set/Clear Enable Bit 246" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB245  ,Set/Clear Enable Bit 245" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB244  ,Set/Clear Enable Bit 244" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB243  ,Set/Clear Enable Bit 243" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB242  ,Set/Clear Enable Bit 242" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB241  ,Set/Clear Enable Bit 241" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB240  ,Set/Clear Enable Bit 240" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB239  ,Set/Clear Enable Bit 239" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB238  ,Set/Clear Enable Bit 238" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB237  ,Set/Clear Enable Bit 237" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB236  ,Set/Clear Enable Bit 236" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB235  ,Set/Clear Enable Bit 235" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB234  ,Set/Clear Enable Bit 234" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB233  ,Set/Clear Enable Bit 233" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB232  ,Set/Clear Enable Bit 232" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB231  ,Set/Clear Enable Bit 231" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB230  ,Set/Clear Enable Bit 230" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB229  ,Set/Clear Enable Bit 229" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB228  ,Set/Clear Enable Bit 228" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB227  ,Set/Clear Enable Bit 227" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB226  ,Set/Clear Enable Bit 226" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB225  ,Set/Clear Enable Bit 225" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB224  ,Set/Clear Enable Bit 224" "Disabled,Enabled"
else
hgroup.long 0x011C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x0120++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB287  ,Set/Clear Enable Bit 287" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB286  ,Set/Clear Enable Bit 286" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB285  ,Set/Clear Enable Bit 285" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB284  ,Set/Clear Enable Bit 284" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB283  ,Set/Clear Enable Bit 283" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB282  ,Set/Clear Enable Bit 282" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB281  ,Set/Clear Enable Bit 281" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB280  ,Set/Clear Enable Bit 280" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB279  ,Set/Clear Enable Bit 279" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB278  ,Set/Clear Enable Bit 278" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB277  ,Set/Clear Enable Bit 277" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB276  ,Set/Clear Enable Bit 276" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB275  ,Set/Clear Enable Bit 275" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB274  ,Set/Clear Enable Bit 274" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB273  ,Set/Clear Enable Bit 273" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB272  ,Set/Clear Enable Bit 272" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB271  ,Set/Clear Enable Bit 271" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB270  ,Set/Clear Enable Bit 270" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB269  ,Set/Clear Enable Bit 269" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB268  ,Set/Clear Enable Bit 268" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB267  ,Set/Clear Enable Bit 267" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB266  ,Set/Clear Enable Bit 266" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB265  ,Set/Clear Enable Bit 265" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB264  ,Set/Clear Enable Bit 264" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB263  ,Set/Clear Enable Bit 263" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB262  ,Set/Clear Enable Bit 262" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB261  ,Set/Clear Enable Bit 261" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB260  ,Set/Clear Enable Bit 260" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB259  ,Set/Clear Enable Bit 259" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB258  ,Set/Clear Enable Bit 258" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB257  ,Set/Clear Enable Bit 257" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB256  ,Set/Clear Enable Bit 256" "Disabled,Enabled"
else
hgroup.long 0x0120++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x0124++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB319  ,Set/Clear Enable Bit 319" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB318  ,Set/Clear Enable Bit 318" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB317  ,Set/Clear Enable Bit 317" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB316  ,Set/Clear Enable Bit 316" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB315  ,Set/Clear Enable Bit 315" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB314  ,Set/Clear Enable Bit 314" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB313  ,Set/Clear Enable Bit 313" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB312  ,Set/Clear Enable Bit 312" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB311  ,Set/Clear Enable Bit 311" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB310  ,Set/Clear Enable Bit 310" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB309  ,Set/Clear Enable Bit 309" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB308  ,Set/Clear Enable Bit 308" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB307  ,Set/Clear Enable Bit 307" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB306  ,Set/Clear Enable Bit 306" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB305  ,Set/Clear Enable Bit 305" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB304  ,Set/Clear Enable Bit 304" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB303  ,Set/Clear Enable Bit 303" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB302  ,Set/Clear Enable Bit 302" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB301  ,Set/Clear Enable Bit 301" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB300  ,Set/Clear Enable Bit 300" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB299  ,Set/Clear Enable Bit 299" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB298  ,Set/Clear Enable Bit 298" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB297  ,Set/Clear Enable Bit 297" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB296  ,Set/Clear Enable Bit 296" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB295  ,Set/Clear Enable Bit 295" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB294  ,Set/Clear Enable Bit 294" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB293  ,Set/Clear Enable Bit 293" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB292  ,Set/Clear Enable Bit 292" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB291  ,Set/Clear Enable Bit 291" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB290  ,Set/Clear Enable Bit 290" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB289  ,Set/Clear Enable Bit 289" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB288  ,Set/Clear Enable Bit 288" "Disabled,Enabled"
else
hgroup.long 0x0124++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x0128++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB351  ,Set/Clear Enable Bit 351" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB350  ,Set/Clear Enable Bit 350" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB349  ,Set/Clear Enable Bit 349" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB348  ,Set/Clear Enable Bit 348" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB347  ,Set/Clear Enable Bit 347" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB346  ,Set/Clear Enable Bit 346" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB345  ,Set/Clear Enable Bit 345" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB344  ,Set/Clear Enable Bit 344" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB343  ,Set/Clear Enable Bit 343" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB342  ,Set/Clear Enable Bit 342" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB341  ,Set/Clear Enable Bit 341" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB340  ,Set/Clear Enable Bit 340" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB339  ,Set/Clear Enable Bit 339" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB338  ,Set/Clear Enable Bit 338" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB337  ,Set/Clear Enable Bit 337" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB336  ,Set/Clear Enable Bit 336" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB335  ,Set/Clear Enable Bit 335" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB334  ,Set/Clear Enable Bit 334" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB333  ,Set/Clear Enable Bit 333" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB332  ,Set/Clear Enable Bit 332" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB331  ,Set/Clear Enable Bit 331" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB330  ,Set/Clear Enable Bit 330" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB329  ,Set/Clear Enable Bit 329" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB328  ,Set/Clear Enable Bit 328" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB327  ,Set/Clear Enable Bit 327" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB326  ,Set/Clear Enable Bit 326" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB325  ,Set/Clear Enable Bit 325" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB324  ,Set/Clear Enable Bit 324" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB323  ,Set/Clear Enable Bit 323" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB322  ,Set/Clear Enable Bit 322" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB321  ,Set/Clear Enable Bit 321" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB320  ,Set/Clear Enable Bit 320" "Disabled,Enabled"
else
hgroup.long 0x0128++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x012C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB383  ,Set/Clear Enable Bit 383" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB382  ,Set/Clear Enable Bit 382" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB381  ,Set/Clear Enable Bit 381" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB380  ,Set/Clear Enable Bit 380" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB379  ,Set/Clear Enable Bit 379" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB378  ,Set/Clear Enable Bit 378" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB377  ,Set/Clear Enable Bit 377" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB376  ,Set/Clear Enable Bit 376" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB375  ,Set/Clear Enable Bit 375" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB374  ,Set/Clear Enable Bit 374" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB373  ,Set/Clear Enable Bit 373" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB372  ,Set/Clear Enable Bit 372" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB371  ,Set/Clear Enable Bit 371" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB370  ,Set/Clear Enable Bit 370" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB369  ,Set/Clear Enable Bit 369" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB368  ,Set/Clear Enable Bit 368" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB367  ,Set/Clear Enable Bit 367" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB366  ,Set/Clear Enable Bit 366" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB365  ,Set/Clear Enable Bit 365" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB364  ,Set/Clear Enable Bit 364" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB363  ,Set/Clear Enable Bit 363" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB362  ,Set/Clear Enable Bit 362" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB361  ,Set/Clear Enable Bit 361" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB360  ,Set/Clear Enable Bit 360" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB359  ,Set/Clear Enable Bit 359" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB358  ,Set/Clear Enable Bit 358" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB357  ,Set/Clear Enable Bit 357" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB356  ,Set/Clear Enable Bit 356" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB355  ,Set/Clear Enable Bit 355" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB354  ,Set/Clear Enable Bit 354" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB353  ,Set/Clear Enable Bit 353" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB352  ,Set/Clear Enable Bit 352" "Disabled,Enabled"
else
hgroup.long 0x012C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x0130++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB415  ,Set/Clear Enable Bit 415" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB414  ,Set/Clear Enable Bit 414" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB413  ,Set/Clear Enable Bit 413" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB412  ,Set/Clear Enable Bit 412" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB411  ,Set/Clear Enable Bit 411" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB410  ,Set/Clear Enable Bit 410" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB409  ,Set/Clear Enable Bit 409" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB408  ,Set/Clear Enable Bit 408" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB407  ,Set/Clear Enable Bit 407" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB406  ,Set/Clear Enable Bit 406" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB405  ,Set/Clear Enable Bit 405" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB404  ,Set/Clear Enable Bit 404" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB403  ,Set/Clear Enable Bit 403" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB402  ,Set/Clear Enable Bit 402" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB401  ,Set/Clear Enable Bit 401" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB400  ,Set/Clear Enable Bit 400" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB399  ,Set/Clear Enable Bit 399" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB398  ,Set/Clear Enable Bit 398" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB397  ,Set/Clear Enable Bit 397" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB396  ,Set/Clear Enable Bit 396" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB395  ,Set/Clear Enable Bit 395" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB394  ,Set/Clear Enable Bit 394" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB393  ,Set/Clear Enable Bit 393" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB392  ,Set/Clear Enable Bit 392" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB391  ,Set/Clear Enable Bit 391" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB390  ,Set/Clear Enable Bit 390" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB389  ,Set/Clear Enable Bit 389" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB388  ,Set/Clear Enable Bit 388" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB387  ,Set/Clear Enable Bit 387" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB386  ,Set/Clear Enable Bit 386" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB385  ,Set/Clear Enable Bit 385" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB384  ,Set/Clear Enable Bit 384" "Disabled,Enabled"
else
hgroup.long 0x0130++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x0134++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB447  ,Set/Clear Enable Bit 447" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB446  ,Set/Clear Enable Bit 446" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB445  ,Set/Clear Enable Bit 445" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB444  ,Set/Clear Enable Bit 444" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB443  ,Set/Clear Enable Bit 443" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB442  ,Set/Clear Enable Bit 442" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB441  ,Set/Clear Enable Bit 441" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB440  ,Set/Clear Enable Bit 440" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB439  ,Set/Clear Enable Bit 439" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB438  ,Set/Clear Enable Bit 438" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB437  ,Set/Clear Enable Bit 437" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB436  ,Set/Clear Enable Bit 436" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB435  ,Set/Clear Enable Bit 435" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB434  ,Set/Clear Enable Bit 434" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB433  ,Set/Clear Enable Bit 433" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB432  ,Set/Clear Enable Bit 432" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB431  ,Set/Clear Enable Bit 431" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB430  ,Set/Clear Enable Bit 430" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB429  ,Set/Clear Enable Bit 429" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB428  ,Set/Clear Enable Bit 428" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB427  ,Set/Clear Enable Bit 427" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB426  ,Set/Clear Enable Bit 426" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB425  ,Set/Clear Enable Bit 425" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB424  ,Set/Clear Enable Bit 424" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB423  ,Set/Clear Enable Bit 423" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB422  ,Set/Clear Enable Bit 422" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB421  ,Set/Clear Enable Bit 421" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB420  ,Set/Clear Enable Bit 420" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB419  ,Set/Clear Enable Bit 419" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB418  ,Set/Clear Enable Bit 418" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB417  ,Set/Clear Enable Bit 417" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB416  ,Set/Clear Enable Bit 416" "Disabled,Enabled"
else
hgroup.long 0x0134++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x0138++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB479  ,Set/Clear Enable Bit 479" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB478  ,Set/Clear Enable Bit 478" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB477  ,Set/Clear Enable Bit 477" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB476  ,Set/Clear Enable Bit 476" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB475  ,Set/Clear Enable Bit 475" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB474  ,Set/Clear Enable Bit 474" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB473  ,Set/Clear Enable Bit 473" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB472  ,Set/Clear Enable Bit 472" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB471  ,Set/Clear Enable Bit 471" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB470  ,Set/Clear Enable Bit 470" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB469  ,Set/Clear Enable Bit 469" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB468  ,Set/Clear Enable Bit 468" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB467  ,Set/Clear Enable Bit 467" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB466  ,Set/Clear Enable Bit 466" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB465  ,Set/Clear Enable Bit 465" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB464  ,Set/Clear Enable Bit 464" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB463  ,Set/Clear Enable Bit 463" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB462  ,Set/Clear Enable Bit 462" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB461  ,Set/Clear Enable Bit 461" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB460  ,Set/Clear Enable Bit 460" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB459  ,Set/Clear Enable Bit 459" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB458  ,Set/Clear Enable Bit 458" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB457  ,Set/Clear Enable Bit 457" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB456  ,Set/Clear Enable Bit 456" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB455  ,Set/Clear Enable Bit 455" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB454  ,Set/Clear Enable Bit 454" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB453  ,Set/Clear Enable Bit 453" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB452  ,Set/Clear Enable Bit 452" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB451  ,Set/Clear Enable Bit 451" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB450  ,Set/Clear Enable Bit 450" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB449  ,Set/Clear Enable Bit 449" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB448  ,Set/Clear Enable Bit 448" "Disabled,Enabled"
else
hgroup.long 0x0138++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x013C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB511  ,Set/Clear Enable Bit 511" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB510  ,Set/Clear Enable Bit 510" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB509  ,Set/Clear Enable Bit 509" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB508  ,Set/Clear Enable Bit 508" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB507  ,Set/Clear Enable Bit 507" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB506  ,Set/Clear Enable Bit 506" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB505  ,Set/Clear Enable Bit 505" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB504  ,Set/Clear Enable Bit 504" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB503  ,Set/Clear Enable Bit 503" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB502  ,Set/Clear Enable Bit 502" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB501  ,Set/Clear Enable Bit 501" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB500  ,Set/Clear Enable Bit 500" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB499  ,Set/Clear Enable Bit 499" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB498  ,Set/Clear Enable Bit 498" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB497  ,Set/Clear Enable Bit 497" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB496  ,Set/Clear Enable Bit 496" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB495  ,Set/Clear Enable Bit 495" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB494  ,Set/Clear Enable Bit 494" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB493  ,Set/Clear Enable Bit 493" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB492  ,Set/Clear Enable Bit 492" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB491  ,Set/Clear Enable Bit 491" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB490  ,Set/Clear Enable Bit 490" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB489  ,Set/Clear Enable Bit 489" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB488  ,Set/Clear Enable Bit 488" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB487  ,Set/Clear Enable Bit 487" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB486  ,Set/Clear Enable Bit 486" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB485  ,Set/Clear Enable Bit 485" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB484  ,Set/Clear Enable Bit 484" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB483  ,Set/Clear Enable Bit 483" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB482  ,Set/Clear Enable Bit 482" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB481  ,Set/Clear Enable Bit 481" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB480  ,Set/Clear Enable Bit 480" "Disabled,Enabled"
else
hgroup.long 0x013C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0x0140++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB543  ,Set/Clear Enable Bit 543" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB542  ,Set/Clear Enable Bit 542" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB541  ,Set/Clear Enable Bit 541" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB540  ,Set/Clear Enable Bit 540" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB539  ,Set/Clear Enable Bit 539" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB538  ,Set/Clear Enable Bit 538" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB537  ,Set/Clear Enable Bit 537" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB536  ,Set/Clear Enable Bit 536" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB535  ,Set/Clear Enable Bit 535" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB534  ,Set/Clear Enable Bit 534" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB533  ,Set/Clear Enable Bit 533" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB532  ,Set/Clear Enable Bit 532" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB531  ,Set/Clear Enable Bit 531" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB530  ,Set/Clear Enable Bit 530" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB529  ,Set/Clear Enable Bit 529" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB528  ,Set/Clear Enable Bit 528" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB527  ,Set/Clear Enable Bit 527" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB526  ,Set/Clear Enable Bit 526" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB525  ,Set/Clear Enable Bit 525" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB524  ,Set/Clear Enable Bit 524" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB523  ,Set/Clear Enable Bit 523" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB522  ,Set/Clear Enable Bit 522" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB521  ,Set/Clear Enable Bit 521" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB520  ,Set/Clear Enable Bit 520" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB519  ,Set/Clear Enable Bit 519" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB518  ,Set/Clear Enable Bit 518" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB517  ,Set/Clear Enable Bit 517" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB516  ,Set/Clear Enable Bit 516" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB515  ,Set/Clear Enable Bit 515" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB514  ,Set/Clear Enable Bit 514" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB513  ,Set/Clear Enable Bit 513" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB512  ,Set/Clear Enable Bit 512" "Disabled,Enabled"
else
hgroup.long 0x0140++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0x0144++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB575  ,Set/Clear Enable Bit 575" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB574  ,Set/Clear Enable Bit 574" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB573  ,Set/Clear Enable Bit 573" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB572  ,Set/Clear Enable Bit 572" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB571  ,Set/Clear Enable Bit 571" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB570  ,Set/Clear Enable Bit 570" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB569  ,Set/Clear Enable Bit 569" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB568  ,Set/Clear Enable Bit 568" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB567  ,Set/Clear Enable Bit 567" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB566  ,Set/Clear Enable Bit 566" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB565  ,Set/Clear Enable Bit 565" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB564  ,Set/Clear Enable Bit 564" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB563  ,Set/Clear Enable Bit 563" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB562  ,Set/Clear Enable Bit 562" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB561  ,Set/Clear Enable Bit 561" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB560  ,Set/Clear Enable Bit 560" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB559  ,Set/Clear Enable Bit 559" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB558  ,Set/Clear Enable Bit 558" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB557  ,Set/Clear Enable Bit 557" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB556  ,Set/Clear Enable Bit 556" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB555  ,Set/Clear Enable Bit 555" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB554  ,Set/Clear Enable Bit 554" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB553  ,Set/Clear Enable Bit 553" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB552  ,Set/Clear Enable Bit 552" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB551  ,Set/Clear Enable Bit 551" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB550  ,Set/Clear Enable Bit 550" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB549  ,Set/Clear Enable Bit 549" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB548  ,Set/Clear Enable Bit 548" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB547  ,Set/Clear Enable Bit 547" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB546  ,Set/Clear Enable Bit 546" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB545  ,Set/Clear Enable Bit 545" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB544  ,Set/Clear Enable Bit 544" "Disabled,Enabled"
else
hgroup.long 0x0144++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0x0148++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB607  ,Set/Clear Enable Bit 607" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB606  ,Set/Clear Enable Bit 606" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB605  ,Set/Clear Enable Bit 605" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB604  ,Set/Clear Enable Bit 604" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB603  ,Set/Clear Enable Bit 603" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB602  ,Set/Clear Enable Bit 602" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB601  ,Set/Clear Enable Bit 601" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB600  ,Set/Clear Enable Bit 600" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB599  ,Set/Clear Enable Bit 599" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB598  ,Set/Clear Enable Bit 598" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB597  ,Set/Clear Enable Bit 597" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB596  ,Set/Clear Enable Bit 596" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB595  ,Set/Clear Enable Bit 595" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB594  ,Set/Clear Enable Bit 594" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB593  ,Set/Clear Enable Bit 593" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB592  ,Set/Clear Enable Bit 592" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB591  ,Set/Clear Enable Bit 591" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB590  ,Set/Clear Enable Bit 590" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB589  ,Set/Clear Enable Bit 589" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB588  ,Set/Clear Enable Bit 588" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB587  ,Set/Clear Enable Bit 587" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB586  ,Set/Clear Enable Bit 586" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB585  ,Set/Clear Enable Bit 585" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB584  ,Set/Clear Enable Bit 584" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB583  ,Set/Clear Enable Bit 583" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB582  ,Set/Clear Enable Bit 582" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB581  ,Set/Clear Enable Bit 581" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB580  ,Set/Clear Enable Bit 580" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB579  ,Set/Clear Enable Bit 579" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB578  ,Set/Clear Enable Bit 578" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB577  ,Set/Clear Enable Bit 577" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB576  ,Set/Clear Enable Bit 576" "Disabled,Enabled"
else
hgroup.long 0x0148++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0x014C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB639  ,Set/Clear Enable Bit 639" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB638  ,Set/Clear Enable Bit 638" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB637  ,Set/Clear Enable Bit 637" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB636  ,Set/Clear Enable Bit 636" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB635  ,Set/Clear Enable Bit 635" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB634  ,Set/Clear Enable Bit 634" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB633  ,Set/Clear Enable Bit 633" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB632  ,Set/Clear Enable Bit 632" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB631  ,Set/Clear Enable Bit 631" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB630  ,Set/Clear Enable Bit 630" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB629  ,Set/Clear Enable Bit 629" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB628  ,Set/Clear Enable Bit 628" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB627  ,Set/Clear Enable Bit 627" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB626  ,Set/Clear Enable Bit 626" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB625  ,Set/Clear Enable Bit 625" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB624  ,Set/Clear Enable Bit 624" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB623  ,Set/Clear Enable Bit 623" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB622  ,Set/Clear Enable Bit 622" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB621  ,Set/Clear Enable Bit 621" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB620  ,Set/Clear Enable Bit 620" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB619  ,Set/Clear Enable Bit 619" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB618  ,Set/Clear Enable Bit 618" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB617  ,Set/Clear Enable Bit 617" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB616  ,Set/Clear Enable Bit 616" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB615  ,Set/Clear Enable Bit 615" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB614  ,Set/Clear Enable Bit 614" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB613  ,Set/Clear Enable Bit 613" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB612  ,Set/Clear Enable Bit 612" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB611  ,Set/Clear Enable Bit 611" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB610  ,Set/Clear Enable Bit 610" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB609  ,Set/Clear Enable Bit 609" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB608  ,Set/Clear Enable Bit 608" "Disabled,Enabled"
else
hgroup.long 0x014C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0x0150++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB671  ,Set/Clear Enable Bit 671" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB670  ,Set/Clear Enable Bit 670" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB669  ,Set/Clear Enable Bit 669" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB668  ,Set/Clear Enable Bit 668" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB667  ,Set/Clear Enable Bit 667" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB666  ,Set/Clear Enable Bit 666" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB665  ,Set/Clear Enable Bit 665" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB664  ,Set/Clear Enable Bit 664" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB663  ,Set/Clear Enable Bit 663" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB662  ,Set/Clear Enable Bit 662" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB661  ,Set/Clear Enable Bit 661" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB660  ,Set/Clear Enable Bit 660" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB659  ,Set/Clear Enable Bit 659" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB658  ,Set/Clear Enable Bit 658" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB657  ,Set/Clear Enable Bit 657" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB656  ,Set/Clear Enable Bit 656" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB655  ,Set/Clear Enable Bit 655" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB654  ,Set/Clear Enable Bit 654" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB653  ,Set/Clear Enable Bit 653" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB652  ,Set/Clear Enable Bit 652" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB651  ,Set/Clear Enable Bit 651" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB650  ,Set/Clear Enable Bit 650" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB649  ,Set/Clear Enable Bit 649" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB648  ,Set/Clear Enable Bit 648" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB647  ,Set/Clear Enable Bit 647" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB646  ,Set/Clear Enable Bit 646" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB645  ,Set/Clear Enable Bit 645" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB644  ,Set/Clear Enable Bit 644" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB643  ,Set/Clear Enable Bit 643" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB642  ,Set/Clear Enable Bit 642" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB641  ,Set/Clear Enable Bit 641" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB640  ,Set/Clear Enable Bit 640" "Disabled,Enabled"
else
hgroup.long 0x0150++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0x0154++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB703  ,Set/Clear Enable Bit 703" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB702  ,Set/Clear Enable Bit 702" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB701  ,Set/Clear Enable Bit 701" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB700  ,Set/Clear Enable Bit 700" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB699  ,Set/Clear Enable Bit 699" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB698  ,Set/Clear Enable Bit 698" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB697  ,Set/Clear Enable Bit 697" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB696  ,Set/Clear Enable Bit 696" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB695  ,Set/Clear Enable Bit 695" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB694  ,Set/Clear Enable Bit 694" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB693  ,Set/Clear Enable Bit 693" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB692  ,Set/Clear Enable Bit 692" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB691  ,Set/Clear Enable Bit 691" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB690  ,Set/Clear Enable Bit 690" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB689  ,Set/Clear Enable Bit 689" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB688  ,Set/Clear Enable Bit 688" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB687  ,Set/Clear Enable Bit 687" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB686  ,Set/Clear Enable Bit 686" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB685  ,Set/Clear Enable Bit 685" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB684  ,Set/Clear Enable Bit 684" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB683  ,Set/Clear Enable Bit 683" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB682  ,Set/Clear Enable Bit 682" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB681  ,Set/Clear Enable Bit 681" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB680  ,Set/Clear Enable Bit 680" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB679  ,Set/Clear Enable Bit 679" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB678  ,Set/Clear Enable Bit 678" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB677  ,Set/Clear Enable Bit 677" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB676  ,Set/Clear Enable Bit 676" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB675  ,Set/Clear Enable Bit 675" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB674  ,Set/Clear Enable Bit 674" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB673  ,Set/Clear Enable Bit 673" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB672  ,Set/Clear Enable Bit 672" "Disabled,Enabled"
else
hgroup.long 0x0154++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0x0158++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB735  ,Set/Clear Enable Bit 735" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB734  ,Set/Clear Enable Bit 734" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB733  ,Set/Clear Enable Bit 733" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB732  ,Set/Clear Enable Bit 732" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB731  ,Set/Clear Enable Bit 731" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB730  ,Set/Clear Enable Bit 730" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB729  ,Set/Clear Enable Bit 729" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB728  ,Set/Clear Enable Bit 728" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB727  ,Set/Clear Enable Bit 727" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB726  ,Set/Clear Enable Bit 726" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB725  ,Set/Clear Enable Bit 725" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB724  ,Set/Clear Enable Bit 724" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB723  ,Set/Clear Enable Bit 723" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB722  ,Set/Clear Enable Bit 722" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB721  ,Set/Clear Enable Bit 721" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB720  ,Set/Clear Enable Bit 720" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB719  ,Set/Clear Enable Bit 719" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB718  ,Set/Clear Enable Bit 718" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB717  ,Set/Clear Enable Bit 717" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB716  ,Set/Clear Enable Bit 716" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB715  ,Set/Clear Enable Bit 715" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB714  ,Set/Clear Enable Bit 714" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB713  ,Set/Clear Enable Bit 713" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB712  ,Set/Clear Enable Bit 712" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB711  ,Set/Clear Enable Bit 711" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB710  ,Set/Clear Enable Bit 710" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB709  ,Set/Clear Enable Bit 709" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB708  ,Set/Clear Enable Bit 708" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB707  ,Set/Clear Enable Bit 707" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB706  ,Set/Clear Enable Bit 706" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB705  ,Set/Clear Enable Bit 705" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB704  ,Set/Clear Enable Bit 704" "Disabled,Enabled"
else
hgroup.long 0x0158++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0x015C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB767  ,Set/Clear Enable Bit 767" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB766  ,Set/Clear Enable Bit 766" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB765  ,Set/Clear Enable Bit 765" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB764  ,Set/Clear Enable Bit 764" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB763  ,Set/Clear Enable Bit 763" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB762  ,Set/Clear Enable Bit 762" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB761  ,Set/Clear Enable Bit 761" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB760  ,Set/Clear Enable Bit 760" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB759  ,Set/Clear Enable Bit 759" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB758  ,Set/Clear Enable Bit 758" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB757  ,Set/Clear Enable Bit 757" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB756  ,Set/Clear Enable Bit 756" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB755  ,Set/Clear Enable Bit 755" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB754  ,Set/Clear Enable Bit 754" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB753  ,Set/Clear Enable Bit 753" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB752  ,Set/Clear Enable Bit 752" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB751  ,Set/Clear Enable Bit 751" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB750  ,Set/Clear Enable Bit 750" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB749  ,Set/Clear Enable Bit 749" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB748  ,Set/Clear Enable Bit 748" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB747  ,Set/Clear Enable Bit 747" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB746  ,Set/Clear Enable Bit 746" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB745  ,Set/Clear Enable Bit 745" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB744  ,Set/Clear Enable Bit 744" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB743  ,Set/Clear Enable Bit 743" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB742  ,Set/Clear Enable Bit 742" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB741  ,Set/Clear Enable Bit 741" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB740  ,Set/Clear Enable Bit 740" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB739  ,Set/Clear Enable Bit 739" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB738  ,Set/Clear Enable Bit 738" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB737  ,Set/Clear Enable Bit 737" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB736  ,Set/Clear Enable Bit 736" "Disabled,Enabled"
else
hgroup.long 0x015C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0x0160++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB799  ,Set/Clear Enable Bit 799" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB798  ,Set/Clear Enable Bit 798" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB797  ,Set/Clear Enable Bit 797" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB796  ,Set/Clear Enable Bit 796" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB795  ,Set/Clear Enable Bit 795" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB794  ,Set/Clear Enable Bit 794" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB793  ,Set/Clear Enable Bit 793" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB792  ,Set/Clear Enable Bit 792" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB791  ,Set/Clear Enable Bit 791" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB790  ,Set/Clear Enable Bit 790" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB789  ,Set/Clear Enable Bit 789" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB788  ,Set/Clear Enable Bit 788" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB787  ,Set/Clear Enable Bit 787" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB786  ,Set/Clear Enable Bit 786" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB785  ,Set/Clear Enable Bit 785" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB784  ,Set/Clear Enable Bit 784" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB783  ,Set/Clear Enable Bit 783" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB782  ,Set/Clear Enable Bit 782" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB781  ,Set/Clear Enable Bit 781" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB780  ,Set/Clear Enable Bit 780" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB779  ,Set/Clear Enable Bit 779" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB778  ,Set/Clear Enable Bit 778" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB777  ,Set/Clear Enable Bit 777" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB776  ,Set/Clear Enable Bit 776" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB775  ,Set/Clear Enable Bit 775" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB774  ,Set/Clear Enable Bit 774" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB773  ,Set/Clear Enable Bit 773" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB772  ,Set/Clear Enable Bit 772" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB771  ,Set/Clear Enable Bit 771" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB770  ,Set/Clear Enable Bit 770" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB769  ,Set/Clear Enable Bit 769" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB768  ,Set/Clear Enable Bit 768" "Disabled,Enabled"
else
hgroup.long 0x0160++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0x0164++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB831  ,Set/Clear Enable Bit 831" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB830  ,Set/Clear Enable Bit 830" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB829  ,Set/Clear Enable Bit 829" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB828  ,Set/Clear Enable Bit 828" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB827  ,Set/Clear Enable Bit 827" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB826  ,Set/Clear Enable Bit 826" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB825  ,Set/Clear Enable Bit 825" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB824  ,Set/Clear Enable Bit 824" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB823  ,Set/Clear Enable Bit 823" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB822  ,Set/Clear Enable Bit 822" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB821  ,Set/Clear Enable Bit 821" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB820  ,Set/Clear Enable Bit 820" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB819  ,Set/Clear Enable Bit 819" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB818  ,Set/Clear Enable Bit 818" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB817  ,Set/Clear Enable Bit 817" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB816  ,Set/Clear Enable Bit 816" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB815  ,Set/Clear Enable Bit 815" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB814  ,Set/Clear Enable Bit 814" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB813  ,Set/Clear Enable Bit 813" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB812  ,Set/Clear Enable Bit 812" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB811  ,Set/Clear Enable Bit 811" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB810  ,Set/Clear Enable Bit 810" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB809  ,Set/Clear Enable Bit 809" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB808  ,Set/Clear Enable Bit 808" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB807  ,Set/Clear Enable Bit 807" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB806  ,Set/Clear Enable Bit 806" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB805  ,Set/Clear Enable Bit 805" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB804  ,Set/Clear Enable Bit 804" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB803  ,Set/Clear Enable Bit 803" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB802  ,Set/Clear Enable Bit 802" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB801  ,Set/Clear Enable Bit 801" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB800  ,Set/Clear Enable Bit 800" "Disabled,Enabled"
else
hgroup.long 0x0164++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0x0168++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB863  ,Set/Clear Enable Bit 863" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB862  ,Set/Clear Enable Bit 862" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB861  ,Set/Clear Enable Bit 861" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB860  ,Set/Clear Enable Bit 860" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB859  ,Set/Clear Enable Bit 859" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB858  ,Set/Clear Enable Bit 858" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB857  ,Set/Clear Enable Bit 857" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB856  ,Set/Clear Enable Bit 856" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB855  ,Set/Clear Enable Bit 855" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB854  ,Set/Clear Enable Bit 854" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB853  ,Set/Clear Enable Bit 853" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB852  ,Set/Clear Enable Bit 852" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB851  ,Set/Clear Enable Bit 851" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB850  ,Set/Clear Enable Bit 850" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB849  ,Set/Clear Enable Bit 849" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB848  ,Set/Clear Enable Bit 848" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB847  ,Set/Clear Enable Bit 847" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB846  ,Set/Clear Enable Bit 846" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB845  ,Set/Clear Enable Bit 845" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB844  ,Set/Clear Enable Bit 844" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB843  ,Set/Clear Enable Bit 843" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB842  ,Set/Clear Enable Bit 842" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB841  ,Set/Clear Enable Bit 841" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB840  ,Set/Clear Enable Bit 840" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB839  ,Set/Clear Enable Bit 839" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB838  ,Set/Clear Enable Bit 838" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB837  ,Set/Clear Enable Bit 837" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB836  ,Set/Clear Enable Bit 836" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB835  ,Set/Clear Enable Bit 835" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB834  ,Set/Clear Enable Bit 834" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB833  ,Set/Clear Enable Bit 833" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB832  ,Set/Clear Enable Bit 832" "Disabled,Enabled"
else
hgroup.long 0x0168++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0x016C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB895  ,Set/Clear Enable Bit 895" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB894  ,Set/Clear Enable Bit 894" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB893  ,Set/Clear Enable Bit 893" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB892  ,Set/Clear Enable Bit 892" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB891  ,Set/Clear Enable Bit 891" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB890  ,Set/Clear Enable Bit 890" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB889  ,Set/Clear Enable Bit 889" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB888  ,Set/Clear Enable Bit 888" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB887  ,Set/Clear Enable Bit 887" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB886  ,Set/Clear Enable Bit 886" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB885  ,Set/Clear Enable Bit 885" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB884  ,Set/Clear Enable Bit 884" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB883  ,Set/Clear Enable Bit 883" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB882  ,Set/Clear Enable Bit 882" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB881  ,Set/Clear Enable Bit 881" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB880  ,Set/Clear Enable Bit 880" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB879  ,Set/Clear Enable Bit 879" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB878  ,Set/Clear Enable Bit 878" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB877  ,Set/Clear Enable Bit 877" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB876  ,Set/Clear Enable Bit 876" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB875  ,Set/Clear Enable Bit 875" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB874  ,Set/Clear Enable Bit 874" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB873  ,Set/Clear Enable Bit 873" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB872  ,Set/Clear Enable Bit 872" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB871  ,Set/Clear Enable Bit 871" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB870  ,Set/Clear Enable Bit 870" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB869  ,Set/Clear Enable Bit 869" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB868  ,Set/Clear Enable Bit 868" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB867  ,Set/Clear Enable Bit 867" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB866  ,Set/Clear Enable Bit 866" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB865  ,Set/Clear Enable Bit 865" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB864  ,Set/Clear Enable Bit 864" "Disabled,Enabled"
else
hgroup.long 0x016C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0x0170++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB927  ,Set/Clear Enable Bit 927" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB926  ,Set/Clear Enable Bit 926" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB925  ,Set/Clear Enable Bit 925" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB924  ,Set/Clear Enable Bit 924" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB923  ,Set/Clear Enable Bit 923" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB922  ,Set/Clear Enable Bit 922" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB921  ,Set/Clear Enable Bit 921" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB920  ,Set/Clear Enable Bit 920" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB919  ,Set/Clear Enable Bit 919" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB918  ,Set/Clear Enable Bit 918" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB917  ,Set/Clear Enable Bit 917" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB916  ,Set/Clear Enable Bit 916" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB915  ,Set/Clear Enable Bit 915" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB914  ,Set/Clear Enable Bit 914" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB913  ,Set/Clear Enable Bit 913" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB912  ,Set/Clear Enable Bit 912" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB911  ,Set/Clear Enable Bit 911" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB910  ,Set/Clear Enable Bit 910" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB909  ,Set/Clear Enable Bit 909" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB908  ,Set/Clear Enable Bit 908" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB907  ,Set/Clear Enable Bit 907" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB906  ,Set/Clear Enable Bit 906" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB905  ,Set/Clear Enable Bit 905" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB904  ,Set/Clear Enable Bit 904" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB903  ,Set/Clear Enable Bit 903" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB902  ,Set/Clear Enable Bit 902" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB901  ,Set/Clear Enable Bit 901" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB900  ,Set/Clear Enable Bit 900" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB899  ,Set/Clear Enable Bit 899" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB898  ,Set/Clear Enable Bit 898" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB897  ,Set/Clear Enable Bit 897" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB896  ,Set/Clear Enable Bit 896" "Disabled,Enabled"
else
hgroup.long 0x0170++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0x0174++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB959  ,Set/Clear Enable Bit 959" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB958  ,Set/Clear Enable Bit 958" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB957  ,Set/Clear Enable Bit 957" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB956  ,Set/Clear Enable Bit 956" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB955  ,Set/Clear Enable Bit 955" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB954  ,Set/Clear Enable Bit 954" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB953  ,Set/Clear Enable Bit 953" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB952  ,Set/Clear Enable Bit 952" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB951  ,Set/Clear Enable Bit 951" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB950  ,Set/Clear Enable Bit 950" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB949  ,Set/Clear Enable Bit 949" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB948  ,Set/Clear Enable Bit 948" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB947  ,Set/Clear Enable Bit 947" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB946  ,Set/Clear Enable Bit 946" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB945  ,Set/Clear Enable Bit 945" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB944  ,Set/Clear Enable Bit 944" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB943  ,Set/Clear Enable Bit 943" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB942  ,Set/Clear Enable Bit 942" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB941  ,Set/Clear Enable Bit 941" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB940  ,Set/Clear Enable Bit 940" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB939  ,Set/Clear Enable Bit 939" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB938  ,Set/Clear Enable Bit 938" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB937  ,Set/Clear Enable Bit 937" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB936  ,Set/Clear Enable Bit 936" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB935  ,Set/Clear Enable Bit 935" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB934  ,Set/Clear Enable Bit 934" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB933  ,Set/Clear Enable Bit 933" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB932  ,Set/Clear Enable Bit 932" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB931  ,Set/Clear Enable Bit 931" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB930  ,Set/Clear Enable Bit 930" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB929  ,Set/Clear Enable Bit 929" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB928  ,Set/Clear Enable Bit 928" "Disabled,Enabled"
else
hgroup.long 0x0174++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0x0178++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB991  ,Set/Clear Enable Bit 991" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB990  ,Set/Clear Enable Bit 990" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB989  ,Set/Clear Enable Bit 989" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB988  ,Set/Clear Enable Bit 988" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB987  ,Set/Clear Enable Bit 987" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB986  ,Set/Clear Enable Bit 986" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB985  ,Set/Clear Enable Bit 985" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB984  ,Set/Clear Enable Bit 984" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB983  ,Set/Clear Enable Bit 983" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB982  ,Set/Clear Enable Bit 982" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB981  ,Set/Clear Enable Bit 981" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB980  ,Set/Clear Enable Bit 980" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB979  ,Set/Clear Enable Bit 979" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB978  ,Set/Clear Enable Bit 978" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB977  ,Set/Clear Enable Bit 977" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB976  ,Set/Clear Enable Bit 976" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB975  ,Set/Clear Enable Bit 975" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB974  ,Set/Clear Enable Bit 974" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB973  ,Set/Clear Enable Bit 973" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB972  ,Set/Clear Enable Bit 972" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB971  ,Set/Clear Enable Bit 971" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB970  ,Set/Clear Enable Bit 970" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB969  ,Set/Clear Enable Bit 969" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB968  ,Set/Clear Enable Bit 968" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB967  ,Set/Clear Enable Bit 967" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB966  ,Set/Clear Enable Bit 966" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB965  ,Set/Clear Enable Bit 965" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB964  ,Set/Clear Enable Bit 964" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB963  ,Set/Clear Enable Bit 963" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB962  ,Set/Clear Enable Bit 962" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB961  ,Set/Clear Enable Bit 961" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB960  ,Set/Clear Enable Bit 960" "Disabled,Enabled"
else
hgroup.long 0x0178++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
endif
tree.end
width 22.
tree "Set/Clear Pending Registers"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x0200++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
else
group.long 0x0200++0x03
line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND31   ,Set/Clear Pending Bit 31" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND30   ,Set/Clear Pending Bit 30" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND29   ,Set/Clear Pending Bit 29" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND28   ,Set/Clear Pending Bit 28" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND27   ,Set/Clear Pending Bit 27" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND26   ,Set/Clear Pending Bit 26" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND25   ,Set/Clear Pending Bit 25" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND24   ,Set/Clear Pending Bit 24" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND23   ,Set/Clear Pending Bit 23" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND22   ,Set/Clear Pending Bit 22" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND21   ,Set/Clear Pending Bit 21" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND20   ,Set/Clear Pending Bit 20" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND19   ,Set/Clear Pending Bit 19" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND18   ,Set/Clear Pending Bit 18" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND17   ,Set/Clear Pending Bit 17" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND16   ,Set/Clear Pending Bit 16" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND15   ,Set/Clear Pending Bit 15" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND14   ,Set/Clear Pending Bit 14" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND13   ,Set/Clear Pending Bit 13" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND12   ,Set/Clear Pending Bit 12" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND11   ,Set/Clear Pending Bit 11" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND10   ,Set/Clear Pending Bit 10" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND9    ,Set/Clear Pending Bit 9" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND8    ,Set/Clear Pending Bit 8" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND7    ,Set/Clear Pending Bit 7" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND6    ,Set/Clear Pending Bit 6" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND5    ,Set/Clear Pending Bit 5" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND4    ,Set/Clear Pending Bit 4" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND3    ,Set/Clear Pending Bit 3" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND2    ,Set/Clear Pending Bit 2" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND1    ,Set/Clear Pending Bit 1" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND0    ,Set/Clear Pending Bit 0" "Not pending,Pending"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x0204++0x03
line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND63   ,Set/Clear Pending Bit 63" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND62   ,Set/Clear Pending Bit 62" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND61   ,Set/Clear Pending Bit 61" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND60   ,Set/Clear Pending Bit 60" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND59   ,Set/Clear Pending Bit 59" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND58   ,Set/Clear Pending Bit 58" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND57   ,Set/Clear Pending Bit 57" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND56   ,Set/Clear Pending Bit 56" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND55   ,Set/Clear Pending Bit 55" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND54   ,Set/Clear Pending Bit 54" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND53   ,Set/Clear Pending Bit 53" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND52   ,Set/Clear Pending Bit 52" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND51   ,Set/Clear Pending Bit 51" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND50   ,Set/Clear Pending Bit 50" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND49   ,Set/Clear Pending Bit 49" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND48   ,Set/Clear Pending Bit 48" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND47   ,Set/Clear Pending Bit 47" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND46   ,Set/Clear Pending Bit 46" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND45   ,Set/Clear Pending Bit 45" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND44   ,Set/Clear Pending Bit 44" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND43   ,Set/Clear Pending Bit 43" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND42   ,Set/Clear Pending Bit 42" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND41   ,Set/Clear Pending Bit 41" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND40   ,Set/Clear Pending Bit 40" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND39   ,Set/Clear Pending Bit 39" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND38   ,Set/Clear Pending Bit 38" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND37   ,Set/Clear Pending Bit 37" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND36   ,Set/Clear Pending Bit 36" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND35   ,Set/Clear Pending Bit 35" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND34   ,Set/Clear Pending Bit 34" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND33   ,Set/Clear Pending Bit 33" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND32   ,Set/Clear Pending Bit 32" "Not pending,Pending"
else
hgroup.long 0x0204++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x0208++0x03
line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND95   ,Set/Clear Pending Bit 95" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND94   ,Set/Clear Pending Bit 94" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND93   ,Set/Clear Pending Bit 93" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND92   ,Set/Clear Pending Bit 92" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND91   ,Set/Clear Pending Bit 91" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND90   ,Set/Clear Pending Bit 90" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND89   ,Set/Clear Pending Bit 89" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND88   ,Set/Clear Pending Bit 88" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND87   ,Set/Clear Pending Bit 87" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND86   ,Set/Clear Pending Bit 86" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND85   ,Set/Clear Pending Bit 85" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND84   ,Set/Clear Pending Bit 84" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND83   ,Set/Clear Pending Bit 83" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND82   ,Set/Clear Pending Bit 82" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND81   ,Set/Clear Pending Bit 81" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND80   ,Set/Clear Pending Bit 80" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND79   ,Set/Clear Pending Bit 79" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND78   ,Set/Clear Pending Bit 78" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND77   ,Set/Clear Pending Bit 77" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND76   ,Set/Clear Pending Bit 76" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND75   ,Set/Clear Pending Bit 75" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND74   ,Set/Clear Pending Bit 74" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND73   ,Set/Clear Pending Bit 73" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND72   ,Set/Clear Pending Bit 72" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND71   ,Set/Clear Pending Bit 71" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND70   ,Set/Clear Pending Bit 70" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND69   ,Set/Clear Pending Bit 69" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND68   ,Set/Clear Pending Bit 68" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND67   ,Set/Clear Pending Bit 67" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND66   ,Set/Clear Pending Bit 66" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND65   ,Set/Clear Pending Bit 65" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND64   ,Set/Clear Pending Bit 64" "Not pending,Pending"
else
hgroup.long 0x0208++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x020C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND127  ,Set/Clear Pending Bit 127" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND126  ,Set/Clear Pending Bit 126" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND125  ,Set/Clear Pending Bit 125" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND124  ,Set/Clear Pending Bit 124" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND123  ,Set/Clear Pending Bit 123" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND122  ,Set/Clear Pending Bit 122" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND121  ,Set/Clear Pending Bit 121" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND120  ,Set/Clear Pending Bit 120" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND119  ,Set/Clear Pending Bit 119" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND118  ,Set/Clear Pending Bit 118" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND117  ,Set/Clear Pending Bit 117" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND116  ,Set/Clear Pending Bit 116" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND115  ,Set/Clear Pending Bit 115" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND114  ,Set/Clear Pending Bit 114" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND113  ,Set/Clear Pending Bit 113" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND112  ,Set/Clear Pending Bit 112" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND111  ,Set/Clear Pending Bit 111" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND110  ,Set/Clear Pending Bit 110" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND109  ,Set/Clear Pending Bit 109" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND108  ,Set/Clear Pending Bit 108" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND107  ,Set/Clear Pending Bit 107" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND106  ,Set/Clear Pending Bit 106" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND105  ,Set/Clear Pending Bit 105" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND104  ,Set/Clear Pending Bit 104" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND103  ,Set/Clear Pending Bit 103" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND102  ,Set/Clear Pending Bit 102" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND101  ,Set/Clear Pending Bit 101" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND100  ,Set/Clear Pending Bit 100" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND99   ,Set/Clear Pending Bit 99" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND98   ,Set/Clear Pending Bit 98" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND97   ,Set/Clear Pending Bit 97" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND96   ,Set/Clear Pending Bit 96" "Not pending,Pending"
else
hgroup.long 0x020C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x0210++0x03
line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND159  ,Set/Clear Pending Bit 159" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND158  ,Set/Clear Pending Bit 158" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND157  ,Set/Clear Pending Bit 157" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND156  ,Set/Clear Pending Bit 156" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND155  ,Set/Clear Pending Bit 155" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND154  ,Set/Clear Pending Bit 154" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND153  ,Set/Clear Pending Bit 153" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND152  ,Set/Clear Pending Bit 152" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND151  ,Set/Clear Pending Bit 151" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND150  ,Set/Clear Pending Bit 150" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND149  ,Set/Clear Pending Bit 149" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND148  ,Set/Clear Pending Bit 148" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND147  ,Set/Clear Pending Bit 147" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND146  ,Set/Clear Pending Bit 146" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND145  ,Set/Clear Pending Bit 145" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND144  ,Set/Clear Pending Bit 144" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND143  ,Set/Clear Pending Bit 143" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND142  ,Set/Clear Pending Bit 142" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND141  ,Set/Clear Pending Bit 141" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND140  ,Set/Clear Pending Bit 140" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND139  ,Set/Clear Pending Bit 139" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND138  ,Set/Clear Pending Bit 138" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND137  ,Set/Clear Pending Bit 137" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND136  ,Set/Clear Pending Bit 136" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND135  ,Set/Clear Pending Bit 135" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND134  ,Set/Clear Pending Bit 134" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND133  ,Set/Clear Pending Bit 133" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND132  ,Set/Clear Pending Bit 132" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND131  ,Set/Clear Pending Bit 131" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND130  ,Set/Clear Pending Bit 130" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND129  ,Set/Clear Pending Bit 129" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND128  ,Set/Clear Pending Bit 128" "Not pending,Pending"
else
hgroup.long 0x0210++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x0214++0x03
line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND191  ,Set/Clear Pending Bit 191" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND190  ,Set/Clear Pending Bit 190" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND189  ,Set/Clear Pending Bit 189" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND188  ,Set/Clear Pending Bit 188" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND187  ,Set/Clear Pending Bit 187" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND186  ,Set/Clear Pending Bit 186" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND185  ,Set/Clear Pending Bit 185" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND184  ,Set/Clear Pending Bit 184" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND183  ,Set/Clear Pending Bit 183" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND182  ,Set/Clear Pending Bit 182" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND181  ,Set/Clear Pending Bit 181" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND180  ,Set/Clear Pending Bit 180" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND179  ,Set/Clear Pending Bit 179" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND178  ,Set/Clear Pending Bit 178" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND177  ,Set/Clear Pending Bit 177" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND176  ,Set/Clear Pending Bit 176" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND175  ,Set/Clear Pending Bit 175" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND174  ,Set/Clear Pending Bit 174" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND173  ,Set/Clear Pending Bit 173" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND172  ,Set/Clear Pending Bit 172" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND171  ,Set/Clear Pending Bit 171" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND170  ,Set/Clear Pending Bit 170" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND169  ,Set/Clear Pending Bit 169" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND168  ,Set/Clear Pending Bit 168" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND167  ,Set/Clear Pending Bit 167" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND166  ,Set/Clear Pending Bit 166" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND165  ,Set/Clear Pending Bit 165" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND164  ,Set/Clear Pending Bit 164" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND163  ,Set/Clear Pending Bit 163" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND162  ,Set/Clear Pending Bit 162" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND161  ,Set/Clear Pending Bit 161" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND160  ,Set/Clear Pending Bit 160" "Not pending,Pending"
else
hgroup.long 0x0214++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x0218++0x03
line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND223  ,Set/Clear Pending Bit 223" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND222  ,Set/Clear Pending Bit 222" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND221  ,Set/Clear Pending Bit 221" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND220  ,Set/Clear Pending Bit 220" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND219  ,Set/Clear Pending Bit 219" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND218  ,Set/Clear Pending Bit 218" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND217  ,Set/Clear Pending Bit 217" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND216  ,Set/Clear Pending Bit 216" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND215  ,Set/Clear Pending Bit 215" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND214  ,Set/Clear Pending Bit 214" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND213  ,Set/Clear Pending Bit 213" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND212  ,Set/Clear Pending Bit 212" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND211  ,Set/Clear Pending Bit 211" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND210  ,Set/Clear Pending Bit 210" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND209  ,Set/Clear Pending Bit 209" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND208  ,Set/Clear Pending Bit 208" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND207  ,Set/Clear Pending Bit 207" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND206  ,Set/Clear Pending Bit 206" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND205  ,Set/Clear Pending Bit 205" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND204  ,Set/Clear Pending Bit 204" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND203  ,Set/Clear Pending Bit 203" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND202  ,Set/Clear Pending Bit 202" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND201  ,Set/Clear Pending Bit 201" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND200  ,Set/Clear Pending Bit 200" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND199  ,Set/Clear Pending Bit 199" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND198  ,Set/Clear Pending Bit 198" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND197  ,Set/Clear Pending Bit 197" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND196  ,Set/Clear Pending Bit 196" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND195  ,Set/Clear Pending Bit 195" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND194  ,Set/Clear Pending Bit 194" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND193  ,Set/Clear Pending Bit 193" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND192  ,Set/Clear Pending Bit 192" "Not pending,Pending"
else
hgroup.long 0x0218++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x021C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND255  ,Set/Clear Pending Bit 255" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND254  ,Set/Clear Pending Bit 254" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND253  ,Set/Clear Pending Bit 253" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND252  ,Set/Clear Pending Bit 252" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND251  ,Set/Clear Pending Bit 251" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND250  ,Set/Clear Pending Bit 250" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND249  ,Set/Clear Pending Bit 249" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND248  ,Set/Clear Pending Bit 248" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND247  ,Set/Clear Pending Bit 247" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND246  ,Set/Clear Pending Bit 246" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND245  ,Set/Clear Pending Bit 245" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND244  ,Set/Clear Pending Bit 244" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND243  ,Set/Clear Pending Bit 243" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND242  ,Set/Clear Pending Bit 242" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND241  ,Set/Clear Pending Bit 241" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND240  ,Set/Clear Pending Bit 240" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND239  ,Set/Clear Pending Bit 239" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND238  ,Set/Clear Pending Bit 238" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND237  ,Set/Clear Pending Bit 237" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND236  ,Set/Clear Pending Bit 236" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND235  ,Set/Clear Pending Bit 235" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND234  ,Set/Clear Pending Bit 234" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND233  ,Set/Clear Pending Bit 233" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND232  ,Set/Clear Pending Bit 232" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND231  ,Set/Clear Pending Bit 231" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND230  ,Set/Clear Pending Bit 230" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND229  ,Set/Clear Pending Bit 229" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND228  ,Set/Clear Pending Bit 228" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND227  ,Set/Clear Pending Bit 227" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND226  ,Set/Clear Pending Bit 226" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND225  ,Set/Clear Pending Bit 225" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND224  ,Set/Clear Pending Bit 224" "Not pending,Pending"
else
hgroup.long 0x021C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x0220++0x03
line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND287  ,Set/Clear Pending Bit 287" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND286  ,Set/Clear Pending Bit 286" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND285  ,Set/Clear Pending Bit 285" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND284  ,Set/Clear Pending Bit 284" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND283  ,Set/Clear Pending Bit 283" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND282  ,Set/Clear Pending Bit 282" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND281  ,Set/Clear Pending Bit 281" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND280  ,Set/Clear Pending Bit 280" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND279  ,Set/Clear Pending Bit 279" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND278  ,Set/Clear Pending Bit 278" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND277  ,Set/Clear Pending Bit 277" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND276  ,Set/Clear Pending Bit 276" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND275  ,Set/Clear Pending Bit 275" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND274  ,Set/Clear Pending Bit 274" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND273  ,Set/Clear Pending Bit 273" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND272  ,Set/Clear Pending Bit 272" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND271  ,Set/Clear Pending Bit 271" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND270  ,Set/Clear Pending Bit 270" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND269  ,Set/Clear Pending Bit 269" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND268  ,Set/Clear Pending Bit 268" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND267  ,Set/Clear Pending Bit 267" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND266  ,Set/Clear Pending Bit 266" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND265  ,Set/Clear Pending Bit 265" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND264  ,Set/Clear Pending Bit 264" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND263  ,Set/Clear Pending Bit 263" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND262  ,Set/Clear Pending Bit 262" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND261  ,Set/Clear Pending Bit 261" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND260  ,Set/Clear Pending Bit 260" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND259  ,Set/Clear Pending Bit 259" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND258  ,Set/Clear Pending Bit 258" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND257  ,Set/Clear Pending Bit 257" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND256  ,Set/Clear Pending Bit 256" "Not pending,Pending"
else
hgroup.long 0x0220++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x0224++0x03
line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND319  ,Set/Clear Pending Bit 319" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND318  ,Set/Clear Pending Bit 318" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND317  ,Set/Clear Pending Bit 317" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND316  ,Set/Clear Pending Bit 316" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND315  ,Set/Clear Pending Bit 315" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND314  ,Set/Clear Pending Bit 314" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND313  ,Set/Clear Pending Bit 313" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND312  ,Set/Clear Pending Bit 312" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND311  ,Set/Clear Pending Bit 311" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND310  ,Set/Clear Pending Bit 310" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND309  ,Set/Clear Pending Bit 309" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND308  ,Set/Clear Pending Bit 308" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND307  ,Set/Clear Pending Bit 307" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND306  ,Set/Clear Pending Bit 306" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND305  ,Set/Clear Pending Bit 305" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND304  ,Set/Clear Pending Bit 304" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND303  ,Set/Clear Pending Bit 303" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND302  ,Set/Clear Pending Bit 302" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND301  ,Set/Clear Pending Bit 301" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND300  ,Set/Clear Pending Bit 300" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND299  ,Set/Clear Pending Bit 299" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND298  ,Set/Clear Pending Bit 298" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND297  ,Set/Clear Pending Bit 297" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND296  ,Set/Clear Pending Bit 296" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND295  ,Set/Clear Pending Bit 295" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND294  ,Set/Clear Pending Bit 294" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND293  ,Set/Clear Pending Bit 293" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND292  ,Set/Clear Pending Bit 292" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND291  ,Set/Clear Pending Bit 291" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND290  ,Set/Clear Pending Bit 290" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND289  ,Set/Clear Pending Bit 289" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND288  ,Set/Clear Pending Bit 288" "Not pending,Pending"
else
hgroup.long 0x0224++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x0228++0x03
line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND351  ,Set/Clear Pending Bit 351" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND350  ,Set/Clear Pending Bit 350" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND349  ,Set/Clear Pending Bit 349" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND348  ,Set/Clear Pending Bit 348" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND347  ,Set/Clear Pending Bit 347" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND346  ,Set/Clear Pending Bit 346" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND345  ,Set/Clear Pending Bit 345" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND344  ,Set/Clear Pending Bit 344" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND343  ,Set/Clear Pending Bit 343" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND342  ,Set/Clear Pending Bit 342" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND341  ,Set/Clear Pending Bit 341" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND340  ,Set/Clear Pending Bit 340" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND339  ,Set/Clear Pending Bit 339" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND338  ,Set/Clear Pending Bit 338" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND337  ,Set/Clear Pending Bit 337" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND336  ,Set/Clear Pending Bit 336" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND335  ,Set/Clear Pending Bit 335" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND334  ,Set/Clear Pending Bit 334" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND333  ,Set/Clear Pending Bit 333" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND332  ,Set/Clear Pending Bit 332" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND331  ,Set/Clear Pending Bit 331" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND330  ,Set/Clear Pending Bit 330" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND329  ,Set/Clear Pending Bit 329" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND328  ,Set/Clear Pending Bit 328" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND327  ,Set/Clear Pending Bit 327" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND326  ,Set/Clear Pending Bit 326" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND325  ,Set/Clear Pending Bit 325" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND324  ,Set/Clear Pending Bit 324" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND323  ,Set/Clear Pending Bit 323" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND322  ,Set/Clear Pending Bit 322" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND321  ,Set/Clear Pending Bit 321" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND320  ,Set/Clear Pending Bit 320" "Not pending,Pending"
else
hgroup.long 0x0228++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x022C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND383  ,Set/Clear Pending Bit 383" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND382  ,Set/Clear Pending Bit 382" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND381  ,Set/Clear Pending Bit 381" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND380  ,Set/Clear Pending Bit 380" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND379  ,Set/Clear Pending Bit 379" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND378  ,Set/Clear Pending Bit 378" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND377  ,Set/Clear Pending Bit 377" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND376  ,Set/Clear Pending Bit 376" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND375  ,Set/Clear Pending Bit 375" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND374  ,Set/Clear Pending Bit 374" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND373  ,Set/Clear Pending Bit 373" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND372  ,Set/Clear Pending Bit 372" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND371  ,Set/Clear Pending Bit 371" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND370  ,Set/Clear Pending Bit 370" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND369  ,Set/Clear Pending Bit 369" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND368  ,Set/Clear Pending Bit 368" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND367  ,Set/Clear Pending Bit 367" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND366  ,Set/Clear Pending Bit 366" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND365  ,Set/Clear Pending Bit 365" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND364  ,Set/Clear Pending Bit 364" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND363  ,Set/Clear Pending Bit 363" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND362  ,Set/Clear Pending Bit 362" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND361  ,Set/Clear Pending Bit 361" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND360  ,Set/Clear Pending Bit 360" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND359  ,Set/Clear Pending Bit 359" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND358  ,Set/Clear Pending Bit 358" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND357  ,Set/Clear Pending Bit 357" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND356  ,Set/Clear Pending Bit 356" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND355  ,Set/Clear Pending Bit 355" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND354  ,Set/Clear Pending Bit 354" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND353  ,Set/Clear Pending Bit 353" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND352  ,Set/Clear Pending Bit 352" "Not pending,Pending"
else
hgroup.long 0x022C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x0230++0x03
line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND415  ,Set/Clear Pending Bit 415" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND414  ,Set/Clear Pending Bit 414" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND413  ,Set/Clear Pending Bit 413" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND412  ,Set/Clear Pending Bit 412" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND411  ,Set/Clear Pending Bit 411" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND410  ,Set/Clear Pending Bit 410" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND409  ,Set/Clear Pending Bit 409" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND408  ,Set/Clear Pending Bit 408" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND407  ,Set/Clear Pending Bit 407" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND406  ,Set/Clear Pending Bit 406" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND405  ,Set/Clear Pending Bit 405" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND404  ,Set/Clear Pending Bit 404" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND403  ,Set/Clear Pending Bit 403" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND402  ,Set/Clear Pending Bit 402" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND401  ,Set/Clear Pending Bit 401" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND400  ,Set/Clear Pending Bit 400" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND399  ,Set/Clear Pending Bit 399" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND398  ,Set/Clear Pending Bit 398" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND397  ,Set/Clear Pending Bit 397" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND396  ,Set/Clear Pending Bit 396" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND395  ,Set/Clear Pending Bit 395" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND394  ,Set/Clear Pending Bit 394" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND393  ,Set/Clear Pending Bit 393" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND392  ,Set/Clear Pending Bit 392" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND391  ,Set/Clear Pending Bit 391" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND390  ,Set/Clear Pending Bit 390" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND389  ,Set/Clear Pending Bit 389" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND388  ,Set/Clear Pending Bit 388" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND387  ,Set/Clear Pending Bit 387" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND386  ,Set/Clear Pending Bit 386" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND385  ,Set/Clear Pending Bit 385" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND384  ,Set/Clear Pending Bit 384" "Not pending,Pending"
else
hgroup.long 0x0230++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x0234++0x03
line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND447  ,Set/Clear Pending Bit 447" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND446  ,Set/Clear Pending Bit 446" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND445  ,Set/Clear Pending Bit 445" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND444  ,Set/Clear Pending Bit 444" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND443  ,Set/Clear Pending Bit 443" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND442  ,Set/Clear Pending Bit 442" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND441  ,Set/Clear Pending Bit 441" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND440  ,Set/Clear Pending Bit 440" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND439  ,Set/Clear Pending Bit 439" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND438  ,Set/Clear Pending Bit 438" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND437  ,Set/Clear Pending Bit 437" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND436  ,Set/Clear Pending Bit 436" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND435  ,Set/Clear Pending Bit 435" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND434  ,Set/Clear Pending Bit 434" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND433  ,Set/Clear Pending Bit 433" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND432  ,Set/Clear Pending Bit 432" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND431  ,Set/Clear Pending Bit 431" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND430  ,Set/Clear Pending Bit 430" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND429  ,Set/Clear Pending Bit 429" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND428  ,Set/Clear Pending Bit 428" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND427  ,Set/Clear Pending Bit 427" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND426  ,Set/Clear Pending Bit 426" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND425  ,Set/Clear Pending Bit 425" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND424  ,Set/Clear Pending Bit 424" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND423  ,Set/Clear Pending Bit 423" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND422  ,Set/Clear Pending Bit 422" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND421  ,Set/Clear Pending Bit 421" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND420  ,Set/Clear Pending Bit 420" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND419  ,Set/Clear Pending Bit 419" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND418  ,Set/Clear Pending Bit 418" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND417  ,Set/Clear Pending Bit 417" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND416  ,Set/Clear Pending Bit 416" "Not pending,Pending"
else
hgroup.long 0x0234++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x0238++0x03
line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND479  ,Set/Clear Pending Bit 479" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND478  ,Set/Clear Pending Bit 478" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND477  ,Set/Clear Pending Bit 477" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND476  ,Set/Clear Pending Bit 476" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND475  ,Set/Clear Pending Bit 475" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND474  ,Set/Clear Pending Bit 474" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND473  ,Set/Clear Pending Bit 473" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND472  ,Set/Clear Pending Bit 472" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND471  ,Set/Clear Pending Bit 471" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND470  ,Set/Clear Pending Bit 470" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND469  ,Set/Clear Pending Bit 469" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND468  ,Set/Clear Pending Bit 468" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND467  ,Set/Clear Pending Bit 467" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND466  ,Set/Clear Pending Bit 466" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND465  ,Set/Clear Pending Bit 465" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND464  ,Set/Clear Pending Bit 464" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND463  ,Set/Clear Pending Bit 463" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND462  ,Set/Clear Pending Bit 462" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND461  ,Set/Clear Pending Bit 461" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND460  ,Set/Clear Pending Bit 460" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND459  ,Set/Clear Pending Bit 459" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND458  ,Set/Clear Pending Bit 458" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND457  ,Set/Clear Pending Bit 457" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND456  ,Set/Clear Pending Bit 456" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND455  ,Set/Clear Pending Bit 455" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND454  ,Set/Clear Pending Bit 454" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND453  ,Set/Clear Pending Bit 453" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND452  ,Set/Clear Pending Bit 452" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND451  ,Set/Clear Pending Bit 451" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND450  ,Set/Clear Pending Bit 450" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND449  ,Set/Clear Pending Bit 449" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND448  ,Set/Clear Pending Bit 448" "Not pending,Pending"
else
hgroup.long 0x0238++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x023C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND511  ,Set/Clear Pending Bit 511" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND510  ,Set/Clear Pending Bit 510" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND509  ,Set/Clear Pending Bit 509" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND508  ,Set/Clear Pending Bit 508" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND507  ,Set/Clear Pending Bit 507" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND506  ,Set/Clear Pending Bit 506" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND505  ,Set/Clear Pending Bit 505" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND504  ,Set/Clear Pending Bit 504" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND503  ,Set/Clear Pending Bit 503" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND502  ,Set/Clear Pending Bit 502" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND501  ,Set/Clear Pending Bit 501" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND500  ,Set/Clear Pending Bit 500" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND499  ,Set/Clear Pending Bit 499" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND498  ,Set/Clear Pending Bit 498" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND497  ,Set/Clear Pending Bit 497" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND496  ,Set/Clear Pending Bit 496" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND495  ,Set/Clear Pending Bit 495" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND494  ,Set/Clear Pending Bit 494" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND493  ,Set/Clear Pending Bit 493" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND492  ,Set/Clear Pending Bit 492" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND491  ,Set/Clear Pending Bit 491" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND490  ,Set/Clear Pending Bit 490" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND489  ,Set/Clear Pending Bit 489" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND488  ,Set/Clear Pending Bit 488" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND487  ,Set/Clear Pending Bit 487" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND486  ,Set/Clear Pending Bit 486" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND485  ,Set/Clear Pending Bit 485" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND484  ,Set/Clear Pending Bit 484" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND483  ,Set/Clear Pending Bit 483" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND482  ,Set/Clear Pending Bit 482" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND481  ,Set/Clear Pending Bit 481" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND480  ,Set/Clear Pending Bit 480" "Not pending,Pending"
else
hgroup.long 0x023C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0x0240++0x03
line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND543  ,Set/Clear Pending Bit 543" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND542  ,Set/Clear Pending Bit 542" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND541  ,Set/Clear Pending Bit 541" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND540  ,Set/Clear Pending Bit 540" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND539  ,Set/Clear Pending Bit 539" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND538  ,Set/Clear Pending Bit 538" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND537  ,Set/Clear Pending Bit 537" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND536  ,Set/Clear Pending Bit 536" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND535  ,Set/Clear Pending Bit 535" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND534  ,Set/Clear Pending Bit 534" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND533  ,Set/Clear Pending Bit 533" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND532  ,Set/Clear Pending Bit 532" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND531  ,Set/Clear Pending Bit 531" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND530  ,Set/Clear Pending Bit 530" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND529  ,Set/Clear Pending Bit 529" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND528  ,Set/Clear Pending Bit 528" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND527  ,Set/Clear Pending Bit 527" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND526  ,Set/Clear Pending Bit 526" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND525  ,Set/Clear Pending Bit 525" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND524  ,Set/Clear Pending Bit 524" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND523  ,Set/Clear Pending Bit 523" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND522  ,Set/Clear Pending Bit 522" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND521  ,Set/Clear Pending Bit 521" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND520  ,Set/Clear Pending Bit 520" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND519  ,Set/Clear Pending Bit 519" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND518  ,Set/Clear Pending Bit 518" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND517  ,Set/Clear Pending Bit 517" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND516  ,Set/Clear Pending Bit 516" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND515  ,Set/Clear Pending Bit 515" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND514  ,Set/Clear Pending Bit 514" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND513  ,Set/Clear Pending Bit 513" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND512  ,Set/Clear Pending Bit 512" "Not pending,Pending"
else
hgroup.long 0x0240++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0x0244++0x03
line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND575  ,Set/Clear Pending Bit 575" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND574  ,Set/Clear Pending Bit 574" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND573  ,Set/Clear Pending Bit 573" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND572  ,Set/Clear Pending Bit 572" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND571  ,Set/Clear Pending Bit 571" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND570  ,Set/Clear Pending Bit 570" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND569  ,Set/Clear Pending Bit 569" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND568  ,Set/Clear Pending Bit 568" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND567  ,Set/Clear Pending Bit 567" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND566  ,Set/Clear Pending Bit 566" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND565  ,Set/Clear Pending Bit 565" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND564  ,Set/Clear Pending Bit 564" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND563  ,Set/Clear Pending Bit 563" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND562  ,Set/Clear Pending Bit 562" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND561  ,Set/Clear Pending Bit 561" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND560  ,Set/Clear Pending Bit 560" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND559  ,Set/Clear Pending Bit 559" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND558  ,Set/Clear Pending Bit 558" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND557  ,Set/Clear Pending Bit 557" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND556  ,Set/Clear Pending Bit 556" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND555  ,Set/Clear Pending Bit 555" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND554  ,Set/Clear Pending Bit 554" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND553  ,Set/Clear Pending Bit 553" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND552  ,Set/Clear Pending Bit 552" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND551  ,Set/Clear Pending Bit 551" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND550  ,Set/Clear Pending Bit 550" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND549  ,Set/Clear Pending Bit 549" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND548  ,Set/Clear Pending Bit 548" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND547  ,Set/Clear Pending Bit 547" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND546  ,Set/Clear Pending Bit 546" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND545  ,Set/Clear Pending Bit 545" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND544  ,Set/Clear Pending Bit 544" "Not pending,Pending"
else
hgroup.long 0x0244++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0x0248++0x03
line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND607  ,Set/Clear Pending Bit 607" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND606  ,Set/Clear Pending Bit 606" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND605  ,Set/Clear Pending Bit 605" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND604  ,Set/Clear Pending Bit 604" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND603  ,Set/Clear Pending Bit 603" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND602  ,Set/Clear Pending Bit 602" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND601  ,Set/Clear Pending Bit 601" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND600  ,Set/Clear Pending Bit 600" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND599  ,Set/Clear Pending Bit 599" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND598  ,Set/Clear Pending Bit 598" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND597  ,Set/Clear Pending Bit 597" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND596  ,Set/Clear Pending Bit 596" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND595  ,Set/Clear Pending Bit 595" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND594  ,Set/Clear Pending Bit 594" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND593  ,Set/Clear Pending Bit 593" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND592  ,Set/Clear Pending Bit 592" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND591  ,Set/Clear Pending Bit 591" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND590  ,Set/Clear Pending Bit 590" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND589  ,Set/Clear Pending Bit 589" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND588  ,Set/Clear Pending Bit 588" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND587  ,Set/Clear Pending Bit 587" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND586  ,Set/Clear Pending Bit 586" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND585  ,Set/Clear Pending Bit 585" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND584  ,Set/Clear Pending Bit 584" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND583  ,Set/Clear Pending Bit 583" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND582  ,Set/Clear Pending Bit 582" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND581  ,Set/Clear Pending Bit 581" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND580  ,Set/Clear Pending Bit 580" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND579  ,Set/Clear Pending Bit 579" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND578  ,Set/Clear Pending Bit 578" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND577  ,Set/Clear Pending Bit 577" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND576  ,Set/Clear Pending Bit 576" "Not pending,Pending"
else
hgroup.long 0x0248++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0x024C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND639  ,Set/Clear Pending Bit 639" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND638  ,Set/Clear Pending Bit 638" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND637  ,Set/Clear Pending Bit 637" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND636  ,Set/Clear Pending Bit 636" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND635  ,Set/Clear Pending Bit 635" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND634  ,Set/Clear Pending Bit 634" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND633  ,Set/Clear Pending Bit 633" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND632  ,Set/Clear Pending Bit 632" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND631  ,Set/Clear Pending Bit 631" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND630  ,Set/Clear Pending Bit 630" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND629  ,Set/Clear Pending Bit 629" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND628  ,Set/Clear Pending Bit 628" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND627  ,Set/Clear Pending Bit 627" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND626  ,Set/Clear Pending Bit 626" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND625  ,Set/Clear Pending Bit 625" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND624  ,Set/Clear Pending Bit 624" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND623  ,Set/Clear Pending Bit 623" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND622  ,Set/Clear Pending Bit 622" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND621  ,Set/Clear Pending Bit 621" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND620  ,Set/Clear Pending Bit 620" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND619  ,Set/Clear Pending Bit 619" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND618  ,Set/Clear Pending Bit 618" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND617  ,Set/Clear Pending Bit 617" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND616  ,Set/Clear Pending Bit 616" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND615  ,Set/Clear Pending Bit 615" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND614  ,Set/Clear Pending Bit 614" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND613  ,Set/Clear Pending Bit 613" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND612  ,Set/Clear Pending Bit 612" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND611  ,Set/Clear Pending Bit 611" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND610  ,Set/Clear Pending Bit 610" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND609  ,Set/Clear Pending Bit 609" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND608  ,Set/Clear Pending Bit 608" "Not pending,Pending"
else
hgroup.long 0x024C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0x0250++0x03
line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND671  ,Set/Clear Pending Bit 671" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND670  ,Set/Clear Pending Bit 670" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND669  ,Set/Clear Pending Bit 669" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND668  ,Set/Clear Pending Bit 668" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND667  ,Set/Clear Pending Bit 667" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND666  ,Set/Clear Pending Bit 666" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND665  ,Set/Clear Pending Bit 665" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND664  ,Set/Clear Pending Bit 664" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND663  ,Set/Clear Pending Bit 663" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND662  ,Set/Clear Pending Bit 662" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND661  ,Set/Clear Pending Bit 661" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND660  ,Set/Clear Pending Bit 660" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND659  ,Set/Clear Pending Bit 659" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND658  ,Set/Clear Pending Bit 658" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND657  ,Set/Clear Pending Bit 657" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND656  ,Set/Clear Pending Bit 656" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND655  ,Set/Clear Pending Bit 655" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND654  ,Set/Clear Pending Bit 654" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND653  ,Set/Clear Pending Bit 653" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND652  ,Set/Clear Pending Bit 652" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND651  ,Set/Clear Pending Bit 651" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND650  ,Set/Clear Pending Bit 650" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND649  ,Set/Clear Pending Bit 649" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND648  ,Set/Clear Pending Bit 648" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND647  ,Set/Clear Pending Bit 647" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND646  ,Set/Clear Pending Bit 646" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND645  ,Set/Clear Pending Bit 645" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND644  ,Set/Clear Pending Bit 644" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND643  ,Set/Clear Pending Bit 643" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND642  ,Set/Clear Pending Bit 642" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND641  ,Set/Clear Pending Bit 641" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND640  ,Set/Clear Pending Bit 640" "Not pending,Pending"
else
hgroup.long 0x0250++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0x0254++0x03
line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND703  ,Set/Clear Pending Bit 703" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND702  ,Set/Clear Pending Bit 702" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND701  ,Set/Clear Pending Bit 701" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND700  ,Set/Clear Pending Bit 700" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND699  ,Set/Clear Pending Bit 699" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND698  ,Set/Clear Pending Bit 698" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND697  ,Set/Clear Pending Bit 697" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND696  ,Set/Clear Pending Bit 696" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND695  ,Set/Clear Pending Bit 695" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND694  ,Set/Clear Pending Bit 694" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND693  ,Set/Clear Pending Bit 693" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND692  ,Set/Clear Pending Bit 692" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND691  ,Set/Clear Pending Bit 691" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND690  ,Set/Clear Pending Bit 690" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND689  ,Set/Clear Pending Bit 689" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND688  ,Set/Clear Pending Bit 688" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND687  ,Set/Clear Pending Bit 687" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND686  ,Set/Clear Pending Bit 686" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND685  ,Set/Clear Pending Bit 685" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND684  ,Set/Clear Pending Bit 684" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND683  ,Set/Clear Pending Bit 683" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND682  ,Set/Clear Pending Bit 682" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND681  ,Set/Clear Pending Bit 681" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND680  ,Set/Clear Pending Bit 680" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND679  ,Set/Clear Pending Bit 679" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND678  ,Set/Clear Pending Bit 678" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND677  ,Set/Clear Pending Bit 677" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND676  ,Set/Clear Pending Bit 676" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND675  ,Set/Clear Pending Bit 675" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND674  ,Set/Clear Pending Bit 674" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND673  ,Set/Clear Pending Bit 673" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND672  ,Set/Clear Pending Bit 672" "Not pending,Pending"
else
hgroup.long 0x0254++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0x0258++0x03
line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND735  ,Set/Clear Pending Bit 735" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND734  ,Set/Clear Pending Bit 734" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND733  ,Set/Clear Pending Bit 733" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND732  ,Set/Clear Pending Bit 732" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND731  ,Set/Clear Pending Bit 731" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND730  ,Set/Clear Pending Bit 730" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND729  ,Set/Clear Pending Bit 729" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND728  ,Set/Clear Pending Bit 728" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND727  ,Set/Clear Pending Bit 727" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND726  ,Set/Clear Pending Bit 726" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND725  ,Set/Clear Pending Bit 725" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND724  ,Set/Clear Pending Bit 724" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND723  ,Set/Clear Pending Bit 723" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND722  ,Set/Clear Pending Bit 722" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND721  ,Set/Clear Pending Bit 721" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND720  ,Set/Clear Pending Bit 720" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND719  ,Set/Clear Pending Bit 719" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND718  ,Set/Clear Pending Bit 718" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND717  ,Set/Clear Pending Bit 717" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND716  ,Set/Clear Pending Bit 716" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND715  ,Set/Clear Pending Bit 715" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND714  ,Set/Clear Pending Bit 714" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND713  ,Set/Clear Pending Bit 713" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND712  ,Set/Clear Pending Bit 712" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND711  ,Set/Clear Pending Bit 711" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND710  ,Set/Clear Pending Bit 710" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND709  ,Set/Clear Pending Bit 709" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND708  ,Set/Clear Pending Bit 708" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND707  ,Set/Clear Pending Bit 707" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND706  ,Set/Clear Pending Bit 706" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND705  ,Set/Clear Pending Bit 705" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND704  ,Set/Clear Pending Bit 704" "Not pending,Pending"
else
hgroup.long 0x0258++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0x025C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND767  ,Set/Clear Pending Bit 767" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND766  ,Set/Clear Pending Bit 766" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND765  ,Set/Clear Pending Bit 765" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND764  ,Set/Clear Pending Bit 764" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND763  ,Set/Clear Pending Bit 763" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND762  ,Set/Clear Pending Bit 762" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND761  ,Set/Clear Pending Bit 761" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND760  ,Set/Clear Pending Bit 760" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND759  ,Set/Clear Pending Bit 759" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND758  ,Set/Clear Pending Bit 758" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND757  ,Set/Clear Pending Bit 757" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND756  ,Set/Clear Pending Bit 756" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND755  ,Set/Clear Pending Bit 755" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND754  ,Set/Clear Pending Bit 754" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND753  ,Set/Clear Pending Bit 753" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND752  ,Set/Clear Pending Bit 752" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND751  ,Set/Clear Pending Bit 751" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND750  ,Set/Clear Pending Bit 750" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND749  ,Set/Clear Pending Bit 749" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND748  ,Set/Clear Pending Bit 748" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND747  ,Set/Clear Pending Bit 747" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND746  ,Set/Clear Pending Bit 746" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND745  ,Set/Clear Pending Bit 745" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND744  ,Set/Clear Pending Bit 744" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND743  ,Set/Clear Pending Bit 743" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND742  ,Set/Clear Pending Bit 742" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND741  ,Set/Clear Pending Bit 741" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND740  ,Set/Clear Pending Bit 740" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND739  ,Set/Clear Pending Bit 739" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND738  ,Set/Clear Pending Bit 738" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND737  ,Set/Clear Pending Bit 737" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND736  ,Set/Clear Pending Bit 736" "Not pending,Pending"
else
hgroup.long 0x025C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0x0260++0x03
line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND799  ,Set/Clear Pending Bit 799" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND798  ,Set/Clear Pending Bit 798" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND797  ,Set/Clear Pending Bit 797" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND796  ,Set/Clear Pending Bit 796" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND795  ,Set/Clear Pending Bit 795" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND794  ,Set/Clear Pending Bit 794" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND793  ,Set/Clear Pending Bit 793" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND792  ,Set/Clear Pending Bit 792" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND791  ,Set/Clear Pending Bit 791" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND790  ,Set/Clear Pending Bit 790" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND789  ,Set/Clear Pending Bit 789" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND788  ,Set/Clear Pending Bit 788" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND787  ,Set/Clear Pending Bit 787" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND786  ,Set/Clear Pending Bit 786" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND785  ,Set/Clear Pending Bit 785" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND784  ,Set/Clear Pending Bit 784" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND783  ,Set/Clear Pending Bit 783" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND782  ,Set/Clear Pending Bit 782" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND781  ,Set/Clear Pending Bit 781" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND780  ,Set/Clear Pending Bit 780" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND779  ,Set/Clear Pending Bit 779" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND778  ,Set/Clear Pending Bit 778" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND777  ,Set/Clear Pending Bit 777" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND776  ,Set/Clear Pending Bit 776" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND775  ,Set/Clear Pending Bit 775" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND774  ,Set/Clear Pending Bit 774" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND773  ,Set/Clear Pending Bit 773" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND772  ,Set/Clear Pending Bit 772" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND771  ,Set/Clear Pending Bit 771" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND770  ,Set/Clear Pending Bit 770" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND769  ,Set/Clear Pending Bit 769" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND768  ,Set/Clear Pending Bit 768" "Not pending,Pending"
else
hgroup.long 0x0260++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0x0264++0x03
line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND831  ,Set/Clear Pending Bit 831" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND830  ,Set/Clear Pending Bit 830" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND829  ,Set/Clear Pending Bit 829" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND828  ,Set/Clear Pending Bit 828" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND827  ,Set/Clear Pending Bit 827" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND826  ,Set/Clear Pending Bit 826" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND825  ,Set/Clear Pending Bit 825" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND824  ,Set/Clear Pending Bit 824" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND823  ,Set/Clear Pending Bit 823" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND822  ,Set/Clear Pending Bit 822" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND821  ,Set/Clear Pending Bit 821" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND820  ,Set/Clear Pending Bit 820" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND819  ,Set/Clear Pending Bit 819" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND818  ,Set/Clear Pending Bit 818" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND817  ,Set/Clear Pending Bit 817" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND816  ,Set/Clear Pending Bit 816" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND815  ,Set/Clear Pending Bit 815" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND814  ,Set/Clear Pending Bit 814" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND813  ,Set/Clear Pending Bit 813" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND812  ,Set/Clear Pending Bit 812" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND811  ,Set/Clear Pending Bit 811" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND810  ,Set/Clear Pending Bit 810" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND809  ,Set/Clear Pending Bit 809" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND808  ,Set/Clear Pending Bit 808" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND807  ,Set/Clear Pending Bit 807" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND806  ,Set/Clear Pending Bit 806" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND805  ,Set/Clear Pending Bit 805" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND804  ,Set/Clear Pending Bit 804" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND803  ,Set/Clear Pending Bit 803" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND802  ,Set/Clear Pending Bit 802" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND801  ,Set/Clear Pending Bit 801" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND800  ,Set/Clear Pending Bit 800" "Not pending,Pending"
else
hgroup.long 0x0264++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0x0268++0x03
line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND863  ,Set/Clear Pending Bit 863" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND862  ,Set/Clear Pending Bit 862" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND861  ,Set/Clear Pending Bit 861" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND860  ,Set/Clear Pending Bit 860" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND859  ,Set/Clear Pending Bit 859" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND858  ,Set/Clear Pending Bit 858" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND857  ,Set/Clear Pending Bit 857" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND856  ,Set/Clear Pending Bit 856" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND855  ,Set/Clear Pending Bit 855" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND854  ,Set/Clear Pending Bit 854" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND853  ,Set/Clear Pending Bit 853" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND852  ,Set/Clear Pending Bit 852" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND851  ,Set/Clear Pending Bit 851" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND850  ,Set/Clear Pending Bit 850" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND849  ,Set/Clear Pending Bit 849" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND848  ,Set/Clear Pending Bit 848" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND847  ,Set/Clear Pending Bit 847" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND846  ,Set/Clear Pending Bit 846" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND845  ,Set/Clear Pending Bit 845" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND844  ,Set/Clear Pending Bit 844" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND843  ,Set/Clear Pending Bit 843" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND842  ,Set/Clear Pending Bit 842" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND841  ,Set/Clear Pending Bit 841" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND840  ,Set/Clear Pending Bit 840" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND839  ,Set/Clear Pending Bit 839" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND838  ,Set/Clear Pending Bit 838" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND837  ,Set/Clear Pending Bit 837" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND836  ,Set/Clear Pending Bit 836" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND835  ,Set/Clear Pending Bit 835" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND834  ,Set/Clear Pending Bit 834" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND833  ,Set/Clear Pending Bit 833" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND832  ,Set/Clear Pending Bit 832" "Not pending,Pending"
else
hgroup.long 0x0268++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0x026C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND895  ,Set/Clear Pending Bit 895" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND894  ,Set/Clear Pending Bit 894" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND893  ,Set/Clear Pending Bit 893" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND892  ,Set/Clear Pending Bit 892" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND891  ,Set/Clear Pending Bit 891" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND890  ,Set/Clear Pending Bit 890" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND889  ,Set/Clear Pending Bit 889" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND888  ,Set/Clear Pending Bit 888" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND887  ,Set/Clear Pending Bit 887" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND886  ,Set/Clear Pending Bit 886" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND885  ,Set/Clear Pending Bit 885" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND884  ,Set/Clear Pending Bit 884" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND883  ,Set/Clear Pending Bit 883" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND882  ,Set/Clear Pending Bit 882" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND881  ,Set/Clear Pending Bit 881" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND880  ,Set/Clear Pending Bit 880" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND879  ,Set/Clear Pending Bit 879" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND878  ,Set/Clear Pending Bit 878" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND877  ,Set/Clear Pending Bit 877" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND876  ,Set/Clear Pending Bit 876" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND875  ,Set/Clear Pending Bit 875" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND874  ,Set/Clear Pending Bit 874" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND873  ,Set/Clear Pending Bit 873" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND872  ,Set/Clear Pending Bit 872" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND871  ,Set/Clear Pending Bit 871" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND870  ,Set/Clear Pending Bit 870" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND869  ,Set/Clear Pending Bit 869" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND868  ,Set/Clear Pending Bit 868" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND867  ,Set/Clear Pending Bit 867" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND866  ,Set/Clear Pending Bit 866" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND865  ,Set/Clear Pending Bit 865" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND864  ,Set/Clear Pending Bit 864" "Not pending,Pending"
else
hgroup.long 0x026C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0x0270++0x03
line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND927  ,Set/Clear Pending Bit 927" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND926  ,Set/Clear Pending Bit 926" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND925  ,Set/Clear Pending Bit 925" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND924  ,Set/Clear Pending Bit 924" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND923  ,Set/Clear Pending Bit 923" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND922  ,Set/Clear Pending Bit 922" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND921  ,Set/Clear Pending Bit 921" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND920  ,Set/Clear Pending Bit 920" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND919  ,Set/Clear Pending Bit 919" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND918  ,Set/Clear Pending Bit 918" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND917  ,Set/Clear Pending Bit 917" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND916  ,Set/Clear Pending Bit 916" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND915  ,Set/Clear Pending Bit 915" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND914  ,Set/Clear Pending Bit 914" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND913  ,Set/Clear Pending Bit 913" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND912  ,Set/Clear Pending Bit 912" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND911  ,Set/Clear Pending Bit 911" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND910  ,Set/Clear Pending Bit 910" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND909  ,Set/Clear Pending Bit 909" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND908  ,Set/Clear Pending Bit 908" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND907  ,Set/Clear Pending Bit 907" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND906  ,Set/Clear Pending Bit 906" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND905  ,Set/Clear Pending Bit 905" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND904  ,Set/Clear Pending Bit 904" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND903  ,Set/Clear Pending Bit 903" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND902  ,Set/Clear Pending Bit 902" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND901  ,Set/Clear Pending Bit 901" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND900  ,Set/Clear Pending Bit 900" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND899  ,Set/Clear Pending Bit 899" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND898  ,Set/Clear Pending Bit 898" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND897  ,Set/Clear Pending Bit 897" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND896  ,Set/Clear Pending Bit 896" "Not pending,Pending"
else
hgroup.long 0x0270++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0x0274++0x03
line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND959  ,Set/Clear Pending Bit 959" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND958  ,Set/Clear Pending Bit 958" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND957  ,Set/Clear Pending Bit 957" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND956  ,Set/Clear Pending Bit 956" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND955  ,Set/Clear Pending Bit 955" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND954  ,Set/Clear Pending Bit 954" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND953  ,Set/Clear Pending Bit 953" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND952  ,Set/Clear Pending Bit 952" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND951  ,Set/Clear Pending Bit 951" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND950  ,Set/Clear Pending Bit 950" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND949  ,Set/Clear Pending Bit 949" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND948  ,Set/Clear Pending Bit 948" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND947  ,Set/Clear Pending Bit 947" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND946  ,Set/Clear Pending Bit 946" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND945  ,Set/Clear Pending Bit 945" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND944  ,Set/Clear Pending Bit 944" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND943  ,Set/Clear Pending Bit 943" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND942  ,Set/Clear Pending Bit 942" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND941  ,Set/Clear Pending Bit 941" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND940  ,Set/Clear Pending Bit 940" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND939  ,Set/Clear Pending Bit 939" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND938  ,Set/Clear Pending Bit 938" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND937  ,Set/Clear Pending Bit 937" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND936  ,Set/Clear Pending Bit 936" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND935  ,Set/Clear Pending Bit 935" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND934  ,Set/Clear Pending Bit 934" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND933  ,Set/Clear Pending Bit 933" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND932  ,Set/Clear Pending Bit 932" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND931  ,Set/Clear Pending Bit 931" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND930  ,Set/Clear Pending Bit 930" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND929  ,Set/Clear Pending Bit 929" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND928  ,Set/Clear Pending Bit 928" "Not pending,Pending"
else
hgroup.long 0x0274++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0x0278++0x03
line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND991  ,Set/Clear Pending Bit 991" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND990  ,Set/Clear Pending Bit 990" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND989  ,Set/Clear Pending Bit 989" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND988  ,Set/Clear Pending Bit 988" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND987  ,Set/Clear Pending Bit 987" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND986  ,Set/Clear Pending Bit 986" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND985  ,Set/Clear Pending Bit 985" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND984  ,Set/Clear Pending Bit 984" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND983  ,Set/Clear Pending Bit 983" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND982  ,Set/Clear Pending Bit 982" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND981  ,Set/Clear Pending Bit 981" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND980  ,Set/Clear Pending Bit 980" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND979  ,Set/Clear Pending Bit 979" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND978  ,Set/Clear Pending Bit 978" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND977  ,Set/Clear Pending Bit 977" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND976  ,Set/Clear Pending Bit 976" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND975  ,Set/Clear Pending Bit 975" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND974  ,Set/Clear Pending Bit 974" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND973  ,Set/Clear Pending Bit 973" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND972  ,Set/Clear Pending Bit 972" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND971  ,Set/Clear Pending Bit 971" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND970  ,Set/Clear Pending Bit 970" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND969  ,Set/Clear Pending Bit 969" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND968  ,Set/Clear Pending Bit 968" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND967  ,Set/Clear Pending Bit 967" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND966  ,Set/Clear Pending Bit 966" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND965  ,Set/Clear Pending Bit 965" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND964  ,Set/Clear Pending Bit 964" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND963  ,Set/Clear Pending Bit 963" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND962  ,Set/Clear Pending Bit 962" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND961  ,Set/Clear Pending Bit 961" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND960  ,Set/Clear Pending Bit 960" "Not pending,Pending"
else
hgroup.long 0x0278++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
endif
tree.end
width 24.
tree "Set/Clear Active Registers"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x0300++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
else
group.long 0x0300++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE31  ,Set/Clear Active Bit 31" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE30  ,Set/Clear Active Bit 30" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE29  ,Set/Clear Active Bit 29" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE28  ,Set/Clear Active Bit 28" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE27  ,Set/Clear Active Bit 27" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE26  ,Set/Clear Active Bit 26" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE25  ,Set/Clear Active Bit 25" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE24  ,Set/Clear Active Bit 24" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE23  ,Set/Clear Active Bit 23" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE22  ,Set/Clear Active Bit 22" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE21  ,Set/Clear Active Bit 21" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE20  ,Set/Clear Active Bit 20" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE19  ,Set/Clear Active Bit 19" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE18  ,Set/Clear Active Bit 18" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE17  ,Set/Clear Active Bit 17" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE16  ,Set/Clear Active Bit 16" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE15  ,Set/Clear Active Bit 15" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE14  ,Set/Clear Active Bit 14" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE13  ,Set/Clear Active Bit 13" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE12  ,Set/Clear Active Bit 12" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE11  ,Set/Clear Active Bit 11" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE10  ,Set/Clear Active Bit 10" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE9   ,Set/Clear Active Bit 9" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE8   ,Set/Clear Active Bit 8" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE7   ,Set/Clear Active Bit 7" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE6   ,Set/Clear Active Bit 6" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE5   ,Set/Clear Active Bit 5" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE4   ,Set/Clear Active Bit 4" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE3   ,Set/Clear Active Bit 3" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE2   ,Set/Clear Active Bit 2" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE1   ,Set/Clear Active Bit 1" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE0   ,Set/Clear Active Bit 0" "Not active,Active"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x0304++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE63  ,Set/Clear Active Bit 63" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE62  ,Set/Clear Active Bit 62" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE61  ,Set/Clear Active Bit 61" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE60  ,Set/Clear Active Bit 60" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE59  ,Set/Clear Active Bit 59" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE58  ,Set/Clear Active Bit 58" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE57  ,Set/Clear Active Bit 57" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE56  ,Set/Clear Active Bit 56" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE55  ,Set/Clear Active Bit 55" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE54  ,Set/Clear Active Bit 54" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE53  ,Set/Clear Active Bit 53" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE52  ,Set/Clear Active Bit 52" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE51  ,Set/Clear Active Bit 51" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE50  ,Set/Clear Active Bit 50" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE49  ,Set/Clear Active Bit 49" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE48  ,Set/Clear Active Bit 48" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE47  ,Set/Clear Active Bit 47" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE46  ,Set/Clear Active Bit 46" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE45  ,Set/Clear Active Bit 45" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE44  ,Set/Clear Active Bit 44" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE43  ,Set/Clear Active Bit 43" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE42  ,Set/Clear Active Bit 42" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE41  ,Set/Clear Active Bit 41" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE40  ,Set/Clear Active Bit 40" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE39  ,Set/Clear Active Bit 39" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE38  ,Set/Clear Active Bit 38" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE37  ,Set/Clear Active Bit 37" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE36  ,Set/Clear Active Bit 36" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE35  ,Set/Clear Active Bit 35" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE34  ,Set/Clear Active Bit 34" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE33  ,Set/Clear Active Bit 33" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE32  ,Set/Clear Active Bit 32" "Not active,Active"
else
hgroup.long 0x0304++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x0308++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE95  ,Set/Clear Active Bit 95" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE94  ,Set/Clear Active Bit 94" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE93  ,Set/Clear Active Bit 93" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE92  ,Set/Clear Active Bit 92" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE91  ,Set/Clear Active Bit 91" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE90  ,Set/Clear Active Bit 90" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE89  ,Set/Clear Active Bit 89" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE88  ,Set/Clear Active Bit 88" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE87  ,Set/Clear Active Bit 87" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE86  ,Set/Clear Active Bit 86" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE85  ,Set/Clear Active Bit 85" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE84  ,Set/Clear Active Bit 84" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE83  ,Set/Clear Active Bit 83" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE82  ,Set/Clear Active Bit 82" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE81  ,Set/Clear Active Bit 81" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE80  ,Set/Clear Active Bit 80" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE79  ,Set/Clear Active Bit 79" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE78  ,Set/Clear Active Bit 78" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE77  ,Set/Clear Active Bit 77" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE76  ,Set/Clear Active Bit 76" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE75  ,Set/Clear Active Bit 75" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE74  ,Set/Clear Active Bit 74" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE73  ,Set/Clear Active Bit 73" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE72  ,Set/Clear Active Bit 72" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE71  ,Set/Clear Active Bit 71" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE70  ,Set/Clear Active Bit 70" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE69  ,Set/Clear Active Bit 69" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE68  ,Set/Clear Active Bit 68" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE67  ,Set/Clear Active Bit 67" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE66  ,Set/Clear Active Bit 66" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE65  ,Set/Clear Active Bit 65" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE64  ,Set/Clear Active Bit 64" "Not active,Active"
else
hgroup.long 0x0308++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x030C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE127 ,Set/Clear Active Bit 127" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE126 ,Set/Clear Active Bit 126" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE125 ,Set/Clear Active Bit 125" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE124 ,Set/Clear Active Bit 124" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE123 ,Set/Clear Active Bit 123" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE122 ,Set/Clear Active Bit 122" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE121 ,Set/Clear Active Bit 121" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE120 ,Set/Clear Active Bit 120" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE119 ,Set/Clear Active Bit 119" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE118 ,Set/Clear Active Bit 118" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE117 ,Set/Clear Active Bit 117" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE116 ,Set/Clear Active Bit 116" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE115 ,Set/Clear Active Bit 115" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE114 ,Set/Clear Active Bit 114" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE113 ,Set/Clear Active Bit 113" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE112 ,Set/Clear Active Bit 112" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE111 ,Set/Clear Active Bit 111" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE110 ,Set/Clear Active Bit 110" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE109 ,Set/Clear Active Bit 109" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE108 ,Set/Clear Active Bit 108" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE107 ,Set/Clear Active Bit 107" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE106 ,Set/Clear Active Bit 106" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE105 ,Set/Clear Active Bit 105" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE104 ,Set/Clear Active Bit 104" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE103 ,Set/Clear Active Bit 103" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE102 ,Set/Clear Active Bit 102" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE101 ,Set/Clear Active Bit 101" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE100 ,Set/Clear Active Bit 100" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE99  ,Set/Clear Active Bit 99" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE98  ,Set/Clear Active Bit 98" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE97  ,Set/Clear Active Bit 97" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE96  ,Set/Clear Active Bit 96" "Not active,Active"
else
hgroup.long 0x030C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x0310++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE159 ,Set/Clear Active Bit 159" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE158 ,Set/Clear Active Bit 158" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE157 ,Set/Clear Active Bit 157" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE156 ,Set/Clear Active Bit 156" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE155 ,Set/Clear Active Bit 155" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE154 ,Set/Clear Active Bit 154" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE153 ,Set/Clear Active Bit 153" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE152 ,Set/Clear Active Bit 152" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE151 ,Set/Clear Active Bit 151" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE150 ,Set/Clear Active Bit 150" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE149 ,Set/Clear Active Bit 149" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE148 ,Set/Clear Active Bit 148" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE147 ,Set/Clear Active Bit 147" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE146 ,Set/Clear Active Bit 146" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE145 ,Set/Clear Active Bit 145" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE144 ,Set/Clear Active Bit 144" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE143 ,Set/Clear Active Bit 143" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE142 ,Set/Clear Active Bit 142" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE141 ,Set/Clear Active Bit 141" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE140 ,Set/Clear Active Bit 140" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE139 ,Set/Clear Active Bit 139" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE138 ,Set/Clear Active Bit 138" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE137 ,Set/Clear Active Bit 137" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE136 ,Set/Clear Active Bit 136" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE135 ,Set/Clear Active Bit 135" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE134 ,Set/Clear Active Bit 134" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE133 ,Set/Clear Active Bit 133" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE132 ,Set/Clear Active Bit 132" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE131 ,Set/Clear Active Bit 131" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE130 ,Set/Clear Active Bit 130" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE129 ,Set/Clear Active Bit 129" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE128 ,Set/Clear Active Bit 128" "Not active,Active"
else
hgroup.long 0x0310++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x0314++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE191 ,Set/Clear Active Bit 191" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE190 ,Set/Clear Active Bit 190" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE189 ,Set/Clear Active Bit 189" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE188 ,Set/Clear Active Bit 188" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE187 ,Set/Clear Active Bit 187" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE186 ,Set/Clear Active Bit 186" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE185 ,Set/Clear Active Bit 185" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE184 ,Set/Clear Active Bit 184" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE183 ,Set/Clear Active Bit 183" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE182 ,Set/Clear Active Bit 182" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE181 ,Set/Clear Active Bit 181" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE180 ,Set/Clear Active Bit 180" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE179 ,Set/Clear Active Bit 179" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE178 ,Set/Clear Active Bit 178" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE177 ,Set/Clear Active Bit 177" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE176 ,Set/Clear Active Bit 176" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE175 ,Set/Clear Active Bit 175" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE174 ,Set/Clear Active Bit 174" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE173 ,Set/Clear Active Bit 173" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE172 ,Set/Clear Active Bit 172" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE171 ,Set/Clear Active Bit 171" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE170 ,Set/Clear Active Bit 170" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE169 ,Set/Clear Active Bit 169" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE168 ,Set/Clear Active Bit 168" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE167 ,Set/Clear Active Bit 167" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE166 ,Set/Clear Active Bit 166" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE165 ,Set/Clear Active Bit 165" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE164 ,Set/Clear Active Bit 164" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE163 ,Set/Clear Active Bit 163" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE162 ,Set/Clear Active Bit 162" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE161 ,Set/Clear Active Bit 161" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE160 ,Set/Clear Active Bit 160" "Not active,Active"
else
hgroup.long 0x0314++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x0318++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE223 ,Set/Clear Active Bit 223" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE222 ,Set/Clear Active Bit 222" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE221 ,Set/Clear Active Bit 221" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE220 ,Set/Clear Active Bit 220" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE219 ,Set/Clear Active Bit 219" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE218 ,Set/Clear Active Bit 218" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE217 ,Set/Clear Active Bit 217" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE216 ,Set/Clear Active Bit 216" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE215 ,Set/Clear Active Bit 215" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE214 ,Set/Clear Active Bit 214" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE213 ,Set/Clear Active Bit 213" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE212 ,Set/Clear Active Bit 212" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE211 ,Set/Clear Active Bit 211" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE210 ,Set/Clear Active Bit 210" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE209 ,Set/Clear Active Bit 209" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE208 ,Set/Clear Active Bit 208" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE207 ,Set/Clear Active Bit 207" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE206 ,Set/Clear Active Bit 206" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE205 ,Set/Clear Active Bit 205" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE204 ,Set/Clear Active Bit 204" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE203 ,Set/Clear Active Bit 203" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE202 ,Set/Clear Active Bit 202" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE201 ,Set/Clear Active Bit 201" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE200 ,Set/Clear Active Bit 200" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE199 ,Set/Clear Active Bit 199" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE198 ,Set/Clear Active Bit 198" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE197 ,Set/Clear Active Bit 197" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE196 ,Set/Clear Active Bit 196" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE195 ,Set/Clear Active Bit 195" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE194 ,Set/Clear Active Bit 194" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE193 ,Set/Clear Active Bit 193" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE192 ,Set/Clear Active Bit 192" "Not active,Active"
else
hgroup.long 0x0318++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x031C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE255 ,Set/Clear Active Bit 255" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE254 ,Set/Clear Active Bit 254" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE253 ,Set/Clear Active Bit 253" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE252 ,Set/Clear Active Bit 252" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE251 ,Set/Clear Active Bit 251" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE250 ,Set/Clear Active Bit 250" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE249 ,Set/Clear Active Bit 249" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE248 ,Set/Clear Active Bit 248" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE247 ,Set/Clear Active Bit 247" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE246 ,Set/Clear Active Bit 246" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE245 ,Set/Clear Active Bit 245" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE244 ,Set/Clear Active Bit 244" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE243 ,Set/Clear Active Bit 243" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE242 ,Set/Clear Active Bit 242" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE241 ,Set/Clear Active Bit 241" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE240 ,Set/Clear Active Bit 240" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE239 ,Set/Clear Active Bit 239" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE238 ,Set/Clear Active Bit 238" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE237 ,Set/Clear Active Bit 237" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE236 ,Set/Clear Active Bit 236" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE235 ,Set/Clear Active Bit 235" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE234 ,Set/Clear Active Bit 234" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE233 ,Set/Clear Active Bit 233" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE232 ,Set/Clear Active Bit 232" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE231 ,Set/Clear Active Bit 231" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE230 ,Set/Clear Active Bit 230" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE229 ,Set/Clear Active Bit 229" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE228 ,Set/Clear Active Bit 228" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE227 ,Set/Clear Active Bit 227" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE226 ,Set/Clear Active Bit 226" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE225 ,Set/Clear Active Bit 225" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE224 ,Set/Clear Active Bit 224" "Not active,Active"
else
hgroup.long 0x031C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x0320++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE287 ,Set/Clear Active Bit 287" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE286 ,Set/Clear Active Bit 286" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE285 ,Set/Clear Active Bit 285" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE284 ,Set/Clear Active Bit 284" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE283 ,Set/Clear Active Bit 283" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE282 ,Set/Clear Active Bit 282" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE281 ,Set/Clear Active Bit 281" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE280 ,Set/Clear Active Bit 280" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE279 ,Set/Clear Active Bit 279" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE278 ,Set/Clear Active Bit 278" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE277 ,Set/Clear Active Bit 277" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE276 ,Set/Clear Active Bit 276" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE275 ,Set/Clear Active Bit 275" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE274 ,Set/Clear Active Bit 274" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE273 ,Set/Clear Active Bit 273" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE272 ,Set/Clear Active Bit 272" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE271 ,Set/Clear Active Bit 271" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE270 ,Set/Clear Active Bit 270" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE269 ,Set/Clear Active Bit 269" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE268 ,Set/Clear Active Bit 268" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE267 ,Set/Clear Active Bit 267" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE266 ,Set/Clear Active Bit 266" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE265 ,Set/Clear Active Bit 265" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE264 ,Set/Clear Active Bit 264" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE263 ,Set/Clear Active Bit 263" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE262 ,Set/Clear Active Bit 262" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE261 ,Set/Clear Active Bit 261" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE260 ,Set/Clear Active Bit 260" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE259 ,Set/Clear Active Bit 259" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE258 ,Set/Clear Active Bit 258" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE257 ,Set/Clear Active Bit 257" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE256 ,Set/Clear Active Bit 256" "Not active,Active"
else
hgroup.long 0x0320++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x0324++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE319 ,Set/Clear Active Bit 319" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE318 ,Set/Clear Active Bit 318" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE317 ,Set/Clear Active Bit 317" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE316 ,Set/Clear Active Bit 316" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE315 ,Set/Clear Active Bit 315" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE314 ,Set/Clear Active Bit 314" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE313 ,Set/Clear Active Bit 313" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE312 ,Set/Clear Active Bit 312" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE311 ,Set/Clear Active Bit 311" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE310 ,Set/Clear Active Bit 310" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE309 ,Set/Clear Active Bit 309" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE308 ,Set/Clear Active Bit 308" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE307 ,Set/Clear Active Bit 307" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE306 ,Set/Clear Active Bit 306" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE305 ,Set/Clear Active Bit 305" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE304 ,Set/Clear Active Bit 304" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE303 ,Set/Clear Active Bit 303" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE302 ,Set/Clear Active Bit 302" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE301 ,Set/Clear Active Bit 301" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE300 ,Set/Clear Active Bit 300" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE299 ,Set/Clear Active Bit 299" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE298 ,Set/Clear Active Bit 298" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE297 ,Set/Clear Active Bit 297" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE296 ,Set/Clear Active Bit 296" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE295 ,Set/Clear Active Bit 295" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE294 ,Set/Clear Active Bit 294" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE293 ,Set/Clear Active Bit 293" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE292 ,Set/Clear Active Bit 292" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE291 ,Set/Clear Active Bit 291" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE290 ,Set/Clear Active Bit 290" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE289 ,Set/Clear Active Bit 289" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE288 ,Set/Clear Active Bit 288" "Not active,Active"
else
hgroup.long 0x0324++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x0328++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE351 ,Set/Clear Active Bit 351" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE350 ,Set/Clear Active Bit 350" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE349 ,Set/Clear Active Bit 349" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE348 ,Set/Clear Active Bit 348" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE347 ,Set/Clear Active Bit 347" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE346 ,Set/Clear Active Bit 346" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE345 ,Set/Clear Active Bit 345" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE344 ,Set/Clear Active Bit 344" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE343 ,Set/Clear Active Bit 343" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE342 ,Set/Clear Active Bit 342" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE341 ,Set/Clear Active Bit 341" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE340 ,Set/Clear Active Bit 340" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE339 ,Set/Clear Active Bit 339" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE338 ,Set/Clear Active Bit 338" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE337 ,Set/Clear Active Bit 337" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE336 ,Set/Clear Active Bit 336" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE335 ,Set/Clear Active Bit 335" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE334 ,Set/Clear Active Bit 334" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE333 ,Set/Clear Active Bit 333" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE332 ,Set/Clear Active Bit 332" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE331 ,Set/Clear Active Bit 331" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE330 ,Set/Clear Active Bit 330" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE329 ,Set/Clear Active Bit 329" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE328 ,Set/Clear Active Bit 328" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE327 ,Set/Clear Active Bit 327" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE326 ,Set/Clear Active Bit 326" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE325 ,Set/Clear Active Bit 325" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE324 ,Set/Clear Active Bit 324" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE323 ,Set/Clear Active Bit 323" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE322 ,Set/Clear Active Bit 322" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE321 ,Set/Clear Active Bit 321" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE320 ,Set/Clear Active Bit 320" "Not active,Active"
else
hgroup.long 0x0328++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x032C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE383 ,Set/Clear Active Bit 383" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE382 ,Set/Clear Active Bit 382" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE381 ,Set/Clear Active Bit 381" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE380 ,Set/Clear Active Bit 380" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE379 ,Set/Clear Active Bit 379" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE378 ,Set/Clear Active Bit 378" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE377 ,Set/Clear Active Bit 377" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE376 ,Set/Clear Active Bit 376" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE375 ,Set/Clear Active Bit 375" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE374 ,Set/Clear Active Bit 374" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE373 ,Set/Clear Active Bit 373" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE372 ,Set/Clear Active Bit 372" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE371 ,Set/Clear Active Bit 371" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE370 ,Set/Clear Active Bit 370" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE369 ,Set/Clear Active Bit 369" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE368 ,Set/Clear Active Bit 368" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE367 ,Set/Clear Active Bit 367" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE366 ,Set/Clear Active Bit 366" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE365 ,Set/Clear Active Bit 365" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE364 ,Set/Clear Active Bit 364" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE363 ,Set/Clear Active Bit 363" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE362 ,Set/Clear Active Bit 362" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE361 ,Set/Clear Active Bit 361" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE360 ,Set/Clear Active Bit 360" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE359 ,Set/Clear Active Bit 359" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE358 ,Set/Clear Active Bit 358" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE357 ,Set/Clear Active Bit 357" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE356 ,Set/Clear Active Bit 356" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE355 ,Set/Clear Active Bit 355" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE354 ,Set/Clear Active Bit 354" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE353 ,Set/Clear Active Bit 353" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE352 ,Set/Clear Active Bit 352" "Not active,Active"
else
hgroup.long 0x032C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x0330++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE415 ,Set/Clear Active Bit 415" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE414 ,Set/Clear Active Bit 414" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE413 ,Set/Clear Active Bit 413" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE412 ,Set/Clear Active Bit 412" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE411 ,Set/Clear Active Bit 411" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE410 ,Set/Clear Active Bit 410" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE409 ,Set/Clear Active Bit 409" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE408 ,Set/Clear Active Bit 408" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE407 ,Set/Clear Active Bit 407" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE406 ,Set/Clear Active Bit 406" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE405 ,Set/Clear Active Bit 405" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE404 ,Set/Clear Active Bit 404" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE403 ,Set/Clear Active Bit 403" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE402 ,Set/Clear Active Bit 402" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE401 ,Set/Clear Active Bit 401" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE400 ,Set/Clear Active Bit 400" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE399 ,Set/Clear Active Bit 399" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE398 ,Set/Clear Active Bit 398" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE397 ,Set/Clear Active Bit 397" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE396 ,Set/Clear Active Bit 396" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE395 ,Set/Clear Active Bit 395" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE394 ,Set/Clear Active Bit 394" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE393 ,Set/Clear Active Bit 393" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE392 ,Set/Clear Active Bit 392" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE391 ,Set/Clear Active Bit 391" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE390 ,Set/Clear Active Bit 390" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE389 ,Set/Clear Active Bit 389" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE388 ,Set/Clear Active Bit 388" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE387 ,Set/Clear Active Bit 387" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE386 ,Set/Clear Active Bit 386" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE385 ,Set/Clear Active Bit 385" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE384 ,Set/Clear Active Bit 384" "Not active,Active"
else
hgroup.long 0x0330++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x0334++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE447 ,Set/Clear Active Bit 447" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE446 ,Set/Clear Active Bit 446" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE445 ,Set/Clear Active Bit 445" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE444 ,Set/Clear Active Bit 444" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE443 ,Set/Clear Active Bit 443" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE442 ,Set/Clear Active Bit 442" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE441 ,Set/Clear Active Bit 441" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE440 ,Set/Clear Active Bit 440" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE439 ,Set/Clear Active Bit 439" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE438 ,Set/Clear Active Bit 438" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE437 ,Set/Clear Active Bit 437" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE436 ,Set/Clear Active Bit 436" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE435 ,Set/Clear Active Bit 435" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE434 ,Set/Clear Active Bit 434" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE433 ,Set/Clear Active Bit 433" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE432 ,Set/Clear Active Bit 432" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE431 ,Set/Clear Active Bit 431" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE430 ,Set/Clear Active Bit 430" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE429 ,Set/Clear Active Bit 429" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE428 ,Set/Clear Active Bit 428" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE427 ,Set/Clear Active Bit 427" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE426 ,Set/Clear Active Bit 426" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE425 ,Set/Clear Active Bit 425" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE424 ,Set/Clear Active Bit 424" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE423 ,Set/Clear Active Bit 423" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE422 ,Set/Clear Active Bit 422" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE421 ,Set/Clear Active Bit 421" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE420 ,Set/Clear Active Bit 420" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE419 ,Set/Clear Active Bit 419" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE418 ,Set/Clear Active Bit 418" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE417 ,Set/Clear Active Bit 417" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE416 ,Set/Clear Active Bit 416" "Not active,Active"
else
hgroup.long 0x0334++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x0338++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE479 ,Set/Clear Active Bit 479" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE478 ,Set/Clear Active Bit 478" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE477 ,Set/Clear Active Bit 477" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE476 ,Set/Clear Active Bit 476" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE475 ,Set/Clear Active Bit 475" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE474 ,Set/Clear Active Bit 474" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE473 ,Set/Clear Active Bit 473" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE472 ,Set/Clear Active Bit 472" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE471 ,Set/Clear Active Bit 471" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE470 ,Set/Clear Active Bit 470" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE469 ,Set/Clear Active Bit 469" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE468 ,Set/Clear Active Bit 468" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE467 ,Set/Clear Active Bit 467" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE466 ,Set/Clear Active Bit 466" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE465 ,Set/Clear Active Bit 465" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE464 ,Set/Clear Active Bit 464" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE463 ,Set/Clear Active Bit 463" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE462 ,Set/Clear Active Bit 462" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE461 ,Set/Clear Active Bit 461" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE460 ,Set/Clear Active Bit 460" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE459 ,Set/Clear Active Bit 459" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE458 ,Set/Clear Active Bit 458" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE457 ,Set/Clear Active Bit 457" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE456 ,Set/Clear Active Bit 456" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE455 ,Set/Clear Active Bit 455" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE454 ,Set/Clear Active Bit 454" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE453 ,Set/Clear Active Bit 453" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE452 ,Set/Clear Active Bit 452" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE451 ,Set/Clear Active Bit 451" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE450 ,Set/Clear Active Bit 450" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE449 ,Set/Clear Active Bit 449" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE448 ,Set/Clear Active Bit 448" "Not active,Active"
else
hgroup.long 0x0338++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x033C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE511 ,Set/Clear Active Bit 511" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE510 ,Set/Clear Active Bit 510" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE509 ,Set/Clear Active Bit 509" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE508 ,Set/Clear Active Bit 508" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE507 ,Set/Clear Active Bit 507" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE506 ,Set/Clear Active Bit 506" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE505 ,Set/Clear Active Bit 505" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE504 ,Set/Clear Active Bit 504" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE503 ,Set/Clear Active Bit 503" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE502 ,Set/Clear Active Bit 502" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE501 ,Set/Clear Active Bit 501" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE500 ,Set/Clear Active Bit 500" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE499 ,Set/Clear Active Bit 499" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE498 ,Set/Clear Active Bit 498" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE497 ,Set/Clear Active Bit 497" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE496 ,Set/Clear Active Bit 496" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE495 ,Set/Clear Active Bit 495" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE494 ,Set/Clear Active Bit 494" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE493 ,Set/Clear Active Bit 493" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE492 ,Set/Clear Active Bit 492" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE491 ,Set/Clear Active Bit 491" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE490 ,Set/Clear Active Bit 490" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE489 ,Set/Clear Active Bit 489" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE488 ,Set/Clear Active Bit 488" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE487 ,Set/Clear Active Bit 487" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE486 ,Set/Clear Active Bit 486" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE485 ,Set/Clear Active Bit 485" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE484 ,Set/Clear Active Bit 484" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE483 ,Set/Clear Active Bit 483" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE482 ,Set/Clear Active Bit 482" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE481 ,Set/Clear Active Bit 481" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE480 ,Set/Clear Active Bit 480" "Not active,Active"
else
hgroup.long 0x033C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0x0340++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE543 ,Set/Clear Active Bit 543" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE542 ,Set/Clear Active Bit 542" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE541 ,Set/Clear Active Bit 541" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE540 ,Set/Clear Active Bit 540" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE539 ,Set/Clear Active Bit 539" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE538 ,Set/Clear Active Bit 538" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE537 ,Set/Clear Active Bit 537" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE536 ,Set/Clear Active Bit 536" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE535 ,Set/Clear Active Bit 535" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE534 ,Set/Clear Active Bit 534" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE533 ,Set/Clear Active Bit 533" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE532 ,Set/Clear Active Bit 532" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE531 ,Set/Clear Active Bit 531" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE530 ,Set/Clear Active Bit 530" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE529 ,Set/Clear Active Bit 529" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE528 ,Set/Clear Active Bit 528" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE527 ,Set/Clear Active Bit 527" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE526 ,Set/Clear Active Bit 526" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE525 ,Set/Clear Active Bit 525" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE524 ,Set/Clear Active Bit 524" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE523 ,Set/Clear Active Bit 523" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE522 ,Set/Clear Active Bit 522" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE521 ,Set/Clear Active Bit 521" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE520 ,Set/Clear Active Bit 520" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE519 ,Set/Clear Active Bit 519" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE518 ,Set/Clear Active Bit 518" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE517 ,Set/Clear Active Bit 517" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE516 ,Set/Clear Active Bit 516" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE515 ,Set/Clear Active Bit 515" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE514 ,Set/Clear Active Bit 514" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE513 ,Set/Clear Active Bit 513" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE512 ,Set/Clear Active Bit 512" "Not active,Active"
else
hgroup.long 0x0340++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0x0344++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE575 ,Set/Clear Active Bit 575" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE574 ,Set/Clear Active Bit 574" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE573 ,Set/Clear Active Bit 573" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE572 ,Set/Clear Active Bit 572" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE571 ,Set/Clear Active Bit 571" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE570 ,Set/Clear Active Bit 570" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE569 ,Set/Clear Active Bit 569" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE568 ,Set/Clear Active Bit 568" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE567 ,Set/Clear Active Bit 567" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE566 ,Set/Clear Active Bit 566" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE565 ,Set/Clear Active Bit 565" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE564 ,Set/Clear Active Bit 564" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE563 ,Set/Clear Active Bit 563" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE562 ,Set/Clear Active Bit 562" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE561 ,Set/Clear Active Bit 561" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE560 ,Set/Clear Active Bit 560" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE559 ,Set/Clear Active Bit 559" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE558 ,Set/Clear Active Bit 558" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE557 ,Set/Clear Active Bit 557" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE556 ,Set/Clear Active Bit 556" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE555 ,Set/Clear Active Bit 555" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE554 ,Set/Clear Active Bit 554" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE553 ,Set/Clear Active Bit 553" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE552 ,Set/Clear Active Bit 552" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE551 ,Set/Clear Active Bit 551" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE550 ,Set/Clear Active Bit 550" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE549 ,Set/Clear Active Bit 549" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE548 ,Set/Clear Active Bit 548" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE547 ,Set/Clear Active Bit 547" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE546 ,Set/Clear Active Bit 546" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE545 ,Set/Clear Active Bit 545" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE544 ,Set/Clear Active Bit 544" "Not active,Active"
else
hgroup.long 0x0344++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0x0348++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE607 ,Set/Clear Active Bit 607" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE606 ,Set/Clear Active Bit 606" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE605 ,Set/Clear Active Bit 605" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE604 ,Set/Clear Active Bit 604" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE603 ,Set/Clear Active Bit 603" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE602 ,Set/Clear Active Bit 602" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE601 ,Set/Clear Active Bit 601" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE600 ,Set/Clear Active Bit 600" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE599 ,Set/Clear Active Bit 599" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE598 ,Set/Clear Active Bit 598" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE597 ,Set/Clear Active Bit 597" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE596 ,Set/Clear Active Bit 596" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE595 ,Set/Clear Active Bit 595" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE594 ,Set/Clear Active Bit 594" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE593 ,Set/Clear Active Bit 593" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE592 ,Set/Clear Active Bit 592" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE591 ,Set/Clear Active Bit 591" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE590 ,Set/Clear Active Bit 590" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE589 ,Set/Clear Active Bit 589" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE588 ,Set/Clear Active Bit 588" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE587 ,Set/Clear Active Bit 587" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE586 ,Set/Clear Active Bit 586" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE585 ,Set/Clear Active Bit 585" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE584 ,Set/Clear Active Bit 584" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE583 ,Set/Clear Active Bit 583" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE582 ,Set/Clear Active Bit 582" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE581 ,Set/Clear Active Bit 581" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE580 ,Set/Clear Active Bit 580" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE579 ,Set/Clear Active Bit 579" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE578 ,Set/Clear Active Bit 578" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE577 ,Set/Clear Active Bit 577" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE576 ,Set/Clear Active Bit 576" "Not active,Active"
else
hgroup.long 0x0348++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0x034C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE639 ,Set/Clear Active Bit 639" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE638 ,Set/Clear Active Bit 638" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE637 ,Set/Clear Active Bit 637" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE636 ,Set/Clear Active Bit 636" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE635 ,Set/Clear Active Bit 635" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE634 ,Set/Clear Active Bit 634" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE633 ,Set/Clear Active Bit 633" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE632 ,Set/Clear Active Bit 632" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE631 ,Set/Clear Active Bit 631" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE630 ,Set/Clear Active Bit 630" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE629 ,Set/Clear Active Bit 629" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE628 ,Set/Clear Active Bit 628" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE627 ,Set/Clear Active Bit 627" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE626 ,Set/Clear Active Bit 626" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE625 ,Set/Clear Active Bit 625" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE624 ,Set/Clear Active Bit 624" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE623 ,Set/Clear Active Bit 623" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE622 ,Set/Clear Active Bit 622" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE621 ,Set/Clear Active Bit 621" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE620 ,Set/Clear Active Bit 620" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE619 ,Set/Clear Active Bit 619" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE618 ,Set/Clear Active Bit 618" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE617 ,Set/Clear Active Bit 617" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE616 ,Set/Clear Active Bit 616" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE615 ,Set/Clear Active Bit 615" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE614 ,Set/Clear Active Bit 614" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE613 ,Set/Clear Active Bit 613" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE612 ,Set/Clear Active Bit 612" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE611 ,Set/Clear Active Bit 611" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE610 ,Set/Clear Active Bit 610" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE609 ,Set/Clear Active Bit 609" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE608 ,Set/Clear Active Bit 608" "Not active,Active"
else
hgroup.long 0x034C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0x0350++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE671 ,Set/Clear Active Bit 671" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE670 ,Set/Clear Active Bit 670" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE669 ,Set/Clear Active Bit 669" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE668 ,Set/Clear Active Bit 668" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE667 ,Set/Clear Active Bit 667" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE666 ,Set/Clear Active Bit 666" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE665 ,Set/Clear Active Bit 665" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE664 ,Set/Clear Active Bit 664" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE663 ,Set/Clear Active Bit 663" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE662 ,Set/Clear Active Bit 662" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE661 ,Set/Clear Active Bit 661" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE660 ,Set/Clear Active Bit 660" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE659 ,Set/Clear Active Bit 659" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE658 ,Set/Clear Active Bit 658" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE657 ,Set/Clear Active Bit 657" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE656 ,Set/Clear Active Bit 656" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE655 ,Set/Clear Active Bit 655" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE654 ,Set/Clear Active Bit 654" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE653 ,Set/Clear Active Bit 653" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE652 ,Set/Clear Active Bit 652" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE651 ,Set/Clear Active Bit 651" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE650 ,Set/Clear Active Bit 650" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE649 ,Set/Clear Active Bit 649" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE648 ,Set/Clear Active Bit 648" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE647 ,Set/Clear Active Bit 647" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE646 ,Set/Clear Active Bit 646" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE645 ,Set/Clear Active Bit 645" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE644 ,Set/Clear Active Bit 644" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE643 ,Set/Clear Active Bit 643" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE642 ,Set/Clear Active Bit 642" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE641 ,Set/Clear Active Bit 641" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE640 ,Set/Clear Active Bit 640" "Not active,Active"
else
hgroup.long 0x0350++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0x0354++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE703 ,Set/Clear Active Bit 703" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE702 ,Set/Clear Active Bit 702" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE701 ,Set/Clear Active Bit 701" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE700 ,Set/Clear Active Bit 700" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE699 ,Set/Clear Active Bit 699" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE698 ,Set/Clear Active Bit 698" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE697 ,Set/Clear Active Bit 697" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE696 ,Set/Clear Active Bit 696" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE695 ,Set/Clear Active Bit 695" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE694 ,Set/Clear Active Bit 694" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE693 ,Set/Clear Active Bit 693" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE692 ,Set/Clear Active Bit 692" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE691 ,Set/Clear Active Bit 691" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE690 ,Set/Clear Active Bit 690" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE689 ,Set/Clear Active Bit 689" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE688 ,Set/Clear Active Bit 688" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE687 ,Set/Clear Active Bit 687" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE686 ,Set/Clear Active Bit 686" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE685 ,Set/Clear Active Bit 685" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE684 ,Set/Clear Active Bit 684" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE683 ,Set/Clear Active Bit 683" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE682 ,Set/Clear Active Bit 682" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE681 ,Set/Clear Active Bit 681" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE680 ,Set/Clear Active Bit 680" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE679 ,Set/Clear Active Bit 679" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE678 ,Set/Clear Active Bit 678" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE677 ,Set/Clear Active Bit 677" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE676 ,Set/Clear Active Bit 676" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE675 ,Set/Clear Active Bit 675" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE674 ,Set/Clear Active Bit 674" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE673 ,Set/Clear Active Bit 673" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE672 ,Set/Clear Active Bit 672" "Not active,Active"
else
hgroup.long 0x0354++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0x0358++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE735 ,Set/Clear Active Bit 735" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE734 ,Set/Clear Active Bit 734" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE733 ,Set/Clear Active Bit 733" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE732 ,Set/Clear Active Bit 732" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE731 ,Set/Clear Active Bit 731" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE730 ,Set/Clear Active Bit 730" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE729 ,Set/Clear Active Bit 729" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE728 ,Set/Clear Active Bit 728" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE727 ,Set/Clear Active Bit 727" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE726 ,Set/Clear Active Bit 726" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE725 ,Set/Clear Active Bit 725" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE724 ,Set/Clear Active Bit 724" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE723 ,Set/Clear Active Bit 723" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE722 ,Set/Clear Active Bit 722" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE721 ,Set/Clear Active Bit 721" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE720 ,Set/Clear Active Bit 720" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE719 ,Set/Clear Active Bit 719" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE718 ,Set/Clear Active Bit 718" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE717 ,Set/Clear Active Bit 717" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE716 ,Set/Clear Active Bit 716" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE715 ,Set/Clear Active Bit 715" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE714 ,Set/Clear Active Bit 714" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE713 ,Set/Clear Active Bit 713" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE712 ,Set/Clear Active Bit 712" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE711 ,Set/Clear Active Bit 711" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE710 ,Set/Clear Active Bit 710" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE709 ,Set/Clear Active Bit 709" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE708 ,Set/Clear Active Bit 708" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE707 ,Set/Clear Active Bit 707" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE706 ,Set/Clear Active Bit 706" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE705 ,Set/Clear Active Bit 705" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE704 ,Set/Clear Active Bit 704" "Not active,Active"
else
hgroup.long 0x0358++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0x035C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE767 ,Set/Clear Active Bit 767" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE766 ,Set/Clear Active Bit 766" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE765 ,Set/Clear Active Bit 765" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE764 ,Set/Clear Active Bit 764" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE763 ,Set/Clear Active Bit 763" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE762 ,Set/Clear Active Bit 762" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE761 ,Set/Clear Active Bit 761" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE760 ,Set/Clear Active Bit 760" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE759 ,Set/Clear Active Bit 759" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE758 ,Set/Clear Active Bit 758" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE757 ,Set/Clear Active Bit 757" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE756 ,Set/Clear Active Bit 756" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE755 ,Set/Clear Active Bit 755" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE754 ,Set/Clear Active Bit 754" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE753 ,Set/Clear Active Bit 753" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE752 ,Set/Clear Active Bit 752" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE751 ,Set/Clear Active Bit 751" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE750 ,Set/Clear Active Bit 750" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE749 ,Set/Clear Active Bit 749" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE748 ,Set/Clear Active Bit 748" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE747 ,Set/Clear Active Bit 747" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE746 ,Set/Clear Active Bit 746" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE745 ,Set/Clear Active Bit 745" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE744 ,Set/Clear Active Bit 744" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE743 ,Set/Clear Active Bit 743" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE742 ,Set/Clear Active Bit 742" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE741 ,Set/Clear Active Bit 741" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE740 ,Set/Clear Active Bit 740" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE739 ,Set/Clear Active Bit 739" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE738 ,Set/Clear Active Bit 738" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE737 ,Set/Clear Active Bit 737" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE736 ,Set/Clear Active Bit 736" "Not active,Active"
else
hgroup.long 0x035C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0x0360++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE799 ,Set/Clear Active Bit 799" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE798 ,Set/Clear Active Bit 798" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE797 ,Set/Clear Active Bit 797" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE796 ,Set/Clear Active Bit 796" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE795 ,Set/Clear Active Bit 795" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE794 ,Set/Clear Active Bit 794" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE793 ,Set/Clear Active Bit 793" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE792 ,Set/Clear Active Bit 792" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE791 ,Set/Clear Active Bit 791" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE790 ,Set/Clear Active Bit 790" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE789 ,Set/Clear Active Bit 789" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE788 ,Set/Clear Active Bit 788" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE787 ,Set/Clear Active Bit 787" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE786 ,Set/Clear Active Bit 786" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE785 ,Set/Clear Active Bit 785" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE784 ,Set/Clear Active Bit 784" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE783 ,Set/Clear Active Bit 783" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE782 ,Set/Clear Active Bit 782" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE781 ,Set/Clear Active Bit 781" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE780 ,Set/Clear Active Bit 780" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE779 ,Set/Clear Active Bit 779" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE778 ,Set/Clear Active Bit 778" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE777 ,Set/Clear Active Bit 777" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE776 ,Set/Clear Active Bit 776" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE775 ,Set/Clear Active Bit 775" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE774 ,Set/Clear Active Bit 774" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE773 ,Set/Clear Active Bit 773" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE772 ,Set/Clear Active Bit 772" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE771 ,Set/Clear Active Bit 771" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE770 ,Set/Clear Active Bit 770" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE769 ,Set/Clear Active Bit 769" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE768 ,Set/Clear Active Bit 768" "Not active,Active"
else
hgroup.long 0x0360++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0x0364++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE831 ,Set/Clear Active Bit 831" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE830 ,Set/Clear Active Bit 830" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE829 ,Set/Clear Active Bit 829" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE828 ,Set/Clear Active Bit 828" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE827 ,Set/Clear Active Bit 827" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE826 ,Set/Clear Active Bit 826" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE825 ,Set/Clear Active Bit 825" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE824 ,Set/Clear Active Bit 824" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE823 ,Set/Clear Active Bit 823" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE822 ,Set/Clear Active Bit 822" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE821 ,Set/Clear Active Bit 821" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE820 ,Set/Clear Active Bit 820" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE819 ,Set/Clear Active Bit 819" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE818 ,Set/Clear Active Bit 818" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE817 ,Set/Clear Active Bit 817" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE816 ,Set/Clear Active Bit 816" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE815 ,Set/Clear Active Bit 815" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE814 ,Set/Clear Active Bit 814" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE813 ,Set/Clear Active Bit 813" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE812 ,Set/Clear Active Bit 812" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE811 ,Set/Clear Active Bit 811" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE810 ,Set/Clear Active Bit 810" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE809 ,Set/Clear Active Bit 809" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE808 ,Set/Clear Active Bit 808" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE807 ,Set/Clear Active Bit 807" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE806 ,Set/Clear Active Bit 806" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE805 ,Set/Clear Active Bit 805" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE804 ,Set/Clear Active Bit 804" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE803 ,Set/Clear Active Bit 803" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE802 ,Set/Clear Active Bit 802" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE801 ,Set/Clear Active Bit 801" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE800 ,Set/Clear Active Bit 800" "Not active,Active"
else
hgroup.long 0x0364++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0x0368++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE863 ,Set/Clear Active Bit 863" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE862 ,Set/Clear Active Bit 862" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE861 ,Set/Clear Active Bit 861" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE860 ,Set/Clear Active Bit 860" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE859 ,Set/Clear Active Bit 859" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE858 ,Set/Clear Active Bit 858" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE857 ,Set/Clear Active Bit 857" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE856 ,Set/Clear Active Bit 856" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE855 ,Set/Clear Active Bit 855" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE854 ,Set/Clear Active Bit 854" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE853 ,Set/Clear Active Bit 853" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE852 ,Set/Clear Active Bit 852" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE851 ,Set/Clear Active Bit 851" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE850 ,Set/Clear Active Bit 850" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE849 ,Set/Clear Active Bit 849" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE848 ,Set/Clear Active Bit 848" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE847 ,Set/Clear Active Bit 847" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE846 ,Set/Clear Active Bit 846" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE845 ,Set/Clear Active Bit 845" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE844 ,Set/Clear Active Bit 844" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE843 ,Set/Clear Active Bit 843" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE842 ,Set/Clear Active Bit 842" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE841 ,Set/Clear Active Bit 841" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE840 ,Set/Clear Active Bit 840" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE839 ,Set/Clear Active Bit 839" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE838 ,Set/Clear Active Bit 838" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE837 ,Set/Clear Active Bit 837" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE836 ,Set/Clear Active Bit 836" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE835 ,Set/Clear Active Bit 835" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE834 ,Set/Clear Active Bit 834" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE833 ,Set/Clear Active Bit 833" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE832 ,Set/Clear Active Bit 832" "Not active,Active"
else
hgroup.long 0x0368++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0x036C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE895 ,Set/Clear Active Bit 895" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE894 ,Set/Clear Active Bit 894" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE893 ,Set/Clear Active Bit 893" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE892 ,Set/Clear Active Bit 892" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE891 ,Set/Clear Active Bit 891" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE890 ,Set/Clear Active Bit 890" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE889 ,Set/Clear Active Bit 889" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE888 ,Set/Clear Active Bit 888" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE887 ,Set/Clear Active Bit 887" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE886 ,Set/Clear Active Bit 886" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE885 ,Set/Clear Active Bit 885" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE884 ,Set/Clear Active Bit 884" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE883 ,Set/Clear Active Bit 883" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE882 ,Set/Clear Active Bit 882" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE881 ,Set/Clear Active Bit 881" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE880 ,Set/Clear Active Bit 880" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE879 ,Set/Clear Active Bit 879" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE878 ,Set/Clear Active Bit 878" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE877 ,Set/Clear Active Bit 877" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE876 ,Set/Clear Active Bit 876" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE875 ,Set/Clear Active Bit 875" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE874 ,Set/Clear Active Bit 874" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE873 ,Set/Clear Active Bit 873" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE872 ,Set/Clear Active Bit 872" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE871 ,Set/Clear Active Bit 871" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE870 ,Set/Clear Active Bit 870" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE869 ,Set/Clear Active Bit 869" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE868 ,Set/Clear Active Bit 868" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE867 ,Set/Clear Active Bit 867" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE866 ,Set/Clear Active Bit 866" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE865 ,Set/Clear Active Bit 865" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE864 ,Set/Clear Active Bit 864" "Not active,Active"
else
hgroup.long 0x036C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0x0370++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE927 ,Set/Clear Active Bit 927" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE926 ,Set/Clear Active Bit 926" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE925 ,Set/Clear Active Bit 925" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE924 ,Set/Clear Active Bit 924" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE923 ,Set/Clear Active Bit 923" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE922 ,Set/Clear Active Bit 922" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE921 ,Set/Clear Active Bit 921" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE920 ,Set/Clear Active Bit 920" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE919 ,Set/Clear Active Bit 919" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE918 ,Set/Clear Active Bit 918" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE917 ,Set/Clear Active Bit 917" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE916 ,Set/Clear Active Bit 916" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE915 ,Set/Clear Active Bit 915" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE914 ,Set/Clear Active Bit 914" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE913 ,Set/Clear Active Bit 913" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE912 ,Set/Clear Active Bit 912" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE911 ,Set/Clear Active Bit 911" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE910 ,Set/Clear Active Bit 910" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE909 ,Set/Clear Active Bit 909" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE908 ,Set/Clear Active Bit 908" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE907 ,Set/Clear Active Bit 907" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE906 ,Set/Clear Active Bit 906" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE905 ,Set/Clear Active Bit 905" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE904 ,Set/Clear Active Bit 904" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE903 ,Set/Clear Active Bit 903" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE902 ,Set/Clear Active Bit 902" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE901 ,Set/Clear Active Bit 901" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE900 ,Set/Clear Active Bit 900" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE899 ,Set/Clear Active Bit 899" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE898 ,Set/Clear Active Bit 898" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE897 ,Set/Clear Active Bit 897" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE896 ,Set/Clear Active Bit 896" "Not active,Active"
else
hgroup.long 0x0370++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0x0374++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE959 ,Set/Clear Active Bit 959" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE958 ,Set/Clear Active Bit 958" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE957 ,Set/Clear Active Bit 957" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE956 ,Set/Clear Active Bit 956" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE955 ,Set/Clear Active Bit 955" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE954 ,Set/Clear Active Bit 954" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE953 ,Set/Clear Active Bit 953" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE952 ,Set/Clear Active Bit 952" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE951 ,Set/Clear Active Bit 951" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE950 ,Set/Clear Active Bit 950" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE949 ,Set/Clear Active Bit 949" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE948 ,Set/Clear Active Bit 948" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE947 ,Set/Clear Active Bit 947" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE946 ,Set/Clear Active Bit 946" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE945 ,Set/Clear Active Bit 945" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE944 ,Set/Clear Active Bit 944" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE943 ,Set/Clear Active Bit 943" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE942 ,Set/Clear Active Bit 942" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE941 ,Set/Clear Active Bit 941" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE940 ,Set/Clear Active Bit 940" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE939 ,Set/Clear Active Bit 939" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE938 ,Set/Clear Active Bit 938" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE937 ,Set/Clear Active Bit 937" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE936 ,Set/Clear Active Bit 936" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE935 ,Set/Clear Active Bit 935" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE934 ,Set/Clear Active Bit 934" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE933 ,Set/Clear Active Bit 933" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE932 ,Set/Clear Active Bit 932" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE931 ,Set/Clear Active Bit 931" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE930 ,Set/Clear Active Bit 930" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE929 ,Set/Clear Active Bit 929" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE928 ,Set/Clear Active Bit 928" "Not active,Active"
else
hgroup.long 0x0374++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0x0378++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE991 ,Set/Clear Active Bit 991" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE990 ,Set/Clear Active Bit 990" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE989 ,Set/Clear Active Bit 989" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE988 ,Set/Clear Active Bit 988" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE987 ,Set/Clear Active Bit 987" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE986 ,Set/Clear Active Bit 986" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE985 ,Set/Clear Active Bit 985" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE984 ,Set/Clear Active Bit 984" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE983 ,Set/Clear Active Bit 983" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE982 ,Set/Clear Active Bit 982" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE981 ,Set/Clear Active Bit 981" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE980 ,Set/Clear Active Bit 980" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE979 ,Set/Clear Active Bit 979" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE978 ,Set/Clear Active Bit 978" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE977 ,Set/Clear Active Bit 977" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE976 ,Set/Clear Active Bit 976" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE975 ,Set/Clear Active Bit 975" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE974 ,Set/Clear Active Bit 974" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE973 ,Set/Clear Active Bit 973" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE972 ,Set/Clear Active Bit 972" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE971 ,Set/Clear Active Bit 971" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE970 ,Set/Clear Active Bit 970" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE969 ,Set/Clear Active Bit 969" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE968 ,Set/Clear Active Bit 968" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE967 ,Set/Clear Active Bit 967" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE966 ,Set/Clear Active Bit 966" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE965 ,Set/Clear Active Bit 965" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE964 ,Set/Clear Active Bit 964" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE963 ,Set/Clear Active Bit 963" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE962 ,Set/Clear Active Bit 962" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE961 ,Set/Clear Active Bit 961" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE960 ,Set/Clear Active Bit 960" "Not active,Active"
else
hgroup.long 0x0378++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30"
endif
tree.end
width 20.
tree "Priority Registers"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x400++0x03
hide.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0"
hgroup.long 0x404++0x03
hide.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1"
hgroup.long 0x408++0x03
hide.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2"
hgroup.long 0x40C++0x03
hide.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3"
hgroup.long 0x410++0x03
hide.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4"
hgroup.long 0x414++0x03
hide.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5"
hgroup.long 0x418++0x03
hide.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6"
hgroup.long 0x41C++0x03
hide.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7"
else
group.long 0x400++0x03
line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0"
hexmask.long.byte 0x00 24.--31. 1. " INTID3    ,Interrupt ID3    Priority/Priority Byte Offset 3   "
hexmask.long.byte 0x00 16.--23. 1. "  INTID2    ,Interrupt ID2     Priority/Priority Byte Offset 2   "
hexmask.long.byte 0x00 8.--15. 1. "  INTID1    ,Interrupt ID1    Priority/Priority Byte Offset 1   "
hexmask.long.byte 0x00 0.--7. 1. "  INTID0    ,Interrupt ID0     Priority/Priority Byte Offset 0   "
group.long 0x404++0x03
line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1"
hexmask.long.byte 0x00 24.--31. 1. " INTID7    ,Interrupt ID7    Priority/Priority Byte Offset 7   "
hexmask.long.byte 0x00 16.--23. 1. "  INTID6    ,Interrupt ID6     Priority/Priority Byte Offset 6   "
hexmask.long.byte 0x00 8.--15. 1. "  INTID5    ,Interrupt ID5    Priority/Priority Byte Offset 5   "
hexmask.long.byte 0x00 0.--7. 1. "  INTID4    ,Interrupt ID4     Priority/Priority Byte Offset 4   "
group.long 0x408++0x03
line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2"
hexmask.long.byte 0x00 24.--31. 1. " INTID11   ,Interrupt ID11   Priority/Priority Byte Offset 11  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID10   ,Interrupt ID10    Priority/Priority Byte Offset 10  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID9    ,Interrupt ID9    Priority/Priority Byte Offset 9   "
hexmask.long.byte 0x00 0.--7. 1. "  INTID8    ,Interrupt ID8     Priority/Priority Byte Offset 8   "
group.long 0x40C++0x03
line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3"
hexmask.long.byte 0x00 24.--31. 1. " INTID15   ,Interrupt ID15   Priority/Priority Byte Offset 15  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID14   ,Interrupt ID14    Priority/Priority Byte Offset 14  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID13   ,Interrupt ID13   Priority/Priority Byte Offset 13  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID12   ,Interrupt ID12    Priority/Priority Byte Offset 12  "
group.long 0x410++0x03
line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4"
hexmask.long.byte 0x00 24.--31. 1. " INTID19   ,Interrupt ID19   Priority/Priority Byte Offset 19  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID18   ,Interrupt ID18    Priority/Priority Byte Offset 18  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID17   ,Interrupt ID17   Priority/Priority Byte Offset 17  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID16   ,Interrupt ID16    Priority/Priority Byte Offset 16  "
group.long 0x414++0x03
line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5"
hexmask.long.byte 0x00 24.--31. 1. " INTID23   ,Interrupt ID23   Priority/Priority Byte Offset 23  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID22   ,Interrupt ID22    Priority/Priority Byte Offset 22  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID21   ,Interrupt ID21   Priority/Priority Byte Offset 21  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID20   ,Interrupt ID20    Priority/Priority Byte Offset 20  "
group.long 0x418++0x03
line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6"
hexmask.long.byte 0x00 24.--31. 1. " INTID27   ,Interrupt ID27   Priority/Priority Byte Offset 27  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID26   ,Interrupt ID26    Priority/Priority Byte Offset 26  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID25   ,Interrupt ID25   Priority/Priority Byte Offset 25  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID24   ,Interrupt ID24    Priority/Priority Byte Offset 24  "
group.long 0x41C++0x03
line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7"
hexmask.long.byte 0x00 24.--31. 1. " INTID31   ,Interrupt ID31   Priority/Priority Byte Offset 31  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID30   ,Interrupt ID30    Priority/Priority Byte Offset 30  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID29   ,Interrupt ID29   Priority/Priority Byte Offset 29  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID28   ,Interrupt ID28    Priority/Priority Byte Offset 28  "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x420++0x03
line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
hexmask.long.byte 0x00 24.--31. 1. " INTID35   ,Interrupt ID35   Priority/Priority Byte Offset 35  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID34   ,Interrupt ID34    Priority/Priority Byte Offset 34  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID33   ,Interrupt ID33   Priority/Priority Byte Offset 33  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID32   ,Interrupt ID32    Priority/Priority Byte Offset 32  "
group.long 0x424++0x03
line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
hexmask.long.byte 0x00 24.--31. 1. " INTID39   ,Interrupt ID39   Priority/Priority Byte Offset 39  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID38   ,Interrupt ID38    Priority/Priority Byte Offset 38  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID37   ,Interrupt ID37   Priority/Priority Byte Offset 37  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID36   ,Interrupt ID36    Priority/Priority Byte Offset 36  "
group.long 0x428++0x03
line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
hexmask.long.byte 0x00 24.--31. 1. " INTID43   ,Interrupt ID43   Priority/Priority Byte Offset 43  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID42   ,Interrupt ID42    Priority/Priority Byte Offset 42  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID41   ,Interrupt ID41   Priority/Priority Byte Offset 41  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID40   ,Interrupt ID40    Priority/Priority Byte Offset 40  "
group.long 0x42C++0x03
line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
hexmask.long.byte 0x00 24.--31. 1. " INTID47   ,Interrupt ID47   Priority/Priority Byte Offset 47  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID46   ,Interrupt ID46    Priority/Priority Byte Offset 46  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID45   ,Interrupt ID45   Priority/Priority Byte Offset 45  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID44   ,Interrupt ID44    Priority/Priority Byte Offset 44  "
group.long 0x430++0x03
line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
hexmask.long.byte 0x00 24.--31. 1. " INTID51   ,Interrupt ID51   Priority/Priority Byte Offset 51  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID50   ,Interrupt ID50    Priority/Priority Byte Offset 50  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID49   ,Interrupt ID49   Priority/Priority Byte Offset 49  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID48   ,Interrupt ID48    Priority/Priority Byte Offset 48  "
group.long 0x434++0x03
line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
hexmask.long.byte 0x00 24.--31. 1. " INTID55   ,Interrupt ID55   Priority/Priority Byte Offset 55  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID54   ,Interrupt ID54    Priority/Priority Byte Offset 54  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID53   ,Interrupt ID53   Priority/Priority Byte Offset 53  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID52   ,Interrupt ID52    Priority/Priority Byte Offset 52  "
group.long 0x438++0x03
line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
hexmask.long.byte 0x00 24.--31. 1. " INTID59   ,Interrupt ID59   Priority/Priority Byte Offset 59  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID58   ,Interrupt ID58    Priority/Priority Byte Offset 58  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID57   ,Interrupt ID57   Priority/Priority Byte Offset 57  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID56   ,Interrupt ID56    Priority/Priority Byte Offset 56  "
group.long 0x43C++0x03
line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
hexmask.long.byte 0x00 24.--31. 1. " INTID63   ,Interrupt ID63   Priority/Priority Byte Offset 63  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID62   ,Interrupt ID62    Priority/Priority Byte Offset 62  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID61   ,Interrupt ID61   Priority/Priority Byte Offset 61  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID60   ,Interrupt ID60    Priority/Priority Byte Offset 60  "
else
hgroup.long 0x420++0x03
hide.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
hgroup.long 0x424++0x03
hide.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
hgroup.long 0x428++0x03
hide.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
hgroup.long 0x42C++0x03
hide.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
hgroup.long 0x430++0x03
hide.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
hgroup.long 0x434++0x03
hide.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
hgroup.long 0x438++0x03
hide.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
hgroup.long 0x43C++0x03
hide.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x440++0x03
line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
hexmask.long.byte 0x00 24.--31. 1. " INTID67   ,Interrupt ID67   Priority/Priority Byte Offset 67  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID66   ,Interrupt ID66    Priority/Priority Byte Offset 66  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID65   ,Interrupt ID65   Priority/Priority Byte Offset 65  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID64   ,Interrupt ID64    Priority/Priority Byte Offset 64  "
group.long 0x444++0x03
line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
hexmask.long.byte 0x00 24.--31. 1. " INTID71   ,Interrupt ID71   Priority/Priority Byte Offset 71  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID70   ,Interrupt ID70    Priority/Priority Byte Offset 70  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID69   ,Interrupt ID69   Priority/Priority Byte Offset 69  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID68   ,Interrupt ID68    Priority/Priority Byte Offset 68  "
group.long 0x448++0x03
line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
hexmask.long.byte 0x00 24.--31. 1. " INTID75   ,Interrupt ID75   Priority/Priority Byte Offset 75  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID74   ,Interrupt ID74    Priority/Priority Byte Offset 74  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID73   ,Interrupt ID73   Priority/Priority Byte Offset 73  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID72   ,Interrupt ID72    Priority/Priority Byte Offset 72  "
group.long 0x44C++0x03
line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
hexmask.long.byte 0x00 24.--31. 1. " INTID79   ,Interrupt ID79   Priority/Priority Byte Offset 79  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID78   ,Interrupt ID78    Priority/Priority Byte Offset 78  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID77   ,Interrupt ID77   Priority/Priority Byte Offset 77  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID76   ,Interrupt ID76    Priority/Priority Byte Offset 76  "
group.long 0x450++0x03
line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
hexmask.long.byte 0x00 24.--31. 1. " INTID83   ,Interrupt ID83   Priority/Priority Byte Offset 83  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID82   ,Interrupt ID82    Priority/Priority Byte Offset 82  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID81   ,Interrupt ID81   Priority/Priority Byte Offset 81  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID80   ,Interrupt ID80    Priority/Priority Byte Offset 80  "
group.long 0x454++0x03
line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
hexmask.long.byte 0x00 24.--31. 1. " INTID87   ,Interrupt ID87   Priority/Priority Byte Offset 87  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID86   ,Interrupt ID86    Priority/Priority Byte Offset 86  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID85   ,Interrupt ID85   Priority/Priority Byte Offset 85  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID84   ,Interrupt ID84    Priority/Priority Byte Offset 84  "
group.long 0x458++0x03
line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
hexmask.long.byte 0x00 24.--31. 1. " INTID91   ,Interrupt ID91   Priority/Priority Byte Offset 91  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID90   ,Interrupt ID90    Priority/Priority Byte Offset 90  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID89   ,Interrupt ID89   Priority/Priority Byte Offset 89  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID88   ,Interrupt ID88    Priority/Priority Byte Offset 88  "
group.long 0x45C++0x03
line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
hexmask.long.byte 0x00 24.--31. 1. " INTID95   ,Interrupt ID95   Priority/Priority Byte Offset 95  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID94   ,Interrupt ID94    Priority/Priority Byte Offset 94  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID93   ,Interrupt ID93   Priority/Priority Byte Offset 93  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID92   ,Interrupt ID92    Priority/Priority Byte Offset 92  "
else
hgroup.long 0x440++0x03
hide.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
hgroup.long 0x444++0x03
hide.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
hgroup.long 0x448++0x03
hide.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
hgroup.long 0x44C++0x03
hide.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
hgroup.long 0x450++0x03
hide.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
hgroup.long 0x454++0x03
hide.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
hgroup.long 0x458++0x03
hide.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
hgroup.long 0x45C++0x03
hide.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x460++0x03
line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
hexmask.long.byte 0x00 24.--31. 1. " INTID99   ,Interrupt ID99   Priority/Priority Byte Offset 99  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID98   ,Interrupt ID98    Priority/Priority Byte Offset 98  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID97   ,Interrupt ID97   Priority/Priority Byte Offset 97  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID96   ,Interrupt ID96    Priority/Priority Byte Offset 96  "
group.long 0x464++0x03
line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
hexmask.long.byte 0x00 24.--31. 1. " INTID103  ,Interrupt ID103  Priority/Priority Byte Offset 103 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID102  ,Interrupt ID102   Priority/Priority Byte Offset 102 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID101  ,Interrupt ID101  Priority/Priority Byte Offset 101 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID100  ,Interrupt ID100   Priority/Priority Byte Offset 100 "
group.long 0x468++0x03
line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
hexmask.long.byte 0x00 24.--31. 1. " INTID107  ,Interrupt ID107  Priority/Priority Byte Offset 107 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID106  ,Interrupt ID106   Priority/Priority Byte Offset 106 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID105  ,Interrupt ID105  Priority/Priority Byte Offset 105 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID104  ,Interrupt ID104   Priority/Priority Byte Offset 104 "
group.long 0x46C++0x03
line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
hexmask.long.byte 0x00 24.--31. 1. " INTID111  ,Interrupt ID111  Priority/Priority Byte Offset 111 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID110  ,Interrupt ID110   Priority/Priority Byte Offset 110 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID109  ,Interrupt ID109  Priority/Priority Byte Offset 109 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID108  ,Interrupt ID108   Priority/Priority Byte Offset 108 "
group.long 0x470++0x03
line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
hexmask.long.byte 0x00 24.--31. 1. " INTID115  ,Interrupt ID115  Priority/Priority Byte Offset 115 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID114  ,Interrupt ID114   Priority/Priority Byte Offset 114 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID113  ,Interrupt ID113  Priority/Priority Byte Offset 113 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID112  ,Interrupt ID112   Priority/Priority Byte Offset 112 "
group.long 0x474++0x03
line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
hexmask.long.byte 0x00 24.--31. 1. " INTID119  ,Interrupt ID119  Priority/Priority Byte Offset 119 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID118  ,Interrupt ID118   Priority/Priority Byte Offset 118 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID117  ,Interrupt ID117  Priority/Priority Byte Offset 117 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID116  ,Interrupt ID116   Priority/Priority Byte Offset 116 "
group.long 0x478++0x03
line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
hexmask.long.byte 0x00 24.--31. 1. " INTID123  ,Interrupt ID123  Priority/Priority Byte Offset 123 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID122  ,Interrupt ID122   Priority/Priority Byte Offset 122 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID121  ,Interrupt ID121  Priority/Priority Byte Offset 121 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID120  ,Interrupt ID120   Priority/Priority Byte Offset 120 "
group.long 0x47C++0x03
line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
hexmask.long.byte 0x00 24.--31. 1. " INTID127  ,Interrupt ID127  Priority/Priority Byte Offset 127 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID126  ,Interrupt ID126   Priority/Priority Byte Offset 126 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID125  ,Interrupt ID125  Priority/Priority Byte Offset 125 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID124  ,Interrupt ID124   Priority/Priority Byte Offset 124 "
else
hgroup.long 0x460++0x03
hide.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
hgroup.long 0x464++0x03
hide.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
hgroup.long 0x468++0x03
hide.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
hgroup.long 0x46C++0x03
hide.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
hgroup.long 0x470++0x03
hide.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
hgroup.long 0x474++0x03
hide.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
hgroup.long 0x478++0x03
hide.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
hgroup.long 0x47C++0x03
hide.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x480++0x03
line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
hexmask.long.byte 0x00 24.--31. 1. " INTID131  ,Interrupt ID131  Priority/Priority Byte Offset 131 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID130  ,Interrupt ID130   Priority/Priority Byte Offset 130 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID129  ,Interrupt ID129  Priority/Priority Byte Offset 129 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID128  ,Interrupt ID128   Priority/Priority Byte Offset 128 "
group.long 0x484++0x03
line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
hexmask.long.byte 0x00 24.--31. 1. " INTID135  ,Interrupt ID135  Priority/Priority Byte Offset 135 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID134  ,Interrupt ID134   Priority/Priority Byte Offset 134 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID133  ,Interrupt ID133  Priority/Priority Byte Offset 133 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID132  ,Interrupt ID132   Priority/Priority Byte Offset 132 "
group.long 0x488++0x03
line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
hexmask.long.byte 0x00 24.--31. 1. " INTID139  ,Interrupt ID139  Priority/Priority Byte Offset 139 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID138  ,Interrupt ID138   Priority/Priority Byte Offset 138 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID137  ,Interrupt ID137  Priority/Priority Byte Offset 137 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID136  ,Interrupt ID136   Priority/Priority Byte Offset 136 "
group.long 0x48C++0x03
line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
hexmask.long.byte 0x00 24.--31. 1. " INTID143  ,Interrupt ID143  Priority/Priority Byte Offset 143 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID142  ,Interrupt ID142   Priority/Priority Byte Offset 142 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID141  ,Interrupt ID141  Priority/Priority Byte Offset 141 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID140  ,Interrupt ID140   Priority/Priority Byte Offset 140 "
group.long 0x490++0x03
line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
hexmask.long.byte 0x00 24.--31. 1. " INTID147  ,Interrupt ID147  Priority/Priority Byte Offset 147 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID146  ,Interrupt ID146   Priority/Priority Byte Offset 146 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID145  ,Interrupt ID145  Priority/Priority Byte Offset 145 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID144  ,Interrupt ID144   Priority/Priority Byte Offset 144 "
group.long 0x494++0x03
line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
hexmask.long.byte 0x00 24.--31. 1. " INTID151  ,Interrupt ID151  Priority/Priority Byte Offset 151 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID150  ,Interrupt ID150   Priority/Priority Byte Offset 150 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID149  ,Interrupt ID149  Priority/Priority Byte Offset 149 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID148  ,Interrupt ID148   Priority/Priority Byte Offset 148 "
group.long 0x498++0x03
line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
hexmask.long.byte 0x00 24.--31. 1. " INTID155  ,Interrupt ID155  Priority/Priority Byte Offset 155 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID154  ,Interrupt ID154   Priority/Priority Byte Offset 154 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID153  ,Interrupt ID153  Priority/Priority Byte Offset 153 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID152  ,Interrupt ID152   Priority/Priority Byte Offset 152 "
group.long 0x49C++0x03
line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
hexmask.long.byte 0x00 24.--31. 1. " INTID159  ,Interrupt ID159  Priority/Priority Byte Offset 159 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID158  ,Interrupt ID158   Priority/Priority Byte Offset 158 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID157  ,Interrupt ID157  Priority/Priority Byte Offset 157 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID156  ,Interrupt ID156   Priority/Priority Byte Offset 156 "
else
hgroup.long 0x480++0x03
hide.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
hgroup.long 0x484++0x03
hide.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
hgroup.long 0x488++0x03
hide.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
hgroup.long 0x48C++0x03
hide.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
hgroup.long 0x490++0x03
hide.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
hgroup.long 0x494++0x03
hide.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
hgroup.long 0x498++0x03
hide.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
hgroup.long 0x49C++0x03
hide.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x4A0++0x03
line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
hexmask.long.byte 0x00 24.--31. 1. " INTID163  ,Interrupt ID163  Priority/Priority Byte Offset 163 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID162  ,Interrupt ID162   Priority/Priority Byte Offset 162 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID161  ,Interrupt ID161  Priority/Priority Byte Offset 161 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID160  ,Interrupt ID160   Priority/Priority Byte Offset 160 "
group.long 0x4A4++0x03
line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
hexmask.long.byte 0x00 24.--31. 1. " INTID167  ,Interrupt ID167  Priority/Priority Byte Offset 167 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID166  ,Interrupt ID166   Priority/Priority Byte Offset 166 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID165  ,Interrupt ID165  Priority/Priority Byte Offset 165 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID164  ,Interrupt ID164   Priority/Priority Byte Offset 164 "
group.long 0x4A8++0x03
line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
hexmask.long.byte 0x00 24.--31. 1. " INTID171  ,Interrupt ID171  Priority/Priority Byte Offset 171 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID170  ,Interrupt ID170   Priority/Priority Byte Offset 170 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID169  ,Interrupt ID169  Priority/Priority Byte Offset 169 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID168  ,Interrupt ID168   Priority/Priority Byte Offset 168 "
group.long 0x4AC++0x03
line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
hexmask.long.byte 0x00 24.--31. 1. " INTID175  ,Interrupt ID175  Priority/Priority Byte Offset 175 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID174  ,Interrupt ID174   Priority/Priority Byte Offset 174 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID173  ,Interrupt ID173  Priority/Priority Byte Offset 173 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID172  ,Interrupt ID172   Priority/Priority Byte Offset 172 "
group.long 0x4B0++0x03
line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
hexmask.long.byte 0x00 24.--31. 1. " INTID179  ,Interrupt ID179  Priority/Priority Byte Offset 179 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID178  ,Interrupt ID178   Priority/Priority Byte Offset 178 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID177  ,Interrupt ID177  Priority/Priority Byte Offset 177 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID176  ,Interrupt ID176   Priority/Priority Byte Offset 176 "
group.long 0x4B4++0x03
line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
hexmask.long.byte 0x00 24.--31. 1. " INTID183  ,Interrupt ID183  Priority/Priority Byte Offset 183 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID182  ,Interrupt ID182   Priority/Priority Byte Offset 182 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID181  ,Interrupt ID181  Priority/Priority Byte Offset 181 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID180  ,Interrupt ID180   Priority/Priority Byte Offset 180 "
group.long 0x4B8++0x03
line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
hexmask.long.byte 0x00 24.--31. 1. " INTID187  ,Interrupt ID187  Priority/Priority Byte Offset 187 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID186  ,Interrupt ID186   Priority/Priority Byte Offset 186 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID185  ,Interrupt ID185  Priority/Priority Byte Offset 185 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID184  ,Interrupt ID184   Priority/Priority Byte Offset 184 "
group.long 0x4BC++0x03
line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
hexmask.long.byte 0x00 24.--31. 1. " INTID191  ,Interrupt ID191  Priority/Priority Byte Offset 191 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID190  ,Interrupt ID190   Priority/Priority Byte Offset 190 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID189  ,Interrupt ID189  Priority/Priority Byte Offset 189 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID188  ,Interrupt ID188   Priority/Priority Byte Offset 188 "
else
hgroup.long 0x4A0++0x03
hide.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
hgroup.long 0x4A4++0x03
hide.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
hgroup.long 0x4A8++0x03
hide.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
hgroup.long 0x4AC++0x03
hide.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
hgroup.long 0x4B0++0x03
hide.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
hgroup.long 0x4B4++0x03
hide.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
hgroup.long 0x4B8++0x03
hide.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
hgroup.long 0x4BC++0x03
hide.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x4C0++0x03
line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
hexmask.long.byte 0x00 24.--31. 1. " INTID195  ,Interrupt ID195  Priority/Priority Byte Offset 195 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID194  ,Interrupt ID194   Priority/Priority Byte Offset 194 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID193  ,Interrupt ID193  Priority/Priority Byte Offset 193 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID192  ,Interrupt ID192   Priority/Priority Byte Offset 192 "
group.long 0x4C4++0x03
line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
hexmask.long.byte 0x00 24.--31. 1. " INTID199  ,Interrupt ID199  Priority/Priority Byte Offset 199 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID198  ,Interrupt ID198   Priority/Priority Byte Offset 198 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID197  ,Interrupt ID197  Priority/Priority Byte Offset 197 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID196  ,Interrupt ID196   Priority/Priority Byte Offset 196 "
group.long 0x4C8++0x03
line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
hexmask.long.byte 0x00 24.--31. 1. " INTID203  ,Interrupt ID203  Priority/Priority Byte Offset 203 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID202  ,Interrupt ID202   Priority/Priority Byte Offset 202 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID201  ,Interrupt ID201  Priority/Priority Byte Offset 201 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID200  ,Interrupt ID200   Priority/Priority Byte Offset 200 "
group.long 0x4CC++0x03
line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
hexmask.long.byte 0x00 24.--31. 1. " INTID207  ,Interrupt ID207  Priority/Priority Byte Offset 207 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID206  ,Interrupt ID206   Priority/Priority Byte Offset 206 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID205  ,Interrupt ID205  Priority/Priority Byte Offset 205 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID204  ,Interrupt ID204   Priority/Priority Byte Offset 204 "
group.long 0x4D0++0x03
line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
hexmask.long.byte 0x00 24.--31. 1. " INTID211  ,Interrupt ID211  Priority/Priority Byte Offset 211 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID210  ,Interrupt ID210   Priority/Priority Byte Offset 210 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID209  ,Interrupt ID209  Priority/Priority Byte Offset 209 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID208  ,Interrupt ID208   Priority/Priority Byte Offset 208 "
group.long 0x4D4++0x03
line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
hexmask.long.byte 0x00 24.--31. 1. " INTID215  ,Interrupt ID215  Priority/Priority Byte Offset 215 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID214  ,Interrupt ID214   Priority/Priority Byte Offset 214 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID213  ,Interrupt ID213  Priority/Priority Byte Offset 213 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID212  ,Interrupt ID212   Priority/Priority Byte Offset 212 "
group.long 0x4D8++0x03
line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
hexmask.long.byte 0x00 24.--31. 1. " INTID219  ,Interrupt ID219  Priority/Priority Byte Offset 219 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID218  ,Interrupt ID218   Priority/Priority Byte Offset 218 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID217  ,Interrupt ID217  Priority/Priority Byte Offset 217 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID216  ,Interrupt ID216   Priority/Priority Byte Offset 216 "
group.long 0x4DC++0x03
line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
hexmask.long.byte 0x00 24.--31. 1. " INTID223  ,Interrupt ID223  Priority/Priority Byte Offset 223 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID222  ,Interrupt ID222   Priority/Priority Byte Offset 222 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID221  ,Interrupt ID221  Priority/Priority Byte Offset 221 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID220  ,Interrupt ID220   Priority/Priority Byte Offset 220 "
else
hgroup.long 0x4C0++0x03
hide.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
hgroup.long 0x4C4++0x03
hide.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
hgroup.long 0x4C8++0x03
hide.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
hgroup.long 0x4CC++0x03
hide.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
hgroup.long 0x4D0++0x03
hide.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
hgroup.long 0x4D4++0x03
hide.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
hgroup.long 0x4D8++0x03
hide.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
hgroup.long 0x4DC++0x03
hide.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x4E0++0x03
line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
hexmask.long.byte 0x00 24.--31. 1. " INTID227  ,Interrupt ID227  Priority/Priority Byte Offset 227 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID226  ,Interrupt ID226   Priority/Priority Byte Offset 226 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID225  ,Interrupt ID225  Priority/Priority Byte Offset 225 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID224  ,Interrupt ID224   Priority/Priority Byte Offset 224 "
group.long 0x4E4++0x03
line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
hexmask.long.byte 0x00 24.--31. 1. " INTID231  ,Interrupt ID231  Priority/Priority Byte Offset 231 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID230  ,Interrupt ID230   Priority/Priority Byte Offset 230 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID229  ,Interrupt ID229  Priority/Priority Byte Offset 229 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID228  ,Interrupt ID228   Priority/Priority Byte Offset 228 "
group.long 0x4E8++0x03
line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
hexmask.long.byte 0x00 24.--31. 1. " INTID235  ,Interrupt ID235  Priority/Priority Byte Offset 235 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID234  ,Interrupt ID234   Priority/Priority Byte Offset 234 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID233  ,Interrupt ID233  Priority/Priority Byte Offset 233 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID232  ,Interrupt ID232   Priority/Priority Byte Offset 232 "
group.long 0x4EC++0x03
line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
hexmask.long.byte 0x00 24.--31. 1. " INTID239  ,Interrupt ID239  Priority/Priority Byte Offset 239 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID238  ,Interrupt ID238   Priority/Priority Byte Offset 238 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID237  ,Interrupt ID237  Priority/Priority Byte Offset 237 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID236  ,Interrupt ID236   Priority/Priority Byte Offset 236 "
group.long 0x4F0++0x03
line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
hexmask.long.byte 0x00 24.--31. 1. " INTID243  ,Interrupt ID243  Priority/Priority Byte Offset 243 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID242  ,Interrupt ID242   Priority/Priority Byte Offset 242 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID241  ,Interrupt ID241  Priority/Priority Byte Offset 241 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID240  ,Interrupt ID240   Priority/Priority Byte Offset 240 "
group.long 0x4F4++0x03
line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
hexmask.long.byte 0x00 24.--31. 1. " INTID247  ,Interrupt ID247  Priority/Priority Byte Offset 247 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID246  ,Interrupt ID246   Priority/Priority Byte Offset 246 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID245  ,Interrupt ID245  Priority/Priority Byte Offset 245 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID244  ,Interrupt ID244   Priority/Priority Byte Offset 244 "
group.long 0x4F8++0x03
line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
hexmask.long.byte 0x00 24.--31. 1. " INTID251  ,Interrupt ID251  Priority/Priority Byte Offset 251 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID250  ,Interrupt ID250   Priority/Priority Byte Offset 250 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID249  ,Interrupt ID249  Priority/Priority Byte Offset 249 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID248  ,Interrupt ID248   Priority/Priority Byte Offset 248 "
group.long 0x4FC++0x03
line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
hexmask.long.byte 0x00 24.--31. 1. " INTID255  ,Interrupt ID255  Priority/Priority Byte Offset 255 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID254  ,Interrupt ID254   Priority/Priority Byte Offset 254 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID253  ,Interrupt ID253  Priority/Priority Byte Offset 253 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID252  ,Interrupt ID252   Priority/Priority Byte Offset 252 "
else
hgroup.long 0x4E0++0x03
hide.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
hgroup.long 0x4E4++0x03
hide.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
hgroup.long 0x4E8++0x03
hide.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
hgroup.long 0x4EC++0x03
hide.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
hgroup.long 0x4F0++0x03
hide.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
hgroup.long 0x4F4++0x03
hide.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
hgroup.long 0x4F8++0x03
hide.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
hgroup.long 0x4FC++0x03
hide.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x500++0x03
line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
hexmask.long.byte 0x00 24.--31. 1. " INTID259  ,Interrupt ID259  Priority/Priority Byte Offset 259 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID258  ,Interrupt ID258   Priority/Priority Byte Offset 258 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID257  ,Interrupt ID257  Priority/Priority Byte Offset 257 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID256  ,Interrupt ID256   Priority/Priority Byte Offset 256 "
group.long 0x504++0x03
line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
hexmask.long.byte 0x00 24.--31. 1. " INTID263  ,Interrupt ID263  Priority/Priority Byte Offset 263 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID262  ,Interrupt ID262   Priority/Priority Byte Offset 262 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID261  ,Interrupt ID261  Priority/Priority Byte Offset 261 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID260  ,Interrupt ID260   Priority/Priority Byte Offset 260 "
group.long 0x508++0x03
line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
hexmask.long.byte 0x00 24.--31. 1. " INTID267  ,Interrupt ID267  Priority/Priority Byte Offset 267 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID266  ,Interrupt ID266   Priority/Priority Byte Offset 266 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID265  ,Interrupt ID265  Priority/Priority Byte Offset 265 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID264  ,Interrupt ID264   Priority/Priority Byte Offset 264 "
group.long 0x50C++0x03
line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
hexmask.long.byte 0x00 24.--31. 1. " INTID271  ,Interrupt ID271  Priority/Priority Byte Offset 271 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID270  ,Interrupt ID270   Priority/Priority Byte Offset 270 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID269  ,Interrupt ID269  Priority/Priority Byte Offset 269 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID268  ,Interrupt ID268   Priority/Priority Byte Offset 268 "
group.long 0x510++0x03
line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
hexmask.long.byte 0x00 24.--31. 1. " INTID275  ,Interrupt ID275  Priority/Priority Byte Offset 275 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID274  ,Interrupt ID274   Priority/Priority Byte Offset 274 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID273  ,Interrupt ID273  Priority/Priority Byte Offset 273 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID272  ,Interrupt ID272   Priority/Priority Byte Offset 272 "
group.long 0x514++0x03
line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
hexmask.long.byte 0x00 24.--31. 1. " INTID279  ,Interrupt ID279  Priority/Priority Byte Offset 279 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID278  ,Interrupt ID278   Priority/Priority Byte Offset 278 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID277  ,Interrupt ID277  Priority/Priority Byte Offset 277 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID276  ,Interrupt ID276   Priority/Priority Byte Offset 276 "
group.long 0x518++0x03
line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
hexmask.long.byte 0x00 24.--31. 1. " INTID283  ,Interrupt ID283  Priority/Priority Byte Offset 283 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID282  ,Interrupt ID282   Priority/Priority Byte Offset 282 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID281  ,Interrupt ID281  Priority/Priority Byte Offset 281 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID280  ,Interrupt ID280   Priority/Priority Byte Offset 280 "
group.long 0x51C++0x03
line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
hexmask.long.byte 0x00 24.--31. 1. " INTID287  ,Interrupt ID287  Priority/Priority Byte Offset 287 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID286  ,Interrupt ID286   Priority/Priority Byte Offset 286 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID285  ,Interrupt ID285  Priority/Priority Byte Offset 285 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID284  ,Interrupt ID284   Priority/Priority Byte Offset 284 "
else
hgroup.long 0x500++0x03
hide.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
hgroup.long 0x504++0x03
hide.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
hgroup.long 0x508++0x03
hide.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
hgroup.long 0x50C++0x03
hide.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
hgroup.long 0x510++0x03
hide.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
hgroup.long 0x514++0x03
hide.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
hgroup.long 0x518++0x03
hide.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
hgroup.long 0x51C++0x03
hide.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x520++0x03
line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
hexmask.long.byte 0x00 24.--31. 1. " INTID291  ,Interrupt ID291  Priority/Priority Byte Offset 291 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID290  ,Interrupt ID290   Priority/Priority Byte Offset 290 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID289  ,Interrupt ID289  Priority/Priority Byte Offset 289 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID288  ,Interrupt ID288   Priority/Priority Byte Offset 288 "
group.long 0x524++0x03
line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
hexmask.long.byte 0x00 24.--31. 1. " INTID295  ,Interrupt ID295  Priority/Priority Byte Offset 295 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID294  ,Interrupt ID294   Priority/Priority Byte Offset 294 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID293  ,Interrupt ID293  Priority/Priority Byte Offset 293 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID292  ,Interrupt ID292   Priority/Priority Byte Offset 292 "
group.long 0x528++0x03
line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
hexmask.long.byte 0x00 24.--31. 1. " INTID299  ,Interrupt ID299  Priority/Priority Byte Offset 299 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID298  ,Interrupt ID298   Priority/Priority Byte Offset 298 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID297  ,Interrupt ID297  Priority/Priority Byte Offset 297 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID296  ,Interrupt ID296   Priority/Priority Byte Offset 296 "
group.long 0x52C++0x03
line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
hexmask.long.byte 0x00 24.--31. 1. " INTID303  ,Interrupt ID303  Priority/Priority Byte Offset 303 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID302  ,Interrupt ID302   Priority/Priority Byte Offset 302 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID301  ,Interrupt ID301  Priority/Priority Byte Offset 301 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID300  ,Interrupt ID300   Priority/Priority Byte Offset 300 "
group.long 0x530++0x03
line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
hexmask.long.byte 0x00 24.--31. 1. " INTID307  ,Interrupt ID307  Priority/Priority Byte Offset 307 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID306  ,Interrupt ID306   Priority/Priority Byte Offset 306 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID305  ,Interrupt ID305  Priority/Priority Byte Offset 305 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID304  ,Interrupt ID304   Priority/Priority Byte Offset 304 "
group.long 0x534++0x03
line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
hexmask.long.byte 0x00 24.--31. 1. " INTID311  ,Interrupt ID311  Priority/Priority Byte Offset 311 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID310  ,Interrupt ID310   Priority/Priority Byte Offset 310 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID309  ,Interrupt ID309  Priority/Priority Byte Offset 309 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID308  ,Interrupt ID308   Priority/Priority Byte Offset 308 "
group.long 0x538++0x03
line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
hexmask.long.byte 0x00 24.--31. 1. " INTID315  ,Interrupt ID315  Priority/Priority Byte Offset 315 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID314  ,Interrupt ID314   Priority/Priority Byte Offset 314 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID313  ,Interrupt ID313  Priority/Priority Byte Offset 313 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID312  ,Interrupt ID312   Priority/Priority Byte Offset 312 "
group.long 0x53C++0x03
line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
hexmask.long.byte 0x00 24.--31. 1. " INTID319  ,Interrupt ID319  Priority/Priority Byte Offset 319 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID318  ,Interrupt ID318   Priority/Priority Byte Offset 318 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID317  ,Interrupt ID317  Priority/Priority Byte Offset 317 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID316  ,Interrupt ID316   Priority/Priority Byte Offset 316 "
else
hgroup.long 0x520++0x03
hide.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
hgroup.long 0x524++0x03
hide.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
hgroup.long 0x528++0x03
hide.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
hgroup.long 0x52C++0x03
hide.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
hgroup.long 0x530++0x03
hide.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
hgroup.long 0x534++0x03
hide.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
hgroup.long 0x538++0x03
hide.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
hgroup.long 0x53C++0x03
hide.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x540++0x03
line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
hexmask.long.byte 0x00 24.--31. 1. " INTID323  ,Interrupt ID323  Priority/Priority Byte Offset 323 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID322  ,Interrupt ID322   Priority/Priority Byte Offset 322 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID321  ,Interrupt ID321  Priority/Priority Byte Offset 321 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID320  ,Interrupt ID320   Priority/Priority Byte Offset 320 "
group.long 0x544++0x03
line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
hexmask.long.byte 0x00 24.--31. 1. " INTID327  ,Interrupt ID327  Priority/Priority Byte Offset 327 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID326  ,Interrupt ID326   Priority/Priority Byte Offset 326 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID325  ,Interrupt ID325  Priority/Priority Byte Offset 325 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID324  ,Interrupt ID324   Priority/Priority Byte Offset 324 "
group.long 0x548++0x03
line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
hexmask.long.byte 0x00 24.--31. 1. " INTID331  ,Interrupt ID331  Priority/Priority Byte Offset 331 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID330  ,Interrupt ID330   Priority/Priority Byte Offset 330 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID329  ,Interrupt ID329  Priority/Priority Byte Offset 329 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID328  ,Interrupt ID328   Priority/Priority Byte Offset 328 "
group.long 0x54C++0x03
line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
hexmask.long.byte 0x00 24.--31. 1. " INTID335  ,Interrupt ID335  Priority/Priority Byte Offset 335 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID334  ,Interrupt ID334   Priority/Priority Byte Offset 334 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID333  ,Interrupt ID333  Priority/Priority Byte Offset 333 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID332  ,Interrupt ID332   Priority/Priority Byte Offset 332 "
group.long 0x550++0x03
line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
hexmask.long.byte 0x00 24.--31. 1. " INTID339  ,Interrupt ID339  Priority/Priority Byte Offset 339 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID338  ,Interrupt ID338   Priority/Priority Byte Offset 338 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID337  ,Interrupt ID337  Priority/Priority Byte Offset 337 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID336  ,Interrupt ID336   Priority/Priority Byte Offset 336 "
group.long 0x554++0x03
line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
hexmask.long.byte 0x00 24.--31. 1. " INTID343  ,Interrupt ID343  Priority/Priority Byte Offset 343 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID342  ,Interrupt ID342   Priority/Priority Byte Offset 342 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID341  ,Interrupt ID341  Priority/Priority Byte Offset 341 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID340  ,Interrupt ID340   Priority/Priority Byte Offset 340 "
group.long 0x558++0x03
line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
hexmask.long.byte 0x00 24.--31. 1. " INTID347  ,Interrupt ID347  Priority/Priority Byte Offset 347 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID346  ,Interrupt ID346   Priority/Priority Byte Offset 346 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID345  ,Interrupt ID345  Priority/Priority Byte Offset 345 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID344  ,Interrupt ID344   Priority/Priority Byte Offset 344 "
group.long 0x55C++0x03
line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
hexmask.long.byte 0x00 24.--31. 1. " INTID351  ,Interrupt ID351  Priority/Priority Byte Offset 351 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID350  ,Interrupt ID350   Priority/Priority Byte Offset 350 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID349  ,Interrupt ID349  Priority/Priority Byte Offset 349 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID348  ,Interrupt ID348   Priority/Priority Byte Offset 348 "
else
hgroup.long 0x540++0x03
hide.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
hgroup.long 0x544++0x03
hide.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
hgroup.long 0x548++0x03
hide.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
hgroup.long 0x54C++0x03
hide.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
hgroup.long 0x550++0x03
hide.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
hgroup.long 0x554++0x03
hide.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
hgroup.long 0x558++0x03
hide.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
hgroup.long 0x55C++0x03
hide.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x560++0x03
line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
hexmask.long.byte 0x00 24.--31. 1. " INTID355  ,Interrupt ID355  Priority/Priority Byte Offset 355 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID354  ,Interrupt ID354   Priority/Priority Byte Offset 354 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID353  ,Interrupt ID353  Priority/Priority Byte Offset 353 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID352  ,Interrupt ID352   Priority/Priority Byte Offset 352 "
group.long 0x564++0x03
line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
hexmask.long.byte 0x00 24.--31. 1. " INTID359  ,Interrupt ID359  Priority/Priority Byte Offset 359 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID358  ,Interrupt ID358   Priority/Priority Byte Offset 358 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID357  ,Interrupt ID357  Priority/Priority Byte Offset 357 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID356  ,Interrupt ID356   Priority/Priority Byte Offset 356 "
group.long 0x568++0x03
line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
hexmask.long.byte 0x00 24.--31. 1. " INTID363  ,Interrupt ID363  Priority/Priority Byte Offset 363 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID362  ,Interrupt ID362   Priority/Priority Byte Offset 362 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID361  ,Interrupt ID361  Priority/Priority Byte Offset 361 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID360  ,Interrupt ID360   Priority/Priority Byte Offset 360 "
group.long 0x56C++0x03
line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
hexmask.long.byte 0x00 24.--31. 1. " INTID367  ,Interrupt ID367  Priority/Priority Byte Offset 367 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID366  ,Interrupt ID366   Priority/Priority Byte Offset 366 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID365  ,Interrupt ID365  Priority/Priority Byte Offset 365 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID364  ,Interrupt ID364   Priority/Priority Byte Offset 364 "
group.long 0x570++0x03
line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
hexmask.long.byte 0x00 24.--31. 1. " INTID371  ,Interrupt ID371  Priority/Priority Byte Offset 371 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID370  ,Interrupt ID370   Priority/Priority Byte Offset 370 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID369  ,Interrupt ID369  Priority/Priority Byte Offset 369 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID368  ,Interrupt ID368   Priority/Priority Byte Offset 368 "
group.long 0x574++0x03
line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
hexmask.long.byte 0x00 24.--31. 1. " INTID375  ,Interrupt ID375  Priority/Priority Byte Offset 375 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID374  ,Interrupt ID374   Priority/Priority Byte Offset 374 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID373  ,Interrupt ID373  Priority/Priority Byte Offset 373 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID372  ,Interrupt ID372   Priority/Priority Byte Offset 372 "
group.long 0x578++0x03
line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
hexmask.long.byte 0x00 24.--31. 1. " INTID379  ,Interrupt ID379  Priority/Priority Byte Offset 379 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID378  ,Interrupt ID378   Priority/Priority Byte Offset 378 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID377  ,Interrupt ID377  Priority/Priority Byte Offset 377 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID376  ,Interrupt ID376   Priority/Priority Byte Offset 376 "
group.long 0x57C++0x03
line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
hexmask.long.byte 0x00 24.--31. 1. " INTID383  ,Interrupt ID383  Priority/Priority Byte Offset 383 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID382  ,Interrupt ID382   Priority/Priority Byte Offset 382 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID381  ,Interrupt ID381  Priority/Priority Byte Offset 381 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID380  ,Interrupt ID380   Priority/Priority Byte Offset 380 "
else
hgroup.long 0x560++0x03
hide.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
hgroup.long 0x564++0x03
hide.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
hgroup.long 0x568++0x03
hide.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
hgroup.long 0x56C++0x03
hide.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
hgroup.long 0x570++0x03
hide.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
hgroup.long 0x574++0x03
hide.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
hgroup.long 0x578++0x03
hide.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
hgroup.long 0x57C++0x03
hide.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x580++0x03
line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
hexmask.long.byte 0x00 24.--31. 1. " INTID387  ,Interrupt ID387  Priority/Priority Byte Offset 387 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID386  ,Interrupt ID386   Priority/Priority Byte Offset 386 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID385  ,Interrupt ID385  Priority/Priority Byte Offset 385 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID384  ,Interrupt ID384   Priority/Priority Byte Offset 384 "
group.long 0x584++0x03
line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
hexmask.long.byte 0x00 24.--31. 1. " INTID391  ,Interrupt ID391  Priority/Priority Byte Offset 391 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID390  ,Interrupt ID390   Priority/Priority Byte Offset 390 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID389  ,Interrupt ID389  Priority/Priority Byte Offset 389 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID388  ,Interrupt ID388   Priority/Priority Byte Offset 388 "
group.long 0x588++0x03
line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
hexmask.long.byte 0x00 24.--31. 1. " INTID395  ,Interrupt ID395  Priority/Priority Byte Offset 395 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID394  ,Interrupt ID394   Priority/Priority Byte Offset 394 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID393  ,Interrupt ID393  Priority/Priority Byte Offset 393 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID392  ,Interrupt ID392   Priority/Priority Byte Offset 392 "
group.long 0x58C++0x03
line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
hexmask.long.byte 0x00 24.--31. 1. " INTID399  ,Interrupt ID399  Priority/Priority Byte Offset 399 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID398  ,Interrupt ID398   Priority/Priority Byte Offset 398 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID397  ,Interrupt ID397  Priority/Priority Byte Offset 397 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID396  ,Interrupt ID396   Priority/Priority Byte Offset 396 "
group.long 0x590++0x03
line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
hexmask.long.byte 0x00 24.--31. 1. " INTID403  ,Interrupt ID403  Priority/Priority Byte Offset 403 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID402  ,Interrupt ID402   Priority/Priority Byte Offset 402 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID401  ,Interrupt ID401  Priority/Priority Byte Offset 401 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID400  ,Interrupt ID400   Priority/Priority Byte Offset 400 "
group.long 0x594++0x03
line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
hexmask.long.byte 0x00 24.--31. 1. " INTID407  ,Interrupt ID407  Priority/Priority Byte Offset 407 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID406  ,Interrupt ID406   Priority/Priority Byte Offset 406 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID405  ,Interrupt ID405  Priority/Priority Byte Offset 405 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID404  ,Interrupt ID404   Priority/Priority Byte Offset 404 "
group.long 0x598++0x03
line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
hexmask.long.byte 0x00 24.--31. 1. " INTID411  ,Interrupt ID411  Priority/Priority Byte Offset 411 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID410  ,Interrupt ID410   Priority/Priority Byte Offset 410 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID409  ,Interrupt ID409  Priority/Priority Byte Offset 409 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID408  ,Interrupt ID408   Priority/Priority Byte Offset 408 "
group.long 0x59C++0x03
line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
hexmask.long.byte 0x00 24.--31. 1. " INTID415  ,Interrupt ID415  Priority/Priority Byte Offset 415 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID414  ,Interrupt ID414   Priority/Priority Byte Offset 414 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID413  ,Interrupt ID413  Priority/Priority Byte Offset 413 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID412  ,Interrupt ID412   Priority/Priority Byte Offset 412 "
else
hgroup.long 0x580++0x03
hide.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
hgroup.long 0x584++0x03
hide.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
hgroup.long 0x588++0x03
hide.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
hgroup.long 0x58C++0x03
hide.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
hgroup.long 0x590++0x03
hide.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
hgroup.long 0x594++0x03
hide.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
hgroup.long 0x598++0x03
hide.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
hgroup.long 0x59C++0x03
hide.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x5A0++0x03
line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
hexmask.long.byte 0x00 24.--31. 1. " INTID419  ,Interrupt ID419  Priority/Priority Byte Offset 419 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID418  ,Interrupt ID418   Priority/Priority Byte Offset 418 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID417  ,Interrupt ID417  Priority/Priority Byte Offset 417 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID416  ,Interrupt ID416   Priority/Priority Byte Offset 416 "
group.long 0x5A4++0x03
line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
hexmask.long.byte 0x00 24.--31. 1. " INTID423  ,Interrupt ID423  Priority/Priority Byte Offset 423 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID422  ,Interrupt ID422   Priority/Priority Byte Offset 422 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID421  ,Interrupt ID421  Priority/Priority Byte Offset 421 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID420  ,Interrupt ID420   Priority/Priority Byte Offset 420 "
group.long 0x5A8++0x03
line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
hexmask.long.byte 0x00 24.--31. 1. " INTID427  ,Interrupt ID427  Priority/Priority Byte Offset 427 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID426  ,Interrupt ID426   Priority/Priority Byte Offset 426 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID425  ,Interrupt ID425  Priority/Priority Byte Offset 425 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID424  ,Interrupt ID424   Priority/Priority Byte Offset 424 "
group.long 0x5AC++0x03
line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
hexmask.long.byte 0x00 24.--31. 1. " INTID431  ,Interrupt ID431  Priority/Priority Byte Offset 431 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID430  ,Interrupt ID430   Priority/Priority Byte Offset 430 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID429  ,Interrupt ID429  Priority/Priority Byte Offset 429 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID428  ,Interrupt ID428   Priority/Priority Byte Offset 428 "
group.long 0x5B0++0x03
line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
hexmask.long.byte 0x00 24.--31. 1. " INTID435  ,Interrupt ID435  Priority/Priority Byte Offset 435 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID434  ,Interrupt ID434   Priority/Priority Byte Offset 434 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID433  ,Interrupt ID433  Priority/Priority Byte Offset 433 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID432  ,Interrupt ID432   Priority/Priority Byte Offset 432 "
group.long 0x5B4++0x03
line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
hexmask.long.byte 0x00 24.--31. 1. " INTID439  ,Interrupt ID439  Priority/Priority Byte Offset 439 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID438  ,Interrupt ID438   Priority/Priority Byte Offset 438 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID437  ,Interrupt ID437  Priority/Priority Byte Offset 437 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID436  ,Interrupt ID436   Priority/Priority Byte Offset 436 "
group.long 0x5B8++0x03
line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
hexmask.long.byte 0x00 24.--31. 1. " INTID443  ,Interrupt ID443  Priority/Priority Byte Offset 443 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID442  ,Interrupt ID442   Priority/Priority Byte Offset 442 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID441  ,Interrupt ID441  Priority/Priority Byte Offset 441 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID440  ,Interrupt ID440   Priority/Priority Byte Offset 440 "
group.long 0x5BC++0x03
line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
hexmask.long.byte 0x00 24.--31. 1. " INTID447  ,Interrupt ID447  Priority/Priority Byte Offset 447 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID446  ,Interrupt ID446   Priority/Priority Byte Offset 446 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID445  ,Interrupt ID445  Priority/Priority Byte Offset 445 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID444  ,Interrupt ID444   Priority/Priority Byte Offset 444 "
else
hgroup.long 0x5A0++0x03
hide.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
hgroup.long 0x5A4++0x03
hide.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
hgroup.long 0x5A8++0x03
hide.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
hgroup.long 0x5AC++0x03
hide.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
hgroup.long 0x5B0++0x03
hide.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
hgroup.long 0x5B4++0x03
hide.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
hgroup.long 0x5B8++0x03
hide.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
hgroup.long 0x5BC++0x03
hide.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x5C0++0x03
line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
hexmask.long.byte 0x00 24.--31. 1. " INTID451  ,Interrupt ID451  Priority/Priority Byte Offset 451 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID450  ,Interrupt ID450   Priority/Priority Byte Offset 450 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID449  ,Interrupt ID449  Priority/Priority Byte Offset 449 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID448  ,Interrupt ID448   Priority/Priority Byte Offset 448 "
group.long 0x5C4++0x03
line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
hexmask.long.byte 0x00 24.--31. 1. " INTID455  ,Interrupt ID455  Priority/Priority Byte Offset 455 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID454  ,Interrupt ID454   Priority/Priority Byte Offset 454 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID453  ,Interrupt ID453  Priority/Priority Byte Offset 453 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID452  ,Interrupt ID452   Priority/Priority Byte Offset 452 "
group.long 0x5C8++0x03
line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
hexmask.long.byte 0x00 24.--31. 1. " INTID459  ,Interrupt ID459  Priority/Priority Byte Offset 459 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID458  ,Interrupt ID458   Priority/Priority Byte Offset 458 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID457  ,Interrupt ID457  Priority/Priority Byte Offset 457 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID456  ,Interrupt ID456   Priority/Priority Byte Offset 456 "
group.long 0x5CC++0x03
line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
hexmask.long.byte 0x00 24.--31. 1. " INTID463  ,Interrupt ID463  Priority/Priority Byte Offset 463 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID462  ,Interrupt ID462   Priority/Priority Byte Offset 462 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID461  ,Interrupt ID461  Priority/Priority Byte Offset 461 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID460  ,Interrupt ID460   Priority/Priority Byte Offset 460 "
group.long 0x5D0++0x03
line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
hexmask.long.byte 0x00 24.--31. 1. " INTID467  ,Interrupt ID467  Priority/Priority Byte Offset 467 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID466  ,Interrupt ID466   Priority/Priority Byte Offset 466 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID465  ,Interrupt ID465  Priority/Priority Byte Offset 465 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID464  ,Interrupt ID464   Priority/Priority Byte Offset 464 "
group.long 0x5D4++0x03
line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
hexmask.long.byte 0x00 24.--31. 1. " INTID471  ,Interrupt ID471  Priority/Priority Byte Offset 471 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID470  ,Interrupt ID470   Priority/Priority Byte Offset 470 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID469  ,Interrupt ID469  Priority/Priority Byte Offset 469 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID468  ,Interrupt ID468   Priority/Priority Byte Offset 468 "
group.long 0x5D8++0x03
line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
hexmask.long.byte 0x00 24.--31. 1. " INTID475  ,Interrupt ID475  Priority/Priority Byte Offset 475 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID474  ,Interrupt ID474   Priority/Priority Byte Offset 474 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID473  ,Interrupt ID473  Priority/Priority Byte Offset 473 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID472  ,Interrupt ID472   Priority/Priority Byte Offset 472 "
group.long 0x5DC++0x03
line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
hexmask.long.byte 0x00 24.--31. 1. " INTID479  ,Interrupt ID479  Priority/Priority Byte Offset 479 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID478  ,Interrupt ID478   Priority/Priority Byte Offset 478 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID477  ,Interrupt ID477  Priority/Priority Byte Offset 477 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID476  ,Interrupt ID476   Priority/Priority Byte Offset 476 "
else
hgroup.long 0x5C0++0x03
hide.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
hgroup.long 0x5C4++0x03
hide.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
hgroup.long 0x5C8++0x03
hide.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
hgroup.long 0x5CC++0x03
hide.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
hgroup.long 0x5D0++0x03
hide.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
hgroup.long 0x5D4++0x03
hide.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
hgroup.long 0x5D8++0x03
hide.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
hgroup.long 0x5DC++0x03
hide.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x5E0++0x03
line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
hexmask.long.byte 0x00 24.--31. 1. " INTID483  ,Interrupt ID483  Priority/Priority Byte Offset 483 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID482  ,Interrupt ID482   Priority/Priority Byte Offset 482 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID481  ,Interrupt ID481  Priority/Priority Byte Offset 481 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID480  ,Interrupt ID480   Priority/Priority Byte Offset 480 "
group.long 0x5E4++0x03
line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
hexmask.long.byte 0x00 24.--31. 1. " INTID487  ,Interrupt ID487  Priority/Priority Byte Offset 487 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID486  ,Interrupt ID486   Priority/Priority Byte Offset 486 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID485  ,Interrupt ID485  Priority/Priority Byte Offset 485 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID484  ,Interrupt ID484   Priority/Priority Byte Offset 484 "
group.long 0x5E8++0x03
line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
hexmask.long.byte 0x00 24.--31. 1. " INTID491  ,Interrupt ID491  Priority/Priority Byte Offset 491 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID490  ,Interrupt ID490   Priority/Priority Byte Offset 490 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID489  ,Interrupt ID489  Priority/Priority Byte Offset 489 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID488  ,Interrupt ID488   Priority/Priority Byte Offset 488 "
group.long 0x5EC++0x03
line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
hexmask.long.byte 0x00 24.--31. 1. " INTID495  ,Interrupt ID495  Priority/Priority Byte Offset 495 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID494  ,Interrupt ID494   Priority/Priority Byte Offset 494 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID493  ,Interrupt ID493  Priority/Priority Byte Offset 493 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID492  ,Interrupt ID492   Priority/Priority Byte Offset 492 "
group.long 0x5F0++0x03
line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
hexmask.long.byte 0x00 24.--31. 1. " INTID499  ,Interrupt ID499  Priority/Priority Byte Offset 499 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID498  ,Interrupt ID498   Priority/Priority Byte Offset 498 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID497  ,Interrupt ID497  Priority/Priority Byte Offset 497 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID496  ,Interrupt ID496   Priority/Priority Byte Offset 496 "
group.long 0x5F4++0x03
line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
hexmask.long.byte 0x00 24.--31. 1. " INTID503  ,Interrupt ID503  Priority/Priority Byte Offset 503 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID502  ,Interrupt ID502   Priority/Priority Byte Offset 502 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID501  ,Interrupt ID501  Priority/Priority Byte Offset 501 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID500  ,Interrupt ID500   Priority/Priority Byte Offset 500 "
group.long 0x5F8++0x03
line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
hexmask.long.byte 0x00 24.--31. 1. " INTID507  ,Interrupt ID507  Priority/Priority Byte Offset 507 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID506  ,Interrupt ID506   Priority/Priority Byte Offset 506 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID505  ,Interrupt ID505  Priority/Priority Byte Offset 505 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID504  ,Interrupt ID504   Priority/Priority Byte Offset 504 "
group.long 0x5FC++0x03
line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
hexmask.long.byte 0x00 24.--31. 1. " INTID511  ,Interrupt ID511  Priority/Priority Byte Offset 511 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID510  ,Interrupt ID510   Priority/Priority Byte Offset 510 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID509  ,Interrupt ID509  Priority/Priority Byte Offset 509 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID508  ,Interrupt ID508   Priority/Priority Byte Offset 508 "
else
hgroup.long 0x5E0++0x03
hide.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
hgroup.long 0x5E4++0x03
hide.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
hgroup.long 0x5E8++0x03
hide.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
hgroup.long 0x5EC++0x03
hide.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
hgroup.long 0x5F0++0x03
hide.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
hgroup.long 0x5F4++0x03
hide.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
hgroup.long 0x5F8++0x03
hide.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
hgroup.long 0x5FC++0x03
hide.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0x600++0x03
line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
hexmask.long.byte 0x00 24.--31. 1. " INTID515  ,Interrupt ID515  Priority/Priority Byte Offset 515 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID514  ,Interrupt ID514   Priority/Priority Byte Offset 514 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID513  ,Interrupt ID513  Priority/Priority Byte Offset 513 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID512  ,Interrupt ID512   Priority/Priority Byte Offset 512 "
group.long 0x604++0x03
line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
hexmask.long.byte 0x00 24.--31. 1. " INTID519  ,Interrupt ID519  Priority/Priority Byte Offset 519 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID518  ,Interrupt ID518   Priority/Priority Byte Offset 518 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID517  ,Interrupt ID517  Priority/Priority Byte Offset 517 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID516  ,Interrupt ID516   Priority/Priority Byte Offset 516 "
group.long 0x608++0x03
line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
hexmask.long.byte 0x00 24.--31. 1. " INTID523  ,Interrupt ID523  Priority/Priority Byte Offset 523 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID522  ,Interrupt ID522   Priority/Priority Byte Offset 522 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID521  ,Interrupt ID521  Priority/Priority Byte Offset 521 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID520  ,Interrupt ID520   Priority/Priority Byte Offset 520 "
group.long 0x60C++0x03
line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
hexmask.long.byte 0x00 24.--31. 1. " INTID527  ,Interrupt ID527  Priority/Priority Byte Offset 527 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID526  ,Interrupt ID526   Priority/Priority Byte Offset 526 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID525  ,Interrupt ID525  Priority/Priority Byte Offset 525 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID524  ,Interrupt ID524   Priority/Priority Byte Offset 524 "
group.long 0x610++0x03
line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
hexmask.long.byte 0x00 24.--31. 1. " INTID531  ,Interrupt ID531  Priority/Priority Byte Offset 531 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID530  ,Interrupt ID530   Priority/Priority Byte Offset 530 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID529  ,Interrupt ID529  Priority/Priority Byte Offset 529 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID528  ,Interrupt ID528   Priority/Priority Byte Offset 528 "
group.long 0x614++0x03
line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
hexmask.long.byte 0x00 24.--31. 1. " INTID535  ,Interrupt ID535  Priority/Priority Byte Offset 535 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID534  ,Interrupt ID534   Priority/Priority Byte Offset 534 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID533  ,Interrupt ID533  Priority/Priority Byte Offset 533 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID532  ,Interrupt ID532   Priority/Priority Byte Offset 532 "
group.long 0x618++0x03
line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
hexmask.long.byte 0x00 24.--31. 1. " INTID539  ,Interrupt ID539  Priority/Priority Byte Offset 539 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID538  ,Interrupt ID538   Priority/Priority Byte Offset 538 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID537  ,Interrupt ID537  Priority/Priority Byte Offset 537 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID536  ,Interrupt ID536   Priority/Priority Byte Offset 536 "
group.long 0x61C++0x03
line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
hexmask.long.byte 0x00 24.--31. 1. " INTID543  ,Interrupt ID543  Priority/Priority Byte Offset 543 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID542  ,Interrupt ID542   Priority/Priority Byte Offset 542 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID541  ,Interrupt ID541  Priority/Priority Byte Offset 541 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID540  ,Interrupt ID540   Priority/Priority Byte Offset 540 "
else
hgroup.long 0x600++0x03
hide.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
hgroup.long 0x604++0x03
hide.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
hgroup.long 0x608++0x03
hide.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
hgroup.long 0x60C++0x03
hide.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
hgroup.long 0x610++0x03
hide.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
hgroup.long 0x614++0x03
hide.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
hgroup.long 0x618++0x03
hide.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
hgroup.long 0x61C++0x03
hide.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0x620++0x03
line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
hexmask.long.byte 0x00 24.--31. 1. " INTID547  ,Interrupt ID547  Priority/Priority Byte Offset 547 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID546  ,Interrupt ID546   Priority/Priority Byte Offset 546 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID545  ,Interrupt ID545  Priority/Priority Byte Offset 545 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID544  ,Interrupt ID544   Priority/Priority Byte Offset 544 "
group.long 0x624++0x03
line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
hexmask.long.byte 0x00 24.--31. 1. " INTID551  ,Interrupt ID551  Priority/Priority Byte Offset 551 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID550  ,Interrupt ID550   Priority/Priority Byte Offset 550 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID549  ,Interrupt ID549  Priority/Priority Byte Offset 549 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID548  ,Interrupt ID548   Priority/Priority Byte Offset 548 "
group.long 0x628++0x03
line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
hexmask.long.byte 0x00 24.--31. 1. " INTID555  ,Interrupt ID555  Priority/Priority Byte Offset 555 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID554  ,Interrupt ID554   Priority/Priority Byte Offset 554 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID553  ,Interrupt ID553  Priority/Priority Byte Offset 553 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID552  ,Interrupt ID552   Priority/Priority Byte Offset 552 "
group.long 0x62C++0x03
line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
hexmask.long.byte 0x00 24.--31. 1. " INTID559  ,Interrupt ID559  Priority/Priority Byte Offset 559 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID558  ,Interrupt ID558   Priority/Priority Byte Offset 558 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID557  ,Interrupt ID557  Priority/Priority Byte Offset 557 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID556  ,Interrupt ID556   Priority/Priority Byte Offset 556 "
group.long 0x630++0x03
line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
hexmask.long.byte 0x00 24.--31. 1. " INTID563  ,Interrupt ID563  Priority/Priority Byte Offset 563 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID562  ,Interrupt ID562   Priority/Priority Byte Offset 562 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID561  ,Interrupt ID561  Priority/Priority Byte Offset 561 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID560  ,Interrupt ID560   Priority/Priority Byte Offset 560 "
group.long 0x634++0x03
line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
hexmask.long.byte 0x00 24.--31. 1. " INTID567  ,Interrupt ID567  Priority/Priority Byte Offset 567 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID566  ,Interrupt ID566   Priority/Priority Byte Offset 566 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID565  ,Interrupt ID565  Priority/Priority Byte Offset 565 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID564  ,Interrupt ID564   Priority/Priority Byte Offset 564 "
group.long 0x638++0x03
line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
hexmask.long.byte 0x00 24.--31. 1. " INTID571  ,Interrupt ID571  Priority/Priority Byte Offset 571 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID570  ,Interrupt ID570   Priority/Priority Byte Offset 570 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID569  ,Interrupt ID569  Priority/Priority Byte Offset 569 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID568  ,Interrupt ID568   Priority/Priority Byte Offset 568 "
group.long 0x63C++0x03
line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
hexmask.long.byte 0x00 24.--31. 1. " INTID575  ,Interrupt ID575  Priority/Priority Byte Offset 575 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID574  ,Interrupt ID574   Priority/Priority Byte Offset 574 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID573  ,Interrupt ID573  Priority/Priority Byte Offset 573 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID572  ,Interrupt ID572   Priority/Priority Byte Offset 572 "
else
hgroup.long 0x620++0x03
hide.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
hgroup.long 0x624++0x03
hide.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
hgroup.long 0x628++0x03
hide.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
hgroup.long 0x62C++0x03
hide.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
hgroup.long 0x630++0x03
hide.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
hgroup.long 0x634++0x03
hide.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
hgroup.long 0x638++0x03
hide.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
hgroup.long 0x63C++0x03
hide.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0x640++0x03
line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
hexmask.long.byte 0x00 24.--31. 1. " INTID579  ,Interrupt ID579  Priority/Priority Byte Offset 579 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID578  ,Interrupt ID578   Priority/Priority Byte Offset 578 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID577  ,Interrupt ID577  Priority/Priority Byte Offset 577 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID576  ,Interrupt ID576   Priority/Priority Byte Offset 576 "
group.long 0x644++0x03
line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
hexmask.long.byte 0x00 24.--31. 1. " INTID583  ,Interrupt ID583  Priority/Priority Byte Offset 583 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID582  ,Interrupt ID582   Priority/Priority Byte Offset 582 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID581  ,Interrupt ID581  Priority/Priority Byte Offset 581 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID580  ,Interrupt ID580   Priority/Priority Byte Offset 580 "
group.long 0x648++0x03
line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
hexmask.long.byte 0x00 24.--31. 1. " INTID587  ,Interrupt ID587  Priority/Priority Byte Offset 587 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID586  ,Interrupt ID586   Priority/Priority Byte Offset 586 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID585  ,Interrupt ID585  Priority/Priority Byte Offset 585 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID584  ,Interrupt ID584   Priority/Priority Byte Offset 584 "
group.long 0x64C++0x03
line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
hexmask.long.byte 0x00 24.--31. 1. " INTID591  ,Interrupt ID591  Priority/Priority Byte Offset 591 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID590  ,Interrupt ID590   Priority/Priority Byte Offset 590 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID589  ,Interrupt ID589  Priority/Priority Byte Offset 589 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID588  ,Interrupt ID588   Priority/Priority Byte Offset 588 "
group.long 0x650++0x03
line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
hexmask.long.byte 0x00 24.--31. 1. " INTID595  ,Interrupt ID595  Priority/Priority Byte Offset 595 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID594  ,Interrupt ID594   Priority/Priority Byte Offset 594 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID593  ,Interrupt ID593  Priority/Priority Byte Offset 593 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID592  ,Interrupt ID592   Priority/Priority Byte Offset 592 "
group.long 0x654++0x03
line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
hexmask.long.byte 0x00 24.--31. 1. " INTID599  ,Interrupt ID599  Priority/Priority Byte Offset 599 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID598  ,Interrupt ID598   Priority/Priority Byte Offset 598 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID597  ,Interrupt ID597  Priority/Priority Byte Offset 597 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID596  ,Interrupt ID596   Priority/Priority Byte Offset 596 "
group.long 0x658++0x03
line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
hexmask.long.byte 0x00 24.--31. 1. " INTID603  ,Interrupt ID603  Priority/Priority Byte Offset 603 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID602  ,Interrupt ID602   Priority/Priority Byte Offset 602 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID601  ,Interrupt ID601  Priority/Priority Byte Offset 601 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID600  ,Interrupt ID600   Priority/Priority Byte Offset 600 "
group.long 0x65C++0x03
line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
hexmask.long.byte 0x00 24.--31. 1. " INTID607  ,Interrupt ID607  Priority/Priority Byte Offset 607 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID606  ,Interrupt ID606   Priority/Priority Byte Offset 606 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID605  ,Interrupt ID605  Priority/Priority Byte Offset 605 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID604  ,Interrupt ID604   Priority/Priority Byte Offset 604 "
else
hgroup.long 0x640++0x03
hide.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
hgroup.long 0x644++0x03
hide.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
hgroup.long 0x648++0x03
hide.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
hgroup.long 0x64C++0x03
hide.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
hgroup.long 0x650++0x03
hide.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
hgroup.long 0x654++0x03
hide.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
hgroup.long 0x658++0x03
hide.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
hgroup.long 0x65C++0x03
hide.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0x660++0x03
line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
hexmask.long.byte 0x00 24.--31. 1. " INTID611  ,Interrupt ID611  Priority/Priority Byte Offset 611 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID610  ,Interrupt ID610   Priority/Priority Byte Offset 610 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID609  ,Interrupt ID609  Priority/Priority Byte Offset 609 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID608  ,Interrupt ID608   Priority/Priority Byte Offset 608 "
group.long 0x664++0x03
line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
hexmask.long.byte 0x00 24.--31. 1. " INTID615  ,Interrupt ID615  Priority/Priority Byte Offset 615 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID614  ,Interrupt ID614   Priority/Priority Byte Offset 614 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID613  ,Interrupt ID613  Priority/Priority Byte Offset 613 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID612  ,Interrupt ID612   Priority/Priority Byte Offset 612 "
group.long 0x668++0x03
line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
hexmask.long.byte 0x00 24.--31. 1. " INTID619  ,Interrupt ID619  Priority/Priority Byte Offset 619 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID618  ,Interrupt ID618   Priority/Priority Byte Offset 618 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID617  ,Interrupt ID617  Priority/Priority Byte Offset 617 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID616  ,Interrupt ID616   Priority/Priority Byte Offset 616 "
group.long 0x66C++0x03
line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
hexmask.long.byte 0x00 24.--31. 1. " INTID623  ,Interrupt ID623  Priority/Priority Byte Offset 623 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID622  ,Interrupt ID622   Priority/Priority Byte Offset 622 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID621  ,Interrupt ID621  Priority/Priority Byte Offset 621 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID620  ,Interrupt ID620   Priority/Priority Byte Offset 620 "
group.long 0x670++0x03
line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
hexmask.long.byte 0x00 24.--31. 1. " INTID627  ,Interrupt ID627  Priority/Priority Byte Offset 627 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID626  ,Interrupt ID626   Priority/Priority Byte Offset 626 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID625  ,Interrupt ID625  Priority/Priority Byte Offset 625 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID624  ,Interrupt ID624   Priority/Priority Byte Offset 624 "
group.long 0x674++0x03
line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
hexmask.long.byte 0x00 24.--31. 1. " INTID631  ,Interrupt ID631  Priority/Priority Byte Offset 631 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID630  ,Interrupt ID630   Priority/Priority Byte Offset 630 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID629  ,Interrupt ID629  Priority/Priority Byte Offset 629 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID628  ,Interrupt ID628   Priority/Priority Byte Offset 628 "
group.long 0x678++0x03
line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
hexmask.long.byte 0x00 24.--31. 1. " INTID635  ,Interrupt ID635  Priority/Priority Byte Offset 635 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID634  ,Interrupt ID634   Priority/Priority Byte Offset 634 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID633  ,Interrupt ID633  Priority/Priority Byte Offset 633 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID632  ,Interrupt ID632   Priority/Priority Byte Offset 632 "
group.long 0x67C++0x03
line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
hexmask.long.byte 0x00 24.--31. 1. " INTID639  ,Interrupt ID639  Priority/Priority Byte Offset 639 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID638  ,Interrupt ID638   Priority/Priority Byte Offset 638 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID637  ,Interrupt ID637  Priority/Priority Byte Offset 637 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID636  ,Interrupt ID636   Priority/Priority Byte Offset 636 "
else
hgroup.long 0x660++0x03
hide.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
hgroup.long 0x664++0x03
hide.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
hgroup.long 0x668++0x03
hide.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
hgroup.long 0x66C++0x03
hide.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
hgroup.long 0x670++0x03
hide.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
hgroup.long 0x674++0x03
hide.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
hgroup.long 0x678++0x03
hide.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
hgroup.long 0x67C++0x03
hide.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0x680++0x03
line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
hexmask.long.byte 0x00 24.--31. 1. " INTID643  ,Interrupt ID643  Priority/Priority Byte Offset 643 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID642  ,Interrupt ID642   Priority/Priority Byte Offset 642 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID641  ,Interrupt ID641  Priority/Priority Byte Offset 641 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID640  ,Interrupt ID640   Priority/Priority Byte Offset 640 "
group.long 0x684++0x03
line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
hexmask.long.byte 0x00 24.--31. 1. " INTID647  ,Interrupt ID647  Priority/Priority Byte Offset 647 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID646  ,Interrupt ID646   Priority/Priority Byte Offset 646 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID645  ,Interrupt ID645  Priority/Priority Byte Offset 645 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID644  ,Interrupt ID644   Priority/Priority Byte Offset 644 "
group.long 0x688++0x03
line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
hexmask.long.byte 0x00 24.--31. 1. " INTID651  ,Interrupt ID651  Priority/Priority Byte Offset 651 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID650  ,Interrupt ID650   Priority/Priority Byte Offset 650 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID649  ,Interrupt ID649  Priority/Priority Byte Offset 649 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID648  ,Interrupt ID648   Priority/Priority Byte Offset 648 "
group.long 0x68C++0x03
line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
hexmask.long.byte 0x00 24.--31. 1. " INTID655  ,Interrupt ID655  Priority/Priority Byte Offset 655 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID654  ,Interrupt ID654   Priority/Priority Byte Offset 654 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID653  ,Interrupt ID653  Priority/Priority Byte Offset 653 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID652  ,Interrupt ID652   Priority/Priority Byte Offset 652 "
group.long 0x690++0x03
line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
hexmask.long.byte 0x00 24.--31. 1. " INTID659  ,Interrupt ID659  Priority/Priority Byte Offset 659 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID658  ,Interrupt ID658   Priority/Priority Byte Offset 658 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID657  ,Interrupt ID657  Priority/Priority Byte Offset 657 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID656  ,Interrupt ID656   Priority/Priority Byte Offset 656 "
group.long 0x694++0x03
line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
hexmask.long.byte 0x00 24.--31. 1. " INTID663  ,Interrupt ID663  Priority/Priority Byte Offset 663 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID662  ,Interrupt ID662   Priority/Priority Byte Offset 662 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID661  ,Interrupt ID661  Priority/Priority Byte Offset 661 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID660  ,Interrupt ID660   Priority/Priority Byte Offset 660 "
group.long 0x698++0x03
line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
hexmask.long.byte 0x00 24.--31. 1. " INTID667  ,Interrupt ID667  Priority/Priority Byte Offset 667 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID666  ,Interrupt ID666   Priority/Priority Byte Offset 666 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID665  ,Interrupt ID665  Priority/Priority Byte Offset 665 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID664  ,Interrupt ID664   Priority/Priority Byte Offset 664 "
group.long 0x69C++0x03
line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
hexmask.long.byte 0x00 24.--31. 1. " INTID671  ,Interrupt ID671  Priority/Priority Byte Offset 671 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID670  ,Interrupt ID670   Priority/Priority Byte Offset 670 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID669  ,Interrupt ID669  Priority/Priority Byte Offset 669 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID668  ,Interrupt ID668   Priority/Priority Byte Offset 668 "
else
hgroup.long 0x680++0x03
hide.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
hgroup.long 0x684++0x03
hide.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
hgroup.long 0x688++0x03
hide.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
hgroup.long 0x68C++0x03
hide.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
hgroup.long 0x690++0x03
hide.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
hgroup.long 0x694++0x03
hide.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
hgroup.long 0x698++0x03
hide.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
hgroup.long 0x69C++0x03
hide.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0x6A0++0x03
line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
hexmask.long.byte 0x00 24.--31. 1. " INTID675  ,Interrupt ID675  Priority/Priority Byte Offset 675 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID674  ,Interrupt ID674   Priority/Priority Byte Offset 674 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID673  ,Interrupt ID673  Priority/Priority Byte Offset 673 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID672  ,Interrupt ID672   Priority/Priority Byte Offset 672 "
group.long 0x6A4++0x03
line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
hexmask.long.byte 0x00 24.--31. 1. " INTID679  ,Interrupt ID679  Priority/Priority Byte Offset 679 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID678  ,Interrupt ID678   Priority/Priority Byte Offset 678 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID677  ,Interrupt ID677  Priority/Priority Byte Offset 677 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID676  ,Interrupt ID676   Priority/Priority Byte Offset 676 "
group.long 0x6A8++0x03
line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
hexmask.long.byte 0x00 24.--31. 1. " INTID683  ,Interrupt ID683  Priority/Priority Byte Offset 683 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID682  ,Interrupt ID682   Priority/Priority Byte Offset 682 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID681  ,Interrupt ID681  Priority/Priority Byte Offset 681 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID680  ,Interrupt ID680   Priority/Priority Byte Offset 680 "
group.long 0x6AC++0x03
line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
hexmask.long.byte 0x00 24.--31. 1. " INTID687  ,Interrupt ID687  Priority/Priority Byte Offset 687 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID686  ,Interrupt ID686   Priority/Priority Byte Offset 686 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID685  ,Interrupt ID685  Priority/Priority Byte Offset 685 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID684  ,Interrupt ID684   Priority/Priority Byte Offset 684 "
group.long 0x6B0++0x03
line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
hexmask.long.byte 0x00 24.--31. 1. " INTID691  ,Interrupt ID691  Priority/Priority Byte Offset 691 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID690  ,Interrupt ID690   Priority/Priority Byte Offset 690 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID689  ,Interrupt ID689  Priority/Priority Byte Offset 689 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID688  ,Interrupt ID688   Priority/Priority Byte Offset 688 "
group.long 0x6B4++0x03
line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
hexmask.long.byte 0x00 24.--31. 1. " INTID695  ,Interrupt ID695  Priority/Priority Byte Offset 695 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID694  ,Interrupt ID694   Priority/Priority Byte Offset 694 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID693  ,Interrupt ID693  Priority/Priority Byte Offset 693 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID692  ,Interrupt ID692   Priority/Priority Byte Offset 692 "
group.long 0x6B8++0x03
line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
hexmask.long.byte 0x00 24.--31. 1. " INTID699  ,Interrupt ID699  Priority/Priority Byte Offset 699 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID698  ,Interrupt ID698   Priority/Priority Byte Offset 698 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID697  ,Interrupt ID697  Priority/Priority Byte Offset 697 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID696  ,Interrupt ID696   Priority/Priority Byte Offset 696 "
group.long 0x6BC++0x03
line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
hexmask.long.byte 0x00 24.--31. 1. " INTID703  ,Interrupt ID703  Priority/Priority Byte Offset 703 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID702  ,Interrupt ID702   Priority/Priority Byte Offset 702 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID701  ,Interrupt ID701  Priority/Priority Byte Offset 701 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID700  ,Interrupt ID700   Priority/Priority Byte Offset 700 "
else
hgroup.long 0x6A0++0x03
hide.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
hgroup.long 0x6A4++0x03
hide.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
hgroup.long 0x6A8++0x03
hide.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
hgroup.long 0x6AC++0x03
hide.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
hgroup.long 0x6B0++0x03
hide.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
hgroup.long 0x6B4++0x03
hide.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
hgroup.long 0x6B8++0x03
hide.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
hgroup.long 0x6BC++0x03
hide.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0x6C0++0x03
line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
hexmask.long.byte 0x00 24.--31. 1. " INTID707  ,Interrupt ID707  Priority/Priority Byte Offset 707 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID706  ,Interrupt ID706   Priority/Priority Byte Offset 706 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID705  ,Interrupt ID705  Priority/Priority Byte Offset 705 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID704  ,Interrupt ID704   Priority/Priority Byte Offset 704 "
group.long 0x6C4++0x03
line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
hexmask.long.byte 0x00 24.--31. 1. " INTID711  ,Interrupt ID711  Priority/Priority Byte Offset 711 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID710  ,Interrupt ID710   Priority/Priority Byte Offset 710 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID709  ,Interrupt ID709  Priority/Priority Byte Offset 709 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID708  ,Interrupt ID708   Priority/Priority Byte Offset 708 "
group.long 0x6C8++0x03
line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
hexmask.long.byte 0x00 24.--31. 1. " INTID715  ,Interrupt ID715  Priority/Priority Byte Offset 715 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID714  ,Interrupt ID714   Priority/Priority Byte Offset 714 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID713  ,Interrupt ID713  Priority/Priority Byte Offset 713 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID712  ,Interrupt ID712   Priority/Priority Byte Offset 712 "
group.long 0x6CC++0x03
line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
hexmask.long.byte 0x00 24.--31. 1. " INTID719  ,Interrupt ID719  Priority/Priority Byte Offset 719 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID718  ,Interrupt ID718   Priority/Priority Byte Offset 718 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID717  ,Interrupt ID717  Priority/Priority Byte Offset 717 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID716  ,Interrupt ID716   Priority/Priority Byte Offset 716 "
group.long 0x6D0++0x03
line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
hexmask.long.byte 0x00 24.--31. 1. " INTID723  ,Interrupt ID723  Priority/Priority Byte Offset 723 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID722  ,Interrupt ID722   Priority/Priority Byte Offset 722 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID721  ,Interrupt ID721  Priority/Priority Byte Offset 721 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID720  ,Interrupt ID720   Priority/Priority Byte Offset 720 "
group.long 0x6D4++0x03
line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
hexmask.long.byte 0x00 24.--31. 1. " INTID727  ,Interrupt ID727  Priority/Priority Byte Offset 727 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID726  ,Interrupt ID726   Priority/Priority Byte Offset 726 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID725  ,Interrupt ID725  Priority/Priority Byte Offset 725 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID724  ,Interrupt ID724   Priority/Priority Byte Offset 724 "
group.long 0x6D8++0x03
line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
hexmask.long.byte 0x00 24.--31. 1. " INTID731  ,Interrupt ID731  Priority/Priority Byte Offset 731 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID730  ,Interrupt ID730   Priority/Priority Byte Offset 730 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID729  ,Interrupt ID729  Priority/Priority Byte Offset 729 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID728  ,Interrupt ID728   Priority/Priority Byte Offset 728 "
group.long 0x6DC++0x03
line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
hexmask.long.byte 0x00 24.--31. 1. " INTID735  ,Interrupt ID735  Priority/Priority Byte Offset 735 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID734  ,Interrupt ID734   Priority/Priority Byte Offset 734 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID733  ,Interrupt ID733  Priority/Priority Byte Offset 733 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID732  ,Interrupt ID732   Priority/Priority Byte Offset 732 "
else
hgroup.long 0x6C0++0x03
hide.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
hgroup.long 0x6C4++0x03
hide.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
hgroup.long 0x6C8++0x03
hide.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
hgroup.long 0x6CC++0x03
hide.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
hgroup.long 0x6D0++0x03
hide.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
hgroup.long 0x6D4++0x03
hide.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
hgroup.long 0x6D8++0x03
hide.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
hgroup.long 0x6DC++0x03
hide.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0x6E0++0x03
line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
hexmask.long.byte 0x00 24.--31. 1. " INTID739  ,Interrupt ID739  Priority/Priority Byte Offset 739 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID738  ,Interrupt ID738   Priority/Priority Byte Offset 738 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID737  ,Interrupt ID737  Priority/Priority Byte Offset 737 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID736  ,Interrupt ID736   Priority/Priority Byte Offset 736 "
group.long 0x6E4++0x03
line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
hexmask.long.byte 0x00 24.--31. 1. " INTID743  ,Interrupt ID743  Priority/Priority Byte Offset 743 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID742  ,Interrupt ID742   Priority/Priority Byte Offset 742 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID741  ,Interrupt ID741  Priority/Priority Byte Offset 741 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID740  ,Interrupt ID740   Priority/Priority Byte Offset 740 "
group.long 0x6E8++0x03
line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
hexmask.long.byte 0x00 24.--31. 1. " INTID747  ,Interrupt ID747  Priority/Priority Byte Offset 747 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID746  ,Interrupt ID746   Priority/Priority Byte Offset 746 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID745  ,Interrupt ID745  Priority/Priority Byte Offset 745 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID744  ,Interrupt ID744   Priority/Priority Byte Offset 744 "
group.long 0x6EC++0x03
line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
hexmask.long.byte 0x00 24.--31. 1. " INTID751  ,Interrupt ID751  Priority/Priority Byte Offset 751 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID750  ,Interrupt ID750   Priority/Priority Byte Offset 750 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID749  ,Interrupt ID749  Priority/Priority Byte Offset 749 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID748  ,Interrupt ID748   Priority/Priority Byte Offset 748 "
group.long 0x6F0++0x03
line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
hexmask.long.byte 0x00 24.--31. 1. " INTID755  ,Interrupt ID755  Priority/Priority Byte Offset 755 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID754  ,Interrupt ID754   Priority/Priority Byte Offset 754 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID753  ,Interrupt ID753  Priority/Priority Byte Offset 753 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID752  ,Interrupt ID752   Priority/Priority Byte Offset 752 "
group.long 0x6F4++0x03
line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
hexmask.long.byte 0x00 24.--31. 1. " INTID759  ,Interrupt ID759  Priority/Priority Byte Offset 759 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID758  ,Interrupt ID758   Priority/Priority Byte Offset 758 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID757  ,Interrupt ID757  Priority/Priority Byte Offset 757 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID756  ,Interrupt ID756   Priority/Priority Byte Offset 756 "
group.long 0x6F8++0x03
line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
hexmask.long.byte 0x00 24.--31. 1. " INTID763  ,Interrupt ID763  Priority/Priority Byte Offset 763 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID762  ,Interrupt ID762   Priority/Priority Byte Offset 762 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID761  ,Interrupt ID761  Priority/Priority Byte Offset 761 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID760  ,Interrupt ID760   Priority/Priority Byte Offset 760 "
group.long 0x6FC++0x03
line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
hexmask.long.byte 0x00 24.--31. 1. " INTID767  ,Interrupt ID767  Priority/Priority Byte Offset 767 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID766  ,Interrupt ID766   Priority/Priority Byte Offset 766 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID765  ,Interrupt ID765  Priority/Priority Byte Offset 765 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID764  ,Interrupt ID764   Priority/Priority Byte Offset 764 "
else
hgroup.long 0x6E0++0x03
hide.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
hgroup.long 0x6E4++0x03
hide.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
hgroup.long 0x6E8++0x03
hide.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
hgroup.long 0x6EC++0x03
hide.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
hgroup.long 0x6F0++0x03
hide.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
hgroup.long 0x6F4++0x03
hide.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
hgroup.long 0x6F8++0x03
hide.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
hgroup.long 0x6FC++0x03
hide.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0x700++0x03
line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
hexmask.long.byte 0x00 24.--31. 1. " INTID771  ,Interrupt ID771  Priority/Priority Byte Offset 771 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID770  ,Interrupt ID770   Priority/Priority Byte Offset 770 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID769  ,Interrupt ID769  Priority/Priority Byte Offset 769 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID768  ,Interrupt ID768   Priority/Priority Byte Offset 768 "
group.long 0x704++0x03
line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
hexmask.long.byte 0x00 24.--31. 1. " INTID775  ,Interrupt ID775  Priority/Priority Byte Offset 775 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID774  ,Interrupt ID774   Priority/Priority Byte Offset 774 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID773  ,Interrupt ID773  Priority/Priority Byte Offset 773 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID772  ,Interrupt ID772   Priority/Priority Byte Offset 772 "
group.long 0x708++0x03
line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
hexmask.long.byte 0x00 24.--31. 1. " INTID779  ,Interrupt ID779  Priority/Priority Byte Offset 779 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID778  ,Interrupt ID778   Priority/Priority Byte Offset 778 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID777  ,Interrupt ID777  Priority/Priority Byte Offset 777 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID776  ,Interrupt ID776   Priority/Priority Byte Offset 776 "
group.long 0x70C++0x03
line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
hexmask.long.byte 0x00 24.--31. 1. " INTID783  ,Interrupt ID783  Priority/Priority Byte Offset 783 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID782  ,Interrupt ID782   Priority/Priority Byte Offset 782 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID781  ,Interrupt ID781  Priority/Priority Byte Offset 781 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID780  ,Interrupt ID780   Priority/Priority Byte Offset 780 "
group.long 0x710++0x03
line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
hexmask.long.byte 0x00 24.--31. 1. " INTID787  ,Interrupt ID787  Priority/Priority Byte Offset 787 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID786  ,Interrupt ID786   Priority/Priority Byte Offset 786 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID785  ,Interrupt ID785  Priority/Priority Byte Offset 785 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID784  ,Interrupt ID784   Priority/Priority Byte Offset 784 "
group.long 0x714++0x03
line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
hexmask.long.byte 0x00 24.--31. 1. " INTID791  ,Interrupt ID791  Priority/Priority Byte Offset 791 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID790  ,Interrupt ID790   Priority/Priority Byte Offset 790 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID789  ,Interrupt ID789  Priority/Priority Byte Offset 789 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID788  ,Interrupt ID788   Priority/Priority Byte Offset 788 "
group.long 0x718++0x03
line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
hexmask.long.byte 0x00 24.--31. 1. " INTID795  ,Interrupt ID795  Priority/Priority Byte Offset 795 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID794  ,Interrupt ID794   Priority/Priority Byte Offset 794 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID793  ,Interrupt ID793  Priority/Priority Byte Offset 793 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID792  ,Interrupt ID792   Priority/Priority Byte Offset 792 "
group.long 0x71C++0x03
line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
hexmask.long.byte 0x00 24.--31. 1. " INTID799  ,Interrupt ID799  Priority/Priority Byte Offset 799 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID798  ,Interrupt ID798   Priority/Priority Byte Offset 798 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID797  ,Interrupt ID797  Priority/Priority Byte Offset 797 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID796  ,Interrupt ID796   Priority/Priority Byte Offset 796 "
else
hgroup.long 0x700++0x03
hide.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
hgroup.long 0x704++0x03
hide.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
hgroup.long 0x708++0x03
hide.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
hgroup.long 0x70C++0x03
hide.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
hgroup.long 0x710++0x03
hide.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
hgroup.long 0x714++0x03
hide.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
hgroup.long 0x718++0x03
hide.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
hgroup.long 0x71C++0x03
hide.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0x720++0x03
line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
hexmask.long.byte 0x00 24.--31. 1. " INTID803  ,Interrupt ID803  Priority/Priority Byte Offset 803 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID802  ,Interrupt ID802   Priority/Priority Byte Offset 802 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID801  ,Interrupt ID801  Priority/Priority Byte Offset 801 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID800  ,Interrupt ID800   Priority/Priority Byte Offset 800 "
group.long 0x724++0x03
line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
hexmask.long.byte 0x00 24.--31. 1. " INTID807  ,Interrupt ID807  Priority/Priority Byte Offset 807 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID806  ,Interrupt ID806   Priority/Priority Byte Offset 806 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID805  ,Interrupt ID805  Priority/Priority Byte Offset 805 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID804  ,Interrupt ID804   Priority/Priority Byte Offset 804 "
group.long 0x728++0x03
line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
hexmask.long.byte 0x00 24.--31. 1. " INTID811  ,Interrupt ID811  Priority/Priority Byte Offset 811 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID810  ,Interrupt ID810   Priority/Priority Byte Offset 810 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID809  ,Interrupt ID809  Priority/Priority Byte Offset 809 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID808  ,Interrupt ID808   Priority/Priority Byte Offset 808 "
group.long 0x72C++0x03
line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
hexmask.long.byte 0x00 24.--31. 1. " INTID815  ,Interrupt ID815  Priority/Priority Byte Offset 815 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID814  ,Interrupt ID814   Priority/Priority Byte Offset 814 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID813  ,Interrupt ID813  Priority/Priority Byte Offset 813 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID812  ,Interrupt ID812   Priority/Priority Byte Offset 812 "
group.long 0x730++0x03
line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
hexmask.long.byte 0x00 24.--31. 1. " INTID819  ,Interrupt ID819  Priority/Priority Byte Offset 819 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID818  ,Interrupt ID818   Priority/Priority Byte Offset 818 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID817  ,Interrupt ID817  Priority/Priority Byte Offset 817 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID816  ,Interrupt ID816   Priority/Priority Byte Offset 816 "
group.long 0x734++0x03
line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
hexmask.long.byte 0x00 24.--31. 1. " INTID823  ,Interrupt ID823  Priority/Priority Byte Offset 823 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID822  ,Interrupt ID822   Priority/Priority Byte Offset 822 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID821  ,Interrupt ID821  Priority/Priority Byte Offset 821 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID820  ,Interrupt ID820   Priority/Priority Byte Offset 820 "
group.long 0x738++0x03
line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
hexmask.long.byte 0x00 24.--31. 1. " INTID827  ,Interrupt ID827  Priority/Priority Byte Offset 827 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID826  ,Interrupt ID826   Priority/Priority Byte Offset 826 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID825  ,Interrupt ID825  Priority/Priority Byte Offset 825 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID824  ,Interrupt ID824   Priority/Priority Byte Offset 824 "
group.long 0x73C++0x03
line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
hexmask.long.byte 0x00 24.--31. 1. " INTID831  ,Interrupt ID831  Priority/Priority Byte Offset 831 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID830  ,Interrupt ID830   Priority/Priority Byte Offset 830 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID829  ,Interrupt ID829  Priority/Priority Byte Offset 829 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID828  ,Interrupt ID828   Priority/Priority Byte Offset 828 "
else
hgroup.long 0x720++0x03
hide.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
hgroup.long 0x724++0x03
hide.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
hgroup.long 0x728++0x03
hide.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
hgroup.long 0x72C++0x03
hide.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
hgroup.long 0x730++0x03
hide.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
hgroup.long 0x734++0x03
hide.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
hgroup.long 0x738++0x03
hide.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
hgroup.long 0x73C++0x03
hide.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0x740++0x03
line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
hexmask.long.byte 0x00 24.--31. 1. " INTID835  ,Interrupt ID835  Priority/Priority Byte Offset 835 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID834  ,Interrupt ID834   Priority/Priority Byte Offset 834 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID833  ,Interrupt ID833  Priority/Priority Byte Offset 833 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID832  ,Interrupt ID832   Priority/Priority Byte Offset 832 "
group.long 0x744++0x03
line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
hexmask.long.byte 0x00 24.--31. 1. " INTID839  ,Interrupt ID839  Priority/Priority Byte Offset 839 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID838  ,Interrupt ID838   Priority/Priority Byte Offset 838 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID837  ,Interrupt ID837  Priority/Priority Byte Offset 837 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID836  ,Interrupt ID836   Priority/Priority Byte Offset 836 "
group.long 0x748++0x03
line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
hexmask.long.byte 0x00 24.--31. 1. " INTID843  ,Interrupt ID843  Priority/Priority Byte Offset 843 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID842  ,Interrupt ID842   Priority/Priority Byte Offset 842 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID841  ,Interrupt ID841  Priority/Priority Byte Offset 841 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID840  ,Interrupt ID840   Priority/Priority Byte Offset 840 "
group.long 0x74C++0x03
line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
hexmask.long.byte 0x00 24.--31. 1. " INTID847  ,Interrupt ID847  Priority/Priority Byte Offset 847 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID846  ,Interrupt ID846   Priority/Priority Byte Offset 846 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID845  ,Interrupt ID845  Priority/Priority Byte Offset 845 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID844  ,Interrupt ID844   Priority/Priority Byte Offset 844 "
group.long 0x750++0x03
line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
hexmask.long.byte 0x00 24.--31. 1. " INTID851  ,Interrupt ID851  Priority/Priority Byte Offset 851 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID850  ,Interrupt ID850   Priority/Priority Byte Offset 850 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID849  ,Interrupt ID849  Priority/Priority Byte Offset 849 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID848  ,Interrupt ID848   Priority/Priority Byte Offset 848 "
group.long 0x754++0x03
line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
hexmask.long.byte 0x00 24.--31. 1. " INTID855  ,Interrupt ID855  Priority/Priority Byte Offset 855 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID854  ,Interrupt ID854   Priority/Priority Byte Offset 854 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID853  ,Interrupt ID853  Priority/Priority Byte Offset 853 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID852  ,Interrupt ID852   Priority/Priority Byte Offset 852 "
group.long 0x758++0x03
line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
hexmask.long.byte 0x00 24.--31. 1. " INTID859  ,Interrupt ID859  Priority/Priority Byte Offset 859 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID858  ,Interrupt ID858   Priority/Priority Byte Offset 858 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID857  ,Interrupt ID857  Priority/Priority Byte Offset 857 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID856  ,Interrupt ID856   Priority/Priority Byte Offset 856 "
group.long 0x75C++0x03
line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
hexmask.long.byte 0x00 24.--31. 1. " INTID863  ,Interrupt ID863  Priority/Priority Byte Offset 863 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID862  ,Interrupt ID862   Priority/Priority Byte Offset 862 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID861  ,Interrupt ID861  Priority/Priority Byte Offset 861 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID860  ,Interrupt ID860   Priority/Priority Byte Offset 860 "
else
hgroup.long 0x740++0x03
hide.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
hgroup.long 0x744++0x03
hide.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
hgroup.long 0x748++0x03
hide.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
hgroup.long 0x74C++0x03
hide.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
hgroup.long 0x750++0x03
hide.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
hgroup.long 0x754++0x03
hide.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
hgroup.long 0x758++0x03
hide.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
hgroup.long 0x75C++0x03
hide.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0x760++0x03
line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
hexmask.long.byte 0x00 24.--31. 1. " INTID867  ,Interrupt ID867  Priority/Priority Byte Offset 867 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID866  ,Interrupt ID866   Priority/Priority Byte Offset 866 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID865  ,Interrupt ID865  Priority/Priority Byte Offset 865 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID864  ,Interrupt ID864   Priority/Priority Byte Offset 864 "
group.long 0x764++0x03
line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
hexmask.long.byte 0x00 24.--31. 1. " INTID871  ,Interrupt ID871  Priority/Priority Byte Offset 871 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID870  ,Interrupt ID870   Priority/Priority Byte Offset 870 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID869  ,Interrupt ID869  Priority/Priority Byte Offset 869 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID868  ,Interrupt ID868   Priority/Priority Byte Offset 868 "
group.long 0x768++0x03
line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
hexmask.long.byte 0x00 24.--31. 1. " INTID875  ,Interrupt ID875  Priority/Priority Byte Offset 875 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID874  ,Interrupt ID874   Priority/Priority Byte Offset 874 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID873  ,Interrupt ID873  Priority/Priority Byte Offset 873 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID872  ,Interrupt ID872   Priority/Priority Byte Offset 872 "
group.long 0x76C++0x03
line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
hexmask.long.byte 0x00 24.--31. 1. " INTID879  ,Interrupt ID879  Priority/Priority Byte Offset 879 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID878  ,Interrupt ID878   Priority/Priority Byte Offset 878 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID877  ,Interrupt ID877  Priority/Priority Byte Offset 877 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID876  ,Interrupt ID876   Priority/Priority Byte Offset 876 "
group.long 0x770++0x03
line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
hexmask.long.byte 0x00 24.--31. 1. " INTID883  ,Interrupt ID883  Priority/Priority Byte Offset 883 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID882  ,Interrupt ID882   Priority/Priority Byte Offset 882 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID881  ,Interrupt ID881  Priority/Priority Byte Offset 881 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID880  ,Interrupt ID880   Priority/Priority Byte Offset 880 "
group.long 0x774++0x03
line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
hexmask.long.byte 0x00 24.--31. 1. " INTID887  ,Interrupt ID887  Priority/Priority Byte Offset 887 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID886  ,Interrupt ID886   Priority/Priority Byte Offset 886 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID885  ,Interrupt ID885  Priority/Priority Byte Offset 885 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID884  ,Interrupt ID884   Priority/Priority Byte Offset 884 "
group.long 0x778++0x03
line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
hexmask.long.byte 0x00 24.--31. 1. " INTID891  ,Interrupt ID891  Priority/Priority Byte Offset 891 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID890  ,Interrupt ID890   Priority/Priority Byte Offset 890 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID889  ,Interrupt ID889  Priority/Priority Byte Offset 889 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID888  ,Interrupt ID888   Priority/Priority Byte Offset 888 "
group.long 0x77C++0x03
line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
hexmask.long.byte 0x00 24.--31. 1. " INTID895  ,Interrupt ID895  Priority/Priority Byte Offset 895 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID894  ,Interrupt ID894   Priority/Priority Byte Offset 894 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID893  ,Interrupt ID893  Priority/Priority Byte Offset 893 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID892  ,Interrupt ID892   Priority/Priority Byte Offset 892 "
else
hgroup.long 0x760++0x03
hide.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
hgroup.long 0x764++0x03
hide.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
hgroup.long 0x768++0x03
hide.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
hgroup.long 0x76C++0x03
hide.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
hgroup.long 0x770++0x03
hide.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
hgroup.long 0x774++0x03
hide.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
hgroup.long 0x778++0x03
hide.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
hgroup.long 0x77C++0x03
hide.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0x780++0x03
line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
hexmask.long.byte 0x00 24.--31. 1. " INTID899  ,Interrupt ID899  Priority/Priority Byte Offset 899 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID898  ,Interrupt ID898   Priority/Priority Byte Offset 898 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID897  ,Interrupt ID897  Priority/Priority Byte Offset 897 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID896  ,Interrupt ID896   Priority/Priority Byte Offset 896 "
group.long 0x784++0x03
line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
hexmask.long.byte 0x00 24.--31. 1. " INTID903  ,Interrupt ID903  Priority/Priority Byte Offset 903 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID902  ,Interrupt ID902   Priority/Priority Byte Offset 902 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID901  ,Interrupt ID901  Priority/Priority Byte Offset 901 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID900  ,Interrupt ID900   Priority/Priority Byte Offset 900 "
group.long 0x788++0x03
line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
hexmask.long.byte 0x00 24.--31. 1. " INTID907  ,Interrupt ID907  Priority/Priority Byte Offset 907 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID906  ,Interrupt ID906   Priority/Priority Byte Offset 906 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID905  ,Interrupt ID905  Priority/Priority Byte Offset 905 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID904  ,Interrupt ID904   Priority/Priority Byte Offset 904 "
group.long 0x78C++0x03
line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
hexmask.long.byte 0x00 24.--31. 1. " INTID911  ,Interrupt ID911  Priority/Priority Byte Offset 911 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID910  ,Interrupt ID910   Priority/Priority Byte Offset 910 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID909  ,Interrupt ID909  Priority/Priority Byte Offset 909 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID908  ,Interrupt ID908   Priority/Priority Byte Offset 908 "
group.long 0x790++0x03
line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
hexmask.long.byte 0x00 24.--31. 1. " INTID915  ,Interrupt ID915  Priority/Priority Byte Offset 915 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID914  ,Interrupt ID914   Priority/Priority Byte Offset 914 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID913  ,Interrupt ID913  Priority/Priority Byte Offset 913 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID912  ,Interrupt ID912   Priority/Priority Byte Offset 912 "
group.long 0x794++0x03
line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
hexmask.long.byte 0x00 24.--31. 1. " INTID919  ,Interrupt ID919  Priority/Priority Byte Offset 919 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID918  ,Interrupt ID918   Priority/Priority Byte Offset 918 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID917  ,Interrupt ID917  Priority/Priority Byte Offset 917 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID916  ,Interrupt ID916   Priority/Priority Byte Offset 916 "
group.long 0x798++0x03
line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
hexmask.long.byte 0x00 24.--31. 1. " INTID923  ,Interrupt ID923  Priority/Priority Byte Offset 923 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID922  ,Interrupt ID922   Priority/Priority Byte Offset 922 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID921  ,Interrupt ID921  Priority/Priority Byte Offset 921 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID920  ,Interrupt ID920   Priority/Priority Byte Offset 920 "
group.long 0x79C++0x03
line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
hexmask.long.byte 0x00 24.--31. 1. " INTID927  ,Interrupt ID927  Priority/Priority Byte Offset 927 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID926  ,Interrupt ID926   Priority/Priority Byte Offset 926 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID925  ,Interrupt ID925  Priority/Priority Byte Offset 925 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID924  ,Interrupt ID924   Priority/Priority Byte Offset 924 "
else
hgroup.long 0x780++0x03
hide.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
hgroup.long 0x784++0x03
hide.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
hgroup.long 0x788++0x03
hide.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
hgroup.long 0x78C++0x03
hide.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
hgroup.long 0x790++0x03
hide.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
hgroup.long 0x794++0x03
hide.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
hgroup.long 0x798++0x03
hide.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
hgroup.long 0x79C++0x03
hide.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0x7A0++0x03
line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
hexmask.long.byte 0x00 24.--31. 1. " INTID931  ,Interrupt ID931  Priority/Priority Byte Offset 931 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID930  ,Interrupt ID930   Priority/Priority Byte Offset 930 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID929  ,Interrupt ID929  Priority/Priority Byte Offset 929 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID928  ,Interrupt ID928   Priority/Priority Byte Offset 928 "
group.long 0x7A4++0x03
line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
hexmask.long.byte 0x00 24.--31. 1. " INTID935  ,Interrupt ID935  Priority/Priority Byte Offset 935 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID934  ,Interrupt ID934   Priority/Priority Byte Offset 934 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID933  ,Interrupt ID933  Priority/Priority Byte Offset 933 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID932  ,Interrupt ID932   Priority/Priority Byte Offset 932 "
group.long 0x7A8++0x03
line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
hexmask.long.byte 0x00 24.--31. 1. " INTID939  ,Interrupt ID939  Priority/Priority Byte Offset 939 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID938  ,Interrupt ID938   Priority/Priority Byte Offset 938 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID937  ,Interrupt ID937  Priority/Priority Byte Offset 937 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID936  ,Interrupt ID936   Priority/Priority Byte Offset 936 "
group.long 0x7AC++0x03
line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
hexmask.long.byte 0x00 24.--31. 1. " INTID943  ,Interrupt ID943  Priority/Priority Byte Offset 943 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID942  ,Interrupt ID942   Priority/Priority Byte Offset 942 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID941  ,Interrupt ID941  Priority/Priority Byte Offset 941 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID940  ,Interrupt ID940   Priority/Priority Byte Offset 940 "
group.long 0x7B0++0x03
line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
hexmask.long.byte 0x00 24.--31. 1. " INTID947  ,Interrupt ID947  Priority/Priority Byte Offset 947 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID946  ,Interrupt ID946   Priority/Priority Byte Offset 946 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID945  ,Interrupt ID945  Priority/Priority Byte Offset 945 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID944  ,Interrupt ID944   Priority/Priority Byte Offset 944 "
group.long 0x7B4++0x03
line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
hexmask.long.byte 0x00 24.--31. 1. " INTID951  ,Interrupt ID951  Priority/Priority Byte Offset 951 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID950  ,Interrupt ID950   Priority/Priority Byte Offset 950 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID949  ,Interrupt ID949  Priority/Priority Byte Offset 949 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID948  ,Interrupt ID948   Priority/Priority Byte Offset 948 "
group.long 0x7B8++0x03
line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
hexmask.long.byte 0x00 24.--31. 1. " INTID955  ,Interrupt ID955  Priority/Priority Byte Offset 955 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID954  ,Interrupt ID954   Priority/Priority Byte Offset 954 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID953  ,Interrupt ID953  Priority/Priority Byte Offset 953 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID952  ,Interrupt ID952   Priority/Priority Byte Offset 952 "
group.long 0x7BC++0x03
line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
hexmask.long.byte 0x00 24.--31. 1. " INTID959  ,Interrupt ID959  Priority/Priority Byte Offset 959 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID958  ,Interrupt ID958   Priority/Priority Byte Offset 958 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID957  ,Interrupt ID957  Priority/Priority Byte Offset 957 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID956  ,Interrupt ID956   Priority/Priority Byte Offset 956 "
else
hgroup.long 0x7A0++0x03
hide.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
hgroup.long 0x7A4++0x03
hide.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
hgroup.long 0x7A8++0x03
hide.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
hgroup.long 0x7AC++0x03
hide.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
hgroup.long 0x7B0++0x03
hide.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
hgroup.long 0x7B4++0x03
hide.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
hgroup.long 0x7B8++0x03
hide.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
hgroup.long 0x7BC++0x03
hide.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0x7C0++0x03
line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
hexmask.long.byte 0x00 24.--31. 1. " INTID963  ,Interrupt ID963  Priority/Priority Byte Offset 963 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID962  ,Interrupt ID962   Priority/Priority Byte Offset 962 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID961  ,Interrupt ID961  Priority/Priority Byte Offset 961 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID960  ,Interrupt ID960   Priority/Priority Byte Offset 960 "
group.long 0x7C4++0x03
line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
hexmask.long.byte 0x00 24.--31. 1. " INTID967  ,Interrupt ID967  Priority/Priority Byte Offset 967 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID966  ,Interrupt ID966   Priority/Priority Byte Offset 966 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID965  ,Interrupt ID965  Priority/Priority Byte Offset 965 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID964  ,Interrupt ID964   Priority/Priority Byte Offset 964 "
group.long 0x7C8++0x03
line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
hexmask.long.byte 0x00 24.--31. 1. " INTID971  ,Interrupt ID971  Priority/Priority Byte Offset 971 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID970  ,Interrupt ID970   Priority/Priority Byte Offset 970 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID969  ,Interrupt ID969  Priority/Priority Byte Offset 969 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID968  ,Interrupt ID968   Priority/Priority Byte Offset 968 "
group.long 0x7CC++0x03
line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
hexmask.long.byte 0x00 24.--31. 1. " INTID975  ,Interrupt ID975  Priority/Priority Byte Offset 975 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID974  ,Interrupt ID974   Priority/Priority Byte Offset 974 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID973  ,Interrupt ID973  Priority/Priority Byte Offset 973 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID972  ,Interrupt ID972   Priority/Priority Byte Offset 972 "
group.long 0x7D0++0x03
line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
hexmask.long.byte 0x00 24.--31. 1. " INTID979  ,Interrupt ID979  Priority/Priority Byte Offset 979 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID978  ,Interrupt ID978   Priority/Priority Byte Offset 978 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID977  ,Interrupt ID977  Priority/Priority Byte Offset 977 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID976  ,Interrupt ID976   Priority/Priority Byte Offset 976 "
group.long 0x7D4++0x03
line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
hexmask.long.byte 0x00 24.--31. 1. " INTID983  ,Interrupt ID983  Priority/Priority Byte Offset 983 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID982  ,Interrupt ID982   Priority/Priority Byte Offset 982 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID981  ,Interrupt ID981  Priority/Priority Byte Offset 981 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID980  ,Interrupt ID980   Priority/Priority Byte Offset 980 "
group.long 0x7D8++0x03
line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
hexmask.long.byte 0x00 24.--31. 1. " INTID987  ,Interrupt ID987  Priority/Priority Byte Offset 987 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID986  ,Interrupt ID986   Priority/Priority Byte Offset 986 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID985  ,Interrupt ID985  Priority/Priority Byte Offset 985 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID984  ,Interrupt ID984   Priority/Priority Byte Offset 984 "
group.long 0x7DC++0x03
line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
hexmask.long.byte 0x00 24.--31. 1. " INTID991  ,Interrupt ID991  Priority/Priority Byte Offset 991 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID990  ,Interrupt ID990   Priority/Priority Byte Offset 990 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID989  ,Interrupt ID989  Priority/Priority Byte Offset 989 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID988  ,Interrupt ID988   Priority/Priority Byte Offset 988 "
else
hgroup.long 0x7C0++0x03
hide.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
hgroup.long 0x7C4++0x03
hide.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
hgroup.long 0x7C8++0x03
hide.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
hgroup.long 0x7CC++0x03
hide.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
hgroup.long 0x7D0++0x03
hide.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
hgroup.long 0x7D4++0x03
hide.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
hgroup.long 0x7D8++0x03
hide.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
hgroup.long 0x7DC++0x03
hide.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
endif
tree.end
width 19.
tree "Interrupt Targets Registers"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x000000E0)>0x1)
hgroup.long 0x800++0x03
hide.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0"
hgroup.long 0x804++0x03
hide.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1"
hgroup.long 0x808++0x03
hide.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2"
hgroup.long 0x80C++0x03
hide.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3"
hgroup.long 0x810++0x03
hide.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4"
hgroup.long 0x814++0x03
hide.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5"
hgroup.long 0x818++0x03
hide.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6"
hgroup.long 0x81C++0x03
hide.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x820++0x03
line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO35   ,CPU Targets Byte Offset 35  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO34   ,CPU Targets Byte Offset 34  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO33   ,CPU Targets Byte Offset 33  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO32   ,CPU Targets Byte Offset 32  "
group.long 0x824++0x03
line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO39   ,CPU Targets Byte Offset 39  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO38   ,CPU Targets Byte Offset 38  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO37   ,CPU Targets Byte Offset 37  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO36   ,CPU Targets Byte Offset 36  "
group.long 0x828++0x03
line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO43   ,CPU Targets Byte Offset 43  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO42   ,CPU Targets Byte Offset 42  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO41   ,CPU Targets Byte Offset 41  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO40   ,CPU Targets Byte Offset 40  "
group.long 0x82C++0x03
line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO47   ,CPU Targets Byte Offset 47  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO46   ,CPU Targets Byte Offset 46  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO45   ,CPU Targets Byte Offset 45  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO44   ,CPU Targets Byte Offset 44  "
group.long 0x830++0x03
line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO51   ,CPU Targets Byte Offset 51  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO50   ,CPU Targets Byte Offset 50  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO49   ,CPU Targets Byte Offset 49  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO48   ,CPU Targets Byte Offset 48  "
group.long 0x834++0x03
line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO55   ,CPU Targets Byte Offset 55  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO54   ,CPU Targets Byte Offset 54  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO53   ,CPU Targets Byte Offset 53  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO52   ,CPU Targets Byte Offset 52  "
group.long 0x838++0x03
line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO59   ,CPU Targets Byte Offset 59  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO58   ,CPU Targets Byte Offset 58  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO57   ,CPU Targets Byte Offset 57  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO56   ,CPU Targets Byte Offset 56  "
group.long 0x83C++0x03
line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO63   ,CPU Targets Byte Offset 63  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO62   ,CPU Targets Byte Offset 62  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO61   ,CPU Targets Byte Offset 61  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO60   ,CPU Targets Byte Offset 60  "
else
hgroup.long 0x820++0x03
hide.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
hgroup.long 0x824++0x03
hide.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
hgroup.long 0x828++0x03
hide.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
hgroup.long 0x82C++0x03
hide.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
hgroup.long 0x830++0x03
hide.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
hgroup.long 0x834++0x03
hide.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
hgroup.long 0x838++0x03
hide.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
hgroup.long 0x83C++0x03
hide.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x840++0x03
line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO67   ,CPU Targets Byte Offset 67  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO66   ,CPU Targets Byte Offset 66  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO65   ,CPU Targets Byte Offset 65  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO64   ,CPU Targets Byte Offset 64  "
group.long 0x844++0x03
line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO71   ,CPU Targets Byte Offset 71  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO70   ,CPU Targets Byte Offset 70  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO69   ,CPU Targets Byte Offset 69  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO68   ,CPU Targets Byte Offset 68  "
group.long 0x848++0x03
line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO75   ,CPU Targets Byte Offset 75  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO74   ,CPU Targets Byte Offset 74  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO73   ,CPU Targets Byte Offset 73  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO72   ,CPU Targets Byte Offset 72  "
group.long 0x84C++0x03
line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO79   ,CPU Targets Byte Offset 79  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO78   ,CPU Targets Byte Offset 78  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO77   ,CPU Targets Byte Offset 77  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO76   ,CPU Targets Byte Offset 76  "
group.long 0x850++0x03
line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO83   ,CPU Targets Byte Offset 83  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO82   ,CPU Targets Byte Offset 82  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO81   ,CPU Targets Byte Offset 81  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO80   ,CPU Targets Byte Offset 80  "
group.long 0x854++0x03
line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO87   ,CPU Targets Byte Offset 87  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO86   ,CPU Targets Byte Offset 86  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO85   ,CPU Targets Byte Offset 85  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO84   ,CPU Targets Byte Offset 84  "
group.long 0x858++0x03
line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO91   ,CPU Targets Byte Offset 91  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO90   ,CPU Targets Byte Offset 90  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO89   ,CPU Targets Byte Offset 89  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO88   ,CPU Targets Byte Offset 88  "
group.long 0x85C++0x03
line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO95   ,CPU Targets Byte Offset 95  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO94   ,CPU Targets Byte Offset 94  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO93   ,CPU Targets Byte Offset 93  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO92   ,CPU Targets Byte Offset 92  "
else
hgroup.long 0x840++0x03
hide.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
hgroup.long 0x844++0x03
hide.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
hgroup.long 0x848++0x03
hide.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
hgroup.long 0x84C++0x03
hide.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
hgroup.long 0x850++0x03
hide.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
hgroup.long 0x854++0x03
hide.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
hgroup.long 0x858++0x03
hide.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
hgroup.long 0x85C++0x03
hide.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x860++0x03
line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO99   ,CPU Targets Byte Offset 99  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO98   ,CPU Targets Byte Offset 98  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO97   ,CPU Targets Byte Offset 97  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO96   ,CPU Targets Byte Offset 96  "
group.long 0x864++0x03
line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO103  ,CPU Targets Byte Offset 103 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO102  ,CPU Targets Byte Offset 102 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO101  ,CPU Targets Byte Offset 101 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO100  ,CPU Targets Byte Offset 100 "
group.long 0x868++0x03
line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO107  ,CPU Targets Byte Offset 107 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO106  ,CPU Targets Byte Offset 106 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO105  ,CPU Targets Byte Offset 105 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO104  ,CPU Targets Byte Offset 104 "
group.long 0x86C++0x03
line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO111  ,CPU Targets Byte Offset 111 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO110  ,CPU Targets Byte Offset 110 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO109  ,CPU Targets Byte Offset 109 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO108  ,CPU Targets Byte Offset 108 "
group.long 0x870++0x03
line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO115  ,CPU Targets Byte Offset 115 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO114  ,CPU Targets Byte Offset 114 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO113  ,CPU Targets Byte Offset 113 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO112  ,CPU Targets Byte Offset 112 "
group.long 0x874++0x03
line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO119  ,CPU Targets Byte Offset 119 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO118  ,CPU Targets Byte Offset 118 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO117  ,CPU Targets Byte Offset 117 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO116  ,CPU Targets Byte Offset 116 "
group.long 0x878++0x03
line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO123  ,CPU Targets Byte Offset 123 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO122  ,CPU Targets Byte Offset 122 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO121  ,CPU Targets Byte Offset 121 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO120  ,CPU Targets Byte Offset 120 "
group.long 0x87C++0x03
line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO127  ,CPU Targets Byte Offset 127 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO126  ,CPU Targets Byte Offset 126 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO125  ,CPU Targets Byte Offset 125 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO124  ,CPU Targets Byte Offset 124 "
else
hgroup.long 0x860++0x03
hide.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
hgroup.long 0x864++0x03
hide.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
hgroup.long 0x868++0x03
hide.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
hgroup.long 0x86C++0x03
hide.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
hgroup.long 0x870++0x03
hide.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
hgroup.long 0x874++0x03
hide.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
hgroup.long 0x878++0x03
hide.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
hgroup.long 0x87C++0x03
hide.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x880++0x03
line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO131  ,CPU Targets Byte Offset 131 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO130  ,CPU Targets Byte Offset 130 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO129  ,CPU Targets Byte Offset 129 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO128  ,CPU Targets Byte Offset 128 "
group.long 0x884++0x03
line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO135  ,CPU Targets Byte Offset 135 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO134  ,CPU Targets Byte Offset 134 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO133  ,CPU Targets Byte Offset 133 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO132  ,CPU Targets Byte Offset 132 "
group.long 0x888++0x03
line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO139  ,CPU Targets Byte Offset 139 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO138  ,CPU Targets Byte Offset 138 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO137  ,CPU Targets Byte Offset 137 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO136  ,CPU Targets Byte Offset 136 "
group.long 0x88C++0x03
line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO143  ,CPU Targets Byte Offset 143 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO142  ,CPU Targets Byte Offset 142 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO141  ,CPU Targets Byte Offset 141 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO140  ,CPU Targets Byte Offset 140 "
group.long 0x890++0x03
line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO147  ,CPU Targets Byte Offset 147 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO146  ,CPU Targets Byte Offset 146 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO145  ,CPU Targets Byte Offset 145 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO144  ,CPU Targets Byte Offset 144 "
group.long 0x894++0x03
line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO151  ,CPU Targets Byte Offset 151 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO150  ,CPU Targets Byte Offset 150 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO149  ,CPU Targets Byte Offset 149 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO148  ,CPU Targets Byte Offset 148 "
group.long 0x898++0x03
line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO155  ,CPU Targets Byte Offset 155 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO154  ,CPU Targets Byte Offset 154 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO153  ,CPU Targets Byte Offset 153 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO152  ,CPU Targets Byte Offset 152 "
group.long 0x89C++0x03
line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO159  ,CPU Targets Byte Offset 159 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO158  ,CPU Targets Byte Offset 158 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO157  ,CPU Targets Byte Offset 157 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO156  ,CPU Targets Byte Offset 156 "
else
hgroup.long 0x880++0x03
hide.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
hgroup.long 0x884++0x03
hide.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
hgroup.long 0x888++0x03
hide.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
hgroup.long 0x88C++0x03
hide.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
hgroup.long 0x890++0x03
hide.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
hgroup.long 0x894++0x03
hide.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
hgroup.long 0x898++0x03
hide.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
hgroup.long 0x89C++0x03
hide.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x8A0++0x03
line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO163  ,CPU Targets Byte Offset 163 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO162  ,CPU Targets Byte Offset 162 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO161  ,CPU Targets Byte Offset 161 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO160  ,CPU Targets Byte Offset 160 "
group.long 0x8A4++0x03
line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO167  ,CPU Targets Byte Offset 167 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO166  ,CPU Targets Byte Offset 166 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO165  ,CPU Targets Byte Offset 165 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO164  ,CPU Targets Byte Offset 164 "
group.long 0x8A8++0x03
line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO171  ,CPU Targets Byte Offset 171 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO170  ,CPU Targets Byte Offset 170 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO169  ,CPU Targets Byte Offset 169 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO168  ,CPU Targets Byte Offset 168 "
group.long 0x8AC++0x03
line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO175  ,CPU Targets Byte Offset 175 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO174  ,CPU Targets Byte Offset 174 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO173  ,CPU Targets Byte Offset 173 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO172  ,CPU Targets Byte Offset 172 "
group.long 0x8B0++0x03
line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO179  ,CPU Targets Byte Offset 179 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO178  ,CPU Targets Byte Offset 178 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO177  ,CPU Targets Byte Offset 177 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO176  ,CPU Targets Byte Offset 176 "
group.long 0x8B4++0x03
line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO183  ,CPU Targets Byte Offset 183 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO182  ,CPU Targets Byte Offset 182 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO181  ,CPU Targets Byte Offset 181 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO180  ,CPU Targets Byte Offset 180 "
group.long 0x8B8++0x03
line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO187  ,CPU Targets Byte Offset 187 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO186  ,CPU Targets Byte Offset 186 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO185  ,CPU Targets Byte Offset 185 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO184  ,CPU Targets Byte Offset 184 "
group.long 0x8BC++0x03
line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO191  ,CPU Targets Byte Offset 191 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO190  ,CPU Targets Byte Offset 190 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO189  ,CPU Targets Byte Offset 189 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO188  ,CPU Targets Byte Offset 188 "
else
hgroup.long 0x8A0++0x03
hide.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
hgroup.long 0x8A4++0x03
hide.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
hgroup.long 0x8A8++0x03
hide.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
hgroup.long 0x8AC++0x03
hide.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
hgroup.long 0x8B0++0x03
hide.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
hgroup.long 0x8B4++0x03
hide.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
hgroup.long 0x8B8++0x03
hide.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
hgroup.long 0x8BC++0x03
hide.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x8C0++0x03
line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO195  ,CPU Targets Byte Offset 195 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO194  ,CPU Targets Byte Offset 194 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO193  ,CPU Targets Byte Offset 193 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO192  ,CPU Targets Byte Offset 192 "
group.long 0x8C4++0x03
line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO199  ,CPU Targets Byte Offset 199 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO198  ,CPU Targets Byte Offset 198 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO197  ,CPU Targets Byte Offset 197 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO196  ,CPU Targets Byte Offset 196 "
group.long 0x8C8++0x03
line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO203  ,CPU Targets Byte Offset 203 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO202  ,CPU Targets Byte Offset 202 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO201  ,CPU Targets Byte Offset 201 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO200  ,CPU Targets Byte Offset 200 "
group.long 0x8CC++0x03
line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO207  ,CPU Targets Byte Offset 207 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO206  ,CPU Targets Byte Offset 206 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO205  ,CPU Targets Byte Offset 205 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO204  ,CPU Targets Byte Offset 204 "
group.long 0x8D0++0x03
line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO211  ,CPU Targets Byte Offset 211 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO210  ,CPU Targets Byte Offset 210 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO209  ,CPU Targets Byte Offset 209 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO208  ,CPU Targets Byte Offset 208 "
group.long 0x8D4++0x03
line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO215  ,CPU Targets Byte Offset 215 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO214  ,CPU Targets Byte Offset 214 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO213  ,CPU Targets Byte Offset 213 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO212  ,CPU Targets Byte Offset 212 "
group.long 0x8D8++0x03
line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO219  ,CPU Targets Byte Offset 219 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO218  ,CPU Targets Byte Offset 218 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO217  ,CPU Targets Byte Offset 217 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO216  ,CPU Targets Byte Offset 216 "
group.long 0x8DC++0x03
line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO223  ,CPU Targets Byte Offset 223 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO222  ,CPU Targets Byte Offset 222 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO221  ,CPU Targets Byte Offset 221 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO220  ,CPU Targets Byte Offset 220 "
else
hgroup.long 0x8C0++0x03
hide.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
hgroup.long 0x8C4++0x03
hide.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
hgroup.long 0x8C8++0x03
hide.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
hgroup.long 0x8CC++0x03
hide.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
hgroup.long 0x8D0++0x03
hide.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
hgroup.long 0x8D4++0x03
hide.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
hgroup.long 0x8D8++0x03
hide.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
hgroup.long 0x8DC++0x03
hide.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x8E0++0x03
line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO227  ,CPU Targets Byte Offset 227 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO226  ,CPU Targets Byte Offset 226 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO225  ,CPU Targets Byte Offset 225 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO224  ,CPU Targets Byte Offset 224 "
group.long 0x8E4++0x03
line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO231  ,CPU Targets Byte Offset 231 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO230  ,CPU Targets Byte Offset 230 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO229  ,CPU Targets Byte Offset 229 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO228  ,CPU Targets Byte Offset 228 "
group.long 0x8E8++0x03
line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO235  ,CPU Targets Byte Offset 235 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO234  ,CPU Targets Byte Offset 234 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO233  ,CPU Targets Byte Offset 233 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO232  ,CPU Targets Byte Offset 232 "
group.long 0x8EC++0x03
line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO239  ,CPU Targets Byte Offset 239 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO238  ,CPU Targets Byte Offset 238 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO237  ,CPU Targets Byte Offset 237 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO236  ,CPU Targets Byte Offset 236 "
group.long 0x8F0++0x03
line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO243  ,CPU Targets Byte Offset 243 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO242  ,CPU Targets Byte Offset 242 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO241  ,CPU Targets Byte Offset 241 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO240  ,CPU Targets Byte Offset 240 "
group.long 0x8F4++0x03
line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO247  ,CPU Targets Byte Offset 247 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO246  ,CPU Targets Byte Offset 246 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO245  ,CPU Targets Byte Offset 245 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO244  ,CPU Targets Byte Offset 244 "
group.long 0x8F8++0x03
line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO251  ,CPU Targets Byte Offset 251 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO250  ,CPU Targets Byte Offset 250 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO249  ,CPU Targets Byte Offset 249 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO248  ,CPU Targets Byte Offset 248 "
group.long 0x8FC++0x03
line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO255  ,CPU Targets Byte Offset 255 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO254  ,CPU Targets Byte Offset 254 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO253  ,CPU Targets Byte Offset 253 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO252  ,CPU Targets Byte Offset 252 "
else
hgroup.long 0x8E0++0x03
hide.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
hgroup.long 0x8E4++0x03
hide.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
hgroup.long 0x8E8++0x03
hide.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
hgroup.long 0x8EC++0x03
hide.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
hgroup.long 0x8F0++0x03
hide.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
hgroup.long 0x8F4++0x03
hide.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
hgroup.long 0x8F8++0x03
hide.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
hgroup.long 0x8FC++0x03
hide.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x900++0x03
line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO259  ,CPU Targets Byte Offset 259 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO258  ,CPU Targets Byte Offset 258 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO257  ,CPU Targets Byte Offset 257 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO256  ,CPU Targets Byte Offset 256 "
group.long 0x904++0x03
line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO263  ,CPU Targets Byte Offset 263 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO262  ,CPU Targets Byte Offset 262 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO261  ,CPU Targets Byte Offset 261 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO260  ,CPU Targets Byte Offset 260 "
group.long 0x908++0x03
line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO267  ,CPU Targets Byte Offset 267 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO266  ,CPU Targets Byte Offset 266 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO265  ,CPU Targets Byte Offset 265 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO264  ,CPU Targets Byte Offset 264 "
group.long 0x90C++0x03
line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO271  ,CPU Targets Byte Offset 271 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO270  ,CPU Targets Byte Offset 270 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO269  ,CPU Targets Byte Offset 269 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO268  ,CPU Targets Byte Offset 268 "
group.long 0x910++0x03
line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO275  ,CPU Targets Byte Offset 275 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO274  ,CPU Targets Byte Offset 274 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO273  ,CPU Targets Byte Offset 273 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO272  ,CPU Targets Byte Offset 272 "
group.long 0x914++0x03
line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO279  ,CPU Targets Byte Offset 279 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO278  ,CPU Targets Byte Offset 278 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO277  ,CPU Targets Byte Offset 277 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO276  ,CPU Targets Byte Offset 276 "
group.long 0x918++0x03
line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO283  ,CPU Targets Byte Offset 283 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO282  ,CPU Targets Byte Offset 282 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO281  ,CPU Targets Byte Offset 281 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO280  ,CPU Targets Byte Offset 280 "
group.long 0x91C++0x03
line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO287  ,CPU Targets Byte Offset 287 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO286  ,CPU Targets Byte Offset 286 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO285  ,CPU Targets Byte Offset 285 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO284  ,CPU Targets Byte Offset 284 "
else
hgroup.long 0x900++0x03
hide.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
hgroup.long 0x904++0x03
hide.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
hgroup.long 0x908++0x03
hide.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
hgroup.long 0x90C++0x03
hide.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
hgroup.long 0x910++0x03
hide.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
hgroup.long 0x914++0x03
hide.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
hgroup.long 0x918++0x03
hide.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
hgroup.long 0x91C++0x03
hide.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x920++0x03
line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO291  ,CPU Targets Byte Offset 291 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO290  ,CPU Targets Byte Offset 290 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO289  ,CPU Targets Byte Offset 289 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO288  ,CPU Targets Byte Offset 288 "
group.long 0x924++0x03
line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO295  ,CPU Targets Byte Offset 295 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO294  ,CPU Targets Byte Offset 294 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO293  ,CPU Targets Byte Offset 293 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO292  ,CPU Targets Byte Offset 292 "
group.long 0x928++0x03
line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO299  ,CPU Targets Byte Offset 299 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO298  ,CPU Targets Byte Offset 298 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO297  ,CPU Targets Byte Offset 297 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO296  ,CPU Targets Byte Offset 296 "
group.long 0x92C++0x03
line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO303  ,CPU Targets Byte Offset 303 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO302  ,CPU Targets Byte Offset 302 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO301  ,CPU Targets Byte Offset 301 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO300  ,CPU Targets Byte Offset 300 "
group.long 0x930++0x03
line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO307  ,CPU Targets Byte Offset 307 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO306  ,CPU Targets Byte Offset 306 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO305  ,CPU Targets Byte Offset 305 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO304  ,CPU Targets Byte Offset 304 "
group.long 0x934++0x03
line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO311  ,CPU Targets Byte Offset 311 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO310  ,CPU Targets Byte Offset 310 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO309  ,CPU Targets Byte Offset 309 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO308  ,CPU Targets Byte Offset 308 "
group.long 0x938++0x03
line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO315  ,CPU Targets Byte Offset 315 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO314  ,CPU Targets Byte Offset 314 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO313  ,CPU Targets Byte Offset 313 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO312  ,CPU Targets Byte Offset 312 "
group.long 0x93C++0x03
line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO319  ,CPU Targets Byte Offset 319 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO318  ,CPU Targets Byte Offset 318 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO317  ,CPU Targets Byte Offset 317 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO316  ,CPU Targets Byte Offset 316 "
else
hgroup.long 0x920++0x03
hide.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
hgroup.long 0x924++0x03
hide.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
hgroup.long 0x928++0x03
hide.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
hgroup.long 0x92C++0x03
hide.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
hgroup.long 0x930++0x03
hide.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
hgroup.long 0x934++0x03
hide.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
hgroup.long 0x938++0x03
hide.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
hgroup.long 0x93C++0x03
hide.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x940++0x03
line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO323  ,CPU Targets Byte Offset 323 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO322  ,CPU Targets Byte Offset 322 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO321  ,CPU Targets Byte Offset 321 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO320  ,CPU Targets Byte Offset 320 "
group.long 0x944++0x03
line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO327  ,CPU Targets Byte Offset 327 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO326  ,CPU Targets Byte Offset 326 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO325  ,CPU Targets Byte Offset 325 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO324  ,CPU Targets Byte Offset 324 "
group.long 0x948++0x03
line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO331  ,CPU Targets Byte Offset 331 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO330  ,CPU Targets Byte Offset 330 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO329  ,CPU Targets Byte Offset 329 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO328  ,CPU Targets Byte Offset 328 "
group.long 0x94C++0x03
line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO335  ,CPU Targets Byte Offset 335 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO334  ,CPU Targets Byte Offset 334 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO333  ,CPU Targets Byte Offset 333 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO332  ,CPU Targets Byte Offset 332 "
group.long 0x950++0x03
line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO339  ,CPU Targets Byte Offset 339 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO338  ,CPU Targets Byte Offset 338 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO337  ,CPU Targets Byte Offset 337 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO336  ,CPU Targets Byte Offset 336 "
group.long 0x954++0x03
line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO343  ,CPU Targets Byte Offset 343 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO342  ,CPU Targets Byte Offset 342 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO341  ,CPU Targets Byte Offset 341 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO340  ,CPU Targets Byte Offset 340 "
group.long 0x958++0x03
line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO347  ,CPU Targets Byte Offset 347 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO346  ,CPU Targets Byte Offset 346 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO345  ,CPU Targets Byte Offset 345 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO344  ,CPU Targets Byte Offset 344 "
group.long 0x95C++0x03
line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO351  ,CPU Targets Byte Offset 351 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO350  ,CPU Targets Byte Offset 350 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO349  ,CPU Targets Byte Offset 349 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO348  ,CPU Targets Byte Offset 348 "
else
hgroup.long 0x940++0x03
hide.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
hgroup.long 0x944++0x03
hide.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
hgroup.long 0x948++0x03
hide.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
hgroup.long 0x94C++0x03
hide.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
hgroup.long 0x950++0x03
hide.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
hgroup.long 0x954++0x03
hide.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
hgroup.long 0x958++0x03
hide.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
hgroup.long 0x95C++0x03
hide.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x960++0x03
line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO355  ,CPU Targets Byte Offset 355 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO354  ,CPU Targets Byte Offset 354 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO353  ,CPU Targets Byte Offset 353 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO352  ,CPU Targets Byte Offset 352 "
group.long 0x964++0x03
line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO359  ,CPU Targets Byte Offset 359 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO358  ,CPU Targets Byte Offset 358 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO357  ,CPU Targets Byte Offset 357 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO356  ,CPU Targets Byte Offset 356 "
group.long 0x968++0x03
line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO363  ,CPU Targets Byte Offset 363 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO362  ,CPU Targets Byte Offset 362 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO361  ,CPU Targets Byte Offset 361 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO360  ,CPU Targets Byte Offset 360 "
group.long 0x96C++0x03
line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO367  ,CPU Targets Byte Offset 367 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO366  ,CPU Targets Byte Offset 366 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO365  ,CPU Targets Byte Offset 365 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO364  ,CPU Targets Byte Offset 364 "
group.long 0x970++0x03
line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO371  ,CPU Targets Byte Offset 371 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO370  ,CPU Targets Byte Offset 370 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO369  ,CPU Targets Byte Offset 369 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO368  ,CPU Targets Byte Offset 368 "
group.long 0x974++0x03
line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO375  ,CPU Targets Byte Offset 375 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO374  ,CPU Targets Byte Offset 374 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO373  ,CPU Targets Byte Offset 373 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO372  ,CPU Targets Byte Offset 372 "
group.long 0x978++0x03
line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO379  ,CPU Targets Byte Offset 379 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO378  ,CPU Targets Byte Offset 378 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO377  ,CPU Targets Byte Offset 377 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO376  ,CPU Targets Byte Offset 376 "
group.long 0x97C++0x03
line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO383  ,CPU Targets Byte Offset 383 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO382  ,CPU Targets Byte Offset 382 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO381  ,CPU Targets Byte Offset 381 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO380  ,CPU Targets Byte Offset 380 "
else
hgroup.long 0x960++0x03
hide.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
hgroup.long 0x964++0x03
hide.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
hgroup.long 0x968++0x03
hide.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
hgroup.long 0x96C++0x03
hide.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
hgroup.long 0x970++0x03
hide.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
hgroup.long 0x974++0x03
hide.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
hgroup.long 0x978++0x03
hide.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
hgroup.long 0x97C++0x03
hide.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x980++0x03
line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO387  ,CPU Targets Byte Offset 387 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO386  ,CPU Targets Byte Offset 386 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO385  ,CPU Targets Byte Offset 385 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO384  ,CPU Targets Byte Offset 384 "
group.long 0x984++0x03
line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO391  ,CPU Targets Byte Offset 391 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO390  ,CPU Targets Byte Offset 390 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO389  ,CPU Targets Byte Offset 389 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO388  ,CPU Targets Byte Offset 388 "
group.long 0x988++0x03
line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO395  ,CPU Targets Byte Offset 395 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO394  ,CPU Targets Byte Offset 394 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO393  ,CPU Targets Byte Offset 393 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO392  ,CPU Targets Byte Offset 392 "
group.long 0x98C++0x03
line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO399  ,CPU Targets Byte Offset 399 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO398  ,CPU Targets Byte Offset 398 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO397  ,CPU Targets Byte Offset 397 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO396  ,CPU Targets Byte Offset 396 "
group.long 0x990++0x03
line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO403  ,CPU Targets Byte Offset 403 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO402  ,CPU Targets Byte Offset 402 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO401  ,CPU Targets Byte Offset 401 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO400  ,CPU Targets Byte Offset 400 "
group.long 0x994++0x03
line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO407  ,CPU Targets Byte Offset 407 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO406  ,CPU Targets Byte Offset 406 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO405  ,CPU Targets Byte Offset 405 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO404  ,CPU Targets Byte Offset 404 "
group.long 0x998++0x03
line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO411  ,CPU Targets Byte Offset 411 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO410  ,CPU Targets Byte Offset 410 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO409  ,CPU Targets Byte Offset 409 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO408  ,CPU Targets Byte Offset 408 "
group.long 0x99C++0x03
line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO415  ,CPU Targets Byte Offset 415 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO414  ,CPU Targets Byte Offset 414 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO413  ,CPU Targets Byte Offset 413 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO412  ,CPU Targets Byte Offset 412 "
else
hgroup.long 0x980++0x03
hide.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
hgroup.long 0x984++0x03
hide.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
hgroup.long 0x988++0x03
hide.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
hgroup.long 0x98C++0x03
hide.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
hgroup.long 0x990++0x03
hide.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
hgroup.long 0x994++0x03
hide.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
hgroup.long 0x998++0x03
hide.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
hgroup.long 0x99C++0x03
hide.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x9A0++0x03
line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO419  ,CPU Targets Byte Offset 419 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO418  ,CPU Targets Byte Offset 418 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO417  ,CPU Targets Byte Offset 417 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO416  ,CPU Targets Byte Offset 416 "
group.long 0x9A4++0x03
line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO423  ,CPU Targets Byte Offset 423 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO422  ,CPU Targets Byte Offset 422 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO421  ,CPU Targets Byte Offset 421 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO420  ,CPU Targets Byte Offset 420 "
group.long 0x9A8++0x03
line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO427  ,CPU Targets Byte Offset 427 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO426  ,CPU Targets Byte Offset 426 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO425  ,CPU Targets Byte Offset 425 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO424  ,CPU Targets Byte Offset 424 "
group.long 0x9AC++0x03
line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO431  ,CPU Targets Byte Offset 431 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO430  ,CPU Targets Byte Offset 430 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO429  ,CPU Targets Byte Offset 429 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO428  ,CPU Targets Byte Offset 428 "
group.long 0x9B0++0x03
line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO435  ,CPU Targets Byte Offset 435 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO434  ,CPU Targets Byte Offset 434 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO433  ,CPU Targets Byte Offset 433 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO432  ,CPU Targets Byte Offset 432 "
group.long 0x9B4++0x03
line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO439  ,CPU Targets Byte Offset 439 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO438  ,CPU Targets Byte Offset 438 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO437  ,CPU Targets Byte Offset 437 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO436  ,CPU Targets Byte Offset 436 "
group.long 0x9B8++0x03
line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO443  ,CPU Targets Byte Offset 443 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO442  ,CPU Targets Byte Offset 442 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO441  ,CPU Targets Byte Offset 441 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO440  ,CPU Targets Byte Offset 440 "
group.long 0x9BC++0x03
line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO447  ,CPU Targets Byte Offset 447 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO446  ,CPU Targets Byte Offset 446 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO445  ,CPU Targets Byte Offset 445 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO444  ,CPU Targets Byte Offset 444 "
else
hgroup.long 0x9A0++0x03
hide.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
hgroup.long 0x9A4++0x03
hide.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
hgroup.long 0x9A8++0x03
hide.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
hgroup.long 0x9AC++0x03
hide.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
hgroup.long 0x9B0++0x03
hide.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
hgroup.long 0x9B4++0x03
hide.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
hgroup.long 0x9B8++0x03
hide.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
hgroup.long 0x9BC++0x03
hide.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x9C0++0x03
line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO451  ,CPU Targets Byte Offset 451 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO450  ,CPU Targets Byte Offset 450 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO449  ,CPU Targets Byte Offset 449 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO448  ,CPU Targets Byte Offset 448 "
group.long 0x9C4++0x03
line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO455  ,CPU Targets Byte Offset 455 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO454  ,CPU Targets Byte Offset 454 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO453  ,CPU Targets Byte Offset 453 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO452  ,CPU Targets Byte Offset 452 "
group.long 0x9C8++0x03
line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO459  ,CPU Targets Byte Offset 459 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO458  ,CPU Targets Byte Offset 458 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO457  ,CPU Targets Byte Offset 457 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO456  ,CPU Targets Byte Offset 456 "
group.long 0x9CC++0x03
line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO463  ,CPU Targets Byte Offset 463 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO462  ,CPU Targets Byte Offset 462 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO461  ,CPU Targets Byte Offset 461 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO460  ,CPU Targets Byte Offset 460 "
group.long 0x9D0++0x03
line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO467  ,CPU Targets Byte Offset 467 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO466  ,CPU Targets Byte Offset 466 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO465  ,CPU Targets Byte Offset 465 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO464  ,CPU Targets Byte Offset 464 "
group.long 0x9D4++0x03
line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO471  ,CPU Targets Byte Offset 471 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO470  ,CPU Targets Byte Offset 470 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO469  ,CPU Targets Byte Offset 469 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO468  ,CPU Targets Byte Offset 468 "
group.long 0x9D8++0x03
line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO475  ,CPU Targets Byte Offset 475 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO474  ,CPU Targets Byte Offset 474 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO473  ,CPU Targets Byte Offset 473 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO472  ,CPU Targets Byte Offset 472 "
group.long 0x9DC++0x03
line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO479  ,CPU Targets Byte Offset 479 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO478  ,CPU Targets Byte Offset 478 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO477  ,CPU Targets Byte Offset 477 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO476  ,CPU Targets Byte Offset 476 "
else
hgroup.long 0x9C0++0x03
hide.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
hgroup.long 0x9C4++0x03
hide.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
hgroup.long 0x9C8++0x03
hide.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
hgroup.long 0x9CC++0x03
hide.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
hgroup.long 0x9D0++0x03
hide.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
hgroup.long 0x9D4++0x03
hide.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
hgroup.long 0x9D8++0x03
hide.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
hgroup.long 0x9DC++0x03
hide.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x9E0++0x03
line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO483  ,CPU Targets Byte Offset 483 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO482  ,CPU Targets Byte Offset 482 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO481  ,CPU Targets Byte Offset 481 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO480  ,CPU Targets Byte Offset 480 "
group.long 0x9E4++0x03
line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO487  ,CPU Targets Byte Offset 487 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO486  ,CPU Targets Byte Offset 486 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO485  ,CPU Targets Byte Offset 485 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO484  ,CPU Targets Byte Offset 484 "
group.long 0x9E8++0x03
line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO491  ,CPU Targets Byte Offset 491 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO490  ,CPU Targets Byte Offset 490 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO489  ,CPU Targets Byte Offset 489 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO488  ,CPU Targets Byte Offset 488 "
group.long 0x9EC++0x03
line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO495  ,CPU Targets Byte Offset 495 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO494  ,CPU Targets Byte Offset 494 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO493  ,CPU Targets Byte Offset 493 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO492  ,CPU Targets Byte Offset 492 "
group.long 0x9F0++0x03
line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO499  ,CPU Targets Byte Offset 499 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO498  ,CPU Targets Byte Offset 498 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO497  ,CPU Targets Byte Offset 497 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO496  ,CPU Targets Byte Offset 496 "
group.long 0x9F4++0x03
line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO503  ,CPU Targets Byte Offset 503 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO502  ,CPU Targets Byte Offset 502 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO501  ,CPU Targets Byte Offset 501 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO500  ,CPU Targets Byte Offset 500 "
group.long 0x9F8++0x03
line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO507  ,CPU Targets Byte Offset 507 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO506  ,CPU Targets Byte Offset 506 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO505  ,CPU Targets Byte Offset 505 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO504  ,CPU Targets Byte Offset 504 "
group.long 0x9FC++0x03
line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO511  ,CPU Targets Byte Offset 511 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO510  ,CPU Targets Byte Offset 510 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO509  ,CPU Targets Byte Offset 509 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO508  ,CPU Targets Byte Offset 508 "
else
hgroup.long 0x9E0++0x03
hide.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
hgroup.long 0x9E4++0x03
hide.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
hgroup.long 0x9E8++0x03
hide.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
hgroup.long 0x9EC++0x03
hide.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
hgroup.long 0x9F0++0x03
hide.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
hgroup.long 0x9F4++0x03
hide.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
hgroup.long 0x9F8++0x03
hide.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
hgroup.long 0x9FC++0x03
hide.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0xA00++0x03
line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO515  ,CPU Targets Byte Offset 515 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO514  ,CPU Targets Byte Offset 514 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO513  ,CPU Targets Byte Offset 513 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO512  ,CPU Targets Byte Offset 512 "
group.long 0xA04++0x03
line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO519  ,CPU Targets Byte Offset 519 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO518  ,CPU Targets Byte Offset 518 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO517  ,CPU Targets Byte Offset 517 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO516  ,CPU Targets Byte Offset 516 "
group.long 0xA08++0x03
line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO523  ,CPU Targets Byte Offset 523 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO522  ,CPU Targets Byte Offset 522 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO521  ,CPU Targets Byte Offset 521 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO520  ,CPU Targets Byte Offset 520 "
group.long 0xA0C++0x03
line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO527  ,CPU Targets Byte Offset 527 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO526  ,CPU Targets Byte Offset 526 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO525  ,CPU Targets Byte Offset 525 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO524  ,CPU Targets Byte Offset 524 "
group.long 0xA10++0x03
line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO531  ,CPU Targets Byte Offset 531 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO530  ,CPU Targets Byte Offset 530 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO529  ,CPU Targets Byte Offset 529 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO528  ,CPU Targets Byte Offset 528 "
group.long 0xA14++0x03
line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO535  ,CPU Targets Byte Offset 535 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO534  ,CPU Targets Byte Offset 534 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO533  ,CPU Targets Byte Offset 533 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO532  ,CPU Targets Byte Offset 532 "
group.long 0xA18++0x03
line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO539  ,CPU Targets Byte Offset 539 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO538  ,CPU Targets Byte Offset 538 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO537  ,CPU Targets Byte Offset 537 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO536  ,CPU Targets Byte Offset 536 "
group.long 0xA1C++0x03
line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO543  ,CPU Targets Byte Offset 543 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO542  ,CPU Targets Byte Offset 542 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO541  ,CPU Targets Byte Offset 541 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO540  ,CPU Targets Byte Offset 540 "
else
hgroup.long 0xA00++0x03
hide.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
hgroup.long 0xA04++0x03
hide.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
hgroup.long 0xA08++0x03
hide.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
hgroup.long 0xA0C++0x03
hide.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
hgroup.long 0xA10++0x03
hide.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
hgroup.long 0xA14++0x03
hide.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
hgroup.long 0xA18++0x03
hide.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
hgroup.long 0xA1C++0x03
hide.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0xA20++0x03
line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO547  ,CPU Targets Byte Offset 547 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO546  ,CPU Targets Byte Offset 546 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO545  ,CPU Targets Byte Offset 545 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO544  ,CPU Targets Byte Offset 544 "
group.long 0xA24++0x03
line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO551  ,CPU Targets Byte Offset 551 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO550  ,CPU Targets Byte Offset 550 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO549  ,CPU Targets Byte Offset 549 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO548  ,CPU Targets Byte Offset 548 "
group.long 0xA28++0x03
line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO555  ,CPU Targets Byte Offset 555 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO554  ,CPU Targets Byte Offset 554 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO553  ,CPU Targets Byte Offset 553 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO552  ,CPU Targets Byte Offset 552 "
group.long 0xA2C++0x03
line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO559  ,CPU Targets Byte Offset 559 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO558  ,CPU Targets Byte Offset 558 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO557  ,CPU Targets Byte Offset 557 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO556  ,CPU Targets Byte Offset 556 "
group.long 0xA30++0x03
line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO563  ,CPU Targets Byte Offset 563 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO562  ,CPU Targets Byte Offset 562 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO561  ,CPU Targets Byte Offset 561 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO560  ,CPU Targets Byte Offset 560 "
group.long 0xA34++0x03
line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO567  ,CPU Targets Byte Offset 567 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO566  ,CPU Targets Byte Offset 566 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO565  ,CPU Targets Byte Offset 565 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO564  ,CPU Targets Byte Offset 564 "
group.long 0xA38++0x03
line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO571  ,CPU Targets Byte Offset 571 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO570  ,CPU Targets Byte Offset 570 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO569  ,CPU Targets Byte Offset 569 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO568  ,CPU Targets Byte Offset 568 "
group.long 0xA3C++0x03
line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO575  ,CPU Targets Byte Offset 575 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO574  ,CPU Targets Byte Offset 574 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO573  ,CPU Targets Byte Offset 573 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO572  ,CPU Targets Byte Offset 572 "
else
hgroup.long 0xA20++0x03
hide.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
hgroup.long 0xA24++0x03
hide.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
hgroup.long 0xA28++0x03
hide.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
hgroup.long 0xA2C++0x03
hide.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
hgroup.long 0xA30++0x03
hide.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
hgroup.long 0xA34++0x03
hide.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
hgroup.long 0xA38++0x03
hide.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
hgroup.long 0xA3C++0x03
hide.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0xA40++0x03
line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO579  ,CPU Targets Byte Offset 579 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO578  ,CPU Targets Byte Offset 578 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO577  ,CPU Targets Byte Offset 577 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO576  ,CPU Targets Byte Offset 576 "
group.long 0xA44++0x03
line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO583  ,CPU Targets Byte Offset 583 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO582  ,CPU Targets Byte Offset 582 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO581  ,CPU Targets Byte Offset 581 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO580  ,CPU Targets Byte Offset 580 "
group.long 0xA48++0x03
line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO587  ,CPU Targets Byte Offset 587 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO586  ,CPU Targets Byte Offset 586 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO585  ,CPU Targets Byte Offset 585 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO584  ,CPU Targets Byte Offset 584 "
group.long 0xA4C++0x03
line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO591  ,CPU Targets Byte Offset 591 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO590  ,CPU Targets Byte Offset 590 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO589  ,CPU Targets Byte Offset 589 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO588  ,CPU Targets Byte Offset 588 "
group.long 0xA50++0x03
line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO595  ,CPU Targets Byte Offset 595 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO594  ,CPU Targets Byte Offset 594 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO593  ,CPU Targets Byte Offset 593 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO592  ,CPU Targets Byte Offset 592 "
group.long 0xA54++0x03
line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO599  ,CPU Targets Byte Offset 599 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO598  ,CPU Targets Byte Offset 598 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO597  ,CPU Targets Byte Offset 597 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO596  ,CPU Targets Byte Offset 596 "
group.long 0xA58++0x03
line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO603  ,CPU Targets Byte Offset 603 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO602  ,CPU Targets Byte Offset 602 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO601  ,CPU Targets Byte Offset 601 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO600  ,CPU Targets Byte Offset 600 "
group.long 0xA5C++0x03
line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO607  ,CPU Targets Byte Offset 607 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO606  ,CPU Targets Byte Offset 606 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO605  ,CPU Targets Byte Offset 605 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO604  ,CPU Targets Byte Offset 604 "
else
hgroup.long 0xA40++0x03
hide.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
hgroup.long 0xA44++0x03
hide.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
hgroup.long 0xA48++0x03
hide.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
hgroup.long 0xA4C++0x03
hide.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
hgroup.long 0xA50++0x03
hide.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
hgroup.long 0xA54++0x03
hide.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
hgroup.long 0xA58++0x03
hide.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
hgroup.long 0xA5C++0x03
hide.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0xA60++0x03
line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO611  ,CPU Targets Byte Offset 611 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO610  ,CPU Targets Byte Offset 610 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO609  ,CPU Targets Byte Offset 609 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO608  ,CPU Targets Byte Offset 608 "
group.long 0xA64++0x03
line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO615  ,CPU Targets Byte Offset 615 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO614  ,CPU Targets Byte Offset 614 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO613  ,CPU Targets Byte Offset 613 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO612  ,CPU Targets Byte Offset 612 "
group.long 0xA68++0x03
line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO619  ,CPU Targets Byte Offset 619 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO618  ,CPU Targets Byte Offset 618 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO617  ,CPU Targets Byte Offset 617 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO616  ,CPU Targets Byte Offset 616 "
group.long 0xA6C++0x03
line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO623  ,CPU Targets Byte Offset 623 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO622  ,CPU Targets Byte Offset 622 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO621  ,CPU Targets Byte Offset 621 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO620  ,CPU Targets Byte Offset 620 "
group.long 0xA70++0x03
line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO627  ,CPU Targets Byte Offset 627 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO626  ,CPU Targets Byte Offset 626 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO625  ,CPU Targets Byte Offset 625 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO624  ,CPU Targets Byte Offset 624 "
group.long 0xA74++0x03
line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO631  ,CPU Targets Byte Offset 631 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO630  ,CPU Targets Byte Offset 630 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO629  ,CPU Targets Byte Offset 629 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO628  ,CPU Targets Byte Offset 628 "
group.long 0xA78++0x03
line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO635  ,CPU Targets Byte Offset 635 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO634  ,CPU Targets Byte Offset 634 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO633  ,CPU Targets Byte Offset 633 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO632  ,CPU Targets Byte Offset 632 "
group.long 0xA7C++0x03
line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO639  ,CPU Targets Byte Offset 639 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO638  ,CPU Targets Byte Offset 638 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO637  ,CPU Targets Byte Offset 637 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO636  ,CPU Targets Byte Offset 636 "
else
hgroup.long 0xA60++0x03
hide.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
hgroup.long 0xA64++0x03
hide.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
hgroup.long 0xA68++0x03
hide.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
hgroup.long 0xA6C++0x03
hide.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
hgroup.long 0xA70++0x03
hide.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
hgroup.long 0xA74++0x03
hide.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
hgroup.long 0xA78++0x03
hide.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
hgroup.long 0xA7C++0x03
hide.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0xA80++0x03
line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO643  ,CPU Targets Byte Offset 643 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO642  ,CPU Targets Byte Offset 642 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO641  ,CPU Targets Byte Offset 641 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO640  ,CPU Targets Byte Offset 640 "
group.long 0xA84++0x03
line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO647  ,CPU Targets Byte Offset 647 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO646  ,CPU Targets Byte Offset 646 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO645  ,CPU Targets Byte Offset 645 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO644  ,CPU Targets Byte Offset 644 "
group.long 0xA88++0x03
line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO651  ,CPU Targets Byte Offset 651 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO650  ,CPU Targets Byte Offset 650 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO649  ,CPU Targets Byte Offset 649 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO648  ,CPU Targets Byte Offset 648 "
group.long 0xA8C++0x03
line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO655  ,CPU Targets Byte Offset 655 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO654  ,CPU Targets Byte Offset 654 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO653  ,CPU Targets Byte Offset 653 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO652  ,CPU Targets Byte Offset 652 "
group.long 0xA90++0x03
line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO659  ,CPU Targets Byte Offset 659 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO658  ,CPU Targets Byte Offset 658 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO657  ,CPU Targets Byte Offset 657 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO656  ,CPU Targets Byte Offset 656 "
group.long 0xA94++0x03
line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO663  ,CPU Targets Byte Offset 663 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO662  ,CPU Targets Byte Offset 662 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO661  ,CPU Targets Byte Offset 661 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO660  ,CPU Targets Byte Offset 660 "
group.long 0xA98++0x03
line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO667  ,CPU Targets Byte Offset 667 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO666  ,CPU Targets Byte Offset 666 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO665  ,CPU Targets Byte Offset 665 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO664  ,CPU Targets Byte Offset 664 "
group.long 0xA9C++0x03
line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO671  ,CPU Targets Byte Offset 671 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO670  ,CPU Targets Byte Offset 670 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO669  ,CPU Targets Byte Offset 669 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO668  ,CPU Targets Byte Offset 668 "
else
hgroup.long 0xA80++0x03
hide.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
hgroup.long 0xA84++0x03
hide.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
hgroup.long 0xA88++0x03
hide.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
hgroup.long 0xA8C++0x03
hide.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
hgroup.long 0xA90++0x03
hide.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
hgroup.long 0xA94++0x03
hide.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
hgroup.long 0xA98++0x03
hide.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
hgroup.long 0xA9C++0x03
hide.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0xAA0++0x03
line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO675  ,CPU Targets Byte Offset 675 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO674  ,CPU Targets Byte Offset 674 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO673  ,CPU Targets Byte Offset 673 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO672  ,CPU Targets Byte Offset 672 "
group.long 0xAA4++0x03
line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO679  ,CPU Targets Byte Offset 679 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO678  ,CPU Targets Byte Offset 678 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO677  ,CPU Targets Byte Offset 677 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO676  ,CPU Targets Byte Offset 676 "
group.long 0xAA8++0x03
line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO683  ,CPU Targets Byte Offset 683 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO682  ,CPU Targets Byte Offset 682 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO681  ,CPU Targets Byte Offset 681 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO680  ,CPU Targets Byte Offset 680 "
group.long 0xAAC++0x03
line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO687  ,CPU Targets Byte Offset 687 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO686  ,CPU Targets Byte Offset 686 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO685  ,CPU Targets Byte Offset 685 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO684  ,CPU Targets Byte Offset 684 "
group.long 0xAB0++0x03
line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO691  ,CPU Targets Byte Offset 691 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO690  ,CPU Targets Byte Offset 690 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO689  ,CPU Targets Byte Offset 689 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO688  ,CPU Targets Byte Offset 688 "
group.long 0xAB4++0x03
line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO695  ,CPU Targets Byte Offset 695 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO694  ,CPU Targets Byte Offset 694 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO693  ,CPU Targets Byte Offset 693 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO692  ,CPU Targets Byte Offset 692 "
group.long 0xAB8++0x03
line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO699  ,CPU Targets Byte Offset 699 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO698  ,CPU Targets Byte Offset 698 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO697  ,CPU Targets Byte Offset 697 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO696  ,CPU Targets Byte Offset 696 "
group.long 0xABC++0x03
line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO703  ,CPU Targets Byte Offset 703 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO702  ,CPU Targets Byte Offset 702 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO701  ,CPU Targets Byte Offset 701 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO700  ,CPU Targets Byte Offset 700 "
else
hgroup.long 0xAA0++0x03
hide.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
hgroup.long 0xAA4++0x03
hide.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
hgroup.long 0xAA8++0x03
hide.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
hgroup.long 0xAAC++0x03
hide.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
hgroup.long 0xAB0++0x03
hide.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
hgroup.long 0xAB4++0x03
hide.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
hgroup.long 0xAB8++0x03
hide.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
hgroup.long 0xABC++0x03
hide.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0xAC0++0x03
line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO707  ,CPU Targets Byte Offset 707 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO706  ,CPU Targets Byte Offset 706 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO705  ,CPU Targets Byte Offset 705 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO704  ,CPU Targets Byte Offset 704 "
group.long 0xAC4++0x03
line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO711  ,CPU Targets Byte Offset 711 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO710  ,CPU Targets Byte Offset 710 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO709  ,CPU Targets Byte Offset 709 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO708  ,CPU Targets Byte Offset 708 "
group.long 0xAC8++0x03
line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO715  ,CPU Targets Byte Offset 715 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO714  ,CPU Targets Byte Offset 714 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO713  ,CPU Targets Byte Offset 713 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO712  ,CPU Targets Byte Offset 712 "
group.long 0xACC++0x03
line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO719  ,CPU Targets Byte Offset 719 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO718  ,CPU Targets Byte Offset 718 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO717  ,CPU Targets Byte Offset 717 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO716  ,CPU Targets Byte Offset 716 "
group.long 0xAD0++0x03
line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO723  ,CPU Targets Byte Offset 723 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO722  ,CPU Targets Byte Offset 722 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO721  ,CPU Targets Byte Offset 721 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO720  ,CPU Targets Byte Offset 720 "
group.long 0xAD4++0x03
line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO727  ,CPU Targets Byte Offset 727 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO726  ,CPU Targets Byte Offset 726 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO725  ,CPU Targets Byte Offset 725 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO724  ,CPU Targets Byte Offset 724 "
group.long 0xAD8++0x03
line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO731  ,CPU Targets Byte Offset 731 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO730  ,CPU Targets Byte Offset 730 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO729  ,CPU Targets Byte Offset 729 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO728  ,CPU Targets Byte Offset 728 "
group.long 0xADC++0x03
line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO735  ,CPU Targets Byte Offset 735 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO734  ,CPU Targets Byte Offset 734 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO733  ,CPU Targets Byte Offset 733 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO732  ,CPU Targets Byte Offset 732 "
else
hgroup.long 0xAC0++0x03
hide.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
hgroup.long 0xAC4++0x03
hide.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
hgroup.long 0xAC8++0x03
hide.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
hgroup.long 0xACC++0x03
hide.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
hgroup.long 0xAD0++0x03
hide.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
hgroup.long 0xAD4++0x03
hide.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
hgroup.long 0xAD8++0x03
hide.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
hgroup.long 0xADC++0x03
hide.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0xAE0++0x03
line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO739  ,CPU Targets Byte Offset 739 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO738  ,CPU Targets Byte Offset 738 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO737  ,CPU Targets Byte Offset 737 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO736  ,CPU Targets Byte Offset 736 "
group.long 0xAE4++0x03
line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO743  ,CPU Targets Byte Offset 743 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO742  ,CPU Targets Byte Offset 742 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO741  ,CPU Targets Byte Offset 741 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO740  ,CPU Targets Byte Offset 740 "
group.long 0xAE8++0x03
line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO747  ,CPU Targets Byte Offset 747 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO746  ,CPU Targets Byte Offset 746 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO745  ,CPU Targets Byte Offset 745 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO744  ,CPU Targets Byte Offset 744 "
group.long 0xAEC++0x03
line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO751  ,CPU Targets Byte Offset 751 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO750  ,CPU Targets Byte Offset 750 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO749  ,CPU Targets Byte Offset 749 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO748  ,CPU Targets Byte Offset 748 "
group.long 0xAF0++0x03
line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO755  ,CPU Targets Byte Offset 755 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO754  ,CPU Targets Byte Offset 754 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO753  ,CPU Targets Byte Offset 753 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO752  ,CPU Targets Byte Offset 752 "
group.long 0xAF4++0x03
line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO759  ,CPU Targets Byte Offset 759 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO758  ,CPU Targets Byte Offset 758 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO757  ,CPU Targets Byte Offset 757 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO756  ,CPU Targets Byte Offset 756 "
group.long 0xAF8++0x03
line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO763  ,CPU Targets Byte Offset 763 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO762  ,CPU Targets Byte Offset 762 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO761  ,CPU Targets Byte Offset 761 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO760  ,CPU Targets Byte Offset 760 "
group.long 0xAFC++0x03
line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO767  ,CPU Targets Byte Offset 767 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO766  ,CPU Targets Byte Offset 766 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO765  ,CPU Targets Byte Offset 765 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO764  ,CPU Targets Byte Offset 764 "
else
hgroup.long 0xAE0++0x03
hide.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
hgroup.long 0xAE4++0x03
hide.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
hgroup.long 0xAE8++0x03
hide.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
hgroup.long 0xAEC++0x03
hide.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
hgroup.long 0xAF0++0x03
hide.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
hgroup.long 0xAF4++0x03
hide.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
hgroup.long 0xAF8++0x03
hide.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
hgroup.long 0xAFC++0x03
hide.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0xB00++0x03
line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO771  ,CPU Targets Byte Offset 771 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO770  ,CPU Targets Byte Offset 770 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO769  ,CPU Targets Byte Offset 769 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO768  ,CPU Targets Byte Offset 768 "
group.long 0xB04++0x03
line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO775  ,CPU Targets Byte Offset 775 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO774  ,CPU Targets Byte Offset 774 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO773  ,CPU Targets Byte Offset 773 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO772  ,CPU Targets Byte Offset 772 "
group.long 0xB08++0x03
line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO779  ,CPU Targets Byte Offset 779 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO778  ,CPU Targets Byte Offset 778 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO777  ,CPU Targets Byte Offset 777 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO776  ,CPU Targets Byte Offset 776 "
group.long 0xB0C++0x03
line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO783  ,CPU Targets Byte Offset 783 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO782  ,CPU Targets Byte Offset 782 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO781  ,CPU Targets Byte Offset 781 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO780  ,CPU Targets Byte Offset 780 "
group.long 0xB10++0x03
line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO787  ,CPU Targets Byte Offset 787 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO786  ,CPU Targets Byte Offset 786 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO785  ,CPU Targets Byte Offset 785 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO784  ,CPU Targets Byte Offset 784 "
group.long 0xB14++0x03
line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO791  ,CPU Targets Byte Offset 791 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO790  ,CPU Targets Byte Offset 790 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO789  ,CPU Targets Byte Offset 789 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO788  ,CPU Targets Byte Offset 788 "
group.long 0xB18++0x03
line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO795  ,CPU Targets Byte Offset 795 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO794  ,CPU Targets Byte Offset 794 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO793  ,CPU Targets Byte Offset 793 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO792  ,CPU Targets Byte Offset 792 "
group.long 0xB1C++0x03
line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO799  ,CPU Targets Byte Offset 799 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO798  ,CPU Targets Byte Offset 798 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO797  ,CPU Targets Byte Offset 797 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO796  ,CPU Targets Byte Offset 796 "
else
hgroup.long 0xB00++0x03
hide.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
hgroup.long 0xB04++0x03
hide.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
hgroup.long 0xB08++0x03
hide.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
hgroup.long 0xB0C++0x03
hide.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
hgroup.long 0xB10++0x03
hide.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
hgroup.long 0xB14++0x03
hide.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
hgroup.long 0xB18++0x03
hide.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
hgroup.long 0xB1C++0x03
hide.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0xB20++0x03
line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO803  ,CPU Targets Byte Offset 803 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO802  ,CPU Targets Byte Offset 802 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO801  ,CPU Targets Byte Offset 801 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO800  ,CPU Targets Byte Offset 800 "
group.long 0xB24++0x03
line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO807  ,CPU Targets Byte Offset 807 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO806  ,CPU Targets Byte Offset 806 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO805  ,CPU Targets Byte Offset 805 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO804  ,CPU Targets Byte Offset 804 "
group.long 0xB28++0x03
line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO811  ,CPU Targets Byte Offset 811 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO810  ,CPU Targets Byte Offset 810 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO809  ,CPU Targets Byte Offset 809 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO808  ,CPU Targets Byte Offset 808 "
group.long 0xB2C++0x03
line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO815  ,CPU Targets Byte Offset 815 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO814  ,CPU Targets Byte Offset 814 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO813  ,CPU Targets Byte Offset 813 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO812  ,CPU Targets Byte Offset 812 "
group.long 0xB30++0x03
line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO819  ,CPU Targets Byte Offset 819 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO818  ,CPU Targets Byte Offset 818 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO817  ,CPU Targets Byte Offset 817 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO816  ,CPU Targets Byte Offset 816 "
group.long 0xB34++0x03
line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO823  ,CPU Targets Byte Offset 823 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO822  ,CPU Targets Byte Offset 822 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO821  ,CPU Targets Byte Offset 821 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO820  ,CPU Targets Byte Offset 820 "
group.long 0xB38++0x03
line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO827  ,CPU Targets Byte Offset 827 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO826  ,CPU Targets Byte Offset 826 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO825  ,CPU Targets Byte Offset 825 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO824  ,CPU Targets Byte Offset 824 "
group.long 0xB3C++0x03
line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO831  ,CPU Targets Byte Offset 831 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO830  ,CPU Targets Byte Offset 830 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO829  ,CPU Targets Byte Offset 829 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO828  ,CPU Targets Byte Offset 828 "
else
hgroup.long 0xB20++0x03
hide.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
hgroup.long 0xB24++0x03
hide.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
hgroup.long 0xB28++0x03
hide.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
hgroup.long 0xB2C++0x03
hide.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
hgroup.long 0xB30++0x03
hide.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
hgroup.long 0xB34++0x03
hide.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
hgroup.long 0xB38++0x03
hide.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
hgroup.long 0xB3C++0x03
hide.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0xB40++0x03
line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO835  ,CPU Targets Byte Offset 835 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO834  ,CPU Targets Byte Offset 834 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO833  ,CPU Targets Byte Offset 833 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO832  ,CPU Targets Byte Offset 832 "
group.long 0xB44++0x03
line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO839  ,CPU Targets Byte Offset 839 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO838  ,CPU Targets Byte Offset 838 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO837  ,CPU Targets Byte Offset 837 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO836  ,CPU Targets Byte Offset 836 "
group.long 0xB48++0x03
line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO843  ,CPU Targets Byte Offset 843 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO842  ,CPU Targets Byte Offset 842 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO841  ,CPU Targets Byte Offset 841 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO840  ,CPU Targets Byte Offset 840 "
group.long 0xB4C++0x03
line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO847  ,CPU Targets Byte Offset 847 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO846  ,CPU Targets Byte Offset 846 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO845  ,CPU Targets Byte Offset 845 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO844  ,CPU Targets Byte Offset 844 "
group.long 0xB50++0x03
line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO851  ,CPU Targets Byte Offset 851 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO850  ,CPU Targets Byte Offset 850 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO849  ,CPU Targets Byte Offset 849 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO848  ,CPU Targets Byte Offset 848 "
group.long 0xB54++0x03
line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO855  ,CPU Targets Byte Offset 855 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO854  ,CPU Targets Byte Offset 854 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO853  ,CPU Targets Byte Offset 853 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO852  ,CPU Targets Byte Offset 852 "
group.long 0xB58++0x03
line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO859  ,CPU Targets Byte Offset 859 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO858  ,CPU Targets Byte Offset 858 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO857  ,CPU Targets Byte Offset 857 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO856  ,CPU Targets Byte Offset 856 "
group.long 0xB5C++0x03
line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO863  ,CPU Targets Byte Offset 863 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO862  ,CPU Targets Byte Offset 862 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO861  ,CPU Targets Byte Offset 861 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO860  ,CPU Targets Byte Offset 860 "
else
hgroup.long 0xB40++0x03
hide.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
hgroup.long 0xB44++0x03
hide.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
hgroup.long 0xB48++0x03
hide.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
hgroup.long 0xB4C++0x03
hide.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
hgroup.long 0xB50++0x03
hide.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
hgroup.long 0xB54++0x03
hide.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
hgroup.long 0xB58++0x03
hide.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
hgroup.long 0xB5C++0x03
hide.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0xB60++0x03
line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO867  ,CPU Targets Byte Offset 867 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO866  ,CPU Targets Byte Offset 866 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO865  ,CPU Targets Byte Offset 865 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO864  ,CPU Targets Byte Offset 864 "
group.long 0xB64++0x03
line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO871  ,CPU Targets Byte Offset 871 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO870  ,CPU Targets Byte Offset 870 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO869  ,CPU Targets Byte Offset 869 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO868  ,CPU Targets Byte Offset 868 "
group.long 0xB68++0x03
line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO875  ,CPU Targets Byte Offset 875 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO874  ,CPU Targets Byte Offset 874 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO873  ,CPU Targets Byte Offset 873 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO872  ,CPU Targets Byte Offset 872 "
group.long 0xB6C++0x03
line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO879  ,CPU Targets Byte Offset 879 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO878  ,CPU Targets Byte Offset 878 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO877  ,CPU Targets Byte Offset 877 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO876  ,CPU Targets Byte Offset 876 "
group.long 0xB70++0x03
line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO883  ,CPU Targets Byte Offset 883 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO882  ,CPU Targets Byte Offset 882 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO881  ,CPU Targets Byte Offset 881 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO880  ,CPU Targets Byte Offset 880 "
group.long 0xB74++0x03
line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO887  ,CPU Targets Byte Offset 887 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO886  ,CPU Targets Byte Offset 886 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO885  ,CPU Targets Byte Offset 885 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO884  ,CPU Targets Byte Offset 884 "
group.long 0xB78++0x03
line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO891  ,CPU Targets Byte Offset 891 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO890  ,CPU Targets Byte Offset 890 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO889  ,CPU Targets Byte Offset 889 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO888  ,CPU Targets Byte Offset 888 "
group.long 0xB7C++0x03
line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO895  ,CPU Targets Byte Offset 895 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO894  ,CPU Targets Byte Offset 894 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO893  ,CPU Targets Byte Offset 893 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO892  ,CPU Targets Byte Offset 892 "
else
hgroup.long 0xB60++0x03
hide.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
hgroup.long 0xB64++0x03
hide.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
hgroup.long 0xB68++0x03
hide.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
hgroup.long 0xB6C++0x03
hide.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
hgroup.long 0xB70++0x03
hide.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
hgroup.long 0xB74++0x03
hide.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
hgroup.long 0xB78++0x03
hide.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
hgroup.long 0xB7C++0x03
hide.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0xB80++0x03
line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO899  ,CPU Targets Byte Offset 899 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO898  ,CPU Targets Byte Offset 898 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO897  ,CPU Targets Byte Offset 897 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO896  ,CPU Targets Byte Offset 896 "
group.long 0xB84++0x03
line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO903  ,CPU Targets Byte Offset 903 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO902  ,CPU Targets Byte Offset 902 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO901  ,CPU Targets Byte Offset 901 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO900  ,CPU Targets Byte Offset 900 "
group.long 0xB88++0x03
line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO907  ,CPU Targets Byte Offset 907 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO906  ,CPU Targets Byte Offset 906 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO905  ,CPU Targets Byte Offset 905 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO904  ,CPU Targets Byte Offset 904 "
group.long 0xB8C++0x03
line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO911  ,CPU Targets Byte Offset 911 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO910  ,CPU Targets Byte Offset 910 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO909  ,CPU Targets Byte Offset 909 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO908  ,CPU Targets Byte Offset 908 "
group.long 0xB90++0x03
line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO915  ,CPU Targets Byte Offset 915 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO914  ,CPU Targets Byte Offset 914 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO913  ,CPU Targets Byte Offset 913 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO912  ,CPU Targets Byte Offset 912 "
group.long 0xB94++0x03
line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO919  ,CPU Targets Byte Offset 919 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO918  ,CPU Targets Byte Offset 918 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO917  ,CPU Targets Byte Offset 917 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO916  ,CPU Targets Byte Offset 916 "
group.long 0xB98++0x03
line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO923  ,CPU Targets Byte Offset 923 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO922  ,CPU Targets Byte Offset 922 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO921  ,CPU Targets Byte Offset 921 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO920  ,CPU Targets Byte Offset 920 "
group.long 0xB9C++0x03
line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO927  ,CPU Targets Byte Offset 927 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO926  ,CPU Targets Byte Offset 926 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO925  ,CPU Targets Byte Offset 925 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO924  ,CPU Targets Byte Offset 924 "
else
hgroup.long 0xB80++0x03
hide.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
hgroup.long 0xB84++0x03
hide.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
hgroup.long 0xB88++0x03
hide.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
hgroup.long 0xB8C++0x03
hide.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
hgroup.long 0xB90++0x03
hide.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
hgroup.long 0xB94++0x03
hide.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
hgroup.long 0xB98++0x03
hide.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
hgroup.long 0xB9C++0x03
hide.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0xBA0++0x03
line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO931  ,CPU Targets Byte Offset 931 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO930  ,CPU Targets Byte Offset 930 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO929  ,CPU Targets Byte Offset 929 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO928  ,CPU Targets Byte Offset 928 "
group.long 0xBA4++0x03
line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO935  ,CPU Targets Byte Offset 935 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO934  ,CPU Targets Byte Offset 934 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO933  ,CPU Targets Byte Offset 933 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO932  ,CPU Targets Byte Offset 932 "
group.long 0xBA8++0x03
line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO939  ,CPU Targets Byte Offset 939 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO938  ,CPU Targets Byte Offset 938 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO937  ,CPU Targets Byte Offset 937 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO936  ,CPU Targets Byte Offset 936 "
group.long 0xBAC++0x03
line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO943  ,CPU Targets Byte Offset 943 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO942  ,CPU Targets Byte Offset 942 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO941  ,CPU Targets Byte Offset 941 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO940  ,CPU Targets Byte Offset 940 "
group.long 0xBB0++0x03
line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO947  ,CPU Targets Byte Offset 947 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO946  ,CPU Targets Byte Offset 946 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO945  ,CPU Targets Byte Offset 945 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO944  ,CPU Targets Byte Offset 944 "
group.long 0xBB4++0x03
line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO951  ,CPU Targets Byte Offset 951 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO950  ,CPU Targets Byte Offset 950 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO949  ,CPU Targets Byte Offset 949 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO948  ,CPU Targets Byte Offset 948 "
group.long 0xBB8++0x03
line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO955  ,CPU Targets Byte Offset 955 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO954  ,CPU Targets Byte Offset 954 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO953  ,CPU Targets Byte Offset 953 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO952  ,CPU Targets Byte Offset 952 "
group.long 0xBBC++0x03
line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO959  ,CPU Targets Byte Offset 959 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO958  ,CPU Targets Byte Offset 958 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO957  ,CPU Targets Byte Offset 957 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO956  ,CPU Targets Byte Offset 956 "
else
hgroup.long 0xBA0++0x03
hide.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
hgroup.long 0xBA4++0x03
hide.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
hgroup.long 0xBA8++0x03
hide.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
hgroup.long 0xBAC++0x03
hide.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
hgroup.long 0xBB0++0x03
hide.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
hgroup.long 0xBB4++0x03
hide.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
hgroup.long 0xBB8++0x03
hide.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
hgroup.long 0xBBC++0x03
hide.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0xBC0++0x03
line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO963  ,CPU Targets Byte Offset 963 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO962  ,CPU Targets Byte Offset 962 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO961  ,CPU Targets Byte Offset 961 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO960  ,CPU Targets Byte Offset 960 "
group.long 0xBC4++0x03
line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO967  ,CPU Targets Byte Offset 967 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO966  ,CPU Targets Byte Offset 966 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO965  ,CPU Targets Byte Offset 965 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO964  ,CPU Targets Byte Offset 964 "
group.long 0xBC8++0x03
line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO971  ,CPU Targets Byte Offset 971 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO970  ,CPU Targets Byte Offset 970 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO969  ,CPU Targets Byte Offset 969 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO968  ,CPU Targets Byte Offset 968 "
group.long 0xBCC++0x03
line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO975  ,CPU Targets Byte Offset 975 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO974  ,CPU Targets Byte Offset 974 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO973  ,CPU Targets Byte Offset 973 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO972  ,CPU Targets Byte Offset 972 "
group.long 0xBD0++0x03
line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO979  ,CPU Targets Byte Offset 979 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO978  ,CPU Targets Byte Offset 978 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO977  ,CPU Targets Byte Offset 977 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO976  ,CPU Targets Byte Offset 976 "
group.long 0xBD4++0x03
line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO983  ,CPU Targets Byte Offset 983 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO982  ,CPU Targets Byte Offset 982 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO981  ,CPU Targets Byte Offset 981 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO980  ,CPU Targets Byte Offset 980 "
group.long 0xBD8++0x03
line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO987  ,CPU Targets Byte Offset 987 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO986  ,CPU Targets Byte Offset 986 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO985  ,CPU Targets Byte Offset 985 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO984  ,CPU Targets Byte Offset 984 "
group.long 0xBDC++0x03
line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO991  ,CPU Targets Byte Offset 991 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO990  ,CPU Targets Byte Offset 990 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO989  ,CPU Targets Byte Offset 989 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO988  ,CPU Targets Byte Offset 988 "
else
hgroup.long 0xBC0++0x03
hide.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
hgroup.long 0xBC4++0x03
hide.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
hgroup.long 0xBC8++0x03
hide.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
hgroup.long 0xBCC++0x03
hide.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
hgroup.long 0xBD0++0x03
hide.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
hgroup.long 0xBD4++0x03
hide.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
hgroup.long 0xBD8++0x03
hide.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
hgroup.long 0xBDC++0x03
hide.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
endif
else
hgroup.long 0x800++0x03
hide.long 0x00 "GICD_ITARGETSR0  ,Interrupt Processor Targets Register 0  "
hgroup.long 0x804++0x03
hide.long 0x00 "GICD_ITARGETSR1  ,Interrupt Processor Targets Register 1  "
hgroup.long 0x808++0x03
hide.long 0x00 "GICD_ITARGETSR2  ,Interrupt Processor Targets Register 2  "
hgroup.long 0x80C++0x03
hide.long 0x00 "GICD_ITARGETSR3  ,Interrupt Processor Targets Register 3  "
hgroup.long 0x810++0x03
hide.long 0x00 "GICD_ITARGETSR4  ,Interrupt Processor Targets Register 4  "
hgroup.long 0x814++0x03
hide.long 0x00 "GICD_ITARGETSR5  ,Interrupt Processor Targets Register 5  "
hgroup.long 0x818++0x03
hide.long 0x00 "GICD_ITARGETSR6  ,Interrupt Processor Targets Register 6  "
hgroup.long 0x81C++0x03
hide.long 0x00 "GICD_ITARGETSR7  ,Interrupt Processor Targets Register 7  "
hgroup.long 0x820++0x03
hide.long 0x00 "GICD_ITARGETSR8  ,Interrupt Processor Targets Register 8  "
hgroup.long 0x824++0x03
hide.long 0x00 "GICD_ITARGETSR9  ,Interrupt Processor Targets Register 9  "
hgroup.long 0x828++0x03
hide.long 0x00 "GICD_ITARGETSR10 ,Interrupt Processor Targets Register 10 "
hgroup.long 0x82C++0x03
hide.long 0x00 "GICD_ITARGETSR11 ,Interrupt Processor Targets Register 11 "
hgroup.long 0x830++0x03
hide.long 0x00 "GICD_ITARGETSR12 ,Interrupt Processor Targets Register 12 "
hgroup.long 0x834++0x03
hide.long 0x00 "GICD_ITARGETSR13 ,Interrupt Processor Targets Register 13 "
hgroup.long 0x838++0x03
hide.long 0x00 "GICD_ITARGETSR14 ,Interrupt Processor Targets Register 14 "
hgroup.long 0x83C++0x03
hide.long 0x00 "GICD_ITARGETSR15 ,Interrupt Processor Targets Register 15 "
hgroup.long 0x840++0x03
hide.long 0x00 "GICD_ITARGETSR16 ,Interrupt Processor Targets Register 16 "
hgroup.long 0x844++0x03
hide.long 0x00 "GICD_ITARGETSR17 ,Interrupt Processor Targets Register 17 "
hgroup.long 0x848++0x03
hide.long 0x00 "GICD_ITARGETSR18 ,Interrupt Processor Targets Register 18 "
hgroup.long 0x84C++0x03
hide.long 0x00 "GICD_ITARGETSR19 ,Interrupt Processor Targets Register 19 "
hgroup.long 0x850++0x03
hide.long 0x00 "GICD_ITARGETSR20 ,Interrupt Processor Targets Register 20 "
hgroup.long 0x854++0x03
hide.long 0x00 "GICD_ITARGETSR21 ,Interrupt Processor Targets Register 21 "
hgroup.long 0x858++0x03
hide.long 0x00 "GICD_ITARGETSR22 ,Interrupt Processor Targets Register 22 "
hgroup.long 0x85C++0x03
hide.long 0x00 "GICD_ITARGETSR23 ,Interrupt Processor Targets Register 23 "
hgroup.long 0x860++0x03
hide.long 0x00 "GICD_ITARGETSR24 ,Interrupt Processor Targets Register 24 "
hgroup.long 0x864++0x03
hide.long 0x00 "GICD_ITARGETSR25 ,Interrupt Processor Targets Register 25 "
hgroup.long 0x868++0x03
hide.long 0x00 "GICD_ITARGETSR26 ,Interrupt Processor Targets Register 26 "
hgroup.long 0x86C++0x03
hide.long 0x00 "GICD_ITARGETSR27 ,Interrupt Processor Targets Register 27 "
hgroup.long 0x870++0x03
hide.long 0x00 "GICD_ITARGETSR28 ,Interrupt Processor Targets Register 28 "
hgroup.long 0x874++0x03
hide.long 0x00 "GICD_ITARGETSR29 ,Interrupt Processor Targets Register 29 "
hgroup.long 0x878++0x03
hide.long 0x00 "GICD_ITARGETSR30 ,Interrupt Processor Targets Register 30 "
hgroup.long 0x87C++0x03
hide.long 0x00 "GICD_ITARGETSR31 ,Interrupt Processor Targets Register 31 "
hgroup.long 0x880++0x03
hide.long 0x00 "GICD_ITARGETSR32 ,Interrupt Processor Targets Register 32 "
hgroup.long 0x884++0x03
hide.long 0x00 "GICD_ITARGETSR33 ,Interrupt Processor Targets Register 33 "
hgroup.long 0x888++0x03
hide.long 0x00 "GICD_ITARGETSR34 ,Interrupt Processor Targets Register 34 "
hgroup.long 0x88C++0x03
hide.long 0x00 "GICD_ITARGETSR35 ,Interrupt Processor Targets Register 35 "
hgroup.long 0x890++0x03
hide.long 0x00 "GICD_ITARGETSR36 ,Interrupt Processor Targets Register 36 "
hgroup.long 0x894++0x03
hide.long 0x00 "GICD_ITARGETSR37 ,Interrupt Processor Targets Register 37 "
hgroup.long 0x898++0x03
hide.long 0x00 "GICD_ITARGETSR38 ,Interrupt Processor Targets Register 38 "
hgroup.long 0x89C++0x03
hide.long 0x00 "GICD_ITARGETSR39 ,Interrupt Processor Targets Register 39 "
hgroup.long 0x8A0++0x03
hide.long 0x00 "GICD_ITARGETSR40 ,Interrupt Processor Targets Register 40 "
hgroup.long 0x8A4++0x03
hide.long 0x00 "GICD_ITARGETSR41 ,Interrupt Processor Targets Register 41 "
hgroup.long 0x8A8++0x03
hide.long 0x00 "GICD_ITARGETSR42 ,Interrupt Processor Targets Register 42 "
hgroup.long 0x8AC++0x03
hide.long 0x00 "GICD_ITARGETSR43 ,Interrupt Processor Targets Register 43 "
hgroup.long 0x8B0++0x03
hide.long 0x00 "GICD_ITARGETSR44 ,Interrupt Processor Targets Register 44 "
hgroup.long 0x8B4++0x03
hide.long 0x00 "GICD_ITARGETSR45 ,Interrupt Processor Targets Register 45 "
hgroup.long 0x8B8++0x03
hide.long 0x00 "GICD_ITARGETSR46 ,Interrupt Processor Targets Register 46 "
hgroup.long 0x8BC++0x03
hide.long 0x00 "GICD_ITARGETSR47 ,Interrupt Processor Targets Register 47 "
hgroup.long 0x8C0++0x03
hide.long 0x00 "GICD_ITARGETSR48 ,Interrupt Processor Targets Register 48 "
hgroup.long 0x8C4++0x03
hide.long 0x00 "GICD_ITARGETSR49 ,Interrupt Processor Targets Register 49 "
hgroup.long 0x8C8++0x03
hide.long 0x00 "GICD_ITARGETSR50 ,Interrupt Processor Targets Register 50 "
hgroup.long 0x8CC++0x03
hide.long 0x00 "GICD_ITARGETSR51 ,Interrupt Processor Targets Register 51 "
hgroup.long 0x8D0++0x03
hide.long 0x00 "GICD_ITARGETSR52 ,Interrupt Processor Targets Register 52 "
hgroup.long 0x8D4++0x03
hide.long 0x00 "GICD_ITARGETSR53 ,Interrupt Processor Targets Register 53 "
hgroup.long 0x8D8++0x03
hide.long 0x00 "GICD_ITARGETSR54 ,Interrupt Processor Targets Register 54 "
hgroup.long 0x8DC++0x03
hide.long 0x00 "GICD_ITARGETSR55 ,Interrupt Processor Targets Register 55 "
hgroup.long 0x8E0++0x03
hide.long 0x00 "GICD_ITARGETSR56 ,Interrupt Processor Targets Register 56 "
hgroup.long 0x8E4++0x03
hide.long 0x00 "GICD_ITARGETSR57 ,Interrupt Processor Targets Register 57 "
hgroup.long 0x8E8++0x03
hide.long 0x00 "GICD_ITARGETSR58 ,Interrupt Processor Targets Register 58 "
hgroup.long 0x8EC++0x03
hide.long 0x00 "GICD_ITARGETSR59 ,Interrupt Processor Targets Register 59 "
hgroup.long 0x8F0++0x03
hide.long 0x00 "GICD_ITARGETSR60 ,Interrupt Processor Targets Register 60 "
hgroup.long 0x8F4++0x03
hide.long 0x00 "GICD_ITARGETSR61 ,Interrupt Processor Targets Register 61 "
hgroup.long 0x8F8++0x03
hide.long 0x00 "GICD_ITARGETSR62 ,Interrupt Processor Targets Register 62 "
hgroup.long 0x8FC++0x03
hide.long 0x00 "GICD_ITARGETSR63 ,Interrupt Processor Targets Register 63 "
hgroup.long 0x900++0x03
hide.long 0x00 "GICD_ITARGETSR64 ,Interrupt Processor Targets Register 64 "
hgroup.long 0x904++0x03
hide.long 0x00 "GICD_ITARGETSR65 ,Interrupt Processor Targets Register 65 "
hgroup.long 0x908++0x03
hide.long 0x00 "GICD_ITARGETSR66 ,Interrupt Processor Targets Register 66 "
hgroup.long 0x90C++0x03
hide.long 0x00 "GICD_ITARGETSR67 ,Interrupt Processor Targets Register 67 "
hgroup.long 0x910++0x03
hide.long 0x00 "GICD_ITARGETSR68 ,Interrupt Processor Targets Register 68 "
hgroup.long 0x914++0x03
hide.long 0x00 "GICD_ITARGETSR69 ,Interrupt Processor Targets Register 69 "
hgroup.long 0x918++0x03
hide.long 0x00 "GICD_ITARGETSR70 ,Interrupt Processor Targets Register 70 "
hgroup.long 0x91C++0x03
hide.long 0x00 "GICD_ITARGETSR71 ,Interrupt Processor Targets Register 71 "
hgroup.long 0x920++0x03
hide.long 0x00 "GICD_ITARGETSR72 ,Interrupt Processor Targets Register 72 "
hgroup.long 0x924++0x03
hide.long 0x00 "GICD_ITARGETSR73 ,Interrupt Processor Targets Register 73 "
hgroup.long 0x928++0x03
hide.long 0x00 "GICD_ITARGETSR74 ,Interrupt Processor Targets Register 74 "
hgroup.long 0x92C++0x03
hide.long 0x00 "GICD_ITARGETSR75 ,Interrupt Processor Targets Register 75 "
hgroup.long 0x930++0x03
hide.long 0x00 "GICD_ITARGETSR76 ,Interrupt Processor Targets Register 76 "
hgroup.long 0x934++0x03
hide.long 0x00 "GICD_ITARGETSR77 ,Interrupt Processor Targets Register 77 "
hgroup.long 0x938++0x03
hide.long 0x00 "GICD_ITARGETSR78 ,Interrupt Processor Targets Register 78 "
hgroup.long 0x93C++0x03
hide.long 0x00 "GICD_ITARGETSR79 ,Interrupt Processor Targets Register 79 "
hgroup.long 0x940++0x03
hide.long 0x00 "GICD_ITARGETSR80 ,Interrupt Processor Targets Register 80 "
hgroup.long 0x944++0x03
hide.long 0x00 "GICD_ITARGETSR81 ,Interrupt Processor Targets Register 81 "
hgroup.long 0x948++0x03
hide.long 0x00 "GICD_ITARGETSR82 ,Interrupt Processor Targets Register 82 "
hgroup.long 0x94C++0x03
hide.long 0x00 "GICD_ITARGETSR83 ,Interrupt Processor Targets Register 83 "
hgroup.long 0x950++0x03
hide.long 0x00 "GICD_ITARGETSR84 ,Interrupt Processor Targets Register 84 "
hgroup.long 0x954++0x03
hide.long 0x00 "GICD_ITARGETSR85 ,Interrupt Processor Targets Register 85 "
hgroup.long 0x958++0x03
hide.long 0x00 "GICD_ITARGETSR86 ,Interrupt Processor Targets Register 86 "
hgroup.long 0x95C++0x03
hide.long 0x00 "GICD_ITARGETSR87 ,Interrupt Processor Targets Register 87 "
hgroup.long 0x960++0x03
hide.long 0x00 "GICD_ITARGETSR88 ,Interrupt Processor Targets Register 88 "
hgroup.long 0x964++0x03
hide.long 0x00 "GICD_ITARGETSR89 ,Interrupt Processor Targets Register 89 "
hgroup.long 0x968++0x03
hide.long 0x00 "GICD_ITARGETSR90 ,Interrupt Processor Targets Register 90 "
hgroup.long 0x96C++0x03
hide.long 0x00 "GICD_ITARGETSR91 ,Interrupt Processor Targets Register 91 "
hgroup.long 0x970++0x03
hide.long 0x00 "GICD_ITARGETSR92 ,Interrupt Processor Targets Register 92 "
hgroup.long 0x974++0x03
hide.long 0x00 "GICD_ITARGETSR93 ,Interrupt Processor Targets Register 93 "
hgroup.long 0x978++0x03
hide.long 0x00 "GICD_ITARGETSR94 ,Interrupt Processor Targets Register 94 "
hgroup.long 0x97C++0x03
hide.long 0x00 "GICD_ITARGETSR95 ,Interrupt Processor Targets Register 95 "
hgroup.long 0x980++0x03
hide.long 0x00 "GICD_ITARGETSR96 ,Interrupt Processor Targets Register 96 "
hgroup.long 0x984++0x03
hide.long 0x00 "GICD_ITARGETSR97 ,Interrupt Processor Targets Register 97 "
hgroup.long 0x988++0x03
hide.long 0x00 "GICD_ITARGETSR98 ,Interrupt Processor Targets Register 98 "
hgroup.long 0x98C++0x03
hide.long 0x00 "GICD_ITARGETSR99 ,Interrupt Processor Targets Register 99 "
hgroup.long 0x990++0x03
hide.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
hgroup.long 0x994++0x03
hide.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
hgroup.long 0x998++0x03
hide.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
hgroup.long 0x99C++0x03
hide.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
hgroup.long 0x9A0++0x03
hide.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
hgroup.long 0x9A4++0x03
hide.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
hgroup.long 0x9A8++0x03
hide.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
hgroup.long 0x9AC++0x03
hide.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
hgroup.long 0x9B0++0x03
hide.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
hgroup.long 0x9B4++0x03
hide.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
hgroup.long 0x9B8++0x03
hide.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
hgroup.long 0x9BC++0x03
hide.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
hgroup.long 0x9C0++0x03
hide.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
hgroup.long 0x9C4++0x03
hide.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
hgroup.long 0x9C8++0x03
hide.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
hgroup.long 0x9CC++0x03
hide.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
hgroup.long 0x9D0++0x03
hide.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
hgroup.long 0x9D4++0x03
hide.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
hgroup.long 0x9D8++0x03
hide.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
hgroup.long 0x9DC++0x03
hide.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
hgroup.long 0x9E0++0x03
hide.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
hgroup.long 0x9E4++0x03
hide.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
hgroup.long 0x9E8++0x03
hide.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
hgroup.long 0x9EC++0x03
hide.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
hgroup.long 0x9F0++0x03
hide.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
hgroup.long 0x9F4++0x03
hide.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
hgroup.long 0x9F8++0x03
hide.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
hgroup.long 0x9FC++0x03
hide.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
hgroup.long 0xA00++0x03
hide.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
hgroup.long 0xA04++0x03
hide.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
hgroup.long 0xA08++0x03
hide.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
hgroup.long 0xA0C++0x03
hide.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
hgroup.long 0xA10++0x03
hide.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
hgroup.long 0xA14++0x03
hide.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
hgroup.long 0xA18++0x03
hide.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
hgroup.long 0xA1C++0x03
hide.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
hgroup.long 0xA20++0x03
hide.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
hgroup.long 0xA24++0x03
hide.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
hgroup.long 0xA28++0x03
hide.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
hgroup.long 0xA2C++0x03
hide.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
hgroup.long 0xA30++0x03
hide.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
hgroup.long 0xA34++0x03
hide.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
hgroup.long 0xA38++0x03
hide.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
hgroup.long 0xA3C++0x03
hide.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
hgroup.long 0xA40++0x03
hide.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
hgroup.long 0xA44++0x03
hide.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
hgroup.long 0xA48++0x03
hide.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
hgroup.long 0xA4C++0x03
hide.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
hgroup.long 0xA50++0x03
hide.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
hgroup.long 0xA54++0x03
hide.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
hgroup.long 0xA58++0x03
hide.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
hgroup.long 0xA5C++0x03
hide.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
hgroup.long 0xA60++0x03
hide.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
hgroup.long 0xA64++0x03
hide.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
hgroup.long 0xA68++0x03
hide.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
hgroup.long 0xA6C++0x03
hide.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
hgroup.long 0xA70++0x03
hide.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
hgroup.long 0xA74++0x03
hide.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
hgroup.long 0xA78++0x03
hide.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
hgroup.long 0xA7C++0x03
hide.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
hgroup.long 0xA80++0x03
hide.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
hgroup.long 0xA84++0x03
hide.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
hgroup.long 0xA88++0x03
hide.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
hgroup.long 0xA8C++0x03
hide.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
hgroup.long 0xA90++0x03
hide.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
hgroup.long 0xA94++0x03
hide.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
hgroup.long 0xA98++0x03
hide.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
hgroup.long 0xA9C++0x03
hide.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
hgroup.long 0xAA0++0x03
hide.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
hgroup.long 0xAA4++0x03
hide.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
hgroup.long 0xAA8++0x03
hide.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
hgroup.long 0xAAC++0x03
hide.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
hgroup.long 0xAB0++0x03
hide.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
hgroup.long 0xAB4++0x03
hide.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
hgroup.long 0xAB8++0x03
hide.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
hgroup.long 0xABC++0x03
hide.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
hgroup.long 0xAC0++0x03
hide.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
hgroup.long 0xAC4++0x03
hide.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
hgroup.long 0xAC8++0x03
hide.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
hgroup.long 0xACC++0x03
hide.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
hgroup.long 0xAD0++0x03
hide.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
hgroup.long 0xAD4++0x03
hide.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
hgroup.long 0xAD8++0x03
hide.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
hgroup.long 0xADC++0x03
hide.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
hgroup.long 0xAE0++0x03
hide.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
hgroup.long 0xAE4++0x03
hide.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
hgroup.long 0xAE8++0x03
hide.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
hgroup.long 0xAEC++0x03
hide.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
hgroup.long 0xAF0++0x03
hide.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
hgroup.long 0xAF4++0x03
hide.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
hgroup.long 0xAF8++0x03
hide.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
hgroup.long 0xAFC++0x03
hide.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
hgroup.long 0xB00++0x03
hide.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
hgroup.long 0xB04++0x03
hide.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
hgroup.long 0xB08++0x03
hide.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
hgroup.long 0xB0C++0x03
hide.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
hgroup.long 0xB10++0x03
hide.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
hgroup.long 0xB14++0x03
hide.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
hgroup.long 0xB18++0x03
hide.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
hgroup.long 0xB1C++0x03
hide.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
hgroup.long 0xB20++0x03
hide.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
hgroup.long 0xB24++0x03
hide.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
hgroup.long 0xB28++0x03
hide.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
hgroup.long 0xB2C++0x03
hide.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
hgroup.long 0xB30++0x03
hide.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
hgroup.long 0xB34++0x03
hide.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
hgroup.long 0xB38++0x03
hide.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
hgroup.long 0xB3C++0x03
hide.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
hgroup.long 0xB40++0x03
hide.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
hgroup.long 0xB44++0x03
hide.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
hgroup.long 0xB48++0x03
hide.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
hgroup.long 0xB4C++0x03
hide.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
hgroup.long 0xB50++0x03
hide.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
hgroup.long 0xB54++0x03
hide.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
hgroup.long 0xB58++0x03
hide.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
hgroup.long 0xB5C++0x03
hide.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
hgroup.long 0xB60++0x03
hide.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
hgroup.long 0xB64++0x03
hide.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
hgroup.long 0xB68++0x03
hide.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
hgroup.long 0xB6C++0x03
hide.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
hgroup.long 0xB70++0x03
hide.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
hgroup.long 0xB74++0x03
hide.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
hgroup.long 0xB78++0x03
hide.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
hgroup.long 0xB7C++0x03
hide.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
hgroup.long 0xB80++0x03
hide.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
hgroup.long 0xB84++0x03
hide.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
hgroup.long 0xB88++0x03
hide.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
hgroup.long 0xB8C++0x03
hide.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
hgroup.long 0xB90++0x03
hide.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
hgroup.long 0xB94++0x03
hide.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
hgroup.long 0xB98++0x03
hide.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
hgroup.long 0xB9C++0x03
hide.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
hgroup.long 0xBA0++0x03
hide.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
hgroup.long 0xBA4++0x03
hide.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
hgroup.long 0xBA8++0x03
hide.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
hgroup.long 0xBAC++0x03
hide.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
hgroup.long 0xBB0++0x03
hide.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
hgroup.long 0xBB4++0x03
hide.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
hgroup.long 0xBB8++0x03
hide.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
hgroup.long 0xBBC++0x03
hide.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
hgroup.long 0xBC0++0x03
hide.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
hgroup.long 0xBC4++0x03
hide.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
hgroup.long 0xBC8++0x03
hide.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
hgroup.long 0xBCC++0x03
hide.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
hgroup.long 0xBD0++0x03
hide.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
hgroup.long 0xBD4++0x03
hide.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
hgroup.long 0xBD8++0x03
hide.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
hgroup.long 0xBDC++0x03
hide.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
endif
tree.end
width 14.
tree "Configuration Registers"
rgroup.long 0xC00++0x03
line.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SGI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SGI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SGI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SGI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SGI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SGI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SGI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SGI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SGI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SGI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SGI)" "Level,Edge"
group.long 0xC04++0x03
line.long 0x00 "GICD_ICFGR1,Interrupt Configuration Register"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (PPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (PPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (PPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (PPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (PPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (PPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (PPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (PPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (PPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (PPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (PPI)" "Level,Edge"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1)
group.long 0xC08++0x03
line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC0C++0x03
line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC08++0x03
hide.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
hgroup.long 0xC0C++0x03
hide.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x2)
group.long 0xC10++0x03
line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC14++0x03
line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC10++0x03
hide.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
hgroup.long 0xC14++0x03
hide.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x3)
group.long 0xC18++0x03
line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC1C++0x03
line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC18++0x03
hide.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
hgroup.long 0xC1C++0x03
hide.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x4)
group.long 0xC20++0x03
line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC24++0x03
line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC20++0x03
hide.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
hgroup.long 0xC24++0x03
hide.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x5)
group.long 0xC28++0x03
line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC2C++0x03
line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC28++0x03
hide.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
hgroup.long 0xC2C++0x03
hide.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x6)
group.long 0xC30++0x03
line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC34++0x03
line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC30++0x03
hide.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
hgroup.long 0xC34++0x03
hide.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x7)
group.long 0xC38++0x03
line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC3C++0x03
line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC38++0x03
hide.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
hgroup.long 0xC3C++0x03
hide.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x8)
group.long 0xC40++0x03
line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC44++0x03
line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC40++0x03
hide.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
hgroup.long 0xC44++0x03
hide.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x9)
group.long 0xC48++0x03
line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC4C++0x03
line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC48++0x03
hide.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
hgroup.long 0xC4C++0x03
hide.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xA)
group.long 0xC50++0x03
line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC54++0x03
line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC50++0x03
hide.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
hgroup.long 0xC54++0x03
hide.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xB)
group.long 0xC58++0x03
line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC5C++0x03
line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC58++0x03
hide.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
hgroup.long 0xC5C++0x03
hide.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xC)
group.long 0xC60++0x03
line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC64++0x03
line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC60++0x03
hide.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
hgroup.long 0xC64++0x03
hide.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xD)
group.long 0xC68++0x03
line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC6C++0x03
line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC68++0x03
hide.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
hgroup.long 0xC6C++0x03
hide.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xE)
group.long 0xC70++0x03
line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC74++0x03
line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC70++0x03
hide.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
hgroup.long 0xC74++0x03
hide.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xF)
group.long 0xC78++0x03
line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC7C++0x03
line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC78++0x03
hide.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
hgroup.long 0xC7C++0x03
hide.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0xC80++0x03
line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC84++0x03
line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC80++0x03
hide.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
hgroup.long 0xC84++0x03
hide.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0xC88++0x03
line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC8C++0x03
line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC88++0x03
hide.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
hgroup.long 0xC8C++0x03
hide.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0xC90++0x03
line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC94++0x03
line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC90++0x03
hide.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
hgroup.long 0xC94++0x03
hide.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0xC98++0x03
line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC9C++0x03
line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC98++0x03
hide.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
hgroup.long 0xC9C++0x03
hide.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0xCA0++0x03
line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCA4++0x03
line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCA0++0x03
hide.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
hgroup.long 0xCA4++0x03
hide.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0xCA8++0x03
line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCAC++0x03
line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCA8++0x03
hide.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
hgroup.long 0xCAC++0x03
hide.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0xCB0++0x03
line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCB4++0x03
line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCB0++0x03
hide.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
hgroup.long 0xCB4++0x03
hide.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0xCB8++0x03
line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCBC++0x03
line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCB8++0x03
hide.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
hgroup.long 0xCBC++0x03
hide.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0xCC0++0x03
line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCC4++0x03
line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCC0++0x03
hide.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
hgroup.long 0xCC4++0x03
hide.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0xCC8++0x03
line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCCC++0x03
line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCC8++0x03
hide.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
hgroup.long 0xCCC++0x03
hide.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0xCD0++0x03
line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCD4++0x03
line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCD0++0x03
hide.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
hgroup.long 0xCD4++0x03
hide.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0xCD8++0x03
line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCDC++0x03
line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCD8++0x03
hide.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
hgroup.long 0xCDC++0x03
hide.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0xCE0++0x03
line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCE4++0x03
line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCE0++0x03
hide.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
hgroup.long 0xCE4++0x03
hide.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0xCE8++0x03
line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCEC++0x03
line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCE8++0x03
hide.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
hgroup.long 0xCEC++0x03
hide.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0xCF0++0x03
line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCF4++0x03
line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCF0++0x03
hide.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
hgroup.long 0xCF4++0x03
hide.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
endif
tree.end
width 17.
tree "Interrupt Group Modifier Registers"
hgroup.long 0x0D00++0x03
hide.long 0x0 "GICD_IGRPMODR0,Interrupt Group Modifier Register 0"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D00))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01))
group.long 0x0D04++0x03
line.long 0x0 "GICD_IGRPMODR1,Interrupt Group Modifier Register 1"
bitfld.long 0x00 31. " GMB63  ,Group Modifier Bit 63" "0,1"
bitfld.long 0x00 30. "  GMB62  ,Group Modifier Bit 62" "0,1"
bitfld.long 0x00 29. "  GMB61  ,Group Modifier Bit 61" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB60  ,Group Modifier Bit 60" "0,1"
bitfld.long 0x00 27. "  GMB59  ,Group Modifier Bit 59" "0,1"
bitfld.long 0x00 26. "  GMB58  ,Group Modifier Bit 58" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB57  ,Group Modifier Bit 57" "0,1"
bitfld.long 0x00 24. "  GMB56  ,Group Modifier Bit 56" "0,1"
bitfld.long 0x00 23. "  GMB55  ,Group Modifier Bit 55" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB54  ,Group Modifier Bit 54" "0,1"
bitfld.long 0x00 21. "  GMB53  ,Group Modifier Bit 53" "0,1"
bitfld.long 0x00 20. "  GMB52  ,Group Modifier Bit 52" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB51  ,Group Modifier Bit 51" "0,1"
bitfld.long 0x00 18. "  GMB50  ,Group Modifier Bit 50" "0,1"
bitfld.long 0x00 17. "  GMB49  ,Group Modifier Bit 49" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB48  ,Group Modifier Bit 48" "0,1"
bitfld.long 0x00 15. "  GMB47  ,Group Modifier Bit 47" "0,1"
bitfld.long 0x00 14. "  GMB46  ,Group Modifier Bit 46" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB45  ,Group Modifier Bit 45" "0,1"
bitfld.long 0x00 12. "  GMB44  ,Group Modifier Bit 44" "0,1"
bitfld.long 0x00 11. "  GMB43  ,Group Modifier Bit 43" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB42  ,Group Modifier Bit 42" "0,1"
bitfld.long 0x00 9. "  GMB41  ,Group Modifier Bit 41" "0,1"
bitfld.long 0x00 8. "  GMB40  ,Group Modifier Bit 40" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB39  ,Group Modifier Bit 39" "0,1"
bitfld.long 0x00 6. "  GMB38  ,Group Modifier Bit 38" "0,1"
bitfld.long 0x00 5. "  GMB37  ,Group Modifier Bit 37" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB36  ,Group Modifier Bit 36" "0,1"
bitfld.long 0x00 3. "  GMB35  ,Group Modifier Bit 35" "0,1"
bitfld.long 0x00 2. "  GMB34  ,Group Modifier Bit 34" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB33  ,Group Modifier Bit 33" "0,1"
bitfld.long 0x00 0. "  GMB32  ,Group Modifier Bit 32" "0,1"
else
hgroup.long 0x0D04++0x03
hide.long 0x0 "GICD_IGRPMODR1,Interrupt Group Modifier Register 1"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D08))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02))
group.long 0x0D08++0x03
line.long 0x0 "GICD_IGRPMODR2,Interrupt Group Modifier Register 2"
bitfld.long 0x00 31. " GMB95  ,Group Modifier Bit 95" "0,1"
bitfld.long 0x00 30. "  GMB94  ,Group Modifier Bit 94" "0,1"
bitfld.long 0x00 29. "  GMB93  ,Group Modifier Bit 93" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB92  ,Group Modifier Bit 92" "0,1"
bitfld.long 0x00 27. "  GMB91  ,Group Modifier Bit 91" "0,1"
bitfld.long 0x00 26. "  GMB90  ,Group Modifier Bit 90" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB89  ,Group Modifier Bit 89" "0,1"
bitfld.long 0x00 24. "  GMB88  ,Group Modifier Bit 88" "0,1"
bitfld.long 0x00 23. "  GMB87  ,Group Modifier Bit 87" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB86  ,Group Modifier Bit 86" "0,1"
bitfld.long 0x00 21. "  GMB85  ,Group Modifier Bit 85" "0,1"
bitfld.long 0x00 20. "  GMB84  ,Group Modifier Bit 84" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB83  ,Group Modifier Bit 83" "0,1"
bitfld.long 0x00 18. "  GMB82  ,Group Modifier Bit 82" "0,1"
bitfld.long 0x00 17. "  GMB81  ,Group Modifier Bit 81" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB80  ,Group Modifier Bit 80" "0,1"
bitfld.long 0x00 15. "  GMB79  ,Group Modifier Bit 79" "0,1"
bitfld.long 0x00 14. "  GMB78  ,Group Modifier Bit 78" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB77  ,Group Modifier Bit 77" "0,1"
bitfld.long 0x00 12. "  GMB76  ,Group Modifier Bit 76" "0,1"
bitfld.long 0x00 11. "  GMB75  ,Group Modifier Bit 75" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB74  ,Group Modifier Bit 74" "0,1"
bitfld.long 0x00 9. "  GMB73  ,Group Modifier Bit 73" "0,1"
bitfld.long 0x00 8. "  GMB72  ,Group Modifier Bit 72" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB71  ,Group Modifier Bit 71" "0,1"
bitfld.long 0x00 6. "  GMB70  ,Group Modifier Bit 70" "0,1"
bitfld.long 0x00 5. "  GMB69  ,Group Modifier Bit 69" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB68  ,Group Modifier Bit 68" "0,1"
bitfld.long 0x00 3. "  GMB67  ,Group Modifier Bit 67" "0,1"
bitfld.long 0x00 2. "  GMB66  ,Group Modifier Bit 66" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB65  ,Group Modifier Bit 65" "0,1"
bitfld.long 0x00 0. "  GMB64  ,Group Modifier Bit 64" "0,1"
else
hgroup.long 0x0D08++0x03
hide.long 0x0 "GICD_IGRPMODR2,Interrupt Group Modifier Register 2"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D0C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03))
group.long 0x0D0C++0x03
line.long 0x0 "GICD_IGRPMODR3,Interrupt Group Modifier Register 3"
bitfld.long 0x00 31. " GMB127 ,Group Modifier Bit 127" "0,1"
bitfld.long 0x00 30. "  GMB126 ,Group Modifier Bit 126" "0,1"
bitfld.long 0x00 29. "  GMB125 ,Group Modifier Bit 125" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB124 ,Group Modifier Bit 124" "0,1"
bitfld.long 0x00 27. "  GMB123 ,Group Modifier Bit 123" "0,1"
bitfld.long 0x00 26. "  GMB122 ,Group Modifier Bit 122" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB121 ,Group Modifier Bit 121" "0,1"
bitfld.long 0x00 24. "  GMB120 ,Group Modifier Bit 120" "0,1"
bitfld.long 0x00 23. "  GMB119 ,Group Modifier Bit 119" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB118 ,Group Modifier Bit 118" "0,1"
bitfld.long 0x00 21. "  GMB117 ,Group Modifier Bit 117" "0,1"
bitfld.long 0x00 20. "  GMB116 ,Group Modifier Bit 116" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB115 ,Group Modifier Bit 115" "0,1"
bitfld.long 0x00 18. "  GMB114 ,Group Modifier Bit 114" "0,1"
bitfld.long 0x00 17. "  GMB113 ,Group Modifier Bit 113" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB112 ,Group Modifier Bit 112" "0,1"
bitfld.long 0x00 15. "  GMB111 ,Group Modifier Bit 111" "0,1"
bitfld.long 0x00 14. "  GMB110 ,Group Modifier Bit 110" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB109 ,Group Modifier Bit 109" "0,1"
bitfld.long 0x00 12. "  GMB108 ,Group Modifier Bit 108" "0,1"
bitfld.long 0x00 11. "  GMB107 ,Group Modifier Bit 107" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB106 ,Group Modifier Bit 106" "0,1"
bitfld.long 0x00 9. "  GMB105 ,Group Modifier Bit 105" "0,1"
bitfld.long 0x00 8. "  GMB104 ,Group Modifier Bit 104" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB103 ,Group Modifier Bit 103" "0,1"
bitfld.long 0x00 6. "  GMB102 ,Group Modifier Bit 102" "0,1"
bitfld.long 0x00 5. "  GMB101 ,Group Modifier Bit 101" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB100 ,Group Modifier Bit 100" "0,1"
bitfld.long 0x00 3. "  GMB99  ,Group Modifier Bit 99" "0,1"
bitfld.long 0x00 2. "  GMB98  ,Group Modifier Bit 98" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB97  ,Group Modifier Bit 97" "0,1"
bitfld.long 0x00 0. "  GMB96  ,Group Modifier Bit 96" "0,1"
else
hgroup.long 0x0D0C++0x03
hide.long 0x0 "GICD_IGRPMODR3,Interrupt Group Modifier Register 3"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D10))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04))
group.long 0x0D10++0x03
line.long 0x0 "GICD_IGRPMODR4,Interrupt Group Modifier Register 4"
bitfld.long 0x00 31. " GMB159 ,Group Modifier Bit 159" "0,1"
bitfld.long 0x00 30. "  GMB158 ,Group Modifier Bit 158" "0,1"
bitfld.long 0x00 29. "  GMB157 ,Group Modifier Bit 157" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB156 ,Group Modifier Bit 156" "0,1"
bitfld.long 0x00 27. "  GMB155 ,Group Modifier Bit 155" "0,1"
bitfld.long 0x00 26. "  GMB154 ,Group Modifier Bit 154" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB153 ,Group Modifier Bit 153" "0,1"
bitfld.long 0x00 24. "  GMB152 ,Group Modifier Bit 152" "0,1"
bitfld.long 0x00 23. "  GMB151 ,Group Modifier Bit 151" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB150 ,Group Modifier Bit 150" "0,1"
bitfld.long 0x00 21. "  GMB149 ,Group Modifier Bit 149" "0,1"
bitfld.long 0x00 20. "  GMB148 ,Group Modifier Bit 148" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB147 ,Group Modifier Bit 147" "0,1"
bitfld.long 0x00 18. "  GMB146 ,Group Modifier Bit 146" "0,1"
bitfld.long 0x00 17. "  GMB145 ,Group Modifier Bit 145" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB144 ,Group Modifier Bit 144" "0,1"
bitfld.long 0x00 15. "  GMB143 ,Group Modifier Bit 143" "0,1"
bitfld.long 0x00 14. "  GMB142 ,Group Modifier Bit 142" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB141 ,Group Modifier Bit 141" "0,1"
bitfld.long 0x00 12. "  GMB140 ,Group Modifier Bit 140" "0,1"
bitfld.long 0x00 11. "  GMB139 ,Group Modifier Bit 139" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB138 ,Group Modifier Bit 138" "0,1"
bitfld.long 0x00 9. "  GMB137 ,Group Modifier Bit 137" "0,1"
bitfld.long 0x00 8. "  GMB136 ,Group Modifier Bit 136" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB135 ,Group Modifier Bit 135" "0,1"
bitfld.long 0x00 6. "  GMB134 ,Group Modifier Bit 134" "0,1"
bitfld.long 0x00 5. "  GMB133 ,Group Modifier Bit 133" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB132 ,Group Modifier Bit 132" "0,1"
bitfld.long 0x00 3. "  GMB131 ,Group Modifier Bit 131" "0,1"
bitfld.long 0x00 2. "  GMB130 ,Group Modifier Bit 130" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB129 ,Group Modifier Bit 129" "0,1"
bitfld.long 0x00 0. "  GMB128 ,Group Modifier Bit 128" "0,1"
else
hgroup.long 0x0D10++0x03
hide.long 0x0 "GICD_IGRPMODR4,Interrupt Group Modifier Register 4"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D14))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05))
group.long 0x0D14++0x03
line.long 0x0 "GICD_IGRPMODR5,Interrupt Group Modifier Register 5"
bitfld.long 0x00 31. " GMB191 ,Group Modifier Bit 191" "0,1"
bitfld.long 0x00 30. "  GMB190 ,Group Modifier Bit 190" "0,1"
bitfld.long 0x00 29. "  GMB189 ,Group Modifier Bit 189" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB188 ,Group Modifier Bit 188" "0,1"
bitfld.long 0x00 27. "  GMB187 ,Group Modifier Bit 187" "0,1"
bitfld.long 0x00 26. "  GMB186 ,Group Modifier Bit 186" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB185 ,Group Modifier Bit 185" "0,1"
bitfld.long 0x00 24. "  GMB184 ,Group Modifier Bit 184" "0,1"
bitfld.long 0x00 23. "  GMB183 ,Group Modifier Bit 183" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB182 ,Group Modifier Bit 182" "0,1"
bitfld.long 0x00 21. "  GMB181 ,Group Modifier Bit 181" "0,1"
bitfld.long 0x00 20. "  GMB180 ,Group Modifier Bit 180" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB179 ,Group Modifier Bit 179" "0,1"
bitfld.long 0x00 18. "  GMB178 ,Group Modifier Bit 178" "0,1"
bitfld.long 0x00 17. "  GMB177 ,Group Modifier Bit 177" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB176 ,Group Modifier Bit 176" "0,1"
bitfld.long 0x00 15. "  GMB175 ,Group Modifier Bit 175" "0,1"
bitfld.long 0x00 14. "  GMB174 ,Group Modifier Bit 174" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB173 ,Group Modifier Bit 173" "0,1"
bitfld.long 0x00 12. "  GMB172 ,Group Modifier Bit 172" "0,1"
bitfld.long 0x00 11. "  GMB171 ,Group Modifier Bit 171" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB170 ,Group Modifier Bit 170" "0,1"
bitfld.long 0x00 9. "  GMB169 ,Group Modifier Bit 169" "0,1"
bitfld.long 0x00 8. "  GMB168 ,Group Modifier Bit 168" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB167 ,Group Modifier Bit 167" "0,1"
bitfld.long 0x00 6. "  GMB166 ,Group Modifier Bit 166" "0,1"
bitfld.long 0x00 5. "  GMB165 ,Group Modifier Bit 165" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB164 ,Group Modifier Bit 164" "0,1"
bitfld.long 0x00 3. "  GMB163 ,Group Modifier Bit 163" "0,1"
bitfld.long 0x00 2. "  GMB162 ,Group Modifier Bit 162" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB161 ,Group Modifier Bit 161" "0,1"
bitfld.long 0x00 0. "  GMB160 ,Group Modifier Bit 160" "0,1"
else
hgroup.long 0x0D14++0x03
hide.long 0x0 "GICD_IGRPMODR5,Interrupt Group Modifier Register 5"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D18))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06))
group.long 0x0D18++0x03
line.long 0x0 "GICD_IGRPMODR6,Interrupt Group Modifier Register 6"
bitfld.long 0x00 31. " GMB223 ,Group Modifier Bit 223" "0,1"
bitfld.long 0x00 30. "  GMB222 ,Group Modifier Bit 222" "0,1"
bitfld.long 0x00 29. "  GMB221 ,Group Modifier Bit 221" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB220 ,Group Modifier Bit 220" "0,1"
bitfld.long 0x00 27. "  GMB219 ,Group Modifier Bit 219" "0,1"
bitfld.long 0x00 26. "  GMB218 ,Group Modifier Bit 218" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB217 ,Group Modifier Bit 217" "0,1"
bitfld.long 0x00 24. "  GMB216 ,Group Modifier Bit 216" "0,1"
bitfld.long 0x00 23. "  GMB215 ,Group Modifier Bit 215" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB214 ,Group Modifier Bit 214" "0,1"
bitfld.long 0x00 21. "  GMB213 ,Group Modifier Bit 213" "0,1"
bitfld.long 0x00 20. "  GMB212 ,Group Modifier Bit 212" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB211 ,Group Modifier Bit 211" "0,1"
bitfld.long 0x00 18. "  GMB210 ,Group Modifier Bit 210" "0,1"
bitfld.long 0x00 17. "  GMB209 ,Group Modifier Bit 209" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB208 ,Group Modifier Bit 208" "0,1"
bitfld.long 0x00 15. "  GMB207 ,Group Modifier Bit 207" "0,1"
bitfld.long 0x00 14. "  GMB206 ,Group Modifier Bit 206" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB205 ,Group Modifier Bit 205" "0,1"
bitfld.long 0x00 12. "  GMB204 ,Group Modifier Bit 204" "0,1"
bitfld.long 0x00 11. "  GMB203 ,Group Modifier Bit 203" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB202 ,Group Modifier Bit 202" "0,1"
bitfld.long 0x00 9. "  GMB201 ,Group Modifier Bit 201" "0,1"
bitfld.long 0x00 8. "  GMB200 ,Group Modifier Bit 200" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB199 ,Group Modifier Bit 199" "0,1"
bitfld.long 0x00 6. "  GMB198 ,Group Modifier Bit 198" "0,1"
bitfld.long 0x00 5. "  GMB197 ,Group Modifier Bit 197" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB196 ,Group Modifier Bit 196" "0,1"
bitfld.long 0x00 3. "  GMB195 ,Group Modifier Bit 195" "0,1"
bitfld.long 0x00 2. "  GMB194 ,Group Modifier Bit 194" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB193 ,Group Modifier Bit 193" "0,1"
bitfld.long 0x00 0. "  GMB192 ,Group Modifier Bit 192" "0,1"
else
hgroup.long 0x0D18++0x03
hide.long 0x0 "GICD_IGRPMODR6,Interrupt Group Modifier Register 6"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D1C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07))
group.long 0x0D1C++0x03
line.long 0x0 "GICD_IGRPMODR7,Interrupt Group Modifier Register 7"
bitfld.long 0x00 31. " GMB255 ,Group Modifier Bit 255" "0,1"
bitfld.long 0x00 30. "  GMB254 ,Group Modifier Bit 254" "0,1"
bitfld.long 0x00 29. "  GMB253 ,Group Modifier Bit 253" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB252 ,Group Modifier Bit 252" "0,1"
bitfld.long 0x00 27. "  GMB251 ,Group Modifier Bit 251" "0,1"
bitfld.long 0x00 26. "  GMB250 ,Group Modifier Bit 250" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB249 ,Group Modifier Bit 249" "0,1"
bitfld.long 0x00 24. "  GMB248 ,Group Modifier Bit 248" "0,1"
bitfld.long 0x00 23. "  GMB247 ,Group Modifier Bit 247" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB246 ,Group Modifier Bit 246" "0,1"
bitfld.long 0x00 21. "  GMB245 ,Group Modifier Bit 245" "0,1"
bitfld.long 0x00 20. "  GMB244 ,Group Modifier Bit 244" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB243 ,Group Modifier Bit 243" "0,1"
bitfld.long 0x00 18. "  GMB242 ,Group Modifier Bit 242" "0,1"
bitfld.long 0x00 17. "  GMB241 ,Group Modifier Bit 241" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB240 ,Group Modifier Bit 240" "0,1"
bitfld.long 0x00 15. "  GMB239 ,Group Modifier Bit 239" "0,1"
bitfld.long 0x00 14. "  GMB238 ,Group Modifier Bit 238" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB237 ,Group Modifier Bit 237" "0,1"
bitfld.long 0x00 12. "  GMB236 ,Group Modifier Bit 236" "0,1"
bitfld.long 0x00 11. "  GMB235 ,Group Modifier Bit 235" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB234 ,Group Modifier Bit 234" "0,1"
bitfld.long 0x00 9. "  GMB233 ,Group Modifier Bit 233" "0,1"
bitfld.long 0x00 8. "  GMB232 ,Group Modifier Bit 232" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB231 ,Group Modifier Bit 231" "0,1"
bitfld.long 0x00 6. "  GMB230 ,Group Modifier Bit 230" "0,1"
bitfld.long 0x00 5. "  GMB229 ,Group Modifier Bit 229" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB228 ,Group Modifier Bit 228" "0,1"
bitfld.long 0x00 3. "  GMB227 ,Group Modifier Bit 227" "0,1"
bitfld.long 0x00 2. "  GMB226 ,Group Modifier Bit 226" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB225 ,Group Modifier Bit 225" "0,1"
bitfld.long 0x00 0. "  GMB224 ,Group Modifier Bit 224" "0,1"
else
hgroup.long 0x0D1C++0x03
hide.long 0x0 "GICD_IGRPMODR7,Interrupt Group Modifier Register 7"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D20))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08))
group.long 0x0D20++0x03
line.long 0x0 "GICD_IGRPMODR8,Interrupt Group Modifier Register 8"
bitfld.long 0x00 31. " GMB287 ,Group Modifier Bit 287" "0,1"
bitfld.long 0x00 30. "  GMB286 ,Group Modifier Bit 286" "0,1"
bitfld.long 0x00 29. "  GMB285 ,Group Modifier Bit 285" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB284 ,Group Modifier Bit 284" "0,1"
bitfld.long 0x00 27. "  GMB283 ,Group Modifier Bit 283" "0,1"
bitfld.long 0x00 26. "  GMB282 ,Group Modifier Bit 282" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB281 ,Group Modifier Bit 281" "0,1"
bitfld.long 0x00 24. "  GMB280 ,Group Modifier Bit 280" "0,1"
bitfld.long 0x00 23. "  GMB279 ,Group Modifier Bit 279" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB278 ,Group Modifier Bit 278" "0,1"
bitfld.long 0x00 21. "  GMB277 ,Group Modifier Bit 277" "0,1"
bitfld.long 0x00 20. "  GMB276 ,Group Modifier Bit 276" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB275 ,Group Modifier Bit 275" "0,1"
bitfld.long 0x00 18. "  GMB274 ,Group Modifier Bit 274" "0,1"
bitfld.long 0x00 17. "  GMB273 ,Group Modifier Bit 273" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB272 ,Group Modifier Bit 272" "0,1"
bitfld.long 0x00 15. "  GMB271 ,Group Modifier Bit 271" "0,1"
bitfld.long 0x00 14. "  GMB270 ,Group Modifier Bit 270" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB269 ,Group Modifier Bit 269" "0,1"
bitfld.long 0x00 12. "  GMB268 ,Group Modifier Bit 268" "0,1"
bitfld.long 0x00 11. "  GMB267 ,Group Modifier Bit 267" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB266 ,Group Modifier Bit 266" "0,1"
bitfld.long 0x00 9. "  GMB265 ,Group Modifier Bit 265" "0,1"
bitfld.long 0x00 8. "  GMB264 ,Group Modifier Bit 264" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB263 ,Group Modifier Bit 263" "0,1"
bitfld.long 0x00 6. "  GMB262 ,Group Modifier Bit 262" "0,1"
bitfld.long 0x00 5. "  GMB261 ,Group Modifier Bit 261" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB260 ,Group Modifier Bit 260" "0,1"
bitfld.long 0x00 3. "  GMB259 ,Group Modifier Bit 259" "0,1"
bitfld.long 0x00 2. "  GMB258 ,Group Modifier Bit 258" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB257 ,Group Modifier Bit 257" "0,1"
bitfld.long 0x00 0. "  GMB256 ,Group Modifier Bit 256" "0,1"
else
hgroup.long 0x0D20++0x03
hide.long 0x0 "GICD_IGRPMODR8,Interrupt Group Modifier Register 8"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D24))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09))
group.long 0x0D24++0x03
line.long 0x0 "GICD_IGRPMODR9,Interrupt Group Modifier Register 9"
bitfld.long 0x00 31. " GMB319 ,Group Modifier Bit 319" "0,1"
bitfld.long 0x00 30. "  GMB318 ,Group Modifier Bit 318" "0,1"
bitfld.long 0x00 29. "  GMB317 ,Group Modifier Bit 317" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB316 ,Group Modifier Bit 316" "0,1"
bitfld.long 0x00 27. "  GMB315 ,Group Modifier Bit 315" "0,1"
bitfld.long 0x00 26. "  GMB314 ,Group Modifier Bit 314" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB313 ,Group Modifier Bit 313" "0,1"
bitfld.long 0x00 24. "  GMB312 ,Group Modifier Bit 312" "0,1"
bitfld.long 0x00 23. "  GMB311 ,Group Modifier Bit 311" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB310 ,Group Modifier Bit 310" "0,1"
bitfld.long 0x00 21. "  GMB309 ,Group Modifier Bit 309" "0,1"
bitfld.long 0x00 20. "  GMB308 ,Group Modifier Bit 308" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB307 ,Group Modifier Bit 307" "0,1"
bitfld.long 0x00 18. "  GMB306 ,Group Modifier Bit 306" "0,1"
bitfld.long 0x00 17. "  GMB305 ,Group Modifier Bit 305" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB304 ,Group Modifier Bit 304" "0,1"
bitfld.long 0x00 15. "  GMB303 ,Group Modifier Bit 303" "0,1"
bitfld.long 0x00 14. "  GMB302 ,Group Modifier Bit 302" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB301 ,Group Modifier Bit 301" "0,1"
bitfld.long 0x00 12. "  GMB300 ,Group Modifier Bit 300" "0,1"
bitfld.long 0x00 11. "  GMB299 ,Group Modifier Bit 299" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB298 ,Group Modifier Bit 298" "0,1"
bitfld.long 0x00 9. "  GMB297 ,Group Modifier Bit 297" "0,1"
bitfld.long 0x00 8. "  GMB296 ,Group Modifier Bit 296" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB295 ,Group Modifier Bit 295" "0,1"
bitfld.long 0x00 6. "  GMB294 ,Group Modifier Bit 294" "0,1"
bitfld.long 0x00 5. "  GMB293 ,Group Modifier Bit 293" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB292 ,Group Modifier Bit 292" "0,1"
bitfld.long 0x00 3. "  GMB291 ,Group Modifier Bit 291" "0,1"
bitfld.long 0x00 2. "  GMB290 ,Group Modifier Bit 290" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB289 ,Group Modifier Bit 289" "0,1"
bitfld.long 0x00 0. "  GMB288 ,Group Modifier Bit 288" "0,1"
else
hgroup.long 0x0D24++0x03
hide.long 0x0 "GICD_IGRPMODR9,Interrupt Group Modifier Register 9"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D28))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A))
group.long 0x0D28++0x03
line.long 0x0 "GICD_IGRPMODR10,Interrupt Group Modifier Register 10"
bitfld.long 0x00 31. " GMB351 ,Group Modifier Bit 351" "0,1"
bitfld.long 0x00 30. "  GMB350 ,Group Modifier Bit 350" "0,1"
bitfld.long 0x00 29. "  GMB349 ,Group Modifier Bit 349" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB348 ,Group Modifier Bit 348" "0,1"
bitfld.long 0x00 27. "  GMB347 ,Group Modifier Bit 347" "0,1"
bitfld.long 0x00 26. "  GMB346 ,Group Modifier Bit 346" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB345 ,Group Modifier Bit 345" "0,1"
bitfld.long 0x00 24. "  GMB344 ,Group Modifier Bit 344" "0,1"
bitfld.long 0x00 23. "  GMB343 ,Group Modifier Bit 343" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB342 ,Group Modifier Bit 342" "0,1"
bitfld.long 0x00 21. "  GMB341 ,Group Modifier Bit 341" "0,1"
bitfld.long 0x00 20. "  GMB340 ,Group Modifier Bit 340" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB339 ,Group Modifier Bit 339" "0,1"
bitfld.long 0x00 18. "  GMB338 ,Group Modifier Bit 338" "0,1"
bitfld.long 0x00 17. "  GMB337 ,Group Modifier Bit 337" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB336 ,Group Modifier Bit 336" "0,1"
bitfld.long 0x00 15. "  GMB335 ,Group Modifier Bit 335" "0,1"
bitfld.long 0x00 14. "  GMB334 ,Group Modifier Bit 334" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB333 ,Group Modifier Bit 333" "0,1"
bitfld.long 0x00 12. "  GMB332 ,Group Modifier Bit 332" "0,1"
bitfld.long 0x00 11. "  GMB331 ,Group Modifier Bit 331" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB330 ,Group Modifier Bit 330" "0,1"
bitfld.long 0x00 9. "  GMB329 ,Group Modifier Bit 329" "0,1"
bitfld.long 0x00 8. "  GMB328 ,Group Modifier Bit 328" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB327 ,Group Modifier Bit 327" "0,1"
bitfld.long 0x00 6. "  GMB326 ,Group Modifier Bit 326" "0,1"
bitfld.long 0x00 5. "  GMB325 ,Group Modifier Bit 325" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB324 ,Group Modifier Bit 324" "0,1"
bitfld.long 0x00 3. "  GMB323 ,Group Modifier Bit 323" "0,1"
bitfld.long 0x00 2. "  GMB322 ,Group Modifier Bit 322" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB321 ,Group Modifier Bit 321" "0,1"
bitfld.long 0x00 0. "  GMB320 ,Group Modifier Bit 320" "0,1"
else
hgroup.long 0x0D28++0x03
hide.long 0x0 "GICD_IGRPMODR10,Interrupt Group Modifier Register 10"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D2C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B))
group.long 0x0D2C++0x03
line.long 0x0 "GICD_IGRPMODR11,Interrupt Group Modifier Register 11"
bitfld.long 0x00 31. " GMB383 ,Group Modifier Bit 383" "0,1"
bitfld.long 0x00 30. "  GMB382 ,Group Modifier Bit 382" "0,1"
bitfld.long 0x00 29. "  GMB381 ,Group Modifier Bit 381" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB380 ,Group Modifier Bit 380" "0,1"
bitfld.long 0x00 27. "  GMB379 ,Group Modifier Bit 379" "0,1"
bitfld.long 0x00 26. "  GMB378 ,Group Modifier Bit 378" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB377 ,Group Modifier Bit 377" "0,1"
bitfld.long 0x00 24. "  GMB376 ,Group Modifier Bit 376" "0,1"
bitfld.long 0x00 23. "  GMB375 ,Group Modifier Bit 375" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB374 ,Group Modifier Bit 374" "0,1"
bitfld.long 0x00 21. "  GMB373 ,Group Modifier Bit 373" "0,1"
bitfld.long 0x00 20. "  GMB372 ,Group Modifier Bit 372" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB371 ,Group Modifier Bit 371" "0,1"
bitfld.long 0x00 18. "  GMB370 ,Group Modifier Bit 370" "0,1"
bitfld.long 0x00 17. "  GMB369 ,Group Modifier Bit 369" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB368 ,Group Modifier Bit 368" "0,1"
bitfld.long 0x00 15. "  GMB367 ,Group Modifier Bit 367" "0,1"
bitfld.long 0x00 14. "  GMB366 ,Group Modifier Bit 366" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB365 ,Group Modifier Bit 365" "0,1"
bitfld.long 0x00 12. "  GMB364 ,Group Modifier Bit 364" "0,1"
bitfld.long 0x00 11. "  GMB363 ,Group Modifier Bit 363" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB362 ,Group Modifier Bit 362" "0,1"
bitfld.long 0x00 9. "  GMB361 ,Group Modifier Bit 361" "0,1"
bitfld.long 0x00 8. "  GMB360 ,Group Modifier Bit 360" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB359 ,Group Modifier Bit 359" "0,1"
bitfld.long 0x00 6. "  GMB358 ,Group Modifier Bit 358" "0,1"
bitfld.long 0x00 5. "  GMB357 ,Group Modifier Bit 357" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB356 ,Group Modifier Bit 356" "0,1"
bitfld.long 0x00 3. "  GMB355 ,Group Modifier Bit 355" "0,1"
bitfld.long 0x00 2. "  GMB354 ,Group Modifier Bit 354" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB353 ,Group Modifier Bit 353" "0,1"
bitfld.long 0x00 0. "  GMB352 ,Group Modifier Bit 352" "0,1"
else
hgroup.long 0x0D2C++0x03
hide.long 0x0 "GICD_IGRPMODR11,Interrupt Group Modifier Register 11"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D30))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C))
group.long 0x0D30++0x03
line.long 0x0 "GICD_IGRPMODR12,Interrupt Group Modifier Register 12"
bitfld.long 0x00 31. " GMB415 ,Group Modifier Bit 415" "0,1"
bitfld.long 0x00 30. "  GMB414 ,Group Modifier Bit 414" "0,1"
bitfld.long 0x00 29. "  GMB413 ,Group Modifier Bit 413" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB412 ,Group Modifier Bit 412" "0,1"
bitfld.long 0x00 27. "  GMB411 ,Group Modifier Bit 411" "0,1"
bitfld.long 0x00 26. "  GMB410 ,Group Modifier Bit 410" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB409 ,Group Modifier Bit 409" "0,1"
bitfld.long 0x00 24. "  GMB408 ,Group Modifier Bit 408" "0,1"
bitfld.long 0x00 23. "  GMB407 ,Group Modifier Bit 407" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB406 ,Group Modifier Bit 406" "0,1"
bitfld.long 0x00 21. "  GMB405 ,Group Modifier Bit 405" "0,1"
bitfld.long 0x00 20. "  GMB404 ,Group Modifier Bit 404" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB403 ,Group Modifier Bit 403" "0,1"
bitfld.long 0x00 18. "  GMB402 ,Group Modifier Bit 402" "0,1"
bitfld.long 0x00 17. "  GMB401 ,Group Modifier Bit 401" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB400 ,Group Modifier Bit 400" "0,1"
bitfld.long 0x00 15. "  GMB399 ,Group Modifier Bit 399" "0,1"
bitfld.long 0x00 14. "  GMB398 ,Group Modifier Bit 398" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB397 ,Group Modifier Bit 397" "0,1"
bitfld.long 0x00 12. "  GMB396 ,Group Modifier Bit 396" "0,1"
bitfld.long 0x00 11. "  GMB395 ,Group Modifier Bit 395" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB394 ,Group Modifier Bit 394" "0,1"
bitfld.long 0x00 9. "  GMB393 ,Group Modifier Bit 393" "0,1"
bitfld.long 0x00 8. "  GMB392 ,Group Modifier Bit 392" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB391 ,Group Modifier Bit 391" "0,1"
bitfld.long 0x00 6. "  GMB390 ,Group Modifier Bit 390" "0,1"
bitfld.long 0x00 5. "  GMB389 ,Group Modifier Bit 389" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB388 ,Group Modifier Bit 388" "0,1"
bitfld.long 0x00 3. "  GMB387 ,Group Modifier Bit 387" "0,1"
bitfld.long 0x00 2. "  GMB386 ,Group Modifier Bit 386" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB385 ,Group Modifier Bit 385" "0,1"
bitfld.long 0x00 0. "  GMB384 ,Group Modifier Bit 384" "0,1"
else
hgroup.long 0x0D30++0x03
hide.long 0x0 "GICD_IGRPMODR12,Interrupt Group Modifier Register 12"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D34))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D))
group.long 0x0D34++0x03
line.long 0x0 "GICD_IGRPMODR13,Interrupt Group Modifier Register 13"
bitfld.long 0x00 31. " GMB447 ,Group Modifier Bit 447" "0,1"
bitfld.long 0x00 30. "  GMB446 ,Group Modifier Bit 446" "0,1"
bitfld.long 0x00 29. "  GMB445 ,Group Modifier Bit 445" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB444 ,Group Modifier Bit 444" "0,1"
bitfld.long 0x00 27. "  GMB443 ,Group Modifier Bit 443" "0,1"
bitfld.long 0x00 26. "  GMB442 ,Group Modifier Bit 442" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB441 ,Group Modifier Bit 441" "0,1"
bitfld.long 0x00 24. "  GMB440 ,Group Modifier Bit 440" "0,1"
bitfld.long 0x00 23. "  GMB439 ,Group Modifier Bit 439" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB438 ,Group Modifier Bit 438" "0,1"
bitfld.long 0x00 21. "  GMB437 ,Group Modifier Bit 437" "0,1"
bitfld.long 0x00 20. "  GMB436 ,Group Modifier Bit 436" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB435 ,Group Modifier Bit 435" "0,1"
bitfld.long 0x00 18. "  GMB434 ,Group Modifier Bit 434" "0,1"
bitfld.long 0x00 17. "  GMB433 ,Group Modifier Bit 433" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB432 ,Group Modifier Bit 432" "0,1"
bitfld.long 0x00 15. "  GMB431 ,Group Modifier Bit 431" "0,1"
bitfld.long 0x00 14. "  GMB430 ,Group Modifier Bit 430" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB429 ,Group Modifier Bit 429" "0,1"
bitfld.long 0x00 12. "  GMB428 ,Group Modifier Bit 428" "0,1"
bitfld.long 0x00 11. "  GMB427 ,Group Modifier Bit 427" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB426 ,Group Modifier Bit 426" "0,1"
bitfld.long 0x00 9. "  GMB425 ,Group Modifier Bit 425" "0,1"
bitfld.long 0x00 8. "  GMB424 ,Group Modifier Bit 424" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB423 ,Group Modifier Bit 423" "0,1"
bitfld.long 0x00 6. "  GMB422 ,Group Modifier Bit 422" "0,1"
bitfld.long 0x00 5. "  GMB421 ,Group Modifier Bit 421" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB420 ,Group Modifier Bit 420" "0,1"
bitfld.long 0x00 3. "  GMB419 ,Group Modifier Bit 419" "0,1"
bitfld.long 0x00 2. "  GMB418 ,Group Modifier Bit 418" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB417 ,Group Modifier Bit 417" "0,1"
bitfld.long 0x00 0. "  GMB416 ,Group Modifier Bit 416" "0,1"
else
hgroup.long 0x0D34++0x03
hide.long 0x0 "GICD_IGRPMODR13,Interrupt Group Modifier Register 13"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D38))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E))
group.long 0x0D38++0x03
line.long 0x0 "GICD_IGRPMODR14,Interrupt Group Modifier Register 14"
bitfld.long 0x00 31. " GMB479 ,Group Modifier Bit 479" "0,1"
bitfld.long 0x00 30. "  GMB478 ,Group Modifier Bit 478" "0,1"
bitfld.long 0x00 29. "  GMB477 ,Group Modifier Bit 477" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB476 ,Group Modifier Bit 476" "0,1"
bitfld.long 0x00 27. "  GMB475 ,Group Modifier Bit 475" "0,1"
bitfld.long 0x00 26. "  GMB474 ,Group Modifier Bit 474" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB473 ,Group Modifier Bit 473" "0,1"
bitfld.long 0x00 24. "  GMB472 ,Group Modifier Bit 472" "0,1"
bitfld.long 0x00 23. "  GMB471 ,Group Modifier Bit 471" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB470 ,Group Modifier Bit 470" "0,1"
bitfld.long 0x00 21. "  GMB469 ,Group Modifier Bit 469" "0,1"
bitfld.long 0x00 20. "  GMB468 ,Group Modifier Bit 468" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB467 ,Group Modifier Bit 467" "0,1"
bitfld.long 0x00 18. "  GMB466 ,Group Modifier Bit 466" "0,1"
bitfld.long 0x00 17. "  GMB465 ,Group Modifier Bit 465" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB464 ,Group Modifier Bit 464" "0,1"
bitfld.long 0x00 15. "  GMB463 ,Group Modifier Bit 463" "0,1"
bitfld.long 0x00 14. "  GMB462 ,Group Modifier Bit 462" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB461 ,Group Modifier Bit 461" "0,1"
bitfld.long 0x00 12. "  GMB460 ,Group Modifier Bit 460" "0,1"
bitfld.long 0x00 11. "  GMB459 ,Group Modifier Bit 459" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB458 ,Group Modifier Bit 458" "0,1"
bitfld.long 0x00 9. "  GMB457 ,Group Modifier Bit 457" "0,1"
bitfld.long 0x00 8. "  GMB456 ,Group Modifier Bit 456" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB455 ,Group Modifier Bit 455" "0,1"
bitfld.long 0x00 6. "  GMB454 ,Group Modifier Bit 454" "0,1"
bitfld.long 0x00 5. "  GMB453 ,Group Modifier Bit 453" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB452 ,Group Modifier Bit 452" "0,1"
bitfld.long 0x00 3. "  GMB451 ,Group Modifier Bit 451" "0,1"
bitfld.long 0x00 2. "  GMB450 ,Group Modifier Bit 450" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB449 ,Group Modifier Bit 449" "0,1"
bitfld.long 0x00 0. "  GMB448 ,Group Modifier Bit 448" "0,1"
else
hgroup.long 0x0D38++0x03
hide.long 0x0 "GICD_IGRPMODR14,Interrupt Group Modifier Register 14"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D3C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F))
group.long 0x0D3C++0x03
line.long 0x0 "GICD_IGRPMODR15,Interrupt Group Modifier Register 15"
bitfld.long 0x00 31. " GMB511 ,Group Modifier Bit 511" "0,1"
bitfld.long 0x00 30. "  GMB510 ,Group Modifier Bit 510" "0,1"
bitfld.long 0x00 29. "  GMB509 ,Group Modifier Bit 509" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB508 ,Group Modifier Bit 508" "0,1"
bitfld.long 0x00 27. "  GMB507 ,Group Modifier Bit 507" "0,1"
bitfld.long 0x00 26. "  GMB506 ,Group Modifier Bit 506" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB505 ,Group Modifier Bit 505" "0,1"
bitfld.long 0x00 24. "  GMB504 ,Group Modifier Bit 504" "0,1"
bitfld.long 0x00 23. "  GMB503 ,Group Modifier Bit 503" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB502 ,Group Modifier Bit 502" "0,1"
bitfld.long 0x00 21. "  GMB501 ,Group Modifier Bit 501" "0,1"
bitfld.long 0x00 20. "  GMB500 ,Group Modifier Bit 500" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB499 ,Group Modifier Bit 499" "0,1"
bitfld.long 0x00 18. "  GMB498 ,Group Modifier Bit 498" "0,1"
bitfld.long 0x00 17. "  GMB497 ,Group Modifier Bit 497" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB496 ,Group Modifier Bit 496" "0,1"
bitfld.long 0x00 15. "  GMB495 ,Group Modifier Bit 495" "0,1"
bitfld.long 0x00 14. "  GMB494 ,Group Modifier Bit 494" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB493 ,Group Modifier Bit 493" "0,1"
bitfld.long 0x00 12. "  GMB492 ,Group Modifier Bit 492" "0,1"
bitfld.long 0x00 11. "  GMB491 ,Group Modifier Bit 491" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB490 ,Group Modifier Bit 490" "0,1"
bitfld.long 0x00 9. "  GMB489 ,Group Modifier Bit 489" "0,1"
bitfld.long 0x00 8. "  GMB488 ,Group Modifier Bit 488" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB487 ,Group Modifier Bit 487" "0,1"
bitfld.long 0x00 6. "  GMB486 ,Group Modifier Bit 486" "0,1"
bitfld.long 0x00 5. "  GMB485 ,Group Modifier Bit 485" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB484 ,Group Modifier Bit 484" "0,1"
bitfld.long 0x00 3. "  GMB483 ,Group Modifier Bit 483" "0,1"
bitfld.long 0x00 2. "  GMB482 ,Group Modifier Bit 482" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB481 ,Group Modifier Bit 481" "0,1"
bitfld.long 0x00 0. "  GMB480 ,Group Modifier Bit 480" "0,1"
else
hgroup.long 0x0D3C++0x03
hide.long 0x0 "GICD_IGRPMODR15,Interrupt Group Modifier Register 15"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D40))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10))
group.long 0x0D40++0x03
line.long 0x0 "GICD_IGRPMODR16,Interrupt Group Modifier Register 16"
bitfld.long 0x00 31. " GMB543 ,Group Modifier Bit 543" "0,1"
bitfld.long 0x00 30. "  GMB542 ,Group Modifier Bit 542" "0,1"
bitfld.long 0x00 29. "  GMB541 ,Group Modifier Bit 541" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB540 ,Group Modifier Bit 540" "0,1"
bitfld.long 0x00 27. "  GMB539 ,Group Modifier Bit 539" "0,1"
bitfld.long 0x00 26. "  GMB538 ,Group Modifier Bit 538" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB537 ,Group Modifier Bit 537" "0,1"
bitfld.long 0x00 24. "  GMB536 ,Group Modifier Bit 536" "0,1"
bitfld.long 0x00 23. "  GMB535 ,Group Modifier Bit 535" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB534 ,Group Modifier Bit 534" "0,1"
bitfld.long 0x00 21. "  GMB533 ,Group Modifier Bit 533" "0,1"
bitfld.long 0x00 20. "  GMB532 ,Group Modifier Bit 532" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB531 ,Group Modifier Bit 531" "0,1"
bitfld.long 0x00 18. "  GMB530 ,Group Modifier Bit 530" "0,1"
bitfld.long 0x00 17. "  GMB529 ,Group Modifier Bit 529" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB528 ,Group Modifier Bit 528" "0,1"
bitfld.long 0x00 15. "  GMB527 ,Group Modifier Bit 527" "0,1"
bitfld.long 0x00 14. "  GMB526 ,Group Modifier Bit 526" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB525 ,Group Modifier Bit 525" "0,1"
bitfld.long 0x00 12. "  GMB524 ,Group Modifier Bit 524" "0,1"
bitfld.long 0x00 11. "  GMB523 ,Group Modifier Bit 523" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB522 ,Group Modifier Bit 522" "0,1"
bitfld.long 0x00 9. "  GMB521 ,Group Modifier Bit 521" "0,1"
bitfld.long 0x00 8. "  GMB520 ,Group Modifier Bit 520" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB519 ,Group Modifier Bit 519" "0,1"
bitfld.long 0x00 6. "  GMB518 ,Group Modifier Bit 518" "0,1"
bitfld.long 0x00 5. "  GMB517 ,Group Modifier Bit 517" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB516 ,Group Modifier Bit 516" "0,1"
bitfld.long 0x00 3. "  GMB515 ,Group Modifier Bit 515" "0,1"
bitfld.long 0x00 2. "  GMB514 ,Group Modifier Bit 514" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB513 ,Group Modifier Bit 513" "0,1"
bitfld.long 0x00 0. "  GMB512 ,Group Modifier Bit 512" "0,1"
else
hgroup.long 0x0D40++0x03
hide.long 0x0 "GICD_IGRPMODR16,Interrupt Group Modifier Register 16"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D44))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11))
group.long 0x0D44++0x03
line.long 0x0 "GICD_IGRPMODR17,Interrupt Group Modifier Register 17"
bitfld.long 0x00 31. " GMB575 ,Group Modifier Bit 575" "0,1"
bitfld.long 0x00 30. "  GMB574 ,Group Modifier Bit 574" "0,1"
bitfld.long 0x00 29. "  GMB573 ,Group Modifier Bit 573" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB572 ,Group Modifier Bit 572" "0,1"
bitfld.long 0x00 27. "  GMB571 ,Group Modifier Bit 571" "0,1"
bitfld.long 0x00 26. "  GMB570 ,Group Modifier Bit 570" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB569 ,Group Modifier Bit 569" "0,1"
bitfld.long 0x00 24. "  GMB568 ,Group Modifier Bit 568" "0,1"
bitfld.long 0x00 23. "  GMB567 ,Group Modifier Bit 567" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB566 ,Group Modifier Bit 566" "0,1"
bitfld.long 0x00 21. "  GMB565 ,Group Modifier Bit 565" "0,1"
bitfld.long 0x00 20. "  GMB564 ,Group Modifier Bit 564" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB563 ,Group Modifier Bit 563" "0,1"
bitfld.long 0x00 18. "  GMB562 ,Group Modifier Bit 562" "0,1"
bitfld.long 0x00 17. "  GMB561 ,Group Modifier Bit 561" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB560 ,Group Modifier Bit 560" "0,1"
bitfld.long 0x00 15. "  GMB559 ,Group Modifier Bit 559" "0,1"
bitfld.long 0x00 14. "  GMB558 ,Group Modifier Bit 558" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB557 ,Group Modifier Bit 557" "0,1"
bitfld.long 0x00 12. "  GMB556 ,Group Modifier Bit 556" "0,1"
bitfld.long 0x00 11. "  GMB555 ,Group Modifier Bit 555" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB554 ,Group Modifier Bit 554" "0,1"
bitfld.long 0x00 9. "  GMB553 ,Group Modifier Bit 553" "0,1"
bitfld.long 0x00 8. "  GMB552 ,Group Modifier Bit 552" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB551 ,Group Modifier Bit 551" "0,1"
bitfld.long 0x00 6. "  GMB550 ,Group Modifier Bit 550" "0,1"
bitfld.long 0x00 5. "  GMB549 ,Group Modifier Bit 549" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB548 ,Group Modifier Bit 548" "0,1"
bitfld.long 0x00 3. "  GMB547 ,Group Modifier Bit 547" "0,1"
bitfld.long 0x00 2. "  GMB546 ,Group Modifier Bit 546" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB545 ,Group Modifier Bit 545" "0,1"
bitfld.long 0x00 0. "  GMB544 ,Group Modifier Bit 544" "0,1"
else
hgroup.long 0x0D44++0x03
hide.long 0x0 "GICD_IGRPMODR17,Interrupt Group Modifier Register 17"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D48))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12))
group.long 0x0D48++0x03
line.long 0x0 "GICD_IGRPMODR18,Interrupt Group Modifier Register 18"
bitfld.long 0x00 31. " GMB607 ,Group Modifier Bit 607" "0,1"
bitfld.long 0x00 30. "  GMB606 ,Group Modifier Bit 606" "0,1"
bitfld.long 0x00 29. "  GMB605 ,Group Modifier Bit 605" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB604 ,Group Modifier Bit 604" "0,1"
bitfld.long 0x00 27. "  GMB603 ,Group Modifier Bit 603" "0,1"
bitfld.long 0x00 26. "  GMB602 ,Group Modifier Bit 602" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB601 ,Group Modifier Bit 601" "0,1"
bitfld.long 0x00 24. "  GMB600 ,Group Modifier Bit 600" "0,1"
bitfld.long 0x00 23. "  GMB599 ,Group Modifier Bit 599" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB598 ,Group Modifier Bit 598" "0,1"
bitfld.long 0x00 21. "  GMB597 ,Group Modifier Bit 597" "0,1"
bitfld.long 0x00 20. "  GMB596 ,Group Modifier Bit 596" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB595 ,Group Modifier Bit 595" "0,1"
bitfld.long 0x00 18. "  GMB594 ,Group Modifier Bit 594" "0,1"
bitfld.long 0x00 17. "  GMB593 ,Group Modifier Bit 593" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB592 ,Group Modifier Bit 592" "0,1"
bitfld.long 0x00 15. "  GMB591 ,Group Modifier Bit 591" "0,1"
bitfld.long 0x00 14. "  GMB590 ,Group Modifier Bit 590" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB589 ,Group Modifier Bit 589" "0,1"
bitfld.long 0x00 12. "  GMB588 ,Group Modifier Bit 588" "0,1"
bitfld.long 0x00 11. "  GMB587 ,Group Modifier Bit 587" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB586 ,Group Modifier Bit 586" "0,1"
bitfld.long 0x00 9. "  GMB585 ,Group Modifier Bit 585" "0,1"
bitfld.long 0x00 8. "  GMB584 ,Group Modifier Bit 584" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB583 ,Group Modifier Bit 583" "0,1"
bitfld.long 0x00 6. "  GMB582 ,Group Modifier Bit 582" "0,1"
bitfld.long 0x00 5. "  GMB581 ,Group Modifier Bit 581" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB580 ,Group Modifier Bit 580" "0,1"
bitfld.long 0x00 3. "  GMB579 ,Group Modifier Bit 579" "0,1"
bitfld.long 0x00 2. "  GMB578 ,Group Modifier Bit 578" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB577 ,Group Modifier Bit 577" "0,1"
bitfld.long 0x00 0. "  GMB576 ,Group Modifier Bit 576" "0,1"
else
hgroup.long 0x0D48++0x03
hide.long 0x0 "GICD_IGRPMODR18,Interrupt Group Modifier Register 18"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D4C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13))
group.long 0x0D4C++0x03
line.long 0x0 "GICD_IGRPMODR19,Interrupt Group Modifier Register 19"
bitfld.long 0x00 31. " GMB639 ,Group Modifier Bit 639" "0,1"
bitfld.long 0x00 30. "  GMB638 ,Group Modifier Bit 638" "0,1"
bitfld.long 0x00 29. "  GMB637 ,Group Modifier Bit 637" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB636 ,Group Modifier Bit 636" "0,1"
bitfld.long 0x00 27. "  GMB635 ,Group Modifier Bit 635" "0,1"
bitfld.long 0x00 26. "  GMB634 ,Group Modifier Bit 634" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB633 ,Group Modifier Bit 633" "0,1"
bitfld.long 0x00 24. "  GMB632 ,Group Modifier Bit 632" "0,1"
bitfld.long 0x00 23. "  GMB631 ,Group Modifier Bit 631" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB630 ,Group Modifier Bit 630" "0,1"
bitfld.long 0x00 21. "  GMB629 ,Group Modifier Bit 629" "0,1"
bitfld.long 0x00 20. "  GMB628 ,Group Modifier Bit 628" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB627 ,Group Modifier Bit 627" "0,1"
bitfld.long 0x00 18. "  GMB626 ,Group Modifier Bit 626" "0,1"
bitfld.long 0x00 17. "  GMB625 ,Group Modifier Bit 625" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB624 ,Group Modifier Bit 624" "0,1"
bitfld.long 0x00 15. "  GMB623 ,Group Modifier Bit 623" "0,1"
bitfld.long 0x00 14. "  GMB622 ,Group Modifier Bit 622" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB621 ,Group Modifier Bit 621" "0,1"
bitfld.long 0x00 12. "  GMB620 ,Group Modifier Bit 620" "0,1"
bitfld.long 0x00 11. "  GMB619 ,Group Modifier Bit 619" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB618 ,Group Modifier Bit 618" "0,1"
bitfld.long 0x00 9. "  GMB617 ,Group Modifier Bit 617" "0,1"
bitfld.long 0x00 8. "  GMB616 ,Group Modifier Bit 616" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB615 ,Group Modifier Bit 615" "0,1"
bitfld.long 0x00 6. "  GMB614 ,Group Modifier Bit 614" "0,1"
bitfld.long 0x00 5. "  GMB613 ,Group Modifier Bit 613" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB612 ,Group Modifier Bit 612" "0,1"
bitfld.long 0x00 3. "  GMB611 ,Group Modifier Bit 611" "0,1"
bitfld.long 0x00 2. "  GMB610 ,Group Modifier Bit 610" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB609 ,Group Modifier Bit 609" "0,1"
bitfld.long 0x00 0. "  GMB608 ,Group Modifier Bit 608" "0,1"
else
hgroup.long 0x0D4C++0x03
hide.long 0x0 "GICD_IGRPMODR19,Interrupt Group Modifier Register 19"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D50))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14))
group.long 0x0D50++0x03
line.long 0x0 "GICD_IGRPMODR20,Interrupt Group Modifier Register 20"
bitfld.long 0x00 31. " GMB671 ,Group Modifier Bit 671" "0,1"
bitfld.long 0x00 30. "  GMB670 ,Group Modifier Bit 670" "0,1"
bitfld.long 0x00 29. "  GMB669 ,Group Modifier Bit 669" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB668 ,Group Modifier Bit 668" "0,1"
bitfld.long 0x00 27. "  GMB667 ,Group Modifier Bit 667" "0,1"
bitfld.long 0x00 26. "  GMB666 ,Group Modifier Bit 666" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB665 ,Group Modifier Bit 665" "0,1"
bitfld.long 0x00 24. "  GMB664 ,Group Modifier Bit 664" "0,1"
bitfld.long 0x00 23. "  GMB663 ,Group Modifier Bit 663" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB662 ,Group Modifier Bit 662" "0,1"
bitfld.long 0x00 21. "  GMB661 ,Group Modifier Bit 661" "0,1"
bitfld.long 0x00 20. "  GMB660 ,Group Modifier Bit 660" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB659 ,Group Modifier Bit 659" "0,1"
bitfld.long 0x00 18. "  GMB658 ,Group Modifier Bit 658" "0,1"
bitfld.long 0x00 17. "  GMB657 ,Group Modifier Bit 657" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB656 ,Group Modifier Bit 656" "0,1"
bitfld.long 0x00 15. "  GMB655 ,Group Modifier Bit 655" "0,1"
bitfld.long 0x00 14. "  GMB654 ,Group Modifier Bit 654" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB653 ,Group Modifier Bit 653" "0,1"
bitfld.long 0x00 12. "  GMB652 ,Group Modifier Bit 652" "0,1"
bitfld.long 0x00 11. "  GMB651 ,Group Modifier Bit 651" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB650 ,Group Modifier Bit 650" "0,1"
bitfld.long 0x00 9. "  GMB649 ,Group Modifier Bit 649" "0,1"
bitfld.long 0x00 8. "  GMB648 ,Group Modifier Bit 648" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB647 ,Group Modifier Bit 647" "0,1"
bitfld.long 0x00 6. "  GMB646 ,Group Modifier Bit 646" "0,1"
bitfld.long 0x00 5. "  GMB645 ,Group Modifier Bit 645" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB644 ,Group Modifier Bit 644" "0,1"
bitfld.long 0x00 3. "  GMB643 ,Group Modifier Bit 643" "0,1"
bitfld.long 0x00 2. "  GMB642 ,Group Modifier Bit 642" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB641 ,Group Modifier Bit 641" "0,1"
bitfld.long 0x00 0. "  GMB640 ,Group Modifier Bit 640" "0,1"
else
hgroup.long 0x0D50++0x03
hide.long 0x0 "GICD_IGRPMODR20,Interrupt Group Modifier Register 20"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D54))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15))
group.long 0x0D54++0x03
line.long 0x0 "GICD_IGRPMODR21,Interrupt Group Modifier Register 21"
bitfld.long 0x00 31. " GMB703 ,Group Modifier Bit 703" "0,1"
bitfld.long 0x00 30. "  GMB702 ,Group Modifier Bit 702" "0,1"
bitfld.long 0x00 29. "  GMB701 ,Group Modifier Bit 701" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB700 ,Group Modifier Bit 700" "0,1"
bitfld.long 0x00 27. "  GMB699 ,Group Modifier Bit 699" "0,1"
bitfld.long 0x00 26. "  GMB698 ,Group Modifier Bit 698" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB697 ,Group Modifier Bit 697" "0,1"
bitfld.long 0x00 24. "  GMB696 ,Group Modifier Bit 696" "0,1"
bitfld.long 0x00 23. "  GMB695 ,Group Modifier Bit 695" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB694 ,Group Modifier Bit 694" "0,1"
bitfld.long 0x00 21. "  GMB693 ,Group Modifier Bit 693" "0,1"
bitfld.long 0x00 20. "  GMB692 ,Group Modifier Bit 692" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB691 ,Group Modifier Bit 691" "0,1"
bitfld.long 0x00 18. "  GMB690 ,Group Modifier Bit 690" "0,1"
bitfld.long 0x00 17. "  GMB689 ,Group Modifier Bit 689" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB688 ,Group Modifier Bit 688" "0,1"
bitfld.long 0x00 15. "  GMB687 ,Group Modifier Bit 687" "0,1"
bitfld.long 0x00 14. "  GMB686 ,Group Modifier Bit 686" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB685 ,Group Modifier Bit 685" "0,1"
bitfld.long 0x00 12. "  GMB684 ,Group Modifier Bit 684" "0,1"
bitfld.long 0x00 11. "  GMB683 ,Group Modifier Bit 683" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB682 ,Group Modifier Bit 682" "0,1"
bitfld.long 0x00 9. "  GMB681 ,Group Modifier Bit 681" "0,1"
bitfld.long 0x00 8. "  GMB680 ,Group Modifier Bit 680" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB679 ,Group Modifier Bit 679" "0,1"
bitfld.long 0x00 6. "  GMB678 ,Group Modifier Bit 678" "0,1"
bitfld.long 0x00 5. "  GMB677 ,Group Modifier Bit 677" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB676 ,Group Modifier Bit 676" "0,1"
bitfld.long 0x00 3. "  GMB675 ,Group Modifier Bit 675" "0,1"
bitfld.long 0x00 2. "  GMB674 ,Group Modifier Bit 674" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB673 ,Group Modifier Bit 673" "0,1"
bitfld.long 0x00 0. "  GMB672 ,Group Modifier Bit 672" "0,1"
else
hgroup.long 0x0D54++0x03
hide.long 0x0 "GICD_IGRPMODR21,Interrupt Group Modifier Register 21"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D58))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16))
group.long 0x0D58++0x03
line.long 0x0 "GICD_IGRPMODR22,Interrupt Group Modifier Register 22"
bitfld.long 0x00 31. " GMB735 ,Group Modifier Bit 735" "0,1"
bitfld.long 0x00 30. "  GMB734 ,Group Modifier Bit 734" "0,1"
bitfld.long 0x00 29. "  GMB733 ,Group Modifier Bit 733" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB732 ,Group Modifier Bit 732" "0,1"
bitfld.long 0x00 27. "  GMB731 ,Group Modifier Bit 731" "0,1"
bitfld.long 0x00 26. "  GMB730 ,Group Modifier Bit 730" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB729 ,Group Modifier Bit 729" "0,1"
bitfld.long 0x00 24. "  GMB728 ,Group Modifier Bit 728" "0,1"
bitfld.long 0x00 23. "  GMB727 ,Group Modifier Bit 727" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB726 ,Group Modifier Bit 726" "0,1"
bitfld.long 0x00 21. "  GMB725 ,Group Modifier Bit 725" "0,1"
bitfld.long 0x00 20. "  GMB724 ,Group Modifier Bit 724" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB723 ,Group Modifier Bit 723" "0,1"
bitfld.long 0x00 18. "  GMB722 ,Group Modifier Bit 722" "0,1"
bitfld.long 0x00 17. "  GMB721 ,Group Modifier Bit 721" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB720 ,Group Modifier Bit 720" "0,1"
bitfld.long 0x00 15. "  GMB719 ,Group Modifier Bit 719" "0,1"
bitfld.long 0x00 14. "  GMB718 ,Group Modifier Bit 718" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB717 ,Group Modifier Bit 717" "0,1"
bitfld.long 0x00 12. "  GMB716 ,Group Modifier Bit 716" "0,1"
bitfld.long 0x00 11. "  GMB715 ,Group Modifier Bit 715" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB714 ,Group Modifier Bit 714" "0,1"
bitfld.long 0x00 9. "  GMB713 ,Group Modifier Bit 713" "0,1"
bitfld.long 0x00 8. "  GMB712 ,Group Modifier Bit 712" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB711 ,Group Modifier Bit 711" "0,1"
bitfld.long 0x00 6. "  GMB710 ,Group Modifier Bit 710" "0,1"
bitfld.long 0x00 5. "  GMB709 ,Group Modifier Bit 709" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB708 ,Group Modifier Bit 708" "0,1"
bitfld.long 0x00 3. "  GMB707 ,Group Modifier Bit 707" "0,1"
bitfld.long 0x00 2. "  GMB706 ,Group Modifier Bit 706" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB705 ,Group Modifier Bit 705" "0,1"
bitfld.long 0x00 0. "  GMB704 ,Group Modifier Bit 704" "0,1"
else
hgroup.long 0x0D58++0x03
hide.long 0x0 "GICD_IGRPMODR22,Interrupt Group Modifier Register 22"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D5C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17))
group.long 0x0D5C++0x03
line.long 0x0 "GICD_IGRPMODR23,Interrupt Group Modifier Register 23"
bitfld.long 0x00 31. " GMB767 ,Group Modifier Bit 767" "0,1"
bitfld.long 0x00 30. "  GMB766 ,Group Modifier Bit 766" "0,1"
bitfld.long 0x00 29. "  GMB765 ,Group Modifier Bit 765" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB764 ,Group Modifier Bit 764" "0,1"
bitfld.long 0x00 27. "  GMB763 ,Group Modifier Bit 763" "0,1"
bitfld.long 0x00 26. "  GMB762 ,Group Modifier Bit 762" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB761 ,Group Modifier Bit 761" "0,1"
bitfld.long 0x00 24. "  GMB760 ,Group Modifier Bit 760" "0,1"
bitfld.long 0x00 23. "  GMB759 ,Group Modifier Bit 759" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB758 ,Group Modifier Bit 758" "0,1"
bitfld.long 0x00 21. "  GMB757 ,Group Modifier Bit 757" "0,1"
bitfld.long 0x00 20. "  GMB756 ,Group Modifier Bit 756" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB755 ,Group Modifier Bit 755" "0,1"
bitfld.long 0x00 18. "  GMB754 ,Group Modifier Bit 754" "0,1"
bitfld.long 0x00 17. "  GMB753 ,Group Modifier Bit 753" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB752 ,Group Modifier Bit 752" "0,1"
bitfld.long 0x00 15. "  GMB751 ,Group Modifier Bit 751" "0,1"
bitfld.long 0x00 14. "  GMB750 ,Group Modifier Bit 750" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB749 ,Group Modifier Bit 749" "0,1"
bitfld.long 0x00 12. "  GMB748 ,Group Modifier Bit 748" "0,1"
bitfld.long 0x00 11. "  GMB747 ,Group Modifier Bit 747" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB746 ,Group Modifier Bit 746" "0,1"
bitfld.long 0x00 9. "  GMB745 ,Group Modifier Bit 745" "0,1"
bitfld.long 0x00 8. "  GMB744 ,Group Modifier Bit 744" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB743 ,Group Modifier Bit 743" "0,1"
bitfld.long 0x00 6. "  GMB742 ,Group Modifier Bit 742" "0,1"
bitfld.long 0x00 5. "  GMB741 ,Group Modifier Bit 741" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB740 ,Group Modifier Bit 740" "0,1"
bitfld.long 0x00 3. "  GMB739 ,Group Modifier Bit 739" "0,1"
bitfld.long 0x00 2. "  GMB738 ,Group Modifier Bit 738" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB737 ,Group Modifier Bit 737" "0,1"
bitfld.long 0x00 0. "  GMB736 ,Group Modifier Bit 736" "0,1"
else
hgroup.long 0x0D5C++0x03
hide.long 0x0 "GICD_IGRPMODR23,Interrupt Group Modifier Register 23"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D60))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18))
group.long 0x0D60++0x03
line.long 0x0 "GICD_IGRPMODR24,Interrupt Group Modifier Register 24"
bitfld.long 0x00 31. " GMB799 ,Group Modifier Bit 799" "0,1"
bitfld.long 0x00 30. "  GMB798 ,Group Modifier Bit 798" "0,1"
bitfld.long 0x00 29. "  GMB797 ,Group Modifier Bit 797" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB796 ,Group Modifier Bit 796" "0,1"
bitfld.long 0x00 27. "  GMB795 ,Group Modifier Bit 795" "0,1"
bitfld.long 0x00 26. "  GMB794 ,Group Modifier Bit 794" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB793 ,Group Modifier Bit 793" "0,1"
bitfld.long 0x00 24. "  GMB792 ,Group Modifier Bit 792" "0,1"
bitfld.long 0x00 23. "  GMB791 ,Group Modifier Bit 791" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB790 ,Group Modifier Bit 790" "0,1"
bitfld.long 0x00 21. "  GMB789 ,Group Modifier Bit 789" "0,1"
bitfld.long 0x00 20. "  GMB788 ,Group Modifier Bit 788" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB787 ,Group Modifier Bit 787" "0,1"
bitfld.long 0x00 18. "  GMB786 ,Group Modifier Bit 786" "0,1"
bitfld.long 0x00 17. "  GMB785 ,Group Modifier Bit 785" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB784 ,Group Modifier Bit 784" "0,1"
bitfld.long 0x00 15. "  GMB783 ,Group Modifier Bit 783" "0,1"
bitfld.long 0x00 14. "  GMB782 ,Group Modifier Bit 782" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB781 ,Group Modifier Bit 781" "0,1"
bitfld.long 0x00 12. "  GMB780 ,Group Modifier Bit 780" "0,1"
bitfld.long 0x00 11. "  GMB779 ,Group Modifier Bit 779" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB778 ,Group Modifier Bit 778" "0,1"
bitfld.long 0x00 9. "  GMB777 ,Group Modifier Bit 777" "0,1"
bitfld.long 0x00 8. "  GMB776 ,Group Modifier Bit 776" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB775 ,Group Modifier Bit 775" "0,1"
bitfld.long 0x00 6. "  GMB774 ,Group Modifier Bit 774" "0,1"
bitfld.long 0x00 5. "  GMB773 ,Group Modifier Bit 773" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB772 ,Group Modifier Bit 772" "0,1"
bitfld.long 0x00 3. "  GMB771 ,Group Modifier Bit 771" "0,1"
bitfld.long 0x00 2. "  GMB770 ,Group Modifier Bit 770" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB769 ,Group Modifier Bit 769" "0,1"
bitfld.long 0x00 0. "  GMB768 ,Group Modifier Bit 768" "0,1"
else
hgroup.long 0x0D60++0x03
hide.long 0x0 "GICD_IGRPMODR24,Interrupt Group Modifier Register 24"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D64))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19))
group.long 0x0D64++0x03
line.long 0x0 "GICD_IGRPMODR25,Interrupt Group Modifier Register 25"
bitfld.long 0x00 31. " GMB831 ,Group Modifier Bit 831" "0,1"
bitfld.long 0x00 30. "  GMB830 ,Group Modifier Bit 830" "0,1"
bitfld.long 0x00 29. "  GMB829 ,Group Modifier Bit 829" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB828 ,Group Modifier Bit 828" "0,1"
bitfld.long 0x00 27. "  GMB827 ,Group Modifier Bit 827" "0,1"
bitfld.long 0x00 26. "  GMB826 ,Group Modifier Bit 826" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB825 ,Group Modifier Bit 825" "0,1"
bitfld.long 0x00 24. "  GMB824 ,Group Modifier Bit 824" "0,1"
bitfld.long 0x00 23. "  GMB823 ,Group Modifier Bit 823" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB822 ,Group Modifier Bit 822" "0,1"
bitfld.long 0x00 21. "  GMB821 ,Group Modifier Bit 821" "0,1"
bitfld.long 0x00 20. "  GMB820 ,Group Modifier Bit 820" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB819 ,Group Modifier Bit 819" "0,1"
bitfld.long 0x00 18. "  GMB818 ,Group Modifier Bit 818" "0,1"
bitfld.long 0x00 17. "  GMB817 ,Group Modifier Bit 817" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB816 ,Group Modifier Bit 816" "0,1"
bitfld.long 0x00 15. "  GMB815 ,Group Modifier Bit 815" "0,1"
bitfld.long 0x00 14. "  GMB814 ,Group Modifier Bit 814" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB813 ,Group Modifier Bit 813" "0,1"
bitfld.long 0x00 12. "  GMB812 ,Group Modifier Bit 812" "0,1"
bitfld.long 0x00 11. "  GMB811 ,Group Modifier Bit 811" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB810 ,Group Modifier Bit 810" "0,1"
bitfld.long 0x00 9. "  GMB809 ,Group Modifier Bit 809" "0,1"
bitfld.long 0x00 8. "  GMB808 ,Group Modifier Bit 808" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB807 ,Group Modifier Bit 807" "0,1"
bitfld.long 0x00 6. "  GMB806 ,Group Modifier Bit 806" "0,1"
bitfld.long 0x00 5. "  GMB805 ,Group Modifier Bit 805" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB804 ,Group Modifier Bit 804" "0,1"
bitfld.long 0x00 3. "  GMB803 ,Group Modifier Bit 803" "0,1"
bitfld.long 0x00 2. "  GMB802 ,Group Modifier Bit 802" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB801 ,Group Modifier Bit 801" "0,1"
bitfld.long 0x00 0. "  GMB800 ,Group Modifier Bit 800" "0,1"
else
hgroup.long 0x0D64++0x03
hide.long 0x0 "GICD_IGRPMODR25,Interrupt Group Modifier Register 25"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D68))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01A))
group.long 0x0D68++0x03
line.long 0x0 "GICD_IGRPMODR26,Interrupt Group Modifier Register 26"
bitfld.long 0x00 31. " GMB863 ,Group Modifier Bit 863" "0,1"
bitfld.long 0x00 30. "  GMB862 ,Group Modifier Bit 862" "0,1"
bitfld.long 0x00 29. "  GMB861 ,Group Modifier Bit 861" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB860 ,Group Modifier Bit 860" "0,1"
bitfld.long 0x00 27. "  GMB859 ,Group Modifier Bit 859" "0,1"
bitfld.long 0x00 26. "  GMB858 ,Group Modifier Bit 858" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB857 ,Group Modifier Bit 857" "0,1"
bitfld.long 0x00 24. "  GMB856 ,Group Modifier Bit 856" "0,1"
bitfld.long 0x00 23. "  GMB855 ,Group Modifier Bit 855" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB854 ,Group Modifier Bit 854" "0,1"
bitfld.long 0x00 21. "  GMB853 ,Group Modifier Bit 853" "0,1"
bitfld.long 0x00 20. "  GMB852 ,Group Modifier Bit 852" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB851 ,Group Modifier Bit 851" "0,1"
bitfld.long 0x00 18. "  GMB850 ,Group Modifier Bit 850" "0,1"
bitfld.long 0x00 17. "  GMB849 ,Group Modifier Bit 849" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB848 ,Group Modifier Bit 848" "0,1"
bitfld.long 0x00 15. "  GMB847 ,Group Modifier Bit 847" "0,1"
bitfld.long 0x00 14. "  GMB846 ,Group Modifier Bit 846" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB845 ,Group Modifier Bit 845" "0,1"
bitfld.long 0x00 12. "  GMB844 ,Group Modifier Bit 844" "0,1"
bitfld.long 0x00 11. "  GMB843 ,Group Modifier Bit 843" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB842 ,Group Modifier Bit 842" "0,1"
bitfld.long 0x00 9. "  GMB841 ,Group Modifier Bit 841" "0,1"
bitfld.long 0x00 8. "  GMB840 ,Group Modifier Bit 840" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB839 ,Group Modifier Bit 839" "0,1"
bitfld.long 0x00 6. "  GMB838 ,Group Modifier Bit 838" "0,1"
bitfld.long 0x00 5. "  GMB837 ,Group Modifier Bit 837" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB836 ,Group Modifier Bit 836" "0,1"
bitfld.long 0x00 3. "  GMB835 ,Group Modifier Bit 835" "0,1"
bitfld.long 0x00 2. "  GMB834 ,Group Modifier Bit 834" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB833 ,Group Modifier Bit 833" "0,1"
bitfld.long 0x00 0. "  GMB832 ,Group Modifier Bit 832" "0,1"
else
hgroup.long 0x0D68++0x03
hide.long 0x0 "GICD_IGRPMODR26,Interrupt Group Modifier Register 26"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D6C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B))
group.long 0x0D6C++0x03
line.long 0x0 "GICD_IGRPMODR27,Interrupt Group Modifier Register 27"
bitfld.long 0x00 31. " GMB895 ,Group Modifier Bit 895" "0,1"
bitfld.long 0x00 30. "  GMB894 ,Group Modifier Bit 894" "0,1"
bitfld.long 0x00 29. "  GMB893 ,Group Modifier Bit 893" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB892 ,Group Modifier Bit 892" "0,1"
bitfld.long 0x00 27. "  GMB891 ,Group Modifier Bit 891" "0,1"
bitfld.long 0x00 26. "  GMB890 ,Group Modifier Bit 890" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB889 ,Group Modifier Bit 889" "0,1"
bitfld.long 0x00 24. "  GMB888 ,Group Modifier Bit 888" "0,1"
bitfld.long 0x00 23. "  GMB887 ,Group Modifier Bit 887" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB886 ,Group Modifier Bit 886" "0,1"
bitfld.long 0x00 21. "  GMB885 ,Group Modifier Bit 885" "0,1"
bitfld.long 0x00 20. "  GMB884 ,Group Modifier Bit 884" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB883 ,Group Modifier Bit 883" "0,1"
bitfld.long 0x00 18. "  GMB882 ,Group Modifier Bit 882" "0,1"
bitfld.long 0x00 17. "  GMB881 ,Group Modifier Bit 881" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB880 ,Group Modifier Bit 880" "0,1"
bitfld.long 0x00 15. "  GMB879 ,Group Modifier Bit 879" "0,1"
bitfld.long 0x00 14. "  GMB878 ,Group Modifier Bit 878" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB877 ,Group Modifier Bit 877" "0,1"
bitfld.long 0x00 12. "  GMB876 ,Group Modifier Bit 876" "0,1"
bitfld.long 0x00 11. "  GMB875 ,Group Modifier Bit 875" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB874 ,Group Modifier Bit 874" "0,1"
bitfld.long 0x00 9. "  GMB873 ,Group Modifier Bit 873" "0,1"
bitfld.long 0x00 8. "  GMB872 ,Group Modifier Bit 872" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB871 ,Group Modifier Bit 871" "0,1"
bitfld.long 0x00 6. "  GMB870 ,Group Modifier Bit 870" "0,1"
bitfld.long 0x00 5. "  GMB869 ,Group Modifier Bit 869" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB868 ,Group Modifier Bit 868" "0,1"
bitfld.long 0x00 3. "  GMB867 ,Group Modifier Bit 867" "0,1"
bitfld.long 0x00 2. "  GMB866 ,Group Modifier Bit 866" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB865 ,Group Modifier Bit 865" "0,1"
bitfld.long 0x00 0. "  GMB864 ,Group Modifier Bit 864" "0,1"
else
hgroup.long 0x0D6C++0x03
hide.long 0x0 "GICD_IGRPMODR27,Interrupt Group Modifier Register 27"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D70))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C))
group.long 0x0D70++0x03
line.long 0x0 "GICD_IGRPMODR28,Interrupt Group Modifier Register 28"
bitfld.long 0x00 31. " GMB927 ,Group Modifier Bit 927" "0,1"
bitfld.long 0x00 30. "  GMB926 ,Group Modifier Bit 926" "0,1"
bitfld.long 0x00 29. "  GMB925 ,Group Modifier Bit 925" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB924 ,Group Modifier Bit 924" "0,1"
bitfld.long 0x00 27. "  GMB923 ,Group Modifier Bit 923" "0,1"
bitfld.long 0x00 26. "  GMB922 ,Group Modifier Bit 922" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB921 ,Group Modifier Bit 921" "0,1"
bitfld.long 0x00 24. "  GMB920 ,Group Modifier Bit 920" "0,1"
bitfld.long 0x00 23. "  GMB919 ,Group Modifier Bit 919" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB918 ,Group Modifier Bit 918" "0,1"
bitfld.long 0x00 21. "  GMB917 ,Group Modifier Bit 917" "0,1"
bitfld.long 0x00 20. "  GMB916 ,Group Modifier Bit 916" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB915 ,Group Modifier Bit 915" "0,1"
bitfld.long 0x00 18. "  GMB914 ,Group Modifier Bit 914" "0,1"
bitfld.long 0x00 17. "  GMB913 ,Group Modifier Bit 913" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB912 ,Group Modifier Bit 912" "0,1"
bitfld.long 0x00 15. "  GMB911 ,Group Modifier Bit 911" "0,1"
bitfld.long 0x00 14. "  GMB910 ,Group Modifier Bit 910" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB909 ,Group Modifier Bit 909" "0,1"
bitfld.long 0x00 12. "  GMB908 ,Group Modifier Bit 908" "0,1"
bitfld.long 0x00 11. "  GMB907 ,Group Modifier Bit 907" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB906 ,Group Modifier Bit 906" "0,1"
bitfld.long 0x00 9. "  GMB905 ,Group Modifier Bit 905" "0,1"
bitfld.long 0x00 8. "  GMB904 ,Group Modifier Bit 904" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB903 ,Group Modifier Bit 903" "0,1"
bitfld.long 0x00 6. "  GMB902 ,Group Modifier Bit 902" "0,1"
bitfld.long 0x00 5. "  GMB901 ,Group Modifier Bit 901" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB900 ,Group Modifier Bit 900" "0,1"
bitfld.long 0x00 3. "  GMB899 ,Group Modifier Bit 899" "0,1"
bitfld.long 0x00 2. "  GMB898 ,Group Modifier Bit 898" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB897 ,Group Modifier Bit 897" "0,1"
bitfld.long 0x00 0. "  GMB896 ,Group Modifier Bit 896" "0,1"
else
hgroup.long 0x0D70++0x03
hide.long 0x0 "GICD_IGRPMODR28,Interrupt Group Modifier Register 28"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D74))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D))
group.long 0x0D74++0x03
line.long 0x0 "GICD_IGRPMODR29,Interrupt Group Modifier Register 29"
bitfld.long 0x00 31. " GMB959 ,Group Modifier Bit 959" "0,1"
bitfld.long 0x00 30. "  GMB958 ,Group Modifier Bit 958" "0,1"
bitfld.long 0x00 29. "  GMB957 ,Group Modifier Bit 957" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB956 ,Group Modifier Bit 956" "0,1"
bitfld.long 0x00 27. "  GMB955 ,Group Modifier Bit 955" "0,1"
bitfld.long 0x00 26. "  GMB954 ,Group Modifier Bit 954" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB953 ,Group Modifier Bit 953" "0,1"
bitfld.long 0x00 24. "  GMB952 ,Group Modifier Bit 952" "0,1"
bitfld.long 0x00 23. "  GMB951 ,Group Modifier Bit 951" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB950 ,Group Modifier Bit 950" "0,1"
bitfld.long 0x00 21. "  GMB949 ,Group Modifier Bit 949" "0,1"
bitfld.long 0x00 20. "  GMB948 ,Group Modifier Bit 948" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB947 ,Group Modifier Bit 947" "0,1"
bitfld.long 0x00 18. "  GMB946 ,Group Modifier Bit 946" "0,1"
bitfld.long 0x00 17. "  GMB945 ,Group Modifier Bit 945" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB944 ,Group Modifier Bit 944" "0,1"
bitfld.long 0x00 15. "  GMB943 ,Group Modifier Bit 943" "0,1"
bitfld.long 0x00 14. "  GMB942 ,Group Modifier Bit 942" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB941 ,Group Modifier Bit 941" "0,1"
bitfld.long 0x00 12. "  GMB940 ,Group Modifier Bit 940" "0,1"
bitfld.long 0x00 11. "  GMB939 ,Group Modifier Bit 939" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB938 ,Group Modifier Bit 938" "0,1"
bitfld.long 0x00 9. "  GMB937 ,Group Modifier Bit 937" "0,1"
bitfld.long 0x00 8. "  GMB936 ,Group Modifier Bit 936" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB935 ,Group Modifier Bit 935" "0,1"
bitfld.long 0x00 6. "  GMB934 ,Group Modifier Bit 934" "0,1"
bitfld.long 0x00 5. "  GMB933 ,Group Modifier Bit 933" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB932 ,Group Modifier Bit 932" "0,1"
bitfld.long 0x00 3. "  GMB931 ,Group Modifier Bit 931" "0,1"
bitfld.long 0x00 2. "  GMB930 ,Group Modifier Bit 930" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB929 ,Group Modifier Bit 929" "0,1"
bitfld.long 0x00 0. "  GMB928 ,Group Modifier Bit 928" "0,1"
else
hgroup.long 0x0D74++0x03
hide.long 0x0 "GICD_IGRPMODR29,Interrupt Group Modifier Register 29"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D78))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E))
group.long 0x0D78++0x03
line.long 0x0 "GICD_IGRPMODR30,Interrupt Group Modifier Register 30"
bitfld.long 0x00 31. " GMB991 ,Group Modifier Bit 991" "0,1"
bitfld.long 0x00 30. "  GMB990 ,Group Modifier Bit 990" "0,1"
bitfld.long 0x00 29. "  GMB989 ,Group Modifier Bit 989" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB988 ,Group Modifier Bit 988" "0,1"
bitfld.long 0x00 27. "  GMB987 ,Group Modifier Bit 987" "0,1"
bitfld.long 0x00 26. "  GMB986 ,Group Modifier Bit 986" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB985 ,Group Modifier Bit 985" "0,1"
bitfld.long 0x00 24. "  GMB984 ,Group Modifier Bit 984" "0,1"
bitfld.long 0x00 23. "  GMB983 ,Group Modifier Bit 983" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB982 ,Group Modifier Bit 982" "0,1"
bitfld.long 0x00 21. "  GMB981 ,Group Modifier Bit 981" "0,1"
bitfld.long 0x00 20. "  GMB980 ,Group Modifier Bit 980" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB979 ,Group Modifier Bit 979" "0,1"
bitfld.long 0x00 18. "  GMB978 ,Group Modifier Bit 978" "0,1"
bitfld.long 0x00 17. "  GMB977 ,Group Modifier Bit 977" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB976 ,Group Modifier Bit 976" "0,1"
bitfld.long 0x00 15. "  GMB975 ,Group Modifier Bit 975" "0,1"
bitfld.long 0x00 14. "  GMB974 ,Group Modifier Bit 974" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB973 ,Group Modifier Bit 973" "0,1"
bitfld.long 0x00 12. "  GMB972 ,Group Modifier Bit 972" "0,1"
bitfld.long 0x00 11. "  GMB971 ,Group Modifier Bit 971" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB970 ,Group Modifier Bit 970" "0,1"
bitfld.long 0x00 9. "  GMB969 ,Group Modifier Bit 969" "0,1"
bitfld.long 0x00 8. "  GMB968 ,Group Modifier Bit 968" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB967 ,Group Modifier Bit 967" "0,1"
bitfld.long 0x00 6. "  GMB966 ,Group Modifier Bit 966" "0,1"
bitfld.long 0x00 5. "  GMB965 ,Group Modifier Bit 965" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB964 ,Group Modifier Bit 964" "0,1"
bitfld.long 0x00 3. "  GMB963 ,Group Modifier Bit 963" "0,1"
bitfld.long 0x00 2. "  GMB962 ,Group Modifier Bit 962" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB961 ,Group Modifier Bit 961" "0,1"
bitfld.long 0x00 0. "  GMB960 ,Group Modifier Bit 960" "0,1"
else
hgroup.long 0x0D78++0x03
hide.long 0x0 "GICD_IGRPMODR30,Interrupt Group Modifier Register 30"
endif
tree.end
width 14.
tree "Non-secure Access Control Registers"
hgroup.long 0x0E00++0x03
hide.long 0x00 "GICD_NSACR0,Non-secure Access Control Register 0"
hgroup.long 0xE04++0x03
hide.long 0x00 "GICD_NSACR1,Non-secure Access Control Register 1"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE08)))
group.long 0xE08++0x03
line.long 0x00 "GICD_NSACR2,Non-secure Access Control Register 2"
bitfld.long 0x00 30.--31. " NS_ACCESS47  ,Controls Non-secure access of the interrupt with ID47 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS46  ,Controls Non-secure access of the interrupt with ID46 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS45  ,Controls Non-secure access of the interrupt with ID45 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS44  ,Controls Non-secure access of the interrupt with ID44 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS43  ,Controls Non-secure access of the interrupt with ID43 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS42  ,Controls Non-secure access of the interrupt with ID42 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS41  ,Controls Non-secure access of the interrupt with ID41 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS40  ,Controls Non-secure access of the interrupt with ID40 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS39  ,Controls Non-secure access of the interrupt with ID39 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS38  ,Controls Non-secure access of the interrupt with ID38 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS37  ,Controls Non-secure access of the interrupt with ID37 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS36  ,Controls Non-secure access of the interrupt with ID36 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS35  ,Controls Non-secure access of the interrupt with ID35 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS34  ,Controls Non-secure access of the interrupt with ID34 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS33  ,Controls Non-secure access of the interrupt with ID33 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS32  ,Controls Non-secure access of the interrupt with ID32 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE08++0x03
hide.long 0x00 "GICD_NSACR2,Non-secure Access Control Register 2"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE0C)))
group.long 0xE0C++0x03
line.long 0x00 "GICD_NSACR3,Non-secure Access Control Register 3"
bitfld.long 0x00 30.--31. " NS_ACCESS63  ,Controls Non-secure access of the interrupt with ID63 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS62  ,Controls Non-secure access of the interrupt with ID62 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS61  ,Controls Non-secure access of the interrupt with ID61 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS60  ,Controls Non-secure access of the interrupt with ID60 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS59  ,Controls Non-secure access of the interrupt with ID59 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS58  ,Controls Non-secure access of the interrupt with ID58 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS57  ,Controls Non-secure access of the interrupt with ID57 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS56  ,Controls Non-secure access of the interrupt with ID56 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS55  ,Controls Non-secure access of the interrupt with ID55 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS54  ,Controls Non-secure access of the interrupt with ID54 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS53  ,Controls Non-secure access of the interrupt with ID53 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS52  ,Controls Non-secure access of the interrupt with ID52 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS51  ,Controls Non-secure access of the interrupt with ID51 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS50  ,Controls Non-secure access of the interrupt with ID50 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS49  ,Controls Non-secure access of the interrupt with ID49 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS48  ,Controls Non-secure access of the interrupt with ID48 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE0C++0x03
hide.long 0x00 "GICD_NSACR3,Non-secure Access Control Register 3"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE10)))
group.long 0xE10++0x03
line.long 0x00 "GICD_NSACR4,Non-secure Access Control Register 4"
bitfld.long 0x00 30.--31. " NS_ACCESS79  ,Controls Non-secure access of the interrupt with ID79 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS78  ,Controls Non-secure access of the interrupt with ID78 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS77  ,Controls Non-secure access of the interrupt with ID77 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS76  ,Controls Non-secure access of the interrupt with ID76 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS75  ,Controls Non-secure access of the interrupt with ID75 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS74  ,Controls Non-secure access of the interrupt with ID74 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS73  ,Controls Non-secure access of the interrupt with ID73 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS72  ,Controls Non-secure access of the interrupt with ID72 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS71  ,Controls Non-secure access of the interrupt with ID71 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS70  ,Controls Non-secure access of the interrupt with ID70 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS69  ,Controls Non-secure access of the interrupt with ID69 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS68  ,Controls Non-secure access of the interrupt with ID68 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS67  ,Controls Non-secure access of the interrupt with ID67 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS66  ,Controls Non-secure access of the interrupt with ID66 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS65  ,Controls Non-secure access of the interrupt with ID65 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS64  ,Controls Non-secure access of the interrupt with ID64 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE10++0x03
hide.long 0x00 "GICD_NSACR4,Non-secure Access Control Register 4"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE14)))
group.long 0xE14++0x03
line.long 0x00 "GICD_NSACR5,Non-secure Access Control Register 5"
bitfld.long 0x00 30.--31. " NS_ACCESS95  ,Controls Non-secure access of the interrupt with ID95 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS94  ,Controls Non-secure access of the interrupt with ID94 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS93  ,Controls Non-secure access of the interrupt with ID93 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS92  ,Controls Non-secure access of the interrupt with ID92 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS91  ,Controls Non-secure access of the interrupt with ID91 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS90  ,Controls Non-secure access of the interrupt with ID90 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS89  ,Controls Non-secure access of the interrupt with ID89 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS88  ,Controls Non-secure access of the interrupt with ID88 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS87  ,Controls Non-secure access of the interrupt with ID87 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS86  ,Controls Non-secure access of the interrupt with ID86 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS85  ,Controls Non-secure access of the interrupt with ID85 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS84  ,Controls Non-secure access of the interrupt with ID84 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS83  ,Controls Non-secure access of the interrupt with ID83 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS82  ,Controls Non-secure access of the interrupt with ID82 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS81  ,Controls Non-secure access of the interrupt with ID81 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS80  ,Controls Non-secure access of the interrupt with ID80 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE14++0x03
hide.long 0x00 "GICD_NSACR5,Non-secure Access Control Register 5"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE18)))
group.long 0xE18++0x03
line.long 0x00 "GICD_NSACR6,Non-secure Access Control Register 6"
bitfld.long 0x00 30.--31. " NS_ACCESS111 ,Controls Non-secure access of the interrupt with ID111" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS110 ,Controls Non-secure access of the interrupt with ID110" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS109 ,Controls Non-secure access of the interrupt with ID109" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS108 ,Controls Non-secure access of the interrupt with ID108" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS107 ,Controls Non-secure access of the interrupt with ID107" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS106 ,Controls Non-secure access of the interrupt with ID106" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS105 ,Controls Non-secure access of the interrupt with ID105" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS104 ,Controls Non-secure access of the interrupt with ID104" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS103 ,Controls Non-secure access of the interrupt with ID103" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS102 ,Controls Non-secure access of the interrupt with ID102" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS101 ,Controls Non-secure access of the interrupt with ID101" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS100 ,Controls Non-secure access of the interrupt with ID100" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS99  ,Controls Non-secure access of the interrupt with ID99 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS98  ,Controls Non-secure access of the interrupt with ID98 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS97  ,Controls Non-secure access of the interrupt with ID97 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS96  ,Controls Non-secure access of the interrupt with ID96 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE18++0x03
hide.long 0x00 "GICD_NSACR6,Non-secure Access Control Register 6"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE1C)))
group.long 0xE1C++0x03
line.long 0x00 "GICD_NSACR7,Non-secure Access Control Register 7"
bitfld.long 0x00 30.--31. " NS_ACCESS127 ,Controls Non-secure access of the interrupt with ID127" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS126 ,Controls Non-secure access of the interrupt with ID126" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS125 ,Controls Non-secure access of the interrupt with ID125" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS124 ,Controls Non-secure access of the interrupt with ID124" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS123 ,Controls Non-secure access of the interrupt with ID123" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS122 ,Controls Non-secure access of the interrupt with ID122" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS121 ,Controls Non-secure access of the interrupt with ID121" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS120 ,Controls Non-secure access of the interrupt with ID120" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS119 ,Controls Non-secure access of the interrupt with ID119" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS118 ,Controls Non-secure access of the interrupt with ID118" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS117 ,Controls Non-secure access of the interrupt with ID117" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS116 ,Controls Non-secure access of the interrupt with ID116" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS115 ,Controls Non-secure access of the interrupt with ID115" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS114 ,Controls Non-secure access of the interrupt with ID114" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS113 ,Controls Non-secure access of the interrupt with ID113" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS112 ,Controls Non-secure access of the interrupt with ID112" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE1C++0x03
hide.long 0x00 "GICD_NSACR7,Non-secure Access Control Register 7"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE20)))
group.long 0xE20++0x03
line.long 0x00 "GICD_NSACR8,Non-secure Access Control Register 8"
bitfld.long 0x00 30.--31. " NS_ACCESS143 ,Controls Non-secure access of the interrupt with ID143" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS142 ,Controls Non-secure access of the interrupt with ID142" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS141 ,Controls Non-secure access of the interrupt with ID141" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS140 ,Controls Non-secure access of the interrupt with ID140" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS139 ,Controls Non-secure access of the interrupt with ID139" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS138 ,Controls Non-secure access of the interrupt with ID138" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS137 ,Controls Non-secure access of the interrupt with ID137" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS136 ,Controls Non-secure access of the interrupt with ID136" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS135 ,Controls Non-secure access of the interrupt with ID135" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS134 ,Controls Non-secure access of the interrupt with ID134" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS133 ,Controls Non-secure access of the interrupt with ID133" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS132 ,Controls Non-secure access of the interrupt with ID132" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS131 ,Controls Non-secure access of the interrupt with ID131" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS130 ,Controls Non-secure access of the interrupt with ID130" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS129 ,Controls Non-secure access of the interrupt with ID129" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS128 ,Controls Non-secure access of the interrupt with ID128" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE20++0x03
hide.long 0x00 "GICD_NSACR8,Non-secure Access Control Register 8"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE24)))
group.long 0xE24++0x03
line.long 0x00 "GICD_NSACR9,Non-secure Access Control Register 9"
bitfld.long 0x00 30.--31. " NS_ACCESS159 ,Controls Non-secure access of the interrupt with ID159" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS158 ,Controls Non-secure access of the interrupt with ID158" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS157 ,Controls Non-secure access of the interrupt with ID157" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS156 ,Controls Non-secure access of the interrupt with ID156" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS155 ,Controls Non-secure access of the interrupt with ID155" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS154 ,Controls Non-secure access of the interrupt with ID154" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS153 ,Controls Non-secure access of the interrupt with ID153" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS152 ,Controls Non-secure access of the interrupt with ID152" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS151 ,Controls Non-secure access of the interrupt with ID151" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS150 ,Controls Non-secure access of the interrupt with ID150" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS149 ,Controls Non-secure access of the interrupt with ID149" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS148 ,Controls Non-secure access of the interrupt with ID148" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS147 ,Controls Non-secure access of the interrupt with ID147" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS146 ,Controls Non-secure access of the interrupt with ID146" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS145 ,Controls Non-secure access of the interrupt with ID145" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS144 ,Controls Non-secure access of the interrupt with ID144" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE24++0x03
hide.long 0x00 "GICD_NSACR9,Non-secure Access Control Register 9"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE28)))
group.long 0xE28++0x03
line.long 0x00 "GICD_NSACR10,Non-secure Access Control Register 10"
bitfld.long 0x00 30.--31. " NS_ACCESS175 ,Controls Non-secure access of the interrupt with ID175" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS174 ,Controls Non-secure access of the interrupt with ID174" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS173 ,Controls Non-secure access of the interrupt with ID173" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS172 ,Controls Non-secure access of the interrupt with ID172" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS171 ,Controls Non-secure access of the interrupt with ID171" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS170 ,Controls Non-secure access of the interrupt with ID170" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS169 ,Controls Non-secure access of the interrupt with ID169" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS168 ,Controls Non-secure access of the interrupt with ID168" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS167 ,Controls Non-secure access of the interrupt with ID167" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS166 ,Controls Non-secure access of the interrupt with ID166" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS165 ,Controls Non-secure access of the interrupt with ID165" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS164 ,Controls Non-secure access of the interrupt with ID164" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS163 ,Controls Non-secure access of the interrupt with ID163" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS162 ,Controls Non-secure access of the interrupt with ID162" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS161 ,Controls Non-secure access of the interrupt with ID161" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS160 ,Controls Non-secure access of the interrupt with ID160" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE28++0x03
hide.long 0x00 "GICD_NSACR10,Non-secure Access Control Register 10"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE2C)))
group.long 0xE2C++0x03
line.long 0x00 "GICD_NSACR11,Non-secure Access Control Register 11"
bitfld.long 0x00 30.--31. " NS_ACCESS191 ,Controls Non-secure access of the interrupt with ID191" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS190 ,Controls Non-secure access of the interrupt with ID190" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS189 ,Controls Non-secure access of the interrupt with ID189" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS188 ,Controls Non-secure access of the interrupt with ID188" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS187 ,Controls Non-secure access of the interrupt with ID187" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS186 ,Controls Non-secure access of the interrupt with ID186" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS185 ,Controls Non-secure access of the interrupt with ID185" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS184 ,Controls Non-secure access of the interrupt with ID184" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS183 ,Controls Non-secure access of the interrupt with ID183" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS182 ,Controls Non-secure access of the interrupt with ID182" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS181 ,Controls Non-secure access of the interrupt with ID181" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS180 ,Controls Non-secure access of the interrupt with ID180" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS179 ,Controls Non-secure access of the interrupt with ID179" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS178 ,Controls Non-secure access of the interrupt with ID178" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS177 ,Controls Non-secure access of the interrupt with ID177" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS176 ,Controls Non-secure access of the interrupt with ID176" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE2C++0x03
hide.long 0x00 "GICD_NSACR11,Non-secure Access Control Register 11"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE30)))
group.long 0xE30++0x03
line.long 0x00 "GICD_NSACR12,Non-secure Access Control Register 12"
bitfld.long 0x00 30.--31. " NS_ACCESS207 ,Controls Non-secure access of the interrupt with ID207" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS206 ,Controls Non-secure access of the interrupt with ID206" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS205 ,Controls Non-secure access of the interrupt with ID205" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS204 ,Controls Non-secure access of the interrupt with ID204" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS203 ,Controls Non-secure access of the interrupt with ID203" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS202 ,Controls Non-secure access of the interrupt with ID202" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS201 ,Controls Non-secure access of the interrupt with ID201" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS200 ,Controls Non-secure access of the interrupt with ID200" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS199 ,Controls Non-secure access of the interrupt with ID199" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS198 ,Controls Non-secure access of the interrupt with ID198" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS197 ,Controls Non-secure access of the interrupt with ID197" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS196 ,Controls Non-secure access of the interrupt with ID196" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS195 ,Controls Non-secure access of the interrupt with ID195" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS194 ,Controls Non-secure access of the interrupt with ID194" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS193 ,Controls Non-secure access of the interrupt with ID193" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS192 ,Controls Non-secure access of the interrupt with ID192" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE30++0x03
hide.long 0x00 "GICD_NSACR12,Non-secure Access Control Register 12"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE34)))
group.long 0xE34++0x03
line.long 0x00 "GICD_NSACR13,Non-secure Access Control Register 13"
bitfld.long 0x00 30.--31. " NS_ACCESS223 ,Controls Non-secure access of the interrupt with ID223" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS222 ,Controls Non-secure access of the interrupt with ID222" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS221 ,Controls Non-secure access of the interrupt with ID221" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS220 ,Controls Non-secure access of the interrupt with ID220" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS219 ,Controls Non-secure access of the interrupt with ID219" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS218 ,Controls Non-secure access of the interrupt with ID218" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS217 ,Controls Non-secure access of the interrupt with ID217" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS216 ,Controls Non-secure access of the interrupt with ID216" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS215 ,Controls Non-secure access of the interrupt with ID215" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS214 ,Controls Non-secure access of the interrupt with ID214" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS213 ,Controls Non-secure access of the interrupt with ID213" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS212 ,Controls Non-secure access of the interrupt with ID212" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS211 ,Controls Non-secure access of the interrupt with ID211" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS210 ,Controls Non-secure access of the interrupt with ID210" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS209 ,Controls Non-secure access of the interrupt with ID209" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS208 ,Controls Non-secure access of the interrupt with ID208" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE34++0x03
hide.long 0x00 "GICD_NSACR13,Non-secure Access Control Register 13"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE38)))
group.long 0xE38++0x03
line.long 0x00 "GICD_NSACR14,Non-secure Access Control Register 14"
bitfld.long 0x00 30.--31. " NS_ACCESS239 ,Controls Non-secure access of the interrupt with ID239" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS238 ,Controls Non-secure access of the interrupt with ID238" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS237 ,Controls Non-secure access of the interrupt with ID237" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS236 ,Controls Non-secure access of the interrupt with ID236" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS235 ,Controls Non-secure access of the interrupt with ID235" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS234 ,Controls Non-secure access of the interrupt with ID234" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS233 ,Controls Non-secure access of the interrupt with ID233" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS232 ,Controls Non-secure access of the interrupt with ID232" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS231 ,Controls Non-secure access of the interrupt with ID231" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS230 ,Controls Non-secure access of the interrupt with ID230" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS229 ,Controls Non-secure access of the interrupt with ID229" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS228 ,Controls Non-secure access of the interrupt with ID228" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS227 ,Controls Non-secure access of the interrupt with ID227" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS226 ,Controls Non-secure access of the interrupt with ID226" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS225 ,Controls Non-secure access of the interrupt with ID225" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS224 ,Controls Non-secure access of the interrupt with ID224" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE38++0x03
hide.long 0x00 "GICD_NSACR14,Non-secure Access Control Register 14"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE3C)))
group.long 0xE3C++0x03
line.long 0x00 "GICD_NSACR15,Non-secure Access Control Register 15"
bitfld.long 0x00 30.--31. " NS_ACCESS255 ,Controls Non-secure access of the interrupt with ID255" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS254 ,Controls Non-secure access of the interrupt with ID254" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS253 ,Controls Non-secure access of the interrupt with ID253" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS252 ,Controls Non-secure access of the interrupt with ID252" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS251 ,Controls Non-secure access of the interrupt with ID251" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS250 ,Controls Non-secure access of the interrupt with ID250" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS249 ,Controls Non-secure access of the interrupt with ID249" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS248 ,Controls Non-secure access of the interrupt with ID248" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS247 ,Controls Non-secure access of the interrupt with ID247" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS246 ,Controls Non-secure access of the interrupt with ID246" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS245 ,Controls Non-secure access of the interrupt with ID245" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS244 ,Controls Non-secure access of the interrupt with ID244" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS243 ,Controls Non-secure access of the interrupt with ID243" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS242 ,Controls Non-secure access of the interrupt with ID242" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS241 ,Controls Non-secure access of the interrupt with ID241" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS240 ,Controls Non-secure access of the interrupt with ID240" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE3C++0x03
hide.long 0x00 "GICD_NSACR15,Non-secure Access Control Register 15"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE40)))
group.long 0xE40++0x03
line.long 0x00 "GICD_NSACR16,Non-secure Access Control Register 16"
bitfld.long 0x00 30.--31. " NS_ACCESS271 ,Controls Non-secure access of the interrupt with ID271" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS270 ,Controls Non-secure access of the interrupt with ID270" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS269 ,Controls Non-secure access of the interrupt with ID269" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS268 ,Controls Non-secure access of the interrupt with ID268" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS267 ,Controls Non-secure access of the interrupt with ID267" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS266 ,Controls Non-secure access of the interrupt with ID266" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS265 ,Controls Non-secure access of the interrupt with ID265" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS264 ,Controls Non-secure access of the interrupt with ID264" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS263 ,Controls Non-secure access of the interrupt with ID263" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS262 ,Controls Non-secure access of the interrupt with ID262" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS261 ,Controls Non-secure access of the interrupt with ID261" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS260 ,Controls Non-secure access of the interrupt with ID260" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS259 ,Controls Non-secure access of the interrupt with ID259" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS258 ,Controls Non-secure access of the interrupt with ID258" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS257 ,Controls Non-secure access of the interrupt with ID257" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS256 ,Controls Non-secure access of the interrupt with ID256" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE40++0x03
hide.long 0x00 "GICD_NSACR16,Non-secure Access Control Register 16"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE44)))
group.long 0xE44++0x03
line.long 0x00 "GICD_NSACR17,Non-secure Access Control Register 17"
bitfld.long 0x00 30.--31. " NS_ACCESS287 ,Controls Non-secure access of the interrupt with ID287" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS286 ,Controls Non-secure access of the interrupt with ID286" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS285 ,Controls Non-secure access of the interrupt with ID285" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS284 ,Controls Non-secure access of the interrupt with ID284" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS283 ,Controls Non-secure access of the interrupt with ID283" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS282 ,Controls Non-secure access of the interrupt with ID282" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS281 ,Controls Non-secure access of the interrupt with ID281" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS280 ,Controls Non-secure access of the interrupt with ID280" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS279 ,Controls Non-secure access of the interrupt with ID279" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS278 ,Controls Non-secure access of the interrupt with ID278" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS277 ,Controls Non-secure access of the interrupt with ID277" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS276 ,Controls Non-secure access of the interrupt with ID276" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS275 ,Controls Non-secure access of the interrupt with ID275" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS274 ,Controls Non-secure access of the interrupt with ID274" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS273 ,Controls Non-secure access of the interrupt with ID273" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS272 ,Controls Non-secure access of the interrupt with ID272" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE44++0x03
hide.long 0x00 "GICD_NSACR17,Non-secure Access Control Register 17"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE48)))
group.long 0xE48++0x03
line.long 0x00 "GICD_NSACR18,Non-secure Access Control Register 18"
bitfld.long 0x00 30.--31. " NS_ACCESS303 ,Controls Non-secure access of the interrupt with ID303" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS302 ,Controls Non-secure access of the interrupt with ID302" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS301 ,Controls Non-secure access of the interrupt with ID301" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS300 ,Controls Non-secure access of the interrupt with ID300" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS299 ,Controls Non-secure access of the interrupt with ID299" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS298 ,Controls Non-secure access of the interrupt with ID298" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS297 ,Controls Non-secure access of the interrupt with ID297" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS296 ,Controls Non-secure access of the interrupt with ID296" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS295 ,Controls Non-secure access of the interrupt with ID295" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS294 ,Controls Non-secure access of the interrupt with ID294" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS293 ,Controls Non-secure access of the interrupt with ID293" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS292 ,Controls Non-secure access of the interrupt with ID292" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS291 ,Controls Non-secure access of the interrupt with ID291" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS290 ,Controls Non-secure access of the interrupt with ID290" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS289 ,Controls Non-secure access of the interrupt with ID289" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS288 ,Controls Non-secure access of the interrupt with ID288" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE48++0x03
hide.long 0x00 "GICD_NSACR18,Non-secure Access Control Register 18"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE4C)))
group.long 0xE4C++0x03
line.long 0x00 "GICD_NSACR19,Non-secure Access Control Register 19"
bitfld.long 0x00 30.--31. " NS_ACCESS319 ,Controls Non-secure access of the interrupt with ID319" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS318 ,Controls Non-secure access of the interrupt with ID318" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS317 ,Controls Non-secure access of the interrupt with ID317" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS316 ,Controls Non-secure access of the interrupt with ID316" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS315 ,Controls Non-secure access of the interrupt with ID315" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS314 ,Controls Non-secure access of the interrupt with ID314" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS313 ,Controls Non-secure access of the interrupt with ID313" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS312 ,Controls Non-secure access of the interrupt with ID312" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS311 ,Controls Non-secure access of the interrupt with ID311" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS310 ,Controls Non-secure access of the interrupt with ID310" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS309 ,Controls Non-secure access of the interrupt with ID309" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS308 ,Controls Non-secure access of the interrupt with ID308" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS307 ,Controls Non-secure access of the interrupt with ID307" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS306 ,Controls Non-secure access of the interrupt with ID306" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS305 ,Controls Non-secure access of the interrupt with ID305" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS304 ,Controls Non-secure access of the interrupt with ID304" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE4C++0x03
hide.long 0x00 "GICD_NSACR19,Non-secure Access Control Register 19"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE50)))
group.long 0xE50++0x03
line.long 0x00 "GICD_NSACR20,Non-secure Access Control Register 20"
bitfld.long 0x00 30.--31. " NS_ACCESS335 ,Controls Non-secure access of the interrupt with ID335" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS334 ,Controls Non-secure access of the interrupt with ID334" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS333 ,Controls Non-secure access of the interrupt with ID333" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS332 ,Controls Non-secure access of the interrupt with ID332" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS331 ,Controls Non-secure access of the interrupt with ID331" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS330 ,Controls Non-secure access of the interrupt with ID330" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS329 ,Controls Non-secure access of the interrupt with ID329" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS328 ,Controls Non-secure access of the interrupt with ID328" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS327 ,Controls Non-secure access of the interrupt with ID327" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS326 ,Controls Non-secure access of the interrupt with ID326" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS325 ,Controls Non-secure access of the interrupt with ID325" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS324 ,Controls Non-secure access of the interrupt with ID324" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS323 ,Controls Non-secure access of the interrupt with ID323" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS322 ,Controls Non-secure access of the interrupt with ID322" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS321 ,Controls Non-secure access of the interrupt with ID321" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS320 ,Controls Non-secure access of the interrupt with ID320" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE50++0x03
hide.long 0x00 "GICD_NSACR20,Non-secure Access Control Register 20"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE54)))
group.long 0xE54++0x03
line.long 0x00 "GICD_NSACR21,Non-secure Access Control Register 21"
bitfld.long 0x00 30.--31. " NS_ACCESS351 ,Controls Non-secure access of the interrupt with ID351" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS350 ,Controls Non-secure access of the interrupt with ID350" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS349 ,Controls Non-secure access of the interrupt with ID349" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS348 ,Controls Non-secure access of the interrupt with ID348" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS347 ,Controls Non-secure access of the interrupt with ID347" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS346 ,Controls Non-secure access of the interrupt with ID346" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS345 ,Controls Non-secure access of the interrupt with ID345" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS344 ,Controls Non-secure access of the interrupt with ID344" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS343 ,Controls Non-secure access of the interrupt with ID343" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS342 ,Controls Non-secure access of the interrupt with ID342" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS341 ,Controls Non-secure access of the interrupt with ID341" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS340 ,Controls Non-secure access of the interrupt with ID340" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS339 ,Controls Non-secure access of the interrupt with ID339" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS338 ,Controls Non-secure access of the interrupt with ID338" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS337 ,Controls Non-secure access of the interrupt with ID337" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS336 ,Controls Non-secure access of the interrupt with ID336" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE54++0x03
hide.long 0x00 "GICD_NSACR21,Non-secure Access Control Register 21"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE58)))
group.long 0xE58++0x03
line.long 0x00 "GICD_NSACR22,Non-secure Access Control Register 22"
bitfld.long 0x00 30.--31. " NS_ACCESS367 ,Controls Non-secure access of the interrupt with ID367" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS366 ,Controls Non-secure access of the interrupt with ID366" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS365 ,Controls Non-secure access of the interrupt with ID365" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS364 ,Controls Non-secure access of the interrupt with ID364" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS363 ,Controls Non-secure access of the interrupt with ID363" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS362 ,Controls Non-secure access of the interrupt with ID362" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS361 ,Controls Non-secure access of the interrupt with ID361" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS360 ,Controls Non-secure access of the interrupt with ID360" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS359 ,Controls Non-secure access of the interrupt with ID359" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS358 ,Controls Non-secure access of the interrupt with ID358" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS357 ,Controls Non-secure access of the interrupt with ID357" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS356 ,Controls Non-secure access of the interrupt with ID356" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS355 ,Controls Non-secure access of the interrupt with ID355" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS354 ,Controls Non-secure access of the interrupt with ID354" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS353 ,Controls Non-secure access of the interrupt with ID353" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS352 ,Controls Non-secure access of the interrupt with ID352" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE58++0x03
hide.long 0x00 "GICD_NSACR22,Non-secure Access Control Register 22"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE5C)))
group.long 0xE5C++0x03
line.long 0x00 "GICD_NSACR23,Non-secure Access Control Register 23"
bitfld.long 0x00 30.--31. " NS_ACCESS383 ,Controls Non-secure access of the interrupt with ID383" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS382 ,Controls Non-secure access of the interrupt with ID382" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS381 ,Controls Non-secure access of the interrupt with ID381" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS380 ,Controls Non-secure access of the interrupt with ID380" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS379 ,Controls Non-secure access of the interrupt with ID379" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS378 ,Controls Non-secure access of the interrupt with ID378" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS377 ,Controls Non-secure access of the interrupt with ID377" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS376 ,Controls Non-secure access of the interrupt with ID376" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS375 ,Controls Non-secure access of the interrupt with ID375" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS374 ,Controls Non-secure access of the interrupt with ID374" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS373 ,Controls Non-secure access of the interrupt with ID373" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS372 ,Controls Non-secure access of the interrupt with ID372" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS371 ,Controls Non-secure access of the interrupt with ID371" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS370 ,Controls Non-secure access of the interrupt with ID370" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS369 ,Controls Non-secure access of the interrupt with ID369" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS368 ,Controls Non-secure access of the interrupt with ID368" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE5C++0x03
hide.long 0x00 "GICD_NSACR23,Non-secure Access Control Register 23"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE60)))
group.long 0xE60++0x03
line.long 0x00 "GICD_NSACR24,Non-secure Access Control Register 24"
bitfld.long 0x00 30.--31. " NS_ACCESS399 ,Controls Non-secure access of the interrupt with ID399" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS398 ,Controls Non-secure access of the interrupt with ID398" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS397 ,Controls Non-secure access of the interrupt with ID397" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS396 ,Controls Non-secure access of the interrupt with ID396" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS395 ,Controls Non-secure access of the interrupt with ID395" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS394 ,Controls Non-secure access of the interrupt with ID394" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS393 ,Controls Non-secure access of the interrupt with ID393" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS392 ,Controls Non-secure access of the interrupt with ID392" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS391 ,Controls Non-secure access of the interrupt with ID391" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS390 ,Controls Non-secure access of the interrupt with ID390" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS389 ,Controls Non-secure access of the interrupt with ID389" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS388 ,Controls Non-secure access of the interrupt with ID388" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS387 ,Controls Non-secure access of the interrupt with ID387" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS386 ,Controls Non-secure access of the interrupt with ID386" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS385 ,Controls Non-secure access of the interrupt with ID385" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS384 ,Controls Non-secure access of the interrupt with ID384" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE60++0x03
hide.long 0x00 "GICD_NSACR24,Non-secure Access Control Register 24"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE64)))
group.long 0xE64++0x03
line.long 0x00 "GICD_NSACR25,Non-secure Access Control Register 25"
bitfld.long 0x00 30.--31. " NS_ACCESS415 ,Controls Non-secure access of the interrupt with ID415" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS414 ,Controls Non-secure access of the interrupt with ID414" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS413 ,Controls Non-secure access of the interrupt with ID413" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS412 ,Controls Non-secure access of the interrupt with ID412" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS411 ,Controls Non-secure access of the interrupt with ID411" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS410 ,Controls Non-secure access of the interrupt with ID410" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS409 ,Controls Non-secure access of the interrupt with ID409" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS408 ,Controls Non-secure access of the interrupt with ID408" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS407 ,Controls Non-secure access of the interrupt with ID407" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS406 ,Controls Non-secure access of the interrupt with ID406" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS405 ,Controls Non-secure access of the interrupt with ID405" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS404 ,Controls Non-secure access of the interrupt with ID404" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS403 ,Controls Non-secure access of the interrupt with ID403" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS402 ,Controls Non-secure access of the interrupt with ID402" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS401 ,Controls Non-secure access of the interrupt with ID401" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS400 ,Controls Non-secure access of the interrupt with ID400" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE64++0x03
hide.long 0x00 "GICD_NSACR25,Non-secure Access Control Register 25"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE68)))
group.long 0xE68++0x03
line.long 0x00 "GICD_NSACR26,Non-secure Access Control Register 26"
bitfld.long 0x00 30.--31. " NS_ACCESS431 ,Controls Non-secure access of the interrupt with ID431" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS430 ,Controls Non-secure access of the interrupt with ID430" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS429 ,Controls Non-secure access of the interrupt with ID429" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS428 ,Controls Non-secure access of the interrupt with ID428" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS427 ,Controls Non-secure access of the interrupt with ID427" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS426 ,Controls Non-secure access of the interrupt with ID426" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS425 ,Controls Non-secure access of the interrupt with ID425" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS424 ,Controls Non-secure access of the interrupt with ID424" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS423 ,Controls Non-secure access of the interrupt with ID423" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS422 ,Controls Non-secure access of the interrupt with ID422" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS421 ,Controls Non-secure access of the interrupt with ID421" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS420 ,Controls Non-secure access of the interrupt with ID420" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS419 ,Controls Non-secure access of the interrupt with ID419" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS418 ,Controls Non-secure access of the interrupt with ID418" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS417 ,Controls Non-secure access of the interrupt with ID417" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS416 ,Controls Non-secure access of the interrupt with ID416" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE68++0x03
hide.long 0x00 "GICD_NSACR26,Non-secure Access Control Register 26"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE6C)))
group.long 0xE6C++0x03
line.long 0x00 "GICD_NSACR27,Non-secure Access Control Register 27"
bitfld.long 0x00 30.--31. " NS_ACCESS447 ,Controls Non-secure access of the interrupt with ID447" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS446 ,Controls Non-secure access of the interrupt with ID446" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS445 ,Controls Non-secure access of the interrupt with ID445" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS444 ,Controls Non-secure access of the interrupt with ID444" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS443 ,Controls Non-secure access of the interrupt with ID443" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS442 ,Controls Non-secure access of the interrupt with ID442" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS441 ,Controls Non-secure access of the interrupt with ID441" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS440 ,Controls Non-secure access of the interrupt with ID440" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS439 ,Controls Non-secure access of the interrupt with ID439" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS438 ,Controls Non-secure access of the interrupt with ID438" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS437 ,Controls Non-secure access of the interrupt with ID437" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS436 ,Controls Non-secure access of the interrupt with ID436" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS435 ,Controls Non-secure access of the interrupt with ID435" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS434 ,Controls Non-secure access of the interrupt with ID434" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS433 ,Controls Non-secure access of the interrupt with ID433" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS432 ,Controls Non-secure access of the interrupt with ID432" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE6C++0x03
hide.long 0x00 "GICD_NSACR27,Non-secure Access Control Register 27"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE70)))
group.long 0xE70++0x03
line.long 0x00 "GICD_NSACR28,Non-secure Access Control Register 28"
bitfld.long 0x00 30.--31. " NS_ACCESS463 ,Controls Non-secure access of the interrupt with ID463" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS462 ,Controls Non-secure access of the interrupt with ID462" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS461 ,Controls Non-secure access of the interrupt with ID461" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS460 ,Controls Non-secure access of the interrupt with ID460" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS459 ,Controls Non-secure access of the interrupt with ID459" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS458 ,Controls Non-secure access of the interrupt with ID458" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS457 ,Controls Non-secure access of the interrupt with ID457" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS456 ,Controls Non-secure access of the interrupt with ID456" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS455 ,Controls Non-secure access of the interrupt with ID455" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS454 ,Controls Non-secure access of the interrupt with ID454" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS453 ,Controls Non-secure access of the interrupt with ID453" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS452 ,Controls Non-secure access of the interrupt with ID452" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS451 ,Controls Non-secure access of the interrupt with ID451" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS450 ,Controls Non-secure access of the interrupt with ID450" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS449 ,Controls Non-secure access of the interrupt with ID449" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS448 ,Controls Non-secure access of the interrupt with ID448" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE70++0x03
hide.long 0x00 "GICD_NSACR28,Non-secure Access Control Register 28"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE74)))
group.long 0xE74++0x03
line.long 0x00 "GICD_NSACR29,Non-secure Access Control Register 29"
bitfld.long 0x00 30.--31. " NS_ACCESS479 ,Controls Non-secure access of the interrupt with ID479" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS478 ,Controls Non-secure access of the interrupt with ID478" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS477 ,Controls Non-secure access of the interrupt with ID477" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS476 ,Controls Non-secure access of the interrupt with ID476" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS475 ,Controls Non-secure access of the interrupt with ID475" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS474 ,Controls Non-secure access of the interrupt with ID474" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS473 ,Controls Non-secure access of the interrupt with ID473" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS472 ,Controls Non-secure access of the interrupt with ID472" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS471 ,Controls Non-secure access of the interrupt with ID471" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS470 ,Controls Non-secure access of the interrupt with ID470" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS469 ,Controls Non-secure access of the interrupt with ID469" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS468 ,Controls Non-secure access of the interrupt with ID468" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS467 ,Controls Non-secure access of the interrupt with ID467" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS466 ,Controls Non-secure access of the interrupt with ID466" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS465 ,Controls Non-secure access of the interrupt with ID465" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS464 ,Controls Non-secure access of the interrupt with ID464" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE74++0x03
hide.long 0x00 "GICD_NSACR29,Non-secure Access Control Register 29"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE78)))
group.long 0xE78++0x03
line.long 0x00 "GICD_NSACR30,Non-secure Access Control Register 30"
bitfld.long 0x00 30.--31. " NS_ACCESS495 ,Controls Non-secure access of the interrupt with ID495" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS494 ,Controls Non-secure access of the interrupt with ID494" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS493 ,Controls Non-secure access of the interrupt with ID493" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS492 ,Controls Non-secure access of the interrupt with ID492" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS491 ,Controls Non-secure access of the interrupt with ID491" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS490 ,Controls Non-secure access of the interrupt with ID490" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS489 ,Controls Non-secure access of the interrupt with ID489" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS488 ,Controls Non-secure access of the interrupt with ID488" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS487 ,Controls Non-secure access of the interrupt with ID487" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS486 ,Controls Non-secure access of the interrupt with ID486" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS485 ,Controls Non-secure access of the interrupt with ID485" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS484 ,Controls Non-secure access of the interrupt with ID484" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS483 ,Controls Non-secure access of the interrupt with ID483" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS482 ,Controls Non-secure access of the interrupt with ID482" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS481 ,Controls Non-secure access of the interrupt with ID481" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS480 ,Controls Non-secure access of the interrupt with ID480" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE78++0x03
hide.long 0x00 "GICD_NSACR30,Non-secure Access Control Register 30"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE7C)))
group.long 0xE7C++0x03
line.long 0x00 "GICD_NSACR31,Non-secure Access Control Register 31"
bitfld.long 0x00 30.--31. " NS_ACCESS511 ,Controls Non-secure access of the interrupt with ID511" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS510 ,Controls Non-secure access of the interrupt with ID510" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS509 ,Controls Non-secure access of the interrupt with ID509" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS508 ,Controls Non-secure access of the interrupt with ID508" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS507 ,Controls Non-secure access of the interrupt with ID507" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS506 ,Controls Non-secure access of the interrupt with ID506" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS505 ,Controls Non-secure access of the interrupt with ID505" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS504 ,Controls Non-secure access of the interrupt with ID504" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS503 ,Controls Non-secure access of the interrupt with ID503" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS502 ,Controls Non-secure access of the interrupt with ID502" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS501 ,Controls Non-secure access of the interrupt with ID501" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS500 ,Controls Non-secure access of the interrupt with ID500" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS499 ,Controls Non-secure access of the interrupt with ID499" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS498 ,Controls Non-secure access of the interrupt with ID498" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS497 ,Controls Non-secure access of the interrupt with ID497" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS496 ,Controls Non-secure access of the interrupt with ID496" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE7C++0x03
hide.long 0x00 "GICD_NSACR31,Non-secure Access Control Register 31"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE80)))
group.long 0xE80++0x03
line.long 0x00 "GICD_NSACR32,Non-secure Access Control Register 32"
bitfld.long 0x00 30.--31. " NS_ACCESS527 ,Controls Non-secure access of the interrupt with ID527" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS526 ,Controls Non-secure access of the interrupt with ID526" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS525 ,Controls Non-secure access of the interrupt with ID525" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS524 ,Controls Non-secure access of the interrupt with ID524" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS523 ,Controls Non-secure access of the interrupt with ID523" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS522 ,Controls Non-secure access of the interrupt with ID522" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS521 ,Controls Non-secure access of the interrupt with ID521" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS520 ,Controls Non-secure access of the interrupt with ID520" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS519 ,Controls Non-secure access of the interrupt with ID519" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS518 ,Controls Non-secure access of the interrupt with ID518" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS517 ,Controls Non-secure access of the interrupt with ID517" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS516 ,Controls Non-secure access of the interrupt with ID516" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS515 ,Controls Non-secure access of the interrupt with ID515" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS514 ,Controls Non-secure access of the interrupt with ID514" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS513 ,Controls Non-secure access of the interrupt with ID513" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS512 ,Controls Non-secure access of the interrupt with ID512" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE80++0x03
hide.long 0x00 "GICD_NSACR32,Non-secure Access Control Register 32"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE84)))
group.long 0xE84++0x03
line.long 0x00 "GICD_NSACR33,Non-secure Access Control Register 33"
bitfld.long 0x00 30.--31. " NS_ACCESS543 ,Controls Non-secure access of the interrupt with ID543" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS542 ,Controls Non-secure access of the interrupt with ID542" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS541 ,Controls Non-secure access of the interrupt with ID541" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS540 ,Controls Non-secure access of the interrupt with ID540" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS539 ,Controls Non-secure access of the interrupt with ID539" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS538 ,Controls Non-secure access of the interrupt with ID538" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS537 ,Controls Non-secure access of the interrupt with ID537" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS536 ,Controls Non-secure access of the interrupt with ID536" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS535 ,Controls Non-secure access of the interrupt with ID535" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS534 ,Controls Non-secure access of the interrupt with ID534" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS533 ,Controls Non-secure access of the interrupt with ID533" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS532 ,Controls Non-secure access of the interrupt with ID532" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS531 ,Controls Non-secure access of the interrupt with ID531" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS530 ,Controls Non-secure access of the interrupt with ID530" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS529 ,Controls Non-secure access of the interrupt with ID529" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS528 ,Controls Non-secure access of the interrupt with ID528" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE84++0x03
hide.long 0x00 "GICD_NSACR33,Non-secure Access Control Register 33"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE88)))
group.long 0xE88++0x03
line.long 0x00 "GICD_NSACR34,Non-secure Access Control Register 34"
bitfld.long 0x00 30.--31. " NS_ACCESS559 ,Controls Non-secure access of the interrupt with ID559" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS558 ,Controls Non-secure access of the interrupt with ID558" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS557 ,Controls Non-secure access of the interrupt with ID557" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS556 ,Controls Non-secure access of the interrupt with ID556" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS555 ,Controls Non-secure access of the interrupt with ID555" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS554 ,Controls Non-secure access of the interrupt with ID554" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS553 ,Controls Non-secure access of the interrupt with ID553" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS552 ,Controls Non-secure access of the interrupt with ID552" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS551 ,Controls Non-secure access of the interrupt with ID551" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS550 ,Controls Non-secure access of the interrupt with ID550" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS549 ,Controls Non-secure access of the interrupt with ID549" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS548 ,Controls Non-secure access of the interrupt with ID548" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS547 ,Controls Non-secure access of the interrupt with ID547" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS546 ,Controls Non-secure access of the interrupt with ID546" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS545 ,Controls Non-secure access of the interrupt with ID545" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS544 ,Controls Non-secure access of the interrupt with ID544" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE88++0x03
hide.long 0x00 "GICD_NSACR34,Non-secure Access Control Register 34"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE8C)))
group.long 0xE8C++0x03
line.long 0x00 "GICD_NSACR35,Non-secure Access Control Register 35"
bitfld.long 0x00 30.--31. " NS_ACCESS575 ,Controls Non-secure access of the interrupt with ID575" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS574 ,Controls Non-secure access of the interrupt with ID574" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS573 ,Controls Non-secure access of the interrupt with ID573" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS572 ,Controls Non-secure access of the interrupt with ID572" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS571 ,Controls Non-secure access of the interrupt with ID571" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS570 ,Controls Non-secure access of the interrupt with ID570" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS569 ,Controls Non-secure access of the interrupt with ID569" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS568 ,Controls Non-secure access of the interrupt with ID568" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS567 ,Controls Non-secure access of the interrupt with ID567" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS566 ,Controls Non-secure access of the interrupt with ID566" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS565 ,Controls Non-secure access of the interrupt with ID565" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS564 ,Controls Non-secure access of the interrupt with ID564" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS563 ,Controls Non-secure access of the interrupt with ID563" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS562 ,Controls Non-secure access of the interrupt with ID562" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS561 ,Controls Non-secure access of the interrupt with ID561" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS560 ,Controls Non-secure access of the interrupt with ID560" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE8C++0x03
hide.long 0x00 "GICD_NSACR35,Non-secure Access Control Register 35"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE90)))
group.long 0xE90++0x03
line.long 0x00 "GICD_NSACR36,Non-secure Access Control Register 36"
bitfld.long 0x00 30.--31. " NS_ACCESS591 ,Controls Non-secure access of the interrupt with ID591" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS590 ,Controls Non-secure access of the interrupt with ID590" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS589 ,Controls Non-secure access of the interrupt with ID589" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS588 ,Controls Non-secure access of the interrupt with ID588" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS587 ,Controls Non-secure access of the interrupt with ID587" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS586 ,Controls Non-secure access of the interrupt with ID586" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS585 ,Controls Non-secure access of the interrupt with ID585" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS584 ,Controls Non-secure access of the interrupt with ID584" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS583 ,Controls Non-secure access of the interrupt with ID583" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS582 ,Controls Non-secure access of the interrupt with ID582" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS581 ,Controls Non-secure access of the interrupt with ID581" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS580 ,Controls Non-secure access of the interrupt with ID580" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS579 ,Controls Non-secure access of the interrupt with ID579" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS578 ,Controls Non-secure access of the interrupt with ID578" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS577 ,Controls Non-secure access of the interrupt with ID577" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS576 ,Controls Non-secure access of the interrupt with ID576" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE90++0x03
hide.long 0x00 "GICD_NSACR36,Non-secure Access Control Register 36"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE94)))
group.long 0xE94++0x03
line.long 0x00 "GICD_NSACR37,Non-secure Access Control Register 37"
bitfld.long 0x00 30.--31. " NS_ACCESS607 ,Controls Non-secure access of the interrupt with ID607" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS606 ,Controls Non-secure access of the interrupt with ID606" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS605 ,Controls Non-secure access of the interrupt with ID605" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS604 ,Controls Non-secure access of the interrupt with ID604" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS603 ,Controls Non-secure access of the interrupt with ID603" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS602 ,Controls Non-secure access of the interrupt with ID602" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS601 ,Controls Non-secure access of the interrupt with ID601" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS600 ,Controls Non-secure access of the interrupt with ID600" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS599 ,Controls Non-secure access of the interrupt with ID599" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS598 ,Controls Non-secure access of the interrupt with ID598" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS597 ,Controls Non-secure access of the interrupt with ID597" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS596 ,Controls Non-secure access of the interrupt with ID596" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS595 ,Controls Non-secure access of the interrupt with ID595" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS594 ,Controls Non-secure access of the interrupt with ID594" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS593 ,Controls Non-secure access of the interrupt with ID593" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS592 ,Controls Non-secure access of the interrupt with ID592" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE94++0x03
hide.long 0x00 "GICD_NSACR37,Non-secure Access Control Register 37"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE98)))
group.long 0xE98++0x03
line.long 0x00 "GICD_NSACR38,Non-secure Access Control Register 38"
bitfld.long 0x00 30.--31. " NS_ACCESS623 ,Controls Non-secure access of the interrupt with ID623" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS622 ,Controls Non-secure access of the interrupt with ID622" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS621 ,Controls Non-secure access of the interrupt with ID621" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS620 ,Controls Non-secure access of the interrupt with ID620" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS619 ,Controls Non-secure access of the interrupt with ID619" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS618 ,Controls Non-secure access of the interrupt with ID618" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS617 ,Controls Non-secure access of the interrupt with ID617" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS616 ,Controls Non-secure access of the interrupt with ID616" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS615 ,Controls Non-secure access of the interrupt with ID615" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS614 ,Controls Non-secure access of the interrupt with ID614" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS613 ,Controls Non-secure access of the interrupt with ID613" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS612 ,Controls Non-secure access of the interrupt with ID612" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS611 ,Controls Non-secure access of the interrupt with ID611" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS610 ,Controls Non-secure access of the interrupt with ID610" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS609 ,Controls Non-secure access of the interrupt with ID609" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS608 ,Controls Non-secure access of the interrupt with ID608" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE98++0x03
hide.long 0x00 "GICD_NSACR38,Non-secure Access Control Register 38"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE9C)))
group.long 0xE9C++0x03
line.long 0x00 "GICD_NSACR39,Non-secure Access Control Register 39"
bitfld.long 0x00 30.--31. " NS_ACCESS639 ,Controls Non-secure access of the interrupt with ID639" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS638 ,Controls Non-secure access of the interrupt with ID638" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS637 ,Controls Non-secure access of the interrupt with ID637" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS636 ,Controls Non-secure access of the interrupt with ID636" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS635 ,Controls Non-secure access of the interrupt with ID635" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS634 ,Controls Non-secure access of the interrupt with ID634" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS633 ,Controls Non-secure access of the interrupt with ID633" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS632 ,Controls Non-secure access of the interrupt with ID632" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS631 ,Controls Non-secure access of the interrupt with ID631" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS630 ,Controls Non-secure access of the interrupt with ID630" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS629 ,Controls Non-secure access of the interrupt with ID629" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS628 ,Controls Non-secure access of the interrupt with ID628" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS627 ,Controls Non-secure access of the interrupt with ID627" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS626 ,Controls Non-secure access of the interrupt with ID626" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS625 ,Controls Non-secure access of the interrupt with ID625" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS624 ,Controls Non-secure access of the interrupt with ID624" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE9C++0x03
hide.long 0x00 "GICD_NSACR39,Non-secure Access Control Register 39"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEA0)))
group.long 0xEA0++0x03
line.long 0x00 "GICD_NSACR40,Non-secure Access Control Register 40"
bitfld.long 0x00 30.--31. " NS_ACCESS655 ,Controls Non-secure access of the interrupt with ID655" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS654 ,Controls Non-secure access of the interrupt with ID654" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS653 ,Controls Non-secure access of the interrupt with ID653" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS652 ,Controls Non-secure access of the interrupt with ID652" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS651 ,Controls Non-secure access of the interrupt with ID651" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS650 ,Controls Non-secure access of the interrupt with ID650" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS649 ,Controls Non-secure access of the interrupt with ID649" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS648 ,Controls Non-secure access of the interrupt with ID648" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS647 ,Controls Non-secure access of the interrupt with ID647" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS646 ,Controls Non-secure access of the interrupt with ID646" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS645 ,Controls Non-secure access of the interrupt with ID645" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS644 ,Controls Non-secure access of the interrupt with ID644" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS643 ,Controls Non-secure access of the interrupt with ID643" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS642 ,Controls Non-secure access of the interrupt with ID642" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS641 ,Controls Non-secure access of the interrupt with ID641" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS640 ,Controls Non-secure access of the interrupt with ID640" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEA0++0x03
hide.long 0x00 "GICD_NSACR40,Non-secure Access Control Register 40"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEA4)))
group.long 0xEA4++0x03
line.long 0x00 "GICD_NSACR41,Non-secure Access Control Register 41"
bitfld.long 0x00 30.--31. " NS_ACCESS671 ,Controls Non-secure access of the interrupt with ID671" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS670 ,Controls Non-secure access of the interrupt with ID670" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS669 ,Controls Non-secure access of the interrupt with ID669" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS668 ,Controls Non-secure access of the interrupt with ID668" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS667 ,Controls Non-secure access of the interrupt with ID667" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS666 ,Controls Non-secure access of the interrupt with ID666" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS665 ,Controls Non-secure access of the interrupt with ID665" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS664 ,Controls Non-secure access of the interrupt with ID664" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS663 ,Controls Non-secure access of the interrupt with ID663" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS662 ,Controls Non-secure access of the interrupt with ID662" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS661 ,Controls Non-secure access of the interrupt with ID661" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS660 ,Controls Non-secure access of the interrupt with ID660" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS659 ,Controls Non-secure access of the interrupt with ID659" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS658 ,Controls Non-secure access of the interrupt with ID658" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS657 ,Controls Non-secure access of the interrupt with ID657" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS656 ,Controls Non-secure access of the interrupt with ID656" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEA4++0x03
hide.long 0x00 "GICD_NSACR41,Non-secure Access Control Register 41"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEA8)))
group.long 0xEA8++0x03
line.long 0x00 "GICD_NSACR42,Non-secure Access Control Register 42"
bitfld.long 0x00 30.--31. " NS_ACCESS687 ,Controls Non-secure access of the interrupt with ID687" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS686 ,Controls Non-secure access of the interrupt with ID686" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS685 ,Controls Non-secure access of the interrupt with ID685" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS684 ,Controls Non-secure access of the interrupt with ID684" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS683 ,Controls Non-secure access of the interrupt with ID683" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS682 ,Controls Non-secure access of the interrupt with ID682" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS681 ,Controls Non-secure access of the interrupt with ID681" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS680 ,Controls Non-secure access of the interrupt with ID680" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS679 ,Controls Non-secure access of the interrupt with ID679" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS678 ,Controls Non-secure access of the interrupt with ID678" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS677 ,Controls Non-secure access of the interrupt with ID677" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS676 ,Controls Non-secure access of the interrupt with ID676" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS675 ,Controls Non-secure access of the interrupt with ID675" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS674 ,Controls Non-secure access of the interrupt with ID674" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS673 ,Controls Non-secure access of the interrupt with ID673" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS672 ,Controls Non-secure access of the interrupt with ID672" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEA8++0x03
hide.long 0x00 "GICD_NSACR42,Non-secure Access Control Register 42"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEAC)))
group.long 0xEAC++0x03
line.long 0x00 "GICD_NSACR43,Non-secure Access Control Register 43"
bitfld.long 0x00 30.--31. " NS_ACCESS703 ,Controls Non-secure access of the interrupt with ID703" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS702 ,Controls Non-secure access of the interrupt with ID702" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS701 ,Controls Non-secure access of the interrupt with ID701" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS700 ,Controls Non-secure access of the interrupt with ID700" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS699 ,Controls Non-secure access of the interrupt with ID699" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS698 ,Controls Non-secure access of the interrupt with ID698" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS697 ,Controls Non-secure access of the interrupt with ID697" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS696 ,Controls Non-secure access of the interrupt with ID696" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS695 ,Controls Non-secure access of the interrupt with ID695" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS694 ,Controls Non-secure access of the interrupt with ID694" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS693 ,Controls Non-secure access of the interrupt with ID693" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS692 ,Controls Non-secure access of the interrupt with ID692" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS691 ,Controls Non-secure access of the interrupt with ID691" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS690 ,Controls Non-secure access of the interrupt with ID690" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS689 ,Controls Non-secure access of the interrupt with ID689" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS688 ,Controls Non-secure access of the interrupt with ID688" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEAC++0x03
hide.long 0x00 "GICD_NSACR43,Non-secure Access Control Register 43"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEB0)))
group.long 0xEB0++0x03
line.long 0x00 "GICD_NSACR44,Non-secure Access Control Register 44"
bitfld.long 0x00 30.--31. " NS_ACCESS719 ,Controls Non-secure access of the interrupt with ID719" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS718 ,Controls Non-secure access of the interrupt with ID718" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS717 ,Controls Non-secure access of the interrupt with ID717" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS716 ,Controls Non-secure access of the interrupt with ID716" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS715 ,Controls Non-secure access of the interrupt with ID715" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS714 ,Controls Non-secure access of the interrupt with ID714" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS713 ,Controls Non-secure access of the interrupt with ID713" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS712 ,Controls Non-secure access of the interrupt with ID712" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS711 ,Controls Non-secure access of the interrupt with ID711" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS710 ,Controls Non-secure access of the interrupt with ID710" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS709 ,Controls Non-secure access of the interrupt with ID709" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS708 ,Controls Non-secure access of the interrupt with ID708" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS707 ,Controls Non-secure access of the interrupt with ID707" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS706 ,Controls Non-secure access of the interrupt with ID706" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS705 ,Controls Non-secure access of the interrupt with ID705" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS704 ,Controls Non-secure access of the interrupt with ID704" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEB0++0x03
hide.long 0x00 "GICD_NSACR44,Non-secure Access Control Register 44"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEB4)))
group.long 0xEB4++0x03
line.long 0x00 "GICD_NSACR45,Non-secure Access Control Register 45"
bitfld.long 0x00 30.--31. " NS_ACCESS735 ,Controls Non-secure access of the interrupt with ID735" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS734 ,Controls Non-secure access of the interrupt with ID734" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS733 ,Controls Non-secure access of the interrupt with ID733" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS732 ,Controls Non-secure access of the interrupt with ID732" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS731 ,Controls Non-secure access of the interrupt with ID731" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS730 ,Controls Non-secure access of the interrupt with ID730" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS729 ,Controls Non-secure access of the interrupt with ID729" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS728 ,Controls Non-secure access of the interrupt with ID728" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS727 ,Controls Non-secure access of the interrupt with ID727" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS726 ,Controls Non-secure access of the interrupt with ID726" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS725 ,Controls Non-secure access of the interrupt with ID725" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS724 ,Controls Non-secure access of the interrupt with ID724" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS723 ,Controls Non-secure access of the interrupt with ID723" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS722 ,Controls Non-secure access of the interrupt with ID722" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS721 ,Controls Non-secure access of the interrupt with ID721" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS720 ,Controls Non-secure access of the interrupt with ID720" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEB4++0x03
hide.long 0x00 "GICD_NSACR45,Non-secure Access Control Register 45"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEB8)))
group.long 0xEB8++0x03
line.long 0x00 "GICD_NSACR46,Non-secure Access Control Register 46"
bitfld.long 0x00 30.--31. " NS_ACCESS751 ,Controls Non-secure access of the interrupt with ID751" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS750 ,Controls Non-secure access of the interrupt with ID750" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS749 ,Controls Non-secure access of the interrupt with ID749" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS748 ,Controls Non-secure access of the interrupt with ID748" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS747 ,Controls Non-secure access of the interrupt with ID747" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS746 ,Controls Non-secure access of the interrupt with ID746" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS745 ,Controls Non-secure access of the interrupt with ID745" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS744 ,Controls Non-secure access of the interrupt with ID744" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS743 ,Controls Non-secure access of the interrupt with ID743" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS742 ,Controls Non-secure access of the interrupt with ID742" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS741 ,Controls Non-secure access of the interrupt with ID741" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS740 ,Controls Non-secure access of the interrupt with ID740" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS739 ,Controls Non-secure access of the interrupt with ID739" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS738 ,Controls Non-secure access of the interrupt with ID738" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS737 ,Controls Non-secure access of the interrupt with ID737" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS736 ,Controls Non-secure access of the interrupt with ID736" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEB8++0x03
hide.long 0x00 "GICD_NSACR46,Non-secure Access Control Register 46"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEBC)))
group.long 0xEBC++0x03
line.long 0x00 "GICD_NSACR47,Non-secure Access Control Register 47"
bitfld.long 0x00 30.--31. " NS_ACCESS767 ,Controls Non-secure access of the interrupt with ID767" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS766 ,Controls Non-secure access of the interrupt with ID766" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS765 ,Controls Non-secure access of the interrupt with ID765" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS764 ,Controls Non-secure access of the interrupt with ID764" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS763 ,Controls Non-secure access of the interrupt with ID763" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS762 ,Controls Non-secure access of the interrupt with ID762" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS761 ,Controls Non-secure access of the interrupt with ID761" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS760 ,Controls Non-secure access of the interrupt with ID760" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS759 ,Controls Non-secure access of the interrupt with ID759" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS758 ,Controls Non-secure access of the interrupt with ID758" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS757 ,Controls Non-secure access of the interrupt with ID757" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS756 ,Controls Non-secure access of the interrupt with ID756" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS755 ,Controls Non-secure access of the interrupt with ID755" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS754 ,Controls Non-secure access of the interrupt with ID754" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS753 ,Controls Non-secure access of the interrupt with ID753" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS752 ,Controls Non-secure access of the interrupt with ID752" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEBC++0x03
hide.long 0x00 "GICD_NSACR47,Non-secure Access Control Register 47"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEC0)))
group.long 0xEC0++0x03
line.long 0x00 "GICD_NSACR48,Non-secure Access Control Register 48"
bitfld.long 0x00 30.--31. " NS_ACCESS783 ,Controls Non-secure access of the interrupt with ID783" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS782 ,Controls Non-secure access of the interrupt with ID782" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS781 ,Controls Non-secure access of the interrupt with ID781" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS780 ,Controls Non-secure access of the interrupt with ID780" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS779 ,Controls Non-secure access of the interrupt with ID779" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS778 ,Controls Non-secure access of the interrupt with ID778" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS777 ,Controls Non-secure access of the interrupt with ID777" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS776 ,Controls Non-secure access of the interrupt with ID776" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS775 ,Controls Non-secure access of the interrupt with ID775" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS774 ,Controls Non-secure access of the interrupt with ID774" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS773 ,Controls Non-secure access of the interrupt with ID773" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS772 ,Controls Non-secure access of the interrupt with ID772" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS771 ,Controls Non-secure access of the interrupt with ID771" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS770 ,Controls Non-secure access of the interrupt with ID770" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS769 ,Controls Non-secure access of the interrupt with ID769" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS768 ,Controls Non-secure access of the interrupt with ID768" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEC0++0x03
hide.long 0x00 "GICD_NSACR48,Non-secure Access Control Register 48"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEC4)))
group.long 0xEC4++0x03
line.long 0x00 "GICD_NSACR49,Non-secure Access Control Register 49"
bitfld.long 0x00 30.--31. " NS_ACCESS799 ,Controls Non-secure access of the interrupt with ID799" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS798 ,Controls Non-secure access of the interrupt with ID798" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS797 ,Controls Non-secure access of the interrupt with ID797" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS796 ,Controls Non-secure access of the interrupt with ID796" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS795 ,Controls Non-secure access of the interrupt with ID795" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS794 ,Controls Non-secure access of the interrupt with ID794" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS793 ,Controls Non-secure access of the interrupt with ID793" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS792 ,Controls Non-secure access of the interrupt with ID792" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS791 ,Controls Non-secure access of the interrupt with ID791" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS790 ,Controls Non-secure access of the interrupt with ID790" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS789 ,Controls Non-secure access of the interrupt with ID789" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS788 ,Controls Non-secure access of the interrupt with ID788" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS787 ,Controls Non-secure access of the interrupt with ID787" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS786 ,Controls Non-secure access of the interrupt with ID786" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS785 ,Controls Non-secure access of the interrupt with ID785" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS784 ,Controls Non-secure access of the interrupt with ID784" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEC4++0x03
hide.long 0x00 "GICD_NSACR49,Non-secure Access Control Register 49"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEC8)))
group.long 0xEC8++0x03
line.long 0x00 "GICD_NSACR50,Non-secure Access Control Register 50"
bitfld.long 0x00 30.--31. " NS_ACCESS815 ,Controls Non-secure access of the interrupt with ID815" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS814 ,Controls Non-secure access of the interrupt with ID814" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS813 ,Controls Non-secure access of the interrupt with ID813" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS812 ,Controls Non-secure access of the interrupt with ID812" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS811 ,Controls Non-secure access of the interrupt with ID811" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS810 ,Controls Non-secure access of the interrupt with ID810" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS809 ,Controls Non-secure access of the interrupt with ID809" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS808 ,Controls Non-secure access of the interrupt with ID808" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS807 ,Controls Non-secure access of the interrupt with ID807" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS806 ,Controls Non-secure access of the interrupt with ID806" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS805 ,Controls Non-secure access of the interrupt with ID805" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS804 ,Controls Non-secure access of the interrupt with ID804" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS803 ,Controls Non-secure access of the interrupt with ID803" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS802 ,Controls Non-secure access of the interrupt with ID802" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS801 ,Controls Non-secure access of the interrupt with ID801" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS800 ,Controls Non-secure access of the interrupt with ID800" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEC8++0x03
hide.long 0x00 "GICD_NSACR50,Non-secure Access Control Register 50"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xECC)))
group.long 0xECC++0x03
line.long 0x00 "GICD_NSACR51,Non-secure Access Control Register 51"
bitfld.long 0x00 30.--31. " NS_ACCESS831 ,Controls Non-secure access of the interrupt with ID831" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS830 ,Controls Non-secure access of the interrupt with ID830" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS829 ,Controls Non-secure access of the interrupt with ID829" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS828 ,Controls Non-secure access of the interrupt with ID828" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS827 ,Controls Non-secure access of the interrupt with ID827" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS826 ,Controls Non-secure access of the interrupt with ID826" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS825 ,Controls Non-secure access of the interrupt with ID825" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS824 ,Controls Non-secure access of the interrupt with ID824" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS823 ,Controls Non-secure access of the interrupt with ID823" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS822 ,Controls Non-secure access of the interrupt with ID822" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS821 ,Controls Non-secure access of the interrupt with ID821" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS820 ,Controls Non-secure access of the interrupt with ID820" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS819 ,Controls Non-secure access of the interrupt with ID819" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS818 ,Controls Non-secure access of the interrupt with ID818" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS817 ,Controls Non-secure access of the interrupt with ID817" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS816 ,Controls Non-secure access of the interrupt with ID816" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xECC++0x03
hide.long 0x00 "GICD_NSACR51,Non-secure Access Control Register 51"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xED0)))
group.long 0xED0++0x03
line.long 0x00 "GICD_NSACR52,Non-secure Access Control Register 52"
bitfld.long 0x00 30.--31. " NS_ACCESS847 ,Controls Non-secure access of the interrupt with ID847" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS846 ,Controls Non-secure access of the interrupt with ID846" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS845 ,Controls Non-secure access of the interrupt with ID845" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS844 ,Controls Non-secure access of the interrupt with ID844" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS843 ,Controls Non-secure access of the interrupt with ID843" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS842 ,Controls Non-secure access of the interrupt with ID842" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS841 ,Controls Non-secure access of the interrupt with ID841" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS840 ,Controls Non-secure access of the interrupt with ID840" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS839 ,Controls Non-secure access of the interrupt with ID839" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS838 ,Controls Non-secure access of the interrupt with ID838" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS837 ,Controls Non-secure access of the interrupt with ID837" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS836 ,Controls Non-secure access of the interrupt with ID836" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS835 ,Controls Non-secure access of the interrupt with ID835" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS834 ,Controls Non-secure access of the interrupt with ID834" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS833 ,Controls Non-secure access of the interrupt with ID833" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS832 ,Controls Non-secure access of the interrupt with ID832" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xED0++0x03
hide.long 0x00 "GICD_NSACR52,Non-secure Access Control Register 52"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xED4)))
group.long 0xED4++0x03
line.long 0x00 "GICD_NSACR53,Non-secure Access Control Register 53"
bitfld.long 0x00 30.--31. " NS_ACCESS863 ,Controls Non-secure access of the interrupt with ID863" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS862 ,Controls Non-secure access of the interrupt with ID862" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS861 ,Controls Non-secure access of the interrupt with ID861" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS860 ,Controls Non-secure access of the interrupt with ID860" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS859 ,Controls Non-secure access of the interrupt with ID859" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS858 ,Controls Non-secure access of the interrupt with ID858" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS857 ,Controls Non-secure access of the interrupt with ID857" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS856 ,Controls Non-secure access of the interrupt with ID856" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS855 ,Controls Non-secure access of the interrupt with ID855" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS854 ,Controls Non-secure access of the interrupt with ID854" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS853 ,Controls Non-secure access of the interrupt with ID853" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS852 ,Controls Non-secure access of the interrupt with ID852" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS851 ,Controls Non-secure access of the interrupt with ID851" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS850 ,Controls Non-secure access of the interrupt with ID850" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS849 ,Controls Non-secure access of the interrupt with ID849" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS848 ,Controls Non-secure access of the interrupt with ID848" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xED4++0x03
hide.long 0x00 "GICD_NSACR53,Non-secure Access Control Register 53"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xED8)))
group.long 0xED8++0x03
line.long 0x00 "GICD_NSACR54,Non-secure Access Control Register 54"
bitfld.long 0x00 30.--31. " NS_ACCESS879 ,Controls Non-secure access of the interrupt with ID879" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS878 ,Controls Non-secure access of the interrupt with ID878" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS877 ,Controls Non-secure access of the interrupt with ID877" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS876 ,Controls Non-secure access of the interrupt with ID876" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS875 ,Controls Non-secure access of the interrupt with ID875" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS874 ,Controls Non-secure access of the interrupt with ID874" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS873 ,Controls Non-secure access of the interrupt with ID873" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS872 ,Controls Non-secure access of the interrupt with ID872" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS871 ,Controls Non-secure access of the interrupt with ID871" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS870 ,Controls Non-secure access of the interrupt with ID870" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS869 ,Controls Non-secure access of the interrupt with ID869" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS868 ,Controls Non-secure access of the interrupt with ID868" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS867 ,Controls Non-secure access of the interrupt with ID867" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS866 ,Controls Non-secure access of the interrupt with ID866" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS865 ,Controls Non-secure access of the interrupt with ID865" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS864 ,Controls Non-secure access of the interrupt with ID864" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xED8++0x03
hide.long 0x00 "GICD_NSACR54,Non-secure Access Control Register 54"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEDC)))
group.long 0xEDC++0x03
line.long 0x00 "GICD_NSACR55,Non-secure Access Control Register 55"
bitfld.long 0x00 30.--31. " NS_ACCESS895 ,Controls Non-secure access of the interrupt with ID895" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS894 ,Controls Non-secure access of the interrupt with ID894" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS893 ,Controls Non-secure access of the interrupt with ID893" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS892 ,Controls Non-secure access of the interrupt with ID892" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS891 ,Controls Non-secure access of the interrupt with ID891" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS890 ,Controls Non-secure access of the interrupt with ID890" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS889 ,Controls Non-secure access of the interrupt with ID889" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS888 ,Controls Non-secure access of the interrupt with ID888" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS887 ,Controls Non-secure access of the interrupt with ID887" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS886 ,Controls Non-secure access of the interrupt with ID886" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS885 ,Controls Non-secure access of the interrupt with ID885" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS884 ,Controls Non-secure access of the interrupt with ID884" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS883 ,Controls Non-secure access of the interrupt with ID883" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS882 ,Controls Non-secure access of the interrupt with ID882" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS881 ,Controls Non-secure access of the interrupt with ID881" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS880 ,Controls Non-secure access of the interrupt with ID880" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEDC++0x03
hide.long 0x00 "GICD_NSACR55,Non-secure Access Control Register 55"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEE0)))
group.long 0xEE0++0x03
line.long 0x00 "GICD_NSACR56,Non-secure Access Control Register 56"
bitfld.long 0x00 30.--31. " NS_ACCESS911 ,Controls Non-secure access of the interrupt with ID911" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS910 ,Controls Non-secure access of the interrupt with ID910" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS909 ,Controls Non-secure access of the interrupt with ID909" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS908 ,Controls Non-secure access of the interrupt with ID908" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS907 ,Controls Non-secure access of the interrupt with ID907" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS906 ,Controls Non-secure access of the interrupt with ID906" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS905 ,Controls Non-secure access of the interrupt with ID905" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS904 ,Controls Non-secure access of the interrupt with ID904" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS903 ,Controls Non-secure access of the interrupt with ID903" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS902 ,Controls Non-secure access of the interrupt with ID902" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS901 ,Controls Non-secure access of the interrupt with ID901" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS900 ,Controls Non-secure access of the interrupt with ID900" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS899 ,Controls Non-secure access of the interrupt with ID899" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS898 ,Controls Non-secure access of the interrupt with ID898" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS897 ,Controls Non-secure access of the interrupt with ID897" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS896 ,Controls Non-secure access of the interrupt with ID896" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEE0++0x03
hide.long 0x00 "GICD_NSACR56,Non-secure Access Control Register 56"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEE4)))
group.long 0xEE4++0x03
line.long 0x00 "GICD_NSACR57,Non-secure Access Control Register 57"
bitfld.long 0x00 30.--31. " NS_ACCESS927 ,Controls Non-secure access of the interrupt with ID927" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS926 ,Controls Non-secure access of the interrupt with ID926" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS925 ,Controls Non-secure access of the interrupt with ID925" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS924 ,Controls Non-secure access of the interrupt with ID924" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS923 ,Controls Non-secure access of the interrupt with ID923" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS922 ,Controls Non-secure access of the interrupt with ID922" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS921 ,Controls Non-secure access of the interrupt with ID921" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS920 ,Controls Non-secure access of the interrupt with ID920" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS919 ,Controls Non-secure access of the interrupt with ID919" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS918 ,Controls Non-secure access of the interrupt with ID918" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS917 ,Controls Non-secure access of the interrupt with ID917" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS916 ,Controls Non-secure access of the interrupt with ID916" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS915 ,Controls Non-secure access of the interrupt with ID915" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS914 ,Controls Non-secure access of the interrupt with ID914" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS913 ,Controls Non-secure access of the interrupt with ID913" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS912 ,Controls Non-secure access of the interrupt with ID912" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEE4++0x03
hide.long 0x00 "GICD_NSACR57,Non-secure Access Control Register 57"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEE8)))
group.long 0xEE8++0x03
line.long 0x00 "GICD_NSACR58,Non-secure Access Control Register 58"
bitfld.long 0x00 30.--31. " NS_ACCESS943 ,Controls Non-secure access of the interrupt with ID943" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS942 ,Controls Non-secure access of the interrupt with ID942" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS941 ,Controls Non-secure access of the interrupt with ID941" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS940 ,Controls Non-secure access of the interrupt with ID940" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS939 ,Controls Non-secure access of the interrupt with ID939" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS938 ,Controls Non-secure access of the interrupt with ID938" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS937 ,Controls Non-secure access of the interrupt with ID937" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS936 ,Controls Non-secure access of the interrupt with ID936" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS935 ,Controls Non-secure access of the interrupt with ID935" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS934 ,Controls Non-secure access of the interrupt with ID934" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS933 ,Controls Non-secure access of the interrupt with ID933" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS932 ,Controls Non-secure access of the interrupt with ID932" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS931 ,Controls Non-secure access of the interrupt with ID931" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS930 ,Controls Non-secure access of the interrupt with ID930" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS929 ,Controls Non-secure access of the interrupt with ID929" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS928 ,Controls Non-secure access of the interrupt with ID928" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEE8++0x03
hide.long 0x00 "GICD_NSACR58,Non-secure Access Control Register 58"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEEC)))
group.long 0xEEC++0x03
line.long 0x00 "GICD_NSACR59,Non-secure Access Control Register 59"
bitfld.long 0x00 30.--31. " NS_ACCESS959 ,Controls Non-secure access of the interrupt with ID959" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS958 ,Controls Non-secure access of the interrupt with ID958" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS957 ,Controls Non-secure access of the interrupt with ID957" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS956 ,Controls Non-secure access of the interrupt with ID956" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS955 ,Controls Non-secure access of the interrupt with ID955" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS954 ,Controls Non-secure access of the interrupt with ID954" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS953 ,Controls Non-secure access of the interrupt with ID953" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS952 ,Controls Non-secure access of the interrupt with ID952" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS951 ,Controls Non-secure access of the interrupt with ID951" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS950 ,Controls Non-secure access of the interrupt with ID950" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS949 ,Controls Non-secure access of the interrupt with ID949" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS948 ,Controls Non-secure access of the interrupt with ID948" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS947 ,Controls Non-secure access of the interrupt with ID947" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS946 ,Controls Non-secure access of the interrupt with ID946" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS945 ,Controls Non-secure access of the interrupt with ID945" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS944 ,Controls Non-secure access of the interrupt with ID944" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEEC++0x03
hide.long 0x00 "GICD_NSACR59,Non-secure Access Control Register 59"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEF0)))
group.long 0xEF0++0x03
line.long 0x00 "GICD_NSACR60,Non-secure Access Control Register 60"
bitfld.long 0x00 30.--31. " NS_ACCESS975 ,Controls Non-secure access of the interrupt with ID975" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS974 ,Controls Non-secure access of the interrupt with ID974" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS973 ,Controls Non-secure access of the interrupt with ID973" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS972 ,Controls Non-secure access of the interrupt with ID972" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS971 ,Controls Non-secure access of the interrupt with ID971" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS970 ,Controls Non-secure access of the interrupt with ID970" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS969 ,Controls Non-secure access of the interrupt with ID969" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS968 ,Controls Non-secure access of the interrupt with ID968" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS967 ,Controls Non-secure access of the interrupt with ID967" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS966 ,Controls Non-secure access of the interrupt with ID966" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS965 ,Controls Non-secure access of the interrupt with ID965" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS964 ,Controls Non-secure access of the interrupt with ID964" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS963 ,Controls Non-secure access of the interrupt with ID963" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS962 ,Controls Non-secure access of the interrupt with ID962" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS961 ,Controls Non-secure access of the interrupt with ID961" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS960 ,Controls Non-secure access of the interrupt with ID960" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEF0++0x03
hide.long 0x00 "GICD_NSACR60,Non-secure Access Control Register 60"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEF4)))
group.long 0xEF4++0x03
line.long 0x00 "GICD_NSACR61,Non-secure Access Control Register 61"
bitfld.long 0x00 30.--31. " NS_ACCESS991 ,Controls Non-secure access of the interrupt with ID991" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS990 ,Controls Non-secure access of the interrupt with ID990" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS989 ,Controls Non-secure access of the interrupt with ID989" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS988 ,Controls Non-secure access of the interrupt with ID988" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS987 ,Controls Non-secure access of the interrupt with ID987" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS986 ,Controls Non-secure access of the interrupt with ID986" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS985 ,Controls Non-secure access of the interrupt with ID985" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS984 ,Controls Non-secure access of the interrupt with ID984" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS983 ,Controls Non-secure access of the interrupt with ID983" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS982 ,Controls Non-secure access of the interrupt with ID982" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS981 ,Controls Non-secure access of the interrupt with ID981" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS980 ,Controls Non-secure access of the interrupt with ID980" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS979 ,Controls Non-secure access of the interrupt with ID979" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS978 ,Controls Non-secure access of the interrupt with ID978" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS977 ,Controls Non-secure access of the interrupt with ID977" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS976 ,Controls Non-secure access of the interrupt with ID976" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEF4++0x03
hide.long 0x00 "GICD_NSACR61,Non-secure Access Control Register 61"
endif
tree.end
width 25.
tree "Software Generated Interrupt"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x0F00++0x03
hide.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
hgroup.long 0xF10++0x03
hide.long 0x00 "GICD_CLR_PENDSGIR0,SGI Clear Pending Register 0"
hgroup.long 0xF14++0x03
hide.long 0x00 "GICD_CLR_PENDSGIR1,SGI Clear Pending Register 1"
hgroup.long 0xF18++0x03
hide.long 0x00 "GICD_CLR_PENDSGIR2,SGI Clear Pending Register 2"
hgroup.long 0xF1C++0x03
hide.long 0x00 "GICD_CLR_PENDSGIR3,SGI Clear Pending Register 3"
hgroup.long 0xF20++0x03
hide.long 0x00 "GICD_SET_PENDSGIR0,SGI Set Pending Register 0"
hgroup.long 0xF24++0x03
hide.long 0x00 "GICD_SET_PENDSGIR1,SGI Set Pending Register 1"
hgroup.long 0xF28++0x03
hide.long 0x00 "GICD_SET_PENDSGIR2,SGI Set Pending Register 2"
hgroup.long 0xF2C++0x03
hide.long 0x00 "GICD_SET_PENDSGIR3,SGI Set Pending Register 3"
else
wgroup.long 0x0F00++0x03
line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
group.long 0xF10++0x03
line.long 0x00 "GICD_CLR_PENDSGIR0,SGI Clear Pending Register 0"
group.long 0xF14++0x03
line.long 0x00 "GICD_CLR_PENDSGIR1,SGI Clear Pending Register 1"
group.long 0xF18++0x03
line.long 0x00 "GICD_CLR_PENDSGIR2,SGI Clear Pending Register 2"
group.long 0xF1C++0x03
line.long 0x00 "GICD_CLR_PENDSGIR3,SGI Clear Pending Register 3"
group.long 0xF20++0x03
line.long 0x00 "GICD_SET_PENDSGIR0,SGI Set Pending Register 0"
group.long 0xF24++0x03
line.long 0x00 "GICD_SET_PENDSGIR1,SGI Set Pending Register 1"
group.long 0xF28++0x03
line.long 0x00 "GICD_SET_PENDSGIR2,SGI Set Pending Register 2"
group.long 0xF2C++0x03
line.long 0x00 "GICD_SET_PENDSGIR3,SGI Set Pending Register 3"
endif
tree.end
width 24.
tree "Interrupt Routing Registers"
group.quad 0x6100++0x07
line.quad 0x00 "GICD_IROUTER32 ,Interrupt Routing Register 32 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6108++0x07
line.quad 0x00 "GICD_IROUTER33 ,Interrupt Routing Register 33 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6110++0x07
line.quad 0x00 "GICD_IROUTER34 ,Interrupt Routing Register 34 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6118++0x07
line.quad 0x00 "GICD_IROUTER35 ,Interrupt Routing Register 35 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6120++0x07
line.quad 0x00 "GICD_IROUTER36 ,Interrupt Routing Register 36 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6128++0x07
line.quad 0x00 "GICD_IROUTER37 ,Interrupt Routing Register 37 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6130++0x07
line.quad 0x00 "GICD_IROUTER38 ,Interrupt Routing Register 38 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6138++0x07
line.quad 0x00 "GICD_IROUTER39 ,Interrupt Routing Register 39 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6140++0x07
line.quad 0x00 "GICD_IROUTER40 ,Interrupt Routing Register 40 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6148++0x07
line.quad 0x00 "GICD_IROUTER41 ,Interrupt Routing Register 41 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6150++0x07
line.quad 0x00 "GICD_IROUTER42 ,Interrupt Routing Register 42 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6158++0x07
line.quad 0x00 "GICD_IROUTER43 ,Interrupt Routing Register 43 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6160++0x07
line.quad 0x00 "GICD_IROUTER44 ,Interrupt Routing Register 44 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6168++0x07
line.quad 0x00 "GICD_IROUTER45 ,Interrupt Routing Register 45 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6170++0x07
line.quad 0x00 "GICD_IROUTER46 ,Interrupt Routing Register 46 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6178++0x07
line.quad 0x00 "GICD_IROUTER47 ,Interrupt Routing Register 47 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6180++0x07
line.quad 0x00 "GICD_IROUTER48 ,Interrupt Routing Register 48 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6188++0x07
line.quad 0x00 "GICD_IROUTER49 ,Interrupt Routing Register 49 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6190++0x07
line.quad 0x00 "GICD_IROUTER50 ,Interrupt Routing Register 50 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6198++0x07
line.quad 0x00 "GICD_IROUTER51 ,Interrupt Routing Register 51 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61A0++0x07
line.quad 0x00 "GICD_IROUTER52 ,Interrupt Routing Register 52 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61A8++0x07
line.quad 0x00 "GICD_IROUTER53 ,Interrupt Routing Register 53 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61B0++0x07
line.quad 0x00 "GICD_IROUTER54 ,Interrupt Routing Register 54 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61B8++0x07
line.quad 0x00 "GICD_IROUTER55 ,Interrupt Routing Register 55 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61C0++0x07
line.quad 0x00 "GICD_IROUTER56 ,Interrupt Routing Register 56 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61C8++0x07
line.quad 0x00 "GICD_IROUTER57 ,Interrupt Routing Register 57 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61D0++0x07
line.quad 0x00 "GICD_IROUTER58 ,Interrupt Routing Register 58 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61D8++0x07
line.quad 0x00 "GICD_IROUTER59 ,Interrupt Routing Register 59 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61E0++0x07
line.quad 0x00 "GICD_IROUTER60 ,Interrupt Routing Register 60 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61E8++0x07
line.quad 0x00 "GICD_IROUTER61 ,Interrupt Routing Register 61 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61F0++0x07
line.quad 0x00 "GICD_IROUTER62 ,Interrupt Routing Register 62 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61F8++0x07
line.quad 0x00 "GICD_IROUTER63 ,Interrupt Routing Register 63 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6200++0x07
line.quad 0x00 "GICD_IROUTER64 ,Interrupt Routing Register 64 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6208++0x07
line.quad 0x00 "GICD_IROUTER65 ,Interrupt Routing Register 65 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6210++0x07
line.quad 0x00 "GICD_IROUTER66 ,Interrupt Routing Register 66 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6218++0x07
line.quad 0x00 "GICD_IROUTER67 ,Interrupt Routing Register 67 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6220++0x07
line.quad 0x00 "GICD_IROUTER68 ,Interrupt Routing Register 68 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6228++0x07
line.quad 0x00 "GICD_IROUTER69 ,Interrupt Routing Register 69 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6230++0x07
line.quad 0x00 "GICD_IROUTER70 ,Interrupt Routing Register 70 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6238++0x07
line.quad 0x00 "GICD_IROUTER71 ,Interrupt Routing Register 71 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6240++0x07
line.quad 0x00 "GICD_IROUTER72 ,Interrupt Routing Register 72 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6248++0x07
line.quad 0x00 "GICD_IROUTER73 ,Interrupt Routing Register 73 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6250++0x07
line.quad 0x00 "GICD_IROUTER74 ,Interrupt Routing Register 74 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6258++0x07
line.quad 0x00 "GICD_IROUTER75 ,Interrupt Routing Register 75 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6260++0x07
line.quad 0x00 "GICD_IROUTER76 ,Interrupt Routing Register 76 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6268++0x07
line.quad 0x00 "GICD_IROUTER77 ,Interrupt Routing Register 77 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6270++0x07
line.quad 0x00 "GICD_IROUTER78 ,Interrupt Routing Register 78 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6278++0x07
line.quad 0x00 "GICD_IROUTER79 ,Interrupt Routing Register 79 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6280++0x07
line.quad 0x00 "GICD_IROUTER80 ,Interrupt Routing Register 80 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6288++0x07
line.quad 0x00 "GICD_IROUTER81 ,Interrupt Routing Register 81 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6290++0x07
line.quad 0x00 "GICD_IROUTER82 ,Interrupt Routing Register 82 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6298++0x07
line.quad 0x00 "GICD_IROUTER83 ,Interrupt Routing Register 83 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62A0++0x07
line.quad 0x00 "GICD_IROUTER84 ,Interrupt Routing Register 84 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62A8++0x07
line.quad 0x00 "GICD_IROUTER85 ,Interrupt Routing Register 85 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62B0++0x07
line.quad 0x00 "GICD_IROUTER86 ,Interrupt Routing Register 86 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62B8++0x07
line.quad 0x00 "GICD_IROUTER87 ,Interrupt Routing Register 87 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62C0++0x07
line.quad 0x00 "GICD_IROUTER88 ,Interrupt Routing Register 88 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62C8++0x07
line.quad 0x00 "GICD_IROUTER89 ,Interrupt Routing Register 89 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62D0++0x07
line.quad 0x00 "GICD_IROUTER90 ,Interrupt Routing Register 90 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62D8++0x07
line.quad 0x00 "GICD_IROUTER91 ,Interrupt Routing Register 91 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62E0++0x07
line.quad 0x00 "GICD_IROUTER92 ,Interrupt Routing Register 92 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62E8++0x07
line.quad 0x00 "GICD_IROUTER93 ,Interrupt Routing Register 93 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62F0++0x07
line.quad 0x00 "GICD_IROUTER94 ,Interrupt Routing Register 94 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62F8++0x07
line.quad 0x00 "GICD_IROUTER95 ,Interrupt Routing Register 95 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6300++0x07
line.quad 0x00 "GICD_IROUTER96 ,Interrupt Routing Register 96 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6308++0x07
line.quad 0x00 "GICD_IROUTER97 ,Interrupt Routing Register 97 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6310++0x07
line.quad 0x00 "GICD_IROUTER98 ,Interrupt Routing Register 98 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6318++0x07
line.quad 0x00 "GICD_IROUTER99 ,Interrupt Routing Register 99 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6320++0x07
line.quad 0x00 "GICD_IROUTER100,Interrupt Routing Register 100"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6328++0x07
line.quad 0x00 "GICD_IROUTER101,Interrupt Routing Register 101"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6330++0x07
line.quad 0x00 "GICD_IROUTER102,Interrupt Routing Register 102"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6338++0x07
line.quad 0x00 "GICD_IROUTER103,Interrupt Routing Register 103"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6340++0x07
line.quad 0x00 "GICD_IROUTER104,Interrupt Routing Register 104"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6348++0x07
line.quad 0x00 "GICD_IROUTER105,Interrupt Routing Register 105"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6350++0x07
line.quad 0x00 "GICD_IROUTER106,Interrupt Routing Register 106"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6358++0x07
line.quad 0x00 "GICD_IROUTER107,Interrupt Routing Register 107"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6360++0x07
line.quad 0x00 "GICD_IROUTER108,Interrupt Routing Register 108"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6368++0x07
line.quad 0x00 "GICD_IROUTER109,Interrupt Routing Register 109"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6370++0x07
line.quad 0x00 "GICD_IROUTER110,Interrupt Routing Register 110"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6378++0x07
line.quad 0x00 "GICD_IROUTER111,Interrupt Routing Register 111"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6380++0x07
line.quad 0x00 "GICD_IROUTER112,Interrupt Routing Register 112"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6388++0x07
line.quad 0x00 "GICD_IROUTER113,Interrupt Routing Register 113"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6390++0x07
line.quad 0x00 "GICD_IROUTER114,Interrupt Routing Register 114"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6398++0x07
line.quad 0x00 "GICD_IROUTER115,Interrupt Routing Register 115"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63A0++0x07
line.quad 0x00 "GICD_IROUTER116,Interrupt Routing Register 116"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63A8++0x07
line.quad 0x00 "GICD_IROUTER117,Interrupt Routing Register 117"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63B0++0x07
line.quad 0x00 "GICD_IROUTER118,Interrupt Routing Register 118"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63B8++0x07
line.quad 0x00 "GICD_IROUTER119,Interrupt Routing Register 119"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63C0++0x07
line.quad 0x00 "GICD_IROUTER120,Interrupt Routing Register 120"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63C8++0x07
line.quad 0x00 "GICD_IROUTER121,Interrupt Routing Register 121"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63D0++0x07
line.quad 0x00 "GICD_IROUTER122,Interrupt Routing Register 122"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63D8++0x07
line.quad 0x00 "GICD_IROUTER123,Interrupt Routing Register 123"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63E0++0x07
line.quad 0x00 "GICD_IROUTER124,Interrupt Routing Register 124"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63E8++0x07
line.quad 0x00 "GICD_IROUTER125,Interrupt Routing Register 125"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63F0++0x07
line.quad 0x00 "GICD_IROUTER126,Interrupt Routing Register 126"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63F8++0x07
line.quad 0x00 "GICD_IROUTER127,Interrupt Routing Register 127"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6400++0x07
line.quad 0x00 "GICD_IROUTER128,Interrupt Routing Register 128"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6408++0x07
line.quad 0x00 "GICD_IROUTER129,Interrupt Routing Register 129"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6410++0x07
line.quad 0x00 "GICD_IROUTER130,Interrupt Routing Register 130"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6418++0x07
line.quad 0x00 "GICD_IROUTER131,Interrupt Routing Register 131"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6420++0x07
line.quad 0x00 "GICD_IROUTER132,Interrupt Routing Register 132"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6428++0x07
line.quad 0x00 "GICD_IROUTER133,Interrupt Routing Register 133"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6430++0x07
line.quad 0x00 "GICD_IROUTER134,Interrupt Routing Register 134"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6438++0x07
line.quad 0x00 "GICD_IROUTER135,Interrupt Routing Register 135"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6440++0x07
line.quad 0x00 "GICD_IROUTER136,Interrupt Routing Register 136"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6448++0x07
line.quad 0x00 "GICD_IROUTER137,Interrupt Routing Register 137"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6450++0x07
line.quad 0x00 "GICD_IROUTER138,Interrupt Routing Register 138"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6458++0x07
line.quad 0x00 "GICD_IROUTER139,Interrupt Routing Register 139"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6460++0x07
line.quad 0x00 "GICD_IROUTER140,Interrupt Routing Register 140"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6468++0x07
line.quad 0x00 "GICD_IROUTER141,Interrupt Routing Register 141"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6470++0x07
line.quad 0x00 "GICD_IROUTER142,Interrupt Routing Register 142"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6478++0x07
line.quad 0x00 "GICD_IROUTER143,Interrupt Routing Register 143"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6480++0x07
line.quad 0x00 "GICD_IROUTER144,Interrupt Routing Register 144"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6488++0x07
line.quad 0x00 "GICD_IROUTER145,Interrupt Routing Register 145"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6490++0x07
line.quad 0x00 "GICD_IROUTER146,Interrupt Routing Register 146"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6498++0x07
line.quad 0x00 "GICD_IROUTER147,Interrupt Routing Register 147"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64A0++0x07
line.quad 0x00 "GICD_IROUTER148,Interrupt Routing Register 148"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64A8++0x07
line.quad 0x00 "GICD_IROUTER149,Interrupt Routing Register 149"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64B0++0x07
line.quad 0x00 "GICD_IROUTER150,Interrupt Routing Register 150"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64B8++0x07
line.quad 0x00 "GICD_IROUTER151,Interrupt Routing Register 151"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64C0++0x07
line.quad 0x00 "GICD_IROUTER152,Interrupt Routing Register 152"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64C8++0x07
line.quad 0x00 "GICD_IROUTER153,Interrupt Routing Register 153"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64D0++0x07
line.quad 0x00 "GICD_IROUTER154,Interrupt Routing Register 154"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64D8++0x07
line.quad 0x00 "GICD_IROUTER155,Interrupt Routing Register 155"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64E0++0x07
line.quad 0x00 "GICD_IROUTER156,Interrupt Routing Register 156"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64E8++0x07
line.quad 0x00 "GICD_IROUTER157,Interrupt Routing Register 157"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64F0++0x07
line.quad 0x00 "GICD_IROUTER158,Interrupt Routing Register 158"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64F8++0x07
line.quad 0x00 "GICD_IROUTER159,Interrupt Routing Register 159"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6500++0x07
line.quad 0x00 "GICD_IROUTER160,Interrupt Routing Register 160"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6508++0x07
line.quad 0x00 "GICD_IROUTER161,Interrupt Routing Register 161"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6510++0x07
line.quad 0x00 "GICD_IROUTER162,Interrupt Routing Register 162"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6518++0x07
line.quad 0x00 "GICD_IROUTER163,Interrupt Routing Register 163"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6520++0x07
line.quad 0x00 "GICD_IROUTER164,Interrupt Routing Register 164"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6528++0x07
line.quad 0x00 "GICD_IROUTER165,Interrupt Routing Register 165"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6530++0x07
line.quad 0x00 "GICD_IROUTER166,Interrupt Routing Register 166"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6538++0x07
line.quad 0x00 "GICD_IROUTER167,Interrupt Routing Register 167"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6540++0x07
line.quad 0x00 "GICD_IROUTER168,Interrupt Routing Register 168"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6548++0x07
line.quad 0x00 "GICD_IROUTER169,Interrupt Routing Register 169"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6550++0x07
line.quad 0x00 "GICD_IROUTER170,Interrupt Routing Register 170"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6558++0x07
line.quad 0x00 "GICD_IROUTER171,Interrupt Routing Register 171"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6560++0x07
line.quad 0x00 "GICD_IROUTER172,Interrupt Routing Register 172"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6568++0x07
line.quad 0x00 "GICD_IROUTER173,Interrupt Routing Register 173"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6570++0x07
line.quad 0x00 "GICD_IROUTER174,Interrupt Routing Register 174"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6578++0x07
line.quad 0x00 "GICD_IROUTER175,Interrupt Routing Register 175"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6580++0x07
line.quad 0x00 "GICD_IROUTER176,Interrupt Routing Register 176"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6588++0x07
line.quad 0x00 "GICD_IROUTER177,Interrupt Routing Register 177"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6590++0x07
line.quad 0x00 "GICD_IROUTER178,Interrupt Routing Register 178"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6598++0x07
line.quad 0x00 "GICD_IROUTER179,Interrupt Routing Register 179"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65A0++0x07
line.quad 0x00 "GICD_IROUTER180,Interrupt Routing Register 180"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65A8++0x07
line.quad 0x00 "GICD_IROUTER181,Interrupt Routing Register 181"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65B0++0x07
line.quad 0x00 "GICD_IROUTER182,Interrupt Routing Register 182"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65B8++0x07
line.quad 0x00 "GICD_IROUTER183,Interrupt Routing Register 183"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65C0++0x07
line.quad 0x00 "GICD_IROUTER184,Interrupt Routing Register 184"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65C8++0x07
line.quad 0x00 "GICD_IROUTER185,Interrupt Routing Register 185"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65D0++0x07
line.quad 0x00 "GICD_IROUTER186,Interrupt Routing Register 186"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65D8++0x07
line.quad 0x00 "GICD_IROUTER187,Interrupt Routing Register 187"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65E0++0x07
line.quad 0x00 "GICD_IROUTER188,Interrupt Routing Register 188"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65E8++0x07
line.quad 0x00 "GICD_IROUTER189,Interrupt Routing Register 189"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65F0++0x07
line.quad 0x00 "GICD_IROUTER190,Interrupt Routing Register 190"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65F8++0x07
line.quad 0x00 "GICD_IROUTER191,Interrupt Routing Register 191"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6600++0x07
line.quad 0x00 "GICD_IROUTER192,Interrupt Routing Register 192"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6608++0x07
line.quad 0x00 "GICD_IROUTER193,Interrupt Routing Register 193"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6610++0x07
line.quad 0x00 "GICD_IROUTER194,Interrupt Routing Register 194"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6618++0x07
line.quad 0x00 "GICD_IROUTER195,Interrupt Routing Register 195"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6620++0x07
line.quad 0x00 "GICD_IROUTER196,Interrupt Routing Register 196"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6628++0x07
line.quad 0x00 "GICD_IROUTER197,Interrupt Routing Register 197"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6630++0x07
line.quad 0x00 "GICD_IROUTER198,Interrupt Routing Register 198"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6638++0x07
line.quad 0x00 "GICD_IROUTER199,Interrupt Routing Register 199"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6640++0x07
line.quad 0x00 "GICD_IROUTER200,Interrupt Routing Register 200"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6648++0x07
line.quad 0x00 "GICD_IROUTER201,Interrupt Routing Register 201"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6650++0x07
line.quad 0x00 "GICD_IROUTER202,Interrupt Routing Register 202"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6658++0x07
line.quad 0x00 "GICD_IROUTER203,Interrupt Routing Register 203"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6660++0x07
line.quad 0x00 "GICD_IROUTER204,Interrupt Routing Register 204"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6668++0x07
line.quad 0x00 "GICD_IROUTER205,Interrupt Routing Register 205"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6670++0x07
line.quad 0x00 "GICD_IROUTER206,Interrupt Routing Register 206"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6678++0x07
line.quad 0x00 "GICD_IROUTER207,Interrupt Routing Register 207"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6680++0x07
line.quad 0x00 "GICD_IROUTER208,Interrupt Routing Register 208"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6688++0x07
line.quad 0x00 "GICD_IROUTER209,Interrupt Routing Register 209"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6690++0x07
line.quad 0x00 "GICD_IROUTER210,Interrupt Routing Register 210"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6698++0x07
line.quad 0x00 "GICD_IROUTER211,Interrupt Routing Register 211"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66A0++0x07
line.quad 0x00 "GICD_IROUTER212,Interrupt Routing Register 212"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66A8++0x07
line.quad 0x00 "GICD_IROUTER213,Interrupt Routing Register 213"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66B0++0x07
line.quad 0x00 "GICD_IROUTER214,Interrupt Routing Register 214"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66B8++0x07
line.quad 0x00 "GICD_IROUTER215,Interrupt Routing Register 215"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66C0++0x07
line.quad 0x00 "GICD_IROUTER216,Interrupt Routing Register 216"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66C8++0x07
line.quad 0x00 "GICD_IROUTER217,Interrupt Routing Register 217"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66D0++0x07
line.quad 0x00 "GICD_IROUTER218,Interrupt Routing Register 218"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66D8++0x07
line.quad 0x00 "GICD_IROUTER219,Interrupt Routing Register 219"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66E0++0x07
line.quad 0x00 "GICD_IROUTER220,Interrupt Routing Register 220"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66E8++0x07
line.quad 0x00 "GICD_IROUTER221,Interrupt Routing Register 221"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66F0++0x07
line.quad 0x00 "GICD_IROUTER222,Interrupt Routing Register 222"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66F8++0x07
line.quad 0x00 "GICD_IROUTER223,Interrupt Routing Register 223"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6700++0x07
line.quad 0x00 "GICD_IROUTER224,Interrupt Routing Register 224"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6708++0x07
line.quad 0x00 "GICD_IROUTER225,Interrupt Routing Register 225"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6710++0x07
line.quad 0x00 "GICD_IROUTER226,Interrupt Routing Register 226"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6718++0x07
line.quad 0x00 "GICD_IROUTER227,Interrupt Routing Register 227"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6720++0x07
line.quad 0x00 "GICD_IROUTER228,Interrupt Routing Register 228"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6728++0x07
line.quad 0x00 "GICD_IROUTER229,Interrupt Routing Register 229"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6730++0x07
line.quad 0x00 "GICD_IROUTER230,Interrupt Routing Register 230"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6738++0x07
line.quad 0x00 "GICD_IROUTER231,Interrupt Routing Register 231"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6740++0x07
line.quad 0x00 "GICD_IROUTER232,Interrupt Routing Register 232"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6748++0x07
line.quad 0x00 "GICD_IROUTER233,Interrupt Routing Register 233"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6750++0x07
line.quad 0x00 "GICD_IROUTER234,Interrupt Routing Register 234"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6758++0x07
line.quad 0x00 "GICD_IROUTER235,Interrupt Routing Register 235"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6760++0x07
line.quad 0x00 "GICD_IROUTER236,Interrupt Routing Register 236"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6768++0x07
line.quad 0x00 "GICD_IROUTER237,Interrupt Routing Register 237"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6770++0x07
line.quad 0x00 "GICD_IROUTER238,Interrupt Routing Register 238"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6778++0x07
line.quad 0x00 "GICD_IROUTER239,Interrupt Routing Register 239"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6780++0x07
line.quad 0x00 "GICD_IROUTER240,Interrupt Routing Register 240"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6788++0x07
line.quad 0x00 "GICD_IROUTER241,Interrupt Routing Register 241"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6790++0x07
line.quad 0x00 "GICD_IROUTER242,Interrupt Routing Register 242"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6798++0x07
line.quad 0x00 "GICD_IROUTER243,Interrupt Routing Register 243"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67A0++0x07
line.quad 0x00 "GICD_IROUTER244,Interrupt Routing Register 244"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67A8++0x07
line.quad 0x00 "GICD_IROUTER245,Interrupt Routing Register 245"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67B0++0x07
line.quad 0x00 "GICD_IROUTER246,Interrupt Routing Register 246"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67B8++0x07
line.quad 0x00 "GICD_IROUTER247,Interrupt Routing Register 247"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67C0++0x07
line.quad 0x00 "GICD_IROUTER248,Interrupt Routing Register 248"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67C8++0x07
line.quad 0x00 "GICD_IROUTER249,Interrupt Routing Register 249"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67D0++0x07
line.quad 0x00 "GICD_IROUTER250,Interrupt Routing Register 250"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67D8++0x07
line.quad 0x00 "GICD_IROUTER251,Interrupt Routing Register 251"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67E0++0x07
line.quad 0x00 "GICD_IROUTER252,Interrupt Routing Register 252"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67E8++0x07
line.quad 0x00 "GICD_IROUTER253,Interrupt Routing Register 253"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67F0++0x07
line.quad 0x00 "GICD_IROUTER254,Interrupt Routing Register 254"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67F8++0x07
line.quad 0x00 "GICD_IROUTER255,Interrupt Routing Register 255"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6800++0x07
line.quad 0x00 "GICD_IROUTER256,Interrupt Routing Register 256"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6808++0x07
line.quad 0x00 "GICD_IROUTER257,Interrupt Routing Register 257"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6810++0x07
line.quad 0x00 "GICD_IROUTER258,Interrupt Routing Register 258"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6818++0x07
line.quad 0x00 "GICD_IROUTER259,Interrupt Routing Register 259"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6820++0x07
line.quad 0x00 "GICD_IROUTER260,Interrupt Routing Register 260"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6828++0x07
line.quad 0x00 "GICD_IROUTER261,Interrupt Routing Register 261"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6830++0x07
line.quad 0x00 "GICD_IROUTER262,Interrupt Routing Register 262"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6838++0x07
line.quad 0x00 "GICD_IROUTER263,Interrupt Routing Register 263"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6840++0x07
line.quad 0x00 "GICD_IROUTER264,Interrupt Routing Register 264"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6848++0x07
line.quad 0x00 "GICD_IROUTER265,Interrupt Routing Register 265"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6850++0x07
line.quad 0x00 "GICD_IROUTER266,Interrupt Routing Register 266"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6858++0x07
line.quad 0x00 "GICD_IROUTER267,Interrupt Routing Register 267"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6860++0x07
line.quad 0x00 "GICD_IROUTER268,Interrupt Routing Register 268"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6868++0x07
line.quad 0x00 "GICD_IROUTER269,Interrupt Routing Register 269"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6870++0x07
line.quad 0x00 "GICD_IROUTER270,Interrupt Routing Register 270"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6878++0x07
line.quad 0x00 "GICD_IROUTER271,Interrupt Routing Register 271"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6880++0x07
line.quad 0x00 "GICD_IROUTER272,Interrupt Routing Register 272"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6888++0x07
line.quad 0x00 "GICD_IROUTER273,Interrupt Routing Register 273"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6890++0x07
line.quad 0x00 "GICD_IROUTER274,Interrupt Routing Register 274"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6898++0x07
line.quad 0x00 "GICD_IROUTER275,Interrupt Routing Register 275"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68A0++0x07
line.quad 0x00 "GICD_IROUTER276,Interrupt Routing Register 276"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68A8++0x07
line.quad 0x00 "GICD_IROUTER277,Interrupt Routing Register 277"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68B0++0x07
line.quad 0x00 "GICD_IROUTER278,Interrupt Routing Register 278"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68B8++0x07
line.quad 0x00 "GICD_IROUTER279,Interrupt Routing Register 279"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68C0++0x07
line.quad 0x00 "GICD_IROUTER280,Interrupt Routing Register 280"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68C8++0x07
line.quad 0x00 "GICD_IROUTER281,Interrupt Routing Register 281"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68D0++0x07
line.quad 0x00 "GICD_IROUTER282,Interrupt Routing Register 282"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68D8++0x07
line.quad 0x00 "GICD_IROUTER283,Interrupt Routing Register 283"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68E0++0x07
line.quad 0x00 "GICD_IROUTER284,Interrupt Routing Register 284"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68E8++0x07
line.quad 0x00 "GICD_IROUTER285,Interrupt Routing Register 285"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68F0++0x07
line.quad 0x00 "GICD_IROUTER286,Interrupt Routing Register 286"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68F8++0x07
line.quad 0x00 "GICD_IROUTER287,Interrupt Routing Register 287"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6900++0x07
line.quad 0x00 "GICD_IROUTER288,Interrupt Routing Register 288"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6908++0x07
line.quad 0x00 "GICD_IROUTER289,Interrupt Routing Register 289"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6910++0x07
line.quad 0x00 "GICD_IROUTER290,Interrupt Routing Register 290"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6918++0x07
line.quad 0x00 "GICD_IROUTER291,Interrupt Routing Register 291"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6920++0x07
line.quad 0x00 "GICD_IROUTER292,Interrupt Routing Register 292"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6928++0x07
line.quad 0x00 "GICD_IROUTER293,Interrupt Routing Register 293"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6930++0x07
line.quad 0x00 "GICD_IROUTER294,Interrupt Routing Register 294"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6938++0x07
line.quad 0x00 "GICD_IROUTER295,Interrupt Routing Register 295"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6940++0x07
line.quad 0x00 "GICD_IROUTER296,Interrupt Routing Register 296"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6948++0x07
line.quad 0x00 "GICD_IROUTER297,Interrupt Routing Register 297"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6950++0x07
line.quad 0x00 "GICD_IROUTER298,Interrupt Routing Register 298"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6958++0x07
line.quad 0x00 "GICD_IROUTER299,Interrupt Routing Register 299"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6960++0x07
line.quad 0x00 "GICD_IROUTER300,Interrupt Routing Register 300"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6968++0x07
line.quad 0x00 "GICD_IROUTER301,Interrupt Routing Register 301"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6970++0x07
line.quad 0x00 "GICD_IROUTER302,Interrupt Routing Register 302"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6978++0x07
line.quad 0x00 "GICD_IROUTER303,Interrupt Routing Register 303"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6980++0x07
line.quad 0x00 "GICD_IROUTER304,Interrupt Routing Register 304"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6988++0x07
line.quad 0x00 "GICD_IROUTER305,Interrupt Routing Register 305"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6990++0x07
line.quad 0x00 "GICD_IROUTER306,Interrupt Routing Register 306"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6998++0x07
line.quad 0x00 "GICD_IROUTER307,Interrupt Routing Register 307"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69A0++0x07
line.quad 0x00 "GICD_IROUTER308,Interrupt Routing Register 308"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69A8++0x07
line.quad 0x00 "GICD_IROUTER309,Interrupt Routing Register 309"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69B0++0x07
line.quad 0x00 "GICD_IROUTER310,Interrupt Routing Register 310"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69B8++0x07
line.quad 0x00 "GICD_IROUTER311,Interrupt Routing Register 311"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69C0++0x07
line.quad 0x00 "GICD_IROUTER312,Interrupt Routing Register 312"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69C8++0x07
line.quad 0x00 "GICD_IROUTER313,Interrupt Routing Register 313"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69D0++0x07
line.quad 0x00 "GICD_IROUTER314,Interrupt Routing Register 314"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69D8++0x07
line.quad 0x00 "GICD_IROUTER315,Interrupt Routing Register 315"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69E0++0x07
line.quad 0x00 "GICD_IROUTER316,Interrupt Routing Register 316"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69E8++0x07
line.quad 0x00 "GICD_IROUTER317,Interrupt Routing Register 317"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69F0++0x07
line.quad 0x00 "GICD_IROUTER318,Interrupt Routing Register 318"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69F8++0x07
line.quad 0x00 "GICD_IROUTER319,Interrupt Routing Register 319"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A00++0x07
line.quad 0x00 "GICD_IROUTER320,Interrupt Routing Register 320"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A08++0x07
line.quad 0x00 "GICD_IROUTER321,Interrupt Routing Register 321"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A10++0x07
line.quad 0x00 "GICD_IROUTER322,Interrupt Routing Register 322"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A18++0x07
line.quad 0x00 "GICD_IROUTER323,Interrupt Routing Register 323"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A20++0x07
line.quad 0x00 "GICD_IROUTER324,Interrupt Routing Register 324"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A28++0x07
line.quad 0x00 "GICD_IROUTER325,Interrupt Routing Register 325"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A30++0x07
line.quad 0x00 "GICD_IROUTER326,Interrupt Routing Register 326"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A38++0x07
line.quad 0x00 "GICD_IROUTER327,Interrupt Routing Register 327"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A40++0x07
line.quad 0x00 "GICD_IROUTER328,Interrupt Routing Register 328"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A48++0x07
line.quad 0x00 "GICD_IROUTER329,Interrupt Routing Register 329"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A50++0x07
line.quad 0x00 "GICD_IROUTER330,Interrupt Routing Register 330"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A58++0x07
line.quad 0x00 "GICD_IROUTER331,Interrupt Routing Register 331"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A60++0x07
line.quad 0x00 "GICD_IROUTER332,Interrupt Routing Register 332"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A68++0x07
line.quad 0x00 "GICD_IROUTER333,Interrupt Routing Register 333"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A70++0x07
line.quad 0x00 "GICD_IROUTER334,Interrupt Routing Register 334"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A78++0x07
line.quad 0x00 "GICD_IROUTER335,Interrupt Routing Register 335"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A80++0x07
line.quad 0x00 "GICD_IROUTER336,Interrupt Routing Register 336"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A88++0x07
line.quad 0x00 "GICD_IROUTER337,Interrupt Routing Register 337"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A90++0x07
line.quad 0x00 "GICD_IROUTER338,Interrupt Routing Register 338"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A98++0x07
line.quad 0x00 "GICD_IROUTER339,Interrupt Routing Register 339"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AA0++0x07
line.quad 0x00 "GICD_IROUTER340,Interrupt Routing Register 340"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AA8++0x07
line.quad 0x00 "GICD_IROUTER341,Interrupt Routing Register 341"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AB0++0x07
line.quad 0x00 "GICD_IROUTER342,Interrupt Routing Register 342"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AB8++0x07
line.quad 0x00 "GICD_IROUTER343,Interrupt Routing Register 343"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AC0++0x07
line.quad 0x00 "GICD_IROUTER344,Interrupt Routing Register 344"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AC8++0x07
line.quad 0x00 "GICD_IROUTER345,Interrupt Routing Register 345"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AD0++0x07
line.quad 0x00 "GICD_IROUTER346,Interrupt Routing Register 346"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AD8++0x07
line.quad 0x00 "GICD_IROUTER347,Interrupt Routing Register 347"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AE0++0x07
line.quad 0x00 "GICD_IROUTER348,Interrupt Routing Register 348"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AE8++0x07
line.quad 0x00 "GICD_IROUTER349,Interrupt Routing Register 349"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AF0++0x07
line.quad 0x00 "GICD_IROUTER350,Interrupt Routing Register 350"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AF8++0x07
line.quad 0x00 "GICD_IROUTER351,Interrupt Routing Register 351"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B00++0x07
line.quad 0x00 "GICD_IROUTER352,Interrupt Routing Register 352"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B08++0x07
line.quad 0x00 "GICD_IROUTER353,Interrupt Routing Register 353"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B10++0x07
line.quad 0x00 "GICD_IROUTER354,Interrupt Routing Register 354"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B18++0x07
line.quad 0x00 "GICD_IROUTER355,Interrupt Routing Register 355"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B20++0x07
line.quad 0x00 "GICD_IROUTER356,Interrupt Routing Register 356"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B28++0x07
line.quad 0x00 "GICD_IROUTER357,Interrupt Routing Register 357"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B30++0x07
line.quad 0x00 "GICD_IROUTER358,Interrupt Routing Register 358"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B38++0x07
line.quad 0x00 "GICD_IROUTER359,Interrupt Routing Register 359"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B40++0x07
line.quad 0x00 "GICD_IROUTER360,Interrupt Routing Register 360"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B48++0x07
line.quad 0x00 "GICD_IROUTER361,Interrupt Routing Register 361"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B50++0x07
line.quad 0x00 "GICD_IROUTER362,Interrupt Routing Register 362"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B58++0x07
line.quad 0x00 "GICD_IROUTER363,Interrupt Routing Register 363"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B60++0x07
line.quad 0x00 "GICD_IROUTER364,Interrupt Routing Register 364"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B68++0x07
line.quad 0x00 "GICD_IROUTER365,Interrupt Routing Register 365"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B70++0x07
line.quad 0x00 "GICD_IROUTER366,Interrupt Routing Register 366"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B78++0x07
line.quad 0x00 "GICD_IROUTER367,Interrupt Routing Register 367"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B80++0x07
line.quad 0x00 "GICD_IROUTER368,Interrupt Routing Register 368"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B88++0x07
line.quad 0x00 "GICD_IROUTER369,Interrupt Routing Register 369"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B90++0x07
line.quad 0x00 "GICD_IROUTER370,Interrupt Routing Register 370"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B98++0x07
line.quad 0x00 "GICD_IROUTER371,Interrupt Routing Register 371"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BA0++0x07
line.quad 0x00 "GICD_IROUTER372,Interrupt Routing Register 372"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BA8++0x07
line.quad 0x00 "GICD_IROUTER373,Interrupt Routing Register 373"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BB0++0x07
line.quad 0x00 "GICD_IROUTER374,Interrupt Routing Register 374"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BB8++0x07
line.quad 0x00 "GICD_IROUTER375,Interrupt Routing Register 375"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BC0++0x07
line.quad 0x00 "GICD_IROUTER376,Interrupt Routing Register 376"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BC8++0x07
line.quad 0x00 "GICD_IROUTER377,Interrupt Routing Register 377"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BD0++0x07
line.quad 0x00 "GICD_IROUTER378,Interrupt Routing Register 378"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BD8++0x07
line.quad 0x00 "GICD_IROUTER379,Interrupt Routing Register 379"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BE0++0x07
line.quad 0x00 "GICD_IROUTER380,Interrupt Routing Register 380"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BE8++0x07
line.quad 0x00 "GICD_IROUTER381,Interrupt Routing Register 381"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BF0++0x07
line.quad 0x00 "GICD_IROUTER382,Interrupt Routing Register 382"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BF8++0x07
line.quad 0x00 "GICD_IROUTER383,Interrupt Routing Register 383"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C00++0x07
line.quad 0x00 "GICD_IROUTER384,Interrupt Routing Register 384"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C08++0x07
line.quad 0x00 "GICD_IROUTER385,Interrupt Routing Register 385"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C10++0x07
line.quad 0x00 "GICD_IROUTER386,Interrupt Routing Register 386"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C18++0x07
line.quad 0x00 "GICD_IROUTER387,Interrupt Routing Register 387"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C20++0x07
line.quad 0x00 "GICD_IROUTER388,Interrupt Routing Register 388"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C28++0x07
line.quad 0x00 "GICD_IROUTER389,Interrupt Routing Register 389"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C30++0x07
line.quad 0x00 "GICD_IROUTER390,Interrupt Routing Register 390"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C38++0x07
line.quad 0x00 "GICD_IROUTER391,Interrupt Routing Register 391"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C40++0x07
line.quad 0x00 "GICD_IROUTER392,Interrupt Routing Register 392"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C48++0x07
line.quad 0x00 "GICD_IROUTER393,Interrupt Routing Register 393"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C50++0x07
line.quad 0x00 "GICD_IROUTER394,Interrupt Routing Register 394"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C58++0x07
line.quad 0x00 "GICD_IROUTER395,Interrupt Routing Register 395"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C60++0x07
line.quad 0x00 "GICD_IROUTER396,Interrupt Routing Register 396"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C68++0x07
line.quad 0x00 "GICD_IROUTER397,Interrupt Routing Register 397"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C70++0x07
line.quad 0x00 "GICD_IROUTER398,Interrupt Routing Register 398"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C78++0x07
line.quad 0x00 "GICD_IROUTER399,Interrupt Routing Register 399"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C80++0x07
line.quad 0x00 "GICD_IROUTER400,Interrupt Routing Register 400"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C88++0x07
line.quad 0x00 "GICD_IROUTER401,Interrupt Routing Register 401"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C90++0x07
line.quad 0x00 "GICD_IROUTER402,Interrupt Routing Register 402"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C98++0x07
line.quad 0x00 "GICD_IROUTER403,Interrupt Routing Register 403"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CA0++0x07
line.quad 0x00 "GICD_IROUTER404,Interrupt Routing Register 404"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CA8++0x07
line.quad 0x00 "GICD_IROUTER405,Interrupt Routing Register 405"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CB0++0x07
line.quad 0x00 "GICD_IROUTER406,Interrupt Routing Register 406"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CB8++0x07
line.quad 0x00 "GICD_IROUTER407,Interrupt Routing Register 407"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CC0++0x07
line.quad 0x00 "GICD_IROUTER408,Interrupt Routing Register 408"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CC8++0x07
line.quad 0x00 "GICD_IROUTER409,Interrupt Routing Register 409"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CD0++0x07
line.quad 0x00 "GICD_IROUTER410,Interrupt Routing Register 410"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CD8++0x07
line.quad 0x00 "GICD_IROUTER411,Interrupt Routing Register 411"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CE0++0x07
line.quad 0x00 "GICD_IROUTER412,Interrupt Routing Register 412"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CE8++0x07
line.quad 0x00 "GICD_IROUTER413,Interrupt Routing Register 413"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CF0++0x07
line.quad 0x00 "GICD_IROUTER414,Interrupt Routing Register 414"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CF8++0x07
line.quad 0x00 "GICD_IROUTER415,Interrupt Routing Register 415"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D00++0x07
line.quad 0x00 "GICD_IROUTER416,Interrupt Routing Register 416"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D08++0x07
line.quad 0x00 "GICD_IROUTER417,Interrupt Routing Register 417"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D10++0x07
line.quad 0x00 "GICD_IROUTER418,Interrupt Routing Register 418"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D18++0x07
line.quad 0x00 "GICD_IROUTER419,Interrupt Routing Register 419"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D20++0x07
line.quad 0x00 "GICD_IROUTER420,Interrupt Routing Register 420"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D28++0x07
line.quad 0x00 "GICD_IROUTER421,Interrupt Routing Register 421"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D30++0x07
line.quad 0x00 "GICD_IROUTER422,Interrupt Routing Register 422"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D38++0x07
line.quad 0x00 "GICD_IROUTER423,Interrupt Routing Register 423"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D40++0x07
line.quad 0x00 "GICD_IROUTER424,Interrupt Routing Register 424"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D48++0x07
line.quad 0x00 "GICD_IROUTER425,Interrupt Routing Register 425"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D50++0x07
line.quad 0x00 "GICD_IROUTER426,Interrupt Routing Register 426"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D58++0x07
line.quad 0x00 "GICD_IROUTER427,Interrupt Routing Register 427"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D60++0x07
line.quad 0x00 "GICD_IROUTER428,Interrupt Routing Register 428"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D68++0x07
line.quad 0x00 "GICD_IROUTER429,Interrupt Routing Register 429"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D70++0x07
line.quad 0x00 "GICD_IROUTER430,Interrupt Routing Register 430"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D78++0x07
line.quad 0x00 "GICD_IROUTER431,Interrupt Routing Register 431"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D80++0x07
line.quad 0x00 "GICD_IROUTER432,Interrupt Routing Register 432"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D88++0x07
line.quad 0x00 "GICD_IROUTER433,Interrupt Routing Register 433"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D90++0x07
line.quad 0x00 "GICD_IROUTER434,Interrupt Routing Register 434"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D98++0x07
line.quad 0x00 "GICD_IROUTER435,Interrupt Routing Register 435"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DA0++0x07
line.quad 0x00 "GICD_IROUTER436,Interrupt Routing Register 436"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DA8++0x07
line.quad 0x00 "GICD_IROUTER437,Interrupt Routing Register 437"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DB0++0x07
line.quad 0x00 "GICD_IROUTER438,Interrupt Routing Register 438"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DB8++0x07
line.quad 0x00 "GICD_IROUTER439,Interrupt Routing Register 439"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DC0++0x07
line.quad 0x00 "GICD_IROUTER440,Interrupt Routing Register 440"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DC8++0x07
line.quad 0x00 "GICD_IROUTER441,Interrupt Routing Register 441"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DD0++0x07
line.quad 0x00 "GICD_IROUTER442,Interrupt Routing Register 442"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DD8++0x07
line.quad 0x00 "GICD_IROUTER443,Interrupt Routing Register 443"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DE0++0x07
line.quad 0x00 "GICD_IROUTER444,Interrupt Routing Register 444"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DE8++0x07
line.quad 0x00 "GICD_IROUTER445,Interrupt Routing Register 445"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DF0++0x07
line.quad 0x00 "GICD_IROUTER446,Interrupt Routing Register 446"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DF8++0x07
line.quad 0x00 "GICD_IROUTER447,Interrupt Routing Register 447"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E00++0x07
line.quad 0x00 "GICD_IROUTER448,Interrupt Routing Register 448"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E08++0x07
line.quad 0x00 "GICD_IROUTER449,Interrupt Routing Register 449"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E10++0x07
line.quad 0x00 "GICD_IROUTER450,Interrupt Routing Register 450"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E18++0x07
line.quad 0x00 "GICD_IROUTER451,Interrupt Routing Register 451"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E20++0x07
line.quad 0x00 "GICD_IROUTER452,Interrupt Routing Register 452"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E28++0x07
line.quad 0x00 "GICD_IROUTER453,Interrupt Routing Register 453"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E30++0x07
line.quad 0x00 "GICD_IROUTER454,Interrupt Routing Register 454"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E38++0x07
line.quad 0x00 "GICD_IROUTER455,Interrupt Routing Register 455"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E40++0x07
line.quad 0x00 "GICD_IROUTER456,Interrupt Routing Register 456"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E48++0x07
line.quad 0x00 "GICD_IROUTER457,Interrupt Routing Register 457"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E50++0x07
line.quad 0x00 "GICD_IROUTER458,Interrupt Routing Register 458"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E58++0x07
line.quad 0x00 "GICD_IROUTER459,Interrupt Routing Register 459"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E60++0x07
line.quad 0x00 "GICD_IROUTER460,Interrupt Routing Register 460"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E68++0x07
line.quad 0x00 "GICD_IROUTER461,Interrupt Routing Register 461"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E70++0x07
line.quad 0x00 "GICD_IROUTER462,Interrupt Routing Register 462"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E78++0x07
line.quad 0x00 "GICD_IROUTER463,Interrupt Routing Register 463"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E80++0x07
line.quad 0x00 "GICD_IROUTER464,Interrupt Routing Register 464"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E88++0x07
line.quad 0x00 "GICD_IROUTER465,Interrupt Routing Register 465"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E90++0x07
line.quad 0x00 "GICD_IROUTER466,Interrupt Routing Register 466"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E98++0x07
line.quad 0x00 "GICD_IROUTER467,Interrupt Routing Register 467"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EA0++0x07
line.quad 0x00 "GICD_IROUTER468,Interrupt Routing Register 468"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EA8++0x07
line.quad 0x00 "GICD_IROUTER469,Interrupt Routing Register 469"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EB0++0x07
line.quad 0x00 "GICD_IROUTER470,Interrupt Routing Register 470"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EB8++0x07
line.quad 0x00 "GICD_IROUTER471,Interrupt Routing Register 471"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EC0++0x07
line.quad 0x00 "GICD_IROUTER472,Interrupt Routing Register 472"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EC8++0x07
line.quad 0x00 "GICD_IROUTER473,Interrupt Routing Register 473"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6ED0++0x07
line.quad 0x00 "GICD_IROUTER474,Interrupt Routing Register 474"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6ED8++0x07
line.quad 0x00 "GICD_IROUTER475,Interrupt Routing Register 475"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EE0++0x07
line.quad 0x00 "GICD_IROUTER476,Interrupt Routing Register 476"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EE8++0x07
line.quad 0x00 "GICD_IROUTER477,Interrupt Routing Register 477"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EF0++0x07
line.quad 0x00 "GICD_IROUTER478,Interrupt Routing Register 478"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EF8++0x07
line.quad 0x00 "GICD_IROUTER479,Interrupt Routing Register 479"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F00++0x07
line.quad 0x00 "GICD_IROUTER480,Interrupt Routing Register 480"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F08++0x07
line.quad 0x00 "GICD_IROUTER481,Interrupt Routing Register 481"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F10++0x07
line.quad 0x00 "GICD_IROUTER482,Interrupt Routing Register 482"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F18++0x07
line.quad 0x00 "GICD_IROUTER483,Interrupt Routing Register 483"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F20++0x07
line.quad 0x00 "GICD_IROUTER484,Interrupt Routing Register 484"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F28++0x07
line.quad 0x00 "GICD_IROUTER485,Interrupt Routing Register 485"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F30++0x07
line.quad 0x00 "GICD_IROUTER486,Interrupt Routing Register 486"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F38++0x07
line.quad 0x00 "GICD_IROUTER487,Interrupt Routing Register 487"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F40++0x07
line.quad 0x00 "GICD_IROUTER488,Interrupt Routing Register 488"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F48++0x07
line.quad 0x00 "GICD_IROUTER489,Interrupt Routing Register 489"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F50++0x07
line.quad 0x00 "GICD_IROUTER490,Interrupt Routing Register 490"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F58++0x07
line.quad 0x00 "GICD_IROUTER491,Interrupt Routing Register 491"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F60++0x07
line.quad 0x00 "GICD_IROUTER492,Interrupt Routing Register 492"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F68++0x07
line.quad 0x00 "GICD_IROUTER493,Interrupt Routing Register 493"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F70++0x07
line.quad 0x00 "GICD_IROUTER494,Interrupt Routing Register 494"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F78++0x07
line.quad 0x00 "GICD_IROUTER495,Interrupt Routing Register 495"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F80++0x07
line.quad 0x00 "GICD_IROUTER496,Interrupt Routing Register 496"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F88++0x07
line.quad 0x00 "GICD_IROUTER497,Interrupt Routing Register 497"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F90++0x07
line.quad 0x00 "GICD_IROUTER498,Interrupt Routing Register 498"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F98++0x07
line.quad 0x00 "GICD_IROUTER499,Interrupt Routing Register 499"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FA0++0x07
line.quad 0x00 "GICD_IROUTER500,Interrupt Routing Register 500"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FA8++0x07
line.quad 0x00 "GICD_IROUTER501,Interrupt Routing Register 501"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FB0++0x07
line.quad 0x00 "GICD_IROUTER502,Interrupt Routing Register 502"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FB8++0x07
line.quad 0x00 "GICD_IROUTER503,Interrupt Routing Register 503"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FC0++0x07
line.quad 0x00 "GICD_IROUTER504,Interrupt Routing Register 504"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FC8++0x07
line.quad 0x00 "GICD_IROUTER505,Interrupt Routing Register 505"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FD0++0x07
line.quad 0x00 "GICD_IROUTER506,Interrupt Routing Register 506"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FD8++0x07
line.quad 0x00 "GICD_IROUTER507,Interrupt Routing Register 507"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FE0++0x07
line.quad 0x00 "GICD_IROUTER508,Interrupt Routing Register 508"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FE8++0x07
line.quad 0x00 "GICD_IROUTER509,Interrupt Routing Register 509"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FF0++0x07
line.quad 0x00 "GICD_IROUTER510,Interrupt Routing Register 510"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FF8++0x07
line.quad 0x00 "GICD_IROUTER511,Interrupt Routing Register 511"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7000++0x07
line.quad 0x00 "GICD_IROUTER512,Interrupt Routing Register 512"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7008++0x07
line.quad 0x00 "GICD_IROUTER513,Interrupt Routing Register 513"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7010++0x07
line.quad 0x00 "GICD_IROUTER514,Interrupt Routing Register 514"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7018++0x07
line.quad 0x00 "GICD_IROUTER515,Interrupt Routing Register 515"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7020++0x07
line.quad 0x00 "GICD_IROUTER516,Interrupt Routing Register 516"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7028++0x07
line.quad 0x00 "GICD_IROUTER517,Interrupt Routing Register 517"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7030++0x07
line.quad 0x00 "GICD_IROUTER518,Interrupt Routing Register 518"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7038++0x07
line.quad 0x00 "GICD_IROUTER519,Interrupt Routing Register 519"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7040++0x07
line.quad 0x00 "GICD_IROUTER520,Interrupt Routing Register 520"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7048++0x07
line.quad 0x00 "GICD_IROUTER521,Interrupt Routing Register 521"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7050++0x07
line.quad 0x00 "GICD_IROUTER522,Interrupt Routing Register 522"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7058++0x07
line.quad 0x00 "GICD_IROUTER523,Interrupt Routing Register 523"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7060++0x07
line.quad 0x00 "GICD_IROUTER524,Interrupt Routing Register 524"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7068++0x07
line.quad 0x00 "GICD_IROUTER525,Interrupt Routing Register 525"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7070++0x07
line.quad 0x00 "GICD_IROUTER526,Interrupt Routing Register 526"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7078++0x07
line.quad 0x00 "GICD_IROUTER527,Interrupt Routing Register 527"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7080++0x07
line.quad 0x00 "GICD_IROUTER528,Interrupt Routing Register 528"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7088++0x07
line.quad 0x00 "GICD_IROUTER529,Interrupt Routing Register 529"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7090++0x07
line.quad 0x00 "GICD_IROUTER530,Interrupt Routing Register 530"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7098++0x07
line.quad 0x00 "GICD_IROUTER531,Interrupt Routing Register 531"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70A0++0x07
line.quad 0x00 "GICD_IROUTER532,Interrupt Routing Register 532"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70A8++0x07
line.quad 0x00 "GICD_IROUTER533,Interrupt Routing Register 533"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70B0++0x07
line.quad 0x00 "GICD_IROUTER534,Interrupt Routing Register 534"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70B8++0x07
line.quad 0x00 "GICD_IROUTER535,Interrupt Routing Register 535"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70C0++0x07
line.quad 0x00 "GICD_IROUTER536,Interrupt Routing Register 536"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70C8++0x07
line.quad 0x00 "GICD_IROUTER537,Interrupt Routing Register 537"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70D0++0x07
line.quad 0x00 "GICD_IROUTER538,Interrupt Routing Register 538"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70D8++0x07
line.quad 0x00 "GICD_IROUTER539,Interrupt Routing Register 539"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70E0++0x07
line.quad 0x00 "GICD_IROUTER540,Interrupt Routing Register 540"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70E8++0x07
line.quad 0x00 "GICD_IROUTER541,Interrupt Routing Register 541"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70F0++0x07
line.quad 0x00 "GICD_IROUTER542,Interrupt Routing Register 542"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70F8++0x07
line.quad 0x00 "GICD_IROUTER543,Interrupt Routing Register 543"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7100++0x07
line.quad 0x00 "GICD_IROUTER544,Interrupt Routing Register 544"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7108++0x07
line.quad 0x00 "GICD_IROUTER545,Interrupt Routing Register 545"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7110++0x07
line.quad 0x00 "GICD_IROUTER546,Interrupt Routing Register 546"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7118++0x07
line.quad 0x00 "GICD_IROUTER547,Interrupt Routing Register 547"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7120++0x07
line.quad 0x00 "GICD_IROUTER548,Interrupt Routing Register 548"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7128++0x07
line.quad 0x00 "GICD_IROUTER549,Interrupt Routing Register 549"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7130++0x07
line.quad 0x00 "GICD_IROUTER550,Interrupt Routing Register 550"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7138++0x07
line.quad 0x00 "GICD_IROUTER551,Interrupt Routing Register 551"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7140++0x07
line.quad 0x00 "GICD_IROUTER552,Interrupt Routing Register 552"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7148++0x07
line.quad 0x00 "GICD_IROUTER553,Interrupt Routing Register 553"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7150++0x07
line.quad 0x00 "GICD_IROUTER554,Interrupt Routing Register 554"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7158++0x07
line.quad 0x00 "GICD_IROUTER555,Interrupt Routing Register 555"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7160++0x07
line.quad 0x00 "GICD_IROUTER556,Interrupt Routing Register 556"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7168++0x07
line.quad 0x00 "GICD_IROUTER557,Interrupt Routing Register 557"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7170++0x07
line.quad 0x00 "GICD_IROUTER558,Interrupt Routing Register 558"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7178++0x07
line.quad 0x00 "GICD_IROUTER559,Interrupt Routing Register 559"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7180++0x07
line.quad 0x00 "GICD_IROUTER560,Interrupt Routing Register 560"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7188++0x07
line.quad 0x00 "GICD_IROUTER561,Interrupt Routing Register 561"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7190++0x07
line.quad 0x00 "GICD_IROUTER562,Interrupt Routing Register 562"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7198++0x07
line.quad 0x00 "GICD_IROUTER563,Interrupt Routing Register 563"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71A0++0x07
line.quad 0x00 "GICD_IROUTER564,Interrupt Routing Register 564"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71A8++0x07
line.quad 0x00 "GICD_IROUTER565,Interrupt Routing Register 565"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71B0++0x07
line.quad 0x00 "GICD_IROUTER566,Interrupt Routing Register 566"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71B8++0x07
line.quad 0x00 "GICD_IROUTER567,Interrupt Routing Register 567"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71C0++0x07
line.quad 0x00 "GICD_IROUTER568,Interrupt Routing Register 568"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71C8++0x07
line.quad 0x00 "GICD_IROUTER569,Interrupt Routing Register 569"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71D0++0x07
line.quad 0x00 "GICD_IROUTER570,Interrupt Routing Register 570"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71D8++0x07
line.quad 0x00 "GICD_IROUTER571,Interrupt Routing Register 571"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71E0++0x07
line.quad 0x00 "GICD_IROUTER572,Interrupt Routing Register 572"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71E8++0x07
line.quad 0x00 "GICD_IROUTER573,Interrupt Routing Register 573"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71F0++0x07
line.quad 0x00 "GICD_IROUTER574,Interrupt Routing Register 574"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71F8++0x07
line.quad 0x00 "GICD_IROUTER575,Interrupt Routing Register 575"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7200++0x07
line.quad 0x00 "GICD_IROUTER576,Interrupt Routing Register 576"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7208++0x07
line.quad 0x00 "GICD_IROUTER577,Interrupt Routing Register 577"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7210++0x07
line.quad 0x00 "GICD_IROUTER578,Interrupt Routing Register 578"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7218++0x07
line.quad 0x00 "GICD_IROUTER579,Interrupt Routing Register 579"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7220++0x07
line.quad 0x00 "GICD_IROUTER580,Interrupt Routing Register 580"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7228++0x07
line.quad 0x00 "GICD_IROUTER581,Interrupt Routing Register 581"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7230++0x07
line.quad 0x00 "GICD_IROUTER582,Interrupt Routing Register 582"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7238++0x07
line.quad 0x00 "GICD_IROUTER583,Interrupt Routing Register 583"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7240++0x07
line.quad 0x00 "GICD_IROUTER584,Interrupt Routing Register 584"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7248++0x07
line.quad 0x00 "GICD_IROUTER585,Interrupt Routing Register 585"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7250++0x07
line.quad 0x00 "GICD_IROUTER586,Interrupt Routing Register 586"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7258++0x07
line.quad 0x00 "GICD_IROUTER587,Interrupt Routing Register 587"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7260++0x07
line.quad 0x00 "GICD_IROUTER588,Interrupt Routing Register 588"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7268++0x07
line.quad 0x00 "GICD_IROUTER589,Interrupt Routing Register 589"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7270++0x07
line.quad 0x00 "GICD_IROUTER590,Interrupt Routing Register 590"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7278++0x07
line.quad 0x00 "GICD_IROUTER591,Interrupt Routing Register 591"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7280++0x07
line.quad 0x00 "GICD_IROUTER592,Interrupt Routing Register 592"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7288++0x07
line.quad 0x00 "GICD_IROUTER593,Interrupt Routing Register 593"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7290++0x07
line.quad 0x00 "GICD_IROUTER594,Interrupt Routing Register 594"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7298++0x07
line.quad 0x00 "GICD_IROUTER595,Interrupt Routing Register 595"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72A0++0x07
line.quad 0x00 "GICD_IROUTER596,Interrupt Routing Register 596"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72A8++0x07
line.quad 0x00 "GICD_IROUTER597,Interrupt Routing Register 597"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72B0++0x07
line.quad 0x00 "GICD_IROUTER598,Interrupt Routing Register 598"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72B8++0x07
line.quad 0x00 "GICD_IROUTER599,Interrupt Routing Register 599"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72C0++0x07
line.quad 0x00 "GICD_IROUTER600,Interrupt Routing Register 600"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72C8++0x07
line.quad 0x00 "GICD_IROUTER601,Interrupt Routing Register 601"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72D0++0x07
line.quad 0x00 "GICD_IROUTER602,Interrupt Routing Register 602"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72D8++0x07
line.quad 0x00 "GICD_IROUTER603,Interrupt Routing Register 603"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72E0++0x07
line.quad 0x00 "GICD_IROUTER604,Interrupt Routing Register 604"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72E8++0x07
line.quad 0x00 "GICD_IROUTER605,Interrupt Routing Register 605"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72F0++0x07
line.quad 0x00 "GICD_IROUTER606,Interrupt Routing Register 606"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72F8++0x07
line.quad 0x00 "GICD_IROUTER607,Interrupt Routing Register 607"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7300++0x07
line.quad 0x00 "GICD_IROUTER608,Interrupt Routing Register 608"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7308++0x07
line.quad 0x00 "GICD_IROUTER609,Interrupt Routing Register 609"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7310++0x07
line.quad 0x00 "GICD_IROUTER610,Interrupt Routing Register 610"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7318++0x07
line.quad 0x00 "GICD_IROUTER611,Interrupt Routing Register 611"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7320++0x07
line.quad 0x00 "GICD_IROUTER612,Interrupt Routing Register 612"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7328++0x07
line.quad 0x00 "GICD_IROUTER613,Interrupt Routing Register 613"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7330++0x07
line.quad 0x00 "GICD_IROUTER614,Interrupt Routing Register 614"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7338++0x07
line.quad 0x00 "GICD_IROUTER615,Interrupt Routing Register 615"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7340++0x07
line.quad 0x00 "GICD_IROUTER616,Interrupt Routing Register 616"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7348++0x07
line.quad 0x00 "GICD_IROUTER617,Interrupt Routing Register 617"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7350++0x07
line.quad 0x00 "GICD_IROUTER618,Interrupt Routing Register 618"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7358++0x07
line.quad 0x00 "GICD_IROUTER619,Interrupt Routing Register 619"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7360++0x07
line.quad 0x00 "GICD_IROUTER620,Interrupt Routing Register 620"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7368++0x07
line.quad 0x00 "GICD_IROUTER621,Interrupt Routing Register 621"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7370++0x07
line.quad 0x00 "GICD_IROUTER622,Interrupt Routing Register 622"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7378++0x07
line.quad 0x00 "GICD_IROUTER623,Interrupt Routing Register 623"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7380++0x07
line.quad 0x00 "GICD_IROUTER624,Interrupt Routing Register 624"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7388++0x07
line.quad 0x00 "GICD_IROUTER625,Interrupt Routing Register 625"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7390++0x07
line.quad 0x00 "GICD_IROUTER626,Interrupt Routing Register 626"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7398++0x07
line.quad 0x00 "GICD_IROUTER627,Interrupt Routing Register 627"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73A0++0x07
line.quad 0x00 "GICD_IROUTER628,Interrupt Routing Register 628"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73A8++0x07
line.quad 0x00 "GICD_IROUTER629,Interrupt Routing Register 629"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73B0++0x07
line.quad 0x00 "GICD_IROUTER630,Interrupt Routing Register 630"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73B8++0x07
line.quad 0x00 "GICD_IROUTER631,Interrupt Routing Register 631"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73C0++0x07
line.quad 0x00 "GICD_IROUTER632,Interrupt Routing Register 632"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73C8++0x07
line.quad 0x00 "GICD_IROUTER633,Interrupt Routing Register 633"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73D0++0x07
line.quad 0x00 "GICD_IROUTER634,Interrupt Routing Register 634"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73D8++0x07
line.quad 0x00 "GICD_IROUTER635,Interrupt Routing Register 635"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73E0++0x07
line.quad 0x00 "GICD_IROUTER636,Interrupt Routing Register 636"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73E8++0x07
line.quad 0x00 "GICD_IROUTER637,Interrupt Routing Register 637"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73F0++0x07
line.quad 0x00 "GICD_IROUTER638,Interrupt Routing Register 638"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73F8++0x07
line.quad 0x00 "GICD_IROUTER639,Interrupt Routing Register 639"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7400++0x07
line.quad 0x00 "GICD_IROUTER640,Interrupt Routing Register 640"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7408++0x07
line.quad 0x00 "GICD_IROUTER641,Interrupt Routing Register 641"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7410++0x07
line.quad 0x00 "GICD_IROUTER642,Interrupt Routing Register 642"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7418++0x07
line.quad 0x00 "GICD_IROUTER643,Interrupt Routing Register 643"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7420++0x07
line.quad 0x00 "GICD_IROUTER644,Interrupt Routing Register 644"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7428++0x07
line.quad 0x00 "GICD_IROUTER645,Interrupt Routing Register 645"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7430++0x07
line.quad 0x00 "GICD_IROUTER646,Interrupt Routing Register 646"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7438++0x07
line.quad 0x00 "GICD_IROUTER647,Interrupt Routing Register 647"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7440++0x07
line.quad 0x00 "GICD_IROUTER648,Interrupt Routing Register 648"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7448++0x07
line.quad 0x00 "GICD_IROUTER649,Interrupt Routing Register 649"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7450++0x07
line.quad 0x00 "GICD_IROUTER650,Interrupt Routing Register 650"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7458++0x07
line.quad 0x00 "GICD_IROUTER651,Interrupt Routing Register 651"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7460++0x07
line.quad 0x00 "GICD_IROUTER652,Interrupt Routing Register 652"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7468++0x07
line.quad 0x00 "GICD_IROUTER653,Interrupt Routing Register 653"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7470++0x07
line.quad 0x00 "GICD_IROUTER654,Interrupt Routing Register 654"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7478++0x07
line.quad 0x00 "GICD_IROUTER655,Interrupt Routing Register 655"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7480++0x07
line.quad 0x00 "GICD_IROUTER656,Interrupt Routing Register 656"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7488++0x07
line.quad 0x00 "GICD_IROUTER657,Interrupt Routing Register 657"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7490++0x07
line.quad 0x00 "GICD_IROUTER658,Interrupt Routing Register 658"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7498++0x07
line.quad 0x00 "GICD_IROUTER659,Interrupt Routing Register 659"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74A0++0x07
line.quad 0x00 "GICD_IROUTER660,Interrupt Routing Register 660"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74A8++0x07
line.quad 0x00 "GICD_IROUTER661,Interrupt Routing Register 661"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74B0++0x07
line.quad 0x00 "GICD_IROUTER662,Interrupt Routing Register 662"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74B8++0x07
line.quad 0x00 "GICD_IROUTER663,Interrupt Routing Register 663"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74C0++0x07
line.quad 0x00 "GICD_IROUTER664,Interrupt Routing Register 664"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74C8++0x07
line.quad 0x00 "GICD_IROUTER665,Interrupt Routing Register 665"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74D0++0x07
line.quad 0x00 "GICD_IROUTER666,Interrupt Routing Register 666"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74D8++0x07
line.quad 0x00 "GICD_IROUTER667,Interrupt Routing Register 667"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74E0++0x07
line.quad 0x00 "GICD_IROUTER668,Interrupt Routing Register 668"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74E8++0x07
line.quad 0x00 "GICD_IROUTER669,Interrupt Routing Register 669"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74F0++0x07
line.quad 0x00 "GICD_IROUTER670,Interrupt Routing Register 670"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74F8++0x07
line.quad 0x00 "GICD_IROUTER671,Interrupt Routing Register 671"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7500++0x07
line.quad 0x00 "GICD_IROUTER672,Interrupt Routing Register 672"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7508++0x07
line.quad 0x00 "GICD_IROUTER673,Interrupt Routing Register 673"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7510++0x07
line.quad 0x00 "GICD_IROUTER674,Interrupt Routing Register 674"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7518++0x07
line.quad 0x00 "GICD_IROUTER675,Interrupt Routing Register 675"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7520++0x07
line.quad 0x00 "GICD_IROUTER676,Interrupt Routing Register 676"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7528++0x07
line.quad 0x00 "GICD_IROUTER677,Interrupt Routing Register 677"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7530++0x07
line.quad 0x00 "GICD_IROUTER678,Interrupt Routing Register 678"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7538++0x07
line.quad 0x00 "GICD_IROUTER679,Interrupt Routing Register 679"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7540++0x07
line.quad 0x00 "GICD_IROUTER680,Interrupt Routing Register 680"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7548++0x07
line.quad 0x00 "GICD_IROUTER681,Interrupt Routing Register 681"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7550++0x07
line.quad 0x00 "GICD_IROUTER682,Interrupt Routing Register 682"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7558++0x07
line.quad 0x00 "GICD_IROUTER683,Interrupt Routing Register 683"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7560++0x07
line.quad 0x00 "GICD_IROUTER684,Interrupt Routing Register 684"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7568++0x07
line.quad 0x00 "GICD_IROUTER685,Interrupt Routing Register 685"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7570++0x07
line.quad 0x00 "GICD_IROUTER686,Interrupt Routing Register 686"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7578++0x07
line.quad 0x00 "GICD_IROUTER687,Interrupt Routing Register 687"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7580++0x07
line.quad 0x00 "GICD_IROUTER688,Interrupt Routing Register 688"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7588++0x07
line.quad 0x00 "GICD_IROUTER689,Interrupt Routing Register 689"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7590++0x07
line.quad 0x00 "GICD_IROUTER690,Interrupt Routing Register 690"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7598++0x07
line.quad 0x00 "GICD_IROUTER691,Interrupt Routing Register 691"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75A0++0x07
line.quad 0x00 "GICD_IROUTER692,Interrupt Routing Register 692"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75A8++0x07
line.quad 0x00 "GICD_IROUTER693,Interrupt Routing Register 693"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75B0++0x07
line.quad 0x00 "GICD_IROUTER694,Interrupt Routing Register 694"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75B8++0x07
line.quad 0x00 "GICD_IROUTER695,Interrupt Routing Register 695"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75C0++0x07
line.quad 0x00 "GICD_IROUTER696,Interrupt Routing Register 696"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75C8++0x07
line.quad 0x00 "GICD_IROUTER697,Interrupt Routing Register 697"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75D0++0x07
line.quad 0x00 "GICD_IROUTER698,Interrupt Routing Register 698"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75D8++0x07
line.quad 0x00 "GICD_IROUTER699,Interrupt Routing Register 699"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75E0++0x07
line.quad 0x00 "GICD_IROUTER700,Interrupt Routing Register 700"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75E8++0x07
line.quad 0x00 "GICD_IROUTER701,Interrupt Routing Register 701"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75F0++0x07
line.quad 0x00 "GICD_IROUTER702,Interrupt Routing Register 702"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75F8++0x07
line.quad 0x00 "GICD_IROUTER703,Interrupt Routing Register 703"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7600++0x07
line.quad 0x00 "GICD_IROUTER704,Interrupt Routing Register 704"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7608++0x07
line.quad 0x00 "GICD_IROUTER705,Interrupt Routing Register 705"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7610++0x07
line.quad 0x00 "GICD_IROUTER706,Interrupt Routing Register 706"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7618++0x07
line.quad 0x00 "GICD_IROUTER707,Interrupt Routing Register 707"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7620++0x07
line.quad 0x00 "GICD_IROUTER708,Interrupt Routing Register 708"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7628++0x07
line.quad 0x00 "GICD_IROUTER709,Interrupt Routing Register 709"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7630++0x07
line.quad 0x00 "GICD_IROUTER710,Interrupt Routing Register 710"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7638++0x07
line.quad 0x00 "GICD_IROUTER711,Interrupt Routing Register 711"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7640++0x07
line.quad 0x00 "GICD_IROUTER712,Interrupt Routing Register 712"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7648++0x07
line.quad 0x00 "GICD_IROUTER713,Interrupt Routing Register 713"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7650++0x07
line.quad 0x00 "GICD_IROUTER714,Interrupt Routing Register 714"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7658++0x07
line.quad 0x00 "GICD_IROUTER715,Interrupt Routing Register 715"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7660++0x07
line.quad 0x00 "GICD_IROUTER716,Interrupt Routing Register 716"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7668++0x07
line.quad 0x00 "GICD_IROUTER717,Interrupt Routing Register 717"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7670++0x07
line.quad 0x00 "GICD_IROUTER718,Interrupt Routing Register 718"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7678++0x07
line.quad 0x00 "GICD_IROUTER719,Interrupt Routing Register 719"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7680++0x07
line.quad 0x00 "GICD_IROUTER720,Interrupt Routing Register 720"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7688++0x07
line.quad 0x00 "GICD_IROUTER721,Interrupt Routing Register 721"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7690++0x07
line.quad 0x00 "GICD_IROUTER722,Interrupt Routing Register 722"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7698++0x07
line.quad 0x00 "GICD_IROUTER723,Interrupt Routing Register 723"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76A0++0x07
line.quad 0x00 "GICD_IROUTER724,Interrupt Routing Register 724"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76A8++0x07
line.quad 0x00 "GICD_IROUTER725,Interrupt Routing Register 725"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76B0++0x07
line.quad 0x00 "GICD_IROUTER726,Interrupt Routing Register 726"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76B8++0x07
line.quad 0x00 "GICD_IROUTER727,Interrupt Routing Register 727"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76C0++0x07
line.quad 0x00 "GICD_IROUTER728,Interrupt Routing Register 728"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76C8++0x07
line.quad 0x00 "GICD_IROUTER729,Interrupt Routing Register 729"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76D0++0x07
line.quad 0x00 "GICD_IROUTER730,Interrupt Routing Register 730"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76D8++0x07
line.quad 0x00 "GICD_IROUTER731,Interrupt Routing Register 731"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76E0++0x07
line.quad 0x00 "GICD_IROUTER732,Interrupt Routing Register 732"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76E8++0x07
line.quad 0x00 "GICD_IROUTER733,Interrupt Routing Register 733"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76F0++0x07
line.quad 0x00 "GICD_IROUTER734,Interrupt Routing Register 734"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76F8++0x07
line.quad 0x00 "GICD_IROUTER735,Interrupt Routing Register 735"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7700++0x07
line.quad 0x00 "GICD_IROUTER736,Interrupt Routing Register 736"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7708++0x07
line.quad 0x00 "GICD_IROUTER737,Interrupt Routing Register 737"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7710++0x07
line.quad 0x00 "GICD_IROUTER738,Interrupt Routing Register 738"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7718++0x07
line.quad 0x00 "GICD_IROUTER739,Interrupt Routing Register 739"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7720++0x07
line.quad 0x00 "GICD_IROUTER740,Interrupt Routing Register 740"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7728++0x07
line.quad 0x00 "GICD_IROUTER741,Interrupt Routing Register 741"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7730++0x07
line.quad 0x00 "GICD_IROUTER742,Interrupt Routing Register 742"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7738++0x07
line.quad 0x00 "GICD_IROUTER743,Interrupt Routing Register 743"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7740++0x07
line.quad 0x00 "GICD_IROUTER744,Interrupt Routing Register 744"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7748++0x07
line.quad 0x00 "GICD_IROUTER745,Interrupt Routing Register 745"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7750++0x07
line.quad 0x00 "GICD_IROUTER746,Interrupt Routing Register 746"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7758++0x07
line.quad 0x00 "GICD_IROUTER747,Interrupt Routing Register 747"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7760++0x07
line.quad 0x00 "GICD_IROUTER748,Interrupt Routing Register 748"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7768++0x07
line.quad 0x00 "GICD_IROUTER749,Interrupt Routing Register 749"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7770++0x07
line.quad 0x00 "GICD_IROUTER750,Interrupt Routing Register 750"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7778++0x07
line.quad 0x00 "GICD_IROUTER751,Interrupt Routing Register 751"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7780++0x07
line.quad 0x00 "GICD_IROUTER752,Interrupt Routing Register 752"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7788++0x07
line.quad 0x00 "GICD_IROUTER753,Interrupt Routing Register 753"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7790++0x07
line.quad 0x00 "GICD_IROUTER754,Interrupt Routing Register 754"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7798++0x07
line.quad 0x00 "GICD_IROUTER755,Interrupt Routing Register 755"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77A0++0x07
line.quad 0x00 "GICD_IROUTER756,Interrupt Routing Register 756"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77A8++0x07
line.quad 0x00 "GICD_IROUTER757,Interrupt Routing Register 757"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77B0++0x07
line.quad 0x00 "GICD_IROUTER758,Interrupt Routing Register 758"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77B8++0x07
line.quad 0x00 "GICD_IROUTER759,Interrupt Routing Register 759"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77C0++0x07
line.quad 0x00 "GICD_IROUTER760,Interrupt Routing Register 760"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77C8++0x07
line.quad 0x00 "GICD_IROUTER761,Interrupt Routing Register 761"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77D0++0x07
line.quad 0x00 "GICD_IROUTER762,Interrupt Routing Register 762"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77D8++0x07
line.quad 0x00 "GICD_IROUTER763,Interrupt Routing Register 763"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77E0++0x07
line.quad 0x00 "GICD_IROUTER764,Interrupt Routing Register 764"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77E8++0x07
line.quad 0x00 "GICD_IROUTER765,Interrupt Routing Register 765"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77F0++0x07
line.quad 0x00 "GICD_IROUTER766,Interrupt Routing Register 766"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77F8++0x07
line.quad 0x00 "GICD_IROUTER767,Interrupt Routing Register 767"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7800++0x07
line.quad 0x00 "GICD_IROUTER768,Interrupt Routing Register 768"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7808++0x07
line.quad 0x00 "GICD_IROUTER769,Interrupt Routing Register 769"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7810++0x07
line.quad 0x00 "GICD_IROUTER770,Interrupt Routing Register 770"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7818++0x07
line.quad 0x00 "GICD_IROUTER771,Interrupt Routing Register 771"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7820++0x07
line.quad 0x00 "GICD_IROUTER772,Interrupt Routing Register 772"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7828++0x07
line.quad 0x00 "GICD_IROUTER773,Interrupt Routing Register 773"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7830++0x07
line.quad 0x00 "GICD_IROUTER774,Interrupt Routing Register 774"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7838++0x07
line.quad 0x00 "GICD_IROUTER775,Interrupt Routing Register 775"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7840++0x07
line.quad 0x00 "GICD_IROUTER776,Interrupt Routing Register 776"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7848++0x07
line.quad 0x00 "GICD_IROUTER777,Interrupt Routing Register 777"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7850++0x07
line.quad 0x00 "GICD_IROUTER778,Interrupt Routing Register 778"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7858++0x07
line.quad 0x00 "GICD_IROUTER779,Interrupt Routing Register 779"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7860++0x07
line.quad 0x00 "GICD_IROUTER780,Interrupt Routing Register 780"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7868++0x07
line.quad 0x00 "GICD_IROUTER781,Interrupt Routing Register 781"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7870++0x07
line.quad 0x00 "GICD_IROUTER782,Interrupt Routing Register 782"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7878++0x07
line.quad 0x00 "GICD_IROUTER783,Interrupt Routing Register 783"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7880++0x07
line.quad 0x00 "GICD_IROUTER784,Interrupt Routing Register 784"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7888++0x07
line.quad 0x00 "GICD_IROUTER785,Interrupt Routing Register 785"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7890++0x07
line.quad 0x00 "GICD_IROUTER786,Interrupt Routing Register 786"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7898++0x07
line.quad 0x00 "GICD_IROUTER787,Interrupt Routing Register 787"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78A0++0x07
line.quad 0x00 "GICD_IROUTER788,Interrupt Routing Register 788"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78A8++0x07
line.quad 0x00 "GICD_IROUTER789,Interrupt Routing Register 789"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78B0++0x07
line.quad 0x00 "GICD_IROUTER790,Interrupt Routing Register 790"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78B8++0x07
line.quad 0x00 "GICD_IROUTER791,Interrupt Routing Register 791"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78C0++0x07
line.quad 0x00 "GICD_IROUTER792,Interrupt Routing Register 792"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78C8++0x07
line.quad 0x00 "GICD_IROUTER793,Interrupt Routing Register 793"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78D0++0x07
line.quad 0x00 "GICD_IROUTER794,Interrupt Routing Register 794"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78D8++0x07
line.quad 0x00 "GICD_IROUTER795,Interrupt Routing Register 795"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78E0++0x07
line.quad 0x00 "GICD_IROUTER796,Interrupt Routing Register 796"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78E8++0x07
line.quad 0x00 "GICD_IROUTER797,Interrupt Routing Register 797"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78F0++0x07
line.quad 0x00 "GICD_IROUTER798,Interrupt Routing Register 798"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78F8++0x07
line.quad 0x00 "GICD_IROUTER799,Interrupt Routing Register 799"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7900++0x07
line.quad 0x00 "GICD_IROUTER800,Interrupt Routing Register 800"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7908++0x07
line.quad 0x00 "GICD_IROUTER801,Interrupt Routing Register 801"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7910++0x07
line.quad 0x00 "GICD_IROUTER802,Interrupt Routing Register 802"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7918++0x07
line.quad 0x00 "GICD_IROUTER803,Interrupt Routing Register 803"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7920++0x07
line.quad 0x00 "GICD_IROUTER804,Interrupt Routing Register 804"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7928++0x07
line.quad 0x00 "GICD_IROUTER805,Interrupt Routing Register 805"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7930++0x07
line.quad 0x00 "GICD_IROUTER806,Interrupt Routing Register 806"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7938++0x07
line.quad 0x00 "GICD_IROUTER807,Interrupt Routing Register 807"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7940++0x07
line.quad 0x00 "GICD_IROUTER808,Interrupt Routing Register 808"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7948++0x07
line.quad 0x00 "GICD_IROUTER809,Interrupt Routing Register 809"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7950++0x07
line.quad 0x00 "GICD_IROUTER810,Interrupt Routing Register 810"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7958++0x07
line.quad 0x00 "GICD_IROUTER811,Interrupt Routing Register 811"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7960++0x07
line.quad 0x00 "GICD_IROUTER812,Interrupt Routing Register 812"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7968++0x07
line.quad 0x00 "GICD_IROUTER813,Interrupt Routing Register 813"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7970++0x07
line.quad 0x00 "GICD_IROUTER814,Interrupt Routing Register 814"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7978++0x07
line.quad 0x00 "GICD_IROUTER815,Interrupt Routing Register 815"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7980++0x07
line.quad 0x00 "GICD_IROUTER816,Interrupt Routing Register 816"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7988++0x07
line.quad 0x00 "GICD_IROUTER817,Interrupt Routing Register 817"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7990++0x07
line.quad 0x00 "GICD_IROUTER818,Interrupt Routing Register 818"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7998++0x07
line.quad 0x00 "GICD_IROUTER819,Interrupt Routing Register 819"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79A0++0x07
line.quad 0x00 "GICD_IROUTER820,Interrupt Routing Register 820"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79A8++0x07
line.quad 0x00 "GICD_IROUTER821,Interrupt Routing Register 821"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79B0++0x07
line.quad 0x00 "GICD_IROUTER822,Interrupt Routing Register 822"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79B8++0x07
line.quad 0x00 "GICD_IROUTER823,Interrupt Routing Register 823"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79C0++0x07
line.quad 0x00 "GICD_IROUTER824,Interrupt Routing Register 824"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79C8++0x07
line.quad 0x00 "GICD_IROUTER825,Interrupt Routing Register 825"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79D0++0x07
line.quad 0x00 "GICD_IROUTER826,Interrupt Routing Register 826"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79D8++0x07
line.quad 0x00 "GICD_IROUTER827,Interrupt Routing Register 827"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79E0++0x07
line.quad 0x00 "GICD_IROUTER828,Interrupt Routing Register 828"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79E8++0x07
line.quad 0x00 "GICD_IROUTER829,Interrupt Routing Register 829"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79F0++0x07
line.quad 0x00 "GICD_IROUTER830,Interrupt Routing Register 830"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79F8++0x07
line.quad 0x00 "GICD_IROUTER831,Interrupt Routing Register 831"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A00++0x07
line.quad 0x00 "GICD_IROUTER832,Interrupt Routing Register 832"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A08++0x07
line.quad 0x00 "GICD_IROUTER833,Interrupt Routing Register 833"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A10++0x07
line.quad 0x00 "GICD_IROUTER834,Interrupt Routing Register 834"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A18++0x07
line.quad 0x00 "GICD_IROUTER835,Interrupt Routing Register 835"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A20++0x07
line.quad 0x00 "GICD_IROUTER836,Interrupt Routing Register 836"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A28++0x07
line.quad 0x00 "GICD_IROUTER837,Interrupt Routing Register 837"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A30++0x07
line.quad 0x00 "GICD_IROUTER838,Interrupt Routing Register 838"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A38++0x07
line.quad 0x00 "GICD_IROUTER839,Interrupt Routing Register 839"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A40++0x07
line.quad 0x00 "GICD_IROUTER840,Interrupt Routing Register 840"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A48++0x07
line.quad 0x00 "GICD_IROUTER841,Interrupt Routing Register 841"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A50++0x07
line.quad 0x00 "GICD_IROUTER842,Interrupt Routing Register 842"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A58++0x07
line.quad 0x00 "GICD_IROUTER843,Interrupt Routing Register 843"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A60++0x07
line.quad 0x00 "GICD_IROUTER844,Interrupt Routing Register 844"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A68++0x07
line.quad 0x00 "GICD_IROUTER845,Interrupt Routing Register 845"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A70++0x07
line.quad 0x00 "GICD_IROUTER846,Interrupt Routing Register 846"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A78++0x07
line.quad 0x00 "GICD_IROUTER847,Interrupt Routing Register 847"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A80++0x07
line.quad 0x00 "GICD_IROUTER848,Interrupt Routing Register 848"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A88++0x07
line.quad 0x00 "GICD_IROUTER849,Interrupt Routing Register 849"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A90++0x07
line.quad 0x00 "GICD_IROUTER850,Interrupt Routing Register 850"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A98++0x07
line.quad 0x00 "GICD_IROUTER851,Interrupt Routing Register 851"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AA0++0x07
line.quad 0x00 "GICD_IROUTER852,Interrupt Routing Register 852"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AA8++0x07
line.quad 0x00 "GICD_IROUTER853,Interrupt Routing Register 853"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AB0++0x07
line.quad 0x00 "GICD_IROUTER854,Interrupt Routing Register 854"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AB8++0x07
line.quad 0x00 "GICD_IROUTER855,Interrupt Routing Register 855"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AC0++0x07
line.quad 0x00 "GICD_IROUTER856,Interrupt Routing Register 856"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AC8++0x07
line.quad 0x00 "GICD_IROUTER857,Interrupt Routing Register 857"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AD0++0x07
line.quad 0x00 "GICD_IROUTER858,Interrupt Routing Register 858"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AD8++0x07
line.quad 0x00 "GICD_IROUTER859,Interrupt Routing Register 859"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AE0++0x07
line.quad 0x00 "GICD_IROUTER860,Interrupt Routing Register 860"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AE8++0x07
line.quad 0x00 "GICD_IROUTER861,Interrupt Routing Register 861"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AF0++0x07
line.quad 0x00 "GICD_IROUTER862,Interrupt Routing Register 862"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AF8++0x07
line.quad 0x00 "GICD_IROUTER863,Interrupt Routing Register 863"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B00++0x07
line.quad 0x00 "GICD_IROUTER864,Interrupt Routing Register 864"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B08++0x07
line.quad 0x00 "GICD_IROUTER865,Interrupt Routing Register 865"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B10++0x07
line.quad 0x00 "GICD_IROUTER866,Interrupt Routing Register 866"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B18++0x07
line.quad 0x00 "GICD_IROUTER867,Interrupt Routing Register 867"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B20++0x07
line.quad 0x00 "GICD_IROUTER868,Interrupt Routing Register 868"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B28++0x07
line.quad 0x00 "GICD_IROUTER869,Interrupt Routing Register 869"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B30++0x07
line.quad 0x00 "GICD_IROUTER870,Interrupt Routing Register 870"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B38++0x07
line.quad 0x00 "GICD_IROUTER871,Interrupt Routing Register 871"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B40++0x07
line.quad 0x00 "GICD_IROUTER872,Interrupt Routing Register 872"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B48++0x07
line.quad 0x00 "GICD_IROUTER873,Interrupt Routing Register 873"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B50++0x07
line.quad 0x00 "GICD_IROUTER874,Interrupt Routing Register 874"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B58++0x07
line.quad 0x00 "GICD_IROUTER875,Interrupt Routing Register 875"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B60++0x07
line.quad 0x00 "GICD_IROUTER876,Interrupt Routing Register 876"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B68++0x07
line.quad 0x00 "GICD_IROUTER877,Interrupt Routing Register 877"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B70++0x07
line.quad 0x00 "GICD_IROUTER878,Interrupt Routing Register 878"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B78++0x07
line.quad 0x00 "GICD_IROUTER879,Interrupt Routing Register 879"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B80++0x07
line.quad 0x00 "GICD_IROUTER880,Interrupt Routing Register 880"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B88++0x07
line.quad 0x00 "GICD_IROUTER881,Interrupt Routing Register 881"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B90++0x07
line.quad 0x00 "GICD_IROUTER882,Interrupt Routing Register 882"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B98++0x07
line.quad 0x00 "GICD_IROUTER883,Interrupt Routing Register 883"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BA0++0x07
line.quad 0x00 "GICD_IROUTER884,Interrupt Routing Register 884"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BA8++0x07
line.quad 0x00 "GICD_IROUTER885,Interrupt Routing Register 885"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BB0++0x07
line.quad 0x00 "GICD_IROUTER886,Interrupt Routing Register 886"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BB8++0x07
line.quad 0x00 "GICD_IROUTER887,Interrupt Routing Register 887"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BC0++0x07
line.quad 0x00 "GICD_IROUTER888,Interrupt Routing Register 888"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BC8++0x07
line.quad 0x00 "GICD_IROUTER889,Interrupt Routing Register 889"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BD0++0x07
line.quad 0x00 "GICD_IROUTER890,Interrupt Routing Register 890"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BD8++0x07
line.quad 0x00 "GICD_IROUTER891,Interrupt Routing Register 891"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BE0++0x07
line.quad 0x00 "GICD_IROUTER892,Interrupt Routing Register 892"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BE8++0x07
line.quad 0x00 "GICD_IROUTER893,Interrupt Routing Register 893"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BF0++0x07
line.quad 0x00 "GICD_IROUTER894,Interrupt Routing Register 894"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BF8++0x07
line.quad 0x00 "GICD_IROUTER895,Interrupt Routing Register 895"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C00++0x07
line.quad 0x00 "GICD_IROUTER896,Interrupt Routing Register 896"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C08++0x07
line.quad 0x00 "GICD_IROUTER897,Interrupt Routing Register 897"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C10++0x07
line.quad 0x00 "GICD_IROUTER898,Interrupt Routing Register 898"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C18++0x07
line.quad 0x00 "GICD_IROUTER899,Interrupt Routing Register 899"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C20++0x07
line.quad 0x00 "GICD_IROUTER900,Interrupt Routing Register 900"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C28++0x07
line.quad 0x00 "GICD_IROUTER901,Interrupt Routing Register 901"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C30++0x07
line.quad 0x00 "GICD_IROUTER902,Interrupt Routing Register 902"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C38++0x07
line.quad 0x00 "GICD_IROUTER903,Interrupt Routing Register 903"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C40++0x07
line.quad 0x00 "GICD_IROUTER904,Interrupt Routing Register 904"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C48++0x07
line.quad 0x00 "GICD_IROUTER905,Interrupt Routing Register 905"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C50++0x07
line.quad 0x00 "GICD_IROUTER906,Interrupt Routing Register 906"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C58++0x07
line.quad 0x00 "GICD_IROUTER907,Interrupt Routing Register 907"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C60++0x07
line.quad 0x00 "GICD_IROUTER908,Interrupt Routing Register 908"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C68++0x07
line.quad 0x00 "GICD_IROUTER909,Interrupt Routing Register 909"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C70++0x07
line.quad 0x00 "GICD_IROUTER910,Interrupt Routing Register 910"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C78++0x07
line.quad 0x00 "GICD_IROUTER911,Interrupt Routing Register 911"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C80++0x07
line.quad 0x00 "GICD_IROUTER912,Interrupt Routing Register 912"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C88++0x07
line.quad 0x00 "GICD_IROUTER913,Interrupt Routing Register 913"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C90++0x07
line.quad 0x00 "GICD_IROUTER914,Interrupt Routing Register 914"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C98++0x07
line.quad 0x00 "GICD_IROUTER915,Interrupt Routing Register 915"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CA0++0x07
line.quad 0x00 "GICD_IROUTER916,Interrupt Routing Register 916"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CA8++0x07
line.quad 0x00 "GICD_IROUTER917,Interrupt Routing Register 917"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CB0++0x07
line.quad 0x00 "GICD_IROUTER918,Interrupt Routing Register 918"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CB8++0x07
line.quad 0x00 "GICD_IROUTER919,Interrupt Routing Register 919"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CC0++0x07
line.quad 0x00 "GICD_IROUTER920,Interrupt Routing Register 920"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CC8++0x07
line.quad 0x00 "GICD_IROUTER921,Interrupt Routing Register 921"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CD0++0x07
line.quad 0x00 "GICD_IROUTER922,Interrupt Routing Register 922"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CD8++0x07
line.quad 0x00 "GICD_IROUTER923,Interrupt Routing Register 923"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CE0++0x07
line.quad 0x00 "GICD_IROUTER924,Interrupt Routing Register 924"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CE8++0x07
line.quad 0x00 "GICD_IROUTER925,Interrupt Routing Register 925"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CF0++0x07
line.quad 0x00 "GICD_IROUTER926,Interrupt Routing Register 926"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CF8++0x07
line.quad 0x00 "GICD_IROUTER927,Interrupt Routing Register 927"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D00++0x07
line.quad 0x00 "GICD_IROUTER928,Interrupt Routing Register 928"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D08++0x07
line.quad 0x00 "GICD_IROUTER929,Interrupt Routing Register 929"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D10++0x07
line.quad 0x00 "GICD_IROUTER930,Interrupt Routing Register 930"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D18++0x07
line.quad 0x00 "GICD_IROUTER931,Interrupt Routing Register 931"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D20++0x07
line.quad 0x00 "GICD_IROUTER932,Interrupt Routing Register 932"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D28++0x07
line.quad 0x00 "GICD_IROUTER933,Interrupt Routing Register 933"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D30++0x07
line.quad 0x00 "GICD_IROUTER934,Interrupt Routing Register 934"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D38++0x07
line.quad 0x00 "GICD_IROUTER935,Interrupt Routing Register 935"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D40++0x07
line.quad 0x00 "GICD_IROUTER936,Interrupt Routing Register 936"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D48++0x07
line.quad 0x00 "GICD_IROUTER937,Interrupt Routing Register 937"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D50++0x07
line.quad 0x00 "GICD_IROUTER938,Interrupt Routing Register 938"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D58++0x07
line.quad 0x00 "GICD_IROUTER939,Interrupt Routing Register 939"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D60++0x07
line.quad 0x00 "GICD_IROUTER940,Interrupt Routing Register 940"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D68++0x07
line.quad 0x00 "GICD_IROUTER941,Interrupt Routing Register 941"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D70++0x07
line.quad 0x00 "GICD_IROUTER942,Interrupt Routing Register 942"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D78++0x07
line.quad 0x00 "GICD_IROUTER943,Interrupt Routing Register 943"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D80++0x07
line.quad 0x00 "GICD_IROUTER944,Interrupt Routing Register 944"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D88++0x07
line.quad 0x00 "GICD_IROUTER945,Interrupt Routing Register 945"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D90++0x07
line.quad 0x00 "GICD_IROUTER946,Interrupt Routing Register 946"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D98++0x07
line.quad 0x00 "GICD_IROUTER947,Interrupt Routing Register 947"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DA0++0x07
line.quad 0x00 "GICD_IROUTER948,Interrupt Routing Register 948"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DA8++0x07
line.quad 0x00 "GICD_IROUTER949,Interrupt Routing Register 949"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DB0++0x07
line.quad 0x00 "GICD_IROUTER950,Interrupt Routing Register 950"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DB8++0x07
line.quad 0x00 "GICD_IROUTER951,Interrupt Routing Register 951"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DC0++0x07
line.quad 0x00 "GICD_IROUTER952,Interrupt Routing Register 952"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DC8++0x07
line.quad 0x00 "GICD_IROUTER953,Interrupt Routing Register 953"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DD0++0x07
line.quad 0x00 "GICD_IROUTER954,Interrupt Routing Register 954"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DD8++0x07
line.quad 0x00 "GICD_IROUTER955,Interrupt Routing Register 955"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DE0++0x07
line.quad 0x00 "GICD_IROUTER956,Interrupt Routing Register 956"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DE8++0x07
line.quad 0x00 "GICD_IROUTER957,Interrupt Routing Register 957"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DF0++0x07
line.quad 0x00 "GICD_IROUTER958,Interrupt Routing Register 958"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DF8++0x07
line.quad 0x00 "GICD_IROUTER959,Interrupt Routing Register 959"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E00++0x07
line.quad 0x00 "GICD_IROUTER960,Interrupt Routing Register 960"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E08++0x07
line.quad 0x00 "GICD_IROUTER961,Interrupt Routing Register 961"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E10++0x07
line.quad 0x00 "GICD_IROUTER962,Interrupt Routing Register 962"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E18++0x07
line.quad 0x00 "GICD_IROUTER963,Interrupt Routing Register 963"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E20++0x07
line.quad 0x00 "GICD_IROUTER964,Interrupt Routing Register 964"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E28++0x07
line.quad 0x00 "GICD_IROUTER965,Interrupt Routing Register 965"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E30++0x07
line.quad 0x00 "GICD_IROUTER966,Interrupt Routing Register 966"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E38++0x07
line.quad 0x00 "GICD_IROUTER967,Interrupt Routing Register 967"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E40++0x07
line.quad 0x00 "GICD_IROUTER968,Interrupt Routing Register 968"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E48++0x07
line.quad 0x00 "GICD_IROUTER969,Interrupt Routing Register 969"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E50++0x07
line.quad 0x00 "GICD_IROUTER970,Interrupt Routing Register 970"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E58++0x07
line.quad 0x00 "GICD_IROUTER971,Interrupt Routing Register 971"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E60++0x07
line.quad 0x00 "GICD_IROUTER972,Interrupt Routing Register 972"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E68++0x07
line.quad 0x00 "GICD_IROUTER973,Interrupt Routing Register 973"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E70++0x07
line.quad 0x00 "GICD_IROUTER974,Interrupt Routing Register 974"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E78++0x07
line.quad 0x00 "GICD_IROUTER975,Interrupt Routing Register 975"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E80++0x07
line.quad 0x00 "GICD_IROUTER976,Interrupt Routing Register 976"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E88++0x07
line.quad 0x00 "GICD_IROUTER977,Interrupt Routing Register 977"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E90++0x07
line.quad 0x00 "GICD_IROUTER978,Interrupt Routing Register 978"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E98++0x07
line.quad 0x00 "GICD_IROUTER979,Interrupt Routing Register 979"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EA0++0x07
line.quad 0x00 "GICD_IROUTER980,Interrupt Routing Register 980"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EA8++0x07
line.quad 0x00 "GICD_IROUTER981,Interrupt Routing Register 981"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EB0++0x07
line.quad 0x00 "GICD_IROUTER982,Interrupt Routing Register 982"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EB8++0x07
line.quad 0x00 "GICD_IROUTER983,Interrupt Routing Register 983"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EC0++0x07
line.quad 0x00 "GICD_IROUTER984,Interrupt Routing Register 984"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EC8++0x07
line.quad 0x00 "GICD_IROUTER985,Interrupt Routing Register 985"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7ED0++0x07
line.quad 0x00 "GICD_IROUTER986,Interrupt Routing Register 986"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7ED8++0x07
line.quad 0x00 "GICD_IROUTER987,Interrupt Routing Register 987"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EE0++0x07
line.quad 0x00 "GICD_IROUTER988,Interrupt Routing Register 988"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EE8++0x07
line.quad 0x00 "GICD_IROUTER989,Interrupt Routing Register 989"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EF0++0x07
line.quad 0x00 "GICD_IROUTER990,Interrupt Routing Register 990"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EF8++0x07
line.quad 0x00 "GICD_IROUTER991,Interrupt Routing Register 991"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
tree.end
width 22.
tree "Interrupt Class Registers"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=1.)
group.long (0xE000+0x8)++0x03
line.long 0x0 "GICD_ICLAR2,Interrupt Class Register 2"
bitfld.long 0x00 31. " SPI047_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI047_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI046_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI046_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI045_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI045_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI044_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI044_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI043_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI043_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI042_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI042_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI041_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI041_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI040_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI040_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI039_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI039_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI038_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI038_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI037_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI037_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI036_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI036_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI035_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI035_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI034_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI034_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI033_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI033_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI032_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI032_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x8)++0x03
hide.long 0x0 "GICD_ICLAR2,Interrupt Class Register 2"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=1.)
group.long (0xE000+0xc)++0x03
line.long 0x0 "GICD_ICLAR3,Interrupt Class Register 3"
bitfld.long 0x00 31. " SPI063_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI063_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI062_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI062_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI061_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI061_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI060_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI060_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI059_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI059_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI058_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI058_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI057_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI057_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI056_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI056_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI055_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI055_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI054_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI054_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI053_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI053_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI052_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI052_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI051_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI051_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI050_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI050_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI049_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI049_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI048_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI048_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xc)++0x03
hide.long 0x0 "GICD_ICLAR3,Interrupt Class Register 3"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=2.)
group.long (0xE000+0x10)++0x03
line.long 0x0 "GICD_ICLAR4,Interrupt Class Register 4"
bitfld.long 0x00 31. " SPI079_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI079_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI078_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI078_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI077_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI077_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI076_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI076_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI075_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI075_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI074_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI074_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI073_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI073_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI072_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI072_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI071_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI071_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI070_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI070_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI069_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI069_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI068_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI068_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI067_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI067_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI066_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI066_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI065_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI065_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI064_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI064_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x10)++0x03
hide.long 0x0 "GICD_ICLAR4,Interrupt Class Register 4"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=2.)
group.long (0xE000+0x14)++0x03
line.long 0x0 "GICD_ICLAR5,Interrupt Class Register 5"
bitfld.long 0x00 31. " SPI095_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI095_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI094_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI094_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI093_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI093_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI092_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI092_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI091_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI091_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI090_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI090_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI089_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI089_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI088_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI088_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI087_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI087_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI086_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI086_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI085_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI085_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI084_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI084_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI083_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI083_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI082_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI082_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI081_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI081_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI080_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI080_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x14)++0x03
hide.long 0x0 "GICD_ICLAR5,Interrupt Class Register 5"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=3.)
group.long (0xE000+0x18)++0x03
line.long 0x0 "GICD_ICLAR6,Interrupt Class Register 6"
bitfld.long 0x00 31. " SPI111_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI111_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI110_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI110_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI109_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI109_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI108_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI108_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI107_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI107_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI106_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI106_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI105_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI105_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI104_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI104_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI103_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI103_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI102_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI102_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI101_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI101_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI100_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI100_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI099_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI099_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI098_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI098_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI097_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI097_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI096_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI096_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x18)++0x03
hide.long 0x0 "GICD_ICLAR6,Interrupt Class Register 6"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=3.)
group.long (0xE000+0x1c)++0x03
line.long 0x0 "GICD_ICLAR7,Interrupt Class Register 7"
bitfld.long 0x00 31. " SPI127_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI127_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI126_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI126_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI125_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI125_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI124_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI124_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI123_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI123_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI122_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI122_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI121_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI121_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI120_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI120_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI119_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI119_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI118_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI118_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI117_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI117_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI116_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI116_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI115_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI115_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI114_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI114_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI113_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI113_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI112_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI112_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x1c)++0x03
hide.long 0x0 "GICD_ICLAR7,Interrupt Class Register 7"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=4.)
group.long (0xE000+0x20)++0x03
line.long 0x0 "GICD_ICLAR8,Interrupt Class Register 8"
bitfld.long 0x00 31. " SPI143_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI143_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI142_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI142_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI141_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI141_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI140_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI140_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI139_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI139_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI138_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI138_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI137_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI137_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI136_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI136_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI135_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI135_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI134_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI134_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI133_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI133_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI132_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI132_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI131_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI131_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI130_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI130_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI129_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI129_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI128_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI128_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x20)++0x03
hide.long 0x0 "GICD_ICLAR8,Interrupt Class Register 8"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=4.)
group.long (0xE000+0x24)++0x03
line.long 0x0 "GICD_ICLAR9,Interrupt Class Register 9"
bitfld.long 0x00 31. " SPI159_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI159_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI158_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI158_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI157_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI157_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI156_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI156_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI155_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI155_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI154_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI154_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI153_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI153_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI152_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI152_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI151_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI151_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI150_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI150_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI149_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI149_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI148_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI148_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI147_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI147_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI146_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI146_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI145_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI145_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI144_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI144_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x24)++0x03
hide.long 0x0 "GICD_ICLAR9,Interrupt Class Register 9"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=5.)
group.long (0xE000+0x28)++0x03
line.long 0x0 "GICD_ICLAR10,Interrupt Class Register 10"
bitfld.long 0x00 31. " SPI175_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI175_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI174_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI174_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI173_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI173_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI172_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI172_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI171_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI171_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI170_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI170_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI169_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI169_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI168_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI168_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI167_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI167_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI166_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI166_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI165_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI165_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI164_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI164_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI163_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI163_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI162_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI162_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI161_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI161_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI160_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI160_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x28)++0x03
hide.long 0x0 "GICD_ICLAR10,Interrupt Class Register 10"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=5.)
group.long (0xE000+0x2c)++0x03
line.long 0x0 "GICD_ICLAR11,Interrupt Class Register 11"
bitfld.long 0x00 31. " SPI191_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI191_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI190_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI190_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI189_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI189_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI188_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI188_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI187_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI187_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI186_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI186_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI185_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI185_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI184_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI184_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI183_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI183_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI182_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI182_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI181_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI181_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI180_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI180_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI179_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI179_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI178_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI178_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI177_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI177_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI176_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI176_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x2c)++0x03
hide.long 0x0 "GICD_ICLAR11,Interrupt Class Register 11"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=6.)
group.long (0xE000+0x30)++0x03
line.long 0x0 "GICD_ICLAR12,Interrupt Class Register 12"
bitfld.long 0x00 31. " SPI207_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI207_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI206_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI206_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI205_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI205_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI204_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI204_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI203_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI203_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI202_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI202_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI201_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI201_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI200_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI200_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI199_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI199_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI198_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI198_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI197_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI197_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI196_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI196_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI195_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI195_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI194_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI194_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI193_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI193_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI192_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI192_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x30)++0x03
hide.long 0x0 "GICD_ICLAR12,Interrupt Class Register 12"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=6.)
group.long (0xE000+0x34)++0x03
line.long 0x0 "GICD_ICLAR13,Interrupt Class Register 13"
bitfld.long 0x00 31. " SPI223_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI223_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI222_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI222_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI221_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI221_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI220_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI220_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI219_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI219_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI218_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI218_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI217_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI217_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI216_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI216_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI215_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI215_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI214_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI214_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI213_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI213_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI212_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI212_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI211_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI211_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI210_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI210_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI209_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI209_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI208_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI208_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x34)++0x03
hide.long 0x0 "GICD_ICLAR13,Interrupt Class Register 13"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=7.)
group.long (0xE000+0x38)++0x03
line.long 0x0 "GICD_ICLAR14,Interrupt Class Register 14"
bitfld.long 0x00 31. " SPI239_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI239_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI238_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI238_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI237_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI237_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI236_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI236_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI235_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI235_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI234_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI234_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI233_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI233_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI232_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI232_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI231_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI231_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI230_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI230_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI229_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI229_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI228_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI228_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI227_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI227_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI226_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI226_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI225_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI225_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI224_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI224_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x38)++0x03
hide.long 0x0 "GICD_ICLAR14,Interrupt Class Register 14"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=7.)
group.long (0xE000+0x3c)++0x03
line.long 0x0 "GICD_ICLAR15,Interrupt Class Register 15"
bitfld.long 0x00 31. " SPI255_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI255_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI254_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI254_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI253_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI253_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI252_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI252_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI251_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI251_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI250_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI250_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI249_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI249_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI248_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI248_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI247_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI247_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI246_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI246_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI245_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI245_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI244_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI244_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI243_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI243_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI242_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI242_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI241_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI241_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI240_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI240_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x3c)++0x03
hide.long 0x0 "GICD_ICLAR15,Interrupt Class Register 15"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=8.)
group.long (0xE000+0x40)++0x03
line.long 0x0 "GICD_ICLAR16,Interrupt Class Register 16"
bitfld.long 0x00 31. " SPI271_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI271_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI270_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI270_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI269_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI269_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI268_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI268_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI267_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI267_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI266_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI266_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI265_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI265_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI264_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI264_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI263_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI263_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI262_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI262_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI261_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI261_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI260_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI260_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI259_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI259_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI258_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI258_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI257_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI257_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI256_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI256_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x40)++0x03
hide.long 0x0 "GICD_ICLAR16,Interrupt Class Register 16"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=8.)
group.long (0xE000+0x44)++0x03
line.long 0x0 "GICD_ICLAR17,Interrupt Class Register 17"
bitfld.long 0x00 31. " SPI287_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI287_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI286_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI286_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI285_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI285_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI284_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI284_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI283_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI283_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI282_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI282_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI281_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI281_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI280_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI280_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI279_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI279_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI278_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI278_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI277_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI277_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI276_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI276_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI275_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI275_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI274_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI274_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI273_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI273_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI272_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI272_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x44)++0x03
hide.long 0x0 "GICD_ICLAR17,Interrupt Class Register 17"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=9.)
group.long (0xE000+0x48)++0x03
line.long 0x0 "GICD_ICLAR18,Interrupt Class Register 18"
bitfld.long 0x00 31. " SPI303_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI303_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI302_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI302_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI301_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI301_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI300_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI300_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI299_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI299_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI298_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI298_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI297_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI297_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI296_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI296_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI295_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI295_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI294_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI294_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI293_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI293_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI292_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI292_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI291_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI291_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI290_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI290_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI289_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI289_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI288_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI288_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x48)++0x03
hide.long 0x0 "GICD_ICLAR18,Interrupt Class Register 18"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=9.)
group.long (0xE000+0x4c)++0x03
line.long 0x0 "GICD_ICLAR19,Interrupt Class Register 19"
bitfld.long 0x00 31. " SPI319_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI319_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI318_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI318_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI317_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI317_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI316_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI316_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI315_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI315_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI314_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI314_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI313_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI313_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI312_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI312_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI311_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI311_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI310_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI310_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI309_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI309_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI308_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI308_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI307_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI307_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI306_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI306_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI305_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI305_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI304_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI304_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x4c)++0x03
hide.long 0x0 "GICD_ICLAR19,Interrupt Class Register 19"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=10.)
group.long (0xE000+0x50)++0x03
line.long 0x0 "GICD_ICLAR20,Interrupt Class Register 20"
bitfld.long 0x00 31. " SPI335_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI335_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI334_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI334_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI333_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI333_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI332_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI332_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI331_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI331_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI330_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI330_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI329_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI329_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI328_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI328_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI327_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI327_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI326_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI326_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI325_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI325_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI324_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI324_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI323_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI323_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI322_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI322_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI321_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI321_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI320_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI320_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x50)++0x03
hide.long 0x0 "GICD_ICLAR20,Interrupt Class Register 20"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=10.)
group.long (0xE000+0x54)++0x03
line.long 0x0 "GICD_ICLAR21,Interrupt Class Register 21"
bitfld.long 0x00 31. " SPI351_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI351_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI350_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI350_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI349_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI349_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI348_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI348_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI347_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI347_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI346_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI346_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI345_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI345_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI344_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI344_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI343_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI343_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI342_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI342_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI341_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI341_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI340_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI340_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI339_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI339_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI338_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI338_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI337_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI337_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI336_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI336_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x54)++0x03
hide.long 0x0 "GICD_ICLAR21,Interrupt Class Register 21"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=11.)
group.long (0xE000+0x58)++0x03
line.long 0x0 "GICD_ICLAR22,Interrupt Class Register 22"
bitfld.long 0x00 31. " SPI367_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI367_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI366_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI366_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI365_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI365_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI364_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI364_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI363_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI363_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI362_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI362_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI361_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI361_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI360_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI360_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI359_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI359_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI358_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI358_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI357_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI357_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI356_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI356_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI355_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI355_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI354_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI354_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI353_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI353_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI352_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI352_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x58)++0x03
hide.long 0x0 "GICD_ICLAR22,Interrupt Class Register 22"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=11.)
group.long (0xE000+0x5c)++0x03
line.long 0x0 "GICD_ICLAR23,Interrupt Class Register 23"
bitfld.long 0x00 31. " SPI383_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI383_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI382_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI382_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI381_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI381_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI380_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI380_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI379_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI379_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI378_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI378_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI377_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI377_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI376_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI376_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI375_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI375_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI374_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI374_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI373_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI373_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI372_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI372_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI371_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI371_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI370_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI370_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI369_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI369_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI368_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI368_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x5c)++0x03
hide.long 0x0 "GICD_ICLAR23,Interrupt Class Register 23"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=12.)
group.long (0xE000+0x60)++0x03
line.long 0x0 "GICD_ICLAR24,Interrupt Class Register 24"
bitfld.long 0x00 31. " SPI399_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI399_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI398_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI398_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI397_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI397_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI396_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI396_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI395_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI395_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI394_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI394_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI393_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI393_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI392_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI392_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI391_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI391_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI390_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI390_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI389_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI389_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI388_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI388_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI387_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI387_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI386_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI386_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI385_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI385_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI384_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI384_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x60)++0x03
hide.long 0x0 "GICD_ICLAR24,Interrupt Class Register 24"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=12.)
group.long (0xE000+0x64)++0x03
line.long 0x0 "GICD_ICLAR25,Interrupt Class Register 25"
bitfld.long 0x00 31. " SPI415_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI415_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI414_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI414_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI413_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI413_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI412_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI412_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI411_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI411_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI410_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI410_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI409_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI409_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI408_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI408_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI407_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI407_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI406_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI406_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI405_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI405_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI404_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI404_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI403_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI403_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI402_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI402_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI401_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI401_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI400_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI400_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x64)++0x03
hide.long 0x0 "GICD_ICLAR25,Interrupt Class Register 25"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=13.)
group.long (0xE000+0x68)++0x03
line.long 0x0 "GICD_ICLAR26,Interrupt Class Register 26"
bitfld.long 0x00 31. " SPI431_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI431_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI430_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI430_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI429_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI429_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI428_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI428_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI427_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI427_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI426_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI426_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI425_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI425_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI424_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI424_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI423_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI423_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI422_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI422_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI421_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI421_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI420_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI420_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI419_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI419_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI418_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI418_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI417_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI417_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI416_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI416_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x68)++0x03
hide.long 0x0 "GICD_ICLAR26,Interrupt Class Register 26"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=13.)
group.long (0xE000+0x6c)++0x03
line.long 0x0 "GICD_ICLAR27,Interrupt Class Register 27"
bitfld.long 0x00 31. " SPI447_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI447_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI446_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI446_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI445_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI445_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI444_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI444_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI443_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI443_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI442_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI442_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI441_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI441_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI440_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI440_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI439_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI439_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI438_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI438_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI437_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI437_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI436_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI436_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI435_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI435_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI434_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI434_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI433_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI433_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI432_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI432_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x6c)++0x03
hide.long 0x0 "GICD_ICLAR27,Interrupt Class Register 27"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=14.)
group.long (0xE000+0x70)++0x03
line.long 0x0 "GICD_ICLAR28,Interrupt Class Register 28"
bitfld.long 0x00 31. " SPI463_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI463_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI462_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI462_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI461_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI461_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI460_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI460_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI459_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI459_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI458_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI458_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI457_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI457_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI456_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI456_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI455_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI455_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI454_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI454_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI453_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI453_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI452_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI452_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI451_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI451_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI450_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI450_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI449_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI449_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI448_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI448_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x70)++0x03
hide.long 0x0 "GICD_ICLAR28,Interrupt Class Register 28"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=14.)
group.long (0xE000+0x74)++0x03
line.long 0x0 "GICD_ICLAR29,Interrupt Class Register 29"
bitfld.long 0x00 31. " SPI479_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI479_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI478_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI478_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI477_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI477_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI476_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI476_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI475_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI475_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI474_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI474_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI473_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI473_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI472_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI472_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI471_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI471_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI470_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI470_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI469_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI469_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI468_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI468_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI467_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI467_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI466_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI466_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI465_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI465_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI464_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI464_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x74)++0x03
hide.long 0x0 "GICD_ICLAR29,Interrupt Class Register 29"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=15.)
group.long (0xE000+0x78)++0x03
line.long 0x0 "GICD_ICLAR30,Interrupt Class Register 30"
bitfld.long 0x00 31. " SPI495_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI495_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI494_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI494_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI493_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI493_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI492_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI492_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI491_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI491_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI490_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI490_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI489_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI489_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI488_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI488_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI487_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI487_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI486_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI486_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI485_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI485_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI484_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI484_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI483_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI483_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI482_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI482_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI481_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI481_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI480_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI480_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x78)++0x03
hide.long 0x0 "GICD_ICLAR30,Interrupt Class Register 30"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=15.)
group.long (0xE000+0x7c)++0x03
line.long 0x0 "GICD_ICLAR31,Interrupt Class Register 31"
bitfld.long 0x00 31. " SPI511_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI511_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI510_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI510_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI509_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI509_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI508_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI508_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI507_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI507_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI506_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI506_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI505_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI505_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI504_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI504_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI503_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI503_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI502_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI502_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI501_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI501_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI500_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI500_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI499_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI499_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI498_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI498_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI497_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI497_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI496_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI496_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x7c)++0x03
hide.long 0x0 "GICD_ICLAR31,Interrupt Class Register 31"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=16.)
group.long (0xE000+0x80)++0x03
line.long 0x0 "GICD_ICLAR32,Interrupt Class Register 32"
bitfld.long 0x00 31. " SPI527_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI527_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI526_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI526_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI525_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI525_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI524_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI524_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI523_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI523_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI522_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI522_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI521_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI521_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI520_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI520_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI519_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI519_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI518_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI518_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI517_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI517_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI516_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI516_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI515_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI515_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI514_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI514_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI513_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI513_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI512_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI512_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x80)++0x03
hide.long 0x0 "GICD_ICLAR32,Interrupt Class Register 32"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=16.)
group.long (0xE000+0x84)++0x03
line.long 0x0 "GICD_ICLAR33,Interrupt Class Register 33"
bitfld.long 0x00 31. " SPI543_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI543_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI542_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI542_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI541_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI541_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI540_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI540_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI539_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI539_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI538_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI538_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI537_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI537_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI536_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI536_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI535_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI535_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI534_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI534_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI533_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI533_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI532_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI532_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI531_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI531_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI530_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI530_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI529_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI529_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI528_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI528_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x84)++0x03
hide.long 0x0 "GICD_ICLAR33,Interrupt Class Register 33"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=17.)
group.long (0xE000+0x88)++0x03
line.long 0x0 "GICD_ICLAR34,Interrupt Class Register 34"
bitfld.long 0x00 31. " SPI559_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI559_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI558_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI558_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI557_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI557_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI556_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI556_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI555_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI555_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI554_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI554_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI553_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI553_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI552_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI552_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI551_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI551_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI550_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI550_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI549_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI549_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI548_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI548_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI547_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI547_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI546_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI546_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI545_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI545_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI544_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI544_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x88)++0x03
hide.long 0x0 "GICD_ICLAR34,Interrupt Class Register 34"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=17.)
group.long (0xE000+0x8c)++0x03
line.long 0x0 "GICD_ICLAR35,Interrupt Class Register 35"
bitfld.long 0x00 31. " SPI575_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI575_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI574_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI574_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI573_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI573_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI572_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI572_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI571_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI571_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI570_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI570_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI569_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI569_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI568_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI568_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI567_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI567_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI566_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI566_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI565_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI565_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI564_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI564_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI563_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI563_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI562_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI562_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI561_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI561_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI560_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI560_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x8c)++0x03
hide.long 0x0 "GICD_ICLAR35,Interrupt Class Register 35"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=18.)
group.long (0xE000+0x90)++0x03
line.long 0x0 "GICD_ICLAR36,Interrupt Class Register 36"
bitfld.long 0x00 31. " SPI591_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI591_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI590_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI590_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI589_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI589_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI588_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI588_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI587_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI587_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI586_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI586_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI585_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI585_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI584_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI584_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI583_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI583_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI582_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI582_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI581_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI581_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI580_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI580_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI579_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI579_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI578_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI578_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI577_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI577_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI576_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI576_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x90)++0x03
hide.long 0x0 "GICD_ICLAR36,Interrupt Class Register 36"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=18.)
group.long (0xE000+0x94)++0x03
line.long 0x0 "GICD_ICLAR37,Interrupt Class Register 37"
bitfld.long 0x00 31. " SPI607_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI607_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI606_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI606_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI605_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI605_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI604_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI604_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI603_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI603_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI602_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI602_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI601_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI601_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI600_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI600_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI599_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI599_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI598_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI598_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI597_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI597_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI596_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI596_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI595_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI595_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI594_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI594_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI593_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI593_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI592_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI592_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x94)++0x03
hide.long 0x0 "GICD_ICLAR37,Interrupt Class Register 37"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=19.)
group.long (0xE000+0x98)++0x03
line.long 0x0 "GICD_ICLAR38,Interrupt Class Register 38"
bitfld.long 0x00 31. " SPI623_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI623_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI622_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI622_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI621_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI621_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI620_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI620_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI619_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI619_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI618_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI618_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI617_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI617_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI616_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI616_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI615_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI615_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI614_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI614_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI613_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI613_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI612_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI612_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI611_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI611_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI610_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI610_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI609_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI609_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI608_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI608_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x98)++0x03
hide.long 0x0 "GICD_ICLAR38,Interrupt Class Register 38"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=19.)
group.long (0xE000+0x9c)++0x03
line.long 0x0 "GICD_ICLAR39,Interrupt Class Register 39"
bitfld.long 0x00 31. " SPI639_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI639_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI638_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI638_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI637_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI637_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI636_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI636_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI635_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI635_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI634_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI634_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI633_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI633_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI632_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI632_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI631_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI631_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI630_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI630_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI629_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI629_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI628_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI628_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI627_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI627_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI626_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI626_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI625_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI625_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI624_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI624_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0x9c)++0x03
hide.long 0x0 "GICD_ICLAR39,Interrupt Class Register 39"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=20.)
group.long (0xE000+0xa0)++0x03
line.long 0x0 "GICD_ICLAR40,Interrupt Class Register 40"
bitfld.long 0x00 31. " SPI655_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI655_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI654_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI654_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI653_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI653_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI652_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI652_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI651_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI651_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI650_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI650_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI649_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI649_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI648_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI648_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI647_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI647_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI646_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI646_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI645_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI645_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI644_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI644_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI643_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI643_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI642_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI642_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI641_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI641_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI640_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI640_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xa0)++0x03
hide.long 0x0 "GICD_ICLAR40,Interrupt Class Register 40"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=20.)
group.long (0xE000+0xa4)++0x03
line.long 0x0 "GICD_ICLAR41,Interrupt Class Register 41"
bitfld.long 0x00 31. " SPI671_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI671_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI670_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI670_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI669_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI669_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI668_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI668_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI667_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI667_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI666_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI666_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI665_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI665_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI664_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI664_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI663_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI663_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI662_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI662_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI661_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI661_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI660_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI660_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI659_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI659_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI658_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI658_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI657_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI657_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI656_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI656_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xa4)++0x03
hide.long 0x0 "GICD_ICLAR41,Interrupt Class Register 41"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=21.)
group.long (0xE000+0xa8)++0x03
line.long 0x0 "GICD_ICLAR42,Interrupt Class Register 42"
bitfld.long 0x00 31. " SPI687_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI687_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI686_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI686_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI685_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI685_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI684_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI684_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI683_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI683_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI682_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI682_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI681_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI681_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI680_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI680_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI679_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI679_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI678_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI678_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI677_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI677_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI676_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI676_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI675_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI675_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI674_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI674_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI673_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI673_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI672_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI672_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xa8)++0x03
hide.long 0x0 "GICD_ICLAR42,Interrupt Class Register 42"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=21.)
group.long (0xE000+0xac)++0x03
line.long 0x0 "GICD_ICLAR43,Interrupt Class Register 43"
bitfld.long 0x00 31. " SPI703_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI703_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI702_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI702_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI701_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI701_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI700_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI700_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI699_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI699_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI698_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI698_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI697_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI697_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI696_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI696_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI695_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI695_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI694_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI694_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI693_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI693_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI692_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI692_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI691_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI691_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI690_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI690_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI689_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI689_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI688_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI688_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xac)++0x03
hide.long 0x0 "GICD_ICLAR43,Interrupt Class Register 43"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=22.)
group.long (0xE000+0xb0)++0x03
line.long 0x0 "GICD_ICLAR44,Interrupt Class Register 44"
bitfld.long 0x00 31. " SPI719_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI719_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI718_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI718_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI717_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI717_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI716_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI716_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI715_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI715_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI714_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI714_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI713_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI713_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI712_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI712_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI711_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI711_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI710_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI710_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI709_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI709_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI708_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI708_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI707_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI707_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI706_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI706_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI705_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI705_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI704_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI704_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xb0)++0x03
hide.long 0x0 "GICD_ICLAR44,Interrupt Class Register 44"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=22.)
group.long (0xE000+0xb4)++0x03
line.long 0x0 "GICD_ICLAR45,Interrupt Class Register 45"
bitfld.long 0x00 31. " SPI735_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI735_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI734_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI734_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI733_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI733_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI732_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI732_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI731_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI731_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI730_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI730_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI729_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI729_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI728_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI728_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI727_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI727_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI726_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI726_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI725_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI725_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI724_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI724_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI723_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI723_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI722_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI722_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI721_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI721_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI720_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI720_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xb4)++0x03
hide.long 0x0 "GICD_ICLAR45,Interrupt Class Register 45"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=23.)
group.long (0xE000+0xb8)++0x03
line.long 0x0 "GICD_ICLAR46,Interrupt Class Register 46"
bitfld.long 0x00 31. " SPI751_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI751_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI750_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI750_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI749_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI749_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI748_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI748_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI747_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI747_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI746_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI746_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI745_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI745_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI744_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI744_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI743_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI743_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI742_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI742_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI741_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI741_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI740_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI740_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI739_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI739_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI738_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI738_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI737_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI737_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI736_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI736_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xb8)++0x03
hide.long 0x0 "GICD_ICLAR46,Interrupt Class Register 46"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=23.)
group.long (0xE000+0xbc)++0x03
line.long 0x0 "GICD_ICLAR47,Interrupt Class Register 47"
bitfld.long 0x00 31. " SPI767_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI767_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI766_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI766_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI765_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI765_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI764_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI764_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI763_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI763_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI762_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI762_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI761_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI761_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI760_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI760_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI759_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI759_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI758_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI758_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI757_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI757_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI756_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI756_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI755_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI755_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI754_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI754_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI753_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI753_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI752_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI752_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xbc)++0x03
hide.long 0x0 "GICD_ICLAR47,Interrupt Class Register 47"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=24.)
group.long (0xE000+0xc0)++0x03
line.long 0x0 "GICD_ICLAR48,Interrupt Class Register 48"
bitfld.long 0x00 31. " SPI783_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI783_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI782_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI782_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI781_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI781_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI780_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI780_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI779_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI779_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI778_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI778_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI777_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI777_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI776_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI776_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI775_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI775_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI774_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI774_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI773_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI773_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI772_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI772_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI771_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI771_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI770_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI770_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI769_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI769_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI768_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI768_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xc0)++0x03
hide.long 0x0 "GICD_ICLAR48,Interrupt Class Register 48"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=24.)
group.long (0xE000+0xc4)++0x03
line.long 0x0 "GICD_ICLAR49,Interrupt Class Register 49"
bitfld.long 0x00 31. " SPI799_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI799_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI798_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI798_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI797_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI797_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI796_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI796_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI795_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI795_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI794_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI794_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI793_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI793_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI792_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI792_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI791_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI791_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI790_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI790_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI789_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI789_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI788_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI788_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI787_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI787_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI786_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI786_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI785_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI785_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI784_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI784_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xc4)++0x03
hide.long 0x0 "GICD_ICLAR49,Interrupt Class Register 49"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=25.)
group.long (0xE000+0xc8)++0x03
line.long 0x0 "GICD_ICLAR50,Interrupt Class Register 50"
bitfld.long 0x00 31. " SPI815_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI815_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI814_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI814_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI813_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI813_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI812_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI812_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI811_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI811_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI810_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI810_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI809_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI809_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI808_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI808_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI807_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI807_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI806_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI806_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI805_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI805_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI804_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI804_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI803_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI803_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI802_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI802_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI801_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI801_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI800_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI800_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xc8)++0x03
hide.long 0x0 "GICD_ICLAR50,Interrupt Class Register 50"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=25.)
group.long (0xE000+0xcc)++0x03
line.long 0x0 "GICD_ICLAR51,Interrupt Class Register 51"
bitfld.long 0x00 31. " SPI831_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI831_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI830_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI830_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI829_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI829_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI828_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI828_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI827_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI827_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI826_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI826_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI825_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI825_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI824_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI824_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI823_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI823_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI822_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI822_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI821_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI821_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI820_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI820_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI819_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI819_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI818_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI818_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI817_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI817_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI816_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI816_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xcc)++0x03
hide.long 0x0 "GICD_ICLAR51,Interrupt Class Register 51"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=26.)
group.long (0xE000+0xd0)++0x03
line.long 0x0 "GICD_ICLAR52,Interrupt Class Register 52"
bitfld.long 0x00 31. " SPI847_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI847_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI846_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI846_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI845_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI845_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI844_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI844_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI843_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI843_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI842_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI842_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI841_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI841_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI840_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI840_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI839_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI839_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI838_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI838_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI837_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI837_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI836_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI836_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI835_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI835_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI834_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI834_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI833_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI833_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI832_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI832_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xd0)++0x03
hide.long 0x0 "GICD_ICLAR52,Interrupt Class Register 52"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=26.)
group.long (0xE000+0xd4)++0x03
line.long 0x0 "GICD_ICLAR53,Interrupt Class Register 53"
bitfld.long 0x00 31. " SPI863_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI863_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI862_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI862_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI861_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI861_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI860_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI860_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI859_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI859_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI858_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI858_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI857_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI857_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI856_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI856_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI855_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI855_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI854_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI854_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI853_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI853_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI852_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI852_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI851_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI851_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI850_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI850_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI849_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI849_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI848_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI848_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xd4)++0x03
hide.long 0x0 "GICD_ICLAR53,Interrupt Class Register 53"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=27.)
group.long (0xE000+0xd8)++0x03
line.long 0x0 "GICD_ICLAR54,Interrupt Class Register 54"
bitfld.long 0x00 31. " SPI879_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI879_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI878_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI878_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI877_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI877_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI876_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI876_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI875_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI875_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI874_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI874_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI873_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI873_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI872_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI872_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI871_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI871_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI870_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI870_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI869_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI869_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI868_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI868_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI867_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI867_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI866_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI866_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI865_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI865_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI864_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI864_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xd8)++0x03
hide.long 0x0 "GICD_ICLAR54,Interrupt Class Register 54"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=27.)
group.long (0xE000+0xdc)++0x03
line.long 0x0 "GICD_ICLAR55,Interrupt Class Register 55"
bitfld.long 0x00 31. " SPI895_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI895_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI894_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI894_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI893_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI893_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI892_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI892_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI891_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI891_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI890_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI890_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI889_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI889_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI888_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI888_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI887_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI887_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI886_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI886_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI885_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI885_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI884_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI884_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI883_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI883_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI882_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI882_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI881_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI881_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI880_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI880_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xdc)++0x03
hide.long 0x0 "GICD_ICLAR55,Interrupt Class Register 55"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=28.)
group.long (0xE000+0xe0)++0x03
line.long 0x0 "GICD_ICLAR56,Interrupt Class Register 56"
bitfld.long 0x00 31. " SPI911_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI911_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI910_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI910_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI909_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI909_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI908_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI908_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI907_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI907_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI906_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI906_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI905_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI905_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI904_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI904_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI903_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI903_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI902_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI902_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI901_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI901_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI900_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI900_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI899_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI899_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI898_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI898_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI897_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI897_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI896_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI896_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xe0)++0x03
hide.long 0x0 "GICD_ICLAR56,Interrupt Class Register 56"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=28.)
group.long (0xE000+0xe4)++0x03
line.long 0x0 "GICD_ICLAR57,Interrupt Class Register 57"
bitfld.long 0x00 31. " SPI927_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI927_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI926_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI926_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI925_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI925_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI924_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI924_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI923_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI923_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI922_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI922_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI921_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI921_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI920_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI920_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI919_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI919_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI918_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI918_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI917_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI917_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI916_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI916_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI915_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI915_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI914_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI914_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI913_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI913_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI912_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI912_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xe4)++0x03
hide.long 0x0 "GICD_ICLAR57,Interrupt Class Register 57"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=29.)
group.long (0xE000+0xe8)++0x03
line.long 0x0 "GICD_ICLAR58,Interrupt Class Register 58"
bitfld.long 0x00 31. " SPI943_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI943_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI942_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI942_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI941_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI941_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI940_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI940_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI939_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI939_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI938_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI938_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI937_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI937_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI936_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI936_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI935_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI935_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI934_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI934_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI933_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI933_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI932_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI932_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI931_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI931_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI930_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI930_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI929_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI929_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI928_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI928_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xe8)++0x03
hide.long 0x0 "GICD_ICLAR58,Interrupt Class Register 58"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=29.)
group.long (0xE000+0xec)++0x03
line.long 0x0 "GICD_ICLAR59,Interrupt Class Register 59"
bitfld.long 0x00 31. " SPI959_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI959_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI958_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI958_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI957_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI957_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI956_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI956_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI955_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI955_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI954_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI954_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI953_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI953_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI952_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI952_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI951_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI951_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI950_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI950_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI949_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI949_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI948_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI948_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI947_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI947_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI946_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI946_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI945_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI945_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI944_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI944_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xec)++0x03
hide.long 0x0 "GICD_ICLAR59,Interrupt Class Register 59"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=30.)
group.long (0xE000+0xf0)++0x03
line.long 0x0 "GICD_ICLAR60,Interrupt Class Register 60"
bitfld.long 0x00 31. " SPI975_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI975_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI974_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI974_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI973_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI973_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI972_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI972_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI971_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI971_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI970_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI970_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI969_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI969_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI968_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI968_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI967_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI967_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI966_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI966_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI965_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI965_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI964_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI964_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI963_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI963_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI962_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI962_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI961_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI961_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI960_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI960_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xf0)++0x03
hide.long 0x0 "GICD_ICLAR60,Interrupt Class Register 60"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=30.)
group.long (0xE000+0xf4)++0x03
line.long 0x0 "GICD_ICLAR61,Interrupt Class Register 61"
bitfld.long 0x00 31. " SPI991_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 30. "    SPI991_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 29. "    SPI990_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 28. "    SPI990_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 27. " SPI989_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 26. "    SPI989_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 25. "    SPI988_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 24. "    SPI988_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 23. " SPI987_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 22. "    SPI987_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 21. "    SPI986_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 20. "    SPI986_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 19. " SPI985_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 18. "    SPI985_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 17. "    SPI984_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 16. "    SPI984_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 15. " SPI983_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 14. "    SPI983_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 13. "    SPI982_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 12. "    SPI982_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 11. " SPI981_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 10. "    SPI981_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 9. "    SPI980_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 8. "    SPI980_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 7. " SPI979_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 6. "    SPI979_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 5. "    SPI978_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 4. "    SPI978_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
textline "                               "
bitfld.long 0x00 3. " SPI977_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 2. "    SPI977_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
bitfld.long 0x00 1. "    SPI976_CLASS1  ,Controls whether the 1 of N SPI can target a core that is assigned to class 1" "0,1"
bitfld.long 0x00 0. "    SPI976_CLASS0  ,Controls whether the 1 of N SPI can target a core that is assigned to class 0" "0,1"
else
hgroup.long (0xE000+0xf4)++0x03
hide.long 0x0 "GICD_ICLAR61,Interrupt Class Register 61"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
tree.end
tree "Interrupt Error Registers"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=1.)
group.long (0xE100+0x4)++0x03
line.long 0x0 "GICD_IERRR1,Interrupt Error Register 1"
bitfld.long 0x00 31. " SPI049_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI048_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI047_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI046_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI047_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI046_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI045_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI044_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI045_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI044_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI043_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI042_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI043_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI042_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI041_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI040_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI041_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI040_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI039_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI038_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI039_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI038_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI037_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI036_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI037_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI036_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI035_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI034_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI035_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI034_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI033_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI032_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x4)++0x03
hide.long 0x0 "GICD_IERRR1,Interrupt Error Register 1"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=2.)
group.long (0xE100+0x8)++0x03
line.long 0x0 "GICD_IERRR2,Interrupt Error Register 2"
bitfld.long 0x00 31. " SPI081_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI080_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI079_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI078_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI079_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI078_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI077_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI076_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI077_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI076_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI075_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI074_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI075_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI074_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI073_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI072_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI073_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI072_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI071_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI070_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI071_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI070_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI069_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI068_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI069_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI068_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI067_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI066_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI067_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI066_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI065_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI064_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x8)++0x03
hide.long 0x0 "GICD_IERRR2,Interrupt Error Register 2"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=3.)
group.long (0xE100+0xc)++0x03
line.long 0x0 "GICD_IERRR3,Interrupt Error Register 3"
bitfld.long 0x00 31. " SPI113_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI112_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI111_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI110_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI111_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI110_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI109_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI108_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI109_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI108_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI107_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI106_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI107_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI106_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI105_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI104_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI105_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI104_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI103_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI102_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI103_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI102_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI101_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI100_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI101_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI100_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI099_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI098_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI099_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI098_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI097_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI096_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0xc)++0x03
hide.long 0x0 "GICD_IERRR3,Interrupt Error Register 3"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=4.)
group.long (0xE100+0x10)++0x03
line.long 0x0 "GICD_IERRR4,Interrupt Error Register 4"
bitfld.long 0x00 31. " SPI145_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI144_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI143_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI142_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI143_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI142_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI141_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI140_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI141_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI140_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI139_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI138_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI139_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI138_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI137_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI136_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI137_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI136_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI135_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI134_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI135_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI134_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI133_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI132_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI133_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI132_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI131_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI130_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI131_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI130_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI129_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI128_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x10)++0x03
hide.long 0x0 "GICD_IERRR4,Interrupt Error Register 4"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=5.)
group.long (0xE100+0x14)++0x03
line.long 0x0 "GICD_IERRR5,Interrupt Error Register 5"
bitfld.long 0x00 31. " SPI177_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI176_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI175_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI174_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI175_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI174_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI173_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI172_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI173_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI172_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI171_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI170_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI171_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI170_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI169_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI168_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI169_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI168_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI167_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI166_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI167_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI166_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI165_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI164_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI165_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI164_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI163_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI162_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI163_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI162_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI161_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI160_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x14)++0x03
hide.long 0x0 "GICD_IERRR5,Interrupt Error Register 5"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=6.)
group.long (0xE100+0x18)++0x03
line.long 0x0 "GICD_IERRR6,Interrupt Error Register 6"
bitfld.long 0x00 31. " SPI209_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI208_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI207_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI206_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI207_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI206_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI205_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI204_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI205_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI204_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI203_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI202_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI203_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI202_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI201_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI200_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI201_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI200_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI199_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI198_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI199_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI198_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI197_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI196_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI197_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI196_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI195_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI194_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI195_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI194_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI193_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI192_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x18)++0x03
hide.long 0x0 "GICD_IERRR6,Interrupt Error Register 6"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=7.)
group.long (0xE100+0x1c)++0x03
line.long 0x0 "GICD_IERRR7,Interrupt Error Register 7"
bitfld.long 0x00 31. " SPI241_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI240_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI239_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI238_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI239_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI238_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI237_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI236_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI237_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI236_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI235_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI234_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI235_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI234_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI233_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI232_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI233_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI232_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI231_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI230_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI231_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI230_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI229_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI228_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI229_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI228_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI227_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI226_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI227_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI226_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI225_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI224_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x1c)++0x03
hide.long 0x0 "GICD_IERRR7,Interrupt Error Register 7"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=8.)
group.long (0xE100+0x20)++0x03
line.long 0x0 "GICD_IERRR8,Interrupt Error Register 8"
bitfld.long 0x00 31. " SPI273_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI272_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI271_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI270_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI271_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI270_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI269_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI268_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI269_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI268_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI267_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI266_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI267_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI266_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI265_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI264_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI265_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI264_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI263_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI262_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI263_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI262_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI261_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI260_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI261_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI260_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI259_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI258_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI259_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI258_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI257_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI256_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x20)++0x03
hide.long 0x0 "GICD_IERRR8,Interrupt Error Register 8"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=9.)
group.long (0xE100+0x24)++0x03
line.long 0x0 "GICD_IERRR9,Interrupt Error Register 9"
bitfld.long 0x00 31. " SPI305_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI304_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI303_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI302_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI303_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI302_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI301_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI300_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI301_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI300_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI299_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI298_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI299_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI298_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI297_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI296_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI297_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI296_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI295_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI294_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI295_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI294_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI293_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI292_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI293_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI292_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI291_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI290_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI291_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI290_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI289_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI288_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x24)++0x03
hide.long 0x0 "GICD_IERRR9,Interrupt Error Register 9"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=10.)
group.long (0xE100+0x28)++0x03
line.long 0x0 "GICD_IERRR10,Interrupt Error Register 10"
bitfld.long 0x00 31. " SPI337_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI336_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI335_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI334_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI335_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI334_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI333_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI332_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI333_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI332_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI331_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI330_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI331_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI330_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI329_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI328_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI329_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI328_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI327_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI326_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI327_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI326_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI325_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI324_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI325_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI324_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI323_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI322_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI323_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI322_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI321_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI320_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x28)++0x03
hide.long 0x0 "GICD_IERRR10,Interrupt Error Register 10"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=11.)
group.long (0xE100+0x2c)++0x03
line.long 0x0 "GICD_IERRR11,Interrupt Error Register 11"
bitfld.long 0x00 31. " SPI369_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI368_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI367_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI366_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI367_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI366_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI365_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI364_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI365_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI364_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI363_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI362_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI363_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI362_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI361_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI360_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI361_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI360_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI359_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI358_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI359_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI358_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI357_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI356_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI357_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI356_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI355_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI354_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI355_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI354_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI353_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI352_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x2c)++0x03
hide.long 0x0 "GICD_IERRR11,Interrupt Error Register 11"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=12.)
group.long (0xE100+0x30)++0x03
line.long 0x0 "GICD_IERRR12,Interrupt Error Register 12"
bitfld.long 0x00 31. " SPI401_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI400_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI399_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI398_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI399_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI398_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI397_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI396_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI397_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI396_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI395_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI394_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI395_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI394_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI393_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI392_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI393_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI392_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI391_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI390_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI391_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI390_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI389_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI388_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI389_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI388_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI387_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI386_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI387_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI386_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI385_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI384_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x30)++0x03
hide.long 0x0 "GICD_IERRR12,Interrupt Error Register 12"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=13.)
group.long (0xE100+0x34)++0x03
line.long 0x0 "GICD_IERRR13,Interrupt Error Register 13"
bitfld.long 0x00 31. " SPI433_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI432_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI431_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI430_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI431_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI430_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI429_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI428_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI429_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI428_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI427_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI426_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI427_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI426_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI425_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI424_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI425_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI424_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI423_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI422_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI423_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI422_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI421_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI420_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI421_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI420_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI419_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI418_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI419_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI418_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI417_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI416_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x34)++0x03
hide.long 0x0 "GICD_IERRR13,Interrupt Error Register 13"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=14.)
group.long (0xE100+0x38)++0x03
line.long 0x0 "GICD_IERRR14,Interrupt Error Register 14"
bitfld.long 0x00 31. " SPI465_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI464_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI463_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI462_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI463_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI462_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI461_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI460_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI461_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI460_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI459_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI458_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI459_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI458_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI457_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI456_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI457_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI456_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI455_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI454_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI455_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI454_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI453_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI452_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI453_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI452_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI451_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI450_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI451_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI450_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI449_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI448_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x38)++0x03
hide.long 0x0 "GICD_IERRR14,Interrupt Error Register 14"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=15.)
group.long (0xE100+0x3c)++0x03
line.long 0x0 "GICD_IERRR15,Interrupt Error Register 15"
bitfld.long 0x00 31. " SPI497_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI496_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI495_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI494_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI495_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI494_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI493_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI492_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI493_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI492_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI491_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI490_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI491_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI490_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI489_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI488_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI489_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI488_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI487_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI486_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI487_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI486_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI485_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI484_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI485_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI484_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI483_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI482_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI483_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI482_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI481_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI480_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x3c)++0x03
hide.long 0x0 "GICD_IERRR15,Interrupt Error Register 15"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=16.)
group.long (0xE100+0x40)++0x03
line.long 0x0 "GICD_IERRR16,Interrupt Error Register 16"
bitfld.long 0x00 31. " SPI529_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI528_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI527_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI526_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI527_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI526_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI525_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI524_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI525_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI524_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI523_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI522_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI523_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI522_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI521_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI520_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI521_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI520_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI519_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI518_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI519_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI518_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI517_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI516_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI517_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI516_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI515_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI514_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI515_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI514_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI513_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI512_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x40)++0x03
hide.long 0x0 "GICD_IERRR16,Interrupt Error Register 16"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=17.)
group.long (0xE100+0x44)++0x03
line.long 0x0 "GICD_IERRR17,Interrupt Error Register 17"
bitfld.long 0x00 31. " SPI561_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI560_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI559_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI558_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI559_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI558_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI557_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI556_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI557_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI556_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI555_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI554_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI555_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI554_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI553_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI552_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI553_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI552_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI551_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI550_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI551_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI550_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI549_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI548_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI549_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI548_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI547_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI546_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI547_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI546_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI545_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI544_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x44)++0x03
hide.long 0x0 "GICD_IERRR17,Interrupt Error Register 17"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=18.)
group.long (0xE100+0x48)++0x03
line.long 0x0 "GICD_IERRR18,Interrupt Error Register 18"
bitfld.long 0x00 31. " SPI593_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI592_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI591_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI590_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI591_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI590_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI589_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI588_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI589_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI588_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI587_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI586_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI587_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI586_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI585_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI584_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI585_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI584_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI583_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI582_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI583_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI582_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI581_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI580_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI581_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI580_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI579_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI578_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI579_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI578_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI577_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI576_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x48)++0x03
hide.long 0x0 "GICD_IERRR18,Interrupt Error Register 18"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=19.)
group.long (0xE100+0x4c)++0x03
line.long 0x0 "GICD_IERRR19,Interrupt Error Register 19"
bitfld.long 0x00 31. " SPI625_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI624_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI623_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI622_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI623_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI622_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI621_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI620_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI621_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI620_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI619_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI618_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI619_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI618_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI617_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI616_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI617_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI616_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI615_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI614_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI615_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI614_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI613_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI612_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI613_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI612_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI611_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI610_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI611_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI610_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI609_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI608_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x4c)++0x03
hide.long 0x0 "GICD_IERRR19,Interrupt Error Register 19"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=20.)
group.long (0xE100+0x50)++0x03
line.long 0x0 "GICD_IERRR20,Interrupt Error Register 20"
bitfld.long 0x00 31. " SPI657_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI656_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI655_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI654_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI655_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI654_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI653_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI652_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI653_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI652_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI651_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI650_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI651_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI650_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI649_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI648_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI649_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI648_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI647_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI646_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI647_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI646_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI645_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI644_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI645_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI644_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI643_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI642_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI643_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI642_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI641_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI640_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x50)++0x03
hide.long 0x0 "GICD_IERRR20,Interrupt Error Register 20"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=21.)
group.long (0xE100+0x54)++0x03
line.long 0x0 "GICD_IERRR21,Interrupt Error Register 21"
bitfld.long 0x00 31. " SPI689_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI688_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI687_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI686_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI687_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI686_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI685_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI684_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI685_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI684_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI683_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI682_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI683_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI682_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI681_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI680_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI681_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI680_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI679_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI678_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI679_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI678_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI677_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI676_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI677_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI676_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI675_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI674_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI675_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI674_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI673_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI672_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x54)++0x03
hide.long 0x0 "GICD_IERRR21,Interrupt Error Register 21"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=22.)
group.long (0xE100+0x58)++0x03
line.long 0x0 "GICD_IERRR22,Interrupt Error Register 22"
bitfld.long 0x00 31. " SPI721_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI720_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI719_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI718_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI719_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI718_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI717_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI716_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI717_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI716_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI715_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI714_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI715_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI714_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI713_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI712_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI713_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI712_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI711_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI710_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI711_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI710_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI709_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI708_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI709_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI708_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI707_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI706_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI707_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI706_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI705_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI704_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x58)++0x03
hide.long 0x0 "GICD_IERRR22,Interrupt Error Register 22"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=23.)
group.long (0xE100+0x5c)++0x03
line.long 0x0 "GICD_IERRR23,Interrupt Error Register 23"
bitfld.long 0x00 31. " SPI753_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI752_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI751_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI750_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI751_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI750_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI749_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI748_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI749_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI748_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI747_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI746_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI747_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI746_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI745_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI744_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI745_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI744_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI743_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI742_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI743_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI742_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI741_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI740_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI741_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI740_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI739_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI738_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI739_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI738_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI737_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI736_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x5c)++0x03
hide.long 0x0 "GICD_IERRR23,Interrupt Error Register 23"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=24.)
group.long (0xE100+0x60)++0x03
line.long 0x0 "GICD_IERRR24,Interrupt Error Register 24"
bitfld.long 0x00 31. " SPI785_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI784_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI783_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI782_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI783_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI782_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI781_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI780_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI781_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI780_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI779_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI778_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI779_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI778_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI777_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI776_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI777_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI776_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI775_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI774_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI775_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI774_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI773_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI772_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI773_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI772_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI771_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI770_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI771_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI770_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI769_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI768_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x60)++0x03
hide.long 0x0 "GICD_IERRR24,Interrupt Error Register 24"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=25.)
group.long (0xE100+0x64)++0x03
line.long 0x0 "GICD_IERRR25,Interrupt Error Register 25"
bitfld.long 0x00 31. " SPI817_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI816_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI815_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI814_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI815_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI814_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI813_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI812_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI813_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI812_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI811_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI810_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI811_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI810_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI809_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI808_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI809_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI808_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI807_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI806_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI807_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI806_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI805_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI804_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI805_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI804_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI803_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI802_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI803_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI802_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI801_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI800_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x64)++0x03
hide.long 0x0 "GICD_IERRR25,Interrupt Error Register 25"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=26.)
group.long (0xE100+0x68)++0x03
line.long 0x0 "GICD_IERRR26,Interrupt Error Register 26"
bitfld.long 0x00 31. " SPI849_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI848_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI847_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI846_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI847_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI846_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI845_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI844_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI845_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI844_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI843_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI842_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI843_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI842_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI841_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI840_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI841_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI840_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI839_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI838_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI839_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI838_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI837_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI836_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI837_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI836_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI835_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI834_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI835_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI834_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI833_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI832_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x68)++0x03
hide.long 0x0 "GICD_IERRR26,Interrupt Error Register 26"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=27.)
group.long (0xE100+0x6c)++0x03
line.long 0x0 "GICD_IERRR27,Interrupt Error Register 27"
bitfld.long 0x00 31. " SPI881_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI880_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI879_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI878_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI879_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI878_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI877_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI876_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI877_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI876_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI875_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI874_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI875_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI874_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI873_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI872_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI873_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI872_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI871_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI870_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI871_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI870_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI869_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI868_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI869_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI868_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI867_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI866_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI867_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI866_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI865_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI864_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x6c)++0x03
hide.long 0x0 "GICD_IERRR27,Interrupt Error Register 27"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=28.)
group.long (0xE100+0x70)++0x03
line.long 0x0 "GICD_IERRR28,Interrupt Error Register 28"
bitfld.long 0x00 31. " SPI913_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI912_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI911_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI910_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI911_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI910_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI909_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI908_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI909_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI908_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI907_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI906_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI907_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI906_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI905_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI904_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI905_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI904_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI903_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI902_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI903_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI902_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI901_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI900_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI901_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI900_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI899_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI898_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI899_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI898_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI897_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI896_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x70)++0x03
hide.long 0x0 "GICD_IERRR28,Interrupt Error Register 28"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=29.)
group.long (0xE100+0x74)++0x03
line.long 0x0 "GICD_IERRR29,Interrupt Error Register 29"
bitfld.long 0x00 31. " SPI945_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI944_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI943_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI942_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI943_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI942_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI941_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI940_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI941_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI940_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI939_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI938_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI939_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI938_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI937_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI936_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI937_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI936_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI935_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI934_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI935_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI934_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI933_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI932_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI933_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI932_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI931_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI930_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI931_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI930_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI929_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI928_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x74)++0x03
hide.long 0x0 "GICD_IERRR29,Interrupt Error Register 29"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=30.)
group.long (0xE100+0x78)++0x03
line.long 0x0 "GICD_IERRR30,Interrupt Error Register 30"
bitfld.long 0x00 31. " SPI977_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 30. "    SPI976_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 29. "    SPI975_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 28. "    SPI974_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 27. " SPI975_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 26. "    SPI974_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 25. "    SPI973_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 24. "    SPI972_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 23. " SPI973_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 22. "    SPI972_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 21. "    SPI971_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 20. "    SPI970_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 19. " SPI971_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 18. "    SPI970_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 17. "    SPI969_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 16. "    SPI968_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 15. " SPI969_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 14. "    SPI968_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 13. "    SPI967_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 12. "    SPI966_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 11. " SPI967_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 10. "    SPI966_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 9. "    SPI965_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 8. "    SPI964_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 7. " SPI965_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 6. "    SPI964_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 5. "    SPI963_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 4. "    SPI962_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
textline "                               "
bitfld.long 0x00 3. " SPI963_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 2. "    SPI962_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 1. "    SPI961_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
bitfld.long 0x00 0. "    SPI960_STATUS  ,Indicates whether a SPI is in an error state. 0 = The SPI is not in an error state and programming is valid. 1 = The SPI is in an error state and programming is not valid." "OK,ERR"
else
hgroup.long (0xE100+0x78)++0x03
hide.long 0x0 "GICD_IERRR30,Interrupt Error Register 30"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
tree.end
width 14.
tree "Peripheral/Component ID Registers"
rgroup.quad 0xF000++0x07
line.quad 0x00 "GICD_CFGID,Configuration ID Register"
bitfld.quad 0x00 44.--47. "   AFF3    ,Returns the Affinity3 bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 40.--43. "               AFF2  ,Returns the Affinity2 bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 36.--39. "             AFF1  ,Returns the Affinity1 bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                               "
bitfld.quad 0x00 32.--35. "   AFF0    ,Returns the Affinity0 bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 15.--20. "               SPIS  ,SPI Groups" "0,1,2,3,4,5,6,7,8,9,10,%d..."
bitfld.quad 0x00 14. "             AFSL  ,Chip affinity selection level" "0,1"
textline "                               "
bitfld.quad 0x00 13. "   DLPI    ,Direct LPI registers supported" "Not Supported,Supported"
bitfld.quad 0x00 12. "    LPIS  ,LPI supported" "Not Supported,Supported"
bitfld.quad 0x00 4.--7. "  SNUM  ,Chip number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                               "
bitfld.quad 0x00 0. "   SO      ,Chip offline" "OFFLINE,ONLINE"
rgroup.long 0xFFE0++0x03
line.long 0x00 "GICD_PIDR0,Peripheral ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. "           PART_0  ,Part number[7:0]"
rgroup.long 0xFFE4++0x03
line.long 0x00 "GICD_PIDR1,Peripheral ID1 Register"
bitfld.long 0x00 4.--7. "           DES_1   ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "               PART_1 ,         Part number[11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFE8++0x03
line.long 0x00 "GICD_PIDR2,Peripheral ID2 Register"
bitfld.long 0x00 4.--7. "           ARCHREV ,Identifies the version of the GIC architecture with which the GIC-600 complies" "Reserved,Reserved,Reserved,v3.0,?..."
bitfld.long 0x00 3. "         JEDEC  ,Indicates that a JEDEC-assigned JEP106 identity code is used" "Not Used,Used"
bitfld.long 0x00 0.--2. "      DES_1 ,JEP106 identity code [6:4]" "0,1,2,3,4,5,6,7"
rgroup.long 0xFFEC++0x03
line.long 0x00 "GICD_PIDR3,Peripheral ID3 Register"
bitfld.long 0x00 4.--7. "           REVAND  ,Manufacturer defined revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "               CMOD   ,Indicates if the customer has modified the behavior of the component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFD0++0x03
line.long 0x00 "GICD_PIDR4,Peripheral ID4 Register"
bitfld.long 0x00 4.--7. "           SIZE    ,64 KB software visible page" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "               DES_2  ,ARM implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0xFFD4++0x03
hide.long 0x00 "GICD_PIDR5,Peripheral ID5 Register"
hgroup.long 0xFFD8++0x03
hide.long 0x00 "GICD_PIDR6,Peripheral ID6 Register"
hgroup.long 0xFFDC++0x03
hide.long 0x00 "GICD_PIDR7,Peripheral ID7 Register"
rgroup.long 0xFFF0++0x03
line.long 0x00 "GICD_CIDR0,Component ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. "           FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF4++0x03
line.long 0x00 "GICD_CIDR1,Component ID1 Register"
hexmask.long.byte 0x00 0.--7. 1. "           FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF8++0x03
line.long 0x00 "GICD_CIDR2,Component ID2 Register"
hexmask.long.byte 0x00 0.--7. 1. "           FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFFC++0x03
line.long 0x00 "GICD_CIDR3,Component ID3 Register"
hexmask.long.byte 0x00 0.--7. 1. "           FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
tree.end
tree.end
width 0x0B
base (COMP.BASE("GICD",-1.)+0x20000)
AUTOINDENT.ON CENTER TREE
tree "Trace and Debug"
tree "Error Record 0: Software error in GICD programming"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((0.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR0FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (0.==0.)
group.quad ((0.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR0CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((0.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR0STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((0.&0x1)==0x0)
group.quad ((0.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR0CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((0.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR0STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((0.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR0CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((0.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR0STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+0.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((0.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR0ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((0.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR0ADDR,Error Record Address Register"
else
group.quad ((0.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR0ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((0.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR0MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((0.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR0FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((0.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR0CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((0.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR0STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((0.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR0ADDR,Error Record Address Register"
hgroup.quad ((0.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR0MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((0.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR0FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (0.==0.)
group.quad ((0.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR0CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((0.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR0STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((0.&0x1)==0x0)
group.quad ((0.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR0CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((0.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR0STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((0.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR0CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((0.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR0STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+0.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((0.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR0ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((0.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR0ADDR,Error Record Address Register"
else
group.quad ((0.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR0ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((0.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR0MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((0.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR0FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((0.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR0CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((0.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR0STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((0.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR0ADDR,Error Record Address Register"
hgroup.quad ((0.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR0MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 1: Correctable SPI RAM errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((1.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR1FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (1.==0.)
group.quad ((1.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR1CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((1.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR1STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((1.&0x1)==0x0)
group.quad ((1.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR1CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((1.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR1STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((1.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR1CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((1.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR1STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+1.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((1.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR1ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((1.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR1ADDR,Error Record Address Register"
else
group.quad ((1.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR1ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((1.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR1MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((1.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR1FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((1.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR1CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((1.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR1STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((1.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR1ADDR,Error Record Address Register"
hgroup.quad ((1.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR1MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((1.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR1FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (1.==0.)
group.quad ((1.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR1CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((1.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR1STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((1.&0x1)==0x0)
group.quad ((1.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR1CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((1.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR1STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((1.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR1CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((1.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR1STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+1.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((1.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR1ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((1.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR1ADDR,Error Record Address Register"
else
group.quad ((1.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR1ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((1.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR1MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((1.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR1FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((1.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR1CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((1.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR1STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((1.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR1ADDR,Error Record Address Register"
hgroup.quad ((1.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR1MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 2: Uncorrectable SPI RAM errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((2.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR2FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (2.==0.)
group.quad ((2.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR2CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((2.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR2STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((2.&0x1)==0x0)
group.quad ((2.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR2CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((2.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR2STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((2.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR2CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((2.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR2STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+2.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((2.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR2ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((2.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR2ADDR,Error Record Address Register"
else
group.quad ((2.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR2ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((2.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR2MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((2.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR2FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((2.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR2CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((2.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR2STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((2.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR2ADDR,Error Record Address Register"
hgroup.quad ((2.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR2MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((2.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR2FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (2.==0.)
group.quad ((2.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR2CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((2.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR2STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((2.&0x1)==0x0)
group.quad ((2.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR2CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((2.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR2STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((2.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR2CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((2.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR2STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+2.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((2.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR2ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((2.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR2ADDR,Error Record Address Register"
else
group.quad ((2.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR2ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((2.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR2MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((2.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR2FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((2.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR2CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((2.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR2STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((2.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR2ADDR,Error Record Address Register"
hgroup.quad ((2.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR2MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 3: Correctable SGI RAM errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((3.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR3FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (3.==0.)
group.quad ((3.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR3CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((3.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR3STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((3.&0x1)==0x0)
group.quad ((3.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR3CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((3.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR3STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((3.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR3CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((3.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR3STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+3.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((3.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR3ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((3.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR3ADDR,Error Record Address Register"
else
group.quad ((3.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR3ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((3.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR3MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((3.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR3FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((3.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR3CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((3.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR3STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((3.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR3ADDR,Error Record Address Register"
hgroup.quad ((3.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR3MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((3.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR3FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (3.==0.)
group.quad ((3.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR3CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((3.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR3STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((3.&0x1)==0x0)
group.quad ((3.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR3CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((3.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR3STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((3.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR3CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((3.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR3STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+3.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((3.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR3ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((3.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR3ADDR,Error Record Address Register"
else
group.quad ((3.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR3ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((3.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR3MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((3.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR3FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((3.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR3CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((3.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR3STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((3.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR3ADDR,Error Record Address Register"
hgroup.quad ((3.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR3MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 4: Uncorrectable SGI RAM errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((4.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR4FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (4.==0.)
group.quad ((4.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR4CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((4.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR4STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((4.&0x1)==0x0)
group.quad ((4.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR4CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((4.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR4STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((4.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR4CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((4.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR4STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+4.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((4.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR4ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((4.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR4ADDR,Error Record Address Register"
else
group.quad ((4.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR4ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((4.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR4MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((4.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR4FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((4.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR4CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((4.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR4STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((4.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR4ADDR,Error Record Address Register"
hgroup.quad ((4.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR4MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((4.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR4FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (4.==0.)
group.quad ((4.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR4CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((4.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR4STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((4.&0x1)==0x0)
group.quad ((4.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR4CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((4.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR4STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((4.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR4CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((4.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR4STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+4.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((4.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR4ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((4.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR4ADDR,Error Record Address Register"
else
group.quad ((4.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR4ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((4.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR4MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((4.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR4FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((4.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR4CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((4.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR4STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((4.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR4ADDR,Error Record Address Register"
hgroup.quad ((4.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR4MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 5: Correctable TGT cache errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((5.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR5FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (5.==0.)
group.quad ((5.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR5CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((5.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR5STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((5.&0x1)==0x0)
group.quad ((5.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR5CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((5.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR5STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((5.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR5CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((5.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR5STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+5.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((5.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR5ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((5.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR5ADDR,Error Record Address Register"
else
group.quad ((5.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR5ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((5.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR5MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((5.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR5FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((5.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR5CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((5.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR5STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((5.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR5ADDR,Error Record Address Register"
hgroup.quad ((5.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR5MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((5.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR5FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (5.==0.)
group.quad ((5.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR5CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((5.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR5STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((5.&0x1)==0x0)
group.quad ((5.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR5CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((5.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR5STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((5.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR5CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((5.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR5STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+5.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((5.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR5ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((5.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR5ADDR,Error Record Address Register"
else
group.quad ((5.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR5ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((5.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR5MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((5.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR5FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((5.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR5CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((5.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR5STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((5.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR5ADDR,Error Record Address Register"
hgroup.quad ((5.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR5MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 6: Uncorrectable TGT cache errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((6.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR6FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (6.==0.)
group.quad ((6.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR6CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((6.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR6STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((6.&0x1)==0x0)
group.quad ((6.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR6CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((6.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR6STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((6.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR6CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((6.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR6STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+6.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((6.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR6ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((6.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR6ADDR,Error Record Address Register"
else
group.quad ((6.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR6ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((6.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR6MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((6.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR6FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((6.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR6CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((6.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR6STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((6.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR6ADDR,Error Record Address Register"
hgroup.quad ((6.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR6MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((6.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR6FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (6.==0.)
group.quad ((6.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR6CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((6.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR6STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((6.&0x1)==0x0)
group.quad ((6.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR6CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((6.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR6STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((6.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR6CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((6.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR6STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+6.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((6.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR6ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((6.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR6ADDR,Error Record Address Register"
else
group.quad ((6.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR6ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((6.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR6MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((6.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR6FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((6.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR6CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((6.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR6STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((6.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR6ADDR,Error Record Address Register"
hgroup.quad ((6.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR6MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 7: Correctable PPI RAM errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((7.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR7FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (7.==0.)
group.quad ((7.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR7CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((7.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR7STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((7.&0x1)==0x0)
group.quad ((7.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR7CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((7.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR7STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((7.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR7CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((7.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR7STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+7.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((7.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR7ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((7.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR7ADDR,Error Record Address Register"
else
group.quad ((7.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR7ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((7.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR7MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((7.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR7FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((7.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR7CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((7.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR7STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((7.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR7ADDR,Error Record Address Register"
hgroup.quad ((7.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR7MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((7.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR7FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (7.==0.)
group.quad ((7.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR7CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((7.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR7STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((7.&0x1)==0x0)
group.quad ((7.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR7CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((7.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR7STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((7.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR7CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((7.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR7STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+7.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((7.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR7ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((7.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR7ADDR,Error Record Address Register"
else
group.quad ((7.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR7ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((7.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR7MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((7.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR7FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((7.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR7CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((7.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR7STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((7.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR7ADDR,Error Record Address Register"
hgroup.quad ((7.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR7MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 8: Uncorrectable PPI RAM errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((8.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR8FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (8.==0.)
group.quad ((8.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR8CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((8.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR8STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((8.&0x1)==0x0)
group.quad ((8.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR8CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((8.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR8STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((8.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR8CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((8.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR8STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+8.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((8.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR8ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((8.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR8ADDR,Error Record Address Register"
else
group.quad ((8.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR8ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((8.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR8MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((8.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR8FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((8.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR8CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((8.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR8STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((8.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR8ADDR,Error Record Address Register"
hgroup.quad ((8.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR8MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((8.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR8FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (8.==0.)
group.quad ((8.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR8CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((8.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR8STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((8.&0x1)==0x0)
group.quad ((8.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR8CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((8.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR8STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((8.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR8CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((8.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR8STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+8.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((8.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR8ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((8.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR8ADDR,Error Record Address Register"
else
group.quad ((8.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR8ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((8.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR8MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((8.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR8FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((8.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR8CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((8.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR8STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((8.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR8ADDR,Error Record Address Register"
hgroup.quad ((8.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR8MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 9: Correctable LPI RAM errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((9.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR9FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (9.==0.)
group.quad ((9.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR9CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((9.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR9STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((9.&0x1)==0x0)
group.quad ((9.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR9CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((9.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR9STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((9.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR9CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((9.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR9STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+9.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((9.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR9ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((9.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR9ADDR,Error Record Address Register"
else
group.quad ((9.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR9ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((9.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR9MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((9.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR9FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((9.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR9CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((9.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR9STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((9.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR9ADDR,Error Record Address Register"
hgroup.quad ((9.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR9MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((9.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR9FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (9.==0.)
group.quad ((9.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR9CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((9.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR9STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((9.&0x1)==0x0)
group.quad ((9.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR9CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((9.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR9STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((9.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR9CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((9.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR9STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+9.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((9.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR9ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((9.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR9ADDR,Error Record Address Register"
else
group.quad ((9.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR9ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((9.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR9MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((9.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR9FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((9.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR9CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((9.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR9STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((9.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR9ADDR,Error Record Address Register"
hgroup.quad ((9.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR9MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 10: Uncorrectable LPI RAM errors"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((10.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR10FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (10.==0.)
group.quad ((10.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR10CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((10.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR10STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((10.&0x1)==0x0)
group.quad ((10.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR10CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((10.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR10STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((10.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR10CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((10.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR10STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+10.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((10.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR10ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((10.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR10ADDR,Error Record Address Register"
else
group.quad ((10.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR10ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((10.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR10MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((10.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR10FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((10.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR10CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((10.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR10STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((10.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR10ADDR,Error Record Address Register"
hgroup.quad ((10.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR10MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((10.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR10FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (10.==0.)
group.quad ((10.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR10CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((10.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR10STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((10.&0x1)==0x0)
group.quad ((10.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR10CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((10.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR10STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((10.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR10CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((10.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR10STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+10.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((10.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR10ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((10.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR10ADDR,Error Record Address Register"
else
group.quad ((10.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR10ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((10.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR10MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((10.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR10FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((10.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR10CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((10.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR10STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((10.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR10ADDR,Error Record Address Register"
hgroup.quad ((10.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR10MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 11: Correctable error from ITS RAM"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((11.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR11FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (11.==0.)
group.quad ((11.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR11CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((11.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR11STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((11.&0x1)==0x0)
group.quad ((11.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR11CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((11.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR11STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((11.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR11CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((11.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR11STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+11.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((11.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR11ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((11.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR11ADDR,Error Record Address Register"
else
group.quad ((11.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR11ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((11.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR11MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((11.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR11FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((11.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR11CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((11.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR11STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((11.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR11ADDR,Error Record Address Register"
hgroup.quad ((11.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR11MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((11.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR11FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (11.==0.)
group.quad ((11.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR11CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((11.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR11STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((11.&0x1)==0x0)
group.quad ((11.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR11CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((11.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR11STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((11.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR11CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((11.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR11STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+11.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((11.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR11ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((11.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR11ADDR,Error Record Address Register"
else
group.quad ((11.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR11ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((11.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR11MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((11.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR11FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((11.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR11CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((11.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR11STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((11.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR11ADDR,Error Record Address Register"
hgroup.quad ((11.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR11MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 12: Uncorrectable error from ITS RAM"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((12.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR12FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (12.==0.)
group.quad ((12.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR12CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((12.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR12STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((12.&0x1)==0x0)
group.quad ((12.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR12CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((12.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR12STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((12.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR12CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((12.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR12STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+12.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((12.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR12ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((12.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR12ADDR,Error Record Address Register"
else
group.quad ((12.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR12ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((12.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR12MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((12.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR12FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((12.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR12CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((12.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR12STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((12.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR12ADDR,Error Record Address Register"
hgroup.quad ((12.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR12MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((12.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR12FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (12.==0.)
group.quad ((12.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR12CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((12.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR12STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((12.&0x1)==0x0)
group.quad ((12.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR12CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((12.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR12STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((12.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR12CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((12.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR12STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+12.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((12.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR12ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((12.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR12ADDR,Error Record Address Register"
else
group.quad ((12.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR12ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((12.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR12MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((12.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR12FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((12.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR12CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((12.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR12STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((12.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR12ADDR,Error Record Address Register"
hgroup.quad ((12.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR12MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Error Record 13: Software error in ITS"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
if 1==1
rgroup.quad ((13.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR13FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (13.==0.)
group.quad ((13.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR13CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((13.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR13STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((13.&0x1)==0x0)
group.quad ((13.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR13CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((13.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR13STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((13.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR13CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((13.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR13STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+13.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((13.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR13ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((13.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR13ADDR,Error Record Address Register"
else
group.quad ((13.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR13ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((13.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR13MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((13.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR13FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((13.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR13CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((13.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR13STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((13.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR13ADDR,Error Record Address Register"
hgroup.quad ((13.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR13MISC0,Error Record Miscellaneous Register 0"
endif
else
if 0==1
rgroup.quad ((13.*0x40)+0x000)++0x07
line.quad 0x00 "GICT_ERR13FR,Error Record Feature Register"
bitfld.quad 0x00 15. " RP   ,Repeat corrected error counter implemented." "0,1"
hexmask.quad.byte 0x00 12.--14. 1. "   CEC ,Corrected error count."
bitfld.quad 0x00 10.--11. "   CFI ,Corrected errors fault interrupt. Indicates if a fault handling interrupt for corrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  8.--9.  " UE ,Uncorrected error. Indicates if an in-band uncorrected error reporting feature is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  6.--7.  "  FI ,Fault handling interrupt for uncorrected errors. Indicates if a fault handling interrupt is implemented." "Not Implemented,?,Implemented,?"
bitfld.quad 0x00  4.--5.  "  UI ,Error recovery interrupt for uncorrected errors. Indicates if an error recovery interrupt for uncorrected errors is implemented." "Not Implemented,?,Implemented,?"
NEWLINE
bitfld.quad 0x00  2.--3.  " DE ,Error recovery interrupt for uncorrected errors. Indicates if deferring of errors support is supported." "Not Supported,?,?,?"
bitfld.quad 0x00  0.--1.  "  ED ,Uncorrected error reporting. Indicates if uncorrected error reporting is enabled." "Disabled,Enabled,?,?"
if (13.==0.)
group.quad ((13.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR13CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((13.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR13STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "           UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "   IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
elif ((13.&0x1)==0x0)
group.quad ((13.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR13CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
bitfld.quad 0x00  4. "   UE   ,Uncorrected error. Controls whether an external abort with transaction is send" "Not Send,Send"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Controls whether an fault handling interrupt generated on all uncorrectable errors or on none." "No Assert,Assert"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Controls whether an error recovery interrupt is generated on all uncorrectable errors or on none." "No Assert,Assert"
group.quad ((13.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR13STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 20.--21. "              UET   ," "?,UEO,?,UER"
hexmask.quad.byte 0x00  8.--15. 1. "  IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
else
group.quad ((13.*0x40)+0x008)++0x07
line.quad 0x00 "GICT_ERR13CTLR,Error Record Control Register"
bitfld.quad 0x00 15. " RP   ,Controls whether an error response to a transition is reported." "Report,No Report"
bitfld.quad 0x00  8. "   CFI   ,Corrected errors fault interrupt.Controls whether a corrected error generates a fault handling interrupt." "No Assert,Assert"
NEWLINE
bitfld.quad 0x00  3. " FI   ,Fault handling interrupt. Should Be Zero (SBZ)." "0,1"
bitfld.quad 0x00  2. "   UI   ,Error recovery interrupt for uncorrected error. Should Be Zero (SBZ)." "0,1"
group.quad ((13.*0x40)+0x010)++0x07
line.quad 0x00 "GICT_ERR13STATUS,Error Record Primary Status Register"
bitfld.quad 0x00 31. " AV   ,Indicates if the GICT_ERR<n>ADDR address is valid, i.e. contains an address that is associated with the highest priority error that this record stores. Only present in record 0." "Not Valid,Valid"
bitfld.quad 0x00 30. "  V   ,Indicates if this  GICT_ERR<n>STATUS register is valid and one or more errors are recorded." "Not Valid,Valid"
bitfld.quad 0x00 29. "  UE   ,Uncorrectable error bit. Should Be Zero (SBZ) in Correctable Error (CE) records." "0,1"
NEWLINE
bitfld.quad 0x00 28. " ER   ,Indicates that at least one error has been reported over ACE-Lite." "0,1"
bitfld.quad 0x00 27. "  OF   ,Indicates that record has overflowed." "0,1"
bitfld.quad 0x00 26. "  MV   ,Indicates if the GICT miscellaneous GICT_ERR<n>MISC0 and GICT_ERR<n>MISC1 registers are valid." "Not Valid,Valid"
NEWLINE
bitfld.quad 0x00 24.--25. " CE   ,Indicates if an CE was recorded." "No Record,?,Record,?"
hexmask.quad.byte 0x00  8.--15. 1. "                    IERR ,Implementation defined error code. This field is RO if one value is specified. Returns the summary table information."
NEWLINE
hexmask.quad.byte 0x00  0.--7.  1. " SERR ,Architecturally-defined primary error code. This field is RO if one value is specified. Returns the summary table information."
endif
if ((per.q(((COMP.BASE("GICD",-1.)+0x20000)+13.*0x40)+0x010))&0x80000000)==0x80000000
rgroup.quad ((13.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR13ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
elif (((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0000)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0c00)||(((per.q(((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x010))&0xff00)==0x0d00)
hgroup.quad ((13.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR13ADDR,Error Record Address Register"
else
group.quad ((13.*0x40)+0x018)++0x07
line.quad 0x00 "GICT_ERR13ADDR,Error Record Address Register"
bitfld.quad 0x00 63. " NS   ,Indicates if address is secure or non-secure." "Secure,Non-Secure"
hexmask.quad.quad 0x00 0.--47. 1. "  PADDR   ,The error address."
endif
group.quad ((13.*0x40)+0x020)++0x07
line.quad 0x00 "GICT_ERR13MISC0,Error Record Miscellaneous Register 0"
bitfld.quad 0x00 41. " RE   ,Rounding Error. The rounding error counter is under-reporting." "0,1"
bitfld.quad 0x00 40. "  OVERFLOW   ,Sticky overflow bit. If the corrected fault handling interrupt is enabled, then the GIC-600 generates a fault handling interrupt." "0,1"
hexmask.quad.word 0x00 32.--39. 1. "  COUNT   ,Corrected error count. Error counter is not 0 or is more than 134. Incremented for each corrected error that does not match the recorded syndrome."
NEWLINE
hexmask.quad.long 0x00  0.--31. 1. " DATA   ,Information associated with the error. See table in the TRM."
else
hgroup.quad ((13.*0x40)+0x000)++0x07
hide.quad 0x00 "GICT_ERR13FR,Error Record Feature Register"
NEWLINE
NEWLINE
hgroup.quad ((13.*0x40)+0x008)++0x07
hide.quad 0x00 "GICT_ERR13CTLR,Error Record Control Register"
NEWLINE
hgroup.quad ((13.*0x40)+0x010)++0x07
hide.quad 0x00 "GICT_ERR13STATUS,Error Record Primary Status Register"
NEWLINE
NEWLINE
NEWLINE
hgroup.quad ((13.*0x40)+0x018)++0x07
hide.quad 0x00 "GICT_ERR13ADDR,Error Record Address Register"
hgroup.quad ((13.*0x40)+0x020)++0x07
hide.quad 0x00 "GICT_ERR13MISC0,Error Record Miscellaneous Register 0"
endif
endif
tree.end
tree "Common Registers"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
group.quad ((10.*0x40)+0x028)++0x07
line.quad 0x00 "GICT_ERR10MISC1,Error Record Miscellaneous Register 1"
hexmask.quad.quad 0x00 0.--63. 1. " INFO ,Value represents either data that is written to the LPI RAM when an uncorrectable error is detected, or ITS software information for one of 13, or more, error records."
else
hgroup.quad (((COMP.BASE("GICD",-1.)+0x20000)*0x40)+0x028)++0x07
hide.quad 0x00 "GICT_ERR10MISC1,Error Record Miscellaneous Register 1"
endif
rgroup.quad 0xE000++0x07
line.quad 0x00 "GICT_ERRGSR,Group Status Register"
rgroup.long 0xFFBC++0x03
line.long 0x00 "GICT_ERRDEVARCH,Device Architecture register"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(((((per.l(COMP.BASE("GICD",-1.)+0xE08))&0x2)==0x0)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.))))||(((per.l((COMP.BASE("GICD",-1.)+0xE08)))&0x2)==0x2)))
rgroup.long 0xFFC8++0x03
line.long 0x00 "GICT_ERRIDR,Error Record ID Register"
bitfld.long 0x00 0.--15. " NUM , Identifies the device configuration." "?,?,?,?,?,?,?,?,?,?,No LPI available,?,LPI available but no ITS,?,LPI available and 1*ITS,LPI available and 2*ITS,LPI available and 3*ITS,?..."
else
hgroup.long 0xFFC8++0x03
hide.long 0x00 "GICT_ERRIDR,Error Record ID Register"
endif
tree.end
width 12.
tree "Peripheral/Component ID Registers"
rgroup.long 0xFFE0++0x03
line.long 0x00 "GICT_PIDR0,Peripheral ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. " PART_0  ,Part number[7:0]"
rgroup.long 0xFFE4++0x03
line.long 0x00 "GICT_PIDR1,Peripheral ID1 Register"
bitfld.long 0x00 4.--7. " DES_1   ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        PART_1 ,         Part number[11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFE8++0x03
line.long 0x00 "GICT_PIDR2,Peripheral ID2 Register"
bitfld.long 0x00 4.--7. " ARCHREV ,Identifies the version of the GIC architecture with which the GIC-600 complies" "Reserved,Reserved,Reserved,v3.0,?..."
bitfld.long 0x00 3. "  JEDEC  ,Indicates that a JEDEC-assigned JEP106 identity code is used" "Low,High"
bitfld.long 0x00 0.--2. "  DES_1 ,JEP106 identity code [6:4]" "0,1,2,3,4,5,6,7"
rgroup.long 0xFFEC++0x03
line.long 0x00 "GICT_PIDR3,Peripheral ID3 Register"
bitfld.long 0x00 4.--7. " REVAND  ,Manufacturer defined revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        CMOD   ,Indicates if the customer has modified the behavior of the component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFD0++0x03
line.long 0x00 "GICT_PIDR4,Peripheral ID4 Register"
bitfld.long 0x00 4.--7. " SIZE    ,64 KB software visible page" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        DES_2  ,ARM implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0xFFD4++0x03
hide.long 0x00 "GICT_PIDR5,Peripheral ID5 Register"
hgroup.long 0xFFD8++0x03
hide.long 0x00 "GICT_PIDR6,Peripheral ID6 Register"
hgroup.long 0xFFDC++0x03
hide.long 0x00 "GICT_PIDR7,Peripheral ID7 Register"
rgroup.long 0xFFF0++0x03
line.long 0x00 "GICT_CIDR0,Component ID0 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF4++0x03
line.long 0x00 "GICT_CIDR1,Component ID1 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF8++0x03
line.long 0x00 "GICT_CIDR2,Component ID2 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFFC++0x03
line.long 0x00 "GICT_CIDR3,Component ID3 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
tree.end
tree.end
AUTOINDENT.OFF
base (COMP.BASE("GICD",-1.)+0x30000)
AUTOINDENT.ON CENTER TREE
tree "Performance Monitoring Unit"
group.long (0x000+0x0)++0x03
line.long 0x00 "GICP_EVCNTR0,Event Counter Register"
hexmask.long.long 0x00 0.--31. 1. " COUNT ,Counter value. If the counter is enabled, the counter value increments when an event matching GICP_EVTYPERn.EVENT occurs."
group.long (0x400+0x0)++0x03
line.long 0x00 "GICP_EVTYPER0,Event Type Configuration Register"
bitfld.long 0x00 31. " OVFCAP ,When set to 1, an overflow of counter n triggers a capture if GICP_CAPR.CAPTURE is set." "0,1"
bitfld.long 0x00 16.--17. "  EVENTTYPE ,Event tracking type." "Count,Accumulate,Maximum,Reserved"
hexmask.long.byte 0x00 0.--7. 1. "  EVENT ,Event identifier. All events reset to an UNKNOWN value. Registers corresponding to unimplemented counters are RES0. See table in TRM"
rgroup.long (0x600+0x0)++0x03
line.long 0x00 "GICP_SVR0,Shadow Value Registers"
hexmask.long.long 0x00 0.--31. 1. " COUNT,Captured counter value.This field holds the captured counter values of the corresponding entry in GICP_EVCNTRn."
group.long (0xA00+0x0)++0x03
line.long 0x00 "GICP_FR0,Filter Registers"
bitfld.long 0x00 30.--31. " FILTERTYPE ,Filter Type." "Core,INTID,Chip/ITS,Reserved"
bitfld.long 0x00 29. "  FILTERENCODING ,Filter Encoding." "Range,Exact"
hexmask.long.byte 0x00 0.--15. 1. "  Filter ,If the corresponding GICP_EVTYPERn.EVENT indicates an event that cannot be filtered, then the value in this register is ignored."
NEWLINE
group.long (0x000+0x4)++0x03
line.long 0x00 "GICP_EVCNTR1,Event Counter Register"
hexmask.long.long 0x00 0.--31. 1. " COUNT ,Counter value. If the counter is enabled, the counter value increments when an event matching GICP_EVTYPERn.EVENT occurs."
group.long (0x400+0x4)++0x03
line.long 0x00 "GICP_EVTYPER1,Event Type Configuration Register"
bitfld.long 0x00 31. " OVFCAP ,When set to 1, an overflow of counter n triggers a capture if GICP_CAPR.CAPTURE is set." "0,1"
bitfld.long 0x00 16.--17. "  EVENTTYPE ,Event tracking type." "Count,Accumulate,Maximum,Reserved"
hexmask.long.byte 0x00 0.--7. 1. "  EVENT ,Event identifier. All events reset to an UNKNOWN value. Registers corresponding to unimplemented counters are RES0. See table in TRM"
rgroup.long (0x600+0x4)++0x03
line.long 0x00 "GICP_SVR1,Shadow Value Registers"
hexmask.long.long 0x00 0.--31. 1. " COUNT,Captured counter value.This field holds the captured counter values of the corresponding entry in GICP_EVCNTRn."
group.long (0xA00+0x4)++0x03
line.long 0x00 "GICP_FR1,Filter Registers"
bitfld.long 0x00 30.--31. " FILTERTYPE ,Filter Type." "Core,INTID,Chip/ITS,Reserved"
bitfld.long 0x00 29. "  FILTERENCODING ,Filter Encoding." "Range,Exact"
hexmask.long.byte 0x00 0.--15. 1. "  Filter ,If the corresponding GICP_EVTYPERn.EVENT indicates an event that cannot be filtered, then the value in this register is ignored."
NEWLINE
group.long (0x000+0x8)++0x03
line.long 0x00 "GICP_EVCNTR2,Event Counter Register"
hexmask.long.long 0x00 0.--31. 1. " COUNT ,Counter value. If the counter is enabled, the counter value increments when an event matching GICP_EVTYPERn.EVENT occurs."
group.long (0x400+0x8)++0x03
line.long 0x00 "GICP_EVTYPER2,Event Type Configuration Register"
bitfld.long 0x00 31. " OVFCAP ,When set to 1, an overflow of counter n triggers a capture if GICP_CAPR.CAPTURE is set." "0,1"
bitfld.long 0x00 16.--17. "  EVENTTYPE ,Event tracking type." "Count,Accumulate,Maximum,Reserved"
hexmask.long.byte 0x00 0.--7. 1. "  EVENT ,Event identifier. All events reset to an UNKNOWN value. Registers corresponding to unimplemented counters are RES0. See table in TRM"
rgroup.long (0x600+0x8)++0x03
line.long 0x00 "GICP_SVR2,Shadow Value Registers"
hexmask.long.long 0x00 0.--31. 1. " COUNT,Captured counter value.This field holds the captured counter values of the corresponding entry in GICP_EVCNTRn."
group.long (0xA00+0x8)++0x03
line.long 0x00 "GICP_FR2,Filter Registers"
bitfld.long 0x00 30.--31. " FILTERTYPE ,Filter Type." "Core,INTID,Chip/ITS,Reserved"
bitfld.long 0x00 29. "  FILTERENCODING ,Filter Encoding." "Range,Exact"
hexmask.long.byte 0x00 0.--15. 1. "  Filter ,If the corresponding GICP_EVTYPERn.EVENT indicates an event that cannot be filtered, then the value in this register is ignored."
NEWLINE
group.long (0x000+0xC)++0x03
line.long 0x00 "GICP_EVCNTR3,Event Counter Register"
hexmask.long.long 0x00 0.--31. 1. " COUNT ,Counter value. If the counter is enabled, the counter value increments when an event matching GICP_EVTYPERn.EVENT occurs."
group.long (0x400+0xC)++0x03
line.long 0x00 "GICP_EVTYPER3,Event Type Configuration Register"
bitfld.long 0x00 31. " OVFCAP ,When set to 1, an overflow of counter n triggers a capture if GICP_CAPR.CAPTURE is set." "0,1"
bitfld.long 0x00 16.--17. "  EVENTTYPE ,Event tracking type." "Count,Accumulate,Maximum,Reserved"
hexmask.long.byte 0x00 0.--7. 1. "  EVENT ,Event identifier. All events reset to an UNKNOWN value. Registers corresponding to unimplemented counters are RES0. See table in TRM"
rgroup.long (0x600+0xC)++0x03
line.long 0x00 "GICP_SVR3,Shadow Value Registers"
hexmask.long.long 0x00 0.--31. 1. " COUNT,Captured counter value.This field holds the captured counter values of the corresponding entry in GICP_EVCNTRn."
group.long (0xA00+0xC)++0x03
line.long 0x00 "GICP_FR3,Filter Registers"
bitfld.long 0x00 30.--31. " FILTERTYPE ,Filter Type." "Core,INTID,Chip/ITS,Reserved"
bitfld.long 0x00 29. "  FILTERENCODING ,Filter Encoding." "Range,Exact"
hexmask.long.byte 0x00 0.--15. 1. "  Filter ,If the corresponding GICP_EVTYPERn.EVENT indicates an event that cannot be filtered, then the value in this register is ignored."
NEWLINE
group.long (0x000+0x10)++0x03
line.long 0x00 "GICP_EVCNTR4,Event Counter Register"
hexmask.long.long 0x00 0.--31. 1. " COUNT ,Counter value. If the counter is enabled, the counter value increments when an event matching GICP_EVTYPERn.EVENT occurs."
group.long (0x400+0x10)++0x03
line.long 0x00 "GICP_EVTYPER4,Event Type Configuration Register"
bitfld.long 0x00 31. " OVFCAP ,When set to 1, an overflow of counter n triggers a capture if GICP_CAPR.CAPTURE is set." "0,1"
bitfld.long 0x00 16.--17. "  EVENTTYPE ,Event tracking type." "Count,Accumulate,Maximum,Reserved"
hexmask.long.byte 0x00 0.--7. 1. "  EVENT ,Event identifier. All events reset to an UNKNOWN value. Registers corresponding to unimplemented counters are RES0. See table in TRM"
rgroup.long (0x600+0x10)++0x03
line.long 0x00 "GICP_SVR4,Shadow Value Registers"
hexmask.long.long 0x00 0.--31. 1. " COUNT,Captured counter value.This field holds the captured counter values of the corresponding entry in GICP_EVCNTRn."
group.long (0xA00+0x10)++0x03
line.long 0x00 "GICP_FR4,Filter Registers"
bitfld.long 0x00 30.--31. " FILTERTYPE ,Filter Type." "Core,INTID,Chip/ITS,Reserved"
bitfld.long 0x00 29. "  FILTERENCODING ,Filter Encoding." "Range,Exact"
hexmask.long.byte 0x00 0.--15. 1. "  Filter ,If the corresponding GICP_EVTYPERn.EVENT indicates an event that cannot be filtered, then the value in this register is ignored."
NEWLINE
group.quad 0xC00++0x07
line.quad 0x00 "GICP_CNTENSET0,Counter Enable Set Register 0"
bitfld.quad 0x00 4. " CNTEN4  ,Counter disable. Writing 1 to a bit location sets the enable for the associated counter. Writing 0 to a bit location has no effect. To disable a counter, use the GICP_CNTENCLR0 register. Reads return the state of the counter enables." "0,1"
bitfld.quad 0x00 3. " CNTEN3  ,Counter disable. Writing 1 to a bit location sets the enable for the associated counter. Writing 0 to a bit location has no effect. To disable a counter, use the GICP_CNTENCLR0 register. Reads return the state of the counter enables." "0,1"
bitfld.quad 0x00 2. " CNTEN2  ,Counter disable. Writing 1 to a bit location sets the enable for the associated counter. Writing 0 to a bit location has no effect. To disable a counter, use the GICP_CNTENCLR0 register. Reads return the state of the counter enables." "0,1"
NEWLINE
bitfld.quad 0x00 1. " CNTEN1  ,Counter disable. Writing 1 to a bit location sets the enable for the associated counter. Writing 0 to a bit location has no effect. To disable a counter, use the GICP_CNTENCLR0 register. Reads return the state of the counter enables." "0,1"
bitfld.quad 0x00 0. " CNTEN0  ,Counter disable. Writing 1 to a bit location sets the enable for the associated counter. Writing 0 to a bit location has no effect. To disable a counter, use the GICP_CNTENCLR0 register. Reads return the state of the counter enables." "0,1"
group.quad 0xC20++0x07
line.quad 0x00 "GICP_INTENCLR0,Counter Enable Clear Register 0"
bitfld.quad 0x00 4. " CNTEN4  ,Counter disable. Writing 1 to a bit location clears the enable for the associated counter. Writing 0 to a bit location has no effect. To enable a counter, use the GICP_CNTENSET0 register. Reads return the state of the counter enables." "0,1"
bitfld.quad 0x00 3. " CNTEN3  ,Counter disable. Writing 1 to a bit location clears the enable for the associated counter. Writing 0 to a bit location has no effect. To enable a counter, use the GICP_CNTENSET0 register. Reads return the state of the counter enables." "0,1"
bitfld.quad 0x00 2. " CNTEN2  ,Counter disable. Writing 1 to a bit location clears the enable for the associated counter. Writing 0 to a bit location has no effect. To enable a counter, use the GICP_CNTENSET0 register. Reads return the state of the counter enables." "0,1"
NEWLINE
bitfld.quad 0x00 1. " CNTEN1  ,Counter disable. Writing 1 to a bit location clears the enable for the associated counter. Writing 0 to a bit location has no effect. To enable a counter, use the GICP_CNTENSET0 register. Reads return the state of the counter enables." "0,1"
bitfld.quad 0x00 0. " CNTEN0  ,Counter disable. Writing 1 to a bit location clears the enable for the associated counter. Writing 0 to a bit location has no effect. To enable a counter, use the GICP_CNTENSET0 register. Reads return the state of the counter enables." "0,1"
group.quad 0xC40++0x07
line.quad 0x00 "GICP_INTENSET0,Interrupt Contribution Enable Set Register 0"
bitfld.quad 0x00 4. " INTEN4  ,Interrupt enable. Writing 1 sets the interrupt enable for the associated counter. Writing 0 has no effect. To disable a counter interrupt enable, use the GICP_INTENCLR0 register. Reads return the state of the interrupt enables." "0,1"
bitfld.quad 0x00 3. "  INTEN3  ,Interrupt enable. Writing 1 sets the interrupt enable for the associated counter. Writing 0 has no effect. To disable a counter interrupt enable, use the GICP_INTENCLR0 register. Reads return the state of the interrupt enables." "0,1"
bitfld.quad 0x00 2. "  INTEN2  ,Interrupt enable. Writing 1 sets the interrupt enable for the associated counter. Writing 0 has no effect. To disable a counter interrupt enable, use the GICP_INTENCLR0 register. Reads return the state of the interrupt enables." "0,1"
NEWLINE
bitfld.quad 0x00 1. " INTEN1  ,Interrupt enable. Writing 1 sets the interrupt enable for the associated counter. Writing 0 has no effect. To disable a counter interrupt enable, use the GICP_INTENCLR0 register. Reads return the state of the interrupt enables." "0,1"
bitfld.quad 0x00 0. "  INTEN0  ,Interrupt enable. Writing 1 sets the interrupt enable for the associated counter. Writing 0 has no effect. To disable a counter interrupt enable, use the GICP_INTENCLR0 register. Reads return the state of the interrupt enables." "0,1"
group.quad 0xC60++0x07
line.quad 0x00 "GICP_INTENCLR0,Interrupt Contribution Enable Clear Register 0"
bitfld.quad 0x00 4. " INTEN4  ,Interrupt enable. Writing 1 clears the interrupt enable for the associated counter. Writing 0 has no effect. To enable a counter interrupt enable, use the GICP_INTENSET0 register. Reads return the state of the interrupt enables." "0,1"
bitfld.quad 0x00 3. "  INTEN3  ,Interrupt enable. Writing 1 clears the interrupt enable for the associated counter. Writing 0 has no effect. To enable a counter interrupt enable, use the GICP_INTENSET0 register. Reads return the state of the interrupt enables." "0,1"
bitfld.quad 0x00 2. "  INTEN2  ,Interrupt enable. Writing 1 clears the interrupt enable for the associated counter. Writing 0 has no effect. To enable a counter interrupt enable, use the GICP_INTENSET0 register. Reads return the state of the interrupt enables." "0,1"
NEWLINE
bitfld.quad 0x00 1. " INTEN1  ,Interrupt enable. Writing 1 clears the interrupt enable for the associated counter. Writing 0 has no effect. To enable a counter interrupt enable, use the GICP_INTENSET0 register. Reads return the state of the interrupt enables." "0,1"
bitfld.quad 0x00 0. "  INTEN0  ,Interrupt enable. Writing 1 clears the interrupt enable for the associated counter. Writing 0 has no effect. To enable a counter interrupt enable, use the GICP_INTENSET0 register. Reads return the state of the interrupt enables." "0,1"
group.quad 0xC80++0x07
line.quad 0x00 "GICP_OVSCLR0,Overflow Status Clear Register 0"
bitfld.quad 0x00 4. " OVS4  ,Overflow status. Writing 1 clears the overflow status for the associated counter. Writing 0 has no effect. To set the counter overflow status, use the GICP_OVSSET0 register. Reads return the state of the overflow status bits." "0,1"
bitfld.quad 0x00 3. "  OVS3  ,Overflow status. Writing 1 clears the overflow status for the associated counter. Writing 0 has no effect. To set the counter overflow status, use the GICP_OVSSET0 register. Reads return the state of the overflow status bits." "0,1"
bitfld.quad 0x00 2. "  OVS2  ,Overflow status. Writing 1 clears the overflow status for the associated counter. Writing 0 has no effect. To set the counter overflow status, use the GICP_OVSSET0 register. Reads return the state of the overflow status bits." "0,1"
NEWLINE
bitfld.quad 0x00 1. " OVS1  ,Overflow status. Writing 1 clears the overflow status for the associated counter. Writing 0 has no effect. To set the counter overflow status, use the GICP_OVSSET0 register. Reads return the state of the overflow status bits." "0,1"
bitfld.quad 0x00 0. "  OVS0  ,Overflow status. Writing 1 clears the overflow status for the associated counter. Writing 0 has no effect. To set the counter overflow status, use the GICP_OVSSET0 register. Reads return the state of the overflow status bits." "0,1"
group.quad 0xCC0++0x07
line.quad 0x00 "GICP_OVSSET0,Overflow Status Set Register 0"
bitfld.quad 0x00 4. " OVS4  ,Writing 1 sets the overflow status for the associated counter. Writing 0 has no effect. To clear a counter overflow status, use the GICP_OVSCLR0 register. Reads return the state of the overflow status bits." "0,1"
bitfld.quad 0x00 3. "  OVS3  ,Writing 1 sets the overflow status for the associated counter. Writing 0 has no effect. To clear a counter overflow status, use the GICP_OVSCLR0 register. Reads return the state of the overflow status bits." "0,1"
bitfld.quad 0x00 2. "  OVS2  ,Writing 1 sets the overflow status for the associated counter. Writing 0 has no effect. To clear a counter overflow status, use the GICP_OVSCLR0 register. Reads return the state of the overflow status bits." "0,1"
NEWLINE
bitfld.quad 0x00 1. " OVS1  ,Writing 1 sets the overflow status for the associated counter. Writing 0 has no effect. To clear a counter overflow status, use the GICP_OVSCLR0 register. Reads return the state of the overflow status bits." "0,1"
bitfld.quad 0x00 0. "  OVS0  ,Writing 1 sets the overflow status for the associated counter. Writing 0 has no effect. To clear a counter overflow status, use the GICP_OVSCLR0 register. Reads return the state of the overflow status bits." "0,1"
wgroup.long 0xD88++0x03
line.long 0x00 "GICP_CAPR,Counter Shadow Value Capture Register"
bitfld.long 0x00 0. " CAPTURE  ,When GICP_CFGR.CAPTURE == 1, a write of 1 to this bit triggers a capture of all values within the PMU into their respective shadow registers. When GICP_CFGR.CAPTURE == 0, this bit is zero." "-,1"
rgroup.long 0xE00++0x03
line.long 0x00 "GICP_CFGR,Configuration Information Register"
bitfld.long 0x00 22. " CAPTURE  ,Indicates if the GIC supports capture." "Not Supported,Supported"
hexmask.long.byte 0x00 8.--13. 1. " SIZE  ,Indicates the counter width+1."
hexmask.long.byte 0x00 0.--5.  1. " NCTR  ,Indicates the amount of available counters+1."
group.long 0xE04++0x03
line.long 0x00 "GICP_CR,Control Register"
bitfld.long 0x00 0. " E  ,Global counter enable. This bit takes precedence over the GICP_CNTENSET0.CNTEN bits." "Disabled,Enabled"
rgroup.long 0xFCC++0x03
line.long 0x00 "GICP_PMDEVTYPE,-"
NEWLINE
tree "Peripheral/Component ID Registers"
rgroup.long 0xFE0++0x03
line.long 0x00 "GICP_PIDR0,Peripheral ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. " PART_0  ,Part number[7:0]"
rgroup.long 0xFE4++0x03
line.long 0x00 "GICP_PIDR1,Peripheral ID1 Register"
bitfld.long 0x00 4.--7. " DES_1   ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        PART_1 ,         Part number[11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFE8++0x03
line.long 0x00 "GICP_PIDR2,Peripheral ID2 Register"
bitfld.long 0x00 4.--7. " ARCHREV ,Identifies the version of the GIC architecture with which the GIC-600 complies" "Reserved,Reserved,Reserved,v3.0,?..."
bitfld.long 0x00 3. "  JEDEC  ,Indicates that a JEDEC-assigned JEP106 identity code is used" "Low,High"
bitfld.long 0x00 0.--2. "  DES_1 ,JEP106 identity code [6:4]" "0,1,2,3,4,5,6,7"
rgroup.long 0xFEC++0x03
line.long 0x00 "GICP_PIDR3,Peripheral ID3 Register"
bitfld.long 0x00 4.--7. " REVAND  ,Manufacturer defined revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        CMOD   ,Indicates if the customer has modified the behavior of the component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFD0++0x03
line.long 0x00 "GICP_PIDR4,Peripheral ID4 Register"
bitfld.long 0x00 4.--7. " SIZE    ,64 KB software visible page" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        DES_2  ,ARM implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0xFD4++0x03
hide.long 0x00 "GICP_PIDR5,Peripheral ID5 Register"
hgroup.long 0xFD8++0x03
hide.long 0x00 "GICP_PIDR6,Peripheral ID6 Register"
hgroup.long 0xFDC++0x03
hide.long 0x00 "GICP_PIDR7,Peripheral ID7 Register"
rgroup.long 0xFF0++0x03
line.long 0x00 "GICP_CIDR0,Component ID0 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFF4++0x03
line.long 0x00 "GICP_CIDR1,Component ID1 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFF8++0x03
line.long 0x00 "GICP_CIDR2,Component ID2 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFC++0x03
line.long 0x00 "GICP_CIDR3,Component ID3 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
tree.end
tree.end
AUTOINDENT.OFF
base (COMP.BASE("GICD",-1.)+0x40000)
AUTOINDENT.ON CENTER TREE
tree "Interrupt Translation Service"
group.long 0x00++0x03
line.long 0x00 "GITS_CTLR,ITS Control Register"
rbitfld.long 0x00 31. "  QUIESCENT  ,Indicates completion of all ITS operations" "Not quiescent,Quiescent"
bitfld.long 0x00 0. "  ENABLED  ,Controls whether the ITS is enabled" "Disabled,Enabled"
rgroup.long 0x04++0x03
line.long 0x00 "GITS_IIDR,ITS Implementer Identification Register"
bitfld.long 0x00 24.--31. "  PRODID  ,Indicates the product ID" "GIC-500,?,GIC-600,?..."
bitfld.long 0x00 16.--19. "  VAR  ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
NEWLINE
bitfld.long 0x00 12.--15. "  REV  ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "  IMP  ,Implementer"
if (((per.q((COMP.BASE("GICD",-1.)+0x40000)+0x0008))&0x1000000000)==0x1000000000)&&(((per.q((COMP.BASE("GICD",-1.)+0x40000)+0x0008))&0xFF000000)!=0x00)
rgroup.quad 0x08++0x07
line.quad 0x00 "GITS_TYPER,ITS Type Register"
bitfld.quad 0x00 37. "  VMOVP  ,Indicates the form of the VMOVP command" "All ITSs,One ITS"
bitfld.quad 0x00 36. "  CIL  ,Collection ID Limit" "0,1"
NEWLINE
bitfld.quad 0x00 32.--35. "  CIDBITS  ,Number of Collection ID bits set by " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 24.--31. 1. "  HCC  ,Hardware Collection Count"
NEWLINE
bitfld.quad 0x00 19. "  PTA  ,Indicates the format of the target address" "Not suppported,Supported"
bitfld.quad 0x00 18. "  SEIS  ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not suppported,Supported"
NEWLINE
bitfld.quad 0x00 13.--17. "  DEVBITS  ,The number of DeviceID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 8.--12. "  ID_BITS  ,The number of EventID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
NEWLINE
rbitfld.quad 0x00 4.--7. "  ITT_ENTRY_SIZE  ,The number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 2. "  CCT  ,Cumulative Collection Tables" "0,1"
elif (((per.q((COMP.BASE("GICD",-1.)+0x40000)+0x0008))&0x1000000000)==0x1000000000)
rgroup.quad 0x08++0x07
line.quad 0x00 "GITS_TYPER,ITS Type Register"
bitfld.quad 0x00 37. "  VMOVP  ,Indicates the form of the VMOVP command" "All ITSs,One ITS"
bitfld.quad 0x00 36. "  CIL  ,Collection ID Limit" "0,1"
NEWLINE
bitfld.quad 0x00 32.--35. "  CIDBITS  ,Number of Collection ID bits minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 24.--31. 1. "  HCC  ,Hardware Collection Count"
NEWLINE
bitfld.quad 0x00 19. "  PTA  ,Indicates the format of the target address" "Not suppported,Supported"
bitfld.quad 0x00 18. "  SEIS  ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not suppported,Supported"
NEWLINE
bitfld.quad 0x00 13.--17. "  DEVBITS  ,The number of DeviceID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 8.--12. "  ID_BITS  ,The number of EventID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
NEWLINE
rbitfld.quad 0x00 4.--7. "  ITT_ENTRY_SIZE  ,The number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
elif (((per.q((COMP.BASE("GICD",-1.)+0x40000)+0x0008))&0xFF000000)!=0x00)
rgroup.quad 0x08++0x07
line.quad 0x00 "GITS_TYPER,ITS Type Register"
bitfld.quad 0x00 37. "  VMOVP  ,Indicates the form of the VMOVP command" "All ITSs,One ITS"
bitfld.quad 0x00 36. "  CIL  ,Collection ID Limit" "0,1"
NEWLINE
hexmask.quad.byte 0x00 24.--31. 1. "  HCC  ,Hardware Collection Count"
bitfld.quad 0x00 19. "  PTA  ,Indicates the format of the target address" "Not suppported,Supported"
NEWLINE
bitfld.quad 0x00 18. "  SEIS  ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not suppported,Supported"
bitfld.quad 0x00 13.--17. "  DEVBITS  ,The number of DeviceID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
NEWLINE
bitfld.quad 0x00 8.--12. "  ID_BITS  ,The number of EventID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.quad 0x00 4.--7. "  ITT_ENTRY_SIZE  ,The number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
NEWLINE
bitfld.quad 0x00 2. "  CCT  ,Cumulative Collection Tables" "0,1"
else
rgroup.quad 0x08++0x07
line.quad 0x00 "GITS_TYPER,ITS Type Register"
bitfld.quad 0x00 37. "  VMOVP  ,Indicates the form of the VMOVP command" "All ITSs,One ITS"
bitfld.quad 0x00 36. "  CIL  ,Collection ID Limit" "0,1"
NEWLINE
hexmask.quad.byte 0x00 24.--31. 1. "  HCC  ,Hardware Collection Count"
bitfld.quad 0x00 19. "  PTA  ,Indicates the format of the target address" "Not suppported,Supported"
NEWLINE
bitfld.quad 0x00 18. "  SEIS  ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not suppported,Supported"
bitfld.quad 0x00 13.--17. "  DEVBITS  ,The number of DeviceID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
NEWLINE
bitfld.quad 0x00 8.--12. "  ID_BITS  ,The number of EventID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.quad 0x00 4.--7. "  ITT_ENTRY_SIZE  ,The number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long 0x20++0x03
line.long 0x00 "GITS_FCTLR,Function Control Register"
bitfld.long 0x00 31. "  DCC  ,Disable Cache Conversion (DCC)." "Disabled,Enabled"
bitfld.long 0x00 30. "  PWE  ,Powerdown While Enabled. Request GITS_CTLR.Quiescent to indicate ITS is quiescent." "Disabled,Enabled"
NEWLINE
bitfld.long 0x00 18. "  IEC  ,Invalidate Event Cache." "Disabled,Enabled"
bitfld.long 0x00 17. "  IDC  ,Invalidate Device Cache." "Disabled,Enabled"
NEWLINE
bitfld.long 0x00 16. "  ICC  ,Invalidate Collection Cache." "Disabled,Enabled"
bitfld.long 0x00 9. "  QD  ,Q Deny. Indicates if Q-Channel requests are denied." "Not denied,Denied"
NEWLINE
bitfld.long 0x00 8. "  AEE  ,Access Error Enable. Indicates if reporting of slave access errors is enabled." "Disabled,Enabled"
hexmask.long.byte 0x00 4.--7. 1. "  CGO  ,One bit per clock gate. Indicates if full clock gating is active."
NEWLINE
bitfld.long 0x00 3. "  CEE  ,Command error enable." "Disabled,Enabled"
bitfld.long 0x00 2. "  UEE  ,Unmapped error enable. Indicates if unmapped interrupt errors are enabled" "Disabled,Enabled"
NEWLINE
bitfld.long 0x00 1. "  LTE  ,Latency tracking enable. Indicates if latency tracking of interrupts is enabled" "Disabled,Enabled"
bitfld.long 0x00 0. "  SIP  ,Scrub in progress. This bit is read and written by software. When a scrub is complete, the GIC clears the bit to 0." "Completed,In Progress"
group.quad 0x28++0x07
line.quad 0x00 "GITS_OPR,Operations Register"
bitfld.quad 0x00 60.--63. "  LOCKTYPE  ,Lock-Type. Supported lock types" "Track,Trial,ITS lock,ITS unlock,Track abort,?,LPI lock, LPI unlock, ITS unlock all,?,?,?,?,?,?,?"
hexmask.quad.long 0x00 32.--59. 1. "  DEVICEID  ,Device-ID. 0-maximum DeviceID supported."
NEWLINE
hexmask.quad.word 0x00 0.--15. 1. "  EVENTID  ,Event-ID. 8192-maximum EventID supported."
rgroup.quad 0x30++0x07
line.quad 0x00 "GITS_OPSR,Operation Status Register"
bitfld.quad 0x00 63. "  REQUESTCOMPLETE  ,Request to GITS_OPR completed." "In Progress,Completed"
bitfld.quad 0x00 62. "  REQUESTPASS  ,Request to GITS_OPR completed without error." "Not passed,Passed"
NEWLINE
bitfld.quad 0x00 61. "  REQUESTINPROGRESS  ,Translation in progress." "Completed,In Progress"
bitfld.quad 0x00 48. "  ENTRYLOCKED  ,Locked entry in cache corresponds to request." "Unlocked,Locked"
NEWLINE
hexmask.quad.word 0x00 32.--44. 1. "  TARGET  ,Target of interrupt requested."
hexmask.quad.word 0x00  0.--15. 1. "  PID  ,Physical ID of interrupt requested."
group.quad 0x80++0x07
line.quad 0x00 "GITS_CBASER,The command queue control register"
bitfld.quad 0x00 63. "  VALID  ,Indicates whether software has allocated memory for the command queue" "Not allocated,Allocated"
bitfld.quad 0x00 59.--61. "  INNERCACHE  ,Indicates the Inner Cacheability attributes of accesses to the command queue" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
NEWLINE
bitfld.quad 0x00 53.--55. "  OUTERCACHE  ,Indicates the Outer Cacheability attributes of accesses to the command queue" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
hexmask.quad 0x00 12.--51. 0x10 "  PHYSICAL_ADDRESS  ,Bits [51:12] of the base physical address of the command queue"
NEWLINE
bitfld.quad 0x00 10.--11. "  SHAREABILITY  ,Indicates the Shareability attributes of accesses to the command queue" "Non-shareable,Inner Shareable,Outer Shareable,?..."
hexmask.quad.byte 0x00 0.--7. 1. "  SIZE  ,The number of 4KB pages of physical memory allocated to the command queue minus one"
group.quad 0x88++0x7
line.quad 0x00 "GITS_CWRITER,The command queue write pointer"
hexmask.quad.word 0x00 5.--19. 0x20 "  OFFSET  ,Bits [19:5] of the offset from GITS_CBASER"
bitfld.quad 0x00 0. "  RETRY  ,Restarts the processing of commands by the ITS if it stalled because of a command error" "No effect,Restarted"
group.quad 0x90++0x07
line.quad 0x00 "GITS_CREADR,The command queue read pointer"
hexmask.quad.word 0x00 5.--19. 0x20 "  OFFSET  ,Bits [19:5] of the offset from GITS_CBASER"
bitfld.quad 0x00 0. "  STALLED  ,Reports whether the processing of commands is stalled because of a command error" "Not stalled,Stalled"
if (((per.q((COMP.BASE("GICD",-1.)+0x40000)+0x0100))&0x700000000000000)==0x00)
group.quad 0x100++0x07
line.quad 0x00 "GITS_BASER0,ITS table control register"
bitfld.quad 0x00 63. "  VALID  ,Indicates whether software has allocated memory for the translation table" "Not allocated,Allocated"
bitfld.quad 0x00 62. "  INDIRECT  ,This field indicates whether an implemented register specifies a single flat table or a two-level table where the first level contains a list of descriptors" "Single Level,Two Level"
NEWLINE
bitfld.quad 0x00 59.--61. "  INNERCACHE  ,Indicates the Inner Cacheability attributes of accesses to the table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
rbitfld.quad 0x00 56.--58. "  TYPE  ,Specifies the type of entity that requires entries in the corresponding translation table" "Unimplemented,Devices,Reserved,Reserved,Interrupt collections,?..."
NEWLINE
bitfld.quad 0x00 53.--55. "  OUTERCACHE  ,Indicates the Outer Cacheability attributes of accesses to the table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
rbitfld.quad 0x00 48.--52. "  ENTRY_SIZE  ,Specifies the number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
NEWLINE
hexmask.quad 0x00 12.--47. 1. "  PHYSICAL_ADDRESS  ,Physical Address"
bitfld.quad 0x00 10.--11. "  SHAREABILITY  ,Indicates the Shareability attributes of accesses to the table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
NEWLINE
bitfld.quad 0x00 8.--9. "  PAGE_SIZE  ,The size of page that the translation table uses" "4KB,16KB,64KB,?..."
else
group.quad 0x100++0x07
line.quad 0x00 "GITS_BASER0,ITS table control register"
bitfld.quad 0x00 63. "  VALID  ,Indicates whether software has allocated memory for the translation table" "Not allocated,Allocated"
bitfld.quad 0x00 62. "  INDIRECT  ,This field indicates whether an implemented register specifies a single flat table or a two-level table where the first level contains a list of descriptors" "Single Level,Two Level"
NEWLINE
bitfld.quad 0x00 59.--61. "  INNERCACHE  ,Indicates the Inner Cacheability attributes of accesses to the table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
rbitfld.quad 0x00 56.--58. "  TYPE  ,Specifies the type of entity that requires entries in the corresponding translation table" "Unimplemented,Devices,Reserved,Reserved,Interrupt collections,?..."
NEWLINE
bitfld.quad 0x00 53.--55. "  OUTERCACHE  ,Indicates the Outer Cacheability attributes of accesses to the table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
rbitfld.quad 0x00 48.--52. "  ENTRY_SIZE  ,Specifies the number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
NEWLINE
hexmask.quad 0x00 12.--47. 0x10 "  PHYSICAL_ADDRESS  ,Physical Address"
bitfld.quad 0x00 10.--11. "  SHAREABILITY  ,Indicates the Shareability attributes of accesses to the table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
NEWLINE
bitfld.quad 0x00 8.--9. "  PAGE_SIZE  ,The size of page that the translation table uses" "4KB,16KB,64KB,?..."
hexmask.quad.byte 0x00 0.--7. 1. "  SIZE  ,The number of pages of physical memory allocated to the table minus one"
endif
if (((per.q((COMP.BASE("GICD",-1.)+0x40000)+0x0108))&0x700000000000000)==0x00)
group.quad 0x108++0x07
line.quad 0x00 "GITS_BASER1,ITS table control register"
bitfld.quad 0x00 63. "  VALID  ,Indicates whether software has allocated memory for the translation table" "Not allocated,Allocated"
bitfld.quad 0x00 62. "  INDIRECT  ,This field indicates whether an implemented register specifies a single flat table or a two-level table where the first level contains a list of descriptors" "Single Level,Two Level"
NEWLINE
bitfld.quad 0x00 59.--61. "  INNERCACHE  ,Indicates the Inner Cacheability attributes of accesses to the table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
rbitfld.quad 0x00 56.--58. "  TYPE  ,Specifies the type of entity that requires entries in the corresponding translation table" "Unimplemented,Devices,Reserved,Reserved,Interrupt collections,?..."
NEWLINE
bitfld.quad 0x00 53.--55. "  OUTERCACHE  ,Indicates the Outer Cacheability attributes of accesses to the table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
rbitfld.quad 0x00 48.--52. "  ENTRY_SIZE  ,Specifies the number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
NEWLINE
hexmask.quad 0x00 12.--47. 1. "  PHYSICAL_ADDRESS  ,Physical Address"
bitfld.quad 0x00 10.--11. "  SHAREABILITY  ,Indicates the Shareability attributes of accesses to the table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
NEWLINE
bitfld.quad 0x00 8.--9. "  PAGE_SIZE  ,The size of page that the translation table uses" "4KB,16KB,64KB,?..."
else
group.quad 0x108++0x07
line.quad 0x00 "GITS_BASER1,ITS table control register"
bitfld.quad 0x00 63. "  VALID  ,Indicates whether software has allocated memory for the translation table" "Not allocated,Allocated"
bitfld.quad 0x00 62. "  INDIRECT  ,This field indicates whether an implemented register specifies a single flat table or a two-level table where the first level contains a list of descriptors" "Single Level,Two Level"
NEWLINE
bitfld.quad 0x00 59.--61. "  INNERCACHE  ,Indicates the Inner Cacheability attributes of accesses to the table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
rbitfld.quad 0x00 56.--58. "  TYPE  ,Specifies the type of entity that requires entries in the corresponding translation table" "Unimplemented,Devices,Reserved,Reserved,Interrupt collections,?..."
NEWLINE
bitfld.quad 0x00 53.--55. "  OUTERCACHE  ,Indicates the Outer Cacheability attributes of accesses to the table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
rbitfld.quad 0x00 48.--52. "  ENTRY_SIZE  ,Specifies the number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
NEWLINE
hexmask.quad 0x00 12.--47. 0x10 "  PHYSICAL_ADDRESS  ,Physical Address"
bitfld.quad 0x00 10.--11. "  SHAREABILITY  ,Indicates the Shareability attributes of accesses to the table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
NEWLINE
bitfld.quad 0x00 8.--9. "  PAGE_SIZE  ,The size of page that the translation table uses" "4KB,16KB,64KB,?..."
hexmask.quad.byte 0x00 0.--7. 1. "  SIZE  ,The number of pages of physical memory allocated to the table minus one"
endif
NEWLINE
rgroup.long 0xFFE0++0x03
line.long 0x00 "GITS_CFGID,Configuration ID Register"
hexmask.long.byte 0x00 0.--3. 1. "  ITSNUMBER  ,Returns the ITS block ID. The its_id[7:0] tie-off signal controls the ID value. Each ITS block must have a unique ID."
rgroup.long 0xFFE0++0x03
line.long 0x00 "GITS_PIDR0,Peripheral ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. "  PART_0  ,Part number[7:0]"
rgroup.long 0xFFE4++0x03
line.long 0x00 "GITS_PIDR1,Peripheral ID1 Register"
bitfld.long 0x00 4.--7. "  DES_1  ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "  PART_1  ,         Part number[11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFE8++0x03
line.long 0x00 "GITS_PIDR2,Peripheral ID2 Register"
bitfld.long 0x00 4.--7. "  ARCHREV  ,Identifies the version of the GIC architecture with which the GIC-600 complies." "Reserved,Reserved,Reserved,v3.0,?..."
bitfld.long 0x00 3. "  JEDEC  ,Indicates that a JEDEC-assigned JEP106 identity code is used." "Low,High"
NEWLINE
bitfld.long 0x00 0.--2. "  DES_1  ,JEP106 identity code [6:4]. Bits[3:0] of the JEP106 identity code are assigned to GITS_PIDR1." "0,1,2,3,4,5,6,7"
rgroup.long 0xFFEC++0x03
line.long 0x00 "GITS_PIDR3,Peripheral ID3 Register"
bitfld.long 0x00 4.--7. "  REVAND  ,Manufacturer defined revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "  CMOD  ,Indicates if the customer has modified the behavior of the component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFD0++0x03
line.long 0x00 "GITS_PIDR4,Peripheral ID4 Register"
bitfld.long 0x00 4.--7. "  SIZE  ,64 KB software visible page" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "  DES_2  ,ARM implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0xFFD4++0x03
hide.long 0x00 "GITS_PIDR5,Peripheral ID5 Register"
hgroup.long 0xFFD8++0x03
hide.long 0x00 "GITS_PIDR6,Peripheral ID6 Register"
hgroup.long 0xFFDC++0x03
hide.long 0x00 "GITS_PIDR7,Peripheral ID7 Register"
rgroup.long 0xFFF0++0x03
line.long 0x00 "GITS_CIDR0,Component ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. "  FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF4++0x03
line.long 0x00 "GITS_CIDR1,Component ID1 Register"
hexmask.long.byte 0x00 0.--7. 1. "  FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF8++0x03
line.long 0x00 "GITS_CIDR2,Component ID2 Register"
hexmask.long.byte 0x00 0.--7. 1. "  FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFFC++0x03
line.long 0x00 "GITS_CIDR3,Component ID3 Register"
hexmask.long.byte 0x00 0.--7. 1. "  FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
NEWLINE
base (COMP.BASE("GICD",-1.)+0x40000)+0x10000
if (((per.l((COMP.BASE("GICD",-1.)+0x40000)))&0x01)==0x01)
wgroup.long 0x40++0x03
line.long 0x00 "GITS_TRANSLATER,ITS Translation Register"
else
hgroup.long 0x40++0x03
hide.long 0x00 "GITS_TRANSLATER,ITS Translation Register"
endif
tree.end
AUTOINDENT.OFF
base COMP.BASE("GICR",-1.)
AUTOINDENT.ON CENTER TREE
tree "Redistributor Interface"
tree "Control Registers"
if (((per.q(COMP.BASE("GICR",-1.)+0x08))&0x21)==0x21)
group.long 0x0000++0x03
line.long 0x00 "GICR_CTLR,Redistributor Control Register"
rbitfld.long 0x00 31. "         UWP       ,Upstream Write Pending. Indicates whether all upstream writes have been communicated to the Distributor" "Not pending,Pending"
bitfld.long 0x00 26. "       DPG1S          ,Disable Processor selection for Group 1 Secure interrupts" "No,Yes"
NEWLINE
bitfld.long 0x00 25. "             DPG1NS           ,Disable Processor selection for Group 1 Non-secure interrupts" "No,Yes"
bitfld.long 0x00 24. " DPG0      ,Disable Processor selection for Group 0 interrupts" "No,Yes"
NEWLINE
bitfld.long 0x00 3. "               RWP            ,Register Write Pending. Indicates whether a register write for the current Security state is in progress or not" "Not pending,Pending"
bitfld.long 0x00 0. "     ENABLE_LPIS      ,Enables LPIs in implementations where affinity routing is enabled for Security state" "Disabled,Enabled"
elif (((per.q(COMP.BASE("GICR",-1.)+0x08))&0x21)==0x20)
group.long 0x0000++0x03
line.long 0x00 "GICR_CTLR,Redistributor Control Register"
rbitfld.long 0x00 31. "         UWP       ,Upstream Write Pending. Indicates whether all upstream writes have been communicated to the Distributor" "Not pending,Pending"
bitfld.long 0x00 26. "       DPG1S          ,Disable Processor selection for Group 1 Secure interrupts" "No,Yes"
NEWLINE
bitfld.long 0x00 25. "             DPG1NS           ,Disable Processor selection for Group 1 Non-secure interrupts" "No,Yes"
bitfld.long 0x00 24. " DPG0      ,Disable Processor selection for Group 0 interrupts" "No,Yes"
NEWLINE
bitfld.long 0x00 3. "               RWP            ,Register Write Pending. Indicates whether a register write for the current Security state is in progress or not" "Not pending,Pending"
elif (((per.q(COMP.BASE("GICR",-1.)+0x08))&0x21)==0x01)
group.long 0x0000++0x03
line.long 0x00 "GICR_CTLR,Redistributor Control Register"
rbitfld.long 0x00 31. "         UWP       ,Upstream Write Pending. Indicates whether all upstream writes have been communicated to the Distributor" "Not pending,Pending"
bitfld.long 0x00 3. "       RWP            ,Register Write Pending. Indicates whether a register write for the current Security state is in progress or not" "Not pending,Pending"
NEWLINE
bitfld.long 0x00 0. "     ENABLE_LPIS      ,Enables LPIs in implementations where affinity routing is enabled for Security state" "Disabled,Enabled"
else
group.long 0x0000++0x03
line.long 0x00 "GICR_CTLR,Redistributor Control Register"
rbitfld.long 0x00 31. "         UWP       ,Upstream Write Pending. Indicates whether all upstream writes have been communicated to the Distributor" "Not pending,Pending"
bitfld.long 0x00 3. "       RWP            ,Register Write Pending. Indicates whether a register write for the current Security state is in progress or not" "Not pending,Pending"
endif
rgroup.long 0x0004++0x03
line.long 0x00 "GICR_IIDR,Distributor Implementer Identification Register"
bitfld.long 0x00 24.--31. "         PRODID    ,Indicates the product ID" "GIC-500,?,GIC-600,?..."
bitfld.long 0x00 16.--19. "           VAR            ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
NEWLINE
bitfld.long 0x00 12.--15. " REV       ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "                IMP            ,Implementer"
rgroup.quad 0x0008++0x07
line.quad 0x00 "GICR_TYPER,Interrupt Controller Type Register"
hexmask.quad.byte 0x00 56.--63. 1. " AFF3      ,Affinity level 3 value for the Redistributor"
hexmask.quad.byte 0x00 48.--55. 1. "                AFF2           ,Affinity level 2 value for the Redistributor"
NEWLINE
hexmask.quad.byte 0x00 40.--47. 1. "              AFF1             ,Affinity level 1 value for the Redistributor"
hexmask.quad.byte 0x00 32.--39. 1. " AFF0      ,Affinity level 0 value for the Redistributor"
NEWLINE
bitfld.quad 0x00 24.--25. "                COMMONLPIAFF   ,The affinity level at which Redistributors share a LPI Configuration table" "Single Core CFG,Chip by AF3, Chip by AF2, Reserved"
hexmask.quad.word 0x00 8.--23. 1. "  PROCESSOR_NUMBER ,A unique identifier for the PE"
NEWLINE
bitfld.quad 0x00 5. " DPGS      ,Sets support for GICR_CTLR.DPG* bits" "Not supported,Supported"
bitfld.quad 0x00 4. "     LAST           ,Indicates whether this Redistributor is the highest-numbered Redistributor in a series of contiguous Redistributor pages" "Not highest,Highest"
NEWLINE
bitfld.quad 0x00 3. "     DIRECTLPI        ,Indicates whether this Redistributor supports direct injection of LPIs" "Not supported,Supported"
bitfld.quad 0x00 0. " PLPIS     ,Indicates whether the GIC implementation supports physical LPIs" "Not supported,Supported"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)||((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICR",-1.)+0x0014))))
group.long 0x0014++0x03
line.long 0x00 "GICR_WAKER,Power Management Control Register"
bitfld.long 0x00 31. "         QUIESCENT ,This bit shows that the GIC-600 is idle and can be powered down if required" "Not quiescent,Quiescent"
bitfld.long 0x00 2. "     CHILDRENASLEEP ,Indicates the bus between the CPU interface and this Redistributor is quiescent" "Not quiescent,Quiescent"
NEWLINE
bitfld.long 0x00 1. "   PROCESSORASLEEP  ,Indicates if this Redistributor must assert a WakeRequest if there is a pending interrupt targeted at the connected core" "No,Yes"
bitfld.long 0x00 0. " SLEEP     ,Indicates if GIC-600 ensures that all the caches are consistent with external memory and that it is safe to power off" "No,Yes"
NEWLINE
else
hgroup.long 0x0014++0x03
hide.long 0x00 "GICR_WAKER,Power Management Control Register"
endif
group.long 0x0020++0x03
line.long 0x00 "GICR_FCTLR,Function Control Register"
bitfld.long 0x00 31. " QD        ,Q Deny. Indicates if Q-Channel requests are denied." "Not denied,Denied"
hexmask.long.byte 0x00 4.--6. 1. "           CGO        ,One bit per clock gate. Indicates if full clock gating is active."
NEWLINE
bitfld.long 0x00 0. "             SIP        ,Scrub in progress. This bit is read and written by software. When a scrub is complete, the GIC clears the bit to 0." "Completed,In Progress"
group.long 0x0024++0x03
line.long 0x00 "GICR_PWRR,Power Register"
hexmask.long.byte 0x00 16.--23. 1. " RDG    ,RDGroup. This read-only field indicates the number of the current Redistributor. Must be packed from 0."
hexmask.long.byte 0x00  8.--15. 1. "    RDGO    ,RDGroupOffset.This read-only field indicates the offset of the current core that is connected to the current Redistributor. Must be packed from 0 but does not necessarily map to a single cluster because the AXI4-Stream bus can be subdivided."
NEWLINE
rbitfld.long 0x00 3. "       RDGPO      ,RDGroupPoweredOff. This read-only bit indicates if group is powered and accessable or if it can be powered down" "Powered,Not powered"
rbitfld.long 0x00 2. " RDGPD      ,RDGroupPowerDown. This read-only bit indicates the intentional power state of the Redistributor. The Redistributor has reached its intentional power state when RDGPD = RDGPO." "Powered,Not powered"
NEWLINE
eventfld.long  0x00 1. "    RDAG      ,RDApplyGroup. This write-only bit applies the RDPD value to all Redistributors in the group. If the RDPD value cannot be applied to all cores in the group, then the GIC ignores this request." "-,Apply"
bitfld.long  0x00 0. "    RDPD      ,RDPowerDown. Writes to 1 ignored if GICR_WAKER.ProcessorSleep != 1. Writes ignored if RDGPD != RDGPO and changing to not match RDGPD. If all other cores have RDPD == 1, then setting this bit to 1 also sets RDGPD = 1." "Powered,Not powered"
group.long 0x0028++0x03
line.long 0x00 "GICR_CLASS,Class Register"
bitfld.long 0x00 0. " CLASS    ,Interrupt class." "0,1"
group.quad 0x070++0x07
line.quad 0x00 "GICR_PROPBASER,Common LPI configuration table base register"
bitfld.quad 0x00 56.--58. " OUTERCACHE       ,Indicates the Outer Cacheability attributes of accesses to the LPI Configuration table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
hexmask.quad 0x00 12.--51. 0x10 "  PHYSICAL_ADDRESS ,Bits [51:12] of the physical address containing the LPI Configuration table"
NEWLINE
bitfld.quad 0x00 10.--11. " SHAREABILITY     ,Indicates the Shareability attributes of accesses to the LPI Configuration table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
bitfld.quad 0x00 7.--9. "                  INNERCACHE       ,Indicates the Inner Cacheability attributes of accesses to the LPI Configuration table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
NEWLINE
bitfld.quad 0x00 0.--4. " IDBITS           ,The number of bits of LPI INTID supported minus one by the LPI Configuration table starting at Physical_Address"
group.quad 0x78++0x07
line.long 0x00 "GICR_PENDBASER,LPI pending table base register"
bitfld.quad 0x00 62. "         PTZ              ,Pending Table Zero" "Not zero,Zero" 
bitfld.quad 0x00 56.--58. "                         OUTERCACHE       ,Indicates the Outer Cacheability attributes of accesses to the LPI Pending table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
NEWLINE
hexmask.quad 0x00 16.--51. 0x10 " PHYSICAL_ADDRESS ,Bits [51:16] of the physical address containing the LPI Pending table"
bitfld.quad 0x00 10.--11. "                 SHAREABILITY     ,Indicates the Shareability attributes of accesses to the LPI Pending table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
NEWLINE
bitfld.quad 0x00 7.--9. " INNERCACHE       ,Indicates the Inner Cacheability attributes of accesses to the LPI Pending table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
NEWLINE
tree.end
tree "SGI and PPI Registers"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICR",-1.)+0x10080))
group.long 0x10080++0x03
line.long 0x0 "GICR_IGROUPR0,Interrupt Group Register 0"
bitfld.long 0x00 31. "         GSB31 ,Group Status Bit 31" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB30 ,Group Status Bit 30" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 29. "  GSB29 ,Group Status Bit 29" "Secure,Non-secure Group 1"
bitfld.long 0x00 28. "         GSB28 ,Group Status Bit 28" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 27. "  GSB27 ,Group Status Bit 27" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB26 ,Group Status Bit 26" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 25. "         GSB25 ,Group Status Bit 25" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB24 ,Group Status Bit 24" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 23. "  GSB23 ,Group Status Bit 23" "Secure,Non-secure Group 1"
bitfld.long 0x00 22. "         GSB22 ,Group Status Bit 22" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 21. "  GSB21 ,Group Status Bit 21" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB20 ,Group Status Bit 20" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 19. "         GSB19 ,Group Status Bit 19" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB18 ,Group Status Bit 18" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 17. "  GSB17 ,Group Status Bit 17" "Secure,Non-secure Group 1"
bitfld.long 0x00 16. "         GSB16 ,Group Status Bit 16" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 15. "  GSB15 ,Group Status Bit 15" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB14 ,Group Status Bit 14" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 13. "         GSB13 ,Group Status Bit 13" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB12 ,Group Status Bit 12" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 11. "  GSB11 ,Group Status Bit 11" "Secure,Non-secure Group 1"
bitfld.long 0x00 10. "         GSB10 ,Group Status Bit 10" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 9. "  GSB9  ,Group Status Bit 9" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB8  ,Group Status Bit 8" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 7. "         GSB7  ,Group Status Bit 7" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB6  ,Group Status Bit 6" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 5. "  GSB5  ,Group Status Bit 5" "Secure,Non-secure Group 1"
bitfld.long 0x00 4. "         GSB4  ,Group Status Bit 4" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 3. "  GSB3  ,Group Status Bit 3" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB2  ,Group Status Bit 2" "Secure,Non-secure Group 1"
NEWLINE
bitfld.long 0x00 1. "         GSB1  ,Group Status Bit 1" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB0  ,Group Status Bit 0" "Secure,Non-secure Group 1"
elif (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x000)
group.long 0x10080++0x03
line.long 0x0 "GICR_IGROUPR0,Interrupt Group Register 0"
bitfld.long 0x00 31. "         GSB31 ,Group Status Bit 31" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB30 ,Group Status Bit 30" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 29. "             GSB29 ,Group Status Bit 29" "Group 0,Group 1"
bitfld.long 0x00 28. "         GSB28 ,Group Status Bit 28" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 27. "             GSB27 ,Group Status Bit 27" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB26 ,Group Status Bit 26" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 25. "         GSB25 ,Group Status Bit 25" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB24 ,Group Status Bit 24" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 23. "             GSB23 ,Group Status Bit 23" "Group 0,Group 1"
bitfld.long 0x00 22. "         GSB22 ,Group Status Bit 22" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 21. "             GSB21 ,Group Status Bit 21" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB20 ,Group Status Bit 20" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 19. "         GSB19 ,Group Status Bit 19" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB18 ,Group Status Bit 18" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 17. "             GSB17 ,Group Status Bit 17" "Group 0,Group 1"
bitfld.long 0x00 16. "         GSB16 ,Group Status Bit 16" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 15. "             GSB15 ,Group Status Bit 15" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB14 ,Group Status Bit 14" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 13. "         GSB13 ,Group Status Bit 13" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB12 ,Group Status Bit 12" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 11. "             GSB11 ,Group Status Bit 11" "Group 0,Group 1"
bitfld.long 0x00 10. "         GSB10 ,Group Status Bit 10" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 9. "             GSB9  ,Group Status Bit 9" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB8  ,Group Status Bit 8" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 7. "         GSB7  ,Group Status Bit 7" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB6  ,Group Status Bit 6" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 5. "             GSB5  ,Group Status Bit 5" "Group 0,Group 1"
bitfld.long 0x00 4. "         GSB4  ,Group Status Bit 4" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 3. "             GSB3  ,Group Status Bit 3" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB2  ,Group Status Bit 2" "Group 0,Group 1"
NEWLINE
bitfld.long 0x00 1. "         GSB1  ,Group Status Bit 1" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB0  ,Group Status Bit 0" "Group 0,Group 1"
else
hgroup.long 0x10080++0x03
hide.long 0x00 "GICR_IGROUPR0,Interrupt Group Register 0"
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
endif
NEWLINE
width 24.
group.long 0x10100++0x03
line.long 0x0 "GICR_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "  SET/CLRENB31    ,Set/Clear Enable Bit 31" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRENB30    ,Set/Clear Enable Bit 30" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRENB29    ,Set/Clear Enable Bit 29" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  SET/CLRENB28    ,Set/Clear Enable Bit 28" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRENB27    ,Set/Clear Enable Bit 27" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRENB26    ,Set/Clear Enable Bit 26" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 25. 0x00 25. 0x80 25. "  SET/CLRENB25    ,Set/Clear Enable Bit 25" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRENB24    ,Set/Clear Enable Bit 24" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRENB23    ,Set/Clear Enable Bit 23" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  SET/CLRENB22    ,Set/Clear Enable Bit 22" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRENB21    ,Set/Clear Enable Bit 21" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRENB20    ,Set/Clear Enable Bit 20" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 19. 0x00 19. 0x80 19. "  SET/CLRENB19    ,Set/Clear Enable Bit 19" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRENB18    ,Set/Clear Enable Bit 18" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRENB17    ,Set/Clear Enable Bit 17" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  SET/CLRENB16    ,Set/Clear Enable Bit 16" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRENB15    ,Set/Clear Enable Bit 15" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRENB14    ,Set/Clear Enable Bit 14" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 13. 0x00 13. 0x80 13. "  SET/CLRENB13    ,Set/Clear Enable Bit 13" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRENB12    ,Set/Clear Enable Bit 12" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRENB11    ,Set/Clear Enable Bit 11" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  SET/CLRENB10    ,Set/Clear Enable Bit 10" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRENB9     ,Set/Clear Enable Bit 9" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRENB8     ,Set/Clear Enable Bit 8" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 7. 0x00 7. 0x80 7. "  SET/CLRENB7     ,Set/Clear Enable Bit 7" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRENB6     ,Set/Clear Enable Bit 6" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRENB5     ,Set/Clear Enable Bit 5" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  SET/CLRENB4     ,Set/Clear Enable Bit 4" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRENB3     ,Set/Clear Enable Bit 3" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRENB2     ,Set/Clear Enable Bit 2" "Disabled,Enabled"
NEWLINE
setclrfld.long 0x00 1. 0x00 1. 0x80 1. "  SET/CLRENB1     ,Set/Clear Enable Bit 1" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRENB0     ,Set/Clear Enable Bit 0" "Disabled,Enabled"
group.long 0x10200++0x03
line.long 0x0 "GICR_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "  SET/CLRPEND31   ,Set/Clear Pending Bit 31" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRPEND30   ,Set/Clear Pending Bit 30" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRPEND29   ,Set/Clear Pending Bit 29" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  SET/CLRPEND28   ,Set/Clear Pending Bit 28" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRPEND27   ,Set/Clear Pending Bit 27" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRPEND26   ,Set/Clear Pending Bit 26" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 25. 0x00 25. 0x80 25. "  SET/CLRPEND25   ,Set/Clear Pending Bit 25" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRPEND24   ,Set/Clear Pending Bit 24" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRPEND23   ,Set/Clear Pending Bit 23" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  SET/CLRPEND22   ,Set/Clear Pending Bit 22" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRPEND21   ,Set/Clear Pending Bit 21" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRPEND20   ,Set/Clear Pending Bit 20" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 19. 0x00 19. 0x80 19. "  SET/CLRPEND19   ,Set/Clear Pending Bit 19" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRPEND18   ,Set/Clear Pending Bit 18" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRPEND17   ,Set/Clear Pending Bit 17" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  SET/CLRPEND16   ,Set/Clear Pending Bit 16" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRPEND15   ,Set/Clear Pending Bit 15" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRPEND14   ,Set/Clear Pending Bit 14" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 13. 0x00 13. 0x80 13. "  SET/CLRPEND13   ,Set/Clear Pending Bit 13" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRPEND12   ,Set/Clear Pending Bit 12" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRPEND11   ,Set/Clear Pending Bit 11" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  SET/CLRPEND10   ,Set/Clear Pending Bit 10" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRPEND9    ,Set/Clear Pending Bit 9" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRPEND8    ,Set/Clear Pending Bit 8" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 7. 0x00 7. 0x80 7. "  SET/CLRPEND7    ,Set/Clear Pending Bit 7" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRPEND6    ,Set/Clear Pending Bit 6" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRPEND5    ,Set/Clear Pending Bit 5" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  SET/CLRPEND4    ,Set/Clear Pending Bit 4" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRPEND3    ,Set/Clear Pending Bit 3" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRPEND2    ,Set/Clear Pending Bit 2" "Not pending,Pending"
NEWLINE
setclrfld.long 0x00 1. 0x00 1. 0x80 1. "  SET/CLRPEND1    ,Set/Clear Pending Bit 1" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRPEND0    ,Set/Clear Pending Bit 0" "Not pending,Pending"
group.long 0x10300++0x03
line.long 0x0 "GICR_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "  SET/CLRACTIVE31 ,Set/Clear Active Bit 31" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE30 ,Set/Clear Active Bit 30" "Not active,Active"
NEWLINE
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE29 ,Set/Clear Active Bit 29" "Not active,Active"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  SET/CLRACTIVE28 ,Set/Clear Active Bit 28" "Not active,Active"
NEWLINE
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE27 ,Set/Clear Active Bit 27" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE26 ,Set/Clear Active Bit 26" "Not active,Active"
NEWLINE
setclrfld.long 0x00 25. 0x00 25. 0x80 25. "  SET/CLRACTIVE25 ,Set/Clear Active Bit 25" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE24 ,Set/Clear Active Bit 24" "Not active,Active"
NEWLINE
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE23 ,Set/Clear Active Bit 23" "Not active,Active"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  SET/CLRACTIVE22 ,Set/Clear Active Bit 22" "Not active,Active"
NEWLINE
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE21 ,Set/Clear Active Bit 21" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE20 ,Set/Clear Active Bit 20" "Not active,Active"
NEWLINE
setclrfld.long 0x00 19. 0x00 19. 0x80 19. "  SET/CLRACTIVE19 ,Set/Clear Active Bit 19" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE18 ,Set/Clear Active Bit 18" "Not active,Active"
NEWLINE
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE17 ,Set/Clear Active Bit 17" "Not active,Active"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  SET/CLRACTIVE16 ,Set/Clear Active Bit 16" "Not active,Active"
NEWLINE
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE15 ,Set/Clear Active Bit 15" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE14 ,Set/Clear Active Bit 14" "Not active,Active"
NEWLINE
setclrfld.long 0x00 13. 0x00 13. 0x80 13. "  SET/CLRACTIVE13 ,Set/Clear Active Bit 13" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE12 ,Set/Clear Active Bit 12" "Not active,Active"
NEWLINE
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE11 ,Set/Clear Active Bit 11" "Not active,Active"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  SET/CLRACTIVE10 ,Set/Clear Active Bit 10" "Not active,Active"
NEWLINE
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE9  ,Set/Clear Active Bit 9" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE8  ,Set/Clear Active Bit 8" "Not active,Active"
NEWLINE
setclrfld.long 0x00 7. 0x00 7. 0x80 7. "  SET/CLRACTIVE7  ,Set/Clear Active Bit 7" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE6  ,Set/Clear Active Bit 6" "Not active,Active"
NEWLINE
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE5  ,Set/Clear Active Bit 5" "Not active,Active"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  SET/CLRACTIVE4  ,Set/Clear Active Bit 4" "Not active,Active"
NEWLINE
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE3  ,Set/Clear Active Bit 3" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE2  ,Set/Clear Active Bit 2" "Not active,Active"
NEWLINE
setclrfld.long 0x00 1. 0x00 1. 0x80 1. "  SET/CLRACTIVE1  ,Set/Clear Active Bit 1" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE0  ,Set/Clear Active Bit 0" "Not active,Active"
NEWLINE
width 18.
group.long 0x10400++0x03
line.long 0x00 "GICR_IPRIORITYR0,Interrupt Priority Register 0"
hexmask.long.byte 0x00 24.--31. 1. " INTID3    ,Interrupt ID3    Priority/Priority Byte Offset 3   "
hexmask.long.byte 0x00 16.--23. 1. "     INTID2    ,Interrupt ID2    Priority/Priority Byte Offset 2   "
NEWLINE
hexmask.long.byte 0x00 8.--15. 1. "     INTID1    ,Interrupt ID1    Priority/Priority Byte Offset 1   "
hexmask.long.byte 0x00 0.--7. 1. "     INTID0    ,Interrupt ID0    Priority/Priority Byte Offset 0   "
group.long 0x10404++0x03
line.long 0x00 "GICR_IPRIORITYR1,Interrupt Priority Register 1"
hexmask.long.byte 0x00 24.--31. 1. " INTID7    ,Interrupt ID7    Priority/Priority Byte Offset 7   "
hexmask.long.byte 0x00 16.--23. 1. "     INTID6    ,Interrupt ID6    Priority/Priority Byte Offset 6   "
NEWLINE
hexmask.long.byte 0x00 8.--15. 1. "     INTID5    ,Interrupt ID5    Priority/Priority Byte Offset 5   "
hexmask.long.byte 0x00 0.--7. 1. "     INTID4    ,Interrupt ID4    Priority/Priority Byte Offset 4   "
group.long 0x10408++0x03
line.long 0x00 "GICR_IPRIORITYR2,Interrupt Priority Register 2"
hexmask.long.byte 0x00 24.--31. 1. " INTID11   ,Interrupt ID11   Priority/Priority Byte Offset 11  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID10   ,Interrupt ID10   Priority/Priority Byte Offset 10  "
NEWLINE
hexmask.long.byte 0x00 8.--15. 1. "     INTID9    ,Interrupt ID9    Priority/Priority Byte Offset 9   "
hexmask.long.byte 0x00 0.--7. 1. "     INTID8    ,Interrupt ID8    Priority/Priority Byte Offset 8   "
group.long 0x1040C++0x03
line.long 0x00 "GICR_IPRIORITYR3,Interrupt Priority Register 3"
hexmask.long.byte 0x00 24.--31. 1. " INTID15   ,Interrupt ID15   Priority/Priority Byte Offset 15  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID14   ,Interrupt ID14   Priority/Priority Byte Offset 14  "
NEWLINE
hexmask.long.byte 0x00 8.--15. 1. "     INTID13   ,Interrupt ID13   Priority/Priority Byte Offset 13  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID12   ,Interrupt ID12   Priority/Priority Byte Offset 12  "
group.long 0x10410++0x03
line.long 0x00 "GICR_IPRIORITYR4,Interrupt Priority Register 4"
hexmask.long.byte 0x00 24.--31. 1. " INTID19   ,Interrupt ID19   Priority/Priority Byte Offset 19  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID18   ,Interrupt ID18   Priority/Priority Byte Offset 18  "
NEWLINE
hexmask.long.byte 0x00 8.--15. 1. "     INTID17   ,Interrupt ID17   Priority/Priority Byte Offset 17  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID16   ,Interrupt ID16   Priority/Priority Byte Offset 16  "
group.long 0x10414++0x03
line.long 0x00 "GICR_IPRIORITYR5,Interrupt Priority Register 5"
hexmask.long.byte 0x00 24.--31. 1. " INTID23   ,Interrupt ID23   Priority/Priority Byte Offset 23  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID22   ,Interrupt ID22   Priority/Priority Byte Offset 22  "
NEWLINE
hexmask.long.byte 0x00 8.--15. 1. "     INTID21   ,Interrupt ID21   Priority/Priority Byte Offset 21  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID20   ,Interrupt ID20   Priority/Priority Byte Offset 20  "
group.long 0x10418++0x03
line.long 0x00 "GICR_IPRIORITYR6,Interrupt Priority Register 6"
hexmask.long.byte 0x00 24.--31. 1. " INTID27   ,Interrupt ID27   Priority/Priority Byte Offset 27  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID26   ,Interrupt ID26   Priority/Priority Byte Offset 26  "
NEWLINE
hexmask.long.byte 0x00 8.--15. 1. "     INTID25   ,Interrupt ID25   Priority/Priority Byte Offset 25  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID24   ,Interrupt ID24   Priority/Priority Byte Offset 24  "
group.long 0x1041C++0x03
line.long 0x00 "GICR_IPRIORITYR7,Interrupt Priority Register 7"
hexmask.long.byte 0x00 24.--31. 1. " INTID31   ,Interrupt ID31   Priority/Priority Byte Offset 31  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID30   ,Interrupt ID30   Priority/Priority Byte Offset 30  "
NEWLINE
hexmask.long.byte 0x00 8.--15. 1. "     INTID29   ,Interrupt ID29   Priority/Priority Byte Offset 29  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID28   ,Interrupt ID28   Priority/Priority Byte Offset 28  "
NEWLINE
rgroup.long 0x10C00++0x03
line.long 0x00 "GICR_ICFGR0,Interrupt Configuration Register"
bitfld.long 0x00 31. " ICF15   ,Interrupt Configuration 15 (SGI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14   ,Interrupt Configuration 14 (SGI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 27. "  ICF13   ,Interrupt Configuration 13 (SGI)" "Level,Edge"
bitfld.long 0x00 25. " ICF12   ,Interrupt Configuration 12 (SGI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 23. "  ICF11   ,Interrupt Configuration 11 (SGI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10   ,Interrupt Configuration 10 (SGI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 19. " ICF9    ,Interrupt Configuration 9 (SGI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8    ,Interrupt Configuration 8 (SGI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 15. "  ICF7    ,Interrupt Configuration 7 (SGI)" "Level,Edge"
bitfld.long 0x00 13. " ICF6    ,Interrupt Configuration 6 (SGI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 11. "  ICF5    ,Interrupt Configuration 5 (SGI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4    ,Interrupt Configuration 4 (SGI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 7. " ICF3    ,Interrupt Configuration 3 (SGI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2    ,Interrupt Configuration 2 (SGI)" "Level,Edge"
group.long 0x10C04++0x03
line.long 0x00 "GICR_ICFGR1,Interrupt Configuration Register"
bitfld.long 0x00 31. " ICF15   ,Interrupt Configuration 15 (PPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14   ,Interrupt Configuration 14 (PPI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 27. "  ICF13   ,Interrupt Configuration 13 (PPI)" "Level,Edge"
bitfld.long 0x00 25. " ICF12   ,Interrupt Configuration 12 (PPI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 23. "  ICF11   ,Interrupt Configuration 11 (PPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10   ,Interrupt Configuration 10 (PPI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 19. " ICF9    ,Interrupt Configuration 9 (PPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8    ,Interrupt Configuration 8 (PPI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 15. "  ICF7    ,Interrupt Configuration 7 (PPI)" "Level,Edge"
bitfld.long 0x00 13. " ICF6    ,Interrupt Configuration 6 (PPI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 11. "  ICF5    ,Interrupt Configuration 5 (PPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4    ,Interrupt Configuration 4 (PPI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 7. " ICF3    ,Interrupt Configuration 3 (PPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2    ,Interrupt Configuration 2 (PPI)" "Level,Edge"
NEWLINE
bitfld.long 0x00 3. "  ICF1    ,Interrupt Configuration 1 (PPI)" "Level,Edge"
NEWLINE
width 18.
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICR",-1.)+0x10D00))
group.long 0x10D00++0x03
line.long 0x0 "GICR_IGRPMODR0,Interrupt Group Modifier Register 0"
bitfld.long 0x00 31. " GMB31 ,Group Modifier Bit 31" "0,1"
bitfld.long 0x00 30. "  GMB30 ,Group Modifier Bit 30" "0,1"
NEWLINE
bitfld.long 0x00 29. "  GMB29 ,Group Modifier Bit 29" "0,1"
bitfld.long 0x00 28. " GMB28 ,Group Modifier Bit 28" "0,1"
NEWLINE
bitfld.long 0x00 27. "  GMB27 ,Group Modifier Bit 27" "0,1"
bitfld.long 0x00 26. "  GMB26 ,Group Modifier Bit 26" "0,1"
NEWLINE
bitfld.long 0x00 25. " GMB25 ,Group Modifier Bit 25" "0,1"
bitfld.long 0x00 24. "  GMB24 ,Group Modifier Bit 24" "0,1"
NEWLINE
bitfld.long 0x00 23. "  GMB23 ,Group Modifier Bit 23" "0,1"
bitfld.long 0x00 22. " GMB22 ,Group Modifier Bit 22" "0,1"
NEWLINE
bitfld.long 0x00 21. "  GMB21 ,Group Modifier Bit 21" "0,1"
bitfld.long 0x00 20. "  GMB20 ,Group Modifier Bit 20" "0,1"
NEWLINE
bitfld.long 0x00 19. " GMB19 ,Group Modifier Bit 19" "0,1"
bitfld.long 0x00 18. "  GMB18 ,Group Modifier Bit 18" "0,1"
NEWLINE
bitfld.long 0x00 17. "  GMB17 ,Group Modifier Bit 17" "0,1"
bitfld.long 0x00 16. " GMB16 ,Group Modifier Bit 16" "0,1"
NEWLINE
bitfld.long 0x00 15. "  GMB15 ,Group Modifier Bit 15" "0,1"
bitfld.long 0x00 14. "  GMB14 ,Group Modifier Bit 14" "0,1"
NEWLINE
bitfld.long 0x00 13. " GMB13 ,Group Modifier Bit 13" "0,1"
bitfld.long 0x00 12. "  GMB12 ,Group Modifier Bit 12" "0,1"
NEWLINE
bitfld.long 0x00 11. "  GMB11 ,Group Modifier Bit 11" "0,1"
bitfld.long 0x00 10. " GMB10 ,Group Modifier Bit 10" "0,1"
NEWLINE
bitfld.long 0x00 9. "  GMB9  ,Group Modifier Bit 9" "0,1"
bitfld.long 0x00 8. "  GMB8  ,Group Modifier Bit 8" "0,1"
NEWLINE
bitfld.long 0x00 7. " GMB7  ,Group Modifier Bit 7" "0,1"
bitfld.long 0x00 6. "  GMB6  ,Group Modifier Bit 6" "0,1"
NEWLINE
bitfld.long 0x00 5. "  GMB5  ,Group Modifier Bit 5" "0,1"
bitfld.long 0x00 4. " GMB4  ,Group Modifier Bit 4" "0,1"
NEWLINE
bitfld.long 0x00 3. "  GMB3  ,Group Modifier Bit 3" "0,1"
bitfld.long 0x00 2. "  GMB2  ,Group Modifier Bit 2" "0,1"
NEWLINE
bitfld.long 0x00 1. " GMB1  ,Group Modifier Bit 1" "0,1"
bitfld.long 0x00 0. "  GMB0  ,Group Modifier Bit 0" "0,1"
NEWLINE
else
hgroup.long 0x10D00++0x03
hide.long 0x0 "GICR_IGRPMODR0,Interrupt Group Modifier Register 0"
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICR",-1.)+0x10E00))
group.long 0x10E00++0x03
line.long 0x00 "GICR_NSACR,Non-secure Access Control Register"
bitfld.long 0x00 30.--31. " NS_ACCESS15 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID15" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 28.--29. "  NS_ACCESS14 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID14" "No access,G0S,G0S/G1S,?..."
NEWLINE
bitfld.long 0x00 26.--27. "  NS_ACCESS13 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID13" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 24.--25. " NS_ACCESS12 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID12" "No access,G0S,G0S/G1S,?..."
NEWLINE
bitfld.long 0x00 22.--23. "  NS_ACCESS11 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID11" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 20.--21. "  NS_ACCESS10 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID10" "No access,G0S,G0S/G1S,?..."
NEWLINE
bitfld.long 0x00 18.--19. " NS_ACCESS9  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID9" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 16.--17. "  NS_ACCESS8  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID8" "No access,G0S,G0S/G1S,?..."
NEWLINE
bitfld.long 0x00 14.--15. "  NS_ACCESS7  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID7" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 12.--13. " NS_ACCESS6  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID6" "No access,G0S,G0S/G1S,?..."
NEWLINE
bitfld.long 0x00 10.--11. "  NS_ACCESS5  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID5" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 8.--9. "  NS_ACCESS4  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID4" "No access,G0S,G0S/G1S,?..."
NEWLINE
bitfld.long 0x00 6.--7. " NS_ACCESS3  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID3" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 4.--5. "  NS_ACCESS2  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID2" "No access,G0S,G0S/G1S,?..."
NEWLINE
bitfld.long 0x00 2.--3. "  NS_ACCESS1  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID1" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 0.--1. " NS_ACCESS0  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID0" "No access,G0S,G0S/G1S,?..."
NEWLINE
else
hgroup.long 0x10E00++0x03
hide.long 0x00 "GICR_NSACR,Non-secure Access Control Register"
NEWLINE
NEWLINE
NEWLINE
NEWLINE
NEWLINE
endif
rgroup.long 0x1C000++0x03
line.long 0x00 "GICR_MISCSTATUSR,Miscellaneous Status Register"
bitfld.long 0x00 31. " CPU_AS     ,CPU active state. This bit returns the actual status of the cpu_active signal for the core corresponding to the Redistributor whose register is being read" "Low,High"
bitfld.long 0x00 30. " WAKEREQUEST     ,This bit indicates if a wake request is active" "Not active,Active"
NEWLINE
bitfld.long 0x00 3. "  ENABLEGRP1_S ,EnableGrp1 Secure" "0,1"
bitfld.long 0x00 2. " ENABLEGRP1_S ,EnableGrp1 Secure" "0,1"
NEWLINE
bitfld.long 0x00 1. "     ENABLEGRP1_NS ,EnableGrp1 Non-secure" "0,1"
bitfld.long 0x00 0. " ENABLEGRP0 ,EnableGrp0" "0,1"
NEWLINE
rgroup.long 0x1C008++0x03
line.long 0x00 "GICR_IERRV,Interrupt Error Valid Register"
bitfld.long 0x00 31. "     VALID31 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 30. "     VALID30 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 29. "     VALID29 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 28. "     VALID28 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 27. "     VALID27 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 26. "     VALID26 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 25. "     VALID25 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 24. "     VALID24 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 23. "     VALID23 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 22. "     VALID22 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 21. "     VALID21 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 20. "     VALID20 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 19. "     VALID19 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 18. "     VALID18 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 17. "     VALID17 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 16. "     VALID16 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 15. "     VALID15 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 14. "     VALID14 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 13. "     VALID13 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 12. "     VALID12 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 11. "     VALID11 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 10. "     VALID10 ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 9. "     VALID9  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 8. "     VALID8  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 7. "     VALID7  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 6. "     VALID6  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 5. "     VALID5  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 4. "     VALID4  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 3. "     VALID3  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 2. "     VALID2  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
bitfld.long 0x00 1. "     VALID1  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
bitfld.long 0x00 0. "     VALID0  ,Indicates if there is an error on interrupt so the interrupt is not delivered." "0,1"
NEWLINE
NEWLINE
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)||((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICR",-1.)+0x1C010))))
//(GICD_TYPER.SECURITYEXTN == 1 [Implemented] && Accessed address is secure)
group.quad 0x1C010++0x07
line.quad 0x00 "GICR_SGIDR,SGI Default Register"
bitfld.quad 0x00 62. " GRPMOD16 ,As GRPMOD register." "0,1"
bitfld.quad 0x00 61. "     GRP16 ,As GRP register." "0,1"
bitfld.quad 0x00 60. "     NSACR16 ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 58. " GRPMOD15 ,As GRPMOD register." "0,1"
bitfld.quad 0x00 57. "     GRP15 ,As GRP register." "0,1"
bitfld.quad 0x00 56. "     NSACR15 ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 54. " GRPMOD14 ,As GRPMOD register." "0,1"
bitfld.quad 0x00 53. "     GRP14 ,As GRP register." "0,1"
bitfld.quad 0x00 52. "     NSACR14 ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 50. " GRPMOD13 ,As GRPMOD register." "0,1"
bitfld.quad 0x00 49. "     GRP13 ,As GRP register." "0,1"
bitfld.quad 0x00 48. "     NSACR13 ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 46. " GRPMOD12 ,As GRPMOD register." "0,1"
bitfld.quad 0x00 45. "     GRP12 ,As GRP register." "0,1"
bitfld.quad 0x00 44. "     NSACR12 ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 42. " GRPMOD11 ,As GRPMOD register." "0,1"
bitfld.quad 0x00 41. "     GRP11 ,As GRP register." "0,1"
bitfld.quad 0x00 40. "     NSACR11 ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 38. " GRPMOD10 ,As GRPMOD register." "0,1"
bitfld.quad 0x00 37. "     GRP10 ,As GRP register." "0,1"
bitfld.quad 0x00 36. "     NSACR10 ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 34. " GRPMOD9  ,As GRPMOD register." "0,1"
bitfld.quad 0x00 33. "     GRP9  ,As GRP register." "0,1"
bitfld.quad 0x00 32. "     NSACR9  ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 30. " GRPMOD8  ,As GRPMOD register." "0,1"
bitfld.quad 0x00 29. "     GRP8  ,As GRP register." "0,1"
bitfld.quad 0x00 28. "     NSACR8  ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 26. " GRPMOD7  ,As GRPMOD register." "0,1"
bitfld.quad 0x00 25. "     GRP7  ,As GRP register." "0,1"
bitfld.quad 0x00 24. "     NSACR7  ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 22. " GRPMOD6  ,As GRPMOD register." "0,1"
bitfld.quad 0x00 21. "     GRP6  ,As GRP register." "0,1"
bitfld.quad 0x00 20. "     NSACR6  ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 18. " GRPMOD5  ,As GRPMOD register." "0,1"
bitfld.quad 0x00 17. "     GRP5  ,As GRP register." "0,1"
bitfld.quad 0x00 16. "     NSACR5  ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 14. " GRPMOD4  ,As GRPMOD register." "0,1"
bitfld.quad 0x00 13. "     GRP4  ,As GRP register." "0,1"
bitfld.quad 0x00 12. "     NSACR4  ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 10. " GRPMOD3  ,As GRPMOD register." "0,1"
bitfld.quad 0x00 9. "     GRP3  ,As GRP register." "0,1"
bitfld.quad 0x00 8. "     NSACR3  ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 6. " GRPMOD2  ,As GRPMOD register." "0,1"
bitfld.quad 0x00 5. "     GRP2  ,As GRP register." "0,1"
bitfld.quad 0x00 4. "     NSACR2  ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
bitfld.quad 0x00 2. " GRPMOD1  ,As GRPMOD register." "0,1"
bitfld.quad 0x00 1. "     GRP1  ,As GRP register." "0,1"
bitfld.quad 0x00 0. "     NSACR1  ,Indicates if Non-secure access to interrupt is allowed." "0,1"
NEWLINE
else
hgroup.quad 0x1C010++0x07
hide.quad 0x00 "GICR_SGIDR,SGI Default Register"
endif
rgroup.long 0x1C080++0x03
line.long 0x00 "GICR_PPISR,Private Peripheral Interrupt Status Register"
bitfld.long 0x00 31. "         PPI31S     ,Actual status of the PPI31 input signal" "Low,High"
bitfld.long 0x00 30. "          PPI30S       ,Actual status of the PPI30 input signal" "Low,High"
NEWLINE
bitfld.long 0x00 29. "          PPI29S        ,Actual status of the PPI29 input signal" "Low,High"
bitfld.long 0x00 28. "         PPI28S     ,Actual status of the PPI28 input signal" "Low,High"
NEWLINE
bitfld.long 0x00 27. "          PPI27S       ,Actual status of the PPI27 input signal" "Low,High"
bitfld.long 0x00 26. "          PPI26S        ,Actual status of the PPI26 input signal" "Low,High"
NEWLINE
bitfld.long 0x00 25. "         PPI25S     ,Actual status of the PPI25 input signal" "Low,High"
bitfld.long 0x00 24. "          PPI24S       ,Actual status of the PPI24 input signal" "Low,High"
NEWLINE
bitfld.long 0x00 23. "          PPI23S        ,Actual status of the PPI23 input signal" "Low,High"
bitfld.long 0x00 22. "         PPI22S     ,Actual status of the PPI22 input signal" "Low,High"
NEWLINE
bitfld.long 0x00 21. "          PPI21S       ,Actual status of the PPI21 input signal" "Low,High"
bitfld.long 0x00 20. "          PPI20S        ,Actual status of the PPI20 input signal" "Low,High"
NEWLINE
bitfld.long 0x00 19. "         PPI19S     ,Actual status of the PPI19 input signal" "Low,High"
bitfld.long 0x00 18. "          PPI18S       ,Actual status of the PPI18 input signal" "Low,High"
NEWLINE
bitfld.long 0x00 17. "          PPI17S        ,Actual status of the PPI17 input signal" "Low,High"
bitfld.long 0x00 16. "         PPI16S     ,Actual status of the PPI16 input signal" "Low,High"
rgroup.long 0x1F000++0x03
line.long 0x00 "GICR_CFGID0,Configuration ID0 Register"
bitfld.long 0x00 28.--31. "         AF3WIDTH ,Affinity 3 width." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "          AF2WIDTH ,Affinity 2 width." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
NEWLINE
bitfld.long 0x00 20.--23. "          AF1WIDTH ,Affinity 1 width." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "         AF0WIDTH ,Affinity 0 width." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
NEWLINE
bitfld.long 0x00 12.--15. "          TGT0LISTWIDTH ,The Target0 list width - 1." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 11. "          ECCSUPPORT ,This bit indicates if ECC is supported." "Not supported,Supported"
NEWLINE
hexmask.long.word 0x00 0.--8. 1. "         PPINUMBER  ,RedistributorID. The ppi_id[15:0] tie-off signal sets the value of the ID. Each Redistributor must have a unique ID."
rgroup.long 0x1F004++0x03
line.long 0x00 "GICR_CFGID1,Configuration ID1 Register"
bitfld.long 0x00 28.--31. "         VERSION       ,Identifies the major and minor revisions and product quality status of the GIC-600." "?,Ver0 (r0p0),?,Ver1 (r0p1),Ver2 (r0p2),?..."
hexmask.long.byte 0x00 24.--27. 1. "         USERVALUE       ,Modification value that you can set."
NEWLINE
hexmask.long.byte 0x00 16.--19. 1. "         PPIPERPROC       ,The number of Redistributors that each core supports - 1."
bitfld.long 0x00 12. "         DIRECTUPSTREAM, Indicates a direct upstream connection." "0,1"
NEWLINE
hexmask.long.word 0x00  4.--11. 1. "         NUMCPUS       ,The number of cores that are integrated in this Redistributor."
tree.end
width 12.
tree "Peripheral/Component ID Registers"
rgroup.long 0xFFE0++0x03
line.long 0x00 "GICR_PIDR0,Peripheral ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. " PART_0  ,Part number[7:0]"
rgroup.long 0xFFE4++0x03
line.long 0x00 "GICR_PIDR1,Peripheral ID1 Register"
bitfld.long 0x00 4.--7. " DES_1   ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        PART_1 ,         Part number[11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFE8++0x03
line.long 0x00 "GICR_PIDR2,Peripheral ID2 Register"
bitfld.long 0x00 4.--7. " ARCHREV ,Identifies the version of the GIC architecture with which the GIC-600 complies" "Reserved,Reserved,Reserved,v3.0,?..."
bitfld.long 0x00 3. "  JEDEC  ,Indicates that a JEDEC-assigned JEP106 identity code is used" "Low,High"
bitfld.long 0x00 0.--2. "  DES_1 ,JEP106 identity code [6:4]" "0,1,2,3,4,5,6,7"
rgroup.long 0xFFEC++0x03
line.long 0x00 "GICR_PIDR3,Peripheral ID3 Register"
bitfld.long 0x00 4.--7. " REVAND  ,Manufacturer defined revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        CMOD   ,Indicates if the customer has modified the behavior of the component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFD0++0x03
line.long 0x00 "GICR_PIDR4,Peripheral ID4 Register"
bitfld.long 0x00 4.--7. " SIZE    ,64 KB software visible page" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        DES_2  ,ARM implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0xFFD4++0x03
hide.long 0x00 "GICR_PIDR5,Peripheral ID5 Register"
hgroup.long 0xFFD8++0x03
hide.long 0x00 "GICR_PIDR6,Peripheral ID6 Register"
hgroup.long 0xFFDC++0x03
hide.long 0x00 "GICR_PIDR7,Peripheral ID7 Register"
rgroup.long 0xFFF0++0x03
line.long 0x00 "GICR_CIDR0,Component ID0 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF4++0x03
line.long 0x00 "GICR_CIDR1,Component ID1 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF8++0x03
line.long 0x00 "GICR_CIDR2,Component ID2 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFFC++0x03
line.long 0x00 "GICR_CIDR3,Component ID3 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
tree.end
tree.end
AUTOINDENT.OFF
sif COMP.AVAILABLE("GICC")
base COMP.BASE("GICC",-1.)
width 14.
tree "CPU Interface"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICC",-1.)))
group.long 0x00++0x03
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
bitfld.long 0x00 10. " EOIMODENS     ,Controls the behavior of Non-secure accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 9. "  EOIMODES      ,Controls the behavior of Secure accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 8. "  IRQBYPDISGRP1 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
textline "                       "
bitfld.long 0x00 7. " FIQBYPDISGRP1 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
bitfld.long 0x00 6. "          IRQBYPDISGRP0 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 0" "Signaled,Not signaled"
bitfld.long 0x00 5. "          FIQBYPDISGRP0 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 0" "Signaled,Not signaled"
textline "                       "
bitfld.long 0x00 4. " CBPR          ,Controls whether GICC_BPR provides common control of preemption to Group 0 and Group 1 interrupts" "Group 0,Both"
bitfld.long 0x00 3. "               FIQEN         ,Controls whether the CPU interface signals Group 0 interrupts to a target PE using the FIQ or IRQ signal" "IRQ,FIQ"
bitfld.long 0x00 1. "                   ENABLEGRP1    ,Enables the signaling of Group 1 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 0. " ENABLEGRP0    ,Enables the signaling of Group 0 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
elif (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)
group.long 0x00++0x03
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
bitfld.long 0x00 9. " EOIMODENS     ,Controls the behavior of Non-secure accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 6. "  IRQBYPDISGRP1 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
bitfld.long 0x00 5. "          FIQBYPDISGRP1 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
textline "                       "
bitfld.long 0x00 0. " ENABLEGRP1    ,Enables the signaling of Group 1 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
else
group.long 0x00++0x03
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
bitfld.long 0x00 9. " EOIMODE       ,Controls the behavior of accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 8. "  IRQBYPDISGRP1 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
bitfld.long 0x00 7. "          FIQBYPDISGRP1 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
textline "                       "
bitfld.long 0x00 6. " IRQBYPDISGRP0 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 0" "Signaled,Not signaled"
bitfld.long 0x00 5. "          FIQBYPDISGRP0 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 0" "Signaled,Not signaled"
bitfld.long 0x00 4. "          CBPR          ,Controls whether GICC_BPR provides common control of preemption to Group 0 and Group 1 interrupts" "Group 0,Both"
textline "                       "
bitfld.long 0x00 3. " FIQEN         ,Controls whether the CPU interface signals Group 0 interrupts to a target PE using the FIQ or IRQ signal" "IRQ,FIQ"
bitfld.long 0x00 1. "                   ENABLEGRP1    ,Enables the signaling of Group 1 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
bitfld.long 0x00 0. "              ENABLEGRP0    ,Enables the signaling of Group 0 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
endif
textline "                       "
group.long 0x04++0x03
line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register"
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface"
group.long 0x08++0x03
line.long 0x00 "GICC_BPR,Binary Point Register"
bitfld.long 0x00 0.--2. " BP       ,Binary point" "0,1,2,3,4,5,6,7"
hgroup.long 0x0C++0x03
hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register"
in
wgroup.long 0x10++0x03
line.long 0x00 "GICC_EOIR,End Of Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
rgroup.long 0x14++0x03
line.long 0x00 "GICC_RPR,Running Priority Register"
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority value of highest priority interrupt"
rgroup.long 0x18++0x03
line.long 0x00 "GICC_HPPIR,Highest Priority Pending Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
group.long 0x1C++0x03
line.long 0x00 "GICC_ABPR,Aliased Binary Point Register"
bitfld.long 0x00 0.--2. " BP       ,Binary point" "0,1,2,3,4,5,6,7"
hgroup.long 0x20++0x03
hide.long 0x00 "GICC_AIAR,Aliased Interrupt Acknowledge Register"
in
wgroup.long 0x24++0x03
line.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
rgroup.long 0x28++0x03
line.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
rgroup.long 0x2C++0x03
line.long 0x00 "GICC_STATUSR,CPU Interface Status Register"
bitfld.long 0x00 4. " ASV      ,Attempted security violation" "Not detected,Detected"
bitfld.long 0x00 3. "  WROD    ,Write to an RO location" "Not detected,Detected"
bitfld.long 0x00 2. "  RWOD ,Read of a WO location" "Not detected,Detected"
textline "                       "
bitfld.long 0x00 1. " WRD      ,Write to a reserved location" "Not detected,Detected"
bitfld.long 0x00 0. "  RRD     ,Read of a reserved location" "Not detected,Detected"
group.long 0xD0++0x03
line.long 0x00 "GICC_APR0,Active Priorities Register 0"
group.long 0xD4++0x03
line.long 0x00 "GICC_APR1,Active Priorities Register 1"
group.long 0xD8++0x03
line.long 0x00 "GICC_APR2,Active Priorities Register 2"
group.long 0xDC++0x03
line.long 0x00 "GICC_APR3,Active Priorities Register 3"
group.long 0xE0++0x03
line.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register 0"
group.long 0xE4++0x03
line.long 0x00 "GICC_NSAPR1,Non-Secure Active Priorities Register 1"
group.long 0xE8++0x03
line.long 0x00 "GICC_NSAPR2,Non-Secure Active Priorities Register 2"
group.long 0xEC++0x03
line.long 0x00 "GICC_NSAPR3,Non-Secure Active Priorities Register 3"
rgroup.long 0xFC++0x03
line.long 0x00 "GICC_IIDR,CPU Interface Identification Register"
hexmask.long.word 0x00 20.--31. 1. " PRODID   ,Product ID"
bitfld.long 0x00 16.--19. "          ARCHVER ,The version of the GIC architecture that is implemented" ",,,GICv3,?..."
bitfld.long 0x00 12.--15. "         REV  ,Revision number for the CPU interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "            IMP ,Implementer"
wgroup.long 0x1000++0x03
line.long 0x00 "GICC_DIR,Deactivate Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
tree.end
width 0x0b
endif
sif COMP.AVAILABLE("GICH")
base COMP.BASE("GICH",-1.)
width 13.
tree "Virtual CPU Control Interface"
group.long 0x00++0x03
line.long 0x00 "GICH_HCR,Hypervisor Control Register"
bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 7. "             VGRP1DIE ,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 6. "      VGRP1EIE ,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "             VGRP0DIE ,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 4. " VGRP0EIE ,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "       NPIE     ,No Pending Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "      LRENPIE  ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "             UIE      ,Underflow Interrupt Enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. " EN       ,Virtual CPU interface Enable" "Disabled,Enabled"
rgroup.long 0x04++0x03
line.long 0x00 "GICH_VTR,Virtual Type Register"
bitfld.long 0x00 29.--31. " PRIBITS  ,Number of priority bits" "1,2,3,4,5,6,7,8"
bitfld.long 0x00 26.--28. "              PREBITS  ,Number of pre-emption bits" "1,2,3,4,5,6,7,8"
bitfld.long 0x00 23.--25. "             IDBITS   ,The number of virtual interrupt identifier bits supported" "16 bits,24 bits,?..."
textline "                      "
bitfld.long 0x00 22. " SEIS     ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not supported,Supported"
bitfld.long 0x00 21. "  A3V      ,Affinity 3 valid" "Invalid,Valid"
bitfld.long 0x00 0.--4. "       LISTREGS ,List regs number" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
group.long 0x08++0x03
line.long 0x00 "GICH_VMCR,Virtual Machine Control Register"
hexmask.long.byte 0x00 24.--31. 1. " VPMR     ,Virtual priority mask"
bitfld.long 0x00 21.--23. "             VBPR0    ,Defines the point at which the priority value fields split into two parts the group priority field and the subpriority field (group 0)" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--20. "             VBPR1    ,Defines the point at which the priority value fields split into two parts the group priority field and the subpriority field (group 1)" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 9. "                    VEOIM    ,Virtual EOImode. DP - Drop the priority / ID - interrupt deactivate" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
textline "                      "
bitfld.long 0x00 4. " VCBPR    ,Virtual Common Binary Point Register" "ABPR,BPR"
bitfld.long 0x00 3. "           VFIQEN   ,Virtual FIQ enable" "Disabled,Enabled"
bitfld.long 0x00 2. "      VACKCTL  ,Virtual AckCtl" "INTID=1022,INTID=corresponding"
bitfld.long 0x00 1. "  VENG1    ,Virtual interrupt enable for group 1" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. " VENG0    ,Virtual interrupt enable for group 0" "Disabled,Enabled"
rgroup.long 0x10++0x03
line.long 0x00 "GICH_MISR,Maintenance Interrupt Status Register"
bitfld.long 0x00 7. " VGRP1D   ,vPE Group 1 Disabled maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 6. "   VGRP1E   ,vPE Group 1 Enabled maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 5. "  VGRP0D   ,vPE Group 0 Disabled maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 4. "         VGRP0E   ,vPE Group 0 Enabled maintenance interrupt assertion" "Not asserted,Asserted"
textline "                      "
bitfld.long 0x00 3. " NP       ,No Pending maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 2. "   LRENP    ,List Register Entry Not Present maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 1. "  U        ,Underflow maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 0. "         EOI      ,End Of Interrupt maintenance interrupt assertion" "Not asserted,Asserted"
rgroup.long 0x20++0x03
line.long 0x00 "GICH_EISR0,End of Interrupt Status Register"
bitfld.long 0x00 15. " STATUS15 ,EOI maintenance interrupt status for List register 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "   STATUS14 ,EOI maintenance interrupt status for List register 14" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  STATUS13 ,EOI maintenance interrupt status for List register 13" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 12. " STATUS12 ,EOI maintenance interrupt status for List register 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "   STATUS11 ,EOI maintenance interrupt status for List register 11" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  STATUS10 ,EOI maintenance interrupt status for List register 10" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 9. " STATUS9  ,EOI maintenance interrupt status for List register 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "   STATUS8  ,EOI maintenance interrupt status for List register 8" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  STATUS7  ,EOI maintenance interrupt status for List register 7" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 6. " STATUS6  ,EOI maintenance interrupt status for List register 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "   STATUS5  ,EOI maintenance interrupt status for List register 5" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  STATUS4  ,EOI maintenance interrupt status for List register 4" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 3. " STATUS3  ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "   STATUS2  ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  STATUS1  ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 0. " STATUS0  ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt"
rgroup.long 0x30++0x03
line.long 0x00 "GICH_ELRSR0,Empty List register Status Register"
bitfld.long 0x00 15. " STATUS15 ,Status bit for List register 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "   STATUS14 ,Status bit for List register 14" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  STATUS13 ,Status bit for List register 13" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 12. " STATUS12 ,Status bit for List register 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "   STATUS11 ,Status bit for List register 11" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  STATUS10 ,Status bit for List register 10" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 9. " STATUS9  ,Status bit for List register 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "   STATUS8  ,Status bit for List register 8" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  STATUS7  ,Status bit for List register 7" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 6. " STATUS6  ,Status bit for List register 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "   STATUS5  ,Status bit for List register 5" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  STATUS4  ,Status bit for List register 4" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 3. " STATUS3  ,Status bit for List register 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "   STATUS2  ,Status bit for List register 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  STATUS1  ,Status bit for List register 1" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 0. " STATUS0  ,Status bit for List register 0" "No interrupt,Interrupt"
textline "                      "
group.long 0xF0++0x03
line.long 0x00 "GICH_APR0,Active Priorities Register 0"
bitfld.long 0x00 31. "  P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "  P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "  P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "  P28 ,Active Priority 28" "0,1"
textline "                       "
bitfld.long 0x00 27. " P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "  P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "  P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "  P24 ,Active Priority 24" "0,1"
textline "                       "
bitfld.long 0x00 23. " P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "  P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "  P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "  P20 ,Active Priority 20" "0,1"
textline "                       "
bitfld.long 0x00 19. " P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "  P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "  P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "  P16 ,Active Priority 16" "0,1"
textline "                       "
bitfld.long 0x00 15. " P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "  P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "  P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "  P12 ,Active Priority 12" "0,1"
textline "                       "
bitfld.long 0x00 11. " P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "  P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "  P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "  P8  ,Active Priority 8" "0,1"
textline "                       "
bitfld.long 0x00 7. " P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "  P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "  P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "  P4  ,Active Priority 4" "0,1"
textline "                       "
bitfld.long 0x00 3. " P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "  P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "  P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "  P0  ,Active Priority 0" "0,1"
group.long 0xF4++0x03
line.long 0x00 "GICH_APR1,Active Priorities Register 1"
bitfld.long 0x00 31. "  P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "  P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "  P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "  P28 ,Active Priority 28" "0,1"
textline "                       "
bitfld.long 0x00 27. " P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "  P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "  P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "  P24 ,Active Priority 24" "0,1"
textline "                       "
bitfld.long 0x00 23. " P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "  P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "  P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "  P20 ,Active Priority 20" "0,1"
textline "                       "
bitfld.long 0x00 19. " P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "  P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "  P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "  P16 ,Active Priority 16" "0,1"
textline "                       "
bitfld.long 0x00 15. " P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "  P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "  P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "  P12 ,Active Priority 12" "0,1"
textline "                       "
bitfld.long 0x00 11. " P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "  P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "  P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "  P8  ,Active Priority 8" "0,1"
textline "                       "
bitfld.long 0x00 7. " P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "  P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "  P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "  P4  ,Active Priority 4" "0,1"
textline "                       "
bitfld.long 0x00 3. " P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "  P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "  P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "  P0  ,Active Priority 0" "0,1"
group.long 0xF8++0x03
line.long 0x00 "GICH_APR2,Active Priorities Register 2"
bitfld.long 0x00 31. "  P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "  P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "  P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "  P28 ,Active Priority 28" "0,1"
textline "                       "
bitfld.long 0x00 27. " P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "  P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "  P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "  P24 ,Active Priority 24" "0,1"
textline "                       "
bitfld.long 0x00 23. " P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "  P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "  P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "  P20 ,Active Priority 20" "0,1"
textline "                       "
bitfld.long 0x00 19. " P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "  P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "  P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "  P16 ,Active Priority 16" "0,1"
textline "                       "
bitfld.long 0x00 15. " P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "  P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "  P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "  P12 ,Active Priority 12" "0,1"
textline "                       "
bitfld.long 0x00 11. " P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "  P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "  P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "  P8  ,Active Priority 8" "0,1"
textline "                       "
bitfld.long 0x00 7. " P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "  P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "  P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "  P4  ,Active Priority 4" "0,1"
textline "                       "
bitfld.long 0x00 3. " P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "  P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "  P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "  P0  ,Active Priority 0" "0,1"
group.long 0xFC++0x03
line.long 0x00 "GICH_APR3,Active Priorities Register 3"
bitfld.long 0x00 31. "  P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "  P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "  P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "  P28 ,Active Priority 28" "0,1"
textline "                       "
bitfld.long 0x00 27. " P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "  P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "  P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "  P24 ,Active Priority 24" "0,1"
textline "                       "
bitfld.long 0x00 23. " P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "  P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "  P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "  P20 ,Active Priority 20" "0,1"
textline "                       "
bitfld.long 0x00 19. " P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "  P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "  P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "  P16 ,Active Priority 16" "0,1"
textline "                       "
bitfld.long 0x00 15. " P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "  P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "  P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "  P12 ,Active Priority 12" "0,1"
textline "                       "
bitfld.long 0x00 11. " P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "  P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "  P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "  P8  ,Active Priority 8" "0,1"
textline "                       "
bitfld.long 0x00 7. " P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "  P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "  P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "  P4  ,Active Priority 4" "0,1"
textline "                       "
bitfld.long 0x00 3. " P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "  P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "  P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "  P0  ,Active Priority 0" "0,1"
textline "                       "
group.long 0x100++0x03
line.long 0x00 "GICH_LR0,List Register 0"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x104++0x03
line.long 0x00 "GICH_LR1,List Register 1"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x108++0x03
line.long 0x00 "GICH_LR2,List Register 2"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x10C++0x03
line.long 0x00 "GICH_LR3,List Register 3"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x110++0x03
line.long 0x00 "GICH_LR4,List Register 4"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x114++0x03
line.long 0x00 "GICH_LR5,List Register 5"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x118++0x03
line.long 0x00 "GICH_LR6,List Register 6"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x11C++0x03
line.long 0x00 "GICH_LR7,List Register 7"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x120++0x03
line.long 0x00 "GICH_LR8,List Register 8"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x124++0x03
line.long 0x00 "GICH_LR9,List Register 9"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x128++0x03
line.long 0x00 "GICH_LR10,List Register 10"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x12C++0x03
line.long 0x00 "GICH_LR11,List Register 11"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x130++0x03
line.long 0x00 "GICH_LR12,List Register 12"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x134++0x03
line.long 0x00 "GICH_LR13,List Register 13"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x138++0x03
line.long 0x00 "GICH_LR14,List Register 14"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
tree.end
width 0x0b
endif
sif COMP.AVAILABLE("GICV")
base COMP.BASE("GICV",-1.)
width 14.
tree "Virtual CPU Interface"
group.long 0x00++0x03
line.long 0x00 "GICV_CTLR,VM Control Register"
bitfld.long 0x00 9. " EOIMODE    ,Controls the behaviour of Non-secure accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 4. "  CBPR       ,Controls whether GICV_BPR affects both Group 0 and Group 1 interrupts" "Group 0,Both"
bitfld.long 0x00 3. "       FIQEN ,FIQ Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "      ACKCTL ,Acknowledge control. Return ID of the corresponding interrupt" "1022,Corresponding"
textline "                      "
bitfld.long 0x00 1. "  ENABLEGRP1 ,Enables the signalling of Group 1 interrupts by the CPU interface to the virtual machine" "Disabled,Enabled"
bitfld.long 0x00 0. "              ENABLEGRP0 ,Enables the signalling of Group 0 interrupts by the CPU interface to the virtual machine" "Disabled,Enabled"
group.long 0x04++0x03
line.long 0x00 "GICV_PMR,VM Priority Mask Register"
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY   ,Priority mask level for the virtual CPU interface"
group.long 0x08++0x03
line.long 0x00 "GICV_BPR,VM Binary Point Register"
bitfld.long 0x00 0.--2. " BP         ,Binary point" "0,1,2,3,4,5,6,7"
rgroup.long 0x0C++0x03
line.long 0x00 "GICV_IAR,VM Interrupt Acknowledge Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
wgroup.long 0x10++0x03
line.long 0x00 "GICV_EOIR,VM End Of Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
rgroup.long 0x14++0x03
line.long 0x00 "GICV_RPR,VM Running Priority Register"
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY   ,Priority value of highest priority interrupt"
rgroup.long 0x18++0x03
line.long 0x00 "GICV_HPPIR,VM Highest Priority Pending Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
group.long 0x1C++0x03
line.long 0x00 "GICV_ABPR,VM Aliased Binary Point Register"
bitfld.long 0x00 0.--2. " BP         ,Binary point" "0,1,2,3,4,5,6,7"
rgroup.long 0x20++0x03
line.long 0x00 "GICV_AIAR,VM Aliased Interrupt Acknowledge Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
wgroup.long 0x24++0x03
line.long 0x00 "GICV_AEOIR,VM Aliased End of Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
rgroup.long 0x28++0x03
line.long 0x00 "GICV_AHPPIR,VM Aliased Highest Priority Pending Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
textline ""
group.long 0xD0++0x03
line.long 0x00 "GICV_APR0,VM Active Priority Register 0"
bitfld.long 0x00 31. " P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "   P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "   P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "   P28 ,Active Priority 28" "0,1"
textline "                      "
bitfld.long 0x00 27. "  P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "   P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "   P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "   P24 ,Active Priority 24" "0,1"
textline "                      "
bitfld.long 0x00 23. "  P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "   P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "   P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "   P20 ,Active Priority 20" "0,1"
textline "                      "
bitfld.long 0x00 19. "  P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "   P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "   P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "   P16 ,Active Priority 16" "0,1"
textline "                      "
bitfld.long 0x00 15. "  P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "   P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "   P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "   P12 ,Active Priority 12" "0,1"
textline "                      "
bitfld.long 0x00 11. "  P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "   P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "   P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "   P8  ,Active Priority 8" "0,1"
textline "                      "
bitfld.long 0x00 7. "  P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "   P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "   P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "   P4  ,Active Priority 4" "0,1"
textline "                      "
bitfld.long 0x00 3. "  P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "   P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "   P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "   P0  ,Active Priority 0" "0,1"
group.long 0xD4++0x03
line.long 0x00 "GICV_APR1,VM Active Priority Register 1"
bitfld.long 0x00 31. " P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "   P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "   P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "   P28 ,Active Priority 28" "0,1"
textline "                      "
bitfld.long 0x00 27. "  P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "   P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "   P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "   P24 ,Active Priority 24" "0,1"
textline "                      "
bitfld.long 0x00 23. "  P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "   P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "   P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "   P20 ,Active Priority 20" "0,1"
textline "                      "
bitfld.long 0x00 19. "  P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "   P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "   P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "   P16 ,Active Priority 16" "0,1"
textline "                      "
bitfld.long 0x00 15. "  P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "   P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "   P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "   P12 ,Active Priority 12" "0,1"
textline "                      "
bitfld.long 0x00 11. "  P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "   P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "   P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "   P8  ,Active Priority 8" "0,1"
textline "                      "
bitfld.long 0x00 7. "  P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "   P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "   P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "   P4  ,Active Priority 4" "0,1"
textline "                      "
bitfld.long 0x00 3. "  P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "   P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "   P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "   P0  ,Active Priority 0" "0,1"
group.long 0xD8++0x03
line.long 0x00 "GICV_APR2,VM Active Priority Register 2"
bitfld.long 0x00 31. " P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "   P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "   P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "   P28 ,Active Priority 28" "0,1"
textline "                      "
bitfld.long 0x00 27. "  P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "   P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "   P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "   P24 ,Active Priority 24" "0,1"
textline "                      "
bitfld.long 0x00 23. "  P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "   P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "   P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "   P20 ,Active Priority 20" "0,1"
textline "                      "
bitfld.long 0x00 19. "  P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "   P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "   P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "   P16 ,Active Priority 16" "0,1"
textline "                      "
bitfld.long 0x00 15. "  P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "   P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "   P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "   P12 ,Active Priority 12" "0,1"
textline "                      "
bitfld.long 0x00 11. "  P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "   P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "   P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "   P8  ,Active Priority 8" "0,1"
textline "                      "
bitfld.long 0x00 7. "  P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "   P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "   P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "   P4  ,Active Priority 4" "0,1"
textline "                      "
bitfld.long 0x00 3. "  P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "   P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "   P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "   P0  ,Active Priority 0" "0,1"
group.long 0xDC++0x03
line.long 0x00 "GICV_APR3,VM Active Priority Register 3"
bitfld.long 0x00 31. " P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "   P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "   P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "   P28 ,Active Priority 28" "0,1"
textline "                      "
bitfld.long 0x00 27. "  P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "   P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "   P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "   P24 ,Active Priority 24" "0,1"
textline "                      "
bitfld.long 0x00 23. "  P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "   P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "   P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "   P20 ,Active Priority 20" "0,1"
textline "                      "
bitfld.long 0x00 19. "  P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "   P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "   P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "   P16 ,Active Priority 16" "0,1"
textline "                      "
bitfld.long 0x00 15. "  P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "   P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "   P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "   P12 ,Active Priority 12" "0,1"
textline "                      "
bitfld.long 0x00 11. "  P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "   P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "   P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "   P8  ,Active Priority 8" "0,1"
textline "                      "
bitfld.long 0x00 7. "  P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "   P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "   P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "   P4  ,Active Priority 4" "0,1"
textline "                      "
bitfld.long 0x00 3. "  P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "   P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "   P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "   P0  ,Active Priority 0" "0,1"
textline "                      "
rgroup.long 0xFC++0x03
line.long 0x00 "GICV_IIDR,Virtual Machine CPU Interface Identification Register"
hexmask.long.word 0x00 20.--31. 1. " PRODID     ,Product ID"
bitfld.long 0x00 16.--19. "    ARCHVER ,The version of the GIC architecture that is implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "  REV ,Revision number for the CPU interface" ",,,GICv3,?..."
hexmask.long.word 0x00 0.--11. 1. "  IMP ,Implementer"
wgroup.long 0x1000++0x03
line.long 0x00 "GICV_DIR,VM Deactivate Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
tree.end
width 0x0b
endif
width 0x0B
AUTOINDENT.POP
tree.end
tree.end
endif
tree "ADG (Audio Clock Generator)"
base ad:0xEC5A0000
group.long 0x0++0xF
line.long 0x0 "BRRA,Function: BRRA is a 32-bit readable/writable register that specifies the baud rate for ACLK_A (see table 83.3)."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 8.--9. "CKS_1_0,These bits specify the clock source for the on-chip baud rate generator." "0: ACLK_A,1: ACLK_A/4,2: ACLK_A/16,3: ACLK_A/64"
hexmask.long.byte 0x0 0.--7. 1. "BRRA_7_0,These bits specify the division ratio."
line.long 0x4 "BRRB,Function: BRRB is a 32-bit readable/writable register that specifies the baud rate for ACLK_B (see table 83.4)."
hexmask.long.tbyte 0x4 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x4 8.--9. "CKS_1_0,These bits specify the clock source for the on-chip baud rate generator." "0: ACLK_B,1: ACLK_B/4,2: ACLK_B/16,3: ACLK_B/64"
hexmask.long.byte 0x4 0.--7. 1. "BRRB_7_0,These bits specify the division ratio."
line.long 0x8 "BRGCKR,Function: BRGCKR selects the clocks input to and output from the ADG."
bitfld.long 0x8 31. "BRGCKR_31,This bit selects the clock signal output to the AUDIO_CLKOUT or external pin." "0: BRGA output clock,1: BRGB output clock"
hexmask.long.byte 0x8 23.--30. 1. "Reserved_23,Reserved"
hexmask.long.tbyte 0x8 0.--22. 1. "Reserved_0,Reserved"
line.long 0xC "AUDIO_CLK_SEL0,Function: AUDIO_CLK_SEL0 selects the clocks for the SSIU (for SSI0)."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0xC 6.--7. "DIVSEL_SSI0_1_0,SSI0 Frequency Divider Select" "0: Not divided,1: Divided by 2,2: Divided by 4,3: Divided by 8"
bitfld.long 0xC 4.--5. "ACLK_SEL_SSI0_1_0,SSI0 Clock Select" "0: DIVCLK,1: BRGA output clock,2: BRGB output clock,?"
newline
bitfld.long 0xC 3. "DIVSEL2_SSI0,See Bit Description of DIVSEL_SSI0[1:0]" "0,1"
bitfld.long 0xC 0.--2. "DIVCLK_SEL_SSI0_2_0,SSI0 Clock Select" "0: Fixed at 0,1: AUDIO_CLKIN,?,?,?,?,?,?"
tree.end
tree "APMU (Advanced Power Management Unit)"
base ad:0x0
tree "APMU_0"
base ad:0xE6170000
group.long 0x0++0x7
line.long 0x0 "WPCR0,This register is 32-bit readable/writable register. This register doesnsingle_quotationt belong to any Group. This register controls write protect function. This register is implemented one for each Domain."
hexmask.long.word 0x0 16.--31. 1. "Code_Value,Code Value"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "WPE,Write Protect Enable. The possible values are following." "0: Write protect is disabled,1: Write protect is enabled"
line.long 0x4 "WPR0,These registers are 32-bit readable/writable registers. This register doesnsingle_quotationt belong to any Group. This register controls write protect function. This register is implemented one for each Domain."
hexmask.long 0x4 0.--31. 1. "WPRTCT_31_0,If Write Protect is enabled  inverted values need to be set to this field before write access."
group.long 0x10++0x3
line.long 0x0 "D0ACCENR,This register is a 32-bit readable/writable register. This register doesnsingle_quotationt belong to any Group. This register controls access protect function. This register can be accessed by only Domain 0."
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
bitfld.long 0x0 23. "ADMNGRP3,Register protection for Group3 of admin registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 22. "ADMNGRP2,Register protection for Group2 of admin registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 21. "ADMNGRP1,Register protection for Group1 of admin registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 20. "ADMNGRP0,Register protection for Group0 of admin registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 19. "RTGRP3,Register protection for Group3 of CR52's registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 18. "RTGRP2,Register protection for Group2 of CR52single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 17. "RTGRP1,Register protection for Group1 of CR52single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 16. "RTGRP0,Register protection for Group0 of CR52single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
newline
rbitfld.long 0x0 14. "Reserved_14,Reserved" "0,1"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
newline
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
rbitfld.long 0x0 10. "Reserved_10,Reserved" "0,1"
newline
rbitfld.long 0x0 9. "Reserved_9,Reserved" "0,1"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "CL1GRP3,Register protection for Group3 of Cortex-A76 cluster 1single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 6. "CL1GRP2,Register protection for Group2 of Cortex-A76 cluster 1single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 5. "CL1GRP1,Register protection for Group1 of Cortex-A76 cluster 1single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 4. "CL1GRP0,Register protection for Group0 of Cortex-A76 cluster 1single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 3. "CL0GRP3,Register protection for Group3 of Cortex-A76 cluster 0single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 2. "CL0GRP2,Register protection for Group2 of Cortex-A76 cluster 0single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 1. "CL0GRP1,Register protection for Group1 of Cortex-A76 cluster 0single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 0. "CL0GRP0,Register protection for Group0 of Cortex-A76 cluster 0single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
group.long 0x20++0x3
line.long 0x0 "PTCSR0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls access protect function and holds information of access protection."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "ERR,Indicates whether access error has occurred." "0: error has not occurred,1: error has occurred"
rgroup.long 0x24++0x3
line.long 0x0 "PTERADR0,This register is a 32-bit readable register. This register belongs to Group1. This register holds information of access protection."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "ADDR_15_0,Indicate address causing access error."
group.long 0x28++0x3
line.long 0x0 "DCLSEIJTR0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls error injection for APMU DCLS error."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "EIJT,Error Injection enable. The possible values are:" "0: error injection is not active,1: error injection is active"
group.long 0x40++0x3
line.long 0x0 "A3PWRCTRL00,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls A3 power domain."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "A3_PDN_EN,Power down enable for A3 power domain. The possible values are following" "0: A3 power domain cannot be powered down,1: A3 power domain is powered down if all A1 and A2.."
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x48++0x3
line.long 0x0 "A3FSMSTSR00,This register is a 32-bit readable register. This register belongs to Group2. This register indicates A3 FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0x50++0x3
line.long 0x0 "A3FSMLOCKR00,This register is a 32-bit readable/writable register. This register belongs to Group2.This register controls a safety mechanism of FSM for A3 power domain."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
newline
rbitfld.long 0x0 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
hexmask.long.byte 0x0 5.--10. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
rgroup.long 0x58++0x7
line.long 0x0 "INTSTSR0,This register is a 32-bit readable register. This register belongs to Group2.This register indicates a factor of interrupt request signal."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x0 16. "A2C0_INT,Indicate whether each A2 domain FSM for Cortex-A76 cluster 0 issues interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
newline
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x0 3. "A1C3_INT,Indicate whether each A1 domain FSM issues for Cortex-A76 core 3 interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
newline
bitfld.long 0x0 2. "A1C2_INT,Indicate whether each A1 domain FSM issues for Cortex-A76 core 2 interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
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bitfld.long 0x0 1. "A1C1_INT,Indicate whether each A1 domain FSM issues for Cortex-A76 core 1 interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
newline
bitfld.long 0x0 0. "A1C0_INT,Indicate whether each A1 domain FSM issues for Cortex-A76 core 0 interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
line.long 0x4 "ERRSTSR0,This register is a 32-bit readable register. This register belongs to Group2.This register indicates whether each FSM finds fault."
bitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
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bitfld.long 0x4 30. "CR52_ERR2,Indicates whether error flag is set in FSMLOCKRCR522. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 29. "CR52_ERR1,Indicates whether error flag is set in FSMLOCKRCR521. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 28. "CR52_ERR0,Indicates whether error flag is set in FSMLOCKRCR520. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 25.--27. "Reserved_25,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 24. "A3S0_ERR,Indicates whether error flag is set in A3FSMLOCKRx. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x4 16. "A2S0_ERR,Indicates whether error flag is set in FSMLOCKRCL0. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
hexmask.long.word 0x4 4.--15. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x4 3. "A1C3_ERR,Indicates whether error flag is set in FSMLOCKRC3. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 2. "A1C2_ERR,Indicates whether error flag is set in FSMLOCKRC2. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 1. "A1C1_ERR,Indicates whether error flag is set in FSMLOCKRC1. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 0. "A1C0_ERR,Indicates whether error flag is set in FSMLOCKRC0. Permitted values are following." "0: Error is not detected,1: Error is detected"
group.long 0x60++0x3
line.long 0x0 "FRSTR0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register control forced reset function."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
newline
rbitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x0 16. "FRSTRCL0,Forced reset request for each Cortex-A76 cluster 0.The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
newline
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x0 3. "FRSTRC3,Forced reset request for each Cortex-A76 core 3. The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
newline
bitfld.long 0x0 2. "FRSTRC2,Forced reset request for each Cortex-A76 core 2. The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
newline
bitfld.long 0x0 1. "FRSTRC1,Forced reset request for each Cortex-A76 core 1. The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
newline
bitfld.long 0x0 0. "FRSTRC0,Forced reset request for each Cortex-A76 core 0. The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
group.long 0x68++0x3
line.long 0x0 "FRSTCTRL0,"
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
newline
bitfld.long 0x0 30. "FRST_MOD_DBG,Forced reset modification in debug mode. The possible values are following." "0: All reset signals are asserted by forced reset..,1: Only warm reset of Cortex-A76 is asserted by.."
newline
bitfld.long 0x0 29. "CLKPAUSE_EN,Clock pause enable when Cortex-A76 reset is asserting. The possible values are following." "0: Clock pause is disabled when Cortex-A76 reset is..,1: Clock pause is enabled when Cortex-A76 reset is.."
newline
rbitfld.long 0x0 27.--28. "Reserved_27,Reserved" "0,1,2,3"
newline
hexmask.long 0x0 0.--26. 1. "Reserved_0,Reserved"
group.long 0x80++0x7
line.long 0x0 "PADDCHKSTSR0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register holds error information detected by Safety mechanism for APB bus interface."
bitfld.long 0x0 31. "PADD_CHK_SID_CLR,PADD_CHK_SID clear bit. PADD_CHK_SID is cleared by writing 1 to this bit." "0,1"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "PADD_CHK_SID_7_0,Indicates Source ID of fault transaction detected PADD_CHK mechanism."
line.long 0x4 "PWDATACHKSTSR0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register holds error information detected by Safety mechanism for APB bus interface."
bitfld.long 0x4 31. "PWDATA_CHK_SID_CLR,PWDATA_CHK_SID clear bit. PWDATA_CHK_SID is cleared by writing 1 to this bit." "0,1"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "PWDATA_CHK_SID_7_0,Indicates Source ID of fault transaction detected PWDATA_CHK mechanism."
group.long 0x300++0x17
line.long 0x0 "CR52CR00,This register is a 32-bit readable/writable register. This register belongs to Group0. This register controls configuration of Cortex-R52."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
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bitfld.long 0x0 30. "NCPUHALT,NCPUHALT means inverted value of CPUHALT defined in Cortex-R52 TRM. The possible values are following." "0: Processor halt after reset,1: No processor halt after reset"
newline
bitfld.long 0x0 29. "CFGRAMPROTEN,CFGRAMPROTEN defined in Cortex-R52 TRM. The possible values are following." "0: RAM memory protection is disabled out of reset,1: RAM memory protection is enabled out of reset"
newline
bitfld.long 0x0 28. "CFGTCMBOOT,CFGTCMBOOT defined in Cortex-R52 TRM. The possible values are following." "0: ATCM is disabled out of reset,1: ATCM is enabled and at address 0x0 out of reset"
newline
bitfld.long 0x0 27. "CFGINITREG,CFGINITREG defined in Cortex-R52 TRM. The possible values are following." "0: Program-visible registers are not initialized to..,1: Program-visible registers are initialized to.."
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bitfld.long 0x0 26. "CFGL1CACHEINVDIS0,CFGL1CACHEINVDIS defined in Cortex-R52 TRM. The possible values are following." "0: Automatic post-reset L1 cache invalidate is..,1: Automatic post-reset L1 cache invalidate is.."
newline
hexmask.long 0x0 0.--25. 1. "Reserved_0,Reserved"
line.long 0x4 "CR52RSTCTRL00,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls reset operation for Cortex-R52."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
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bitfld.long 0x4 0. "CR52RST,Cortex-R52 reset. Indicates Cortex-R52 reset status. The initial value depends on Mode PIN configuration. Permitted values are following." "0: All Cortex-R52 resets are negated,1: All Cortex-R52 resets are asserted"
line.long 0x8 "CR52PWRCTRL00,"
hexmask.long.word 0x8 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x8 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x8 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x8 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x8 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
line.long 0xC "FSMLOCKRCR5200,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-R52 reset control."
hexmask.long.word 0xC 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
newline
rbitfld.long 0xC 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0xC 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0xC 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
hexmask.long.byte 0xC 5.--10. 1. "Reserved_5,Reserved"
newline
bitfld.long 0xC 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
rbitfld.long 0xC 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x10 "PDENYSTSRCLCR5200,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long 0x10 6.--31. 1. "Reserved_6,Reserved"
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bitfld.long 0x10 5. "DNY_ON_DBGLOW,Indicates whether a denied state transition has occurred by power mode transition from ON mode to Debug over LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x10 4. "DNY_DBGLOW_ON,Indicates whether a denied state transition has occurred by power mode transition from Debug over LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x10 3. "DNY_ON_LOWPOWER,Indicates whether a denied state transition has occurred by power mode transition from ON mode to LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x10 2. "DNY_LOWPOWER_ON,Indicates whether a denied state transition has occurred by power mode transition from LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x10 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x10 0. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
line.long 0x14 "PDENYINTRCLCR5200,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long 0x14 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x14 5. "INT_ON_DBGLOW,Issuing interrupt enable by DNY_ON_DBGLOW. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x14 4. "INT_DBGLOW_ON,Issuing interrupt enable by DNY_DBGLOW_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x14 3. "INT_ON_LOWPOWER,Issuing interrupt enable by DNY_ON_LOWPOWER. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x14 2. "INT_LOWPOWER_ON,Issuing interrupt enable by DNY_LOWPOWER_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x14 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x14 0. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
rgroup.long 0x318++0x3
line.long 0x0 "FSMSTSRCR5200,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-R52 FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
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hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-R52 FSM. The permitted values are following."
group.long 0x31C++0x3
line.long 0x0 "G2GPRCR5200,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
group.long 0x328++0x2F
line.long 0x0 "CR52CMPEN00,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls Cortex-R52 DCLS comparator. When NSRCMPEN is set to 1. Realtime Core detects the toggles of non-safety related operations and/or.."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "NSRCMPEN,Non-safety- related comparator enable. The possible values are following." "0: Comparator for Non-safety-related signals is..,1: Comparator for Non-safety-related signals is.."
newline
bitfld.long 0x0 0. "CMPEN,Comparator enables. The possible values are following." "0: Comparator is disabled,1: Comparator is enabled"
line.long 0x4 "GCNTERRENCR5200,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety mechanism between Generic Counter and Cortex-R52."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "GCNTERREN,Generic Counter error detection enable. The possible values are following." "0: Error detection is disabled,1: Error detection is enabled"
line.long 0x8 "CR52RVBAR00,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x8 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
newline
hexmask.long.byte 0x8 0.--4. 1. "Reserved_0,Reserved"
line.long 0xC "CR52BAR00,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR. After completing the setting of RBAR with BAREN = 0..."
hexmask.long.word 0xC 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
newline
hexmask.long.word 0xC 5.--17. 1. "Reserved_5,Reserved"
newline
bitfld.long 0xC 4. "BAREN,BAR enables. The possible values are:" "0,1"
newline
rbitfld.long 0xC 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
rbitfld.long 0xC 0.--1. "BTMD_1_0,Boot Mode. Indicates boot area of Cortex-R52. Permitted values are following." "0: RBAR is assigned for boot address,?,?,?"
line.long 0x10 "CR52RVBARP00,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x10 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
newline
hexmask.long.byte 0x10 1.--4. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x10 0. "VLD,CR52RVBARP valid. The possible values are following." "0: CR52RVBAR is used to define CFGVECTABLE for..,1: CR52RVBARP is used to define CFGVECTABLE for.."
line.long 0x14 "CR52BARP00,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR and VLD. After completing the setting of RBAR and VLD.."
hexmask.long.word 0x14 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
newline
hexmask.long.word 0x14 5.--17. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x14 4. "BAREN,BAR enables. The possible values are following." "0: RBAR is not valid,1: RBAR is valid"
newline
rbitfld.long 0x14 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x14 0. "VLD,CR52BARP valid. The possible values are following." "0: CR52BAR is used to define Boot Address of..,1: CR52BARP is used to define Boot Address of.."
line.long 0x18 "CR52CR10,This register is a 32-bit readable/writable register. This register belongs to Group0. This register controls configuration of Cortex-R52."
rbitfld.long 0x18 31. "Reserved_31,Reserved" "0,1"
newline
bitfld.long 0x18 30. "NCPUHALT,NCPUHALT means inverted value of CPUHALT defined in Cortex-R52 TRM. The possible values are following." "0: Processor halt after reset,1: No processor halt after reset"
newline
bitfld.long 0x18 29. "CFGRAMPROTEN,CFGRAMPROTEN defined in Cortex-R52 TRM. The possible values are following." "0: RAM memory protection is disabled out of reset,1: RAM memory protection is enabled out of reset"
newline
bitfld.long 0x18 28. "CFGTCMBOOT,CFGTCMBOOT defined in Cortex-R52 TRM. The possible values are following." "0: ATCM is disabled out of reset,1: ATCM is enabled and at address 0x0 out of reset"
newline
bitfld.long 0x18 27. "CFGINITREG,CFGINITREG defined in Cortex-R52 TRM. The possible values are following." "0: Program-visible registers are not initialized to..,1: Program-visible registers are initialized to.."
newline
bitfld.long 0x18 26. "CFGL1CACHEINVDIS0,CFGL1CACHEINVDIS defined in Cortex-R52 TRM. The possible values are following." "0: Automatic post-reset L1 cache invalidate is..,1: Automatic post-reset L1 cache invalidate is.."
newline
hexmask.long 0x18 0.--25. 1. "Reserved_0,Reserved"
line.long 0x1C "CR52RSTCTRL10,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls reset operation for Cortex-R52."
hexmask.long 0x1C 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x1C 0. "CR52RST,Cortex-R52 reset. Indicates Cortex-R52 reset status. The initial value depends on Mode PIN configuration. Permitted values are following." "0: All Cortex-R52 resets are negated,1: All Cortex-R52 resets are asserted"
line.long 0x20 "CR52PWRCTRL10,"
hexmask.long.word 0x20 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x20 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x20 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x20 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x20 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
line.long 0x24 "FSMLOCKRCR5210,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-R52 reset control."
hexmask.long.word 0x24 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
newline
rbitfld.long 0x24 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x24 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x24 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
hexmask.long.byte 0x24 5.--10. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x24 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
rbitfld.long 0x24 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x24 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x28 "PDENYSTSRCLCR5210,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long 0x28 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x28 5. "DNY_ON_DBGLOW,Indicates whether a denied state transition has occurred by power mode transition from ON mode to Debug over LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x28 4. "DNY_DBGLOW_ON,Indicates whether a denied state transition has occurred by power mode transition from Debug over LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x28 3. "DNY_ON_LOWPOWER,Indicates whether a denied state transition has occurred by power mode transition from ON mode to LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x28 2. "DNY_LOWPOWER_ON,Indicates whether a denied state transition has occurred by power mode transition from LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x28 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x28 0. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
line.long 0x2C "PDENYINTRCLCR5210,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long 0x2C 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x2C 5. "INT_ON_DBGLOW,Issuing interrupt enable by DNY_ON_DBGLOW. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x2C 4. "INT_DBGLOW_ON,Issuing interrupt enable by DNY_DBGLOW_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x2C 3. "INT_ON_LOWPOWER,Issuing interrupt enable by DNY_ON_LOWPOWER. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x2C 2. "INT_LOWPOWER_ON,Issuing interrupt enable by DNY_LOWPOWER_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x2C 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x2C 0. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
rgroup.long 0x358++0x3
line.long 0x0 "FSMSTSRCR5210,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-R52 FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-R52 FSM. The permitted values are following."
group.long 0x35C++0x3
line.long 0x0 "G2GPRCR5210,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
group.long 0x368++0x2F
line.long 0x0 "CR52CMPEN10,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls Cortex-R52 DCLS comparator. When NSRCMPEN is set to 1. Realtime Core detects the toggles of non-safety related operations and/or.."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "NSRCMPEN,Non-safety- related comparator enable. The possible values are following." "0: Comparator for Non-safety-related signals is..,1: Comparator for Non-safety-related signals is.."
newline
bitfld.long 0x0 0. "CMPEN,Comparator enables. The possible values are following." "0: Comparator is disabled,1: Comparator is enabled"
line.long 0x4 "GCNTERRENCR5210,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety mechanism between Generic Counter and Cortex-R52."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "GCNTERREN,Generic Counter error detection enable. The possible values are following." "0: Error detection is disabled,1: Error detection is enabled"
line.long 0x8 "CR52RVBAR10,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x8 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
newline
hexmask.long.byte 0x8 0.--4. 1. "Reserved_0,Reserved"
line.long 0xC "CR52BAR10,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR. After completing the setting of RBAR with BAREN = 0..."
hexmask.long.word 0xC 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
newline
hexmask.long.word 0xC 5.--17. 1. "Reserved_5,Reserved"
newline
bitfld.long 0xC 4. "BAREN,BAR enables. The possible values are:" "0,1"
newline
rbitfld.long 0xC 2.--3. "Reserved_2,Reserved" "0,1,2,3"
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rbitfld.long 0xC 0.--1. "BTMD_1_0,Boot Mode. Indicates boot area of Cortex-R52. Permitted values are following." "0: RBAR is assigned for boot address,?,?,?"
line.long 0x10 "CR52RVBARP10,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x10 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
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hexmask.long.byte 0x10 1.--4. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x10 0. "VLD,CR52RVBARP valid. The possible values are following." "0: CR52RVBAR is used to define CFGVECTABLE for..,1: CR52RVBARP is used to define CFGVECTABLE for.."
line.long 0x14 "CR52BARP10,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR and VLD. After completing the setting of RBAR and VLD.."
hexmask.long.word 0x14 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
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hexmask.long.word 0x14 5.--17. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x14 4. "BAREN,BAR enables. The possible values are following." "0: RBAR is not valid,1: RBAR is valid"
newline
rbitfld.long 0x14 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x14 0. "VLD,CR52BARP valid. The possible values are following." "0: CR52BAR is used to define Boot Address of..,1: CR52BARP is used to define Boot Address of.."
line.long 0x18 "CR52CR20,This register is a 32-bit readable/writable register. This register belongs to Group0. This register controls configuration of Cortex-R52."
rbitfld.long 0x18 31. "Reserved_31,Reserved" "0,1"
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bitfld.long 0x18 30. "NCPUHALT,NCPUHALT means inverted value of CPUHALT defined in Cortex-R52 TRM. The possible values are following." "0: Processor halt after reset,1: No processor halt after reset"
newline
bitfld.long 0x18 29. "CFGRAMPROTEN,CFGRAMPROTEN defined in Cortex-R52 TRM. The possible values are following." "0: RAM memory protection is disabled out of reset,1: RAM memory protection is enabled out of reset"
newline
bitfld.long 0x18 28. "CFGTCMBOOT,CFGTCMBOOT defined in Cortex-R52 TRM. The possible values are following." "0: ATCM is disabled out of reset,1: ATCM is enabled and at address 0x0 out of reset"
newline
bitfld.long 0x18 27. "CFGINITREG,CFGINITREG defined in Cortex-R52 TRM. The possible values are following." "0: Program-visible registers are not initialized to..,1: Program-visible registers are initialized to.."
newline
bitfld.long 0x18 26. "CFGL1CACHEINVDIS0,CFGL1CACHEINVDIS defined in Cortex-R52 TRM. The possible values are following." "0: Automatic post-reset L1 cache invalidate is..,1: Automatic post-reset L1 cache invalidate is.."
newline
hexmask.long 0x18 0.--25. 1. "Reserved_0,Reserved"
line.long 0x1C "CR52RSTCTRL20,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls reset operation for Cortex-R52."
hexmask.long 0x1C 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x1C 0. "CR52RST,Cortex-R52 reset. Indicates Cortex-R52 reset status. The initial value depends on Mode PIN configuration. Permitted values are following." "0: All Cortex-R52 resets are negated,1: All Cortex-R52 resets are asserted"
line.long 0x20 "CR52PWRCTRL20,"
hexmask.long.word 0x20 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x20 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x20 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x20 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x20 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
line.long 0x24 "FSMLOCKRCR5220,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-R52 reset control."
hexmask.long.word 0x24 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
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rbitfld.long 0x24 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x24 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x24 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
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hexmask.long.byte 0x24 5.--10. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x24 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
rbitfld.long 0x24 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x24 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x28 "PDENYSTSRCLCR5220,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long 0x28 6.--31. 1. "Reserved_6,Reserved"
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bitfld.long 0x28 5. "DNY_ON_DBGLOW,Indicates whether a denied state transition has occurred by power mode transition from ON mode to Debug over LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x28 4. "DNY_DBGLOW_ON,Indicates whether a denied state transition has occurred by power mode transition from Debug over LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x28 3. "DNY_ON_LOWPOWER,Indicates whether a denied state transition has occurred by power mode transition from ON mode to LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x28 2. "DNY_LOWPOWER_ON,Indicates whether a denied state transition has occurred by power mode transition from LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x28 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x28 0. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
line.long 0x2C "PDENYINTRCLCR5220,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long 0x2C 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x2C 5. "INT_ON_DBGLOW,Issuing interrupt enable by DNY_ON_DBGLOW. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x2C 4. "INT_DBGLOW_ON,Issuing interrupt enable by DNY_DBGLOW_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x2C 3. "INT_ON_LOWPOWER,Issuing interrupt enable by DNY_ON_LOWPOWER. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x2C 2. "INT_LOWPOWER_ON,Issuing interrupt enable by DNY_LOWPOWER_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x2C 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x2C 0. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
rgroup.long 0x398++0x3
line.long 0x0 "FSMSTSRCR5220,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-R52 FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
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hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-R52 FSM. The permitted values are following."
group.long 0x39C++0x3
line.long 0x0 "G2GPRCR5220,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
group.long 0x3A8++0x17
line.long 0x0 "CR52CMPEN20,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls Cortex-R52 DCLS comparator. When NSRCMPEN is set to 1. Realtime Core detects the toggles of non-safety related operations and/or.."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "NSRCMPEN,Non-safety- related comparator enable. The possible values are following." "0: Comparator for Non-safety-related signals is..,1: Comparator for Non-safety-related signals is.."
newline
bitfld.long 0x0 0. "CMPEN,Comparator enables. The possible values are following." "0: Comparator is disabled,1: Comparator is enabled"
line.long 0x4 "GCNTERRENCR5220,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety mechanism between Generic Counter and Cortex-R52."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "GCNTERREN,Generic Counter error detection enable. The possible values are following." "0: Error detection is disabled,1: Error detection is enabled"
line.long 0x8 "CR52RVBAR20,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x8 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
newline
hexmask.long.byte 0x8 0.--4. 1. "Reserved_0,Reserved"
line.long 0xC "CR52BAR20,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR. After completing the setting of RBAR with BAREN = 0..."
hexmask.long.word 0xC 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
newline
hexmask.long.word 0xC 5.--17. 1. "Reserved_5,Reserved"
newline
bitfld.long 0xC 4. "BAREN,BAR enables. The possible values are:" "0,1"
newline
rbitfld.long 0xC 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
rbitfld.long 0xC 0.--1. "BTMD_1_0,Boot Mode. Indicates boot area of Cortex-R52. Permitted values are following." "0: RBAR is assigned for boot address,?,?,?"
line.long 0x10 "CR52RVBARP20,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x10 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
newline
hexmask.long.byte 0x10 1.--4. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x10 0. "VLD,CR52RVBARP valid. The possible values are following." "0: CR52RVBAR is used to define CFGVECTABLE for..,1: CR52RVBARP is used to define CFGVECTABLE for.."
line.long 0x14 "CR52BARP20,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR and VLD. After completing the setting of RBAR and VLD.."
hexmask.long.word 0x14 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
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hexmask.long.word 0x14 5.--17. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x14 4. "BAREN,BAR enables. The possible values are following." "0: RBAR is not valid,1: RBAR is valid"
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rbitfld.long 0x14 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x14 0. "VLD,CR52BARP valid. The possible values are following." "0: CR52BAR is used to define Boot Address of..,1: CR52BARP is used to define Boot Address of.."
group.long 0x400++0x7
line.long 0x0 "PWRCTRLCL0_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 cluster x."
hexmask.long.word 0x0 22.--31. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "PCHMRETEN,MEM_RET mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to MEM_RET mode is disabled,?"
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bitfld.long 0x0 20. "PCHFRETEN,FUNC_RET mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to FUNC_RET mode is disabled,1: Power mode transition to FUNC_RET mode is enabled"
newline
rbitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enable by P-channel protocol. The possible values are following." "0,1"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "L3CTRLCL0_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register is used for L3 cache partial power down/up."
hexmask.long.word 0x4 19.--31. 1. "Reserved_19,Reserved"
newline
rbitfld.long 0x4 16.--18. "L3STS_2_0,Indicates current L3 cache partial power down/up status. Permitted values are following." "?,1: 1/4 of L3 cache is powered on,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x4 9. "L3DENY,Indicates whether L3 cache partial power down/up request is denied. Permitted values are following." "0: request is not denied,1: request is denied"
newline
bitfld.long 0x4 8. "L3ACCEPT,Indicates whether L3 cache partial power down/up request is accepted. Permitted values are following." "0: request is not accepted,1: request is accepted"
newline
rbitfld.long 0x4 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 4. "L3REQ,L3 cache partial power down/up request. The possible values are following." "0: L3 cache partial power down/up is not requested,1: L3 cache partial power down/up is requested"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x4 0.--2. "L3CTRL_2_0,L3 cache partial power down/up control. The possible values are following." "0: All L3 cache is power-off or..,1: 1/4 of L3 cache is power-on,?,?,?,?,?,?"
group.long 0x40C++0xB
line.long 0x0 "FSMLOCKRCL0_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls a safety mechanism of FSM for Cortex-A76 cluster."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRCL0_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long.word 0x4 23.--31. 1. "Reserved_23,Reserved"
newline
bitfld.long 0x4 22. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 21. "DNY_ON_OFF,Indicates whether a denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 20. "DNY_ON_FUNC,Indicates whether a denied state transition has occurred by power mode transition from ON mode to FUNC_RET mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 19. "DNY_FUNC_ON,Indicates whether a denied state transition has occurred by power mode transition from FUNC_RET mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 18. "DNY_ON_MEM,Indicates whether a denied state transition has occurred by power mode transition from ON mode to MEM_RET mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 17. "DNY_MEM_ON,Indicates whether a denied state transition has occurred by power mode transition from MEM_RET mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 16. "DNY_ON_L3CHG,Indicates whether a denied state transition has occurred by L3 cache partial power mode control. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "PDENYINTRCL0_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.word 0x8 23.--31. 1. "Reserved_23,Reserved"
newline
bitfld.long 0x8 22. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 21. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 20. "INT_ON_FUNC,Issuing interrupt enable by DNY_ON_FUNC. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 19. "INT_FUNC_ON,Issuing interrupt enable by DNY_FUNC_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 18. "INT_ON_MEM,Issuing interrupt enable by DNY_ON_MEM. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 17. "INT_MEM_ON,Issuing interrupt enable by DNY_MEM_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 16. "INT_ON_L3CHG,Issuing interrupt enable by DNY_ON_L3CHG. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
rgroup.long 0x418++0x3
line.long 0x0 "FSMSTSRCL0_CLUSTER0,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 cluster FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-A76 cluster FSM. Permitted values are following."
group.long 0x41C++0x7
line.long 0x0 "G2GPRCL0_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLCL0_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 cluster."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x4 10. "A2_RTT_MRET,A2 RuntimeTEST using MEM_RET mode enable. The possible values are following." "0: A2 RuntimeTEST using MEM_RET mode is disabled,1: A2 RuntimeTEST using MEM_RET mode is enabled"
newline
bitfld.long 0x4 9. "A2_RTT_POFF,A2 RuntimeTEST using Pseudo OFF mode enable. The possible values are following." "0: A2 RuntimeTEST using Pseudo OFF mode is disabled,1: A2 RuntimeTEST using Pseudo OFF mode is enabled"
newline
hexmask.long.byte 0x4 2.--8. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 clusters are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76..,1: RuntimeTEST is enabled before Cortex-A76.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x424++0x3
line.long 0x0 "DCLSENCL0,This register is a 32-bit readable register. This register belongs to Group1. This register indicates whether Cortex-A76 cluster is in DCLS mode."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "DCLSEN,Indicates Cortex-A76 cluster is DCLS mode. Permitted values are following." "0: Cortex-A76 cluster is not in DCLS mode,1: Cortex-A76 cluster is in DCLS mode"
group.long 0x428++0x7
line.long 0x0 "DCLSCMPENCL0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls a DCLS comparator for Cortex-A76 cluster."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "DCLSCMPEN,DCLS comparator enable. The possible values are following." "0: DCLS comparator is disabled,1: DCLS comparator is enabled"
line.long 0x4 "GCNTERRENCL0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety mechanism between Generic Counter and Cortex-A76 cluster."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "GCNTERREN,Generic Counter error detection enable. The possible values are following." "0: Error detection is disabled,1: Error detection is enabled"
group.long 0x440++0x7
line.long 0x0 "PWRCTRLCL0_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 cluster x."
hexmask.long.word 0x0 22.--31. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "PCHMRETEN,MEM_RET mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to MEM_RET mode is disabled,?"
newline
bitfld.long 0x0 20. "PCHFRETEN,FUNC_RET mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to FUNC_RET mode is disabled,1: Power mode transition to FUNC_RET mode is enabled"
newline
rbitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enable by P-channel protocol. The possible values are following." "0,1"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "L3CTRLCL0_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register is used for L3 cache partial power down/up."
hexmask.long.word 0x4 19.--31. 1. "Reserved_19,Reserved"
newline
rbitfld.long 0x4 16.--18. "L3STS_2_0,Indicates current L3 cache partial power down/up status. Permitted values are following." "?,1: 1/4 of L3 cache is powered on,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x4 9. "L3DENY,Indicates whether L3 cache partial power down/up request is denied. Permitted values are following." "0: request is not denied,1: request is denied"
newline
bitfld.long 0x4 8. "L3ACCEPT,Indicates whether L3 cache partial power down/up request is accepted. Permitted values are following." "0: request is not accepted,1: request is accepted"
newline
rbitfld.long 0x4 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 4. "L3REQ,L3 cache partial power down/up request. The possible values are following." "0: L3 cache partial power down/up is not requested,1: L3 cache partial power down/up is requested"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x4 0.--2. "L3CTRL_2_0,L3 cache partial power down/up control. The possible values are following." "0: All L3 cache is power-off or..,1: 1/4 of L3 cache is power-on,?,?,?,?,?,?"
group.long 0x44C++0xB
line.long 0x0 "FSMLOCKRCL0_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls a safety mechanism of FSM for Cortex-A76 cluster."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRCL0_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long.word 0x4 23.--31. 1. "Reserved_23,Reserved"
newline
bitfld.long 0x4 22. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 21. "DNY_ON_OFF,Indicates whether a denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 20. "DNY_ON_FUNC,Indicates whether a denied state transition has occurred by power mode transition from ON mode to FUNC_RET mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 19. "DNY_FUNC_ON,Indicates whether a denied state transition has occurred by power mode transition from FUNC_RET mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 18. "DNY_ON_MEM,Indicates whether a denied state transition has occurred by power mode transition from ON mode to MEM_RET mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 17. "DNY_MEM_ON,Indicates whether a denied state transition has occurred by power mode transition from MEM_RET mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 16. "DNY_ON_L3CHG,Indicates whether a denied state transition has occurred by L3 cache partial power mode control. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "PDENYINTRCL0_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.word 0x8 23.--31. 1. "Reserved_23,Reserved"
newline
bitfld.long 0x8 22. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 21. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 20. "INT_ON_FUNC,Issuing interrupt enable by DNY_ON_FUNC. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 19. "INT_FUNC_ON,Issuing interrupt enable by DNY_FUNC_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 18. "INT_ON_MEM,Issuing interrupt enable by DNY_ON_MEM. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 17. "INT_MEM_ON,Issuing interrupt enable by DNY_MEM_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 16. "INT_ON_L3CHG,Issuing interrupt enable by DNY_ON_L3CHG. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
rgroup.long 0x458++0x3
line.long 0x0 "FSMSTSRCL0_CLUSTER1,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 cluster FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-A76 cluster FSM. Permitted values are following."
group.long 0x45C++0x7
line.long 0x0 "G2GPRCL0_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLCL0_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 cluster."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x4 10. "A2_RTT_MRET,A2 RuntimeTEST using MEM_RET mode enable. The possible values are following." "0: A2 RuntimeTEST using MEM_RET mode is disabled,1: A2 RuntimeTEST using MEM_RET mode is enabled"
newline
bitfld.long 0x4 9. "A2_RTT_POFF,A2 RuntimeTEST using Pseudo OFF mode enable. The possible values are following." "0: A2 RuntimeTEST using Pseudo OFF mode is disabled,1: A2 RuntimeTEST using Pseudo OFF mode is enabled"
newline
hexmask.long.byte 0x4 2.--8. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 clusters are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76..,1: RuntimeTEST is enabled before Cortex-A76.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0x800++0x3
line.long 0x0 "PWRCTRLC0_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x0 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x0 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0x80C++0xB
line.long 0x0 "FSMLOCKRC0_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC0_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC0_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x818++0x3
line.long 0x0 "FSMSTSRC0_CORE0,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0x81C++0x7
line.long 0x0 "G2GPRC0_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC0_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0x830++0x13
line.long 0x0 "RVBARLC0_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC0_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC0_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC0_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x10 "PWRCTRLC0_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x10 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x10 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x10 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x10 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x10 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x10 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x10 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x10 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0x84C++0xB
line.long 0x0 "FSMLOCKRC0_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC0_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC0_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x858++0x3
line.long 0x0 "FSMSTSRC0_CORE1,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0x85C++0x7
line.long 0x0 "G2GPRC0_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC0_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0x870++0xF
line.long 0x0 "RVBARLC0_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC0_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC0_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC0_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
group.long 0xA00++0x3
line.long 0x0 "PWRCTRLC0_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x0 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x0 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xA0C++0xB
line.long 0x0 "FSMLOCKRC0_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC0_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC0_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xA18++0x3
line.long 0x0 "FSMSTSRC0_CORE2,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xA1C++0x7
line.long 0x0 "G2GPRC0_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC0_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xA30++0x13
line.long 0x0 "RVBARLC0_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC0_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC0_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC0_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x10 "PWRCTRLC0_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x10 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x10 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x10 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x10 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x10 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x10 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x10 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x10 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xA4C++0xB
line.long 0x0 "FSMLOCKRC0_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC0_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC0_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xA58++0x3
line.long 0x0 "FSMSTSRC0_CORE3,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xA5C++0x7
line.long 0x0 "G2GPRC0_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC0_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xA70++0xF
line.long 0x0 "RVBARLC0_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC0_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC0_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC0_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
group.long 0xC00++0x3
line.long 0x0 "PWRCTRLC0_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x0 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x0 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xC0C++0xB
line.long 0x0 "FSMLOCKRC0_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC0_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC0_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xC18++0x3
line.long 0x0 "FSMSTSRC0_CORE4,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xC1C++0x7
line.long 0x0 "G2GPRC0_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC0_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xC30++0x13
line.long 0x0 "RVBARLC0_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC0_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC0_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC0_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x10 "PWRCTRLC0_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x10 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x10 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x10 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x10 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x10 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x10 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x10 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x10 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xC4C++0xB
line.long 0x0 "FSMLOCKRC0_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC0_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC0_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xC58++0x3
line.long 0x0 "FSMSTSRC0_CORE5,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xC5C++0x7
line.long 0x0 "G2GPRC0_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC0_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xC70++0xF
line.long 0x0 "RVBARLC0_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC0_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC0_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC0_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
group.long 0xE00++0x3
line.long 0x0 "PWRCTRLC0_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x0 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x0 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xE0C++0xB
line.long 0x0 "FSMLOCKRC0_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC0_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC0_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xE18++0x3
line.long 0x0 "FSMSTSRC0_CORE6,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xE1C++0x7
line.long 0x0 "G2GPRC0_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC0_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xE30++0x13
line.long 0x0 "RVBARLC0_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC0_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC0_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC0_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x10 "PWRCTRLC0_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x10 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x10 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x10 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x10 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x10 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x10 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x10 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x10 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xE4C++0xB
line.long 0x0 "FSMLOCKRC0_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC0_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC0_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xE58++0x3
line.long 0x0 "FSMSTSRC0_CORE7,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xE5C++0x7
line.long 0x0 "G2GPRC0_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC0_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xE70++0xF
line.long 0x0 "RVBARLC0_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC0_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC0_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC0_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
tree.end
tree "APMU_1"
base ad:0xE6171000
group.long 0x0++0x7
line.long 0x0 "WPCR1,This register is 32-bit readable/writable register. This register doesnsingle_quotationt belong to any Group. This register controls write protect function. This register is implemented one for each Domain."
hexmask.long.word 0x0 16.--31. 1. "Code_Value,Code Value"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "WPE,Write Protect Enable. The possible values are following." "0: Write protect is disabled,1: Write protect is enabled"
line.long 0x4 "WPR1,These registers are 32-bit readable/writable registers. This register doesnsingle_quotationt belong to any Group. This register controls write protect function. This register is implemented one for each Domain."
hexmask.long 0x4 0.--31. 1. "WPRTCT_31_0,If Write Protect is enabled  inverted values need to be set to this field before write access."
group.long 0x14++0x3
line.long 0x0 "D1ACCENR,This register is a 32-bit readable/writable register. This register doesnsingle_quotationt belong to any Group. This register controls access protect function. This register can be accessed by only Domain 0."
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
bitfld.long 0x0 23. "ADMNGRP3,Register protection for Group3 of admin registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 22. "ADMNGRP2,Register protection for Group2 of admin registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 21. "ADMNGRP1,Register protection for Group1 of admin registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 20. "ADMNGRP0,Register protection for Group0 of admin registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 19. "RTGRP3,Register protection for Group3 of CR52's registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 18. "RTGRP2,Register protection for Group2 of CR52single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 17. "RTGRP1,Register protection for Group1 of CR52single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 16. "RTGRP0,Register protection for Group0 of CR52single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
newline
rbitfld.long 0x0 14. "Reserved_14,Reserved" "0,1"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
newline
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
rbitfld.long 0x0 10. "Reserved_10,Reserved" "0,1"
newline
rbitfld.long 0x0 9. "Reserved_9,Reserved" "0,1"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "CL1GRP3,Register protection for Group3 of Cortex-A76 cluster 1single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 6. "CL1GRP2,Register protection for Group2 of Cortex-A76 cluster 1single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 5. "CL1GRP1,Register protection for Group1 of Cortex-A76 cluster 1single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 4. "CL1GRP0,Register protection for Group0 of Cortex-A76 cluster 1single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 3. "CL0GRP3,Register protection for Group3 of Cortex-A76 cluster 0single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 2. "CL0GRP2,Register protection for Group2 of Cortex-A76 cluster 0single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 1. "CL0GRP1,Register protection for Group1 of Cortex-A76 cluster 0single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 0. "CL0GRP0,Register protection for Group0 of Cortex-A76 cluster 0single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
group.long 0x20++0x3
line.long 0x0 "PTCSR1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls access protect function and holds information of access protection."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
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bitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "ERR,Indicates whether access error has occurred." "0: error has not occurred,1: error has occurred"
rgroup.long 0x24++0x3
line.long 0x0 "PTERADR1,This register is a 32-bit readable register. This register belongs to Group1. This register holds information of access protection."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "ADDR_15_0,Indicate address causing access error."
group.long 0x28++0x3
line.long 0x0 "DCLSEIJTR1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls error injection for APMU DCLS error."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
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bitfld.long 0x0 0. "EIJT,Error Injection enable. The possible values are:" "0: error injection is not active,1: error injection is active"
group.long 0x40++0x3
line.long 0x0 "A3PWRCTRL10,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls A3 power domain."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "A3_PDN_EN,Power down enable for A3 power domain. The possible values are following" "0: A3 power domain cannot be powered down,1: A3 power domain is powered down if all A1 and A2.."
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x48++0x3
line.long 0x0 "A3FSMSTSR10,This register is a 32-bit readable register. This register belongs to Group2. This register indicates A3 FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
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hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0x50++0x3
line.long 0x0 "A3FSMLOCKR10,This register is a 32-bit readable/writable register. This register belongs to Group2.This register controls a safety mechanism of FSM for A3 power domain."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
newline
rbitfld.long 0x0 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
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bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
hexmask.long.byte 0x0 5.--10. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
rgroup.long 0x58++0x7
line.long 0x0 "INTSTSR1,This register is a 32-bit readable register. This register belongs to Group2.This register indicates a factor of interrupt request signal."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x0 16. "A2C0_INT,Indicate whether each A2 domain FSM for Cortex-A76 cluster 0 issues interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
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hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved"
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bitfld.long 0x0 3. "A1C3_INT,Indicate whether each A1 domain FSM issues for Cortex-A76 core 3 interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
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bitfld.long 0x0 2. "A1C2_INT,Indicate whether each A1 domain FSM issues for Cortex-A76 core 2 interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
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bitfld.long 0x0 1. "A1C1_INT,Indicate whether each A1 domain FSM issues for Cortex-A76 core 1 interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
newline
bitfld.long 0x0 0. "A1C0_INT,Indicate whether each A1 domain FSM issues for Cortex-A76 core 0 interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
line.long 0x4 "ERRSTSR1,This register is a 32-bit readable register. This register belongs to Group2.This register indicates whether each FSM finds fault."
bitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
newline
bitfld.long 0x4 30. "CR52_ERR2,Indicates whether error flag is set in FSMLOCKRCR522. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 29. "CR52_ERR1,Indicates whether error flag is set in FSMLOCKRCR521. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 28. "CR52_ERR0,Indicates whether error flag is set in FSMLOCKRCR520. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 25.--27. "Reserved_25,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 24. "A3S0_ERR,Indicates whether error flag is set in A3FSMLOCKRx. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x4 16. "A2S0_ERR,Indicates whether error flag is set in FSMLOCKRCL0. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
hexmask.long.word 0x4 4.--15. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x4 3. "A1C3_ERR,Indicates whether error flag is set in FSMLOCKRC3. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 2. "A1C2_ERR,Indicates whether error flag is set in FSMLOCKRC2. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 1. "A1C1_ERR,Indicates whether error flag is set in FSMLOCKRC1. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 0. "A1C0_ERR,Indicates whether error flag is set in FSMLOCKRC0. Permitted values are following." "0: Error is not detected,1: Error is detected"
group.long 0x60++0x3
line.long 0x0 "FRSTR1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register control forced reset function."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
newline
rbitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x0 16. "FRSTRCL0,Forced reset request for each Cortex-A76 cluster 0.The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
newline
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x0 3. "FRSTRC3,Forced reset request for each Cortex-A76 core 3. The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
newline
bitfld.long 0x0 2. "FRSTRC2,Forced reset request for each Cortex-A76 core 2. The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
newline
bitfld.long 0x0 1. "FRSTRC1,Forced reset request for each Cortex-A76 core 1. The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
newline
bitfld.long 0x0 0. "FRSTRC0,Forced reset request for each Cortex-A76 core 0. The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
group.long 0x68++0x3
line.long 0x0 "FRSTCTRL1,"
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
newline
bitfld.long 0x0 30. "FRST_MOD_DBG,Forced reset modification in debug mode. The possible values are following." "0: All reset signals are asserted by forced reset..,1: Only warm reset of Cortex-A76 is asserted by.."
newline
bitfld.long 0x0 29. "CLKPAUSE_EN,Clock pause enable when Cortex-A76 reset is asserting. The possible values are following." "0: Clock pause is disabled when Cortex-A76 reset is..,1: Clock pause is enabled when Cortex-A76 reset is.."
newline
rbitfld.long 0x0 27.--28. "Reserved_27,Reserved" "0,1,2,3"
newline
hexmask.long 0x0 0.--26. 1. "Reserved_0,Reserved"
group.long 0x80++0x7
line.long 0x0 "PADDCHKSTSR1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register holds error information detected by Safety mechanism for APB bus interface."
bitfld.long 0x0 31. "PADD_CHK_SID_CLR,PADD_CHK_SID clear bit. PADD_CHK_SID is cleared by writing 1 to this bit." "0,1"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "PADD_CHK_SID_7_0,Indicates Source ID of fault transaction detected PADD_CHK mechanism."
line.long 0x4 "PWDATACHKSTSR1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register holds error information detected by Safety mechanism for APB bus interface."
bitfld.long 0x4 31. "PWDATA_CHK_SID_CLR,PWDATA_CHK_SID clear bit. PWDATA_CHK_SID is cleared by writing 1 to this bit." "0,1"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "PWDATA_CHK_SID_7_0,Indicates Source ID of fault transaction detected PWDATA_CHK mechanism."
group.long 0x300++0x17
line.long 0x0 "CR52CR01,This register is a 32-bit readable/writable register. This register belongs to Group0. This register controls configuration of Cortex-R52."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
newline
bitfld.long 0x0 30. "NCPUHALT,NCPUHALT means inverted value of CPUHALT defined in Cortex-R52 TRM. The possible values are following." "0: Processor halt after reset,1: No processor halt after reset"
newline
bitfld.long 0x0 29. "CFGRAMPROTEN,CFGRAMPROTEN defined in Cortex-R52 TRM. The possible values are following." "0: RAM memory protection is disabled out of reset,1: RAM memory protection is enabled out of reset"
newline
bitfld.long 0x0 28. "CFGTCMBOOT,CFGTCMBOOT defined in Cortex-R52 TRM. The possible values are following." "0: ATCM is disabled out of reset,1: ATCM is enabled and at address 0x0 out of reset"
newline
bitfld.long 0x0 27. "CFGINITREG,CFGINITREG defined in Cortex-R52 TRM. The possible values are following." "0: Program-visible registers are not initialized to..,1: Program-visible registers are initialized to.."
newline
bitfld.long 0x0 26. "CFGL1CACHEINVDIS0,CFGL1CACHEINVDIS defined in Cortex-R52 TRM. The possible values are following." "0: Automatic post-reset L1 cache invalidate is..,1: Automatic post-reset L1 cache invalidate is.."
newline
hexmask.long 0x0 0.--25. 1. "Reserved_0,Reserved"
line.long 0x4 "CR52RSTCTRL01,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls reset operation for Cortex-R52."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "CR52RST,Cortex-R52 reset. Indicates Cortex-R52 reset status. The initial value depends on Mode PIN configuration. Permitted values are following." "0: All Cortex-R52 resets are negated,1: All Cortex-R52 resets are asserted"
line.long 0x8 "CR52PWRCTRL01,"
hexmask.long.word 0x8 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x8 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x8 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x8 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x8 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
line.long 0xC "FSMLOCKRCR5201,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-R52 reset control."
hexmask.long.word 0xC 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
newline
rbitfld.long 0xC 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0xC 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0xC 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
hexmask.long.byte 0xC 5.--10. 1. "Reserved_5,Reserved"
newline
bitfld.long 0xC 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
rbitfld.long 0xC 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x10 "PDENYSTSRCLCR5201,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long 0x10 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x10 5. "DNY_ON_DBGLOW,Indicates whether a denied state transition has occurred by power mode transition from ON mode to Debug over LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x10 4. "DNY_DBGLOW_ON,Indicates whether a denied state transition has occurred by power mode transition from Debug over LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x10 3. "DNY_ON_LOWPOWER,Indicates whether a denied state transition has occurred by power mode transition from ON mode to LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x10 2. "DNY_LOWPOWER_ON,Indicates whether a denied state transition has occurred by power mode transition from LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x10 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x10 0. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
line.long 0x14 "PDENYINTRCLCR5201,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long 0x14 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x14 5. "INT_ON_DBGLOW,Issuing interrupt enable by DNY_ON_DBGLOW. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x14 4. "INT_DBGLOW_ON,Issuing interrupt enable by DNY_DBGLOW_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x14 3. "INT_ON_LOWPOWER,Issuing interrupt enable by DNY_ON_LOWPOWER. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x14 2. "INT_LOWPOWER_ON,Issuing interrupt enable by DNY_LOWPOWER_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x14 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x14 0. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
rgroup.long 0x318++0x3
line.long 0x0 "FSMSTSRCR5201,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-R52 FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-R52 FSM. The permitted values are following."
group.long 0x31C++0x3
line.long 0x0 "G2GPRCR5201,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
group.long 0x328++0x2F
line.long 0x0 "CR52CMPEN01,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls Cortex-R52 DCLS comparator. When NSRCMPEN is set to 1. Realtime Core detects the toggles of non-safety related operations and/or.."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "NSRCMPEN,Non-safety- related comparator enable. The possible values are following." "0: Comparator for Non-safety-related signals is..,1: Comparator for Non-safety-related signals is.."
newline
bitfld.long 0x0 0. "CMPEN,Comparator enables. The possible values are following." "0: Comparator is disabled,1: Comparator is enabled"
line.long 0x4 "GCNTERRENCR5201,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety mechanism between Generic Counter and Cortex-R52."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "GCNTERREN,Generic Counter error detection enable. The possible values are following." "0: Error detection is disabled,1: Error detection is enabled"
line.long 0x8 "CR52RVBAR01,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x8 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
newline
hexmask.long.byte 0x8 0.--4. 1. "Reserved_0,Reserved"
line.long 0xC "CR52BAR01,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR. After completing the setting of RBAR with BAREN = 0..."
hexmask.long.word 0xC 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
newline
hexmask.long.word 0xC 5.--17. 1. "Reserved_5,Reserved"
newline
bitfld.long 0xC 4. "BAREN,BAR enables. The possible values are:" "0,1"
newline
rbitfld.long 0xC 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
rbitfld.long 0xC 0.--1. "BTMD_1_0,Boot Mode. Indicates boot area of Cortex-R52. Permitted values are following." "0: RBAR is assigned for boot address,?,?,?"
line.long 0x10 "CR52RVBARP01,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x10 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
newline
hexmask.long.byte 0x10 1.--4. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x10 0. "VLD,CR52RVBARP valid. The possible values are following." "0: CR52RVBAR is used to define CFGVECTABLE for..,1: CR52RVBARP is used to define CFGVECTABLE for.."
line.long 0x14 "CR52BARP01,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR and VLD. After completing the setting of RBAR and VLD.."
hexmask.long.word 0x14 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
newline
hexmask.long.word 0x14 5.--17. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x14 4. "BAREN,BAR enables. The possible values are following." "0: RBAR is not valid,1: RBAR is valid"
newline
rbitfld.long 0x14 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x14 0. "VLD,CR52BARP valid. The possible values are following." "0: CR52BAR is used to define Boot Address of..,1: CR52BARP is used to define Boot Address of.."
line.long 0x18 "CR52CR11,This register is a 32-bit readable/writable register. This register belongs to Group0. This register controls configuration of Cortex-R52."
rbitfld.long 0x18 31. "Reserved_31,Reserved" "0,1"
newline
bitfld.long 0x18 30. "NCPUHALT,NCPUHALT means inverted value of CPUHALT defined in Cortex-R52 TRM. The possible values are following." "0: Processor halt after reset,1: No processor halt after reset"
newline
bitfld.long 0x18 29. "CFGRAMPROTEN,CFGRAMPROTEN defined in Cortex-R52 TRM. The possible values are following." "0: RAM memory protection is disabled out of reset,1: RAM memory protection is enabled out of reset"
newline
bitfld.long 0x18 28. "CFGTCMBOOT,CFGTCMBOOT defined in Cortex-R52 TRM. The possible values are following." "0: ATCM is disabled out of reset,1: ATCM is enabled and at address 0x0 out of reset"
newline
bitfld.long 0x18 27. "CFGINITREG,CFGINITREG defined in Cortex-R52 TRM. The possible values are following." "0: Program-visible registers are not initialized to..,1: Program-visible registers are initialized to.."
newline
bitfld.long 0x18 26. "CFGL1CACHEINVDIS0,CFGL1CACHEINVDIS defined in Cortex-R52 TRM. The possible values are following." "0: Automatic post-reset L1 cache invalidate is..,1: Automatic post-reset L1 cache invalidate is.."
newline
hexmask.long 0x18 0.--25. 1. "Reserved_0,Reserved"
line.long 0x1C "CR52RSTCTRL11,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls reset operation for Cortex-R52."
hexmask.long 0x1C 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x1C 0. "CR52RST,Cortex-R52 reset. Indicates Cortex-R52 reset status. The initial value depends on Mode PIN configuration. Permitted values are following." "0: All Cortex-R52 resets are negated,1: All Cortex-R52 resets are asserted"
line.long 0x20 "CR52PWRCTRL11,"
hexmask.long.word 0x20 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x20 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x20 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x20 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x20 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
line.long 0x24 "FSMLOCKRCR5211,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-R52 reset control."
hexmask.long.word 0x24 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
newline
rbitfld.long 0x24 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x24 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x24 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
hexmask.long.byte 0x24 5.--10. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x24 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
rbitfld.long 0x24 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x24 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x28 "PDENYSTSRCLCR5211,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long 0x28 6.--31. 1. "Reserved_6,Reserved"
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bitfld.long 0x28 5. "DNY_ON_DBGLOW,Indicates whether a denied state transition has occurred by power mode transition from ON mode to Debug over LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x28 4. "DNY_DBGLOW_ON,Indicates whether a denied state transition has occurred by power mode transition from Debug over LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x28 3. "DNY_ON_LOWPOWER,Indicates whether a denied state transition has occurred by power mode transition from ON mode to LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x28 2. "DNY_LOWPOWER_ON,Indicates whether a denied state transition has occurred by power mode transition from LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x28 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x28 0. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
line.long 0x2C "PDENYINTRCLCR5211,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long 0x2C 6.--31. 1. "Reserved_6,Reserved"
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bitfld.long 0x2C 5. "INT_ON_DBGLOW,Issuing interrupt enable by DNY_ON_DBGLOW. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x2C 4. "INT_DBGLOW_ON,Issuing interrupt enable by DNY_DBGLOW_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x2C 3. "INT_ON_LOWPOWER,Issuing interrupt enable by DNY_ON_LOWPOWER. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x2C 2. "INT_LOWPOWER_ON,Issuing interrupt enable by DNY_LOWPOWER_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x2C 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x2C 0. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
rgroup.long 0x358++0x3
line.long 0x0 "FSMSTSRCR5211,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-R52 FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
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hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-R52 FSM. The permitted values are following."
group.long 0x35C++0x3
line.long 0x0 "G2GPRCR5211,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
group.long 0x368++0x2F
line.long 0x0 "CR52CMPEN11,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls Cortex-R52 DCLS comparator. When NSRCMPEN is set to 1. Realtime Core detects the toggles of non-safety related operations and/or.."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "NSRCMPEN,Non-safety- related comparator enable. The possible values are following." "0: Comparator for Non-safety-related signals is..,1: Comparator for Non-safety-related signals is.."
newline
bitfld.long 0x0 0. "CMPEN,Comparator enables. The possible values are following." "0: Comparator is disabled,1: Comparator is enabled"
line.long 0x4 "GCNTERRENCR5211,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety mechanism between Generic Counter and Cortex-R52."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "GCNTERREN,Generic Counter error detection enable. The possible values are following." "0: Error detection is disabled,1: Error detection is enabled"
line.long 0x8 "CR52RVBAR11,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x8 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
newline
hexmask.long.byte 0x8 0.--4. 1. "Reserved_0,Reserved"
line.long 0xC "CR52BAR11,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR. After completing the setting of RBAR with BAREN = 0..."
hexmask.long.word 0xC 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
newline
hexmask.long.word 0xC 5.--17. 1. "Reserved_5,Reserved"
newline
bitfld.long 0xC 4. "BAREN,BAR enables. The possible values are:" "0,1"
newline
rbitfld.long 0xC 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
rbitfld.long 0xC 0.--1. "BTMD_1_0,Boot Mode. Indicates boot area of Cortex-R52. Permitted values are following." "0: RBAR is assigned for boot address,?,?,?"
line.long 0x10 "CR52RVBARP11,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x10 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
newline
hexmask.long.byte 0x10 1.--4. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x10 0. "VLD,CR52RVBARP valid. The possible values are following." "0: CR52RVBAR is used to define CFGVECTABLE for..,1: CR52RVBARP is used to define CFGVECTABLE for.."
line.long 0x14 "CR52BARP11,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR and VLD. After completing the setting of RBAR and VLD.."
hexmask.long.word 0x14 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
newline
hexmask.long.word 0x14 5.--17. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x14 4. "BAREN,BAR enables. The possible values are following." "0: RBAR is not valid,1: RBAR is valid"
newline
rbitfld.long 0x14 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x14 0. "VLD,CR52BARP valid. The possible values are following." "0: CR52BAR is used to define Boot Address of..,1: CR52BARP is used to define Boot Address of.."
line.long 0x18 "CR52CR21,This register is a 32-bit readable/writable register. This register belongs to Group0. This register controls configuration of Cortex-R52."
rbitfld.long 0x18 31. "Reserved_31,Reserved" "0,1"
newline
bitfld.long 0x18 30. "NCPUHALT,NCPUHALT means inverted value of CPUHALT defined in Cortex-R52 TRM. The possible values are following." "0: Processor halt after reset,1: No processor halt after reset"
newline
bitfld.long 0x18 29. "CFGRAMPROTEN,CFGRAMPROTEN defined in Cortex-R52 TRM. The possible values are following." "0: RAM memory protection is disabled out of reset,1: RAM memory protection is enabled out of reset"
newline
bitfld.long 0x18 28. "CFGTCMBOOT,CFGTCMBOOT defined in Cortex-R52 TRM. The possible values are following." "0: ATCM is disabled out of reset,1: ATCM is enabled and at address 0x0 out of reset"
newline
bitfld.long 0x18 27. "CFGINITREG,CFGINITREG defined in Cortex-R52 TRM. The possible values are following." "0: Program-visible registers are not initialized to..,1: Program-visible registers are initialized to.."
newline
bitfld.long 0x18 26. "CFGL1CACHEINVDIS0,CFGL1CACHEINVDIS defined in Cortex-R52 TRM. The possible values are following." "0: Automatic post-reset L1 cache invalidate is..,1: Automatic post-reset L1 cache invalidate is.."
newline
hexmask.long 0x18 0.--25. 1. "Reserved_0,Reserved"
line.long 0x1C "CR52RSTCTRL21,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls reset operation for Cortex-R52."
hexmask.long 0x1C 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x1C 0. "CR52RST,Cortex-R52 reset. Indicates Cortex-R52 reset status. The initial value depends on Mode PIN configuration. Permitted values are following." "0: All Cortex-R52 resets are negated,1: All Cortex-R52 resets are asserted"
line.long 0x20 "CR52PWRCTRL21,"
hexmask.long.word 0x20 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x20 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x20 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x20 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x20 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
line.long 0x24 "FSMLOCKRCR5221,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-R52 reset control."
hexmask.long.word 0x24 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
newline
rbitfld.long 0x24 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x24 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x24 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
hexmask.long.byte 0x24 5.--10. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x24 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
rbitfld.long 0x24 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x24 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x28 "PDENYSTSRCLCR5221,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long 0x28 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x28 5. "DNY_ON_DBGLOW,Indicates whether a denied state transition has occurred by power mode transition from ON mode to Debug over LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x28 4. "DNY_DBGLOW_ON,Indicates whether a denied state transition has occurred by power mode transition from Debug over LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x28 3. "DNY_ON_LOWPOWER,Indicates whether a denied state transition has occurred by power mode transition from ON mode to LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x28 2. "DNY_LOWPOWER_ON,Indicates whether a denied state transition has occurred by power mode transition from LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x28 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x28 0. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
line.long 0x2C "PDENYINTRCLCR5221,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long 0x2C 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x2C 5. "INT_ON_DBGLOW,Issuing interrupt enable by DNY_ON_DBGLOW. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x2C 4. "INT_DBGLOW_ON,Issuing interrupt enable by DNY_DBGLOW_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x2C 3. "INT_ON_LOWPOWER,Issuing interrupt enable by DNY_ON_LOWPOWER. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x2C 2. "INT_LOWPOWER_ON,Issuing interrupt enable by DNY_LOWPOWER_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x2C 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x2C 0. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
rgroup.long 0x398++0x3
line.long 0x0 "FSMSTSRCR5221,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-R52 FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-R52 FSM. The permitted values are following."
group.long 0x39C++0x3
line.long 0x0 "G2GPRCR5221,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
group.long 0x3A8++0x17
line.long 0x0 "CR52CMPEN21,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls Cortex-R52 DCLS comparator. When NSRCMPEN is set to 1. Realtime Core detects the toggles of non-safety related operations and/or.."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "NSRCMPEN,Non-safety- related comparator enable. The possible values are following." "0: Comparator for Non-safety-related signals is..,1: Comparator for Non-safety-related signals is.."
newline
bitfld.long 0x0 0. "CMPEN,Comparator enables. The possible values are following." "0: Comparator is disabled,1: Comparator is enabled"
line.long 0x4 "GCNTERRENCR5221,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety mechanism between Generic Counter and Cortex-R52."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "GCNTERREN,Generic Counter error detection enable. The possible values are following." "0: Error detection is disabled,1: Error detection is enabled"
line.long 0x8 "CR52RVBAR21,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x8 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
newline
hexmask.long.byte 0x8 0.--4. 1. "Reserved_0,Reserved"
line.long 0xC "CR52BAR21,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR. After completing the setting of RBAR with BAREN = 0..."
hexmask.long.word 0xC 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
newline
hexmask.long.word 0xC 5.--17. 1. "Reserved_5,Reserved"
newline
bitfld.long 0xC 4. "BAREN,BAR enables. The possible values are:" "0,1"
newline
rbitfld.long 0xC 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
rbitfld.long 0xC 0.--1. "BTMD_1_0,Boot Mode. Indicates boot area of Cortex-R52. Permitted values are following." "0: RBAR is assigned for boot address,?,?,?"
line.long 0x10 "CR52RVBARP21,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x10 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
newline
hexmask.long.byte 0x10 1.--4. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x10 0. "VLD,CR52RVBARP valid. The possible values are following." "0: CR52RVBAR is used to define CFGVECTABLE for..,1: CR52RVBARP is used to define CFGVECTABLE for.."
line.long 0x14 "CR52BARP21,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR and VLD. After completing the setting of RBAR and VLD.."
hexmask.long.word 0x14 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
newline
hexmask.long.word 0x14 5.--17. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x14 4. "BAREN,BAR enables. The possible values are following." "0: RBAR is not valid,1: RBAR is valid"
newline
rbitfld.long 0x14 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x14 0. "VLD,CR52BARP valid. The possible values are following." "0: CR52BAR is used to define Boot Address of..,1: CR52BARP is used to define Boot Address of.."
group.long 0x400++0x7
line.long 0x0 "PWRCTRLCL1_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 cluster x."
hexmask.long.word 0x0 22.--31. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "PCHMRETEN,MEM_RET mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to MEM_RET mode is disabled,?"
newline
bitfld.long 0x0 20. "PCHFRETEN,FUNC_RET mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to FUNC_RET mode is disabled,1: Power mode transition to FUNC_RET mode is enabled"
newline
rbitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
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bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enable by P-channel protocol. The possible values are following." "0,1"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "L3CTRLCL1_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register is used for L3 cache partial power down/up."
hexmask.long.word 0x4 19.--31. 1. "Reserved_19,Reserved"
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rbitfld.long 0x4 16.--18. "L3STS_2_0,Indicates current L3 cache partial power down/up status. Permitted values are following." "?,1: 1/4 of L3 cache is powered on,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x4 9. "L3DENY,Indicates whether L3 cache partial power down/up request is denied. Permitted values are following." "0: request is not denied,1: request is denied"
newline
bitfld.long 0x4 8. "L3ACCEPT,Indicates whether L3 cache partial power down/up request is accepted. Permitted values are following." "0: request is not accepted,1: request is accepted"
newline
rbitfld.long 0x4 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 4. "L3REQ,L3 cache partial power down/up request. The possible values are following." "0: L3 cache partial power down/up is not requested,1: L3 cache partial power down/up is requested"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x4 0.--2. "L3CTRL_2_0,L3 cache partial power down/up control. The possible values are following." "0: All L3 cache is power-off or..,1: 1/4 of L3 cache is power-on,?,?,?,?,?,?"
group.long 0x40C++0xB
line.long 0x0 "FSMLOCKRCL1_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls a safety mechanism of FSM for Cortex-A76 cluster."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
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rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
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bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRCL1_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long.word 0x4 23.--31. 1. "Reserved_23,Reserved"
newline
bitfld.long 0x4 22. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 21. "DNY_ON_OFF,Indicates whether a denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 20. "DNY_ON_FUNC,Indicates whether a denied state transition has occurred by power mode transition from ON mode to FUNC_RET mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x4 19. "DNY_FUNC_ON,Indicates whether a denied state transition has occurred by power mode transition from FUNC_RET mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x4 18. "DNY_ON_MEM,Indicates whether a denied state transition has occurred by power mode transition from ON mode to MEM_RET mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x4 17. "DNY_MEM_ON,Indicates whether a denied state transition has occurred by power mode transition from MEM_RET mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 16. "DNY_ON_L3CHG,Indicates whether a denied state transition has occurred by L3 cache partial power mode control. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "PDENYINTRCL1_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.word 0x8 23.--31. 1. "Reserved_23,Reserved"
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bitfld.long 0x8 22. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
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bitfld.long 0x8 21. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
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bitfld.long 0x8 20. "INT_ON_FUNC,Issuing interrupt enable by DNY_ON_FUNC. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
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bitfld.long 0x8 19. "INT_FUNC_ON,Issuing interrupt enable by DNY_FUNC_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 18. "INT_ON_MEM,Issuing interrupt enable by DNY_ON_MEM. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 17. "INT_MEM_ON,Issuing interrupt enable by DNY_MEM_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 16. "INT_ON_L3CHG,Issuing interrupt enable by DNY_ON_L3CHG. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
rgroup.long 0x418++0x3
line.long 0x0 "FSMSTSRCL1_CLUSTER0,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 cluster FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
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hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-A76 cluster FSM. Permitted values are following."
group.long 0x41C++0x7
line.long 0x0 "G2GPRCL1_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLCL1_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 cluster."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
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rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
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bitfld.long 0x4 10. "A2_RTT_MRET,A2 RuntimeTEST using MEM_RET mode enable. The possible values are following." "0: A2 RuntimeTEST using MEM_RET mode is disabled,1: A2 RuntimeTEST using MEM_RET mode is enabled"
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bitfld.long 0x4 9. "A2_RTT_POFF,A2 RuntimeTEST using Pseudo OFF mode enable. The possible values are following." "0: A2 RuntimeTEST using Pseudo OFF mode is disabled,1: A2 RuntimeTEST using Pseudo OFF mode is enabled"
newline
hexmask.long.byte 0x4 2.--8. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 clusters are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76..,1: RuntimeTEST is enabled before Cortex-A76.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x424++0x3
line.long 0x0 "DCLSENCL1,This register is a 32-bit readable register. This register belongs to Group1. This register indicates whether Cortex-A76 cluster is in DCLS mode."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
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bitfld.long 0x0 0. "DCLSEN,Indicates Cortex-A76 cluster is DCLS mode. Permitted values are following." "0: Cortex-A76 cluster is not in DCLS mode,1: Cortex-A76 cluster is in DCLS mode"
group.long 0x428++0x7
line.long 0x0 "DCLSCMPENCL1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls a DCLS comparator for Cortex-A76 cluster."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "DCLSCMPEN,DCLS comparator enable. The possible values are following." "0: DCLS comparator is disabled,1: DCLS comparator is enabled"
line.long 0x4 "GCNTERRENCL1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety mechanism between Generic Counter and Cortex-A76 cluster."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "GCNTERREN,Generic Counter error detection enable. The possible values are following." "0: Error detection is disabled,1: Error detection is enabled"
group.long 0x440++0x7
line.long 0x0 "PWRCTRLCL1_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 cluster x."
hexmask.long.word 0x0 22.--31. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "PCHMRETEN,MEM_RET mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to MEM_RET mode is disabled,?"
newline
bitfld.long 0x0 20. "PCHFRETEN,FUNC_RET mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to FUNC_RET mode is disabled,1: Power mode transition to FUNC_RET mode is enabled"
newline
rbitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enable by P-channel protocol. The possible values are following." "0,1"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "L3CTRLCL1_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register is used for L3 cache partial power down/up."
hexmask.long.word 0x4 19.--31. 1. "Reserved_19,Reserved"
newline
rbitfld.long 0x4 16.--18. "L3STS_2_0,Indicates current L3 cache partial power down/up status. Permitted values are following." "?,1: 1/4 of L3 cache is powered on,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x4 9. "L3DENY,Indicates whether L3 cache partial power down/up request is denied. Permitted values are following." "0: request is not denied,1: request is denied"
newline
bitfld.long 0x4 8. "L3ACCEPT,Indicates whether L3 cache partial power down/up request is accepted. Permitted values are following." "0: request is not accepted,1: request is accepted"
newline
rbitfld.long 0x4 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 4. "L3REQ,L3 cache partial power down/up request. The possible values are following." "0: L3 cache partial power down/up is not requested,1: L3 cache partial power down/up is requested"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x4 0.--2. "L3CTRL_2_0,L3 cache partial power down/up control. The possible values are following." "0: All L3 cache is power-off or..,1: 1/4 of L3 cache is power-on,?,?,?,?,?,?"
group.long 0x44C++0xB
line.long 0x0 "FSMLOCKRCL1_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls a safety mechanism of FSM for Cortex-A76 cluster."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRCL1_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long.word 0x4 23.--31. 1. "Reserved_23,Reserved"
newline
bitfld.long 0x4 22. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 21. "DNY_ON_OFF,Indicates whether a denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 20. "DNY_ON_FUNC,Indicates whether a denied state transition has occurred by power mode transition from ON mode to FUNC_RET mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 19. "DNY_FUNC_ON,Indicates whether a denied state transition has occurred by power mode transition from FUNC_RET mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 18. "DNY_ON_MEM,Indicates whether a denied state transition has occurred by power mode transition from ON mode to MEM_RET mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 17. "DNY_MEM_ON,Indicates whether a denied state transition has occurred by power mode transition from MEM_RET mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 16. "DNY_ON_L3CHG,Indicates whether a denied state transition has occurred by L3 cache partial power mode control. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "PDENYINTRCL1_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.word 0x8 23.--31. 1. "Reserved_23,Reserved"
newline
bitfld.long 0x8 22. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 21. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 20. "INT_ON_FUNC,Issuing interrupt enable by DNY_ON_FUNC. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 19. "INT_FUNC_ON,Issuing interrupt enable by DNY_FUNC_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 18. "INT_ON_MEM,Issuing interrupt enable by DNY_ON_MEM. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 17. "INT_MEM_ON,Issuing interrupt enable by DNY_MEM_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 16. "INT_ON_L3CHG,Issuing interrupt enable by DNY_ON_L3CHG. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
rgroup.long 0x458++0x3
line.long 0x0 "FSMSTSRCL1_CLUSTER1,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 cluster FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-A76 cluster FSM. Permitted values are following."
group.long 0x45C++0x7
line.long 0x0 "G2GPRCL1_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLCL1_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 cluster."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x4 10. "A2_RTT_MRET,A2 RuntimeTEST using MEM_RET mode enable. The possible values are following." "0: A2 RuntimeTEST using MEM_RET mode is disabled,1: A2 RuntimeTEST using MEM_RET mode is enabled"
newline
bitfld.long 0x4 9. "A2_RTT_POFF,A2 RuntimeTEST using Pseudo OFF mode enable. The possible values are following." "0: A2 RuntimeTEST using Pseudo OFF mode is disabled,1: A2 RuntimeTEST using Pseudo OFF mode is enabled"
newline
hexmask.long.byte 0x4 2.--8. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 clusters are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76..,1: RuntimeTEST is enabled before Cortex-A76.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0x800++0x3
line.long 0x0 "PWRCTRLC1_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x0 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x0 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0x80C++0xB
line.long 0x0 "FSMLOCKRC1_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
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bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC1_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC1_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x818++0x3
line.long 0x0 "FSMSTSRC1_CORE0,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0x81C++0x7
line.long 0x0 "G2GPRC1_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC1_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
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bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0x830++0x13
line.long 0x0 "RVBARLC1_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC1_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
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hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC1_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC1_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x10 "PWRCTRLC1_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x10 19.--31. 1. "Reserved_19,Reserved"
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bitfld.long 0x10 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x10 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x10 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x10 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x10 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x10 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x10 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0x84C++0xB
line.long 0x0 "FSMLOCKRC1_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC1_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC1_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x858++0x3
line.long 0x0 "FSMSTSRC1_CORE1,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0x85C++0x7
line.long 0x0 "G2GPRC1_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC1_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0x870++0xF
line.long 0x0 "RVBARLC1_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC1_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC1_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC1_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
group.long 0xA00++0x3
line.long 0x0 "PWRCTRLC1_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x0 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x0 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xA0C++0xB
line.long 0x0 "FSMLOCKRC1_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC1_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC1_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xA18++0x3
line.long 0x0 "FSMSTSRC1_CORE2,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xA1C++0x7
line.long 0x0 "G2GPRC1_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC1_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xA30++0x13
line.long 0x0 "RVBARLC1_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC1_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC1_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC1_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x10 "PWRCTRLC1_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x10 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x10 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x10 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x10 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x10 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x10 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x10 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x10 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xA4C++0xB
line.long 0x0 "FSMLOCKRC1_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
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rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
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rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC1_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC1_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xA58++0x3
line.long 0x0 "FSMSTSRC1_CORE3,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xA5C++0x7
line.long 0x0 "G2GPRC1_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC1_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xA70++0xF
line.long 0x0 "RVBARLC1_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC1_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC1_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC1_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
group.long 0xC00++0x3
line.long 0x0 "PWRCTRLC1_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x0 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x0 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xC0C++0xB
line.long 0x0 "FSMLOCKRC1_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC1_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC1_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xC18++0x3
line.long 0x0 "FSMSTSRC1_CORE4,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xC1C++0x7
line.long 0x0 "G2GPRC1_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC1_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xC30++0x13
line.long 0x0 "RVBARLC1_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC1_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC1_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC1_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x10 "PWRCTRLC1_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x10 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x10 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x10 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x10 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x10 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x10 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x10 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x10 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xC4C++0xB
line.long 0x0 "FSMLOCKRC1_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC1_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC1_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xC58++0x3
line.long 0x0 "FSMSTSRC1_CORE5,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xC5C++0x7
line.long 0x0 "G2GPRC1_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC1_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xC70++0xF
line.long 0x0 "RVBARLC1_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC1_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC1_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC1_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
group.long 0xE00++0x3
line.long 0x0 "PWRCTRLC1_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x0 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x0 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xE0C++0xB
line.long 0x0 "FSMLOCKRC1_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC1_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC1_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xE18++0x3
line.long 0x0 "FSMSTSRC1_CORE6,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xE1C++0x7
line.long 0x0 "G2GPRC1_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC1_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xE30++0x13
line.long 0x0 "RVBARLC1_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC1_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC1_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC1_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x10 "PWRCTRLC1_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x10 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x10 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x10 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x10 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x10 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x10 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x10 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x10 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xE4C++0xB
line.long 0x0 "FSMLOCKRC1_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC1_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC1_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xE58++0x3
line.long 0x0 "FSMSTSRC1_CORE7,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xE5C++0x7
line.long 0x0 "G2GPRC1_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC1_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xE70++0xF
line.long 0x0 "RVBARLC1_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC1_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC1_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC1_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
tree.end
tree "APMU_2"
base ad:0xE6172000
group.long 0x0++0x7
line.long 0x0 "WPCR2,This register is 32-bit readable/writable register. This register doesnsingle_quotationt belong to any Group. This register controls write protect function. This register is implemented one for each Domain."
hexmask.long.word 0x0 16.--31. 1. "Code_Value,Code Value"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "WPE,Write Protect Enable. The possible values are following." "0: Write protect is disabled,1: Write protect is enabled"
line.long 0x4 "WPR2,These registers are 32-bit readable/writable registers. This register doesnsingle_quotationt belong to any Group. This register controls write protect function. This register is implemented one for each Domain."
hexmask.long 0x4 0.--31. 1. "WPRTCT_31_0,If Write Protect is enabled  inverted values need to be set to this field before write access."
group.long 0x18++0x3
line.long 0x0 "D2ACCENR,This register is a 32-bit readable/writable register. This register doesnsingle_quotationt belong to any Group. This register controls access protect function. This register can be accessed by only Domain 0."
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
bitfld.long 0x0 23. "ADMNGRP3,Register protection for Group3 of admin registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 22. "ADMNGRP2,Register protection for Group2 of admin registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 21. "ADMNGRP1,Register protection for Group1 of admin registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 20. "ADMNGRP0,Register protection for Group0 of admin registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 19. "RTGRP3,Register protection for Group3 of CR52's registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 18. "RTGRP2,Register protection for Group2 of CR52single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 17. "RTGRP1,Register protection for Group1 of CR52single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 16. "RTGRP0,Register protection for Group0 of CR52single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
newline
rbitfld.long 0x0 14. "Reserved_14,Reserved" "0,1"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
newline
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
rbitfld.long 0x0 10. "Reserved_10,Reserved" "0,1"
newline
rbitfld.long 0x0 9. "Reserved_9,Reserved" "0,1"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "CL1GRP3,Register protection for Group3 of Cortex-A76 cluster 1single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 6. "CL1GRP2,Register protection for Group2 of Cortex-A76 cluster 1single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 5. "CL1GRP1,Register protection for Group1 of Cortex-A76 cluster 1single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 4. "CL1GRP0,Register protection for Group0 of Cortex-A76 cluster 1single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 3. "CL0GRP3,Register protection for Group3 of Cortex-A76 cluster 0single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 2. "CL0GRP2,Register protection for Group2 of Cortex-A76 cluster 0single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 1. "CL0GRP1,Register protection for Group1 of Cortex-A76 cluster 0single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 0. "CL0GRP0,Register protection for Group0 of Cortex-A76 cluster 0single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
group.long 0x20++0x3
line.long 0x0 "PTCSR2,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls access protect function and holds information of access protection."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "ERR,Indicates whether access error has occurred." "0: error has not occurred,1: error has occurred"
rgroup.long 0x24++0x3
line.long 0x0 "PTERADR2,This register is a 32-bit readable register. This register belongs to Group1. This register holds information of access protection."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "ADDR_15_0,Indicate address causing access error."
group.long 0x28++0x3
line.long 0x0 "DCLSEIJTR2,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls error injection for APMU DCLS error."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "EIJT,Error Injection enable. The possible values are:" "0: error injection is not active,1: error injection is active"
group.long 0x40++0x3
line.long 0x0 "A3PWRCTRL20,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls A3 power domain."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "A3_PDN_EN,Power down enable for A3 power domain. The possible values are following" "0: A3 power domain cannot be powered down,1: A3 power domain is powered down if all A1 and A2.."
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x48++0x3
line.long 0x0 "A3FSMSTSR20,This register is a 32-bit readable register. This register belongs to Group2. This register indicates A3 FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0x50++0x3
line.long 0x0 "A3FSMLOCKR20,This register is a 32-bit readable/writable register. This register belongs to Group2.This register controls a safety mechanism of FSM for A3 power domain."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
newline
rbitfld.long 0x0 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
hexmask.long.byte 0x0 5.--10. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
rgroup.long 0x58++0x7
line.long 0x0 "INTSTSR2,This register is a 32-bit readable register. This register belongs to Group2.This register indicates a factor of interrupt request signal."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x0 16. "A2C0_INT,Indicate whether each A2 domain FSM for Cortex-A76 cluster 0 issues interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
newline
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x0 3. "A1C3_INT,Indicate whether each A1 domain FSM issues for Cortex-A76 core 3 interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
newline
bitfld.long 0x0 2. "A1C2_INT,Indicate whether each A1 domain FSM issues for Cortex-A76 core 2 interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
newline
bitfld.long 0x0 1. "A1C1_INT,Indicate whether each A1 domain FSM issues for Cortex-A76 core 1 interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
newline
bitfld.long 0x0 0. "A1C0_INT,Indicate whether each A1 domain FSM issues for Cortex-A76 core 0 interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
line.long 0x4 "ERRSTSR2,This register is a 32-bit readable register. This register belongs to Group2.This register indicates whether each FSM finds fault."
bitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
newline
bitfld.long 0x4 30. "CR52_ERR2,Indicates whether error flag is set in FSMLOCKRCR522. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 29. "CR52_ERR1,Indicates whether error flag is set in FSMLOCKRCR521. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 28. "CR52_ERR0,Indicates whether error flag is set in FSMLOCKRCR520. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 25.--27. "Reserved_25,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 24. "A3S0_ERR,Indicates whether error flag is set in A3FSMLOCKRx. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x4 16. "A2S0_ERR,Indicates whether error flag is set in FSMLOCKRCL0. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
hexmask.long.word 0x4 4.--15. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x4 3. "A1C3_ERR,Indicates whether error flag is set in FSMLOCKRC3. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 2. "A1C2_ERR,Indicates whether error flag is set in FSMLOCKRC2. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 1. "A1C1_ERR,Indicates whether error flag is set in FSMLOCKRC1. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 0. "A1C0_ERR,Indicates whether error flag is set in FSMLOCKRC0. Permitted values are following." "0: Error is not detected,1: Error is detected"
group.long 0x60++0x3
line.long 0x0 "FRSTR2,This register is a 32-bit readable/writable register. This register belongs to Group1. This register control forced reset function."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
newline
rbitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x0 16. "FRSTRCL0,Forced reset request for each Cortex-A76 cluster 0.The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
newline
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x0 3. "FRSTRC3,Forced reset request for each Cortex-A76 core 3. The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
newline
bitfld.long 0x0 2. "FRSTRC2,Forced reset request for each Cortex-A76 core 2. The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
newline
bitfld.long 0x0 1. "FRSTRC1,Forced reset request for each Cortex-A76 core 1. The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
newline
bitfld.long 0x0 0. "FRSTRC0,Forced reset request for each Cortex-A76 core 0. The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
group.long 0x68++0x3
line.long 0x0 "FRSTCTRL2,"
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
newline
bitfld.long 0x0 30. "FRST_MOD_DBG,Forced reset modification in debug mode. The possible values are following." "0: All reset signals are asserted by forced reset..,1: Only warm reset of Cortex-A76 is asserted by.."
newline
bitfld.long 0x0 29. "CLKPAUSE_EN,Clock pause enable when Cortex-A76 reset is asserting. The possible values are following." "0: Clock pause is disabled when Cortex-A76 reset is..,1: Clock pause is enabled when Cortex-A76 reset is.."
newline
rbitfld.long 0x0 27.--28. "Reserved_27,Reserved" "0,1,2,3"
newline
hexmask.long 0x0 0.--26. 1. "Reserved_0,Reserved"
group.long 0x80++0x7
line.long 0x0 "PADDCHKSTSR2,This register is a 32-bit readable/writable register. This register belongs to Group1. This register holds error information detected by Safety mechanism for APB bus interface."
bitfld.long 0x0 31. "PADD_CHK_SID_CLR,PADD_CHK_SID clear bit. PADD_CHK_SID is cleared by writing 1 to this bit." "0,1"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "PADD_CHK_SID_7_0,Indicates Source ID of fault transaction detected PADD_CHK mechanism."
line.long 0x4 "PWDATACHKSTSR2,This register is a 32-bit readable/writable register. This register belongs to Group1. This register holds error information detected by Safety mechanism for APB bus interface."
bitfld.long 0x4 31. "PWDATA_CHK_SID_CLR,PWDATA_CHK_SID clear bit. PWDATA_CHK_SID is cleared by writing 1 to this bit." "0,1"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "PWDATA_CHK_SID_7_0,Indicates Source ID of fault transaction detected PWDATA_CHK mechanism."
group.long 0x300++0x17
line.long 0x0 "CR52CR02,This register is a 32-bit readable/writable register. This register belongs to Group0. This register controls configuration of Cortex-R52."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
newline
bitfld.long 0x0 30. "NCPUHALT,NCPUHALT means inverted value of CPUHALT defined in Cortex-R52 TRM. The possible values are following." "0: Processor halt after reset,1: No processor halt after reset"
newline
bitfld.long 0x0 29. "CFGRAMPROTEN,CFGRAMPROTEN defined in Cortex-R52 TRM. The possible values are following." "0: RAM memory protection is disabled out of reset,1: RAM memory protection is enabled out of reset"
newline
bitfld.long 0x0 28. "CFGTCMBOOT,CFGTCMBOOT defined in Cortex-R52 TRM. The possible values are following." "0: ATCM is disabled out of reset,1: ATCM is enabled and at address 0x0 out of reset"
newline
bitfld.long 0x0 27. "CFGINITREG,CFGINITREG defined in Cortex-R52 TRM. The possible values are following." "0: Program-visible registers are not initialized to..,1: Program-visible registers are initialized to.."
newline
bitfld.long 0x0 26. "CFGL1CACHEINVDIS0,CFGL1CACHEINVDIS defined in Cortex-R52 TRM. The possible values are following." "0: Automatic post-reset L1 cache invalidate is..,1: Automatic post-reset L1 cache invalidate is.."
newline
hexmask.long 0x0 0.--25. 1. "Reserved_0,Reserved"
line.long 0x4 "CR52RSTCTRL02,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls reset operation for Cortex-R52."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "CR52RST,Cortex-R52 reset. Indicates Cortex-R52 reset status. The initial value depends on Mode PIN configuration. Permitted values are following." "0: All Cortex-R52 resets are negated,1: All Cortex-R52 resets are asserted"
line.long 0x8 "CR52PWRCTRL02,"
hexmask.long.word 0x8 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x8 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x8 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x8 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x8 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
line.long 0xC "FSMLOCKRCR5202,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-R52 reset control."
hexmask.long.word 0xC 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
newline
rbitfld.long 0xC 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0xC 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0xC 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
hexmask.long.byte 0xC 5.--10. 1. "Reserved_5,Reserved"
newline
bitfld.long 0xC 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
rbitfld.long 0xC 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x10 "PDENYSTSRCLCR5202,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long 0x10 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x10 5. "DNY_ON_DBGLOW,Indicates whether a denied state transition has occurred by power mode transition from ON mode to Debug over LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x10 4. "DNY_DBGLOW_ON,Indicates whether a denied state transition has occurred by power mode transition from Debug over LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x10 3. "DNY_ON_LOWPOWER,Indicates whether a denied state transition has occurred by power mode transition from ON mode to LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x10 2. "DNY_LOWPOWER_ON,Indicates whether a denied state transition has occurred by power mode transition from LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x10 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x10 0. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
line.long 0x14 "PDENYINTRCLCR5202,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long 0x14 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x14 5. "INT_ON_DBGLOW,Issuing interrupt enable by DNY_ON_DBGLOW. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x14 4. "INT_DBGLOW_ON,Issuing interrupt enable by DNY_DBGLOW_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x14 3. "INT_ON_LOWPOWER,Issuing interrupt enable by DNY_ON_LOWPOWER. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x14 2. "INT_LOWPOWER_ON,Issuing interrupt enable by DNY_LOWPOWER_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x14 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x14 0. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
rgroup.long 0x318++0x3
line.long 0x0 "FSMSTSRCR5202,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-R52 FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-R52 FSM. The permitted values are following."
group.long 0x31C++0x3
line.long 0x0 "G2GPRCR5202,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
group.long 0x328++0x2F
line.long 0x0 "CR52CMPEN02,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls Cortex-R52 DCLS comparator. When NSRCMPEN is set to 1. Realtime Core detects the toggles of non-safety related operations and/or.."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "NSRCMPEN,Non-safety- related comparator enable. The possible values are following." "0: Comparator for Non-safety-related signals is..,1: Comparator for Non-safety-related signals is.."
newline
bitfld.long 0x0 0. "CMPEN,Comparator enables. The possible values are following." "0: Comparator is disabled,1: Comparator is enabled"
line.long 0x4 "GCNTERRENCR5202,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety mechanism between Generic Counter and Cortex-R52."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "GCNTERREN,Generic Counter error detection enable. The possible values are following." "0: Error detection is disabled,1: Error detection is enabled"
line.long 0x8 "CR52RVBAR02,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x8 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
newline
hexmask.long.byte 0x8 0.--4. 1. "Reserved_0,Reserved"
line.long 0xC "CR52BAR02,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR. After completing the setting of RBAR with BAREN = 0..."
hexmask.long.word 0xC 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
newline
hexmask.long.word 0xC 5.--17. 1. "Reserved_5,Reserved"
newline
bitfld.long 0xC 4. "BAREN,BAR enables. The possible values are:" "0,1"
newline
rbitfld.long 0xC 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
rbitfld.long 0xC 0.--1. "BTMD_1_0,Boot Mode. Indicates boot area of Cortex-R52. Permitted values are following." "0: RBAR is assigned for boot address,?,?,?"
line.long 0x10 "CR52RVBARP02,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x10 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
newline
hexmask.long.byte 0x10 1.--4. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x10 0. "VLD,CR52RVBARP valid. The possible values are following." "0: CR52RVBAR is used to define CFGVECTABLE for..,1: CR52RVBARP is used to define CFGVECTABLE for.."
line.long 0x14 "CR52BARP02,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR and VLD. After completing the setting of RBAR and VLD.."
hexmask.long.word 0x14 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
newline
hexmask.long.word 0x14 5.--17. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x14 4. "BAREN,BAR enables. The possible values are following." "0: RBAR is not valid,1: RBAR is valid"
newline
rbitfld.long 0x14 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x14 0. "VLD,CR52BARP valid. The possible values are following." "0: CR52BAR is used to define Boot Address of..,1: CR52BARP is used to define Boot Address of.."
line.long 0x18 "CR52CR12,This register is a 32-bit readable/writable register. This register belongs to Group0. This register controls configuration of Cortex-R52."
rbitfld.long 0x18 31. "Reserved_31,Reserved" "0,1"
newline
bitfld.long 0x18 30. "NCPUHALT,NCPUHALT means inverted value of CPUHALT defined in Cortex-R52 TRM. The possible values are following." "0: Processor halt after reset,1: No processor halt after reset"
newline
bitfld.long 0x18 29. "CFGRAMPROTEN,CFGRAMPROTEN defined in Cortex-R52 TRM. The possible values are following." "0: RAM memory protection is disabled out of reset,1: RAM memory protection is enabled out of reset"
newline
bitfld.long 0x18 28. "CFGTCMBOOT,CFGTCMBOOT defined in Cortex-R52 TRM. The possible values are following." "0: ATCM is disabled out of reset,1: ATCM is enabled and at address 0x0 out of reset"
newline
bitfld.long 0x18 27. "CFGINITREG,CFGINITREG defined in Cortex-R52 TRM. The possible values are following." "0: Program-visible registers are not initialized to..,1: Program-visible registers are initialized to.."
newline
bitfld.long 0x18 26. "CFGL1CACHEINVDIS0,CFGL1CACHEINVDIS defined in Cortex-R52 TRM. The possible values are following." "0: Automatic post-reset L1 cache invalidate is..,1: Automatic post-reset L1 cache invalidate is.."
newline
hexmask.long 0x18 0.--25. 1. "Reserved_0,Reserved"
line.long 0x1C "CR52RSTCTRL12,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls reset operation for Cortex-R52."
hexmask.long 0x1C 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x1C 0. "CR52RST,Cortex-R52 reset. Indicates Cortex-R52 reset status. The initial value depends on Mode PIN configuration. Permitted values are following." "0: All Cortex-R52 resets are negated,1: All Cortex-R52 resets are asserted"
line.long 0x20 "CR52PWRCTRL12,"
hexmask.long.word 0x20 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x20 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x20 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x20 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x20 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
line.long 0x24 "FSMLOCKRCR5212,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-R52 reset control."
hexmask.long.word 0x24 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
newline
rbitfld.long 0x24 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x24 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x24 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
hexmask.long.byte 0x24 5.--10. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x24 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
rbitfld.long 0x24 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x24 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x28 "PDENYSTSRCLCR5212,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long 0x28 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x28 5. "DNY_ON_DBGLOW,Indicates whether a denied state transition has occurred by power mode transition from ON mode to Debug over LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x28 4. "DNY_DBGLOW_ON,Indicates whether a denied state transition has occurred by power mode transition from Debug over LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x28 3. "DNY_ON_LOWPOWER,Indicates whether a denied state transition has occurred by power mode transition from ON mode to LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x28 2. "DNY_LOWPOWER_ON,Indicates whether a denied state transition has occurred by power mode transition from LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x28 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x28 0. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
line.long 0x2C "PDENYINTRCLCR5212,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long 0x2C 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x2C 5. "INT_ON_DBGLOW,Issuing interrupt enable by DNY_ON_DBGLOW. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x2C 4. "INT_DBGLOW_ON,Issuing interrupt enable by DNY_DBGLOW_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x2C 3. "INT_ON_LOWPOWER,Issuing interrupt enable by DNY_ON_LOWPOWER. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x2C 2. "INT_LOWPOWER_ON,Issuing interrupt enable by DNY_LOWPOWER_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x2C 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x2C 0. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
rgroup.long 0x358++0x3
line.long 0x0 "FSMSTSRCR5212,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-R52 FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-R52 FSM. The permitted values are following."
group.long 0x35C++0x3
line.long 0x0 "G2GPRCR5212,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
group.long 0x368++0x2F
line.long 0x0 "CR52CMPEN12,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls Cortex-R52 DCLS comparator. When NSRCMPEN is set to 1. Realtime Core detects the toggles of non-safety related operations and/or.."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "NSRCMPEN,Non-safety- related comparator enable. The possible values are following." "0: Comparator for Non-safety-related signals is..,1: Comparator for Non-safety-related signals is.."
newline
bitfld.long 0x0 0. "CMPEN,Comparator enables. The possible values are following." "0: Comparator is disabled,1: Comparator is enabled"
line.long 0x4 "GCNTERRENCR5212,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety mechanism between Generic Counter and Cortex-R52."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "GCNTERREN,Generic Counter error detection enable. The possible values are following." "0: Error detection is disabled,1: Error detection is enabled"
line.long 0x8 "CR52RVBAR12,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x8 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
newline
hexmask.long.byte 0x8 0.--4. 1. "Reserved_0,Reserved"
line.long 0xC "CR52BAR12,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR. After completing the setting of RBAR with BAREN = 0..."
hexmask.long.word 0xC 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
newline
hexmask.long.word 0xC 5.--17. 1. "Reserved_5,Reserved"
newline
bitfld.long 0xC 4. "BAREN,BAR enables. The possible values are:" "0,1"
newline
rbitfld.long 0xC 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
rbitfld.long 0xC 0.--1. "BTMD_1_0,Boot Mode. Indicates boot area of Cortex-R52. Permitted values are following." "0: RBAR is assigned for boot address,?,?,?"
line.long 0x10 "CR52RVBARP12,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x10 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
newline
hexmask.long.byte 0x10 1.--4. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x10 0. "VLD,CR52RVBARP valid. The possible values are following." "0: CR52RVBAR is used to define CFGVECTABLE for..,1: CR52RVBARP is used to define CFGVECTABLE for.."
line.long 0x14 "CR52BARP12,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR and VLD. After completing the setting of RBAR and VLD.."
hexmask.long.word 0x14 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
newline
hexmask.long.word 0x14 5.--17. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x14 4. "BAREN,BAR enables. The possible values are following." "0: RBAR is not valid,1: RBAR is valid"
newline
rbitfld.long 0x14 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x14 0. "VLD,CR52BARP valid. The possible values are following." "0: CR52BAR is used to define Boot Address of..,1: CR52BARP is used to define Boot Address of.."
line.long 0x18 "CR52CR22,This register is a 32-bit readable/writable register. This register belongs to Group0. This register controls configuration of Cortex-R52."
rbitfld.long 0x18 31. "Reserved_31,Reserved" "0,1"
newline
bitfld.long 0x18 30. "NCPUHALT,NCPUHALT means inverted value of CPUHALT defined in Cortex-R52 TRM. The possible values are following." "0: Processor halt after reset,1: No processor halt after reset"
newline
bitfld.long 0x18 29. "CFGRAMPROTEN,CFGRAMPROTEN defined in Cortex-R52 TRM. The possible values are following." "0: RAM memory protection is disabled out of reset,1: RAM memory protection is enabled out of reset"
newline
bitfld.long 0x18 28. "CFGTCMBOOT,CFGTCMBOOT defined in Cortex-R52 TRM. The possible values are following." "0: ATCM is disabled out of reset,1: ATCM is enabled and at address 0x0 out of reset"
newline
bitfld.long 0x18 27. "CFGINITREG,CFGINITREG defined in Cortex-R52 TRM. The possible values are following." "0: Program-visible registers are not initialized to..,1: Program-visible registers are initialized to.."
newline
bitfld.long 0x18 26. "CFGL1CACHEINVDIS0,CFGL1CACHEINVDIS defined in Cortex-R52 TRM. The possible values are following." "0: Automatic post-reset L1 cache invalidate is..,1: Automatic post-reset L1 cache invalidate is.."
newline
hexmask.long 0x18 0.--25. 1. "Reserved_0,Reserved"
line.long 0x1C "CR52RSTCTRL22,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls reset operation for Cortex-R52."
hexmask.long 0x1C 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x1C 0. "CR52RST,Cortex-R52 reset. Indicates Cortex-R52 reset status. The initial value depends on Mode PIN configuration. Permitted values are following." "0: All Cortex-R52 resets are negated,1: All Cortex-R52 resets are asserted"
line.long 0x20 "CR52PWRCTRL22,"
hexmask.long.word 0x20 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x20 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x20 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x20 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x20 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
line.long 0x24 "FSMLOCKRCR5222,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-R52 reset control."
hexmask.long.word 0x24 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
newline
rbitfld.long 0x24 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x24 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
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bitfld.long 0x24 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
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hexmask.long.byte 0x24 5.--10. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x24 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
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rbitfld.long 0x24 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x24 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x28 "PDENYSTSRCLCR5222,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long 0x28 6.--31. 1. "Reserved_6,Reserved"
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bitfld.long 0x28 5. "DNY_ON_DBGLOW,Indicates whether a denied state transition has occurred by power mode transition from ON mode to Debug over LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x28 4. "DNY_DBGLOW_ON,Indicates whether a denied state transition has occurred by power mode transition from Debug over LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x28 3. "DNY_ON_LOWPOWER,Indicates whether a denied state transition has occurred by power mode transition from ON mode to LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x28 2. "DNY_LOWPOWER_ON,Indicates whether a denied state transition has occurred by power mode transition from LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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rbitfld.long 0x28 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x28 0. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
line.long 0x2C "PDENYINTRCLCR5222,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long 0x2C 6.--31. 1. "Reserved_6,Reserved"
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bitfld.long 0x2C 5. "INT_ON_DBGLOW,Issuing interrupt enable by DNY_ON_DBGLOW. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
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bitfld.long 0x2C 4. "INT_DBGLOW_ON,Issuing interrupt enable by DNY_DBGLOW_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
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bitfld.long 0x2C 3. "INT_ON_LOWPOWER,Issuing interrupt enable by DNY_ON_LOWPOWER. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x2C 2. "INT_LOWPOWER_ON,Issuing interrupt enable by DNY_LOWPOWER_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x2C 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x2C 0. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
rgroup.long 0x398++0x3
line.long 0x0 "FSMSTSRCR5222,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-R52 FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
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hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-R52 FSM. The permitted values are following."
group.long 0x39C++0x3
line.long 0x0 "G2GPRCR5222,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
group.long 0x3A8++0x17
line.long 0x0 "CR52CMPEN22,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls Cortex-R52 DCLS comparator. When NSRCMPEN is set to 1. Realtime Core detects the toggles of non-safety related operations and/or.."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
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bitfld.long 0x0 1. "NSRCMPEN,Non-safety- related comparator enable. The possible values are following." "0: Comparator for Non-safety-related signals is..,1: Comparator for Non-safety-related signals is.."
newline
bitfld.long 0x0 0. "CMPEN,Comparator enables. The possible values are following." "0: Comparator is disabled,1: Comparator is enabled"
line.long 0x4 "GCNTERRENCR5222,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety mechanism between Generic Counter and Cortex-R52."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
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bitfld.long 0x4 0. "GCNTERREN,Generic Counter error detection enable. The possible values are following." "0: Error detection is disabled,1: Error detection is enabled"
line.long 0x8 "CR52RVBAR22,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x8 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
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hexmask.long.byte 0x8 0.--4. 1. "Reserved_0,Reserved"
line.long 0xC "CR52BAR22,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR. After completing the setting of RBAR with BAREN = 0..."
hexmask.long.word 0xC 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
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hexmask.long.word 0xC 5.--17. 1. "Reserved_5,Reserved"
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bitfld.long 0xC 4. "BAREN,BAR enables. The possible values are:" "0,1"
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rbitfld.long 0xC 2.--3. "Reserved_2,Reserved" "0,1,2,3"
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rbitfld.long 0xC 0.--1. "BTMD_1_0,Boot Mode. Indicates boot area of Cortex-R52. Permitted values are following." "0: RBAR is assigned for boot address,?,?,?"
line.long 0x10 "CR52RVBARP22,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x10 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
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hexmask.long.byte 0x10 1.--4. 1. "Reserved_1,Reserved"
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bitfld.long 0x10 0. "VLD,CR52RVBARP valid. The possible values are following." "0: CR52RVBAR is used to define CFGVECTABLE for..,1: CR52RVBARP is used to define CFGVECTABLE for.."
line.long 0x14 "CR52BARP22,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR and VLD. After completing the setting of RBAR and VLD.."
hexmask.long.word 0x14 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
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hexmask.long.word 0x14 5.--17. 1. "Reserved_5,Reserved"
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bitfld.long 0x14 4. "BAREN,BAR enables. The possible values are following." "0: RBAR is not valid,1: RBAR is valid"
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rbitfld.long 0x14 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x14 0. "VLD,CR52BARP valid. The possible values are following." "0: CR52BAR is used to define Boot Address of..,1: CR52BARP is used to define Boot Address of.."
group.long 0x400++0x7
line.long 0x0 "PWRCTRLCL2_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 cluster x."
hexmask.long.word 0x0 22.--31. 1. "Reserved_22,Reserved"
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bitfld.long 0x0 21. "PCHMRETEN,MEM_RET mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to MEM_RET mode is disabled,?"
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bitfld.long 0x0 20. "PCHFRETEN,FUNC_RET mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to FUNC_RET mode is disabled,1: Power mode transition to FUNC_RET mode is enabled"
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rbitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
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bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enable by P-channel protocol. The possible values are following." "0,1"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
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hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "L3CTRLCL2_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register is used for L3 cache partial power down/up."
hexmask.long.word 0x4 19.--31. 1. "Reserved_19,Reserved"
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rbitfld.long 0x4 16.--18. "L3STS_2_0,Indicates current L3 cache partial power down/up status. Permitted values are following." "?,1: 1/4 of L3 cache is powered on,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
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bitfld.long 0x4 9. "L3DENY,Indicates whether L3 cache partial power down/up request is denied. Permitted values are following." "0: request is not denied,1: request is denied"
newline
bitfld.long 0x4 8. "L3ACCEPT,Indicates whether L3 cache partial power down/up request is accepted. Permitted values are following." "0: request is not accepted,1: request is accepted"
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rbitfld.long 0x4 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 4. "L3REQ,L3 cache partial power down/up request. The possible values are following." "0: L3 cache partial power down/up is not requested,1: L3 cache partial power down/up is requested"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x4 0.--2. "L3CTRL_2_0,L3 cache partial power down/up control. The possible values are following." "0: All L3 cache is power-off or..,1: 1/4 of L3 cache is power-on,?,?,?,?,?,?"
group.long 0x40C++0xB
line.long 0x0 "FSMLOCKRCL2_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls a safety mechanism of FSM for Cortex-A76 cluster."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
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rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
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rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
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rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
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rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
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bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
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bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
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rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRCL2_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long.word 0x4 23.--31. 1. "Reserved_23,Reserved"
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bitfld.long 0x4 22. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 21. "DNY_ON_OFF,Indicates whether a denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 20. "DNY_ON_FUNC,Indicates whether a denied state transition has occurred by power mode transition from ON mode to FUNC_RET mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x4 19. "DNY_FUNC_ON,Indicates whether a denied state transition has occurred by power mode transition from FUNC_RET mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x4 18. "DNY_ON_MEM,Indicates whether a denied state transition has occurred by power mode transition from ON mode to MEM_RET mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x4 17. "DNY_MEM_ON,Indicates whether a denied state transition has occurred by power mode transition from MEM_RET mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 16. "DNY_ON_L3CHG,Indicates whether a denied state transition has occurred by L3 cache partial power mode control. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "PDENYINTRCL2_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.word 0x8 23.--31. 1. "Reserved_23,Reserved"
newline
bitfld.long 0x8 22. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 21. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 20. "INT_ON_FUNC,Issuing interrupt enable by DNY_ON_FUNC. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 19. "INT_FUNC_ON,Issuing interrupt enable by DNY_FUNC_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 18. "INT_ON_MEM,Issuing interrupt enable by DNY_ON_MEM. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 17. "INT_MEM_ON,Issuing interrupt enable by DNY_MEM_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 16. "INT_ON_L3CHG,Issuing interrupt enable by DNY_ON_L3CHG. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
rgroup.long 0x418++0x3
line.long 0x0 "FSMSTSRCL2_CLUSTER0,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 cluster FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-A76 cluster FSM. Permitted values are following."
group.long 0x41C++0x7
line.long 0x0 "G2GPRCL2_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLCL2_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 cluster."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x4 10. "A2_RTT_MRET,A2 RuntimeTEST using MEM_RET mode enable. The possible values are following." "0: A2 RuntimeTEST using MEM_RET mode is disabled,1: A2 RuntimeTEST using MEM_RET mode is enabled"
newline
bitfld.long 0x4 9. "A2_RTT_POFF,A2 RuntimeTEST using Pseudo OFF mode enable. The possible values are following." "0: A2 RuntimeTEST using Pseudo OFF mode is disabled,1: A2 RuntimeTEST using Pseudo OFF mode is enabled"
newline
hexmask.long.byte 0x4 2.--8. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 clusters are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76..,1: RuntimeTEST is enabled before Cortex-A76.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x424++0x3
line.long 0x0 "DCLSENCL2,This register is a 32-bit readable register. This register belongs to Group1. This register indicates whether Cortex-A76 cluster is in DCLS mode."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "DCLSEN,Indicates Cortex-A76 cluster is DCLS mode. Permitted values are following." "0: Cortex-A76 cluster is not in DCLS mode,1: Cortex-A76 cluster is in DCLS mode"
group.long 0x428++0x7
line.long 0x0 "DCLSCMPENCL2,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls a DCLS comparator for Cortex-A76 cluster."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "DCLSCMPEN,DCLS comparator enable. The possible values are following." "0: DCLS comparator is disabled,1: DCLS comparator is enabled"
line.long 0x4 "GCNTERRENCL2,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety mechanism between Generic Counter and Cortex-A76 cluster."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "GCNTERREN,Generic Counter error detection enable. The possible values are following." "0: Error detection is disabled,1: Error detection is enabled"
group.long 0x440++0x7
line.long 0x0 "PWRCTRLCL2_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 cluster x."
hexmask.long.word 0x0 22.--31. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "PCHMRETEN,MEM_RET mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to MEM_RET mode is disabled,?"
newline
bitfld.long 0x0 20. "PCHFRETEN,FUNC_RET mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to FUNC_RET mode is disabled,1: Power mode transition to FUNC_RET mode is enabled"
newline
rbitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enable by P-channel protocol. The possible values are following." "0,1"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "L3CTRLCL2_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register is used for L3 cache partial power down/up."
hexmask.long.word 0x4 19.--31. 1. "Reserved_19,Reserved"
newline
rbitfld.long 0x4 16.--18. "L3STS_2_0,Indicates current L3 cache partial power down/up status. Permitted values are following." "?,1: 1/4 of L3 cache is powered on,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x4 9. "L3DENY,Indicates whether L3 cache partial power down/up request is denied. Permitted values are following." "0: request is not denied,1: request is denied"
newline
bitfld.long 0x4 8. "L3ACCEPT,Indicates whether L3 cache partial power down/up request is accepted. Permitted values are following." "0: request is not accepted,1: request is accepted"
newline
rbitfld.long 0x4 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 4. "L3REQ,L3 cache partial power down/up request. The possible values are following." "0: L3 cache partial power down/up is not requested,1: L3 cache partial power down/up is requested"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x4 0.--2. "L3CTRL_2_0,L3 cache partial power down/up control. The possible values are following." "0: All L3 cache is power-off or..,1: 1/4 of L3 cache is power-on,?,?,?,?,?,?"
group.long 0x44C++0xB
line.long 0x0 "FSMLOCKRCL2_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls a safety mechanism of FSM for Cortex-A76 cluster."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
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rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
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bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRCL2_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long.word 0x4 23.--31. 1. "Reserved_23,Reserved"
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bitfld.long 0x4 22. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x4 21. "DNY_ON_OFF,Indicates whether a denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 20. "DNY_ON_FUNC,Indicates whether a denied state transition has occurred by power mode transition from ON mode to FUNC_RET mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x4 19. "DNY_FUNC_ON,Indicates whether a denied state transition has occurred by power mode transition from FUNC_RET mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 18. "DNY_ON_MEM,Indicates whether a denied state transition has occurred by power mode transition from ON mode to MEM_RET mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x4 17. "DNY_MEM_ON,Indicates whether a denied state transition has occurred by power mode transition from MEM_RET mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 16. "DNY_ON_L3CHG,Indicates whether a denied state transition has occurred by L3 cache partial power mode control. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "PDENYINTRCL2_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.word 0x8 23.--31. 1. "Reserved_23,Reserved"
newline
bitfld.long 0x8 22. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 21. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 20. "INT_ON_FUNC,Issuing interrupt enable by DNY_ON_FUNC. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 19. "INT_FUNC_ON,Issuing interrupt enable by DNY_FUNC_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 18. "INT_ON_MEM,Issuing interrupt enable by DNY_ON_MEM. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 17. "INT_MEM_ON,Issuing interrupt enable by DNY_MEM_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 16. "INT_ON_L3CHG,Issuing interrupt enable by DNY_ON_L3CHG. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
rgroup.long 0x458++0x3
line.long 0x0 "FSMSTSRCL2_CLUSTER1,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 cluster FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
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hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-A76 cluster FSM. Permitted values are following."
group.long 0x45C++0x7
line.long 0x0 "G2GPRCL2_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLCL2_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 cluster."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
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rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x4 10. "A2_RTT_MRET,A2 RuntimeTEST using MEM_RET mode enable. The possible values are following." "0: A2 RuntimeTEST using MEM_RET mode is disabled,1: A2 RuntimeTEST using MEM_RET mode is enabled"
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bitfld.long 0x4 9. "A2_RTT_POFF,A2 RuntimeTEST using Pseudo OFF mode enable. The possible values are following." "0: A2 RuntimeTEST using Pseudo OFF mode is disabled,1: A2 RuntimeTEST using Pseudo OFF mode is enabled"
newline
hexmask.long.byte 0x4 2.--8. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 clusters are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76..,1: RuntimeTEST is enabled before Cortex-A76.."
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rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0x800++0x3
line.long 0x0 "PWRCTRLC2_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
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bitfld.long 0x0 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved"
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bitfld.long 0x0 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
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bitfld.long 0x0 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
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rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0x80C++0xB
line.long 0x0 "FSMLOCKRC2_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
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rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
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rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
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rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
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rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
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bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC2_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
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bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC2_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x818++0x3
line.long 0x0 "FSMSTSRC2_CORE0,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
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hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0x81C++0x7
line.long 0x0 "G2GPRC2_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC2_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
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bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0x830++0x13
line.long 0x0 "RVBARLC2_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC2_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC2_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC2_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x10 "PWRCTRLC2_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x10 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x10 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x10 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x10 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x10 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x10 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x10 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x10 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0x84C++0xB
line.long 0x0 "FSMLOCKRC2_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC2_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC2_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x858++0x3
line.long 0x0 "FSMSTSRC2_CORE1,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0x85C++0x7
line.long 0x0 "G2GPRC2_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC2_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0x870++0xF
line.long 0x0 "RVBARLC2_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC2_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC2_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC2_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
group.long 0xA00++0x3
line.long 0x0 "PWRCTRLC2_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x0 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x0 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xA0C++0xB
line.long 0x0 "FSMLOCKRC2_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
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rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC2_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC2_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xA18++0x3
line.long 0x0 "FSMSTSRC2_CORE2,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xA1C++0x7
line.long 0x0 "G2GPRC2_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC2_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xA30++0x13
line.long 0x0 "RVBARLC2_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC2_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC2_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC2_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x10 "PWRCTRLC2_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x10 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x10 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x10 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x10 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x10 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x10 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x10 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x10 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xA4C++0xB
line.long 0x0 "FSMLOCKRC2_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC2_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC2_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xA58++0x3
line.long 0x0 "FSMSTSRC2_CORE3,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xA5C++0x7
line.long 0x0 "G2GPRC2_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC2_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xA70++0xF
line.long 0x0 "RVBARLC2_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC2_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC2_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC2_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
group.long 0xC00++0x3
line.long 0x0 "PWRCTRLC2_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x0 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x0 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xC0C++0xB
line.long 0x0 "FSMLOCKRC2_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
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rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
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bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC2_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC2_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xC18++0x3
line.long 0x0 "FSMSTSRC2_CORE4,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
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hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xC1C++0x7
line.long 0x0 "G2GPRC2_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC2_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
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bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xC30++0x13
line.long 0x0 "RVBARLC2_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC2_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
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hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC2_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC2_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x10 "PWRCTRLC2_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x10 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x10 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x10 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x10 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x10 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x10 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x10 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x10 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xC4C++0xB
line.long 0x0 "FSMLOCKRC2_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC2_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC2_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xC58++0x3
line.long 0x0 "FSMSTSRC2_CORE5,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xC5C++0x7
line.long 0x0 "G2GPRC2_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC2_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xC70++0xF
line.long 0x0 "RVBARLC2_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC2_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC2_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC2_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
group.long 0xE00++0x3
line.long 0x0 "PWRCTRLC2_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x0 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x0 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xE0C++0xB
line.long 0x0 "FSMLOCKRC2_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC2_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC2_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xE18++0x3
line.long 0x0 "FSMSTSRC2_CORE6,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xE1C++0x7
line.long 0x0 "G2GPRC2_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC2_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xE30++0x13
line.long 0x0 "RVBARLC2_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC2_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC2_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC2_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x10 "PWRCTRLC2_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x10 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x10 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x10 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x10 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x10 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x10 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x10 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x10 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xE4C++0xB
line.long 0x0 "FSMLOCKRC2_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC2_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC2_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xE58++0x3
line.long 0x0 "FSMSTSRC2_CORE7,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xE5C++0x7
line.long 0x0 "G2GPRC2_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC2_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xE70++0xF
line.long 0x0 "RVBARLC2_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC2_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC2_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC2_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
tree.end
tree "APMU_3"
base ad:0xE6173000
group.long 0x0++0x7
line.long 0x0 "WPCR3,This register is 32-bit readable/writable register. This register doesnsingle_quotationt belong to any Group. This register controls write protect function. This register is implemented one for each Domain."
hexmask.long.word 0x0 16.--31. 1. "Code_Value,Code Value"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "WPE,Write Protect Enable. The possible values are following." "0: Write protect is disabled,1: Write protect is enabled"
line.long 0x4 "WPR3,These registers are 32-bit readable/writable registers. This register doesnsingle_quotationt belong to any Group. This register controls write protect function. This register is implemented one for each Domain."
hexmask.long 0x4 0.--31. 1. "WPRTCT_31_0,If Write Protect is enabled  inverted values need to be set to this field before write access."
group.long 0x1C++0x7
line.long 0x0 "D3ACCENR,This register is a 32-bit readable/writable register. This register doesnsingle_quotationt belong to any Group. This register controls access protect function. This register can be accessed by only Domain 0."
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
bitfld.long 0x0 23. "ADMNGRP3,Register protection for Group3 of admin registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 22. "ADMNGRP2,Register protection for Group2 of admin registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 21. "ADMNGRP1,Register protection for Group1 of admin registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 20. "ADMNGRP0,Register protection for Group0 of admin registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 19. "RTGRP3,Register protection for Group3 of CR52's registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 18. "RTGRP2,Register protection for Group2 of CR52single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 17. "RTGRP1,Register protection for Group1 of CR52single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 16. "RTGRP0,Register protection for Group0 of CR52single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
newline
rbitfld.long 0x0 14. "Reserved_14,Reserved" "0,1"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
newline
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
rbitfld.long 0x0 10. "Reserved_10,Reserved" "0,1"
newline
rbitfld.long 0x0 9. "Reserved_9,Reserved" "0,1"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "CL1GRP3,Register protection for Group3 of Cortex-A76 cluster 1single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 6. "CL1GRP2,Register protection for Group2 of Cortex-A76 cluster 1single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 5. "CL1GRP1,Register protection for Group1 of Cortex-A76 cluster 1single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 4. "CL1GRP0,Register protection for Group0 of Cortex-A76 cluster 1single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 3. "CL0GRP3,Register protection for Group3 of Cortex-A76 cluster 0single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 2. "CL0GRP2,Register protection for Group2 of Cortex-A76 cluster 0single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 1. "CL0GRP1,Register protection for Group1 of Cortex-A76 cluster 0single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
newline
bitfld.long 0x0 0. "CL0GRP0,Register protection for Group0 of Cortex-A76 cluster 0single_quotations registers. The possible values are following." "0: Access disabled,1: Access enabled"
line.long 0x4 "PTCSR3,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls access protect function and holds information of access protection."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x4 0. "ERR,Indicates whether access error has occurred." "0: error has not occurred,1: error has occurred"
rgroup.long 0x24++0x3
line.long 0x0 "PTERADR3,This register is a 32-bit readable register. This register belongs to Group1. This register holds information of access protection."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "ADDR_15_0,Indicate address causing access error."
group.long 0x28++0x3
line.long 0x0 "DCLSEIJTR3,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls error injection for APMU DCLS error."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "EIJT,Error Injection enable. The possible values are:" "0: error injection is not active,1: error injection is active"
group.long 0x40++0x3
line.long 0x0 "A3PWRCTRL30,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls A3 power domain."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "A3_PDN_EN,Power down enable for A3 power domain. The possible values are following" "0: A3 power domain cannot be powered down,1: A3 power domain is powered down if all A1 and A2.."
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x48++0x3
line.long 0x0 "A3FSMSTSR30,This register is a 32-bit readable register. This register belongs to Group2. This register indicates A3 FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
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hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0x50++0x3
line.long 0x0 "A3FSMLOCKR30,This register is a 32-bit readable/writable register. This register belongs to Group2.This register controls a safety mechanism of FSM for A3 power domain."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
newline
rbitfld.long 0x0 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
hexmask.long.byte 0x0 5.--10. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
rgroup.long 0x58++0x7
line.long 0x0 "INTSTSR3,This register is a 32-bit readable register. This register belongs to Group2.This register indicates a factor of interrupt request signal."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
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bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x0 16. "A2C0_INT,Indicate whether each A2 domain FSM for Cortex-A76 cluster 0 issues interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
newline
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved"
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bitfld.long 0x0 3. "A1C3_INT,Indicate whether each A1 domain FSM issues for Cortex-A76 core 3 interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
newline
bitfld.long 0x0 2. "A1C2_INT,Indicate whether each A1 domain FSM issues for Cortex-A76 core 2 interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
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bitfld.long 0x0 1. "A1C1_INT,Indicate whether each A1 domain FSM issues for Cortex-A76 core 1 interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
newline
bitfld.long 0x0 0. "A1C0_INT,Indicate whether each A1 domain FSM issues for Cortex-A76 core 0 interrupt request. Permitted values are following." "0: FSM doesnsingle_quotationt issue interrupt request,1: FSM issues interrupt request"
line.long 0x4 "ERRSTSR3,This register is a 32-bit readable register. This register belongs to Group2.This register indicates whether each FSM finds fault."
bitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
newline
bitfld.long 0x4 30. "CR52_ERR2,Indicates whether error flag is set in FSMLOCKRCR522. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 29. "CR52_ERR1,Indicates whether error flag is set in FSMLOCKRCR521. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 28. "CR52_ERR0,Indicates whether error flag is set in FSMLOCKRCR520. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
bitfld.long 0x4 25.--27. "Reserved_25,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 24. "A3S0_ERR,Indicates whether error flag is set in A3FSMLOCKRx. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x4 16. "A2S0_ERR,Indicates whether error flag is set in FSMLOCKRCL0. Permitted values are following." "0: Error is not detected,1: Error is detected"
newline
hexmask.long.word 0x4 4.--15. 1. "Reserved_4,Reserved"
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bitfld.long 0x4 3. "A1C3_ERR,Indicates whether error flag is set in FSMLOCKRC3. Permitted values are following." "0: Error is not detected,1: Error is detected"
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bitfld.long 0x4 2. "A1C2_ERR,Indicates whether error flag is set in FSMLOCKRC2. Permitted values are following." "0: Error is not detected,1: Error is detected"
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bitfld.long 0x4 1. "A1C1_ERR,Indicates whether error flag is set in FSMLOCKRC1. Permitted values are following." "0: Error is not detected,1: Error is detected"
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bitfld.long 0x4 0. "A1C0_ERR,Indicates whether error flag is set in FSMLOCKRC0. Permitted values are following." "0: Error is not detected,1: Error is detected"
group.long 0x60++0x3
line.long 0x0 "FRSTR3,This register is a 32-bit readable/writable register. This register belongs to Group1. This register control forced reset function."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
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rbitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
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bitfld.long 0x0 16. "FRSTRCL0,Forced reset request for each Cortex-A76 cluster 0.The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
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hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
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bitfld.long 0x0 3. "FRSTRC3,Forced reset request for each Cortex-A76 core 3. The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
newline
bitfld.long 0x0 2. "FRSTRC2,Forced reset request for each Cortex-A76 core 2. The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
newline
bitfld.long 0x0 1. "FRSTRC1,Forced reset request for each Cortex-A76 core 1. The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
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bitfld.long 0x0 0. "FRSTRC0,Forced reset request for each Cortex-A76 core 0. The possible values are following." "0: Forced reset is not requested,1: Forced reset is requested"
group.long 0x68++0x3
line.long 0x0 "FRSTCTRL3,"
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
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bitfld.long 0x0 30. "FRST_MOD_DBG,Forced reset modification in debug mode. The possible values are following." "0: All reset signals are asserted by forced reset..,1: Only warm reset of Cortex-A76 is asserted by.."
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bitfld.long 0x0 29. "CLKPAUSE_EN,Clock pause enable when Cortex-A76 reset is asserting. The possible values are following." "0: Clock pause is disabled when Cortex-A76 reset is..,1: Clock pause is enabled when Cortex-A76 reset is.."
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rbitfld.long 0x0 27.--28. "Reserved_27,Reserved" "0,1,2,3"
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hexmask.long 0x0 0.--26. 1. "Reserved_0,Reserved"
group.long 0x80++0x7
line.long 0x0 "PADDCHKSTSR3,This register is a 32-bit readable/writable register. This register belongs to Group1. This register holds error information detected by Safety mechanism for APB bus interface."
bitfld.long 0x0 31. "PADD_CHK_SID_CLR,PADD_CHK_SID clear bit. PADD_CHK_SID is cleared by writing 1 to this bit." "0,1"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
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hexmask.long.byte 0x0 0.--7. 1. "PADD_CHK_SID_7_0,Indicates Source ID of fault transaction detected PADD_CHK mechanism."
line.long 0x4 "PWDATACHKSTSR3,This register is a 32-bit readable/writable register. This register belongs to Group1. This register holds error information detected by Safety mechanism for APB bus interface."
bitfld.long 0x4 31. "PWDATA_CHK_SID_CLR,PWDATA_CHK_SID clear bit. PWDATA_CHK_SID is cleared by writing 1 to this bit." "0,1"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
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hexmask.long.byte 0x4 0.--7. 1. "PWDATA_CHK_SID_7_0,Indicates Source ID of fault transaction detected PWDATA_CHK mechanism."
group.long 0x300++0x17
line.long 0x0 "CR52CR03,This register is a 32-bit readable/writable register. This register belongs to Group0. This register controls configuration of Cortex-R52."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
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bitfld.long 0x0 30. "NCPUHALT,NCPUHALT means inverted value of CPUHALT defined in Cortex-R52 TRM. The possible values are following." "0: Processor halt after reset,1: No processor halt after reset"
newline
bitfld.long 0x0 29. "CFGRAMPROTEN,CFGRAMPROTEN defined in Cortex-R52 TRM. The possible values are following." "0: RAM memory protection is disabled out of reset,1: RAM memory protection is enabled out of reset"
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bitfld.long 0x0 28. "CFGTCMBOOT,CFGTCMBOOT defined in Cortex-R52 TRM. The possible values are following." "0: ATCM is disabled out of reset,1: ATCM is enabled and at address 0x0 out of reset"
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bitfld.long 0x0 27. "CFGINITREG,CFGINITREG defined in Cortex-R52 TRM. The possible values are following." "0: Program-visible registers are not initialized to..,1: Program-visible registers are initialized to.."
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bitfld.long 0x0 26. "CFGL1CACHEINVDIS0,CFGL1CACHEINVDIS defined in Cortex-R52 TRM. The possible values are following." "0: Automatic post-reset L1 cache invalidate is..,1: Automatic post-reset L1 cache invalidate is.."
newline
hexmask.long 0x0 0.--25. 1. "Reserved_0,Reserved"
line.long 0x4 "CR52RSTCTRL03,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls reset operation for Cortex-R52."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
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bitfld.long 0x4 0. "CR52RST,Cortex-R52 reset. Indicates Cortex-R52 reset status. The initial value depends on Mode PIN configuration. Permitted values are following." "0: All Cortex-R52 resets are negated,1: All Cortex-R52 resets are asserted"
line.long 0x8 "CR52PWRCTRL03,"
hexmask.long.word 0x8 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x8 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x8 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x8 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x8 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
line.long 0xC "FSMLOCKRCR5203,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-R52 reset control."
hexmask.long.word 0xC 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
newline
rbitfld.long 0xC 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0xC 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0xC 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
hexmask.long.byte 0xC 5.--10. 1. "Reserved_5,Reserved"
newline
bitfld.long 0xC 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
rbitfld.long 0xC 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x10 "PDENYSTSRCLCR5203,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long 0x10 6.--31. 1. "Reserved_6,Reserved"
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bitfld.long 0x10 5. "DNY_ON_DBGLOW,Indicates whether a denied state transition has occurred by power mode transition from ON mode to Debug over LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x10 4. "DNY_DBGLOW_ON,Indicates whether a denied state transition has occurred by power mode transition from Debug over LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x10 3. "DNY_ON_LOWPOWER,Indicates whether a denied state transition has occurred by power mode transition from ON mode to LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x10 2. "DNY_LOWPOWER_ON,Indicates whether a denied state transition has occurred by power mode transition from LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x10 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x10 0. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
line.long 0x14 "PDENYINTRCLCR5203,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long 0x14 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x14 5. "INT_ON_DBGLOW,Issuing interrupt enable by DNY_ON_DBGLOW. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x14 4. "INT_DBGLOW_ON,Issuing interrupt enable by DNY_DBGLOW_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x14 3. "INT_ON_LOWPOWER,Issuing interrupt enable by DNY_ON_LOWPOWER. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x14 2. "INT_LOWPOWER_ON,Issuing interrupt enable by DNY_LOWPOWER_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x14 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x14 0. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
rgroup.long 0x318++0x3
line.long 0x0 "FSMSTSRCR5203,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-R52 FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-R52 FSM. The permitted values are following."
group.long 0x31C++0x3
line.long 0x0 "G2GPRCR5203,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
group.long 0x328++0x2F
line.long 0x0 "CR52CMPEN03,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls Cortex-R52 DCLS comparator. When NSRCMPEN is set to 1. Realtime Core detects the toggles of non-safety related operations and/or.."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "NSRCMPEN,Non-safety- related comparator enable. The possible values are following." "0: Comparator for Non-safety-related signals is..,1: Comparator for Non-safety-related signals is.."
newline
bitfld.long 0x0 0. "CMPEN,Comparator enables. The possible values are following." "0: Comparator is disabled,1: Comparator is enabled"
line.long 0x4 "GCNTERRENCR5203,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety mechanism between Generic Counter and Cortex-R52."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "GCNTERREN,Generic Counter error detection enable. The possible values are following." "0: Error detection is disabled,1: Error detection is enabled"
line.long 0x8 "CR52RVBAR03,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x8 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
newline
hexmask.long.byte 0x8 0.--4. 1. "Reserved_0,Reserved"
line.long 0xC "CR52BAR03,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR. After completing the setting of RBAR with BAREN = 0..."
hexmask.long.word 0xC 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
newline
hexmask.long.word 0xC 5.--17. 1. "Reserved_5,Reserved"
newline
bitfld.long 0xC 4. "BAREN,BAR enables. The possible values are:" "0,1"
newline
rbitfld.long 0xC 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
rbitfld.long 0xC 0.--1. "BTMD_1_0,Boot Mode. Indicates boot area of Cortex-R52. Permitted values are following." "0: RBAR is assigned for boot address,?,?,?"
line.long 0x10 "CR52RVBARP03,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x10 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
newline
hexmask.long.byte 0x10 1.--4. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x10 0. "VLD,CR52RVBARP valid. The possible values are following." "0: CR52RVBAR is used to define CFGVECTABLE for..,1: CR52RVBARP is used to define CFGVECTABLE for.."
line.long 0x14 "CR52BARP03,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR and VLD. After completing the setting of RBAR and VLD.."
hexmask.long.word 0x14 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
newline
hexmask.long.word 0x14 5.--17. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x14 4. "BAREN,BAR enables. The possible values are following." "0: RBAR is not valid,1: RBAR is valid"
newline
rbitfld.long 0x14 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x14 0. "VLD,CR52BARP valid. The possible values are following." "0: CR52BAR is used to define Boot Address of..,1: CR52BARP is used to define Boot Address of.."
line.long 0x18 "CR52CR13,This register is a 32-bit readable/writable register. This register belongs to Group0. This register controls configuration of Cortex-R52."
rbitfld.long 0x18 31. "Reserved_31,Reserved" "0,1"
newline
bitfld.long 0x18 30. "NCPUHALT,NCPUHALT means inverted value of CPUHALT defined in Cortex-R52 TRM. The possible values are following." "0: Processor halt after reset,1: No processor halt after reset"
newline
bitfld.long 0x18 29. "CFGRAMPROTEN,CFGRAMPROTEN defined in Cortex-R52 TRM. The possible values are following." "0: RAM memory protection is disabled out of reset,1: RAM memory protection is enabled out of reset"
newline
bitfld.long 0x18 28. "CFGTCMBOOT,CFGTCMBOOT defined in Cortex-R52 TRM. The possible values are following." "0: ATCM is disabled out of reset,1: ATCM is enabled and at address 0x0 out of reset"
newline
bitfld.long 0x18 27. "CFGINITREG,CFGINITREG defined in Cortex-R52 TRM. The possible values are following." "0: Program-visible registers are not initialized to..,1: Program-visible registers are initialized to.."
newline
bitfld.long 0x18 26. "CFGL1CACHEINVDIS0,CFGL1CACHEINVDIS defined in Cortex-R52 TRM. The possible values are following." "0: Automatic post-reset L1 cache invalidate is..,1: Automatic post-reset L1 cache invalidate is.."
newline
hexmask.long 0x18 0.--25. 1. "Reserved_0,Reserved"
line.long 0x1C "CR52RSTCTRL13,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls reset operation for Cortex-R52."
hexmask.long 0x1C 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x1C 0. "CR52RST,Cortex-R52 reset. Indicates Cortex-R52 reset status. The initial value depends on Mode PIN configuration. Permitted values are following." "0: All Cortex-R52 resets are negated,1: All Cortex-R52 resets are asserted"
line.long 0x20 "CR52PWRCTRL13,"
hexmask.long.word 0x20 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x20 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x20 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x20 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x20 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
line.long 0x24 "FSMLOCKRCR5213,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-R52 reset control."
hexmask.long.word 0x24 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
newline
rbitfld.long 0x24 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x24 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x24 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
hexmask.long.byte 0x24 5.--10. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x24 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
rbitfld.long 0x24 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x24 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x28 "PDENYSTSRCLCR5213,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long 0x28 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x28 5. "DNY_ON_DBGLOW,Indicates whether a denied state transition has occurred by power mode transition from ON mode to Debug over LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x28 4. "DNY_DBGLOW_ON,Indicates whether a denied state transition has occurred by power mode transition from Debug over LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x28 3. "DNY_ON_LOWPOWER,Indicates whether a denied state transition has occurred by power mode transition from ON mode to LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x28 2. "DNY_LOWPOWER_ON,Indicates whether a denied state transition has occurred by power mode transition from LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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rbitfld.long 0x28 1. "Reserved_1,Reserved" "0,1"
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bitfld.long 0x28 0. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
line.long 0x2C "PDENYINTRCLCR5213,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long 0x2C 6.--31. 1. "Reserved_6,Reserved"
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bitfld.long 0x2C 5. "INT_ON_DBGLOW,Issuing interrupt enable by DNY_ON_DBGLOW. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
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bitfld.long 0x2C 4. "INT_DBGLOW_ON,Issuing interrupt enable by DNY_DBGLOW_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
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bitfld.long 0x2C 3. "INT_ON_LOWPOWER,Issuing interrupt enable by DNY_ON_LOWPOWER. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
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bitfld.long 0x2C 2. "INT_LOWPOWER_ON,Issuing interrupt enable by DNY_LOWPOWER_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
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rbitfld.long 0x2C 1. "Reserved_1,Reserved" "0,1"
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bitfld.long 0x2C 0. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
rgroup.long 0x358++0x3
line.long 0x0 "FSMSTSRCR5213,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-R52 FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
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hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-R52 FSM. The permitted values are following."
group.long 0x35C++0x3
line.long 0x0 "G2GPRCR5213,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
group.long 0x368++0x2F
line.long 0x0 "CR52CMPEN13,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls Cortex-R52 DCLS comparator. When NSRCMPEN is set to 1. Realtime Core detects the toggles of non-safety related operations and/or.."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
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bitfld.long 0x0 1. "NSRCMPEN,Non-safety- related comparator enable. The possible values are following." "0: Comparator for Non-safety-related signals is..,1: Comparator for Non-safety-related signals is.."
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bitfld.long 0x0 0. "CMPEN,Comparator enables. The possible values are following." "0: Comparator is disabled,1: Comparator is enabled"
line.long 0x4 "GCNTERRENCR5213,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety mechanism between Generic Counter and Cortex-R52."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
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bitfld.long 0x4 0. "GCNTERREN,Generic Counter error detection enable. The possible values are following." "0: Error detection is disabled,1: Error detection is enabled"
line.long 0x8 "CR52RVBAR13,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x8 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
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hexmask.long.byte 0x8 0.--4. 1. "Reserved_0,Reserved"
line.long 0xC "CR52BAR13,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR. After completing the setting of RBAR with BAREN = 0..."
hexmask.long.word 0xC 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
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hexmask.long.word 0xC 5.--17. 1. "Reserved_5,Reserved"
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bitfld.long 0xC 4. "BAREN,BAR enables. The possible values are:" "0,1"
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rbitfld.long 0xC 2.--3. "Reserved_2,Reserved" "0,1,2,3"
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rbitfld.long 0xC 0.--1. "BTMD_1_0,Boot Mode. Indicates boot area of Cortex-R52. Permitted values are following." "0: RBAR is assigned for boot address,?,?,?"
line.long 0x10 "CR52RVBARP13,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x10 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
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hexmask.long.byte 0x10 1.--4. 1. "Reserved_1,Reserved"
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bitfld.long 0x10 0. "VLD,CR52RVBARP valid. The possible values are following." "0: CR52RVBAR is used to define CFGVECTABLE for..,1: CR52RVBARP is used to define CFGVECTABLE for.."
line.long 0x14 "CR52BARP13,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR and VLD. After completing the setting of RBAR and VLD.."
hexmask.long.word 0x14 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
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hexmask.long.word 0x14 5.--17. 1. "Reserved_5,Reserved"
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bitfld.long 0x14 4. "BAREN,BAR enables. The possible values are following." "0: RBAR is not valid,1: RBAR is valid"
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rbitfld.long 0x14 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x14 0. "VLD,CR52BARP valid. The possible values are following." "0: CR52BAR is used to define Boot Address of..,1: CR52BARP is used to define Boot Address of.."
line.long 0x18 "CR52CR23,This register is a 32-bit readable/writable register. This register belongs to Group0. This register controls configuration of Cortex-R52."
rbitfld.long 0x18 31. "Reserved_31,Reserved" "0,1"
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bitfld.long 0x18 30. "NCPUHALT,NCPUHALT means inverted value of CPUHALT defined in Cortex-R52 TRM. The possible values are following." "0: Processor halt after reset,1: No processor halt after reset"
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bitfld.long 0x18 29. "CFGRAMPROTEN,CFGRAMPROTEN defined in Cortex-R52 TRM. The possible values are following." "0: RAM memory protection is disabled out of reset,1: RAM memory protection is enabled out of reset"
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bitfld.long 0x18 28. "CFGTCMBOOT,CFGTCMBOOT defined in Cortex-R52 TRM. The possible values are following." "0: ATCM is disabled out of reset,1: ATCM is enabled and at address 0x0 out of reset"
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bitfld.long 0x18 27. "CFGINITREG,CFGINITREG defined in Cortex-R52 TRM. The possible values are following." "0: Program-visible registers are not initialized to..,1: Program-visible registers are initialized to.."
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bitfld.long 0x18 26. "CFGL1CACHEINVDIS0,CFGL1CACHEINVDIS defined in Cortex-R52 TRM. The possible values are following." "0: Automatic post-reset L1 cache invalidate is..,1: Automatic post-reset L1 cache invalidate is.."
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hexmask.long 0x18 0.--25. 1. "Reserved_0,Reserved"
line.long 0x1C "CR52RSTCTRL23,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls reset operation for Cortex-R52."
hexmask.long 0x1C 1.--31. 1. "Reserved_1,Reserved"
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bitfld.long 0x1C 0. "CR52RST,Cortex-R52 reset. Indicates Cortex-R52 reset status. The initial value depends on Mode PIN configuration. Permitted values are following." "0: All Cortex-R52 resets are negated,1: All Cortex-R52 resets are asserted"
line.long 0x20 "CR52PWRCTRL23,"
hexmask.long.word 0x20 18.--31. 1. "Reserved_18,Reserved"
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bitfld.long 0x20 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
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bitfld.long 0x20 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
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hexmask.long.word 0x20 1.--15. 1. "Reserved_1,Reserved"
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bitfld.long 0x20 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
line.long 0x24 "FSMLOCKRCR5223,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-R52 reset control."
hexmask.long.word 0x24 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
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rbitfld.long 0x24 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x24 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
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bitfld.long 0x24 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
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hexmask.long.byte 0x24 5.--10. 1. "Reserved_5,Reserved"
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bitfld.long 0x24 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
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rbitfld.long 0x24 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x24 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x28 "PDENYSTSRCLCR5223,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long 0x28 6.--31. 1. "Reserved_6,Reserved"
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bitfld.long 0x28 5. "DNY_ON_DBGLOW,Indicates whether a denied state transition has occurred by power mode transition from ON mode to Debug over LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x28 4. "DNY_DBGLOW_ON,Indicates whether a denied state transition has occurred by power mode transition from Debug over LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x28 3. "DNY_ON_LOWPOWER,Indicates whether a denied state transition has occurred by power mode transition from ON mode to LOWPOWER mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x28 2. "DNY_LOWPOWER_ON,Indicates whether a denied state transition has occurred by power mode transition from LOWPOWER mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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rbitfld.long 0x28 1. "Reserved_1,Reserved" "0,1"
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bitfld.long 0x28 0. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
line.long 0x2C "PDENYINTRCLCR5223,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long 0x2C 6.--31. 1. "Reserved_6,Reserved"
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bitfld.long 0x2C 5. "INT_ON_DBGLOW,Issuing interrupt enable by DNY_ON_DBGLOW. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
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bitfld.long 0x2C 4. "INT_DBGLOW_ON,Issuing interrupt enable by DNY_DBGLOW_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
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bitfld.long 0x2C 3. "INT_ON_LOWPOWER,Issuing interrupt enable by DNY_ON_LOWPOWER. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
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bitfld.long 0x2C 2. "INT_LOWPOWER_ON,Issuing interrupt enable by DNY_LOWPOWER_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
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rbitfld.long 0x2C 1. "Reserved_1,Reserved" "0,1"
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bitfld.long 0x2C 0. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
rgroup.long 0x398++0x3
line.long 0x0 "FSMSTSRCR5223,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-R52 FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
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hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-R52 FSM. The permitted values are following."
group.long 0x39C++0x3
line.long 0x0 "G2GPRCR5223,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
group.long 0x3A8++0x17
line.long 0x0 "CR52CMPEN23,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls Cortex-R52 DCLS comparator. When NSRCMPEN is set to 1. Realtime Core detects the toggles of non-safety related operations and/or.."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
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bitfld.long 0x0 1. "NSRCMPEN,Non-safety- related comparator enable. The possible values are following." "0: Comparator for Non-safety-related signals is..,1: Comparator for Non-safety-related signals is.."
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bitfld.long 0x0 0. "CMPEN,Comparator enables. The possible values are following." "0: Comparator is disabled,1: Comparator is enabled"
line.long 0x4 "GCNTERRENCR5223,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety mechanism between Generic Counter and Cortex-R52."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
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bitfld.long 0x4 0. "GCNTERREN,Generic Counter error detection enable. The possible values are following." "0: Error detection is disabled,1: Error detection is enabled"
line.long 0x8 "CR52RVBAR23,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x8 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
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hexmask.long.byte 0x8 0.--4. 1. "Reserved_0,Reserved"
line.long 0xC "CR52BAR23,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR. After completing the setting of RBAR with BAREN = 0..."
hexmask.long.word 0xC 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
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hexmask.long.word 0xC 5.--17. 1. "Reserved_5,Reserved"
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bitfld.long 0xC 4. "BAREN,BAR enables. The possible values are:" "0,1"
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rbitfld.long 0xC 2.--3. "Reserved_2,Reserved" "0,1,2,3"
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rbitfld.long 0xC 0.--1. "BTMD_1_0,Boot Mode. Indicates boot area of Cortex-R52. Permitted values are following." "0: RBAR is assigned for boot address,?,?,?"
line.long 0x10 "CR52RVBARP23,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Vector table base address for Cortex-R52."
hexmask.long 0x10 5.--31. 1. "CFGVECTABLE_31_5,CFGVECTABLE defined in Cortex-R52 TRM. Vector table base address out of reset."
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hexmask.long.byte 0x10 1.--4. 1. "Reserved_1,Reserved"
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bitfld.long 0x10 0. "VLD,CR52RVBARP valid. The possible values are following." "0: CR52RVBAR is used to define CFGVECTABLE for..,1: CR52RVBARP is used to define CFGVECTABLE for.."
line.long 0x14 "CR52BARP23,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates Boot address of Cortex-R52. Do not rewrite BAREN = 1 simultaneously with RBAR and VLD. After completing the setting of RBAR and VLD.."
hexmask.long.word 0x14 18.--31. 1. "RBAR_31_18,Real time CPU (Cortex-R52) Boot Address."
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hexmask.long.word 0x14 5.--17. 1. "Reserved_5,Reserved"
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bitfld.long 0x14 4. "BAREN,BAR enables. The possible values are following." "0: RBAR is not valid,1: RBAR is valid"
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rbitfld.long 0x14 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x14 0. "VLD,CR52BARP valid. The possible values are following." "0: CR52BAR is used to define Boot Address of..,1: CR52BARP is used to define Boot Address of.."
group.long 0x400++0x7
line.long 0x0 "PWRCTRLCL3_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 cluster x."
hexmask.long.word 0x0 22.--31. 1. "Reserved_22,Reserved"
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bitfld.long 0x0 21. "PCHMRETEN,MEM_RET mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to MEM_RET mode is disabled,?"
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bitfld.long 0x0 20. "PCHFRETEN,FUNC_RET mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to FUNC_RET mode is disabled,1: Power mode transition to FUNC_RET mode is enabled"
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rbitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
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bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enable by P-channel protocol. The possible values are following." "0,1"
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bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
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hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
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rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "L3CTRLCL3_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register is used for L3 cache partial power down/up."
hexmask.long.word 0x4 19.--31. 1. "Reserved_19,Reserved"
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rbitfld.long 0x4 16.--18. "L3STS_2_0,Indicates current L3 cache partial power down/up status. Permitted values are following." "?,1: 1/4 of L3 cache is powered on,?,?,?,?,?,?"
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hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
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bitfld.long 0x4 9. "L3DENY,Indicates whether L3 cache partial power down/up request is denied. Permitted values are following." "0: request is not denied,1: request is denied"
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bitfld.long 0x4 8. "L3ACCEPT,Indicates whether L3 cache partial power down/up request is accepted. Permitted values are following." "0: request is not accepted,1: request is accepted"
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rbitfld.long 0x4 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x4 4. "L3REQ,L3 cache partial power down/up request. The possible values are following." "0: L3 cache partial power down/up is not requested,1: L3 cache partial power down/up is requested"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
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bitfld.long 0x4 0.--2. "L3CTRL_2_0,L3 cache partial power down/up control. The possible values are following." "0: All L3 cache is power-off or..,1: 1/4 of L3 cache is power-on,?,?,?,?,?,?"
group.long 0x40C++0xB
line.long 0x0 "FSMLOCKRCL3_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls a safety mechanism of FSM for Cortex-A76 cluster."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
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rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
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rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
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rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
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rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
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bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
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bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
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rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
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bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
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bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
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rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
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bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
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bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
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bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
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bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRCL3_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long.word 0x4 23.--31. 1. "Reserved_23,Reserved"
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bitfld.long 0x4 22. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x4 21. "DNY_ON_OFF,Indicates whether a denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x4 20. "DNY_ON_FUNC,Indicates whether a denied state transition has occurred by power mode transition from ON mode to FUNC_RET mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x4 19. "DNY_FUNC_ON,Indicates whether a denied state transition has occurred by power mode transition from FUNC_RET mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x4 18. "DNY_ON_MEM,Indicates whether a denied state transition has occurred by power mode transition from ON mode to MEM_RET mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 17. "DNY_MEM_ON,Indicates whether a denied state transition has occurred by power mode transition from MEM_RET mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 16. "DNY_ON_L3CHG,Indicates whether a denied state transition has occurred by L3 cache partial power mode control. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "PDENYINTRCL3_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.word 0x8 23.--31. 1. "Reserved_23,Reserved"
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bitfld.long 0x8 22. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 21. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 20. "INT_ON_FUNC,Issuing interrupt enable by DNY_ON_FUNC. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 19. "INT_FUNC_ON,Issuing interrupt enable by DNY_FUNC_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 18. "INT_ON_MEM,Issuing interrupt enable by DNY_ON_MEM. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 17. "INT_MEM_ON,Issuing interrupt enable by DNY_MEM_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 16. "INT_ON_L3CHG,Issuing interrupt enable by DNY_ON_L3CHG. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
rgroup.long 0x418++0x3
line.long 0x0 "FSMSTSRCL3_CLUSTER0,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 cluster FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-A76 cluster FSM. Permitted values are following."
group.long 0x41C++0x7
line.long 0x0 "G2GPRCL3_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLCL3_CLUSTER0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 cluster."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x4 10. "A2_RTT_MRET,A2 RuntimeTEST using MEM_RET mode enable. The possible values are following." "0: A2 RuntimeTEST using MEM_RET mode is disabled,1: A2 RuntimeTEST using MEM_RET mode is enabled"
newline
bitfld.long 0x4 9. "A2_RTT_POFF,A2 RuntimeTEST using Pseudo OFF mode enable. The possible values are following." "0: A2 RuntimeTEST using Pseudo OFF mode is disabled,1: A2 RuntimeTEST using Pseudo OFF mode is enabled"
newline
hexmask.long.byte 0x4 2.--8. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 clusters are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76..,1: RuntimeTEST is enabled before Cortex-A76.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x424++0x3
line.long 0x0 "DCLSENCL3,This register is a 32-bit readable register. This register belongs to Group1. This register indicates whether Cortex-A76 cluster is in DCLS mode."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
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bitfld.long 0x0 0. "DCLSEN,Indicates Cortex-A76 cluster is DCLS mode. Permitted values are following." "0: Cortex-A76 cluster is not in DCLS mode,1: Cortex-A76 cluster is in DCLS mode"
group.long 0x428++0x7
line.long 0x0 "DCLSCMPENCL3,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls a DCLS comparator for Cortex-A76 cluster."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "DCLSCMPEN,DCLS comparator enable. The possible values are following." "0: DCLS comparator is disabled,1: DCLS comparator is enabled"
line.long 0x4 "GCNTERRENCL3,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety mechanism between Generic Counter and Cortex-A76 cluster."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "GCNTERREN,Generic Counter error detection enable. The possible values are following." "0: Error detection is disabled,1: Error detection is enabled"
group.long 0x440++0x7
line.long 0x0 "PWRCTRLCL3_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 cluster x."
hexmask.long.word 0x0 22.--31. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "PCHMRETEN,MEM_RET mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to MEM_RET mode is disabled,?"
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bitfld.long 0x0 20. "PCHFRETEN,FUNC_RET mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to FUNC_RET mode is disabled,1: Power mode transition to FUNC_RET mode is enabled"
newline
rbitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enable by P-channel protocol. The possible values are following." "0,1"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "L3CTRLCL3_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register is used for L3 cache partial power down/up."
hexmask.long.word 0x4 19.--31. 1. "Reserved_19,Reserved"
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rbitfld.long 0x4 16.--18. "L3STS_2_0,Indicates current L3 cache partial power down/up status. Permitted values are following." "?,1: 1/4 of L3 cache is powered on,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x4 9. "L3DENY,Indicates whether L3 cache partial power down/up request is denied. Permitted values are following." "0: request is not denied,1: request is denied"
newline
bitfld.long 0x4 8. "L3ACCEPT,Indicates whether L3 cache partial power down/up request is accepted. Permitted values are following." "0: request is not accepted,1: request is accepted"
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rbitfld.long 0x4 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x4 4. "L3REQ,L3 cache partial power down/up request. The possible values are following." "0: L3 cache partial power down/up is not requested,1: L3 cache partial power down/up is requested"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x4 0.--2. "L3CTRL_2_0,L3 cache partial power down/up control. The possible values are following." "0: All L3 cache is power-off or..,1: 1/4 of L3 cache is power-on,?,?,?,?,?,?"
group.long 0x44C++0xB
line.long 0x0 "FSMLOCKRCL3_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls a safety mechanism of FSM for Cortex-A76 cluster."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error. Setting this to 0 is not supported."
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rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
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rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
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rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
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bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRCL3_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether a denied state transition has occurred."
hexmask.long.word 0x4 23.--31. 1. "Reserved_23,Reserved"
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bitfld.long 0x4 22. "DNY_OFF_ON,Indicates whether a denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x4 21. "DNY_ON_OFF,Indicates whether a denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x4 20. "DNY_ON_FUNC,Indicates whether a denied state transition has occurred by power mode transition from ON mode to FUNC_RET mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x4 19. "DNY_FUNC_ON,Indicates whether a denied state transition has occurred by power mode transition from FUNC_RET mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x4 18. "DNY_ON_MEM,Indicates whether a denied state transition has occurred by power mode transition from ON mode to MEM_RET mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
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bitfld.long 0x4 17. "DNY_MEM_ON,Indicates whether a denied state transition has occurred by power mode transition from MEM_RET mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 16. "DNY_ON_L3CHG,Indicates whether a denied state transition has occurred by L3 cache partial power mode control. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "PDENYINTRCL3_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.word 0x8 23.--31. 1. "Reserved_23,Reserved"
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bitfld.long 0x8 22. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 21. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 20. "INT_ON_FUNC,Issuing interrupt enable by DNY_ON_FUNC. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 19. "INT_FUNC_ON,Issuing interrupt enable by DNY_FUNC_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 18. "INT_ON_MEM,Issuing interrupt enable by DNY_ON_MEM. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 17. "INT_MEM_ON,Issuing interrupt enable by DNY_MEM_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 16. "INT_ON_L3CHG,Issuing interrupt enable by DNY_ON_L3CHG. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
rgroup.long 0x458++0x3
line.long 0x0 "FSMSTSRCL3_CLUSTER1,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 cluster FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of Cortex-A76 cluster FSM. Permitted values are following."
group.long 0x45C++0x7
line.long 0x0 "G2GPRCL3_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLCL3_CLUSTER1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 cluster."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x4 10. "A2_RTT_MRET,A2 RuntimeTEST using MEM_RET mode enable. The possible values are following." "0: A2 RuntimeTEST using MEM_RET mode is disabled,1: A2 RuntimeTEST using MEM_RET mode is enabled"
newline
bitfld.long 0x4 9. "A2_RTT_POFF,A2 RuntimeTEST using Pseudo OFF mode enable. The possible values are following." "0: A2 RuntimeTEST using Pseudo OFF mode is disabled,1: A2 RuntimeTEST using Pseudo OFF mode is enabled"
newline
hexmask.long.byte 0x4 2.--8. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 clusters are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76..,1: RuntimeTEST is enabled before Cortex-A76.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0x800++0x3
line.long 0x0 "PWRCTRLC3_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x0 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x0 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0x80C++0xB
line.long 0x0 "FSMLOCKRC3_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC3_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC3_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x818++0x3
line.long 0x0 "FSMSTSRC3_CORE0,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0x81C++0x7
line.long 0x0 "G2GPRC3_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC3_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0x830++0x13
line.long 0x0 "RVBARLC3_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC3_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC3_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC3_CORE0,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x10 "PWRCTRLC3_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x10 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x10 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x10 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x10 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x10 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x10 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x10 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x10 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0x84C++0xB
line.long 0x0 "FSMLOCKRC3_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC3_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC3_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x858++0x3
line.long 0x0 "FSMSTSRC3_CORE1,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0x85C++0x7
line.long 0x0 "G2GPRC3_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC3_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0x870++0xF
line.long 0x0 "RVBARLC3_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC3_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC3_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC3_CORE1,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
group.long 0xA00++0x3
line.long 0x0 "PWRCTRLC3_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x0 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x0 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xA0C++0xB
line.long 0x0 "FSMLOCKRC3_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC3_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC3_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xA18++0x3
line.long 0x0 "FSMSTSRC3_CORE2,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xA1C++0x7
line.long 0x0 "G2GPRC3_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC3_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xA30++0x13
line.long 0x0 "RVBARLC3_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC3_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC3_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC3_CORE2,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x10 "PWRCTRLC3_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x10 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x10 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x10 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x10 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x10 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x10 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x10 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x10 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xA4C++0xB
line.long 0x0 "FSMLOCKRC3_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC3_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC3_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xA58++0x3
line.long 0x0 "FSMSTSRC3_CORE3,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xA5C++0x7
line.long 0x0 "G2GPRC3_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC3_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xA70++0xF
line.long 0x0 "RVBARLC3_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC3_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC3_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC3_CORE3,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
group.long 0xC00++0x3
line.long 0x0 "PWRCTRLC3_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x0 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x0 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xC0C++0xB
line.long 0x0 "FSMLOCKRC3_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC3_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC3_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xC18++0x3
line.long 0x0 "FSMSTSRC3_CORE4,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xC1C++0x7
line.long 0x0 "G2GPRC3_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC3_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xC30++0x13
line.long 0x0 "RVBARLC3_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC3_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC3_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC3_CORE4,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x10 "PWRCTRLC3_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x10 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x10 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x10 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x10 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x10 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x10 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x10 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x10 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xC4C++0xB
line.long 0x0 "FSMLOCKRC3_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC3_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC3_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xC58++0x3
line.long 0x0 "FSMSTSRC3_CORE5,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xC5C++0x7
line.long 0x0 "G2GPRC3_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC3_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xC70++0xF
line.long 0x0 "RVBARLC3_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC3_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC3_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC3_CORE5,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
group.long 0xE00++0x3
line.long 0x0 "PWRCTRLC3_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x0 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x0 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x0 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x0 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xE0C++0xB
line.long 0x0 "FSMLOCKRC3_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC3_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC3_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xE18++0x3
line.long 0x0 "FSMSTSRC3_CORE6,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xE1C++0x7
line.long 0x0 "G2GPRC3_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC3_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xE30++0x13
line.long 0x0 "RVBARLC3_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC3_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC3_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC3_CORE6,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x10 "PWRCTRLC3_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls power management for Cortex-A76 core z."
hexmask.long.word 0x10 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x10 18. "PCHPDNEMUEN,OFF_EMU mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to OFF_EMU mode is disabled,1: Power mode transition to OFF_EMU mode is enabled"
newline
bitfld.long 0x10 17. "PCHPDNEN,OFF mode transition enables by P-channel protocol. The possible values are following" "0: Power mode transition to OFF mode is disabled,1: Power mode transition to OFF mode is enabled"
newline
bitfld.long 0x10 16. "PCHWUPEN,ON mode transition enable by P-channel protocol. The possible values are following." "0: Power mode transition to ON mode is disabled,1: Power mode transition to ON mode is enabled"
newline
hexmask.long.word 0x10 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x10 5. "DWUP_EN,This bit enables wakeup request from Debugger. The possible values are following." "0: Wakeup request from Debugger is disabled,1: Wakeup request from Debugger is enabled"
newline
bitfld.long 0x10 4. "IWUP_EN,This bit enables wakeup request from INTC-AP. The possible values are following." "0: Wakeup request from INTC-AP is disabled,1: Wakeup request from INTC-AP is enabled"
newline
rbitfld.long 0x10 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 0. "WUP_REQ,Wake up request. The possible values are following." "0: Power on is not requested,1: Power on is requested"
group.long 0xE4C++0xB
line.long 0x0 "FSMLOCKRC3_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls a safety mechanism of FSM for Cortex-A76 core."
hexmask.long.word 0x0 16.--31. 1. "CNT_VALUE_15_0,Indicates count value for FSM deadlock error."
newline
rbitfld.long 0x0 15. "PRTCL_ERR,This is error flag bit and it indicates whether P-channel protocol error has occurred. Permitted values are following." "0: P-channel protocol error has not occurred,1: P-channel protocol error has occurred"
newline
rbitfld.long 0x0 14. "CRPT_ERR,This is error flag bit and it indicates whether P-channel corruption error has occurred. If 1 is set to CRPT_EN bit  this bit is updated. Permitted values are following." "0: P-channel corruption error has not occurred,1: P-channel corruption error has occurred"
newline
rbitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
rbitfld.long 0x0 12. "LOCK_ERR,This is error flag bit and it indicates whether FSM deadlock has occurred. Permitted values are following." "0: FSM dead lock has not occurred,1: FSM dead lock has occurred"
newline
bitfld.long 0x0 11. "LOCK_EN,FSM deadlock error enable. The possible values are following." "0: FSM deadlock error is disabled,1: FSM deadlock error is enabled"
newline
bitfld.long 0x0 10. "PRTCL_EN,P-channel protocol error enable. The possible values are following." "0: P-channel protocol error is disabled,1: P-channel protocol error is enabled"
newline
bitfld.long 0x0 9. "CRPT_EN,P-channel corruption error enable. The possible values are following." "0: P-channel corruption error is disabled,1: P-channel corruption error is enabled"
newline
rbitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "PRTCL_EIJT,P-channel protocol error injection. The possible values are following." "0: P-channel protocol error injection is disabled,1: P-channel protocol error injection is active"
newline
bitfld.long 0x0 6. "CRPT_EIJT,P-channel corruption error injection. if 1 is written  P-channel corruption error injection is active." "0,1"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "LOCK_EIJT,FSM deadlock error injection. If 1 is written  FSM deadlock error injection is active." "0,1"
newline
bitfld.long 0x0 3. "PRTCL_CLR,P-channel protocol error clear. If 1 is written  PRTCL_ERR bit is cleared to 0." "0,1"
newline
bitfld.long 0x0 2. "CRPT_CLR,P-channel corruption error clear. If 1 is written  CRPT_ERR bit is cleared to 0." "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "LOCK_CLR,FSM deadlock error clear. If 1 is written  LOCK_ERR bit is cleared to 0." "0,1"
line.long 0x4 "PDENYSTSRC3_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2. This register indicates whether denied state transition has occurred."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "DNY_OFF_ON,Indicates whether denied state transition has occurred by power mode transition from OFF mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 6. "DNY_ON_OFF,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 3. "DNY_ON_EMU,Indicates whether denied state transition has occurred by power mode transition from ON mode to OFF_EMU mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
bitfld.long 0x4 2. "DNY_EMU_ON,Indicates whether denied state transition has occurred by power mode transition from OFF_EMU mode to ON mode. Permitted values are following." "0: A denied state transition has not occurred,1: A denied state transition has occurred"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "PDENYINTRC3_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2. This register controls whether issuing interrupt or not when a denied state transition has occurred."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x8 7. "INT_OFF_ON,Issuing interrupt enable by DNY_OFF_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 6. "INT_ON_OFF,Issuing interrupt enable by DNY_ON_OFF. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 3. "INT_ON_EMU,Issuing interrupt enable by DNY_ON_EMU. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
bitfld.long 0x8 2. "INT_EMU_ON,Issuing interrupt enable by DNY_EMU_ON. The possible values are following." "0: Issuing interrupt is disabled,1: Issuing interrupt is enabled"
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0xE58++0x3
line.long 0x0 "FSMSTSRC3_CORE7,This register is a 32-bit readable register. This register belongs to Group2. This register indicates Cortex-A76 core FSM state."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "STATE_7_0,Indicate current state of A3 FSM. The permitted values are following."
group.long 0xE5C++0x7
line.long 0x0 "G2GPRC3_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group2."
hexmask.long 0x0 0.--31. 1. "GPR0_31_0,This fields are allowed to write any values and they donsingle_quotationt affect module operation."
line.long 0x4 "SAFECTRLC3_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group1. This register controls safety related function for Cortex-A76 core."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DBGEN_PPDN,When Cortex-A76 is in debug mode  Cortex-A76 core is goes to OFF_EMU mode instead of OFF mode. The possible values are following." "0: Cortex-A76 goes to OFF mode,1: Cortex-A76 goes to OFF_EMU mode"
newline
hexmask.long.byte 0x4 5.--12. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "A1_RTT,A1 RuntimeTEST enable. The possible values are following." "0: A1 RuntimeTEST is disabled,1: A1 RuntimeTEST is enabled"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "WUP_RTT_REQ,RuntimeTEST enable before Cortex-A76 cores are booted. The possible values are following." "0: RuntimeTEST is disabled before Cortex-A76 cores..,1: RuntimeTEST is enabled before Cortex-A76 cores.."
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0xE70++0xF
line.long 0x0 "RVBARLC3_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long 0x0 2.--31. 1. "RVBAR_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RVBARHC3_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group1. This register indicates reset vector base address."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "RVBAR_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
line.long 0x8 "RVBARPLC3_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long 0x8 2.--31. 1. "RVBARP_31_2,These bits indicate RVBARADDR[31:2]. It is defined in DSU TRM."
newline
rbitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "VLD,RVBARP valid. The possible values are following." "0: RVBAR is used as RVBARADDR,1: RVBARP is used as RVBARADDR"
line.long 0xC "RVBARPHC3_CORE7,This register is a 32-bit readable/writable register. This register belongs to Group0. This register indicates reset vector base address."
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "RVBARP_43_32,These bits indicate RVBARADDR[43:32]. It is defined in DSU TRM."
tree.end
tree.end
tree "APSC (AP-System Core)"
base ad:0x0
tree "AP_System_Core_0"
base ad:0xF12D0000
group.long 0x8++0xF
line.long 0x0 "LOCKSTEP_AUTH_UNLOCK,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved for future use. Read : return 0"
bitfld.long 0x0 0. "EN,Unlock LOCKSTEP_INJ_AUTH function" "0: Disable LOCKSTEP_INJ_AUTH function,1: Enable LOCKSTEP_INJ_AUTH function"
line.long 0x4 "LCKSTP_INJ_AUTH,Note"
hexmask.long 0x4 0.--31. 1. "ACCESS_CODE,Write 0xA5_CC1_15 value to active the validity LOCKSTEP_INJ_CMP0 and LOCKSTEP_INJ_CMP1"
line.long 0x8 "LCKSTP_INJ_CMP0,"
hexmask.long 0x8 1.--31. 1. "Reserved_1,Reserved for future use. Read : return 0"
bitfld.long 0x8 0. "ERR_INJ_CMP0,ERR_INJ_CMP0" "0: No Inject error to result of comparator 0,1: Inject error to result of comparator 0"
line.long 0xC "LCKSTP_INJ_CMP1,"
hexmask.long 0xC 1.--31. 1. "Reserved_1,Reserved for future use. Read : return 0"
bitfld.long 0xC 0. "ERR_INJ_CMP1,ERR_INJ_CMP1" "0: No Inject error to result of comparator 1,1: Inject error to result of comparator 1"
tree.end
tree "AP_System_Core_1"
base ad:0xF12F0000
group.long 0x0++0x3
line.long 0x0 "GID0,n = 0"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved for future use. Read : return 0"
hexmask.long.byte 0x0 16.--19. 1. "force_id,Error notification IDn[3:0]"
hexmask.long.word 0x0 0.--15. 1. "region_id,Authorized IDn[15:0]"
group.long 0x60++0x3
line.long 0x0 "MPU_EDC_INJ_UNLOCK,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved for future use. Read : return 0"
bitfld.long 0x0 0. "EN,Unlock MPU_EDC_INJ_AUTH function" "0: Disable MPU_EDC_INJ_AUTH function,1: Enable MPU_EDC_INJ_AUTH function"
group.long 0x68++0x3
line.long 0x0 "MPU_EDC_INJ_AUTH,"
hexmask.long 0x0 0.--31. 1. "ACCESS_CODE,Write 0xA5_CC1_EDC value to active"
group.long 0x70++0x3
line.long 0x0 "MPU_EDC_INJ_SEL,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved for future use. Read : return 0"
bitfld.long 0x0 0.--2. "SEL,MPU_EDC_INJ_SEL value:" "0,1,2,3,4,5,6,7"
group.long 0x78++0x3
line.long 0x0 "MPU_EDC_INJ_AR,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved for future use. Read : return 0"
hexmask.long.word 0x0 0.--15. 1. "EDC_INJ_AR,MPU_EDC_INJ_AR[n]=1: Insert error to n-th bit"
group.long 0x80++0x3
line.long 0x0 "MPU_EDC_INJ_AW,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved for future use. Read : return 0"
hexmask.long.word 0x0 0.--15. 1. "EDC_INJ_AW,MPU_EDC_INJ_AW[n]=1: Insert error to n-th bit"
group.long 0x88++0x3
line.long 0x0 "MPU_EDC_INJ_W,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved for future use. Read : return 0"
hexmask.long.tbyte 0x0 0.--23. 1. "EDC_INJ_W,MPU_EDC_INJ_W[n]=1: Insert error to n-th bit"
group.long 0x100++0x3
line.long 0x0 "MPU_EDC_ERROR,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved for future use. Read : return 0"
bitfld.long 0x0 3. "error3,EDC MPU Error of Slave Interface 3" "0,1"
bitfld.long 0x0 2. "error2,EDC MPU Error of Slave Interface 2" "0,1"
newline
bitfld.long 0x0 1. "error1,EDC MPU Error of Slave Interface 1" "0,1"
bitfld.long 0x0 0. "error0,EDC MPU Error of Slave Interface 0" "0,1"
group.long 0x220++0x3
line.long 0x0 "REG_ERR_EDCM_STATUS_0,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved for future use. Read : return 0"
bitfld.long 0x0 19. "m2_arid_8to11_err,Error of ARID[11:8] are protected by signal duplication in Master Interface 2" "0,1"
bitfld.long 0x0 18. "m2_awid_8to11_err,Error of AWID[11:8] are protected by signal duplication in Master Interface 2" "0,1"
newline
bitfld.long 0x0 17. "m1_arid_8to11_err,Error of ARID[11:8] are protected by signal duplication in Master Interface 1" "0,1"
bitfld.long 0x0 16. "m1_awid_8to11_err,Error of AWID[11:8] are protected by signal duplication in Master Interface 1" "0,1"
rbitfld.long 0x0 15. "Reserved0,Reserved for future use. Read : return 0" "0,1"
newline
bitfld.long 0x0 14. "error_ar_apb,Error EDC of AR-ch in APB Interface" "0,1"
bitfld.long 0x0 13. "error_aw_apb,Error EDC of AW-ch in APB Interface" "0,1"
bitfld.long 0x0 12. "error_w_apb,Error EDC of W-ch in APB Interface" "0,1"
newline
rbitfld.long 0x0 11. "Reserved1,Reserved for future use. Read : return 0" "0,1"
bitfld.long 0x0 10. "error_bresp_m2,Error EDC of BRESP-ch in Master Interface 2" "0,1"
bitfld.long 0x0 9. "error_rresp_m2,Error EDC of RRESP-ch in Master Interface 2" "0,1"
newline
bitfld.long 0x0 8. "error_r_m2,Error EDC of R-ch in Master Interface 2" "0,1"
rbitfld.long 0x0 7. "Reserved2,Reserved for future use. Read : return 0" "0,1"
bitfld.long 0x0 6. "error_bresp_m1,Error EDC of BRESP-ch in Master Interface 1" "0,1"
newline
bitfld.long 0x0 5. "error_rresp_m1,Error EDC of RRESP-ch in Master Interface 1" "0,1"
bitfld.long 0x0 4. "error_r_m1,Error EDC of R-ch in Master Interface 1" "0,1"
rbitfld.long 0x0 3. "Reserved3,Reserved for future use. Read : return 0" "0,1"
newline
bitfld.long 0x0 2. "error_bresp_m0,Error EDC of BRESP-ch in Master Interface 0" "0,1"
bitfld.long 0x0 1. "error_rresp_m0,Error EDC of RRESP-ch in Master Interface 0" "0,1"
bitfld.long 0x0 0. "error_r_m0,Error EDC of R-ch in Master Interface 0" "0,1"
group.long 0x280++0x7
line.long 0x0 "REG_ERR_SRCID_M0,"
bitfld.long 0x0 31. "clr_id,Write double_quotation1double_quotation to bit 31 of the SID register to clear SID. When detect the write access and bit 31 of write data is double_quotation1double_quotation  the SID clear signal is asserted/toggled enough to clear source ID.." "0,1"
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved for future use. Read : return 0"
hexmask.long.byte 0x0 0.--7. 1. "error_id,Error id for m0"
line.long 0x4 "REG_ERR_SRCID_M1,"
bitfld.long 0x4 31. "clr_id,Write double_quotation1double_quotation to bit 31 of the SID register to clear SID. When detect the write access and bit 31 of write data is double_quotation1double_quotation  the SID clear signal is asserted/toggled enough to clear source ID.." "0,1"
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved for future use. Read : return 0"
hexmask.long.byte 0x4 0.--7. 1. "error_id,Error id for m0"
group.long 0x290++0xB
line.long 0x0 "REG_ERR_SRCID_S_AW,"
bitfld.long 0x0 31. "clr_id,Write double_quotation1double_quotation to bit 31 of the SID register to clear SID. When detect the write access and bit 31 of write data is double_quotation1double_quotation  the SID clear signal is asserted/toggled enough to clear source ID.." "0,1"
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved for future use. Read : return 0"
hexmask.long.byte 0x0 0.--7. 1. "error_id,Error id for m0"
line.long 0x4 "REG_ERR_SRCID_S_W,"
bitfld.long 0x4 31. "clr_id,Write double_quotation1double_quotation to bit 31 of the SID register to clear SID. When detect the write access and bit 31 of write data is double_quotation1double_quotation  the SID clear signal is asserted/toggled enough to clear source ID.." "0,1"
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved for future use. Read : return 0"
hexmask.long.byte 0x4 0.--7. 1. "error_id,Error id for m0"
line.long 0x8 "REG_ERR_SRCID_S_AR,"
bitfld.long 0x8 31. "clr_id,Write double_quotation1double_quotation to bit 31 of the SID register to clear SID. When detect the write access and bit 31 of write data is double_quotation1double_quotation  the SID clear signal is asserted/toggled enough to clear source ID.." "0,1"
hexmask.long.tbyte 0x8 8.--30. 1. "Reserved_8,Reserved for future use. Read : return 0"
hexmask.long.byte 0x8 0.--7. 1. "error_id,Error id for m0"
group.long 0x2C0++0x7
line.long 0x0 "EDC_ERROR_INJECTION_M0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved for future use. Read : return 0"
bitfld.long 0x0 0. "edc_error_m0,EDC Error signal for Master Interface 0" "0,1"
line.long 0x4 "EDC_ERROR_INJECTION_M1,"
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved for future use. Read : return 0"
bitfld.long 0x4 0. "edc_error_m1,EDC Error signal for Master Interface 1" "0,1"
group.long 0x2CC++0x3
line.long 0x0 "EDC_ERROR_INJECTION_APB,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved for future use. Read : return 0"
bitfld.long 0x0 0. "edc_error_apb,EDC Error signal for APB Interface" "0,1"
group.long 0x400++0x3
line.long 0x0 "ORD_ERROR_INJECTION_SLAVE,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved for future use. Read : return 0"
bitfld.long 0x0 3. "ord_err_inj_slv_3,Order error injection and EDC MPU DUMMY of Slave Interface 3" "0,1"
bitfld.long 0x0 2. "ord_err_inj_slv_2,Order error injection and EDC MPU DUMMY of Slave Interface 2" "0,1"
newline
bitfld.long 0x0 1. "ord_err_inj_slv_1,Order error injection and EDC MPU DUMMY of Slave Interface 1" "0,1"
bitfld.long 0x0 0. "ord_err_inj_slv_0,Order error injection and EDC MPU DUMMY of Slave Interface 0" "0,1"
group.long 0x410++0x3
line.long 0x0 "ORD_ERROR_INJECTION_MASTER,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved for future use. Read : return 0"
bitfld.long 0x0 7. "ord_err_inj_zs_apb,Bus error injection at interface between Cache Coherent Interconnect and AXI Asynchronous bridge at AXI Slave APB interface (R/B channel)" "0,1"
bitfld.long 0x0 6. "ord_err_inj_zs_m2,Bus error injection at interface between Cache Coherent Interconnect and AXI Asynchronous bridge at AXI Master interface 2 (AR/AW/W channel)" "0,1"
newline
bitfld.long 0x0 5. "ord_err_inj_zs_m1,Bus error injection at interface between Cache Coherent Interconnect and AXI Asynchronous bridge at AXI Master interface 1 (AR/AW/W channel)" "0,1"
bitfld.long 0x0 4. "ord_err_inj_zs_m0,Bus error injection at interface between Cache Coherent Interconnect and AXI Asynchronous bridge at AXI Master interface 0 (AR/AW/W channel)" "0,1"
bitfld.long 0x0 3. "ord_err_inj_zx_apb,Bus error injection at interface between Cache Coherent Interconnect and AXI Asynchronous bridge at AXI Slave APB interface (AR/AW/W channel)" "0,1"
newline
bitfld.long 0x0 2. "ord_err_inj_zx_m2,Bus error injection at interface between Cache Coherent Interconnect and AXI Asynchronous bridge at AXI Master interface 2 (R/B channel)" "0,1"
bitfld.long 0x0 1. "ord_err_inj_zx_m1,Bus error injection at interface between Cache Coherent Interconnect and AXI Asynchronous bridge at AXI Master interface 1 (R/B channel)" "0,1"
bitfld.long 0x0 0. "ord_err_inj_zx_m0,Bus error injection at interface between Cache Coherent Interconnect and AXI Asynchronous bridge at AXI Master interface 0 (R/B channel)" "0,1"
group.long 0x420++0x3
line.long 0x0 "ORD_ERROR_STATUS_SLAVE,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved for future use. Read : return 0"
bitfld.long 0x0 3. "ord_err_stt_slv_3,Order error status and EDC MPU DUMMY error status of Slave Interface 3" "0,1"
bitfld.long 0x0 2. "ord_err_stt_slv_2,Order error status and EDC MPU DUMMY error status of Slave Interface 2" "0,1"
newline
bitfld.long 0x0 1. "ord_err_stt_slv_1,Order error status and EDC MPU DUMMY error status of Slave Interface 1" "0,1"
bitfld.long 0x0 0. "ord_err_stt_slv_0,Order error status and EDC MPU DUMMY error status of Slave Interface 0" "0,1"
group.long 0x430++0x3
line.long 0x0 "ORD_ERROR_STATUS_MASTER,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved for future use. Read : return 0"
bitfld.long 0x0 7. "ord_err_stt_zs_apb,Error Status ZS of APB Interface" "0,1"
bitfld.long 0x0 6. "ord_err_stt_zs_m2,Error Status ZS of Master Interface 2" "0,1"
newline
bitfld.long 0x0 5. "ord_err_stt_zs_m1,Error Status ZS of Master Interface 1" "0,1"
bitfld.long 0x0 4. "ord_err_stt_zs_m0,Error Status ZS of Master Interface 0" "0,1"
bitfld.long 0x0 3. "ord_err_stt_zx_apb,Error Status ZX of APB Interface" "0,1"
newline
bitfld.long 0x0 2. "ord_err_stt_zx_m2,Error Status ZX of Master Interface 2" "0,1"
bitfld.long 0x0 1. "ord_err_stt_zx_m1,Error Status ZX of Master Interface 1" "0,1"
bitfld.long 0x0 0. "ord_err_stt_zx_m0,Error Status ZX of Master Interface 0" "0,1"
group.long 0x2000++0x7
line.long 0x0 "DETFIX_MM,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved for future use. Read : return 0"
hexmask.long.word 0x0 0.--15. 1. "fdtime_mm,DETFIX TIMER for MM Hier"
line.long 0x4 "DETFIX_PERIPHERAL,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved for future use. Read : return 0"
hexmask.long.word 0x4 0.--15. 1. "fdtime_peripheral,DETFIX TIMER for Peripheral"
tree.end
tree "AP_System_Core_2"
base ad:0xE6280000
group.long 0x10++0x3
line.long 0x0 "APSREG_AP_CLUSTER0_AUX,n = 0"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "ACTDIS1,ADB400 AC TEST for GIC disable." "0: ADB400 AC TEST for GIC enable,1: ADB400 AC TEST for GIC disable"
newline
bitfld.long 0x0 0. "ACTDIS0,ADB400 AC TEST for ACE disable." "0: ADB400 AC TEST for ACE enable,1: ADB400 AC TEST for ACE disable"
group.long 0x9010++0x3
line.long 0x0 "APSREG_AXCC_AUX,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "ACTDIS,ADB400 AC TEST disable." "0: ADB400 AC TEST for CCI enable,1: ADB400 AC TEST for CCI disable"
group.long 0x20F00++0x3
line.long 0x0 "APSREG_P_AP_CLUSTER0_ERR_INJ,n = 0"
hexmask.long.byte 0x0 26.--31. 1. "Reserved_26,Reserved"
newline
bitfld.long 0x0 25. "ERRPCH,1: Force P-channel error." "?,1: Force P-channel error"
newline
bitfld.long 0x0 24. "ERRG2B,1: Force GCVALUE error." "?,1: Force GCVALUE error"
newline
bitfld.long 0x0 23. "ERRGICREQORDER,1: Force gic reqorder error." "?,1: Force gic reqorder error"
newline
bitfld.long 0x0 22. "ERRGICEDC,1: Force gic edc error." "?,1: Force gic edc error"
newline
bitfld.long 0x0 21. "ERRACEREQORDER,1: Force ACE reqorder error." "?,1: Force ACE reqorder error"
newline
bitfld.long 0x0 20. "ERRACEEDC,1: Force ACE edc error." "?,1: Force ACE edc error"
newline
rbitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 17. "ERRDCLS1,1: Force DCLS error 1." "?,1: Force DCLS error 1"
newline
bitfld.long 0x0 16. "ERRDCLS0,1: Force DCLS error 0." "?,1: Force DCLS error 0"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x0 8.--10. "ERRIRQ,Force nERRIRQ[2:0]." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 3.--7. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 0.--2. "FAULTIRQ,Force nFAULTIRQ[2:0]." "0,1,2,3,4,5,6,7"
group.long 0x28008++0x3
line.long 0x0 "APSREG_P_COMMON2,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 1.--2. "ARMGCNT_ERRINJECMD,B'11: Error Injection to ARMGCNT Master and Checker Comarators." "0: No Error Injection,1: Error Injection to ARMGCNT Master Comparator,2: Error Injection to ARMGCNT Checker Comparator,3: Error Injection to ARMGCNT Master and Checker.."
newline
bitfld.long 0x0 0. "ARMGCNT_ERRINJ_EN,1: Enable Error Injection to ARMGCNT." "0: Disable Error Injection to ARMGCNT,1: Enable Error Injection to ARMGCNT"
tree.end
tree.end
tree "AVS (Adaptive Voltage Scaling)"
base ad:0xE60A0000
rgroup.long 0x80++0x3
line.long 0x0 "ADVADJP,1.0"
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved (AVS)"
hexmask.long.word 0x0 0.--8. 1. "VOLCOND,AVS code"
rgroup.long 0x80++0x3
line.long 0x0 "ADVADJP_AVS,1.0"
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved (AVS)"
hexmask.long.word 0x0 0.--8. 1. "VOLCOND,AVS code"
tree.end
tree "AXI (AXI-Bus D)"
base ad:0x0
tree "AXI_bus_D_0"
base ad:0xE6700000
group.quad 0x0++0xFFF
line.quad 0x0 "QOSBW_FIX_QOS_BANK00,"
hexmask.quad.byte 0x0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8 "QOSBW_FIX_QOS_BANK01,"
hexmask.quad.byte 0x8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x10 "QOSBW_FIX_QOS_BANK02,"
hexmask.quad.byte 0x10 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x10 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x10 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x10 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x10 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x10 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x10 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x10 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x18 "QOSBW_FIX_QOS_BANK03,"
hexmask.quad.byte 0x18 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x18 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x18 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x18 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x18 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x18 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x18 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x18 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x20 "QOSBW_FIX_QOS_BANK04,"
hexmask.quad.byte 0x20 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x20 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x20 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x20 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x20 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x20 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x20 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x20 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x28 "QOSBW_FIX_QOS_BANK05,"
hexmask.quad.byte 0x28 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x28 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x28 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x28 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x28 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x28 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x28 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x28 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x30 "QOSBW_FIX_QOS_BANK06,"
hexmask.quad.byte 0x30 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x30 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x30 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x30 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x30 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x30 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x30 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x30 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x38 "QOSBW_FIX_QOS_BANK07,"
hexmask.quad.byte 0x38 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x38 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x38 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x38 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x38 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x38 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x38 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x38 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x40 "QOSBW_FIX_QOS_BANK08,"
hexmask.quad.byte 0x40 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x40 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x40 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x40 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x40 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x40 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x40 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x40 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x48 "QOSBW_FIX_QOS_BANK09,"
hexmask.quad.byte 0x48 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x48 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x48 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x48 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x48 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x48 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x48 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x48 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x50 "QOSBW_FIX_QOS_BANK010,"
hexmask.quad.byte 0x50 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x50 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x50 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x50 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x50 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x50 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x50 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x50 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x58 "QOSBW_FIX_QOS_BANK011,"
hexmask.quad.byte 0x58 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x58 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x58 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x58 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x58 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x58 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x58 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x58 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x60 "QOSBW_FIX_QOS_BANK012,"
hexmask.quad.byte 0x60 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x60 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x60 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x60 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x60 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x60 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x60 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x60 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x68 "QOSBW_FIX_QOS_BANK013,"
hexmask.quad.byte 0x68 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x68 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x68 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x68 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x68 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x68 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x68 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x68 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x70 "QOSBW_FIX_QOS_BANK014,"
hexmask.quad.byte 0x70 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x70 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x70 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x70 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x70 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x70 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x70 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x70 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x78 "QOSBW_FIX_QOS_BANK015,"
hexmask.quad.byte 0x78 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x78 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x78 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x78 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x78 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x78 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x78 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x78 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x80 "QOSBW_FIX_QOS_BANK016,"
hexmask.quad.byte 0x80 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x80 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x80 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x80 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x80 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x80 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x80 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x80 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x88 "QOSBW_FIX_QOS_BANK017,"
hexmask.quad.byte 0x88 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x88 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x88 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x88 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x88 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x88 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x88 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x88 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x90 "QOSBW_FIX_QOS_BANK018,"
hexmask.quad.byte 0x90 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x90 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x90 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x90 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x90 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x90 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x90 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x90 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x98 "QOSBW_FIX_QOS_BANK019,"
hexmask.quad.byte 0x98 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x98 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x98 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x98 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x98 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x98 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x98 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x98 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA0 "QOSBW_FIX_QOS_BANK020,"
hexmask.quad.byte 0xA0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA8 "QOSBW_FIX_QOS_BANK021,"
hexmask.quad.byte 0xA8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB0 "QOSBW_FIX_QOS_BANK022,"
hexmask.quad.byte 0xB0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB8 "QOSBW_FIX_QOS_BANK023,"
hexmask.quad.byte 0xB8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC0 "QOSBW_FIX_QOS_BANK024,"
hexmask.quad.byte 0xC0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC8 "QOSBW_FIX_QOS_BANK025,"
hexmask.quad.byte 0xC8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD0 "QOSBW_FIX_QOS_BANK026,"
hexmask.quad.byte 0xD0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD8 "QOSBW_FIX_QOS_BANK027,"
hexmask.quad.byte 0xD8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE0 "QOSBW_FIX_QOS_BANK028,"
hexmask.quad.byte 0xE0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE8 "QOSBW_FIX_QOS_BANK029,"
hexmask.quad.byte 0xE8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF0 "QOSBW_FIX_QOS_BANK030,"
hexmask.quad.byte 0xF0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF8 "QOSBW_FIX_QOS_BANK031,"
hexmask.quad.byte 0xF8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x100 "QOSBW_FIX_QOS_BANK032,"
hexmask.quad.byte 0x100 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x100 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x100 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x100 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x100 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x100 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x100 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x100 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x108 "QOSBW_FIX_QOS_BANK033,"
hexmask.quad.byte 0x108 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x108 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x108 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x108 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x108 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x108 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x108 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x108 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x110 "QOSBW_FIX_QOS_BANK034,"
hexmask.quad.byte 0x110 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x110 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x110 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x110 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x110 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x110 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x110 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x110 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x118 "QOSBW_FIX_QOS_BANK035,"
hexmask.quad.byte 0x118 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x118 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x118 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x118 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x118 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x118 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x118 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x118 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x120 "QOSBW_FIX_QOS_BANK036,"
hexmask.quad.byte 0x120 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x120 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x120 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x120 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x120 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x120 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x120 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x120 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x128 "QOSBW_FIX_QOS_BANK037,"
hexmask.quad.byte 0x128 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x128 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x128 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x128 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x128 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x128 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x128 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x128 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x130 "QOSBW_FIX_QOS_BANK038,"
hexmask.quad.byte 0x130 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x130 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x130 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x130 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x130 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x130 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x130 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x130 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x138 "QOSBW_FIX_QOS_BANK039,"
hexmask.quad.byte 0x138 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x138 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x138 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x138 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x138 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x138 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x138 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x138 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x140 "QOSBW_FIX_QOS_BANK040,"
hexmask.quad.byte 0x140 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x140 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x140 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x140 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x140 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x140 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x140 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x140 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x148 "QOSBW_FIX_QOS_BANK041,"
hexmask.quad.byte 0x148 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x148 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x148 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x148 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x148 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x148 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x148 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x148 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x150 "QOSBW_FIX_QOS_BANK042,"
hexmask.quad.byte 0x150 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x150 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x150 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x150 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x150 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x150 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x150 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x150 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x158 "QOSBW_FIX_QOS_BANK043,"
hexmask.quad.byte 0x158 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x158 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x158 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x158 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x158 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x158 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x158 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x158 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x160 "QOSBW_FIX_QOS_BANK044,"
hexmask.quad.byte 0x160 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x160 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x160 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x160 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x160 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x160 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x160 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x160 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x168 "QOSBW_FIX_QOS_BANK045,"
hexmask.quad.byte 0x168 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x168 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x168 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x168 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x168 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x168 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x168 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x168 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x170 "QOSBW_FIX_QOS_BANK046,"
hexmask.quad.byte 0x170 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x170 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x170 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x170 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x170 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x170 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x170 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x170 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x178 "QOSBW_FIX_QOS_BANK047,"
hexmask.quad.byte 0x178 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x178 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x178 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x178 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x178 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x178 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x178 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x178 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x180 "QOSBW_FIX_QOS_BANK048,"
hexmask.quad.byte 0x180 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x180 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x180 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x180 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x180 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x180 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x180 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x180 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x188 "QOSBW_FIX_QOS_BANK049,"
hexmask.quad.byte 0x188 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x188 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x188 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x188 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x188 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x188 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x188 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x188 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x190 "QOSBW_FIX_QOS_BANK050,"
hexmask.quad.byte 0x190 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x190 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x190 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x190 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x190 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x190 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x190 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x190 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x198 "QOSBW_FIX_QOS_BANK051,"
hexmask.quad.byte 0x198 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x198 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x198 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x198 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x198 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x198 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x198 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x198 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1A0 "QOSBW_FIX_QOS_BANK052,"
hexmask.quad.byte 0x1A0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1A0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1A0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1A0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1A0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1A0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1A0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1A0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1A8 "QOSBW_FIX_QOS_BANK053,"
hexmask.quad.byte 0x1A8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1A8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1A8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1A8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1A8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1A8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1A8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1A8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1B0 "QOSBW_FIX_QOS_BANK054,"
hexmask.quad.byte 0x1B0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1B0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1B0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1B0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1B0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1B0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1B0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1B0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1B8 "QOSBW_FIX_QOS_BANK055,"
hexmask.quad.byte 0x1B8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1B8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1B8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1B8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1B8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1B8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1B8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1B8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1C0 "QOSBW_FIX_QOS_BANK056,"
hexmask.quad.byte 0x1C0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1C0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1C0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1C0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1C0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1C0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1C0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1C0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1C8 "QOSBW_FIX_QOS_BANK057,"
hexmask.quad.byte 0x1C8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1C8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1C8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1C8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1C8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1C8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1C8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1C8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1D0 "QOSBW_FIX_QOS_BANK058,"
hexmask.quad.byte 0x1D0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1D0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1D0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1D0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1D0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1D0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1D0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1D0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1D8 "QOSBW_FIX_QOS_BANK059,"
hexmask.quad.byte 0x1D8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1D8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1D8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1D8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1D8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1D8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1D8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1D8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1E0 "QOSBW_FIX_QOS_BANK060,"
hexmask.quad.byte 0x1E0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1E0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1E0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1E0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1E0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1E0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1E0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1E0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1E8 "QOSBW_FIX_QOS_BANK061,"
hexmask.quad.byte 0x1E8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1E8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1E8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1E8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1E8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1E8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1E8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1E8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1F0 "QOSBW_FIX_QOS_BANK062,"
hexmask.quad.byte 0x1F0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1F0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1F0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1F0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1F0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1F0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1F0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1F0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1F8 "QOSBW_FIX_QOS_BANK063,"
hexmask.quad.byte 0x1F8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1F8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1F8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1F8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1F8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1F8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1F8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1F8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x200 "QOSBW_FIX_QOS_BANK064,"
hexmask.quad.byte 0x200 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x200 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x200 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x200 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x200 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x200 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x200 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x200 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x208 "QOSBW_FIX_QOS_BANK065,"
hexmask.quad.byte 0x208 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x208 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x208 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x208 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x208 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x208 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x208 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x208 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x210 "QOSBW_FIX_QOS_BANK066,"
hexmask.quad.byte 0x210 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x210 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x210 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x210 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x210 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x210 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x210 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x210 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x218 "QOSBW_FIX_QOS_BANK067,"
hexmask.quad.byte 0x218 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x218 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x218 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x218 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x218 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x218 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x218 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x218 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x220 "QOSBW_FIX_QOS_BANK068,"
hexmask.quad.byte 0x220 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x220 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x220 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x220 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x220 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x220 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x220 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x220 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x228 "QOSBW_FIX_QOS_BANK069,"
hexmask.quad.byte 0x228 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x228 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x228 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x228 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x228 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x228 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x228 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x228 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x230 "QOSBW_FIX_QOS_BANK070,"
hexmask.quad.byte 0x230 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x230 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x230 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x230 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x230 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x230 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x230 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x230 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x238 "QOSBW_FIX_QOS_BANK071,"
hexmask.quad.byte 0x238 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x238 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x238 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x238 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x238 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x238 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x238 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x238 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x240 "QOSBW_FIX_QOS_BANK072,"
hexmask.quad.byte 0x240 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x240 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x240 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x240 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x240 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x240 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x240 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x240 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x248 "QOSBW_FIX_QOS_BANK073,"
hexmask.quad.byte 0x248 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x248 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x248 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x248 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x248 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x248 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x248 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x248 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x250 "QOSBW_FIX_QOS_BANK074,"
hexmask.quad.byte 0x250 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x250 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x250 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x250 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x250 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x250 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x250 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x250 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x258 "QOSBW_FIX_QOS_BANK075,"
hexmask.quad.byte 0x258 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x258 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x258 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x258 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x258 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x258 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x258 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x258 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x260 "QOSBW_FIX_QOS_BANK076,"
hexmask.quad.byte 0x260 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x260 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x260 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x260 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x260 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x260 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x260 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x260 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x268 "QOSBW_FIX_QOS_BANK077,"
hexmask.quad.byte 0x268 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x268 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x268 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x268 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x268 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x268 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x268 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x268 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x270 "QOSBW_FIX_QOS_BANK078,"
hexmask.quad.byte 0x270 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x270 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x270 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x270 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x270 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x270 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x270 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x270 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x278 "QOSBW_FIX_QOS_BANK079,"
hexmask.quad.byte 0x278 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x278 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x278 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x278 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x278 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x278 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x278 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x278 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x280 "QOSBW_FIX_QOS_BANK080,"
hexmask.quad.byte 0x280 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x280 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x280 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x280 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x280 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x280 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x280 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x280 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x288 "QOSBW_FIX_QOS_BANK081,"
hexmask.quad.byte 0x288 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x288 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x288 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x288 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x288 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x288 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x288 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x288 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x290 "QOSBW_FIX_QOS_BANK082,"
hexmask.quad.byte 0x290 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x290 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x290 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x290 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x290 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x290 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x290 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x290 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x298 "QOSBW_FIX_QOS_BANK083,"
hexmask.quad.byte 0x298 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x298 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x298 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x298 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x298 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x298 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x298 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x298 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2A0 "QOSBW_FIX_QOS_BANK084,"
hexmask.quad.byte 0x2A0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2A0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2A0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2A0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2A0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2A0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2A0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2A0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2A8 "QOSBW_FIX_QOS_BANK085,"
hexmask.quad.byte 0x2A8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2A8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2A8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2A8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2A8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2A8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2A8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2A8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2B0 "QOSBW_FIX_QOS_BANK086,"
hexmask.quad.byte 0x2B0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2B0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2B0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2B0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2B0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2B0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2B0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2B0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2B8 "QOSBW_FIX_QOS_BANK087,"
hexmask.quad.byte 0x2B8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2B8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2B8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2B8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2B8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2B8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2B8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2B8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2C0 "QOSBW_FIX_QOS_BANK088,"
hexmask.quad.byte 0x2C0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2C0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2C0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2C0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2C0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2C0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2C0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2C0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2C8 "QOSBW_FIX_QOS_BANK089,"
hexmask.quad.byte 0x2C8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2C8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2C8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2C8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2C8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2C8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2C8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2C8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2D0 "QOSBW_FIX_QOS_BANK090,"
hexmask.quad.byte 0x2D0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2D0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2D0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2D0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2D0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2D0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2D0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2D0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2D8 "QOSBW_FIX_QOS_BANK091,"
hexmask.quad.byte 0x2D8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2D8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2D8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2D8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2D8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2D8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2D8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2D8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2E0 "QOSBW_FIX_QOS_BANK092,"
hexmask.quad.byte 0x2E0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2E0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2E0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2E0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2E0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2E0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2E0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2E0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2E8 "QOSBW_FIX_QOS_BANK093,"
hexmask.quad.byte 0x2E8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2E8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2E8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2E8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2E8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2E8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2E8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2E8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2F0 "QOSBW_FIX_QOS_BANK094,"
hexmask.quad.byte 0x2F0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2F0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2F0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2F0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2F0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2F0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2F0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2F0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2F8 "QOSBW_FIX_QOS_BANK095,"
hexmask.quad.byte 0x2F8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2F8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2F8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2F8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2F8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2F8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2F8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2F8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x300 "QOSBW_FIX_QOS_BANK096,"
hexmask.quad.byte 0x300 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x300 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x300 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x300 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x300 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x300 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x300 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x300 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x308 "QOSBW_FIX_QOS_BANK097,"
hexmask.quad.byte 0x308 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x308 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x308 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x308 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x308 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x308 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x308 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x308 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x310 "QOSBW_FIX_QOS_BANK098,"
hexmask.quad.byte 0x310 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x310 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x310 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x310 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x310 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x310 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x310 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x310 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x318 "QOSBW_FIX_QOS_BANK099,"
hexmask.quad.byte 0x318 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x318 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x318 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x318 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x318 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x318 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x318 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x318 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x320 "QOSBW_FIX_QOS_BANK0100,"
hexmask.quad.byte 0x320 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x320 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x320 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x320 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x320 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x320 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x320 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x320 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x328 "QOSBW_FIX_QOS_BANK0101,"
hexmask.quad.byte 0x328 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x328 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x328 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x328 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x328 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x328 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x328 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x328 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x330 "QOSBW_FIX_QOS_BANK0102,"
hexmask.quad.byte 0x330 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x330 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x330 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x330 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x330 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x330 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x330 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x330 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x338 "QOSBW_FIX_QOS_BANK0103,"
hexmask.quad.byte 0x338 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x338 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x338 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x338 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x338 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x338 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x338 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x338 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x340 "QOSBW_FIX_QOS_BANK0104,"
hexmask.quad.byte 0x340 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x340 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x340 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x340 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x340 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x340 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x340 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x340 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x348 "QOSBW_FIX_QOS_BANK0105,"
hexmask.quad.byte 0x348 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x348 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x348 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x348 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x348 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x348 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x348 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x348 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x350 "QOSBW_FIX_QOS_BANK0106,"
hexmask.quad.byte 0x350 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x350 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x350 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x350 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x350 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x350 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x350 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x350 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x358 "QOSBW_FIX_QOS_BANK0107,"
hexmask.quad.byte 0x358 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x358 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x358 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x358 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x358 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x358 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x358 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x358 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x360 "QOSBW_FIX_QOS_BANK0108,"
hexmask.quad.byte 0x360 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x360 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x360 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x360 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x360 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x360 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x360 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x360 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x368 "QOSBW_FIX_QOS_BANK0109,"
hexmask.quad.byte 0x368 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x368 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x368 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x368 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x368 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x368 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x368 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x368 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x370 "QOSBW_FIX_QOS_BANK0110,"
hexmask.quad.byte 0x370 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x370 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x370 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x370 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x370 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x370 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x370 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x370 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x378 "QOSBW_FIX_QOS_BANK0111,"
hexmask.quad.byte 0x378 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x378 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x378 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x378 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x378 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x378 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x378 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x378 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x380 "QOSBW_FIX_QOS_BANK0112,"
hexmask.quad.byte 0x380 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x380 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x380 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x380 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x380 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x380 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x380 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x380 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x388 "QOSBW_FIX_QOS_BANK0113,"
hexmask.quad.byte 0x388 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x388 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x388 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x388 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x388 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x388 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x388 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x388 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x390 "QOSBW_FIX_QOS_BANK0114,"
hexmask.quad.byte 0x390 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x390 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x390 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x390 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x390 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x390 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x390 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x390 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x398 "QOSBW_FIX_QOS_BANK0115,"
hexmask.quad.byte 0x398 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x398 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x398 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x398 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x398 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x398 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x398 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x398 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3A0 "QOSBW_FIX_QOS_BANK0116,"
hexmask.quad.byte 0x3A0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3A0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3A0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3A0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3A0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3A0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3A0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3A0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3A8 "QOSBW_FIX_QOS_BANK0117,"
hexmask.quad.byte 0x3A8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3A8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3A8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3A8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3A8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3A8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3A8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3A8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3B0 "QOSBW_FIX_QOS_BANK0118,"
hexmask.quad.byte 0x3B0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3B0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3B0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3B0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3B0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3B0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3B0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3B0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3B8 "QOSBW_FIX_QOS_BANK0119,"
hexmask.quad.byte 0x3B8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3B8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3B8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3B8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3B8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3B8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3B8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3B8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3C0 "QOSBW_FIX_QOS_BANK0120,"
hexmask.quad.byte 0x3C0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3C0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3C0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3C0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3C0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3C0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3C0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3C0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3C8 "QOSBW_FIX_QOS_BANK0121,"
hexmask.quad.byte 0x3C8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3C8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3C8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3C8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3C8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3C8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3C8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3C8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3D0 "QOSBW_FIX_QOS_BANK0122,"
hexmask.quad.byte 0x3D0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3D0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3D0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3D0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3D0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3D0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3D0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3D0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3D8 "QOSBW_FIX_QOS_BANK0123,"
hexmask.quad.byte 0x3D8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3D8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3D8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3D8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3D8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3D8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3D8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3D8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3E0 "QOSBW_FIX_QOS_BANK0124,"
hexmask.quad.byte 0x3E0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3E0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3E0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3E0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3E0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3E0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3E0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3E0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3E8 "QOSBW_FIX_QOS_BANK0125,"
hexmask.quad.byte 0x3E8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3E8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3E8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3E8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3E8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3E8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3E8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3E8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3F0 "QOSBW_FIX_QOS_BANK0126,"
hexmask.quad.byte 0x3F0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3F0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3F0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3F0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3F0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3F0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3F0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3F0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3F8 "QOSBW_FIX_QOS_BANK0127,"
hexmask.quad.byte 0x3F8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3F8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3F8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3F8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3F8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3F8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3F8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3F8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x400 "QOSBW_FIX_QOS_BANK0128,"
hexmask.quad.byte 0x400 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x400 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x400 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x400 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x400 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x400 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x400 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x400 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x408 "QOSBW_FIX_QOS_BANK0129,"
hexmask.quad.byte 0x408 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x408 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x408 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x408 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x408 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x408 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x408 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x408 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x410 "QOSBW_FIX_QOS_BANK0130,"
hexmask.quad.byte 0x410 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x410 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x410 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x410 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x410 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x410 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x410 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x410 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x418 "QOSBW_FIX_QOS_BANK0131,"
hexmask.quad.byte 0x418 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x418 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x418 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x418 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x418 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x418 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x418 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x418 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x420 "QOSBW_FIX_QOS_BANK0132,"
hexmask.quad.byte 0x420 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x420 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x420 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x420 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x420 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x420 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x420 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x420 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x428 "QOSBW_FIX_QOS_BANK0133,"
hexmask.quad.byte 0x428 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x428 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x428 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x428 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x428 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x428 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x428 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x428 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x430 "QOSBW_FIX_QOS_BANK0134,"
hexmask.quad.byte 0x430 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x430 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x430 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x430 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x430 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x430 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x430 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x430 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x438 "QOSBW_FIX_QOS_BANK0135,"
hexmask.quad.byte 0x438 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x438 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x438 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x438 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x438 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x438 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x438 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x438 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x440 "QOSBW_FIX_QOS_BANK0136,"
hexmask.quad.byte 0x440 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x440 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x440 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x440 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x440 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x440 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x440 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x440 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x448 "QOSBW_FIX_QOS_BANK0137,"
hexmask.quad.byte 0x448 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x448 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x448 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x448 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x448 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x448 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x448 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x448 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x450 "QOSBW_FIX_QOS_BANK0138,"
hexmask.quad.byte 0x450 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x450 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x450 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x450 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x450 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x450 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x450 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x450 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x458 "QOSBW_FIX_QOS_BANK0139,"
hexmask.quad.byte 0x458 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x458 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x458 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x458 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x458 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x458 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x458 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x458 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x460 "QOSBW_FIX_QOS_BANK0140,"
hexmask.quad.byte 0x460 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x460 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x460 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x460 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x460 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x460 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x460 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x460 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x468 "QOSBW_FIX_QOS_BANK0141,"
hexmask.quad.byte 0x468 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x468 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x468 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x468 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x468 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x468 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x468 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x468 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x470 "QOSBW_FIX_QOS_BANK0142,"
hexmask.quad.byte 0x470 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x470 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x470 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x470 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x470 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x470 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x470 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x470 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x478 "QOSBW_FIX_QOS_BANK0143,"
hexmask.quad.byte 0x478 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x478 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x478 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x478 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x478 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x478 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x478 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x478 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x480 "QOSBW_FIX_QOS_BANK0144,"
hexmask.quad.byte 0x480 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x480 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x480 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x480 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x480 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x480 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x480 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x480 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x488 "QOSBW_FIX_QOS_BANK0145,"
hexmask.quad.byte 0x488 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x488 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x488 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x488 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x488 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x488 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x488 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x488 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x490 "QOSBW_FIX_QOS_BANK0146,"
hexmask.quad.byte 0x490 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x490 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x490 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x490 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x490 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x490 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x490 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x490 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x498 "QOSBW_FIX_QOS_BANK0147,"
hexmask.quad.byte 0x498 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x498 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x498 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x498 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x498 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x498 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x498 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x498 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4A0 "QOSBW_FIX_QOS_BANK0148,"
hexmask.quad.byte 0x4A0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4A0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4A0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4A0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4A0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4A0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4A0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4A0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4A8 "QOSBW_FIX_QOS_BANK0149,"
hexmask.quad.byte 0x4A8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4A8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4A8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4A8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4A8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4A8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4A8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4A8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4B0 "QOSBW_FIX_QOS_BANK0150,"
hexmask.quad.byte 0x4B0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4B0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4B0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4B0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4B0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4B0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4B0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4B0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4B8 "QOSBW_FIX_QOS_BANK0151,"
hexmask.quad.byte 0x4B8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4B8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4B8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4B8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4B8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4B8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4B8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4B8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4C0 "QOSBW_FIX_QOS_BANK0152,"
hexmask.quad.byte 0x4C0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4C0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4C0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4C0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4C0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4C0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4C0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4C0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4C8 "QOSBW_FIX_QOS_BANK0153,"
hexmask.quad.byte 0x4C8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4C8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4C8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4C8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4C8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4C8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4C8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4C8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4D0 "QOSBW_FIX_QOS_BANK0154,"
hexmask.quad.byte 0x4D0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4D0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4D0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4D0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4D0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4D0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4D0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4D0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4D8 "QOSBW_FIX_QOS_BANK0155,"
hexmask.quad.byte 0x4D8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4D8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4D8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4D8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4D8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4D8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4D8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4D8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4E0 "QOSBW_FIX_QOS_BANK0156,"
hexmask.quad.byte 0x4E0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4E0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4E0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4E0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4E0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4E0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4E0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4E0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4E8 "QOSBW_FIX_QOS_BANK0157,"
hexmask.quad.byte 0x4E8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4E8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4E8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4E8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4E8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4E8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4E8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4E8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4F0 "QOSBW_FIX_QOS_BANK0158,"
hexmask.quad.byte 0x4F0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4F0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4F0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4F0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4F0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4F0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4F0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4F0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4F8 "QOSBW_FIX_QOS_BANK0159,"
hexmask.quad.byte 0x4F8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4F8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4F8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4F8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4F8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4F8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4F8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4F8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x500 "QOSBW_FIX_QOS_BANK0160,"
hexmask.quad.byte 0x500 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x500 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x500 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x500 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x500 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x500 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x500 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x500 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x508 "QOSBW_FIX_QOS_BANK0161,"
hexmask.quad.byte 0x508 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x508 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x508 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x508 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x508 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x508 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x508 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x508 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x510 "QOSBW_FIX_QOS_BANK0162,"
hexmask.quad.byte 0x510 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x510 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x510 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x510 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x510 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x510 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x510 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x510 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x518 "QOSBW_FIX_QOS_BANK0163,"
hexmask.quad.byte 0x518 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x518 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x518 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x518 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x518 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x518 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x518 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x518 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x520 "QOSBW_FIX_QOS_BANK0164,"
hexmask.quad.byte 0x520 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x520 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x520 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x520 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x520 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x520 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x520 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x520 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x528 "QOSBW_FIX_QOS_BANK0165,"
hexmask.quad.byte 0x528 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x528 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x528 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x528 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x528 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x528 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x528 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x528 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x530 "QOSBW_FIX_QOS_BANK0166,"
hexmask.quad.byte 0x530 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x530 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x530 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x530 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x530 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x530 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x530 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x530 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x538 "QOSBW_FIX_QOS_BANK0167,"
hexmask.quad.byte 0x538 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x538 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x538 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x538 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x538 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x538 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x538 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x538 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x540 "QOSBW_FIX_QOS_BANK0168,"
hexmask.quad.byte 0x540 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x540 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x540 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x540 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x540 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x540 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x540 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x540 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x548 "QOSBW_FIX_QOS_BANK0169,"
hexmask.quad.byte 0x548 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x548 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x548 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x548 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x548 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x548 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x548 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x548 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x550 "QOSBW_FIX_QOS_BANK0170,"
hexmask.quad.byte 0x550 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x550 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x550 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x550 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x550 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x550 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x550 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x550 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x558 "QOSBW_FIX_QOS_BANK0171,"
hexmask.quad.byte 0x558 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x558 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x558 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x558 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x558 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x558 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x558 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x558 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x560 "QOSBW_FIX_QOS_BANK0172,"
hexmask.quad.byte 0x560 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x560 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x560 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x560 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x560 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x560 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x560 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x560 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x568 "QOSBW_FIX_QOS_BANK0173,"
hexmask.quad.byte 0x568 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x568 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x568 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x568 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x568 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x568 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x568 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x568 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x570 "QOSBW_FIX_QOS_BANK0174,"
hexmask.quad.byte 0x570 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x570 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x570 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x570 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x570 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x570 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x570 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x570 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x578 "QOSBW_FIX_QOS_BANK0175,"
hexmask.quad.byte 0x578 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x578 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x578 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x578 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x578 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x578 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x578 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x578 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x580 "QOSBW_FIX_QOS_BANK0176,"
hexmask.quad.byte 0x580 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x580 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x580 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x580 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x580 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x580 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x580 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x580 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x588 "QOSBW_FIX_QOS_BANK0177,"
hexmask.quad.byte 0x588 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x588 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x588 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x588 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x588 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x588 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x588 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x588 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x590 "QOSBW_FIX_QOS_BANK0178,"
hexmask.quad.byte 0x590 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x590 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x590 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x590 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x590 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x590 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x590 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x590 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x598 "QOSBW_FIX_QOS_BANK0179,"
hexmask.quad.byte 0x598 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x598 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x598 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x598 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x598 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x598 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x598 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x598 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5A0 "QOSBW_FIX_QOS_BANK0180,"
hexmask.quad.byte 0x5A0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5A0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5A0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5A0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5A0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5A0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5A0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5A0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5A8 "QOSBW_FIX_QOS_BANK0181,"
hexmask.quad.byte 0x5A8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5A8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5A8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5A8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5A8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5A8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5A8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5A8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5B0 "QOSBW_FIX_QOS_BANK0182,"
hexmask.quad.byte 0x5B0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5B0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5B0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5B0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5B0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5B0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5B0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5B0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5B8 "QOSBW_FIX_QOS_BANK0183,"
hexmask.quad.byte 0x5B8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5B8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5B8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5B8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5B8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5B8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5B8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5B8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5C0 "QOSBW_FIX_QOS_BANK0184,"
hexmask.quad.byte 0x5C0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5C0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5C0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5C0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5C0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5C0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5C0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5C0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5C8 "QOSBW_FIX_QOS_BANK0185,"
hexmask.quad.byte 0x5C8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5C8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5C8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5C8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5C8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5C8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5C8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5C8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5D0 "QOSBW_FIX_QOS_BANK0186,"
hexmask.quad.byte 0x5D0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5D0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5D0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5D0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5D0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5D0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5D0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5D0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5D8 "QOSBW_FIX_QOS_BANK0187,"
hexmask.quad.byte 0x5D8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5D8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5D8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5D8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5D8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5D8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5D8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5D8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5E0 "QOSBW_FIX_QOS_BANK0188,"
hexmask.quad.byte 0x5E0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5E0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5E0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5E0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5E0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5E0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5E0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5E0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5E8 "QOSBW_FIX_QOS_BANK0189,"
hexmask.quad.byte 0x5E8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5E8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5E8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5E8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5E8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5E8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5E8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5E8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5F0 "QOSBW_FIX_QOS_BANK0190,"
hexmask.quad.byte 0x5F0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5F0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5F0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5F0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5F0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5F0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5F0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5F0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5F8 "QOSBW_FIX_QOS_BANK0191,"
hexmask.quad.byte 0x5F8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5F8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5F8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5F8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5F8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5F8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5F8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5F8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x600 "QOSBW_FIX_QOS_BANK0192,"
hexmask.quad.byte 0x600 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x600 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x600 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x600 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x600 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x600 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x600 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x600 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x608 "QOSBW_FIX_QOS_BANK0193,"
hexmask.quad.byte 0x608 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x608 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x608 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x608 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x608 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x608 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x608 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x608 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x610 "QOSBW_FIX_QOS_BANK0194,"
hexmask.quad.byte 0x610 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x610 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x610 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x610 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x610 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x610 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x610 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x610 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x618 "QOSBW_FIX_QOS_BANK0195,"
hexmask.quad.byte 0x618 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x618 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x618 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x618 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x618 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x618 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x618 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x618 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x620 "QOSBW_FIX_QOS_BANK0196,"
hexmask.quad.byte 0x620 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x620 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x620 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x620 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x620 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x620 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x620 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x620 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x628 "QOSBW_FIX_QOS_BANK0197,"
hexmask.quad.byte 0x628 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x628 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x628 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x628 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x628 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x628 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x628 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x628 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x630 "QOSBW_FIX_QOS_BANK0198,"
hexmask.quad.byte 0x630 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x630 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x630 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x630 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x630 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x630 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x630 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x630 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x638 "QOSBW_FIX_QOS_BANK0199,"
hexmask.quad.byte 0x638 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x638 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x638 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x638 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x638 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x638 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x638 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x638 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x640 "QOSBW_FIX_QOS_BANK0200,"
hexmask.quad.byte 0x640 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x640 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x640 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x640 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x640 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x640 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x640 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x640 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x648 "QOSBW_FIX_QOS_BANK0201,"
hexmask.quad.byte 0x648 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x648 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x648 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x648 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x648 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x648 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x648 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x648 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x650 "QOSBW_FIX_QOS_BANK0202,"
hexmask.quad.byte 0x650 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x650 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x650 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x650 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x650 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x650 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x650 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x650 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x658 "QOSBW_FIX_QOS_BANK0203,"
hexmask.quad.byte 0x658 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x658 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x658 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x658 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x658 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x658 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x658 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x658 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x660 "QOSBW_FIX_QOS_BANK0204,"
hexmask.quad.byte 0x660 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x660 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x660 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x660 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x660 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x660 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x660 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x660 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x668 "QOSBW_FIX_QOS_BANK0205,"
hexmask.quad.byte 0x668 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x668 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x668 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x668 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x668 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x668 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x668 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x668 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x670 "QOSBW_FIX_QOS_BANK0206,"
hexmask.quad.byte 0x670 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x670 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x670 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x670 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x670 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x670 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x670 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x670 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x678 "QOSBW_FIX_QOS_BANK0207,"
hexmask.quad.byte 0x678 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x678 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x678 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x678 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x678 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x678 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x678 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x678 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x680 "QOSBW_FIX_QOS_BANK0208,"
hexmask.quad.byte 0x680 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x680 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x680 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x680 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x680 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x680 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x680 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x680 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x688 "QOSBW_FIX_QOS_BANK0209,"
hexmask.quad.byte 0x688 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x688 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x688 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x688 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x688 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x688 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x688 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x688 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x690 "QOSBW_FIX_QOS_BANK0210,"
hexmask.quad.byte 0x690 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x690 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x690 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x690 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x690 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x690 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x690 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x690 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x698 "QOSBW_FIX_QOS_BANK0211,"
hexmask.quad.byte 0x698 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x698 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x698 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x698 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x698 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x698 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x698 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x698 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6A0 "QOSBW_FIX_QOS_BANK0212,"
hexmask.quad.byte 0x6A0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6A0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6A0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6A0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6A0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6A0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6A0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6A0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6A8 "QOSBW_FIX_QOS_BANK0213,"
hexmask.quad.byte 0x6A8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6A8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6A8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6A8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6A8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6A8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6A8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6A8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6B0 "QOSBW_FIX_QOS_BANK0214,"
hexmask.quad.byte 0x6B0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6B0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6B0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6B0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6B0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6B0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6B0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6B0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6B8 "QOSBW_FIX_QOS_BANK0215,"
hexmask.quad.byte 0x6B8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6B8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6B8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6B8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6B8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6B8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6B8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6B8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6C0 "QOSBW_FIX_QOS_BANK0216,"
hexmask.quad.byte 0x6C0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6C0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6C0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6C0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6C0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6C0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6C0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6C0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6C8 "QOSBW_FIX_QOS_BANK0217,"
hexmask.quad.byte 0x6C8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6C8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6C8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6C8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6C8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6C8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6C8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6C8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6D0 "QOSBW_FIX_QOS_BANK0218,"
hexmask.quad.byte 0x6D0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6D0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6D0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6D0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6D0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6D0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6D0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6D0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6D8 "QOSBW_FIX_QOS_BANK0219,"
hexmask.quad.byte 0x6D8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6D8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6D8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6D8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6D8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6D8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6D8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6D8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6E0 "QOSBW_FIX_QOS_BANK0220,"
hexmask.quad.byte 0x6E0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6E0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6E0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6E0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6E0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6E0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6E0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6E0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6E8 "QOSBW_FIX_QOS_BANK0221,"
hexmask.quad.byte 0x6E8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6E8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6E8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6E8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6E8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6E8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6E8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6E8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6F0 "QOSBW_FIX_QOS_BANK0222,"
hexmask.quad.byte 0x6F0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6F0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6F0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6F0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6F0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6F0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6F0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6F0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6F8 "QOSBW_FIX_QOS_BANK0223,"
hexmask.quad.byte 0x6F8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6F8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6F8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6F8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6F8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6F8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6F8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6F8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x700 "QOSBW_FIX_QOS_BANK0224,"
hexmask.quad.byte 0x700 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x700 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x700 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x700 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x700 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x700 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x700 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x700 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x708 "QOSBW_FIX_QOS_BANK0225,"
hexmask.quad.byte 0x708 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x708 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x708 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x708 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x708 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x708 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x708 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x708 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x710 "QOSBW_FIX_QOS_BANK0226,"
hexmask.quad.byte 0x710 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x710 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x710 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x710 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x710 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x710 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x710 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x710 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x718 "QOSBW_FIX_QOS_BANK0227,"
hexmask.quad.byte 0x718 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x718 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x718 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x718 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x718 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x718 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x718 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x718 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x720 "QOSBW_FIX_QOS_BANK0228,"
hexmask.quad.byte 0x720 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x720 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x720 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x720 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x720 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x720 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x720 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x720 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x728 "QOSBW_FIX_QOS_BANK0229,"
hexmask.quad.byte 0x728 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x728 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x728 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x728 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x728 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x728 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x728 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x728 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x730 "QOSBW_FIX_QOS_BANK0230,"
hexmask.quad.byte 0x730 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x730 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x730 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x730 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x730 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x730 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x730 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x730 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x738 "QOSBW_FIX_QOS_BANK0231,"
hexmask.quad.byte 0x738 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x738 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x738 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x738 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x738 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x738 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x738 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x738 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x740 "QOSBW_FIX_QOS_BANK0232,"
hexmask.quad.byte 0x740 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x740 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x740 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x740 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x740 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x740 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x740 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x740 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x748 "QOSBW_FIX_QOS_BANK0233,"
hexmask.quad.byte 0x748 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x748 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x748 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x748 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x748 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x748 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x748 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x748 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x750 "QOSBW_FIX_QOS_BANK0234,"
hexmask.quad.byte 0x750 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x750 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x750 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x750 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x750 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x750 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x750 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x750 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x758 "QOSBW_FIX_QOS_BANK0235,"
hexmask.quad.byte 0x758 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x758 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x758 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x758 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x758 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x758 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x758 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x758 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x760 "QOSBW_FIX_QOS_BANK0236,"
hexmask.quad.byte 0x760 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x760 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x760 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x760 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x760 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x760 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x760 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x760 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x768 "QOSBW_FIX_QOS_BANK0237,"
hexmask.quad.byte 0x768 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x768 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x768 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x768 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x768 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x768 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x768 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x768 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x770 "QOSBW_FIX_QOS_BANK0238,"
hexmask.quad.byte 0x770 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x770 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x770 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x770 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x770 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x770 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x770 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x770 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x778 "QOSBW_FIX_QOS_BANK0239,"
hexmask.quad.byte 0x778 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x778 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x778 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x778 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x778 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x778 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x778 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x778 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x780 "QOSBW_FIX_QOS_BANK0240,"
hexmask.quad.byte 0x780 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x780 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x780 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x780 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x780 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x780 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x780 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x780 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x788 "QOSBW_FIX_QOS_BANK0241,"
hexmask.quad.byte 0x788 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x788 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x788 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x788 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x788 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x788 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x788 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x788 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x790 "QOSBW_FIX_QOS_BANK0242,"
hexmask.quad.byte 0x790 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x790 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x790 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x790 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x790 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x790 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x790 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x790 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x798 "QOSBW_FIX_QOS_BANK0243,"
hexmask.quad.byte 0x798 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x798 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x798 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x798 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x798 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x798 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x798 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x798 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7A0 "QOSBW_FIX_QOS_BANK0244,"
hexmask.quad.byte 0x7A0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7A0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7A0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7A0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7A0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7A0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7A0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7A0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7A8 "QOSBW_FIX_QOS_BANK0245,"
hexmask.quad.byte 0x7A8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7A8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7A8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7A8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7A8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7A8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7A8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7A8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7B0 "QOSBW_FIX_QOS_BANK0246,"
hexmask.quad.byte 0x7B0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7B0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7B0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7B0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7B0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7B0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7B0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7B0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7B8 "QOSBW_FIX_QOS_BANK0247,"
hexmask.quad.byte 0x7B8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7B8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7B8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7B8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7B8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7B8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7B8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7B8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7C0 "QOSBW_FIX_QOS_BANK0248,"
hexmask.quad.byte 0x7C0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7C0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7C0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7C0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7C0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7C0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7C0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7C0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7C8 "QOSBW_FIX_QOS_BANK0249,"
hexmask.quad.byte 0x7C8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7C8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7C8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7C8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7C8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7C8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7C8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7C8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7D0 "QOSBW_FIX_QOS_BANK0250,"
hexmask.quad.byte 0x7D0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7D0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7D0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7D0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7D0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7D0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7D0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7D0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7D8 "QOSBW_FIX_QOS_BANK0251,"
hexmask.quad.byte 0x7D8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7D8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7D8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7D8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7D8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7D8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7D8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7D8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7E0 "QOSBW_FIX_QOS_BANK0252,"
hexmask.quad.byte 0x7E0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7E0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7E0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7E0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7E0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7E0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7E0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7E0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7E8 "QOSBW_FIX_QOS_BANK0253,"
hexmask.quad.byte 0x7E8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7E8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7E8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7E8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7E8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7E8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7E8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7E8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7F0 "QOSBW_FIX_QOS_BANK0254,"
hexmask.quad.byte 0x7F0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7F0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7F0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7F0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7F0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7F0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7F0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7F0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7F8 "QOSBW_FIX_QOS_BANK0255,"
hexmask.quad.byte 0x7F8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7F8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7F8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7F8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7F8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7F8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7F8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7F8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x800 "QOSBW_FIX_QOS_BANK0256,"
hexmask.quad.byte 0x800 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x800 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x800 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x800 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x800 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x800 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x800 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x800 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x808 "QOSBW_FIX_QOS_BANK0257,"
hexmask.quad.byte 0x808 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x808 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x808 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x808 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x808 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x808 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x808 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x808 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x810 "QOSBW_FIX_QOS_BANK0258,"
hexmask.quad.byte 0x810 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x810 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x810 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x810 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x810 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x810 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x810 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x810 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x818 "QOSBW_FIX_QOS_BANK0259,"
hexmask.quad.byte 0x818 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x818 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x818 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x818 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x818 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x818 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x818 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x818 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x820 "QOSBW_FIX_QOS_BANK0260,"
hexmask.quad.byte 0x820 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x820 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x820 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x820 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x820 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x820 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x820 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x820 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x828 "QOSBW_FIX_QOS_BANK0261,"
hexmask.quad.byte 0x828 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x828 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x828 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x828 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x828 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x828 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x828 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x828 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x830 "QOSBW_FIX_QOS_BANK0262,"
hexmask.quad.byte 0x830 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x830 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x830 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x830 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x830 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x830 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x830 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x830 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x838 "QOSBW_FIX_QOS_BANK0263,"
hexmask.quad.byte 0x838 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x838 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x838 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x838 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x838 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x838 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x838 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x838 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x840 "QOSBW_FIX_QOS_BANK0264,"
hexmask.quad.byte 0x840 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x840 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x840 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x840 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x840 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x840 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x840 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x840 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x848 "QOSBW_FIX_QOS_BANK0265,"
hexmask.quad.byte 0x848 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x848 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x848 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x848 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x848 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x848 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x848 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x848 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x850 "QOSBW_FIX_QOS_BANK0266,"
hexmask.quad.byte 0x850 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x850 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x850 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x850 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x850 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x850 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x850 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x850 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x858 "QOSBW_FIX_QOS_BANK0267,"
hexmask.quad.byte 0x858 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x858 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x858 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x858 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x858 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x858 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x858 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x858 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x860 "QOSBW_FIX_QOS_BANK0268,"
hexmask.quad.byte 0x860 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x860 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x860 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x860 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x860 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x860 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x860 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x860 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x868 "QOSBW_FIX_QOS_BANK0269,"
hexmask.quad.byte 0x868 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x868 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x868 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x868 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x868 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x868 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x868 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x868 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x870 "QOSBW_FIX_QOS_BANK0270,"
hexmask.quad.byte 0x870 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x870 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x870 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x870 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x870 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x870 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x870 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x870 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x878 "QOSBW_FIX_QOS_BANK0271,"
hexmask.quad.byte 0x878 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x878 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x878 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x878 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x878 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x878 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x878 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x878 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x880 "QOSBW_FIX_QOS_BANK0272,"
hexmask.quad.byte 0x880 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x880 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x880 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x880 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x880 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x880 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x880 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x880 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x888 "QOSBW_FIX_QOS_BANK0273,"
hexmask.quad.byte 0x888 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x888 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x888 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x888 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x888 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x888 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x888 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x888 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x890 "QOSBW_FIX_QOS_BANK0274,"
hexmask.quad.byte 0x890 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x890 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x890 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x890 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x890 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x890 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x890 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x890 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x898 "QOSBW_FIX_QOS_BANK0275,"
hexmask.quad.byte 0x898 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x898 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x898 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x898 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x898 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x898 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x898 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x898 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8A0 "QOSBW_FIX_QOS_BANK0276,"
hexmask.quad.byte 0x8A0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8A0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8A0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8A0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8A0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8A0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8A0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8A0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8A8 "QOSBW_FIX_QOS_BANK0277,"
hexmask.quad.byte 0x8A8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8A8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8A8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8A8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8A8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8A8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8A8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8A8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8B0 "QOSBW_FIX_QOS_BANK0278,"
hexmask.quad.byte 0x8B0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8B0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8B0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8B0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8B0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8B0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8B0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8B0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8B8 "QOSBW_FIX_QOS_BANK0279,"
hexmask.quad.byte 0x8B8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8B8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8B8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8B8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8B8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8B8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8B8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8B8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8C0 "QOSBW_FIX_QOS_BANK0280,"
hexmask.quad.byte 0x8C0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8C0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8C0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8C0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8C0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8C0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8C0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8C0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8C8 "QOSBW_FIX_QOS_BANK0281,"
hexmask.quad.byte 0x8C8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8C8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8C8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8C8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8C8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8C8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8C8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8C8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8D0 "QOSBW_FIX_QOS_BANK0282,"
hexmask.quad.byte 0x8D0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8D0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8D0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8D0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8D0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8D0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8D0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8D0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8D8 "QOSBW_FIX_QOS_BANK0283,"
hexmask.quad.byte 0x8D8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8D8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8D8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8D8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8D8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8D8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8D8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8D8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8E0 "QOSBW_FIX_QOS_BANK0284,"
hexmask.quad.byte 0x8E0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8E0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8E0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8E0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8E0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8E0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8E0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8E0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8E8 "QOSBW_FIX_QOS_BANK0285,"
hexmask.quad.byte 0x8E8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8E8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8E8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8E8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8E8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8E8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8E8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8E8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8F0 "QOSBW_FIX_QOS_BANK0286,"
hexmask.quad.byte 0x8F0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8F0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8F0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8F0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8F0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8F0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8F0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8F0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8F8 "QOSBW_FIX_QOS_BANK0287,"
hexmask.quad.byte 0x8F8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8F8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8F8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8F8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8F8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8F8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8F8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8F8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x900 "QOSBW_FIX_QOS_BANK0288,"
hexmask.quad.byte 0x900 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x900 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x900 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x900 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x900 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x900 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x900 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x900 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x908 "QOSBW_FIX_QOS_BANK0289,"
hexmask.quad.byte 0x908 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x908 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x908 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x908 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x908 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x908 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x908 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x908 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x910 "QOSBW_FIX_QOS_BANK0290,"
hexmask.quad.byte 0x910 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x910 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x910 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x910 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x910 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x910 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x910 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x910 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x918 "QOSBW_FIX_QOS_BANK0291,"
hexmask.quad.byte 0x918 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x918 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x918 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x918 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x918 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x918 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x918 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x918 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x920 "QOSBW_FIX_QOS_BANK0292,"
hexmask.quad.byte 0x920 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x920 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x920 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x920 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x920 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x920 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x920 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x920 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x928 "QOSBW_FIX_QOS_BANK0293,"
hexmask.quad.byte 0x928 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x928 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x928 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x928 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x928 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x928 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x928 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x928 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x930 "QOSBW_FIX_QOS_BANK0294,"
hexmask.quad.byte 0x930 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x930 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x930 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x930 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x930 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x930 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x930 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x930 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x938 "QOSBW_FIX_QOS_BANK0295,"
hexmask.quad.byte 0x938 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x938 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x938 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x938 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x938 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x938 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x938 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x938 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x940 "QOSBW_FIX_QOS_BANK0296,"
hexmask.quad.byte 0x940 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x940 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x940 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x940 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x940 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x940 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x940 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x940 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x948 "QOSBW_FIX_QOS_BANK0297,"
hexmask.quad.byte 0x948 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x948 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x948 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x948 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x948 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x948 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x948 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x948 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x950 "QOSBW_FIX_QOS_BANK0298,"
hexmask.quad.byte 0x950 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x950 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x950 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x950 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x950 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x950 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x950 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x950 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x958 "QOSBW_FIX_QOS_BANK0299,"
hexmask.quad.byte 0x958 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x958 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x958 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x958 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x958 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x958 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x958 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x958 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x960 "QOSBW_FIX_QOS_BANK0300,"
hexmask.quad.byte 0x960 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x960 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x960 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x960 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x960 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x960 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x960 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x960 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x968 "QOSBW_FIX_QOS_BANK0301,"
hexmask.quad.byte 0x968 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x968 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x968 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x968 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x968 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x968 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x968 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x968 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x970 "QOSBW_FIX_QOS_BANK0302,"
hexmask.quad.byte 0x970 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x970 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x970 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x970 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x970 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x970 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x970 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x970 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x978 "QOSBW_FIX_QOS_BANK0303,"
hexmask.quad.byte 0x978 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x978 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x978 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x978 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x978 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x978 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x978 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x978 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x980 "QOSBW_FIX_QOS_BANK0304,"
hexmask.quad.byte 0x980 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x980 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x980 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x980 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x980 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x980 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x980 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x980 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x988 "QOSBW_FIX_QOS_BANK0305,"
hexmask.quad.byte 0x988 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x988 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x988 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x988 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x988 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x988 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x988 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x988 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x990 "QOSBW_FIX_QOS_BANK0306,"
hexmask.quad.byte 0x990 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x990 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x990 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x990 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x990 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x990 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x990 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x990 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x998 "QOSBW_FIX_QOS_BANK0307,"
hexmask.quad.byte 0x998 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x998 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x998 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x998 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x998 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x998 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x998 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x998 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9A0 "QOSBW_FIX_QOS_BANK0308,"
hexmask.quad.byte 0x9A0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9A0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9A0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9A0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9A0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9A0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9A0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9A0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9A8 "QOSBW_FIX_QOS_BANK0309,"
hexmask.quad.byte 0x9A8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9A8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9A8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9A8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9A8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9A8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9A8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9A8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9B0 "QOSBW_FIX_QOS_BANK0310,"
hexmask.quad.byte 0x9B0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9B0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9B0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9B0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9B0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9B0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9B0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9B0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9B8 "QOSBW_FIX_QOS_BANK0311,"
hexmask.quad.byte 0x9B8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9B8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9B8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9B8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9B8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9B8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9B8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9B8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9C0 "QOSBW_FIX_QOS_BANK0312,"
hexmask.quad.byte 0x9C0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9C0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9C0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9C0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9C0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9C0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9C0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9C0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9C8 "QOSBW_FIX_QOS_BANK0313,"
hexmask.quad.byte 0x9C8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9C8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9C8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9C8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9C8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9C8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9C8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9C8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9D0 "QOSBW_FIX_QOS_BANK0314,"
hexmask.quad.byte 0x9D0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9D0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9D0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9D0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9D0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9D0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9D0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9D0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9D8 "QOSBW_FIX_QOS_BANK0315,"
hexmask.quad.byte 0x9D8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9D8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9D8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9D8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9D8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9D8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9D8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9D8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9E0 "QOSBW_FIX_QOS_BANK0316,"
hexmask.quad.byte 0x9E0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9E0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9E0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9E0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9E0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9E0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9E0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9E0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9E8 "QOSBW_FIX_QOS_BANK0317,"
hexmask.quad.byte 0x9E8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9E8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9E8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9E8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9E8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9E8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9E8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9E8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9F0 "QOSBW_FIX_QOS_BANK0318,"
hexmask.quad.byte 0x9F0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9F0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9F0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9F0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9F0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9F0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9F0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9F0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9F8 "QOSBW_FIX_QOS_BANK0319,"
hexmask.quad.byte 0x9F8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9F8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9F8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9F8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9F8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9F8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9F8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9F8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA00 "QOSBW_FIX_QOS_BANK0320,"
hexmask.quad.byte 0xA00 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA00 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA00 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA00 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA00 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA00 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA00 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA00 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA08 "QOSBW_FIX_QOS_BANK0321,"
hexmask.quad.byte 0xA08 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA08 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA08 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA08 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA08 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA08 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA08 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA08 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA10 "QOSBW_FIX_QOS_BANK0322,"
hexmask.quad.byte 0xA10 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA10 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA10 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA10 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA10 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA10 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA10 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA10 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA18 "QOSBW_FIX_QOS_BANK0323,"
hexmask.quad.byte 0xA18 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA18 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA18 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA18 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA18 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA18 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA18 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA18 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA20 "QOSBW_FIX_QOS_BANK0324,"
hexmask.quad.byte 0xA20 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA20 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA20 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA20 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA20 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA20 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA20 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA20 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA28 "QOSBW_FIX_QOS_BANK0325,"
hexmask.quad.byte 0xA28 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA28 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA28 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA28 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA28 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA28 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA28 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA28 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA30 "QOSBW_FIX_QOS_BANK0326,"
hexmask.quad.byte 0xA30 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA30 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA30 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA30 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA30 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA30 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA30 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA30 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA38 "QOSBW_FIX_QOS_BANK0327,"
hexmask.quad.byte 0xA38 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA38 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA38 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA38 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA38 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA38 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA38 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA38 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA40 "QOSBW_FIX_QOS_BANK0328,"
hexmask.quad.byte 0xA40 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA40 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA40 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA40 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA40 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA40 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA40 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA40 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA48 "QOSBW_FIX_QOS_BANK0329,"
hexmask.quad.byte 0xA48 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA48 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA48 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA48 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA48 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA48 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA48 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA48 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA50 "QOSBW_FIX_QOS_BANK0330,"
hexmask.quad.byte 0xA50 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA50 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA50 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA50 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA50 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA50 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA50 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA50 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA58 "QOSBW_FIX_QOS_BANK0331,"
hexmask.quad.byte 0xA58 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA58 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA58 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA58 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA58 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA58 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA58 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA58 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA60 "QOSBW_FIX_QOS_BANK0332,"
hexmask.quad.byte 0xA60 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA60 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA60 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA60 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA60 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA60 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA60 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA60 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA68 "QOSBW_FIX_QOS_BANK0333,"
hexmask.quad.byte 0xA68 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA68 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA68 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA68 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA68 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA68 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA68 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA68 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA70 "QOSBW_FIX_QOS_BANK0334,"
hexmask.quad.byte 0xA70 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA70 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA70 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA70 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA70 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA70 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA70 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA70 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA78 "QOSBW_FIX_QOS_BANK0335,"
hexmask.quad.byte 0xA78 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA78 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA78 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA78 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA78 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA78 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA78 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA78 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA80 "QOSBW_FIX_QOS_BANK0336,"
hexmask.quad.byte 0xA80 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA80 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA80 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA80 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA80 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA80 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA80 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA80 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA88 "QOSBW_FIX_QOS_BANK0337,"
hexmask.quad.byte 0xA88 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA88 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA88 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA88 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA88 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA88 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA88 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA88 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA90 "QOSBW_FIX_QOS_BANK0338,"
hexmask.quad.byte 0xA90 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA90 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA90 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA90 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA90 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA90 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA90 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA90 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA98 "QOSBW_FIX_QOS_BANK0339,"
hexmask.quad.byte 0xA98 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA98 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA98 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA98 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA98 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA98 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA98 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA98 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAA0 "QOSBW_FIX_QOS_BANK0340,"
hexmask.quad.byte 0xAA0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAA0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAA0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAA0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAA0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAA0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAA0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAA0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAA8 "QOSBW_FIX_QOS_BANK0341,"
hexmask.quad.byte 0xAA8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAA8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAA8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAA8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAA8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAA8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAA8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAA8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAB0 "QOSBW_FIX_QOS_BANK0342,"
hexmask.quad.byte 0xAB0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAB0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAB0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAB0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAB0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAB0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAB0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAB0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAB8 "QOSBW_FIX_QOS_BANK0343,"
hexmask.quad.byte 0xAB8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAB8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAB8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAB8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAB8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAB8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAB8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAB8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAC0 "QOSBW_FIX_QOS_BANK0344,"
hexmask.quad.byte 0xAC0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAC0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAC0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAC0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAC0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAC0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAC0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAC0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAC8 "QOSBW_FIX_QOS_BANK0345,"
hexmask.quad.byte 0xAC8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAC8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAC8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAC8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAC8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAC8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAC8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAC8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAD0 "QOSBW_FIX_QOS_BANK0346,"
hexmask.quad.byte 0xAD0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAD0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAD0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAD0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAD0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAD0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAD0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAD0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAD8 "QOSBW_FIX_QOS_BANK0347,"
hexmask.quad.byte 0xAD8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAD8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAD8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAD8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAD8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAD8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAD8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAD8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAE0 "QOSBW_FIX_QOS_BANK0348,"
hexmask.quad.byte 0xAE0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAE0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAE0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAE0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAE0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAE0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAE0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAE0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAE8 "QOSBW_FIX_QOS_BANK0349,"
hexmask.quad.byte 0xAE8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAE8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAE8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAE8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAE8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAE8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAE8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAE8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAF0 "QOSBW_FIX_QOS_BANK0350,"
hexmask.quad.byte 0xAF0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAF0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAF0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAF0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAF0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAF0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAF0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAF0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAF8 "QOSBW_FIX_QOS_BANK0351,"
hexmask.quad.byte 0xAF8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAF8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAF8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAF8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAF8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAF8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAF8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAF8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB00 "QOSBW_FIX_QOS_BANK0352,"
hexmask.quad.byte 0xB00 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB00 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB00 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB00 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB00 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB00 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB00 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB00 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB08 "QOSBW_FIX_QOS_BANK0353,"
hexmask.quad.byte 0xB08 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB08 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB08 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB08 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB08 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB08 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB08 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB08 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB10 "QOSBW_FIX_QOS_BANK0354,"
hexmask.quad.byte 0xB10 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB10 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB10 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB10 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB10 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB10 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB10 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB10 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB18 "QOSBW_FIX_QOS_BANK0355,"
hexmask.quad.byte 0xB18 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB18 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB18 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB18 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB18 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB18 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB18 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB18 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB20 "QOSBW_FIX_QOS_BANK0356,"
hexmask.quad.byte 0xB20 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB20 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB20 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB20 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB20 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB20 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB20 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB20 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB28 "QOSBW_FIX_QOS_BANK0357,"
hexmask.quad.byte 0xB28 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB28 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB28 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB28 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB28 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB28 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB28 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB28 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB30 "QOSBW_FIX_QOS_BANK0358,"
hexmask.quad.byte 0xB30 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB30 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB30 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB30 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB30 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB30 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB30 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB30 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB38 "QOSBW_FIX_QOS_BANK0359,"
hexmask.quad.byte 0xB38 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB38 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB38 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB38 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB38 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB38 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB38 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB38 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB40 "QOSBW_FIX_QOS_BANK0360,"
hexmask.quad.byte 0xB40 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB40 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB40 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB40 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB40 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB40 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB40 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB40 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB48 "QOSBW_FIX_QOS_BANK0361,"
hexmask.quad.byte 0xB48 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB48 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB48 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB48 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB48 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB48 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB48 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB48 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB50 "QOSBW_FIX_QOS_BANK0362,"
hexmask.quad.byte 0xB50 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB50 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB50 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB50 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB50 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB50 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB50 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB50 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB58 "QOSBW_FIX_QOS_BANK0363,"
hexmask.quad.byte 0xB58 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB58 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB58 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB58 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB58 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB58 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB58 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB58 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB60 "QOSBW_FIX_QOS_BANK0364,"
hexmask.quad.byte 0xB60 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB60 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB60 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB60 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB60 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB60 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB60 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB60 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB68 "QOSBW_FIX_QOS_BANK0365,"
hexmask.quad.byte 0xB68 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB68 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB68 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB68 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB68 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB68 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB68 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB68 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB70 "QOSBW_FIX_QOS_BANK0366,"
hexmask.quad.byte 0xB70 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB70 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB70 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB70 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB70 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB70 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB70 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB70 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB78 "QOSBW_FIX_QOS_BANK0367,"
hexmask.quad.byte 0xB78 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB78 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB78 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB78 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB78 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB78 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB78 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB78 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB80 "QOSBW_FIX_QOS_BANK0368,"
hexmask.quad.byte 0xB80 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB80 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB80 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB80 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB80 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB80 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB80 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB80 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB88 "QOSBW_FIX_QOS_BANK0369,"
hexmask.quad.byte 0xB88 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB88 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB88 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB88 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB88 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB88 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB88 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB88 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB90 "QOSBW_FIX_QOS_BANK0370,"
hexmask.quad.byte 0xB90 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB90 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB90 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB90 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB90 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB90 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB90 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB90 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB98 "QOSBW_FIX_QOS_BANK0371,"
hexmask.quad.byte 0xB98 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB98 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB98 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB98 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB98 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB98 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB98 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB98 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBA0 "QOSBW_FIX_QOS_BANK0372,"
hexmask.quad.byte 0xBA0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBA0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBA0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBA0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBA0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBA0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBA0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBA0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBA8 "QOSBW_FIX_QOS_BANK0373,"
hexmask.quad.byte 0xBA8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBA8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBA8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBA8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBA8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBA8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBA8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBA8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBB0 "QOSBW_FIX_QOS_BANK0374,"
hexmask.quad.byte 0xBB0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBB0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBB0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBB0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBB0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBB0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBB0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBB0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBB8 "QOSBW_FIX_QOS_BANK0375,"
hexmask.quad.byte 0xBB8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBB8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBB8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBB8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBB8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBB8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBB8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBB8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBC0 "QOSBW_FIX_QOS_BANK0376,"
hexmask.quad.byte 0xBC0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBC0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBC0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBC0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBC0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBC0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBC0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBC0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBC8 "QOSBW_FIX_QOS_BANK0377,"
hexmask.quad.byte 0xBC8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBC8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBC8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBC8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBC8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBC8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBC8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBC8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBD0 "QOSBW_FIX_QOS_BANK0378,"
hexmask.quad.byte 0xBD0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBD0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBD0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBD0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBD0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBD0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBD0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBD0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBD8 "QOSBW_FIX_QOS_BANK0379,"
hexmask.quad.byte 0xBD8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBD8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBD8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBD8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBD8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBD8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBD8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBD8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBE0 "QOSBW_FIX_QOS_BANK0380,"
hexmask.quad.byte 0xBE0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBE0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBE0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBE0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBE0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBE0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBE0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBE0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBE8 "QOSBW_FIX_QOS_BANK0381,"
hexmask.quad.byte 0xBE8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBE8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBE8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBE8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBE8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBE8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBE8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBE8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBF0 "QOSBW_FIX_QOS_BANK0382,"
hexmask.quad.byte 0xBF0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBF0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBF0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBF0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBF0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBF0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBF0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBF0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBF8 "QOSBW_FIX_QOS_BANK0383,"
hexmask.quad.byte 0xBF8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBF8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBF8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBF8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBF8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBF8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBF8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBF8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC00 "QOSBW_FIX_QOS_BANK0384,"
hexmask.quad.byte 0xC00 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC00 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC00 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC00 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC00 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC00 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC00 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC00 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC08 "QOSBW_FIX_QOS_BANK0385,"
hexmask.quad.byte 0xC08 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC08 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC08 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC08 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC08 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC08 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC08 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC08 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC10 "QOSBW_FIX_QOS_BANK0386,"
hexmask.quad.byte 0xC10 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC10 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC10 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC10 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC10 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC10 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC10 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC10 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC18 "QOSBW_FIX_QOS_BANK0387,"
hexmask.quad.byte 0xC18 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC18 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC18 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC18 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC18 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC18 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC18 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC18 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC20 "QOSBW_FIX_QOS_BANK0388,"
hexmask.quad.byte 0xC20 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC20 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC20 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC20 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC20 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC20 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC20 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC20 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC28 "QOSBW_FIX_QOS_BANK0389,"
hexmask.quad.byte 0xC28 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC28 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC28 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC28 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC28 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC28 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC28 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC28 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC30 "QOSBW_FIX_QOS_BANK0390,"
hexmask.quad.byte 0xC30 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC30 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC30 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC30 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC30 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC30 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC30 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC30 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC38 "QOSBW_FIX_QOS_BANK0391,"
hexmask.quad.byte 0xC38 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC38 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC38 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC38 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC38 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC38 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC38 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC38 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC40 "QOSBW_FIX_QOS_BANK0392,"
hexmask.quad.byte 0xC40 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC40 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC40 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC40 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC40 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC40 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC40 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC40 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC48 "QOSBW_FIX_QOS_BANK0393,"
hexmask.quad.byte 0xC48 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC48 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC48 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC48 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC48 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC48 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC48 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC48 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC50 "QOSBW_FIX_QOS_BANK0394,"
hexmask.quad.byte 0xC50 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC50 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC50 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC50 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC50 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC50 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC50 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC50 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC58 "QOSBW_FIX_QOS_BANK0395,"
hexmask.quad.byte 0xC58 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC58 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC58 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC58 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC58 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC58 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC58 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC58 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC60 "QOSBW_FIX_QOS_BANK0396,"
hexmask.quad.byte 0xC60 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC60 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC60 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC60 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC60 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC60 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC60 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC60 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC68 "QOSBW_FIX_QOS_BANK0397,"
hexmask.quad.byte 0xC68 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC68 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC68 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC68 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC68 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC68 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC68 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC68 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC70 "QOSBW_FIX_QOS_BANK0398,"
hexmask.quad.byte 0xC70 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC70 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC70 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC70 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC70 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC70 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC70 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC70 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC78 "QOSBW_FIX_QOS_BANK0399,"
hexmask.quad.byte 0xC78 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC78 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC78 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC78 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC78 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC78 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC78 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC78 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC80 "QOSBW_FIX_QOS_BANK0400,"
hexmask.quad.byte 0xC80 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC80 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC80 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC80 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC80 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC80 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC80 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC80 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC88 "QOSBW_FIX_QOS_BANK0401,"
hexmask.quad.byte 0xC88 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC88 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC88 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC88 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC88 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC88 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC88 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC88 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC90 "QOSBW_FIX_QOS_BANK0402,"
hexmask.quad.byte 0xC90 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC90 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC90 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC90 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC90 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC90 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC90 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC90 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC98 "QOSBW_FIX_QOS_BANK0403,"
hexmask.quad.byte 0xC98 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC98 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC98 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC98 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC98 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC98 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC98 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC98 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCA0 "QOSBW_FIX_QOS_BANK0404,"
hexmask.quad.byte 0xCA0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCA0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCA0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCA0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCA0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCA0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCA0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCA0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCA8 "QOSBW_FIX_QOS_BANK0405,"
hexmask.quad.byte 0xCA8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCA8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCA8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCA8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCA8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCA8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCA8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCA8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCB0 "QOSBW_FIX_QOS_BANK0406,"
hexmask.quad.byte 0xCB0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCB0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCB0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCB0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCB0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCB0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCB0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCB0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCB8 "QOSBW_FIX_QOS_BANK0407,"
hexmask.quad.byte 0xCB8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCB8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCB8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCB8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCB8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCB8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCB8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCB8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCC0 "QOSBW_FIX_QOS_BANK0408,"
hexmask.quad.byte 0xCC0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCC0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCC0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCC0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCC0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCC0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCC0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCC0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCC8 "QOSBW_FIX_QOS_BANK0409,"
hexmask.quad.byte 0xCC8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCC8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCC8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCC8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCC8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCC8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCC8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCC8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCD0 "QOSBW_FIX_QOS_BANK0410,"
hexmask.quad.byte 0xCD0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCD0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCD0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCD0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCD0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCD0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCD0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCD0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCD8 "QOSBW_FIX_QOS_BANK0411,"
hexmask.quad.byte 0xCD8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCD8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCD8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCD8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCD8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCD8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCD8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCD8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCE0 "QOSBW_FIX_QOS_BANK0412,"
hexmask.quad.byte 0xCE0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCE0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCE0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCE0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCE0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCE0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCE0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCE0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCE8 "QOSBW_FIX_QOS_BANK0413,"
hexmask.quad.byte 0xCE8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCE8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCE8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCE8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCE8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCE8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCE8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCE8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCF0 "QOSBW_FIX_QOS_BANK0414,"
hexmask.quad.byte 0xCF0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCF0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCF0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCF0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCF0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCF0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCF0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCF0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCF8 "QOSBW_FIX_QOS_BANK0415,"
hexmask.quad.byte 0xCF8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCF8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCF8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCF8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCF8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCF8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCF8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCF8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD00 "QOSBW_FIX_QOS_BANK0416,"
hexmask.quad.byte 0xD00 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD00 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD00 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD00 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD00 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD00 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD00 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD00 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD08 "QOSBW_FIX_QOS_BANK0417,"
hexmask.quad.byte 0xD08 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD08 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD08 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD08 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD08 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD08 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD08 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD08 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD10 "QOSBW_FIX_QOS_BANK0418,"
hexmask.quad.byte 0xD10 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD10 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD10 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD10 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD10 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD10 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD10 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD10 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD18 "QOSBW_FIX_QOS_BANK0419,"
hexmask.quad.byte 0xD18 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD18 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD18 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD18 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD18 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD18 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD18 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD18 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD20 "QOSBW_FIX_QOS_BANK0420,"
hexmask.quad.byte 0xD20 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD20 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD20 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD20 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD20 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD20 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD20 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD20 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD28 "QOSBW_FIX_QOS_BANK0421,"
hexmask.quad.byte 0xD28 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD28 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD28 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD28 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD28 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD28 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD28 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD28 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD30 "QOSBW_FIX_QOS_BANK0422,"
hexmask.quad.byte 0xD30 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD30 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD30 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD30 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD30 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD30 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD30 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD30 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD38 "QOSBW_FIX_QOS_BANK0423,"
hexmask.quad.byte 0xD38 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD38 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD38 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD38 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD38 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD38 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD38 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD38 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD40 "QOSBW_FIX_QOS_BANK0424,"
hexmask.quad.byte 0xD40 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD40 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD40 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD40 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD40 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD40 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD40 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD40 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD48 "QOSBW_FIX_QOS_BANK0425,"
hexmask.quad.byte 0xD48 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD48 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD48 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD48 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD48 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD48 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD48 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD48 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD50 "QOSBW_FIX_QOS_BANK0426,"
hexmask.quad.byte 0xD50 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD50 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD50 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD50 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD50 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD50 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD50 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD50 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD58 "QOSBW_FIX_QOS_BANK0427,"
hexmask.quad.byte 0xD58 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD58 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD58 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD58 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD58 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD58 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD58 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD58 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD60 "QOSBW_FIX_QOS_BANK0428,"
hexmask.quad.byte 0xD60 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD60 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD60 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD60 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD60 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD60 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD60 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD60 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD68 "QOSBW_FIX_QOS_BANK0429,"
hexmask.quad.byte 0xD68 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD68 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD68 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD68 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD68 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD68 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD68 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD68 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD70 "QOSBW_FIX_QOS_BANK0430,"
hexmask.quad.byte 0xD70 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD70 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD70 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD70 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD70 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD70 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD70 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD70 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD78 "QOSBW_FIX_QOS_BANK0431,"
hexmask.quad.byte 0xD78 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD78 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD78 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD78 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD78 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD78 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD78 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD78 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD80 "QOSBW_FIX_QOS_BANK0432,"
hexmask.quad.byte 0xD80 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD80 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD80 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD80 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD80 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD80 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD80 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD80 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD88 "QOSBW_FIX_QOS_BANK0433,"
hexmask.quad.byte 0xD88 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD88 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD88 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD88 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD88 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD88 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD88 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD88 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD90 "QOSBW_FIX_QOS_BANK0434,"
hexmask.quad.byte 0xD90 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD90 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD90 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD90 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD90 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD90 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD90 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD90 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD98 "QOSBW_FIX_QOS_BANK0435,"
hexmask.quad.byte 0xD98 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD98 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD98 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD98 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD98 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD98 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD98 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD98 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDA0 "QOSBW_FIX_QOS_BANK0436,"
hexmask.quad.byte 0xDA0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDA0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDA0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDA0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDA0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDA0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDA0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDA0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDA8 "QOSBW_FIX_QOS_BANK0437,"
hexmask.quad.byte 0xDA8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDA8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDA8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDA8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDA8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDA8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDA8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDA8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDB0 "QOSBW_FIX_QOS_BANK0438,"
hexmask.quad.byte 0xDB0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDB0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDB0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDB0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDB0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDB0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDB0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDB0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDB8 "QOSBW_FIX_QOS_BANK0439,"
hexmask.quad.byte 0xDB8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDB8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDB8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDB8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDB8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDB8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDB8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDB8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDC0 "QOSBW_FIX_QOS_BANK0440,"
hexmask.quad.byte 0xDC0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDC0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDC0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDC0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDC0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDC0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDC0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDC0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDC8 "QOSBW_FIX_QOS_BANK0441,"
hexmask.quad.byte 0xDC8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDC8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDC8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDC8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDC8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDC8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDC8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDC8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDD0 "QOSBW_FIX_QOS_BANK0442,"
hexmask.quad.byte 0xDD0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDD0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDD0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDD0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDD0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDD0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDD0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDD0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDD8 "QOSBW_FIX_QOS_BANK0443,"
hexmask.quad.byte 0xDD8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDD8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDD8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDD8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDD8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDD8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDD8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDD8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDE0 "QOSBW_FIX_QOS_BANK0444,"
hexmask.quad.byte 0xDE0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDE0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDE0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDE0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDE0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDE0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDE0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDE0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDE8 "QOSBW_FIX_QOS_BANK0445,"
hexmask.quad.byte 0xDE8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDE8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDE8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDE8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDE8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDE8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDE8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDE8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDF0 "QOSBW_FIX_QOS_BANK0446,"
hexmask.quad.byte 0xDF0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDF0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDF0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDF0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDF0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDF0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDF0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDF0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDF8 "QOSBW_FIX_QOS_BANK0447,"
hexmask.quad.byte 0xDF8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDF8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDF8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDF8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDF8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDF8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDF8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDF8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE00 "QOSBW_FIX_QOS_BANK0448,"
hexmask.quad.byte 0xE00 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE00 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE00 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE00 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE00 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE00 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE00 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE00 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE08 "QOSBW_FIX_QOS_BANK0449,"
hexmask.quad.byte 0xE08 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE08 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE08 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE08 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE08 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE08 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE08 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE08 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE10 "QOSBW_FIX_QOS_BANK0450,"
hexmask.quad.byte 0xE10 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE10 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE10 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE10 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE10 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE10 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE10 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE10 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE18 "QOSBW_FIX_QOS_BANK0451,"
hexmask.quad.byte 0xE18 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE18 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE18 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE18 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE18 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE18 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE18 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE18 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE20 "QOSBW_FIX_QOS_BANK0452,"
hexmask.quad.byte 0xE20 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE20 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE20 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE20 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE20 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE20 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE20 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE20 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE28 "QOSBW_FIX_QOS_BANK0453,"
hexmask.quad.byte 0xE28 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE28 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE28 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE28 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE28 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE28 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE28 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE28 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE30 "QOSBW_FIX_QOS_BANK0454,"
hexmask.quad.byte 0xE30 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE30 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE30 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE30 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE30 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE30 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE30 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE30 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE38 "QOSBW_FIX_QOS_BANK0455,"
hexmask.quad.byte 0xE38 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE38 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE38 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE38 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE38 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE38 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE38 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE38 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE40 "QOSBW_FIX_QOS_BANK0456,"
hexmask.quad.byte 0xE40 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE40 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE40 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE40 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE40 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE40 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE40 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE40 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE48 "QOSBW_FIX_QOS_BANK0457,"
hexmask.quad.byte 0xE48 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE48 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE48 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE48 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE48 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE48 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE48 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE48 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE50 "QOSBW_FIX_QOS_BANK0458,"
hexmask.quad.byte 0xE50 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE50 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE50 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE50 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE50 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE50 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE50 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE50 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE58 "QOSBW_FIX_QOS_BANK0459,"
hexmask.quad.byte 0xE58 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE58 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE58 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE58 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE58 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE58 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE58 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE58 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE60 "QOSBW_FIX_QOS_BANK0460,"
hexmask.quad.byte 0xE60 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE60 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE60 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE60 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE60 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE60 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE60 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE60 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE68 "QOSBW_FIX_QOS_BANK0461,"
hexmask.quad.byte 0xE68 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE68 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE68 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE68 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE68 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE68 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE68 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE68 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE70 "QOSBW_FIX_QOS_BANK0462,"
hexmask.quad.byte 0xE70 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE70 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE70 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE70 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE70 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE70 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE70 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE70 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE78 "QOSBW_FIX_QOS_BANK0463,"
hexmask.quad.byte 0xE78 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE78 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE78 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE78 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE78 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE78 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE78 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE78 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE80 "QOSBW_FIX_QOS_BANK0464,"
hexmask.quad.byte 0xE80 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE80 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE80 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE80 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE80 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE80 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE80 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE80 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE88 "QOSBW_FIX_QOS_BANK0465,"
hexmask.quad.byte 0xE88 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE88 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE88 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE88 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE88 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE88 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE88 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE88 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE90 "QOSBW_FIX_QOS_BANK0466,"
hexmask.quad.byte 0xE90 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE90 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE90 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE90 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE90 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE90 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE90 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE90 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE98 "QOSBW_FIX_QOS_BANK0467,"
hexmask.quad.byte 0xE98 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE98 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE98 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE98 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE98 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE98 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE98 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE98 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEA0 "QOSBW_FIX_QOS_BANK0468,"
hexmask.quad.byte 0xEA0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEA0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEA0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEA0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEA0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEA0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEA0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEA0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEA8 "QOSBW_FIX_QOS_BANK0469,"
hexmask.quad.byte 0xEA8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEA8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEA8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEA8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEA8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEA8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEA8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEA8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEB0 "QOSBW_FIX_QOS_BANK0470,"
hexmask.quad.byte 0xEB0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEB0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEB0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEB0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEB0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEB0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEB0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEB0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEB8 "QOSBW_FIX_QOS_BANK0471,"
hexmask.quad.byte 0xEB8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEB8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEB8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEB8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEB8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEB8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEB8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEB8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEC0 "QOSBW_FIX_QOS_BANK0472,"
hexmask.quad.byte 0xEC0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEC0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEC0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEC0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEC0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEC0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEC0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEC0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEC8 "QOSBW_FIX_QOS_BANK0473,"
hexmask.quad.byte 0xEC8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEC8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEC8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEC8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEC8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEC8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEC8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEC8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xED0 "QOSBW_FIX_QOS_BANK0474,"
hexmask.quad.byte 0xED0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xED0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xED0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xED0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xED0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xED0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xED0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xED0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xED8 "QOSBW_FIX_QOS_BANK0475,"
hexmask.quad.byte 0xED8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xED8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xED8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xED8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xED8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xED8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xED8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xED8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEE0 "QOSBW_FIX_QOS_BANK0476,"
hexmask.quad.byte 0xEE0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEE0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEE0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEE0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEE0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEE0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEE0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEE0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEE8 "QOSBW_FIX_QOS_BANK0477,"
hexmask.quad.byte 0xEE8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEE8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEE8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEE8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEE8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEE8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEE8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEE8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEF0 "QOSBW_FIX_QOS_BANK0478,"
hexmask.quad.byte 0xEF0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEF0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEF0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEF0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEF0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEF0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEF0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEF0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEF8 "QOSBW_FIX_QOS_BANK0479,"
hexmask.quad.byte 0xEF8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEF8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEF8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEF8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEF8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEF8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEF8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEF8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF00 "QOSBW_FIX_QOS_BANK0480,"
hexmask.quad.byte 0xF00 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF00 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF00 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF00 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF00 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF00 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF00 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF00 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF08 "QOSBW_FIX_QOS_BANK0481,"
hexmask.quad.byte 0xF08 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF08 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF08 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF08 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF08 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF08 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF08 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF08 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF10 "QOSBW_FIX_QOS_BANK0482,"
hexmask.quad.byte 0xF10 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF10 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF10 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF10 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF10 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF10 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF10 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF10 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF18 "QOSBW_FIX_QOS_BANK0483,"
hexmask.quad.byte 0xF18 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF18 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF18 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF18 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF18 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF18 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF18 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF18 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF20 "QOSBW_FIX_QOS_BANK0484,"
hexmask.quad.byte 0xF20 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF20 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF20 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF20 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF20 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF20 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF20 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF20 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF28 "QOSBW_FIX_QOS_BANK0485,"
hexmask.quad.byte 0xF28 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF28 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF28 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF28 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF28 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF28 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF28 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF28 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF30 "QOSBW_FIX_QOS_BANK0486,"
hexmask.quad.byte 0xF30 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF30 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF30 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF30 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF30 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF30 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF30 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF30 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF38 "QOSBW_FIX_QOS_BANK0487,"
hexmask.quad.byte 0xF38 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF38 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF38 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF38 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF38 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF38 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF38 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF38 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF40 "QOSBW_FIX_QOS_BANK0488,"
hexmask.quad.byte 0xF40 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF40 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF40 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF40 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF40 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF40 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF40 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF40 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF48 "QOSBW_FIX_QOS_BANK0489,"
hexmask.quad.byte 0xF48 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF48 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF48 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF48 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF48 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF48 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF48 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF48 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF50 "QOSBW_FIX_QOS_BANK0490,"
hexmask.quad.byte 0xF50 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF50 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF50 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF50 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF50 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF50 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF50 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF50 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF58 "QOSBW_FIX_QOS_BANK0491,"
hexmask.quad.byte 0xF58 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF58 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF58 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF58 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF58 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF58 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF58 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF58 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF60 "QOSBW_FIX_QOS_BANK0492,"
hexmask.quad.byte 0xF60 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF60 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF60 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF60 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF60 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF60 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF60 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF60 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF68 "QOSBW_FIX_QOS_BANK0493,"
hexmask.quad.byte 0xF68 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF68 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF68 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF68 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF68 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF68 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF68 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF68 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF70 "QOSBW_FIX_QOS_BANK0494,"
hexmask.quad.byte 0xF70 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF70 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF70 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF70 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF70 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF70 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF70 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF70 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF78 "QOSBW_FIX_QOS_BANK0495,"
hexmask.quad.byte 0xF78 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF78 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF78 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF78 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF78 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF78 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF78 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF78 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF80 "QOSBW_FIX_QOS_BANK0496,"
hexmask.quad.byte 0xF80 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF80 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF80 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF80 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF80 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF80 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF80 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF80 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF88 "QOSBW_FIX_QOS_BANK0497,"
hexmask.quad.byte 0xF88 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF88 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF88 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF88 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF88 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF88 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF88 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF88 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF90 "QOSBW_FIX_QOS_BANK0498,"
hexmask.quad.byte 0xF90 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF90 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF90 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF90 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF90 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF90 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF90 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF90 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF98 "QOSBW_FIX_QOS_BANK0499,"
hexmask.quad.byte 0xF98 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF98 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF98 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF98 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF98 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF98 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF98 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF98 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFA0 "QOSBW_FIX_QOS_BANK0500,"
hexmask.quad.byte 0xFA0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFA0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFA0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFA0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFA0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFA0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFA0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFA0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFA8 "QOSBW_FIX_QOS_BANK0501,"
hexmask.quad.byte 0xFA8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFA8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFA8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFA8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFA8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFA8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFA8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFA8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFB0 "QOSBW_FIX_QOS_BANK0502,"
hexmask.quad.byte 0xFB0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFB0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFB0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFB0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFB0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFB0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFB0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFB0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFB8 "QOSBW_FIX_QOS_BANK0503,"
hexmask.quad.byte 0xFB8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFB8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFB8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFB8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFB8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFB8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFB8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFB8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFC0 "QOSBW_FIX_QOS_BANK0504,"
hexmask.quad.byte 0xFC0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFC0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFC0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFC0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFC0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFC0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFC0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFC0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFC8 "QOSBW_FIX_QOS_BANK0505,"
hexmask.quad.byte 0xFC8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFC8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFC8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFC8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFC8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFC8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFC8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFC8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFD0 "QOSBW_FIX_QOS_BANK0506,"
hexmask.quad.byte 0xFD0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFD0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFD0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFD0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFD0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFD0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFD0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFD0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFD8 "QOSBW_FIX_QOS_BANK0507,"
hexmask.quad.byte 0xFD8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFD8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFD8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFD8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFD8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFD8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFD8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFD8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFE0 "QOSBW_FIX_QOS_BANK0508,"
hexmask.quad.byte 0xFE0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFE0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFE0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFE0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFE0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFE0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFE0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFE0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFE8 "QOSBW_FIX_QOS_BANK0509,"
hexmask.quad.byte 0xFE8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFE8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFE8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFE8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFE8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFE8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFE8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFE8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFF0 "QOSBW_FIX_QOS_BANK0510,"
hexmask.quad.byte 0xFF0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFF0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFF0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFF0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFF0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFF0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFF0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFF0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFF8 "QOSBW_FIX_QOS_BANK0511,"
hexmask.quad.byte 0xFF8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFF8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFF8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFF8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFF8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFF8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFF8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFF8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
group.quad 0x1000++0xFFF
line.quad 0x0 "QOSBW_FIX_QOS_BANK10,"
hexmask.quad.byte 0x0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8 "QOSBW_FIX_QOS_BANK11,"
hexmask.quad.byte 0x8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x10 "QOSBW_FIX_QOS_BANK12,"
hexmask.quad.byte 0x10 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x10 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x10 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x10 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x10 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x10 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x10 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x10 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x18 "QOSBW_FIX_QOS_BANK13,"
hexmask.quad.byte 0x18 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x18 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x18 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x18 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x18 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x18 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x18 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x18 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x20 "QOSBW_FIX_QOS_BANK14,"
hexmask.quad.byte 0x20 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x20 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x20 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x20 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x20 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x20 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x20 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x20 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x28 "QOSBW_FIX_QOS_BANK15,"
hexmask.quad.byte 0x28 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x28 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x28 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x28 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x28 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x28 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x28 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x28 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x30 "QOSBW_FIX_QOS_BANK16,"
hexmask.quad.byte 0x30 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x30 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x30 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x30 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x30 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x30 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x30 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x30 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x38 "QOSBW_FIX_QOS_BANK17,"
hexmask.quad.byte 0x38 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x38 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x38 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x38 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x38 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x38 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x38 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x38 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x40 "QOSBW_FIX_QOS_BANK18,"
hexmask.quad.byte 0x40 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x40 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x40 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x40 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x40 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x40 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x40 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x40 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x48 "QOSBW_FIX_QOS_BANK19,"
hexmask.quad.byte 0x48 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x48 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x48 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x48 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x48 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x48 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x48 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x48 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x50 "QOSBW_FIX_QOS_BANK110,"
hexmask.quad.byte 0x50 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x50 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x50 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x50 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x50 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x50 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x50 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x50 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x58 "QOSBW_FIX_QOS_BANK111,"
hexmask.quad.byte 0x58 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x58 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x58 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x58 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x58 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x58 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x58 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x58 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x60 "QOSBW_FIX_QOS_BANK112,"
hexmask.quad.byte 0x60 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x60 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x60 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x60 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x60 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x60 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x60 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x60 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x68 "QOSBW_FIX_QOS_BANK113,"
hexmask.quad.byte 0x68 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x68 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x68 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x68 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x68 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x68 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x68 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x68 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x70 "QOSBW_FIX_QOS_BANK114,"
hexmask.quad.byte 0x70 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x70 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x70 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x70 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x70 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x70 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x70 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x70 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x78 "QOSBW_FIX_QOS_BANK115,"
hexmask.quad.byte 0x78 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x78 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x78 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x78 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x78 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x78 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x78 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x78 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x80 "QOSBW_FIX_QOS_BANK116,"
hexmask.quad.byte 0x80 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x80 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x80 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x80 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x80 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x80 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x80 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x80 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x88 "QOSBW_FIX_QOS_BANK117,"
hexmask.quad.byte 0x88 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x88 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x88 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x88 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x88 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x88 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x88 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x88 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x90 "QOSBW_FIX_QOS_BANK118,"
hexmask.quad.byte 0x90 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x90 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x90 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x90 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x90 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x90 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x90 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x90 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x98 "QOSBW_FIX_QOS_BANK119,"
hexmask.quad.byte 0x98 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x98 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x98 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x98 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x98 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x98 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x98 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x98 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA0 "QOSBW_FIX_QOS_BANK120,"
hexmask.quad.byte 0xA0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA8 "QOSBW_FIX_QOS_BANK121,"
hexmask.quad.byte 0xA8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB0 "QOSBW_FIX_QOS_BANK122,"
hexmask.quad.byte 0xB0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB8 "QOSBW_FIX_QOS_BANK123,"
hexmask.quad.byte 0xB8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC0 "QOSBW_FIX_QOS_BANK124,"
hexmask.quad.byte 0xC0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC8 "QOSBW_FIX_QOS_BANK125,"
hexmask.quad.byte 0xC8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD0 "QOSBW_FIX_QOS_BANK126,"
hexmask.quad.byte 0xD0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD8 "QOSBW_FIX_QOS_BANK127,"
hexmask.quad.byte 0xD8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE0 "QOSBW_FIX_QOS_BANK128,"
hexmask.quad.byte 0xE0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE8 "QOSBW_FIX_QOS_BANK129,"
hexmask.quad.byte 0xE8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF0 "QOSBW_FIX_QOS_BANK130,"
hexmask.quad.byte 0xF0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF8 "QOSBW_FIX_QOS_BANK131,"
hexmask.quad.byte 0xF8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x100 "QOSBW_FIX_QOS_BANK132,"
hexmask.quad.byte 0x100 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x100 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x100 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x100 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x100 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x100 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x100 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x100 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x108 "QOSBW_FIX_QOS_BANK133,"
hexmask.quad.byte 0x108 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x108 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x108 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x108 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x108 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x108 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x108 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x108 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x110 "QOSBW_FIX_QOS_BANK134,"
hexmask.quad.byte 0x110 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x110 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x110 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x110 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x110 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x110 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x110 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x110 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x118 "QOSBW_FIX_QOS_BANK135,"
hexmask.quad.byte 0x118 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x118 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x118 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x118 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x118 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x118 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x118 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x118 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x120 "QOSBW_FIX_QOS_BANK136,"
hexmask.quad.byte 0x120 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x120 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x120 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x120 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x120 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x120 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x120 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x120 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x128 "QOSBW_FIX_QOS_BANK137,"
hexmask.quad.byte 0x128 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x128 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x128 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x128 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x128 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x128 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x128 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x128 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x130 "QOSBW_FIX_QOS_BANK138,"
hexmask.quad.byte 0x130 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x130 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x130 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x130 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x130 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x130 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x130 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x130 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x138 "QOSBW_FIX_QOS_BANK139,"
hexmask.quad.byte 0x138 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x138 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x138 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x138 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x138 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x138 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x138 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x138 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x140 "QOSBW_FIX_QOS_BANK140,"
hexmask.quad.byte 0x140 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x140 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x140 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x140 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x140 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x140 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x140 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x140 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x148 "QOSBW_FIX_QOS_BANK141,"
hexmask.quad.byte 0x148 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x148 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x148 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x148 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x148 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x148 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x148 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x148 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x150 "QOSBW_FIX_QOS_BANK142,"
hexmask.quad.byte 0x150 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x150 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x150 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x150 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x150 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x150 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x150 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x150 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x158 "QOSBW_FIX_QOS_BANK143,"
hexmask.quad.byte 0x158 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x158 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x158 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x158 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x158 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x158 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x158 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x158 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x160 "QOSBW_FIX_QOS_BANK144,"
hexmask.quad.byte 0x160 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x160 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x160 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x160 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x160 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x160 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x160 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x160 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x168 "QOSBW_FIX_QOS_BANK145,"
hexmask.quad.byte 0x168 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x168 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x168 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x168 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x168 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x168 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x168 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x168 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x170 "QOSBW_FIX_QOS_BANK146,"
hexmask.quad.byte 0x170 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x170 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x170 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x170 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x170 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x170 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x170 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x170 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x178 "QOSBW_FIX_QOS_BANK147,"
hexmask.quad.byte 0x178 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x178 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x178 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x178 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x178 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x178 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x178 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x178 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x180 "QOSBW_FIX_QOS_BANK148,"
hexmask.quad.byte 0x180 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x180 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x180 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x180 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x180 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x180 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x180 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x180 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x188 "QOSBW_FIX_QOS_BANK149,"
hexmask.quad.byte 0x188 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x188 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x188 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x188 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x188 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x188 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x188 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x188 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x190 "QOSBW_FIX_QOS_BANK150,"
hexmask.quad.byte 0x190 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x190 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x190 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x190 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x190 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x190 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x190 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x190 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x198 "QOSBW_FIX_QOS_BANK151,"
hexmask.quad.byte 0x198 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x198 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x198 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x198 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x198 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x198 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x198 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x198 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1A0 "QOSBW_FIX_QOS_BANK152,"
hexmask.quad.byte 0x1A0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1A0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1A0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1A0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1A0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1A0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1A0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1A0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1A8 "QOSBW_FIX_QOS_BANK153,"
hexmask.quad.byte 0x1A8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1A8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1A8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1A8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1A8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1A8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1A8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1A8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1B0 "QOSBW_FIX_QOS_BANK154,"
hexmask.quad.byte 0x1B0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1B0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1B0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1B0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1B0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1B0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1B0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1B0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1B8 "QOSBW_FIX_QOS_BANK155,"
hexmask.quad.byte 0x1B8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1B8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1B8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1B8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1B8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1B8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1B8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1B8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1C0 "QOSBW_FIX_QOS_BANK156,"
hexmask.quad.byte 0x1C0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1C0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1C0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1C0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1C0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1C0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1C0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1C0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1C8 "QOSBW_FIX_QOS_BANK157,"
hexmask.quad.byte 0x1C8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1C8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1C8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1C8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1C8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1C8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1C8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1C8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1D0 "QOSBW_FIX_QOS_BANK158,"
hexmask.quad.byte 0x1D0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1D0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1D0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1D0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1D0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1D0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1D0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1D0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1D8 "QOSBW_FIX_QOS_BANK159,"
hexmask.quad.byte 0x1D8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1D8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1D8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1D8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1D8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1D8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1D8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1D8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1E0 "QOSBW_FIX_QOS_BANK160,"
hexmask.quad.byte 0x1E0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1E0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1E0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1E0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1E0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1E0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1E0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1E0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1E8 "QOSBW_FIX_QOS_BANK161,"
hexmask.quad.byte 0x1E8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1E8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1E8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1E8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1E8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1E8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1E8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1E8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1F0 "QOSBW_FIX_QOS_BANK162,"
hexmask.quad.byte 0x1F0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1F0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1F0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1F0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1F0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1F0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1F0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1F0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x1F8 "QOSBW_FIX_QOS_BANK163,"
hexmask.quad.byte 0x1F8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x1F8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x1F8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x1F8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x1F8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x1F8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x1F8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1F8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x200 "QOSBW_FIX_QOS_BANK164,"
hexmask.quad.byte 0x200 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x200 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x200 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x200 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x200 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x200 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x200 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x200 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x208 "QOSBW_FIX_QOS_BANK165,"
hexmask.quad.byte 0x208 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x208 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x208 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x208 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x208 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x208 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x208 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x208 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x210 "QOSBW_FIX_QOS_BANK166,"
hexmask.quad.byte 0x210 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x210 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x210 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x210 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x210 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x210 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x210 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x210 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x218 "QOSBW_FIX_QOS_BANK167,"
hexmask.quad.byte 0x218 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x218 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x218 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x218 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x218 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x218 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x218 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x218 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x220 "QOSBW_FIX_QOS_BANK168,"
hexmask.quad.byte 0x220 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x220 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x220 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x220 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x220 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x220 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x220 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x220 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x228 "QOSBW_FIX_QOS_BANK169,"
hexmask.quad.byte 0x228 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x228 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x228 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x228 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x228 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x228 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x228 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x228 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x230 "QOSBW_FIX_QOS_BANK170,"
hexmask.quad.byte 0x230 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x230 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x230 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x230 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x230 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x230 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x230 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x230 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x238 "QOSBW_FIX_QOS_BANK171,"
hexmask.quad.byte 0x238 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x238 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x238 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x238 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x238 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x238 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x238 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x238 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x240 "QOSBW_FIX_QOS_BANK172,"
hexmask.quad.byte 0x240 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x240 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x240 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x240 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x240 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x240 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x240 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x240 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x248 "QOSBW_FIX_QOS_BANK173,"
hexmask.quad.byte 0x248 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x248 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x248 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x248 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x248 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x248 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x248 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x248 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x250 "QOSBW_FIX_QOS_BANK174,"
hexmask.quad.byte 0x250 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x250 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x250 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x250 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x250 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x250 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x250 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x250 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x258 "QOSBW_FIX_QOS_BANK175,"
hexmask.quad.byte 0x258 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x258 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x258 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x258 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x258 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x258 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x258 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x258 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x260 "QOSBW_FIX_QOS_BANK176,"
hexmask.quad.byte 0x260 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x260 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x260 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x260 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x260 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x260 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x260 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x260 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x268 "QOSBW_FIX_QOS_BANK177,"
hexmask.quad.byte 0x268 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x268 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x268 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x268 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x268 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x268 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x268 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x268 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x270 "QOSBW_FIX_QOS_BANK178,"
hexmask.quad.byte 0x270 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x270 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x270 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x270 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x270 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x270 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x270 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x270 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x278 "QOSBW_FIX_QOS_BANK179,"
hexmask.quad.byte 0x278 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x278 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x278 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x278 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x278 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x278 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x278 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x278 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x280 "QOSBW_FIX_QOS_BANK180,"
hexmask.quad.byte 0x280 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x280 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x280 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x280 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x280 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x280 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x280 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x280 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x288 "QOSBW_FIX_QOS_BANK181,"
hexmask.quad.byte 0x288 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x288 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x288 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x288 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x288 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x288 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x288 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x288 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x290 "QOSBW_FIX_QOS_BANK182,"
hexmask.quad.byte 0x290 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x290 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x290 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x290 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x290 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x290 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x290 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x290 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x298 "QOSBW_FIX_QOS_BANK183,"
hexmask.quad.byte 0x298 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x298 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x298 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x298 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x298 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x298 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x298 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x298 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2A0 "QOSBW_FIX_QOS_BANK184,"
hexmask.quad.byte 0x2A0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2A0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2A0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2A0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2A0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2A0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2A0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2A0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2A8 "QOSBW_FIX_QOS_BANK185,"
hexmask.quad.byte 0x2A8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2A8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2A8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2A8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2A8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2A8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2A8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2A8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2B0 "QOSBW_FIX_QOS_BANK186,"
hexmask.quad.byte 0x2B0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2B0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2B0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2B0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2B0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2B0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2B0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2B0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2B8 "QOSBW_FIX_QOS_BANK187,"
hexmask.quad.byte 0x2B8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2B8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2B8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2B8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2B8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2B8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2B8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2B8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2C0 "QOSBW_FIX_QOS_BANK188,"
hexmask.quad.byte 0x2C0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2C0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2C0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2C0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2C0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2C0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2C0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2C0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2C8 "QOSBW_FIX_QOS_BANK189,"
hexmask.quad.byte 0x2C8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2C8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2C8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2C8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2C8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2C8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2C8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2C8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2D0 "QOSBW_FIX_QOS_BANK190,"
hexmask.quad.byte 0x2D0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2D0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2D0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2D0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2D0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2D0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2D0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2D0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2D8 "QOSBW_FIX_QOS_BANK191,"
hexmask.quad.byte 0x2D8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2D8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2D8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2D8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2D8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2D8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2D8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2D8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2E0 "QOSBW_FIX_QOS_BANK192,"
hexmask.quad.byte 0x2E0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2E0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2E0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2E0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2E0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2E0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2E0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2E0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2E8 "QOSBW_FIX_QOS_BANK193,"
hexmask.quad.byte 0x2E8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2E8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2E8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2E8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2E8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2E8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2E8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2E8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2F0 "QOSBW_FIX_QOS_BANK194,"
hexmask.quad.byte 0x2F0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2F0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2F0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2F0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2F0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2F0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2F0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2F0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x2F8 "QOSBW_FIX_QOS_BANK195,"
hexmask.quad.byte 0x2F8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x2F8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x2F8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x2F8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x2F8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x2F8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x2F8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2F8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x300 "QOSBW_FIX_QOS_BANK196,"
hexmask.quad.byte 0x300 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x300 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x300 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x300 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x300 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x300 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x300 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x300 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x308 "QOSBW_FIX_QOS_BANK197,"
hexmask.quad.byte 0x308 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x308 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x308 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x308 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x308 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x308 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x308 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x308 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x310 "QOSBW_FIX_QOS_BANK198,"
hexmask.quad.byte 0x310 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x310 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x310 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x310 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x310 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x310 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x310 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x310 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x318 "QOSBW_FIX_QOS_BANK199,"
hexmask.quad.byte 0x318 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x318 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x318 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x318 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x318 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x318 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x318 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x318 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x320 "QOSBW_FIX_QOS_BANK1100,"
hexmask.quad.byte 0x320 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x320 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x320 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x320 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x320 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x320 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x320 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x320 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x328 "QOSBW_FIX_QOS_BANK1101,"
hexmask.quad.byte 0x328 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x328 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x328 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x328 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x328 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x328 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x328 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x328 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x330 "QOSBW_FIX_QOS_BANK1102,"
hexmask.quad.byte 0x330 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x330 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x330 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x330 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x330 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x330 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x330 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x330 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x338 "QOSBW_FIX_QOS_BANK1103,"
hexmask.quad.byte 0x338 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x338 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x338 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x338 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x338 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x338 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x338 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x338 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x340 "QOSBW_FIX_QOS_BANK1104,"
hexmask.quad.byte 0x340 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x340 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x340 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x340 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x340 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x340 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x340 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x340 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x348 "QOSBW_FIX_QOS_BANK1105,"
hexmask.quad.byte 0x348 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x348 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x348 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x348 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x348 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x348 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x348 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x348 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x350 "QOSBW_FIX_QOS_BANK1106,"
hexmask.quad.byte 0x350 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x350 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x350 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x350 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x350 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x350 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x350 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x350 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x358 "QOSBW_FIX_QOS_BANK1107,"
hexmask.quad.byte 0x358 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x358 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x358 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x358 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x358 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x358 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x358 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x358 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x360 "QOSBW_FIX_QOS_BANK1108,"
hexmask.quad.byte 0x360 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x360 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x360 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x360 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x360 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x360 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x360 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x360 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x368 "QOSBW_FIX_QOS_BANK1109,"
hexmask.quad.byte 0x368 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x368 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x368 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x368 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x368 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x368 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x368 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x368 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x370 "QOSBW_FIX_QOS_BANK1110,"
hexmask.quad.byte 0x370 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x370 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x370 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x370 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x370 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x370 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x370 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x370 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x378 "QOSBW_FIX_QOS_BANK1111,"
hexmask.quad.byte 0x378 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x378 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x378 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x378 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x378 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x378 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x378 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x378 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x380 "QOSBW_FIX_QOS_BANK1112,"
hexmask.quad.byte 0x380 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x380 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x380 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x380 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x380 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x380 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x380 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x380 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x388 "QOSBW_FIX_QOS_BANK1113,"
hexmask.quad.byte 0x388 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x388 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x388 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x388 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x388 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x388 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x388 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x388 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x390 "QOSBW_FIX_QOS_BANK1114,"
hexmask.quad.byte 0x390 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x390 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x390 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x390 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x390 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x390 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x390 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x390 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x398 "QOSBW_FIX_QOS_BANK1115,"
hexmask.quad.byte 0x398 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x398 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x398 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x398 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x398 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x398 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x398 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x398 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3A0 "QOSBW_FIX_QOS_BANK1116,"
hexmask.quad.byte 0x3A0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3A0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3A0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3A0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3A0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3A0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3A0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3A0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3A8 "QOSBW_FIX_QOS_BANK1117,"
hexmask.quad.byte 0x3A8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3A8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3A8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3A8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3A8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3A8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3A8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3A8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3B0 "QOSBW_FIX_QOS_BANK1118,"
hexmask.quad.byte 0x3B0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3B0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3B0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3B0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3B0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3B0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3B0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3B0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3B8 "QOSBW_FIX_QOS_BANK1119,"
hexmask.quad.byte 0x3B8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3B8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3B8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3B8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3B8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3B8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3B8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3B8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3C0 "QOSBW_FIX_QOS_BANK1120,"
hexmask.quad.byte 0x3C0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3C0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3C0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3C0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3C0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3C0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3C0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3C0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3C8 "QOSBW_FIX_QOS_BANK1121,"
hexmask.quad.byte 0x3C8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3C8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3C8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3C8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3C8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3C8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3C8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3C8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3D0 "QOSBW_FIX_QOS_BANK1122,"
hexmask.quad.byte 0x3D0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3D0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3D0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3D0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3D0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3D0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3D0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3D0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3D8 "QOSBW_FIX_QOS_BANK1123,"
hexmask.quad.byte 0x3D8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3D8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3D8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3D8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3D8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3D8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3D8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3D8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3E0 "QOSBW_FIX_QOS_BANK1124,"
hexmask.quad.byte 0x3E0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3E0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3E0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3E0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3E0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3E0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3E0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3E0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3E8 "QOSBW_FIX_QOS_BANK1125,"
hexmask.quad.byte 0x3E8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3E8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3E8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3E8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3E8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3E8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3E8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3E8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3F0 "QOSBW_FIX_QOS_BANK1126,"
hexmask.quad.byte 0x3F0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3F0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3F0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3F0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3F0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3F0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3F0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3F0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x3F8 "QOSBW_FIX_QOS_BANK1127,"
hexmask.quad.byte 0x3F8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x3F8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x3F8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x3F8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x3F8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x3F8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x3F8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3F8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x400 "QOSBW_FIX_QOS_BANK1128,"
hexmask.quad.byte 0x400 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x400 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x400 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x400 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x400 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x400 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x400 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x400 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x408 "QOSBW_FIX_QOS_BANK1129,"
hexmask.quad.byte 0x408 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x408 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x408 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x408 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x408 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x408 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x408 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x408 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x410 "QOSBW_FIX_QOS_BANK1130,"
hexmask.quad.byte 0x410 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x410 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x410 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x410 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x410 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x410 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x410 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x410 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x418 "QOSBW_FIX_QOS_BANK1131,"
hexmask.quad.byte 0x418 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x418 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x418 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x418 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x418 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x418 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x418 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x418 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x420 "QOSBW_FIX_QOS_BANK1132,"
hexmask.quad.byte 0x420 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x420 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x420 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x420 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x420 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x420 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x420 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x420 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x428 "QOSBW_FIX_QOS_BANK1133,"
hexmask.quad.byte 0x428 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x428 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x428 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x428 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x428 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x428 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x428 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x428 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x430 "QOSBW_FIX_QOS_BANK1134,"
hexmask.quad.byte 0x430 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x430 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x430 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x430 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x430 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x430 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x430 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x430 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x438 "QOSBW_FIX_QOS_BANK1135,"
hexmask.quad.byte 0x438 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x438 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x438 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x438 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x438 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x438 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x438 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x438 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x440 "QOSBW_FIX_QOS_BANK1136,"
hexmask.quad.byte 0x440 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x440 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x440 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x440 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x440 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x440 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x440 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x440 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x448 "QOSBW_FIX_QOS_BANK1137,"
hexmask.quad.byte 0x448 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x448 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x448 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x448 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x448 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x448 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x448 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x448 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x450 "QOSBW_FIX_QOS_BANK1138,"
hexmask.quad.byte 0x450 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x450 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x450 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x450 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x450 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x450 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x450 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x450 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x458 "QOSBW_FIX_QOS_BANK1139,"
hexmask.quad.byte 0x458 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x458 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x458 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x458 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x458 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x458 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x458 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x458 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x460 "QOSBW_FIX_QOS_BANK1140,"
hexmask.quad.byte 0x460 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x460 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x460 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x460 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x460 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x460 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x460 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x460 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x468 "QOSBW_FIX_QOS_BANK1141,"
hexmask.quad.byte 0x468 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x468 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x468 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x468 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x468 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x468 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x468 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x468 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x470 "QOSBW_FIX_QOS_BANK1142,"
hexmask.quad.byte 0x470 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x470 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x470 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x470 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x470 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x470 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x470 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x470 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x478 "QOSBW_FIX_QOS_BANK1143,"
hexmask.quad.byte 0x478 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x478 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x478 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x478 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x478 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x478 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x478 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x478 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x480 "QOSBW_FIX_QOS_BANK1144,"
hexmask.quad.byte 0x480 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x480 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x480 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x480 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x480 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x480 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x480 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x480 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x488 "QOSBW_FIX_QOS_BANK1145,"
hexmask.quad.byte 0x488 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x488 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x488 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x488 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x488 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x488 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x488 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x488 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x490 "QOSBW_FIX_QOS_BANK1146,"
hexmask.quad.byte 0x490 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x490 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x490 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x490 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x490 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x490 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x490 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x490 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x498 "QOSBW_FIX_QOS_BANK1147,"
hexmask.quad.byte 0x498 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x498 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x498 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x498 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x498 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x498 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x498 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x498 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4A0 "QOSBW_FIX_QOS_BANK1148,"
hexmask.quad.byte 0x4A0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4A0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4A0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4A0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4A0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4A0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4A0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4A0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4A8 "QOSBW_FIX_QOS_BANK1149,"
hexmask.quad.byte 0x4A8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4A8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4A8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4A8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4A8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4A8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4A8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4A8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4B0 "QOSBW_FIX_QOS_BANK1150,"
hexmask.quad.byte 0x4B0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4B0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4B0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4B0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4B0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4B0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4B0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4B0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4B8 "QOSBW_FIX_QOS_BANK1151,"
hexmask.quad.byte 0x4B8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4B8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4B8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4B8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4B8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4B8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4B8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4B8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4C0 "QOSBW_FIX_QOS_BANK1152,"
hexmask.quad.byte 0x4C0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4C0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4C0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4C0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4C0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4C0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4C0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4C0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4C8 "QOSBW_FIX_QOS_BANK1153,"
hexmask.quad.byte 0x4C8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4C8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4C8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4C8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4C8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4C8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4C8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4C8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4D0 "QOSBW_FIX_QOS_BANK1154,"
hexmask.quad.byte 0x4D0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4D0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4D0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4D0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4D0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4D0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4D0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4D0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4D8 "QOSBW_FIX_QOS_BANK1155,"
hexmask.quad.byte 0x4D8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4D8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4D8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4D8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4D8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4D8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4D8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4D8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4E0 "QOSBW_FIX_QOS_BANK1156,"
hexmask.quad.byte 0x4E0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4E0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4E0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4E0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4E0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4E0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4E0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4E0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4E8 "QOSBW_FIX_QOS_BANK1157,"
hexmask.quad.byte 0x4E8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4E8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4E8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4E8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4E8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4E8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4E8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4E8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4F0 "QOSBW_FIX_QOS_BANK1158,"
hexmask.quad.byte 0x4F0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4F0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4F0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4F0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4F0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4F0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4F0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4F0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x4F8 "QOSBW_FIX_QOS_BANK1159,"
hexmask.quad.byte 0x4F8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x4F8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x4F8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x4F8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x4F8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x4F8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x4F8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4F8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x500 "QOSBW_FIX_QOS_BANK1160,"
hexmask.quad.byte 0x500 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x500 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x500 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x500 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x500 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x500 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x500 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x500 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x508 "QOSBW_FIX_QOS_BANK1161,"
hexmask.quad.byte 0x508 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x508 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x508 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x508 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x508 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x508 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x508 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x508 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x510 "QOSBW_FIX_QOS_BANK1162,"
hexmask.quad.byte 0x510 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x510 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x510 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x510 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x510 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x510 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x510 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x510 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x518 "QOSBW_FIX_QOS_BANK1163,"
hexmask.quad.byte 0x518 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x518 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x518 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x518 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x518 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x518 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x518 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x518 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x520 "QOSBW_FIX_QOS_BANK1164,"
hexmask.quad.byte 0x520 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x520 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x520 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x520 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x520 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x520 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x520 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x520 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x528 "QOSBW_FIX_QOS_BANK1165,"
hexmask.quad.byte 0x528 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x528 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x528 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x528 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x528 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x528 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x528 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x528 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x530 "QOSBW_FIX_QOS_BANK1166,"
hexmask.quad.byte 0x530 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x530 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x530 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x530 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x530 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x530 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x530 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x530 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x538 "QOSBW_FIX_QOS_BANK1167,"
hexmask.quad.byte 0x538 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x538 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x538 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x538 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x538 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x538 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x538 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x538 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x540 "QOSBW_FIX_QOS_BANK1168,"
hexmask.quad.byte 0x540 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x540 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x540 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x540 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x540 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x540 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x540 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x540 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x548 "QOSBW_FIX_QOS_BANK1169,"
hexmask.quad.byte 0x548 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x548 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x548 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x548 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x548 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x548 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x548 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x548 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x550 "QOSBW_FIX_QOS_BANK1170,"
hexmask.quad.byte 0x550 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x550 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x550 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x550 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x550 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x550 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x550 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x550 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x558 "QOSBW_FIX_QOS_BANK1171,"
hexmask.quad.byte 0x558 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x558 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x558 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x558 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x558 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x558 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x558 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x558 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x560 "QOSBW_FIX_QOS_BANK1172,"
hexmask.quad.byte 0x560 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x560 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x560 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x560 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x560 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x560 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x560 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x560 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x568 "QOSBW_FIX_QOS_BANK1173,"
hexmask.quad.byte 0x568 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x568 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x568 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x568 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x568 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x568 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x568 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x568 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x570 "QOSBW_FIX_QOS_BANK1174,"
hexmask.quad.byte 0x570 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x570 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x570 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x570 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x570 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x570 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x570 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x570 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x578 "QOSBW_FIX_QOS_BANK1175,"
hexmask.quad.byte 0x578 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x578 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x578 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x578 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x578 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x578 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x578 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x578 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x580 "QOSBW_FIX_QOS_BANK1176,"
hexmask.quad.byte 0x580 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x580 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x580 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x580 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x580 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x580 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x580 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x580 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x588 "QOSBW_FIX_QOS_BANK1177,"
hexmask.quad.byte 0x588 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x588 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x588 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x588 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x588 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x588 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x588 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x588 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x590 "QOSBW_FIX_QOS_BANK1178,"
hexmask.quad.byte 0x590 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x590 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x590 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x590 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x590 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x590 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x590 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x590 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x598 "QOSBW_FIX_QOS_BANK1179,"
hexmask.quad.byte 0x598 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x598 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x598 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x598 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x598 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x598 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x598 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x598 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5A0 "QOSBW_FIX_QOS_BANK1180,"
hexmask.quad.byte 0x5A0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5A0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5A0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5A0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5A0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5A0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5A0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5A0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5A8 "QOSBW_FIX_QOS_BANK1181,"
hexmask.quad.byte 0x5A8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5A8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5A8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5A8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5A8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5A8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5A8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5A8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5B0 "QOSBW_FIX_QOS_BANK1182,"
hexmask.quad.byte 0x5B0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5B0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5B0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5B0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5B0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5B0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5B0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5B0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5B8 "QOSBW_FIX_QOS_BANK1183,"
hexmask.quad.byte 0x5B8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5B8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5B8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5B8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5B8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5B8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5B8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5B8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5C0 "QOSBW_FIX_QOS_BANK1184,"
hexmask.quad.byte 0x5C0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5C0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5C0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5C0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5C0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5C0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5C0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5C0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5C8 "QOSBW_FIX_QOS_BANK1185,"
hexmask.quad.byte 0x5C8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5C8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5C8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5C8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5C8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5C8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5C8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5C8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5D0 "QOSBW_FIX_QOS_BANK1186,"
hexmask.quad.byte 0x5D0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5D0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5D0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5D0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5D0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5D0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5D0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5D0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5D8 "QOSBW_FIX_QOS_BANK1187,"
hexmask.quad.byte 0x5D8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5D8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5D8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5D8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5D8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5D8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5D8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5D8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5E0 "QOSBW_FIX_QOS_BANK1188,"
hexmask.quad.byte 0x5E0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5E0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5E0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5E0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5E0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5E0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5E0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5E0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5E8 "QOSBW_FIX_QOS_BANK1189,"
hexmask.quad.byte 0x5E8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5E8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5E8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5E8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5E8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5E8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5E8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5E8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5F0 "QOSBW_FIX_QOS_BANK1190,"
hexmask.quad.byte 0x5F0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5F0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5F0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5F0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5F0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5F0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5F0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5F0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x5F8 "QOSBW_FIX_QOS_BANK1191,"
hexmask.quad.byte 0x5F8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x5F8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x5F8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x5F8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x5F8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x5F8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x5F8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5F8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x600 "QOSBW_FIX_QOS_BANK1192,"
hexmask.quad.byte 0x600 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x600 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x600 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x600 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x600 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x600 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x600 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x600 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x608 "QOSBW_FIX_QOS_BANK1193,"
hexmask.quad.byte 0x608 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x608 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x608 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x608 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x608 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x608 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x608 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x608 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x610 "QOSBW_FIX_QOS_BANK1194,"
hexmask.quad.byte 0x610 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x610 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x610 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x610 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x610 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x610 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x610 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x610 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x618 "QOSBW_FIX_QOS_BANK1195,"
hexmask.quad.byte 0x618 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x618 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x618 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x618 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x618 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x618 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x618 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x618 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x620 "QOSBW_FIX_QOS_BANK1196,"
hexmask.quad.byte 0x620 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x620 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x620 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x620 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x620 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x620 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x620 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x620 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x628 "QOSBW_FIX_QOS_BANK1197,"
hexmask.quad.byte 0x628 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x628 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x628 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x628 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x628 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x628 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x628 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x628 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x630 "QOSBW_FIX_QOS_BANK1198,"
hexmask.quad.byte 0x630 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x630 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x630 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x630 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x630 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x630 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x630 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x630 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x638 "QOSBW_FIX_QOS_BANK1199,"
hexmask.quad.byte 0x638 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x638 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x638 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x638 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x638 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x638 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x638 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x638 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x640 "QOSBW_FIX_QOS_BANK1200,"
hexmask.quad.byte 0x640 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x640 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x640 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x640 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x640 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x640 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x640 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x640 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x648 "QOSBW_FIX_QOS_BANK1201,"
hexmask.quad.byte 0x648 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x648 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x648 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x648 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x648 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x648 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x648 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x648 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x650 "QOSBW_FIX_QOS_BANK1202,"
hexmask.quad.byte 0x650 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x650 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x650 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x650 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x650 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x650 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x650 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x650 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x658 "QOSBW_FIX_QOS_BANK1203,"
hexmask.quad.byte 0x658 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x658 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x658 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x658 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x658 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x658 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x658 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x658 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x660 "QOSBW_FIX_QOS_BANK1204,"
hexmask.quad.byte 0x660 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x660 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x660 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x660 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x660 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x660 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x660 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x660 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x668 "QOSBW_FIX_QOS_BANK1205,"
hexmask.quad.byte 0x668 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x668 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x668 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x668 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x668 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x668 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x668 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x668 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x670 "QOSBW_FIX_QOS_BANK1206,"
hexmask.quad.byte 0x670 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x670 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x670 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x670 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x670 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x670 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x670 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x670 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x678 "QOSBW_FIX_QOS_BANK1207,"
hexmask.quad.byte 0x678 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x678 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x678 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x678 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x678 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x678 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x678 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x678 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x680 "QOSBW_FIX_QOS_BANK1208,"
hexmask.quad.byte 0x680 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x680 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x680 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x680 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x680 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x680 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x680 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x680 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x688 "QOSBW_FIX_QOS_BANK1209,"
hexmask.quad.byte 0x688 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x688 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x688 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x688 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x688 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x688 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x688 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x688 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x690 "QOSBW_FIX_QOS_BANK1210,"
hexmask.quad.byte 0x690 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x690 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x690 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x690 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x690 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x690 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x690 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x690 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x698 "QOSBW_FIX_QOS_BANK1211,"
hexmask.quad.byte 0x698 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x698 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x698 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x698 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x698 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x698 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x698 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x698 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6A0 "QOSBW_FIX_QOS_BANK1212,"
hexmask.quad.byte 0x6A0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6A0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6A0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6A0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6A0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6A0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6A0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6A0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6A8 "QOSBW_FIX_QOS_BANK1213,"
hexmask.quad.byte 0x6A8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6A8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6A8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6A8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6A8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6A8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6A8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6A8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6B0 "QOSBW_FIX_QOS_BANK1214,"
hexmask.quad.byte 0x6B0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6B0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6B0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6B0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6B0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6B0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6B0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6B0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6B8 "QOSBW_FIX_QOS_BANK1215,"
hexmask.quad.byte 0x6B8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6B8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6B8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6B8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6B8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6B8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6B8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6B8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6C0 "QOSBW_FIX_QOS_BANK1216,"
hexmask.quad.byte 0x6C0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6C0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6C0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6C0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6C0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6C0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6C0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6C0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6C8 "QOSBW_FIX_QOS_BANK1217,"
hexmask.quad.byte 0x6C8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6C8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6C8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6C8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6C8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6C8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6C8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6C8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6D0 "QOSBW_FIX_QOS_BANK1218,"
hexmask.quad.byte 0x6D0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6D0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6D0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6D0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6D0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6D0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6D0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6D0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6D8 "QOSBW_FIX_QOS_BANK1219,"
hexmask.quad.byte 0x6D8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6D8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6D8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6D8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6D8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6D8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6D8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6D8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6E0 "QOSBW_FIX_QOS_BANK1220,"
hexmask.quad.byte 0x6E0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6E0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6E0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6E0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6E0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6E0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6E0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6E0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6E8 "QOSBW_FIX_QOS_BANK1221,"
hexmask.quad.byte 0x6E8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6E8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6E8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6E8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6E8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6E8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6E8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6E8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6F0 "QOSBW_FIX_QOS_BANK1222,"
hexmask.quad.byte 0x6F0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6F0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6F0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6F0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6F0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6F0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6F0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6F0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x6F8 "QOSBW_FIX_QOS_BANK1223,"
hexmask.quad.byte 0x6F8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x6F8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x6F8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x6F8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x6F8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x6F8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x6F8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6F8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x700 "QOSBW_FIX_QOS_BANK1224,"
hexmask.quad.byte 0x700 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x700 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x700 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x700 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x700 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x700 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x700 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x700 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x708 "QOSBW_FIX_QOS_BANK1225,"
hexmask.quad.byte 0x708 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x708 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x708 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x708 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x708 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x708 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x708 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x708 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x710 "QOSBW_FIX_QOS_BANK1226,"
hexmask.quad.byte 0x710 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x710 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x710 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x710 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x710 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x710 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x710 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x710 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x718 "QOSBW_FIX_QOS_BANK1227,"
hexmask.quad.byte 0x718 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x718 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x718 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x718 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x718 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x718 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x718 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x718 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x720 "QOSBW_FIX_QOS_BANK1228,"
hexmask.quad.byte 0x720 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x720 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x720 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x720 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x720 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x720 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x720 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x720 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x728 "QOSBW_FIX_QOS_BANK1229,"
hexmask.quad.byte 0x728 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x728 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x728 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x728 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x728 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x728 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x728 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x728 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x730 "QOSBW_FIX_QOS_BANK1230,"
hexmask.quad.byte 0x730 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x730 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x730 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x730 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x730 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x730 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x730 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x730 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x738 "QOSBW_FIX_QOS_BANK1231,"
hexmask.quad.byte 0x738 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x738 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x738 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x738 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x738 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x738 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x738 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x738 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x740 "QOSBW_FIX_QOS_BANK1232,"
hexmask.quad.byte 0x740 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x740 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x740 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x740 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x740 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x740 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x740 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x740 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x748 "QOSBW_FIX_QOS_BANK1233,"
hexmask.quad.byte 0x748 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x748 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x748 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x748 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x748 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x748 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x748 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x748 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x750 "QOSBW_FIX_QOS_BANK1234,"
hexmask.quad.byte 0x750 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x750 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x750 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x750 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x750 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x750 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x750 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x750 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x758 "QOSBW_FIX_QOS_BANK1235,"
hexmask.quad.byte 0x758 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x758 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x758 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x758 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x758 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x758 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x758 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x758 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x760 "QOSBW_FIX_QOS_BANK1236,"
hexmask.quad.byte 0x760 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x760 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x760 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x760 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x760 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x760 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x760 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x760 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x768 "QOSBW_FIX_QOS_BANK1237,"
hexmask.quad.byte 0x768 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x768 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x768 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x768 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x768 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x768 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x768 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x768 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x770 "QOSBW_FIX_QOS_BANK1238,"
hexmask.quad.byte 0x770 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x770 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x770 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x770 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x770 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x770 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x770 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x770 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x778 "QOSBW_FIX_QOS_BANK1239,"
hexmask.quad.byte 0x778 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x778 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x778 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x778 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x778 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x778 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x778 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x778 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x780 "QOSBW_FIX_QOS_BANK1240,"
hexmask.quad.byte 0x780 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x780 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x780 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x780 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x780 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x780 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x780 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x780 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x788 "QOSBW_FIX_QOS_BANK1241,"
hexmask.quad.byte 0x788 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x788 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x788 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x788 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x788 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x788 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x788 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x788 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x790 "QOSBW_FIX_QOS_BANK1242,"
hexmask.quad.byte 0x790 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x790 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x790 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x790 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x790 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x790 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x790 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x790 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x798 "QOSBW_FIX_QOS_BANK1243,"
hexmask.quad.byte 0x798 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x798 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x798 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x798 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x798 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x798 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x798 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x798 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7A0 "QOSBW_FIX_QOS_BANK1244,"
hexmask.quad.byte 0x7A0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7A0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7A0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7A0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7A0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7A0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7A0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7A0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7A8 "QOSBW_FIX_QOS_BANK1245,"
hexmask.quad.byte 0x7A8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7A8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7A8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7A8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7A8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7A8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7A8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7A8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7B0 "QOSBW_FIX_QOS_BANK1246,"
hexmask.quad.byte 0x7B0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7B0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7B0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7B0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7B0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7B0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7B0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7B0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7B8 "QOSBW_FIX_QOS_BANK1247,"
hexmask.quad.byte 0x7B8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7B8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7B8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7B8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7B8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7B8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7B8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7B8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7C0 "QOSBW_FIX_QOS_BANK1248,"
hexmask.quad.byte 0x7C0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7C0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7C0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7C0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7C0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7C0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7C0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7C0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7C8 "QOSBW_FIX_QOS_BANK1249,"
hexmask.quad.byte 0x7C8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7C8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7C8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7C8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7C8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7C8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7C8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7C8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7D0 "QOSBW_FIX_QOS_BANK1250,"
hexmask.quad.byte 0x7D0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7D0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7D0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7D0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7D0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7D0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7D0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7D0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7D8 "QOSBW_FIX_QOS_BANK1251,"
hexmask.quad.byte 0x7D8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7D8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7D8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7D8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7D8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7D8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7D8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7D8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7E0 "QOSBW_FIX_QOS_BANK1252,"
hexmask.quad.byte 0x7E0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7E0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7E0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7E0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7E0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7E0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7E0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7E0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7E8 "QOSBW_FIX_QOS_BANK1253,"
hexmask.quad.byte 0x7E8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7E8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7E8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7E8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7E8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7E8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7E8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7E8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7F0 "QOSBW_FIX_QOS_BANK1254,"
hexmask.quad.byte 0x7F0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7F0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7F0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7F0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7F0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7F0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7F0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7F0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x7F8 "QOSBW_FIX_QOS_BANK1255,"
hexmask.quad.byte 0x7F8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x7F8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x7F8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x7F8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x7F8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x7F8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x7F8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7F8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x800 "QOSBW_FIX_QOS_BANK1256,"
hexmask.quad.byte 0x800 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x800 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x800 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x800 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x800 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x800 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x800 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x800 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x808 "QOSBW_FIX_QOS_BANK1257,"
hexmask.quad.byte 0x808 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x808 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x808 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x808 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x808 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x808 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x808 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x808 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x810 "QOSBW_FIX_QOS_BANK1258,"
hexmask.quad.byte 0x810 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x810 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x810 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x810 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x810 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x810 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x810 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x810 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x818 "QOSBW_FIX_QOS_BANK1259,"
hexmask.quad.byte 0x818 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x818 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x818 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x818 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x818 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x818 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x818 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x818 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x820 "QOSBW_FIX_QOS_BANK1260,"
hexmask.quad.byte 0x820 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x820 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x820 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x820 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x820 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x820 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x820 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x820 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x828 "QOSBW_FIX_QOS_BANK1261,"
hexmask.quad.byte 0x828 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x828 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x828 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x828 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x828 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x828 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x828 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x828 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x830 "QOSBW_FIX_QOS_BANK1262,"
hexmask.quad.byte 0x830 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x830 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x830 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x830 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x830 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x830 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x830 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x830 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x838 "QOSBW_FIX_QOS_BANK1263,"
hexmask.quad.byte 0x838 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x838 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x838 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x838 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x838 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x838 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x838 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x838 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x840 "QOSBW_FIX_QOS_BANK1264,"
hexmask.quad.byte 0x840 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x840 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x840 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x840 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x840 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x840 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x840 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x840 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x848 "QOSBW_FIX_QOS_BANK1265,"
hexmask.quad.byte 0x848 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x848 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x848 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x848 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x848 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x848 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x848 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x848 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x850 "QOSBW_FIX_QOS_BANK1266,"
hexmask.quad.byte 0x850 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x850 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x850 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x850 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x850 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x850 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x850 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x850 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x858 "QOSBW_FIX_QOS_BANK1267,"
hexmask.quad.byte 0x858 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x858 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x858 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x858 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x858 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x858 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x858 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x858 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x860 "QOSBW_FIX_QOS_BANK1268,"
hexmask.quad.byte 0x860 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x860 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x860 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x860 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x860 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x860 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x860 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x860 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x868 "QOSBW_FIX_QOS_BANK1269,"
hexmask.quad.byte 0x868 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x868 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x868 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x868 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x868 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x868 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x868 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x868 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x870 "QOSBW_FIX_QOS_BANK1270,"
hexmask.quad.byte 0x870 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x870 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x870 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x870 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x870 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x870 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x870 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x870 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x878 "QOSBW_FIX_QOS_BANK1271,"
hexmask.quad.byte 0x878 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x878 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x878 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x878 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x878 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x878 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x878 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x878 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x880 "QOSBW_FIX_QOS_BANK1272,"
hexmask.quad.byte 0x880 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x880 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x880 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x880 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x880 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x880 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x880 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x880 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x888 "QOSBW_FIX_QOS_BANK1273,"
hexmask.quad.byte 0x888 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x888 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x888 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x888 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x888 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x888 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x888 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x888 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x890 "QOSBW_FIX_QOS_BANK1274,"
hexmask.quad.byte 0x890 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x890 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x890 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x890 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x890 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x890 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x890 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x890 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x898 "QOSBW_FIX_QOS_BANK1275,"
hexmask.quad.byte 0x898 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x898 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x898 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x898 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x898 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x898 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x898 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x898 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8A0 "QOSBW_FIX_QOS_BANK1276,"
hexmask.quad.byte 0x8A0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8A0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8A0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8A0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8A0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8A0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8A0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8A0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8A8 "QOSBW_FIX_QOS_BANK1277,"
hexmask.quad.byte 0x8A8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8A8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8A8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8A8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8A8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8A8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8A8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8A8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8B0 "QOSBW_FIX_QOS_BANK1278,"
hexmask.quad.byte 0x8B0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8B0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8B0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8B0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8B0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8B0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8B0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8B0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8B8 "QOSBW_FIX_QOS_BANK1279,"
hexmask.quad.byte 0x8B8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8B8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8B8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8B8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8B8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8B8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8B8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8B8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8C0 "QOSBW_FIX_QOS_BANK1280,"
hexmask.quad.byte 0x8C0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8C0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8C0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8C0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8C0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8C0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8C0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8C0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8C8 "QOSBW_FIX_QOS_BANK1281,"
hexmask.quad.byte 0x8C8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8C8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8C8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8C8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8C8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8C8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8C8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8C8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8D0 "QOSBW_FIX_QOS_BANK1282,"
hexmask.quad.byte 0x8D0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8D0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8D0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8D0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8D0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8D0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8D0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8D0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8D8 "QOSBW_FIX_QOS_BANK1283,"
hexmask.quad.byte 0x8D8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8D8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8D8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8D8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8D8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8D8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8D8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8D8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8E0 "QOSBW_FIX_QOS_BANK1284,"
hexmask.quad.byte 0x8E0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8E0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8E0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8E0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8E0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8E0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8E0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8E0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8E8 "QOSBW_FIX_QOS_BANK1285,"
hexmask.quad.byte 0x8E8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8E8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8E8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8E8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8E8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8E8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8E8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8E8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8F0 "QOSBW_FIX_QOS_BANK1286,"
hexmask.quad.byte 0x8F0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8F0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8F0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8F0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8F0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8F0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8F0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8F0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x8F8 "QOSBW_FIX_QOS_BANK1287,"
hexmask.quad.byte 0x8F8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x8F8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x8F8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x8F8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x8F8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x8F8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x8F8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8F8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x900 "QOSBW_FIX_QOS_BANK1288,"
hexmask.quad.byte 0x900 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x900 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x900 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x900 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x900 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x900 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x900 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x900 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x908 "QOSBW_FIX_QOS_BANK1289,"
hexmask.quad.byte 0x908 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x908 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x908 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x908 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x908 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x908 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x908 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x908 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x910 "QOSBW_FIX_QOS_BANK1290,"
hexmask.quad.byte 0x910 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x910 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x910 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x910 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x910 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x910 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x910 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x910 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x918 "QOSBW_FIX_QOS_BANK1291,"
hexmask.quad.byte 0x918 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x918 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x918 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x918 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x918 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x918 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x918 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x918 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x920 "QOSBW_FIX_QOS_BANK1292,"
hexmask.quad.byte 0x920 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x920 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x920 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x920 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x920 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x920 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x920 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x920 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x928 "QOSBW_FIX_QOS_BANK1293,"
hexmask.quad.byte 0x928 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x928 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x928 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x928 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x928 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x928 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x928 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x928 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x930 "QOSBW_FIX_QOS_BANK1294,"
hexmask.quad.byte 0x930 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x930 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x930 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x930 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x930 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x930 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x930 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x930 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x938 "QOSBW_FIX_QOS_BANK1295,"
hexmask.quad.byte 0x938 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x938 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x938 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x938 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x938 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x938 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x938 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x938 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x940 "QOSBW_FIX_QOS_BANK1296,"
hexmask.quad.byte 0x940 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x940 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x940 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x940 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x940 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x940 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x940 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x940 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x948 "QOSBW_FIX_QOS_BANK1297,"
hexmask.quad.byte 0x948 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x948 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x948 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x948 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x948 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x948 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x948 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x948 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x950 "QOSBW_FIX_QOS_BANK1298,"
hexmask.quad.byte 0x950 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x950 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x950 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x950 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x950 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x950 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x950 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x950 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x958 "QOSBW_FIX_QOS_BANK1299,"
hexmask.quad.byte 0x958 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x958 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x958 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x958 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x958 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x958 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x958 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x958 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x960 "QOSBW_FIX_QOS_BANK1300,"
hexmask.quad.byte 0x960 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x960 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x960 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x960 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x960 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x960 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x960 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x960 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x968 "QOSBW_FIX_QOS_BANK1301,"
hexmask.quad.byte 0x968 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x968 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x968 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x968 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x968 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x968 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x968 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x968 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x970 "QOSBW_FIX_QOS_BANK1302,"
hexmask.quad.byte 0x970 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x970 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x970 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x970 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x970 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x970 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x970 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x970 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x978 "QOSBW_FIX_QOS_BANK1303,"
hexmask.quad.byte 0x978 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x978 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x978 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x978 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x978 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x978 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x978 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x978 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x980 "QOSBW_FIX_QOS_BANK1304,"
hexmask.quad.byte 0x980 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x980 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x980 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x980 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x980 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x980 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x980 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x980 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x988 "QOSBW_FIX_QOS_BANK1305,"
hexmask.quad.byte 0x988 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x988 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x988 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x988 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x988 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x988 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x988 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x988 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x990 "QOSBW_FIX_QOS_BANK1306,"
hexmask.quad.byte 0x990 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x990 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x990 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x990 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x990 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x990 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x990 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x990 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x998 "QOSBW_FIX_QOS_BANK1307,"
hexmask.quad.byte 0x998 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x998 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x998 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x998 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x998 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x998 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x998 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x998 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9A0 "QOSBW_FIX_QOS_BANK1308,"
hexmask.quad.byte 0x9A0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9A0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9A0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9A0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9A0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9A0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9A0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9A0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9A8 "QOSBW_FIX_QOS_BANK1309,"
hexmask.quad.byte 0x9A8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9A8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9A8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9A8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9A8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9A8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9A8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9A8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9B0 "QOSBW_FIX_QOS_BANK1310,"
hexmask.quad.byte 0x9B0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9B0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9B0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9B0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9B0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9B0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9B0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9B0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9B8 "QOSBW_FIX_QOS_BANK1311,"
hexmask.quad.byte 0x9B8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9B8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9B8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9B8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9B8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9B8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9B8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9B8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9C0 "QOSBW_FIX_QOS_BANK1312,"
hexmask.quad.byte 0x9C0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9C0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9C0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9C0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9C0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9C0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9C0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9C0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9C8 "QOSBW_FIX_QOS_BANK1313,"
hexmask.quad.byte 0x9C8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9C8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9C8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9C8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9C8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9C8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9C8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9C8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9D0 "QOSBW_FIX_QOS_BANK1314,"
hexmask.quad.byte 0x9D0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9D0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9D0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9D0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9D0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9D0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9D0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9D0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9D8 "QOSBW_FIX_QOS_BANK1315,"
hexmask.quad.byte 0x9D8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9D8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9D8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9D8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9D8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9D8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9D8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9D8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9E0 "QOSBW_FIX_QOS_BANK1316,"
hexmask.quad.byte 0x9E0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9E0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9E0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9E0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9E0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9E0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9E0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9E0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9E8 "QOSBW_FIX_QOS_BANK1317,"
hexmask.quad.byte 0x9E8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9E8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9E8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9E8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9E8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9E8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9E8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9E8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9F0 "QOSBW_FIX_QOS_BANK1318,"
hexmask.quad.byte 0x9F0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9F0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9F0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9F0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9F0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9F0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9F0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9F0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0x9F8 "QOSBW_FIX_QOS_BANK1319,"
hexmask.quad.byte 0x9F8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0x9F8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0x9F8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0x9F8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0x9F8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0x9F8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0x9F8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9F8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA00 "QOSBW_FIX_QOS_BANK1320,"
hexmask.quad.byte 0xA00 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA00 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA00 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA00 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA00 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA00 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA00 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA00 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA08 "QOSBW_FIX_QOS_BANK1321,"
hexmask.quad.byte 0xA08 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA08 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA08 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA08 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA08 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA08 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA08 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA08 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA10 "QOSBW_FIX_QOS_BANK1322,"
hexmask.quad.byte 0xA10 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA10 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA10 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA10 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA10 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA10 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA10 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA10 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA18 "QOSBW_FIX_QOS_BANK1323,"
hexmask.quad.byte 0xA18 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA18 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA18 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA18 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA18 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA18 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA18 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA18 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA20 "QOSBW_FIX_QOS_BANK1324,"
hexmask.quad.byte 0xA20 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA20 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA20 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA20 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA20 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA20 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA20 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA20 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA28 "QOSBW_FIX_QOS_BANK1325,"
hexmask.quad.byte 0xA28 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA28 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA28 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA28 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA28 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA28 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA28 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA28 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA30 "QOSBW_FIX_QOS_BANK1326,"
hexmask.quad.byte 0xA30 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA30 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA30 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA30 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA30 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA30 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA30 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA30 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA38 "QOSBW_FIX_QOS_BANK1327,"
hexmask.quad.byte 0xA38 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA38 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA38 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA38 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA38 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA38 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA38 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA38 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA40 "QOSBW_FIX_QOS_BANK1328,"
hexmask.quad.byte 0xA40 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA40 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA40 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA40 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA40 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA40 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA40 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA40 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA48 "QOSBW_FIX_QOS_BANK1329,"
hexmask.quad.byte 0xA48 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA48 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA48 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA48 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA48 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA48 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA48 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA48 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA50 "QOSBW_FIX_QOS_BANK1330,"
hexmask.quad.byte 0xA50 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA50 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA50 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA50 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA50 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA50 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA50 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA50 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA58 "QOSBW_FIX_QOS_BANK1331,"
hexmask.quad.byte 0xA58 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA58 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA58 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA58 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA58 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA58 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA58 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA58 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA60 "QOSBW_FIX_QOS_BANK1332,"
hexmask.quad.byte 0xA60 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA60 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA60 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA60 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA60 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA60 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA60 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA60 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA68 "QOSBW_FIX_QOS_BANK1333,"
hexmask.quad.byte 0xA68 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA68 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA68 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA68 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA68 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA68 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA68 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA68 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA70 "QOSBW_FIX_QOS_BANK1334,"
hexmask.quad.byte 0xA70 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA70 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA70 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA70 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA70 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA70 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA70 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA70 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA78 "QOSBW_FIX_QOS_BANK1335,"
hexmask.quad.byte 0xA78 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA78 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA78 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA78 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA78 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA78 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA78 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA78 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA80 "QOSBW_FIX_QOS_BANK1336,"
hexmask.quad.byte 0xA80 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA80 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA80 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA80 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA80 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA80 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA80 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA80 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA88 "QOSBW_FIX_QOS_BANK1337,"
hexmask.quad.byte 0xA88 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA88 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA88 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA88 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA88 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA88 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA88 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA88 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA90 "QOSBW_FIX_QOS_BANK1338,"
hexmask.quad.byte 0xA90 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA90 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA90 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA90 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA90 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA90 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA90 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA90 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xA98 "QOSBW_FIX_QOS_BANK1339,"
hexmask.quad.byte 0xA98 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xA98 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xA98 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xA98 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xA98 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xA98 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xA98 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA98 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAA0 "QOSBW_FIX_QOS_BANK1340,"
hexmask.quad.byte 0xAA0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAA0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAA0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAA0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAA0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAA0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAA0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAA0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAA8 "QOSBW_FIX_QOS_BANK1341,"
hexmask.quad.byte 0xAA8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAA8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAA8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAA8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAA8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAA8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAA8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAA8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAB0 "QOSBW_FIX_QOS_BANK1342,"
hexmask.quad.byte 0xAB0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAB0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAB0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAB0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAB0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAB0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAB0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAB0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAB8 "QOSBW_FIX_QOS_BANK1343,"
hexmask.quad.byte 0xAB8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAB8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAB8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAB8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAB8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAB8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAB8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAB8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAC0 "QOSBW_FIX_QOS_BANK1344,"
hexmask.quad.byte 0xAC0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAC0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAC0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAC0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAC0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAC0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAC0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAC0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAC8 "QOSBW_FIX_QOS_BANK1345,"
hexmask.quad.byte 0xAC8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAC8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAC8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAC8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAC8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAC8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAC8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAC8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAD0 "QOSBW_FIX_QOS_BANK1346,"
hexmask.quad.byte 0xAD0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAD0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAD0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAD0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAD0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAD0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAD0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAD0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAD8 "QOSBW_FIX_QOS_BANK1347,"
hexmask.quad.byte 0xAD8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAD8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAD8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAD8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAD8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAD8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAD8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAD8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAE0 "QOSBW_FIX_QOS_BANK1348,"
hexmask.quad.byte 0xAE0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAE0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAE0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAE0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAE0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAE0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAE0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAE0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAE8 "QOSBW_FIX_QOS_BANK1349,"
hexmask.quad.byte 0xAE8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAE8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAE8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAE8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAE8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAE8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAE8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAE8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAF0 "QOSBW_FIX_QOS_BANK1350,"
hexmask.quad.byte 0xAF0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAF0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAF0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAF0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAF0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAF0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAF0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAF0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xAF8 "QOSBW_FIX_QOS_BANK1351,"
hexmask.quad.byte 0xAF8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xAF8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xAF8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xAF8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xAF8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xAF8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xAF8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAF8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB00 "QOSBW_FIX_QOS_BANK1352,"
hexmask.quad.byte 0xB00 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB00 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB00 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB00 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB00 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB00 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB00 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB00 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB08 "QOSBW_FIX_QOS_BANK1353,"
hexmask.quad.byte 0xB08 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB08 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB08 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB08 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB08 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB08 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB08 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB08 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB10 "QOSBW_FIX_QOS_BANK1354,"
hexmask.quad.byte 0xB10 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB10 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB10 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB10 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB10 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB10 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB10 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB10 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB18 "QOSBW_FIX_QOS_BANK1355,"
hexmask.quad.byte 0xB18 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB18 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB18 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB18 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB18 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB18 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB18 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB18 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB20 "QOSBW_FIX_QOS_BANK1356,"
hexmask.quad.byte 0xB20 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB20 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB20 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB20 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB20 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB20 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB20 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB20 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB28 "QOSBW_FIX_QOS_BANK1357,"
hexmask.quad.byte 0xB28 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB28 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB28 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB28 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB28 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB28 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB28 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB28 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB30 "QOSBW_FIX_QOS_BANK1358,"
hexmask.quad.byte 0xB30 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB30 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB30 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB30 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB30 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB30 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB30 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB30 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB38 "QOSBW_FIX_QOS_BANK1359,"
hexmask.quad.byte 0xB38 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB38 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB38 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB38 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB38 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB38 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB38 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB38 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB40 "QOSBW_FIX_QOS_BANK1360,"
hexmask.quad.byte 0xB40 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB40 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB40 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB40 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB40 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB40 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB40 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB40 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB48 "QOSBW_FIX_QOS_BANK1361,"
hexmask.quad.byte 0xB48 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB48 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB48 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB48 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB48 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB48 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB48 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB48 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB50 "QOSBW_FIX_QOS_BANK1362,"
hexmask.quad.byte 0xB50 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB50 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB50 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB50 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB50 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB50 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB50 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB50 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB58 "QOSBW_FIX_QOS_BANK1363,"
hexmask.quad.byte 0xB58 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB58 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB58 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB58 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB58 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB58 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB58 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB58 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB60 "QOSBW_FIX_QOS_BANK1364,"
hexmask.quad.byte 0xB60 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB60 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB60 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB60 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB60 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB60 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB60 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB60 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB68 "QOSBW_FIX_QOS_BANK1365,"
hexmask.quad.byte 0xB68 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB68 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB68 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB68 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB68 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB68 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB68 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB68 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB70 "QOSBW_FIX_QOS_BANK1366,"
hexmask.quad.byte 0xB70 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB70 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB70 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB70 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB70 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB70 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB70 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB70 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB78 "QOSBW_FIX_QOS_BANK1367,"
hexmask.quad.byte 0xB78 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB78 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB78 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB78 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB78 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB78 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB78 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB78 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB80 "QOSBW_FIX_QOS_BANK1368,"
hexmask.quad.byte 0xB80 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB80 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB80 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB80 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB80 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB80 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB80 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB80 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB88 "QOSBW_FIX_QOS_BANK1369,"
hexmask.quad.byte 0xB88 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB88 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB88 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB88 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB88 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB88 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB88 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB88 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB90 "QOSBW_FIX_QOS_BANK1370,"
hexmask.quad.byte 0xB90 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB90 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB90 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB90 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB90 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB90 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB90 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB90 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xB98 "QOSBW_FIX_QOS_BANK1371,"
hexmask.quad.byte 0xB98 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xB98 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xB98 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xB98 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xB98 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xB98 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xB98 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB98 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBA0 "QOSBW_FIX_QOS_BANK1372,"
hexmask.quad.byte 0xBA0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBA0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBA0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBA0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBA0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBA0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBA0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBA0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBA8 "QOSBW_FIX_QOS_BANK1373,"
hexmask.quad.byte 0xBA8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBA8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBA8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBA8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBA8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBA8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBA8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBA8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBB0 "QOSBW_FIX_QOS_BANK1374,"
hexmask.quad.byte 0xBB0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBB0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBB0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBB0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBB0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBB0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBB0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBB0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBB8 "QOSBW_FIX_QOS_BANK1375,"
hexmask.quad.byte 0xBB8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBB8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBB8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBB8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBB8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBB8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBB8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBB8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBC0 "QOSBW_FIX_QOS_BANK1376,"
hexmask.quad.byte 0xBC0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBC0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBC0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBC0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBC0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBC0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBC0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBC0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBC8 "QOSBW_FIX_QOS_BANK1377,"
hexmask.quad.byte 0xBC8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBC8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBC8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBC8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBC8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBC8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBC8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBC8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBD0 "QOSBW_FIX_QOS_BANK1378,"
hexmask.quad.byte 0xBD0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBD0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBD0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBD0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBD0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBD0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBD0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBD0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBD8 "QOSBW_FIX_QOS_BANK1379,"
hexmask.quad.byte 0xBD8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBD8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBD8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBD8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBD8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBD8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBD8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBD8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBE0 "QOSBW_FIX_QOS_BANK1380,"
hexmask.quad.byte 0xBE0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBE0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBE0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBE0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBE0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBE0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBE0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBE0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBE8 "QOSBW_FIX_QOS_BANK1381,"
hexmask.quad.byte 0xBE8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBE8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBE8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBE8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBE8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBE8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBE8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBE8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBF0 "QOSBW_FIX_QOS_BANK1382,"
hexmask.quad.byte 0xBF0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBF0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBF0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBF0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBF0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBF0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBF0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBF0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xBF8 "QOSBW_FIX_QOS_BANK1383,"
hexmask.quad.byte 0xBF8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xBF8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xBF8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xBF8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xBF8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xBF8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xBF8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBF8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC00 "QOSBW_FIX_QOS_BANK1384,"
hexmask.quad.byte 0xC00 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC00 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC00 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC00 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC00 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC00 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC00 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC00 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC08 "QOSBW_FIX_QOS_BANK1385,"
hexmask.quad.byte 0xC08 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC08 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC08 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC08 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC08 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC08 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC08 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC08 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC10 "QOSBW_FIX_QOS_BANK1386,"
hexmask.quad.byte 0xC10 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC10 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC10 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC10 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC10 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC10 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC10 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC10 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC18 "QOSBW_FIX_QOS_BANK1387,"
hexmask.quad.byte 0xC18 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC18 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC18 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC18 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC18 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC18 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC18 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC18 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC20 "QOSBW_FIX_QOS_BANK1388,"
hexmask.quad.byte 0xC20 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC20 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC20 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC20 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC20 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC20 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC20 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC20 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC28 "QOSBW_FIX_QOS_BANK1389,"
hexmask.quad.byte 0xC28 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC28 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC28 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC28 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC28 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC28 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC28 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC28 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC30 "QOSBW_FIX_QOS_BANK1390,"
hexmask.quad.byte 0xC30 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC30 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC30 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC30 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC30 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC30 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC30 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC30 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC38 "QOSBW_FIX_QOS_BANK1391,"
hexmask.quad.byte 0xC38 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC38 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC38 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC38 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC38 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC38 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC38 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC38 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC40 "QOSBW_FIX_QOS_BANK1392,"
hexmask.quad.byte 0xC40 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC40 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC40 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC40 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC40 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC40 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC40 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC40 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC48 "QOSBW_FIX_QOS_BANK1393,"
hexmask.quad.byte 0xC48 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC48 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC48 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC48 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC48 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC48 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC48 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC48 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC50 "QOSBW_FIX_QOS_BANK1394,"
hexmask.quad.byte 0xC50 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC50 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC50 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC50 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC50 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC50 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC50 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC50 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC58 "QOSBW_FIX_QOS_BANK1395,"
hexmask.quad.byte 0xC58 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC58 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC58 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC58 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC58 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC58 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC58 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC58 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC60 "QOSBW_FIX_QOS_BANK1396,"
hexmask.quad.byte 0xC60 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC60 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC60 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC60 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC60 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC60 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC60 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC60 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC68 "QOSBW_FIX_QOS_BANK1397,"
hexmask.quad.byte 0xC68 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC68 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC68 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC68 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC68 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC68 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC68 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC68 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC70 "QOSBW_FIX_QOS_BANK1398,"
hexmask.quad.byte 0xC70 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC70 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC70 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC70 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC70 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC70 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC70 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC70 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC78 "QOSBW_FIX_QOS_BANK1399,"
hexmask.quad.byte 0xC78 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC78 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC78 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC78 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC78 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC78 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC78 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC78 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC80 "QOSBW_FIX_QOS_BANK1400,"
hexmask.quad.byte 0xC80 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC80 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC80 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC80 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC80 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC80 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC80 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC80 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC88 "QOSBW_FIX_QOS_BANK1401,"
hexmask.quad.byte 0xC88 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC88 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC88 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC88 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC88 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC88 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC88 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC88 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC90 "QOSBW_FIX_QOS_BANK1402,"
hexmask.quad.byte 0xC90 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC90 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC90 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC90 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC90 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC90 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC90 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC90 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xC98 "QOSBW_FIX_QOS_BANK1403,"
hexmask.quad.byte 0xC98 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xC98 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xC98 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xC98 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xC98 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xC98 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xC98 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC98 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCA0 "QOSBW_FIX_QOS_BANK1404,"
hexmask.quad.byte 0xCA0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCA0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCA0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCA0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCA0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCA0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCA0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCA0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCA8 "QOSBW_FIX_QOS_BANK1405,"
hexmask.quad.byte 0xCA8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCA8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCA8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCA8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCA8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCA8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCA8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCA8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCB0 "QOSBW_FIX_QOS_BANK1406,"
hexmask.quad.byte 0xCB0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCB0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCB0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCB0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCB0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCB0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCB0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCB0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCB8 "QOSBW_FIX_QOS_BANK1407,"
hexmask.quad.byte 0xCB8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCB8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCB8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCB8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCB8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCB8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCB8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCB8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCC0 "QOSBW_FIX_QOS_BANK1408,"
hexmask.quad.byte 0xCC0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCC0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCC0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCC0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCC0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCC0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCC0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCC0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCC8 "QOSBW_FIX_QOS_BANK1409,"
hexmask.quad.byte 0xCC8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCC8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCC8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCC8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCC8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCC8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCC8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCC8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCD0 "QOSBW_FIX_QOS_BANK1410,"
hexmask.quad.byte 0xCD0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCD0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCD0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCD0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCD0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCD0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCD0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCD0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCD8 "QOSBW_FIX_QOS_BANK1411,"
hexmask.quad.byte 0xCD8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCD8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCD8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCD8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCD8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCD8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCD8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCD8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCE0 "QOSBW_FIX_QOS_BANK1412,"
hexmask.quad.byte 0xCE0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCE0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCE0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCE0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCE0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCE0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCE0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCE0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCE8 "QOSBW_FIX_QOS_BANK1413,"
hexmask.quad.byte 0xCE8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCE8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCE8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCE8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCE8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCE8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCE8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCE8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCF0 "QOSBW_FIX_QOS_BANK1414,"
hexmask.quad.byte 0xCF0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCF0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCF0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCF0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCF0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCF0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCF0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCF0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xCF8 "QOSBW_FIX_QOS_BANK1415,"
hexmask.quad.byte 0xCF8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xCF8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xCF8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xCF8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xCF8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xCF8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xCF8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCF8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD00 "QOSBW_FIX_QOS_BANK1416,"
hexmask.quad.byte 0xD00 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD00 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD00 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD00 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD00 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD00 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD00 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD00 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD08 "QOSBW_FIX_QOS_BANK1417,"
hexmask.quad.byte 0xD08 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD08 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD08 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD08 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD08 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD08 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD08 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD08 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD10 "QOSBW_FIX_QOS_BANK1418,"
hexmask.quad.byte 0xD10 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD10 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD10 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD10 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD10 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD10 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD10 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD10 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD18 "QOSBW_FIX_QOS_BANK1419,"
hexmask.quad.byte 0xD18 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD18 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD18 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD18 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD18 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD18 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD18 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD18 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD20 "QOSBW_FIX_QOS_BANK1420,"
hexmask.quad.byte 0xD20 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD20 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD20 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD20 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD20 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD20 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD20 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD20 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD28 "QOSBW_FIX_QOS_BANK1421,"
hexmask.quad.byte 0xD28 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD28 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD28 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD28 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD28 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD28 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD28 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD28 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD30 "QOSBW_FIX_QOS_BANK1422,"
hexmask.quad.byte 0xD30 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD30 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD30 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD30 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD30 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD30 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD30 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD30 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD38 "QOSBW_FIX_QOS_BANK1423,"
hexmask.quad.byte 0xD38 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD38 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD38 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD38 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD38 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD38 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD38 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD38 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD40 "QOSBW_FIX_QOS_BANK1424,"
hexmask.quad.byte 0xD40 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD40 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD40 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD40 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD40 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD40 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD40 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD40 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD48 "QOSBW_FIX_QOS_BANK1425,"
hexmask.quad.byte 0xD48 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD48 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD48 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD48 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD48 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD48 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD48 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD48 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD50 "QOSBW_FIX_QOS_BANK1426,"
hexmask.quad.byte 0xD50 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD50 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD50 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD50 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD50 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD50 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD50 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD50 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD58 "QOSBW_FIX_QOS_BANK1427,"
hexmask.quad.byte 0xD58 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD58 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD58 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD58 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD58 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD58 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD58 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD58 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD60 "QOSBW_FIX_QOS_BANK1428,"
hexmask.quad.byte 0xD60 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD60 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD60 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD60 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD60 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD60 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD60 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD60 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD68 "QOSBW_FIX_QOS_BANK1429,"
hexmask.quad.byte 0xD68 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD68 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD68 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD68 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD68 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD68 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD68 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD68 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD70 "QOSBW_FIX_QOS_BANK1430,"
hexmask.quad.byte 0xD70 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD70 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD70 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD70 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD70 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD70 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD70 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD70 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD78 "QOSBW_FIX_QOS_BANK1431,"
hexmask.quad.byte 0xD78 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD78 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD78 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD78 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD78 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD78 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD78 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD78 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD80 "QOSBW_FIX_QOS_BANK1432,"
hexmask.quad.byte 0xD80 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD80 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD80 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD80 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD80 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD80 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD80 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD80 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD88 "QOSBW_FIX_QOS_BANK1433,"
hexmask.quad.byte 0xD88 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD88 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD88 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD88 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD88 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD88 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD88 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD88 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD90 "QOSBW_FIX_QOS_BANK1434,"
hexmask.quad.byte 0xD90 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD90 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD90 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD90 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD90 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD90 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD90 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD90 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xD98 "QOSBW_FIX_QOS_BANK1435,"
hexmask.quad.byte 0xD98 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xD98 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xD98 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xD98 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xD98 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xD98 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xD98 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD98 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDA0 "QOSBW_FIX_QOS_BANK1436,"
hexmask.quad.byte 0xDA0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDA0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDA0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDA0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDA0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDA0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDA0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDA0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDA8 "QOSBW_FIX_QOS_BANK1437,"
hexmask.quad.byte 0xDA8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDA8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDA8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDA8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDA8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDA8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDA8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDA8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDB0 "QOSBW_FIX_QOS_BANK1438,"
hexmask.quad.byte 0xDB0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDB0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDB0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDB0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDB0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDB0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDB0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDB0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDB8 "QOSBW_FIX_QOS_BANK1439,"
hexmask.quad.byte 0xDB8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDB8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDB8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDB8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDB8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDB8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDB8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDB8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDC0 "QOSBW_FIX_QOS_BANK1440,"
hexmask.quad.byte 0xDC0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDC0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDC0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDC0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDC0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDC0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDC0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDC0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDC8 "QOSBW_FIX_QOS_BANK1441,"
hexmask.quad.byte 0xDC8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDC8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDC8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDC8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDC8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDC8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDC8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDC8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDD0 "QOSBW_FIX_QOS_BANK1442,"
hexmask.quad.byte 0xDD0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDD0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDD0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDD0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDD0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDD0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDD0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDD0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDD8 "QOSBW_FIX_QOS_BANK1443,"
hexmask.quad.byte 0xDD8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDD8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDD8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDD8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDD8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDD8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDD8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDD8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDE0 "QOSBW_FIX_QOS_BANK1444,"
hexmask.quad.byte 0xDE0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDE0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDE0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDE0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDE0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDE0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDE0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDE0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDE8 "QOSBW_FIX_QOS_BANK1445,"
hexmask.quad.byte 0xDE8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDE8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDE8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDE8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDE8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDE8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDE8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDE8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDF0 "QOSBW_FIX_QOS_BANK1446,"
hexmask.quad.byte 0xDF0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDF0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDF0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDF0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDF0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDF0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDF0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDF0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xDF8 "QOSBW_FIX_QOS_BANK1447,"
hexmask.quad.byte 0xDF8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xDF8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xDF8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xDF8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xDF8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xDF8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xDF8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDF8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE00 "QOSBW_FIX_QOS_BANK1448,"
hexmask.quad.byte 0xE00 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE00 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE00 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE00 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE00 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE00 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE00 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE00 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE08 "QOSBW_FIX_QOS_BANK1449,"
hexmask.quad.byte 0xE08 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE08 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE08 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE08 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE08 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE08 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE08 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE08 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE10 "QOSBW_FIX_QOS_BANK1450,"
hexmask.quad.byte 0xE10 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE10 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE10 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE10 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE10 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE10 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE10 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE10 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE18 "QOSBW_FIX_QOS_BANK1451,"
hexmask.quad.byte 0xE18 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE18 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE18 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE18 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE18 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE18 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE18 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE18 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE20 "QOSBW_FIX_QOS_BANK1452,"
hexmask.quad.byte 0xE20 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE20 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE20 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE20 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE20 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE20 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE20 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE20 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE28 "QOSBW_FIX_QOS_BANK1453,"
hexmask.quad.byte 0xE28 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE28 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE28 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE28 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE28 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE28 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE28 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE28 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE30 "QOSBW_FIX_QOS_BANK1454,"
hexmask.quad.byte 0xE30 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE30 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE30 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE30 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE30 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE30 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE30 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE30 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE38 "QOSBW_FIX_QOS_BANK1455,"
hexmask.quad.byte 0xE38 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE38 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE38 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE38 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE38 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE38 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE38 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE38 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE40 "QOSBW_FIX_QOS_BANK1456,"
hexmask.quad.byte 0xE40 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE40 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE40 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE40 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE40 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE40 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE40 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE40 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE48 "QOSBW_FIX_QOS_BANK1457,"
hexmask.quad.byte 0xE48 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE48 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE48 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE48 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE48 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE48 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE48 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE48 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE50 "QOSBW_FIX_QOS_BANK1458,"
hexmask.quad.byte 0xE50 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE50 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE50 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE50 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE50 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE50 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE50 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE50 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE58 "QOSBW_FIX_QOS_BANK1459,"
hexmask.quad.byte 0xE58 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE58 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE58 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE58 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE58 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE58 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE58 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE58 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE60 "QOSBW_FIX_QOS_BANK1460,"
hexmask.quad.byte 0xE60 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE60 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE60 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE60 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE60 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE60 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE60 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE60 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE68 "QOSBW_FIX_QOS_BANK1461,"
hexmask.quad.byte 0xE68 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE68 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE68 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE68 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE68 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE68 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE68 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE68 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE70 "QOSBW_FIX_QOS_BANK1462,"
hexmask.quad.byte 0xE70 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE70 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE70 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE70 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE70 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE70 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE70 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE70 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE78 "QOSBW_FIX_QOS_BANK1463,"
hexmask.quad.byte 0xE78 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE78 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE78 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE78 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE78 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE78 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE78 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE78 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE80 "QOSBW_FIX_QOS_BANK1464,"
hexmask.quad.byte 0xE80 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE80 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE80 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE80 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE80 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE80 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE80 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE80 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE88 "QOSBW_FIX_QOS_BANK1465,"
hexmask.quad.byte 0xE88 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE88 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE88 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE88 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE88 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE88 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE88 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE88 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE90 "QOSBW_FIX_QOS_BANK1466,"
hexmask.quad.byte 0xE90 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE90 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE90 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE90 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE90 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE90 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE90 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE90 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xE98 "QOSBW_FIX_QOS_BANK1467,"
hexmask.quad.byte 0xE98 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xE98 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xE98 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xE98 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xE98 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xE98 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xE98 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE98 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEA0 "QOSBW_FIX_QOS_BANK1468,"
hexmask.quad.byte 0xEA0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEA0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEA0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEA0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEA0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEA0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEA0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEA0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEA8 "QOSBW_FIX_QOS_BANK1469,"
hexmask.quad.byte 0xEA8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEA8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEA8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEA8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEA8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEA8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEA8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEA8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEB0 "QOSBW_FIX_QOS_BANK1470,"
hexmask.quad.byte 0xEB0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEB0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEB0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEB0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEB0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEB0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEB0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEB0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEB8 "QOSBW_FIX_QOS_BANK1471,"
hexmask.quad.byte 0xEB8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEB8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEB8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEB8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEB8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEB8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEB8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEB8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEC0 "QOSBW_FIX_QOS_BANK1472,"
hexmask.quad.byte 0xEC0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEC0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEC0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEC0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEC0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEC0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEC0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEC0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEC8 "QOSBW_FIX_QOS_BANK1473,"
hexmask.quad.byte 0xEC8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEC8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEC8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEC8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEC8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEC8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEC8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEC8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xED0 "QOSBW_FIX_QOS_BANK1474,"
hexmask.quad.byte 0xED0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xED0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xED0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xED0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xED0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xED0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xED0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xED0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xED8 "QOSBW_FIX_QOS_BANK1475,"
hexmask.quad.byte 0xED8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xED8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xED8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xED8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xED8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xED8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xED8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xED8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEE0 "QOSBW_FIX_QOS_BANK1476,"
hexmask.quad.byte 0xEE0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEE0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEE0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEE0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEE0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEE0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEE0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEE0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEE8 "QOSBW_FIX_QOS_BANK1477,"
hexmask.quad.byte 0xEE8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEE8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEE8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEE8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEE8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEE8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEE8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEE8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEF0 "QOSBW_FIX_QOS_BANK1478,"
hexmask.quad.byte 0xEF0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEF0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEF0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEF0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEF0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEF0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEF0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEF0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xEF8 "QOSBW_FIX_QOS_BANK1479,"
hexmask.quad.byte 0xEF8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xEF8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xEF8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xEF8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xEF8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xEF8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xEF8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEF8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF00 "QOSBW_FIX_QOS_BANK1480,"
hexmask.quad.byte 0xF00 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF00 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF00 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF00 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF00 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF00 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF00 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF00 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF08 "QOSBW_FIX_QOS_BANK1481,"
hexmask.quad.byte 0xF08 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF08 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF08 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF08 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF08 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF08 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF08 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF08 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF10 "QOSBW_FIX_QOS_BANK1482,"
hexmask.quad.byte 0xF10 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF10 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF10 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF10 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF10 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF10 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF10 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF10 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF18 "QOSBW_FIX_QOS_BANK1483,"
hexmask.quad.byte 0xF18 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF18 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF18 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF18 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF18 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF18 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF18 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF18 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF20 "QOSBW_FIX_QOS_BANK1484,"
hexmask.quad.byte 0xF20 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF20 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF20 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF20 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF20 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF20 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF20 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF20 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF28 "QOSBW_FIX_QOS_BANK1485,"
hexmask.quad.byte 0xF28 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF28 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF28 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF28 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF28 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF28 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF28 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF28 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF30 "QOSBW_FIX_QOS_BANK1486,"
hexmask.quad.byte 0xF30 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF30 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF30 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF30 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF30 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF30 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF30 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF30 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF38 "QOSBW_FIX_QOS_BANK1487,"
hexmask.quad.byte 0xF38 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF38 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF38 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF38 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF38 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF38 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF38 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF38 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF40 "QOSBW_FIX_QOS_BANK1488,"
hexmask.quad.byte 0xF40 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF40 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF40 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF40 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF40 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF40 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF40 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF40 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF48 "QOSBW_FIX_QOS_BANK1489,"
hexmask.quad.byte 0xF48 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF48 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF48 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF48 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF48 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF48 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF48 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF48 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF50 "QOSBW_FIX_QOS_BANK1490,"
hexmask.quad.byte 0xF50 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF50 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF50 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF50 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF50 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF50 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF50 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF50 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF58 "QOSBW_FIX_QOS_BANK1491,"
hexmask.quad.byte 0xF58 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF58 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF58 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF58 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF58 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF58 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF58 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF58 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF60 "QOSBW_FIX_QOS_BANK1492,"
hexmask.quad.byte 0xF60 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF60 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF60 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF60 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF60 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF60 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF60 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF60 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF68 "QOSBW_FIX_QOS_BANK1493,"
hexmask.quad.byte 0xF68 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF68 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF68 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF68 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF68 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF68 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF68 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF68 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF70 "QOSBW_FIX_QOS_BANK1494,"
hexmask.quad.byte 0xF70 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF70 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF70 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF70 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF70 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF70 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF70 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF70 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF78 "QOSBW_FIX_QOS_BANK1495,"
hexmask.quad.byte 0xF78 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF78 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF78 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF78 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF78 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF78 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF78 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF78 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF80 "QOSBW_FIX_QOS_BANK1496,"
hexmask.quad.byte 0xF80 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF80 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF80 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF80 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF80 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF80 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF80 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF80 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF88 "QOSBW_FIX_QOS_BANK1497,"
hexmask.quad.byte 0xF88 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF88 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF88 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF88 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF88 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF88 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF88 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF88 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF90 "QOSBW_FIX_QOS_BANK1498,"
hexmask.quad.byte 0xF90 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF90 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF90 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF90 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF90 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF90 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF90 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF90 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xF98 "QOSBW_FIX_QOS_BANK1499,"
hexmask.quad.byte 0xF98 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xF98 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xF98 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xF98 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xF98 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xF98 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xF98 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF98 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFA0 "QOSBW_FIX_QOS_BANK1500,"
hexmask.quad.byte 0xFA0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFA0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFA0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFA0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFA0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFA0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFA0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFA0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFA8 "QOSBW_FIX_QOS_BANK1501,"
hexmask.quad.byte 0xFA8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFA8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFA8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFA8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFA8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFA8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFA8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFA8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFB0 "QOSBW_FIX_QOS_BANK1502,"
hexmask.quad.byte 0xFB0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFB0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFB0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFB0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFB0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFB0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFB0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFB0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFB8 "QOSBW_FIX_QOS_BANK1503,"
hexmask.quad.byte 0xFB8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFB8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFB8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFB8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFB8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFB8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFB8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFB8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFC0 "QOSBW_FIX_QOS_BANK1504,"
hexmask.quad.byte 0xFC0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFC0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFC0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFC0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFC0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFC0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFC0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFC0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFC8 "QOSBW_FIX_QOS_BANK1505,"
hexmask.quad.byte 0xFC8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFC8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFC8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFC8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFC8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFC8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFC8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFC8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFD0 "QOSBW_FIX_QOS_BANK1506,"
hexmask.quad.byte 0xFD0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFD0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFD0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFD0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFD0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFD0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFD0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFD0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFD8 "QOSBW_FIX_QOS_BANK1507,"
hexmask.quad.byte 0xFD8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFD8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFD8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFD8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFD8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFD8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFD8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFD8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFE0 "QOSBW_FIX_QOS_BANK1508,"
hexmask.quad.byte 0xFE0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFE0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFE0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFE0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFE0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFE0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFE0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFE0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFE8 "QOSBW_FIX_QOS_BANK1509,"
hexmask.quad.byte 0xFE8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFE8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFE8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFE8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFE8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFE8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFE8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFE8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFF0 "QOSBW_FIX_QOS_BANK1510,"
hexmask.quad.byte 0xFF0 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFF0 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFF0 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFF0 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFF0 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFF0 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFF0 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFF0 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
line.quad 0xFF8 "QOSBW_FIX_QOS_BANK1511,"
hexmask.quad.byte 0xFF8 57.--63. 1. "Reserved_57,Reserved"
newline
hexmask.quad.byte 0xFF8 53.--56. 1. "Reserved_53,Reserved"
newline
bitfld.quad 0xFF8 50.--52. "FIXQOS_BANK_n_5,FIXQOS_BANK[n]_5 Setting." "0,1,2,3,4,5,6,7"
newline
hexmask.quad.byte 0xFF8 42.--49. 1. "FIXQOS_BANK_n_4,FIXQOS_BANK[n]_4 Setting."
newline
hexmask.quad.word 0xFF8 32.--41. 1. "FIXQOS_BANK_n_3,FIXQOS_BANK[n]_3 Setting."
newline
hexmask.quad.byte 0xFF8 24.--31. 1. "FIXQOS_BANK_n_2,FIXQOS_BANK[n]_2 Setting."
newline
hexmask.quad.byte 0xFF8 16.--23. 1. "FIXQOS_BANK_n_1,FIXQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFF8 0.--15. 1. "FIXQOS_BANK_n_0,FIXQOS_BANK[n]_0 Setting."
group.quad 0x2000++0xFFF
line.quad 0x0 "QOSBW_BE_QOS_BANK00,"
hexmask.quad.byte 0x0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8 "QOSBW_BE_QOS_BANK01,"
hexmask.quad.byte 0x8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x10 "QOSBW_BE_QOS_BANK02,"
hexmask.quad.byte 0x10 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x10 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x10 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x10 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x10 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x10 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x10 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x10 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x10 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x18 "QOSBW_BE_QOS_BANK03,"
hexmask.quad.byte 0x18 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x18 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x18 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x18 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x18 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x18 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x18 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x18 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x18 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x20 "QOSBW_BE_QOS_BANK04,"
hexmask.quad.byte 0x20 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x20 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x20 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x20 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x20 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x20 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x20 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x20 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x20 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x28 "QOSBW_BE_QOS_BANK05,"
hexmask.quad.byte 0x28 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x28 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x28 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x28 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x28 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x28 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x28 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x28 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x28 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x30 "QOSBW_BE_QOS_BANK06,"
hexmask.quad.byte 0x30 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x30 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x30 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x30 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x30 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x30 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x30 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x30 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x30 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x38 "QOSBW_BE_QOS_BANK07,"
hexmask.quad.byte 0x38 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x38 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x38 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x38 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x38 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x38 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x38 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x38 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x38 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x40 "QOSBW_BE_QOS_BANK08,"
hexmask.quad.byte 0x40 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x40 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x40 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x40 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x40 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x40 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x40 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x40 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x40 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x48 "QOSBW_BE_QOS_BANK09,"
hexmask.quad.byte 0x48 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x48 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x48 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x48 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x48 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x48 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x48 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x48 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x48 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x50 "QOSBW_BE_QOS_BANK010,"
hexmask.quad.byte 0x50 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x50 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x50 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x50 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x50 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x50 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x50 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x50 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x50 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x58 "QOSBW_BE_QOS_BANK011,"
hexmask.quad.byte 0x58 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x58 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x58 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x58 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x58 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x58 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x58 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x58 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x58 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x60 "QOSBW_BE_QOS_BANK012,"
hexmask.quad.byte 0x60 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x60 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x60 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x60 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x60 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x60 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x60 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x60 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x60 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x68 "QOSBW_BE_QOS_BANK013,"
hexmask.quad.byte 0x68 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x68 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x68 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x68 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x68 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x68 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x68 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x68 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x68 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x70 "QOSBW_BE_QOS_BANK014,"
hexmask.quad.byte 0x70 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x70 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x70 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x70 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x70 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x70 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x70 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x70 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x70 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x78 "QOSBW_BE_QOS_BANK015,"
hexmask.quad.byte 0x78 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x78 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x78 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x78 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x78 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x78 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x78 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x78 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x78 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x80 "QOSBW_BE_QOS_BANK016,"
hexmask.quad.byte 0x80 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x80 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x80 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x80 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x80 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x80 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x80 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x80 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x80 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x88 "QOSBW_BE_QOS_BANK017,"
hexmask.quad.byte 0x88 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x88 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x88 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x88 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x88 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x88 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x88 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x88 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x88 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x90 "QOSBW_BE_QOS_BANK018,"
hexmask.quad.byte 0x90 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x90 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x90 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x90 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x90 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x90 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x90 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x90 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x90 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x98 "QOSBW_BE_QOS_BANK019,"
hexmask.quad.byte 0x98 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x98 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x98 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x98 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x98 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x98 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x98 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x98 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x98 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA0 "QOSBW_BE_QOS_BANK020,"
hexmask.quad.byte 0xA0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA8 "QOSBW_BE_QOS_BANK021,"
hexmask.quad.byte 0xA8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB0 "QOSBW_BE_QOS_BANK022,"
hexmask.quad.byte 0xB0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB8 "QOSBW_BE_QOS_BANK023,"
hexmask.quad.byte 0xB8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC0 "QOSBW_BE_QOS_BANK024,"
hexmask.quad.byte 0xC0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC8 "QOSBW_BE_QOS_BANK025,"
hexmask.quad.byte 0xC8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD0 "QOSBW_BE_QOS_BANK026,"
hexmask.quad.byte 0xD0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD8 "QOSBW_BE_QOS_BANK027,"
hexmask.quad.byte 0xD8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE0 "QOSBW_BE_QOS_BANK028,"
hexmask.quad.byte 0xE0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE8 "QOSBW_BE_QOS_BANK029,"
hexmask.quad.byte 0xE8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF0 "QOSBW_BE_QOS_BANK030,"
hexmask.quad.byte 0xF0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF8 "QOSBW_BE_QOS_BANK031,"
hexmask.quad.byte 0xF8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x100 "QOSBW_BE_QOS_BANK032,"
hexmask.quad.byte 0x100 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x100 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x100 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x100 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x100 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x100 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x100 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x100 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x100 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x108 "QOSBW_BE_QOS_BANK033,"
hexmask.quad.byte 0x108 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x108 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x108 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x108 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x108 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x108 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x108 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x108 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x108 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x110 "QOSBW_BE_QOS_BANK034,"
hexmask.quad.byte 0x110 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x110 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x110 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x110 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x110 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x110 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x110 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x110 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x110 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x118 "QOSBW_BE_QOS_BANK035,"
hexmask.quad.byte 0x118 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x118 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x118 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x118 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x118 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x118 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x118 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x118 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x118 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x120 "QOSBW_BE_QOS_BANK036,"
hexmask.quad.byte 0x120 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x120 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x120 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x120 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x120 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x120 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x120 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x120 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x120 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x128 "QOSBW_BE_QOS_BANK037,"
hexmask.quad.byte 0x128 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x128 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x128 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x128 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x128 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x128 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x128 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x128 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x128 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x130 "QOSBW_BE_QOS_BANK038,"
hexmask.quad.byte 0x130 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x130 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x130 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x130 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x130 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x130 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x130 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x130 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x130 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x138 "QOSBW_BE_QOS_BANK039,"
hexmask.quad.byte 0x138 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x138 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x138 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x138 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x138 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x138 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x138 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x138 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x138 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x140 "QOSBW_BE_QOS_BANK040,"
hexmask.quad.byte 0x140 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x140 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x140 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x140 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x140 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x140 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x140 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x140 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x140 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x148 "QOSBW_BE_QOS_BANK041,"
hexmask.quad.byte 0x148 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x148 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x148 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x148 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x148 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x148 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x148 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x148 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x148 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x150 "QOSBW_BE_QOS_BANK042,"
hexmask.quad.byte 0x150 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x150 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x150 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x150 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x150 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x150 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x150 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x150 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x150 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x158 "QOSBW_BE_QOS_BANK043,"
hexmask.quad.byte 0x158 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x158 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x158 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x158 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x158 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x158 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x158 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x158 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x158 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x160 "QOSBW_BE_QOS_BANK044,"
hexmask.quad.byte 0x160 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x160 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x160 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x160 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x160 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x160 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x160 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x160 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x160 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x168 "QOSBW_BE_QOS_BANK045,"
hexmask.quad.byte 0x168 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x168 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x168 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x168 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x168 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x168 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x168 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x168 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x168 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x170 "QOSBW_BE_QOS_BANK046,"
hexmask.quad.byte 0x170 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x170 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x170 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x170 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x170 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x170 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x170 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x170 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x170 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x178 "QOSBW_BE_QOS_BANK047,"
hexmask.quad.byte 0x178 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x178 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x178 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x178 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x178 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x178 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x178 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x178 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x178 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x180 "QOSBW_BE_QOS_BANK048,"
hexmask.quad.byte 0x180 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x180 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x180 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x180 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x180 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x180 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x180 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x180 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x180 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x188 "QOSBW_BE_QOS_BANK049,"
hexmask.quad.byte 0x188 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x188 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x188 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x188 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x188 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x188 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x188 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x188 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x188 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x190 "QOSBW_BE_QOS_BANK050,"
hexmask.quad.byte 0x190 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x190 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x190 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x190 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x190 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x190 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x190 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x190 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x190 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x198 "QOSBW_BE_QOS_BANK051,"
hexmask.quad.byte 0x198 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x198 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x198 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x198 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x198 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x198 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x198 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x198 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x198 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1A0 "QOSBW_BE_QOS_BANK052,"
hexmask.quad.byte 0x1A0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1A0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1A0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1A0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1A0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1A0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1A0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1A0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1A0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1A8 "QOSBW_BE_QOS_BANK053,"
hexmask.quad.byte 0x1A8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1A8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1A8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1A8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1A8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1A8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1A8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1A8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1A8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1B0 "QOSBW_BE_QOS_BANK054,"
hexmask.quad.byte 0x1B0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1B0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1B0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1B0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1B0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1B0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1B0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1B0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1B0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1B8 "QOSBW_BE_QOS_BANK055,"
hexmask.quad.byte 0x1B8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1B8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1B8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1B8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1B8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1B8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1B8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1B8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1B8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1C0 "QOSBW_BE_QOS_BANK056,"
hexmask.quad.byte 0x1C0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1C0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1C0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1C0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1C0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1C0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1C0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1C0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1C0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1C8 "QOSBW_BE_QOS_BANK057,"
hexmask.quad.byte 0x1C8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1C8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1C8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1C8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1C8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1C8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1C8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1C8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1C8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1D0 "QOSBW_BE_QOS_BANK058,"
hexmask.quad.byte 0x1D0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1D0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1D0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1D0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1D0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1D0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1D0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1D0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1D0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1D8 "QOSBW_BE_QOS_BANK059,"
hexmask.quad.byte 0x1D8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1D8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1D8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1D8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1D8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1D8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1D8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1D8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1D8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1E0 "QOSBW_BE_QOS_BANK060,"
hexmask.quad.byte 0x1E0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1E0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1E0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1E0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1E0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1E0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1E0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1E0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1E0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1E8 "QOSBW_BE_QOS_BANK061,"
hexmask.quad.byte 0x1E8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1E8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1E8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1E8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1E8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1E8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1E8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1E8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1E8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1F0 "QOSBW_BE_QOS_BANK062,"
hexmask.quad.byte 0x1F0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1F0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1F0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1F0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1F0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1F0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1F0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1F0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1F0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1F8 "QOSBW_BE_QOS_BANK063,"
hexmask.quad.byte 0x1F8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1F8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1F8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1F8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1F8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1F8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1F8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1F8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1F8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x200 "QOSBW_BE_QOS_BANK064,"
hexmask.quad.byte 0x200 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x200 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x200 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x200 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x200 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x200 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x200 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x200 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x200 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x208 "QOSBW_BE_QOS_BANK065,"
hexmask.quad.byte 0x208 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x208 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x208 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x208 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x208 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x208 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x208 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x208 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x208 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x210 "QOSBW_BE_QOS_BANK066,"
hexmask.quad.byte 0x210 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x210 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x210 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x210 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x210 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x210 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x210 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x210 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x210 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x218 "QOSBW_BE_QOS_BANK067,"
hexmask.quad.byte 0x218 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x218 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x218 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x218 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x218 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x218 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x218 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x218 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x218 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x220 "QOSBW_BE_QOS_BANK068,"
hexmask.quad.byte 0x220 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x220 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x220 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x220 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x220 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x220 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x220 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x220 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x220 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x228 "QOSBW_BE_QOS_BANK069,"
hexmask.quad.byte 0x228 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x228 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x228 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x228 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x228 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x228 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x228 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x228 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x228 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x230 "QOSBW_BE_QOS_BANK070,"
hexmask.quad.byte 0x230 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x230 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x230 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x230 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x230 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x230 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x230 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x230 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x230 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x238 "QOSBW_BE_QOS_BANK071,"
hexmask.quad.byte 0x238 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x238 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x238 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x238 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x238 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x238 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x238 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x238 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x238 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x240 "QOSBW_BE_QOS_BANK072,"
hexmask.quad.byte 0x240 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x240 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x240 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x240 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x240 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x240 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x240 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x240 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x240 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x248 "QOSBW_BE_QOS_BANK073,"
hexmask.quad.byte 0x248 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x248 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x248 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x248 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x248 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x248 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x248 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x248 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x248 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x250 "QOSBW_BE_QOS_BANK074,"
hexmask.quad.byte 0x250 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x250 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x250 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x250 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x250 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x250 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x250 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x250 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x250 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x258 "QOSBW_BE_QOS_BANK075,"
hexmask.quad.byte 0x258 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x258 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x258 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x258 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x258 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x258 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x258 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x258 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x258 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x260 "QOSBW_BE_QOS_BANK076,"
hexmask.quad.byte 0x260 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x260 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x260 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x260 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x260 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x260 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x260 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x260 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x260 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x268 "QOSBW_BE_QOS_BANK077,"
hexmask.quad.byte 0x268 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x268 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x268 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x268 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x268 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x268 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x268 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x268 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x268 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x270 "QOSBW_BE_QOS_BANK078,"
hexmask.quad.byte 0x270 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x270 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x270 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x270 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x270 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x270 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x270 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x270 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x270 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x278 "QOSBW_BE_QOS_BANK079,"
hexmask.quad.byte 0x278 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x278 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x278 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x278 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x278 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x278 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x278 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x278 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x278 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x280 "QOSBW_BE_QOS_BANK080,"
hexmask.quad.byte 0x280 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x280 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x280 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x280 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x280 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x280 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x280 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x280 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x280 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x288 "QOSBW_BE_QOS_BANK081,"
hexmask.quad.byte 0x288 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x288 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x288 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x288 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x288 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x288 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x288 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x288 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x288 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x290 "QOSBW_BE_QOS_BANK082,"
hexmask.quad.byte 0x290 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x290 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x290 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x290 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x290 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x290 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x290 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x290 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x290 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x298 "QOSBW_BE_QOS_BANK083,"
hexmask.quad.byte 0x298 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x298 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x298 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x298 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x298 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x298 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x298 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x298 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x298 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2A0 "QOSBW_BE_QOS_BANK084,"
hexmask.quad.byte 0x2A0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2A0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2A0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2A0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2A0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2A0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2A0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2A0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2A0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2A8 "QOSBW_BE_QOS_BANK085,"
hexmask.quad.byte 0x2A8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2A8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2A8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2A8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2A8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2A8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2A8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2A8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2A8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2B0 "QOSBW_BE_QOS_BANK086,"
hexmask.quad.byte 0x2B0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2B0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2B0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2B0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2B0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2B0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2B0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2B0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2B0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2B8 "QOSBW_BE_QOS_BANK087,"
hexmask.quad.byte 0x2B8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2B8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2B8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2B8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2B8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2B8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2B8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2B8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2B8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2C0 "QOSBW_BE_QOS_BANK088,"
hexmask.quad.byte 0x2C0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2C0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2C0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2C0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2C0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2C0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2C0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2C0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2C0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2C8 "QOSBW_BE_QOS_BANK089,"
hexmask.quad.byte 0x2C8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2C8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2C8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2C8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2C8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2C8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2C8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2C8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2C8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2D0 "QOSBW_BE_QOS_BANK090,"
hexmask.quad.byte 0x2D0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2D0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2D0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2D0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2D0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2D0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2D0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2D0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2D0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2D8 "QOSBW_BE_QOS_BANK091,"
hexmask.quad.byte 0x2D8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2D8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2D8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2D8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2D8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2D8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2D8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2D8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2D8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2E0 "QOSBW_BE_QOS_BANK092,"
hexmask.quad.byte 0x2E0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2E0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2E0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2E0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2E0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2E0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2E0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2E0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2E0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2E8 "QOSBW_BE_QOS_BANK093,"
hexmask.quad.byte 0x2E8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2E8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2E8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2E8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2E8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2E8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2E8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2E8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2E8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2F0 "QOSBW_BE_QOS_BANK094,"
hexmask.quad.byte 0x2F0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2F0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2F0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2F0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2F0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2F0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2F0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2F0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2F0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2F8 "QOSBW_BE_QOS_BANK095,"
hexmask.quad.byte 0x2F8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2F8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2F8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2F8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2F8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2F8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2F8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2F8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2F8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x300 "QOSBW_BE_QOS_BANK096,"
hexmask.quad.byte 0x300 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x300 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x300 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x300 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x300 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x300 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x300 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x300 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x300 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x308 "QOSBW_BE_QOS_BANK097,"
hexmask.quad.byte 0x308 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x308 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x308 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x308 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x308 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x308 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x308 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x308 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x308 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x310 "QOSBW_BE_QOS_BANK098,"
hexmask.quad.byte 0x310 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x310 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x310 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x310 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x310 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x310 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x310 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x310 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x310 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x318 "QOSBW_BE_QOS_BANK099,"
hexmask.quad.byte 0x318 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x318 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x318 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x318 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x318 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x318 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x318 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x318 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x318 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x320 "QOSBW_BE_QOS_BANK0100,"
hexmask.quad.byte 0x320 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x320 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x320 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x320 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x320 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x320 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x320 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x320 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x320 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x328 "QOSBW_BE_QOS_BANK0101,"
hexmask.quad.byte 0x328 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x328 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x328 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x328 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x328 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x328 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x328 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x328 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x328 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x330 "QOSBW_BE_QOS_BANK0102,"
hexmask.quad.byte 0x330 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x330 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x330 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x330 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x330 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x330 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x330 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x330 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x330 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x338 "QOSBW_BE_QOS_BANK0103,"
hexmask.quad.byte 0x338 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x338 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x338 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x338 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x338 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x338 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x338 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x338 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x338 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x340 "QOSBW_BE_QOS_BANK0104,"
hexmask.quad.byte 0x340 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x340 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x340 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x340 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x340 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x340 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x340 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x340 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x340 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x348 "QOSBW_BE_QOS_BANK0105,"
hexmask.quad.byte 0x348 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x348 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x348 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x348 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x348 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x348 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x348 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x348 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x348 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x350 "QOSBW_BE_QOS_BANK0106,"
hexmask.quad.byte 0x350 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x350 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x350 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x350 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x350 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x350 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x350 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x350 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x350 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x358 "QOSBW_BE_QOS_BANK0107,"
hexmask.quad.byte 0x358 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x358 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x358 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x358 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x358 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x358 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x358 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x358 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x358 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x360 "QOSBW_BE_QOS_BANK0108,"
hexmask.quad.byte 0x360 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x360 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x360 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x360 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x360 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x360 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x360 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x360 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x360 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x368 "QOSBW_BE_QOS_BANK0109,"
hexmask.quad.byte 0x368 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x368 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x368 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x368 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x368 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x368 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x368 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x368 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x368 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x370 "QOSBW_BE_QOS_BANK0110,"
hexmask.quad.byte 0x370 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x370 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x370 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x370 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x370 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x370 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x370 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x370 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x370 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x378 "QOSBW_BE_QOS_BANK0111,"
hexmask.quad.byte 0x378 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x378 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x378 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x378 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x378 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x378 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x378 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x378 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x378 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x380 "QOSBW_BE_QOS_BANK0112,"
hexmask.quad.byte 0x380 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x380 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x380 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x380 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x380 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x380 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x380 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x380 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x380 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x388 "QOSBW_BE_QOS_BANK0113,"
hexmask.quad.byte 0x388 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x388 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x388 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x388 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x388 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x388 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x388 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x388 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x388 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x390 "QOSBW_BE_QOS_BANK0114,"
hexmask.quad.byte 0x390 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x390 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x390 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x390 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x390 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x390 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x390 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x390 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x390 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x398 "QOSBW_BE_QOS_BANK0115,"
hexmask.quad.byte 0x398 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x398 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x398 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x398 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x398 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x398 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x398 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x398 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x398 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3A0 "QOSBW_BE_QOS_BANK0116,"
hexmask.quad.byte 0x3A0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3A0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3A0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3A0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3A0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3A0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3A0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3A0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3A0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3A8 "QOSBW_BE_QOS_BANK0117,"
hexmask.quad.byte 0x3A8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3A8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3A8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3A8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3A8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3A8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3A8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3A8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3A8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3B0 "QOSBW_BE_QOS_BANK0118,"
hexmask.quad.byte 0x3B0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3B0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3B0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3B0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3B0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3B0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3B0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3B0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3B0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3B8 "QOSBW_BE_QOS_BANK0119,"
hexmask.quad.byte 0x3B8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3B8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3B8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3B8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3B8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3B8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3B8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3B8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3B8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3C0 "QOSBW_BE_QOS_BANK0120,"
hexmask.quad.byte 0x3C0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3C0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3C0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3C0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3C0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3C0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3C0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3C0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3C0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3C8 "QOSBW_BE_QOS_BANK0121,"
hexmask.quad.byte 0x3C8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3C8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3C8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3C8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3C8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3C8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3C8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3C8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3C8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3D0 "QOSBW_BE_QOS_BANK0122,"
hexmask.quad.byte 0x3D0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3D0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3D0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3D0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3D0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3D0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3D0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3D0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3D0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3D8 "QOSBW_BE_QOS_BANK0123,"
hexmask.quad.byte 0x3D8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3D8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3D8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3D8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3D8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3D8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3D8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3D8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3D8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3E0 "QOSBW_BE_QOS_BANK0124,"
hexmask.quad.byte 0x3E0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3E0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3E0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3E0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3E0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3E0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3E0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3E0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3E0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3E8 "QOSBW_BE_QOS_BANK0125,"
hexmask.quad.byte 0x3E8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3E8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3E8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3E8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3E8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3E8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3E8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3E8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3E8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3F0 "QOSBW_BE_QOS_BANK0126,"
hexmask.quad.byte 0x3F0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3F0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3F0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3F0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3F0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3F0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3F0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3F0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3F0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3F8 "QOSBW_BE_QOS_BANK0127,"
hexmask.quad.byte 0x3F8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3F8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3F8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3F8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3F8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3F8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3F8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3F8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3F8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x400 "QOSBW_BE_QOS_BANK0128,"
hexmask.quad.byte 0x400 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x400 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x400 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x400 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x400 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x400 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x400 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x400 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x400 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x408 "QOSBW_BE_QOS_BANK0129,"
hexmask.quad.byte 0x408 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x408 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x408 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x408 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x408 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x408 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x408 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x408 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x408 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x410 "QOSBW_BE_QOS_BANK0130,"
hexmask.quad.byte 0x410 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x410 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x410 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x410 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x410 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x410 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x410 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x410 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x410 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x418 "QOSBW_BE_QOS_BANK0131,"
hexmask.quad.byte 0x418 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x418 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x418 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x418 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x418 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x418 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x418 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x418 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x418 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x420 "QOSBW_BE_QOS_BANK0132,"
hexmask.quad.byte 0x420 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x420 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x420 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x420 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x420 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x420 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x420 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x420 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x420 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x428 "QOSBW_BE_QOS_BANK0133,"
hexmask.quad.byte 0x428 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x428 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x428 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x428 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x428 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x428 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x428 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x428 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x428 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x430 "QOSBW_BE_QOS_BANK0134,"
hexmask.quad.byte 0x430 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x430 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x430 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x430 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x430 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x430 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x430 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x430 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x430 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x438 "QOSBW_BE_QOS_BANK0135,"
hexmask.quad.byte 0x438 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x438 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x438 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x438 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x438 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x438 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x438 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x438 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x438 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x440 "QOSBW_BE_QOS_BANK0136,"
hexmask.quad.byte 0x440 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x440 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x440 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x440 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x440 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x440 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x440 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x440 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x440 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x448 "QOSBW_BE_QOS_BANK0137,"
hexmask.quad.byte 0x448 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x448 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x448 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x448 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x448 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x448 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x448 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x448 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x448 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x450 "QOSBW_BE_QOS_BANK0138,"
hexmask.quad.byte 0x450 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x450 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x450 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x450 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x450 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x450 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x450 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x450 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x450 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x458 "QOSBW_BE_QOS_BANK0139,"
hexmask.quad.byte 0x458 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x458 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x458 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x458 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x458 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x458 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x458 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x458 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x458 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x460 "QOSBW_BE_QOS_BANK0140,"
hexmask.quad.byte 0x460 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x460 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x460 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x460 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x460 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x460 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x460 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x460 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x460 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x468 "QOSBW_BE_QOS_BANK0141,"
hexmask.quad.byte 0x468 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x468 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x468 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x468 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x468 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x468 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x468 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x468 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x468 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x470 "QOSBW_BE_QOS_BANK0142,"
hexmask.quad.byte 0x470 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x470 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x470 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x470 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x470 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x470 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x470 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x470 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x470 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x478 "QOSBW_BE_QOS_BANK0143,"
hexmask.quad.byte 0x478 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x478 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x478 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x478 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x478 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x478 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x478 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x478 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x478 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x480 "QOSBW_BE_QOS_BANK0144,"
hexmask.quad.byte 0x480 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x480 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x480 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x480 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x480 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x480 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x480 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x480 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x480 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x488 "QOSBW_BE_QOS_BANK0145,"
hexmask.quad.byte 0x488 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x488 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x488 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x488 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x488 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x488 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x488 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x488 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x488 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x490 "QOSBW_BE_QOS_BANK0146,"
hexmask.quad.byte 0x490 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x490 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x490 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x490 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x490 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x490 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x490 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x490 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x490 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x498 "QOSBW_BE_QOS_BANK0147,"
hexmask.quad.byte 0x498 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x498 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x498 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x498 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x498 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x498 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x498 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x498 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x498 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4A0 "QOSBW_BE_QOS_BANK0148,"
hexmask.quad.byte 0x4A0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4A0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4A0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4A0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4A0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4A0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4A0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4A0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4A0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4A8 "QOSBW_BE_QOS_BANK0149,"
hexmask.quad.byte 0x4A8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4A8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4A8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4A8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4A8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4A8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4A8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4A8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4A8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4B0 "QOSBW_BE_QOS_BANK0150,"
hexmask.quad.byte 0x4B0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4B0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4B0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4B0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4B0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4B0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4B0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4B0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4B0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4B8 "QOSBW_BE_QOS_BANK0151,"
hexmask.quad.byte 0x4B8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4B8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4B8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4B8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4B8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4B8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4B8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4B8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4B8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4C0 "QOSBW_BE_QOS_BANK0152,"
hexmask.quad.byte 0x4C0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4C0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4C0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4C0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4C0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4C0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4C0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4C0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4C0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4C8 "QOSBW_BE_QOS_BANK0153,"
hexmask.quad.byte 0x4C8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4C8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4C8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4C8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4C8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4C8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4C8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4C8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4C8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4D0 "QOSBW_BE_QOS_BANK0154,"
hexmask.quad.byte 0x4D0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4D0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4D0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4D0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4D0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4D0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4D0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4D0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4D0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4D8 "QOSBW_BE_QOS_BANK0155,"
hexmask.quad.byte 0x4D8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4D8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4D8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4D8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4D8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4D8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4D8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4D8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4D8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4E0 "QOSBW_BE_QOS_BANK0156,"
hexmask.quad.byte 0x4E0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4E0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4E0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4E0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4E0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4E0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4E0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4E0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4E0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4E8 "QOSBW_BE_QOS_BANK0157,"
hexmask.quad.byte 0x4E8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4E8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4E8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4E8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4E8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4E8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4E8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4E8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4E8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4F0 "QOSBW_BE_QOS_BANK0158,"
hexmask.quad.byte 0x4F0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4F0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4F0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4F0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4F0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4F0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4F0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4F0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4F0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4F8 "QOSBW_BE_QOS_BANK0159,"
hexmask.quad.byte 0x4F8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4F8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4F8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4F8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4F8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4F8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4F8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4F8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4F8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x500 "QOSBW_BE_QOS_BANK0160,"
hexmask.quad.byte 0x500 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x500 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x500 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x500 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x500 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x500 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x500 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x500 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x500 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x508 "QOSBW_BE_QOS_BANK0161,"
hexmask.quad.byte 0x508 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x508 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x508 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x508 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x508 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x508 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x508 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x508 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x508 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x510 "QOSBW_BE_QOS_BANK0162,"
hexmask.quad.byte 0x510 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x510 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x510 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x510 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x510 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x510 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x510 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x510 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x510 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x518 "QOSBW_BE_QOS_BANK0163,"
hexmask.quad.byte 0x518 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x518 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x518 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x518 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x518 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x518 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x518 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x518 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x518 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x520 "QOSBW_BE_QOS_BANK0164,"
hexmask.quad.byte 0x520 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x520 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x520 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x520 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x520 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x520 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x520 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x520 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x520 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x528 "QOSBW_BE_QOS_BANK0165,"
hexmask.quad.byte 0x528 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x528 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x528 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x528 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x528 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x528 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x528 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x528 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x528 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x530 "QOSBW_BE_QOS_BANK0166,"
hexmask.quad.byte 0x530 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x530 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x530 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x530 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x530 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x530 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x530 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x530 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x530 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x538 "QOSBW_BE_QOS_BANK0167,"
hexmask.quad.byte 0x538 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x538 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x538 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x538 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x538 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x538 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x538 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x538 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x538 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x540 "QOSBW_BE_QOS_BANK0168,"
hexmask.quad.byte 0x540 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x540 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x540 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x540 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x540 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x540 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x540 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x540 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x540 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x548 "QOSBW_BE_QOS_BANK0169,"
hexmask.quad.byte 0x548 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x548 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x548 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x548 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x548 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x548 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x548 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x548 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x548 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x550 "QOSBW_BE_QOS_BANK0170,"
hexmask.quad.byte 0x550 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x550 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x550 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x550 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x550 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x550 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x550 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x550 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x550 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x558 "QOSBW_BE_QOS_BANK0171,"
hexmask.quad.byte 0x558 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x558 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x558 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x558 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x558 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x558 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x558 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x558 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x558 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x560 "QOSBW_BE_QOS_BANK0172,"
hexmask.quad.byte 0x560 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x560 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x560 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x560 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x560 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x560 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x560 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x560 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x560 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x568 "QOSBW_BE_QOS_BANK0173,"
hexmask.quad.byte 0x568 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x568 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x568 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x568 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x568 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x568 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x568 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x568 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x568 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x570 "QOSBW_BE_QOS_BANK0174,"
hexmask.quad.byte 0x570 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x570 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x570 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x570 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x570 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x570 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x570 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x570 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x570 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x578 "QOSBW_BE_QOS_BANK0175,"
hexmask.quad.byte 0x578 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x578 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x578 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x578 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x578 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x578 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x578 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x578 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x578 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x580 "QOSBW_BE_QOS_BANK0176,"
hexmask.quad.byte 0x580 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x580 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x580 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x580 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x580 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x580 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x580 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x580 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x580 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x588 "QOSBW_BE_QOS_BANK0177,"
hexmask.quad.byte 0x588 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x588 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x588 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x588 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x588 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x588 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x588 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x588 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x588 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x590 "QOSBW_BE_QOS_BANK0178,"
hexmask.quad.byte 0x590 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x590 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x590 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x590 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x590 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x590 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x590 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x590 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x590 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x598 "QOSBW_BE_QOS_BANK0179,"
hexmask.quad.byte 0x598 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x598 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x598 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x598 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x598 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x598 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x598 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x598 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x598 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5A0 "QOSBW_BE_QOS_BANK0180,"
hexmask.quad.byte 0x5A0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5A0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5A0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5A0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5A0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5A0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5A0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5A0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5A0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5A8 "QOSBW_BE_QOS_BANK0181,"
hexmask.quad.byte 0x5A8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5A8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5A8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5A8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5A8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5A8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5A8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5A8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5A8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5B0 "QOSBW_BE_QOS_BANK0182,"
hexmask.quad.byte 0x5B0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5B0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5B0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5B0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5B0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5B0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5B0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5B0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5B0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5B8 "QOSBW_BE_QOS_BANK0183,"
hexmask.quad.byte 0x5B8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5B8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5B8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5B8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5B8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5B8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5B8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5B8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5B8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5C0 "QOSBW_BE_QOS_BANK0184,"
hexmask.quad.byte 0x5C0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5C0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5C0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5C0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5C0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5C0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5C0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5C0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5C0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5C8 "QOSBW_BE_QOS_BANK0185,"
hexmask.quad.byte 0x5C8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5C8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5C8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5C8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5C8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5C8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5C8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5C8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5C8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5D0 "QOSBW_BE_QOS_BANK0186,"
hexmask.quad.byte 0x5D0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5D0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5D0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5D0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5D0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5D0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5D0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5D0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5D0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5D8 "QOSBW_BE_QOS_BANK0187,"
hexmask.quad.byte 0x5D8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5D8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5D8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5D8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5D8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5D8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5D8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5D8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5D8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5E0 "QOSBW_BE_QOS_BANK0188,"
hexmask.quad.byte 0x5E0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5E0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5E0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5E0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5E0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5E0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5E0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5E0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5E0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5E8 "QOSBW_BE_QOS_BANK0189,"
hexmask.quad.byte 0x5E8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5E8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5E8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5E8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5E8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5E8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5E8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5E8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5E8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5F0 "QOSBW_BE_QOS_BANK0190,"
hexmask.quad.byte 0x5F0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5F0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5F0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5F0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5F0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5F0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5F0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5F0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5F0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5F8 "QOSBW_BE_QOS_BANK0191,"
hexmask.quad.byte 0x5F8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5F8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5F8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5F8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5F8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5F8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5F8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5F8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5F8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x600 "QOSBW_BE_QOS_BANK0192,"
hexmask.quad.byte 0x600 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x600 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x600 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x600 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x600 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x600 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x600 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x600 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x600 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x608 "QOSBW_BE_QOS_BANK0193,"
hexmask.quad.byte 0x608 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x608 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x608 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x608 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x608 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x608 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x608 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x608 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x608 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x610 "QOSBW_BE_QOS_BANK0194,"
hexmask.quad.byte 0x610 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x610 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x610 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x610 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x610 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x610 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x610 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x610 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x610 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x618 "QOSBW_BE_QOS_BANK0195,"
hexmask.quad.byte 0x618 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x618 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x618 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x618 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x618 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x618 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x618 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x618 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x618 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x620 "QOSBW_BE_QOS_BANK0196,"
hexmask.quad.byte 0x620 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x620 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x620 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x620 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x620 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x620 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x620 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x620 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x620 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x628 "QOSBW_BE_QOS_BANK0197,"
hexmask.quad.byte 0x628 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x628 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x628 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x628 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x628 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x628 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x628 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x628 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x628 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x630 "QOSBW_BE_QOS_BANK0198,"
hexmask.quad.byte 0x630 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x630 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x630 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x630 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x630 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x630 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x630 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x630 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x630 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x638 "QOSBW_BE_QOS_BANK0199,"
hexmask.quad.byte 0x638 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x638 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x638 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x638 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x638 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x638 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x638 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x638 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x638 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x640 "QOSBW_BE_QOS_BANK0200,"
hexmask.quad.byte 0x640 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x640 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x640 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x640 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x640 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x640 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x640 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x640 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x640 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x648 "QOSBW_BE_QOS_BANK0201,"
hexmask.quad.byte 0x648 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x648 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x648 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x648 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x648 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x648 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x648 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x648 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x648 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x650 "QOSBW_BE_QOS_BANK0202,"
hexmask.quad.byte 0x650 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x650 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x650 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x650 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x650 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x650 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x650 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x650 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x650 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x658 "QOSBW_BE_QOS_BANK0203,"
hexmask.quad.byte 0x658 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x658 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x658 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x658 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x658 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x658 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x658 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x658 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x658 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x660 "QOSBW_BE_QOS_BANK0204,"
hexmask.quad.byte 0x660 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x660 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x660 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x660 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x660 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x660 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x660 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x660 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x660 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x668 "QOSBW_BE_QOS_BANK0205,"
hexmask.quad.byte 0x668 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x668 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x668 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x668 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x668 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x668 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x668 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x668 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x668 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x670 "QOSBW_BE_QOS_BANK0206,"
hexmask.quad.byte 0x670 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x670 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x670 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x670 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x670 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x670 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x670 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x670 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x670 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x678 "QOSBW_BE_QOS_BANK0207,"
hexmask.quad.byte 0x678 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x678 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x678 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x678 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x678 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x678 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x678 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x678 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x678 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x680 "QOSBW_BE_QOS_BANK0208,"
hexmask.quad.byte 0x680 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x680 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x680 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x680 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x680 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x680 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x680 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x680 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x680 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x688 "QOSBW_BE_QOS_BANK0209,"
hexmask.quad.byte 0x688 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x688 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x688 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x688 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x688 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x688 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x688 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x688 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x688 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x690 "QOSBW_BE_QOS_BANK0210,"
hexmask.quad.byte 0x690 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x690 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x690 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x690 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x690 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x690 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x690 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x690 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x690 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x698 "QOSBW_BE_QOS_BANK0211,"
hexmask.quad.byte 0x698 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x698 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x698 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x698 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x698 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x698 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x698 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x698 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x698 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6A0 "QOSBW_BE_QOS_BANK0212,"
hexmask.quad.byte 0x6A0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6A0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6A0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6A0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6A0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6A0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6A0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6A0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6A0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6A8 "QOSBW_BE_QOS_BANK0213,"
hexmask.quad.byte 0x6A8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6A8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6A8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6A8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6A8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6A8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6A8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6A8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6A8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6B0 "QOSBW_BE_QOS_BANK0214,"
hexmask.quad.byte 0x6B0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6B0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6B0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6B0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6B0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6B0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6B0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6B0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6B0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6B8 "QOSBW_BE_QOS_BANK0215,"
hexmask.quad.byte 0x6B8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6B8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6B8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6B8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6B8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6B8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6B8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6B8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6B8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6C0 "QOSBW_BE_QOS_BANK0216,"
hexmask.quad.byte 0x6C0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6C0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6C0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6C0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6C0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6C0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6C0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6C0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6C0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6C8 "QOSBW_BE_QOS_BANK0217,"
hexmask.quad.byte 0x6C8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6C8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6C8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6C8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6C8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6C8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6C8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6C8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6C8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6D0 "QOSBW_BE_QOS_BANK0218,"
hexmask.quad.byte 0x6D0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6D0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6D0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6D0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6D0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6D0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6D0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6D0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6D0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6D8 "QOSBW_BE_QOS_BANK0219,"
hexmask.quad.byte 0x6D8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6D8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6D8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6D8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6D8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6D8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6D8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6D8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6D8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6E0 "QOSBW_BE_QOS_BANK0220,"
hexmask.quad.byte 0x6E0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6E0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6E0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6E0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6E0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6E0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6E0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6E0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6E0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6E8 "QOSBW_BE_QOS_BANK0221,"
hexmask.quad.byte 0x6E8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6E8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6E8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6E8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6E8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6E8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6E8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6E8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6E8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6F0 "QOSBW_BE_QOS_BANK0222,"
hexmask.quad.byte 0x6F0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6F0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6F0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6F0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6F0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6F0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6F0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6F0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6F0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6F8 "QOSBW_BE_QOS_BANK0223,"
hexmask.quad.byte 0x6F8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6F8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6F8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6F8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6F8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6F8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6F8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6F8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6F8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x700 "QOSBW_BE_QOS_BANK0224,"
hexmask.quad.byte 0x700 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x700 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x700 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x700 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x700 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x700 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x700 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x700 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x700 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x708 "QOSBW_BE_QOS_BANK0225,"
hexmask.quad.byte 0x708 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x708 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x708 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x708 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x708 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x708 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x708 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x708 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x708 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x710 "QOSBW_BE_QOS_BANK0226,"
hexmask.quad.byte 0x710 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x710 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x710 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x710 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x710 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x710 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x710 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x710 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x710 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x718 "QOSBW_BE_QOS_BANK0227,"
hexmask.quad.byte 0x718 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x718 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x718 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x718 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x718 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x718 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x718 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x718 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x718 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x720 "QOSBW_BE_QOS_BANK0228,"
hexmask.quad.byte 0x720 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x720 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x720 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x720 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x720 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x720 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x720 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x720 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x720 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x728 "QOSBW_BE_QOS_BANK0229,"
hexmask.quad.byte 0x728 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x728 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x728 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x728 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x728 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x728 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x728 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x728 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x728 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x730 "QOSBW_BE_QOS_BANK0230,"
hexmask.quad.byte 0x730 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x730 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x730 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x730 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x730 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x730 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x730 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x730 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x730 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x738 "QOSBW_BE_QOS_BANK0231,"
hexmask.quad.byte 0x738 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x738 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x738 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x738 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x738 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x738 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x738 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x738 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x738 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x740 "QOSBW_BE_QOS_BANK0232,"
hexmask.quad.byte 0x740 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x740 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x740 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x740 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x740 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x740 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x740 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x740 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x740 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x748 "QOSBW_BE_QOS_BANK0233,"
hexmask.quad.byte 0x748 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x748 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x748 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x748 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x748 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x748 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x748 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x748 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x748 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x750 "QOSBW_BE_QOS_BANK0234,"
hexmask.quad.byte 0x750 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x750 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x750 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x750 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x750 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x750 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x750 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x750 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x750 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x758 "QOSBW_BE_QOS_BANK0235,"
hexmask.quad.byte 0x758 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x758 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x758 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x758 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x758 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x758 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x758 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x758 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x758 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x760 "QOSBW_BE_QOS_BANK0236,"
hexmask.quad.byte 0x760 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x760 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x760 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x760 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x760 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x760 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x760 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x760 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x760 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x768 "QOSBW_BE_QOS_BANK0237,"
hexmask.quad.byte 0x768 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x768 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x768 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x768 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x768 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x768 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x768 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x768 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x768 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x770 "QOSBW_BE_QOS_BANK0238,"
hexmask.quad.byte 0x770 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x770 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x770 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x770 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x770 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x770 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x770 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x770 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x770 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x778 "QOSBW_BE_QOS_BANK0239,"
hexmask.quad.byte 0x778 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x778 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x778 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x778 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x778 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x778 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x778 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x778 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x778 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x780 "QOSBW_BE_QOS_BANK0240,"
hexmask.quad.byte 0x780 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x780 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x780 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x780 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x780 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x780 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x780 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x780 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x780 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x788 "QOSBW_BE_QOS_BANK0241,"
hexmask.quad.byte 0x788 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x788 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x788 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x788 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x788 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x788 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x788 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x788 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x788 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x790 "QOSBW_BE_QOS_BANK0242,"
hexmask.quad.byte 0x790 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x790 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x790 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x790 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x790 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x790 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x790 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x790 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x790 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x798 "QOSBW_BE_QOS_BANK0243,"
hexmask.quad.byte 0x798 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x798 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x798 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x798 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x798 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x798 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x798 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x798 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x798 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7A0 "QOSBW_BE_QOS_BANK0244,"
hexmask.quad.byte 0x7A0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7A0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7A0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7A0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7A0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7A0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7A0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7A0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7A0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7A8 "QOSBW_BE_QOS_BANK0245,"
hexmask.quad.byte 0x7A8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7A8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7A8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7A8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7A8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7A8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7A8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7A8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7A8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7B0 "QOSBW_BE_QOS_BANK0246,"
hexmask.quad.byte 0x7B0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7B0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7B0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7B0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7B0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7B0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7B0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7B0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7B0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7B8 "QOSBW_BE_QOS_BANK0247,"
hexmask.quad.byte 0x7B8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7B8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7B8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7B8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7B8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7B8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7B8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7B8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7B8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7C0 "QOSBW_BE_QOS_BANK0248,"
hexmask.quad.byte 0x7C0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7C0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7C0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7C0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7C0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7C0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7C0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7C0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7C0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7C8 "QOSBW_BE_QOS_BANK0249,"
hexmask.quad.byte 0x7C8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7C8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7C8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7C8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7C8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7C8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7C8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7C8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7C8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7D0 "QOSBW_BE_QOS_BANK0250,"
hexmask.quad.byte 0x7D0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7D0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7D0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7D0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7D0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7D0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7D0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7D0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7D0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7D8 "QOSBW_BE_QOS_BANK0251,"
hexmask.quad.byte 0x7D8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7D8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7D8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7D8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7D8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7D8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7D8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7D8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7D8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7E0 "QOSBW_BE_QOS_BANK0252,"
hexmask.quad.byte 0x7E0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7E0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7E0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7E0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7E0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7E0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7E0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7E0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7E0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7E8 "QOSBW_BE_QOS_BANK0253,"
hexmask.quad.byte 0x7E8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7E8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7E8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7E8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7E8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7E8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7E8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7E8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7E8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7F0 "QOSBW_BE_QOS_BANK0254,"
hexmask.quad.byte 0x7F0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7F0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7F0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7F0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7F0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7F0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7F0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7F0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7F0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7F8 "QOSBW_BE_QOS_BANK0255,"
hexmask.quad.byte 0x7F8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7F8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7F8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7F8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7F8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7F8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7F8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7F8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7F8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x800 "QOSBW_BE_QOS_BANK0256,"
hexmask.quad.byte 0x800 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x800 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x800 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x800 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x800 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x800 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x800 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x800 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x800 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x808 "QOSBW_BE_QOS_BANK0257,"
hexmask.quad.byte 0x808 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x808 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x808 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x808 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x808 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x808 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x808 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x808 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x808 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x810 "QOSBW_BE_QOS_BANK0258,"
hexmask.quad.byte 0x810 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x810 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x810 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x810 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x810 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x810 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x810 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x810 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x810 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x818 "QOSBW_BE_QOS_BANK0259,"
hexmask.quad.byte 0x818 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x818 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x818 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x818 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x818 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x818 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x818 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x818 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x818 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x820 "QOSBW_BE_QOS_BANK0260,"
hexmask.quad.byte 0x820 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x820 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x820 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x820 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x820 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x820 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x820 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x820 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x820 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x828 "QOSBW_BE_QOS_BANK0261,"
hexmask.quad.byte 0x828 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x828 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x828 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x828 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x828 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x828 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x828 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x828 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x828 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x830 "QOSBW_BE_QOS_BANK0262,"
hexmask.quad.byte 0x830 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x830 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x830 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x830 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x830 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x830 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x830 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x830 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x830 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x838 "QOSBW_BE_QOS_BANK0263,"
hexmask.quad.byte 0x838 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x838 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x838 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x838 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x838 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x838 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x838 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x838 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x838 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x840 "QOSBW_BE_QOS_BANK0264,"
hexmask.quad.byte 0x840 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x840 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x840 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x840 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x840 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x840 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x840 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x840 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x840 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x848 "QOSBW_BE_QOS_BANK0265,"
hexmask.quad.byte 0x848 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x848 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x848 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x848 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x848 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x848 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x848 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x848 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x848 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x850 "QOSBW_BE_QOS_BANK0266,"
hexmask.quad.byte 0x850 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x850 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x850 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x850 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x850 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x850 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x850 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x850 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x850 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x858 "QOSBW_BE_QOS_BANK0267,"
hexmask.quad.byte 0x858 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x858 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x858 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x858 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x858 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x858 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x858 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x858 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x858 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x860 "QOSBW_BE_QOS_BANK0268,"
hexmask.quad.byte 0x860 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x860 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x860 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x860 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x860 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x860 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x860 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x860 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x860 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x868 "QOSBW_BE_QOS_BANK0269,"
hexmask.quad.byte 0x868 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x868 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x868 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x868 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x868 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x868 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x868 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x868 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x868 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x870 "QOSBW_BE_QOS_BANK0270,"
hexmask.quad.byte 0x870 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x870 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x870 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x870 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x870 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x870 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x870 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x870 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x870 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x878 "QOSBW_BE_QOS_BANK0271,"
hexmask.quad.byte 0x878 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x878 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x878 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x878 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x878 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x878 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x878 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x878 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x878 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x880 "QOSBW_BE_QOS_BANK0272,"
hexmask.quad.byte 0x880 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x880 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x880 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x880 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x880 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x880 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x880 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x880 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x880 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x888 "QOSBW_BE_QOS_BANK0273,"
hexmask.quad.byte 0x888 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x888 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x888 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x888 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x888 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x888 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x888 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x888 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x888 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x890 "QOSBW_BE_QOS_BANK0274,"
hexmask.quad.byte 0x890 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x890 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x890 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x890 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x890 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x890 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x890 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x890 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x890 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x898 "QOSBW_BE_QOS_BANK0275,"
hexmask.quad.byte 0x898 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x898 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x898 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x898 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x898 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x898 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x898 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x898 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x898 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8A0 "QOSBW_BE_QOS_BANK0276,"
hexmask.quad.byte 0x8A0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8A0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8A0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8A0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8A0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8A0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8A0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8A0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8A0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8A8 "QOSBW_BE_QOS_BANK0277,"
hexmask.quad.byte 0x8A8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8A8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8A8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8A8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8A8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8A8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8A8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8A8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8A8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8B0 "QOSBW_BE_QOS_BANK0278,"
hexmask.quad.byte 0x8B0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8B0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8B0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8B0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8B0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8B0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8B0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8B0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8B0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8B8 "QOSBW_BE_QOS_BANK0279,"
hexmask.quad.byte 0x8B8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8B8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8B8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8B8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8B8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8B8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8B8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8B8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8B8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8C0 "QOSBW_BE_QOS_BANK0280,"
hexmask.quad.byte 0x8C0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8C0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8C0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8C0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8C0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8C0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8C0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8C0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8C0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8C8 "QOSBW_BE_QOS_BANK0281,"
hexmask.quad.byte 0x8C8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8C8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8C8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8C8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8C8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8C8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8C8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8C8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8C8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8D0 "QOSBW_BE_QOS_BANK0282,"
hexmask.quad.byte 0x8D0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8D0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8D0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8D0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8D0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8D0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8D0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8D0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8D0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8D8 "QOSBW_BE_QOS_BANK0283,"
hexmask.quad.byte 0x8D8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8D8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8D8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8D8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8D8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8D8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8D8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8D8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8D8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8E0 "QOSBW_BE_QOS_BANK0284,"
hexmask.quad.byte 0x8E0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8E0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8E0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8E0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8E0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8E0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8E0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8E0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8E0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8E8 "QOSBW_BE_QOS_BANK0285,"
hexmask.quad.byte 0x8E8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8E8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8E8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8E8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8E8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8E8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8E8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8E8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8E8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8F0 "QOSBW_BE_QOS_BANK0286,"
hexmask.quad.byte 0x8F0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8F0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8F0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8F0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8F0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8F0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8F0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8F0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8F0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8F8 "QOSBW_BE_QOS_BANK0287,"
hexmask.quad.byte 0x8F8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8F8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8F8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8F8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8F8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8F8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8F8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8F8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8F8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x900 "QOSBW_BE_QOS_BANK0288,"
hexmask.quad.byte 0x900 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x900 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x900 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x900 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x900 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x900 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x900 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x900 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x900 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x908 "QOSBW_BE_QOS_BANK0289,"
hexmask.quad.byte 0x908 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x908 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x908 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x908 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x908 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x908 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x908 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x908 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x908 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x910 "QOSBW_BE_QOS_BANK0290,"
hexmask.quad.byte 0x910 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x910 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x910 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x910 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x910 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x910 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x910 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x910 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x910 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x918 "QOSBW_BE_QOS_BANK0291,"
hexmask.quad.byte 0x918 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x918 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x918 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x918 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x918 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x918 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x918 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x918 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x918 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x920 "QOSBW_BE_QOS_BANK0292,"
hexmask.quad.byte 0x920 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x920 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x920 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x920 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x920 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x920 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x920 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x920 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x920 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x928 "QOSBW_BE_QOS_BANK0293,"
hexmask.quad.byte 0x928 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x928 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x928 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x928 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x928 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x928 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x928 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x928 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x928 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x930 "QOSBW_BE_QOS_BANK0294,"
hexmask.quad.byte 0x930 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x930 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x930 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x930 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x930 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x930 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x930 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x930 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x930 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x938 "QOSBW_BE_QOS_BANK0295,"
hexmask.quad.byte 0x938 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x938 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x938 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x938 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x938 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x938 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x938 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x938 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x938 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x940 "QOSBW_BE_QOS_BANK0296,"
hexmask.quad.byte 0x940 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x940 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x940 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x940 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x940 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x940 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x940 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x940 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x940 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x948 "QOSBW_BE_QOS_BANK0297,"
hexmask.quad.byte 0x948 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x948 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x948 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x948 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x948 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x948 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x948 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x948 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x948 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x950 "QOSBW_BE_QOS_BANK0298,"
hexmask.quad.byte 0x950 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x950 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x950 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x950 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x950 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x950 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x950 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x950 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x950 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x958 "QOSBW_BE_QOS_BANK0299,"
hexmask.quad.byte 0x958 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x958 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x958 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x958 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x958 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x958 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x958 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x958 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x958 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x960 "QOSBW_BE_QOS_BANK0300,"
hexmask.quad.byte 0x960 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x960 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x960 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x960 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x960 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x960 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x960 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x960 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x960 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x968 "QOSBW_BE_QOS_BANK0301,"
hexmask.quad.byte 0x968 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x968 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x968 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x968 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x968 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x968 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x968 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x968 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x968 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x970 "QOSBW_BE_QOS_BANK0302,"
hexmask.quad.byte 0x970 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x970 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x970 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x970 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x970 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x970 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x970 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x970 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x970 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x978 "QOSBW_BE_QOS_BANK0303,"
hexmask.quad.byte 0x978 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x978 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x978 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x978 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x978 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x978 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x978 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x978 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x978 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x980 "QOSBW_BE_QOS_BANK0304,"
hexmask.quad.byte 0x980 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x980 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x980 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x980 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x980 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x980 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x980 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x980 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x980 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x988 "QOSBW_BE_QOS_BANK0305,"
hexmask.quad.byte 0x988 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x988 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x988 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x988 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x988 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x988 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x988 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x988 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x988 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x990 "QOSBW_BE_QOS_BANK0306,"
hexmask.quad.byte 0x990 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x990 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x990 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x990 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x990 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x990 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x990 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x990 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x990 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x998 "QOSBW_BE_QOS_BANK0307,"
hexmask.quad.byte 0x998 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x998 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x998 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x998 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x998 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x998 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x998 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x998 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x998 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9A0 "QOSBW_BE_QOS_BANK0308,"
hexmask.quad.byte 0x9A0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9A0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9A0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9A0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9A0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9A0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9A0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9A0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9A0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9A8 "QOSBW_BE_QOS_BANK0309,"
hexmask.quad.byte 0x9A8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9A8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9A8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9A8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9A8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9A8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9A8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9A8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9A8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9B0 "QOSBW_BE_QOS_BANK0310,"
hexmask.quad.byte 0x9B0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9B0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9B0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9B0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9B0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9B0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9B0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9B0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9B0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9B8 "QOSBW_BE_QOS_BANK0311,"
hexmask.quad.byte 0x9B8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9B8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9B8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9B8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9B8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9B8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9B8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9B8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9B8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9C0 "QOSBW_BE_QOS_BANK0312,"
hexmask.quad.byte 0x9C0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9C0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9C0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9C0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9C0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9C0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9C0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9C0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9C0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9C8 "QOSBW_BE_QOS_BANK0313,"
hexmask.quad.byte 0x9C8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9C8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9C8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9C8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9C8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9C8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9C8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9C8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9C8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9D0 "QOSBW_BE_QOS_BANK0314,"
hexmask.quad.byte 0x9D0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9D0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9D0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9D0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9D0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9D0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9D0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9D0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9D0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9D8 "QOSBW_BE_QOS_BANK0315,"
hexmask.quad.byte 0x9D8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9D8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9D8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9D8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9D8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9D8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9D8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9D8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9D8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9E0 "QOSBW_BE_QOS_BANK0316,"
hexmask.quad.byte 0x9E0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9E0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9E0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9E0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9E0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9E0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9E0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9E0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9E0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9E8 "QOSBW_BE_QOS_BANK0317,"
hexmask.quad.byte 0x9E8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9E8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9E8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9E8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9E8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9E8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9E8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9E8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9E8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9F0 "QOSBW_BE_QOS_BANK0318,"
hexmask.quad.byte 0x9F0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9F0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9F0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9F0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9F0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9F0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9F0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9F0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9F0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9F8 "QOSBW_BE_QOS_BANK0319,"
hexmask.quad.byte 0x9F8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9F8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9F8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9F8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9F8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9F8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9F8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9F8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9F8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA00 "QOSBW_BE_QOS_BANK0320,"
hexmask.quad.byte 0xA00 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA00 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA00 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA00 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA00 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA00 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA00 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA00 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA00 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA08 "QOSBW_BE_QOS_BANK0321,"
hexmask.quad.byte 0xA08 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA08 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA08 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA08 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA08 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA08 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA08 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA08 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA08 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA10 "QOSBW_BE_QOS_BANK0322,"
hexmask.quad.byte 0xA10 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA10 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA10 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA10 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA10 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA10 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA10 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA10 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA10 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA18 "QOSBW_BE_QOS_BANK0323,"
hexmask.quad.byte 0xA18 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA18 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA18 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA18 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA18 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA18 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA18 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA18 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA18 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA20 "QOSBW_BE_QOS_BANK0324,"
hexmask.quad.byte 0xA20 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA20 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA20 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA20 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA20 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA20 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA20 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA20 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA20 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA28 "QOSBW_BE_QOS_BANK0325,"
hexmask.quad.byte 0xA28 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA28 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA28 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA28 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA28 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA28 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA28 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA28 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA28 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA30 "QOSBW_BE_QOS_BANK0326,"
hexmask.quad.byte 0xA30 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA30 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA30 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA30 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA30 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA30 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA30 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA30 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA30 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA38 "QOSBW_BE_QOS_BANK0327,"
hexmask.quad.byte 0xA38 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA38 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA38 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA38 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA38 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA38 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA38 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA38 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA38 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA40 "QOSBW_BE_QOS_BANK0328,"
hexmask.quad.byte 0xA40 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA40 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA40 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA40 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA40 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA40 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA40 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA40 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA40 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA48 "QOSBW_BE_QOS_BANK0329,"
hexmask.quad.byte 0xA48 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA48 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA48 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA48 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA48 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA48 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA48 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA48 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA48 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA50 "QOSBW_BE_QOS_BANK0330,"
hexmask.quad.byte 0xA50 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA50 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA50 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA50 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA50 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA50 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA50 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA50 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA50 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA58 "QOSBW_BE_QOS_BANK0331,"
hexmask.quad.byte 0xA58 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA58 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA58 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA58 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA58 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA58 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA58 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA58 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA58 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA60 "QOSBW_BE_QOS_BANK0332,"
hexmask.quad.byte 0xA60 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA60 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA60 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA60 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA60 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA60 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA60 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA60 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA60 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA68 "QOSBW_BE_QOS_BANK0333,"
hexmask.quad.byte 0xA68 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA68 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA68 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA68 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA68 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA68 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA68 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA68 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA68 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA70 "QOSBW_BE_QOS_BANK0334,"
hexmask.quad.byte 0xA70 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA70 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA70 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA70 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA70 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA70 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA70 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA70 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA70 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA78 "QOSBW_BE_QOS_BANK0335,"
hexmask.quad.byte 0xA78 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA78 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA78 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA78 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA78 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA78 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA78 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA78 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA78 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA80 "QOSBW_BE_QOS_BANK0336,"
hexmask.quad.byte 0xA80 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA80 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA80 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA80 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA80 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA80 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA80 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA80 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA80 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA88 "QOSBW_BE_QOS_BANK0337,"
hexmask.quad.byte 0xA88 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA88 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA88 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA88 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA88 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA88 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA88 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA88 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA88 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA90 "QOSBW_BE_QOS_BANK0338,"
hexmask.quad.byte 0xA90 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA90 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA90 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA90 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA90 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA90 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA90 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA90 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA90 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA98 "QOSBW_BE_QOS_BANK0339,"
hexmask.quad.byte 0xA98 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA98 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA98 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA98 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA98 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA98 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA98 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA98 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA98 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAA0 "QOSBW_BE_QOS_BANK0340,"
hexmask.quad.byte 0xAA0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAA0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAA0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAA0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAA0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAA0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAA0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAA0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAA0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAA8 "QOSBW_BE_QOS_BANK0341,"
hexmask.quad.byte 0xAA8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAA8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAA8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAA8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAA8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAA8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAA8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAA8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAA8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAB0 "QOSBW_BE_QOS_BANK0342,"
hexmask.quad.byte 0xAB0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAB0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAB0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAB0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAB0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAB0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAB0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAB0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAB0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAB8 "QOSBW_BE_QOS_BANK0343,"
hexmask.quad.byte 0xAB8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAB8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAB8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAB8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAB8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAB8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAB8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAB8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAB8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAC0 "QOSBW_BE_QOS_BANK0344,"
hexmask.quad.byte 0xAC0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAC0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAC0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAC0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAC0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAC0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAC0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAC0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAC0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAC8 "QOSBW_BE_QOS_BANK0345,"
hexmask.quad.byte 0xAC8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAC8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAC8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAC8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAC8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAC8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAC8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAC8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAC8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAD0 "QOSBW_BE_QOS_BANK0346,"
hexmask.quad.byte 0xAD0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAD0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAD0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAD0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAD0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAD0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAD0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAD0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAD0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAD8 "QOSBW_BE_QOS_BANK0347,"
hexmask.quad.byte 0xAD8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAD8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAD8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAD8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAD8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAD8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAD8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAD8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAD8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAE0 "QOSBW_BE_QOS_BANK0348,"
hexmask.quad.byte 0xAE0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAE0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAE0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAE0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAE0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAE0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAE0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAE0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAE0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAE8 "QOSBW_BE_QOS_BANK0349,"
hexmask.quad.byte 0xAE8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAE8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAE8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAE8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAE8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAE8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAE8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAE8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAE8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAF0 "QOSBW_BE_QOS_BANK0350,"
hexmask.quad.byte 0xAF0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAF0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAF0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAF0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAF0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAF0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAF0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAF0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAF0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAF8 "QOSBW_BE_QOS_BANK0351,"
hexmask.quad.byte 0xAF8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAF8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAF8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAF8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAF8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAF8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAF8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAF8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAF8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB00 "QOSBW_BE_QOS_BANK0352,"
hexmask.quad.byte 0xB00 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB00 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB00 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB00 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB00 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB00 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB00 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB00 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB00 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB08 "QOSBW_BE_QOS_BANK0353,"
hexmask.quad.byte 0xB08 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB08 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB08 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB08 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB08 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB08 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB08 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB08 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB08 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB10 "QOSBW_BE_QOS_BANK0354,"
hexmask.quad.byte 0xB10 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB10 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB10 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB10 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB10 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB10 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB10 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB10 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB10 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB18 "QOSBW_BE_QOS_BANK0355,"
hexmask.quad.byte 0xB18 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB18 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB18 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB18 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB18 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB18 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB18 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB18 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB18 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB20 "QOSBW_BE_QOS_BANK0356,"
hexmask.quad.byte 0xB20 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB20 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB20 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB20 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB20 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB20 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB20 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB20 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB20 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB28 "QOSBW_BE_QOS_BANK0357,"
hexmask.quad.byte 0xB28 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB28 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB28 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB28 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB28 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB28 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB28 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB28 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB28 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB30 "QOSBW_BE_QOS_BANK0358,"
hexmask.quad.byte 0xB30 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB30 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB30 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB30 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB30 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB30 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB30 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB30 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB30 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB38 "QOSBW_BE_QOS_BANK0359,"
hexmask.quad.byte 0xB38 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB38 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB38 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB38 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB38 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB38 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB38 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB38 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB38 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB40 "QOSBW_BE_QOS_BANK0360,"
hexmask.quad.byte 0xB40 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB40 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB40 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB40 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB40 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB40 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB40 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB40 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB40 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB48 "QOSBW_BE_QOS_BANK0361,"
hexmask.quad.byte 0xB48 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB48 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB48 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB48 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB48 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB48 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB48 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB48 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB48 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB50 "QOSBW_BE_QOS_BANK0362,"
hexmask.quad.byte 0xB50 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB50 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB50 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB50 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB50 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB50 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB50 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB50 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB50 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB58 "QOSBW_BE_QOS_BANK0363,"
hexmask.quad.byte 0xB58 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB58 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB58 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB58 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB58 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB58 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB58 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB58 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB58 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB60 "QOSBW_BE_QOS_BANK0364,"
hexmask.quad.byte 0xB60 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB60 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB60 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB60 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB60 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB60 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB60 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB60 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB60 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB68 "QOSBW_BE_QOS_BANK0365,"
hexmask.quad.byte 0xB68 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB68 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB68 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB68 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB68 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB68 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB68 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB68 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB68 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB70 "QOSBW_BE_QOS_BANK0366,"
hexmask.quad.byte 0xB70 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB70 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB70 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB70 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB70 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB70 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB70 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB70 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB70 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB78 "QOSBW_BE_QOS_BANK0367,"
hexmask.quad.byte 0xB78 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB78 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB78 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB78 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB78 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB78 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB78 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB78 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB78 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB80 "QOSBW_BE_QOS_BANK0368,"
hexmask.quad.byte 0xB80 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB80 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB80 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB80 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB80 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB80 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB80 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB80 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB80 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB88 "QOSBW_BE_QOS_BANK0369,"
hexmask.quad.byte 0xB88 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB88 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB88 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB88 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB88 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB88 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB88 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB88 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB88 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB90 "QOSBW_BE_QOS_BANK0370,"
hexmask.quad.byte 0xB90 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB90 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB90 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB90 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB90 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB90 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB90 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB90 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB90 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB98 "QOSBW_BE_QOS_BANK0371,"
hexmask.quad.byte 0xB98 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB98 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB98 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB98 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB98 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB98 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB98 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB98 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB98 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBA0 "QOSBW_BE_QOS_BANK0372,"
hexmask.quad.byte 0xBA0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBA0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBA0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBA0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBA0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBA0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBA0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBA0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBA0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBA8 "QOSBW_BE_QOS_BANK0373,"
hexmask.quad.byte 0xBA8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBA8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBA8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBA8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBA8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBA8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBA8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBA8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBA8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBB0 "QOSBW_BE_QOS_BANK0374,"
hexmask.quad.byte 0xBB0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBB0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBB0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBB0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBB0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBB0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBB0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBB0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBB0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBB8 "QOSBW_BE_QOS_BANK0375,"
hexmask.quad.byte 0xBB8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBB8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBB8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBB8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBB8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBB8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBB8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBB8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBB8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBC0 "QOSBW_BE_QOS_BANK0376,"
hexmask.quad.byte 0xBC0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBC0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBC0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBC0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBC0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBC0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBC0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBC0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBC0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBC8 "QOSBW_BE_QOS_BANK0377,"
hexmask.quad.byte 0xBC8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBC8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBC8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBC8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBC8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBC8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBC8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBC8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBC8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBD0 "QOSBW_BE_QOS_BANK0378,"
hexmask.quad.byte 0xBD0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBD0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBD0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBD0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBD0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBD0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBD0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBD0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBD0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBD8 "QOSBW_BE_QOS_BANK0379,"
hexmask.quad.byte 0xBD8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBD8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBD8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBD8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBD8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBD8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBD8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBD8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBD8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBE0 "QOSBW_BE_QOS_BANK0380,"
hexmask.quad.byte 0xBE0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBE0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBE0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBE0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBE0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBE0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBE0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBE0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBE0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBE8 "QOSBW_BE_QOS_BANK0381,"
hexmask.quad.byte 0xBE8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBE8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBE8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBE8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBE8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBE8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBE8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBE8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBE8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBF0 "QOSBW_BE_QOS_BANK0382,"
hexmask.quad.byte 0xBF0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBF0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBF0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBF0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBF0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBF0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBF0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBF0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBF0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBF8 "QOSBW_BE_QOS_BANK0383,"
hexmask.quad.byte 0xBF8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBF8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBF8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBF8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBF8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBF8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBF8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBF8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBF8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC00 "QOSBW_BE_QOS_BANK0384,"
hexmask.quad.byte 0xC00 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC00 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC00 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC00 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC00 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC00 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC00 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC00 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC00 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC08 "QOSBW_BE_QOS_BANK0385,"
hexmask.quad.byte 0xC08 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC08 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC08 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC08 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC08 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC08 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC08 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC08 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC08 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC10 "QOSBW_BE_QOS_BANK0386,"
hexmask.quad.byte 0xC10 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC10 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC10 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC10 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC10 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC10 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC10 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC10 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC10 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC18 "QOSBW_BE_QOS_BANK0387,"
hexmask.quad.byte 0xC18 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC18 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC18 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC18 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC18 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC18 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC18 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC18 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC18 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC20 "QOSBW_BE_QOS_BANK0388,"
hexmask.quad.byte 0xC20 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC20 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC20 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC20 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC20 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC20 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC20 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC20 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC20 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC28 "QOSBW_BE_QOS_BANK0389,"
hexmask.quad.byte 0xC28 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC28 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC28 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC28 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC28 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC28 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC28 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC28 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC28 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC30 "QOSBW_BE_QOS_BANK0390,"
hexmask.quad.byte 0xC30 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC30 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC30 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC30 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC30 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC30 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC30 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC30 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC30 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC38 "QOSBW_BE_QOS_BANK0391,"
hexmask.quad.byte 0xC38 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC38 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC38 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC38 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC38 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC38 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC38 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC38 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC38 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC40 "QOSBW_BE_QOS_BANK0392,"
hexmask.quad.byte 0xC40 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC40 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC40 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC40 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC40 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC40 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC40 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC40 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC40 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC48 "QOSBW_BE_QOS_BANK0393,"
hexmask.quad.byte 0xC48 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC48 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC48 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC48 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC48 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC48 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC48 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC48 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC48 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC50 "QOSBW_BE_QOS_BANK0394,"
hexmask.quad.byte 0xC50 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC50 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC50 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC50 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC50 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC50 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC50 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC50 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC50 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC58 "QOSBW_BE_QOS_BANK0395,"
hexmask.quad.byte 0xC58 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC58 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC58 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC58 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC58 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC58 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC58 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC58 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC58 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC60 "QOSBW_BE_QOS_BANK0396,"
hexmask.quad.byte 0xC60 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC60 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC60 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC60 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC60 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC60 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC60 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC60 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC60 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC68 "QOSBW_BE_QOS_BANK0397,"
hexmask.quad.byte 0xC68 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC68 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC68 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC68 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC68 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC68 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC68 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC68 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC68 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC70 "QOSBW_BE_QOS_BANK0398,"
hexmask.quad.byte 0xC70 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC70 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC70 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC70 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC70 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC70 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC70 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC70 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC70 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC78 "QOSBW_BE_QOS_BANK0399,"
hexmask.quad.byte 0xC78 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC78 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC78 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC78 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC78 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC78 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC78 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC78 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC78 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC80 "QOSBW_BE_QOS_BANK0400,"
hexmask.quad.byte 0xC80 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC80 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC80 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC80 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC80 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC80 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC80 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC80 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC80 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC88 "QOSBW_BE_QOS_BANK0401,"
hexmask.quad.byte 0xC88 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC88 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC88 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC88 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC88 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC88 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC88 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC88 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC88 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC90 "QOSBW_BE_QOS_BANK0402,"
hexmask.quad.byte 0xC90 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC90 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC90 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC90 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC90 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC90 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC90 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC90 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC90 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC98 "QOSBW_BE_QOS_BANK0403,"
hexmask.quad.byte 0xC98 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC98 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC98 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC98 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC98 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC98 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC98 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC98 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC98 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCA0 "QOSBW_BE_QOS_BANK0404,"
hexmask.quad.byte 0xCA0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCA0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCA0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCA0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCA0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCA0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCA0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCA0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCA0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCA8 "QOSBW_BE_QOS_BANK0405,"
hexmask.quad.byte 0xCA8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCA8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCA8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCA8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCA8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCA8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCA8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCA8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCA8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCB0 "QOSBW_BE_QOS_BANK0406,"
hexmask.quad.byte 0xCB0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCB0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCB0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCB0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCB0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCB0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCB0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCB0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCB0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCB8 "QOSBW_BE_QOS_BANK0407,"
hexmask.quad.byte 0xCB8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCB8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCB8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCB8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCB8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCB8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCB8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCB8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCB8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCC0 "QOSBW_BE_QOS_BANK0408,"
hexmask.quad.byte 0xCC0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCC0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCC0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCC0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCC0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCC0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCC0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCC0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCC0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCC8 "QOSBW_BE_QOS_BANK0409,"
hexmask.quad.byte 0xCC8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCC8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCC8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCC8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCC8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCC8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCC8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCC8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCC8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCD0 "QOSBW_BE_QOS_BANK0410,"
hexmask.quad.byte 0xCD0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCD0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCD0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCD0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCD0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCD0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCD0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCD0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCD0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCD8 "QOSBW_BE_QOS_BANK0411,"
hexmask.quad.byte 0xCD8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCD8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCD8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCD8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCD8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCD8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCD8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCD8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCD8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCE0 "QOSBW_BE_QOS_BANK0412,"
hexmask.quad.byte 0xCE0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCE0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCE0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCE0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCE0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCE0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCE0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCE0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCE0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCE8 "QOSBW_BE_QOS_BANK0413,"
hexmask.quad.byte 0xCE8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCE8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCE8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCE8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCE8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCE8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCE8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCE8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCE8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCF0 "QOSBW_BE_QOS_BANK0414,"
hexmask.quad.byte 0xCF0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCF0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCF0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCF0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCF0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCF0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCF0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCF0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCF0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCF8 "QOSBW_BE_QOS_BANK0415,"
hexmask.quad.byte 0xCF8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCF8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCF8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCF8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCF8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCF8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCF8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCF8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCF8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD00 "QOSBW_BE_QOS_BANK0416,"
hexmask.quad.byte 0xD00 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD00 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD00 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD00 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD00 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD00 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD00 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD00 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD00 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD08 "QOSBW_BE_QOS_BANK0417,"
hexmask.quad.byte 0xD08 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD08 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD08 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD08 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD08 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD08 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD08 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD08 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD08 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD10 "QOSBW_BE_QOS_BANK0418,"
hexmask.quad.byte 0xD10 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD10 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD10 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD10 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD10 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD10 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD10 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD10 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD10 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD18 "QOSBW_BE_QOS_BANK0419,"
hexmask.quad.byte 0xD18 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD18 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD18 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD18 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD18 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD18 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD18 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD18 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD18 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD20 "QOSBW_BE_QOS_BANK0420,"
hexmask.quad.byte 0xD20 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD20 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD20 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD20 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD20 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD20 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD20 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD20 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD20 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD28 "QOSBW_BE_QOS_BANK0421,"
hexmask.quad.byte 0xD28 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD28 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD28 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD28 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD28 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD28 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD28 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD28 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD28 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD30 "QOSBW_BE_QOS_BANK0422,"
hexmask.quad.byte 0xD30 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD30 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD30 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD30 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD30 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD30 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD30 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD30 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD30 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD38 "QOSBW_BE_QOS_BANK0423,"
hexmask.quad.byte 0xD38 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD38 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD38 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD38 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD38 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD38 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD38 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD38 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD38 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD40 "QOSBW_BE_QOS_BANK0424,"
hexmask.quad.byte 0xD40 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD40 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD40 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD40 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD40 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD40 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD40 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD40 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD40 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD48 "QOSBW_BE_QOS_BANK0425,"
hexmask.quad.byte 0xD48 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD48 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD48 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD48 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD48 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD48 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD48 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD48 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD48 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD50 "QOSBW_BE_QOS_BANK0426,"
hexmask.quad.byte 0xD50 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD50 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD50 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD50 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD50 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD50 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD50 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD50 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD50 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD58 "QOSBW_BE_QOS_BANK0427,"
hexmask.quad.byte 0xD58 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD58 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD58 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD58 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD58 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD58 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD58 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD58 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD58 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD60 "QOSBW_BE_QOS_BANK0428,"
hexmask.quad.byte 0xD60 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD60 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD60 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD60 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD60 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD60 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD60 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD60 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD60 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD68 "QOSBW_BE_QOS_BANK0429,"
hexmask.quad.byte 0xD68 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD68 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD68 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD68 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD68 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD68 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD68 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD68 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD68 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD70 "QOSBW_BE_QOS_BANK0430,"
hexmask.quad.byte 0xD70 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD70 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD70 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD70 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD70 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD70 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD70 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD70 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD70 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD78 "QOSBW_BE_QOS_BANK0431,"
hexmask.quad.byte 0xD78 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD78 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD78 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD78 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD78 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD78 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD78 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD78 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD78 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD80 "QOSBW_BE_QOS_BANK0432,"
hexmask.quad.byte 0xD80 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD80 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD80 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD80 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD80 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD80 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD80 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD80 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD80 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD88 "QOSBW_BE_QOS_BANK0433,"
hexmask.quad.byte 0xD88 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD88 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD88 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD88 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD88 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD88 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD88 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD88 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD88 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD90 "QOSBW_BE_QOS_BANK0434,"
hexmask.quad.byte 0xD90 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD90 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD90 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD90 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD90 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD90 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD90 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD90 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD90 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD98 "QOSBW_BE_QOS_BANK0435,"
hexmask.quad.byte 0xD98 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD98 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD98 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD98 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD98 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD98 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD98 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD98 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD98 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDA0 "QOSBW_BE_QOS_BANK0436,"
hexmask.quad.byte 0xDA0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDA0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDA0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDA0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDA0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDA0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDA0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDA0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDA0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDA8 "QOSBW_BE_QOS_BANK0437,"
hexmask.quad.byte 0xDA8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDA8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDA8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDA8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDA8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDA8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDA8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDA8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDA8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDB0 "QOSBW_BE_QOS_BANK0438,"
hexmask.quad.byte 0xDB0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDB0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDB0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDB0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDB0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDB0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDB0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDB0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDB0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDB8 "QOSBW_BE_QOS_BANK0439,"
hexmask.quad.byte 0xDB8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDB8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDB8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDB8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDB8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDB8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDB8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDB8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDB8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDC0 "QOSBW_BE_QOS_BANK0440,"
hexmask.quad.byte 0xDC0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDC0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDC0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDC0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDC0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDC0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDC0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDC0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDC0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDC8 "QOSBW_BE_QOS_BANK0441,"
hexmask.quad.byte 0xDC8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDC8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDC8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDC8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDC8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDC8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDC8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDC8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDC8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDD0 "QOSBW_BE_QOS_BANK0442,"
hexmask.quad.byte 0xDD0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDD0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDD0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDD0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDD0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDD0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDD0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDD0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDD0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDD8 "QOSBW_BE_QOS_BANK0443,"
hexmask.quad.byte 0xDD8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDD8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDD8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDD8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDD8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDD8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDD8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDD8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDD8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDE0 "QOSBW_BE_QOS_BANK0444,"
hexmask.quad.byte 0xDE0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDE0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDE0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDE0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDE0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDE0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDE0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDE0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDE0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDE8 "QOSBW_BE_QOS_BANK0445,"
hexmask.quad.byte 0xDE8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDE8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDE8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDE8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDE8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDE8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDE8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDE8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDE8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDF0 "QOSBW_BE_QOS_BANK0446,"
hexmask.quad.byte 0xDF0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDF0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDF0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDF0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDF0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDF0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDF0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDF0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDF0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDF8 "QOSBW_BE_QOS_BANK0447,"
hexmask.quad.byte 0xDF8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDF8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDF8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDF8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDF8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDF8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDF8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDF8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDF8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE00 "QOSBW_BE_QOS_BANK0448,"
hexmask.quad.byte 0xE00 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE00 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE00 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE00 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE00 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE00 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE00 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE00 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE00 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE08 "QOSBW_BE_QOS_BANK0449,"
hexmask.quad.byte 0xE08 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE08 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE08 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE08 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE08 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE08 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE08 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE08 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE08 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE10 "QOSBW_BE_QOS_BANK0450,"
hexmask.quad.byte 0xE10 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE10 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE10 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE10 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE10 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE10 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE10 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE10 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE10 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE18 "QOSBW_BE_QOS_BANK0451,"
hexmask.quad.byte 0xE18 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE18 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE18 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE18 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE18 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE18 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE18 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE18 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE18 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE20 "QOSBW_BE_QOS_BANK0452,"
hexmask.quad.byte 0xE20 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE20 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE20 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE20 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE20 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE20 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE20 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE20 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE20 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE28 "QOSBW_BE_QOS_BANK0453,"
hexmask.quad.byte 0xE28 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE28 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE28 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE28 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE28 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE28 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE28 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE28 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE28 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE30 "QOSBW_BE_QOS_BANK0454,"
hexmask.quad.byte 0xE30 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE30 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE30 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE30 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE30 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE30 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE30 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE30 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE30 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE38 "QOSBW_BE_QOS_BANK0455,"
hexmask.quad.byte 0xE38 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE38 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE38 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE38 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE38 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE38 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE38 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE38 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE38 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE40 "QOSBW_BE_QOS_BANK0456,"
hexmask.quad.byte 0xE40 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE40 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE40 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE40 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE40 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE40 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE40 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE40 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE40 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE48 "QOSBW_BE_QOS_BANK0457,"
hexmask.quad.byte 0xE48 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE48 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE48 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE48 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE48 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE48 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE48 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE48 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE48 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE50 "QOSBW_BE_QOS_BANK0458,"
hexmask.quad.byte 0xE50 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE50 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE50 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE50 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE50 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE50 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE50 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE50 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE50 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE58 "QOSBW_BE_QOS_BANK0459,"
hexmask.quad.byte 0xE58 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE58 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE58 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE58 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE58 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE58 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE58 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE58 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE58 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE60 "QOSBW_BE_QOS_BANK0460,"
hexmask.quad.byte 0xE60 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE60 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE60 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE60 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE60 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE60 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE60 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE60 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE60 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE68 "QOSBW_BE_QOS_BANK0461,"
hexmask.quad.byte 0xE68 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE68 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE68 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE68 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE68 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE68 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE68 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE68 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE68 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE70 "QOSBW_BE_QOS_BANK0462,"
hexmask.quad.byte 0xE70 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE70 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE70 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE70 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE70 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE70 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE70 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE70 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE70 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE78 "QOSBW_BE_QOS_BANK0463,"
hexmask.quad.byte 0xE78 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE78 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE78 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE78 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE78 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE78 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE78 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE78 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE78 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE80 "QOSBW_BE_QOS_BANK0464,"
hexmask.quad.byte 0xE80 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE80 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE80 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE80 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE80 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE80 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE80 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE80 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE80 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE88 "QOSBW_BE_QOS_BANK0465,"
hexmask.quad.byte 0xE88 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE88 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE88 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE88 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE88 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE88 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE88 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE88 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE88 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE90 "QOSBW_BE_QOS_BANK0466,"
hexmask.quad.byte 0xE90 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE90 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE90 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE90 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE90 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE90 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE90 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE90 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE90 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE98 "QOSBW_BE_QOS_BANK0467,"
hexmask.quad.byte 0xE98 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE98 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE98 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE98 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE98 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE98 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE98 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE98 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE98 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEA0 "QOSBW_BE_QOS_BANK0468,"
hexmask.quad.byte 0xEA0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEA0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEA0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEA0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEA0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEA0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEA0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEA0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEA0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEA8 "QOSBW_BE_QOS_BANK0469,"
hexmask.quad.byte 0xEA8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEA8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEA8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEA8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEA8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEA8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEA8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEA8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEA8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEB0 "QOSBW_BE_QOS_BANK0470,"
hexmask.quad.byte 0xEB0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEB0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEB0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEB0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEB0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEB0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEB0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEB0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEB0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEB8 "QOSBW_BE_QOS_BANK0471,"
hexmask.quad.byte 0xEB8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEB8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEB8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEB8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEB8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEB8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEB8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEB8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEB8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEC0 "QOSBW_BE_QOS_BANK0472,"
hexmask.quad.byte 0xEC0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEC0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEC0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEC0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEC0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEC0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEC0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEC0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEC0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEC8 "QOSBW_BE_QOS_BANK0473,"
hexmask.quad.byte 0xEC8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEC8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEC8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEC8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEC8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEC8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEC8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEC8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEC8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xED0 "QOSBW_BE_QOS_BANK0474,"
hexmask.quad.byte 0xED0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xED0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xED0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xED0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xED0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xED0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xED0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xED0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xED0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xED8 "QOSBW_BE_QOS_BANK0475,"
hexmask.quad.byte 0xED8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xED8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xED8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xED8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xED8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xED8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xED8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xED8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xED8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEE0 "QOSBW_BE_QOS_BANK0476,"
hexmask.quad.byte 0xEE0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEE0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEE0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEE0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEE0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEE0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEE0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEE0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEE0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEE8 "QOSBW_BE_QOS_BANK0477,"
hexmask.quad.byte 0xEE8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEE8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEE8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEE8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEE8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEE8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEE8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEE8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEE8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEF0 "QOSBW_BE_QOS_BANK0478,"
hexmask.quad.byte 0xEF0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEF0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEF0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEF0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEF0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEF0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEF0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEF0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEF0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEF8 "QOSBW_BE_QOS_BANK0479,"
hexmask.quad.byte 0xEF8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEF8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEF8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEF8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEF8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEF8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEF8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEF8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEF8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF00 "QOSBW_BE_QOS_BANK0480,"
hexmask.quad.byte 0xF00 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF00 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF00 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF00 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF00 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF00 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF00 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF00 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF00 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF08 "QOSBW_BE_QOS_BANK0481,"
hexmask.quad.byte 0xF08 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF08 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF08 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF08 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF08 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF08 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF08 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF08 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF08 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF10 "QOSBW_BE_QOS_BANK0482,"
hexmask.quad.byte 0xF10 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF10 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF10 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF10 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF10 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF10 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF10 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF10 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF10 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF18 "QOSBW_BE_QOS_BANK0483,"
hexmask.quad.byte 0xF18 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF18 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF18 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF18 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF18 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF18 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF18 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF18 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF18 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF20 "QOSBW_BE_QOS_BANK0484,"
hexmask.quad.byte 0xF20 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF20 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF20 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF20 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF20 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF20 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF20 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF20 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF20 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF28 "QOSBW_BE_QOS_BANK0485,"
hexmask.quad.byte 0xF28 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF28 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF28 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF28 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF28 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF28 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF28 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF28 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF28 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF30 "QOSBW_BE_QOS_BANK0486,"
hexmask.quad.byte 0xF30 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF30 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF30 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF30 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF30 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF30 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF30 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF30 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF30 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF38 "QOSBW_BE_QOS_BANK0487,"
hexmask.quad.byte 0xF38 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF38 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF38 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF38 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF38 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF38 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF38 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF38 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF38 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF40 "QOSBW_BE_QOS_BANK0488,"
hexmask.quad.byte 0xF40 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF40 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF40 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF40 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF40 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF40 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF40 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF40 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF40 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF48 "QOSBW_BE_QOS_BANK0489,"
hexmask.quad.byte 0xF48 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF48 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF48 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF48 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF48 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF48 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF48 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF48 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF48 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF50 "QOSBW_BE_QOS_BANK0490,"
hexmask.quad.byte 0xF50 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF50 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF50 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF50 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF50 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF50 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF50 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF50 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF50 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF58 "QOSBW_BE_QOS_BANK0491,"
hexmask.quad.byte 0xF58 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF58 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF58 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF58 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF58 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF58 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF58 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF58 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF58 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF60 "QOSBW_BE_QOS_BANK0492,"
hexmask.quad.byte 0xF60 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF60 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF60 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF60 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF60 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF60 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF60 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF60 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF60 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF68 "QOSBW_BE_QOS_BANK0493,"
hexmask.quad.byte 0xF68 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF68 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF68 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF68 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF68 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF68 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF68 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF68 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF68 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF70 "QOSBW_BE_QOS_BANK0494,"
hexmask.quad.byte 0xF70 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF70 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF70 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF70 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF70 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF70 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF70 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF70 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF70 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF78 "QOSBW_BE_QOS_BANK0495,"
hexmask.quad.byte 0xF78 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF78 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF78 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF78 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF78 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF78 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF78 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF78 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF78 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF80 "QOSBW_BE_QOS_BANK0496,"
hexmask.quad.byte 0xF80 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF80 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF80 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF80 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF80 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF80 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF80 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF80 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF80 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF88 "QOSBW_BE_QOS_BANK0497,"
hexmask.quad.byte 0xF88 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF88 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF88 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF88 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF88 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF88 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF88 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF88 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF88 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF90 "QOSBW_BE_QOS_BANK0498,"
hexmask.quad.byte 0xF90 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF90 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF90 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF90 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF90 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF90 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF90 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF90 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF90 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF98 "QOSBW_BE_QOS_BANK0499,"
hexmask.quad.byte 0xF98 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF98 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF98 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF98 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF98 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF98 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF98 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF98 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF98 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFA0 "QOSBW_BE_QOS_BANK0500,"
hexmask.quad.byte 0xFA0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFA0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFA0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFA0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFA0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFA0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFA0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFA0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFA0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFA8 "QOSBW_BE_QOS_BANK0501,"
hexmask.quad.byte 0xFA8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFA8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFA8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFA8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFA8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFA8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFA8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFA8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFA8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFB0 "QOSBW_BE_QOS_BANK0502,"
hexmask.quad.byte 0xFB0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFB0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFB0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFB0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFB0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFB0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFB0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFB0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFB0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFB8 "QOSBW_BE_QOS_BANK0503,"
hexmask.quad.byte 0xFB8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFB8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFB8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFB8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFB8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFB8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFB8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFB8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFB8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFC0 "QOSBW_BE_QOS_BANK0504,"
hexmask.quad.byte 0xFC0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFC0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFC0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFC0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFC0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFC0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFC0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFC0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFC0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFC8 "QOSBW_BE_QOS_BANK0505,"
hexmask.quad.byte 0xFC8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFC8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFC8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFC8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFC8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFC8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFC8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFC8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFC8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFD0 "QOSBW_BE_QOS_BANK0506,"
hexmask.quad.byte 0xFD0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFD0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFD0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFD0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFD0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFD0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFD0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFD0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFD0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFD8 "QOSBW_BE_QOS_BANK0507,"
hexmask.quad.byte 0xFD8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFD8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFD8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFD8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFD8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFD8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFD8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFD8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFD8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFE0 "QOSBW_BE_QOS_BANK0508,"
hexmask.quad.byte 0xFE0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFE0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFE0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFE0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFE0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFE0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFE0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFE0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFE0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFE8 "QOSBW_BE_QOS_BANK0509,"
hexmask.quad.byte 0xFE8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFE8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFE8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFE8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFE8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFE8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFE8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFE8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFE8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFF0 "QOSBW_BE_QOS_BANK0510,"
hexmask.quad.byte 0xFF0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFF0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFF0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFF0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFF0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFF0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFF0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFF0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFF0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFF8 "QOSBW_BE_QOS_BANK0511,"
hexmask.quad.byte 0xFF8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFF8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFF8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFF8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFF8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFF8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFF8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFF8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFF8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
group.quad 0x3000++0xFFF
line.quad 0x0 "QOSBW_BE_QOS_BANK10,"
hexmask.quad.byte 0x0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8 "QOSBW_BE_QOS_BANK11,"
hexmask.quad.byte 0x8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x10 "QOSBW_BE_QOS_BANK12,"
hexmask.quad.byte 0x10 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x10 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x10 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x10 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x10 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x10 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x10 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x10 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x10 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x18 "QOSBW_BE_QOS_BANK13,"
hexmask.quad.byte 0x18 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x18 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x18 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x18 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x18 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x18 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x18 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x18 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x18 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x20 "QOSBW_BE_QOS_BANK14,"
hexmask.quad.byte 0x20 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x20 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x20 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x20 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x20 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x20 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x20 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x20 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x20 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x28 "QOSBW_BE_QOS_BANK15,"
hexmask.quad.byte 0x28 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x28 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x28 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x28 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x28 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x28 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x28 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x28 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x28 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x30 "QOSBW_BE_QOS_BANK16,"
hexmask.quad.byte 0x30 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x30 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x30 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x30 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x30 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x30 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x30 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x30 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x30 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x38 "QOSBW_BE_QOS_BANK17,"
hexmask.quad.byte 0x38 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x38 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x38 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x38 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x38 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x38 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x38 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x38 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x38 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x40 "QOSBW_BE_QOS_BANK18,"
hexmask.quad.byte 0x40 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x40 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x40 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x40 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x40 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x40 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x40 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x40 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x40 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x48 "QOSBW_BE_QOS_BANK19,"
hexmask.quad.byte 0x48 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x48 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x48 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x48 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x48 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x48 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x48 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x48 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x48 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x50 "QOSBW_BE_QOS_BANK110,"
hexmask.quad.byte 0x50 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x50 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x50 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x50 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x50 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x50 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x50 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x50 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x50 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x58 "QOSBW_BE_QOS_BANK111,"
hexmask.quad.byte 0x58 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x58 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x58 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x58 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x58 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x58 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x58 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x58 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x58 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x60 "QOSBW_BE_QOS_BANK112,"
hexmask.quad.byte 0x60 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x60 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x60 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x60 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x60 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x60 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x60 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x60 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x60 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x68 "QOSBW_BE_QOS_BANK113,"
hexmask.quad.byte 0x68 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x68 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x68 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x68 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x68 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x68 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x68 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x68 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x68 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x70 "QOSBW_BE_QOS_BANK114,"
hexmask.quad.byte 0x70 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x70 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x70 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x70 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x70 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x70 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x70 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x70 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x70 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x78 "QOSBW_BE_QOS_BANK115,"
hexmask.quad.byte 0x78 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x78 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x78 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x78 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x78 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x78 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x78 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x78 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x78 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x80 "QOSBW_BE_QOS_BANK116,"
hexmask.quad.byte 0x80 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x80 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x80 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x80 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x80 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x80 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x80 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x80 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x80 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x88 "QOSBW_BE_QOS_BANK117,"
hexmask.quad.byte 0x88 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x88 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x88 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x88 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x88 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x88 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x88 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x88 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x88 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x90 "QOSBW_BE_QOS_BANK118,"
hexmask.quad.byte 0x90 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x90 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x90 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x90 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x90 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x90 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x90 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x90 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x90 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x98 "QOSBW_BE_QOS_BANK119,"
hexmask.quad.byte 0x98 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x98 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x98 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x98 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x98 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x98 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x98 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x98 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x98 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA0 "QOSBW_BE_QOS_BANK120,"
hexmask.quad.byte 0xA0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA8 "QOSBW_BE_QOS_BANK121,"
hexmask.quad.byte 0xA8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB0 "QOSBW_BE_QOS_BANK122,"
hexmask.quad.byte 0xB0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB8 "QOSBW_BE_QOS_BANK123,"
hexmask.quad.byte 0xB8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC0 "QOSBW_BE_QOS_BANK124,"
hexmask.quad.byte 0xC0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC8 "QOSBW_BE_QOS_BANK125,"
hexmask.quad.byte 0xC8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD0 "QOSBW_BE_QOS_BANK126,"
hexmask.quad.byte 0xD0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD8 "QOSBW_BE_QOS_BANK127,"
hexmask.quad.byte 0xD8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE0 "QOSBW_BE_QOS_BANK128,"
hexmask.quad.byte 0xE0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE8 "QOSBW_BE_QOS_BANK129,"
hexmask.quad.byte 0xE8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF0 "QOSBW_BE_QOS_BANK130,"
hexmask.quad.byte 0xF0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF8 "QOSBW_BE_QOS_BANK131,"
hexmask.quad.byte 0xF8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x100 "QOSBW_BE_QOS_BANK132,"
hexmask.quad.byte 0x100 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x100 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x100 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x100 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x100 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x100 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x100 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x100 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x100 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x108 "QOSBW_BE_QOS_BANK133,"
hexmask.quad.byte 0x108 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x108 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x108 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x108 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x108 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x108 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x108 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x108 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x108 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x110 "QOSBW_BE_QOS_BANK134,"
hexmask.quad.byte 0x110 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x110 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x110 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x110 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x110 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x110 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x110 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x110 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x110 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x118 "QOSBW_BE_QOS_BANK135,"
hexmask.quad.byte 0x118 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x118 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x118 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x118 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x118 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x118 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x118 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x118 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x118 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x120 "QOSBW_BE_QOS_BANK136,"
hexmask.quad.byte 0x120 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x120 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x120 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x120 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x120 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x120 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x120 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x120 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x120 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x128 "QOSBW_BE_QOS_BANK137,"
hexmask.quad.byte 0x128 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x128 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x128 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x128 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x128 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x128 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x128 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x128 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x128 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x130 "QOSBW_BE_QOS_BANK138,"
hexmask.quad.byte 0x130 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x130 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x130 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x130 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x130 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x130 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x130 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x130 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x130 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x138 "QOSBW_BE_QOS_BANK139,"
hexmask.quad.byte 0x138 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x138 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x138 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x138 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x138 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x138 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x138 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x138 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x138 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x140 "QOSBW_BE_QOS_BANK140,"
hexmask.quad.byte 0x140 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x140 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x140 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x140 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x140 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x140 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x140 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x140 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x140 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x148 "QOSBW_BE_QOS_BANK141,"
hexmask.quad.byte 0x148 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x148 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x148 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x148 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x148 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x148 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x148 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x148 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x148 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x150 "QOSBW_BE_QOS_BANK142,"
hexmask.quad.byte 0x150 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x150 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x150 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x150 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x150 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x150 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x150 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x150 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x150 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x158 "QOSBW_BE_QOS_BANK143,"
hexmask.quad.byte 0x158 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x158 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x158 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x158 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x158 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x158 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x158 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x158 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x158 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x160 "QOSBW_BE_QOS_BANK144,"
hexmask.quad.byte 0x160 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x160 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x160 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x160 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x160 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x160 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x160 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x160 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x160 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x168 "QOSBW_BE_QOS_BANK145,"
hexmask.quad.byte 0x168 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x168 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x168 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x168 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x168 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x168 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x168 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x168 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x168 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x170 "QOSBW_BE_QOS_BANK146,"
hexmask.quad.byte 0x170 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x170 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x170 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x170 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x170 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x170 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x170 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x170 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x170 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x178 "QOSBW_BE_QOS_BANK147,"
hexmask.quad.byte 0x178 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x178 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x178 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x178 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x178 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x178 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x178 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x178 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x178 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x180 "QOSBW_BE_QOS_BANK148,"
hexmask.quad.byte 0x180 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x180 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x180 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x180 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x180 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x180 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x180 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x180 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x180 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x188 "QOSBW_BE_QOS_BANK149,"
hexmask.quad.byte 0x188 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x188 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x188 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x188 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x188 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x188 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x188 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x188 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x188 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x190 "QOSBW_BE_QOS_BANK150,"
hexmask.quad.byte 0x190 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x190 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x190 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x190 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x190 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x190 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x190 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x190 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x190 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x198 "QOSBW_BE_QOS_BANK151,"
hexmask.quad.byte 0x198 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x198 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x198 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x198 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x198 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x198 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x198 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x198 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x198 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1A0 "QOSBW_BE_QOS_BANK152,"
hexmask.quad.byte 0x1A0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1A0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1A0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1A0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1A0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1A0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1A0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1A0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1A0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1A8 "QOSBW_BE_QOS_BANK153,"
hexmask.quad.byte 0x1A8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1A8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1A8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1A8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1A8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1A8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1A8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1A8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1A8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1B0 "QOSBW_BE_QOS_BANK154,"
hexmask.quad.byte 0x1B0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1B0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1B0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1B0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1B0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1B0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1B0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1B0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1B0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1B8 "QOSBW_BE_QOS_BANK155,"
hexmask.quad.byte 0x1B8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1B8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1B8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1B8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1B8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1B8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1B8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1B8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1B8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1C0 "QOSBW_BE_QOS_BANK156,"
hexmask.quad.byte 0x1C0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1C0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1C0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1C0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1C0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1C0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1C0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1C0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1C0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1C8 "QOSBW_BE_QOS_BANK157,"
hexmask.quad.byte 0x1C8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1C8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1C8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1C8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1C8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1C8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1C8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1C8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1C8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1D0 "QOSBW_BE_QOS_BANK158,"
hexmask.quad.byte 0x1D0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1D0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1D0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1D0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1D0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1D0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1D0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1D0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1D0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1D8 "QOSBW_BE_QOS_BANK159,"
hexmask.quad.byte 0x1D8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1D8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1D8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1D8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1D8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1D8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1D8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1D8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1D8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1E0 "QOSBW_BE_QOS_BANK160,"
hexmask.quad.byte 0x1E0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1E0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1E0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1E0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1E0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1E0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1E0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1E0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1E0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1E8 "QOSBW_BE_QOS_BANK161,"
hexmask.quad.byte 0x1E8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1E8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1E8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1E8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1E8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1E8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1E8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1E8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1E8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1F0 "QOSBW_BE_QOS_BANK162,"
hexmask.quad.byte 0x1F0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1F0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1F0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1F0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1F0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1F0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1F0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1F0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1F0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x1F8 "QOSBW_BE_QOS_BANK163,"
hexmask.quad.byte 0x1F8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x1F8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x1F8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x1F8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x1F8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x1F8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x1F8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x1F8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x1F8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x200 "QOSBW_BE_QOS_BANK164,"
hexmask.quad.byte 0x200 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x200 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x200 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x200 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x200 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x200 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x200 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x200 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x200 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x208 "QOSBW_BE_QOS_BANK165,"
hexmask.quad.byte 0x208 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x208 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x208 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x208 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x208 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x208 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x208 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x208 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x208 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x210 "QOSBW_BE_QOS_BANK166,"
hexmask.quad.byte 0x210 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x210 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x210 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x210 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x210 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x210 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x210 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x210 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x210 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x218 "QOSBW_BE_QOS_BANK167,"
hexmask.quad.byte 0x218 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x218 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x218 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x218 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x218 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x218 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x218 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x218 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x218 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x220 "QOSBW_BE_QOS_BANK168,"
hexmask.quad.byte 0x220 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x220 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x220 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x220 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x220 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x220 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x220 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x220 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x220 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x228 "QOSBW_BE_QOS_BANK169,"
hexmask.quad.byte 0x228 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x228 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x228 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x228 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x228 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x228 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x228 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x228 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x228 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x230 "QOSBW_BE_QOS_BANK170,"
hexmask.quad.byte 0x230 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x230 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x230 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x230 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x230 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x230 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x230 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x230 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x230 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x238 "QOSBW_BE_QOS_BANK171,"
hexmask.quad.byte 0x238 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x238 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x238 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x238 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x238 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x238 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x238 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x238 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x238 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x240 "QOSBW_BE_QOS_BANK172,"
hexmask.quad.byte 0x240 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x240 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x240 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x240 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x240 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x240 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x240 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x240 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x240 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x248 "QOSBW_BE_QOS_BANK173,"
hexmask.quad.byte 0x248 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x248 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x248 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x248 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x248 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x248 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x248 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x248 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x248 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x250 "QOSBW_BE_QOS_BANK174,"
hexmask.quad.byte 0x250 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x250 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x250 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x250 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x250 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x250 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x250 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x250 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x250 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x258 "QOSBW_BE_QOS_BANK175,"
hexmask.quad.byte 0x258 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x258 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x258 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x258 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x258 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x258 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x258 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x258 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x258 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x260 "QOSBW_BE_QOS_BANK176,"
hexmask.quad.byte 0x260 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x260 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x260 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x260 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x260 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x260 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x260 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x260 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x260 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x268 "QOSBW_BE_QOS_BANK177,"
hexmask.quad.byte 0x268 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x268 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x268 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x268 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x268 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x268 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x268 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x268 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x268 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x270 "QOSBW_BE_QOS_BANK178,"
hexmask.quad.byte 0x270 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x270 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x270 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x270 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x270 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x270 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x270 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x270 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x270 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x278 "QOSBW_BE_QOS_BANK179,"
hexmask.quad.byte 0x278 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x278 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x278 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x278 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x278 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x278 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x278 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x278 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x278 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x280 "QOSBW_BE_QOS_BANK180,"
hexmask.quad.byte 0x280 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x280 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x280 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x280 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x280 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x280 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x280 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x280 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x280 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x288 "QOSBW_BE_QOS_BANK181,"
hexmask.quad.byte 0x288 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x288 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x288 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x288 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x288 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x288 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x288 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x288 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x288 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x290 "QOSBW_BE_QOS_BANK182,"
hexmask.quad.byte 0x290 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x290 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x290 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x290 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x290 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x290 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x290 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x290 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x290 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x298 "QOSBW_BE_QOS_BANK183,"
hexmask.quad.byte 0x298 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x298 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x298 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x298 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x298 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x298 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x298 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x298 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x298 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2A0 "QOSBW_BE_QOS_BANK184,"
hexmask.quad.byte 0x2A0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2A0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2A0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2A0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2A0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2A0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2A0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2A0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2A0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2A8 "QOSBW_BE_QOS_BANK185,"
hexmask.quad.byte 0x2A8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2A8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2A8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2A8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2A8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2A8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2A8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2A8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2A8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2B0 "QOSBW_BE_QOS_BANK186,"
hexmask.quad.byte 0x2B0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2B0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2B0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2B0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2B0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2B0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2B0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2B0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2B0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2B8 "QOSBW_BE_QOS_BANK187,"
hexmask.quad.byte 0x2B8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2B8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2B8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2B8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2B8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2B8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2B8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2B8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2B8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2C0 "QOSBW_BE_QOS_BANK188,"
hexmask.quad.byte 0x2C0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2C0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2C0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2C0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2C0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2C0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2C0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2C0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2C0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2C8 "QOSBW_BE_QOS_BANK189,"
hexmask.quad.byte 0x2C8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2C8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2C8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2C8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2C8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2C8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2C8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2C8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2C8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2D0 "QOSBW_BE_QOS_BANK190,"
hexmask.quad.byte 0x2D0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2D0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2D0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2D0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2D0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2D0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2D0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2D0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2D0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2D8 "QOSBW_BE_QOS_BANK191,"
hexmask.quad.byte 0x2D8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2D8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2D8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2D8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2D8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2D8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2D8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2D8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2D8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2E0 "QOSBW_BE_QOS_BANK192,"
hexmask.quad.byte 0x2E0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2E0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2E0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2E0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2E0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2E0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2E0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2E0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2E0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2E8 "QOSBW_BE_QOS_BANK193,"
hexmask.quad.byte 0x2E8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2E8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2E8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2E8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2E8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2E8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2E8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2E8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2E8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2F0 "QOSBW_BE_QOS_BANK194,"
hexmask.quad.byte 0x2F0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2F0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2F0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2F0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2F0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2F0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2F0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2F0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2F0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x2F8 "QOSBW_BE_QOS_BANK195,"
hexmask.quad.byte 0x2F8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x2F8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x2F8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x2F8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x2F8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x2F8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x2F8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x2F8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x2F8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x300 "QOSBW_BE_QOS_BANK196,"
hexmask.quad.byte 0x300 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x300 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x300 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x300 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x300 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x300 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x300 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x300 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x300 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x308 "QOSBW_BE_QOS_BANK197,"
hexmask.quad.byte 0x308 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x308 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x308 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x308 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x308 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x308 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x308 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x308 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x308 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x310 "QOSBW_BE_QOS_BANK198,"
hexmask.quad.byte 0x310 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x310 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x310 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x310 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x310 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x310 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x310 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x310 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x310 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x318 "QOSBW_BE_QOS_BANK199,"
hexmask.quad.byte 0x318 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x318 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x318 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x318 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x318 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x318 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x318 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x318 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x318 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x320 "QOSBW_BE_QOS_BANK1100,"
hexmask.quad.byte 0x320 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x320 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x320 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x320 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x320 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x320 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x320 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x320 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x320 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x328 "QOSBW_BE_QOS_BANK1101,"
hexmask.quad.byte 0x328 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x328 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x328 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x328 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x328 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x328 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x328 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x328 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x328 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x330 "QOSBW_BE_QOS_BANK1102,"
hexmask.quad.byte 0x330 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x330 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x330 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x330 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x330 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x330 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x330 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x330 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x330 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x338 "QOSBW_BE_QOS_BANK1103,"
hexmask.quad.byte 0x338 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x338 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x338 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x338 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x338 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x338 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x338 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x338 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x338 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x340 "QOSBW_BE_QOS_BANK1104,"
hexmask.quad.byte 0x340 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x340 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x340 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x340 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x340 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x340 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x340 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x340 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x340 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x348 "QOSBW_BE_QOS_BANK1105,"
hexmask.quad.byte 0x348 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x348 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x348 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x348 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x348 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x348 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x348 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x348 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x348 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x350 "QOSBW_BE_QOS_BANK1106,"
hexmask.quad.byte 0x350 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x350 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x350 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x350 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x350 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x350 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x350 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x350 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x350 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x358 "QOSBW_BE_QOS_BANK1107,"
hexmask.quad.byte 0x358 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x358 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x358 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x358 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x358 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x358 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x358 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x358 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x358 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x360 "QOSBW_BE_QOS_BANK1108,"
hexmask.quad.byte 0x360 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x360 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x360 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x360 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x360 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x360 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x360 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x360 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x360 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x368 "QOSBW_BE_QOS_BANK1109,"
hexmask.quad.byte 0x368 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x368 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x368 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x368 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x368 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x368 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x368 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x368 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x368 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x370 "QOSBW_BE_QOS_BANK1110,"
hexmask.quad.byte 0x370 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x370 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x370 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x370 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x370 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x370 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x370 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x370 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x370 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x378 "QOSBW_BE_QOS_BANK1111,"
hexmask.quad.byte 0x378 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x378 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x378 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x378 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x378 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x378 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x378 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x378 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x378 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x380 "QOSBW_BE_QOS_BANK1112,"
hexmask.quad.byte 0x380 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x380 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x380 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x380 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x380 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x380 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x380 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x380 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x380 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x388 "QOSBW_BE_QOS_BANK1113,"
hexmask.quad.byte 0x388 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x388 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x388 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x388 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x388 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x388 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x388 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x388 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x388 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x390 "QOSBW_BE_QOS_BANK1114,"
hexmask.quad.byte 0x390 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x390 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x390 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x390 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x390 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x390 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x390 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x390 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x390 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x398 "QOSBW_BE_QOS_BANK1115,"
hexmask.quad.byte 0x398 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x398 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x398 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x398 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x398 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x398 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x398 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x398 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x398 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3A0 "QOSBW_BE_QOS_BANK1116,"
hexmask.quad.byte 0x3A0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3A0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3A0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3A0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3A0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3A0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3A0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3A0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3A0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3A8 "QOSBW_BE_QOS_BANK1117,"
hexmask.quad.byte 0x3A8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3A8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3A8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3A8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3A8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3A8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3A8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3A8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3A8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3B0 "QOSBW_BE_QOS_BANK1118,"
hexmask.quad.byte 0x3B0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3B0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3B0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3B0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3B0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3B0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3B0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3B0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3B0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3B8 "QOSBW_BE_QOS_BANK1119,"
hexmask.quad.byte 0x3B8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3B8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3B8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3B8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3B8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3B8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3B8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3B8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3B8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3C0 "QOSBW_BE_QOS_BANK1120,"
hexmask.quad.byte 0x3C0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3C0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3C0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3C0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3C0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3C0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3C0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3C0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3C0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3C8 "QOSBW_BE_QOS_BANK1121,"
hexmask.quad.byte 0x3C8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3C8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3C8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3C8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3C8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3C8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3C8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3C8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3C8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3D0 "QOSBW_BE_QOS_BANK1122,"
hexmask.quad.byte 0x3D0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3D0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3D0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3D0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3D0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3D0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3D0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3D0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3D0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3D8 "QOSBW_BE_QOS_BANK1123,"
hexmask.quad.byte 0x3D8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3D8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3D8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3D8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3D8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3D8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3D8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3D8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3D8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3E0 "QOSBW_BE_QOS_BANK1124,"
hexmask.quad.byte 0x3E0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3E0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3E0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3E0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3E0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3E0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3E0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3E0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3E0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3E8 "QOSBW_BE_QOS_BANK1125,"
hexmask.quad.byte 0x3E8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3E8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3E8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3E8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3E8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3E8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3E8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3E8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3E8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3F0 "QOSBW_BE_QOS_BANK1126,"
hexmask.quad.byte 0x3F0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3F0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3F0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3F0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3F0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3F0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3F0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3F0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3F0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x3F8 "QOSBW_BE_QOS_BANK1127,"
hexmask.quad.byte 0x3F8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x3F8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x3F8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x3F8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x3F8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x3F8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x3F8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x3F8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x3F8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x400 "QOSBW_BE_QOS_BANK1128,"
hexmask.quad.byte 0x400 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x400 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x400 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x400 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x400 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x400 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x400 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x400 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x400 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x408 "QOSBW_BE_QOS_BANK1129,"
hexmask.quad.byte 0x408 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x408 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x408 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x408 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x408 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x408 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x408 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x408 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x408 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x410 "QOSBW_BE_QOS_BANK1130,"
hexmask.quad.byte 0x410 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x410 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x410 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x410 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x410 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x410 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x410 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x410 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x410 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x418 "QOSBW_BE_QOS_BANK1131,"
hexmask.quad.byte 0x418 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x418 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x418 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x418 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x418 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x418 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x418 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x418 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x418 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x420 "QOSBW_BE_QOS_BANK1132,"
hexmask.quad.byte 0x420 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x420 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x420 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x420 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x420 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x420 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x420 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x420 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x420 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x428 "QOSBW_BE_QOS_BANK1133,"
hexmask.quad.byte 0x428 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x428 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x428 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x428 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x428 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x428 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x428 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x428 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x428 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x430 "QOSBW_BE_QOS_BANK1134,"
hexmask.quad.byte 0x430 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x430 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x430 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x430 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x430 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x430 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x430 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x430 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x430 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x438 "QOSBW_BE_QOS_BANK1135,"
hexmask.quad.byte 0x438 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x438 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x438 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x438 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x438 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x438 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x438 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x438 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x438 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x440 "QOSBW_BE_QOS_BANK1136,"
hexmask.quad.byte 0x440 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x440 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x440 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x440 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x440 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x440 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x440 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x440 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x440 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x448 "QOSBW_BE_QOS_BANK1137,"
hexmask.quad.byte 0x448 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x448 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x448 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x448 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x448 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x448 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x448 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x448 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x448 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x450 "QOSBW_BE_QOS_BANK1138,"
hexmask.quad.byte 0x450 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x450 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x450 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x450 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x450 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x450 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x450 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x450 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x450 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x458 "QOSBW_BE_QOS_BANK1139,"
hexmask.quad.byte 0x458 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x458 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x458 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x458 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x458 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x458 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x458 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x458 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x458 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x460 "QOSBW_BE_QOS_BANK1140,"
hexmask.quad.byte 0x460 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x460 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x460 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x460 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x460 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x460 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x460 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x460 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x460 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x468 "QOSBW_BE_QOS_BANK1141,"
hexmask.quad.byte 0x468 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x468 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x468 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x468 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x468 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x468 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x468 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x468 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x468 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x470 "QOSBW_BE_QOS_BANK1142,"
hexmask.quad.byte 0x470 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x470 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x470 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x470 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x470 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x470 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x470 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x470 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x470 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x478 "QOSBW_BE_QOS_BANK1143,"
hexmask.quad.byte 0x478 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x478 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x478 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x478 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x478 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x478 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x478 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x478 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x478 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x480 "QOSBW_BE_QOS_BANK1144,"
hexmask.quad.byte 0x480 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x480 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x480 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x480 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x480 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x480 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x480 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x480 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x480 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x488 "QOSBW_BE_QOS_BANK1145,"
hexmask.quad.byte 0x488 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x488 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x488 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x488 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x488 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x488 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x488 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x488 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x488 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x490 "QOSBW_BE_QOS_BANK1146,"
hexmask.quad.byte 0x490 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x490 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x490 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x490 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x490 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x490 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x490 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x490 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x490 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x498 "QOSBW_BE_QOS_BANK1147,"
hexmask.quad.byte 0x498 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x498 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x498 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x498 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x498 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x498 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x498 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x498 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x498 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4A0 "QOSBW_BE_QOS_BANK1148,"
hexmask.quad.byte 0x4A0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4A0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4A0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4A0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4A0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4A0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4A0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4A0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4A0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4A8 "QOSBW_BE_QOS_BANK1149,"
hexmask.quad.byte 0x4A8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4A8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4A8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4A8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4A8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4A8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4A8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4A8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4A8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4B0 "QOSBW_BE_QOS_BANK1150,"
hexmask.quad.byte 0x4B0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4B0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4B0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4B0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4B0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4B0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4B0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4B0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4B0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4B8 "QOSBW_BE_QOS_BANK1151,"
hexmask.quad.byte 0x4B8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4B8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4B8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4B8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4B8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4B8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4B8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4B8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4B8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4C0 "QOSBW_BE_QOS_BANK1152,"
hexmask.quad.byte 0x4C0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4C0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4C0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4C0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4C0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4C0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4C0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4C0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4C0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4C8 "QOSBW_BE_QOS_BANK1153,"
hexmask.quad.byte 0x4C8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4C8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4C8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4C8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4C8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4C8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4C8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4C8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4C8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4D0 "QOSBW_BE_QOS_BANK1154,"
hexmask.quad.byte 0x4D0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4D0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4D0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4D0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4D0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4D0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4D0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4D0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4D0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4D8 "QOSBW_BE_QOS_BANK1155,"
hexmask.quad.byte 0x4D8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4D8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4D8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4D8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4D8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4D8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4D8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4D8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4D8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4E0 "QOSBW_BE_QOS_BANK1156,"
hexmask.quad.byte 0x4E0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4E0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4E0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4E0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4E0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4E0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4E0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4E0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4E0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4E8 "QOSBW_BE_QOS_BANK1157,"
hexmask.quad.byte 0x4E8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4E8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4E8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4E8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4E8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4E8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4E8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4E8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4E8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4F0 "QOSBW_BE_QOS_BANK1158,"
hexmask.quad.byte 0x4F0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4F0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4F0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4F0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4F0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4F0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4F0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4F0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4F0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x4F8 "QOSBW_BE_QOS_BANK1159,"
hexmask.quad.byte 0x4F8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x4F8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x4F8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x4F8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x4F8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x4F8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x4F8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x4F8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x4F8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x500 "QOSBW_BE_QOS_BANK1160,"
hexmask.quad.byte 0x500 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x500 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x500 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x500 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x500 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x500 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x500 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x500 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x500 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x508 "QOSBW_BE_QOS_BANK1161,"
hexmask.quad.byte 0x508 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x508 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x508 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x508 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x508 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x508 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x508 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x508 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x508 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x510 "QOSBW_BE_QOS_BANK1162,"
hexmask.quad.byte 0x510 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x510 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x510 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x510 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x510 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x510 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x510 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x510 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x510 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x518 "QOSBW_BE_QOS_BANK1163,"
hexmask.quad.byte 0x518 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x518 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x518 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x518 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x518 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x518 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x518 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x518 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x518 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x520 "QOSBW_BE_QOS_BANK1164,"
hexmask.quad.byte 0x520 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x520 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x520 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x520 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x520 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x520 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x520 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x520 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x520 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x528 "QOSBW_BE_QOS_BANK1165,"
hexmask.quad.byte 0x528 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x528 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x528 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x528 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x528 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x528 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x528 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x528 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x528 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x530 "QOSBW_BE_QOS_BANK1166,"
hexmask.quad.byte 0x530 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x530 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x530 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x530 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x530 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x530 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x530 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x530 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x530 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x538 "QOSBW_BE_QOS_BANK1167,"
hexmask.quad.byte 0x538 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x538 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x538 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x538 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x538 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x538 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x538 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x538 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x538 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x540 "QOSBW_BE_QOS_BANK1168,"
hexmask.quad.byte 0x540 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x540 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x540 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x540 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x540 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x540 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x540 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x540 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x540 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x548 "QOSBW_BE_QOS_BANK1169,"
hexmask.quad.byte 0x548 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x548 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x548 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x548 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x548 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x548 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x548 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x548 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x548 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x550 "QOSBW_BE_QOS_BANK1170,"
hexmask.quad.byte 0x550 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x550 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x550 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x550 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x550 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x550 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x550 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x550 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x550 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x558 "QOSBW_BE_QOS_BANK1171,"
hexmask.quad.byte 0x558 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x558 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x558 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x558 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x558 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x558 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x558 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x558 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x558 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x560 "QOSBW_BE_QOS_BANK1172,"
hexmask.quad.byte 0x560 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x560 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x560 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x560 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x560 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x560 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x560 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x560 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x560 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x568 "QOSBW_BE_QOS_BANK1173,"
hexmask.quad.byte 0x568 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x568 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x568 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x568 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x568 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x568 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x568 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x568 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x568 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x570 "QOSBW_BE_QOS_BANK1174,"
hexmask.quad.byte 0x570 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x570 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x570 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x570 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x570 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x570 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x570 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x570 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x570 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x578 "QOSBW_BE_QOS_BANK1175,"
hexmask.quad.byte 0x578 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x578 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x578 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x578 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x578 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x578 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x578 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x578 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x578 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x580 "QOSBW_BE_QOS_BANK1176,"
hexmask.quad.byte 0x580 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x580 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x580 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x580 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x580 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x580 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x580 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x580 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x580 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x588 "QOSBW_BE_QOS_BANK1177,"
hexmask.quad.byte 0x588 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x588 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x588 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x588 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x588 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x588 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x588 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x588 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x588 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x590 "QOSBW_BE_QOS_BANK1178,"
hexmask.quad.byte 0x590 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x590 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x590 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x590 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x590 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x590 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x590 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x590 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x590 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x598 "QOSBW_BE_QOS_BANK1179,"
hexmask.quad.byte 0x598 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x598 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x598 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x598 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x598 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x598 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x598 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x598 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x598 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5A0 "QOSBW_BE_QOS_BANK1180,"
hexmask.quad.byte 0x5A0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5A0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5A0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5A0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5A0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5A0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5A0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5A0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5A0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5A8 "QOSBW_BE_QOS_BANK1181,"
hexmask.quad.byte 0x5A8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5A8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5A8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5A8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5A8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5A8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5A8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5A8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5A8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5B0 "QOSBW_BE_QOS_BANK1182,"
hexmask.quad.byte 0x5B0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5B0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5B0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5B0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5B0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5B0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5B0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5B0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5B0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5B8 "QOSBW_BE_QOS_BANK1183,"
hexmask.quad.byte 0x5B8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5B8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5B8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5B8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5B8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5B8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5B8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5B8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5B8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5C0 "QOSBW_BE_QOS_BANK1184,"
hexmask.quad.byte 0x5C0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5C0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5C0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5C0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5C0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5C0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5C0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5C0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5C0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5C8 "QOSBW_BE_QOS_BANK1185,"
hexmask.quad.byte 0x5C8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5C8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5C8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5C8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5C8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5C8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5C8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5C8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5C8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5D0 "QOSBW_BE_QOS_BANK1186,"
hexmask.quad.byte 0x5D0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5D0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5D0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5D0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5D0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5D0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5D0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5D0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5D0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5D8 "QOSBW_BE_QOS_BANK1187,"
hexmask.quad.byte 0x5D8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5D8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5D8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5D8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5D8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5D8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5D8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5D8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5D8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5E0 "QOSBW_BE_QOS_BANK1188,"
hexmask.quad.byte 0x5E0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5E0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5E0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5E0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5E0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5E0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5E0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5E0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5E0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5E8 "QOSBW_BE_QOS_BANK1189,"
hexmask.quad.byte 0x5E8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5E8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5E8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5E8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5E8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5E8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5E8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5E8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5E8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5F0 "QOSBW_BE_QOS_BANK1190,"
hexmask.quad.byte 0x5F0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5F0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5F0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5F0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5F0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5F0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5F0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5F0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5F0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x5F8 "QOSBW_BE_QOS_BANK1191,"
hexmask.quad.byte 0x5F8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x5F8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x5F8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x5F8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x5F8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x5F8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x5F8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x5F8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x5F8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x600 "QOSBW_BE_QOS_BANK1192,"
hexmask.quad.byte 0x600 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x600 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x600 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x600 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x600 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x600 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x600 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x600 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x600 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x608 "QOSBW_BE_QOS_BANK1193,"
hexmask.quad.byte 0x608 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x608 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x608 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x608 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x608 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x608 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x608 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x608 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x608 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x610 "QOSBW_BE_QOS_BANK1194,"
hexmask.quad.byte 0x610 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x610 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x610 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x610 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x610 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x610 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x610 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x610 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x610 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x618 "QOSBW_BE_QOS_BANK1195,"
hexmask.quad.byte 0x618 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x618 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x618 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x618 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x618 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x618 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x618 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x618 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x618 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x620 "QOSBW_BE_QOS_BANK1196,"
hexmask.quad.byte 0x620 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x620 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x620 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x620 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x620 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x620 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x620 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x620 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x620 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x628 "QOSBW_BE_QOS_BANK1197,"
hexmask.quad.byte 0x628 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x628 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x628 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x628 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x628 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x628 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x628 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x628 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x628 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x630 "QOSBW_BE_QOS_BANK1198,"
hexmask.quad.byte 0x630 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x630 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x630 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x630 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x630 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x630 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x630 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x630 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x630 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x638 "QOSBW_BE_QOS_BANK1199,"
hexmask.quad.byte 0x638 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x638 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x638 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x638 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x638 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x638 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x638 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x638 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x638 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x640 "QOSBW_BE_QOS_BANK1200,"
hexmask.quad.byte 0x640 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x640 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x640 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x640 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x640 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x640 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x640 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x640 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x640 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x648 "QOSBW_BE_QOS_BANK1201,"
hexmask.quad.byte 0x648 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x648 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x648 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x648 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x648 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x648 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x648 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x648 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x648 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x650 "QOSBW_BE_QOS_BANK1202,"
hexmask.quad.byte 0x650 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x650 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x650 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x650 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x650 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x650 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x650 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x650 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x650 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x658 "QOSBW_BE_QOS_BANK1203,"
hexmask.quad.byte 0x658 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x658 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x658 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x658 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x658 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x658 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x658 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x658 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x658 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x660 "QOSBW_BE_QOS_BANK1204,"
hexmask.quad.byte 0x660 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x660 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x660 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x660 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x660 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x660 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x660 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x660 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x660 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x668 "QOSBW_BE_QOS_BANK1205,"
hexmask.quad.byte 0x668 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x668 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x668 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x668 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x668 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x668 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x668 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x668 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x668 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x670 "QOSBW_BE_QOS_BANK1206,"
hexmask.quad.byte 0x670 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x670 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x670 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x670 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x670 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x670 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x670 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x670 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x670 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x678 "QOSBW_BE_QOS_BANK1207,"
hexmask.quad.byte 0x678 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x678 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x678 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x678 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x678 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x678 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x678 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x678 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x678 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x680 "QOSBW_BE_QOS_BANK1208,"
hexmask.quad.byte 0x680 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x680 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x680 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x680 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x680 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x680 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x680 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x680 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x680 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x688 "QOSBW_BE_QOS_BANK1209,"
hexmask.quad.byte 0x688 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x688 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x688 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x688 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x688 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x688 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x688 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x688 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x688 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x690 "QOSBW_BE_QOS_BANK1210,"
hexmask.quad.byte 0x690 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x690 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x690 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x690 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x690 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x690 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x690 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x690 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x690 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x698 "QOSBW_BE_QOS_BANK1211,"
hexmask.quad.byte 0x698 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x698 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x698 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x698 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x698 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x698 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x698 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x698 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x698 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6A0 "QOSBW_BE_QOS_BANK1212,"
hexmask.quad.byte 0x6A0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6A0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6A0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6A0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6A0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6A0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6A0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6A0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6A0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6A8 "QOSBW_BE_QOS_BANK1213,"
hexmask.quad.byte 0x6A8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6A8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6A8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6A8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6A8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6A8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6A8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6A8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6A8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6B0 "QOSBW_BE_QOS_BANK1214,"
hexmask.quad.byte 0x6B0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6B0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6B0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6B0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6B0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6B0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6B0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6B0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6B0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6B8 "QOSBW_BE_QOS_BANK1215,"
hexmask.quad.byte 0x6B8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6B8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6B8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6B8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6B8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6B8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6B8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6B8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6B8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6C0 "QOSBW_BE_QOS_BANK1216,"
hexmask.quad.byte 0x6C0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6C0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6C0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6C0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6C0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6C0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6C0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6C0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6C0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6C8 "QOSBW_BE_QOS_BANK1217,"
hexmask.quad.byte 0x6C8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6C8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6C8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6C8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6C8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6C8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6C8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6C8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6C8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6D0 "QOSBW_BE_QOS_BANK1218,"
hexmask.quad.byte 0x6D0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6D0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6D0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6D0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6D0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6D0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6D0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6D0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6D0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6D8 "QOSBW_BE_QOS_BANK1219,"
hexmask.quad.byte 0x6D8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6D8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6D8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6D8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6D8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6D8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6D8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6D8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6D8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6E0 "QOSBW_BE_QOS_BANK1220,"
hexmask.quad.byte 0x6E0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6E0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6E0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6E0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6E0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6E0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6E0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6E0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6E0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6E8 "QOSBW_BE_QOS_BANK1221,"
hexmask.quad.byte 0x6E8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6E8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6E8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6E8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6E8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6E8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6E8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6E8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6E8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6F0 "QOSBW_BE_QOS_BANK1222,"
hexmask.quad.byte 0x6F0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6F0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6F0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6F0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6F0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6F0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6F0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6F0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6F0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x6F8 "QOSBW_BE_QOS_BANK1223,"
hexmask.quad.byte 0x6F8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x6F8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x6F8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x6F8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x6F8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x6F8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x6F8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x6F8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x6F8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x700 "QOSBW_BE_QOS_BANK1224,"
hexmask.quad.byte 0x700 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x700 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x700 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x700 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x700 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x700 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x700 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x700 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x700 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x708 "QOSBW_BE_QOS_BANK1225,"
hexmask.quad.byte 0x708 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x708 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x708 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x708 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x708 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x708 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x708 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x708 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x708 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x710 "QOSBW_BE_QOS_BANK1226,"
hexmask.quad.byte 0x710 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x710 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x710 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x710 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x710 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x710 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x710 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x710 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x710 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x718 "QOSBW_BE_QOS_BANK1227,"
hexmask.quad.byte 0x718 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x718 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x718 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x718 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x718 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x718 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x718 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x718 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x718 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x720 "QOSBW_BE_QOS_BANK1228,"
hexmask.quad.byte 0x720 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x720 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x720 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x720 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x720 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x720 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x720 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x720 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x720 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x728 "QOSBW_BE_QOS_BANK1229,"
hexmask.quad.byte 0x728 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x728 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x728 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x728 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x728 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x728 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x728 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x728 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x728 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x730 "QOSBW_BE_QOS_BANK1230,"
hexmask.quad.byte 0x730 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x730 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x730 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x730 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x730 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x730 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x730 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x730 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x730 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x738 "QOSBW_BE_QOS_BANK1231,"
hexmask.quad.byte 0x738 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x738 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x738 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x738 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x738 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x738 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x738 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x738 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x738 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x740 "QOSBW_BE_QOS_BANK1232,"
hexmask.quad.byte 0x740 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x740 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x740 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x740 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x740 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x740 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x740 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x740 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x740 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x748 "QOSBW_BE_QOS_BANK1233,"
hexmask.quad.byte 0x748 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x748 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x748 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x748 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x748 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x748 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x748 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x748 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x748 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x750 "QOSBW_BE_QOS_BANK1234,"
hexmask.quad.byte 0x750 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x750 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x750 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x750 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x750 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x750 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x750 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x750 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x750 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x758 "QOSBW_BE_QOS_BANK1235,"
hexmask.quad.byte 0x758 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x758 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x758 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x758 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x758 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x758 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x758 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x758 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x758 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x760 "QOSBW_BE_QOS_BANK1236,"
hexmask.quad.byte 0x760 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x760 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x760 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x760 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x760 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x760 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x760 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x760 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x760 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x768 "QOSBW_BE_QOS_BANK1237,"
hexmask.quad.byte 0x768 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x768 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x768 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x768 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x768 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x768 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x768 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x768 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x768 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x770 "QOSBW_BE_QOS_BANK1238,"
hexmask.quad.byte 0x770 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x770 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x770 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x770 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x770 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x770 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x770 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x770 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x770 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x778 "QOSBW_BE_QOS_BANK1239,"
hexmask.quad.byte 0x778 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x778 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x778 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x778 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x778 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x778 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x778 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x778 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x778 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x780 "QOSBW_BE_QOS_BANK1240,"
hexmask.quad.byte 0x780 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x780 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x780 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x780 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x780 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x780 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x780 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x780 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x780 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x788 "QOSBW_BE_QOS_BANK1241,"
hexmask.quad.byte 0x788 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x788 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x788 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x788 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x788 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x788 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x788 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x788 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x788 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x790 "QOSBW_BE_QOS_BANK1242,"
hexmask.quad.byte 0x790 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x790 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x790 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x790 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x790 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x790 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x790 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x790 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x790 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x798 "QOSBW_BE_QOS_BANK1243,"
hexmask.quad.byte 0x798 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x798 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x798 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x798 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x798 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x798 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x798 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x798 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x798 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7A0 "QOSBW_BE_QOS_BANK1244,"
hexmask.quad.byte 0x7A0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7A0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7A0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7A0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7A0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7A0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7A0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7A0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7A0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7A8 "QOSBW_BE_QOS_BANK1245,"
hexmask.quad.byte 0x7A8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7A8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7A8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7A8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7A8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7A8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7A8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7A8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7A8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7B0 "QOSBW_BE_QOS_BANK1246,"
hexmask.quad.byte 0x7B0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7B0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7B0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7B0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7B0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7B0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7B0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7B0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7B0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7B8 "QOSBW_BE_QOS_BANK1247,"
hexmask.quad.byte 0x7B8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7B8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7B8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7B8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7B8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7B8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7B8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7B8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7B8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7C0 "QOSBW_BE_QOS_BANK1248,"
hexmask.quad.byte 0x7C0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7C0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7C0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7C0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7C0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7C0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7C0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7C0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7C0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7C8 "QOSBW_BE_QOS_BANK1249,"
hexmask.quad.byte 0x7C8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7C8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7C8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7C8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7C8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7C8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7C8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7C8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7C8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7D0 "QOSBW_BE_QOS_BANK1250,"
hexmask.quad.byte 0x7D0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7D0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7D0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7D0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7D0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7D0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7D0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7D0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7D0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7D8 "QOSBW_BE_QOS_BANK1251,"
hexmask.quad.byte 0x7D8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7D8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7D8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7D8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7D8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7D8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7D8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7D8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7D8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7E0 "QOSBW_BE_QOS_BANK1252,"
hexmask.quad.byte 0x7E0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7E0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7E0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7E0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7E0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7E0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7E0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7E0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7E0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7E8 "QOSBW_BE_QOS_BANK1253,"
hexmask.quad.byte 0x7E8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7E8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7E8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7E8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7E8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7E8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7E8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7E8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7E8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7F0 "QOSBW_BE_QOS_BANK1254,"
hexmask.quad.byte 0x7F0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7F0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7F0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7F0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7F0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7F0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7F0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7F0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7F0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x7F8 "QOSBW_BE_QOS_BANK1255,"
hexmask.quad.byte 0x7F8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x7F8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x7F8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x7F8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x7F8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x7F8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x7F8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x7F8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x7F8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x800 "QOSBW_BE_QOS_BANK1256,"
hexmask.quad.byte 0x800 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x800 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x800 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x800 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x800 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x800 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x800 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x800 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x800 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x808 "QOSBW_BE_QOS_BANK1257,"
hexmask.quad.byte 0x808 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x808 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x808 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x808 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x808 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x808 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x808 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x808 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x808 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x810 "QOSBW_BE_QOS_BANK1258,"
hexmask.quad.byte 0x810 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x810 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x810 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x810 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x810 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x810 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x810 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x810 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x810 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x818 "QOSBW_BE_QOS_BANK1259,"
hexmask.quad.byte 0x818 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x818 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x818 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x818 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x818 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x818 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x818 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x818 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x818 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x820 "QOSBW_BE_QOS_BANK1260,"
hexmask.quad.byte 0x820 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x820 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x820 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x820 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x820 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x820 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x820 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x820 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x820 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x828 "QOSBW_BE_QOS_BANK1261,"
hexmask.quad.byte 0x828 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x828 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x828 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x828 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x828 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x828 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x828 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x828 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x828 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x830 "QOSBW_BE_QOS_BANK1262,"
hexmask.quad.byte 0x830 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x830 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x830 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x830 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x830 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x830 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x830 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x830 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x830 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x838 "QOSBW_BE_QOS_BANK1263,"
hexmask.quad.byte 0x838 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x838 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x838 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x838 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x838 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x838 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x838 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x838 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x838 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x840 "QOSBW_BE_QOS_BANK1264,"
hexmask.quad.byte 0x840 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x840 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x840 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x840 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x840 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x840 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x840 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x840 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x840 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x848 "QOSBW_BE_QOS_BANK1265,"
hexmask.quad.byte 0x848 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x848 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x848 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x848 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x848 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x848 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x848 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x848 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x848 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x850 "QOSBW_BE_QOS_BANK1266,"
hexmask.quad.byte 0x850 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x850 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x850 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x850 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x850 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x850 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x850 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x850 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x850 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x858 "QOSBW_BE_QOS_BANK1267,"
hexmask.quad.byte 0x858 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x858 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x858 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x858 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x858 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x858 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x858 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x858 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x858 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x860 "QOSBW_BE_QOS_BANK1268,"
hexmask.quad.byte 0x860 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x860 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x860 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x860 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x860 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x860 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x860 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x860 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x860 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x868 "QOSBW_BE_QOS_BANK1269,"
hexmask.quad.byte 0x868 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x868 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x868 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x868 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x868 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x868 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x868 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x868 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x868 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x870 "QOSBW_BE_QOS_BANK1270,"
hexmask.quad.byte 0x870 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x870 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x870 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x870 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x870 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x870 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x870 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x870 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x870 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x878 "QOSBW_BE_QOS_BANK1271,"
hexmask.quad.byte 0x878 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x878 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x878 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x878 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x878 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x878 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x878 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x878 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x878 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x880 "QOSBW_BE_QOS_BANK1272,"
hexmask.quad.byte 0x880 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x880 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x880 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x880 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x880 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x880 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x880 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x880 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x880 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x888 "QOSBW_BE_QOS_BANK1273,"
hexmask.quad.byte 0x888 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x888 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x888 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x888 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x888 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x888 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x888 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x888 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x888 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x890 "QOSBW_BE_QOS_BANK1274,"
hexmask.quad.byte 0x890 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x890 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x890 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x890 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x890 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x890 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x890 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x890 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x890 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x898 "QOSBW_BE_QOS_BANK1275,"
hexmask.quad.byte 0x898 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x898 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x898 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x898 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x898 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x898 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x898 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x898 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x898 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8A0 "QOSBW_BE_QOS_BANK1276,"
hexmask.quad.byte 0x8A0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8A0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8A0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8A0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8A0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8A0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8A0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8A0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8A0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8A8 "QOSBW_BE_QOS_BANK1277,"
hexmask.quad.byte 0x8A8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8A8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8A8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8A8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8A8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8A8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8A8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8A8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8A8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8B0 "QOSBW_BE_QOS_BANK1278,"
hexmask.quad.byte 0x8B0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8B0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8B0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8B0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8B0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8B0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8B0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8B0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8B0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8B8 "QOSBW_BE_QOS_BANK1279,"
hexmask.quad.byte 0x8B8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8B8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8B8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8B8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8B8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8B8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8B8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8B8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8B8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8C0 "QOSBW_BE_QOS_BANK1280,"
hexmask.quad.byte 0x8C0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8C0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8C0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8C0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8C0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8C0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8C0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8C0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8C0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8C8 "QOSBW_BE_QOS_BANK1281,"
hexmask.quad.byte 0x8C8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8C8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8C8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8C8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8C8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8C8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8C8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8C8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8C8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8D0 "QOSBW_BE_QOS_BANK1282,"
hexmask.quad.byte 0x8D0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8D0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8D0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8D0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8D0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8D0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8D0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8D0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8D0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8D8 "QOSBW_BE_QOS_BANK1283,"
hexmask.quad.byte 0x8D8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8D8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8D8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8D8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8D8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8D8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8D8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8D8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8D8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8E0 "QOSBW_BE_QOS_BANK1284,"
hexmask.quad.byte 0x8E0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8E0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8E0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8E0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8E0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8E0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8E0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8E0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8E0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8E8 "QOSBW_BE_QOS_BANK1285,"
hexmask.quad.byte 0x8E8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8E8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8E8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8E8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8E8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8E8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8E8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8E8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8E8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8F0 "QOSBW_BE_QOS_BANK1286,"
hexmask.quad.byte 0x8F0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8F0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8F0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8F0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8F0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8F0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8F0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8F0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8F0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x8F8 "QOSBW_BE_QOS_BANK1287,"
hexmask.quad.byte 0x8F8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x8F8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x8F8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x8F8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x8F8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x8F8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x8F8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x8F8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x8F8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x900 "QOSBW_BE_QOS_BANK1288,"
hexmask.quad.byte 0x900 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x900 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x900 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x900 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x900 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x900 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x900 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x900 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x900 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x908 "QOSBW_BE_QOS_BANK1289,"
hexmask.quad.byte 0x908 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x908 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x908 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x908 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x908 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x908 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x908 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x908 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x908 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x910 "QOSBW_BE_QOS_BANK1290,"
hexmask.quad.byte 0x910 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x910 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x910 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x910 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x910 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x910 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x910 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x910 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x910 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x918 "QOSBW_BE_QOS_BANK1291,"
hexmask.quad.byte 0x918 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x918 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x918 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x918 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x918 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x918 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x918 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x918 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x918 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x920 "QOSBW_BE_QOS_BANK1292,"
hexmask.quad.byte 0x920 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x920 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x920 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x920 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x920 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x920 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x920 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x920 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x920 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x928 "QOSBW_BE_QOS_BANK1293,"
hexmask.quad.byte 0x928 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x928 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x928 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x928 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x928 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x928 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x928 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x928 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x928 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x930 "QOSBW_BE_QOS_BANK1294,"
hexmask.quad.byte 0x930 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x930 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x930 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x930 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x930 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x930 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x930 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x930 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x930 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x938 "QOSBW_BE_QOS_BANK1295,"
hexmask.quad.byte 0x938 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x938 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x938 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x938 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x938 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x938 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x938 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x938 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x938 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x940 "QOSBW_BE_QOS_BANK1296,"
hexmask.quad.byte 0x940 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x940 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x940 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x940 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x940 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x940 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x940 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x940 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x940 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x948 "QOSBW_BE_QOS_BANK1297,"
hexmask.quad.byte 0x948 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x948 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x948 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x948 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x948 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x948 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x948 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x948 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x948 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x950 "QOSBW_BE_QOS_BANK1298,"
hexmask.quad.byte 0x950 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x950 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x950 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x950 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x950 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x950 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x950 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x950 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x950 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x958 "QOSBW_BE_QOS_BANK1299,"
hexmask.quad.byte 0x958 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x958 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x958 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x958 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x958 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x958 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x958 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x958 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x958 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x960 "QOSBW_BE_QOS_BANK1300,"
hexmask.quad.byte 0x960 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x960 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x960 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x960 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x960 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x960 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x960 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x960 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x960 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x968 "QOSBW_BE_QOS_BANK1301,"
hexmask.quad.byte 0x968 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x968 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x968 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x968 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x968 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x968 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x968 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x968 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x968 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x970 "QOSBW_BE_QOS_BANK1302,"
hexmask.quad.byte 0x970 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x970 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x970 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x970 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x970 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x970 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x970 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x970 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x970 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x978 "QOSBW_BE_QOS_BANK1303,"
hexmask.quad.byte 0x978 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x978 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x978 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x978 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x978 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x978 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x978 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x978 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x978 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x980 "QOSBW_BE_QOS_BANK1304,"
hexmask.quad.byte 0x980 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x980 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x980 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x980 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x980 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x980 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x980 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x980 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x980 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x988 "QOSBW_BE_QOS_BANK1305,"
hexmask.quad.byte 0x988 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x988 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x988 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x988 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x988 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x988 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x988 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x988 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x988 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x990 "QOSBW_BE_QOS_BANK1306,"
hexmask.quad.byte 0x990 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x990 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x990 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x990 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x990 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x990 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x990 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x990 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x990 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x998 "QOSBW_BE_QOS_BANK1307,"
hexmask.quad.byte 0x998 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x998 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x998 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x998 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x998 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x998 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x998 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x998 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x998 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9A0 "QOSBW_BE_QOS_BANK1308,"
hexmask.quad.byte 0x9A0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9A0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9A0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9A0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9A0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9A0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9A0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9A0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9A0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9A8 "QOSBW_BE_QOS_BANK1309,"
hexmask.quad.byte 0x9A8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9A8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9A8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9A8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9A8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9A8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9A8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9A8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9A8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9B0 "QOSBW_BE_QOS_BANK1310,"
hexmask.quad.byte 0x9B0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9B0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9B0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9B0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9B0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9B0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9B0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9B0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9B0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9B8 "QOSBW_BE_QOS_BANK1311,"
hexmask.quad.byte 0x9B8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9B8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9B8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9B8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9B8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9B8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9B8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9B8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9B8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9C0 "QOSBW_BE_QOS_BANK1312,"
hexmask.quad.byte 0x9C0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9C0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9C0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9C0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9C0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9C0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9C0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9C0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9C0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9C8 "QOSBW_BE_QOS_BANK1313,"
hexmask.quad.byte 0x9C8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9C8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9C8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9C8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9C8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9C8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9C8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9C8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9C8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9D0 "QOSBW_BE_QOS_BANK1314,"
hexmask.quad.byte 0x9D0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9D0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9D0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9D0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9D0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9D0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9D0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9D0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9D0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9D8 "QOSBW_BE_QOS_BANK1315,"
hexmask.quad.byte 0x9D8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9D8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9D8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9D8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9D8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9D8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9D8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9D8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9D8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9E0 "QOSBW_BE_QOS_BANK1316,"
hexmask.quad.byte 0x9E0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9E0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9E0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9E0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9E0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9E0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9E0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9E0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9E0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9E8 "QOSBW_BE_QOS_BANK1317,"
hexmask.quad.byte 0x9E8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9E8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9E8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9E8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9E8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9E8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9E8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9E8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9E8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9F0 "QOSBW_BE_QOS_BANK1318,"
hexmask.quad.byte 0x9F0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9F0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9F0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9F0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9F0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9F0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9F0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9F0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9F0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0x9F8 "QOSBW_BE_QOS_BANK1319,"
hexmask.quad.byte 0x9F8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0x9F8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x9F8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0x9F8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0x9F8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0x9F8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0x9F8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0x9F8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0x9F8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA00 "QOSBW_BE_QOS_BANK1320,"
hexmask.quad.byte 0xA00 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA00 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA00 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA00 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA00 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA00 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA00 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA00 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA00 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA08 "QOSBW_BE_QOS_BANK1321,"
hexmask.quad.byte 0xA08 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA08 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA08 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA08 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA08 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA08 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA08 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA08 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA08 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA10 "QOSBW_BE_QOS_BANK1322,"
hexmask.quad.byte 0xA10 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA10 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA10 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA10 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA10 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA10 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA10 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA10 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA10 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA18 "QOSBW_BE_QOS_BANK1323,"
hexmask.quad.byte 0xA18 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA18 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA18 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA18 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA18 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA18 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA18 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA18 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA18 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA20 "QOSBW_BE_QOS_BANK1324,"
hexmask.quad.byte 0xA20 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA20 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA20 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA20 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA20 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA20 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA20 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA20 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA20 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA28 "QOSBW_BE_QOS_BANK1325,"
hexmask.quad.byte 0xA28 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA28 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA28 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA28 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA28 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA28 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA28 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA28 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA28 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA30 "QOSBW_BE_QOS_BANK1326,"
hexmask.quad.byte 0xA30 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA30 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA30 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA30 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA30 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA30 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA30 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA30 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA30 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA38 "QOSBW_BE_QOS_BANK1327,"
hexmask.quad.byte 0xA38 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA38 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA38 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA38 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA38 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA38 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA38 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA38 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA38 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA40 "QOSBW_BE_QOS_BANK1328,"
hexmask.quad.byte 0xA40 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA40 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA40 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA40 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA40 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA40 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA40 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA40 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA40 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA48 "QOSBW_BE_QOS_BANK1329,"
hexmask.quad.byte 0xA48 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA48 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA48 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA48 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA48 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA48 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA48 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA48 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA48 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA50 "QOSBW_BE_QOS_BANK1330,"
hexmask.quad.byte 0xA50 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA50 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA50 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA50 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA50 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA50 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA50 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA50 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA50 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA58 "QOSBW_BE_QOS_BANK1331,"
hexmask.quad.byte 0xA58 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA58 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA58 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA58 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA58 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA58 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA58 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA58 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA58 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA60 "QOSBW_BE_QOS_BANK1332,"
hexmask.quad.byte 0xA60 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA60 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA60 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA60 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA60 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA60 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA60 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA60 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA60 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA68 "QOSBW_BE_QOS_BANK1333,"
hexmask.quad.byte 0xA68 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA68 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA68 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA68 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA68 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA68 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA68 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA68 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA68 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA70 "QOSBW_BE_QOS_BANK1334,"
hexmask.quad.byte 0xA70 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA70 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA70 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA70 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA70 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA70 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA70 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA70 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA70 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA78 "QOSBW_BE_QOS_BANK1335,"
hexmask.quad.byte 0xA78 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA78 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA78 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA78 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA78 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA78 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA78 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA78 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA78 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA80 "QOSBW_BE_QOS_BANK1336,"
hexmask.quad.byte 0xA80 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA80 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA80 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA80 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA80 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA80 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA80 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA80 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA80 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA88 "QOSBW_BE_QOS_BANK1337,"
hexmask.quad.byte 0xA88 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA88 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA88 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA88 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA88 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA88 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA88 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA88 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA88 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA90 "QOSBW_BE_QOS_BANK1338,"
hexmask.quad.byte 0xA90 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA90 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA90 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA90 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA90 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA90 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA90 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA90 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA90 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xA98 "QOSBW_BE_QOS_BANK1339,"
hexmask.quad.byte 0xA98 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xA98 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xA98 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xA98 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xA98 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xA98 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xA98 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xA98 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xA98 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAA0 "QOSBW_BE_QOS_BANK1340,"
hexmask.quad.byte 0xAA0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAA0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAA0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAA0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAA0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAA0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAA0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAA0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAA0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAA8 "QOSBW_BE_QOS_BANK1341,"
hexmask.quad.byte 0xAA8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAA8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAA8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAA8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAA8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAA8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAA8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAA8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAA8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAB0 "QOSBW_BE_QOS_BANK1342,"
hexmask.quad.byte 0xAB0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAB0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAB0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAB0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAB0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAB0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAB0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAB0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAB0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAB8 "QOSBW_BE_QOS_BANK1343,"
hexmask.quad.byte 0xAB8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAB8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAB8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAB8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAB8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAB8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAB8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAB8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAB8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAC0 "QOSBW_BE_QOS_BANK1344,"
hexmask.quad.byte 0xAC0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAC0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAC0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAC0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAC0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAC0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAC0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAC0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAC0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAC8 "QOSBW_BE_QOS_BANK1345,"
hexmask.quad.byte 0xAC8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAC8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAC8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAC8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAC8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAC8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAC8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAC8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAC8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAD0 "QOSBW_BE_QOS_BANK1346,"
hexmask.quad.byte 0xAD0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAD0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAD0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAD0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAD0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAD0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAD0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAD0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAD0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAD8 "QOSBW_BE_QOS_BANK1347,"
hexmask.quad.byte 0xAD8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAD8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAD8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAD8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAD8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAD8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAD8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAD8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAD8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAE0 "QOSBW_BE_QOS_BANK1348,"
hexmask.quad.byte 0xAE0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAE0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAE0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAE0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAE0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAE0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAE0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAE0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAE0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAE8 "QOSBW_BE_QOS_BANK1349,"
hexmask.quad.byte 0xAE8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAE8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAE8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAE8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAE8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAE8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAE8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAE8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAE8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAF0 "QOSBW_BE_QOS_BANK1350,"
hexmask.quad.byte 0xAF0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAF0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAF0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAF0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAF0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAF0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAF0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAF0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAF0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xAF8 "QOSBW_BE_QOS_BANK1351,"
hexmask.quad.byte 0xAF8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xAF8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xAF8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xAF8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xAF8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xAF8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xAF8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xAF8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xAF8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB00 "QOSBW_BE_QOS_BANK1352,"
hexmask.quad.byte 0xB00 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB00 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB00 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB00 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB00 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB00 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB00 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB00 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB00 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB08 "QOSBW_BE_QOS_BANK1353,"
hexmask.quad.byte 0xB08 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB08 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB08 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB08 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB08 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB08 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB08 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB08 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB08 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB10 "QOSBW_BE_QOS_BANK1354,"
hexmask.quad.byte 0xB10 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB10 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB10 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB10 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB10 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB10 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB10 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB10 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB10 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB18 "QOSBW_BE_QOS_BANK1355,"
hexmask.quad.byte 0xB18 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB18 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB18 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB18 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB18 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB18 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB18 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB18 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB18 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB20 "QOSBW_BE_QOS_BANK1356,"
hexmask.quad.byte 0xB20 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB20 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB20 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB20 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB20 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB20 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB20 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB20 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB20 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB28 "QOSBW_BE_QOS_BANK1357,"
hexmask.quad.byte 0xB28 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB28 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB28 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB28 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB28 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB28 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB28 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB28 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB28 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB30 "QOSBW_BE_QOS_BANK1358,"
hexmask.quad.byte 0xB30 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB30 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB30 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB30 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB30 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB30 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB30 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB30 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB30 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB38 "QOSBW_BE_QOS_BANK1359,"
hexmask.quad.byte 0xB38 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB38 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB38 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB38 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB38 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB38 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB38 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB38 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB38 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB40 "QOSBW_BE_QOS_BANK1360,"
hexmask.quad.byte 0xB40 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB40 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB40 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB40 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB40 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB40 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB40 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB40 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB40 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB48 "QOSBW_BE_QOS_BANK1361,"
hexmask.quad.byte 0xB48 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB48 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB48 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB48 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB48 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB48 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB48 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB48 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB48 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB50 "QOSBW_BE_QOS_BANK1362,"
hexmask.quad.byte 0xB50 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB50 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB50 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB50 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB50 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB50 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB50 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB50 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB50 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB58 "QOSBW_BE_QOS_BANK1363,"
hexmask.quad.byte 0xB58 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB58 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB58 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB58 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB58 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB58 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB58 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB58 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB58 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB60 "QOSBW_BE_QOS_BANK1364,"
hexmask.quad.byte 0xB60 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB60 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB60 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB60 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB60 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB60 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB60 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB60 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB60 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB68 "QOSBW_BE_QOS_BANK1365,"
hexmask.quad.byte 0xB68 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB68 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB68 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB68 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB68 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB68 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB68 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB68 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB68 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB70 "QOSBW_BE_QOS_BANK1366,"
hexmask.quad.byte 0xB70 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB70 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB70 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB70 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB70 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB70 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB70 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB70 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB70 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB78 "QOSBW_BE_QOS_BANK1367,"
hexmask.quad.byte 0xB78 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB78 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB78 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB78 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB78 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB78 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB78 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB78 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB78 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB80 "QOSBW_BE_QOS_BANK1368,"
hexmask.quad.byte 0xB80 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB80 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB80 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB80 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB80 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB80 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB80 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB80 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB80 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB88 "QOSBW_BE_QOS_BANK1369,"
hexmask.quad.byte 0xB88 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB88 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB88 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB88 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB88 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB88 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB88 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB88 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB88 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB90 "QOSBW_BE_QOS_BANK1370,"
hexmask.quad.byte 0xB90 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB90 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB90 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB90 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB90 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB90 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB90 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB90 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB90 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xB98 "QOSBW_BE_QOS_BANK1371,"
hexmask.quad.byte 0xB98 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xB98 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xB98 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xB98 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xB98 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xB98 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xB98 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xB98 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xB98 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBA0 "QOSBW_BE_QOS_BANK1372,"
hexmask.quad.byte 0xBA0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBA0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBA0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBA0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBA0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBA0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBA0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBA0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBA0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBA8 "QOSBW_BE_QOS_BANK1373,"
hexmask.quad.byte 0xBA8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBA8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBA8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBA8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBA8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBA8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBA8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBA8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBA8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBB0 "QOSBW_BE_QOS_BANK1374,"
hexmask.quad.byte 0xBB0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBB0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBB0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBB0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBB0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBB0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBB0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBB0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBB0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBB8 "QOSBW_BE_QOS_BANK1375,"
hexmask.quad.byte 0xBB8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBB8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBB8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBB8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBB8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBB8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBB8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBB8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBB8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBC0 "QOSBW_BE_QOS_BANK1376,"
hexmask.quad.byte 0xBC0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBC0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBC0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBC0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBC0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBC0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBC0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBC0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBC0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBC8 "QOSBW_BE_QOS_BANK1377,"
hexmask.quad.byte 0xBC8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBC8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBC8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBC8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBC8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBC8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBC8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBC8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBC8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBD0 "QOSBW_BE_QOS_BANK1378,"
hexmask.quad.byte 0xBD0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBD0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBD0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBD0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBD0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBD0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBD0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBD0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBD0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBD8 "QOSBW_BE_QOS_BANK1379,"
hexmask.quad.byte 0xBD8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBD8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBD8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBD8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBD8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBD8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBD8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBD8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBD8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBE0 "QOSBW_BE_QOS_BANK1380,"
hexmask.quad.byte 0xBE0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBE0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBE0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBE0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBE0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBE0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBE0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBE0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBE0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBE8 "QOSBW_BE_QOS_BANK1381,"
hexmask.quad.byte 0xBE8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBE8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBE8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBE8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBE8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBE8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBE8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBE8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBE8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBF0 "QOSBW_BE_QOS_BANK1382,"
hexmask.quad.byte 0xBF0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBF0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBF0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBF0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBF0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBF0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBF0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBF0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBF0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xBF8 "QOSBW_BE_QOS_BANK1383,"
hexmask.quad.byte 0xBF8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xBF8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xBF8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xBF8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xBF8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xBF8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xBF8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xBF8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xBF8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC00 "QOSBW_BE_QOS_BANK1384,"
hexmask.quad.byte 0xC00 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC00 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC00 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC00 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC00 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC00 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC00 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC00 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC00 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC08 "QOSBW_BE_QOS_BANK1385,"
hexmask.quad.byte 0xC08 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC08 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC08 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC08 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC08 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC08 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC08 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC08 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC08 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC10 "QOSBW_BE_QOS_BANK1386,"
hexmask.quad.byte 0xC10 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC10 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC10 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC10 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC10 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC10 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC10 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC10 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC10 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC18 "QOSBW_BE_QOS_BANK1387,"
hexmask.quad.byte 0xC18 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC18 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC18 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC18 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC18 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC18 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC18 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC18 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC18 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC20 "QOSBW_BE_QOS_BANK1388,"
hexmask.quad.byte 0xC20 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC20 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC20 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC20 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC20 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC20 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC20 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC20 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC20 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC28 "QOSBW_BE_QOS_BANK1389,"
hexmask.quad.byte 0xC28 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC28 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC28 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC28 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC28 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC28 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC28 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC28 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC28 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC30 "QOSBW_BE_QOS_BANK1390,"
hexmask.quad.byte 0xC30 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC30 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC30 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC30 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC30 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC30 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC30 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC30 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC30 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC38 "QOSBW_BE_QOS_BANK1391,"
hexmask.quad.byte 0xC38 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC38 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC38 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC38 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC38 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC38 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC38 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC38 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC38 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC40 "QOSBW_BE_QOS_BANK1392,"
hexmask.quad.byte 0xC40 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC40 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC40 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC40 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC40 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC40 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC40 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC40 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC40 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC48 "QOSBW_BE_QOS_BANK1393,"
hexmask.quad.byte 0xC48 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC48 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC48 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC48 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC48 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC48 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC48 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC48 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC48 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC50 "QOSBW_BE_QOS_BANK1394,"
hexmask.quad.byte 0xC50 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC50 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC50 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC50 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC50 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC50 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC50 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC50 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC50 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC58 "QOSBW_BE_QOS_BANK1395,"
hexmask.quad.byte 0xC58 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC58 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC58 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC58 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC58 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC58 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC58 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC58 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC58 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC60 "QOSBW_BE_QOS_BANK1396,"
hexmask.quad.byte 0xC60 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC60 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC60 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC60 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC60 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC60 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC60 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC60 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC60 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC68 "QOSBW_BE_QOS_BANK1397,"
hexmask.quad.byte 0xC68 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC68 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC68 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC68 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC68 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC68 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC68 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC68 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC68 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC70 "QOSBW_BE_QOS_BANK1398,"
hexmask.quad.byte 0xC70 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC70 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC70 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC70 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC70 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC70 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC70 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC70 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC70 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC78 "QOSBW_BE_QOS_BANK1399,"
hexmask.quad.byte 0xC78 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC78 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC78 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC78 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC78 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC78 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC78 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC78 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC78 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC80 "QOSBW_BE_QOS_BANK1400,"
hexmask.quad.byte 0xC80 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC80 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC80 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC80 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC80 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC80 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC80 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC80 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC80 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC88 "QOSBW_BE_QOS_BANK1401,"
hexmask.quad.byte 0xC88 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC88 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC88 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC88 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC88 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC88 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC88 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC88 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC88 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC90 "QOSBW_BE_QOS_BANK1402,"
hexmask.quad.byte 0xC90 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC90 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC90 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC90 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC90 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC90 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC90 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC90 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC90 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xC98 "QOSBW_BE_QOS_BANK1403,"
hexmask.quad.byte 0xC98 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xC98 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xC98 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xC98 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xC98 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xC98 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xC98 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xC98 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xC98 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCA0 "QOSBW_BE_QOS_BANK1404,"
hexmask.quad.byte 0xCA0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCA0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCA0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCA0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCA0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCA0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCA0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCA0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCA0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCA8 "QOSBW_BE_QOS_BANK1405,"
hexmask.quad.byte 0xCA8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCA8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCA8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCA8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCA8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCA8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCA8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCA8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCA8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCB0 "QOSBW_BE_QOS_BANK1406,"
hexmask.quad.byte 0xCB0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCB0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCB0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCB0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCB0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCB0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCB0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCB0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCB0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCB8 "QOSBW_BE_QOS_BANK1407,"
hexmask.quad.byte 0xCB8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCB8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCB8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCB8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCB8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCB8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCB8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCB8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCB8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCC0 "QOSBW_BE_QOS_BANK1408,"
hexmask.quad.byte 0xCC0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCC0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCC0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCC0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCC0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCC0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCC0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCC0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCC0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCC8 "QOSBW_BE_QOS_BANK1409,"
hexmask.quad.byte 0xCC8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCC8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCC8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCC8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCC8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCC8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCC8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCC8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCC8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCD0 "QOSBW_BE_QOS_BANK1410,"
hexmask.quad.byte 0xCD0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCD0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCD0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCD0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCD0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCD0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCD0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCD0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCD0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCD8 "QOSBW_BE_QOS_BANK1411,"
hexmask.quad.byte 0xCD8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCD8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCD8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCD8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCD8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCD8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCD8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCD8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCD8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCE0 "QOSBW_BE_QOS_BANK1412,"
hexmask.quad.byte 0xCE0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCE0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCE0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCE0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCE0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCE0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCE0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCE0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCE0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCE8 "QOSBW_BE_QOS_BANK1413,"
hexmask.quad.byte 0xCE8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCE8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCE8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCE8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCE8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCE8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCE8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCE8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCE8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCF0 "QOSBW_BE_QOS_BANK1414,"
hexmask.quad.byte 0xCF0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCF0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCF0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCF0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCF0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCF0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCF0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCF0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCF0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xCF8 "QOSBW_BE_QOS_BANK1415,"
hexmask.quad.byte 0xCF8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xCF8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xCF8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xCF8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xCF8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xCF8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xCF8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xCF8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xCF8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD00 "QOSBW_BE_QOS_BANK1416,"
hexmask.quad.byte 0xD00 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD00 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD00 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD00 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD00 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD00 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD00 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD00 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD00 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD08 "QOSBW_BE_QOS_BANK1417,"
hexmask.quad.byte 0xD08 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD08 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD08 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD08 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD08 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD08 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD08 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD08 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD08 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD10 "QOSBW_BE_QOS_BANK1418,"
hexmask.quad.byte 0xD10 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD10 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD10 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD10 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD10 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD10 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD10 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD10 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD10 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD18 "QOSBW_BE_QOS_BANK1419,"
hexmask.quad.byte 0xD18 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD18 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD18 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD18 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD18 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD18 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD18 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD18 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD18 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD20 "QOSBW_BE_QOS_BANK1420,"
hexmask.quad.byte 0xD20 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD20 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD20 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD20 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD20 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD20 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD20 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD20 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD20 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD28 "QOSBW_BE_QOS_BANK1421,"
hexmask.quad.byte 0xD28 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD28 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD28 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD28 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD28 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD28 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD28 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD28 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD28 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD30 "QOSBW_BE_QOS_BANK1422,"
hexmask.quad.byte 0xD30 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD30 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD30 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD30 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD30 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD30 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD30 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD30 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD30 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD38 "QOSBW_BE_QOS_BANK1423,"
hexmask.quad.byte 0xD38 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD38 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD38 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD38 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD38 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD38 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD38 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD38 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD38 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD40 "QOSBW_BE_QOS_BANK1424,"
hexmask.quad.byte 0xD40 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD40 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD40 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD40 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD40 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD40 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD40 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD40 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD40 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD48 "QOSBW_BE_QOS_BANK1425,"
hexmask.quad.byte 0xD48 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD48 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD48 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD48 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD48 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD48 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD48 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD48 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD48 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD50 "QOSBW_BE_QOS_BANK1426,"
hexmask.quad.byte 0xD50 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD50 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD50 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD50 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD50 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD50 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD50 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD50 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD50 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD58 "QOSBW_BE_QOS_BANK1427,"
hexmask.quad.byte 0xD58 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD58 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD58 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD58 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD58 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD58 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD58 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD58 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD58 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD60 "QOSBW_BE_QOS_BANK1428,"
hexmask.quad.byte 0xD60 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD60 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD60 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD60 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD60 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD60 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD60 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD60 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD60 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD68 "QOSBW_BE_QOS_BANK1429,"
hexmask.quad.byte 0xD68 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD68 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD68 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD68 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD68 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD68 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD68 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD68 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD68 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD70 "QOSBW_BE_QOS_BANK1430,"
hexmask.quad.byte 0xD70 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD70 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD70 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD70 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD70 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD70 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD70 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD70 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD70 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD78 "QOSBW_BE_QOS_BANK1431,"
hexmask.quad.byte 0xD78 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD78 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD78 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD78 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD78 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD78 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD78 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD78 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD78 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD80 "QOSBW_BE_QOS_BANK1432,"
hexmask.quad.byte 0xD80 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD80 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD80 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD80 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD80 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD80 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD80 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD80 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD80 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD88 "QOSBW_BE_QOS_BANK1433,"
hexmask.quad.byte 0xD88 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD88 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD88 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD88 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD88 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD88 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD88 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD88 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD88 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD90 "QOSBW_BE_QOS_BANK1434,"
hexmask.quad.byte 0xD90 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD90 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD90 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD90 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD90 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD90 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD90 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD90 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD90 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xD98 "QOSBW_BE_QOS_BANK1435,"
hexmask.quad.byte 0xD98 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xD98 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xD98 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xD98 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xD98 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xD98 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xD98 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xD98 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xD98 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDA0 "QOSBW_BE_QOS_BANK1436,"
hexmask.quad.byte 0xDA0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDA0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDA0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDA0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDA0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDA0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDA0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDA0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDA0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDA8 "QOSBW_BE_QOS_BANK1437,"
hexmask.quad.byte 0xDA8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDA8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDA8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDA8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDA8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDA8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDA8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDA8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDA8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDB0 "QOSBW_BE_QOS_BANK1438,"
hexmask.quad.byte 0xDB0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDB0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDB0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDB0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDB0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDB0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDB0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDB0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDB0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDB8 "QOSBW_BE_QOS_BANK1439,"
hexmask.quad.byte 0xDB8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDB8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDB8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDB8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDB8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDB8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDB8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDB8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDB8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDC0 "QOSBW_BE_QOS_BANK1440,"
hexmask.quad.byte 0xDC0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDC0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDC0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDC0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDC0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDC0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDC0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDC0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDC0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDC8 "QOSBW_BE_QOS_BANK1441,"
hexmask.quad.byte 0xDC8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDC8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDC8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDC8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDC8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDC8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDC8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDC8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDC8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDD0 "QOSBW_BE_QOS_BANK1442,"
hexmask.quad.byte 0xDD0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDD0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDD0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDD0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDD0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDD0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDD0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDD0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDD0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDD8 "QOSBW_BE_QOS_BANK1443,"
hexmask.quad.byte 0xDD8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDD8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDD8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDD8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDD8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDD8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDD8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDD8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDD8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDE0 "QOSBW_BE_QOS_BANK1444,"
hexmask.quad.byte 0xDE0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDE0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDE0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDE0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDE0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDE0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDE0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDE0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDE0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDE8 "QOSBW_BE_QOS_BANK1445,"
hexmask.quad.byte 0xDE8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDE8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDE8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDE8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDE8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDE8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDE8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDE8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDE8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDF0 "QOSBW_BE_QOS_BANK1446,"
hexmask.quad.byte 0xDF0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDF0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDF0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDF0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDF0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDF0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDF0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDF0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDF0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xDF8 "QOSBW_BE_QOS_BANK1447,"
hexmask.quad.byte 0xDF8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xDF8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xDF8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xDF8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xDF8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xDF8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xDF8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xDF8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xDF8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE00 "QOSBW_BE_QOS_BANK1448,"
hexmask.quad.byte 0xE00 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE00 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE00 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE00 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE00 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE00 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE00 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE00 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE00 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE08 "QOSBW_BE_QOS_BANK1449,"
hexmask.quad.byte 0xE08 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE08 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE08 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE08 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE08 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE08 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE08 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE08 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE08 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE10 "QOSBW_BE_QOS_BANK1450,"
hexmask.quad.byte 0xE10 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE10 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE10 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE10 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE10 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE10 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE10 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE10 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE10 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE18 "QOSBW_BE_QOS_BANK1451,"
hexmask.quad.byte 0xE18 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE18 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE18 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE18 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE18 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE18 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE18 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE18 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE18 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE20 "QOSBW_BE_QOS_BANK1452,"
hexmask.quad.byte 0xE20 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE20 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE20 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE20 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE20 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE20 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE20 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE20 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE20 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE28 "QOSBW_BE_QOS_BANK1453,"
hexmask.quad.byte 0xE28 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE28 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE28 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE28 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE28 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE28 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE28 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE28 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE28 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE30 "QOSBW_BE_QOS_BANK1454,"
hexmask.quad.byte 0xE30 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE30 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE30 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE30 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE30 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE30 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE30 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE30 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE30 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE38 "QOSBW_BE_QOS_BANK1455,"
hexmask.quad.byte 0xE38 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE38 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE38 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE38 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE38 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE38 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE38 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE38 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE38 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE40 "QOSBW_BE_QOS_BANK1456,"
hexmask.quad.byte 0xE40 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE40 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE40 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE40 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE40 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE40 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE40 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE40 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE40 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE48 "QOSBW_BE_QOS_BANK1457,"
hexmask.quad.byte 0xE48 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE48 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE48 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE48 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE48 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE48 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE48 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE48 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE48 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE50 "QOSBW_BE_QOS_BANK1458,"
hexmask.quad.byte 0xE50 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE50 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE50 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE50 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE50 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE50 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE50 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE50 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE50 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE58 "QOSBW_BE_QOS_BANK1459,"
hexmask.quad.byte 0xE58 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE58 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE58 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE58 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE58 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE58 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE58 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE58 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE58 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE60 "QOSBW_BE_QOS_BANK1460,"
hexmask.quad.byte 0xE60 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE60 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE60 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE60 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE60 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE60 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE60 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE60 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE60 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE68 "QOSBW_BE_QOS_BANK1461,"
hexmask.quad.byte 0xE68 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE68 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE68 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE68 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE68 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE68 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE68 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE68 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE68 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE70 "QOSBW_BE_QOS_BANK1462,"
hexmask.quad.byte 0xE70 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE70 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE70 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE70 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE70 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE70 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE70 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE70 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE70 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE78 "QOSBW_BE_QOS_BANK1463,"
hexmask.quad.byte 0xE78 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE78 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE78 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE78 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE78 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE78 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE78 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE78 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE78 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE80 "QOSBW_BE_QOS_BANK1464,"
hexmask.quad.byte 0xE80 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE80 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE80 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE80 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE80 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE80 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE80 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE80 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE80 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE88 "QOSBW_BE_QOS_BANK1465,"
hexmask.quad.byte 0xE88 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE88 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE88 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE88 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE88 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE88 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE88 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE88 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE88 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE90 "QOSBW_BE_QOS_BANK1466,"
hexmask.quad.byte 0xE90 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE90 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE90 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE90 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE90 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE90 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE90 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE90 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE90 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xE98 "QOSBW_BE_QOS_BANK1467,"
hexmask.quad.byte 0xE98 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xE98 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xE98 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xE98 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xE98 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xE98 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xE98 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xE98 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xE98 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEA0 "QOSBW_BE_QOS_BANK1468,"
hexmask.quad.byte 0xEA0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEA0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEA0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEA0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEA0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEA0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEA0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEA0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEA0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEA8 "QOSBW_BE_QOS_BANK1469,"
hexmask.quad.byte 0xEA8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEA8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEA8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEA8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEA8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEA8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEA8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEA8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEA8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEB0 "QOSBW_BE_QOS_BANK1470,"
hexmask.quad.byte 0xEB0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEB0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEB0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEB0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEB0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEB0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEB0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEB0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEB0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEB8 "QOSBW_BE_QOS_BANK1471,"
hexmask.quad.byte 0xEB8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEB8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEB8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEB8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEB8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEB8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEB8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEB8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEB8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEC0 "QOSBW_BE_QOS_BANK1472,"
hexmask.quad.byte 0xEC0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEC0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEC0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEC0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEC0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEC0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEC0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEC0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEC0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEC8 "QOSBW_BE_QOS_BANK1473,"
hexmask.quad.byte 0xEC8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEC8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEC8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEC8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEC8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEC8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEC8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEC8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEC8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xED0 "QOSBW_BE_QOS_BANK1474,"
hexmask.quad.byte 0xED0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xED0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xED0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xED0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xED0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xED0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xED0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xED0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xED0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xED8 "QOSBW_BE_QOS_BANK1475,"
hexmask.quad.byte 0xED8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xED8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xED8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xED8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xED8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xED8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xED8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xED8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xED8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEE0 "QOSBW_BE_QOS_BANK1476,"
hexmask.quad.byte 0xEE0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEE0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEE0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEE0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEE0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEE0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEE0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEE0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEE0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEE8 "QOSBW_BE_QOS_BANK1477,"
hexmask.quad.byte 0xEE8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEE8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEE8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEE8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEE8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEE8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEE8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEE8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEE8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEF0 "QOSBW_BE_QOS_BANK1478,"
hexmask.quad.byte 0xEF0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEF0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEF0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEF0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEF0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEF0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEF0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEF0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEF0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xEF8 "QOSBW_BE_QOS_BANK1479,"
hexmask.quad.byte 0xEF8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xEF8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xEF8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xEF8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xEF8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xEF8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xEF8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xEF8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xEF8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF00 "QOSBW_BE_QOS_BANK1480,"
hexmask.quad.byte 0xF00 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF00 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF00 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF00 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF00 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF00 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF00 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF00 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF00 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF08 "QOSBW_BE_QOS_BANK1481,"
hexmask.quad.byte 0xF08 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF08 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF08 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF08 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF08 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF08 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF08 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF08 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF08 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF10 "QOSBW_BE_QOS_BANK1482,"
hexmask.quad.byte 0xF10 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF10 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF10 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF10 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF10 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF10 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF10 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF10 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF10 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF18 "QOSBW_BE_QOS_BANK1483,"
hexmask.quad.byte 0xF18 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF18 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF18 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF18 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF18 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF18 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF18 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF18 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF18 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF20 "QOSBW_BE_QOS_BANK1484,"
hexmask.quad.byte 0xF20 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF20 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF20 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF20 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF20 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF20 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF20 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF20 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF20 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF28 "QOSBW_BE_QOS_BANK1485,"
hexmask.quad.byte 0xF28 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF28 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF28 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF28 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF28 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF28 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF28 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF28 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF28 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF30 "QOSBW_BE_QOS_BANK1486,"
hexmask.quad.byte 0xF30 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF30 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF30 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF30 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF30 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF30 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF30 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF30 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF30 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF38 "QOSBW_BE_QOS_BANK1487,"
hexmask.quad.byte 0xF38 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF38 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF38 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF38 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF38 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF38 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF38 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF38 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF38 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF40 "QOSBW_BE_QOS_BANK1488,"
hexmask.quad.byte 0xF40 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF40 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF40 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF40 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF40 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF40 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF40 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF40 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF40 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF48 "QOSBW_BE_QOS_BANK1489,"
hexmask.quad.byte 0xF48 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF48 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF48 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF48 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF48 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF48 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF48 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF48 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF48 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF50 "QOSBW_BE_QOS_BANK1490,"
hexmask.quad.byte 0xF50 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF50 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF50 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF50 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF50 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF50 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF50 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF50 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF50 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF58 "QOSBW_BE_QOS_BANK1491,"
hexmask.quad.byte 0xF58 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF58 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF58 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF58 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF58 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF58 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF58 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF58 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF58 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF60 "QOSBW_BE_QOS_BANK1492,"
hexmask.quad.byte 0xF60 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF60 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF60 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF60 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF60 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF60 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF60 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF60 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF60 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF68 "QOSBW_BE_QOS_BANK1493,"
hexmask.quad.byte 0xF68 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF68 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF68 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF68 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF68 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF68 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF68 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF68 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF68 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF70 "QOSBW_BE_QOS_BANK1494,"
hexmask.quad.byte 0xF70 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF70 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF70 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF70 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF70 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF70 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF70 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF70 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF70 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF78 "QOSBW_BE_QOS_BANK1495,"
hexmask.quad.byte 0xF78 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF78 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF78 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF78 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF78 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF78 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF78 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF78 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF78 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF80 "QOSBW_BE_QOS_BANK1496,"
hexmask.quad.byte 0xF80 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF80 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF80 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF80 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF80 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF80 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF80 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF80 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF80 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF88 "QOSBW_BE_QOS_BANK1497,"
hexmask.quad.byte 0xF88 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF88 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF88 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF88 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF88 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF88 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF88 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF88 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF88 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF90 "QOSBW_BE_QOS_BANK1498,"
hexmask.quad.byte 0xF90 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF90 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF90 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF90 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF90 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF90 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF90 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF90 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF90 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xF98 "QOSBW_BE_QOS_BANK1499,"
hexmask.quad.byte 0xF98 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xF98 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xF98 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xF98 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xF98 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xF98 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xF98 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xF98 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xF98 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFA0 "QOSBW_BE_QOS_BANK1500,"
hexmask.quad.byte 0xFA0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFA0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFA0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFA0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFA0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFA0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFA0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFA0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFA0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFA8 "QOSBW_BE_QOS_BANK1501,"
hexmask.quad.byte 0xFA8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFA8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFA8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFA8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFA8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFA8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFA8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFA8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFA8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFB0 "QOSBW_BE_QOS_BANK1502,"
hexmask.quad.byte 0xFB0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFB0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFB0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFB0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFB0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFB0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFB0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFB0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFB0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFB8 "QOSBW_BE_QOS_BANK1503,"
hexmask.quad.byte 0xFB8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFB8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFB8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFB8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFB8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFB8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFB8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFB8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFB8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFC0 "QOSBW_BE_QOS_BANK1504,"
hexmask.quad.byte 0xFC0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFC0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFC0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFC0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFC0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFC0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFC0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFC0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFC0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFC8 "QOSBW_BE_QOS_BANK1505,"
hexmask.quad.byte 0xFC8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFC8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFC8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFC8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFC8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFC8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFC8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFC8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFC8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFD0 "QOSBW_BE_QOS_BANK1506,"
hexmask.quad.byte 0xFD0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFD0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFD0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFD0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFD0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFD0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFD0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFD0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFD0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFD8 "QOSBW_BE_QOS_BANK1507,"
hexmask.quad.byte 0xFD8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFD8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFD8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFD8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFD8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFD8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFD8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFD8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFD8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFE0 "QOSBW_BE_QOS_BANK1508,"
hexmask.quad.byte 0xFE0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFE0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFE0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFE0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFE0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFE0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFE0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFE0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFE0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFE8 "QOSBW_BE_QOS_BANK1509,"
hexmask.quad.byte 0xFE8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFE8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFE8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFE8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFE8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFE8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFE8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFE8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFE8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFF0 "QOSBW_BE_QOS_BANK1510,"
hexmask.quad.byte 0xFF0 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFF0 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFF0 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFF0 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFF0 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFF0 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFF0 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFF0 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFF0 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
line.quad 0xFF8 "QOSBW_BE_QOS_BANK1511,"
hexmask.quad.byte 0xFF8 57.--63. 1. "Reserved_57,Reserved"
newline
bitfld.quad 0xFF8 54.--56. "Reserved_54,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0xFF8 52.--53. "BEQOS_BANK_n_5,BEQOS_BANK[n]_5 Setting." "0,1,2,3"
newline
hexmask.quad.byte 0xFF8 48.--51. 1. "BEQOS_BANK_n_4,BEQOS_BANK[n]_4 Setting."
newline
hexmask.quad.byte 0xFF8 44.--47. 1. "Reserved_44,Reserved"
newline
hexmask.quad.byte 0xFF8 36.--43. 1. "BEQOS_BANK_n_3,BEQOS_BANK[n]_3 Setting."
newline
hexmask.quad.word 0xFF8 20.--35. 1. "BEQOS_BANK_n_2,BEQOS_BANK[n]_2 Setting."
newline
hexmask.quad.word 0xFF8 10.--19. 1. "BEQOS_BANK_n_1,BEQOS_BANK[n]_1 Setting."
newline
hexmask.quad.word 0xFF8 0.--9. 1. "BEQOS_BANK_n_0,BEQOS_BANK[n]_0 Setting."
rgroup.quad 0x4000++0xFFF
line.quad 0x0 "QOSMON_FIX_TRAFFIC_BANK00,"
hexmask.quad.tbyte 0x0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x8 "QOSMON_FIX_TRAFFIC_BANK01,"
hexmask.quad.tbyte 0x8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x10 "QOSMON_FIX_TRAFFIC_BANK02,"
hexmask.quad.tbyte 0x10 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x10 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x18 "QOSMON_FIX_TRAFFIC_BANK03,"
hexmask.quad.tbyte 0x18 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x18 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x20 "QOSMON_FIX_TRAFFIC_BANK04,"
hexmask.quad.tbyte 0x20 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x20 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x28 "QOSMON_FIX_TRAFFIC_BANK05,"
hexmask.quad.tbyte 0x28 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x28 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x30 "QOSMON_FIX_TRAFFIC_BANK06,"
hexmask.quad.tbyte 0x30 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x30 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x38 "QOSMON_FIX_TRAFFIC_BANK07,"
hexmask.quad.tbyte 0x38 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x38 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x40 "QOSMON_FIX_TRAFFIC_BANK08,"
hexmask.quad.tbyte 0x40 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x40 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x48 "QOSMON_FIX_TRAFFIC_BANK09,"
hexmask.quad.tbyte 0x48 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x48 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x50 "QOSMON_FIX_TRAFFIC_BANK010,"
hexmask.quad.tbyte 0x50 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x50 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x58 "QOSMON_FIX_TRAFFIC_BANK011,"
hexmask.quad.tbyte 0x58 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x58 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x60 "QOSMON_FIX_TRAFFIC_BANK012,"
hexmask.quad.tbyte 0x60 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x60 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x68 "QOSMON_FIX_TRAFFIC_BANK013,"
hexmask.quad.tbyte 0x68 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x68 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x70 "QOSMON_FIX_TRAFFIC_BANK014,"
hexmask.quad.tbyte 0x70 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x70 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x78 "QOSMON_FIX_TRAFFIC_BANK015,"
hexmask.quad.tbyte 0x78 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x78 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x80 "QOSMON_FIX_TRAFFIC_BANK016,"
hexmask.quad.tbyte 0x80 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x80 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x88 "QOSMON_FIX_TRAFFIC_BANK017,"
hexmask.quad.tbyte 0x88 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x88 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x90 "QOSMON_FIX_TRAFFIC_BANK018,"
hexmask.quad.tbyte 0x90 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x90 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x98 "QOSMON_FIX_TRAFFIC_BANK019,"
hexmask.quad.tbyte 0x98 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x98 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA0 "QOSMON_FIX_TRAFFIC_BANK020,"
hexmask.quad.tbyte 0xA0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA8 "QOSMON_FIX_TRAFFIC_BANK021,"
hexmask.quad.tbyte 0xA8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB0 "QOSMON_FIX_TRAFFIC_BANK022,"
hexmask.quad.tbyte 0xB0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB8 "QOSMON_FIX_TRAFFIC_BANK023,"
hexmask.quad.tbyte 0xB8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC0 "QOSMON_FIX_TRAFFIC_BANK024,"
hexmask.quad.tbyte 0xC0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC8 "QOSMON_FIX_TRAFFIC_BANK025,"
hexmask.quad.tbyte 0xC8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD0 "QOSMON_FIX_TRAFFIC_BANK026,"
hexmask.quad.tbyte 0xD0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD8 "QOSMON_FIX_TRAFFIC_BANK027,"
hexmask.quad.tbyte 0xD8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE0 "QOSMON_FIX_TRAFFIC_BANK028,"
hexmask.quad.tbyte 0xE0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE8 "QOSMON_FIX_TRAFFIC_BANK029,"
hexmask.quad.tbyte 0xE8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF0 "QOSMON_FIX_TRAFFIC_BANK030,"
hexmask.quad.tbyte 0xF0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF8 "QOSMON_FIX_TRAFFIC_BANK031,"
hexmask.quad.tbyte 0xF8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x100 "QOSMON_FIX_TRAFFIC_BANK032,"
hexmask.quad.tbyte 0x100 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x100 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x108 "QOSMON_FIX_TRAFFIC_BANK033,"
hexmask.quad.tbyte 0x108 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x108 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x110 "QOSMON_FIX_TRAFFIC_BANK034,"
hexmask.quad.tbyte 0x110 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x110 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x118 "QOSMON_FIX_TRAFFIC_BANK035,"
hexmask.quad.tbyte 0x118 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x118 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x120 "QOSMON_FIX_TRAFFIC_BANK036,"
hexmask.quad.tbyte 0x120 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x120 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x128 "QOSMON_FIX_TRAFFIC_BANK037,"
hexmask.quad.tbyte 0x128 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x128 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x130 "QOSMON_FIX_TRAFFIC_BANK038,"
hexmask.quad.tbyte 0x130 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x130 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x138 "QOSMON_FIX_TRAFFIC_BANK039,"
hexmask.quad.tbyte 0x138 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x138 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x140 "QOSMON_FIX_TRAFFIC_BANK040,"
hexmask.quad.tbyte 0x140 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x140 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x148 "QOSMON_FIX_TRAFFIC_BANK041,"
hexmask.quad.tbyte 0x148 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x148 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x150 "QOSMON_FIX_TRAFFIC_BANK042,"
hexmask.quad.tbyte 0x150 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x150 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x158 "QOSMON_FIX_TRAFFIC_BANK043,"
hexmask.quad.tbyte 0x158 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x158 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x160 "QOSMON_FIX_TRAFFIC_BANK044,"
hexmask.quad.tbyte 0x160 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x160 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x168 "QOSMON_FIX_TRAFFIC_BANK045,"
hexmask.quad.tbyte 0x168 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x168 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x170 "QOSMON_FIX_TRAFFIC_BANK046,"
hexmask.quad.tbyte 0x170 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x170 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x178 "QOSMON_FIX_TRAFFIC_BANK047,"
hexmask.quad.tbyte 0x178 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x178 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x180 "QOSMON_FIX_TRAFFIC_BANK048,"
hexmask.quad.tbyte 0x180 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x180 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x188 "QOSMON_FIX_TRAFFIC_BANK049,"
hexmask.quad.tbyte 0x188 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x188 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x190 "QOSMON_FIX_TRAFFIC_BANK050,"
hexmask.quad.tbyte 0x190 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x190 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x198 "QOSMON_FIX_TRAFFIC_BANK051,"
hexmask.quad.tbyte 0x198 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x198 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x1A0 "QOSMON_FIX_TRAFFIC_BANK052,"
hexmask.quad.tbyte 0x1A0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1A0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x1A8 "QOSMON_FIX_TRAFFIC_BANK053,"
hexmask.quad.tbyte 0x1A8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1A8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x1B0 "QOSMON_FIX_TRAFFIC_BANK054,"
hexmask.quad.tbyte 0x1B0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1B0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x1B8 "QOSMON_FIX_TRAFFIC_BANK055,"
hexmask.quad.tbyte 0x1B8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1B8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x1C0 "QOSMON_FIX_TRAFFIC_BANK056,"
hexmask.quad.tbyte 0x1C0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1C0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x1C8 "QOSMON_FIX_TRAFFIC_BANK057,"
hexmask.quad.tbyte 0x1C8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1C8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x1D0 "QOSMON_FIX_TRAFFIC_BANK058,"
hexmask.quad.tbyte 0x1D0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1D0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x1D8 "QOSMON_FIX_TRAFFIC_BANK059,"
hexmask.quad.tbyte 0x1D8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1D8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x1E0 "QOSMON_FIX_TRAFFIC_BANK060,"
hexmask.quad.tbyte 0x1E0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1E0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x1E8 "QOSMON_FIX_TRAFFIC_BANK061,"
hexmask.quad.tbyte 0x1E8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1E8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x1F0 "QOSMON_FIX_TRAFFIC_BANK062,"
hexmask.quad.tbyte 0x1F0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1F0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x1F8 "QOSMON_FIX_TRAFFIC_BANK063,"
hexmask.quad.tbyte 0x1F8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1F8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x200 "QOSMON_FIX_TRAFFIC_BANK064,"
hexmask.quad.tbyte 0x200 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x200 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x208 "QOSMON_FIX_TRAFFIC_BANK065,"
hexmask.quad.tbyte 0x208 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x208 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x210 "QOSMON_FIX_TRAFFIC_BANK066,"
hexmask.quad.tbyte 0x210 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x210 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x218 "QOSMON_FIX_TRAFFIC_BANK067,"
hexmask.quad.tbyte 0x218 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x218 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x220 "QOSMON_FIX_TRAFFIC_BANK068,"
hexmask.quad.tbyte 0x220 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x220 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x228 "QOSMON_FIX_TRAFFIC_BANK069,"
hexmask.quad.tbyte 0x228 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x228 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x230 "QOSMON_FIX_TRAFFIC_BANK070,"
hexmask.quad.tbyte 0x230 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x230 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x238 "QOSMON_FIX_TRAFFIC_BANK071,"
hexmask.quad.tbyte 0x238 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x238 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x240 "QOSMON_FIX_TRAFFIC_BANK072,"
hexmask.quad.tbyte 0x240 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x240 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x248 "QOSMON_FIX_TRAFFIC_BANK073,"
hexmask.quad.tbyte 0x248 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x248 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x250 "QOSMON_FIX_TRAFFIC_BANK074,"
hexmask.quad.tbyte 0x250 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x250 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x258 "QOSMON_FIX_TRAFFIC_BANK075,"
hexmask.quad.tbyte 0x258 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x258 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x260 "QOSMON_FIX_TRAFFIC_BANK076,"
hexmask.quad.tbyte 0x260 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x260 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x268 "QOSMON_FIX_TRAFFIC_BANK077,"
hexmask.quad.tbyte 0x268 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x268 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x270 "QOSMON_FIX_TRAFFIC_BANK078,"
hexmask.quad.tbyte 0x270 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x270 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x278 "QOSMON_FIX_TRAFFIC_BANK079,"
hexmask.quad.tbyte 0x278 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x278 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x280 "QOSMON_FIX_TRAFFIC_BANK080,"
hexmask.quad.tbyte 0x280 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x280 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x288 "QOSMON_FIX_TRAFFIC_BANK081,"
hexmask.quad.tbyte 0x288 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x288 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x290 "QOSMON_FIX_TRAFFIC_BANK082,"
hexmask.quad.tbyte 0x290 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x290 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x298 "QOSMON_FIX_TRAFFIC_BANK083,"
hexmask.quad.tbyte 0x298 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x298 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x2A0 "QOSMON_FIX_TRAFFIC_BANK084,"
hexmask.quad.tbyte 0x2A0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2A0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x2A8 "QOSMON_FIX_TRAFFIC_BANK085,"
hexmask.quad.tbyte 0x2A8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2A8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x2B0 "QOSMON_FIX_TRAFFIC_BANK086,"
hexmask.quad.tbyte 0x2B0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2B0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x2B8 "QOSMON_FIX_TRAFFIC_BANK087,"
hexmask.quad.tbyte 0x2B8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2B8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x2C0 "QOSMON_FIX_TRAFFIC_BANK088,"
hexmask.quad.tbyte 0x2C0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2C0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x2C8 "QOSMON_FIX_TRAFFIC_BANK089,"
hexmask.quad.tbyte 0x2C8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2C8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x2D0 "QOSMON_FIX_TRAFFIC_BANK090,"
hexmask.quad.tbyte 0x2D0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2D0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x2D8 "QOSMON_FIX_TRAFFIC_BANK091,"
hexmask.quad.tbyte 0x2D8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2D8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x2E0 "QOSMON_FIX_TRAFFIC_BANK092,"
hexmask.quad.tbyte 0x2E0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2E0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x2E8 "QOSMON_FIX_TRAFFIC_BANK093,"
hexmask.quad.tbyte 0x2E8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2E8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x2F0 "QOSMON_FIX_TRAFFIC_BANK094,"
hexmask.quad.tbyte 0x2F0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2F0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x2F8 "QOSMON_FIX_TRAFFIC_BANK095,"
hexmask.quad.tbyte 0x2F8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2F8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x300 "QOSMON_FIX_TRAFFIC_BANK096,"
hexmask.quad.tbyte 0x300 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x300 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x308 "QOSMON_FIX_TRAFFIC_BANK097,"
hexmask.quad.tbyte 0x308 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x308 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x310 "QOSMON_FIX_TRAFFIC_BANK098,"
hexmask.quad.tbyte 0x310 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x310 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x318 "QOSMON_FIX_TRAFFIC_BANK099,"
hexmask.quad.tbyte 0x318 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x318 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x320 "QOSMON_FIX_TRAFFIC_BANK0100,"
hexmask.quad.tbyte 0x320 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x320 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x328 "QOSMON_FIX_TRAFFIC_BANK0101,"
hexmask.quad.tbyte 0x328 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x328 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x330 "QOSMON_FIX_TRAFFIC_BANK0102,"
hexmask.quad.tbyte 0x330 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x330 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x338 "QOSMON_FIX_TRAFFIC_BANK0103,"
hexmask.quad.tbyte 0x338 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x338 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x340 "QOSMON_FIX_TRAFFIC_BANK0104,"
hexmask.quad.tbyte 0x340 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x340 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x348 "QOSMON_FIX_TRAFFIC_BANK0105,"
hexmask.quad.tbyte 0x348 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x348 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x350 "QOSMON_FIX_TRAFFIC_BANK0106,"
hexmask.quad.tbyte 0x350 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x350 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x358 "QOSMON_FIX_TRAFFIC_BANK0107,"
hexmask.quad.tbyte 0x358 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x358 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x360 "QOSMON_FIX_TRAFFIC_BANK0108,"
hexmask.quad.tbyte 0x360 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x360 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x368 "QOSMON_FIX_TRAFFIC_BANK0109,"
hexmask.quad.tbyte 0x368 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x368 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x370 "QOSMON_FIX_TRAFFIC_BANK0110,"
hexmask.quad.tbyte 0x370 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x370 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x378 "QOSMON_FIX_TRAFFIC_BANK0111,"
hexmask.quad.tbyte 0x378 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x378 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x380 "QOSMON_FIX_TRAFFIC_BANK0112,"
hexmask.quad.tbyte 0x380 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x380 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x388 "QOSMON_FIX_TRAFFIC_BANK0113,"
hexmask.quad.tbyte 0x388 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x388 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x390 "QOSMON_FIX_TRAFFIC_BANK0114,"
hexmask.quad.tbyte 0x390 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x390 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x398 "QOSMON_FIX_TRAFFIC_BANK0115,"
hexmask.quad.tbyte 0x398 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x398 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x3A0 "QOSMON_FIX_TRAFFIC_BANK0116,"
hexmask.quad.tbyte 0x3A0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3A0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x3A8 "QOSMON_FIX_TRAFFIC_BANK0117,"
hexmask.quad.tbyte 0x3A8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3A8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x3B0 "QOSMON_FIX_TRAFFIC_BANK0118,"
hexmask.quad.tbyte 0x3B0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3B0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x3B8 "QOSMON_FIX_TRAFFIC_BANK0119,"
hexmask.quad.tbyte 0x3B8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3B8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x3C0 "QOSMON_FIX_TRAFFIC_BANK0120,"
hexmask.quad.tbyte 0x3C0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3C0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x3C8 "QOSMON_FIX_TRAFFIC_BANK0121,"
hexmask.quad.tbyte 0x3C8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3C8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x3D0 "QOSMON_FIX_TRAFFIC_BANK0122,"
hexmask.quad.tbyte 0x3D0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3D0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x3D8 "QOSMON_FIX_TRAFFIC_BANK0123,"
hexmask.quad.tbyte 0x3D8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3D8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x3E0 "QOSMON_FIX_TRAFFIC_BANK0124,"
hexmask.quad.tbyte 0x3E0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3E0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x3E8 "QOSMON_FIX_TRAFFIC_BANK0125,"
hexmask.quad.tbyte 0x3E8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3E8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x3F0 "QOSMON_FIX_TRAFFIC_BANK0126,"
hexmask.quad.tbyte 0x3F0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3F0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x3F8 "QOSMON_FIX_TRAFFIC_BANK0127,"
hexmask.quad.tbyte 0x3F8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3F8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x400 "QOSMON_FIX_TRAFFIC_BANK0128,"
hexmask.quad.tbyte 0x400 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x400 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x408 "QOSMON_FIX_TRAFFIC_BANK0129,"
hexmask.quad.tbyte 0x408 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x408 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x410 "QOSMON_FIX_TRAFFIC_BANK0130,"
hexmask.quad.tbyte 0x410 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x410 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x418 "QOSMON_FIX_TRAFFIC_BANK0131,"
hexmask.quad.tbyte 0x418 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x418 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x420 "QOSMON_FIX_TRAFFIC_BANK0132,"
hexmask.quad.tbyte 0x420 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x420 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x428 "QOSMON_FIX_TRAFFIC_BANK0133,"
hexmask.quad.tbyte 0x428 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x428 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x430 "QOSMON_FIX_TRAFFIC_BANK0134,"
hexmask.quad.tbyte 0x430 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x430 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x438 "QOSMON_FIX_TRAFFIC_BANK0135,"
hexmask.quad.tbyte 0x438 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x438 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x440 "QOSMON_FIX_TRAFFIC_BANK0136,"
hexmask.quad.tbyte 0x440 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x440 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x448 "QOSMON_FIX_TRAFFIC_BANK0137,"
hexmask.quad.tbyte 0x448 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x448 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x450 "QOSMON_FIX_TRAFFIC_BANK0138,"
hexmask.quad.tbyte 0x450 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x450 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x458 "QOSMON_FIX_TRAFFIC_BANK0139,"
hexmask.quad.tbyte 0x458 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x458 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x460 "QOSMON_FIX_TRAFFIC_BANK0140,"
hexmask.quad.tbyte 0x460 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x460 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x468 "QOSMON_FIX_TRAFFIC_BANK0141,"
hexmask.quad.tbyte 0x468 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x468 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x470 "QOSMON_FIX_TRAFFIC_BANK0142,"
hexmask.quad.tbyte 0x470 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x470 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x478 "QOSMON_FIX_TRAFFIC_BANK0143,"
hexmask.quad.tbyte 0x478 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x478 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x480 "QOSMON_FIX_TRAFFIC_BANK0144,"
hexmask.quad.tbyte 0x480 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x480 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x488 "QOSMON_FIX_TRAFFIC_BANK0145,"
hexmask.quad.tbyte 0x488 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x488 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x490 "QOSMON_FIX_TRAFFIC_BANK0146,"
hexmask.quad.tbyte 0x490 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x490 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x498 "QOSMON_FIX_TRAFFIC_BANK0147,"
hexmask.quad.tbyte 0x498 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x498 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x4A0 "QOSMON_FIX_TRAFFIC_BANK0148,"
hexmask.quad.tbyte 0x4A0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4A0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x4A8 "QOSMON_FIX_TRAFFIC_BANK0149,"
hexmask.quad.tbyte 0x4A8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4A8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x4B0 "QOSMON_FIX_TRAFFIC_BANK0150,"
hexmask.quad.tbyte 0x4B0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4B0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x4B8 "QOSMON_FIX_TRAFFIC_BANK0151,"
hexmask.quad.tbyte 0x4B8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4B8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x4C0 "QOSMON_FIX_TRAFFIC_BANK0152,"
hexmask.quad.tbyte 0x4C0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4C0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x4C8 "QOSMON_FIX_TRAFFIC_BANK0153,"
hexmask.quad.tbyte 0x4C8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4C8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x4D0 "QOSMON_FIX_TRAFFIC_BANK0154,"
hexmask.quad.tbyte 0x4D0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4D0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x4D8 "QOSMON_FIX_TRAFFIC_BANK0155,"
hexmask.quad.tbyte 0x4D8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4D8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x4E0 "QOSMON_FIX_TRAFFIC_BANK0156,"
hexmask.quad.tbyte 0x4E0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4E0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x4E8 "QOSMON_FIX_TRAFFIC_BANK0157,"
hexmask.quad.tbyte 0x4E8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4E8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x4F0 "QOSMON_FIX_TRAFFIC_BANK0158,"
hexmask.quad.tbyte 0x4F0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4F0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x4F8 "QOSMON_FIX_TRAFFIC_BANK0159,"
hexmask.quad.tbyte 0x4F8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4F8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x500 "QOSMON_FIX_TRAFFIC_BANK0160,"
hexmask.quad.tbyte 0x500 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x500 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x508 "QOSMON_FIX_TRAFFIC_BANK0161,"
hexmask.quad.tbyte 0x508 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x508 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x510 "QOSMON_FIX_TRAFFIC_BANK0162,"
hexmask.quad.tbyte 0x510 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x510 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x518 "QOSMON_FIX_TRAFFIC_BANK0163,"
hexmask.quad.tbyte 0x518 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x518 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x520 "QOSMON_FIX_TRAFFIC_BANK0164,"
hexmask.quad.tbyte 0x520 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x520 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x528 "QOSMON_FIX_TRAFFIC_BANK0165,"
hexmask.quad.tbyte 0x528 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x528 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x530 "QOSMON_FIX_TRAFFIC_BANK0166,"
hexmask.quad.tbyte 0x530 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x530 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x538 "QOSMON_FIX_TRAFFIC_BANK0167,"
hexmask.quad.tbyte 0x538 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x538 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x540 "QOSMON_FIX_TRAFFIC_BANK0168,"
hexmask.quad.tbyte 0x540 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x540 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x548 "QOSMON_FIX_TRAFFIC_BANK0169,"
hexmask.quad.tbyte 0x548 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x548 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x550 "QOSMON_FIX_TRAFFIC_BANK0170,"
hexmask.quad.tbyte 0x550 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x550 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x558 "QOSMON_FIX_TRAFFIC_BANK0171,"
hexmask.quad.tbyte 0x558 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x558 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x560 "QOSMON_FIX_TRAFFIC_BANK0172,"
hexmask.quad.tbyte 0x560 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x560 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x568 "QOSMON_FIX_TRAFFIC_BANK0173,"
hexmask.quad.tbyte 0x568 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x568 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x570 "QOSMON_FIX_TRAFFIC_BANK0174,"
hexmask.quad.tbyte 0x570 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x570 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x578 "QOSMON_FIX_TRAFFIC_BANK0175,"
hexmask.quad.tbyte 0x578 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x578 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x580 "QOSMON_FIX_TRAFFIC_BANK0176,"
hexmask.quad.tbyte 0x580 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x580 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x588 "QOSMON_FIX_TRAFFIC_BANK0177,"
hexmask.quad.tbyte 0x588 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x588 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x590 "QOSMON_FIX_TRAFFIC_BANK0178,"
hexmask.quad.tbyte 0x590 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x590 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x598 "QOSMON_FIX_TRAFFIC_BANK0179,"
hexmask.quad.tbyte 0x598 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x598 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x5A0 "QOSMON_FIX_TRAFFIC_BANK0180,"
hexmask.quad.tbyte 0x5A0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5A0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x5A8 "QOSMON_FIX_TRAFFIC_BANK0181,"
hexmask.quad.tbyte 0x5A8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5A8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x5B0 "QOSMON_FIX_TRAFFIC_BANK0182,"
hexmask.quad.tbyte 0x5B0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5B0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x5B8 "QOSMON_FIX_TRAFFIC_BANK0183,"
hexmask.quad.tbyte 0x5B8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5B8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x5C0 "QOSMON_FIX_TRAFFIC_BANK0184,"
hexmask.quad.tbyte 0x5C0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5C0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x5C8 "QOSMON_FIX_TRAFFIC_BANK0185,"
hexmask.quad.tbyte 0x5C8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5C8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x5D0 "QOSMON_FIX_TRAFFIC_BANK0186,"
hexmask.quad.tbyte 0x5D0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5D0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x5D8 "QOSMON_FIX_TRAFFIC_BANK0187,"
hexmask.quad.tbyte 0x5D8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5D8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x5E0 "QOSMON_FIX_TRAFFIC_BANK0188,"
hexmask.quad.tbyte 0x5E0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5E0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x5E8 "QOSMON_FIX_TRAFFIC_BANK0189,"
hexmask.quad.tbyte 0x5E8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5E8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x5F0 "QOSMON_FIX_TRAFFIC_BANK0190,"
hexmask.quad.tbyte 0x5F0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5F0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x5F8 "QOSMON_FIX_TRAFFIC_BANK0191,"
hexmask.quad.tbyte 0x5F8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5F8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x600 "QOSMON_FIX_TRAFFIC_BANK0192,"
hexmask.quad.tbyte 0x600 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x600 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x608 "QOSMON_FIX_TRAFFIC_BANK0193,"
hexmask.quad.tbyte 0x608 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x608 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x610 "QOSMON_FIX_TRAFFIC_BANK0194,"
hexmask.quad.tbyte 0x610 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x610 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x618 "QOSMON_FIX_TRAFFIC_BANK0195,"
hexmask.quad.tbyte 0x618 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x618 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x620 "QOSMON_FIX_TRAFFIC_BANK0196,"
hexmask.quad.tbyte 0x620 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x620 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x628 "QOSMON_FIX_TRAFFIC_BANK0197,"
hexmask.quad.tbyte 0x628 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x628 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x630 "QOSMON_FIX_TRAFFIC_BANK0198,"
hexmask.quad.tbyte 0x630 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x630 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x638 "QOSMON_FIX_TRAFFIC_BANK0199,"
hexmask.quad.tbyte 0x638 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x638 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x640 "QOSMON_FIX_TRAFFIC_BANK0200,"
hexmask.quad.tbyte 0x640 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x640 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x648 "QOSMON_FIX_TRAFFIC_BANK0201,"
hexmask.quad.tbyte 0x648 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x648 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x650 "QOSMON_FIX_TRAFFIC_BANK0202,"
hexmask.quad.tbyte 0x650 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x650 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x658 "QOSMON_FIX_TRAFFIC_BANK0203,"
hexmask.quad.tbyte 0x658 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x658 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x660 "QOSMON_FIX_TRAFFIC_BANK0204,"
hexmask.quad.tbyte 0x660 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x660 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x668 "QOSMON_FIX_TRAFFIC_BANK0205,"
hexmask.quad.tbyte 0x668 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x668 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x670 "QOSMON_FIX_TRAFFIC_BANK0206,"
hexmask.quad.tbyte 0x670 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x670 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x678 "QOSMON_FIX_TRAFFIC_BANK0207,"
hexmask.quad.tbyte 0x678 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x678 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x680 "QOSMON_FIX_TRAFFIC_BANK0208,"
hexmask.quad.tbyte 0x680 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x680 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x688 "QOSMON_FIX_TRAFFIC_BANK0209,"
hexmask.quad.tbyte 0x688 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x688 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x690 "QOSMON_FIX_TRAFFIC_BANK0210,"
hexmask.quad.tbyte 0x690 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x690 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x698 "QOSMON_FIX_TRAFFIC_BANK0211,"
hexmask.quad.tbyte 0x698 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x698 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x6A0 "QOSMON_FIX_TRAFFIC_BANK0212,"
hexmask.quad.tbyte 0x6A0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6A0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x6A8 "QOSMON_FIX_TRAFFIC_BANK0213,"
hexmask.quad.tbyte 0x6A8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6A8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x6B0 "QOSMON_FIX_TRAFFIC_BANK0214,"
hexmask.quad.tbyte 0x6B0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6B0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x6B8 "QOSMON_FIX_TRAFFIC_BANK0215,"
hexmask.quad.tbyte 0x6B8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6B8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x6C0 "QOSMON_FIX_TRAFFIC_BANK0216,"
hexmask.quad.tbyte 0x6C0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6C0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x6C8 "QOSMON_FIX_TRAFFIC_BANK0217,"
hexmask.quad.tbyte 0x6C8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6C8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x6D0 "QOSMON_FIX_TRAFFIC_BANK0218,"
hexmask.quad.tbyte 0x6D0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6D0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x6D8 "QOSMON_FIX_TRAFFIC_BANK0219,"
hexmask.quad.tbyte 0x6D8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6D8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x6E0 "QOSMON_FIX_TRAFFIC_BANK0220,"
hexmask.quad.tbyte 0x6E0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6E0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x6E8 "QOSMON_FIX_TRAFFIC_BANK0221,"
hexmask.quad.tbyte 0x6E8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6E8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x6F0 "QOSMON_FIX_TRAFFIC_BANK0222,"
hexmask.quad.tbyte 0x6F0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6F0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x6F8 "QOSMON_FIX_TRAFFIC_BANK0223,"
hexmask.quad.tbyte 0x6F8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6F8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x700 "QOSMON_FIX_TRAFFIC_BANK0224,"
hexmask.quad.tbyte 0x700 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x700 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x708 "QOSMON_FIX_TRAFFIC_BANK0225,"
hexmask.quad.tbyte 0x708 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x708 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x710 "QOSMON_FIX_TRAFFIC_BANK0226,"
hexmask.quad.tbyte 0x710 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x710 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x718 "QOSMON_FIX_TRAFFIC_BANK0227,"
hexmask.quad.tbyte 0x718 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x718 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x720 "QOSMON_FIX_TRAFFIC_BANK0228,"
hexmask.quad.tbyte 0x720 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x720 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x728 "QOSMON_FIX_TRAFFIC_BANK0229,"
hexmask.quad.tbyte 0x728 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x728 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x730 "QOSMON_FIX_TRAFFIC_BANK0230,"
hexmask.quad.tbyte 0x730 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x730 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x738 "QOSMON_FIX_TRAFFIC_BANK0231,"
hexmask.quad.tbyte 0x738 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x738 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x740 "QOSMON_FIX_TRAFFIC_BANK0232,"
hexmask.quad.tbyte 0x740 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x740 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x748 "QOSMON_FIX_TRAFFIC_BANK0233,"
hexmask.quad.tbyte 0x748 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x748 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x750 "QOSMON_FIX_TRAFFIC_BANK0234,"
hexmask.quad.tbyte 0x750 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x750 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x758 "QOSMON_FIX_TRAFFIC_BANK0235,"
hexmask.quad.tbyte 0x758 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x758 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x760 "QOSMON_FIX_TRAFFIC_BANK0236,"
hexmask.quad.tbyte 0x760 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x760 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x768 "QOSMON_FIX_TRAFFIC_BANK0237,"
hexmask.quad.tbyte 0x768 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x768 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x770 "QOSMON_FIX_TRAFFIC_BANK0238,"
hexmask.quad.tbyte 0x770 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x770 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x778 "QOSMON_FIX_TRAFFIC_BANK0239,"
hexmask.quad.tbyte 0x778 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x778 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x780 "QOSMON_FIX_TRAFFIC_BANK0240,"
hexmask.quad.tbyte 0x780 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x780 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x788 "QOSMON_FIX_TRAFFIC_BANK0241,"
hexmask.quad.tbyte 0x788 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x788 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x790 "QOSMON_FIX_TRAFFIC_BANK0242,"
hexmask.quad.tbyte 0x790 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x790 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x798 "QOSMON_FIX_TRAFFIC_BANK0243,"
hexmask.quad.tbyte 0x798 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x798 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x7A0 "QOSMON_FIX_TRAFFIC_BANK0244,"
hexmask.quad.tbyte 0x7A0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7A0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x7A8 "QOSMON_FIX_TRAFFIC_BANK0245,"
hexmask.quad.tbyte 0x7A8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7A8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x7B0 "QOSMON_FIX_TRAFFIC_BANK0246,"
hexmask.quad.tbyte 0x7B0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7B0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x7B8 "QOSMON_FIX_TRAFFIC_BANK0247,"
hexmask.quad.tbyte 0x7B8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7B8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x7C0 "QOSMON_FIX_TRAFFIC_BANK0248,"
hexmask.quad.tbyte 0x7C0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7C0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x7C8 "QOSMON_FIX_TRAFFIC_BANK0249,"
hexmask.quad.tbyte 0x7C8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7C8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x7D0 "QOSMON_FIX_TRAFFIC_BANK0250,"
hexmask.quad.tbyte 0x7D0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7D0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x7D8 "QOSMON_FIX_TRAFFIC_BANK0251,"
hexmask.quad.tbyte 0x7D8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7D8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x7E0 "QOSMON_FIX_TRAFFIC_BANK0252,"
hexmask.quad.tbyte 0x7E0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7E0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x7E8 "QOSMON_FIX_TRAFFIC_BANK0253,"
hexmask.quad.tbyte 0x7E8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7E8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x7F0 "QOSMON_FIX_TRAFFIC_BANK0254,"
hexmask.quad.tbyte 0x7F0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7F0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x7F8 "QOSMON_FIX_TRAFFIC_BANK0255,"
hexmask.quad.tbyte 0x7F8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7F8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x800 "QOSMON_FIX_TRAFFIC_BANK10,"
hexmask.quad.tbyte 0x800 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x800 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x808 "QOSMON_FIX_TRAFFIC_BANK11,"
hexmask.quad.tbyte 0x808 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x808 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x810 "QOSMON_FIX_TRAFFIC_BANK12,"
hexmask.quad.tbyte 0x810 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x810 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x818 "QOSMON_FIX_TRAFFIC_BANK13,"
hexmask.quad.tbyte 0x818 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x818 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x820 "QOSMON_FIX_TRAFFIC_BANK14,"
hexmask.quad.tbyte 0x820 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x820 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x828 "QOSMON_FIX_TRAFFIC_BANK15,"
hexmask.quad.tbyte 0x828 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x828 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x830 "QOSMON_FIX_TRAFFIC_BANK16,"
hexmask.quad.tbyte 0x830 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x830 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x838 "QOSMON_FIX_TRAFFIC_BANK17,"
hexmask.quad.tbyte 0x838 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x838 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x840 "QOSMON_FIX_TRAFFIC_BANK18,"
hexmask.quad.tbyte 0x840 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x840 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x848 "QOSMON_FIX_TRAFFIC_BANK19,"
hexmask.quad.tbyte 0x848 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x848 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x850 "QOSMON_FIX_TRAFFIC_BANK110,"
hexmask.quad.tbyte 0x850 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x850 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x858 "QOSMON_FIX_TRAFFIC_BANK111,"
hexmask.quad.tbyte 0x858 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x858 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x860 "QOSMON_FIX_TRAFFIC_BANK112,"
hexmask.quad.tbyte 0x860 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x860 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x868 "QOSMON_FIX_TRAFFIC_BANK113,"
hexmask.quad.tbyte 0x868 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x868 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x870 "QOSMON_FIX_TRAFFIC_BANK114,"
hexmask.quad.tbyte 0x870 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x870 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x878 "QOSMON_FIX_TRAFFIC_BANK115,"
hexmask.quad.tbyte 0x878 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x878 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x880 "QOSMON_FIX_TRAFFIC_BANK116,"
hexmask.quad.tbyte 0x880 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x880 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x888 "QOSMON_FIX_TRAFFIC_BANK117,"
hexmask.quad.tbyte 0x888 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x888 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x890 "QOSMON_FIX_TRAFFIC_BANK118,"
hexmask.quad.tbyte 0x890 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x890 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x898 "QOSMON_FIX_TRAFFIC_BANK119,"
hexmask.quad.tbyte 0x898 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x898 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x8A0 "QOSMON_FIX_TRAFFIC_BANK120,"
hexmask.quad.tbyte 0x8A0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8A0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x8A8 "QOSMON_FIX_TRAFFIC_BANK121,"
hexmask.quad.tbyte 0x8A8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8A8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x8B0 "QOSMON_FIX_TRAFFIC_BANK122,"
hexmask.quad.tbyte 0x8B0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8B0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x8B8 "QOSMON_FIX_TRAFFIC_BANK123,"
hexmask.quad.tbyte 0x8B8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8B8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x8C0 "QOSMON_FIX_TRAFFIC_BANK124,"
hexmask.quad.tbyte 0x8C0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8C0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x8C8 "QOSMON_FIX_TRAFFIC_BANK125,"
hexmask.quad.tbyte 0x8C8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8C8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x8D0 "QOSMON_FIX_TRAFFIC_BANK126,"
hexmask.quad.tbyte 0x8D0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8D0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x8D8 "QOSMON_FIX_TRAFFIC_BANK127,"
hexmask.quad.tbyte 0x8D8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8D8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x8E0 "QOSMON_FIX_TRAFFIC_BANK128,"
hexmask.quad.tbyte 0x8E0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8E0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x8E8 "QOSMON_FIX_TRAFFIC_BANK129,"
hexmask.quad.tbyte 0x8E8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8E8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x8F0 "QOSMON_FIX_TRAFFIC_BANK130,"
hexmask.quad.tbyte 0x8F0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8F0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x8F8 "QOSMON_FIX_TRAFFIC_BANK131,"
hexmask.quad.tbyte 0x8F8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8F8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x900 "QOSMON_FIX_TRAFFIC_BANK132,"
hexmask.quad.tbyte 0x900 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x900 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x908 "QOSMON_FIX_TRAFFIC_BANK133,"
hexmask.quad.tbyte 0x908 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x908 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x910 "QOSMON_FIX_TRAFFIC_BANK134,"
hexmask.quad.tbyte 0x910 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x910 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x918 "QOSMON_FIX_TRAFFIC_BANK135,"
hexmask.quad.tbyte 0x918 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x918 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x920 "QOSMON_FIX_TRAFFIC_BANK136,"
hexmask.quad.tbyte 0x920 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x920 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x928 "QOSMON_FIX_TRAFFIC_BANK137,"
hexmask.quad.tbyte 0x928 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x928 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x930 "QOSMON_FIX_TRAFFIC_BANK138,"
hexmask.quad.tbyte 0x930 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x930 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x938 "QOSMON_FIX_TRAFFIC_BANK139,"
hexmask.quad.tbyte 0x938 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x938 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x940 "QOSMON_FIX_TRAFFIC_BANK140,"
hexmask.quad.tbyte 0x940 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x940 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x948 "QOSMON_FIX_TRAFFIC_BANK141,"
hexmask.quad.tbyte 0x948 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x948 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x950 "QOSMON_FIX_TRAFFIC_BANK142,"
hexmask.quad.tbyte 0x950 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x950 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x958 "QOSMON_FIX_TRAFFIC_BANK143,"
hexmask.quad.tbyte 0x958 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x958 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x960 "QOSMON_FIX_TRAFFIC_BANK144,"
hexmask.quad.tbyte 0x960 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x960 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x968 "QOSMON_FIX_TRAFFIC_BANK145,"
hexmask.quad.tbyte 0x968 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x968 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x970 "QOSMON_FIX_TRAFFIC_BANK146,"
hexmask.quad.tbyte 0x970 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x970 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x978 "QOSMON_FIX_TRAFFIC_BANK147,"
hexmask.quad.tbyte 0x978 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x978 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x980 "QOSMON_FIX_TRAFFIC_BANK148,"
hexmask.quad.tbyte 0x980 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x980 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x988 "QOSMON_FIX_TRAFFIC_BANK149,"
hexmask.quad.tbyte 0x988 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x988 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x990 "QOSMON_FIX_TRAFFIC_BANK150,"
hexmask.quad.tbyte 0x990 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x990 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x998 "QOSMON_FIX_TRAFFIC_BANK151,"
hexmask.quad.tbyte 0x998 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x998 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x9A0 "QOSMON_FIX_TRAFFIC_BANK152,"
hexmask.quad.tbyte 0x9A0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9A0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x9A8 "QOSMON_FIX_TRAFFIC_BANK153,"
hexmask.quad.tbyte 0x9A8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9A8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x9B0 "QOSMON_FIX_TRAFFIC_BANK154,"
hexmask.quad.tbyte 0x9B0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9B0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x9B8 "QOSMON_FIX_TRAFFIC_BANK155,"
hexmask.quad.tbyte 0x9B8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9B8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x9C0 "QOSMON_FIX_TRAFFIC_BANK156,"
hexmask.quad.tbyte 0x9C0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9C0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x9C8 "QOSMON_FIX_TRAFFIC_BANK157,"
hexmask.quad.tbyte 0x9C8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9C8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x9D0 "QOSMON_FIX_TRAFFIC_BANK158,"
hexmask.quad.tbyte 0x9D0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9D0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x9D8 "QOSMON_FIX_TRAFFIC_BANK159,"
hexmask.quad.tbyte 0x9D8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9D8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x9E0 "QOSMON_FIX_TRAFFIC_BANK160,"
hexmask.quad.tbyte 0x9E0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9E0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x9E8 "QOSMON_FIX_TRAFFIC_BANK161,"
hexmask.quad.tbyte 0x9E8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9E8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x9F0 "QOSMON_FIX_TRAFFIC_BANK162,"
hexmask.quad.tbyte 0x9F0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9F0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0x9F8 "QOSMON_FIX_TRAFFIC_BANK163,"
hexmask.quad.tbyte 0x9F8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9F8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA00 "QOSMON_FIX_TRAFFIC_BANK164,"
hexmask.quad.tbyte 0xA00 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA00 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA08 "QOSMON_FIX_TRAFFIC_BANK165,"
hexmask.quad.tbyte 0xA08 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA08 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA10 "QOSMON_FIX_TRAFFIC_BANK166,"
hexmask.quad.tbyte 0xA10 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA10 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA18 "QOSMON_FIX_TRAFFIC_BANK167,"
hexmask.quad.tbyte 0xA18 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA18 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA20 "QOSMON_FIX_TRAFFIC_BANK168,"
hexmask.quad.tbyte 0xA20 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA20 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA28 "QOSMON_FIX_TRAFFIC_BANK169,"
hexmask.quad.tbyte 0xA28 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA28 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA30 "QOSMON_FIX_TRAFFIC_BANK170,"
hexmask.quad.tbyte 0xA30 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA30 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA38 "QOSMON_FIX_TRAFFIC_BANK171,"
hexmask.quad.tbyte 0xA38 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA38 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA40 "QOSMON_FIX_TRAFFIC_BANK172,"
hexmask.quad.tbyte 0xA40 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA40 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA48 "QOSMON_FIX_TRAFFIC_BANK173,"
hexmask.quad.tbyte 0xA48 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA48 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA50 "QOSMON_FIX_TRAFFIC_BANK174,"
hexmask.quad.tbyte 0xA50 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA50 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA58 "QOSMON_FIX_TRAFFIC_BANK175,"
hexmask.quad.tbyte 0xA58 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA58 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA60 "QOSMON_FIX_TRAFFIC_BANK176,"
hexmask.quad.tbyte 0xA60 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA60 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA68 "QOSMON_FIX_TRAFFIC_BANK177,"
hexmask.quad.tbyte 0xA68 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA68 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA70 "QOSMON_FIX_TRAFFIC_BANK178,"
hexmask.quad.tbyte 0xA70 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA70 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA78 "QOSMON_FIX_TRAFFIC_BANK179,"
hexmask.quad.tbyte 0xA78 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA78 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA80 "QOSMON_FIX_TRAFFIC_BANK180,"
hexmask.quad.tbyte 0xA80 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA80 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA88 "QOSMON_FIX_TRAFFIC_BANK181,"
hexmask.quad.tbyte 0xA88 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA88 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA90 "QOSMON_FIX_TRAFFIC_BANK182,"
hexmask.quad.tbyte 0xA90 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA90 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xA98 "QOSMON_FIX_TRAFFIC_BANK183,"
hexmask.quad.tbyte 0xA98 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA98 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xAA0 "QOSMON_FIX_TRAFFIC_BANK184,"
hexmask.quad.tbyte 0xAA0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAA0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xAA8 "QOSMON_FIX_TRAFFIC_BANK185,"
hexmask.quad.tbyte 0xAA8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAA8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xAB0 "QOSMON_FIX_TRAFFIC_BANK186,"
hexmask.quad.tbyte 0xAB0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAB0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xAB8 "QOSMON_FIX_TRAFFIC_BANK187,"
hexmask.quad.tbyte 0xAB8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAB8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xAC0 "QOSMON_FIX_TRAFFIC_BANK188,"
hexmask.quad.tbyte 0xAC0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAC0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xAC8 "QOSMON_FIX_TRAFFIC_BANK189,"
hexmask.quad.tbyte 0xAC8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAC8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xAD0 "QOSMON_FIX_TRAFFIC_BANK190,"
hexmask.quad.tbyte 0xAD0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAD0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xAD8 "QOSMON_FIX_TRAFFIC_BANK191,"
hexmask.quad.tbyte 0xAD8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAD8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xAE0 "QOSMON_FIX_TRAFFIC_BANK192,"
hexmask.quad.tbyte 0xAE0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAE0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xAE8 "QOSMON_FIX_TRAFFIC_BANK193,"
hexmask.quad.tbyte 0xAE8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAE8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xAF0 "QOSMON_FIX_TRAFFIC_BANK194,"
hexmask.quad.tbyte 0xAF0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAF0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xAF8 "QOSMON_FIX_TRAFFIC_BANK195,"
hexmask.quad.tbyte 0xAF8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAF8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB00 "QOSMON_FIX_TRAFFIC_BANK196,"
hexmask.quad.tbyte 0xB00 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB00 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB08 "QOSMON_FIX_TRAFFIC_BANK197,"
hexmask.quad.tbyte 0xB08 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB08 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB10 "QOSMON_FIX_TRAFFIC_BANK198,"
hexmask.quad.tbyte 0xB10 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB10 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB18 "QOSMON_FIX_TRAFFIC_BANK199,"
hexmask.quad.tbyte 0xB18 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB18 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB20 "QOSMON_FIX_TRAFFIC_BANK1100,"
hexmask.quad.tbyte 0xB20 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB20 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB28 "QOSMON_FIX_TRAFFIC_BANK1101,"
hexmask.quad.tbyte 0xB28 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB28 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB30 "QOSMON_FIX_TRAFFIC_BANK1102,"
hexmask.quad.tbyte 0xB30 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB30 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB38 "QOSMON_FIX_TRAFFIC_BANK1103,"
hexmask.quad.tbyte 0xB38 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB38 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB40 "QOSMON_FIX_TRAFFIC_BANK1104,"
hexmask.quad.tbyte 0xB40 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB40 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB48 "QOSMON_FIX_TRAFFIC_BANK1105,"
hexmask.quad.tbyte 0xB48 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB48 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB50 "QOSMON_FIX_TRAFFIC_BANK1106,"
hexmask.quad.tbyte 0xB50 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB50 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB58 "QOSMON_FIX_TRAFFIC_BANK1107,"
hexmask.quad.tbyte 0xB58 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB58 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB60 "QOSMON_FIX_TRAFFIC_BANK1108,"
hexmask.quad.tbyte 0xB60 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB60 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB68 "QOSMON_FIX_TRAFFIC_BANK1109,"
hexmask.quad.tbyte 0xB68 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB68 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB70 "QOSMON_FIX_TRAFFIC_BANK1110,"
hexmask.quad.tbyte 0xB70 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB70 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB78 "QOSMON_FIX_TRAFFIC_BANK1111,"
hexmask.quad.tbyte 0xB78 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB78 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB80 "QOSMON_FIX_TRAFFIC_BANK1112,"
hexmask.quad.tbyte 0xB80 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB80 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB88 "QOSMON_FIX_TRAFFIC_BANK1113,"
hexmask.quad.tbyte 0xB88 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB88 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB90 "QOSMON_FIX_TRAFFIC_BANK1114,"
hexmask.quad.tbyte 0xB90 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB90 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xB98 "QOSMON_FIX_TRAFFIC_BANK1115,"
hexmask.quad.tbyte 0xB98 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB98 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xBA0 "QOSMON_FIX_TRAFFIC_BANK1116,"
hexmask.quad.tbyte 0xBA0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBA0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xBA8 "QOSMON_FIX_TRAFFIC_BANK1117,"
hexmask.quad.tbyte 0xBA8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBA8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xBB0 "QOSMON_FIX_TRAFFIC_BANK1118,"
hexmask.quad.tbyte 0xBB0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBB0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xBB8 "QOSMON_FIX_TRAFFIC_BANK1119,"
hexmask.quad.tbyte 0xBB8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBB8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xBC0 "QOSMON_FIX_TRAFFIC_BANK1120,"
hexmask.quad.tbyte 0xBC0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBC0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xBC8 "QOSMON_FIX_TRAFFIC_BANK1121,"
hexmask.quad.tbyte 0xBC8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBC8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xBD0 "QOSMON_FIX_TRAFFIC_BANK1122,"
hexmask.quad.tbyte 0xBD0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBD0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xBD8 "QOSMON_FIX_TRAFFIC_BANK1123,"
hexmask.quad.tbyte 0xBD8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBD8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xBE0 "QOSMON_FIX_TRAFFIC_BANK1124,"
hexmask.quad.tbyte 0xBE0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBE0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xBE8 "QOSMON_FIX_TRAFFIC_BANK1125,"
hexmask.quad.tbyte 0xBE8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBE8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xBF0 "QOSMON_FIX_TRAFFIC_BANK1126,"
hexmask.quad.tbyte 0xBF0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBF0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xBF8 "QOSMON_FIX_TRAFFIC_BANK1127,"
hexmask.quad.tbyte 0xBF8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBF8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC00 "QOSMON_FIX_TRAFFIC_BANK1128,"
hexmask.quad.tbyte 0xC00 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC00 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC08 "QOSMON_FIX_TRAFFIC_BANK1129,"
hexmask.quad.tbyte 0xC08 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC08 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC10 "QOSMON_FIX_TRAFFIC_BANK1130,"
hexmask.quad.tbyte 0xC10 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC10 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC18 "QOSMON_FIX_TRAFFIC_BANK1131,"
hexmask.quad.tbyte 0xC18 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC18 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC20 "QOSMON_FIX_TRAFFIC_BANK1132,"
hexmask.quad.tbyte 0xC20 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC20 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC28 "QOSMON_FIX_TRAFFIC_BANK1133,"
hexmask.quad.tbyte 0xC28 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC28 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC30 "QOSMON_FIX_TRAFFIC_BANK1134,"
hexmask.quad.tbyte 0xC30 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC30 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC38 "QOSMON_FIX_TRAFFIC_BANK1135,"
hexmask.quad.tbyte 0xC38 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC38 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC40 "QOSMON_FIX_TRAFFIC_BANK1136,"
hexmask.quad.tbyte 0xC40 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC40 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC48 "QOSMON_FIX_TRAFFIC_BANK1137,"
hexmask.quad.tbyte 0xC48 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC48 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC50 "QOSMON_FIX_TRAFFIC_BANK1138,"
hexmask.quad.tbyte 0xC50 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC50 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC58 "QOSMON_FIX_TRAFFIC_BANK1139,"
hexmask.quad.tbyte 0xC58 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC58 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC60 "QOSMON_FIX_TRAFFIC_BANK1140,"
hexmask.quad.tbyte 0xC60 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC60 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC68 "QOSMON_FIX_TRAFFIC_BANK1141,"
hexmask.quad.tbyte 0xC68 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC68 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC70 "QOSMON_FIX_TRAFFIC_BANK1142,"
hexmask.quad.tbyte 0xC70 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC70 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC78 "QOSMON_FIX_TRAFFIC_BANK1143,"
hexmask.quad.tbyte 0xC78 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC78 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC80 "QOSMON_FIX_TRAFFIC_BANK1144,"
hexmask.quad.tbyte 0xC80 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC80 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC88 "QOSMON_FIX_TRAFFIC_BANK1145,"
hexmask.quad.tbyte 0xC88 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC88 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC90 "QOSMON_FIX_TRAFFIC_BANK1146,"
hexmask.quad.tbyte 0xC90 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC90 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xC98 "QOSMON_FIX_TRAFFIC_BANK1147,"
hexmask.quad.tbyte 0xC98 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC98 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xCA0 "QOSMON_FIX_TRAFFIC_BANK1148,"
hexmask.quad.tbyte 0xCA0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCA0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xCA8 "QOSMON_FIX_TRAFFIC_BANK1149,"
hexmask.quad.tbyte 0xCA8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCA8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xCB0 "QOSMON_FIX_TRAFFIC_BANK1150,"
hexmask.quad.tbyte 0xCB0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCB0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xCB8 "QOSMON_FIX_TRAFFIC_BANK1151,"
hexmask.quad.tbyte 0xCB8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCB8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xCC0 "QOSMON_FIX_TRAFFIC_BANK1152,"
hexmask.quad.tbyte 0xCC0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCC0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xCC8 "QOSMON_FIX_TRAFFIC_BANK1153,"
hexmask.quad.tbyte 0xCC8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCC8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xCD0 "QOSMON_FIX_TRAFFIC_BANK1154,"
hexmask.quad.tbyte 0xCD0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCD0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xCD8 "QOSMON_FIX_TRAFFIC_BANK1155,"
hexmask.quad.tbyte 0xCD8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCD8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xCE0 "QOSMON_FIX_TRAFFIC_BANK1156,"
hexmask.quad.tbyte 0xCE0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCE0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xCE8 "QOSMON_FIX_TRAFFIC_BANK1157,"
hexmask.quad.tbyte 0xCE8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCE8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xCF0 "QOSMON_FIX_TRAFFIC_BANK1158,"
hexmask.quad.tbyte 0xCF0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCF0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xCF8 "QOSMON_FIX_TRAFFIC_BANK1159,"
hexmask.quad.tbyte 0xCF8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCF8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD00 "QOSMON_FIX_TRAFFIC_BANK1160,"
hexmask.quad.tbyte 0xD00 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD00 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD08 "QOSMON_FIX_TRAFFIC_BANK1161,"
hexmask.quad.tbyte 0xD08 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD08 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD10 "QOSMON_FIX_TRAFFIC_BANK1162,"
hexmask.quad.tbyte 0xD10 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD10 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD18 "QOSMON_FIX_TRAFFIC_BANK1163,"
hexmask.quad.tbyte 0xD18 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD18 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD20 "QOSMON_FIX_TRAFFIC_BANK1164,"
hexmask.quad.tbyte 0xD20 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD20 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD28 "QOSMON_FIX_TRAFFIC_BANK1165,"
hexmask.quad.tbyte 0xD28 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD28 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD30 "QOSMON_FIX_TRAFFIC_BANK1166,"
hexmask.quad.tbyte 0xD30 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD30 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD38 "QOSMON_FIX_TRAFFIC_BANK1167,"
hexmask.quad.tbyte 0xD38 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD38 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD40 "QOSMON_FIX_TRAFFIC_BANK1168,"
hexmask.quad.tbyte 0xD40 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD40 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD48 "QOSMON_FIX_TRAFFIC_BANK1169,"
hexmask.quad.tbyte 0xD48 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD48 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD50 "QOSMON_FIX_TRAFFIC_BANK1170,"
hexmask.quad.tbyte 0xD50 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD50 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD58 "QOSMON_FIX_TRAFFIC_BANK1171,"
hexmask.quad.tbyte 0xD58 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD58 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD60 "QOSMON_FIX_TRAFFIC_BANK1172,"
hexmask.quad.tbyte 0xD60 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD60 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD68 "QOSMON_FIX_TRAFFIC_BANK1173,"
hexmask.quad.tbyte 0xD68 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD68 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD70 "QOSMON_FIX_TRAFFIC_BANK1174,"
hexmask.quad.tbyte 0xD70 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD70 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD78 "QOSMON_FIX_TRAFFIC_BANK1175,"
hexmask.quad.tbyte 0xD78 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD78 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD80 "QOSMON_FIX_TRAFFIC_BANK1176,"
hexmask.quad.tbyte 0xD80 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD80 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD88 "QOSMON_FIX_TRAFFIC_BANK1177,"
hexmask.quad.tbyte 0xD88 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD88 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD90 "QOSMON_FIX_TRAFFIC_BANK1178,"
hexmask.quad.tbyte 0xD90 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD90 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xD98 "QOSMON_FIX_TRAFFIC_BANK1179,"
hexmask.quad.tbyte 0xD98 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD98 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xDA0 "QOSMON_FIX_TRAFFIC_BANK1180,"
hexmask.quad.tbyte 0xDA0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDA0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xDA8 "QOSMON_FIX_TRAFFIC_BANK1181,"
hexmask.quad.tbyte 0xDA8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDA8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xDB0 "QOSMON_FIX_TRAFFIC_BANK1182,"
hexmask.quad.tbyte 0xDB0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDB0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xDB8 "QOSMON_FIX_TRAFFIC_BANK1183,"
hexmask.quad.tbyte 0xDB8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDB8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xDC0 "QOSMON_FIX_TRAFFIC_BANK1184,"
hexmask.quad.tbyte 0xDC0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDC0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xDC8 "QOSMON_FIX_TRAFFIC_BANK1185,"
hexmask.quad.tbyte 0xDC8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDC8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xDD0 "QOSMON_FIX_TRAFFIC_BANK1186,"
hexmask.quad.tbyte 0xDD0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDD0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xDD8 "QOSMON_FIX_TRAFFIC_BANK1187,"
hexmask.quad.tbyte 0xDD8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDD8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xDE0 "QOSMON_FIX_TRAFFIC_BANK1188,"
hexmask.quad.tbyte 0xDE0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDE0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xDE8 "QOSMON_FIX_TRAFFIC_BANK1189,"
hexmask.quad.tbyte 0xDE8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDE8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xDF0 "QOSMON_FIX_TRAFFIC_BANK1190,"
hexmask.quad.tbyte 0xDF0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDF0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xDF8 "QOSMON_FIX_TRAFFIC_BANK1191,"
hexmask.quad.tbyte 0xDF8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDF8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE00 "QOSMON_FIX_TRAFFIC_BANK1192,"
hexmask.quad.tbyte 0xE00 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE00 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE08 "QOSMON_FIX_TRAFFIC_BANK1193,"
hexmask.quad.tbyte 0xE08 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE08 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE10 "QOSMON_FIX_TRAFFIC_BANK1194,"
hexmask.quad.tbyte 0xE10 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE10 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE18 "QOSMON_FIX_TRAFFIC_BANK1195,"
hexmask.quad.tbyte 0xE18 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE18 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE20 "QOSMON_FIX_TRAFFIC_BANK1196,"
hexmask.quad.tbyte 0xE20 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE20 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE28 "QOSMON_FIX_TRAFFIC_BANK1197,"
hexmask.quad.tbyte 0xE28 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE28 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE30 "QOSMON_FIX_TRAFFIC_BANK1198,"
hexmask.quad.tbyte 0xE30 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE30 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE38 "QOSMON_FIX_TRAFFIC_BANK1199,"
hexmask.quad.tbyte 0xE38 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE38 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE40 "QOSMON_FIX_TRAFFIC_BANK1200,"
hexmask.quad.tbyte 0xE40 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE40 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE48 "QOSMON_FIX_TRAFFIC_BANK1201,"
hexmask.quad.tbyte 0xE48 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE48 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE50 "QOSMON_FIX_TRAFFIC_BANK1202,"
hexmask.quad.tbyte 0xE50 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE50 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE58 "QOSMON_FIX_TRAFFIC_BANK1203,"
hexmask.quad.tbyte 0xE58 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE58 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE60 "QOSMON_FIX_TRAFFIC_BANK1204,"
hexmask.quad.tbyte 0xE60 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE60 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE68 "QOSMON_FIX_TRAFFIC_BANK1205,"
hexmask.quad.tbyte 0xE68 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE68 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE70 "QOSMON_FIX_TRAFFIC_BANK1206,"
hexmask.quad.tbyte 0xE70 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE70 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE78 "QOSMON_FIX_TRAFFIC_BANK1207,"
hexmask.quad.tbyte 0xE78 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE78 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE80 "QOSMON_FIX_TRAFFIC_BANK1208,"
hexmask.quad.tbyte 0xE80 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE80 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE88 "QOSMON_FIX_TRAFFIC_BANK1209,"
hexmask.quad.tbyte 0xE88 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE88 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE90 "QOSMON_FIX_TRAFFIC_BANK1210,"
hexmask.quad.tbyte 0xE90 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE90 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xE98 "QOSMON_FIX_TRAFFIC_BANK1211,"
hexmask.quad.tbyte 0xE98 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE98 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xEA0 "QOSMON_FIX_TRAFFIC_BANK1212,"
hexmask.quad.tbyte 0xEA0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEA0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xEA8 "QOSMON_FIX_TRAFFIC_BANK1213,"
hexmask.quad.tbyte 0xEA8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEA8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xEB0 "QOSMON_FIX_TRAFFIC_BANK1214,"
hexmask.quad.tbyte 0xEB0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEB0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xEB8 "QOSMON_FIX_TRAFFIC_BANK1215,"
hexmask.quad.tbyte 0xEB8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEB8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xEC0 "QOSMON_FIX_TRAFFIC_BANK1216,"
hexmask.quad.tbyte 0xEC0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEC0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xEC8 "QOSMON_FIX_TRAFFIC_BANK1217,"
hexmask.quad.tbyte 0xEC8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEC8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xED0 "QOSMON_FIX_TRAFFIC_BANK1218,"
hexmask.quad.tbyte 0xED0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xED0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xED8 "QOSMON_FIX_TRAFFIC_BANK1219,"
hexmask.quad.tbyte 0xED8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xED8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xEE0 "QOSMON_FIX_TRAFFIC_BANK1220,"
hexmask.quad.tbyte 0xEE0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEE0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xEE8 "QOSMON_FIX_TRAFFIC_BANK1221,"
hexmask.quad.tbyte 0xEE8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEE8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xEF0 "QOSMON_FIX_TRAFFIC_BANK1222,"
hexmask.quad.tbyte 0xEF0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEF0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xEF8 "QOSMON_FIX_TRAFFIC_BANK1223,"
hexmask.quad.tbyte 0xEF8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEF8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF00 "QOSMON_FIX_TRAFFIC_BANK1224,"
hexmask.quad.tbyte 0xF00 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF00 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF08 "QOSMON_FIX_TRAFFIC_BANK1225,"
hexmask.quad.tbyte 0xF08 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF08 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF10 "QOSMON_FIX_TRAFFIC_BANK1226,"
hexmask.quad.tbyte 0xF10 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF10 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF18 "QOSMON_FIX_TRAFFIC_BANK1227,"
hexmask.quad.tbyte 0xF18 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF18 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF20 "QOSMON_FIX_TRAFFIC_BANK1228,"
hexmask.quad.tbyte 0xF20 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF20 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF28 "QOSMON_FIX_TRAFFIC_BANK1229,"
hexmask.quad.tbyte 0xF28 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF28 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF30 "QOSMON_FIX_TRAFFIC_BANK1230,"
hexmask.quad.tbyte 0xF30 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF30 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF38 "QOSMON_FIX_TRAFFIC_BANK1231,"
hexmask.quad.tbyte 0xF38 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF38 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF40 "QOSMON_FIX_TRAFFIC_BANK1232,"
hexmask.quad.tbyte 0xF40 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF40 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF48 "QOSMON_FIX_TRAFFIC_BANK1233,"
hexmask.quad.tbyte 0xF48 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF48 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF50 "QOSMON_FIX_TRAFFIC_BANK1234,"
hexmask.quad.tbyte 0xF50 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF50 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF58 "QOSMON_FIX_TRAFFIC_BANK1235,"
hexmask.quad.tbyte 0xF58 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF58 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF60 "QOSMON_FIX_TRAFFIC_BANK1236,"
hexmask.quad.tbyte 0xF60 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF60 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF68 "QOSMON_FIX_TRAFFIC_BANK1237,"
hexmask.quad.tbyte 0xF68 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF68 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF70 "QOSMON_FIX_TRAFFIC_BANK1238,"
hexmask.quad.tbyte 0xF70 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF70 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF78 "QOSMON_FIX_TRAFFIC_BANK1239,"
hexmask.quad.tbyte 0xF78 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF78 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF80 "QOSMON_FIX_TRAFFIC_BANK1240,"
hexmask.quad.tbyte 0xF80 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF80 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF88 "QOSMON_FIX_TRAFFIC_BANK1241,"
hexmask.quad.tbyte 0xF88 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF88 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF90 "QOSMON_FIX_TRAFFIC_BANK1242,"
hexmask.quad.tbyte 0xF90 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF90 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xF98 "QOSMON_FIX_TRAFFIC_BANK1243,"
hexmask.quad.tbyte 0xF98 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF98 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xFA0 "QOSMON_FIX_TRAFFIC_BANK1244,"
hexmask.quad.tbyte 0xFA0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFA0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xFA8 "QOSMON_FIX_TRAFFIC_BANK1245,"
hexmask.quad.tbyte 0xFA8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFA8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xFB0 "QOSMON_FIX_TRAFFIC_BANK1246,"
hexmask.quad.tbyte 0xFB0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFB0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xFB8 "QOSMON_FIX_TRAFFIC_BANK1247,"
hexmask.quad.tbyte 0xFB8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFB8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xFC0 "QOSMON_FIX_TRAFFIC_BANK1248,"
hexmask.quad.tbyte 0xFC0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFC0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xFC8 "QOSMON_FIX_TRAFFIC_BANK1249,"
hexmask.quad.tbyte 0xFC8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFC8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xFD0 "QOSMON_FIX_TRAFFIC_BANK1250,"
hexmask.quad.tbyte 0xFD0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFD0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xFD8 "QOSMON_FIX_TRAFFIC_BANK1251,"
hexmask.quad.tbyte 0xFD8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFD8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xFE0 "QOSMON_FIX_TRAFFIC_BANK1252,"
hexmask.quad.tbyte 0xFE0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFE0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xFE8 "QOSMON_FIX_TRAFFIC_BANK1253,"
hexmask.quad.tbyte 0xFE8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFE8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xFF0 "QOSMON_FIX_TRAFFIC_BANK1254,"
hexmask.quad.tbyte 0xFF0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFF0 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
line.quad 0xFF8 "QOSMON_FIX_TRAFFIC_BANK1255,"
hexmask.quad.tbyte 0xFF8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFF8 0.--39. 1. "traffic_fix,Bandwidth performance result of FIX."
rgroup.quad 0x5000++0xFFF
line.quad 0x0 "QOSMON_BE_TRAFFIC_BANK00,"
hexmask.quad.tbyte 0x0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x8 "QOSMON_BE_TRAFFIC_BANK01,"
hexmask.quad.tbyte 0x8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x10 "QOSMON_BE_TRAFFIC_BANK02,"
hexmask.quad.tbyte 0x10 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x10 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x18 "QOSMON_BE_TRAFFIC_BANK03,"
hexmask.quad.tbyte 0x18 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x18 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x20 "QOSMON_BE_TRAFFIC_BANK04,"
hexmask.quad.tbyte 0x20 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x20 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x28 "QOSMON_BE_TRAFFIC_BANK05,"
hexmask.quad.tbyte 0x28 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x28 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x30 "QOSMON_BE_TRAFFIC_BANK06,"
hexmask.quad.tbyte 0x30 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x30 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x38 "QOSMON_BE_TRAFFIC_BANK07,"
hexmask.quad.tbyte 0x38 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x38 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x40 "QOSMON_BE_TRAFFIC_BANK08,"
hexmask.quad.tbyte 0x40 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x40 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x48 "QOSMON_BE_TRAFFIC_BANK09,"
hexmask.quad.tbyte 0x48 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x48 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x50 "QOSMON_BE_TRAFFIC_BANK010,"
hexmask.quad.tbyte 0x50 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x50 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x58 "QOSMON_BE_TRAFFIC_BANK011,"
hexmask.quad.tbyte 0x58 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x58 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x60 "QOSMON_BE_TRAFFIC_BANK012,"
hexmask.quad.tbyte 0x60 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x60 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x68 "QOSMON_BE_TRAFFIC_BANK013,"
hexmask.quad.tbyte 0x68 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x68 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x70 "QOSMON_BE_TRAFFIC_BANK014,"
hexmask.quad.tbyte 0x70 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x70 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x78 "QOSMON_BE_TRAFFIC_BANK015,"
hexmask.quad.tbyte 0x78 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x78 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x80 "QOSMON_BE_TRAFFIC_BANK016,"
hexmask.quad.tbyte 0x80 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x80 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x88 "QOSMON_BE_TRAFFIC_BANK017,"
hexmask.quad.tbyte 0x88 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x88 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x90 "QOSMON_BE_TRAFFIC_BANK018,"
hexmask.quad.tbyte 0x90 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x90 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x98 "QOSMON_BE_TRAFFIC_BANK019,"
hexmask.quad.tbyte 0x98 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x98 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA0 "QOSMON_BE_TRAFFIC_BANK020,"
hexmask.quad.tbyte 0xA0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA8 "QOSMON_BE_TRAFFIC_BANK021,"
hexmask.quad.tbyte 0xA8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB0 "QOSMON_BE_TRAFFIC_BANK022,"
hexmask.quad.tbyte 0xB0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB8 "QOSMON_BE_TRAFFIC_BANK023,"
hexmask.quad.tbyte 0xB8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC0 "QOSMON_BE_TRAFFIC_BANK024,"
hexmask.quad.tbyte 0xC0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC8 "QOSMON_BE_TRAFFIC_BANK025,"
hexmask.quad.tbyte 0xC8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD0 "QOSMON_BE_TRAFFIC_BANK026,"
hexmask.quad.tbyte 0xD0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD8 "QOSMON_BE_TRAFFIC_BANK027,"
hexmask.quad.tbyte 0xD8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE0 "QOSMON_BE_TRAFFIC_BANK028,"
hexmask.quad.tbyte 0xE0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE8 "QOSMON_BE_TRAFFIC_BANK029,"
hexmask.quad.tbyte 0xE8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF0 "QOSMON_BE_TRAFFIC_BANK030,"
hexmask.quad.tbyte 0xF0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF8 "QOSMON_BE_TRAFFIC_BANK031,"
hexmask.quad.tbyte 0xF8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x100 "QOSMON_BE_TRAFFIC_BANK032,"
hexmask.quad.tbyte 0x100 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x100 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x108 "QOSMON_BE_TRAFFIC_BANK033,"
hexmask.quad.tbyte 0x108 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x108 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x110 "QOSMON_BE_TRAFFIC_BANK034,"
hexmask.quad.tbyte 0x110 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x110 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x118 "QOSMON_BE_TRAFFIC_BANK035,"
hexmask.quad.tbyte 0x118 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x118 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x120 "QOSMON_BE_TRAFFIC_BANK036,"
hexmask.quad.tbyte 0x120 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x120 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x128 "QOSMON_BE_TRAFFIC_BANK037,"
hexmask.quad.tbyte 0x128 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x128 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x130 "QOSMON_BE_TRAFFIC_BANK038,"
hexmask.quad.tbyte 0x130 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x130 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x138 "QOSMON_BE_TRAFFIC_BANK039,"
hexmask.quad.tbyte 0x138 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x138 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x140 "QOSMON_BE_TRAFFIC_BANK040,"
hexmask.quad.tbyte 0x140 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x140 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x148 "QOSMON_BE_TRAFFIC_BANK041,"
hexmask.quad.tbyte 0x148 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x148 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x150 "QOSMON_BE_TRAFFIC_BANK042,"
hexmask.quad.tbyte 0x150 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x150 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x158 "QOSMON_BE_TRAFFIC_BANK043,"
hexmask.quad.tbyte 0x158 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x158 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x160 "QOSMON_BE_TRAFFIC_BANK044,"
hexmask.quad.tbyte 0x160 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x160 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x168 "QOSMON_BE_TRAFFIC_BANK045,"
hexmask.quad.tbyte 0x168 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x168 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x170 "QOSMON_BE_TRAFFIC_BANK046,"
hexmask.quad.tbyte 0x170 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x170 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x178 "QOSMON_BE_TRAFFIC_BANK047,"
hexmask.quad.tbyte 0x178 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x178 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x180 "QOSMON_BE_TRAFFIC_BANK048,"
hexmask.quad.tbyte 0x180 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x180 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x188 "QOSMON_BE_TRAFFIC_BANK049,"
hexmask.quad.tbyte 0x188 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x188 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x190 "QOSMON_BE_TRAFFIC_BANK050,"
hexmask.quad.tbyte 0x190 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x190 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x198 "QOSMON_BE_TRAFFIC_BANK051,"
hexmask.quad.tbyte 0x198 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x198 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x1A0 "QOSMON_BE_TRAFFIC_BANK052,"
hexmask.quad.tbyte 0x1A0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1A0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x1A8 "QOSMON_BE_TRAFFIC_BANK053,"
hexmask.quad.tbyte 0x1A8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1A8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x1B0 "QOSMON_BE_TRAFFIC_BANK054,"
hexmask.quad.tbyte 0x1B0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1B0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x1B8 "QOSMON_BE_TRAFFIC_BANK055,"
hexmask.quad.tbyte 0x1B8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1B8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x1C0 "QOSMON_BE_TRAFFIC_BANK056,"
hexmask.quad.tbyte 0x1C0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1C0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x1C8 "QOSMON_BE_TRAFFIC_BANK057,"
hexmask.quad.tbyte 0x1C8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1C8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x1D0 "QOSMON_BE_TRAFFIC_BANK058,"
hexmask.quad.tbyte 0x1D0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1D0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x1D8 "QOSMON_BE_TRAFFIC_BANK059,"
hexmask.quad.tbyte 0x1D8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1D8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x1E0 "QOSMON_BE_TRAFFIC_BANK060,"
hexmask.quad.tbyte 0x1E0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1E0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x1E8 "QOSMON_BE_TRAFFIC_BANK061,"
hexmask.quad.tbyte 0x1E8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1E8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x1F0 "QOSMON_BE_TRAFFIC_BANK062,"
hexmask.quad.tbyte 0x1F0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1F0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x1F8 "QOSMON_BE_TRAFFIC_BANK063,"
hexmask.quad.tbyte 0x1F8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x1F8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x200 "QOSMON_BE_TRAFFIC_BANK064,"
hexmask.quad.tbyte 0x200 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x200 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x208 "QOSMON_BE_TRAFFIC_BANK065,"
hexmask.quad.tbyte 0x208 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x208 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x210 "QOSMON_BE_TRAFFIC_BANK066,"
hexmask.quad.tbyte 0x210 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x210 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x218 "QOSMON_BE_TRAFFIC_BANK067,"
hexmask.quad.tbyte 0x218 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x218 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x220 "QOSMON_BE_TRAFFIC_BANK068,"
hexmask.quad.tbyte 0x220 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x220 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x228 "QOSMON_BE_TRAFFIC_BANK069,"
hexmask.quad.tbyte 0x228 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x228 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x230 "QOSMON_BE_TRAFFIC_BANK070,"
hexmask.quad.tbyte 0x230 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x230 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x238 "QOSMON_BE_TRAFFIC_BANK071,"
hexmask.quad.tbyte 0x238 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x238 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x240 "QOSMON_BE_TRAFFIC_BANK072,"
hexmask.quad.tbyte 0x240 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x240 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x248 "QOSMON_BE_TRAFFIC_BANK073,"
hexmask.quad.tbyte 0x248 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x248 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x250 "QOSMON_BE_TRAFFIC_BANK074,"
hexmask.quad.tbyte 0x250 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x250 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x258 "QOSMON_BE_TRAFFIC_BANK075,"
hexmask.quad.tbyte 0x258 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x258 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x260 "QOSMON_BE_TRAFFIC_BANK076,"
hexmask.quad.tbyte 0x260 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x260 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x268 "QOSMON_BE_TRAFFIC_BANK077,"
hexmask.quad.tbyte 0x268 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x268 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x270 "QOSMON_BE_TRAFFIC_BANK078,"
hexmask.quad.tbyte 0x270 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x270 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x278 "QOSMON_BE_TRAFFIC_BANK079,"
hexmask.quad.tbyte 0x278 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x278 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x280 "QOSMON_BE_TRAFFIC_BANK080,"
hexmask.quad.tbyte 0x280 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x280 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x288 "QOSMON_BE_TRAFFIC_BANK081,"
hexmask.quad.tbyte 0x288 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x288 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x290 "QOSMON_BE_TRAFFIC_BANK082,"
hexmask.quad.tbyte 0x290 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x290 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x298 "QOSMON_BE_TRAFFIC_BANK083,"
hexmask.quad.tbyte 0x298 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x298 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x2A0 "QOSMON_BE_TRAFFIC_BANK084,"
hexmask.quad.tbyte 0x2A0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2A0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x2A8 "QOSMON_BE_TRAFFIC_BANK085,"
hexmask.quad.tbyte 0x2A8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2A8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x2B0 "QOSMON_BE_TRAFFIC_BANK086,"
hexmask.quad.tbyte 0x2B0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2B0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x2B8 "QOSMON_BE_TRAFFIC_BANK087,"
hexmask.quad.tbyte 0x2B8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2B8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x2C0 "QOSMON_BE_TRAFFIC_BANK088,"
hexmask.quad.tbyte 0x2C0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2C0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x2C8 "QOSMON_BE_TRAFFIC_BANK089,"
hexmask.quad.tbyte 0x2C8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2C8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x2D0 "QOSMON_BE_TRAFFIC_BANK090,"
hexmask.quad.tbyte 0x2D0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2D0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x2D8 "QOSMON_BE_TRAFFIC_BANK091,"
hexmask.quad.tbyte 0x2D8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2D8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x2E0 "QOSMON_BE_TRAFFIC_BANK092,"
hexmask.quad.tbyte 0x2E0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2E0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x2E8 "QOSMON_BE_TRAFFIC_BANK093,"
hexmask.quad.tbyte 0x2E8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2E8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x2F0 "QOSMON_BE_TRAFFIC_BANK094,"
hexmask.quad.tbyte 0x2F0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2F0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x2F8 "QOSMON_BE_TRAFFIC_BANK095,"
hexmask.quad.tbyte 0x2F8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x2F8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x300 "QOSMON_BE_TRAFFIC_BANK096,"
hexmask.quad.tbyte 0x300 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x300 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x308 "QOSMON_BE_TRAFFIC_BANK097,"
hexmask.quad.tbyte 0x308 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x308 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x310 "QOSMON_BE_TRAFFIC_BANK098,"
hexmask.quad.tbyte 0x310 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x310 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x318 "QOSMON_BE_TRAFFIC_BANK099,"
hexmask.quad.tbyte 0x318 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x318 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x320 "QOSMON_BE_TRAFFIC_BANK0100,"
hexmask.quad.tbyte 0x320 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x320 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x328 "QOSMON_BE_TRAFFIC_BANK0101,"
hexmask.quad.tbyte 0x328 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x328 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x330 "QOSMON_BE_TRAFFIC_BANK0102,"
hexmask.quad.tbyte 0x330 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x330 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x338 "QOSMON_BE_TRAFFIC_BANK0103,"
hexmask.quad.tbyte 0x338 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x338 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x340 "QOSMON_BE_TRAFFIC_BANK0104,"
hexmask.quad.tbyte 0x340 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x340 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x348 "QOSMON_BE_TRAFFIC_BANK0105,"
hexmask.quad.tbyte 0x348 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x348 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x350 "QOSMON_BE_TRAFFIC_BANK0106,"
hexmask.quad.tbyte 0x350 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x350 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x358 "QOSMON_BE_TRAFFIC_BANK0107,"
hexmask.quad.tbyte 0x358 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x358 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x360 "QOSMON_BE_TRAFFIC_BANK0108,"
hexmask.quad.tbyte 0x360 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x360 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x368 "QOSMON_BE_TRAFFIC_BANK0109,"
hexmask.quad.tbyte 0x368 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x368 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x370 "QOSMON_BE_TRAFFIC_BANK0110,"
hexmask.quad.tbyte 0x370 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x370 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x378 "QOSMON_BE_TRAFFIC_BANK0111,"
hexmask.quad.tbyte 0x378 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x378 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x380 "QOSMON_BE_TRAFFIC_BANK0112,"
hexmask.quad.tbyte 0x380 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x380 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x388 "QOSMON_BE_TRAFFIC_BANK0113,"
hexmask.quad.tbyte 0x388 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x388 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x390 "QOSMON_BE_TRAFFIC_BANK0114,"
hexmask.quad.tbyte 0x390 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x390 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x398 "QOSMON_BE_TRAFFIC_BANK0115,"
hexmask.quad.tbyte 0x398 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x398 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x3A0 "QOSMON_BE_TRAFFIC_BANK0116,"
hexmask.quad.tbyte 0x3A0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3A0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x3A8 "QOSMON_BE_TRAFFIC_BANK0117,"
hexmask.quad.tbyte 0x3A8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3A8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x3B0 "QOSMON_BE_TRAFFIC_BANK0118,"
hexmask.quad.tbyte 0x3B0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3B0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x3B8 "QOSMON_BE_TRAFFIC_BANK0119,"
hexmask.quad.tbyte 0x3B8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3B8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x3C0 "QOSMON_BE_TRAFFIC_BANK0120,"
hexmask.quad.tbyte 0x3C0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3C0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x3C8 "QOSMON_BE_TRAFFIC_BANK0121,"
hexmask.quad.tbyte 0x3C8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3C8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x3D0 "QOSMON_BE_TRAFFIC_BANK0122,"
hexmask.quad.tbyte 0x3D0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3D0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x3D8 "QOSMON_BE_TRAFFIC_BANK0123,"
hexmask.quad.tbyte 0x3D8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3D8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x3E0 "QOSMON_BE_TRAFFIC_BANK0124,"
hexmask.quad.tbyte 0x3E0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3E0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x3E8 "QOSMON_BE_TRAFFIC_BANK0125,"
hexmask.quad.tbyte 0x3E8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3E8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x3F0 "QOSMON_BE_TRAFFIC_BANK0126,"
hexmask.quad.tbyte 0x3F0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3F0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x3F8 "QOSMON_BE_TRAFFIC_BANK0127,"
hexmask.quad.tbyte 0x3F8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x3F8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x400 "QOSMON_BE_TRAFFIC_BANK0128,"
hexmask.quad.tbyte 0x400 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x400 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x408 "QOSMON_BE_TRAFFIC_BANK0129,"
hexmask.quad.tbyte 0x408 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x408 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x410 "QOSMON_BE_TRAFFIC_BANK0130,"
hexmask.quad.tbyte 0x410 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x410 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x418 "QOSMON_BE_TRAFFIC_BANK0131,"
hexmask.quad.tbyte 0x418 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x418 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x420 "QOSMON_BE_TRAFFIC_BANK0132,"
hexmask.quad.tbyte 0x420 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x420 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x428 "QOSMON_BE_TRAFFIC_BANK0133,"
hexmask.quad.tbyte 0x428 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x428 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x430 "QOSMON_BE_TRAFFIC_BANK0134,"
hexmask.quad.tbyte 0x430 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x430 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x438 "QOSMON_BE_TRAFFIC_BANK0135,"
hexmask.quad.tbyte 0x438 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x438 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x440 "QOSMON_BE_TRAFFIC_BANK0136,"
hexmask.quad.tbyte 0x440 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x440 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x448 "QOSMON_BE_TRAFFIC_BANK0137,"
hexmask.quad.tbyte 0x448 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x448 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x450 "QOSMON_BE_TRAFFIC_BANK0138,"
hexmask.quad.tbyte 0x450 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x450 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x458 "QOSMON_BE_TRAFFIC_BANK0139,"
hexmask.quad.tbyte 0x458 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x458 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x460 "QOSMON_BE_TRAFFIC_BANK0140,"
hexmask.quad.tbyte 0x460 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x460 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x468 "QOSMON_BE_TRAFFIC_BANK0141,"
hexmask.quad.tbyte 0x468 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x468 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x470 "QOSMON_BE_TRAFFIC_BANK0142,"
hexmask.quad.tbyte 0x470 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x470 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x478 "QOSMON_BE_TRAFFIC_BANK0143,"
hexmask.quad.tbyte 0x478 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x478 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x480 "QOSMON_BE_TRAFFIC_BANK0144,"
hexmask.quad.tbyte 0x480 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x480 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x488 "QOSMON_BE_TRAFFIC_BANK0145,"
hexmask.quad.tbyte 0x488 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x488 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x490 "QOSMON_BE_TRAFFIC_BANK0146,"
hexmask.quad.tbyte 0x490 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x490 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x498 "QOSMON_BE_TRAFFIC_BANK0147,"
hexmask.quad.tbyte 0x498 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x498 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x4A0 "QOSMON_BE_TRAFFIC_BANK0148,"
hexmask.quad.tbyte 0x4A0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4A0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x4A8 "QOSMON_BE_TRAFFIC_BANK0149,"
hexmask.quad.tbyte 0x4A8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4A8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x4B0 "QOSMON_BE_TRAFFIC_BANK0150,"
hexmask.quad.tbyte 0x4B0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4B0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x4B8 "QOSMON_BE_TRAFFIC_BANK0151,"
hexmask.quad.tbyte 0x4B8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4B8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x4C0 "QOSMON_BE_TRAFFIC_BANK0152,"
hexmask.quad.tbyte 0x4C0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4C0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x4C8 "QOSMON_BE_TRAFFIC_BANK0153,"
hexmask.quad.tbyte 0x4C8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4C8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x4D0 "QOSMON_BE_TRAFFIC_BANK0154,"
hexmask.quad.tbyte 0x4D0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4D0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x4D8 "QOSMON_BE_TRAFFIC_BANK0155,"
hexmask.quad.tbyte 0x4D8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4D8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x4E0 "QOSMON_BE_TRAFFIC_BANK0156,"
hexmask.quad.tbyte 0x4E0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4E0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x4E8 "QOSMON_BE_TRAFFIC_BANK0157,"
hexmask.quad.tbyte 0x4E8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4E8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x4F0 "QOSMON_BE_TRAFFIC_BANK0158,"
hexmask.quad.tbyte 0x4F0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4F0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x4F8 "QOSMON_BE_TRAFFIC_BANK0159,"
hexmask.quad.tbyte 0x4F8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x4F8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x500 "QOSMON_BE_TRAFFIC_BANK0160,"
hexmask.quad.tbyte 0x500 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x500 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x508 "QOSMON_BE_TRAFFIC_BANK0161,"
hexmask.quad.tbyte 0x508 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x508 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x510 "QOSMON_BE_TRAFFIC_BANK0162,"
hexmask.quad.tbyte 0x510 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x510 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x518 "QOSMON_BE_TRAFFIC_BANK0163,"
hexmask.quad.tbyte 0x518 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x518 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x520 "QOSMON_BE_TRAFFIC_BANK0164,"
hexmask.quad.tbyte 0x520 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x520 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x528 "QOSMON_BE_TRAFFIC_BANK0165,"
hexmask.quad.tbyte 0x528 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x528 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x530 "QOSMON_BE_TRAFFIC_BANK0166,"
hexmask.quad.tbyte 0x530 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x530 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x538 "QOSMON_BE_TRAFFIC_BANK0167,"
hexmask.quad.tbyte 0x538 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x538 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x540 "QOSMON_BE_TRAFFIC_BANK0168,"
hexmask.quad.tbyte 0x540 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x540 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x548 "QOSMON_BE_TRAFFIC_BANK0169,"
hexmask.quad.tbyte 0x548 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x548 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x550 "QOSMON_BE_TRAFFIC_BANK0170,"
hexmask.quad.tbyte 0x550 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x550 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x558 "QOSMON_BE_TRAFFIC_BANK0171,"
hexmask.quad.tbyte 0x558 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x558 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x560 "QOSMON_BE_TRAFFIC_BANK0172,"
hexmask.quad.tbyte 0x560 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x560 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x568 "QOSMON_BE_TRAFFIC_BANK0173,"
hexmask.quad.tbyte 0x568 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x568 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x570 "QOSMON_BE_TRAFFIC_BANK0174,"
hexmask.quad.tbyte 0x570 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x570 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x578 "QOSMON_BE_TRAFFIC_BANK0175,"
hexmask.quad.tbyte 0x578 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x578 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x580 "QOSMON_BE_TRAFFIC_BANK0176,"
hexmask.quad.tbyte 0x580 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x580 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x588 "QOSMON_BE_TRAFFIC_BANK0177,"
hexmask.quad.tbyte 0x588 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x588 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x590 "QOSMON_BE_TRAFFIC_BANK0178,"
hexmask.quad.tbyte 0x590 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x590 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x598 "QOSMON_BE_TRAFFIC_BANK0179,"
hexmask.quad.tbyte 0x598 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x598 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x5A0 "QOSMON_BE_TRAFFIC_BANK0180,"
hexmask.quad.tbyte 0x5A0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5A0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x5A8 "QOSMON_BE_TRAFFIC_BANK0181,"
hexmask.quad.tbyte 0x5A8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5A8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x5B0 "QOSMON_BE_TRAFFIC_BANK0182,"
hexmask.quad.tbyte 0x5B0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5B0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x5B8 "QOSMON_BE_TRAFFIC_BANK0183,"
hexmask.quad.tbyte 0x5B8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5B8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x5C0 "QOSMON_BE_TRAFFIC_BANK0184,"
hexmask.quad.tbyte 0x5C0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5C0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x5C8 "QOSMON_BE_TRAFFIC_BANK0185,"
hexmask.quad.tbyte 0x5C8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5C8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x5D0 "QOSMON_BE_TRAFFIC_BANK0186,"
hexmask.quad.tbyte 0x5D0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5D0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x5D8 "QOSMON_BE_TRAFFIC_BANK0187,"
hexmask.quad.tbyte 0x5D8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5D8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x5E0 "QOSMON_BE_TRAFFIC_BANK0188,"
hexmask.quad.tbyte 0x5E0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5E0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x5E8 "QOSMON_BE_TRAFFIC_BANK0189,"
hexmask.quad.tbyte 0x5E8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5E8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x5F0 "QOSMON_BE_TRAFFIC_BANK0190,"
hexmask.quad.tbyte 0x5F0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5F0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x5F8 "QOSMON_BE_TRAFFIC_BANK0191,"
hexmask.quad.tbyte 0x5F8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x5F8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x600 "QOSMON_BE_TRAFFIC_BANK0192,"
hexmask.quad.tbyte 0x600 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x600 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x608 "QOSMON_BE_TRAFFIC_BANK0193,"
hexmask.quad.tbyte 0x608 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x608 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x610 "QOSMON_BE_TRAFFIC_BANK0194,"
hexmask.quad.tbyte 0x610 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x610 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x618 "QOSMON_BE_TRAFFIC_BANK0195,"
hexmask.quad.tbyte 0x618 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x618 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x620 "QOSMON_BE_TRAFFIC_BANK0196,"
hexmask.quad.tbyte 0x620 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x620 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x628 "QOSMON_BE_TRAFFIC_BANK0197,"
hexmask.quad.tbyte 0x628 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x628 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x630 "QOSMON_BE_TRAFFIC_BANK0198,"
hexmask.quad.tbyte 0x630 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x630 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x638 "QOSMON_BE_TRAFFIC_BANK0199,"
hexmask.quad.tbyte 0x638 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x638 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x640 "QOSMON_BE_TRAFFIC_BANK0200,"
hexmask.quad.tbyte 0x640 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x640 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x648 "QOSMON_BE_TRAFFIC_BANK0201,"
hexmask.quad.tbyte 0x648 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x648 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x650 "QOSMON_BE_TRAFFIC_BANK0202,"
hexmask.quad.tbyte 0x650 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x650 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x658 "QOSMON_BE_TRAFFIC_BANK0203,"
hexmask.quad.tbyte 0x658 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x658 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x660 "QOSMON_BE_TRAFFIC_BANK0204,"
hexmask.quad.tbyte 0x660 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x660 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x668 "QOSMON_BE_TRAFFIC_BANK0205,"
hexmask.quad.tbyte 0x668 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x668 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x670 "QOSMON_BE_TRAFFIC_BANK0206,"
hexmask.quad.tbyte 0x670 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x670 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x678 "QOSMON_BE_TRAFFIC_BANK0207,"
hexmask.quad.tbyte 0x678 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x678 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x680 "QOSMON_BE_TRAFFIC_BANK0208,"
hexmask.quad.tbyte 0x680 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x680 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x688 "QOSMON_BE_TRAFFIC_BANK0209,"
hexmask.quad.tbyte 0x688 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x688 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x690 "QOSMON_BE_TRAFFIC_BANK0210,"
hexmask.quad.tbyte 0x690 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x690 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x698 "QOSMON_BE_TRAFFIC_BANK0211,"
hexmask.quad.tbyte 0x698 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x698 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x6A0 "QOSMON_BE_TRAFFIC_BANK0212,"
hexmask.quad.tbyte 0x6A0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6A0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x6A8 "QOSMON_BE_TRAFFIC_BANK0213,"
hexmask.quad.tbyte 0x6A8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6A8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x6B0 "QOSMON_BE_TRAFFIC_BANK0214,"
hexmask.quad.tbyte 0x6B0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6B0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x6B8 "QOSMON_BE_TRAFFIC_BANK0215,"
hexmask.quad.tbyte 0x6B8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6B8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x6C0 "QOSMON_BE_TRAFFIC_BANK0216,"
hexmask.quad.tbyte 0x6C0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6C0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x6C8 "QOSMON_BE_TRAFFIC_BANK0217,"
hexmask.quad.tbyte 0x6C8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6C8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x6D0 "QOSMON_BE_TRAFFIC_BANK0218,"
hexmask.quad.tbyte 0x6D0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6D0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x6D8 "QOSMON_BE_TRAFFIC_BANK0219,"
hexmask.quad.tbyte 0x6D8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6D8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x6E0 "QOSMON_BE_TRAFFIC_BANK0220,"
hexmask.quad.tbyte 0x6E0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6E0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x6E8 "QOSMON_BE_TRAFFIC_BANK0221,"
hexmask.quad.tbyte 0x6E8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6E8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x6F0 "QOSMON_BE_TRAFFIC_BANK0222,"
hexmask.quad.tbyte 0x6F0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6F0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x6F8 "QOSMON_BE_TRAFFIC_BANK0223,"
hexmask.quad.tbyte 0x6F8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x6F8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x700 "QOSMON_BE_TRAFFIC_BANK0224,"
hexmask.quad.tbyte 0x700 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x700 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x708 "QOSMON_BE_TRAFFIC_BANK0225,"
hexmask.quad.tbyte 0x708 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x708 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x710 "QOSMON_BE_TRAFFIC_BANK0226,"
hexmask.quad.tbyte 0x710 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x710 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x718 "QOSMON_BE_TRAFFIC_BANK0227,"
hexmask.quad.tbyte 0x718 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x718 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x720 "QOSMON_BE_TRAFFIC_BANK0228,"
hexmask.quad.tbyte 0x720 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x720 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x728 "QOSMON_BE_TRAFFIC_BANK0229,"
hexmask.quad.tbyte 0x728 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x728 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x730 "QOSMON_BE_TRAFFIC_BANK0230,"
hexmask.quad.tbyte 0x730 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x730 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x738 "QOSMON_BE_TRAFFIC_BANK0231,"
hexmask.quad.tbyte 0x738 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x738 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x740 "QOSMON_BE_TRAFFIC_BANK0232,"
hexmask.quad.tbyte 0x740 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x740 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x748 "QOSMON_BE_TRAFFIC_BANK0233,"
hexmask.quad.tbyte 0x748 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x748 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x750 "QOSMON_BE_TRAFFIC_BANK0234,"
hexmask.quad.tbyte 0x750 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x750 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x758 "QOSMON_BE_TRAFFIC_BANK0235,"
hexmask.quad.tbyte 0x758 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x758 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x760 "QOSMON_BE_TRAFFIC_BANK0236,"
hexmask.quad.tbyte 0x760 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x760 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x768 "QOSMON_BE_TRAFFIC_BANK0237,"
hexmask.quad.tbyte 0x768 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x768 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x770 "QOSMON_BE_TRAFFIC_BANK0238,"
hexmask.quad.tbyte 0x770 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x770 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x778 "QOSMON_BE_TRAFFIC_BANK0239,"
hexmask.quad.tbyte 0x778 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x778 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x780 "QOSMON_BE_TRAFFIC_BANK0240,"
hexmask.quad.tbyte 0x780 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x780 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x788 "QOSMON_BE_TRAFFIC_BANK0241,"
hexmask.quad.tbyte 0x788 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x788 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x790 "QOSMON_BE_TRAFFIC_BANK0242,"
hexmask.quad.tbyte 0x790 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x790 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x798 "QOSMON_BE_TRAFFIC_BANK0243,"
hexmask.quad.tbyte 0x798 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x798 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x7A0 "QOSMON_BE_TRAFFIC_BANK0244,"
hexmask.quad.tbyte 0x7A0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7A0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x7A8 "QOSMON_BE_TRAFFIC_BANK0245,"
hexmask.quad.tbyte 0x7A8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7A8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x7B0 "QOSMON_BE_TRAFFIC_BANK0246,"
hexmask.quad.tbyte 0x7B0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7B0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x7B8 "QOSMON_BE_TRAFFIC_BANK0247,"
hexmask.quad.tbyte 0x7B8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7B8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x7C0 "QOSMON_BE_TRAFFIC_BANK0248,"
hexmask.quad.tbyte 0x7C0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7C0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x7C8 "QOSMON_BE_TRAFFIC_BANK0249,"
hexmask.quad.tbyte 0x7C8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7C8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x7D0 "QOSMON_BE_TRAFFIC_BANK0250,"
hexmask.quad.tbyte 0x7D0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7D0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x7D8 "QOSMON_BE_TRAFFIC_BANK0251,"
hexmask.quad.tbyte 0x7D8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7D8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x7E0 "QOSMON_BE_TRAFFIC_BANK0252,"
hexmask.quad.tbyte 0x7E0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7E0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x7E8 "QOSMON_BE_TRAFFIC_BANK0253,"
hexmask.quad.tbyte 0x7E8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7E8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x7F0 "QOSMON_BE_TRAFFIC_BANK0254,"
hexmask.quad.tbyte 0x7F0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7F0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x7F8 "QOSMON_BE_TRAFFIC_BANK0255,"
hexmask.quad.tbyte 0x7F8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x7F8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x800 "QOSMON_BE_TRAFFIC_BANK10,"
hexmask.quad.tbyte 0x800 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x800 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x808 "QOSMON_BE_TRAFFIC_BANK11,"
hexmask.quad.tbyte 0x808 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x808 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x810 "QOSMON_BE_TRAFFIC_BANK12,"
hexmask.quad.tbyte 0x810 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x810 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x818 "QOSMON_BE_TRAFFIC_BANK13,"
hexmask.quad.tbyte 0x818 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x818 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x820 "QOSMON_BE_TRAFFIC_BANK14,"
hexmask.quad.tbyte 0x820 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x820 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x828 "QOSMON_BE_TRAFFIC_BANK15,"
hexmask.quad.tbyte 0x828 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x828 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x830 "QOSMON_BE_TRAFFIC_BANK16,"
hexmask.quad.tbyte 0x830 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x830 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x838 "QOSMON_BE_TRAFFIC_BANK17,"
hexmask.quad.tbyte 0x838 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x838 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x840 "QOSMON_BE_TRAFFIC_BANK18,"
hexmask.quad.tbyte 0x840 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x840 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x848 "QOSMON_BE_TRAFFIC_BANK19,"
hexmask.quad.tbyte 0x848 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x848 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x850 "QOSMON_BE_TRAFFIC_BANK110,"
hexmask.quad.tbyte 0x850 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x850 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x858 "QOSMON_BE_TRAFFIC_BANK111,"
hexmask.quad.tbyte 0x858 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x858 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x860 "QOSMON_BE_TRAFFIC_BANK112,"
hexmask.quad.tbyte 0x860 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x860 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x868 "QOSMON_BE_TRAFFIC_BANK113,"
hexmask.quad.tbyte 0x868 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x868 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x870 "QOSMON_BE_TRAFFIC_BANK114,"
hexmask.quad.tbyte 0x870 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x870 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x878 "QOSMON_BE_TRAFFIC_BANK115,"
hexmask.quad.tbyte 0x878 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x878 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x880 "QOSMON_BE_TRAFFIC_BANK116,"
hexmask.quad.tbyte 0x880 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x880 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x888 "QOSMON_BE_TRAFFIC_BANK117,"
hexmask.quad.tbyte 0x888 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x888 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x890 "QOSMON_BE_TRAFFIC_BANK118,"
hexmask.quad.tbyte 0x890 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x890 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x898 "QOSMON_BE_TRAFFIC_BANK119,"
hexmask.quad.tbyte 0x898 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x898 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x8A0 "QOSMON_BE_TRAFFIC_BANK120,"
hexmask.quad.tbyte 0x8A0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8A0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x8A8 "QOSMON_BE_TRAFFIC_BANK121,"
hexmask.quad.tbyte 0x8A8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8A8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x8B0 "QOSMON_BE_TRAFFIC_BANK122,"
hexmask.quad.tbyte 0x8B0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8B0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x8B8 "QOSMON_BE_TRAFFIC_BANK123,"
hexmask.quad.tbyte 0x8B8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8B8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x8C0 "QOSMON_BE_TRAFFIC_BANK124,"
hexmask.quad.tbyte 0x8C0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8C0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x8C8 "QOSMON_BE_TRAFFIC_BANK125,"
hexmask.quad.tbyte 0x8C8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8C8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x8D0 "QOSMON_BE_TRAFFIC_BANK126,"
hexmask.quad.tbyte 0x8D0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8D0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x8D8 "QOSMON_BE_TRAFFIC_BANK127,"
hexmask.quad.tbyte 0x8D8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8D8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x8E0 "QOSMON_BE_TRAFFIC_BANK128,"
hexmask.quad.tbyte 0x8E0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8E0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x8E8 "QOSMON_BE_TRAFFIC_BANK129,"
hexmask.quad.tbyte 0x8E8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8E8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x8F0 "QOSMON_BE_TRAFFIC_BANK130,"
hexmask.quad.tbyte 0x8F0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8F0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x8F8 "QOSMON_BE_TRAFFIC_BANK131,"
hexmask.quad.tbyte 0x8F8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x8F8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x900 "QOSMON_BE_TRAFFIC_BANK132,"
hexmask.quad.tbyte 0x900 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x900 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x908 "QOSMON_BE_TRAFFIC_BANK133,"
hexmask.quad.tbyte 0x908 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x908 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x910 "QOSMON_BE_TRAFFIC_BANK134,"
hexmask.quad.tbyte 0x910 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x910 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x918 "QOSMON_BE_TRAFFIC_BANK135,"
hexmask.quad.tbyte 0x918 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x918 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x920 "QOSMON_BE_TRAFFIC_BANK136,"
hexmask.quad.tbyte 0x920 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x920 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x928 "QOSMON_BE_TRAFFIC_BANK137,"
hexmask.quad.tbyte 0x928 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x928 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x930 "QOSMON_BE_TRAFFIC_BANK138,"
hexmask.quad.tbyte 0x930 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x930 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x938 "QOSMON_BE_TRAFFIC_BANK139,"
hexmask.quad.tbyte 0x938 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x938 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x940 "QOSMON_BE_TRAFFIC_BANK140,"
hexmask.quad.tbyte 0x940 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x940 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x948 "QOSMON_BE_TRAFFIC_BANK141,"
hexmask.quad.tbyte 0x948 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x948 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x950 "QOSMON_BE_TRAFFIC_BANK142,"
hexmask.quad.tbyte 0x950 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x950 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x958 "QOSMON_BE_TRAFFIC_BANK143,"
hexmask.quad.tbyte 0x958 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x958 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x960 "QOSMON_BE_TRAFFIC_BANK144,"
hexmask.quad.tbyte 0x960 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x960 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x968 "QOSMON_BE_TRAFFIC_BANK145,"
hexmask.quad.tbyte 0x968 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x968 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x970 "QOSMON_BE_TRAFFIC_BANK146,"
hexmask.quad.tbyte 0x970 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x970 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x978 "QOSMON_BE_TRAFFIC_BANK147,"
hexmask.quad.tbyte 0x978 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x978 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x980 "QOSMON_BE_TRAFFIC_BANK148,"
hexmask.quad.tbyte 0x980 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x980 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x988 "QOSMON_BE_TRAFFIC_BANK149,"
hexmask.quad.tbyte 0x988 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x988 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x990 "QOSMON_BE_TRAFFIC_BANK150,"
hexmask.quad.tbyte 0x990 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x990 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x998 "QOSMON_BE_TRAFFIC_BANK151,"
hexmask.quad.tbyte 0x998 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x998 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x9A0 "QOSMON_BE_TRAFFIC_BANK152,"
hexmask.quad.tbyte 0x9A0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9A0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x9A8 "QOSMON_BE_TRAFFIC_BANK153,"
hexmask.quad.tbyte 0x9A8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9A8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x9B0 "QOSMON_BE_TRAFFIC_BANK154,"
hexmask.quad.tbyte 0x9B0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9B0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x9B8 "QOSMON_BE_TRAFFIC_BANK155,"
hexmask.quad.tbyte 0x9B8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9B8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x9C0 "QOSMON_BE_TRAFFIC_BANK156,"
hexmask.quad.tbyte 0x9C0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9C0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x9C8 "QOSMON_BE_TRAFFIC_BANK157,"
hexmask.quad.tbyte 0x9C8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9C8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x9D0 "QOSMON_BE_TRAFFIC_BANK158,"
hexmask.quad.tbyte 0x9D0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9D0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x9D8 "QOSMON_BE_TRAFFIC_BANK159,"
hexmask.quad.tbyte 0x9D8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9D8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x9E0 "QOSMON_BE_TRAFFIC_BANK160,"
hexmask.quad.tbyte 0x9E0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9E0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x9E8 "QOSMON_BE_TRAFFIC_BANK161,"
hexmask.quad.tbyte 0x9E8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9E8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x9F0 "QOSMON_BE_TRAFFIC_BANK162,"
hexmask.quad.tbyte 0x9F0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9F0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0x9F8 "QOSMON_BE_TRAFFIC_BANK163,"
hexmask.quad.tbyte 0x9F8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0x9F8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA00 "QOSMON_BE_TRAFFIC_BANK164,"
hexmask.quad.tbyte 0xA00 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA00 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA08 "QOSMON_BE_TRAFFIC_BANK165,"
hexmask.quad.tbyte 0xA08 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA08 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA10 "QOSMON_BE_TRAFFIC_BANK166,"
hexmask.quad.tbyte 0xA10 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA10 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA18 "QOSMON_BE_TRAFFIC_BANK167,"
hexmask.quad.tbyte 0xA18 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA18 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA20 "QOSMON_BE_TRAFFIC_BANK168,"
hexmask.quad.tbyte 0xA20 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA20 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA28 "QOSMON_BE_TRAFFIC_BANK169,"
hexmask.quad.tbyte 0xA28 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA28 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA30 "QOSMON_BE_TRAFFIC_BANK170,"
hexmask.quad.tbyte 0xA30 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA30 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA38 "QOSMON_BE_TRAFFIC_BANK171,"
hexmask.quad.tbyte 0xA38 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA38 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA40 "QOSMON_BE_TRAFFIC_BANK172,"
hexmask.quad.tbyte 0xA40 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA40 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA48 "QOSMON_BE_TRAFFIC_BANK173,"
hexmask.quad.tbyte 0xA48 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA48 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA50 "QOSMON_BE_TRAFFIC_BANK174,"
hexmask.quad.tbyte 0xA50 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA50 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA58 "QOSMON_BE_TRAFFIC_BANK175,"
hexmask.quad.tbyte 0xA58 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA58 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA60 "QOSMON_BE_TRAFFIC_BANK176,"
hexmask.quad.tbyte 0xA60 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA60 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA68 "QOSMON_BE_TRAFFIC_BANK177,"
hexmask.quad.tbyte 0xA68 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA68 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA70 "QOSMON_BE_TRAFFIC_BANK178,"
hexmask.quad.tbyte 0xA70 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA70 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA78 "QOSMON_BE_TRAFFIC_BANK179,"
hexmask.quad.tbyte 0xA78 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA78 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA80 "QOSMON_BE_TRAFFIC_BANK180,"
hexmask.quad.tbyte 0xA80 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA80 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA88 "QOSMON_BE_TRAFFIC_BANK181,"
hexmask.quad.tbyte 0xA88 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA88 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA90 "QOSMON_BE_TRAFFIC_BANK182,"
hexmask.quad.tbyte 0xA90 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA90 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xA98 "QOSMON_BE_TRAFFIC_BANK183,"
hexmask.quad.tbyte 0xA98 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xA98 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xAA0 "QOSMON_BE_TRAFFIC_BANK184,"
hexmask.quad.tbyte 0xAA0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAA0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xAA8 "QOSMON_BE_TRAFFIC_BANK185,"
hexmask.quad.tbyte 0xAA8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAA8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xAB0 "QOSMON_BE_TRAFFIC_BANK186,"
hexmask.quad.tbyte 0xAB0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAB0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xAB8 "QOSMON_BE_TRAFFIC_BANK187,"
hexmask.quad.tbyte 0xAB8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAB8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xAC0 "QOSMON_BE_TRAFFIC_BANK188,"
hexmask.quad.tbyte 0xAC0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAC0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xAC8 "QOSMON_BE_TRAFFIC_BANK189,"
hexmask.quad.tbyte 0xAC8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAC8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xAD0 "QOSMON_BE_TRAFFIC_BANK190,"
hexmask.quad.tbyte 0xAD0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAD0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xAD8 "QOSMON_BE_TRAFFIC_BANK191,"
hexmask.quad.tbyte 0xAD8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAD8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xAE0 "QOSMON_BE_TRAFFIC_BANK192,"
hexmask.quad.tbyte 0xAE0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAE0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xAE8 "QOSMON_BE_TRAFFIC_BANK193,"
hexmask.quad.tbyte 0xAE8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAE8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xAF0 "QOSMON_BE_TRAFFIC_BANK194,"
hexmask.quad.tbyte 0xAF0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAF0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xAF8 "QOSMON_BE_TRAFFIC_BANK195,"
hexmask.quad.tbyte 0xAF8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xAF8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB00 "QOSMON_BE_TRAFFIC_BANK196,"
hexmask.quad.tbyte 0xB00 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB00 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB08 "QOSMON_BE_TRAFFIC_BANK197,"
hexmask.quad.tbyte 0xB08 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB08 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB10 "QOSMON_BE_TRAFFIC_BANK198,"
hexmask.quad.tbyte 0xB10 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB10 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB18 "QOSMON_BE_TRAFFIC_BANK199,"
hexmask.quad.tbyte 0xB18 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB18 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB20 "QOSMON_BE_TRAFFIC_BANK1100,"
hexmask.quad.tbyte 0xB20 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB20 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB28 "QOSMON_BE_TRAFFIC_BANK1101,"
hexmask.quad.tbyte 0xB28 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB28 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB30 "QOSMON_BE_TRAFFIC_BANK1102,"
hexmask.quad.tbyte 0xB30 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB30 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB38 "QOSMON_BE_TRAFFIC_BANK1103,"
hexmask.quad.tbyte 0xB38 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB38 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB40 "QOSMON_BE_TRAFFIC_BANK1104,"
hexmask.quad.tbyte 0xB40 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB40 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB48 "QOSMON_BE_TRAFFIC_BANK1105,"
hexmask.quad.tbyte 0xB48 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB48 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB50 "QOSMON_BE_TRAFFIC_BANK1106,"
hexmask.quad.tbyte 0xB50 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB50 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB58 "QOSMON_BE_TRAFFIC_BANK1107,"
hexmask.quad.tbyte 0xB58 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB58 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB60 "QOSMON_BE_TRAFFIC_BANK1108,"
hexmask.quad.tbyte 0xB60 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB60 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB68 "QOSMON_BE_TRAFFIC_BANK1109,"
hexmask.quad.tbyte 0xB68 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB68 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB70 "QOSMON_BE_TRAFFIC_BANK1110,"
hexmask.quad.tbyte 0xB70 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB70 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB78 "QOSMON_BE_TRAFFIC_BANK1111,"
hexmask.quad.tbyte 0xB78 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB78 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB80 "QOSMON_BE_TRAFFIC_BANK1112,"
hexmask.quad.tbyte 0xB80 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB80 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB88 "QOSMON_BE_TRAFFIC_BANK1113,"
hexmask.quad.tbyte 0xB88 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB88 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB90 "QOSMON_BE_TRAFFIC_BANK1114,"
hexmask.quad.tbyte 0xB90 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB90 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xB98 "QOSMON_BE_TRAFFIC_BANK1115,"
hexmask.quad.tbyte 0xB98 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xB98 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xBA0 "QOSMON_BE_TRAFFIC_BANK1116,"
hexmask.quad.tbyte 0xBA0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBA0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xBA8 "QOSMON_BE_TRAFFIC_BANK1117,"
hexmask.quad.tbyte 0xBA8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBA8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xBB0 "QOSMON_BE_TRAFFIC_BANK1118,"
hexmask.quad.tbyte 0xBB0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBB0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xBB8 "QOSMON_BE_TRAFFIC_BANK1119,"
hexmask.quad.tbyte 0xBB8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBB8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xBC0 "QOSMON_BE_TRAFFIC_BANK1120,"
hexmask.quad.tbyte 0xBC0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBC0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xBC8 "QOSMON_BE_TRAFFIC_BANK1121,"
hexmask.quad.tbyte 0xBC8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBC8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xBD0 "QOSMON_BE_TRAFFIC_BANK1122,"
hexmask.quad.tbyte 0xBD0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBD0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xBD8 "QOSMON_BE_TRAFFIC_BANK1123,"
hexmask.quad.tbyte 0xBD8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBD8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xBE0 "QOSMON_BE_TRAFFIC_BANK1124,"
hexmask.quad.tbyte 0xBE0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBE0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xBE8 "QOSMON_BE_TRAFFIC_BANK1125,"
hexmask.quad.tbyte 0xBE8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBE8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xBF0 "QOSMON_BE_TRAFFIC_BANK1126,"
hexmask.quad.tbyte 0xBF0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBF0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xBF8 "QOSMON_BE_TRAFFIC_BANK1127,"
hexmask.quad.tbyte 0xBF8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xBF8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC00 "QOSMON_BE_TRAFFIC_BANK1128,"
hexmask.quad.tbyte 0xC00 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC00 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC08 "QOSMON_BE_TRAFFIC_BANK1129,"
hexmask.quad.tbyte 0xC08 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC08 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC10 "QOSMON_BE_TRAFFIC_BANK1130,"
hexmask.quad.tbyte 0xC10 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC10 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC18 "QOSMON_BE_TRAFFIC_BANK1131,"
hexmask.quad.tbyte 0xC18 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC18 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC20 "QOSMON_BE_TRAFFIC_BANK1132,"
hexmask.quad.tbyte 0xC20 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC20 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC28 "QOSMON_BE_TRAFFIC_BANK1133,"
hexmask.quad.tbyte 0xC28 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC28 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC30 "QOSMON_BE_TRAFFIC_BANK1134,"
hexmask.quad.tbyte 0xC30 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC30 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC38 "QOSMON_BE_TRAFFIC_BANK1135,"
hexmask.quad.tbyte 0xC38 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC38 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC40 "QOSMON_BE_TRAFFIC_BANK1136,"
hexmask.quad.tbyte 0xC40 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC40 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC48 "QOSMON_BE_TRAFFIC_BANK1137,"
hexmask.quad.tbyte 0xC48 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC48 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC50 "QOSMON_BE_TRAFFIC_BANK1138,"
hexmask.quad.tbyte 0xC50 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC50 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC58 "QOSMON_BE_TRAFFIC_BANK1139,"
hexmask.quad.tbyte 0xC58 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC58 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC60 "QOSMON_BE_TRAFFIC_BANK1140,"
hexmask.quad.tbyte 0xC60 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC60 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC68 "QOSMON_BE_TRAFFIC_BANK1141,"
hexmask.quad.tbyte 0xC68 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC68 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC70 "QOSMON_BE_TRAFFIC_BANK1142,"
hexmask.quad.tbyte 0xC70 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC70 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC78 "QOSMON_BE_TRAFFIC_BANK1143,"
hexmask.quad.tbyte 0xC78 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC78 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC80 "QOSMON_BE_TRAFFIC_BANK1144,"
hexmask.quad.tbyte 0xC80 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC80 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC88 "QOSMON_BE_TRAFFIC_BANK1145,"
hexmask.quad.tbyte 0xC88 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC88 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC90 "QOSMON_BE_TRAFFIC_BANK1146,"
hexmask.quad.tbyte 0xC90 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC90 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xC98 "QOSMON_BE_TRAFFIC_BANK1147,"
hexmask.quad.tbyte 0xC98 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xC98 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xCA0 "QOSMON_BE_TRAFFIC_BANK1148,"
hexmask.quad.tbyte 0xCA0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCA0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xCA8 "QOSMON_BE_TRAFFIC_BANK1149,"
hexmask.quad.tbyte 0xCA8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCA8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xCB0 "QOSMON_BE_TRAFFIC_BANK1150,"
hexmask.quad.tbyte 0xCB0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCB0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xCB8 "QOSMON_BE_TRAFFIC_BANK1151,"
hexmask.quad.tbyte 0xCB8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCB8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xCC0 "QOSMON_BE_TRAFFIC_BANK1152,"
hexmask.quad.tbyte 0xCC0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCC0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xCC8 "QOSMON_BE_TRAFFIC_BANK1153,"
hexmask.quad.tbyte 0xCC8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCC8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xCD0 "QOSMON_BE_TRAFFIC_BANK1154,"
hexmask.quad.tbyte 0xCD0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCD0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xCD8 "QOSMON_BE_TRAFFIC_BANK1155,"
hexmask.quad.tbyte 0xCD8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCD8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xCE0 "QOSMON_BE_TRAFFIC_BANK1156,"
hexmask.quad.tbyte 0xCE0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCE0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xCE8 "QOSMON_BE_TRAFFIC_BANK1157,"
hexmask.quad.tbyte 0xCE8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCE8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xCF0 "QOSMON_BE_TRAFFIC_BANK1158,"
hexmask.quad.tbyte 0xCF0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCF0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xCF8 "QOSMON_BE_TRAFFIC_BANK1159,"
hexmask.quad.tbyte 0xCF8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xCF8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD00 "QOSMON_BE_TRAFFIC_BANK1160,"
hexmask.quad.tbyte 0xD00 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD00 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD08 "QOSMON_BE_TRAFFIC_BANK1161,"
hexmask.quad.tbyte 0xD08 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD08 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD10 "QOSMON_BE_TRAFFIC_BANK1162,"
hexmask.quad.tbyte 0xD10 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD10 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD18 "QOSMON_BE_TRAFFIC_BANK1163,"
hexmask.quad.tbyte 0xD18 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD18 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD20 "QOSMON_BE_TRAFFIC_BANK1164,"
hexmask.quad.tbyte 0xD20 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD20 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD28 "QOSMON_BE_TRAFFIC_BANK1165,"
hexmask.quad.tbyte 0xD28 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD28 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD30 "QOSMON_BE_TRAFFIC_BANK1166,"
hexmask.quad.tbyte 0xD30 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD30 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD38 "QOSMON_BE_TRAFFIC_BANK1167,"
hexmask.quad.tbyte 0xD38 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD38 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD40 "QOSMON_BE_TRAFFIC_BANK1168,"
hexmask.quad.tbyte 0xD40 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD40 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD48 "QOSMON_BE_TRAFFIC_BANK1169,"
hexmask.quad.tbyte 0xD48 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD48 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD50 "QOSMON_BE_TRAFFIC_BANK1170,"
hexmask.quad.tbyte 0xD50 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD50 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD58 "QOSMON_BE_TRAFFIC_BANK1171,"
hexmask.quad.tbyte 0xD58 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD58 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD60 "QOSMON_BE_TRAFFIC_BANK1172,"
hexmask.quad.tbyte 0xD60 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD60 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD68 "QOSMON_BE_TRAFFIC_BANK1173,"
hexmask.quad.tbyte 0xD68 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD68 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD70 "QOSMON_BE_TRAFFIC_BANK1174,"
hexmask.quad.tbyte 0xD70 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD70 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD78 "QOSMON_BE_TRAFFIC_BANK1175,"
hexmask.quad.tbyte 0xD78 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD78 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD80 "QOSMON_BE_TRAFFIC_BANK1176,"
hexmask.quad.tbyte 0xD80 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD80 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD88 "QOSMON_BE_TRAFFIC_BANK1177,"
hexmask.quad.tbyte 0xD88 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD88 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD90 "QOSMON_BE_TRAFFIC_BANK1178,"
hexmask.quad.tbyte 0xD90 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD90 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xD98 "QOSMON_BE_TRAFFIC_BANK1179,"
hexmask.quad.tbyte 0xD98 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xD98 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xDA0 "QOSMON_BE_TRAFFIC_BANK1180,"
hexmask.quad.tbyte 0xDA0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDA0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xDA8 "QOSMON_BE_TRAFFIC_BANK1181,"
hexmask.quad.tbyte 0xDA8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDA8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xDB0 "QOSMON_BE_TRAFFIC_BANK1182,"
hexmask.quad.tbyte 0xDB0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDB0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xDB8 "QOSMON_BE_TRAFFIC_BANK1183,"
hexmask.quad.tbyte 0xDB8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDB8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xDC0 "QOSMON_BE_TRAFFIC_BANK1184,"
hexmask.quad.tbyte 0xDC0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDC0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xDC8 "QOSMON_BE_TRAFFIC_BANK1185,"
hexmask.quad.tbyte 0xDC8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDC8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xDD0 "QOSMON_BE_TRAFFIC_BANK1186,"
hexmask.quad.tbyte 0xDD0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDD0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xDD8 "QOSMON_BE_TRAFFIC_BANK1187,"
hexmask.quad.tbyte 0xDD8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDD8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xDE0 "QOSMON_BE_TRAFFIC_BANK1188,"
hexmask.quad.tbyte 0xDE0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDE0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xDE8 "QOSMON_BE_TRAFFIC_BANK1189,"
hexmask.quad.tbyte 0xDE8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDE8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xDF0 "QOSMON_BE_TRAFFIC_BANK1190,"
hexmask.quad.tbyte 0xDF0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDF0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xDF8 "QOSMON_BE_TRAFFIC_BANK1191,"
hexmask.quad.tbyte 0xDF8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xDF8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE00 "QOSMON_BE_TRAFFIC_BANK1192,"
hexmask.quad.tbyte 0xE00 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE00 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE08 "QOSMON_BE_TRAFFIC_BANK1193,"
hexmask.quad.tbyte 0xE08 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE08 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE10 "QOSMON_BE_TRAFFIC_BANK1194,"
hexmask.quad.tbyte 0xE10 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE10 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE18 "QOSMON_BE_TRAFFIC_BANK1195,"
hexmask.quad.tbyte 0xE18 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE18 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE20 "QOSMON_BE_TRAFFIC_BANK1196,"
hexmask.quad.tbyte 0xE20 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE20 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE28 "QOSMON_BE_TRAFFIC_BANK1197,"
hexmask.quad.tbyte 0xE28 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE28 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE30 "QOSMON_BE_TRAFFIC_BANK1198,"
hexmask.quad.tbyte 0xE30 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE30 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE38 "QOSMON_BE_TRAFFIC_BANK1199,"
hexmask.quad.tbyte 0xE38 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE38 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE40 "QOSMON_BE_TRAFFIC_BANK1200,"
hexmask.quad.tbyte 0xE40 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE40 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE48 "QOSMON_BE_TRAFFIC_BANK1201,"
hexmask.quad.tbyte 0xE48 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE48 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE50 "QOSMON_BE_TRAFFIC_BANK1202,"
hexmask.quad.tbyte 0xE50 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE50 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE58 "QOSMON_BE_TRAFFIC_BANK1203,"
hexmask.quad.tbyte 0xE58 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE58 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE60 "QOSMON_BE_TRAFFIC_BANK1204,"
hexmask.quad.tbyte 0xE60 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE60 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE68 "QOSMON_BE_TRAFFIC_BANK1205,"
hexmask.quad.tbyte 0xE68 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE68 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE70 "QOSMON_BE_TRAFFIC_BANK1206,"
hexmask.quad.tbyte 0xE70 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE70 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE78 "QOSMON_BE_TRAFFIC_BANK1207,"
hexmask.quad.tbyte 0xE78 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE78 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE80 "QOSMON_BE_TRAFFIC_BANK1208,"
hexmask.quad.tbyte 0xE80 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE80 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE88 "QOSMON_BE_TRAFFIC_BANK1209,"
hexmask.quad.tbyte 0xE88 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE88 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE90 "QOSMON_BE_TRAFFIC_BANK1210,"
hexmask.quad.tbyte 0xE90 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE90 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xE98 "QOSMON_BE_TRAFFIC_BANK1211,"
hexmask.quad.tbyte 0xE98 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xE98 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xEA0 "QOSMON_BE_TRAFFIC_BANK1212,"
hexmask.quad.tbyte 0xEA0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEA0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xEA8 "QOSMON_BE_TRAFFIC_BANK1213,"
hexmask.quad.tbyte 0xEA8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEA8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xEB0 "QOSMON_BE_TRAFFIC_BANK1214,"
hexmask.quad.tbyte 0xEB0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEB0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xEB8 "QOSMON_BE_TRAFFIC_BANK1215,"
hexmask.quad.tbyte 0xEB8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEB8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xEC0 "QOSMON_BE_TRAFFIC_BANK1216,"
hexmask.quad.tbyte 0xEC0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEC0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xEC8 "QOSMON_BE_TRAFFIC_BANK1217,"
hexmask.quad.tbyte 0xEC8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEC8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xED0 "QOSMON_BE_TRAFFIC_BANK1218,"
hexmask.quad.tbyte 0xED0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xED0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xED8 "QOSMON_BE_TRAFFIC_BANK1219,"
hexmask.quad.tbyte 0xED8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xED8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xEE0 "QOSMON_BE_TRAFFIC_BANK1220,"
hexmask.quad.tbyte 0xEE0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEE0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xEE8 "QOSMON_BE_TRAFFIC_BANK1221,"
hexmask.quad.tbyte 0xEE8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEE8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xEF0 "QOSMON_BE_TRAFFIC_BANK1222,"
hexmask.quad.tbyte 0xEF0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEF0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xEF8 "QOSMON_BE_TRAFFIC_BANK1223,"
hexmask.quad.tbyte 0xEF8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xEF8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF00 "QOSMON_BE_TRAFFIC_BANK1224,"
hexmask.quad.tbyte 0xF00 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF00 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF08 "QOSMON_BE_TRAFFIC_BANK1225,"
hexmask.quad.tbyte 0xF08 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF08 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF10 "QOSMON_BE_TRAFFIC_BANK1226,"
hexmask.quad.tbyte 0xF10 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF10 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF18 "QOSMON_BE_TRAFFIC_BANK1227,"
hexmask.quad.tbyte 0xF18 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF18 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF20 "QOSMON_BE_TRAFFIC_BANK1228,"
hexmask.quad.tbyte 0xF20 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF20 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF28 "QOSMON_BE_TRAFFIC_BANK1229,"
hexmask.quad.tbyte 0xF28 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF28 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF30 "QOSMON_BE_TRAFFIC_BANK1230,"
hexmask.quad.tbyte 0xF30 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF30 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF38 "QOSMON_BE_TRAFFIC_BANK1231,"
hexmask.quad.tbyte 0xF38 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF38 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF40 "QOSMON_BE_TRAFFIC_BANK1232,"
hexmask.quad.tbyte 0xF40 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF40 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF48 "QOSMON_BE_TRAFFIC_BANK1233,"
hexmask.quad.tbyte 0xF48 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF48 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF50 "QOSMON_BE_TRAFFIC_BANK1234,"
hexmask.quad.tbyte 0xF50 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF50 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF58 "QOSMON_BE_TRAFFIC_BANK1235,"
hexmask.quad.tbyte 0xF58 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF58 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF60 "QOSMON_BE_TRAFFIC_BANK1236,"
hexmask.quad.tbyte 0xF60 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF60 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF68 "QOSMON_BE_TRAFFIC_BANK1237,"
hexmask.quad.tbyte 0xF68 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF68 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF70 "QOSMON_BE_TRAFFIC_BANK1238,"
hexmask.quad.tbyte 0xF70 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF70 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF78 "QOSMON_BE_TRAFFIC_BANK1239,"
hexmask.quad.tbyte 0xF78 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF78 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF80 "QOSMON_BE_TRAFFIC_BANK1240,"
hexmask.quad.tbyte 0xF80 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF80 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF88 "QOSMON_BE_TRAFFIC_BANK1241,"
hexmask.quad.tbyte 0xF88 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF88 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF90 "QOSMON_BE_TRAFFIC_BANK1242,"
hexmask.quad.tbyte 0xF90 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF90 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xF98 "QOSMON_BE_TRAFFIC_BANK1243,"
hexmask.quad.tbyte 0xF98 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xF98 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xFA0 "QOSMON_BE_TRAFFIC_BANK1244,"
hexmask.quad.tbyte 0xFA0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFA0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xFA8 "QOSMON_BE_TRAFFIC_BANK1245,"
hexmask.quad.tbyte 0xFA8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFA8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xFB0 "QOSMON_BE_TRAFFIC_BANK1246,"
hexmask.quad.tbyte 0xFB0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFB0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xFB8 "QOSMON_BE_TRAFFIC_BANK1247,"
hexmask.quad.tbyte 0xFB8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFB8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xFC0 "QOSMON_BE_TRAFFIC_BANK1248,"
hexmask.quad.tbyte 0xFC0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFC0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xFC8 "QOSMON_BE_TRAFFIC_BANK1249,"
hexmask.quad.tbyte 0xFC8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFC8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xFD0 "QOSMON_BE_TRAFFIC_BANK1250,"
hexmask.quad.tbyte 0xFD0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFD0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xFD8 "QOSMON_BE_TRAFFIC_BANK1251,"
hexmask.quad.tbyte 0xFD8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFD8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xFE0 "QOSMON_BE_TRAFFIC_BANK1252,"
hexmask.quad.tbyte 0xFE0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFE0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xFE8 "QOSMON_BE_TRAFFIC_BANK1253,"
hexmask.quad.tbyte 0xFE8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFE8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xFF0 "QOSMON_BE_TRAFFIC_BANK1254,"
hexmask.quad.tbyte 0xFF0 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFF0 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
line.quad 0xFF8 "QOSMON_BE_TRAFFIC_BANK1255,"
hexmask.quad.tbyte 0xFF8 40.--63. 1. "Reserved_40,Reserved"
newline
hexmask.quad 0xFF8 0.--39. 1. "traffic_be,Bandwidth performance result of BE."
group.long 0x8000++0x13
line.long 0x0 "QOSCTRL_SL_INIT,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
newline
hexmask.long.byte 0x0 24.--27. 1. "refsslot,refsslot Setting."
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x0 16.--19. 1. "slotsslot,slotsslot Setting."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.word 0x0 0.--8. 1. "sslotclk,sslotclk Setting."
line.long 0x4 "QOSCTRL_REF_ARS,"
hexmask.long.byte 0x4 25.--31. 1. "Reserved_25,Reserved"
newline
hexmask.long.word 0x4 16.--24. 1. "arbstopcycle,arbstopcycle Setting."
newline
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "QOSCTRL_STATQC,"
hexmask.long.tbyte 0x8 9.--31. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x8 8. "refresh_mode,refresh_mode setting." "0,1"
newline
hexmask.long.byte 0x8 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x8 0. "statqen,QOS control Enable" "0: Disable,1: Enable"
line.long 0xC "QOSCTRL_MEMBANK,"
hexmask.long.tbyte 0xC 9.--31. 1. "Reserved_9,Reserved"
newline
rbitfld.long 0xC 8. "exe_membank,Current using bank of QOSBW Status." "0: using QOSBW_FIX_QOS_BANK0 and QOSBW_BE_QOS_BANK0,1: using QOSBW_FIX_QOS_BANK1 and QOSBW_BE_QOS_BANK1"
newline
hexmask.long.byte 0xC 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0xC 0. "membank,Bank of QOSBW_FIX_QOS_BANK0  QOSBW_FIX_QOS_BANK1  QOSBW_BE_QOS_BANK0 and QOSBW_BE_QOS_BANK1 registers to control QOS Setting." "0: use QOSBW_FIX_QOS_BANK0 and QOSBW_BE_QOS_BANK0,1: use QOSBW_FIX_QOS_BANK1 and QOSBW_BE_QOS_BANK1"
line.long 0x10 "QOSMON_PERFMON,"
hexmask.long.word 0x10 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x10 16. "preset,Performance monitor reset." "0,1"
newline
hexmask.long.byte 0x10 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x10 8. "pm_bankchange,2Bank mode configuration." "0,1"
newline
hexmask.long.byte 0x10 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x10 0. "pmen,Performance monitor enable." "0,1"
group.long 0x8018++0x7
line.long 0x0 "QOSMON_PMONINT,"
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x0 24. "pm_overrun,Bandwidth performance monitor over run bit." "0,1"
newline
hexmask.long.byte 0x0 17.--23. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "pm_interrupt,Bandwidth performance monitor interrupt status." "0,1"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
newline
rbitfld.long 0x0 0. "pbank,Bandwidth Monitor Bank bit status." "0,1"
line.long 0x4 "QOSMON_PMONCHGTIME,"
hexmask.long 0x4 0.--31. 1. "sslotnum,Subslot period for bank change of bandwidth performance monitor."
group.long 0x8030++0x1F
line.long 0x0 "QOSWT_WTEN,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "wtbank_en,wtbank_en Enable." "0: Disable,1: Enable"
line.long 0x4 "QOSWT_WTREF,"
hexmask.long.word 0x4 16.--31. 1. "wtrefsslot1_enable,wtrefsslot1_enable Setting."
newline
hexmask.long.word 0x4 0.--15. 1. "wtrefsslot0_enable,wtrefsslot0_enable Setting."
line.long 0x8 "QOSWT_WTSET0,"
hexmask.long.word 0x8 16.--31. 1. "wtperiold0,wtperiod0 Setting."
newline
hexmask.long.byte 0x8 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x8 8.--11. 1. "wtsslot0,wtsslot0 Setting."
newline
hexmask.long.byte 0x8 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x8 0.--3. 1. "wtslotsslot0,wtslotsslot0 Setting."
line.long 0xC "QOSWT_WTSET1,"
hexmask.long.word 0xC 16.--31. 1. "wtperiold1,wtperiod1 Setting."
newline
hexmask.long.byte 0xC 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0xC 8.--11. 1. "wtsslot1,wtsslot1 Setting."
newline
hexmask.long.byte 0xC 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0xC 0.--3. 1. "wtslotsslot1,wtslotsslot1 Setting."
line.long 0x10 "QOSCTRL_MBCS,"
hexmask.long.word 0x10 16.--31. 1. "bankchange_sslotnum1,Adjust Bank Switching Timing of QoS configuration."
newline
hexmask.long.word 0x10 0.--15. 1. "bankchange_sslotnum0,Adjust Bank Switching Timing of QoS configuration."
line.long 0x14 "QOSCTRL_REF_ENBL,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x14 0.--15. 1. "refssloten,refssloten Setting."
line.long 0x18 "QOSWT_WTACC,"
hexmask.long 0x18 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x18 0. "wtaccess_en,Output Enable for WT mode" "0,1"
line.long 0x1C "QOSCTRL_BWG,"
hexmask.long 0x1C 3.--31. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x1C 0.--2. "FIXLSB,Bandwidth granularity of QoS setting." "0,1,2,3,4,5,6,7"
group.long 0x8090++0x7
line.long 0x0 "QOSMON_PMONAUTOOFFEN,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "pmon_autooff_en,Enable bit of auto disable function of bandwidth performance monitor." "0,1"
line.long 0x4 "QOSMON_PMONAUTOOFFSSLOT,"
hexmask.long 0x4 0.--31. 1. "sslotnum,Subslot period for auto disable function of bandwidth performance monitor."
rgroup.long 0xC000++0x3
line.long 0x0 "QOSMON_PMONTIME,"
hexmask.long 0x0 0.--31. 1. "sslocnt,Slobslot counter of bandwidth performance monitor."
group.long 0x10000++0x3
line.long 0x0 "QOSCTRL_RAS,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "EnumInit,EnumInit Setting."
group.long 0x10018++0x3
line.long 0x0 "QOSCTRL_RAEN,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "RAllocEnable,RAllocEnable Enable." "0,1"
group.long 0x10030++0xB
line.long 0x0 "QOSCTRL_DANN_LOW,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 24.--28. 1. "DAccNodeNum_FIX3,DAccNodeNum_FIX3 Setting."
newline
bitfld.long 0x0 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 16.--20. 1. "DAccNodeNum_FIX2,DAccNodeNum_FIX2 Setting."
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 8.--12. 1. "DAccNodeNum_FIX1,DAccNodeNum_FIX1 Setting."
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--4. 1. "DAccNodeNum_FIX0,DAccNodeNum_FIX0 Setting."
line.long 0x4 "QOSCTRL_DANN_HIGH,"
bitfld.long 0x4 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 24.--28. 1. "DAccNodeNum_BE3,DAccNodeNum_BE3 Setting."
newline
bitfld.long 0x4 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 16.--20. 1. "DAccNodeNum_BE2,DAccNodeNum_BE2 Setting."
newline
bitfld.long 0x4 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 8.--12. 1. "DAccNodeNum_BE1,DAccNodeNum_BE1 Setting."
newline
bitfld.long 0x4 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 0.--4. 1. "DAccNodeNum_BE0,DAccNodeNum_BE0 Setting."
line.long 0x8 "QOSCTRL_DANT,"
hexmask.long.word 0x8 23.--31. 1. "Reserved_23,Reserved"
newline
hexmask.long.byte 0x8 16.--22. 1. "DAccNodeThreshold2,DAccNodeThreshold2 Setting."
newline
bitfld.long 0x8 15. "Reserved_15,Reserved" "0,1"
newline
hexmask.long.byte 0x8 8.--14. 1. "DAccNodeThreshold1,DAccNodeThreshold1 Setting."
newline
bitfld.long 0x8 7. "Reserved_7,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--6. 1. "DAccNodeThreshold0,DAccNodeThreshold0 Setting."
group.long 0x10040++0xB
line.long 0x0 "QOSCTRL_EMS_LOW,"
bitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
newline
bitfld.long 0x0 28.--30. "emaxschedule7,emaxschedule7 Setting." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 27. "Reserved_27,Reserved" "0,1"
newline
bitfld.long 0x0 24.--26. "emaxschedule6,emaxschedule6 Setting." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x0 20.--22. "emaxschedule5,emaxschedule5 Setting." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x0 16.--18. "emaxschedule4,emaxschedule4 Setting." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
newline
bitfld.long 0x0 12.--14. "emaxschedule3,emaxschedule3 Setting." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 8.--10. "emaxschedule2,emaxschedule2 Setting." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x0 4.--6. "emaxschedule1,emaxschedule1 Setting." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 0.--2. "emaxschedule0,emaxschedule0 Setting." "0,1,2,3,4,5,6,7"
line.long 0x4 "QOSCTRL_EMS_HIGH,"
bitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
newline
bitfld.long 0x4 28.--30. "emaxschedule15,emaxschedule15 Setting." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 27. "Reserved_27,Reserved" "0,1"
newline
bitfld.long 0x4 24.--26. "emaxschedule14,emaxschedule14 Setting." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x4 20.--22. "emaxschedule13,emaxschedule13 Setting." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x4 16.--18. "emaxschedule12,emaxschedule12 Setting." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 15. "Reserved_15,Reserved" "0,1"
newline
bitfld.long 0x4 12.--14. "emaxschedule11,emaxschedule11 Setting." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x4 8.--10. "emaxschedule10,emaxschedule10 Setting." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x4 4.--6. "emaxschedule9,emaxschedule9 Setting." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x4 0.--2. "emaxschedule8,emaxschedule8 Setting." "0,1,2,3,4,5,6,7"
line.long 0x8 "QOSCTRL_FSS,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Functional safety setup."
group.long 0x10050++0x3
line.long 0x0 "QOSCTRL_INSFC,"
hexmask.long.word 0x0 16.--31. 1. "insfclear_sslot,insfclear_sslot Setting."
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "insfclear_en,insfclear_en Enable." "0,1"
group.long 0x10060++0x3
line.long 0x0 "QOSCTRL_EARLYR,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 0.--1. "early_return_mode,early_return_mode Setting." "0,1,2,3"
group.long 0x10080++0x3
line.long 0x0 "QOSCTRL_RACNT0,"
hexmask.long.byte 0x0 26.--31. 1. "Reserved_26,Reserved"
newline
bitfld.long 0x0 24.--25. "gpu_ticket_mode,gpu_ticket_mode Setting." "0,1,2,3"
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x0 18.--19. "be_ticket_mask_cycle,be ticket_mask_cycle Setting." "0,1,2,3"
newline
bitfld.long 0x0 16.--17. "ticket_mask_cycle,ticket_mask_cycle Setting." "0,1,2,3"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "swapin_inform_disable,swapin_inform_disable Setting." "0,1"
newline
bitfld.long 0x0 0. "beticket_mask_disable,beticket_mask_disable Setting." "0,1"
group.long 0x10088++0x3
line.long 0x0 "QOSCTRL_STATGEN0,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "vip_ticket_mode,vip_ticket_mode Setting." "0,1,2,3"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "imp_ticket_mode,imp_ticket_mode Setting." "0,1,2,3"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "cpu_ticket_mode,cpu_ticket_mode Setting." "0,1,2,3"
newline
bitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0.--1. "gpu_ticket_mode,gpu_ticket_mode Setting." "0,1,2,3"
tree.end
base ad:0x0
tree "AXI_bus_D_1"
group.long 0x0++0x3
line.long 0x0 "FDT_AXSC2APS0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x1900++0x8F
line.long 0x0 "RGIDR_ADVFSC,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_APMU0,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_APMU1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_APMU10,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_APMU11,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_APMU12,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_APMU13,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_APMU14,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_APMU15,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_APMU2,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_APMU3,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_APMU4,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_APMU5,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_APMU6,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_APMU7,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_APMU8,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDR_APMU9,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDR_ARS00,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDR_ARS01,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDR_ARS02,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDR_ARS03,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDR_ARS04,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDR_ARS05,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDR_ARS06,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDR_ARS07,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDR_ARS08,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDR_CMT0,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDR_CMT1,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDR_CMT2,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDR_CMT3,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDR_CKM,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDR_DBE,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDR_IRQC,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x84 "RGIDR_ECMPS0,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x84 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x88 "RGIDR_OTP0,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x88 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8C "RGIDR_OTP1,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8C 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x199C++0x3
line.long 0x0 "RGIDR_SCMT,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19A8++0x13
line.long 0x0 "RGIDR_TSC1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_TSC2,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_TSC3,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_TSC4,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_UCMT,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1A00++0x7F
line.long 0x0 "RGIDR_CPG0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_CPG1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_CPG2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_CPG3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_PFC00,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_PFC01,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_PFC02,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_PFC03,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_PFC10,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_PFC11,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_PFC12,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_PFC13,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_PFC20,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_PFC21,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_PFC22,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_PFC23,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDR_PFC30,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDR_PFC31,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDR_PFC32,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDR_PFC33,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDR_PFCS0,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDR_PFCS1,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDR_PFCS2,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDR_PFCS3,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDR_RESET0,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDR_RESET1,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDR_RESET2,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDR_RESET3,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDR_SYS0,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDR_SYS1,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDR_SYS2,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDR_SYS3,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1D00++0x8F
line.long 0x0 "RGIDW_ADVFSC,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_APMU0,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_APMU1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_APMU10,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_APMU11,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_APMU12,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_APMU13,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_APMU14,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_APMU15,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_APMU2,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_APMU3,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_APMU4,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_APMU5,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_APMU6,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_APMU7,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_APMU8,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDW_APMU9,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDW_ARS00,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDW_ARS01,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDW_ARS02,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDW_ARS03,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDW_ARS04,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDW_ARS05,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDW_ARS06,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDW_ARS07,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDW_ARS08,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDW_CMT0,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDW_CMT1,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDW_CMT2,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDW_CMT3,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDW_CKM,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDW_DBE,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDW_IRQC,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x84 "RGIDW_ECMPS0,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x84 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x88 "RGIDW_OTP0,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x88 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8C "RGIDW_OTP1,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8C 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1D9C++0x3
line.long 0x0 "RGIDW_SCMT,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1DA8++0x13
line.long 0x0 "RGIDW_TSC1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_TSC2,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_TSC3,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_TSC4,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_UCMT,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1E00++0x7F
line.long 0x0 "RGIDW_CPG0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_CPG1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_CPG2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_CPG3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_PFC00,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_PFC01,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_PFC02,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_PFC03,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_PFC10,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_PFC11,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_PFC12,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_PFC13,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_PFC20,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_PFC21,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_PFC22,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_PFC23,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDW_PFC30,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDW_PFC31,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDW_PFC32,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDW_PFC33,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDW_PFCS0,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDW_PFCS1,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDW_PFCS2,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDW_PFCS3,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDW_RESET0,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDW_RESET1,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDW_RESET2,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDW_RESET3,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDW_SYS0,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDW_SYS1,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDW_SYS2,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDW_SYS3,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x2D00++0x8F
line.long 0x0 "SEC_ADVFSC,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_APMU0,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_APMU1,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_APMU10,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_APMU11,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_APMU12,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_APMU13,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_APMU14,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_APMU15,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_APMU2,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_APMU3,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_APMU4,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_APMU5,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_APMU6,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_APMU7,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_APMU8,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
line.long 0x40 "SEC_APMU9,"
hexmask.long 0x40 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x40 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x40 0. "Reserved_0,Reserved" "0,1"
line.long 0x44 "SEC_ARS00,"
hexmask.long 0x44 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x44 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x44 0. "Reserved_0,Reserved" "0,1"
line.long 0x48 "SEC_ARS01,"
hexmask.long 0x48 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x48 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x48 0. "Reserved_0,Reserved" "0,1"
line.long 0x4C "SEC_ARS02,"
hexmask.long 0x4C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4C 0. "Reserved_0,Reserved" "0,1"
line.long 0x50 "SEC_ARS03,"
hexmask.long 0x50 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x50 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x50 0. "Reserved_0,Reserved" "0,1"
line.long 0x54 "SEC_ARS04,"
hexmask.long 0x54 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x54 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x54 0. "Reserved_0,Reserved" "0,1"
line.long 0x58 "SEC_ARS05,"
hexmask.long 0x58 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x58 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x58 0. "Reserved_0,Reserved" "0,1"
line.long 0x5C "SEC_ARS06,"
hexmask.long 0x5C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x5C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x5C 0. "Reserved_0,Reserved" "0,1"
line.long 0x60 "SEC_ARS07,"
hexmask.long 0x60 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x60 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x60 0. "Reserved_0,Reserved" "0,1"
line.long 0x64 "SEC_ARS08,"
hexmask.long 0x64 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x64 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x64 0. "Reserved_0,Reserved" "0,1"
line.long 0x68 "SEC_CMT0,"
hexmask.long 0x68 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x68 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x68 0. "Reserved_0,Reserved" "0,1"
line.long 0x6C "SEC_CMT1,"
hexmask.long 0x6C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x6C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x6C 0. "Reserved_0,Reserved" "0,1"
line.long 0x70 "SEC_CMT2,"
hexmask.long 0x70 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x70 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x70 0. "Reserved_0,Reserved" "0,1"
line.long 0x74 "SEC_CMT3,"
hexmask.long 0x74 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x74 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x74 0. "Reserved_0,Reserved" "0,1"
line.long 0x78 "SEC_CKM,"
hexmask.long 0x78 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x78 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x78 0. "Reserved_0,Reserved" "0,1"
line.long 0x7C "SEC_DBE,"
hexmask.long 0x7C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x7C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x7C 0. "Reserved_0,Reserved" "0,1"
line.long 0x80 "SEC_IRQC,"
hexmask.long 0x80 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x80 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x80 0. "Reserved_0,Reserved" "0,1"
line.long 0x84 "SEC_ECMPS0,"
hexmask.long 0x84 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x84 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x84 0. "Reserved_0,Reserved" "0,1"
line.long 0x88 "SEC_OTP0,"
hexmask.long 0x88 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x88 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x88 0. "Reserved_0,Reserved" "0,1"
line.long 0x8C "SEC_OTP1,"
hexmask.long 0x8C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8C 0. "Reserved_0,Reserved" "0,1"
group.long 0x2D9C++0x3
line.long 0x0 "SEC_SCMT,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x2DA8++0x13
line.long 0x0 "SEC_TSC1,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_TSC2,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_TSC3,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_TSC4,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_UCMT,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
group.long 0x2E00++0x7F
line.long 0x0 "SEC_CPG0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_CPG1,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_CPG2,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_CPG3,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_PFC00,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_PFC01,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_PFC02,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_PFC03,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_PFC10,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_PFC11,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_PFC12,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_PFC13,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_PFC20,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_PFC21,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_PFC22,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_PFC23,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
line.long 0x40 "SEC_PFC30,"
hexmask.long 0x40 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x40 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x40 0. "Reserved_0,Reserved" "0,1"
line.long 0x44 "SEC_PFC31,"
hexmask.long 0x44 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x44 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x44 0. "Reserved_0,Reserved" "0,1"
line.long 0x48 "SEC_PFC32,"
hexmask.long 0x48 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x48 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x48 0. "Reserved_0,Reserved" "0,1"
line.long 0x4C "SEC_PFC33,"
hexmask.long 0x4C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4C 0. "Reserved_0,Reserved" "0,1"
line.long 0x50 "SEC_PFCS0,"
hexmask.long 0x50 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x50 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x50 0. "Reserved_0,Reserved" "0,1"
line.long 0x54 "SEC_PFCS1,"
hexmask.long 0x54 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x54 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x54 0. "Reserved_0,Reserved" "0,1"
line.long 0x58 "SEC_PFCS2,"
hexmask.long 0x58 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x58 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x58 0. "Reserved_0,Reserved" "0,1"
line.long 0x5C "SEC_PFCS3,"
hexmask.long 0x5C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x5C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x5C 0. "Reserved_0,Reserved" "0,1"
line.long 0x60 "SEC_RESET0,"
hexmask.long 0x60 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x60 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x60 0. "Reserved_0,Reserved" "0,1"
line.long 0x64 "SEC_RESET1,"
hexmask.long 0x64 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x64 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x64 0. "Reserved_0,Reserved" "0,1"
line.long 0x68 "SEC_RESET2,"
hexmask.long 0x68 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x68 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x68 0. "Reserved_0,Reserved" "0,1"
line.long 0x6C "SEC_RESET3,"
hexmask.long 0x6C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x6C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x6C 0. "Reserved_0,Reserved" "0,1"
line.long 0x70 "SEC_SYS0,"
hexmask.long 0x70 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x70 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x70 0. "Reserved_0,Reserved" "0,1"
line.long 0x74 "SEC_SYS1,"
hexmask.long 0x74 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x74 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x74 0. "Reserved_0,Reserved" "0,1"
line.long 0x78 "SEC_SYS2,"
hexmask.long 0x78 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x78 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x78 0. "Reserved_0,Reserved" "0,1"
line.long 0x7C "SEC_SYS3,"
hexmask.long 0x7C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x7C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x7C 0. "Reserved_0,Reserved" "0,1"
group.long 0x3910++0x3
line.long 0x0 "SAFERR_APS0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x3920++0x3
line.long 0x0 "SAFID_APS0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x4910++0x3
line.long 0x0 "SECERR_APS0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x4920++0x3
line.long 0x0 "SECID_APS0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x71940++0x3
line.long 0x0 "FIXSTTOP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x71980++0x7
line.long 0x0 "ROUERRSTTOP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x4 "ROUERRSTTOP11,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x719C0++0x7
line.long 0x0 "EDCSTTOP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x4 "EDCSTTOP11,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x71A00++0x3
line.long 0x0 "LSCHKSTTOP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x71A80++0x3
line.long 0x0 "RSCHKSTTOP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x71B00++0x3
line.long 0x0 "DCLSSTTOP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x71B80++0x3
line.long 0x0 "SECERRSTTOP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x71BC0++0x3
line.long 0x0 "SAFERRSTTOP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x71C00++0x3
line.long 0x0 "ICISTPSTTOP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x71CC0++0x3
line.long 0x0 "FIXINTENTOP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x71D00++0x7
line.long 0x0 "ROUINTENTOP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x4 "ROUINTENTOP11,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x71D40++0x7
line.long 0x0 "EDCINTENTOP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x4 "EDCINTENTOP11,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x71D80++0x3
line.long 0x0 "LSCHKINTENTOP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x71E00++0x3
line.long 0x0 "RSCHKINTENTOP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x71E80++0x3
line.long 0x0 "DCLSINTENTOP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x71F00++0x3
line.long 0x0 "SECERRINTENTOP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x71F40++0x3
line.long 0x0 "SAFERRINTENTOP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x71F80++0x3
line.long 0x0 "ICISTPINTENTOP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x72040++0x3
line.long 0x0 "FIXDUMMYTOP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x72080++0x7
line.long 0x0 "ROUDUMMYTOP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x4 "ROUDUMMYTOP11,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x720C0++0x7
line.long 0x0 "EDCDUMMYTOP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x4 "EDCDUMMYTOP11,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x72100++0x3
line.long 0x0 "LSCHKDUMMYTOP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x72180++0x3
line.long 0x0 "RSCHKDUMMYTOP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x72200++0x3
line.long 0x0 "DCLSDUMMYTOP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x72280++0x3
line.long 0x0 "SECERRDUMMYTOP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x722C0++0x3
line.long 0x0 "SAFERRDUMMYTOP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x72300++0x3
line.long 0x0 "ICISTPDUMMYTOP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x1FF940++0x7
line.long 0x0 "FIXSTRT00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
line.long 0x4 "FIXSTRT01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x1FF980++0x1B
line.long 0x0 "ROUERRSTRT00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x4 "ROUERRSTRT01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x8 "ROUERRSTRT02,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0xC "ROUERRSTRT03,"
hexmask.long 0xC 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x10 "ROUERRSTRT04,"
hexmask.long 0x10 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x14 "ROUERRSTRT05,"
hexmask.long 0x14 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x18 "ROUERRSTRT06,"
hexmask.long 0x18 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x1FF9C0++0x17
line.long 0x0 "EDCSTRT00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x4 "EDCSTRT01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x8 "EDCSTRT02,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0xC "EDCSTRT03,"
hexmask.long 0xC 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x10 "EDCSTRT04,"
hexmask.long 0x10 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x14 "EDCSTRT05,"
hexmask.long 0x14 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x1FFA00++0xB
line.long 0x0 "LSCHKSTRT00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
line.long 0x4 "LSCHKSTRT01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
line.long 0x8 "LSCHKSTRT02,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x1FFA40++0x7
line.long 0x0 "WCRCERRSTRT00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Write Read check Error Status."
line.long 0x4 "WCRCERRSTRT01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows Write Read check Error Status."
group.long 0x1FFA80++0xB
line.long 0x0 "RSCHKSTRT00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
line.long 0x4 "RSCHKSTRT01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
line.long 0x8 "RSCHKSTRT02,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x1FFAC0++0x7
line.long 0x0 "TIDSTRT00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
line.long 0x4 "TIDSTRT01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
group.long 0x1FFB00++0x7
line.long 0x0 "DCLSSTRT00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
line.long 0x4 "DCLSSTRT01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x1FFB80++0x3
line.long 0x0 "SECERRSTRT00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x1FFBC0++0x3
line.long 0x0 "SAFERRSTRT00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x1FFC00++0x3
line.long 0x0 "ICISTPSTRT00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x1FFC80++0x3
line.long 0x0 "OTHSTRT00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Other Error Status."
group.long 0x1FFCC0++0x7
line.long 0x0 "FIXINTENRT00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
line.long 0x4 "FIXINTENRT01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x1FFD00++0x1B
line.long 0x0 "ROUINTENRT00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x4 "ROUINTENRT01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x8 "ROUINTENRT02,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0xC "ROUINTENRT03,"
hexmask.long 0xC 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x10 "ROUINTENRT04,"
hexmask.long 0x10 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x14 "ROUINTENRT05,"
hexmask.long 0x14 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x18 "ROUINTENRT06,"
hexmask.long 0x18 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x1FFD40++0x17
line.long 0x0 "EDCINTENRT00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x4 "EDCINTENRT01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x8 "EDCINTENRT02,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0xC "EDCINTENRT03,"
hexmask.long 0xC 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x10 "EDCINTENRT04,"
hexmask.long 0x10 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x14 "EDCINTENRT05,"
hexmask.long 0x14 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x1FFD80++0xB
line.long 0x0 "LSCHKINTENRT00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
line.long 0x4 "LSCHKINTENRT01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
line.long 0x8 "LSCHKINTENRT02,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x1FFDC0++0x7
line.long 0x0 "WCRCINTENRT00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Write Read check Error Interrupt Enable."
line.long 0x4 "WCRCINTENRT01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows Write Read check Error Interrupt Enable."
group.long 0x1FFE00++0xB
line.long 0x0 "RSCHKINTENRT00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
line.long 0x4 "RSCHKINTENRT01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
line.long 0x8 "RSCHKINTENRT02,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x1FFE40++0x7
line.long 0x0 "TIDINTENRT00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
line.long 0x4 "TIDINTENRT01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
group.long 0x1FFE80++0x7
line.long 0x0 "DCLSINTENRT00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
line.long 0x4 "DCLSINTENRT01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x1FFF00++0x3
line.long 0x0 "SECERRINTENRT00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x1FFF40++0x3
line.long 0x0 "SAFERRINTENRT00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x1FFF80++0x3
line.long 0x0 "ICISTPINTENRT00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x200000++0x3
line.long 0x0 "OTHINTENRT00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Other Error Interrupt Enable."
group.long 0x200040++0x7
line.long 0x0 "FIXDUMMYRT00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
line.long 0x4 "FIXDUMMYRT01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x200080++0x1B
line.long 0x0 "ROUDUMMYRT00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x4 "ROUDUMMYRT01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x8 "ROUDUMMYRT02,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0xC "ROUDUMMYRT03,"
hexmask.long 0xC 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x10 "ROUDUMMYRT04,"
hexmask.long 0x10 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x14 "ROUDUMMYRT05,"
hexmask.long 0x14 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x18 "ROUDUMMYRT06,"
hexmask.long 0x18 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x2000C0++0x17
line.long 0x0 "EDCDUMMYRT00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x4 "EDCDUMMYRT01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x8 "EDCDUMMYRT02,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0xC "EDCDUMMYRT03,"
hexmask.long 0xC 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x10 "EDCDUMMYRT04,"
hexmask.long 0x10 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x14 "EDCDUMMYRT05,"
hexmask.long 0x14 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x200100++0xB
line.long 0x0 "LSCHKDUMMYRT00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
line.long 0x4 "LSCHKDUMMYRT01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
line.long 0x8 "LSCHKDUMMYRT02,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x200140++0x7
line.long 0x0 "WCRCDUMMYRT00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Write Read check Dummy error enable."
line.long 0x4 "WCRCDUMMYRT01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows Write Read check Dummy error enable."
group.long 0x200180++0xB
line.long 0x0 "RSCHKDUMMYRT00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
line.long 0x4 "RSCHKDUMMYRT01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
line.long 0x8 "RSCHKDUMMYRT02,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x2001C0++0x7
line.long 0x0 "TIDDUMMYRT00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
line.long 0x4 "TIDDUMMYRT01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
group.long 0x200200++0x7
line.long 0x0 "DCLSDUMMYRT00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
line.long 0x4 "DCLSDUMMYRT01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x200280++0x3
line.long 0x0 "SECERRDUMMYRT00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x2002C0++0x3
line.long 0x0 "SAFERRDUMMYRT00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x200300++0x3
line.long 0x0 "ICISTPDUMMYRT00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x200380++0x3
line.long 0x0 "OTHDUMMYRT00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Other Dummy error enable."
group.long 0x203940++0x3
line.long 0x0 "FIXSTRT10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x203980++0x3
line.long 0x0 "ROUERRSTRT10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x203A00++0x3
line.long 0x0 "LSCHKSTRT10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x203A40++0x3
line.long 0x0 "WCRCERRSTRT10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Write Read check Error Status."
group.long 0x203A80++0x3
line.long 0x0 "RSCHKSTRT10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x203AC0++0x3
line.long 0x0 "TIDSTRT10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
group.long 0x203B80++0x3
line.long 0x0 "SECERRSTRT10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x203BC0++0x3
line.long 0x0 "SAFERRSTRT10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x203C00++0x3
line.long 0x0 "ICISTPSTRT10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x203CC0++0x3
line.long 0x0 "FIXINTENRT10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x203D00++0x3
line.long 0x0 "ROUINTENRT10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x203D80++0x3
line.long 0x0 "LSCHKINTENRT10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x203DC0++0x3
line.long 0x0 "WCRCINTENRT10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Write Read check Error Interrupt Enable."
group.long 0x203E00++0x3
line.long 0x0 "RSCHKINTENRT10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x203E40++0x3
line.long 0x0 "TIDINTENRT10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
group.long 0x203F00++0x3
line.long 0x0 "SECERRINTENRT10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x203F40++0x3
line.long 0x0 "SAFERRINTENRT10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x203F80++0x3
line.long 0x0 "ICISTPINTENRT10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x204040++0x3
line.long 0x0 "FIXDUMMYRT10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x204080++0x3
line.long 0x0 "ROUDUMMYRT10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x204100++0x3
line.long 0x0 "LSCHKDUMMYRT10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x204140++0x3
line.long 0x0 "WCRCDUMMYRT10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Write Read check Dummy error enable."
group.long 0x204180++0x3
line.long 0x0 "RSCHKDUMMYRT10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x2041C0++0x3
line.long 0x0 "TIDDUMMYRT10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
group.long 0x204280++0x3
line.long 0x0 "SECERRDUMMYRT10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x2042C0++0x3
line.long 0x0 "SAFERRDUMMYRT10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x204300++0x3
line.long 0x0 "ICISTPDUMMYRT10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x207940++0x3
line.long 0x0 "FIXSTRT20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x207980++0x3
line.long 0x0 "ROUERRSTRT20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x2079C0++0x3
line.long 0x0 "EDCSTRT20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x207A00++0x3
line.long 0x0 "LSCHKSTRT20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x207A40++0x3
line.long 0x0 "WCRCERRSTRT20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Write Read check Error Status."
group.long 0x207A80++0x3
line.long 0x0 "RSCHKSTRT20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x207AC0++0x3
line.long 0x0 "TIDSTRT20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
group.long 0x207B00++0x3
line.long 0x0 "DCLSSTRT20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x207B80++0x3
line.long 0x0 "SECERRSTRT20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x207BC0++0x3
line.long 0x0 "SAFERRSTRT20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x207C00++0x3
line.long 0x0 "ICISTPSTRT20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x207CC0++0x3
line.long 0x0 "FIXINTENRT20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x207D00++0x3
line.long 0x0 "ROUINTENRT20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x207D40++0x3
line.long 0x0 "EDCINTENRT20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x207D80++0x3
line.long 0x0 "LSCHKINTENRT20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x207DC0++0x3
line.long 0x0 "WCRCINTENRT20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Write Read check Error Interrupt Enable."
group.long 0x207E00++0x3
line.long 0x0 "RSCHKINTENRT20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x207E40++0x3
line.long 0x0 "TIDINTENRT20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
group.long 0x207E80++0x3
line.long 0x0 "DCLSINTENRT20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x207F00++0x3
line.long 0x0 "SECERRINTENRT20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x207F40++0x3
line.long 0x0 "SAFERRINTENRT20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x207F80++0x3
line.long 0x0 "ICISTPINTENRT20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x208040++0x3
line.long 0x0 "FIXDUMMYRT20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x208080++0x3
line.long 0x0 "ROUDUMMYRT20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x2080C0++0x3
line.long 0x0 "EDCDUMMYRT20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x208100++0x3
line.long 0x0 "LSCHKDUMMYRT20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x208140++0x3
line.long 0x0 "WCRCDUMMYRT20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Write Read check Dummy error enable."
group.long 0x208180++0x3
line.long 0x0 "RSCHKDUMMYRT20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x2081C0++0x3
line.long 0x0 "TIDDUMMYRT20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
group.long 0x208200++0x3
line.long 0x0 "DCLSDUMMYRT20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x208280++0x3
line.long 0x0 "SECERRDUMMYRT20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x2082C0++0x3
line.long 0x0 "SAFERRDUMMYRT20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x208300++0x3
line.long 0x0 "ICISTPDUMMYRT20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x20B940++0x3
line.long 0x0 "FIXSTRT30,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x20B980++0x7
line.long 0x0 "ROUERRSTRT30,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x4 "ROUERRSTRT31,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x20B9C0++0x7
line.long 0x0 "EDCSTRT30,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x4 "EDCSTRT31,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x20BA00++0x3
line.long 0x0 "LSCHKSTRT30,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x20BA80++0x3
line.long 0x0 "RSCHKSTRT30,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x20BB00++0x3
line.long 0x0 "DCLSSTRT30,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x20BB80++0x3
line.long 0x0 "SECERRSTRT30,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x20BBC0++0x3
line.long 0x0 "SAFERRSTRT30,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x20BC00++0x3
line.long 0x0 "ICISTPSTRT30,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x20BCC0++0x3
line.long 0x0 "FIXINTENRT30,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x20BD00++0x7
line.long 0x0 "ROUINTENRT30,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x4 "ROUINTENRT31,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x20BD40++0x7
line.long 0x0 "EDCINTENRT30,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x4 "EDCINTENRT31,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x20BD80++0x3
line.long 0x0 "LSCHKINTENRT30,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x20BE00++0x3
line.long 0x0 "RSCHKINTENRT30,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x20BE80++0x3
line.long 0x0 "DCLSINTENRT30,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x20BF00++0x3
line.long 0x0 "SECERRINTENRT30,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x20BF40++0x3
line.long 0x0 "SAFERRINTENRT30,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x20BF80++0x3
line.long 0x0 "ICISTPINTENRT30,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x20C040++0x3
line.long 0x0 "FIXDUMMYRT30,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x20C080++0x7
line.long 0x0 "ROUDUMMYRT30,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x4 "ROUDUMMYRT31,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x20C0C0++0x7
line.long 0x0 "EDCDUMMYRT30,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x4 "EDCDUMMYRT31,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x20C100++0x3
line.long 0x0 "LSCHKDUMMYRT30,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x20C180++0x3
line.long 0x0 "RSCHKDUMMYRT30,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x20C200++0x3
line.long 0x0 "DCLSDUMMYRT30,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x20C280++0x3
line.long 0x0 "SECERRDUMMYRT30,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x20C2C0++0x3
line.long 0x0 "SAFERRDUMMYRT30,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x20C300++0x3
line.long 0x0 "ICISTPDUMMYRT30,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x48F940++0x7
line.long 0x0 "FIXSTHSC0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
line.long 0x4 "FIXSTHSC1,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x48F980++0x13
line.long 0x0 "ROUERRSTHSC0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x4 "ROUERRSTHSC1,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x8 "ROUERRSTHSC2,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0xC "ROUERRSTHSC3,"
hexmask.long 0xC 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x10 "ROUERRSTHSC4,"
hexmask.long 0x10 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x48F9C0++0x17
line.long 0x0 "EDCSTHSC0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x4 "EDCSTHSC1,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x8 "EDCSTHSC2,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0xC "EDCSTHSC3,"
hexmask.long 0xC 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x10 "EDCSTHSC4,"
hexmask.long 0x10 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x14 "EDCSTHSC5,"
hexmask.long 0x14 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x48FA00++0x7
line.long 0x0 "LSCHKSTHSC0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
line.long 0x4 "LSCHKSTHSC1,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x48FA40++0x3
line.long 0x0 "WCRCERRSTHSC0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Write Read check Error Status."
group.long 0x48FA80++0x7
line.long 0x0 "RSCHKSTHSC0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
line.long 0x4 "RSCHKSTHSC1,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x48FAC0++0x3
line.long 0x0 "TIDSTHSC0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
group.long 0x48FB00++0x3
line.long 0x0 "DCLSSTHSC0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x48FB80++0x3
line.long 0x0 "SECERRSTHSC0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x48FBC0++0x3
line.long 0x0 "SAFERRSTHSC0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x48FC00++0x3
line.long 0x0 "ICISTPSTHSC0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x48FC80++0x3
line.long 0x0 "OTHSTHSC0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Other Error Status."
group.long 0x48FCC0++0x7
line.long 0x0 "FIXINTENHSC0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
line.long 0x4 "FIXINTENHSC1,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x48FD00++0x13
line.long 0x0 "ROUINTENHSC0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x4 "ROUINTENHSC1,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x8 "ROUINTENHSC2,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0xC "ROUINTENHSC3,"
hexmask.long 0xC 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x10 "ROUINTENHSC4,"
hexmask.long 0x10 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x48FD40++0x17
line.long 0x0 "EDCINTENHSC0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x4 "EDCINTENHSC1,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x8 "EDCINTENHSC2,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0xC "EDCINTENHSC3,"
hexmask.long 0xC 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x10 "EDCINTENHSC4,"
hexmask.long 0x10 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x14 "EDCINTENHSC5,"
hexmask.long 0x14 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x48FD80++0x7
line.long 0x0 "LSCHKINTENHSC0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
line.long 0x4 "LSCHKINTENHSC1,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x48FDC0++0x3
line.long 0x0 "WCRCINTENHSC0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Write Read check Error Interrupt Enable."
group.long 0x48FE00++0x7
line.long 0x0 "RSCHKINTENHSC0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
line.long 0x4 "RSCHKINTENHSC1,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x48FE40++0x3
line.long 0x0 "TIDINTENHSC0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
group.long 0x48FE80++0x3
line.long 0x0 "DCLSINTENHSC0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x48FF00++0x3
line.long 0x0 "SECERRINTENHSC0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x48FF40++0x3
line.long 0x0 "SAFERRINTENHSC0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x48FF80++0x3
line.long 0x0 "ICISTPINTENHSC0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x490000++0x3
line.long 0x0 "OTHINTENHSC0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Other Error Interrupt Enable."
group.long 0x490040++0x7
line.long 0x0 "FIXDUMMYHSC0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
line.long 0x4 "FIXDUMMYHSC1,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x490080++0x13
line.long 0x0 "ROUDUMMYHSC0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x4 "ROUDUMMYHSC1,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x8 "ROUDUMMYHSC2,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0xC "ROUDUMMYHSC3,"
hexmask.long 0xC 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x10 "ROUDUMMYHSC4,"
hexmask.long 0x10 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x4900C0++0x17
line.long 0x0 "EDCDUMMYHSC0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x4 "EDCDUMMYHSC1,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x8 "EDCDUMMYHSC2,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0xC "EDCDUMMYHSC3,"
hexmask.long 0xC 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x10 "EDCDUMMYHSC4,"
hexmask.long 0x10 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x14 "EDCDUMMYHSC5,"
hexmask.long 0x14 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x490100++0x7
line.long 0x0 "LSCHKDUMMYHSC0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
line.long 0x4 "LSCHKDUMMYHSC1,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x490140++0x3
line.long 0x0 "WCRCDUMMYHSC0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Write Read check Dummy error enable."
group.long 0x490180++0x7
line.long 0x0 "RSCHKDUMMYHSC0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
line.long 0x4 "RSCHKDUMMYHSC1,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x4901C0++0x3
line.long 0x0 "TIDDUMMYHSC0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
group.long 0x490200++0x3
line.long 0x0 "DCLSDUMMYHSC0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x490280++0x3
line.long 0x0 "SECERRDUMMYHSC0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x4902C0++0x3
line.long 0x0 "SAFERRDUMMYHSC0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x490300++0x3
line.long 0x0 "ICISTPDUMMYHSC0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x490380++0x3
line.long 0x0 "OTHDUMMYHSC0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Other Dummy error enable."
group.long 0x580000++0x3
line.long 0x0 "FDT_PCI00,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x580010++0xB
line.long 0x0 "FDT_AVB0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_AVB1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x8 "FDT_AVB2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x580020++0xF
line.long 0x0 "FDT_PCI01,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_PCI10,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x8 "FDT_AXSTM2AXHC0,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0xC "FDT_AXSTM2AXHC1,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x580034++0x3
line.long 0x0 "FDT_PCI11,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x580040++0x3
line.long 0x0 "FDT_TSN0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x580900++0x3
line.long 0x0 "RGIDM_PCI0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x580910++0xB
line.long 0x0 "RGIDM_AVB0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_AVB1,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x8 "RGIDM_AVB2,"
hexmask.long 0x8 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x8 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x580920++0x7
line.long 0x0 "RGIDM_PCI1,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_PCI2,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x580934++0x3
line.long 0x0 "RGIDM_PCI3,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x580940++0x3
line.long 0x0 "RGIDM_TSN,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x581900++0xF
line.long 0x0 "RGIDR_CKMHSC,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_AXIPCI001,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_AXIPCI002,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_AXIPCI003,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x581914++0x6B
line.long 0x0 "RGIDR_AXIPCI005,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_AXIPCI006,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_AXIPCI007,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_AXIPCI008,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_AXIPCI009,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_AXIPCI010,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_AXIPCI011,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_AXIPCI012,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_AXIPCI013,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_AXIPCI014,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_AXIPCI015,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_AXIPCI100,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_AXIPCI101,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_AXIPCI102,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_AXIPCI103,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_AXIPCI104,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDR_AXIPCI105,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDR_AXIPCI106,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDR_AXIPCI107,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDR_AXIPCI108,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDR_AXIPCI109,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDR_AXIPCI110,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDR_AXIPCI111,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDR_AXIPCI112,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDR_AXIPCI113,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDR_AXIPCI114,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDR_AXIPCI115,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x581984++0x7
line.long 0x0 "RGIDR_GPTP,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_IPMMUHC00,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x5819F0++0x43
line.long 0x0 "RGIDR_TSN0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_AXIPCI000,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_AXIPCI004,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_IPMMUHC01,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_AVB0,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_AVB1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_AVB2,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_IPMMUHC10,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_IPMMUHC11,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_IPMMUHC12,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_IPMMUHC13,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_PPHY0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_PPHY1,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_IPMMUHC14,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_IPMMUHC15,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_FBAHSC,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDR_IPMMUHC02,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x581A38++0x43
line.long 0x0 "RGIDR_ECMHSC,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_ARHC0,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_ARHC1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_ARHC2,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_ARHC3,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_ARHC4,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_ARHC5,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_ARHC6,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_ARHC7,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_ARHC8,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_IPMMUHC03,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_IPMMUHC04,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_IPMMUHC05,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_IPMMUHC06,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_IPMMUHC07,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_IPMMUHC08,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDR_IPMMUHC09,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x581D00++0xF
line.long 0x0 "RGIDW_CKMHSC,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_AXIPCI001,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_AXIPCI002,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_AXIPCI003,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x581D14++0x6B
line.long 0x0 "RGIDW_AXIPCI005,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_AXIPCI006,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_AXIPCI007,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_AXIPCI008,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_AXIPCI009,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_AXIPCI010,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_AXIPCI011,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_AXIPCI012,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_AXIPCI013,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_AXIPCI014,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_AXIPCI015,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_AXIPCI100,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_AXIPCI101,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_AXIPCI102,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_AXIPCI103,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_AXIPCI104,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDW_AXIPCI105,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDW_AXIPCI106,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDW_AXIPCI107,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDW_AXIPCI108,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDW_AXIPCI109,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDW_AXIPCI110,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDW_AXIPCI111,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDW_AXIPCI112,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDW_AXIPCI113,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDW_AXIPCI114,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDW_AXIPCI115,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x581D84++0x7
line.long 0x0 "RGIDW_GPTP,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_IPMMUHC00,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x581DF0++0x43
line.long 0x0 "RGIDW_TSN0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_AXIPCI000,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_AXIPCI004,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_IPMMUHC01,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_AVB0,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_AVB1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_AVB2,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_IPMMUHC10,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_IPMMUHC11,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_IPMMUHC12,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_IPMMUHC13,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_PPHY0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_PPHY1,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_IPMMUHC14,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_IPMMUHC15,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_FBAHSC,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDW_IPMMUHC02,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x581E38++0x43
line.long 0x0 "RGIDW_ECMHSC,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_ARHC0,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ARHC1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARHC2,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_ARHC3,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_ARHC4,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_ARHC5,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_ARHC6,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_ARHC7,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_ARHC8,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_IPMMUHC03,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_IPMMUHC04,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_IPMMUHC05,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_IPMMUHC06,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_IPMMUHC07,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_IPMMUHC08,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDW_IPMMUHC09,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x582D00++0xF
line.long 0x0 "SEC_CKMHSC,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_AXIPCI001,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_AXIPCI002,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_AXIPCI003,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
group.long 0x582D14++0x6B
line.long 0x0 "SEC_AXIPCI005,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_AXIPCI006,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_AXIPCI007,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_AXIPCI008,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_AXIPCI009,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_AXIPCI010,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_AXIPCI011,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_AXIPCI012,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_AXIPCI013,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_AXIPCI014,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_AXIPCI015,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_AXIPCI100,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_AXIPCI101,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_AXIPCI102,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_AXIPCI103,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_AXIPCI104,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
line.long 0x40 "SEC_AXIPCI105,"
hexmask.long 0x40 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x40 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x40 0. "Reserved_0,Reserved" "0,1"
line.long 0x44 "SEC_AXIPCI106,"
hexmask.long 0x44 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x44 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x44 0. "Reserved_0,Reserved" "0,1"
line.long 0x48 "SEC_AXIPCI107,"
hexmask.long 0x48 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x48 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x48 0. "Reserved_0,Reserved" "0,1"
line.long 0x4C "SEC_AXIPCI108,"
hexmask.long 0x4C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4C 0. "Reserved_0,Reserved" "0,1"
line.long 0x50 "SEC_AXIPCI109,"
hexmask.long 0x50 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x50 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x50 0. "Reserved_0,Reserved" "0,1"
line.long 0x54 "SEC_AXIPCI110,"
hexmask.long 0x54 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x54 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x54 0. "Reserved_0,Reserved" "0,1"
line.long 0x58 "SEC_AXIPCI111,"
hexmask.long 0x58 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x58 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x58 0. "Reserved_0,Reserved" "0,1"
line.long 0x5C "SEC_AXIPCI112,"
hexmask.long 0x5C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x5C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x5C 0. "Reserved_0,Reserved" "0,1"
line.long 0x60 "SEC_AXIPCI113,"
hexmask.long 0x60 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x60 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x60 0. "Reserved_0,Reserved" "0,1"
line.long 0x64 "SEC_AXIPCI114,"
hexmask.long 0x64 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x64 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x64 0. "Reserved_0,Reserved" "0,1"
line.long 0x68 "SEC_AXIPCI115,"
hexmask.long 0x68 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x68 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x68 0. "Reserved_0,Reserved" "0,1"
group.long 0x582D84++0x7
line.long 0x0 "SEC_GPTP,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_IPMMUHC00,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
group.long 0x582DF0++0x43
line.long 0x0 "SEC_TSN0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_AXIPCI000,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_AXIPCI004,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_IPMMUHC01,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_AVB0,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_AVB1,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_AVB2,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_IPMMUHC10,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_IPMMUHC11,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_IPMMUHC12,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_IPMMUHC13,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_PPHY0,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_PPHY1,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_IPMMUHC14,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_IPMMUHC15,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_FBAHSC,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
line.long 0x40 "SEC_IPMMUHC02,"
hexmask.long 0x40 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x40 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x40 0. "Reserved_0,Reserved" "0,1"
group.long 0x582E38++0x43
line.long 0x0 "SEC_ECMHSC,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_ARHC0,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_ARHC1,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_ARHC2,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_ARHC3,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_ARHC4,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_ARHC5,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_ARHC6,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_ARHC7,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_ARHC8,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_IPMMUHC03,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_IPMMUHC04,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_IPMMUHC05,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_IPMMUHC06,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_IPMMUHC07,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_IPMMUHC08,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
line.long 0x40 "SEC_IPMMUHC09,"
hexmask.long 0x40 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x40 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x40 0. "Reserved_0,Reserved" "0,1"
group.long 0x583910++0x3
line.long 0x0 "SAFERR_HSC,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x583920++0x3
line.long 0x0 "SAFID_HSC,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x584910++0x3
line.long 0x0 "SECERR_HSC,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x584920++0x3
line.long 0x0 "SECID_HSC,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x61FB04++0x3
line.long 0x0 "FDT_AXRT2AXRC,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x61FB0C++0x7
line.long 0x0 "FDT_DCLS_ICUMX,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_ICUMX,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x620004++0x3
line.long 0x0 "FDT_CR0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x620904++0x3
line.long 0x0 "RGIDM_CR0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x62090C++0xB
line.long 0x0 "RGIDM_DCLS_ICUMX,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_ICUMX,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x8 "RGIDM_SDMAC_ICUMX,"
hexmask.long 0x8 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x8 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x621900++0x2F
line.long 0x0 "RGIDR_ARRC0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_ARRC1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_ARRC2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_ARRC3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_ARRC4,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_ARRC5,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_ARRC6,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_ARRC7,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_ARRC8,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_CR0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_ICUMX,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_ECMRC,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x621D00++0x2F
line.long 0x0 "RGIDW_ARRC0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_ARRC1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ARRC2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARRC3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_ARRC4,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_ARRC5,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_ARRC6,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_ARRC7,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_ARRC8,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_CR0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_ICUMX,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_ECMRC,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x622D00++0x2F
line.long 0x0 "SEC_ARRC0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_ARRC1,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_ARRC2,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_ARRC3,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_ARRC4,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_ARRC5,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_ARRC6,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_ARRC7,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_ARRC8,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_CR0,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_ICUMX,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_ECMRC,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
group.long 0x623910++0x3
line.long 0x0 "SAFERR_AXRC,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x623920++0x3
line.long 0x0 "SAFID_AXRC,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x624910++0x3
line.long 0x0 "SECERR_AXRC,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x624920++0x3
line.long 0x0 "SECID_AXRC,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x7B8F24++0x3
line.long 0x0 "SEC_ARCC,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
group.long 0x7B8F38++0x3
line.long 0x0 "SEC_ARRTRAM,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
group.long 0x7B8F60++0x3
line.long 0x0 "RGIDR_ARCC,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x7B8F74++0x3
line.long 0x0 "RGIDR_ARRTRAM,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x7B8F9C++0x3
line.long 0x0 "RGIDW_ARCC,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x7B8FB0++0x3
line.long 0x0 "RGIDW_ARRTRAM,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x7C0000++0x3
line.long 0x0 "FDT_AXMM2AXSN,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x7C1900++0xD7
line.long 0x0 "RGIDR_ARMM,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_AXIARNMM,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_ARSM0,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_ARSM1,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_ARSM2,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_AXIQOS0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_AXIQOS1,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_AXIQOS2,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_AXIQOS3,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_AXIQOS4,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_AXIQOS5,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_AXIQOS6,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_AXIQOS7,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_ARSM3,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_ARSM4,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_ARSM5,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDR_ARSM6,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDR_ARSM7,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDR_ARSM8,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDR_AXMM0,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDR_AXMM1,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDR_AXMMPMON,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDR_CKMMM,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDR_ECMMM,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDR_FBADBSC0,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDR_FBADBSC1,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDR_FBAMM,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDR_IPMMUMM00,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDR_DBS0A0,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDR_DBS0A1,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDR_DBS1A0,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDR_DBS1A1,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDR_AXCIDBS,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x84 "RGIDR_FCPRC,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x84 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x88 "RGIDR_DBS0D0,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x88 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8C "RGIDR_DBS0D1,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x90 "RGIDR_DBS1D0,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x90 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x94 "RGIDR_DBS1D1,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x94 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x98 "RGIDR_FBADDR,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x98 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x9C "RGIDR_IPMMUMM01,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x9C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA0 "RGIDR_IPMMUMM10,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA4 "RGIDR_IPMMUMM11,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA8 "RGIDR_IPMMUMM12,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xAC "RGIDR_IPMMUMM13,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xAC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB0 "RGIDR_IPMMUMM14,"
hexmask.long.word 0xB0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB4 "RGIDR_IPMMUMM15,"
hexmask.long.word 0xB4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB8 "RGIDR_IPMMUMM02,"
hexmask.long.word 0xB8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xBC "RGIDR_IPMMUMM03,"
hexmask.long.word 0xBC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xBC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC0 "RGIDR_IPMMUMM04,"
hexmask.long.word 0xC0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC4 "RGIDR_IPMMUMM05,"
hexmask.long.word 0xC4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC8 "RGIDR_IPMMUMM06,"
hexmask.long.word 0xC8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xCC "RGIDR_IPMMUMM07,"
hexmask.long.word 0xCC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xCC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD0 "RGIDR_IPMMUMM08,"
hexmask.long.word 0xD0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD4 "RGIDR_IPMMUMM09,"
hexmask.long.word 0xD4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD4 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x7C1D00++0xD7
line.long 0x0 "RGIDW_ARMM,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_AXIARNMM,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ARSM0,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARSM1,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_ARSM2,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_AXIQOS0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_AXIQOS1,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_AXIQOS2,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_AXIQOS3,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_AXIQOS4,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_AXIQOS5,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_AXIQOS6,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_AXIQOS7,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_ARSM3,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_ARSM4,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_ARSM5,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDW_ARSM6,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDW_ARSM7,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDW_ARSM8,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDW_AXMM0,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDW_AXMM1,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDW_AXMMPMON,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDW_CKMMM,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDW_ECMMM,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDW_FBADBSC0,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDW_FBADBSC1,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDW_FBAMM,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDW_IPMMUMM00,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDW_DBS0A0,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDW_DBS0A1,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDW_DBS1A0,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDW_DBS1A1,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDW_AXCIDBS,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x84 "RGIDW_FCPRC,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x84 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x88 "RGIDW_DBS0D0,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x88 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8C "RGIDW_DBS0D1,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x90 "RGIDW_DBS1D0,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x90 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x94 "RGIDW_DBS1D1,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x94 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x98 "RGIDW_FBADDR,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x98 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x9C "RGIDW_IPMMUMM01,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x9C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA0 "RGIDW_IPMMUMM10,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA4 "RGIDW_IPMMUMM11,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA8 "RGIDW_IPMMUMM12,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xAC "RGIDW_IPMMUMM13,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xAC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB0 "RGIDW_IPMMUMM14,"
hexmask.long.word 0xB0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB4 "RGIDW_IPMMUMM15,"
hexmask.long.word 0xB4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB8 "RGIDW_IPMMUMM02,"
hexmask.long.word 0xB8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xBC "RGIDW_IPMMUMM03,"
hexmask.long.word 0xBC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xBC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC0 "RGIDW_IPMMUMM04,"
hexmask.long.word 0xC0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC4 "RGIDW_IPMMUMM05,"
hexmask.long.word 0xC4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC8 "RGIDW_IPMMUMM06,"
hexmask.long.word 0xC8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xCC "RGIDW_IPMMUMM07,"
hexmask.long.word 0xCC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xCC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD0 "RGIDW_IPMMUMM08,"
hexmask.long.word 0xD0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD4 "RGIDW_IPMMUMM09,"
hexmask.long.word 0xD4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD4 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x7C2D00++0xD7
line.long 0x0 "SEC_ARMM,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_AXIARNMM,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_ARSM0,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_ARSM1,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_ARSM2,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_AXIQOS0,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_AXIQOS1,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_AXIQOS2,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_AXIQOS3,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_AXIQOS4,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_AXIQOS5,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_AXIQOS6,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_AXIQOS7,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_ARSM3,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_ARSM4,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_ARSM5,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
line.long 0x40 "SEC_ARSM6,"
hexmask.long 0x40 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x40 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x40 0. "Reserved_0,Reserved" "0,1"
line.long 0x44 "SEC_ARSM7,"
hexmask.long 0x44 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x44 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x44 0. "Reserved_0,Reserved" "0,1"
line.long 0x48 "SEC_ARSM8,"
hexmask.long 0x48 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x48 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x48 0. "Reserved_0,Reserved" "0,1"
line.long 0x4C "SEC_AXMM0,"
hexmask.long 0x4C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4C 0. "Reserved_0,Reserved" "0,1"
line.long 0x50 "SEC_AXMM1,"
hexmask.long 0x50 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x50 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x50 0. "Reserved_0,Reserved" "0,1"
line.long 0x54 "SEC_AXMMPMON,"
hexmask.long 0x54 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x54 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x54 0. "Reserved_0,Reserved" "0,1"
line.long 0x58 "SEC_CKMMM,"
hexmask.long 0x58 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x58 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x58 0. "Reserved_0,Reserved" "0,1"
line.long 0x5C "SEC_ECMMM,"
hexmask.long 0x5C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x5C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x5C 0. "Reserved_0,Reserved" "0,1"
line.long 0x60 "SEC_FBADBSC0,"
hexmask.long 0x60 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x60 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x60 0. "Reserved_0,Reserved" "0,1"
line.long 0x64 "SEC_FBADBSC1,"
hexmask.long 0x64 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x64 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x64 0. "Reserved_0,Reserved" "0,1"
line.long 0x68 "SEC_FBAMM,"
hexmask.long 0x68 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x68 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x68 0. "Reserved_0,Reserved" "0,1"
line.long 0x6C "SEC_IPMMUMM00,"
hexmask.long 0x6C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x6C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x6C 0. "Reserved_0,Reserved" "0,1"
line.long 0x70 "SEC_DBS0A0,"
hexmask.long 0x70 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x70 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x70 0. "Reserved_0,Reserved" "0,1"
line.long 0x74 "SEC_DBS0A1,"
hexmask.long 0x74 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x74 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x74 0. "Reserved_0,Reserved" "0,1"
line.long 0x78 "SEC_DBS1A0,"
hexmask.long 0x78 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x78 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x78 0. "Reserved_0,Reserved" "0,1"
line.long 0x7C "SEC_DBS1A1,"
hexmask.long 0x7C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x7C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x7C 0. "Reserved_0,Reserved" "0,1"
line.long 0x80 "SEC_AXCIDBS,"
hexmask.long 0x80 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x80 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x80 0. "Reserved_0,Reserved" "0,1"
line.long 0x84 "SEC_FCPRC,"
hexmask.long 0x84 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x84 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x84 0. "Reserved_0,Reserved" "0,1"
line.long 0x88 "SEC_DBS0D0,"
hexmask.long 0x88 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x88 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x88 0. "Reserved_0,Reserved" "0,1"
line.long 0x8C "SEC_DBS0D1,"
hexmask.long 0x8C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8C 0. "Reserved_0,Reserved" "0,1"
line.long 0x90 "SEC_DBS1D0,"
hexmask.long 0x90 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x90 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x90 0. "Reserved_0,Reserved" "0,1"
line.long 0x94 "SEC_DBS1D1,"
hexmask.long 0x94 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x94 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x94 0. "Reserved_0,Reserved" "0,1"
line.long 0x98 "SEC_FBADDR,"
hexmask.long 0x98 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x98 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x98 0. "Reserved_0,Reserved" "0,1"
line.long 0x9C "SEC_IPMMUMM01,"
hexmask.long 0x9C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x9C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x9C 0. "Reserved_0,Reserved" "0,1"
line.long 0xA0 "SEC_IPMMUMM10,"
hexmask.long 0xA0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xA0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xA0 0. "Reserved_0,Reserved" "0,1"
line.long 0xA4 "SEC_IPMMUMM11,"
hexmask.long 0xA4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xA4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xA4 0. "Reserved_0,Reserved" "0,1"
line.long 0xA8 "SEC_IPMMUMM12,"
hexmask.long 0xA8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xA8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xA8 0. "Reserved_0,Reserved" "0,1"
line.long 0xAC "SEC_IPMMUMM13,"
hexmask.long 0xAC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xAC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xAC 0. "Reserved_0,Reserved" "0,1"
line.long 0xB0 "SEC_IPMMUMM14,"
hexmask.long 0xB0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xB0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xB0 0. "Reserved_0,Reserved" "0,1"
line.long 0xB4 "SEC_IPMMUMM15,"
hexmask.long 0xB4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xB4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xB4 0. "Reserved_0,Reserved" "0,1"
line.long 0xB8 "SEC_IPMMUMM02,"
hexmask.long 0xB8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xB8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xB8 0. "Reserved_0,Reserved" "0,1"
line.long 0xBC "SEC_IPMMUMM03,"
hexmask.long 0xBC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xBC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xBC 0. "Reserved_0,Reserved" "0,1"
line.long 0xC0 "SEC_IPMMUMM04,"
hexmask.long 0xC0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC0 0. "Reserved_0,Reserved" "0,1"
line.long 0xC4 "SEC_IPMMUMM05,"
hexmask.long 0xC4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC4 0. "Reserved_0,Reserved" "0,1"
line.long 0xC8 "SEC_IPMMUMM06,"
hexmask.long 0xC8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC8 0. "Reserved_0,Reserved" "0,1"
line.long 0xCC "SEC_IPMMUMM07,"
hexmask.long 0xCC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xCC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xCC 0. "Reserved_0,Reserved" "0,1"
line.long 0xD0 "SEC_IPMMUMM08,"
hexmask.long 0xD0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xD0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xD0 0. "Reserved_0,Reserved" "0,1"
line.long 0xD4 "SEC_IPMMUMM09,"
hexmask.long 0xD4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xD4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xD4 0. "Reserved_0,Reserved" "0,1"
group.long 0x7C3910++0x3
line.long 0x0 "SAFERR_AXSM,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x7C3920++0x3
line.long 0x0 "SAFID_AXSM,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x7C4910++0x3
line.long 0x0 "SECERR_AXSM,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x7C4920++0x3
line.long 0x0 "SECID_AXSM,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x7FB940++0x3
line.long 0x0 "FIXSTMM0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x7FB980++0xF
line.long 0x0 "ROUERRSTMM0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x4 "ROUERRSTMM1,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x8 "ROUERRSTMM2,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0xC "ROUERRSTMM3,"
hexmask.long 0xC 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x7FB9C0++0x13
line.long 0x0 "EDCSTMM0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x4 "EDCSTMM1,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x8 "EDCSTMM2,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0xC "EDCSTMM3,"
hexmask.long 0xC 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x10 "EDCSTMM4,"
hexmask.long 0x10 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x7FBA00++0x7
line.long 0x0 "LSCHKSTMM0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
line.long 0x4 "LSCHKSTMM1,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x7FBA40++0x3
line.long 0x0 "WCRCERRSTMM0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Write Read check Error Status."
group.long 0x7FBA80++0x7
line.long 0x0 "RSCHKSTMM0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
line.long 0x4 "RSCHKSTMM1,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x7FBAC0++0x3
line.long 0x0 "TIDSTMM0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
group.long 0x7FBB00++0x7
line.long 0x0 "DCLSSTMM0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
line.long 0x4 "DCLSSTMM1,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x7FBB80++0x3
line.long 0x0 "SECERRSTMM0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x7FBBC0++0x3
line.long 0x0 "SAFERRSTMM0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x7FBC00++0x3
line.long 0x0 "ICISTPSTMM0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x7FBC80++0x3
line.long 0x0 "OTHSTMM0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Other Error Status."
group.long 0x7FBCC0++0x3
line.long 0x0 "FIXINTENMM0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x7FBD00++0xF
line.long 0x0 "ROUINTENMM0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x4 "ROUINTENMM1,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x8 "ROUINTENMM2,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0xC "ROUINTENMM3,"
hexmask.long 0xC 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x7FBD40++0x13
line.long 0x0 "EDCINTENMM0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x4 "EDCINTENMM1,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x8 "EDCINTENMM2,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0xC "EDCINTENMM3,"
hexmask.long 0xC 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x10 "EDCINTENMM4,"
hexmask.long 0x10 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x7FBD80++0x7
line.long 0x0 "LSCHKINTENMM0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
line.long 0x4 "LSCHKINTENMM1,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x7FBDC0++0x3
line.long 0x0 "WCRCINTENMM0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Write Read check Error Interrupt Enable."
group.long 0x7FBE00++0x7
line.long 0x0 "RSCHKINTENMM0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
line.long 0x4 "RSCHKINTENMM1,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x7FBE40++0x3
line.long 0x0 "TIDINTENMM0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
group.long 0x7FBE80++0x7
line.long 0x0 "DCLSINTENMM0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
line.long 0x4 "DCLSINTENMM1,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x7FBF00++0x3
line.long 0x0 "SECERRINTENMM0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x7FBF40++0x3
line.long 0x0 "SAFERRINTENMM0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x7FBF80++0x3
line.long 0x0 "ICISTPINTENMM0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x7FC000++0x3
line.long 0x0 "OTHINTENMM0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Other Error Interrupt Enable."
group.long 0x7FC040++0x3
line.long 0x0 "FIXDUMMYMM0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x7FC080++0xF
line.long 0x0 "ROUDUMMYMM0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x4 "ROUDUMMYMM1,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x8 "ROUDUMMYMM2,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0xC "ROUDUMMYMM3,"
hexmask.long 0xC 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x7FC0C0++0x13
line.long 0x0 "EDCDUMMYMM0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x4 "EDCDUMMYMM1,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x8 "EDCDUMMYMM2,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0xC "EDCDUMMYMM3,"
hexmask.long 0xC 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x10 "EDCDUMMYMM4,"
hexmask.long 0x10 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x7FC100++0x7
line.long 0x0 "LSCHKDUMMYMM0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
line.long 0x4 "LSCHKDUMMYMM1,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x7FC140++0x3
line.long 0x0 "WCRCDUMMYMM0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Write Read check Dummy error enable."
group.long 0x7FC180++0x7
line.long 0x0 "RSCHKDUMMYMM0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
line.long 0x4 "RSCHKDUMMYMM1,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x7FC1C0++0x3
line.long 0x0 "TIDDUMMYMM0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
group.long 0x7FC200++0x7
line.long 0x0 "DCLSDUMMYMM0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
line.long 0x4 "DCLSDUMMYMM1,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x7FC280++0x3
line.long 0x0 "SECERRDUMMYMM0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x7FC2C0++0x3
line.long 0x0 "SAFERRDUMMYMM0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x7FC300++0x3
line.long 0x0 "ICISTPDUMMYMM0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x7FC380++0x3
line.long 0x0 "OTHDUMMYMM0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Other Dummy error enable."
group.long 0x172F940++0x3
line.long 0x0 "FIXSTPER000,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x172F980++0x1F
line.long 0x0 "ROUERRSTPER000,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x4 "ROUERRSTPER001,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x8 "ROUERRSTPER002,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0xC "ROUERRSTPER003,"
hexmask.long 0xC 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x10 "ROUERRSTPER004,"
hexmask.long 0x10 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x14 "ROUERRSTPER005,"
hexmask.long 0x14 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x18 "ROUERRSTPER006,"
hexmask.long 0x18 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x1C "ROUERRSTPER007,"
hexmask.long 0x1C 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x172F9C0++0x1F
line.long 0x0 "EDCSTPER000,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x4 "EDCSTPER001,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x8 "EDCSTPER002,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0xC "EDCSTPER003,"
hexmask.long 0xC 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x10 "EDCSTPER004,"
hexmask.long 0x10 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x14 "EDCSTPER005,"
hexmask.long 0x14 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x18 "EDCSTPER006,"
hexmask.long 0x18 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x1C "EDCSTPER007,"
hexmask.long 0x1C 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x172FA00++0x7
line.long 0x0 "LSCHKSTPER000,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
line.long 0x4 "LSCHKSTPER001,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x172FA40++0x3
line.long 0x0 "WCRCERRSTPER000,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Write Read check Error Status."
group.long 0x172FA80++0x7
line.long 0x0 "RSCHKSTPER000,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
line.long 0x4 "RSCHKSTPER001,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x172FAC0++0x3
line.long 0x0 "TIDSTPER000,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
group.long 0x172FB00++0x3
line.long 0x0 "DCLSSTPER000,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x172FB80++0x3
line.long 0x0 "SECERRSTPER000,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x172FBC0++0x3
line.long 0x0 "SAFERRSTPER000,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x172FC00++0x3
line.long 0x0 "ICISTPSTPER000,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x172FC80++0x3
line.long 0x0 "OTHSTPER000,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Other Error Status."
group.long 0x172FCC0++0x3
line.long 0x0 "FIXINTENPER000,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x172FD00++0x1F
line.long 0x0 "ROUINTENPER000,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x4 "ROUINTENPER001,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x8 "ROUINTENPER002,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0xC "ROUINTENPER003,"
hexmask.long 0xC 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x10 "ROUINTENPER004,"
hexmask.long 0x10 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x14 "ROUINTENPER005,"
hexmask.long 0x14 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x18 "ROUINTENPER006,"
hexmask.long 0x18 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x1C "ROUINTENPER007,"
hexmask.long 0x1C 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x172FD40++0x1F
line.long 0x0 "EDCINTENPER000,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x4 "EDCINTENPER001,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x8 "EDCINTENPER002,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0xC "EDCINTENPER003,"
hexmask.long 0xC 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x10 "EDCINTENPER004,"
hexmask.long 0x10 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x14 "EDCINTENPER005,"
hexmask.long 0x14 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x18 "EDCINTENPER006,"
hexmask.long 0x18 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x1C "EDCINTENPER007,"
hexmask.long 0x1C 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x172FD80++0x7
line.long 0x0 "LSCHKINTENPER000,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
line.long 0x4 "LSCHKINTENPER001,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x172FDC0++0x3
line.long 0x0 "WCRCINTENPER000,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Write Read check Error Interrupt Enable."
group.long 0x172FE00++0x7
line.long 0x0 "RSCHKINTENPER000,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
line.long 0x4 "RSCHKINTENPER001,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x172FE40++0x3
line.long 0x0 "TIDINTENPER000,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
group.long 0x172FE80++0x3
line.long 0x0 "DCLSINTENPER000,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x172FF00++0x3
line.long 0x0 "SECERRINTENPER000,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x172FF40++0x3
line.long 0x0 "SAFERRINTENPER000,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x172FF80++0x3
line.long 0x0 "ICISTPINTENPER000,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x1730000++0x3
line.long 0x0 "OTHINTENPER000,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Other Error Interrupt Enable."
group.long 0x1730040++0x3
line.long 0x0 "FIXDUMMYPER000,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x1730080++0x1F
line.long 0x0 "ROUDUMMYPER000,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x4 "ROUDUMMYPER001,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x8 "ROUDUMMYPER002,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0xC "ROUDUMMYPER003,"
hexmask.long 0xC 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x10 "ROUDUMMYPER004,"
hexmask.long 0x10 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x14 "ROUDUMMYPER005,"
hexmask.long 0x14 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x18 "ROUDUMMYPER006,"
hexmask.long 0x18 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x1C "ROUDUMMYPER007,"
hexmask.long 0x1C 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x17300C0++0x1F
line.long 0x0 "EDCDUMMYPER000,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x4 "EDCDUMMYPER001,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x8 "EDCDUMMYPER002,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0xC "EDCDUMMYPER003,"
hexmask.long 0xC 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x10 "EDCDUMMYPER004,"
hexmask.long 0x10 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x14 "EDCDUMMYPER005,"
hexmask.long 0x14 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x18 "EDCDUMMYPER006,"
hexmask.long 0x18 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x1C "EDCDUMMYPER007,"
hexmask.long 0x1C 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x1730100++0x7
line.long 0x0 "LSCHKDUMMYPER000,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
line.long 0x4 "LSCHKDUMMYPER001,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x1730140++0x3
line.long 0x0 "WCRCDUMMYPER000,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Write Read check Dummy error enable."
group.long 0x1730180++0x7
line.long 0x0 "RSCHKDUMMYPER000,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
line.long 0x4 "RSCHKDUMMYPER001,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x17301C0++0x3
line.long 0x0 "TIDDUMMYPER000,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
group.long 0x1730200++0x3
line.long 0x0 "DCLSDUMMYPER000,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x1730280++0x3
line.long 0x0 "SECERRDUMMYPER000,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x17302C0++0x3
line.long 0x0 "SAFERRDUMMYPER000,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x1730300++0x3
line.long 0x0 "ICISTPDUMMYPER000,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x1730380++0x3
line.long 0x0 "OTHDUMMYPER000,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Other Dummy error enable."
group.long 0x1733940++0x3
line.long 0x0 "FIXSTPER010,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x1733980++0x7
line.long 0x0 "ROUERRSTPER010,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x4 "ROUERRSTPER011,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x17339C0++0x7
line.long 0x0 "EDCSTPER010,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x4 "EDCSTPER011,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x1733A00++0x3
line.long 0x0 "LSCHKSTPER010,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x1733A40++0x3
line.long 0x0 "WCRCERRSTPER010,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Write Read check Error Status."
group.long 0x1733A80++0x3
line.long 0x0 "RSCHKSTPER010,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x1733AC0++0x3
line.long 0x0 "TIDSTPER010,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
group.long 0x1733B00++0x3
line.long 0x0 "DCLSSTPER010,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x1733B80++0x3
line.long 0x0 "SECERRSTPER010,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x1733BC0++0x3
line.long 0x0 "SAFERRSTPER010,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x1733C00++0x3
line.long 0x0 "ICISTPSTPER010,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x1733CC0++0x3
line.long 0x0 "FIXINTENPER010,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x1733D00++0x7
line.long 0x0 "ROUINTENPER010,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x4 "ROUINTENPER011,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x1733D40++0x7
line.long 0x0 "EDCINTENPER010,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x4 "EDCINTENPER011,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x1733D80++0x3
line.long 0x0 "LSCHKINTENPER010,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x1733DC0++0x3
line.long 0x0 "WCRCINTENPER010,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Write Read check Error Interrupt Enable."
group.long 0x1733E00++0x3
line.long 0x0 "RSCHKINTENPER010,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x1733E40++0x3
line.long 0x0 "TIDINTENPER010,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
group.long 0x1733E80++0x3
line.long 0x0 "DCLSINTENPER010,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x1733F00++0x3
line.long 0x0 "SECERRINTENPER010,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x1733F40++0x3
line.long 0x0 "SAFERRINTENPER010,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x1733F80++0x3
line.long 0x0 "ICISTPINTENPER010,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x1734040++0x3
line.long 0x0 "FIXDUMMYPER010,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x1734080++0x7
line.long 0x0 "ROUDUMMYPER010,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x4 "ROUDUMMYPER011,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x17340C0++0x7
line.long 0x0 "EDCDUMMYPER010,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x4 "EDCDUMMYPER011,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x1734100++0x3
line.long 0x0 "LSCHKDUMMYPER010,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x1734140++0x3
line.long 0x0 "WCRCDUMMYPER010,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Write Read check Dummy error enable."
group.long 0x1734180++0x3
line.long 0x0 "RSCHKDUMMYPER010,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x17341C0++0x3
line.long 0x0 "TIDDUMMYPER010,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
group.long 0x1734200++0x3
line.long 0x0 "DCLSDUMMYPER010,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x1734280++0x3
line.long 0x0 "SECERRDUMMYPER010,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x17342C0++0x3
line.long 0x0 "SAFERRDUMMYPER010,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x1734300++0x3
line.long 0x0 "ICISTPDUMMYPER010,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x1737940++0x3
line.long 0x0 "FIXSTPER020,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x1737980++0x3
line.long 0x0 "ROUERRSTPER020,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x17379C0++0x3
line.long 0x0 "EDCSTPER020,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x1737A00++0x3
line.long 0x0 "LSCHKSTPER020,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x1737A80++0x3
line.long 0x0 "RSCHKSTPER020,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x1737B00++0x3
line.long 0x0 "DCLSSTPER020,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x1737B80++0x3
line.long 0x0 "SECERRSTPER020,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x1737BC0++0x3
line.long 0x0 "SAFERRSTPER020,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x1737C00++0x3
line.long 0x0 "ICISTPSTPER020,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x1737CC0++0x3
line.long 0x0 "FIXINTENPER020,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x1737D00++0x3
line.long 0x0 "ROUINTENPER020,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x1737D40++0x3
line.long 0x0 "EDCINTENPER020,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x1737D80++0x3
line.long 0x0 "LSCHKINTENPER020,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x1737E00++0x3
line.long 0x0 "RSCHKINTENPER020,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x1737E80++0x3
line.long 0x0 "DCLSINTENPER020,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x1737F00++0x3
line.long 0x0 "SECERRINTENPER020,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x1737F40++0x3
line.long 0x0 "SAFERRINTENPER020,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x1737F80++0x3
line.long 0x0 "ICISTPINTENPER020,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x1738040++0x3
line.long 0x0 "FIXDUMMYPER020,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x1738080++0x3
line.long 0x0 "ROUDUMMYPER020,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x17380C0++0x3
line.long 0x0 "EDCDUMMYPER020,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x1738100++0x3
line.long 0x0 "LSCHKDUMMYPER020,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x1738180++0x3
line.long 0x0 "RSCHKDUMMYPER020,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x1738200++0x3
line.long 0x0 "DCLSDUMMYPER020,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x1738280++0x3
line.long 0x0 "SECERRDUMMYPER020,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x17382C0++0x3
line.long 0x0 "SAFERRDUMMYPER020,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x1738300++0x3
line.long 0x0 "ICISTPDUMMYPER020,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x173B940++0x3
line.long 0x0 "FIXSTPER030,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x173B980++0xB
line.long 0x0 "ROUERRSTPER030,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x4 "ROUERRSTPER031,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x8 "ROUERRSTPER032,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x173B9C0++0xB
line.long 0x0 "EDCSTPER030,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x4 "EDCSTPER031,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x8 "EDCSTPER032,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x173BA00++0x3
line.long 0x0 "LSCHKSTPER030,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x173BA80++0x3
line.long 0x0 "RSCHKSTPER030,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x173BB00++0x3
line.long 0x0 "DCLSSTPER030,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x173BB80++0x3
line.long 0x0 "SECERRSTPER030,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x173BBC0++0x3
line.long 0x0 "SAFERRSTPER030,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x173BC00++0x3
line.long 0x0 "ICISTPSTPER030,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x173BCC0++0x3
line.long 0x0 "FIXINTENPER030,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x173BD00++0xB
line.long 0x0 "ROUINTENPER030,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x4 "ROUINTENPER031,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x8 "ROUINTENPER032,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x173BD40++0xB
line.long 0x0 "EDCINTENPER030,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x4 "EDCINTENPER031,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x8 "EDCINTENPER032,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x173BD80++0x3
line.long 0x0 "LSCHKINTENPER030,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x173BE00++0x3
line.long 0x0 "RSCHKINTENPER030,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x173BE80++0x3
line.long 0x0 "DCLSINTENPER030,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x173BF00++0x3
line.long 0x0 "SECERRINTENPER030,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x173BF40++0x3
line.long 0x0 "SAFERRINTENPER030,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x173BF80++0x3
line.long 0x0 "ICISTPINTENPER030,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x173C040++0x3
line.long 0x0 "FIXDUMMYPER030,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x173C080++0xB
line.long 0x0 "ROUDUMMYPER030,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x4 "ROUDUMMYPER031,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x8 "ROUDUMMYPER032,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x173C0C0++0xB
line.long 0x0 "EDCDUMMYPER030,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x4 "EDCDUMMYPER031,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x8 "EDCDUMMYPER032,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x173C100++0x3
line.long 0x0 "LSCHKDUMMYPER030,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x173C180++0x3
line.long 0x0 "RSCHKDUMMYPER030,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x173C200++0x3
line.long 0x0 "DCLSDUMMYPER030,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x173C280++0x3
line.long 0x0 "SECERRDUMMYPER030,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x173C2C0++0x3
line.long 0x0 "SAFERRDUMMYPER030,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x173C300++0x3
line.long 0x0 "ICISTPDUMMYPER030,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x1750008++0x1B
line.long 0x0 "FDT_BUS_SYDM1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_BUS_SYDM2,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x8 "FDT_FRAY,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0xC "FDT_IPC,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x10 "FDT_MEM_SYDM1,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x14 "FDT_MEM_SYDM2,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x18 "FDT_SDHI0,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x1750910++0x7
line.long 0x0 "RGIDM_FRAY,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_IPC,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x1750920++0x3
line.long 0x0 "RGIDM_SDHI0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x1751100++0x7F
line.long 0x0 "RGIDMEN_SYDM1_CH0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x4 "RGIDMEN_SYDM1_CH1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x8 "RGIDMEN_SYDM1_CH2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xC "RGIDMEN_SYDM1_CH3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x10 "RGIDMEN_SYDM1_CH4,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x14 "RGIDMEN_SYDM1_CH5,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x18 "RGIDMEN_SYDM1_CH6,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x1C "RGIDMEN_SYDM1_CH7,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x20 "RGIDMEN_SYDM1_CH8,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x24 "RGIDMEN_SYDM1_CH9,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x28 "RGIDMEN_SYDM1_CH10,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x2C "RGIDMEN_SYDM1_CH11,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x30 "RGIDMEN_SYDM1_CH12,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x34 "RGIDMEN_SYDM1_CH13,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x38 "RGIDMEN_SYDM1_CH14,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x3C "RGIDMEN_SYDM1_CH15,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x40 "RGIDMEN_SYDM2_CH0,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x44 "RGIDMEN_SYDM2_CH1,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x48 "RGIDMEN_SYDM2_CH2,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x4C "RGIDMEN_SYDM2_CH3,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x50 "RGIDMEN_SYDM2_CH4,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x54 "RGIDMEN_SYDM2_CH5,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x58 "RGIDMEN_SYDM2_CH6,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x5C "RGIDMEN_SYDM2_CH7,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x60 "RGIDMEN_SYDM2_CH8,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x64 "RGIDMEN_SYDM2_CH9,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x68 "RGIDMEN_SYDM2_CH10,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x6C "RGIDMEN_SYDM2_CH11,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x70 "RGIDMEN_SYDM2_CH12,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x74 "RGIDMEN_SYDM2_CH13,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x78 "RGIDMEN_SYDM2_CH14,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x7C "RGIDMEN_SYDM2_CH15,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
group.long 0x1751900++0x103
line.long 0x0 "RGIDR_ARSD00,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_ARSD01,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_ARSD02,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_ARSD03,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_ARSD04,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_ARSD05,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_ARSD06,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_AXIFRAY,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_AXIIPC,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_RSV0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_AXIRPC,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_AXISDHI0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_ARSD07,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_ARSD08,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_ARSP00,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_ARSP01,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDR_ARSP02,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDR_ARSP03,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDR_ARSP04,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDR_ARSP05,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDR_ARSP06,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDR_ARSP07,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDR_ARSP08,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDR_IPMMUDS001,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDR_CKMPER0,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDR_ECMPER0,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDR_FBAPER0,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDR_FSO0,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDR_FSO1,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDR_FSO10,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDR_FSO2,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDR_FSO3,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDR_FSO4,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x84 "RGIDR_FSO5,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x84 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x88 "RGIDR_FSO6,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x88 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8C "RGIDR_FSO7,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x90 "RGIDR_FSO8,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x90 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x94 "RGIDR_FSO9,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x94 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x98 "RGIDR_ADG,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x98 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x9C "RGIDR_ECMSD0,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x9C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA0 "RGIDR_IPMMUDS010,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA4 "RGIDR_IPMMUDS011,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA8 "RGIDR_I2C0,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xAC "RGIDR_I2C1,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xAC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB0 "RGIDR_I2C2,"
hexmask.long.word 0xB0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB4 "RGIDR_I2C3,"
hexmask.long.word 0xB4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB8 "RGIDR_I2C4,"
hexmask.long.word 0xB8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xBC "RGIDR_I2C5,"
hexmask.long.word 0xBC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xBC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC0 "RGIDR_IPMMUDS012,"
hexmask.long.word 0xC0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC4 "RGIDR_IPC,"
hexmask.long.word 0xC4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC8 "RGIDR_IPMMUDS000,"
hexmask.long.word 0xC8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xCC "RGIDR_IPMMUDS013,"
hexmask.long.word 0xCC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xCC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD0 "RGIDR_IPMMUDS014,"
hexmask.long.word 0xD0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD4 "RGIDR_IPMMUDS015,"
hexmask.long.word 0xD4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD8 "RGIDR_IPMMUDS002,"
hexmask.long.word 0xD8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xDC "RGIDR_IPMMUDS003,"
hexmask.long.word 0xDC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xDC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE0 "RGIDR_IPMMUDS004,"
hexmask.long.word 0xE0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE4 "RGIDR_IPMMUDS005,"
hexmask.long.word 0xE4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE8 "RGIDR_SSI,"
hexmask.long.word 0xE8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xEC "RGIDR_IPMMUDS006,"
hexmask.long.word 0xEC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xEC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF0 "RGIDR_IPMMUDS007,"
hexmask.long.word 0xF0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF4 "RGIDR_SYDM1P,"
hexmask.long.word 0xF4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF8 "RGIDR_IPMMUDS008,"
hexmask.long.word 0xF8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xFC "RGIDR_SYDM2P,"
hexmask.long.word 0xFC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xFC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x100 "RGIDR_IPMMUDS009,"
hexmask.long.word 0x100 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x100 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1751B40++0x7F
line.long 0x0 "RGIDR_SYDM100,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_SYDM101,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_SYDM110,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_SYDM111,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_SYDM112,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_SYDM113,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_SYDM114,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_SYDM115,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_SYDM102,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_SYDM103,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_SYDM104,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_SYDM105,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_SYDM106,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_SYDM107,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_SYDM108,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_SYDM109,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDR_SYDM200,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDR_SYDM201,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDR_SYDM210,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDR_SYDM211,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDR_SYDM212,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDR_SYDM213,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDR_SYDM214,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDR_SYDM215,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDR_SYDM202,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDR_SYDM203,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDR_SYDM204,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDR_SYDM205,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDR_SYDM206,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDR_SYDM207,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDR_SYDM208,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDR_SYDM209,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1751D00++0x103
line.long 0x0 "RGIDW_ARSD00,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_ARSD01,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ARSD02,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARSD03,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_ARSD04,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_ARSD05,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_ARSD06,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_AXIFRAY,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_AXIIPC,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_RSV0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_AXIRPC,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_AXISDHI0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_ARSD07,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_ARSD08,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_ARSP00,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_ARSP01,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDW_ARSP02,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDW_ARSP03,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDW_ARSP04,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDW_ARSP05,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDW_ARSP06,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDW_ARSP07,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDW_ARSP08,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDW_IPMMUDS001,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDW_CKMPER0,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDW_ECMPER0,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDW_FBAPER0,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDW_FSO0,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDW_FSO1,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDW_FSO10,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDW_FSO2,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDW_FSO3,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDW_FSO4,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x84 "RGIDW_FSO5,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x84 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x88 "RGIDW_FSO6,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x88 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8C "RGIDW_FSO7,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x90 "RGIDW_FSO8,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x90 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x94 "RGIDW_FSO9,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x94 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x98 "RGIDW_ADG,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x98 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x9C "RGIDW_ECMSD0,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x9C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA0 "RGIDW_IPMMUDS010,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA4 "RGIDW_IPMMUDS011,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA8 "RGIDW_I2C0,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xAC "RGIDW_I2C1,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xAC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB0 "RGIDW_I2C2,"
hexmask.long.word 0xB0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB4 "RGIDW_I2C3,"
hexmask.long.word 0xB4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB8 "RGIDW_I2C4,"
hexmask.long.word 0xB8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xBC "RGIDW_I2C5,"
hexmask.long.word 0xBC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xBC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC0 "RGIDW_IPMMUDS012,"
hexmask.long.word 0xC0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC4 "RGIDW_IPC,"
hexmask.long.word 0xC4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC8 "RGIDW_IPMMUDS000,"
hexmask.long.word 0xC8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xCC "RGIDW_IPMMUDS013,"
hexmask.long.word 0xCC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xCC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD0 "RGIDW_IPMMUDS014,"
hexmask.long.word 0xD0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD4 "RGIDW_IPMMUDS015,"
hexmask.long.word 0xD4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD8 "RGIDW_IPMMUDS002,"
hexmask.long.word 0xD8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xDC "RGIDW_IPMMUDS003,"
hexmask.long.word 0xDC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xDC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE0 "RGIDW_IPMMUDS004,"
hexmask.long.word 0xE0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE4 "RGIDW_IPMMUDS005,"
hexmask.long.word 0xE4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE8 "RGIDW_SSI,"
hexmask.long.word 0xE8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xEC "RGIDW_IPMMUDS006,"
hexmask.long.word 0xEC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xEC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF0 "RGIDW_IPMMUDS007,"
hexmask.long.word 0xF0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF4 "RGIDW_SYDM1P,"
hexmask.long.word 0xF4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF8 "RGIDW_IPMMUDS008,"
hexmask.long.word 0xF8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xFC "RGIDW_SYDM2P,"
hexmask.long.word 0xFC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xFC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x100 "RGIDW_IPMMUDS009,"
hexmask.long.word 0x100 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x100 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1751F40++0x7F
line.long 0x0 "RGIDW_SYDM100,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_SYDM101,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_SYDM110,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_SYDM111,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_SYDM112,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_SYDM113,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_SYDM114,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_SYDM115,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_SYDM102,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_SYDM103,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_SYDM104,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_SYDM105,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_SYDM106,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_SYDM107,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_SYDM108,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_SYDM109,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDW_SYDM200,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDW_SYDM201,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDW_SYDM210,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDW_SYDM211,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDW_SYDM212,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDW_SYDM213,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDW_SYDM214,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDW_SYDM215,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDW_SYDM202,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDW_SYDM203,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDW_SYDM204,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDW_SYDM205,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDW_SYDM206,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDW_SYDM207,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDW_SYDM208,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDW_SYDM209,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1752D00++0x103
line.long 0x0 "SEC_ARSD00,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_ARSD01,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_ARSD02,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_ARSD03,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_ARSD04,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_ARSD05,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_ARSD06,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_AXIFRAY,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_AXIIPC,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_RSV0,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_AXIRPC,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_AXISDHI0,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_ARSD07,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_ARSD08,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_ARSP00,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_ARSP01,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
line.long 0x40 "SEC_ARSP02,"
hexmask.long 0x40 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x40 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x40 0. "Reserved_0,Reserved" "0,1"
line.long 0x44 "SEC_ARSP03,"
hexmask.long 0x44 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x44 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x44 0. "Reserved_0,Reserved" "0,1"
line.long 0x48 "SEC_ARSP04,"
hexmask.long 0x48 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x48 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x48 0. "Reserved_0,Reserved" "0,1"
line.long 0x4C "SEC_ARSP05,"
hexmask.long 0x4C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4C 0. "Reserved_0,Reserved" "0,1"
line.long 0x50 "SEC_ARSP06,"
hexmask.long 0x50 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x50 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x50 0. "Reserved_0,Reserved" "0,1"
line.long 0x54 "SEC_ARSP07,"
hexmask.long 0x54 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x54 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x54 0. "Reserved_0,Reserved" "0,1"
line.long 0x58 "SEC_ARSP08,"
hexmask.long 0x58 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x58 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x58 0. "Reserved_0,Reserved" "0,1"
line.long 0x5C "SEC_IPMMUDS001,"
hexmask.long 0x5C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x5C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x5C 0. "Reserved_0,Reserved" "0,1"
line.long 0x60 "SEC_CKMPER0,"
hexmask.long 0x60 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x60 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x60 0. "Reserved_0,Reserved" "0,1"
line.long 0x64 "SEC_ECMPER0,"
hexmask.long 0x64 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x64 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x64 0. "Reserved_0,Reserved" "0,1"
line.long 0x68 "SEC_FBAPER0,"
hexmask.long 0x68 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x68 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x68 0. "Reserved_0,Reserved" "0,1"
line.long 0x6C "SEC_FSO0,"
hexmask.long 0x6C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x6C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x6C 0. "Reserved_0,Reserved" "0,1"
line.long 0x70 "SEC_FSO1,"
hexmask.long 0x70 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x70 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x70 0. "Reserved_0,Reserved" "0,1"
line.long 0x74 "SEC_FSO10,"
hexmask.long 0x74 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x74 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x74 0. "Reserved_0,Reserved" "0,1"
line.long 0x78 "SEC_FSO2,"
hexmask.long 0x78 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x78 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x78 0. "Reserved_0,Reserved" "0,1"
line.long 0x7C "SEC_FSO3,"
hexmask.long 0x7C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x7C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x7C 0. "Reserved_0,Reserved" "0,1"
line.long 0x80 "SEC_FSO4,"
hexmask.long 0x80 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x80 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x80 0. "Reserved_0,Reserved" "0,1"
line.long 0x84 "SEC_FSO5,"
hexmask.long 0x84 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x84 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x84 0. "Reserved_0,Reserved" "0,1"
line.long 0x88 "SEC_FSO6,"
hexmask.long 0x88 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x88 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x88 0. "Reserved_0,Reserved" "0,1"
line.long 0x8C "SEC_FSO7,"
hexmask.long 0x8C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8C 0. "Reserved_0,Reserved" "0,1"
line.long 0x90 "SEC_FSO8,"
hexmask.long 0x90 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x90 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x90 0. "Reserved_0,Reserved" "0,1"
line.long 0x94 "SEC_FSO9,"
hexmask.long 0x94 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x94 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x94 0. "Reserved_0,Reserved" "0,1"
line.long 0x98 "SEC_ADG,"
hexmask.long 0x98 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x98 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x98 0. "Reserved_0,Reserved" "0,1"
line.long 0x9C "SEC_ECMSD0,"
hexmask.long 0x9C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x9C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x9C 0. "Reserved_0,Reserved" "0,1"
line.long 0xA0 "SEC_IPMMUDS010,"
hexmask.long 0xA0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xA0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xA0 0. "Reserved_0,Reserved" "0,1"
line.long 0xA4 "SEC_IPMMUDS011,"
hexmask.long 0xA4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xA4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xA4 0. "Reserved_0,Reserved" "0,1"
line.long 0xA8 "SEC_I2C0,"
hexmask.long 0xA8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xA8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xA8 0. "Reserved_0,Reserved" "0,1"
line.long 0xAC "SEC_I2C1,"
hexmask.long 0xAC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xAC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xAC 0. "Reserved_0,Reserved" "0,1"
line.long 0xB0 "SEC_I2C2,"
hexmask.long 0xB0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xB0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xB0 0. "Reserved_0,Reserved" "0,1"
line.long 0xB4 "SEC_I2C3,"
hexmask.long 0xB4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xB4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xB4 0. "Reserved_0,Reserved" "0,1"
line.long 0xB8 "SEC_I2C4,"
hexmask.long 0xB8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xB8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xB8 0. "Reserved_0,Reserved" "0,1"
line.long 0xBC "SEC_I2C5,"
hexmask.long 0xBC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xBC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xBC 0. "Reserved_0,Reserved" "0,1"
line.long 0xC0 "SEC_IPMMUDS012,"
hexmask.long 0xC0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC0 0. "Reserved_0,Reserved" "0,1"
line.long 0xC4 "SEC_IPC,"
hexmask.long 0xC4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC4 0. "Reserved_0,Reserved" "0,1"
line.long 0xC8 "SEC_IPMMUDS000,"
hexmask.long 0xC8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC8 0. "Reserved_0,Reserved" "0,1"
line.long 0xCC "SEC_IPMMUDS013,"
hexmask.long 0xCC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xCC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xCC 0. "Reserved_0,Reserved" "0,1"
line.long 0xD0 "SEC_IPMMUDS014,"
hexmask.long 0xD0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xD0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xD0 0. "Reserved_0,Reserved" "0,1"
line.long 0xD4 "SEC_IPMMUDS015,"
hexmask.long 0xD4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xD4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xD4 0. "Reserved_0,Reserved" "0,1"
line.long 0xD8 "SEC_IPMMUDS002,"
hexmask.long 0xD8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xD8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xD8 0. "Reserved_0,Reserved" "0,1"
line.long 0xDC "SEC_IPMMUDS003,"
hexmask.long 0xDC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xDC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xDC 0. "Reserved_0,Reserved" "0,1"
line.long 0xE0 "SEC_IPMMUDS004,"
hexmask.long 0xE0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xE0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xE0 0. "Reserved_0,Reserved" "0,1"
line.long 0xE4 "SEC_IPMMUDS005,"
hexmask.long 0xE4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xE4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xE4 0. "Reserved_0,Reserved" "0,1"
line.long 0xE8 "SEC_SSI,"
hexmask.long 0xE8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xE8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xE8 0. "Reserved_0,Reserved" "0,1"
line.long 0xEC "SEC_IPMMUDS006,"
hexmask.long 0xEC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xEC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xEC 0. "Reserved_0,Reserved" "0,1"
line.long 0xF0 "SEC_IPMMUDS007,"
hexmask.long 0xF0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xF0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xF0 0. "Reserved_0,Reserved" "0,1"
line.long 0xF4 "SEC_SYDM1P,"
hexmask.long 0xF4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xF4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xF4 0. "Reserved_0,Reserved" "0,1"
line.long 0xF8 "SEC_IPMMUDS008,"
hexmask.long 0xF8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xF8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xF8 0. "Reserved_0,Reserved" "0,1"
line.long 0xFC "SEC_SYDM2P,"
hexmask.long 0xFC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xFC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xFC 0. "Reserved_0,Reserved" "0,1"
line.long 0x100 "SEC_IPMMUDS009,"
hexmask.long 0x100 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x100 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x100 0. "Reserved_0,Reserved" "0,1"
group.long 0x1752F40++0x7F
line.long 0x0 "SEC_SYDM100,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_SYDM101,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_SYDM110,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_SYDM111,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_SYDM112,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_SYDM113,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_SYDM114,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_SYDM115,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_SYDM102,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_SYDM103,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_SYDM104,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_SYDM105,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_SYDM106,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_SYDM107,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_SYDM108,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_SYDM109,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
line.long 0x40 "SEC_SYDM200,"
hexmask.long 0x40 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x40 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x40 0. "Reserved_0,Reserved" "0,1"
line.long 0x44 "SEC_SYDM201,"
hexmask.long 0x44 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x44 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x44 0. "Reserved_0,Reserved" "0,1"
line.long 0x48 "SEC_SYDM210,"
hexmask.long 0x48 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x48 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x48 0. "Reserved_0,Reserved" "0,1"
line.long 0x4C "SEC_SYDM211,"
hexmask.long 0x4C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4C 0. "Reserved_0,Reserved" "0,1"
line.long 0x50 "SEC_SYDM212,"
hexmask.long 0x50 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x50 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x50 0. "Reserved_0,Reserved" "0,1"
line.long 0x54 "SEC_SYDM213,"
hexmask.long 0x54 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x54 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x54 0. "Reserved_0,Reserved" "0,1"
line.long 0x58 "SEC_SYDM214,"
hexmask.long 0x58 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x58 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x58 0. "Reserved_0,Reserved" "0,1"
line.long 0x5C "SEC_SYDM215,"
hexmask.long 0x5C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x5C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x5C 0. "Reserved_0,Reserved" "0,1"
line.long 0x60 "SEC_SYDM202,"
hexmask.long 0x60 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x60 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x60 0. "Reserved_0,Reserved" "0,1"
line.long 0x64 "SEC_SYDM203,"
hexmask.long 0x64 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x64 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x64 0. "Reserved_0,Reserved" "0,1"
line.long 0x68 "SEC_SYDM204,"
hexmask.long 0x68 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x68 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x68 0. "Reserved_0,Reserved" "0,1"
line.long 0x6C "SEC_SYDM205,"
hexmask.long 0x6C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x6C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x6C 0. "Reserved_0,Reserved" "0,1"
line.long 0x70 "SEC_SYDM206,"
hexmask.long 0x70 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x70 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x70 0. "Reserved_0,Reserved" "0,1"
line.long 0x74 "SEC_SYDM207,"
hexmask.long 0x74 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x74 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x74 0. "Reserved_0,Reserved" "0,1"
line.long 0x78 "SEC_SYDM208,"
hexmask.long 0x78 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x78 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x78 0. "Reserved_0,Reserved" "0,1"
line.long 0x7C "SEC_SYDM209,"
hexmask.long 0x7C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x7C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x7C 0. "Reserved_0,Reserved" "0,1"
group.long 0x1753910++0xB
line.long 0x0 "SAFERR0_AXSP0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
line.long 0x4 "SAFERR1_AXSP0,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
line.long 0x8 "SAFERR2_AXSP0,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x1753920++0x3
line.long 0x0 "SAFID_AXSP0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x1754910++0xB
line.long 0x0 "SECERR0_AXSP0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
line.long 0x4 "SECERR1_AXSP0,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
line.long 0x8 "SECERR2_AXSP0,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x1754920++0x3
line.long 0x0 "SECID_AXSP0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x1760000++0x7
line.long 0x0 "FDT_AXSP02APSP3,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_AXSD02APSP3,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x1761900++0x1B
line.long 0x0 "RGIDR_DMAMSI0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_DMAMSI1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_DMAMSI2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_DMAMSI3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_DMAMSI4,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_DMAMSI5,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_ECMSP3,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1761924++0x3B
line.long 0x0 "RGIDR_ARSP30,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_ARSP31,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_ARSP32,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_ARSP33,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_ARSP34,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_ARSP35,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_ARSP36,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_ARSP37,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_ARSP38,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_MSI0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_MSI1,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_MSI2,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_MSI3,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_MSI4,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_MSI5,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1761D00++0x1B
line.long 0x0 "RGIDW_DMAMSI0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_DMAMSI1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_DMAMSI2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_DMAMSI3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_DMAMSI4,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_DMAMSI5,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_ECMSP3,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1761D24++0x3B
line.long 0x0 "RGIDW_ARSP30,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_ARSP31,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ARSP32,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARSP33,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_ARSP34,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_ARSP35,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_ARSP36,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_ARSP37,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_ARSP38,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_MSI0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_MSI1,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_MSI2,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_MSI3,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_MSI4,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_MSI5,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1762D00++0x1B
line.long 0x0 "SEC_DMAMSI0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_DMAMSI1,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_DMAMSI2,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_DMAMSI3,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_DMAMSI4,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_DMAMSI5,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_ECMSP3,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
group.long 0x1762D24++0x3B
line.long 0x0 "SEC_ARSP30,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_ARSP31,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_ARSP32,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_ARSP33,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_ARSP34,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_ARSP35,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_ARSP36,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_ARSP37,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_ARSP38,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_MSI0,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_MSI1,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_MSI2,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_MSI3,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_MSI4,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_MSI5,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
group.long 0x1763910++0x3
line.long 0x0 "SAFERR_APSP3,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x1763920++0x3
line.long 0x0 "SAFID_APSP3,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x1764910++0x3
line.long 0x0 "SECERR_APSP3,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x1764920++0x3
line.long 0x0 "SECID_APSP3,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x1780004++0x7
line.long 0x0 "FDT_PERI_SYDM1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_PERI_SYDM2,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x1781900++0x37
line.long 0x0 "RGIDR_DMASSI00,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_DMASSI01,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_DMASSI02,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_DMASSI03,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_DMASSI04,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_DMAI2C0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_DMAI2C1,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_DMAI2C2,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_DMAI2C3,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_DMAI2C4,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_DMAI2C5,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_DMASSI05,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_DMASSI06,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_DMASSI07,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1781D00++0x37
line.long 0x0 "RGIDW_DMASSI00,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_DMASSI01,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_DMASSI02,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_DMASSI03,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_DMASSI04,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_DMAI2C0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_DMAI2C1,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_DMAI2C2,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_DMAI2C3,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_DMAI2C4,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_DMAI2C5,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_DMASSI05,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_DMASSI06,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_DMASSI07,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1782D00++0x37
line.long 0x0 "SEC_DMASSI00,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_DMASSI01,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_DMASSI02,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_DMASSI03,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_DMASSI04,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_DMAI2C0,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_DMAI2C1,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_DMAI2C2,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_DMAI2C3,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_DMAI2C4,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_DMAI2C5,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_DMASSI05,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_DMASSI06,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_DMASSI07,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
group.long 0x1783910++0x3
line.long 0x0 "SAFERR_AXSD0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x1783920++0x3
line.long 0x0 "SAFID_AXSD0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x1784910++0x3
line.long 0x0 "SECERR_AXSD0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x1784920++0x3
line.long 0x0 "SECID_AXSD0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x1790000++0x7
line.long 0x0 "FDT_AXSD02APSP4,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_AXSP02APSP4,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x1791900++0xAF
line.long 0x0 "RGIDR_ARSP40,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_ARSP41,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_ARSP42,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_ARSP43,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_ARSP44,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_ARSP45,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_ARSP46,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_ARSP47,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_ARSP48,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_DMAHSCIF0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_DMAHSCIF1,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_DMAHSCIF2,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_DMAHSCIF3,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_DMASCIF0,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_DMASCIF1,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_DMASCIF3,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDR_DMASCIF4,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDR_ECMSP4,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDR_HSCIF0,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDR_HSCIF1,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDR_HSCIF2,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDR_HSCIF3,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDR_SCIF0,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDR_SCIF1,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDR_SCIF3,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDR_SCIF4,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDR_TMU1,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDR_TMU2,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDR_TMU3,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDR_TMU4,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDR_CANFD,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDR_DMACANFD,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDR_DMATPU0,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x84 "RGIDR_PWM0,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x84 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x88 "RGIDR_PWM1,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x88 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8C "RGIDR_PWM2,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x90 "RGIDR_PWM3,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x90 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x94 "RGIDR_PWM4,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x94 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x98 "RGIDR_PWM5,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x98 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x9C "RGIDR_PWM6,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x9C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA0 "RGIDR_PWM7,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA4 "RGIDR_PWM8,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA8 "RGIDR_PWM9,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xAC "RGIDR_TPU0,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xAC 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1791D00++0xAF
line.long 0x0 "RGIDW_ARSP40,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_ARSP41,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ARSP42,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARSP43,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_ARSP44,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_ARSP45,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_ARSP46,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_ARSP47,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_ARSP48,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_DMAHSCIF0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_DMAHSCIF1,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_DMAHSCIF2,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_DMAHSCIF3,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_DMASCIF0,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_DMASCIF1,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_DMASCIF3,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDW_DMASCIF4,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDW_ECMSP4,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDW_HSCIF0,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDW_HSCIF1,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDW_HSCIF2,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDW_HSCIF3,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDW_SCIF0,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDW_SCIF1,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDW_SCIF3,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDW_SCIF4,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDW_TMU1,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDW_TMU2,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDW_TMU3,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDW_TMU4,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDW_CANFD,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDW_DMACANFD,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDW_DMATPU0,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x84 "RGIDW_PWM0,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x84 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x88 "RGIDW_PWM1,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x88 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8C "RGIDW_PWM2,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x90 "RGIDW_PWM3,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x90 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x94 "RGIDW_PWM4,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x94 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x98 "RGIDW_PWM5,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x98 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x9C "RGIDW_PWM6,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x9C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA0 "RGIDW_PWM7,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA4 "RGIDW_PWM8,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA8 "RGIDW_PWM9,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xAC "RGIDW_TPU0,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xAC 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1792D00++0xAF
line.long 0x0 "SEC_ARSP40,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_ARSP41,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_ARSP42,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_ARSP43,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_ARSP44,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_ARSP45,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_ARSP46,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_ARSP47,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_ARSP48,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_DMAHSCIF0,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_DMAHSCIF1,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_DMAHSCIF2,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_DMAHSCIF3,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_DMASCIF0,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_DMASCIF1,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_DMASCIF3,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
line.long 0x40 "SEC_DMASCIF4,"
hexmask.long 0x40 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x40 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x40 0. "Reserved_0,Reserved" "0,1"
line.long 0x44 "SEC_ECMSP4,"
hexmask.long 0x44 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x44 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x44 0. "Reserved_0,Reserved" "0,1"
line.long 0x48 "SEC_HSCIF0,"
hexmask.long 0x48 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x48 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x48 0. "Reserved_0,Reserved" "0,1"
line.long 0x4C "SEC_HSCIF1,"
hexmask.long 0x4C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4C 0. "Reserved_0,Reserved" "0,1"
line.long 0x50 "SEC_HSCIF2,"
hexmask.long 0x50 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x50 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x50 0. "Reserved_0,Reserved" "0,1"
line.long 0x54 "SEC_HSCIF3,"
hexmask.long 0x54 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x54 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x54 0. "Reserved_0,Reserved" "0,1"
line.long 0x58 "SEC_SCIF0,"
hexmask.long 0x58 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x58 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x58 0. "Reserved_0,Reserved" "0,1"
line.long 0x5C "SEC_SCIF1,"
hexmask.long 0x5C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x5C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x5C 0. "Reserved_0,Reserved" "0,1"
line.long 0x60 "SEC_SCIF3,"
hexmask.long 0x60 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x60 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x60 0. "Reserved_0,Reserved" "0,1"
line.long 0x64 "SEC_SCIF4,"
hexmask.long 0x64 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x64 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x64 0. "Reserved_0,Reserved" "0,1"
line.long 0x68 "SEC_TMU1,"
hexmask.long 0x68 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x68 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x68 0. "Reserved_0,Reserved" "0,1"
line.long 0x6C "SEC_TMU2,"
hexmask.long 0x6C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x6C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x6C 0. "Reserved_0,Reserved" "0,1"
line.long 0x70 "SEC_TMU3,"
hexmask.long 0x70 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x70 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x70 0. "Reserved_0,Reserved" "0,1"
line.long 0x74 "SEC_TMU4,"
hexmask.long 0x74 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x74 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x74 0. "Reserved_0,Reserved" "0,1"
line.long 0x78 "SEC_CANFD,"
hexmask.long 0x78 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x78 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x78 0. "Reserved_0,Reserved" "0,1"
line.long 0x7C "SEC_DMACANFD,"
hexmask.long 0x7C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x7C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x7C 0. "Reserved_0,Reserved" "0,1"
line.long 0x80 "SEC_DMATPU0,"
hexmask.long 0x80 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x80 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x80 0. "Reserved_0,Reserved" "0,1"
line.long 0x84 "SEC_PWM0,"
hexmask.long 0x84 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x84 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x84 0. "Reserved_0,Reserved" "0,1"
line.long 0x88 "SEC_PWM1,"
hexmask.long 0x88 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x88 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x88 0. "Reserved_0,Reserved" "0,1"
line.long 0x8C "SEC_PWM2,"
hexmask.long 0x8C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8C 0. "Reserved_0,Reserved" "0,1"
line.long 0x90 "SEC_PWM3,"
hexmask.long 0x90 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x90 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x90 0. "Reserved_0,Reserved" "0,1"
line.long 0x94 "SEC_PWM4,"
hexmask.long 0x94 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x94 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x94 0. "Reserved_0,Reserved" "0,1"
line.long 0x98 "SEC_PWM5,"
hexmask.long 0x98 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x98 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x98 0. "Reserved_0,Reserved" "0,1"
line.long 0x9C "SEC_PWM6,"
hexmask.long 0x9C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x9C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x9C 0. "Reserved_0,Reserved" "0,1"
line.long 0xA0 "SEC_PWM7,"
hexmask.long 0xA0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xA0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xA0 0. "Reserved_0,Reserved" "0,1"
line.long 0xA4 "SEC_PWM8,"
hexmask.long 0xA4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xA4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xA4 0. "Reserved_0,Reserved" "0,1"
line.long 0xA8 "SEC_PWM9,"
hexmask.long 0xA8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xA8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xA8 0. "Reserved_0,Reserved" "0,1"
line.long 0xAC "SEC_TPU0,"
hexmask.long 0xAC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xAC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xAC 0. "Reserved_0,Reserved" "0,1"
group.long 0x1793910++0x7
line.long 0x0 "SAFERR0_APSP4,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
line.long 0x4 "SAFERR1_APSP4,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x1793920++0x3
line.long 0x0 "SAFID_APSP4,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x1794910++0x7
line.long 0x0 "SECERR0_APSP4,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
line.long 0x4 "SECERR1_APSP4,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x1794920++0x3
line.long 0x0 "SECID_APSP4,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x1AEF940++0x3
line.long 0x0 "FIXSTVIP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x1AEF980++0x17
line.long 0x0 "ROUERRSTVIP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x4 "ROUERRSTVIP01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x8 "ROUERRSTVIP02,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0xC "ROUERRSTVIP03,"
hexmask.long 0xC 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x10 "ROUERRSTVIP04,"
hexmask.long 0x10 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x14 "ROUERRSTVIP05,"
hexmask.long 0x14 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x1AEF9C0++0x17
line.long 0x0 "EDCSTVIP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x4 "EDCSTVIP01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x8 "EDCSTVIP02,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0xC "EDCSTVIP03,"
hexmask.long 0xC 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x10 "EDCSTVIP04,"
hexmask.long 0x10 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x14 "EDCSTVIP05,"
hexmask.long 0x14 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x1AEFA00++0x7
line.long 0x0 "LSCHKSTVIP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
line.long 0x4 "LSCHKSTVIP01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x1AEFA40++0x3
line.long 0x0 "WCRCERRSTVIP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Write Read check Error Status."
group.long 0x1AEFA80++0x7
line.long 0x0 "RSCHKSTVIP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
line.long 0x4 "RSCHKSTVIP01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x1AEFAC0++0x3
line.long 0x0 "TIDSTVIP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
group.long 0x1AEFB00++0x7
line.long 0x0 "DCLSSTVIP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
line.long 0x4 "DCLSSTVIP01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x1AEFB80++0x3
line.long 0x0 "SECERRSTVIP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x1AEFBC0++0x3
line.long 0x0 "SAFERRSTVIP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x1AEFC00++0x3
line.long 0x0 "ICISTPSTVIP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x1AEFC80++0x3
line.long 0x0 "OTHSTVIP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Other Error Status."
group.long 0x1AEFCC0++0x3
line.long 0x0 "FIXINTENVIP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x1AEFD00++0x17
line.long 0x0 "ROUINTENVIP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x4 "ROUINTENVIP01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x8 "ROUINTENVIP02,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0xC "ROUINTENVIP03,"
hexmask.long 0xC 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x10 "ROUINTENVIP04,"
hexmask.long 0x10 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x14 "ROUINTENVIP05,"
hexmask.long 0x14 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x1AEFD40++0x17
line.long 0x0 "EDCINTENVIP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x4 "EDCINTENVIP01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x8 "EDCINTENVIP02,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0xC "EDCINTENVIP03,"
hexmask.long 0xC 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x10 "EDCINTENVIP04,"
hexmask.long 0x10 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x14 "EDCINTENVIP05,"
hexmask.long 0x14 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x1AEFD80++0x7
line.long 0x0 "LSCHKINTENVIP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
line.long 0x4 "LSCHKINTENVIP01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x1AEFDC0++0x3
line.long 0x0 "WCRCERRINTENVIP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Write Read check Error Interrupt Enable."
group.long 0x1AEFE00++0x7
line.long 0x0 "RSCHKINTENVIP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
line.long 0x4 "RSCHKINTENVIP01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x1AEFE40++0x3
line.long 0x0 "TIDINTENVIP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
group.long 0x1AEFE80++0x7
line.long 0x0 "DCLSINTENVIP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
line.long 0x4 "DCLSINTENVIP01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x1AEFF00++0x3
line.long 0x0 "SECERRINTENVIP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x1AEFF40++0x3
line.long 0x0 "SAFERRINTENVIP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x1AEFF80++0x3
line.long 0x0 "ICISTPINTENVIP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x1AF0000++0x3
line.long 0x0 "OTHINTENVIP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Other Error Interrupt Enable."
group.long 0x1AF0040++0x3
line.long 0x0 "FIXDUMMYVIP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x1AF0080++0x17
line.long 0x0 "ROUERRDUMMYVIP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x4 "ROUERRDUMMYVIP01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x8 "ROUERRDUMMYVIP02,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0xC "ROUERRDUMMYVIP03,"
hexmask.long 0xC 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x10 "ROUERRDUMMYVIP04,"
hexmask.long 0x10 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x14 "ROUERRDUMMYVIP05,"
hexmask.long 0x14 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x1AF00C0++0x17
line.long 0x0 "EDCDUMMYVIP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x4 "EDCDUMMYVIP01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x8 "EDCDUMMYVIP02,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0xC "EDCDUMMYVIP03,"
hexmask.long 0xC 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x10 "EDCDUMMYVIP04,"
hexmask.long 0x10 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x14 "EDCDUMMYVIP05,"
hexmask.long 0x14 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x1AF0100++0x7
line.long 0x0 "LSCHKDUMMYVIP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
line.long 0x4 "LSCHKDUMMYVIP01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x1AF0140++0x3
line.long 0x0 "WCRCERRDUMMYVIP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Write Read check Dummy error enable."
group.long 0x1AF0180++0x7
line.long 0x0 "RSCHKDUMMYVIP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
line.long 0x4 "RSCHKDUMMYVIP01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x1AF01C0++0x3
line.long 0x0 "TIDDUMMYVIP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
group.long 0x1AF0200++0x7
line.long 0x0 "DCLSDUMMYVIP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
line.long 0x4 "DCLSDUMMYVIP01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x1AF0280++0x3
line.long 0x0 "SECERRDUMMYVIP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x1AF02C0++0x3
line.long 0x0 "SAFERRDUMMYVIP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x1AF0300++0x3
line.long 0x0 "ICISTPDUMMYVIP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x1AF0380++0x3
line.long 0x0 "OTHDUMMYVIP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Other Dummy error enable."
group.long 0x1AF7940++0x3
line.long 0x0 "FIXSTVIP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x1AF7980++0x7
line.long 0x0 "ROUERRSTVIP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x4 "ROUERRSTVIP11,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x1AF79C0++0xB
line.long 0x0 "EDCSTVIP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x4 "EDCSTVIP11,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x8 "EDCSTVIP12,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x1AF7A00++0x3
line.long 0x0 "LSCHKSTVIP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x1AF7A40++0x3
line.long 0x0 "WCRCERRSTVIP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Write Read check Error Status."
group.long 0x1AF7A80++0x3
line.long 0x0 "RSCHKSTVIP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x1AF7AC0++0x3
line.long 0x0 "TIDSTVIP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
group.long 0x1AF7B00++0x3
line.long 0x0 "DCLSSTVIP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x1AF7B80++0x3
line.long 0x0 "SECERRSTVIP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x1AF7BC0++0x3
line.long 0x0 "SAFERRSTVIP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x1AF7C00++0x3
line.long 0x0 "ICISTPSTVIP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x1AF7C80++0x3
line.long 0x0 "OTHSTVIP10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Other Error Status."
group.long 0x1AF7CC0++0x3
line.long 0x0 "FIXINTENVIP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x1AF7D00++0x7
line.long 0x0 "ROUINTENVIP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x4 "ROUINTENVIP11,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x1AF7D40++0xB
line.long 0x0 "EDCINTENVIP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x4 "EDCINTENVIP11,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x8 "EDCINTENVIP12,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x1AF7D80++0x3
line.long 0x0 "LSCHKINTENVIP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x1AF7DC0++0x3
line.long 0x0 "WCRCERRINTENVIP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Write Read check Error Interrupt Enable."
group.long 0x1AF7E00++0x3
line.long 0x0 "RSCHKINTENVIP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x1AF7E40++0x3
line.long 0x0 "TIDINTENVIP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
group.long 0x1AF7E80++0x3
line.long 0x0 "DCLSINTENVIP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x1AF7F00++0x3
line.long 0x0 "SECERRINTENVIP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x1AF7F40++0x3
line.long 0x0 "SAFERRINTENVIP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x1AF7F80++0x3
line.long 0x0 "ICISTPINTENVIP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x1AF8000++0x3
line.long 0x0 "OTHINTENVIP10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Other Error Interrupt Enable."
group.long 0x1AF8040++0x3
line.long 0x0 "FIXDUMMYVIP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x1AF8080++0x7
line.long 0x0 "ROUERRDUMMYVIP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x4 "ROUERRDUMMYVIP11,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x1AF80C0++0xB
line.long 0x0 "EDCDUMMYVIP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x4 "EDCDUMMYVIP11,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x8 "EDCDUMMYVIP12,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x1AF8100++0x3
line.long 0x0 "LSCHKDUMMYVIP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x1AF8140++0x3
line.long 0x0 "WCRCERRDUMMYVIP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Write Read check Dummy error enable."
group.long 0x1AF8180++0x3
line.long 0x0 "RSCHKDUMMYVIP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x1AF81C0++0x3
line.long 0x0 "TIDDUMMYVIP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
group.long 0x1AF8200++0x3
line.long 0x0 "DCLSDUMMYVIP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x1AF8280++0x3
line.long 0x0 "SECERRDUMMYVIP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x1AF82C0++0x3
line.long 0x0 "SAFERRDUMMYVIP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x1AF8300++0x3
line.long 0x0 "ICISTPDUMMYVIP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x1AF8380++0x3
line.long 0x0 "OTHDUMMYVIP10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Other Dummy error enable."
group.long 0x1B10004++0x3
line.long 0x0 "FDT_FBABUSVIP0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x1B10010++0x3
line.long 0x0 "FDT_SMPO0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x1B10018++0x7
line.long 0x0 "FDT_SMPS0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_UMFL0,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x1B10904++0x3
line.long 0x0 "RGIDM_FBABUSVIP0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x1B10910++0x3
line.long 0x0 "RGIDM_SMPO,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x1B10918++0x7
line.long 0x0 "RGIDM_SMPS,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_UMFL,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x1B11900++0x33
line.long 0x0 "RGIDR_ARVIP00,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_ARVIP01,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_ARVIP02,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_ARVIP03,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_AXIFBABUSVIP0,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_ARVIP04,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_ARVIP05,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_ARVIP06,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_ARVIP07,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_ARVIP08,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_CKMVIP,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_ECMVIP0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_IPMMUVIP000,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1B11938++0x4B
line.long 0x0 "RGIDR_SMPO0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_SMPS0,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_UMFL0,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_IPMMUVIP001,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_IPMMUVIP010,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_IPMMUVIP011,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_UMFL0M_W,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_IPMMUVIP012,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_IPMMUVIP013,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_IPMMUVIP014,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_IPMMUVIP015,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_IPMMUVIP002,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_IPMMUVIP003,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_IPMMUVIP004,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_IPMMUVIP005,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_IPMMUVIP006,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDR_IPMMUVIP007,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDR_IPMMUVIP008,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDR_IPMMUVIP009,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1B11D00++0x33
line.long 0x0 "RGIDW_ARVIP00,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_ARVIP01,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ARVIP02,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARVIP03,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_AXIFBABUSVIP0,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_ARVIP04,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_ARVIP05,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_ARVIP06,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_ARVIP07,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_ARVIP08,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_CKMVIP,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_ECMVIP0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_IPMMUVIP000,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1B11D38++0x4B
line.long 0x0 "RGIDW_SMPO0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_SMPS0,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_UMFL0,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_IPMMUVIP001,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_IPMMUVIP010,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_IPMMUVIP011,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_UMFL0M_W,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_IPMMUVIP012,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_IPMMUVIP013,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_IPMMUVIP014,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_IPMMUVIP015,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_IPMMUVIPO002,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_IPMMUVIPO003,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_IPMMUVIPO004,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_IPMMUVIPO005,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_IPMMUVIPO006,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDW_IPMMUVIPO007,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDW_IPMMUVIPO008,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDW_IPMMUVIPO009,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1B12D00++0x33
line.long 0x0 "SEC_ARVIP00,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_ARVIP01,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_ARVIP02,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_ARVIP03,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_AXIFBABUSVIP0,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_ARVIP04,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_ARVIP05,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_ARVIP06,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_ARVIP07,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_ARVIP08,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_CKMVIP,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_ECMVIP0,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_IPMMUVIP000,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
group.long 0x1B12D38++0x4B
line.long 0x0 "SEC_SMPO0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_SMPS0,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_UMFL0,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_IPMMUVIP001,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_IPMMUVIP010,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_IPMMUVIP011,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_UMFL0M_W,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_IPMMUVIP012,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_IPMMUVIP013,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_IPMMUVIP014,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_IPMMUVIP015,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_IPMMUVIPO002,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_IPMMUVIPO003,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_IPMMUVIPO004,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_IPMMUVIPO005,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_IPMMUVIPO006,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
line.long 0x40 "SEC_IPMMUVIPO007,"
hexmask.long 0x40 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x40 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x40 0. "Reserved_0,Reserved" "0,1"
line.long 0x44 "SEC_IPMMUVIPO008,"
hexmask.long 0x44 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x44 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x44 0. "Reserved_0,Reserved" "0,1"
line.long 0x48 "SEC_IPMMUVIPO009,"
hexmask.long 0x48 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x48 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x48 0. "Reserved_0,Reserved" "0,1"
group.long 0x1B13910++0x3
line.long 0x0 "SAFERR_AXVIP0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x1B13920++0x3
line.long 0x0 "SAFID_AXVIP0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x1B14910++0x3
line.long 0x0 "SECERR_AXVIP0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x1B14920++0x3
line.long 0x0 "SECID_AXVIP0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x1B40000++0x3
line.long 0x0 "FDT_AXVIP02AXVIP1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x1B40018++0x3
line.long 0x0 "FDT_PAP,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x1B40028++0x3
line.long 0x0 "FDT_FBABUSVIP1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x1B40918++0x3
line.long 0x0 "RGIDM_PAP,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x1B40928++0x3
line.long 0x0 "RGIDM_FBABUSVIP1,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x1B41900++0x27
line.long 0x0 "RGIDR_ARVIP10,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_ARVIP11,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_ARVIP12,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_ARVIP13,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_AXIFBABUSVIP1,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_ARVIIP14,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_ARVIIP15,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_ARVIIP16,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_ARVIIP17,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_ARVIIP18,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1B41938++0x43
line.long 0x0 "RGIDR_ECMVIP1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_IPMMUVIP101,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_IPMMUVIP100,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_IPMMUVIP110,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_IPMMUVIP111,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_IPMMUVIP112,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_IPMMUVIP113,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_IPMMUVIP114,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_IPMMUVIP115,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_IPMMUVIP102,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_IPMMUVIP103,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_IPMMUVIP104,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_IPMMUVIP105,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_IPMMUVIP106,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_IPMMUVIP107,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_IPMMUVIP108,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDR_IPMMUVIP109,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1B41A18++0x3
line.long 0x0 "RGIDR_PAP,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1B41D00++0x27
line.long 0x0 "RGIDW_ARVIP10,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_ARVIP11,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ARVIP12,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARVIP13,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_AXIFBABUSVIP1,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_ARVIIP14,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_ARVIIP15,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_ARVIIP16,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_ARVIIP17,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_ARVIIP18,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1B41D38++0x43
line.long 0x0 "RGIDW_ECMVIP1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_IPMMUVIP101,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_IPMMUVIP100,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_IPMMUVIP110,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_IPMMUVIP111,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_IPMMUVIP112,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_IPMMUVIP113,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_IPMMUVIP114,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_IPMMUVIP115,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_IPMMUVIP102,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_IPMMUVIP103,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_IPMMUVIP104,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_IPMMUVIP105,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_IPMMUVIP106,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_IPMMUVIP107,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_IPMMUVIP108,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDW_IPMMUVIP109,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1B41E18++0x3
line.long 0x0 "RGIDW_PAP,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x1B42D00++0x27
line.long 0x0 "SEC_ARVIP10,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_ARVIP11,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_ARVIP12,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_ARVIP13,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_AXIFBABUSVIP1,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_ARVIIP14,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_ARVIIP15,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_ARVIIP16,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_ARVIIP17,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_ARVIIP18,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
group.long 0x1B42D38++0x43
line.long 0x0 "SEC_ECMVIP1,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_IPMMUVIP101,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_IPMMUVIP100,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_IPMMUVIP110,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_IPMMUVIP111,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_IPMMUVIP112,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_IPMMUVIP113,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_IPMMUVIP114,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_IPMMUVIP115,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_IPMMUVIP102,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_IPMMUVIP103,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_IPMMUVIP104,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_IPMMUVIP105,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_IPMMUVIP106,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_IPMMUVIP107,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_IPMMUVIP108,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
line.long 0x40 "SEC_IPMMUVIP109,"
hexmask.long 0x40 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x40 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x40 0. "Reserved_0,Reserved" "0,1"
group.long 0x1B42E18++0x3
line.long 0x0 "SEC_PAP,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x1B43910++0x3
line.long 0x0 "SAFERR_AXVIP1,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x1B43920++0x3
line.long 0x0 "SAFID_AXVIP1,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x1B44910++0x3
line.long 0x0 "SECERR_AXVIP1,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x1B44920++0x3
line.long 0x0 "SECID_AXVIP1,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x57FFB00++0x23
line.long 0x0 "FDT_AXIMP02AXDSP,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_DSP00,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x8 "FDT_DSP01,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0xC "FDT_DSP10,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x10 "FDT_DSP11,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x14 "FDT_DSP20,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x18 "FDT_DSP21,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x1C "FDT_DSP30,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x20 "FDT_DSP31,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x5803910++0x3
line.long 0x0 "SAFERR_AXDSP,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x5803920++0x3
line.long 0x0 "SAFID_AXDSP,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x5804910++0x3
line.long 0x0 "SECERR_AXDSP,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x5804920++0x3
line.long 0x0 "SECID_AXDSP,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x587F940++0x3
line.long 0x0 "FIXSTDSP0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x587F980++0x3
line.long 0x0 "ROUERRSTDSP0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x587F9C0++0x3
line.long 0x0 "EDCSTDSP0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x587FA00++0x3
line.long 0x0 "LSCHKSTDSP0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x587FA40++0x3
line.long 0x0 "WCRCERRSTDSP0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Write Read check Error Status."
group.long 0x587FA80++0x3
line.long 0x0 "RSCHKSTDSP0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x587FAC0++0x3
line.long 0x0 "TIDSTDSP0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
group.long 0x587FB00++0x3
line.long 0x0 "DCLSSTDSP0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x587FB80++0x3
line.long 0x0 "SECERRSTDSP0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x587FBC0++0x3
line.long 0x0 "SAFERRSTDSP0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x587FC00++0x3
line.long 0x0 "ICISTPSTDSP0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x587FCC0++0x3
line.long 0x0 "FIXINTENDSP0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x587FD00++0x3
line.long 0x0 "ROUINTENDSP0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x587FD40++0x3
line.long 0x0 "EDCINTENDSP0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x587FD80++0x3
line.long 0x0 "LSCHKINTENDSP0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x587FDC0++0x3
line.long 0x0 "WCRCINTENDSP0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Write Read check Error Interrupt Enable."
group.long 0x587FE00++0x3
line.long 0x0 "RSCHKINTENDSP0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x587FE40++0x3
line.long 0x0 "TIDINTENDSP0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
group.long 0x587FE80++0x3
line.long 0x0 "DCLSINTENDSP0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x587FF00++0x3
line.long 0x0 "SECERRINTENDSP0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x587FF40++0x3
line.long 0x0 "SAFERRINTENDSP0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x587FF80++0x3
line.long 0x0 "ICISTPINTENDSP0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x5880040++0x3
line.long 0x0 "FIXDUMMYDSP0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x5880080++0x3
line.long 0x0 "ROUERRDUMMYDSP0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x58800C0++0x3
line.long 0x0 "EDCDUMMYDSP0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x5880100++0x3
line.long 0x0 "LSCHKDUMMYDSP0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x5880140++0x3
line.long 0x0 "WCRCDUMMYDSP0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Write Read check Dummy error enable."
group.long 0x5880180++0x3
line.long 0x0 "RSCHKDUMMYDSP0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x58801C0++0x3
line.long 0x0 "TIDDUMMYDSP0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
group.long 0x5880200++0x3
line.long 0x0 "DCLSDUMMYDSP0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x5880280++0x3
line.long 0x0 "SECERRDUMMYDSP0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x58802C0++0x3
line.long 0x0 "SAFERRDUMMYDSP0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x5880300++0x3
line.long 0x0 "ICISTPDUMMYDSP0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x17810014++0x3
line.long 0x0 "FDT_RGX0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x17810914++0x3
line.long 0x0 "RGIDM_RGX0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x17811900++0x83
line.long 0x0 "RGIDR_ARPV0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_ARPV1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_AXIRGXS,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_ARPV2,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_ARPV3,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_ARPV4,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_ARPV5,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_ARPV6,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_ARPV7,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_ARPV8,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_CKM3DG,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_ECM3DG,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_FBAPVC,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_FBAPVD0,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_FBAPVD1,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_FBAPVD2,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDR_FBAPVE,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDR_IPMMUPV000,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDR_IPMMUPV001,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDR_IPMMUPV010,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDR_IPMMUPV011,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDR_IPMMUPV012,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDR_IPMMUPV013,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDR_IPMMUPV014,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDR_IPMMUPV015,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDR_IPMMUPV002,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDR_IPMMUPV003,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDR_IPMMUPV004,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDR_IPMMUPV005,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDR_IPMMUPV006,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDR_IPMMUPV007,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDR_IPMMUPV008,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDR_IPMMUPV009,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x17811D00++0x83
line.long 0x0 "RGIDW_ARPV0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_ARPV1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_AXIRGXS,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARPV2,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_ARPV3,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_ARPV4,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_ARPV5,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_ARPV6,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_ARPV7,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_ARPV8,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_CKM3DG,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_ECM3DG,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_FBAPVC,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_FBAPVD0,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_FBAPVD1,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_FBAPVD2,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDW_FBAPVE,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDW_IPMMUPV000,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDW_IPMMUPV001,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDW_IPMMUPV010,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDW_IPMMUPV011,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDW_IPMMUPV012,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDW_IPMMUPV013,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDW_IPMMUPV014,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDW_IPMMUPV015,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDW_IPMMUPV002,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDW_IPMMUPV003,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDW_IPMMUPV004,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDW_IPMMUPV005,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDW_IPMMUPV006,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDW_IPMMUPV007,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDW_IPMMUPV008,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDW_IPMMUPV009,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x17812D00++0x83
line.long 0x0 "SEC_ARPV0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_ARPV1,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_AXIRGXS,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_ARPV2,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_ARPV3,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_ARPV4,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_ARPV5,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_ARPV6,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_ARPV7,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_ARPV8,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_CKM3DG,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_ECM3DG,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_FBAPVC,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_FBAPVD0,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_FBAPVD1,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_FBAPVD2,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
line.long 0x40 "SEC_FBAPVE,"
hexmask.long 0x40 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x40 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x40 0. "Reserved_0,Reserved" "0,1"
line.long 0x44 "SEC_IPMMUPV000,"
hexmask.long 0x44 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x44 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x44 0. "Reserved_0,Reserved" "0,1"
line.long 0x48 "SEC_IPMMUPV001,"
hexmask.long 0x48 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x48 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x48 0. "Reserved_0,Reserved" "0,1"
line.long 0x4C "SEC_IPMMUPV010,"
hexmask.long 0x4C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4C 0. "Reserved_0,Reserved" "0,1"
line.long 0x50 "SEC_IPMMUPV011,"
hexmask.long 0x50 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x50 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x50 0. "Reserved_0,Reserved" "0,1"
line.long 0x54 "SEC_IPMMUPV012,"
hexmask.long 0x54 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x54 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x54 0. "Reserved_0,Reserved" "0,1"
line.long 0x58 "SEC_IPMMUPV013,"
hexmask.long 0x58 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x58 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x58 0. "Reserved_0,Reserved" "0,1"
line.long 0x5C "SEC_IPMMUPV014,"
hexmask.long 0x5C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x5C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x5C 0. "Reserved_0,Reserved" "0,1"
line.long 0x60 "SEC_IPMMUPV015,"
hexmask.long 0x60 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x60 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x60 0. "Reserved_0,Reserved" "0,1"
line.long 0x64 "SEC_IPMMUPV002,"
hexmask.long 0x64 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x64 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x64 0. "Reserved_0,Reserved" "0,1"
line.long 0x68 "SEC_IPMMUPV003,"
hexmask.long 0x68 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x68 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x68 0. "Reserved_0,Reserved" "0,1"
line.long 0x6C "SEC_IPMMUPV004,"
hexmask.long 0x6C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x6C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x6C 0. "Reserved_0,Reserved" "0,1"
line.long 0x70 "SEC_IPMMUPV005,"
hexmask.long 0x70 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x70 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x70 0. "Reserved_0,Reserved" "0,1"
line.long 0x74 "SEC_IPMMUPV006,"
hexmask.long 0x74 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x74 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x74 0. "Reserved_0,Reserved" "0,1"
line.long 0x78 "SEC_IPMMUPV007,"
hexmask.long 0x78 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x78 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x78 0. "Reserved_0,Reserved" "0,1"
line.long 0x7C "SEC_IPMMUPV008,"
hexmask.long 0x7C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x7C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x7C 0. "Reserved_0,Reserved" "0,1"
line.long 0x80 "SEC_IPMMUPV009,"
hexmask.long 0x80 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x80 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x80 0. "Reserved_0,Reserved" "0,1"
group.long 0x17813910++0x3
line.long 0x0 "SAFERR_AXPV,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x17813920++0x3
line.long 0x0 "SAFID_AXPV,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x17814910++0x3
line.long 0x0 "SECERR_AXPV,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x17814920++0x3
line.long 0x0 "SECID_AXPV,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x1783F940++0x3
line.long 0x0 "FIXST3DG0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x1783F980++0x7
line.long 0x0 "ROUERRST3DG0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x4 "ROUERRST3DG1,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x1783F9C0++0x7
line.long 0x0 "EDCST3DG0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x4 "EDCST3DG1,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x1783FA00++0x3
line.long 0x0 "LSCHKST3DG0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x1783FA40++0x3
line.long 0x0 "WCRCERRST3DG0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Write Read check Error Status."
group.long 0x1783FA80++0x3
line.long 0x0 "RSCHKST3DG0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x1783FAC0++0x3
line.long 0x0 "TIDST3DG0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
group.long 0x1783FB80++0x3
line.long 0x0 "SECERRST3DG0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x1783FBC0++0x3
line.long 0x0 "SAFERRST3DG0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x1783FC00++0x3
line.long 0x0 "ICISTPST3DG0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x1783FC80++0x3
line.long 0x0 "OTHST3DG0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Other Error Status."
group.long 0x1783FCC0++0x3
line.long 0x0 "FIXINTEN3DG0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x1783FD00++0x7
line.long 0x0 "ROUINTEN3DG0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x4 "ROUINTEN3DG1,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x1783FD40++0x7
line.long 0x0 "EDCINTEN3DG0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x4 "EDCINTEN3DG1,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x1783FD80++0x3
line.long 0x0 "LSCHKINTEN3DG0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x1783FDC0++0x3
line.long 0x0 "WCRCERRINTEN3DG0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Write Read check Error Interrupt Enable."
group.long 0x1783FE00++0x3
line.long 0x0 "RSCHKINTEN3DG0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x1783FE40++0x3
line.long 0x0 "TIDINTEN3DG0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
group.long 0x1783FF00++0x3
line.long 0x0 "SECERRINTEN3DG0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x1783FF40++0x3
line.long 0x0 "SAFERRINTEN3DG0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x1783FF80++0x3
line.long 0x0 "ICISTPINTEN3DG0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x17840000++0x3
line.long 0x0 "OTHINTEN3DG0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Other Error Interrupt Enable."
group.long 0x17840040++0x3
line.long 0x0 "FIXDUMMY3DG0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x17840080++0x7
line.long 0x0 "ROUERRDUMMY3DG0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x4 "ROUERRDUMMY3DG1,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x178400C0++0x7
line.long 0x0 "EDCDUMMY3DG0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x4 "EDCDUMMY3DG1,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x17840100++0x3
line.long 0x0 "LSCHKDUMMY3DG0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x17840140++0x3
line.long 0x0 "WCRCERRDUMMY3DG0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Write Read check Dummy error enable."
group.long 0x17840180++0x3
line.long 0x0 "RSCHKDUMMY3DG0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x178401C0++0x3
line.long 0x0 "TIDDUMMY3DG0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
group.long 0x17840280++0x3
line.long 0x0 "SECERRDUMMY3DG0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x178402C0++0x3
line.long 0x0 "SAFERRDUMMY3DG0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x17840300++0x3
line.long 0x0 "ICISTPDUMMY3DG0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x17840380++0x3
line.long 0x0 "OTHDUMMY3DG0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Other Dummy error enable."
group.long 0x1860F940++0x3
line.long 0x0 "FIXSTVC00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x1860F980++0x13
line.long 0x0 "ROUERRSTVC00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x4 "ROUERRSTVC01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x8 "ROUERRSTVC02,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0xC "ROUERRSTVC03,"
hexmask.long 0xC 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x10 "ROUERRSTVC04,"
hexmask.long 0x10 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x1860F9C0++0x13
line.long 0x0 "EDCSTVC00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x4 "EDCSTVC01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x8 "EDCSTVC02,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0xC "EDCSTVC03,"
hexmask.long 0xC 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x10 "EDCSTVC04,"
hexmask.long 0x10 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x1860FA00++0x7
line.long 0x0 "LSCHKSTVC00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
line.long 0x4 "LSCHKSTVC01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x1860FA40++0x3
line.long 0x0 "WCRCERRSTVC00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Write Read check Error Status."
group.long 0x1860FA80++0x7
line.long 0x0 "RSCHKSTVC00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
line.long 0x4 "RSCHKSTVC01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x1860FAC0++0x3
line.long 0x0 "TIDSTVC00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
group.long 0x1860FB00++0x3
line.long 0x0 "DCLSSTVC00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x1860FB80++0x3
line.long 0x0 "SECERRSTVC00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x1860FBC0++0x3
line.long 0x0 "SAFERRSTVC00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x1860FC00++0x3
line.long 0x0 "ICISTPSTVC00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x1860FC80++0x3
line.long 0x0 "OTHSTVC00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Other Error Status."
group.long 0x1860FCC0++0x3
line.long 0x0 "FIXINTENVC00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x1860FD00++0x13
line.long 0x0 "ROUINTENVC00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x4 "ROUINTENVC01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x8 "ROUINTENVC02,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0xC "ROUINTENVC03,"
hexmask.long 0xC 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x10 "ROUINTENVC04,"
hexmask.long 0x10 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x1860FD40++0x13
line.long 0x0 "EDCINTENVC00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x4 "EDCINTENVC01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x8 "EDCINTENVC02,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0xC "EDCINTENVC03,"
hexmask.long 0xC 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x10 "EDCINTENVC04,"
hexmask.long 0x10 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x1860FD80++0x7
line.long 0x0 "LSCHKINTENVC00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
line.long 0x4 "LSCHKINTENVC01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x1860FDC0++0x3
line.long 0x0 "WCRCERRINTENVC00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Write Read check Error Interrupt Enable."
group.long 0x1860FE00++0x7
line.long 0x0 "RSCHKINTENVC00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
line.long 0x4 "RSCHKINTENVC01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x1860FE40++0x3
line.long 0x0 "TIDINTENVC00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
group.long 0x1860FE80++0x3
line.long 0x0 "DCLSINTENVC00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x1860FF00++0x3
line.long 0x0 "SECERRINTENVC00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x1860FF40++0x3
line.long 0x0 "SAFERRINTENVC00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x1860FF80++0x3
line.long 0x0 "ICISTPINTENVC00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x18610000++0x3
line.long 0x0 "OTHINTENVC00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Other Error Interrupt Enable."
group.long 0x18610040++0x3
line.long 0x0 "FIXDUMMYVC00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x18610080++0x13
line.long 0x0 "ROUERRDUMMYVC00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x4 "ROUERRDUMMYVC01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x8 "ROUERRDUMMYVC02,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0xC "ROUERRDUMMYVC03,"
hexmask.long 0xC 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x10 "ROUERRDUMMYVC04,"
hexmask.long 0x10 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x186100C0++0x13
line.long 0x0 "EDCDUMMYVC00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x4 "EDCDUMMYVC01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x8 "EDCDUMMYVC02,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0xC "EDCDUMMYVC03,"
hexmask.long 0xC 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x10 "EDCDUMMYVC04,"
hexmask.long 0x10 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x18610100++0x7
line.long 0x0 "LSCHKDUMMYVC00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
line.long 0x4 "LSCHKDUMMYVC01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x18610140++0x3
line.long 0x0 "WCRCERRDUMMYVC00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Write Read check Dummy error enable."
group.long 0x18610180++0x7
line.long 0x0 "RSCHKDUMMYVC00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
line.long 0x4 "RSCHKDUMMYVC01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x186101C0++0x3
line.long 0x0 "TIDDUMMYVC00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
group.long 0x18610200++0x3
line.long 0x0 "DCLSDUMMYVC00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x18610280++0x3
line.long 0x0 "SECERRDUMMYVC00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x186102C0++0x3
line.long 0x0 "SAFERRDUMMYVC00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x18610300++0x3
line.long 0x0 "ICISTPDUMMYVC00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x18610380++0x3
line.long 0x0 "OTHDUMMYVC00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Other Dummy error enable."
group.long 0x18617940++0x3
line.long 0x0 "FIXSTVC10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x18617980++0x3
line.long 0x0 "ROUERRSTVC10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x186179C0++0x3
line.long 0x0 "EDCSTVC10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x18617A00++0x3
line.long 0x0 "LSCHKSTVC10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x18617A80++0x3
line.long 0x0 "RSCHKSTVC10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x18617B00++0x3
line.long 0x0 "DCLSSTVC10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x18617B80++0x3
line.long 0x0 "SECERRSTVC10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x18617BC0++0x3
line.long 0x0 "SAFERRSTVC10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x18617C00++0x3
line.long 0x0 "ICISTPSTVC10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x18617C80++0x3
line.long 0x0 "OTHSTVC10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Other Error Status."
group.long 0x18617CC0++0x3
line.long 0x0 "FIXINTENVC10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x18617D00++0x3
line.long 0x0 "ROUINTENVC10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x18617D40++0x3
line.long 0x0 "EDCINTENVC10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x18617D80++0x3
line.long 0x0 "LSCHKINTENVC10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x18617E00++0x3
line.long 0x0 "RSCHKINTENVC10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x18617E80++0x3
line.long 0x0 "DCLSINTENVC10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x18617F00++0x3
line.long 0x0 "SECERRINTENVC10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x18617F40++0x3
line.long 0x0 "SAFERRINTENVC10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x18617F80++0x3
line.long 0x0 "ICISTPINTENVC10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x18618000++0x3
line.long 0x0 "OTHINTENVC10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Other Error Interrupt Enable."
group.long 0x18618040++0x3
line.long 0x0 "FIXDUMMYVC10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x18618080++0x3
line.long 0x0 "ROUERRDUMMYVC10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x186180C0++0x3
line.long 0x0 "EDCDUMMYVC10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x18618100++0x3
line.long 0x0 "LSCHKDUMMYVC10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x18618180++0x3
line.long 0x0 "RSCHKDUMMYVC10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x18618200++0x3
line.long 0x0 "DCLSDUMMYVC10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x18618280++0x3
line.long 0x0 "SECERRDUMMYVC10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x186182C0++0x3
line.long 0x0 "SAFERRDUMMYVC10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x18618300++0x3
line.long 0x0 "ICISTPDUMMYVC10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x18618380++0x3
line.long 0x0 "OTHDUMMYVC10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Other Dummy error enable."
group.long 0x18670000++0x3
line.long 0x0 "FDT_AXVC2APVC1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x18671900++0x33
line.long 0x0 "RGIDR_ARVC10,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_ARVC11,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_ARVC12,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_ARVC13,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_ARVC14,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_ARVC15,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_ARVC16,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_ARVC17,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_ARVC18,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_ECMVC1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_FCPCS,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_VCP4LC,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_VCP4LV,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18671D00++0x33
line.long 0x0 "RGIDW_ARVC10,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_ARVC11,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ARVC12,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARVC13,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_ARVC14,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_ARVC15,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_ARVC16,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_ARVC17,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_ARVC18,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_ECMVC1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_FCPCS,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_VCP4LC,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_VCP4LV,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18672D00++0x33
line.long 0x0 "SEC_ARVC10,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_ARVC11,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_ARVC12,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_ARVC13,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_ARVC14,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_ARVC15,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_ARVC16,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_ARVC17,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_ARVC18,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_ECMVC1,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_FCPCS,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_VCP4LC,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_VCP4LV,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
group.long 0x18673910++0x3
line.long 0x0 "SAFERR_APVC1,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x18673920++0x3
line.long 0x0 "SAFID_APVC1,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x18674910++0x3
line.long 0x0 "SECERR_APVC1,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x18674920++0x3
line.long 0x0 "SECID_APVC1,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x18680004++0x17
line.long 0x0 "FDT_FBABUSVC,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_FCPCS,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x8 "FDT_IMR20,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0xC "FDT_IMR00,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x10 "FDT_IMR01,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x14 "FDT_IMR21,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x18680024++0x7
line.long 0x0 "FDT_IMR10,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_IMR11,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x18680040++0xB
line.long 0x0 "FDT_IMS0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_IMS1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x8 "FDT_IV1ES,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x18680904++0x17
line.long 0x0 "RGIDM_FBABUSVC,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_FCPCS,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x8 "RGIDM_IMR20,"
hexmask.long 0x8 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x8 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0xC "RGIDM_IMR00,"
hexmask.long 0xC 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0xC 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x10 "RGIDM_IMR01,"
hexmask.long 0x10 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x10 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x14 "RGIDM_IMR21,"
hexmask.long 0x14 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x14 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x18680924++0x7
line.long 0x0 "RGIDM_IMR10,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_IMR11,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x18680940++0xB
line.long 0x0 "RGIDM_IMS0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_IMS1,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x8 "RGIDM_IV1ES,"
hexmask.long 0x8 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x8 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x18681900++0x87
line.long 0x0 "RGIDR_ARVC0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_ARVC1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_ARVC2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_ARVC3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_AXIFBABUSVC,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_ARVC4,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_ARVC5,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_ARVC6,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_ARVC7,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_ARVC8,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_CKMVC,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_ECMVC0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_IMR2,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_IMR0,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_IMR1,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_IPMMUVC01,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDR_IPMMUVC10,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDR_IMS0,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDR_IMS1,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDR_IPMMUVC00,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDR_IPMMUVC11,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDR_IPMMUVC12,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDR_IPMMUVC13,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDR_IPMMUVC14,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDR_IPMMUVC15,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDR_IPMMUVC02,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDR_IPMMUVC03,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDR_IPMMUVC04,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDR_IPMMUVC05,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDR_IPMMUVC06,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDR_IPMMUVC07,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDR_IPMMUVC08,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDR_IPMMUVC09,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x84 "RGIDR_IV1ES,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x84 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18681D00++0x87
line.long 0x0 "RGIDW_ARVC0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_ARVC1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ARVC2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARVC3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_AXIFBABUSVC,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_ARVC4,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_ARVC5,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_ARVC6,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_ARVC7,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_ARVC8,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_CKMVC,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_ECMVC0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_IMR2,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_IMR0,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_IMR1,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_IPMMUVC01,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDW_IPMMUVC10,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDW_IMS0,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDW_IMS1,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDW_IPMMUVC00,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDW_IPMMUVC11,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDW_IPMMUVC12,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDW_IPMMUVC13,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDW_IPMMUVC14,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDW_IPMMUVC15,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDW_IPMMUVC02,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDW_IPMMUVC03,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDW_IPMMUVC04,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDW_IPMMUVC05,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDW_IPMMUVC06,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDW_IPMMUVC07,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDW_IPMMUVC08,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDW_IPMMUVC09,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x84 "RGIDW_IV1ES,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x84 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18682D00++0x87
line.long 0x0 "SEC_ARVC0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_ARVC1,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_ARVC2,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_ARVC3,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_AXIFBABUSVC,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_ARVC4,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_ARVC5,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_ARVC6,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_ARVC7,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_ARVC8,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_CKMVC,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_ECMVC0,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_IMR2,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_IMR0,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_IMR1,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_IPMMUVC01,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
line.long 0x40 "SEC_IPMMUVC10,"
hexmask.long 0x40 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x40 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x40 0. "Reserved_0,Reserved" "0,1"
line.long 0x44 "SEC_IMS0,"
hexmask.long 0x44 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x44 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x44 0. "Reserved_0,Reserved" "0,1"
line.long 0x48 "SEC_IMS1,"
hexmask.long 0x48 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x48 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x48 0. "Reserved_0,Reserved" "0,1"
line.long 0x4C "SEC_IPMMUVC00,"
hexmask.long 0x4C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4C 0. "Reserved_0,Reserved" "0,1"
line.long 0x50 "SEC_IPMMUVC11,"
hexmask.long 0x50 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x50 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x50 0. "Reserved_0,Reserved" "0,1"
line.long 0x54 "SEC_IPMMUVC12,"
hexmask.long 0x54 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x54 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x54 0. "Reserved_0,Reserved" "0,1"
line.long 0x58 "SEC_IPMMUVC13,"
hexmask.long 0x58 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x58 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x58 0. "Reserved_0,Reserved" "0,1"
line.long 0x5C "SEC_IPMMUVC14,"
hexmask.long 0x5C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x5C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x5C 0. "Reserved_0,Reserved" "0,1"
line.long 0x60 "SEC_IPMMUVC15,"
hexmask.long 0x60 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x60 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x60 0. "Reserved_0,Reserved" "0,1"
line.long 0x64 "SEC_IPMMUVC02,"
hexmask.long 0x64 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x64 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x64 0. "Reserved_0,Reserved" "0,1"
line.long 0x68 "SEC_IPMMUVC03,"
hexmask.long 0x68 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x68 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x68 0. "Reserved_0,Reserved" "0,1"
line.long 0x6C "SEC_IPMMUVC04,"
hexmask.long 0x6C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x6C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x6C 0. "Reserved_0,Reserved" "0,1"
line.long 0x70 "SEC_IPMMUVC05,"
hexmask.long 0x70 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x70 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x70 0. "Reserved_0,Reserved" "0,1"
line.long 0x74 "SEC_IPMMUVC06,"
hexmask.long 0x74 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x74 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x74 0. "Reserved_0,Reserved" "0,1"
line.long 0x78 "SEC_IPMMUVC07,"
hexmask.long 0x78 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x78 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x78 0. "Reserved_0,Reserved" "0,1"
line.long 0x7C "SEC_IPMMUVC08,"
hexmask.long 0x7C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x7C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x7C 0. "Reserved_0,Reserved" "0,1"
line.long 0x80 "SEC_IPMMUVC09,"
hexmask.long 0x80 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x80 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x80 0. "Reserved_0,Reserved" "0,1"
line.long 0x84 "SEC_IV1ES,"
hexmask.long 0x84 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x84 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x84 0. "Reserved_0,Reserved" "0,1"
group.long 0x18683910++0x3
line.long 0x0 "SAFERR_AXVC,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x18683920++0x3
line.long 0x0 "SAFID_AXVC,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x18684910++0x3
line.long 0x0 "SECERR_AXVC,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x18684920++0x3
line.long 0x0 "SECID_AXVC,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x18AEF940++0x7
line.long 0x0 "FIXSTVIO10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
line.long 0x4 "FIXSTVIO11,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x18AEF980++0x1B
line.long 0x0 "ROUERRSTVIO10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x4 "ROUERRSTVIO11,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x8 "ROUERRSTVIO12,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0xC "ROUERRSTVIO13,"
hexmask.long 0xC 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x10 "ROUERRSTVIO14,"
hexmask.long 0x10 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x14 "ROUERRSTVIO15,"
hexmask.long 0x14 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x18 "ROUERRSTVIO16,"
hexmask.long 0x18 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x18AEF9C0++0x1B
line.long 0x0 "EDCSTVIO10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x4 "EDCSTVIO11,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x8 "EDCSTVIO12,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0xC "EDCSTVIO13,"
hexmask.long 0xC 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x10 "EDCSTVIO14,"
hexmask.long 0x10 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x14 "EDCSTVIO15,"
hexmask.long 0x14 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x18 "EDCSTVIO16,"
hexmask.long 0x18 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x18AEFA00++0x7
line.long 0x0 "LSCHKSTVIO10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
line.long 0x4 "LSCHKSTVIO11,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x18AEFA40++0x3
line.long 0x0 "WCRCERRSTVIO10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Write Read check Error Status."
group.long 0x18AEFA80++0x7
line.long 0x0 "RSCHKSTVIO10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
line.long 0x4 "RSCHKSTVIO11,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x18AEFAC0++0x7
line.long 0x0 "TIDSTVIO10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
line.long 0x4 "TIDSTVIO11,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
group.long 0x18AEFB00++0x3
line.long 0x0 "DCLSSTVIO10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x18AEFB80++0x3
line.long 0x0 "SECERRSTVIO10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x18AEFBC0++0x3
line.long 0x0 "SAFERRSTVIO10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x18AEFC00++0x3
line.long 0x0 "ICISTPSTVIO10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x18AEFC80++0x3
line.long 0x0 "OTHSTVIO10,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Other Error Status."
group.long 0x18AEFCC0++0x7
line.long 0x0 "FIXINTENVIO10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
line.long 0x4 "FIXINTENVIO11,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x18AEFD00++0x1B
line.long 0x0 "ROUINTENVIO10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x4 "ROUINTENVIO11,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x8 "ROUINTENVIO12,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0xC "ROUINTENVIO13,"
hexmask.long 0xC 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x10 "ROUINTENVIO14,"
hexmask.long 0x10 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x14 "ROUINTENVIO15,"
hexmask.long 0x14 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x18 "ROUINTENVIO16,"
hexmask.long 0x18 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x18AEFD40++0x1B
line.long 0x0 "EDCINTENVIO10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x4 "EDCINTENVIO11,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x8 "EDCINTENVIO12,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0xC "EDCINTENVIO13,"
hexmask.long 0xC 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x10 "EDCINTENVIO14,"
hexmask.long 0x10 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x14 "EDCINTENVIO15,"
hexmask.long 0x14 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x18 "EDCINTENVIO16,"
hexmask.long 0x18 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x18AEFD80++0x7
line.long 0x0 "LSCHKINTENVIO10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
line.long 0x4 "LSCHKINTENVIO11,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x18AEFDC0++0x3
line.long 0x0 "WCRCERRINTENVIO10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Write Read check Error Interrupt Enable."
group.long 0x18AEFE00++0x7
line.long 0x0 "RSCHKINTENVIO10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
line.long 0x4 "RSCHKINTENVIO11,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x18AEFE40++0x7
line.long 0x0 "TIDINTENVIO10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
line.long 0x4 "TIDINTENVIO11,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
group.long 0x18AEFE80++0x3
line.long 0x0 "DCLSINTENVIO10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x18AEFF00++0x3
line.long 0x0 "SECERRINTENVIO10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x18AEFF40++0x3
line.long 0x0 "SAFERRINTENVIO10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x18AEFF80++0x3
line.long 0x0 "ICISTPINTENVIO10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x18AF0000++0x3
line.long 0x0 "OTHINTENVIO10,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Other Error Interrupt Enable."
group.long 0x18AF0040++0x7
line.long 0x0 "FIXDUMMYVIO10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
line.long 0x4 "FIXDUMMYVIO11,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x18AF0080++0x1B
line.long 0x0 "ROUERRDUMMYVIO10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x4 "ROUERRDUMMYVIO11,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x8 "ROUERRDUMMYVIO12,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0xC "ROUERRDUMMYVIO13,"
hexmask.long 0xC 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x10 "ROUERRDUMMYVIO14,"
hexmask.long 0x10 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x14 "ROUERRDUMMYVIO15,"
hexmask.long 0x14 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x18 "ROUERRDUMMYVIO16,"
hexmask.long 0x18 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x18AF00C0++0x1B
line.long 0x0 "EDCDUMMYVIO10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x4 "EDCDUMMYVIO11,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x8 "EDCDUMMYVIO12,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0xC "EDCDUMMYVIO13,"
hexmask.long 0xC 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x10 "EDCDUMMYVIO14,"
hexmask.long 0x10 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x14 "EDCDUMMYVIO15,"
hexmask.long 0x14 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x18 "EDCDUMMYVIO16,"
hexmask.long 0x18 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x18AF0100++0x7
line.long 0x0 "LSCHKDUMMYVIO10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
line.long 0x4 "LSCHKDUMMYVIO11,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x18AF0140++0x3
line.long 0x0 "WCRCERRDUMMYVIO10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Write Read check Dummy error enable."
group.long 0x18AF0180++0x7
line.long 0x0 "RSCHKDUMMYVIO10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
line.long 0x4 "RSCHKDUMMYVIO11,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x18AF01C0++0x7
line.long 0x0 "TIDDUMMYVIO10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
line.long 0x4 "TIDDUMMYVIO11,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
group.long 0x18AF0200++0x3
line.long 0x0 "DCLSDUMMYVIO10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x18AF0280++0x3
line.long 0x0 "SECERRDUMMYVIO10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x18AF02C0++0x3
line.long 0x0 "SAFERRDUMMYVIO10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x18AF0300++0x3
line.long 0x0 "ICISTPDUMMYVIO10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x18AF0380++0x3
line.long 0x0 "OTHDUMMYVIO10,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Other Dummy error enable."
group.long 0x18AF7940++0x7
line.long 0x0 "FIXSTVIO00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
line.long 0x4 "FIXSTVIO01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x18AF7980++0x1B
line.long 0x0 "ROUERRSTVIO00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x4 "ROUERRSTVIO01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x8 "ROUERRSTVIO02,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0xC "ROUERRSTVIO03,"
hexmask.long 0xC 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x10 "ROUERRSTVIO04,"
hexmask.long 0x10 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x14 "ROUERRSTVIO05,"
hexmask.long 0x14 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x18 "ROUERRSTVIO06,"
hexmask.long 0x18 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x18AF79C0++0x1B
line.long 0x0 "EDCSTVIO00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x4 "EDCSTVIO01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x8 "EDCSTVIO02,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0xC "EDCSTVIO03,"
hexmask.long 0xC 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x10 "EDCSTVIO04,"
hexmask.long 0x10 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x14 "EDCSTVIO05,"
hexmask.long 0x14 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x18 "EDCSTVIO06,"
hexmask.long 0x18 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x18AF7A00++0x7
line.long 0x0 "LSCHKSTVIO00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
line.long 0x4 "LSCHKSTVIO01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x18AF7A40++0x3
line.long 0x0 "WCRCERRSTVIO00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Write Read check Error Status."
group.long 0x18AF7A80++0x7
line.long 0x0 "RSCHKSTVIO00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
line.long 0x4 "RSCHKSTVIO01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x18AF7AC0++0x7
line.long 0x0 "TIDSTVIO00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
line.long 0x4 "TIDSTVIO01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
group.long 0x18AF7B00++0x3
line.long 0x0 "DCLSSTVIO00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x18AF7B80++0x3
line.long 0x0 "SECERRSTVIO00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x18AF7BC0++0x3
line.long 0x0 "SAFERRSTVIO00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x18AF7C00++0x3
line.long 0x0 "ICISTPSTVIO00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x18AF7C80++0x3
line.long 0x0 "OTHSTVIO00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Other Error Status."
group.long 0x18AF7CC0++0x7
line.long 0x0 "FIXINTENVIO00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
line.long 0x4 "FIXINTENVIO01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x18AF7D00++0x1B
line.long 0x0 "ROUINTENVIO00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x4 "ROUINTENVIO01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x8 "ROUINTENVIO02,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0xC "ROUINTENVIO03,"
hexmask.long 0xC 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x10 "ROUINTENVIO04,"
hexmask.long 0x10 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x14 "ROUINTENVIO05,"
hexmask.long 0x14 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x18 "ROUINTENVIO06,"
hexmask.long 0x18 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x18AF7D40++0x1B
line.long 0x0 "EDCINTENVIO00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x4 "EDCINTENVIO01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x8 "EDCINTENVIO02,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0xC "EDCINTENVIO03,"
hexmask.long 0xC 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x10 "EDCINTENVIO04,"
hexmask.long 0x10 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x14 "EDCINTENVIO05,"
hexmask.long 0x14 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x18 "EDCINTENVIO06,"
hexmask.long 0x18 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x18AF7D80++0x7
line.long 0x0 "LSCHKINTENVIO00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
line.long 0x4 "LSCHKINTENVIO01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x18AF7DC0++0x3
line.long 0x0 "WCRCERRINTENVIO00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Write Read check Error Interrupt Enable."
group.long 0x18AF7E00++0x7
line.long 0x0 "RSCHKINTENVIO00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
line.long 0x4 "RSCHKINTENVIO01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x18AF7E40++0x7
line.long 0x0 "TIDINTENVIO00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
line.long 0x4 "TIDINTENVIO01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
group.long 0x18AF7E80++0x3
line.long 0x0 "DCLSINTENVIO00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x18AF7F00++0x3
line.long 0x0 "SECERRINTENVIO00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x18AF7F40++0x3
line.long 0x0 "SAFERRINTENVIO00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x18AF7F80++0x3
line.long 0x0 "ICISTPINTENVIO00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x18AF8000++0x3
line.long 0x0 "OTHINTENVIO00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Other Error Interrupt Enable."
group.long 0x18AF8040++0x7
line.long 0x0 "FIXDUMMYVIO00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
line.long 0x4 "FIXDUMMYVIO01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x18AF8080++0x1B
line.long 0x0 "ROUERRDUMMYVIO00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x4 "ROUERRDUMMYVIO01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x8 "ROUERRDUMMYVIO02,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0xC "ROUERRDUMMYVIO03,"
hexmask.long 0xC 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x10 "ROUERRDUMMYVIO04,"
hexmask.long 0x10 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x14 "ROUERRDUMMYVIO05,"
hexmask.long 0x14 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x18 "ROUERRDUMMYVIO06,"
hexmask.long 0x18 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x18AF80C0++0x1B
line.long 0x0 "EDCDUMMYVIO00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x4 "EDCDUMMYVIO01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x8 "EDCDUMMYVIO02,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0xC "EDCDUMMYVIO03,"
hexmask.long 0xC 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x10 "EDCDUMMYVIO04,"
hexmask.long 0x10 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x14 "EDCDUMMYVIO05,"
hexmask.long 0x14 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x18 "EDCDUMMYVIO06,"
hexmask.long 0x18 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x18AF8100++0x7
line.long 0x0 "LSCHKDUMMYVIO00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
line.long 0x4 "LSCHKDUMMYVIO01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x18AF8140++0x3
line.long 0x0 "WCRCERRDUMMYVIO00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Write Read check Dummy error enable."
group.long 0x18AF8180++0x7
line.long 0x0 "RSCHKDUMMYVIO00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
line.long 0x4 "RSCHKDUMMYVIO01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x18AF81C0++0x7
line.long 0x0 "TIDDUMMYVIO00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
line.long 0x4 "TIDDUMMYVIO01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
group.long 0x18AF8200++0x3
line.long 0x0 "DCLSDUMMYVIO00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x18AF8280++0x3
line.long 0x0 "SECERRDUMMYVIO00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x18AF82C0++0x3
line.long 0x0 "SAFERRDUMMYVIO00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x18AF8300++0x3
line.long 0x0 "ICISTPDUMMYVIO00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x18AF8380++0x3
line.long 0x0 "OTHDUMMYVIO00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Other Dummy error enable."
group.long 0x18AFB940++0x3
line.long 0x0 "FIXSTVIO20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x18AFB980++0x3
line.long 0x0 "ROUERRSTVIO20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x18AFB9C0++0x3
line.long 0x0 "EDCSTVIO20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x18AFBA00++0x3
line.long 0x0 "LSCHKSTVIO20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x18AFBA80++0x3
line.long 0x0 "RSCHKSTVIO20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x18AFBB00++0x3
line.long 0x0 "DCLSSTVIO20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x18AFBB80++0x3
line.long 0x0 "SECERRSTVIO20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x18AFBBC0++0x3
line.long 0x0 "SAFERRSTVIO20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x18AFBC00++0x3
line.long 0x0 "ICISTPSTVIO20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x18AFBCC0++0x3
line.long 0x0 "FIXINTENVIO20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x18AFBD00++0x3
line.long 0x0 "ROUINTENVIO20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x18AFBD40++0x3
line.long 0x0 "EDCINTENVIO20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x18AFBD80++0x3
line.long 0x0 "LSCHKINTENVIO20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x18AFBE00++0x3
line.long 0x0 "RSCHKINTENVIO20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x18AFBE80++0x3
line.long 0x0 "DCLSINTENVIO20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x18AFBF00++0x3
line.long 0x0 "SECERRINTENVIO20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x18AFBF40++0x3
line.long 0x0 "SAFERRINTENVIO20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x18AFBF80++0x3
line.long 0x0 "ICISTPINTENVIO20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x18AFC040++0x3
line.long 0x0 "FIXDUMMYVIO20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x18AFC080++0x3
line.long 0x0 "ROUERRDUMMYVIO20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x18AFC0C0++0x3
line.long 0x0 "EDCDUMMYVIO20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x18AFC100++0x3
line.long 0x0 "LSCHKDUMMYVIO20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x18AFC180++0x3
line.long 0x0 "RSCHKDUMMYVIO20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x18AFC200++0x3
line.long 0x0 "DCLSDUMMYVIO20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x18AFC280++0x3
line.long 0x0 "SECERRDUMMYVIO20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x18AFC2C0++0x3
line.long 0x0 "SAFERRDUMMYVIO20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x18AFC300++0x3
line.long 0x0 "ICISTPDUMMYVIO20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x18BD0000++0x3
line.long 0x0 "FDT_AXVI12APVI4,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x18BD1900++0x27
line.long 0x0 "RGIDR_ARVI40,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_ARVI41,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_ARVI42,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_ARVI43,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_ARVI44,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_ARVI45,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_ARVI46,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_ARVI47,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_ARVI48,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_DIS0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BD192C++0x17
line.long 0x0 "RGIDR_DSC,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_ECMVIO2,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_FCPVD0,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_FCPVD1,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_VSPD0,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_VSPD1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BD1D00++0x27
line.long 0x0 "RGIDW_ARVI40,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_ARVI41,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ARVI42,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARVI43,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_ARVI44,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_ARVI45,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_ARVI46,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_ARVI47,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_ARVI48,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_DIS0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BD1D2C++0x17
line.long 0x0 "RGIDW_DSC,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_ECMVIO2,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_FCPVD0,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_FCPVD1,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_VSPD0,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_VSPD1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BD2D00++0x27
line.long 0x0 "SEC_ARVI40,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_ARVI41,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_ARVI42,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_ARVI43,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_ARVI44,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_ARVI45,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_ARVI46,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_ARVI47,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_ARVI48,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_DIS0,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
group.long 0x18BD2D2C++0x17
line.long 0x0 "SEC_DSC,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_ECMVIO2,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_FCPVD0,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_FCPVD1,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_VSPD0,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_VSPD1,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
group.long 0x18BD3910++0x3
line.long 0x0 "SAFERR_APVI4,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x18BD3920++0x3
line.long 0x0 "SAFID_APVI4,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x18BD4910++0x3
line.long 0x0 "SECERR_APVI4,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x18BD4920++0x3
line.long 0x0 "SECID_APVI4,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x18BE0000++0xB
line.long 0x0 "FDT_DSITXLINK0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_DSITXLINK1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x8 "FDT_FBABUSVIO,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x18BE0014++0xF
line.long 0x0 "FDT_FCPVD0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_FCPVD1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x8 "FDT_FCPVX0,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0xC "FDT_FCPVX1,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x18BE0900++0xB
line.long 0x0 "RGIDM_DSITLINK0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_DSTLINK1,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x8 "RGIDM_FBABUSVIO,"
hexmask.long 0x8 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x8 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x18BE0914++0xF
line.long 0x0 "RGIDM_FCPVD0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_FCPVD1,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x8 "RGIDM_FCPVX0,"
hexmask.long 0x8 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x8 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0xC "RGIDM_FCPVX1,"
hexmask.long 0xC 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0xC 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x18BE1900++0x2F
line.long 0x0 "RGIDR_CSITOP0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_ARVI10,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_ARVI11,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_ARVI12,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_ARVI13,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_ARVI14,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_ARVI15,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_ARVI16,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_ARVI17,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_ARVI18,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_CKMVIO,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_CSITOP1,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BE1934++0xB
line.long 0x0 "RGIDR_DSITLINK0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_DSITLINK1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_ECMVIO1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BE1944++0xB
line.long 0x0 "RGIDR_IPMMUVI001,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_FCPVX0,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_FCPVX1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BE1958++0x17
line.long 0x0 "RGIDR_IPMMUVI000,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_IPMMUVI100,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_IPMMUVI010,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_IPMMUVI011,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_VSPX0,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_VSPX1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BE1978++0x6B
line.long 0x0 "RGIDR_IPMMUVI012,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_IPMMUVI013,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_IPMMUVI014,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_IPMMUVI015,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_IPMMUVI002,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_IPMMUVI003,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_IPMMUVI004,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_IPMMUVI005,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_IPMMUVI006,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_IPMMUVI007,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_IPMMUVI008,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_IPMMUVI009,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_IPMMUVI101,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_IPMMUVI110,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_IPMMUVI111,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_IPMMUVI112,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDR_IPMMUVI113,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDR_IPMMUVI114,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDR_IPMMUVI115,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDR_IPMMUVI102,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDR_IPMMUVI103,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDR_IPMMUVI104,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDR_IPMMUVI105,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDR_IPMMUVI106,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDR_IPMMUVI107,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDR_IPMMUVI108,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDR_IPMMUVI109,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BE1A04++0x3
line.long 0x0 "RGIDR_AXIFBAVUSVIO,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BE1D00++0x2F
line.long 0x0 "RGIDW_CSITOP0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_ARVI10,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ARVI11,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARVI12,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_ARVI13,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_ARVI14,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_ARVI15,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_ARVI16,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_ARVI17,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_ARVI18,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_CKMVIO,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_CSITOP1,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BE1D34++0xB
line.long 0x0 "RGIDW_DSITLINK0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_DSITLINK1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ECMVIO1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BE1D44++0xB
line.long 0x0 "RGIDW_IPMMUVI001,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_FCPVX0,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_FCPVX1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BE1D58++0x17
line.long 0x0 "RGIDW_IPMMUVI000,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_IPMMUVI100,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_IPMMUVI010,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_IPMMUVI011,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_VSPX0,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_VSPX1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BE1D78++0x6B
line.long 0x0 "RGIDW_IPMMUVI012,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_IPMMUVI013,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_IPMMUVI014,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_IPMMUVI015,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_IPMMUVI002,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_IPMMUVI003,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_IPMMUVI004,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_IPMMUVI005,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_IPMMUVI006,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_IPMMUVI007,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_IPMMUVI008,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_IPMMUVI009,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_IPMMUVI101,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_IPMMUVI110,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_IPMMUVI111,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_IPMMUVI112,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDW_IPMMUVI113,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDW_IPMMUVI114,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDW_IPMMUVI115,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDW_IPMMUVI102,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDW_IPMMUVI103,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDW_IPMMUVI104,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDW_IPMMUVI105,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDW_IPMMUVI106,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDW_IPMMUVI107,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDW_IPMMUVI108,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDW_IPMMUVI109,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BE1E04++0x3
line.long 0x0 "RGIDW_AXIFBABUSVIO,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BE2D00++0x2F
line.long 0x0 "SEC_CSITOP0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_ARVI10,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_ARVI11,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_ARVI12,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_ARVI13,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_ARVI14,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_ARVI15,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_ARVI16,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_ARVI17,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_ARVI18,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_CKMVIO,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_CSITOP1,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
group.long 0x18BE2D34++0xB
line.long 0x0 "SEC_DSITLINK0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_DSITLINK1,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_ECMVIO1,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
group.long 0x18BE2D44++0xB
line.long 0x0 "SEC_IPMMUVI001,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_FCPVX0,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_FCPVX1,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
group.long 0x18BE2D58++0x17
line.long 0x0 "SEC_IPMMUVI000,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_IPMMUVI100,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_IPMMUVI010,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_IPMMUVI011,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_VSPX0,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_VSPX1,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
group.long 0x18BE2D78++0x6B
line.long 0x0 "SEC_IPMMUVI012,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_IPMMUVI013,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_IPMMUVI014,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_IPMMUVI015,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_IPMMUVI002,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_IPMMUVI003,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_IPMMUVI004,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_IPMMUVI005,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_IPMMUVI006,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_IPMMUVI007,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_IPMMUVI008,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_IPMMUVI009,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_IPMMUVI101,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_IPMMUVI110,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_IPMMUVI111,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_IPMMUVI112,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
line.long 0x40 "SEC_IPMMUVI113,"
hexmask.long 0x40 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x40 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x40 0. "Reserved_0,Reserved" "0,1"
line.long 0x44 "SEC_IPMMUVI114,"
hexmask.long 0x44 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x44 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x44 0. "Reserved_0,Reserved" "0,1"
line.long 0x48 "SEC_IPMMUVI115,"
hexmask.long 0x48 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x48 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x48 0. "Reserved_0,Reserved" "0,1"
line.long 0x4C "SEC_IPMMUVI102,"
hexmask.long 0x4C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4C 0. "Reserved_0,Reserved" "0,1"
line.long 0x50 "SEC_IPMMUVI103,"
hexmask.long 0x50 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x50 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x50 0. "Reserved_0,Reserved" "0,1"
line.long 0x54 "SEC_IPMMUVI104,"
hexmask.long 0x54 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x54 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x54 0. "Reserved_0,Reserved" "0,1"
line.long 0x58 "SEC_IPMMUVI105,"
hexmask.long 0x58 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x58 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x58 0. "Reserved_0,Reserved" "0,1"
line.long 0x5C "SEC_IPMMUVI106,"
hexmask.long 0x5C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x5C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x5C 0. "Reserved_0,Reserved" "0,1"
line.long 0x60 "SEC_IPMMUVI107,"
hexmask.long 0x60 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x60 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x60 0. "Reserved_0,Reserved" "0,1"
line.long 0x64 "SEC_IPMMUVI108,"
hexmask.long 0x64 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x64 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x64 0. "Reserved_0,Reserved" "0,1"
line.long 0x68 "SEC_IPMMUVI109,"
hexmask.long 0x68 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x68 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x68 0. "Reserved_0,Reserved" "0,1"
group.long 0x18BE2E04++0x3
line.long 0x0 "SEC_AXIFBABUSVIO,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x18BE3910++0x3
line.long 0x0 "SAFERR_AXVI1,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x18BE3920++0x3
line.long 0x0 "SAFID_AXVI1,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x18BE4910++0x3
line.long 0x0 "SECERR_AXVI1,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x18BE4920++0x3
line.long 0x0 "SECID_AXVI1,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x18BEFB10++0x3
line.long 0x0 "FDT_AXVI12AXVI,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x18BF0000++0xB
line.long 0x0 "FDT_ISP02,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_ISP03,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x8 "FDT_ISP04,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x18BF0010++0x7
line.long 0x0 "FDT_VIN0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_VIN1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x18BF0020++0xF
line.long 0x0 "FDT_ISP00,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_ISP01,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x8 "FDT_ISP10,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0xC "FDT_ISP11,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x18BF0044++0x3
line.long 0x0 "FDT_ISP12,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x18BF004C++0x7
line.long 0x0 "FDT_ISP13,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_ISP14,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x18BF0900++0xB
line.long 0x0 "RGIDM_ISP02,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_ISP03,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x8 "RGIDM_ISP04,"
hexmask.long 0x8 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x8 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x18BF0910++0x7
line.long 0x0 "RGIDM_VIN0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_VIN1,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x18BF0920++0xF
line.long 0x0 "RGIDM_ISP00,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_ISP01,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x8 "RGIDM_ISP10,"
hexmask.long 0x8 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x8 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0xC "RGIDM_ISP11,"
hexmask.long 0xC 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0xC 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x18BF0944++0x3
line.long 0x0 "RGIDM_ISP12,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x18BF094C++0x7
line.long 0x0 "RGIDM_ISP13,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_ISP14,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x18BF1900++0x37
line.long 0x0 "RGIDR_ARVI0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_ARVI1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_ARVI2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_ARVI3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_ARVI4,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_ARVI5,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_ARVI6,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_ARVI7,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_ARVI8,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_ECMVIO0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_ISP0,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_ISP0CORE,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_ISP1,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_ISP1CORE,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BF1954++0x3F
line.long 0x0 "RGIDR_VIN00,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_VIN01,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_VIN02,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_VIN03,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_VIN04,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_VIN05,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_VIN06,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_VIN07,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_VIN10,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_VIN11,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_VIN12,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_VIN13,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_VIN14,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_VIN15,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_VIN16,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_VIN17,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BF1D00++0x37
line.long 0x0 "RGIDW_ARVI0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_ARVI1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ARVI2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARVI3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_ARVI4,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_ARVI5,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_ARVI6,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_ARVI7,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_ARVI8,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_ECMVIO0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_ISP0,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_ISP0CORE,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_ISP1,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_ISP1CORE,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BF1D54++0x3F
line.long 0x0 "RGIDW_VIN00,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_VIN01,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_VIN02,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_VIN03,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_VIN04,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_VIN05,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_VIN06,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_VIN07,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_VIN10,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_VIN11,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_VIN12,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_VIN13,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_VIN14,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_VIN15,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_VIN16,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_VIN17,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x18BF2D00++0x37
line.long 0x0 "SEC_ARVI0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_ARVI1,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_ARVI2,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_ARVI3,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_ARVI4,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_ARVI5,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_ARVI6,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_ARVI7,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_ARVI8,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_ECMVIO0,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_ISP0,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_ISP0CORE,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_ISP1,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_ISP1CORE,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
group.long 0x18BF2D54++0x3F
line.long 0x0 "SEC_VIN00,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_VIN01,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_VIN02,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_VIN03,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_VIN04,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_VIN05,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_VIN06,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_VIN07,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_VIN10,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_VIN11,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_VIN12,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_VIN13,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_VIN14,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_VIN15,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_VIN16,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_VIN17,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
group.long 0x18BF3910++0x7
line.long 0x0 "SAFERR0_AXVI0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
line.long 0x4 "SAFERR1_AXVI0,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x18BF3920++0x3
line.long 0x0 "SAFID_AXVI0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x18BF4910++0x7
line.long 0x0 "SECERR0_AXVI0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
line.long 0x4 "SECERR1_AXVI0,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x18BF4920++0x3
line.long 0x0 "SECID_AXVI0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x19800000++0xF
line.long 0x0 "FDT_AXIMP02AXSN,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_AXSC2AXSN,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x8 "FDT_AXSP02AXSN,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0xC "FDT_AXHC2AXSN,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x19801900++0x27
line.long 0x0 "RGIDR_ARSN0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_ARSN1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_ARSN2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_ARSN3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_ARSN4,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_ARSN5,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_ARSN6,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_ARSN7,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_ARSN8,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_ECMTOP3,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19801D00++0x27
line.long 0x0 "RGIDW_ARSN0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_ARSN1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ARSN2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARSN3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_ARSN4,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_ARSN5,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_ARSN6,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_ARSN7,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_ARSN8,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_ECMTOP3,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19802D00++0x27
line.long 0x0 "SEC_ARSN0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_ARSN1,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_ARSN2,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_ARSN3,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_ARSN4,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_ARSN5,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_ARSN6,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_ARSN7,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_ARSN8,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_ECMTOP3,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
group.long 0x19803910++0x3
line.long 0x0 "SAFERR_AXSN,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x19803920++0x3
line.long 0x0 "SAFID_AXSN,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x19804910++0x3
line.long 0x0 "SECERR_AXSN,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x19804920++0x3
line.long 0x0 "SECID_AXSN,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x19810000++0xB
line.long 0x0 "FDT_AXMM2AXSTM,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_CSDE0,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x8 "FDT_CSDE1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x19810900++0xB
line.long 0x0 "RGIDM_AXMM2AXSTM,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_CSDE0,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x8 "RGIDM_CSDE1,"
hexmask.long 0x8 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x8 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x1983F940++0x3
line.long 0x0 "FIXSTTOP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x1983F980++0xB
line.long 0x0 "ROUERRSTTOP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x4 "ROUERRSTTOP01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x8 "ROUERRSTTOP02,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x1983F9C0++0xB
line.long 0x0 "EDCSTTOP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x4 "EDCSTTOP01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x8 "EDCSTTOP02,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x1983FA00++0x7
line.long 0x0 "LSCHKSTTOP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
line.long 0x4 "LSCHKSTTOP01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x1983FA40++0x3
line.long 0x0 "WCRCERRSTTOP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Write Read check Error Status."
group.long 0x1983FA80++0xB
line.long 0x0 "RSCHKSTTOP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
line.long 0x4 "RSCHKSTTOP01,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
line.long 0x8 "RSCHKSTTOP02,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x1983FAC0++0x3
line.long 0x0 "TIDSTTOP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
group.long 0x1983FB00++0x3
line.long 0x0 "DCLSSTTOP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x1983FB80++0x3
line.long 0x0 "SECERRSTTOP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x1983FBC0++0x3
line.long 0x0 "SAFERRSTTOP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x1983FC00++0x3
line.long 0x0 "ICISTPSTTOP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x1983FC80++0x3
line.long 0x0 "OTHSTTOP00,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Other Error Status."
group.long 0x1983FCC0++0x3
line.long 0x0 "FIXINTENTOP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x1983FD00++0xB
line.long 0x0 "ROUINTENTOP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x4 "ROUINTENTOP01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x8 "ROUINTENTOP02,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x1983FD40++0xB
line.long 0x0 "EDCINTENTOP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x4 "EDCINTENTOP01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x8 "EDCINTENTOP02,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x1983FD80++0x7
line.long 0x0 "LSCHKINTENTOP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
line.long 0x4 "LSCHKINTENTOP01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x1983FDC0++0x3
line.long 0x0 "WCRCINTENTOP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Write Read check Error Interrupt Enable."
group.long 0x1983FE00++0xB
line.long 0x0 "RSCHKINTENTOP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
line.long 0x4 "RSCHKINTENTOP01,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
line.long 0x8 "RSCHKINTENTOP02,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x1983FE40++0x3
line.long 0x0 "TIDINTENTOP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
group.long 0x1983FE80++0x3
line.long 0x0 "DCLSINTENTOP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x1983FF00++0x3
line.long 0x0 "SECERRINTENTOP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x1983FF40++0x3
line.long 0x0 "SAFERRINTENTOP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x1983FF80++0x3
line.long 0x0 "ICISTPINTENTOP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x19840000++0x3
line.long 0x0 "OTHINTENTOP00,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Other Error Interrupt Enable."
group.long 0x19840040++0x3
line.long 0x0 "FIXDUMMYTOP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x19840080++0xB
line.long 0x0 "ROUDUMMYTOP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x4 "ROUDUMMYTOP01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x8 "ROUDUMMYTOP02,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x198400C0++0xB
line.long 0x0 "EDCDUMMYTOP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x4 "EDCDUMMYTOP01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x8 "EDCDUMMYTOP02,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x19840100++0x7
line.long 0x0 "LSCHKDUMMYTOP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
line.long 0x4 "LSCHKDUMMYTOP01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x19840140++0x3
line.long 0x0 "WCRCDUMMYTOP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Write Read check Dummy error enable."
group.long 0x19840180++0xB
line.long 0x0 "RSCHKDUMMYTOP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
line.long 0x4 "RSCHKDUMMYTOP01,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
line.long 0x8 "RSCHKDUMMYTOP02,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x198401C0++0x3
line.long 0x0 "TIDDUMMYTOP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
group.long 0x19840200++0x3
line.long 0x0 "DCLSDUMMYTOP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x19840280++0x3
line.long 0x0 "SECERRDUMMYTOP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x198402C0++0x3
line.long 0x0 "SAFERRDUMMYTOP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x19840300++0x3
line.long 0x0 "ICISTPDUMMYTOP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x19840380++0x3
line.long 0x0 "OTHDUMMYTOP00,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Other Dummy error enable."
group.long 0x19847940++0x3
line.long 0x0 "FIXSTTOP20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x19847980++0x3
line.long 0x0 "ROUERRSTTOP20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x198479C0++0x3
line.long 0x0 "EDCSTTOP20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x19847A00++0x3
line.long 0x0 "LSCHKSTTOP20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x19847A80++0x3
line.long 0x0 "RSCHKSTTOP20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x19847AC0++0x3
line.long 0x0 "TIDSTTOP20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
group.long 0x19847B00++0x3
line.long 0x0 "DCLSSTTOP20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x19847B80++0x3
line.long 0x0 "SECERRSTTOP20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x19847BC0++0x3
line.long 0x0 "SAFERRSTTOP20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x19847C00++0x3
line.long 0x0 "ICISTPSTTOP20,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x19847CC0++0x3
line.long 0x0 "FIXINTENTOP20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x19847D00++0x3
line.long 0x0 "ROUINTENTOP20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x19847D40++0x3
line.long 0x0 "EDCINTENTOP20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x19847D80++0x3
line.long 0x0 "LSCHKINTENTOP20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x19847E00++0x3
line.long 0x0 "RSCHKINTENTOP20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x19847E40++0x3
line.long 0x0 "TIDINTENTOP20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
group.long 0x19847E80++0x3
line.long 0x0 "DCLSINTENTOP20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x19847F00++0x3
line.long 0x0 "SECERRINTENTOP20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x19847F40++0x3
line.long 0x0 "SAFERRINTENTOP20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x19847F80++0x3
line.long 0x0 "ICISTPINTENTOP20,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x19848040++0x3
line.long 0x0 "FIXDUMMYTOP20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x19848080++0x3
line.long 0x0 "ROUDUMMYTOP20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x198480C0++0x3
line.long 0x0 "EDCDUMMYTOP20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x19848100++0x3
line.long 0x0 "LSCHKDUMMYTOP20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x19848180++0x3
line.long 0x0 "RSCHKDUMMYTOP20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x198481C0++0x3
line.long 0x0 "TIDDUMMYTOP20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
group.long 0x19848200++0x3
line.long 0x0 "DCLSDUMMYTOP20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x19848280++0x3
line.long 0x0 "SECERRDUMMYTOP20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x198482C0++0x3
line.long 0x0 "SAFERRDUMMYTOP20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x19848300++0x3
line.long 0x0 "ICISTPDUMMYTOP20,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x19860004++0xB
line.long 0x0 "FDT_AXRT2AXSC,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_AXSM2AXSC,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x8 "FDT_AXSN2AXSC,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x19860014++0xB
line.long 0x0 "FDT_CCI,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_FBABUSTOP0,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x8 "FDT_FBABUSTOP1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x19860918++0x7
line.long 0x0 "RGIDM_FBABUSTOP0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_FBABUSTOP1,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x19861900++0xA3
line.long 0x0 "RGIDR_ARSC0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_ARSC1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_ARSC2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_ARSC3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_ARSC4,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_ARSC5,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_ARSC6,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_ARSC7,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_ARSC8,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_ARSTM0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_ARSTM1,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_CSD1S,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_AXIFBABUSTOP0,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_AXIFBABUSTOP1,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_ARSTM2,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_ARSTM3,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDR_ARSTM4,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDR_ARSTM5,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDR_ARSTM6,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDR_ARSTM7,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDR_ARSTM8,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDR_ECMTOP,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDR_FBA,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDR_FBC,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDR_AXICCI00,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDR_AXICCI01,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDR_AXICCI10,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDR_AXICCI11,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDR_AXICCI12,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDR_AXICCI13,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDR_AXICCI14,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDR_AXICCI15,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDR_AXICCI2,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x84 "RGIDR_AXICCI3,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x84 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x88 "RGIDR_AXICCI4,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x88 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8C "RGIDR_AXICCI5,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x90 "RGIDR_AXICCI6,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x90 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x94 "RGIDR_AXICCI7,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x94 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x98 "RGIDR_AXICCI8,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x98 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x9C "RGIDR_AXICCI9,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x9C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA0 "RGIDR_ECMSTM,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA0 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19861D00++0xA3
line.long 0x0 "RGIDW_ARSC0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_ARSC1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ARSC2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARSC3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_ARSC4,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_ARSC5,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_ARSC6,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_ARSC7,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_ARSC8,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_ARSTM0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_ARSTM1,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_CSD1S,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_AXIFBABUSTOP0,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_AXIFBABUSTOP1,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_ARSTM2,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_ARSTM3,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDW_ARSTM4,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDW_ARSTM5,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDW_ARSTM6,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDW_ARSTM7,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDW_ARSTM8,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDW_ECMTOP,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDW_FBA,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDW_FBC,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDW_AXICCI00,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDW_AXICCI01,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDW_AXICCI10,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDW_AXICCI11,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDW_AXICCI12,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDW_AXICCI13,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDW_AXICCI14,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDW_AXICCI15,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDW_AXICCI2,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x84 "RGIDW_AXICCI3,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x84 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x88 "RGIDW_AXICCI4,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x88 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8C "RGIDW_AXICCI5,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x90 "RGIDW_AXICCI6,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x90 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x94 "RGIDW_AXICCI7,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x94 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x98 "RGIDW_AXICCI8,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x98 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x9C "RGIDW_AXICCI9,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x9C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA0 "RGIDW_ECMSTM,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA0 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19862D00++0xA3
line.long 0x0 "SEC_ARSC0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_ARSC1,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_ARSC2,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_ARSC3,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_ARSC4,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_ARSC5,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_ARSC6,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_ARSC7,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_ARSC8,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_ARSTM0,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_ARSTM1,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_CSD1S,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_AXIFBABUSTOP0,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_AXIFBABUSTOP1,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_ARSTM2,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_ARSTM3,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
line.long 0x40 "SEC_ARSTM4,"
hexmask.long 0x40 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x40 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x40 0. "Reserved_0,Reserved" "0,1"
line.long 0x44 "SEC_ARSTM5,"
hexmask.long 0x44 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x44 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x44 0. "Reserved_0,Reserved" "0,1"
line.long 0x48 "SEC_ARSTM6,"
hexmask.long 0x48 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x48 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x48 0. "Reserved_0,Reserved" "0,1"
line.long 0x4C "SEC_ARSTM7,"
hexmask.long 0x4C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4C 0. "Reserved_0,Reserved" "0,1"
line.long 0x50 "SEC_ARSTM8,"
hexmask.long 0x50 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x50 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x50 0. "Reserved_0,Reserved" "0,1"
line.long 0x54 "SEC_ECMTOP,"
hexmask.long 0x54 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x54 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x54 0. "Reserved_0,Reserved" "0,1"
line.long 0x58 "SEC_FBA,"
hexmask.long 0x58 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x58 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x58 0. "Reserved_0,Reserved" "0,1"
line.long 0x5C "SEC_FBC,"
hexmask.long 0x5C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x5C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x5C 0. "Reserved_0,Reserved" "0,1"
line.long 0x60 "SEC_AXICCI00,"
hexmask.long 0x60 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x60 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x60 0. "Reserved_0,Reserved" "0,1"
line.long 0x64 "SEC_AXICCI01,"
hexmask.long 0x64 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x64 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x64 0. "Reserved_0,Reserved" "0,1"
line.long 0x68 "SEC_AXICCI10,"
hexmask.long 0x68 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x68 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x68 0. "Reserved_0,Reserved" "0,1"
line.long 0x6C "SEC_AXICCI11,"
hexmask.long 0x6C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x6C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x6C 0. "Reserved_0,Reserved" "0,1"
line.long 0x70 "SEC_AXICCI12,"
hexmask.long 0x70 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x70 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x70 0. "Reserved_0,Reserved" "0,1"
line.long 0x74 "SEC_AXICCI13,"
hexmask.long 0x74 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x74 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x74 0. "Reserved_0,Reserved" "0,1"
line.long 0x78 "SEC_AXICCI14,"
hexmask.long 0x78 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x78 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x78 0. "Reserved_0,Reserved" "0,1"
line.long 0x7C "SEC_AXICCI15,"
hexmask.long 0x7C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x7C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x7C 0. "Reserved_0,Reserved" "0,1"
line.long 0x80 "SEC_AXICCI2,"
hexmask.long 0x80 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x80 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x80 0. "Reserved_0,Reserved" "0,1"
line.long 0x84 "SEC_AXICCI3,"
hexmask.long 0x84 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x84 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x84 0. "Reserved_0,Reserved" "0,1"
line.long 0x88 "SEC_AXICCI4,"
hexmask.long 0x88 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x88 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x88 0. "Reserved_0,Reserved" "0,1"
line.long 0x8C "SEC_AXICCI5,"
hexmask.long 0x8C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8C 0. "Reserved_0,Reserved" "0,1"
line.long 0x90 "SEC_AXICCI6,"
hexmask.long 0x90 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x90 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x90 0. "Reserved_0,Reserved" "0,1"
line.long 0x94 "SEC_AXICCI7,"
hexmask.long 0x94 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x94 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x94 0. "Reserved_0,Reserved" "0,1"
line.long 0x98 "SEC_AXICCI8,"
hexmask.long 0x98 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x98 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x98 0. "Reserved_0,Reserved" "0,1"
line.long 0x9C "SEC_AXICCI9,"
hexmask.long 0x9C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x9C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x9C 0. "Reserved_0,Reserved" "0,1"
line.long 0xA0 "SEC_ECMSTM,"
hexmask.long 0xA0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xA0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xA0 0. "Reserved_0,Reserved" "0,1"
group.long 0x19863910++0x3
line.long 0x0 "SAFERR_AXSC,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x19863920++0x3
line.long 0x0 "SAFID_AXSC,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x19864910++0x3
line.long 0x0 "SECERR_AXSC,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x19864920++0x3
line.long 0x0 "SECID_AXSC,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x19880004++0x13
line.long 0x0 "FDT_FBABUSIR0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_FBABUSIR1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x8 "FDT_FBABUSIR2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0xC "FDT_FBABUSIR3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x10 "FDT_FBABUSIR4,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x1988001C++0x7
line.long 0x0 "FDT_IMP0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_IMP1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x19880028++0x7
line.long 0x0 "FDT_DSPD,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_DSPP,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x19880904++0x17
line.long 0x0 "RGIDM_FBABUSIR0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_FBABUSIR1,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x8 "RGIDM_FBABUSIR2,"
hexmask.long 0x8 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x8 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0xC "RGIDM_FBABUSIR3,"
hexmask.long 0xC 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0xC 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x10 "RGIDM_FBABUSIR4,"
hexmask.long 0x10 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x10 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x14 "RGIDM_DSP00,"
hexmask.long 0x14 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x14 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x19880924++0x3
line.long 0x0 "RGIDM_DSP01,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x19880938++0x3
line.long 0x0 "RGIDM_DSP10,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x19880944++0x7B
line.long 0x0 "RGIDM_DSP11,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_DSP20,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x8 "RGIDM_DSP21,"
hexmask.long 0x8 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x8 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0xC "RGIDM_DSP30,"
hexmask.long 0xC 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0xC 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x10 "RGIDM_DSP31,"
hexmask.long 0x10 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x10 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x14 "RGIDM_IMP0R100,"
hexmask.long 0x14 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x14 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x18 "RGIDM_IMP0R101,"
hexmask.long 0x18 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x18 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x1C "RGIDM_IMP0R102,"
hexmask.long 0x1C 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x1C 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x20 "RGIDM_IMP0R103,"
hexmask.long 0x20 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x20 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x24 "RGIDM_IMP0R104,"
hexmask.long 0x24 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x24 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x28 "RGIDM_IMP0R105,"
hexmask.long 0x28 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x28 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x2C "RGIDM_IMP0R106,"
hexmask.long 0x2C 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x2C 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x30 "RGIDM_IMP0R107,"
hexmask.long 0x30 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x30 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x34 "RGIDM_IMP0R108,"
hexmask.long 0x34 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x34 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x38 "RGIDM_IMP0R109,"
hexmask.long 0x38 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x38 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x3C "RGIDM_IMP0R200,"
hexmask.long 0x3C 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x3C 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x40 "RGIDM_IMP0R201,"
hexmask.long 0x40 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x40 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x44 "RGIDM_IMP0R202,"
hexmask.long 0x44 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x44 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x48 "RGIDM_IMP0W100,"
hexmask.long 0x48 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x48 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4C "RGIDM_IMP0W101,"
hexmask.long 0x4C 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4C 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x50 "RGIDM_IMP0W102,"
hexmask.long 0x50 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x50 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x54 "RGIDM_IMP0W103,"
hexmask.long 0x54 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x54 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x58 "RGIDM_IMP0W104,"
hexmask.long 0x58 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x58 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x5C "RGIDM_IMP0W105,"
hexmask.long 0x5C 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x5C 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x60 "RGIDM_IMP0W106,"
hexmask.long 0x60 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x60 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x64 "RGIDM_IMP0W107,"
hexmask.long 0x64 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x64 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x68 "RGIDM_IMP0W108,"
hexmask.long 0x68 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x68 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x6C "RGIDM_IMP0W109,"
hexmask.long 0x6C 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x6C 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x70 "RGIDM_IMP0W200,"
hexmask.long 0x70 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x70 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x74 "RGIDM_IMP0W201,"
hexmask.long 0x74 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x74 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x78 "RGIDM_IMP0W202,"
hexmask.long 0x78 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x78 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x19881900++0x137
line.long 0x0 "RGIDR_ARIMP00,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_ARIMP01,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_ARIMP02,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_ARIMP03,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_ARIMP04,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_AXIFBABUSIR0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_AXIFBABUSIR1,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_AXIFBABUSIR2,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_AXIFBABUSIR3,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_AXIFBABUSIR4,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_AXIIMP0,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_CKMCNR,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_CKMDSP,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_ARIMP05,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_ARIMP06,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_ARIMP07,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDR_ARIMP08,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDR_CKMIR,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDR_ECMIR,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDR_DSPPS,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDR_IPMMUIR1,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDR_IPMMUIR0,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDR_IPMMUIR10,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDR_IPMMUIR11,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDR_IPMMUIR12,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDR_IPMMUIR13,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDR_IPMMUIR14,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDR_IPMMUIR15,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDR_IPMMUIR2,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDR_IPMMUIR3,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDR_IPMMUIR4,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDR_IPMMUIR5,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDR_IPMMUIR6,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x84 "RGIDR_IPMMUIR7,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x84 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x88 "RGIDR_IPMMUIR8,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x88 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8C "RGIDR_IPMMUIR9,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x90 "RGIDR_AXIDSP0,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x90 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x94 "RGIDR_AXIDSP1,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x94 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x98 "RGIDR_AXIDSP2,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x98 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x9C "RGIDR_AXIDSP3,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x9C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA0 "RGIDR_ARDSP0,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA4 "RGIDR_ARDSP1,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA8 "RGIDR_ARDSP2,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xAC "RGIDR_ARDSP3,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xAC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB0 "RGIDR_ARDSP4,"
hexmask.long.word 0xB0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB4 "RGIDR_ARDSP5,"
hexmask.long.word 0xB4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB8 "RGIDR_ARDSP6,"
hexmask.long.word 0xB8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xBC "RGIDR_ARDSP7,"
hexmask.long.word 0xBC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xBC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC0 "RGIDR_ECMDSP,"
hexmask.long.word 0xC0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC4 "RGIDR_IMPM0100,"
hexmask.long.word 0xC4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC8 "RGIDR_IMPM0101,"
hexmask.long.word 0xC8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xCC "RGIDR_IMPM0102,"
hexmask.long.word 0xCC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xCC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD0 "RGIDR_IMPM0103,"
hexmask.long.word 0xD0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD4 "RGIDR_IMPM0104,"
hexmask.long.word 0xD4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD8 "RGIDR_IMPM0105,"
hexmask.long.word 0xD8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xDC "RGIDR_IMPM0106,"
hexmask.long.word 0xDC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xDC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE0 "RGIDR_IMPM0107,"
hexmask.long.word 0xE0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE4 "RGIDR_IMPM0200,"
hexmask.long.word 0xE4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE8 "RGIDR_IMPM0201,"
hexmask.long.word 0xE8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xEC "RGIDR_IMPS0000,"
hexmask.long.word 0xEC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xEC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF0 "RGIDR_IMPS0001,"
hexmask.long.word 0xF0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF4 "RGIDR_IMPS0002,"
hexmask.long.word 0xF4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF8 "RGIDR_IMPS0003,"
hexmask.long.word 0xF8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xFC "RGIDR_IMPS0100,"
hexmask.long.word 0xFC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xFC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x100 "RGIDR_IMPS0101,"
hexmask.long.word 0x100 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x100 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x104 "RGIDR_IMPS0102,"
hexmask.long.word 0x104 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x104 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x108 "RGIDR_IMPS0103,"
hexmask.long.word 0x108 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x108 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10C "RGIDR_IMPS0104,"
hexmask.long.word 0x10C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x110 "RGIDR_IMPS0105,"
hexmask.long.word 0x110 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x110 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x114 "RGIDR_IMPS0106,"
hexmask.long.word 0x114 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x114 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x118 "RGIDR_IMPS0107,"
hexmask.long.word 0x118 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x118 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x11C "RGIDR_IMPS0108,"
hexmask.long.word 0x11C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x11C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x120 "RGIDR_IMPS0109,"
hexmask.long.word 0x120 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x120 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x124 "RGIDR_IMPS0110,"
hexmask.long.word 0x124 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x124 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x128 "RGIDR_IMPS0111,"
hexmask.long.word 0x128 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x128 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x12C "RGIDR_IMPS0200,"
hexmask.long.word 0x12C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x12C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x130 "RGIDR_IMPS0201,"
hexmask.long.word 0x130 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x130 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x134 "RGIDR_IMPS0202,"
hexmask.long.word 0x134 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x134 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19881D00++0x137
line.long 0x0 "RGIDW_ARIMP00,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_ARIMP01,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ARIMP02,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARIMP03,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_ARIMP04,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_AXIFBABUSIR0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_AXIFBABUSIR1,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_AXIFBABUSIR2,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_AXIFBABUSIR3,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_AXIFBABUSIR4,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_AXIIMP0,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_CKMCNR,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_CKMDSP,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_ARIMP05,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_ARIMP06,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_ARIMP07,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDW_ARIMP08,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDW_CKMIR,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDW_ECMIR,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDW_DSPPS,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDW_IPMMUIR1,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDW_IPMMUIR0,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDW_IPMMUIR10,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDW_IPMMUIR11,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDW_IPMMUIR12,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDW_IPMMUIR13,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDW_IPMMUIR14,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDW_IPMMUIR15,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDW_IPMMUIR2,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDW_IPMMUIR3,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDW_IPMMUIR4,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDW_IPMMUIR5,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDW_IPMMUIR6,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x84 "RGIDW_IPMMUIR7,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x84 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x88 "RGIDW_IPMMUIR8,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x88 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8C "RGIDW_IPMMUIR9,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x90 "RGIDW_AXIDSP0,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x90 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x94 "RGIDW_AXIDSP1,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x94 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x98 "RGIDW_AXIDSP2,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x98 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x9C "RGIDW_AXIDSP3,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x9C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA0 "RGIDW_ARDSP0,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA4 "RGIDW_ARDSP1,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA8 "RGIDW_ARDSP2,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xAC "RGIDW_ARDSP3,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xAC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB0 "RGIDW_ARDSP4,"
hexmask.long.word 0xB0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB4 "RGIDW_ARDSP5,"
hexmask.long.word 0xB4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB8 "RGIDW_ARDSP6,"
hexmask.long.word 0xB8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xBC "RGIDW_ARDSP7,"
hexmask.long.word 0xBC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xBC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC0 "RGIDW_ECMDSP,"
hexmask.long.word 0xC0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC4 "RGIDW_IMPM0100,"
hexmask.long.word 0xC4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC8 "RGIDW_IMPM0101,"
hexmask.long.word 0xC8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xCC "RGIDW_IMPM0102,"
hexmask.long.word 0xCC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xCC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD0 "RGIDW_IMPM0103,"
hexmask.long.word 0xD0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD4 "RGIDW_IMPM0104,"
hexmask.long.word 0xD4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD8 "RGIDW_IMPM0105,"
hexmask.long.word 0xD8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xDC "RGIDW_IMPM0106,"
hexmask.long.word 0xDC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xDC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE0 "RGIDW_IMPM0107,"
hexmask.long.word 0xE0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE4 "RGIDW_IMPM0200,"
hexmask.long.word 0xE4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE8 "RGIDW_IMPM0201,"
hexmask.long.word 0xE8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xEC "RGIDW_IMPS0000,"
hexmask.long.word 0xEC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xEC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF0 "RGIDW_IMPS0001,"
hexmask.long.word 0xF0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF4 "RGIDW_IMPS0002,"
hexmask.long.word 0xF4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF8 "RGIDW_IMPS0003,"
hexmask.long.word 0xF8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xFC "RGIDW_IMPS0100,"
hexmask.long.word 0xFC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xFC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x100 "RGIDW_IMPS0101,"
hexmask.long.word 0x100 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x100 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x104 "RGIDW_IMPS0102,"
hexmask.long.word 0x104 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x104 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x108 "RGIDW_IMPS0103,"
hexmask.long.word 0x108 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x108 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10C "RGIDW_IMPS0104,"
hexmask.long.word 0x10C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x110 "RGIDW_IMPS0105,"
hexmask.long.word 0x110 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x110 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x114 "RGIDW_IMPS0106,"
hexmask.long.word 0x114 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x114 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x118 "RGIDW_IMPS0107,"
hexmask.long.word 0x118 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x118 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x11C "RGIDW_IMPS0108,"
hexmask.long.word 0x11C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x11C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x120 "RGIDW_IMPS0109,"
hexmask.long.word 0x120 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x120 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x124 "RGIDW_IMPS0110,"
hexmask.long.word 0x124 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x124 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x128 "RGIDW_IMPS0111,"
hexmask.long.word 0x128 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x128 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x12C "RGIDW_IMPS0200,"
hexmask.long.word 0x12C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x12C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x130 "RGIDW_IMPS0201,"
hexmask.long.word 0x130 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x130 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x134 "RGIDW_IMPS0202,"
hexmask.long.word 0x134 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x134 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19882D00++0xC3
line.long 0x0 "SEC_ARIMP00,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_ARIMP01,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_ARIMP02,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_ARIMP03,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_ARIMP04,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_AXIFBABUSIR0,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_AXIFBABUSIR1,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_AXIFBABUSIR2,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_AXIFBABUSIR3,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_AXIFBABUSIR4,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_AXIIMP0,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_CKMCNR,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_CKMDSP,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_ARIMP05,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_ARIMP06,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_ARIMP07,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
line.long 0x40 "SEC_ARIMP08,"
hexmask.long 0x40 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x40 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x40 0. "Reserved_0,Reserved" "0,1"
line.long 0x44 "SEC_CKMIR,"
hexmask.long 0x44 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x44 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x44 0. "Reserved_0,Reserved" "0,1"
line.long 0x48 "SEC_ECMIR,"
hexmask.long 0x48 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x48 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x48 0. "Reserved_0,Reserved" "0,1"
line.long 0x4C "SEC_DSPPS,"
hexmask.long 0x4C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4C 0. "Reserved_0,Reserved" "0,1"
line.long 0x50 "SEC_IPMMUIR1,"
hexmask.long 0x50 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x50 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x50 0. "Reserved_0,Reserved" "0,1"
line.long 0x54 "SEC_IPMMUIR0,"
hexmask.long 0x54 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x54 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x54 0. "Reserved_0,Reserved" "0,1"
line.long 0x58 "SEC_IPMMUIR10,"
hexmask.long 0x58 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x58 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x58 0. "Reserved_0,Reserved" "0,1"
line.long 0x5C "SEC_IPMMUIR11,"
hexmask.long 0x5C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x5C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x5C 0. "Reserved_0,Reserved" "0,1"
line.long 0x60 "SEC_IPMMUIR12,"
hexmask.long 0x60 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x60 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x60 0. "Reserved_0,Reserved" "0,1"
line.long 0x64 "SEC_IPMMUIR13,"
hexmask.long 0x64 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x64 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x64 0. "Reserved_0,Reserved" "0,1"
line.long 0x68 "SEC_IPMMUIR14,"
hexmask.long 0x68 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x68 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x68 0. "Reserved_0,Reserved" "0,1"
line.long 0x6C "SEC_IPMMUIR15,"
hexmask.long 0x6C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x6C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x6C 0. "Reserved_0,Reserved" "0,1"
line.long 0x70 "SEC_IPMMUIR2,"
hexmask.long 0x70 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x70 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x70 0. "Reserved_0,Reserved" "0,1"
line.long 0x74 "SEC_IPMMUIR3,"
hexmask.long 0x74 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x74 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x74 0. "Reserved_0,Reserved" "0,1"
line.long 0x78 "SEC_IPMMUIR4,"
hexmask.long 0x78 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x78 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x78 0. "Reserved_0,Reserved" "0,1"
line.long 0x7C "SEC_IPMMUIR5,"
hexmask.long 0x7C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x7C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x7C 0. "Reserved_0,Reserved" "0,1"
line.long 0x80 "SEC_IPMMUIR6,"
hexmask.long 0x80 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x80 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x80 0. "Reserved_0,Reserved" "0,1"
line.long 0x84 "SEC_IPMMUIR7,"
hexmask.long 0x84 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x84 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x84 0. "Reserved_0,Reserved" "0,1"
line.long 0x88 "SEC_IPMMUIR8,"
hexmask.long 0x88 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x88 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x88 0. "Reserved_0,Reserved" "0,1"
line.long 0x8C "SEC_IPMMUIR9,"
hexmask.long 0x8C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8C 0. "Reserved_0,Reserved" "0,1"
line.long 0x90 "SEC_AXIDSP0,"
hexmask.long 0x90 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x90 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x90 0. "Reserved_0,Reserved" "0,1"
line.long 0x94 "SEC_AXIDSP1,"
hexmask.long 0x94 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x94 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x94 0. "Reserved_0,Reserved" "0,1"
line.long 0x98 "SEC_AXIDSP2,"
hexmask.long 0x98 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x98 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x98 0. "Reserved_0,Reserved" "0,1"
line.long 0x9C "SEC_AXIDSP3,"
hexmask.long 0x9C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x9C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x9C 0. "Reserved_0,Reserved" "0,1"
line.long 0xA0 "SEC_ARDSP0,"
hexmask.long 0xA0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xA0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xA0 0. "Reserved_0,Reserved" "0,1"
line.long 0xA4 "SEC_ARDSP1,"
hexmask.long 0xA4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xA4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xA4 0. "Reserved_0,Reserved" "0,1"
line.long 0xA8 "SEC_ARDSP2,"
hexmask.long 0xA8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xA8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xA8 0. "Reserved_0,Reserved" "0,1"
line.long 0xAC "SEC_ARDSP3,"
hexmask.long 0xAC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xAC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xAC 0. "Reserved_0,Reserved" "0,1"
line.long 0xB0 "SEC_ARDSP4,"
hexmask.long 0xB0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xB0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xB0 0. "Reserved_0,Reserved" "0,1"
line.long 0xB4 "SEC_ARDSP5,"
hexmask.long 0xB4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xB4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xB4 0. "Reserved_0,Reserved" "0,1"
line.long 0xB8 "SEC_ARDSP6,"
hexmask.long 0xB8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xB8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xB8 0. "Reserved_0,Reserved" "0,1"
line.long 0xBC "SEC_ARDSP7,"
hexmask.long 0xBC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xBC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xBC 0. "Reserved_0,Reserved" "0,1"
line.long 0xC0 "SEC_ECMDSP,"
hexmask.long 0xC0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC0 0. "Reserved_0,Reserved" "0,1"
group.long 0x19883910++0x3
line.long 0x0 "SAFERR_AXIMP0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x19883920++0x3
line.long 0x0 "SAFID_AXIMP0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x19884910++0x3
line.long 0x0 "SECERR_AXIMP0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x19884920++0x3
line.long 0x0 "SECID_AXIMP0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x198DF940++0x3
line.long 0x0 "FIXSTIR0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows FIXED ERROR Status."
group.long 0x198DF980++0xF
line.long 0x0 "ROUERRSTIR0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x4 "ROUERRSTIR1,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0x8 "ROUERRSTIR2,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
line.long 0xC "ROUERRSTIR3,"
hexmask.long 0xC 0.--31. 1. "STATUS_31_0,This field shows Routing Error Status."
group.long 0x198DF9C0++0xF
line.long 0x0 "EDCSTIR0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x4 "EDCSTIR1,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0x8 "EDCSTIR2,"
hexmask.long 0x8 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
line.long 0xC "EDCSTIR3,"
hexmask.long 0xC 0.--31. 1. "STATUS_31_0,This field shows EDC Status."
group.long 0x198DFA00++0x7
line.long 0x0 "LSCHKSTIR0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
line.long 0x4 "LSCHKSTIR1,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows LSCHK Status."
group.long 0x198DFA40++0x3
line.long 0x0 "WCRCERRSTIR0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Write Read check Error Status."
group.long 0x198DFA80++0x7
line.long 0x0 "RSCHKSTIR0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
line.long 0x4 "RSCHKSTIR1,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows RSCHK Status."
group.long 0x198DFAC0++0x3
line.long 0x0 "TIDSTIR0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows TID Error Status."
group.long 0x198DFB00++0x3
line.long 0x0 "DCLSSTIR0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows DCLS Error Status."
group.long 0x198DFB80++0x3
line.long 0x0 "SECERRSTIR0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Security Access Error Status."
group.long 0x198DFBC0++0x3
line.long 0x0 "SAFERRSTIR0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Safety Access Error Status."
group.long 0x198DFC00++0x3
line.long 0x0 "ICISTPSTIR0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows icistp Status."
group.long 0x198DFC80++0x3
line.long 0x0 "OTHSTIR0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows Other Error Status."
group.long 0x198DFCC0++0x3
line.long 0x0 "FIXINTENIR0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows FIXED ERROR Interrupt Enable."
group.long 0x198DFD00++0xF
line.long 0x0 "ROUINTENIR0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x4 "ROUINTENIR1,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0x8 "ROUINTENIR2,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
line.long 0xC "ROUINTENIR3,"
hexmask.long 0xC 0.--31. 1. "INTEN_31_0,This field shows Routing Error Interrupt Enable."
group.long 0x198DFD40++0xF
line.long 0x0 "EDCINTENIR0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x4 "EDCINTENIR1,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0x8 "EDCINTENIR2,"
hexmask.long 0x8 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
line.long 0xC "EDCINTENIR3,"
hexmask.long 0xC 0.--31. 1. "INTEN_31_0,This field shows EDC Interrupt Enable."
group.long 0x198DFD80++0x7
line.long 0x0 "LSCHKINTENIR0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
line.long 0x4 "LSCHKINTENIR1,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows LSCHK Interrupt Enable."
group.long 0x198DFDC0++0x3
line.long 0x0 "WCRCERRINTENIR0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Write Read check Error Interrupt Enable."
group.long 0x198DFE00++0x7
line.long 0x0 "RSCHKINTENIR0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
line.long 0x4 "RSCHKINTENIR1,"
hexmask.long 0x4 0.--31. 1. "INTEN_31_0,This field shows RSCHK Interrupt Enable."
group.long 0x198DFE40++0x3
line.long 0x0 "TIDINTENIR0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows TID Error Interrupt Enable."
group.long 0x198DFE80++0x3
line.long 0x0 "DCLSINTENIR0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows DCLS Error Interrupt Enable."
group.long 0x198DFF00++0x3
line.long 0x0 "SECERRINTENIR0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Security Access Error Interrupt Enable."
group.long 0x198DFF40++0x3
line.long 0x0 "SAFERRINTENIR0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Safety Access Error Interrupt Enable."
group.long 0x198DFF80++0x3
line.long 0x0 "ICISTPINTENIR0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows icistp Interrupt Enable."
group.long 0x198E0000++0x3
line.long 0x0 "OTHINTENIR0,"
hexmask.long 0x0 0.--31. 1. "INTEN_31_0,This field shows Other Error Interrupt Enable."
group.long 0x198E0040++0x3
line.long 0x0 "FIXDUMMYIR0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows FIXED Dummy error enable."
group.long 0x198E0080++0xF
line.long 0x0 "ROUERRDUMMYIR0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x4 "ROUERRDUMMYIR1,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0x8 "ROUERRDUMMYIR2,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
line.long 0xC "ROUERRDUMMYIR3,"
hexmask.long 0xC 0.--31. 1. "DUMMY_31_0,This field shows Routing Dummy error enable."
group.long 0x198E00C0++0xF
line.long 0x0 "EDCDUMMYIR0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x4 "EDCDUMMYIR1,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0x8 "EDCDUMMYIR2,"
hexmask.long 0x8 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
line.long 0xC "EDCDUMMYIR3,"
hexmask.long 0xC 0.--31. 1. "DUMMY_31_0,This field shows EDC Dummy error enable."
group.long 0x198E0100++0x7
line.long 0x0 "LSCHKDUMMYIR0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
line.long 0x4 "LSCHKDUMMYIR1,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows LSCHK Dummy error enable."
group.long 0x198E0140++0x3
line.long 0x0 "WCRCERRDUMMYIR0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Write Read check Dummy error enable."
group.long 0x198E0180++0x7
line.long 0x0 "RSCHKDUMMYIR0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
line.long 0x4 "RSCHKDUMMYIR1,"
hexmask.long 0x4 0.--31. 1. "DUMMY_31_0,This field shows RSCHK Dummy error enable."
group.long 0x198E01C0++0x3
line.long 0x0 "TIDDUMMYIR0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows TID Dummy error enable."
group.long 0x198E0200++0x3
line.long 0x0 "DCLSDUMMYIR0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows DCLS Dummy error enable."
group.long 0x198E0280++0x3
line.long 0x0 "SECERRDUMMYIR0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Security Access Dummy error enable."
group.long 0x198E02C0++0x3
line.long 0x0 "SAFERRDUMMYIR0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Safety Access Dummy error enable."
group.long 0x198E0300++0x3
line.long 0x0 "ICISTPDUMMYIR0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows icistp Dummy error enable."
group.long 0x198E0380++0x3
line.long 0x0 "OTHDUMMYIR0,"
hexmask.long 0x0 0.--31. 1. "DUMMY_31_0,This field shows Other Dummy error enable."
group.long 0x19C30000++0xF
line.long 0x0 "FDT_PERI_RTDM0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_PERI_RTDM1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x8 "FDT_PERI_RTDM2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0xC "FDT_PERI_RTDM3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x19C31900++0xF
line.long 0x0 "RGIDR_DMAWCRC0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_DMAWCRC1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_DMAWCRC2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_DMAWCRC3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19C31D00++0xF
line.long 0x0 "RGIDW_DMAWCRC0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_DMAWCRC1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_DMAWCRC2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_DMAWCRC3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19C32D00++0xF
line.long 0x0 "SEC_DMAWCRC0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_DMAWCRC1,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_DMAWCRC2,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_DMAWCRC3,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
group.long 0x19C33910++0x3
line.long 0x0 "SAFERR_AXRD,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x19C33920++0x3
line.long 0x0 "SAFID_AXRD,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x19C34910++0x3
line.long 0x0 "SECERR_AXRD,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x19C34920++0x3
line.long 0x0 "SECID_AXRD,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x19C40000++0x3
line.long 0x0 "FDT_AXRC2AXRT,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x19C40008++0x17
line.long 0x0 "FDT_BUS_RTDM0M,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_BUS_RTDM1M,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x8 "FDT_BUS_RTDM2M,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0xC "FDT_BUS_RTDM3M,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x10 "FDT_CR52SS0,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x14 "FDT_CSD,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x19C40024++0x13
line.long 0x0 "FDT_INTAP0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_MEM_RTDM0,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x8 "FDT_MEM_RTDM1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0xC "FDT_MEM_RTDM2,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x10 "FDT_MEM_RTDM3,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x19C4005C++0x7
line.long 0x0 "FDT_CR52SS1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
line.long 0x4 "FDT_CR52SS2,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x19C40918++0x7
line.long 0x0 "RGIDM_CR52SS0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_CSD,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x19C40924++0x3
line.long 0x0 "RGIDM_INTAP0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x19C4095C++0x7
line.long 0x0 "RGIDM_CR52SS1,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "RGID_3_0,Region ID value"
line.long 0x4 "RGIDM_CR52SS2,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "RGID_3_0,Region ID value"
group.long 0x19C41100++0xFF
line.long 0x0 "RGIDMEN_RTDM0_CH0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x4 "RGIDMEN_RTDM0_CH1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x8 "RGIDMEN_RTDM0_CH2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xC "RGIDMEN_RTDM0_CH3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x10 "RGIDMEN_RTDM0_CH4,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x14 "RGIDMEN_RTDM0_CH5,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x18 "RGIDMEN_RTDM0_CH6,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x1C "RGIDMEN_RTDM0_CH7,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x20 "RGIDMEN_RTDM0_CH8,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x24 "RGIDMEN_RTDM0_CH9,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x28 "RGIDMEN_RTDM0_CH10,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x2C "RGIDMEN_RTDM0_CH11,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x30 "RGIDMEN_RTDM0_CH12,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x34 "RGIDMEN_RTDM0_CH13,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x38 "RGIDMEN_RTDM0_CH14,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x3C "RGIDMEN_RTDM0_CH15,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x40 "RGIDMEN_RTDM1_CH0,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x44 "RGIDMEN_RTDM1_CH1,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x48 "RGIDMEN_RTDM1_CH2,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x4C "RGIDMEN_RTDM1_CH3,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x50 "RGIDMEN_RTDM1_CH4,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x54 "RGIDMEN_RTDM1_CH5,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x58 "RGIDMEN_RTDM1_CH6,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x5C "RGIDMEN_RTDM1_CH7,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x60 "RGIDMEN_RTDM1_CH8,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x64 "RGIDMEN_RTDM1_CH9,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x68 "RGIDMEN_RTDM1_CH10,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x6C "RGIDMEN_RTDM1_CH11,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x70 "RGIDMEN_RTDM1_CH12,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x74 "RGIDMEN_RTDM1_CH13,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x78 "RGIDMEN_RTDM1_CH14,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x7C "RGIDMEN_RTDM1_CH15,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x80 "RGIDMEN_RTDM2_CH0,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x84 "RGIDMEN_RTDM2_CH1,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x84 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x88 "RGIDMEN_RTDM2_CH2,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x88 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x8C "RGIDMEN_RTDM2_CH3,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8C 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x90 "RGIDMEN_RTDM2_CH4,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x90 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x94 "RGIDMEN_RTDM2_CH5,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x94 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x98 "RGIDMEN_RTDM2_CH6,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x98 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0x9C "RGIDMEN_RTDM2_CH7,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x9C 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xA0 "RGIDMEN_RTDM2_CH8,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA0 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xA4 "RGIDMEN_RTDM2_CH9,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA4 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xA8 "RGIDMEN_RTDM2_CH10,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA8 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xAC "RGIDMEN_RTDM2_CH11,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xAC 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xB0 "RGIDMEN_RTDM2_CH12,"
hexmask.long.word 0xB0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB0 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xB4 "RGIDMEN_RTDM2_CH13,"
hexmask.long.word 0xB4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB4 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xB8 "RGIDMEN_RTDM2_CH14,"
hexmask.long.word 0xB8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB8 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xBC "RGIDMEN_RTDM2_CH15,"
hexmask.long.word 0xBC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xBC 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xC0 "RGIDMEN_RTDM3_CH0,"
hexmask.long.word 0xC0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC0 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xC4 "RGIDMEN_RTDM3_CH1,"
hexmask.long.word 0xC4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC4 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xC8 "RGIDMEN_RTDM3_CH2,"
hexmask.long.word 0xC8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC8 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xCC "RGIDMEN_RTDM3_CH3,"
hexmask.long.word 0xCC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xCC 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xD0 "RGIDMEN_RTDM3_CH4,"
hexmask.long.word 0xD0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD0 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xD4 "RGIDMEN_RTDM3_CH5,"
hexmask.long.word 0xD4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD4 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xD8 "RGIDMEN_RTDM3_CH6,"
hexmask.long.word 0xD8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD8 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xDC "RGIDMEN_RTDM3_CH7,"
hexmask.long.word 0xDC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xDC 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xE0 "RGIDMEN_RTDM3_CH8,"
hexmask.long.word 0xE0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE0 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xE4 "RGIDMEN_RTDM3_CH9,"
hexmask.long.word 0xE4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE4 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xE8 "RGIDMEN_RTDM3_CH10,"
hexmask.long.word 0xE8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE8 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xEC "RGIDMEN_RTDM3_CH11,"
hexmask.long.word 0xEC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xEC 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xF0 "RGIDMEN_RTDM3_CH12,"
hexmask.long.word 0xF0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF0 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xF4 "RGIDMEN_RTDM3_CH13,"
hexmask.long.word 0xF4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF4 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xF8 "RGIDMEN_RTDM3_CH14,"
hexmask.long.word 0xF8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF8 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
line.long 0xFC "RGIDMEN_RTDM3_CH15,"
hexmask.long.word 0xFC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xFC 0.--15. 1. "RGIDEN_15_0,Region ID Enable for AXI Master"
group.long 0x19C41900++0x127
line.long 0x0 "RGIDR_ARMREG00,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_ARMREG01,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_ARMREG10,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_ARMREG11,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_ARMREG12,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_ARMREG13,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_ARMREG14,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_AXICR52SS0,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_AXICSD0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_AXIINTAP0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_AXIINTAP1,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_AXISECROM,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_AXISYSRAM0,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_AXISYSRAM1,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_ARGREG15,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_ARMREG2,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDR_ARMREG3,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDR_ARMREG4,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDR_ARMREG5,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDR_ARMREG6,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDR_ARMREG7,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDR_ARMREG8,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDR_ARMREG9,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDR_ARRD0,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDR_ARRD1,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDR_ARRD2,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDR_ARRD3,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDR_ARRD4,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDR_ARRD5,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDR_ARRD6,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDR_ARRD7,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDR_ARRD8,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDR_ARRT0,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x84 "RGIDR_ARRT1,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x84 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x88 "RGIDR_ARRT2,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x88 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8C "RGIDR_ARRT3,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x90 "RGIDR_ARRT4,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x90 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x94 "RGIDR_ARRT5,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x94 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x98 "RGIDR_ARRT6,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x98 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x9C "RGIDR_ARRT7,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x9C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA0 "RGIDR_ARRT8,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA4 "RGIDR_CKMRT,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA8 "RGIDR_CRC0,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xAC "RGIDR_CRC1,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xAC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB0 "RGIDR_CRC2,"
hexmask.long.word 0xB0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB4 "RGIDR_CRC3,"
hexmask.long.word 0xB4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB8 "RGIDR_CSD,"
hexmask.long.word 0xB8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xBC "RGIDR_ECM,"
hexmask.long.word 0xBC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xBC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC0 "RGIDR_ECMRT,"
hexmask.long.word 0xC0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC4 "RGIDR_FBACR52,"
hexmask.long.word 0xC4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC8 "RGIDR_FBART,"
hexmask.long.word 0xC8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xCC "RGIDR_INTTP,"
hexmask.long.word 0xCC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xCC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD0 "RGIDR_IPMMURT000,"
hexmask.long.word 0xD0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD4 "RGIDR_IPMMURT100,"
hexmask.long.word 0xD4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD8 "RGIDR_KCRC4,"
hexmask.long.word 0xD8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xDC "RGIDR_KCRC5,"
hexmask.long.word 0xDC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xDC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE0 "RGIDR_KCRC6,"
hexmask.long.word 0xE0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE4 "RGIDR_KCRC7,"
hexmask.long.word 0xE4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE8 "RGIDR_MFI00,"
hexmask.long.word 0xE8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xEC "RGIDR_MFI01,"
hexmask.long.word 0xEC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xEC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF0 "RGIDR_MFI10,"
hexmask.long.word 0xF0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF4 "RGIDR_MFI02,"
hexmask.long.word 0xF4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF8 "RGIDR_MFI03,"
hexmask.long.word 0xF8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xFC "RGIDR_MFI04,"
hexmask.long.word 0xFC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xFC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x100 "RGIDR_MFI05,"
hexmask.long.word 0x100 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x100 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x104 "RGIDR_MFI06,"
hexmask.long.word 0x104 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x104 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x108 "RGIDR_MFI07,"
hexmask.long.word 0x108 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x108 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10C "RGIDR_MFI08,"
hexmask.long.word 0x10C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x110 "RGIDR_MFI09,"
hexmask.long.word 0x110 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x110 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x114 "RGIDR_MFI15,"
hexmask.long.word 0x114 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x114 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x118 "RGIDR_CKMCR52,"
hexmask.long.word 0x118 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x118 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x11C "RGIDR_RTDM0P,"
hexmask.long.word 0x11C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x11C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x120 "RGIDR_ECMRD,"
hexmask.long.word 0x120 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x120 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x124 "RGIDR_RTDM1P,"
hexmask.long.word 0x124 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x124 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19C41A2C++0x3F
line.long 0x0 "RGIDR_RTDM2P,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_SYSRAM10,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_RTDM3P,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_SYSRAM00,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_TSIPL0,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_TSIPL1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_TSIPL2,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_TSIPL3,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_TSIPL4,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_TSIPL5,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_TSIPL6,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_TSIPL7,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_WCRC0,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_WCRC1,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_WCRC2,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_WCRC3,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19C41A80++0x1BF
line.long 0x0 "RGIDR_MFI11,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_MFI12,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_MFI13,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_MFI14,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_IPMMURT001,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_IPMMURT010,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_IPMMURT011,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_IPMMURT012,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_IPMMURT013,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_IPMMURT014,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_IPMMURT015,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_IPMMURT002,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_IPMMURT003,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_IPMMURT004,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_IPMMURT005,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_IPMMURT006,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDR_IPMMURT007,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDR_IPMMURT008,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDR_IPMMURT009,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDR_IPKMURT101,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDR_IPMMURT110,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDR_IPMMURT111,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDR_IPMMURT112,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDR_IPMMURT113,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDR_IPMMURT114,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDR_IPMMURT115,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDR_IPMMURT102,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDR_IPMMURT103,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDR_IPMMURT104,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDR_IPMMURT105,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDR_IPMMURT106,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDR_IPMMURT107,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDR_RTDM000,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x84 "RGIDR_RTDM001,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x84 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x88 "RGIDR_RTDM010,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x88 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8C "RGIDR_RTDM011,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x90 "RGIDR_RTDM012,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x90 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x94 "RGIDR_RTDM013,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x94 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x98 "RGIDR_RTDM014,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x98 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x9C "RGIDR_RTDM015,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x9C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA0 "RGIDR_RTDM002,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA4 "RGIDR_RTDM003,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA8 "RGIDR_RTDM004,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xAC "RGIDR_RTDM005,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xAC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB0 "RGIDR_RTDM006,"
hexmask.long.word 0xB0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB4 "RGIDR_RTDM007,"
hexmask.long.word 0xB4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB8 "RGIDR_RTDM008,"
hexmask.long.word 0xB8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xBC "RGIDR_RTDM009,"
hexmask.long.word 0xBC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xBC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC0 "RGIDR_RTDM100,"
hexmask.long.word 0xC0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC4 "RGIDR_RTDM101,"
hexmask.long.word 0xC4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC8 "RGIDR_RTDM110,"
hexmask.long.word 0xC8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xCC "RGIDR_RTDM111,"
hexmask.long.word 0xCC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xCC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD0 "RGIDR_RTDM112,"
hexmask.long.word 0xD0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD4 "RGIDR_RTDM113,"
hexmask.long.word 0xD4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD8 "RGIDR_RTDM114,"
hexmask.long.word 0xD8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xDC "RGIDR_RTDM115,"
hexmask.long.word 0xDC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xDC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE0 "RGIDR_RTDM102,"
hexmask.long.word 0xE0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE4 "RGIDR_RTDM103,"
hexmask.long.word 0xE4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE8 "RGIDR_RTDM104,"
hexmask.long.word 0xE8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xEC "RGIDR_RTDM105,"
hexmask.long.word 0xEC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xEC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF0 "RGIDR_RTDM106,"
hexmask.long.word 0xF0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF4 "RGIDR_RTDM107,"
hexmask.long.word 0xF4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF8 "RGIDR_RTDM108,"
hexmask.long.word 0xF8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xFC "RGIDR_RTDM109,"
hexmask.long.word 0xFC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xFC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x100 "RGIDR_RTDM200,"
hexmask.long.word 0x100 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x100 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x104 "RGIDR_RTDM201,"
hexmask.long.word 0x104 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x104 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x108 "RGIDR_RTDM210,"
hexmask.long.word 0x108 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x108 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10C "RGIDR_RTDM211,"
hexmask.long.word 0x10C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x110 "RGIDR_RTDM212,"
hexmask.long.word 0x110 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x110 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x114 "RGIDR_RTDM213,"
hexmask.long.word 0x114 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x114 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x118 "RGIDR_RTDM214,"
hexmask.long.word 0x118 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x118 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x11C "RGIDR_RTDM215,"
hexmask.long.word 0x11C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x11C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x120 "RGIDR_RTDM202,"
hexmask.long.word 0x120 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x120 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x124 "RGIDR_RTDM203,"
hexmask.long.word 0x124 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x124 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x128 "RGIDR_RTDM204,"
hexmask.long.word 0x128 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x128 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x12C "RGIDR_RTDM205,"
hexmask.long.word 0x12C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x12C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x130 "RGIDR_RTDM206,"
hexmask.long.word 0x130 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x130 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x134 "RGIDR_RTDM207,"
hexmask.long.word 0x134 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x134 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x138 "RGIDR_RTDM208,"
hexmask.long.word 0x138 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x138 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x13C "RGIDR_RTDM209,"
hexmask.long.word 0x13C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x13C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x140 "RGIDR_RTDM300,"
hexmask.long.word 0x140 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x140 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x144 "RGIDR_RTDM301,"
hexmask.long.word 0x144 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x144 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x148 "RGIDR_RTDM310,"
hexmask.long.word 0x148 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x148 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14C "RGIDR_RTDM311,"
hexmask.long.word 0x14C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x150 "RGIDR_RTDM312,"
hexmask.long.word 0x150 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x150 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x154 "RGIDR_RTDM313,"
hexmask.long.word 0x154 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x154 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x158 "RGIDR_RTDM314,"
hexmask.long.word 0x158 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x158 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x15C "RGIDR_RTDM315,"
hexmask.long.word 0x15C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x15C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x160 "RGIDR_RTDM302,"
hexmask.long.word 0x160 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x160 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x164 "RGIDR_RTDM303,"
hexmask.long.word 0x164 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x164 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x168 "RGIDR_RTDM304,"
hexmask.long.word 0x168 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x168 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x16C "RGIDR_RTDM305,"
hexmask.long.word 0x16C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x16C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x170 "RGIDR_RTDM306,"
hexmask.long.word 0x170 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x170 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x174 "RGIDR_RTDM307,"
hexmask.long.word 0x174 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x174 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x178 "RGIDR_RTDM308,"
hexmask.long.word 0x178 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x178 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x17C "RGIDR_RTDM309,"
hexmask.long.word 0x17C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x17C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x180 "RGIDR_IPMMURT108,"
hexmask.long.word 0x180 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x180 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x184 "RGIDR_IPMMURT109,"
hexmask.long.word 0x184 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x184 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x188 "RGIDR_SYSRAM01,"
hexmask.long.word 0x188 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x188 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18C "RGIDR_SYSRAM02,"
hexmask.long.word 0x18C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x190 "RGIDR_SYSRAM03,"
hexmask.long.word 0x190 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x190 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x194 "RGIDR_SYSRAM04,"
hexmask.long.word 0x194 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x194 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x198 "RGIDR_SYSRAM05,"
hexmask.long.word 0x198 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x198 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x19C "RGIDR_SYSRAM06,"
hexmask.long.word 0x19C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x19C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1A0 "RGIDR_SYSRAM07,"
hexmask.long.word 0x1A0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1A0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1A4 "RGIDR_SYSRAM11,"
hexmask.long.word 0x1A4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1A4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1A8 "RGIDR_SYSRAM12,"
hexmask.long.word 0x1A8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1A8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1AC "RGIDR_SYSRAM13,"
hexmask.long.word 0x1AC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1AC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1B0 "RGIDR_SYSRAM14,"
hexmask.long.word 0x1B0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1B0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1B4 "RGIDR_SYSRAM15,"
hexmask.long.word 0x1B4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1B4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1B8 "RGIDR_SYSRAM16,"
hexmask.long.word 0x1B8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1B8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1BC "RGIDR_SYSRAM17,"
hexmask.long.word 0x1BC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1BC 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19C41C60++0xB
line.long 0x0 "RGIDR_BKBUF,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_AXICR52SS1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_AXICR52SS2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19C41D00++0x2B
line.long 0x0 "RGIDW_ARMREG00,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_ARMREG01,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ARMREG10,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARMREG11,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_ARMREG12,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_ARMREG13,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_ARMREG14,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_AXICR52SS0,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_AXICSD0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_AXIINTAP0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_AXIINTAP1,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19C41D30++0xF7
line.long 0x0 "RGIDW_AXISYSRAM0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_AXISYSRAM1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ARGREG15,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARMREG2,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_ARMREG3,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_ARMREG4,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_ARMREG5,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_ARMREG6,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_ARMREG7,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_ARMREG8,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_ARMREG9,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_ARRD0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_ARRD1,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_ARRD2,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_ARRD3,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_ARRD4,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDW_ARRD5,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDW_ARRD6,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDW_ARRD7,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDW_ARRD8,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDW_ARRT0,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDW_ARRT1,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDW_ARRT2,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDW_ARRT3,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDW_ARRT4,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDW_ARRT5,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDW_ARRT6,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDW_ARRT7,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDW_ARRT8,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDW_CKMRT,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDW_CRC0,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDW_CRC1,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDW_CRC2,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x84 "RGIDW_CRC3,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x84 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x88 "RGIDW_CSD,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x88 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8C "RGIDW_ECM,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x90 "RGIDW_ECMRT,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x90 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x94 "RGIDW_FBACR52,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x94 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x98 "RGIDW_FBART,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x98 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x9C "RGIDW_INTTP,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x9C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA0 "RGIDW_IPMMURT000,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA4 "RGIDW_IPMMURT100,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA8 "RGIDW_KCRC4,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xAC "RGIDW_KCRC5,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xAC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB0 "RGIDW_KCRC6,"
hexmask.long.word 0xB0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB4 "RGIDW_KCRC7,"
hexmask.long.word 0xB4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB8 "RGIDW_MFI00,"
hexmask.long.word 0xB8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xBC "RGIDW_MFI01,"
hexmask.long.word 0xBC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xBC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC0 "RGIDW_MFI10,"
hexmask.long.word 0xC0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC4 "RGIDW_MFI02,"
hexmask.long.word 0xC4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC8 "RGIDW_MFI03,"
hexmask.long.word 0xC8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xCC "RGIDW_MFI04,"
hexmask.long.word 0xCC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xCC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD0 "RGIDW_MFI05,"
hexmask.long.word 0xD0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD4 "RGIDW_MFI06,"
hexmask.long.word 0xD4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD8 "RGIDW_MFI07,"
hexmask.long.word 0xD8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xDC "RGIDW_MFI08,"
hexmask.long.word 0xDC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xDC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE0 "RGIDW_MFI09,"
hexmask.long.word 0xE0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE4 "RGIDW_MFI15,"
hexmask.long.word 0xE4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE8 "RGIDW_CKMCR52,"
hexmask.long.word 0xE8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xEC "RGIDW_RTDM0P,"
hexmask.long.word 0xEC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xEC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF0 "RGIDW_ECMRD,"
hexmask.long.word 0xF0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF4 "RGIDW_RTDM1P,"
hexmask.long.word 0xF4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF4 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19C41E2C++0x3F
line.long 0x0 "RGIDW_RTDM2P,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_SYSRAM10,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_RTDM3P,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_SYSRAM00,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_TSIPL0,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_TSIPL1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_TSIPL2,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_TSIPL3,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_TSIPL4,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_TSIPL5,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_TSIPL6,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_TSIPL7,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_WCRC0,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_WCRC1,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_WCRC2,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_WCRC3,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19C41E80++0x1BF
line.long 0x0 "RGIDW_MFI11,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_MFI12,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_MFI13,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_MFI14,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_IPMMURT001,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_IPMMURT010,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_IPMMURT011,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_IPMMURT012,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_IPMMURT013,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_IPMMURT014,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_IPMMURT015,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_IPMMURT002,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_IPMMURT003,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_IPMMURT004,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_IPMMURT005,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_IPMMURT006,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDW_IPMMURT007,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDW_IPMMURT008,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDW_IPMMURT009,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDW_IPKMURT101,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDW_IPMMURT110,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDW_IPMMURT111,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDW_IPMMURT112,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDW_IPMMURT113,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDW_IPMMURT114,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDW_IPMMURT115,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDW_IPMMURT102,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x6C "RGIDW_IPMMURT103,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x6C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x70 "RGIDW_IPMMURT104,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x70 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x74 "RGIDW_IPMMURT105,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x74 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x78 "RGIDW_IPMMURT106,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x78 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x7C "RGIDW_IPMMURT107,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x7C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x80 "RGIDW_RTDM000,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x80 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x84 "RGIDW_RTDM001,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x84 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x88 "RGIDW_RTDM010,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x88 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8C "RGIDW_RTDM011,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x90 "RGIDW_RTDM012,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x90 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x94 "RGIDW_RTDM013,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x94 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x98 "RGIDW_RTDM014,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x98 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x9C "RGIDW_RTDM015,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x9C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA0 "RGIDW_RTDM002,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA4 "RGIDW_RTDM003,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xA8 "RGIDW_RTDM004,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xA8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xAC "RGIDW_RTDM005,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xAC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB0 "RGIDW_RTDM006,"
hexmask.long.word 0xB0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB4 "RGIDW_RTDM007,"
hexmask.long.word 0xB4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xB8 "RGIDW_RTDM008,"
hexmask.long.word 0xB8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xB8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xBC "RGIDW_RTDM009,"
hexmask.long.word 0xBC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xBC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC0 "RGIDW_RTDM100,"
hexmask.long.word 0xC0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC4 "RGIDW_RTDM101,"
hexmask.long.word 0xC4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC8 "RGIDW_RTDM110,"
hexmask.long.word 0xC8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xCC "RGIDW_RTDM111,"
hexmask.long.word 0xCC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xCC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD0 "RGIDW_RTDM112,"
hexmask.long.word 0xD0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD4 "RGIDW_RTDM113,"
hexmask.long.word 0xD4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xD8 "RGIDW_RTDM114,"
hexmask.long.word 0xD8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xD8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xDC "RGIDW_RTDM115,"
hexmask.long.word 0xDC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xDC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE0 "RGIDW_RTDM102,"
hexmask.long.word 0xE0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE4 "RGIDW_RTDM103,"
hexmask.long.word 0xE4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xE8 "RGIDW_RTDM104,"
hexmask.long.word 0xE8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xE8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xEC "RGIDW_RTDM105,"
hexmask.long.word 0xEC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xEC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF0 "RGIDW_RTDM106,"
hexmask.long.word 0xF0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF4 "RGIDW_RTDM107,"
hexmask.long.word 0xF4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xF8 "RGIDW_RTDM108,"
hexmask.long.word 0xF8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xF8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xFC "RGIDW_RTDM109,"
hexmask.long.word 0xFC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xFC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x100 "RGIDW_RTDM200,"
hexmask.long.word 0x100 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x100 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x104 "RGIDW_RTDM201,"
hexmask.long.word 0x104 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x104 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x108 "RGIDW_RTDM210,"
hexmask.long.word 0x108 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x108 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10C "RGIDW_RTDM211,"
hexmask.long.word 0x10C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x110 "RGIDW_RTDM212,"
hexmask.long.word 0x110 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x110 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x114 "RGIDW_RTDM213,"
hexmask.long.word 0x114 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x114 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x118 "RGIDW_RTDM214,"
hexmask.long.word 0x118 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x118 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x11C "RGIDW_RTDM215,"
hexmask.long.word 0x11C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x11C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x120 "RGIDW_RTDM202,"
hexmask.long.word 0x120 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x120 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x124 "RGIDW_RTDM203,"
hexmask.long.word 0x124 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x124 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x128 "RGIDW_RTDM204,"
hexmask.long.word 0x128 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x128 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x12C "RGIDW_RTDM205,"
hexmask.long.word 0x12C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x12C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x130 "RGIDW_RTDM206,"
hexmask.long.word 0x130 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x130 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x134 "RGIDW_RTDM207,"
hexmask.long.word 0x134 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x134 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x138 "RGIDW_RTDM208,"
hexmask.long.word 0x138 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x138 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x13C "RGIDW_RTDM209,"
hexmask.long.word 0x13C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x13C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x140 "RGIDW_RTDM300,"
hexmask.long.word 0x140 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x140 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x144 "RGIDW_RTDM301,"
hexmask.long.word 0x144 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x144 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x148 "RGIDW_RTDM310,"
hexmask.long.word 0x148 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x148 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14C "RGIDW_RTDM311,"
hexmask.long.word 0x14C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x150 "RGIDW_RTDM312,"
hexmask.long.word 0x150 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x150 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x154 "RGIDW_RTDM313,"
hexmask.long.word 0x154 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x154 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x158 "RGIDW_RTDM314,"
hexmask.long.word 0x158 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x158 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x15C "RGIDW_RTDM315,"
hexmask.long.word 0x15C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x15C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x160 "RGIDW_RTDM302,"
hexmask.long.word 0x160 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x160 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x164 "RGIDW_RTDM303,"
hexmask.long.word 0x164 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x164 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x168 "RGIDW_RTDM304,"
hexmask.long.word 0x168 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x168 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x16C "RGIDW_RTDM305,"
hexmask.long.word 0x16C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x16C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x170 "RGIDW_RTDM306,"
hexmask.long.word 0x170 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x170 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x174 "RGIDW_RTDM307,"
hexmask.long.word 0x174 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x174 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x178 "RGIDW_RTDM308,"
hexmask.long.word 0x178 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x178 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x17C "RGIDW_RTDM309,"
hexmask.long.word 0x17C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x17C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x180 "RGIDW_IPMMURT108,"
hexmask.long.word 0x180 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x180 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x184 "RGIDW_IPMMURT109,"
hexmask.long.word 0x184 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x184 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x188 "RGIDW_SYSRAM01,"
hexmask.long.word 0x188 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x188 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18C "RGIDW_SYSRAM02,"
hexmask.long.word 0x18C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x190 "RGIDW_SYSRAM03,"
hexmask.long.word 0x190 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x190 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x194 "RGIDW_SYSRAM04,"
hexmask.long.word 0x194 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x194 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x198 "RGIDW_SYSRAM05,"
hexmask.long.word 0x198 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x198 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x19C "RGIDW_SYSRAM06,"
hexmask.long.word 0x19C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x19C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1A0 "RGIDW_SYSRAM07,"
hexmask.long.word 0x1A0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1A0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1A4 "RGIDW_SYSRAM11,"
hexmask.long.word 0x1A4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1A4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1A8 "RGIDW_SYSRAM12,"
hexmask.long.word 0x1A8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1A8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1AC "RGIDW_SYSRAM13,"
hexmask.long.word 0x1AC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1AC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1B0 "RGIDW_SYSRAM14,"
hexmask.long.word 0x1B0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1B0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1B4 "RGIDW_SYSRAM15,"
hexmask.long.word 0x1B4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1B4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1B8 "RGIDW_SYSRAM16,"
hexmask.long.word 0x1B8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1B8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1BC "RGIDW_SYSRAM17,"
hexmask.long.word 0x1BC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1BC 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19C42060++0xB
line.long 0x0 "RGIDW_BKBUF,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_AXICR52SS1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_AXICR52SS2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19C42918++0x3
line.long 0x0 "SECATTR_CR52_0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "SECATTR,Secure attribute setting of master." "0: Secure,1: Public"
group.long 0x19C4295C++0x7
line.long 0x0 "SECATTR_CR52_1,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "SECATTR,Secure attribute setting of master." "0: Secure,1: Public"
line.long 0x4 "SECATTR_CR52_2,"
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "SECATTR,Secure attribute setting of master." "0: Secure,1: Public"
group.long 0x19C42D00++0x127
line.long 0x0 "SEC_ARMREG00,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_ARMREG01,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_ARMREG10,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_ARMREG11,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_ARMREG12,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_ARMREG13,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_ARMREG14,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_AXICR52SS0,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_AXICSD0,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_AXIINTAP0,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_AXIINTAP1,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_AXISECROM,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_AXISYSRAM0,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_AXISYSRAM1,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_ARGREG15,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_ARMREG2,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
line.long 0x40 "SEC_ARMREG3,"
hexmask.long 0x40 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x40 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x40 0. "Reserved_0,Reserved" "0,1"
line.long 0x44 "SEC_ARMREG4,"
hexmask.long 0x44 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x44 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x44 0. "Reserved_0,Reserved" "0,1"
line.long 0x48 "SEC_ARMREG5,"
hexmask.long 0x48 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x48 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x48 0. "Reserved_0,Reserved" "0,1"
line.long 0x4C "SEC_ARMREG6,"
hexmask.long 0x4C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4C 0. "Reserved_0,Reserved" "0,1"
line.long 0x50 "SEC_ARMREG7,"
hexmask.long 0x50 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x50 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x50 0. "Reserved_0,Reserved" "0,1"
line.long 0x54 "SEC_ARMREG8,"
hexmask.long 0x54 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x54 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x54 0. "Reserved_0,Reserved" "0,1"
line.long 0x58 "SEC_ARMREG9,"
hexmask.long 0x58 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x58 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x58 0. "Reserved_0,Reserved" "0,1"
line.long 0x5C "SEC_ARRD0,"
hexmask.long 0x5C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x5C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x5C 0. "Reserved_0,Reserved" "0,1"
line.long 0x60 "SEC_ARRD1,"
hexmask.long 0x60 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x60 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x60 0. "Reserved_0,Reserved" "0,1"
line.long 0x64 "SEC_ARRD2,"
hexmask.long 0x64 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x64 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x64 0. "Reserved_0,Reserved" "0,1"
line.long 0x68 "SEC_ARRD3,"
hexmask.long 0x68 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x68 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x68 0. "Reserved_0,Reserved" "0,1"
line.long 0x6C "SEC_ARRD4,"
hexmask.long 0x6C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x6C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x6C 0. "Reserved_0,Reserved" "0,1"
line.long 0x70 "SEC_ARRD5,"
hexmask.long 0x70 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x70 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x70 0. "Reserved_0,Reserved" "0,1"
line.long 0x74 "SEC_ARRD6,"
hexmask.long 0x74 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x74 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x74 0. "Reserved_0,Reserved" "0,1"
line.long 0x78 "SEC_ARRD7,"
hexmask.long 0x78 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x78 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x78 0. "Reserved_0,Reserved" "0,1"
line.long 0x7C "SEC_ARRD8,"
hexmask.long 0x7C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x7C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x7C 0. "Reserved_0,Reserved" "0,1"
line.long 0x80 "SEC_ARRT0,"
hexmask.long 0x80 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x80 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x80 0. "Reserved_0,Reserved" "0,1"
line.long 0x84 "SEC_ARRT1,"
hexmask.long 0x84 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x84 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x84 0. "Reserved_0,Reserved" "0,1"
line.long 0x88 "SEC_ARRT2,"
hexmask.long 0x88 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x88 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x88 0. "Reserved_0,Reserved" "0,1"
line.long 0x8C "SEC_ARRT3,"
hexmask.long 0x8C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8C 0. "Reserved_0,Reserved" "0,1"
line.long 0x90 "SEC_ARRT4,"
hexmask.long 0x90 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x90 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x90 0. "Reserved_0,Reserved" "0,1"
line.long 0x94 "SEC_ARRT5,"
hexmask.long 0x94 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x94 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x94 0. "Reserved_0,Reserved" "0,1"
line.long 0x98 "SEC_ARRT6,"
hexmask.long 0x98 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x98 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x98 0. "Reserved_0,Reserved" "0,1"
line.long 0x9C "SEC_ARRT7,"
hexmask.long 0x9C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x9C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x9C 0. "Reserved_0,Reserved" "0,1"
line.long 0xA0 "SEC_ARRT8,"
hexmask.long 0xA0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xA0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xA0 0. "Reserved_0,Reserved" "0,1"
line.long 0xA4 "SEC_CKMRT,"
hexmask.long 0xA4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xA4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xA4 0. "Reserved_0,Reserved" "0,1"
line.long 0xA8 "SEC_CRC0,"
hexmask.long 0xA8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xA8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xA8 0. "Reserved_0,Reserved" "0,1"
line.long 0xAC "SEC_CRC1,"
hexmask.long 0xAC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xAC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xAC 0. "Reserved_0,Reserved" "0,1"
line.long 0xB0 "SEC_CRC2,"
hexmask.long 0xB0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xB0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xB0 0. "Reserved_0,Reserved" "0,1"
line.long 0xB4 "SEC_CRC3,"
hexmask.long 0xB4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xB4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xB4 0. "Reserved_0,Reserved" "0,1"
line.long 0xB8 "SEC_CSD,"
hexmask.long 0xB8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xB8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xB8 0. "Reserved_0,Reserved" "0,1"
line.long 0xBC "SEC_ECM,"
hexmask.long 0xBC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xBC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xBC 0. "Reserved_0,Reserved" "0,1"
line.long 0xC0 "SEC_ECMRT,"
hexmask.long 0xC0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC0 0. "Reserved_0,Reserved" "0,1"
line.long 0xC4 "SEC_FBACR52,"
hexmask.long 0xC4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC4 0. "Reserved_0,Reserved" "0,1"
line.long 0xC8 "SEC_FBART,"
hexmask.long 0xC8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC8 0. "Reserved_0,Reserved" "0,1"
line.long 0xCC "SEC_INTTP,"
hexmask.long 0xCC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xCC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xCC 0. "Reserved_0,Reserved" "0,1"
line.long 0xD0 "SEC_IPMMURT000,"
hexmask.long 0xD0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xD0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xD0 0. "Reserved_0,Reserved" "0,1"
line.long 0xD4 "SEC_IPMMURT100,"
hexmask.long 0xD4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xD4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xD4 0. "Reserved_0,Reserved" "0,1"
line.long 0xD8 "SEC_KCRC4,"
hexmask.long 0xD8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xD8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xD8 0. "Reserved_0,Reserved" "0,1"
line.long 0xDC "SEC_KCRC5,"
hexmask.long 0xDC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xDC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xDC 0. "Reserved_0,Reserved" "0,1"
line.long 0xE0 "SEC_KCRC6,"
hexmask.long 0xE0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xE0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xE0 0. "Reserved_0,Reserved" "0,1"
line.long 0xE4 "SEC_KCRC7,"
hexmask.long 0xE4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xE4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xE4 0. "Reserved_0,Reserved" "0,1"
line.long 0xE8 "SEC_MFI00,"
hexmask.long 0xE8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xE8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xE8 0. "Reserved_0,Reserved" "0,1"
line.long 0xEC "SEC_MFI01,"
hexmask.long 0xEC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xEC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xEC 0. "Reserved_0,Reserved" "0,1"
line.long 0xF0 "SEC_MFI10,"
hexmask.long 0xF0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xF0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xF0 0. "Reserved_0,Reserved" "0,1"
line.long 0xF4 "SEC_MFI02,"
hexmask.long 0xF4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xF4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xF4 0. "Reserved_0,Reserved" "0,1"
line.long 0xF8 "SEC_MFI03,"
hexmask.long 0xF8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xF8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xF8 0. "Reserved_0,Reserved" "0,1"
line.long 0xFC "SEC_MFI04,"
hexmask.long 0xFC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xFC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xFC 0. "Reserved_0,Reserved" "0,1"
line.long 0x100 "SEC_MFI05,"
hexmask.long 0x100 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x100 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x100 0. "Reserved_0,Reserved" "0,1"
line.long 0x104 "SEC_MFI06,"
hexmask.long 0x104 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x104 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x104 0. "Reserved_0,Reserved" "0,1"
line.long 0x108 "SEC_MFI07,"
hexmask.long 0x108 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x108 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x108 0. "Reserved_0,Reserved" "0,1"
line.long 0x10C "SEC_MFI08,"
hexmask.long 0x10C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10C 0. "Reserved_0,Reserved" "0,1"
line.long 0x110 "SEC_MFI09,"
hexmask.long 0x110 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x110 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x110 0. "Reserved_0,Reserved" "0,1"
line.long 0x114 "SEC_MFI15,"
hexmask.long 0x114 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x114 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x114 0. "Reserved_0,Reserved" "0,1"
line.long 0x118 "SEC_CKMCR52,"
hexmask.long 0x118 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x118 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x118 0. "Reserved_0,Reserved" "0,1"
line.long 0x11C "SEC_RTDM0P,"
hexmask.long 0x11C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x11C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x11C 0. "Reserved_0,Reserved" "0,1"
line.long 0x120 "SEC_ECMRD,"
hexmask.long 0x120 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x120 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x120 0. "Reserved_0,Reserved" "0,1"
line.long 0x124 "SEC_RTDM1P,"
hexmask.long 0x124 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x124 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x124 0. "Reserved_0,Reserved" "0,1"
group.long 0x19C42E2C++0x3F
line.long 0x0 "SEC_RTDM2P,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_SYSRAM10,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_RTDM3P,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_SYSRAM00,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_TSIPL0,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_TSIPL1,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_TSIPL2,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_TSIPL3,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_TSIPL4,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_TSIPL5,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_TSIPL6,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_TSIPL7,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_WCRC0,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_WCRC1,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_WCRC2,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_WCRC3,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
group.long 0x19C42E80++0x1BF
line.long 0x0 "SEC_MFI11,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_MFI12,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_MFI13,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_MFI14,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_IPMMURT001,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_IPMMURT010,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_IPMMURT011,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_IPMMURT012,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_IPMMURT013,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_IPMMURT014,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_IPMMURT015,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_IPMMURT002,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_IPMMURT003,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_IPMMURT004,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_IPMMURT005,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_IPMMURT006,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
line.long 0x40 "SEC_IPMMURT007,"
hexmask.long 0x40 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x40 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x40 0. "Reserved_0,Reserved" "0,1"
line.long 0x44 "SEC_IPMMURT008,"
hexmask.long 0x44 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x44 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x44 0. "Reserved_0,Reserved" "0,1"
line.long 0x48 "SEC_IPMMURT009,"
hexmask.long 0x48 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x48 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x48 0. "Reserved_0,Reserved" "0,1"
line.long 0x4C "SEC_IPKMURT101,"
hexmask.long 0x4C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4C 0. "Reserved_0,Reserved" "0,1"
line.long 0x50 "SEC_IPMMURT110,"
hexmask.long 0x50 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x50 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x50 0. "Reserved_0,Reserved" "0,1"
line.long 0x54 "SEC_IPMMURT111,"
hexmask.long 0x54 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x54 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x54 0. "Reserved_0,Reserved" "0,1"
line.long 0x58 "SEC_IPMMURT112,"
hexmask.long 0x58 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x58 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x58 0. "Reserved_0,Reserved" "0,1"
line.long 0x5C "SEC_IPMMURT113,"
hexmask.long 0x5C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x5C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x5C 0. "Reserved_0,Reserved" "0,1"
line.long 0x60 "SEC_IPMMURT114,"
hexmask.long 0x60 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x60 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x60 0. "Reserved_0,Reserved" "0,1"
line.long 0x64 "SEC_IPMMURT115,"
hexmask.long 0x64 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x64 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x64 0. "Reserved_0,Reserved" "0,1"
line.long 0x68 "SEC_IPMMURT102,"
hexmask.long 0x68 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x68 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x68 0. "Reserved_0,Reserved" "0,1"
line.long 0x6C "SEC_IPMMURT103,"
hexmask.long 0x6C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x6C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x6C 0. "Reserved_0,Reserved" "0,1"
line.long 0x70 "SEC_IPMMURT104,"
hexmask.long 0x70 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x70 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x70 0. "Reserved_0,Reserved" "0,1"
line.long 0x74 "SEC_IPMMURT105,"
hexmask.long 0x74 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x74 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x74 0. "Reserved_0,Reserved" "0,1"
line.long 0x78 "SEC_IPMMURT106,"
hexmask.long 0x78 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x78 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x78 0. "Reserved_0,Reserved" "0,1"
line.long 0x7C "SEC_IPMMURT107,"
hexmask.long 0x7C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x7C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x7C 0. "Reserved_0,Reserved" "0,1"
line.long 0x80 "SEC_RTDM000,"
hexmask.long 0x80 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x80 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x80 0. "Reserved_0,Reserved" "0,1"
line.long 0x84 "SEC_RTDM001,"
hexmask.long 0x84 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x84 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x84 0. "Reserved_0,Reserved" "0,1"
line.long 0x88 "SEC_RTDM010,"
hexmask.long 0x88 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x88 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x88 0. "Reserved_0,Reserved" "0,1"
line.long 0x8C "SEC_RTDM011,"
hexmask.long 0x8C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8C 0. "Reserved_0,Reserved" "0,1"
line.long 0x90 "SEC_RTDM012,"
hexmask.long 0x90 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x90 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x90 0. "Reserved_0,Reserved" "0,1"
line.long 0x94 "SEC_RTDM013,"
hexmask.long 0x94 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x94 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x94 0. "Reserved_0,Reserved" "0,1"
line.long 0x98 "SEC_RTDM014,"
hexmask.long 0x98 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x98 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x98 0. "Reserved_0,Reserved" "0,1"
line.long 0x9C "SEC_RTDM015,"
hexmask.long 0x9C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x9C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x9C 0. "Reserved_0,Reserved" "0,1"
line.long 0xA0 "SEC_RTDM002,"
hexmask.long 0xA0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xA0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xA0 0. "Reserved_0,Reserved" "0,1"
line.long 0xA4 "SEC_RTDM003,"
hexmask.long 0xA4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xA4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xA4 0. "Reserved_0,Reserved" "0,1"
line.long 0xA8 "SEC_RTDM004,"
hexmask.long 0xA8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xA8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xA8 0. "Reserved_0,Reserved" "0,1"
line.long 0xAC "SEC_RTDM005,"
hexmask.long 0xAC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xAC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xAC 0. "Reserved_0,Reserved" "0,1"
line.long 0xB0 "SEC_RTDM006,"
hexmask.long 0xB0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xB0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xB0 0. "Reserved_0,Reserved" "0,1"
line.long 0xB4 "SEC_RTDM007,"
hexmask.long 0xB4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xB4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xB4 0. "Reserved_0,Reserved" "0,1"
line.long 0xB8 "SEC_RTDM008,"
hexmask.long 0xB8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xB8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xB8 0. "Reserved_0,Reserved" "0,1"
line.long 0xBC "SEC_RTDM009,"
hexmask.long 0xBC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xBC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xBC 0. "Reserved_0,Reserved" "0,1"
line.long 0xC0 "SEC_RTDM100,"
hexmask.long 0xC0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC0 0. "Reserved_0,Reserved" "0,1"
line.long 0xC4 "SEC_RTDM101,"
hexmask.long 0xC4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC4 0. "Reserved_0,Reserved" "0,1"
line.long 0xC8 "SEC_RTDM110,"
hexmask.long 0xC8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC8 0. "Reserved_0,Reserved" "0,1"
line.long 0xCC "SEC_RTDM111,"
hexmask.long 0xCC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xCC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xCC 0. "Reserved_0,Reserved" "0,1"
line.long 0xD0 "SEC_RTDM112,"
hexmask.long 0xD0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xD0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xD0 0. "Reserved_0,Reserved" "0,1"
line.long 0xD4 "SEC_RTDM113,"
hexmask.long 0xD4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xD4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xD4 0. "Reserved_0,Reserved" "0,1"
line.long 0xD8 "SEC_RTDM114,"
hexmask.long 0xD8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xD8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xD8 0. "Reserved_0,Reserved" "0,1"
line.long 0xDC "SEC_RTDM115,"
hexmask.long 0xDC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xDC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xDC 0. "Reserved_0,Reserved" "0,1"
line.long 0xE0 "SEC_RTDM102,"
hexmask.long 0xE0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xE0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xE0 0. "Reserved_0,Reserved" "0,1"
line.long 0xE4 "SEC_RTDM103,"
hexmask.long 0xE4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xE4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xE4 0. "Reserved_0,Reserved" "0,1"
line.long 0xE8 "SEC_RTDM104,"
hexmask.long 0xE8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xE8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xE8 0. "Reserved_0,Reserved" "0,1"
line.long 0xEC "SEC_RTDM105,"
hexmask.long 0xEC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xEC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xEC 0. "Reserved_0,Reserved" "0,1"
line.long 0xF0 "SEC_RTDM106,"
hexmask.long 0xF0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xF0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xF0 0. "Reserved_0,Reserved" "0,1"
line.long 0xF4 "SEC_RTDM107,"
hexmask.long 0xF4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xF4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xF4 0. "Reserved_0,Reserved" "0,1"
line.long 0xF8 "SEC_RTDM108,"
hexmask.long 0xF8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xF8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xF8 0. "Reserved_0,Reserved" "0,1"
line.long 0xFC "SEC_RTDM109,"
hexmask.long 0xFC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xFC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xFC 0. "Reserved_0,Reserved" "0,1"
line.long 0x100 "SEC_RTDM200,"
hexmask.long 0x100 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x100 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x100 0. "Reserved_0,Reserved" "0,1"
line.long 0x104 "SEC_RTDM201,"
hexmask.long 0x104 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x104 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x104 0. "Reserved_0,Reserved" "0,1"
line.long 0x108 "SEC_RTDM210,"
hexmask.long 0x108 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x108 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x108 0. "Reserved_0,Reserved" "0,1"
line.long 0x10C "SEC_RTDM211,"
hexmask.long 0x10C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10C 0. "Reserved_0,Reserved" "0,1"
line.long 0x110 "SEC_RTDM212,"
hexmask.long 0x110 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x110 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x110 0. "Reserved_0,Reserved" "0,1"
line.long 0x114 "SEC_RTDM213,"
hexmask.long 0x114 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x114 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x114 0. "Reserved_0,Reserved" "0,1"
line.long 0x118 "SEC_RTDM214,"
hexmask.long 0x118 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x118 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x118 0. "Reserved_0,Reserved" "0,1"
line.long 0x11C "SEC_RTDM215,"
hexmask.long 0x11C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x11C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x11C 0. "Reserved_0,Reserved" "0,1"
line.long 0x120 "SEC_RTDM202,"
hexmask.long 0x120 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x120 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x120 0. "Reserved_0,Reserved" "0,1"
line.long 0x124 "SEC_RTDM203,"
hexmask.long 0x124 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x124 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x124 0. "Reserved_0,Reserved" "0,1"
line.long 0x128 "SEC_RTDM204,"
hexmask.long 0x128 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x128 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x128 0. "Reserved_0,Reserved" "0,1"
line.long 0x12C "SEC_RTDM205,"
hexmask.long 0x12C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x12C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x12C 0. "Reserved_0,Reserved" "0,1"
line.long 0x130 "SEC_RTDM206,"
hexmask.long 0x130 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x130 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x130 0. "Reserved_0,Reserved" "0,1"
line.long 0x134 "SEC_RTDM207,"
hexmask.long 0x134 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x134 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x134 0. "Reserved_0,Reserved" "0,1"
line.long 0x138 "SEC_RTDM208,"
hexmask.long 0x138 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x138 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x138 0. "Reserved_0,Reserved" "0,1"
line.long 0x13C "SEC_RTDM209,"
hexmask.long 0x13C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x13C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x13C 0. "Reserved_0,Reserved" "0,1"
line.long 0x140 "SEC_RTDM300,"
hexmask.long 0x140 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x140 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x140 0. "Reserved_0,Reserved" "0,1"
line.long 0x144 "SEC_RTDM301,"
hexmask.long 0x144 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x144 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x144 0. "Reserved_0,Reserved" "0,1"
line.long 0x148 "SEC_RTDM310,"
hexmask.long 0x148 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x148 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x148 0. "Reserved_0,Reserved" "0,1"
line.long 0x14C "SEC_RTDM311,"
hexmask.long 0x14C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14C 0. "Reserved_0,Reserved" "0,1"
line.long 0x150 "SEC_RTDM312,"
hexmask.long 0x150 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x150 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x150 0. "Reserved_0,Reserved" "0,1"
line.long 0x154 "SEC_RTDM313,"
hexmask.long 0x154 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x154 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x154 0. "Reserved_0,Reserved" "0,1"
line.long 0x158 "SEC_RTDM314,"
hexmask.long 0x158 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x158 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x158 0. "Reserved_0,Reserved" "0,1"
line.long 0x15C "SEC_RTDM315,"
hexmask.long 0x15C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x15C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x15C 0. "Reserved_0,Reserved" "0,1"
line.long 0x160 "SEC_RTDM302,"
hexmask.long 0x160 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x160 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x160 0. "Reserved_0,Reserved" "0,1"
line.long 0x164 "SEC_RTDM303,"
hexmask.long 0x164 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x164 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x164 0. "Reserved_0,Reserved" "0,1"
line.long 0x168 "SEC_RTDM304,"
hexmask.long 0x168 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x168 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x168 0. "Reserved_0,Reserved" "0,1"
line.long 0x16C "SEC_RTDM305,"
hexmask.long 0x16C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x16C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x16C 0. "Reserved_0,Reserved" "0,1"
line.long 0x170 "SEC_RTDM306,"
hexmask.long 0x170 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x170 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x170 0. "Reserved_0,Reserved" "0,1"
line.long 0x174 "SEC_RTDM307,"
hexmask.long 0x174 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x174 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x174 0. "Reserved_0,Reserved" "0,1"
line.long 0x178 "SEC_RTDM308,"
hexmask.long 0x178 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x178 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x178 0. "Reserved_0,Reserved" "0,1"
line.long 0x17C "SEC_RTDM309,"
hexmask.long 0x17C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x17C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x17C 0. "Reserved_0,Reserved" "0,1"
line.long 0x180 "SEC_IPMMURT108,"
hexmask.long 0x180 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x180 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x180 0. "Reserved_0,Reserved" "0,1"
line.long 0x184 "SEC_IPMMURT109,"
hexmask.long 0x184 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x184 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x184 0. "Reserved_0,Reserved" "0,1"
line.long 0x188 "SEC_SYSRAM01,"
hexmask.long 0x188 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x188 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x188 0. "Reserved_0,Reserved" "0,1"
line.long 0x18C "SEC_SYSRAM02,"
hexmask.long 0x18C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18C 0. "Reserved_0,Reserved" "0,1"
line.long 0x190 "SEC_SYSRAM03,"
hexmask.long 0x190 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x190 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x190 0. "Reserved_0,Reserved" "0,1"
line.long 0x194 "SEC_SYSRAM04,"
hexmask.long 0x194 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x194 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x194 0. "Reserved_0,Reserved" "0,1"
line.long 0x198 "SEC_SYSRAM05,"
hexmask.long 0x198 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x198 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x198 0. "Reserved_0,Reserved" "0,1"
line.long 0x19C "SEC_SYSRAM06,"
hexmask.long 0x19C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x19C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x19C 0. "Reserved_0,Reserved" "0,1"
line.long 0x1A0 "SEC_SYSRAM07,"
hexmask.long 0x1A0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1A0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1A0 0. "Reserved_0,Reserved" "0,1"
line.long 0x1A4 "SEC_SYSRAM11,"
hexmask.long 0x1A4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1A4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1A4 0. "Reserved_0,Reserved" "0,1"
line.long 0x1A8 "SEC_SYSRAM12,"
hexmask.long 0x1A8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1A8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1A8 0. "Reserved_0,Reserved" "0,1"
line.long 0x1AC "SEC_SYSRAM13,"
hexmask.long 0x1AC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1AC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1AC 0. "Reserved_0,Reserved" "0,1"
line.long 0x1B0 "SEC_SYSRAM14,"
hexmask.long 0x1B0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1B0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1B0 0. "Reserved_0,Reserved" "0,1"
line.long 0x1B4 "SEC_SYSRAM15,"
hexmask.long 0x1B4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1B4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1B4 0. "Reserved_0,Reserved" "0,1"
line.long 0x1B8 "SEC_SYSRAM16,"
hexmask.long 0x1B8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1B8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1B8 0. "Reserved_0,Reserved" "0,1"
line.long 0x1BC "SEC_SYSRAM17,"
hexmask.long 0x1BC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1BC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1BC 0. "Reserved_0,Reserved" "0,1"
group.long 0x19C43060++0xB
line.long 0x0 "SEC_BKBUF,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_AXICR52SS1,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_AXICR52SS2,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
group.long 0x19C43910++0x7
line.long 0x0 "SAFERR_AXRT0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
line.long 0x4 "SAFERR_AXRT1,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x19C43920++0x3
line.long 0x0 "SAFID_AXRT,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x19C44910++0x7
line.long 0x0 "SECERR_AXRT0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
line.long 0x4 "SECERR_AXRT1,"
hexmask.long 0x4 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x19C44920++0x3
line.long 0x0 "SECID_AXRT,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x19C80000++0x3
line.long 0x0 "FDT_AXRT2APRT0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "COUNTER,Timeout counter setting."
group.long 0x19C81900++0x6B
line.long 0x0 "RGIDR_ARMGC0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDR_ARMGC1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDR_ARMGC2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDR_ARRT00,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDR_ARRT01,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDR_ARRT02,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDR_ARRT03,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDR_ARRT04,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDR_ARRT05,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDR_ARRT06,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDR_ARRT07,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDR_ARRT08,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDR_LIFEC0,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDR_SWDT,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDR_TMU0,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDR_WDT,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDR_WWDT0,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDR_WWDT1,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDR_WWDT2,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDR_WWDT3,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDR_WWDT4,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDR_WWDT5,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDR_WWDT6,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDR_WWDT7,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDR_WWDT8,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDR_WWDT9,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "ECMRT3,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19C81D00++0x6B
line.long 0x0 "RGIDW_ARMGC0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4 "RGIDW_ARMGC1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x8 "RGIDW_ARMGC2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0xC "RGIDW_ARRT00,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x10 "RGIDW_ARRT01,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x14 "RGIDW_ARRT02,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x18 "RGIDW_ARRT03,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x1C "RGIDW_ARRT04,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x20 "RGIDW_ARRT05,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x20 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x24 "RGIDW_ARRT06,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x24 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x28 "RGIDW_ARRT07,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x28 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x2C "RGIDW_ARRT08,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x2C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x30 "RGIDW_LIFEC0,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x30 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x34 "RGIDW_SWDT,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x34 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x38 "RGIDW_TMU0,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x38 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x3C "RGIDW_WDT,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x3C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x40 "RGIDW_WWDT0,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x40 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x44 "RGIDW_WWDT1,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x44 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x48 "RGIDW_WWDT2,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x48 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x4C "RGIDW_WWDT3,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x50 "RGIDW_WWDT4,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x50 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x54 "RGIDW_WWDT5,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x54 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x58 "RGIDW_WWDT6,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x58 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x5C "RGIDW_WWDT7,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x5C 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x60 "RGIDW_WWDT8,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x60 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x64 "RGIDW_WWDT9,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x64 0.--15. 1. "RGIDEN_15_0,Reserved"
line.long 0x68 "RGIDW_ECMRT3,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x68 0.--15. 1. "RGIDEN_15_0,Reserved"
group.long 0x19C82D00++0x6B
line.long 0x0 "SEC_ARMGC0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "SEC_ARMGC1,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "SEC_ARMGC2,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
line.long 0xC "SEC_ARRT00,"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0xC 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0xC 0. "Reserved_0,Reserved" "0,1"
line.long 0x10 "SEC_ARRT01,"
hexmask.long 0x10 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x10 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x10 0. "Reserved_0,Reserved" "0,1"
line.long 0x14 "SEC_ARRT02,"
hexmask.long 0x14 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x14 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
line.long 0x18 "SEC_ARRT03,"
hexmask.long 0x18 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x18 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "SEC_ARRT04,"
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x1C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x1C 0. "Reserved_0,Reserved" "0,1"
line.long 0x20 "SEC_ARRT05,"
hexmask.long 0x20 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x20 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x20 0. "Reserved_0,Reserved" "0,1"
line.long 0x24 "SEC_ARRT06,"
hexmask.long 0x24 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x24 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x24 0. "Reserved_0,Reserved" "0,1"
line.long 0x28 "SEC_ARRT07,"
hexmask.long 0x28 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x28 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x28 0. "Reserved_0,Reserved" "0,1"
line.long 0x2C "SEC_ARRT08,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x2C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x2C 0. "Reserved_0,Reserved" "0,1"
line.long 0x30 "SEC_LIFEC0,"
hexmask.long 0x30 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x30 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x30 0. "Reserved_0,Reserved" "0,1"
line.long 0x34 "SEC_SWDT,"
hexmask.long 0x34 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x34 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x34 0. "Reserved_0,Reserved" "0,1"
line.long 0x38 "SEC_TMU0,"
hexmask.long 0x38 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x38 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x38 0. "Reserved_0,Reserved" "0,1"
line.long 0x3C "SEC_WDT,"
hexmask.long 0x3C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x3C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x3C 0. "Reserved_0,Reserved" "0,1"
line.long 0x40 "SEC_WWDT0,"
hexmask.long 0x40 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x40 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x40 0. "Reserved_0,Reserved" "0,1"
line.long 0x44 "SEC_WWDT1,"
hexmask.long 0x44 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x44 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x44 0. "Reserved_0,Reserved" "0,1"
line.long 0x48 "SEC_WWDT2,"
hexmask.long 0x48 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x48 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x48 0. "Reserved_0,Reserved" "0,1"
line.long 0x4C "SEC_WWDT3,"
hexmask.long 0x4C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x4C 0. "Reserved_0,Reserved" "0,1"
line.long 0x50 "SEC_WWDT4,"
hexmask.long 0x50 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x50 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x50 0. "Reserved_0,Reserved" "0,1"
line.long 0x54 "SEC_WWDT5,"
hexmask.long 0x54 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x54 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x54 0. "Reserved_0,Reserved" "0,1"
line.long 0x58 "SEC_WWDT6,"
hexmask.long 0x58 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x58 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x58 0. "Reserved_0,Reserved" "0,1"
line.long 0x5C "SEC_WWDT7,"
hexmask.long 0x5C 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x5C 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x5C 0. "Reserved_0,Reserved" "0,1"
line.long 0x60 "SEC_WWDT8,"
hexmask.long 0x60 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x60 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x60 0. "Reserved_0,Reserved" "0,1"
line.long 0x64 "SEC_WWDT9,"
hexmask.long 0x64 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x64 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x64 0. "Reserved_0,Reserved" "0,1"
line.long 0x68 "SEC_ECMRT3,"
hexmask.long 0x68 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x68 1. "SECGRP,Secure Group Setting for Slave I/F." "0: Secure,1: Public"
bitfld.long 0x68 0. "Reserved_0,Reserved" "0,1"
group.long 0x19C83910++0x3
line.long 0x0 "SAFERR_APRT0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows safety access error status."
rgroup.long 0x19C83920++0x3
line.long 0x0 "SAFID_APRT0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
group.long 0x19C84910++0x3
line.long 0x0 "SECERR_APRT0,"
hexmask.long 0x0 0.--31. 1. "STATUS_31_0,This field shows secure access error status."
rgroup.long 0x19C84920++0x3
line.long 0x0 "SECID_APRT0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SID_7_0,Source ID value"
tree.end
tree "AXI_bus_D_2"
base ad:0xE6780000
group.long 0x0++0x3
line.long 0x0 "MMCR,"
bitfld.long 0x0 31. "CTRL31,Bus Control 31" "0,1"
newline
hexmask.long.word 0x0 17.--30. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "CTRL16,Bus Control 16" "0,1"
newline
hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "CTRL5,Bus Control 3" "0,1"
newline
bitfld.long 0x0 4. "CTRL4,Bus Control 3" "0,1"
newline
bitfld.long 0x0 3. "CTRL3,Bus Control 3" "0,1"
newline
bitfld.long 0x0 2. "CTRL2,Bus Control 3" "0,1"
newline
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0x1000++0x3
line.long 0x0 "DUMMYERRCR,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "RGNERRINJ,Region ID Error Detection for ECM Injection" "?,1: Error Injection"
newline
bitfld.long 0x0 4. "SECERRINJ,Secure Error Detection for ECM Injection" "?,1: Error Injection"
newline
bitfld.long 0x0 3. "EDCERRINJ,EDC Error Detection for ECM Injection" "?,1: Error Injection"
newline
bitfld.long 0x0 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
group.long 0x1D00++0xFB
line.long 0x0 "DPTDIVCR0,"
hexmask.long.word 0x0 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x0 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x4 "DPTDIVCR1,"
hexmask.long.word 0x4 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x4 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x8 "DPTDIVCR2,"
hexmask.long.word 0x8 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x8 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xC "DPTDIVCR3,"
hexmask.long.word 0xC 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xC 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x10 "DPTDIVCR4,"
hexmask.long.word 0x10 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x10 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x14 "DPTDIVCR5,"
hexmask.long.word 0x14 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x14 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x18 "DPTDIVCR6,"
hexmask.long.word 0x18 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x18 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x1C "DPTDIVCR7,"
hexmask.long.word 0x1C 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x1C 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x20 "DPTDIVCR8,"
hexmask.long.word 0x20 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x20 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x24 "DPTDIVCR9,"
hexmask.long.word 0x24 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x24 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x28 "DPTDIVCR10,"
hexmask.long.word 0x28 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x28 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x2C "DPTDIVCR11,"
hexmask.long.word 0x2C 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x2C 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x30 "DPTDIVCR12,"
hexmask.long.word 0x30 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x30 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x34 "DPTDIVCR13,"
hexmask.long.word 0x34 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x34 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x38 "DPTDIVCR14,"
hexmask.long.word 0x38 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x38 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x3C "DPTDIVCR15,"
hexmask.long.word 0x3C 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x3C 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x40 "DPTDIVCR16,"
hexmask.long.word 0x40 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x40 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x44 "DPTDIVCR17,"
hexmask.long.word 0x44 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x44 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x48 "DPTDIVCR18,"
hexmask.long.word 0x48 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x48 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x4C "DPTDIVCR19,"
hexmask.long.word 0x4C 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x4C 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x50 "DPTDIVCR20,"
hexmask.long.word 0x50 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x50 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x54 "DPTDIVCR21,"
hexmask.long.word 0x54 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x54 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x58 "DPTDIVCR22,"
hexmask.long.word 0x58 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x58 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x5C "DPTDIVCR23,"
hexmask.long.word 0x5C 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x5C 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x60 "DPTDIVCR24,"
hexmask.long.word 0x60 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x60 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x64 "DPTDIVCR25,"
hexmask.long.word 0x64 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x64 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x68 "DPTDIVCR26,"
hexmask.long.word 0x68 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x68 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x6C "DPTDIVCR27,"
hexmask.long.word 0x6C 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x6C 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x70 "DPTDIVCR28,"
hexmask.long.word 0x70 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x70 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x74 "DPTDIVCR29,"
hexmask.long.word 0x74 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x74 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x78 "DPTDIVCR30,"
hexmask.long.word 0x78 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x78 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x7C "DPTDIVCR31,"
hexmask.long.word 0x7C 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x7C 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x80 "DPTDIVCR32,"
hexmask.long.word 0x80 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x80 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x84 "DPTDIVCR33,"
hexmask.long.word 0x84 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x84 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x88 "DPTDIVCR34,"
hexmask.long.word 0x88 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x88 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x8C "DPTDIVCR35,"
hexmask.long.word 0x8C 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x8C 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x90 "DPTDIVCR36,"
hexmask.long.word 0x90 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x90 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x94 "DPTDIVCR37,"
hexmask.long.word 0x94 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x94 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x98 "DPTDIVCR38,"
hexmask.long.word 0x98 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x98 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0x9C "DPTDIVCR39,"
hexmask.long.word 0x9C 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0x9C 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xA0 "DPTDIVCR40,"
hexmask.long.word 0xA0 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xA0 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xA4 "DPTDIVCR41,"
hexmask.long.word 0xA4 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xA4 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xA8 "DPTDIVCR42,"
hexmask.long.word 0xA8 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xA8 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xAC "DPTDIVCR43,"
hexmask.long.word 0xAC 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xAC 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xB0 "DPTDIVCR44,"
hexmask.long.word 0xB0 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xB0 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xB4 "DPTDIVCR45,"
hexmask.long.word 0xB4 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xB4 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xB8 "DPTDIVCR46,"
hexmask.long.word 0xB8 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xB8 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xBC "DPTDIVCR47,"
hexmask.long.word 0xBC 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xBC 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xC0 "DPTDIVCR48,"
hexmask.long.word 0xC0 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xC0 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xC4 "DPTDIVCR49,"
hexmask.long.word 0xC4 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xC4 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xC8 "DPTDIVCR50,"
hexmask.long.word 0xC8 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xC8 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xCC "DPTDIVCR51,"
hexmask.long.word 0xCC 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xCC 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xD0 "DPTDIVCR52,"
hexmask.long.word 0xD0 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xD0 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xD4 "DPTDIVCR53,"
hexmask.long.word 0xD4 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xD4 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xD8 "DPTDIVCR54,"
hexmask.long.word 0xD8 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xD8 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xDC "DPTDIVCR55,"
hexmask.long.word 0xDC 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xDC 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xE0 "DPTDIVCR56,"
hexmask.long.word 0xE0 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xE0 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xE4 "DPTDIVCR57,"
hexmask.long.word 0xE4 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xE4 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xE8 "DPTDIVCR58,"
hexmask.long.word 0xE8 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xE8 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xEC "DPTDIVCR59,"
hexmask.long.word 0xEC 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xEC 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xF0 "DPTDIVCR60,"
hexmask.long.word 0xF0 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xF0 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xF4 "DPTDIVCR61,"
hexmask.long.word 0xF4 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xF4 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
line.long 0xF8 "DPTDIVCR62,"
hexmask.long.word 0xF8 22.--31. 1. "Reserved_22,Reserved"
newline
hexmask.long.tbyte 0xF8 0.--21. 1. "DIVADDR_37_16,Protection area division physical address [37:16]"
group.long 0x1E00++0x23B
line.long 0x0 "DPTRGNCR0,"
bitfld.long 0x0 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x4 "DPTRGNCR1,"
bitfld.long 0x4 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x8 "DPTRGNCR2,"
bitfld.long 0x8 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xC "DPTRGNCR3,"
bitfld.long 0xC 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x10 "DPTRGNCR4,"
bitfld.long 0x10 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x14 "DPTRGNCR5,"
bitfld.long 0x14 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x18 "DPTRGNCR6,"
bitfld.long 0x18 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1C "DPTRGNCR7,"
bitfld.long 0x1C 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x20 "DPTRGNCR8,"
bitfld.long 0x20 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x24 "DPTRGNCR9,"
bitfld.long 0x24 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x28 "DPTRGNCR10,"
bitfld.long 0x28 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x2C "DPTRGNCR11,"
bitfld.long 0x2C 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x30 "DPTRGNCR12,"
bitfld.long 0x30 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x34 "DPTRGNCR13,"
bitfld.long 0x34 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x38 "DPTRGNCR14,"
bitfld.long 0x38 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x3C "DPTRGNCR15,"
bitfld.long 0x3C 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x40 "DPTRGNCR16,"
bitfld.long 0x40 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x40 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x40 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x40 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x40 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x40 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x40 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x40 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x40 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x40 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x40 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x40 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x40 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x40 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x40 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x40 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x40 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x40 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x40 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x40 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x40 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x40 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x40 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x40 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x40 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x40 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x40 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x40 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x40 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x40 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x40 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x40 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x44 "DPTRGNCR17,"
bitfld.long 0x44 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x44 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x44 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x44 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x44 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x44 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x44 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x44 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x44 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x44 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x44 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x44 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x44 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x44 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x44 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x44 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x44 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x44 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x44 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x44 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x44 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x44 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x44 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x44 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x44 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x44 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x44 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x44 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x44 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x44 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x44 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x44 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x48 "DPTRGNCR18,"
bitfld.long 0x48 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x48 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x48 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x48 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x48 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x48 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x48 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x48 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x48 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x48 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x48 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x48 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x48 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x48 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x48 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x48 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x48 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x48 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x48 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x48 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x48 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x48 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x48 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x48 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x48 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x48 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x48 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x48 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x48 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x48 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x48 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x48 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x4C "DPTRGNCR19,"
bitfld.long 0x4C 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4C 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4C 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4C 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4C 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4C 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4C 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4C 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4C 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4C 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4C 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4C 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4C 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4C 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4C 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4C 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4C 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4C 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4C 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4C 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4C 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4C 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4C 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4C 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4C 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4C 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4C 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4C 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4C 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4C 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4C 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4C 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x50 "DPTRGNCR20,"
bitfld.long 0x50 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x50 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x50 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x50 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x50 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x50 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x50 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x50 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x50 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x50 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x50 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x50 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x50 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x50 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x50 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x50 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x50 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x50 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x50 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x50 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x50 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x50 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x50 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x50 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x50 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x50 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x50 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x50 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x50 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x50 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x50 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x50 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x54 "DPTRGNCR21,"
bitfld.long 0x54 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x54 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x54 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x54 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x54 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x54 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x54 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x54 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x54 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x54 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x54 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x54 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x54 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x54 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x54 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x54 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x54 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x54 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x54 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x54 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x54 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x54 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x54 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x54 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x54 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x54 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x54 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x54 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x54 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x54 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x54 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x54 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x58 "DPTRGNCR22,"
bitfld.long 0x58 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x58 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x58 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x58 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x58 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x58 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x58 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x58 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x58 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x58 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x58 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x58 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x58 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x58 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x58 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x58 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x58 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x58 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x58 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x58 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x58 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x58 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x58 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x58 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x58 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x58 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x58 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x58 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x58 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x58 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x58 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x58 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x5C "DPTRGNCR23,"
bitfld.long 0x5C 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x5C 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x5C 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x5C 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x5C 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x5C 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x5C 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x5C 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x5C 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x5C 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x5C 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x5C 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x5C 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x5C 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x5C 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x5C 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x5C 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x5C 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x5C 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x5C 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x5C 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x5C 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x5C 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x5C 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x5C 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x5C 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x5C 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x5C 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x5C 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x5C 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x5C 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x5C 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x60 "DPTRGNCR24,"
bitfld.long 0x60 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x60 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x60 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x60 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x60 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x60 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x60 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x60 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x60 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x60 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x60 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x60 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x60 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x60 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x60 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x60 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x60 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x60 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x60 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x60 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x60 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x60 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x60 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x60 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x60 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x60 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x60 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x60 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x60 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x60 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x60 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x60 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x64 "DPTRGNCR25,"
bitfld.long 0x64 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x64 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x64 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x64 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x64 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x64 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x64 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x64 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x64 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x64 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x64 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x64 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x64 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x64 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x64 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x64 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x64 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x64 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x64 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x64 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x64 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x64 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x64 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x64 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x64 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x64 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x64 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x64 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x64 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x64 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x64 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x64 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x68 "DPTRGNCR26,"
bitfld.long 0x68 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x68 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x68 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x68 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x68 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x68 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x68 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x68 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x68 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x68 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x68 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x68 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x68 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x68 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x68 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x68 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x68 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x68 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x68 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x68 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x68 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x68 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x68 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x68 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x68 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x68 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x68 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x68 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x68 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x68 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x68 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x68 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x6C "DPTRGNCR27,"
bitfld.long 0x6C 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x6C 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x6C 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x6C 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x6C 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x6C 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x6C 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x6C 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x6C 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x6C 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x6C 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x6C 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x6C 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x6C 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x6C 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x6C 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x6C 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x6C 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x6C 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x6C 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x6C 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x6C 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x6C 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x6C 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x6C 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x6C 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x6C 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x6C 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x6C 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x6C 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x6C 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x6C 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x70 "DPTRGNCR28,"
bitfld.long 0x70 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x70 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x70 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x70 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x70 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x70 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x70 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x70 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x70 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x70 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x70 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x70 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x70 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x70 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x70 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x70 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x70 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x70 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x70 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x70 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x70 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x70 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x70 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x70 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x70 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x70 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x70 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x70 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x70 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x70 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x70 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x70 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x74 "DPTRGNCR29,"
bitfld.long 0x74 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x74 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x74 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x74 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x74 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x74 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x74 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x74 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x74 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x74 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x74 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x74 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x74 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x74 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x74 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x74 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x74 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x74 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x74 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x74 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x74 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x74 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x74 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x74 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x74 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x74 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x74 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x74 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x74 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x74 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x74 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x74 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x78 "DPTRGNCR30,"
bitfld.long 0x78 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x78 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x78 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x78 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x78 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x78 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x78 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x78 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x78 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x78 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x78 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x78 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x78 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x78 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x78 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x78 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x78 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x78 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x78 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x78 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x78 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x78 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x78 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x78 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x78 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x78 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x78 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x78 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x78 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x78 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x78 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x78 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x7C "DPTRGNCR31,"
bitfld.long 0x7C 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x7C 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x7C 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x7C 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x7C 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x7C 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x7C 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x7C 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x7C 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x7C 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x7C 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x7C 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x7C 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x7C 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x7C 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x7C 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x7C 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x7C 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x7C 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x7C 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x7C 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x7C 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x7C 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x7C 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x7C 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x7C 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x7C 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x7C 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x7C 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x7C 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x7C 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x7C 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x80 "DPTRGNCR32,"
bitfld.long 0x80 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x80 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x80 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x80 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x80 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x80 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x80 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x80 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x80 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x80 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x80 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x80 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x80 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x80 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x80 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x80 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x80 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x80 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x80 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x80 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x80 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x80 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x80 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x80 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x80 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x80 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x80 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x80 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x80 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x80 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x80 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x80 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x84 "DPTRGNCR33,"
bitfld.long 0x84 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x84 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x84 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x84 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x84 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x84 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x84 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x84 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x84 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x84 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x84 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x84 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x84 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x84 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x84 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x84 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x84 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x84 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x84 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x84 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x84 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x84 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x84 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x84 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x84 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x84 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x84 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x84 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x84 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x84 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x84 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x84 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x88 "DPTRGNCR34,"
bitfld.long 0x88 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x88 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x88 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x88 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x88 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x88 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x88 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x88 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x88 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x88 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x88 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x88 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x88 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x88 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x88 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x88 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x88 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x88 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x88 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x88 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x88 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x88 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x88 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x88 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x88 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x88 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x88 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x88 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x88 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x88 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x88 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x88 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x8C "DPTRGNCR35,"
bitfld.long 0x8C 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8C 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8C 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8C 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8C 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8C 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8C 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8C 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8C 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8C 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8C 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8C 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8C 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8C 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8C 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8C 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8C 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8C 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8C 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8C 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8C 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8C 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8C 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8C 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8C 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8C 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8C 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8C 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8C 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8C 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8C 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8C 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x90 "DPTRGNCR36,"
bitfld.long 0x90 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x90 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x90 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x90 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x90 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x90 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x90 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x90 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x90 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x90 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x90 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x90 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x90 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x90 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x90 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x90 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x90 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x90 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x90 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x90 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x90 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x90 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x90 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x90 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x90 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x90 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x90 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x90 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x90 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x90 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x90 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x90 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x94 "DPTRGNCR37,"
bitfld.long 0x94 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x94 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x94 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x94 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x94 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x94 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x94 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x94 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x94 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x94 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x94 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x94 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x94 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x94 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x94 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x94 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x94 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x94 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x94 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x94 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x94 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x94 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x94 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x94 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x94 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x94 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x94 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x94 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x94 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x94 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x94 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x94 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x98 "DPTRGNCR38,"
bitfld.long 0x98 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x98 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x98 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x98 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x98 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x98 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x98 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x98 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x98 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x98 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x98 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x98 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x98 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x98 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x98 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x98 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x98 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x98 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x98 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x98 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x98 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x98 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x98 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x98 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x98 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x98 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x98 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x98 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x98 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x98 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x98 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x98 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x9C "DPTRGNCR39,"
bitfld.long 0x9C 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x9C 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x9C 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x9C 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x9C 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x9C 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x9C 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x9C 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x9C 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x9C 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x9C 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x9C 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x9C 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x9C 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x9C 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x9C 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x9C 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x9C 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x9C 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x9C 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x9C 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x9C 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x9C 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x9C 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x9C 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x9C 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x9C 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x9C 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x9C 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x9C 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x9C 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x9C 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xA0 "DPTRGNCR40,"
bitfld.long 0xA0 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA0 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA0 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA0 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA0 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA0 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA0 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA0 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA0 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA0 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA0 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA0 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA0 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA0 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA0 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA0 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA0 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA0 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA0 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA0 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA0 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA0 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA0 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA0 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA0 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA0 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA0 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA0 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA0 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA0 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA0 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA0 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xA4 "DPTRGNCR41,"
bitfld.long 0xA4 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA4 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA4 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA4 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA4 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA4 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA4 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA4 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA4 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA4 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA4 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA4 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA4 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA4 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA4 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA4 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA4 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA4 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA4 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA4 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA4 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA4 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA4 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA4 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA4 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA4 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA4 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA4 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA4 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA4 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA4 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA4 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xA8 "DPTRGNCR42,"
bitfld.long 0xA8 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA8 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA8 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA8 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA8 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA8 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA8 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA8 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA8 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA8 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA8 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA8 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA8 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA8 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA8 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA8 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xA8 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA8 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA8 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA8 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA8 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA8 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA8 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA8 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA8 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA8 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA8 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA8 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA8 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA8 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA8 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xA8 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xAC "DPTRGNCR43,"
bitfld.long 0xAC 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xAC 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xAC 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xAC 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xAC 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xAC 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xAC 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xAC 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xAC 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xAC 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xAC 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xAC 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xAC 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xAC 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xAC 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xAC 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xAC 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xAC 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xAC 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xAC 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xAC 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xAC 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xAC 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xAC 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xAC 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xAC 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xAC 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xAC 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xAC 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xAC 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xAC 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xAC 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xB0 "DPTRGNCR44,"
bitfld.long 0xB0 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB0 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB0 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB0 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB0 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB0 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB0 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB0 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB0 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB0 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB0 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB0 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB0 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB0 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB0 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB0 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB0 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB0 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB0 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB0 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB0 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB0 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB0 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB0 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB0 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB0 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB0 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB0 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB0 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB0 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB0 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB0 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xB4 "DPTRGNCR45,"
bitfld.long 0xB4 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB4 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB4 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB4 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB4 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB4 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB4 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB4 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB4 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB4 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB4 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB4 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB4 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB4 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB4 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB4 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB4 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB4 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB4 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB4 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB4 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB4 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB4 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB4 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB4 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB4 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB4 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB4 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB4 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB4 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB4 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB4 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xB8 "DPTRGNCR46,"
bitfld.long 0xB8 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB8 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB8 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB8 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB8 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB8 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB8 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB8 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB8 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB8 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB8 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB8 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB8 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB8 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB8 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB8 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xB8 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB8 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB8 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB8 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB8 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB8 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB8 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB8 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB8 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB8 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB8 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB8 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB8 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB8 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB8 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xB8 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xBC "DPTRGNCR47,"
bitfld.long 0xBC 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xBC 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xBC 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xBC 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xBC 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xBC 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xBC 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xBC 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xBC 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xBC 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xBC 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xBC 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xBC 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xBC 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xBC 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xBC 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xBC 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xBC 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xBC 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xBC 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xBC 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xBC 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xBC 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xBC 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xBC 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xBC 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xBC 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xBC 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xBC 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xBC 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xBC 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xBC 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xC0 "DPTRGNCR48,"
bitfld.long 0xC0 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC0 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC0 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC0 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC0 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC0 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC0 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC0 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC0 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC0 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC0 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC0 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC0 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC0 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC0 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC0 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC0 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC0 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC0 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC0 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC0 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC0 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC0 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC0 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC0 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC0 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC0 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC0 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC0 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC0 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC0 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC0 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xC4 "DPTRGNCR49,"
bitfld.long 0xC4 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC4 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC4 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC4 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC4 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC4 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC4 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC4 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC4 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC4 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC4 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC4 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC4 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC4 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC4 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC4 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC4 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC4 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC4 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC4 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC4 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC4 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC4 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC4 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC4 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC4 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC4 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC4 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC4 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC4 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC4 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC4 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xC8 "DPTRGNCR50,"
bitfld.long 0xC8 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC8 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC8 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC8 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC8 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC8 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC8 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC8 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC8 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC8 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC8 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC8 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC8 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC8 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC8 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC8 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC8 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC8 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC8 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC8 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC8 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC8 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC8 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC8 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC8 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC8 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC8 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC8 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC8 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC8 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC8 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC8 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xCC "DPTRGNCR51,"
bitfld.long 0xCC 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xCC 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xCC 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xCC 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xCC 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xCC 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xCC 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xCC 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xCC 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xCC 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xCC 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xCC 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xCC 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xCC 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xCC 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xCC 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xCC 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xCC 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xCC 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xCC 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xCC 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xCC 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xCC 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xCC 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xCC 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xCC 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xCC 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xCC 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xCC 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xCC 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xCC 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xCC 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xD0 "DPTRGNCR52,"
bitfld.long 0xD0 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD0 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD0 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD0 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD0 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD0 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD0 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD0 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD0 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD0 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD0 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD0 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD0 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD0 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD0 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD0 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD0 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD0 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD0 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD0 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD0 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD0 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD0 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD0 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD0 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD0 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD0 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD0 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD0 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD0 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD0 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD0 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xD4 "DPTRGNCR53,"
bitfld.long 0xD4 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD4 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD4 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD4 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD4 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD4 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD4 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD4 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD4 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD4 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD4 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD4 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD4 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD4 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD4 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD4 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD4 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD4 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD4 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD4 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD4 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD4 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD4 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD4 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD4 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD4 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD4 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD4 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD4 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD4 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD4 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD4 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xD8 "DPTRGNCR54,"
bitfld.long 0xD8 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD8 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD8 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD8 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD8 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD8 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD8 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD8 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD8 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD8 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD8 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD8 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD8 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD8 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD8 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD8 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xD8 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD8 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD8 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD8 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD8 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD8 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD8 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD8 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD8 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD8 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD8 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD8 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD8 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD8 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD8 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xD8 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xDC "DPTRGNCR55,"
bitfld.long 0xDC 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xDC 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xDC 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xDC 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xDC 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xDC 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xDC 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xDC 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xDC 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xDC 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xDC 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xDC 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xDC 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xDC 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xDC 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xDC 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xDC 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xDC 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xDC 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xDC 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xDC 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xDC 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xDC 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xDC 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xDC 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xDC 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xDC 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xDC 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xDC 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xDC 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xDC 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xDC 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xE0 "DPTRGNCR56,"
bitfld.long 0xE0 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE0 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE0 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE0 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE0 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE0 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE0 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE0 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE0 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE0 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE0 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE0 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE0 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE0 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE0 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE0 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE0 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE0 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE0 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE0 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE0 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE0 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE0 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE0 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE0 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE0 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE0 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE0 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE0 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE0 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE0 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE0 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xE4 "DPTRGNCR57,"
bitfld.long 0xE4 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE4 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE4 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE4 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE4 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE4 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE4 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE4 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE4 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE4 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE4 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE4 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE4 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE4 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE4 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE4 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE4 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE4 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE4 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE4 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE4 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE4 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE4 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE4 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE4 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE4 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE4 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE4 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE4 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE4 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE4 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE4 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xE8 "DPTRGNCR58,"
bitfld.long 0xE8 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE8 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE8 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE8 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE8 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE8 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE8 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE8 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE8 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE8 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE8 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE8 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE8 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE8 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE8 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE8 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xE8 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE8 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE8 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE8 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE8 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE8 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE8 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE8 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE8 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE8 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE8 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE8 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE8 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE8 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE8 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xE8 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xEC "DPTRGNCR59,"
bitfld.long 0xEC 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xEC 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xEC 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xEC 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xEC 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xEC 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xEC 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xEC 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xEC 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xEC 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xEC 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xEC 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xEC 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xEC 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xEC 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xEC 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xEC 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xEC 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xEC 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xEC 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xEC 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xEC 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xEC 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xEC 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xEC 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xEC 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xEC 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xEC 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xEC 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xEC 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xEC 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xEC 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xF0 "DPTRGNCR60,"
bitfld.long 0xF0 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF0 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF0 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF0 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF0 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF0 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF0 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF0 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF0 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF0 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF0 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF0 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF0 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF0 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF0 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF0 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF0 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF0 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF0 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF0 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF0 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF0 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF0 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF0 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF0 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF0 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF0 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF0 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF0 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF0 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF0 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF0 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xF4 "DPTRGNCR61,"
bitfld.long 0xF4 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF4 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF4 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF4 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF4 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF4 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF4 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF4 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF4 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF4 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF4 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF4 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF4 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF4 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF4 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF4 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF4 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF4 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF4 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF4 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF4 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF4 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF4 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF4 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF4 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF4 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF4 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF4 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF4 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF4 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF4 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF4 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xF8 "DPTRGNCR62,"
bitfld.long 0xF8 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF8 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF8 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF8 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF8 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF8 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF8 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF8 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF8 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF8 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF8 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF8 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF8 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF8 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF8 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF8 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xF8 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF8 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF8 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF8 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF8 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF8 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF8 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF8 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF8 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF8 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF8 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF8 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF8 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF8 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF8 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xF8 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0xFC "DPTRGNCR63,"
bitfld.long 0xFC 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xFC 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xFC 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xFC 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xFC 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xFC 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xFC 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xFC 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xFC 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xFC 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xFC 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xFC 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xFC 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xFC 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xFC 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xFC 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant DRAM..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xFC 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xFC 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xFC 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xFC 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xFC 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xFC 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xFC 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xFC 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xFC 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xFC 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xFC 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xFC 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xFC 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xFC 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xFC 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xFC 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x100 "DPTSECCR0,"
hexmask.long.tbyte 0x100 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x100 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x100 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x100 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x100 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x100 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x100 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x100 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x100 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x100 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x104 "DPTSECCR1,"
hexmask.long.tbyte 0x104 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x104 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x104 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x104 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x104 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x104 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x104 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x104 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x104 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x104 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x108 "DPTSECCR2,"
hexmask.long.tbyte 0x108 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x108 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x108 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x108 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x108 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x108 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x108 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x108 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x108 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x108 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x10C "DPTSECCR3,"
hexmask.long.tbyte 0x10C 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x10C 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x10C 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10C 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x10C 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x10C 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x10C 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x10C 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10C 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x10C 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x110 "DPTSECCR4,"
hexmask.long.tbyte 0x110 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x110 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x110 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x110 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x110 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x110 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x110 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x110 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x110 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x110 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x114 "DPTSECCR5,"
hexmask.long.tbyte 0x114 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x114 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x114 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x114 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x114 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x114 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x114 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x114 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x114 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x114 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x118 "DPTSECCR6,"
hexmask.long.tbyte 0x118 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x118 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x118 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x118 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x118 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x118 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x118 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x118 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x118 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x118 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x11C "DPTSECCR7,"
hexmask.long.tbyte 0x11C 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x11C 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x11C 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x11C 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x11C 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x11C 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x11C 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x11C 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x11C 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x11C 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x120 "DPTSECCR8,"
hexmask.long.tbyte 0x120 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x120 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x120 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x120 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x120 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x120 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x120 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x120 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x120 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x120 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x124 "DPTSECCR9,"
hexmask.long.tbyte 0x124 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x124 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x124 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x124 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x124 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x124 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x124 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x124 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x124 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x124 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x128 "DPTSECCR10,"
hexmask.long.tbyte 0x128 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x128 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x128 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x128 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x128 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x128 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x128 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x128 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x128 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x128 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x12C "DPTSECCR11,"
hexmask.long.tbyte 0x12C 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x12C 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x12C 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x12C 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x12C 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x12C 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x12C 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x12C 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x12C 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x12C 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x130 "DPTSECCR12,"
hexmask.long.tbyte 0x130 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x130 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x130 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x130 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x130 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x130 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x130 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x130 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x130 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x130 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x134 "DPTSECCR13,"
hexmask.long.tbyte 0x134 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x134 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x134 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x134 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x134 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x134 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x134 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x134 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x134 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x134 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x138 "DPTSECCR14,"
hexmask.long.tbyte 0x138 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x138 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x138 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x138 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x138 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x138 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x138 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x138 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x138 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x138 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x13C "DPTSECCR15,"
hexmask.long.tbyte 0x13C 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x13C 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x13C 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x13C 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x13C 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x13C 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x13C 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x13C 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x13C 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x13C 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x140 "DPTSECCR16,"
hexmask.long.tbyte 0x140 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x140 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x140 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x140 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x140 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x140 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x140 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x140 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x140 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x140 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x144 "DPTSECCR17,"
hexmask.long.tbyte 0x144 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x144 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x144 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x144 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x144 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x144 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x144 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x144 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x144 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x144 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x148 "DPTSECCR18,"
hexmask.long.tbyte 0x148 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x148 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x148 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x148 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x148 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x148 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x148 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x148 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x148 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x148 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x14C "DPTSECCR19,"
hexmask.long.tbyte 0x14C 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x14C 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x14C 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14C 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x14C 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x14C 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x14C 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x14C 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14C 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x14C 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x150 "DPTSECCR20,"
hexmask.long.tbyte 0x150 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x150 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x150 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x150 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x150 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x150 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x150 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x150 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x150 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x150 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x154 "DPTSECCR21,"
hexmask.long.tbyte 0x154 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x154 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x154 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x154 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x154 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x154 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x154 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x154 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x154 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x154 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x158 "DPTSECCR22,"
hexmask.long.tbyte 0x158 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x158 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x158 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x158 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x158 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x158 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x158 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x158 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x158 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x158 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x15C "DPTSECCR23,"
hexmask.long.tbyte 0x15C 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x15C 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x15C 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x15C 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x15C 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x15C 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x15C 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x15C 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x15C 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x15C 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x160 "DPTSECCR24,"
hexmask.long.tbyte 0x160 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x160 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x160 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x160 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x160 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x160 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x160 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x160 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x160 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x160 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x164 "DPTSECCR25,"
hexmask.long.tbyte 0x164 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x164 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x164 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x164 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x164 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x164 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x164 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x164 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x164 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x164 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x168 "DPTSECCR26,"
hexmask.long.tbyte 0x168 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x168 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x168 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x168 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x168 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x168 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x168 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x168 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x168 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x168 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x16C "DPTSECCR27,"
hexmask.long.tbyte 0x16C 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x16C 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x16C 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x16C 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x16C 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x16C 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x16C 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x16C 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x16C 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x16C 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x170 "DPTSECCR28,"
hexmask.long.tbyte 0x170 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x170 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x170 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x170 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x170 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x170 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x170 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x170 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x170 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x170 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x174 "DPTSECCR29,"
hexmask.long.tbyte 0x174 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x174 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x174 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x174 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x174 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x174 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x174 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x174 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x174 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x174 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x178 "DPTSECCR30,"
hexmask.long.tbyte 0x178 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x178 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x178 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x178 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x178 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x178 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x178 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x178 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x178 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x178 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x17C "DPTSECCR31,"
hexmask.long.tbyte 0x17C 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x17C 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x17C 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x17C 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x17C 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x17C 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x17C 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x17C 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x17C 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x17C 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x180 "DPTSECCR32,"
hexmask.long.tbyte 0x180 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x180 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x180 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x180 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x180 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x180 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x180 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x180 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x180 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x180 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x184 "DPTSECCR33,"
hexmask.long.tbyte 0x184 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x184 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x184 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x184 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x184 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x184 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x184 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x184 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x184 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x184 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x188 "DPTSECCR34,"
hexmask.long.tbyte 0x188 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x188 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x188 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x188 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x188 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x188 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x188 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x188 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x188 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x188 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x18C "DPTSECCR35,"
hexmask.long.tbyte 0x18C 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x18C 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x18C 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18C 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x18C 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x18C 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x18C 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x18C 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18C 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x18C 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x190 "DPTSECCR36,"
hexmask.long.tbyte 0x190 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x190 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x190 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x190 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x190 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x190 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x190 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x190 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x190 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x190 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x194 "DPTSECCR37,"
hexmask.long.tbyte 0x194 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x194 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x194 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x194 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x194 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x194 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x194 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x194 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x194 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x194 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x198 "DPTSECCR38,"
hexmask.long.tbyte 0x198 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x198 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x198 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x198 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x198 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x198 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x198 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x198 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x198 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x198 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x19C "DPTSECCR39,"
hexmask.long.tbyte 0x19C 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x19C 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x19C 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x19C 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x19C 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x19C 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x19C 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x19C 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x19C 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x19C 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1A0 "DPTSECCR40,"
hexmask.long.tbyte 0x1A0 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1A0 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1A0 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1A0 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1A0 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1A0 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1A0 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1A0 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1A0 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1A0 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1A4 "DPTSECCR41,"
hexmask.long.tbyte 0x1A4 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1A4 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1A4 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1A4 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1A4 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1A4 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1A4 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1A4 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1A4 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1A4 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1A8 "DPTSECCR42,"
hexmask.long.tbyte 0x1A8 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1A8 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1A8 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1A8 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1A8 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1A8 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1A8 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1A8 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1A8 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1A8 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1AC "DPTSECCR43,"
hexmask.long.tbyte 0x1AC 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1AC 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1AC 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1AC 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1AC 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1AC 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1AC 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1AC 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1AC 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1AC 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1B0 "DPTSECCR44,"
hexmask.long.tbyte 0x1B0 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1B0 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1B0 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1B0 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1B0 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1B0 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1B0 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1B0 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1B0 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1B0 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1B4 "DPTSECCR45,"
hexmask.long.tbyte 0x1B4 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1B4 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1B4 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1B4 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1B4 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1B4 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1B4 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1B4 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1B4 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1B4 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1B8 "DPTSECCR46,"
hexmask.long.tbyte 0x1B8 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1B8 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1B8 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1B8 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1B8 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1B8 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1B8 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1B8 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1B8 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1B8 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1BC "DPTSECCR47,"
hexmask.long.tbyte 0x1BC 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1BC 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1BC 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1BC 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1BC 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1BC 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1BC 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1BC 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1BC 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1BC 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1C0 "DPTSECCR48,"
hexmask.long.tbyte 0x1C0 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1C0 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1C0 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C0 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1C0 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1C0 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1C0 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1C0 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C0 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1C0 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1C4 "DPTSECCR49,"
hexmask.long.tbyte 0x1C4 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1C4 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1C4 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C4 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1C4 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1C4 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1C4 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1C4 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C4 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1C4 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1C8 "DPTSECCR50,"
hexmask.long.tbyte 0x1C8 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1C8 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1C8 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C8 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1C8 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1C8 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1C8 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1C8 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C8 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1C8 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1CC "DPTSECCR51,"
hexmask.long.tbyte 0x1CC 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1CC 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1CC 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1CC 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1CC 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1CC 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1CC 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1CC 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1CC 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1CC 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1D0 "DPTSECCR52,"
hexmask.long.tbyte 0x1D0 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1D0 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1D0 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1D0 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1D0 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1D0 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1D0 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1D0 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1D0 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1D0 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1D4 "DPTSECCR53,"
hexmask.long.tbyte 0x1D4 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1D4 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1D4 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1D4 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1D4 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1D4 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1D4 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1D4 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1D4 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1D4 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1D8 "DPTSECCR54,"
hexmask.long.tbyte 0x1D8 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1D8 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1D8 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1D8 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1D8 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1D8 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1D8 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1D8 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1D8 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1D8 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1DC "DPTSECCR55,"
hexmask.long.tbyte 0x1DC 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1DC 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1DC 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1DC 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1DC 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1DC 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1DC 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1DC 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1DC 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1DC 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1E0 "DPTSECCR56,"
hexmask.long.tbyte 0x1E0 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1E0 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1E0 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1E0 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1E0 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1E0 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1E0 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1E0 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1E0 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1E0 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1E4 "DPTSECCR57,"
hexmask.long.tbyte 0x1E4 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1E4 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1E4 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1E4 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1E4 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1E4 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1E4 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1E4 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1E4 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1E4 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1E8 "DPTSECCR58,"
hexmask.long.tbyte 0x1E8 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1E8 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1E8 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1E8 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1E8 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1E8 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1E8 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1E8 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1E8 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1E8 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1EC "DPTSECCR59,"
hexmask.long.tbyte 0x1EC 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1EC 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1EC 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1EC 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1EC 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1EC 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1EC 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1EC 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1EC 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1EC 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1F0 "DPTSECCR60,"
hexmask.long.tbyte 0x1F0 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1F0 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1F0 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1F0 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1F0 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1F0 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1F0 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1F0 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1F0 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1F0 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1F4 "DPTSECCR61,"
hexmask.long.tbyte 0x1F4 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1F4 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1F4 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1F4 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1F4 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1F4 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1F4 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1F4 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1F4 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1F4 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1F8 "DPTSECCR62,"
hexmask.long.tbyte 0x1F8 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1F8 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1F8 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1F8 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1F8 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1F8 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1F8 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1F8 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1F8 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1F8 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x1FC "DPTSECCR63,"
hexmask.long.tbyte 0x1FC 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1FC 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1FC 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1FC 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1FC 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant DRAM..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1FC 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1FC 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1FC 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1FC 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1FC 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant DRAM..,1: Does not have the privilege write to the.."
line.long 0x200 "SPTDIVCR0,"
hexmask.long.word 0x200 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x200 0.--19. 1. "DIVADDR_31_12,protection division address is set."
line.long 0x204 "SPTDIVCR1,"
hexmask.long.word 0x204 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x204 0.--19. 1. "DIVADDR_31_12,protection division address is set."
line.long 0x208 "SPTDIVCR2,"
hexmask.long.word 0x208 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x208 0.--19. 1. "DIVADDR_31_12,protection division address is set."
line.long 0x20C "SPTDIVCR3,"
hexmask.long.word 0x20C 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x20C 0.--19. 1. "DIVADDR_31_12,protection division address is set."
line.long 0x210 "SPTDIVCR4,"
hexmask.long.word 0x210 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x210 0.--19. 1. "DIVADDR_31_12,protection division address is set."
line.long 0x214 "SPTDIVCR5,"
hexmask.long.word 0x214 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x214 0.--19. 1. "DIVADDR_31_12,protection division address is set."
line.long 0x218 "SPTDIVCR6,"
hexmask.long.word 0x218 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x218 0.--19. 1. "DIVADDR_31_12,protection division address is set."
line.long 0x21C "SPTDIVCR7,"
hexmask.long.word 0x21C 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x21C 0.--19. 1. "DIVADDR_31_12,protection division address is set."
line.long 0x220 "SPTDIVCR8,"
hexmask.long.word 0x220 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x220 0.--19. 1. "DIVADDR_31_12,protection division address is set."
line.long 0x224 "SPTDIVCR9,"
hexmask.long.word 0x224 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x224 0.--19. 1. "DIVADDR_31_12,protection division address is set."
line.long 0x228 "SPTDIVCR10,"
hexmask.long.word 0x228 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x228 0.--19. 1. "DIVADDR_31_12,protection division address is set."
line.long 0x22C "SPTDIVCR11,"
hexmask.long.word 0x22C 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x22C 0.--19. 1. "DIVADDR_31_12,protection division address is set."
line.long 0x230 "SPTDIVCR12,"
hexmask.long.word 0x230 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x230 0.--19. 1. "DIVADDR_31_12,protection division address is set."
line.long 0x234 "SPTDIVCR13,"
hexmask.long.word 0x234 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x234 0.--19. 1. "DIVADDR_31_12,protection division address is set."
line.long 0x238 "SPTDIVCR14,"
hexmask.long.word 0x238 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x238 0.--19. 1. "DIVADDR_31_12,protection division address is set."
group.long 0x2100++0x3F
line.long 0x0 "SPTRGNCR0,"
bitfld.long 0x0 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x0 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x4 "SPTRGNCR1,"
bitfld.long 0x4 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x4 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x8 "SPTRGNCR2,"
bitfld.long 0x8 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x8 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0xC "SPTRGNCR3,"
bitfld.long 0xC 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0xC 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x10 "SPTRGNCR4,"
bitfld.long 0x10 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x10 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x14 "SPTRGNCR5,"
bitfld.long 0x14 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x14 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x18 "SPTRGNCR6,"
bitfld.long 0x18 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x18 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x1C "SPTRGNCR7,"
bitfld.long 0x1C 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x1C 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x20 "SPTRGNCR8,"
bitfld.long 0x20 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x20 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x24 "SPTRGNCR9,"
bitfld.long 0x24 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x24 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x28 "SPTRGNCR10,"
bitfld.long 0x28 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x28 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x2C "SPTRGNCR11,"
bitfld.long 0x2C 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x2C 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x30 "SPTRGNCR12,"
bitfld.long 0x30 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x30 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x34 "SPTRGNCR13,"
bitfld.long 0x34 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x34 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x38 "SPTRGNCR14,"
bitfld.long 0x38 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x38 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x3C "SPTRGNCR15,"
bitfld.long 0x3C 31. "RGN15RP,RegionID15 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 30. "RGN14RP,RegionID14 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 29. "RGN13RP,RegionID13 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 28. "RGN12RP,RegionID12 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 27. "RGN11RP,RegionID11 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 26. "RGN10RP,RegionID10 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 25. "RGN9RP,RegionID9 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 24. "RGN8RP,RegionID8 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 23. "RGN7RP,RegionID7 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 22. "RGN6RP,RegionID6 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 21. "RGN5RP,RegionID5 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 20. "RGN4RP,RegionID4 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 19. "RGN3RP,RegionID3 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 18. "RGN2RP,RegionID2 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 17. "RGN1RP,RegionID1 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 16. "RGN0RP,RegionID0 Read Privilege Setting" "0: Has the privilege to Read to the relevant..,1: Does not have the privilege Read to the relevant.."
newline
bitfld.long 0x3C 15. "RGN15WP,RegionID15 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 14. "RGN14WP,RegionID14 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 13. "RGN13WP,RegionID13 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 12. "RGN12WP,RegionID12 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 11. "RGN11WP,RegionID11 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 10. "RGN10WP,RegionID10 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 9. "RGN9WP,RegionID9 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 8. "RGN8WP,RegionID8 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 7. "RGN7WP,RegionID7 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 6. "RGN6WP,RegionID6 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 5. "RGN5WP,RegionID5 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 4. "RGN4WP,RegionID4 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 3. "RGN3WP,RegionID3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 2. "RGN2WP,RegionID2 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 1. "RGN1WP,RegionID1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 0. "RGN0WP,RegionID0 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
group.long 0x2200++0x3F
line.long 0x0 "SPTSECCR0,"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x0 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x0 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x0 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x0 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x0 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x0 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x0 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x4 "SPTSECCR1,"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x4 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x4 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x4 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x4 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x4 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x4 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x4 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x8 "SPTSECCR2,"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x8 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x8 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x8 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x8 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x8 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x8 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x8 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x8 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0xC "SPTSECCR3,"
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0xC 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0xC 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0xC 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0xC 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0xC 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0xC 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0xC 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0xC 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x10 "SPTSECCR4,"
hexmask.long.tbyte 0x10 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x10 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x10 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x10 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x10 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x10 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x10 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x10 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x10 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x14 "SPTSECCR5,"
hexmask.long.tbyte 0x14 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x14 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x14 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x14 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x14 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x14 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x14 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x14 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x14 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x18 "SPTSECCR6,"
hexmask.long.tbyte 0x18 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x18 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x18 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x18 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x18 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x18 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x18 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x18 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x18 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x1C "SPTSECCR7,"
hexmask.long.tbyte 0x1C 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x1C 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x1C 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x1C 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x1C 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x1C 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x1C 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x1C 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x1C 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x20 "SPTSECCR8,"
hexmask.long.tbyte 0x20 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x20 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x20 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x20 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x20 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x20 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x20 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x20 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x20 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x24 "SPTSECCR9,"
hexmask.long.tbyte 0x24 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x24 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x24 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x24 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x24 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x24 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x24 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x24 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x24 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x28 "SPTSECCR10,"
hexmask.long.tbyte 0x28 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x28 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x28 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x28 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x28 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x28 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x28 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x28 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x28 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x2C "SPTSECCR11,"
hexmask.long.tbyte 0x2C 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x2C 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x2C 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x2C 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x2C 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x2C 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x2C 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x2C 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x2C 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x30 "SPTSECCR12,"
hexmask.long.tbyte 0x30 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x30 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x30 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x30 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x30 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x30 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x30 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x30 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x30 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x34 "SPTSECCR13,"
hexmask.long.tbyte 0x34 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x34 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x34 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x34 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x34 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x34 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x34 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x34 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x34 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x38 "SPTSECCR14,"
hexmask.long.tbyte 0x38 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x38 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x38 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x38 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x38 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x38 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x38 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x38 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x38 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
line.long 0x3C "SPTSECCR15,"
hexmask.long.tbyte 0x3C 12.--31. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x3C 11. "SECG0RP,Reserved" "0,1"
newline
bitfld.long 0x3C 10. "SECG1RP,Secure Group1 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 9. "SECG2RP,Reserved" "0,1"
newline
bitfld.long 0x3C 8. "SECG3RP,Secure Group3 Read Privilege Setting" "0: Has the privilege to read to the relevant System..,1: Does not have the privilege read to the relevant.."
newline
hexmask.long.byte 0x3C 4.--7. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x3C 3. "SECG0WP,Reserved" "0,1"
newline
bitfld.long 0x3C 2. "SECG1WP,Secure Group1 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
newline
bitfld.long 0x3C 1. "SECG2WP,Reserved" "0,1"
newline
bitfld.long 0x3C 0. "SECG3WP,Secure Group3 Write Privilege Setting" "0: Has the privilege to write to the relevant..,1: Does not have the privilege write to the.."
group.long 0x2300++0xEF
line.long 0x0 "PTRGNCAUSER,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
eventfld.long 0x0 13. "MMU_RGNERR_R,Region ID Error detect of MMU read port." "0: No Error,1: Error"
newline
bitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
newline
eventfld.long 0x0 11. "CCI_RGNERR_R,Region ID Error detect of CCI read port." "0: No Error,1: Error"
newline
eventfld.long 0x0 10. "CCI_RGNERR_W,Region ID Error detect of CCI write port." "0: No Error,1: Error"
newline
eventfld.long 0x0 9. "PERI_RGNERR_R,Region ID Error detect of PERI read port." "0: No Error,1: Error"
newline
eventfld.long 0x0 8. "PERI_RGNERR_W,Region ID Error detect of PERI write port." "0: No Error,1: Error"
newline
eventfld.long 0x0 7. "MDA1_RGNERR_R,Region ID Error detect of MDA1 read port." "0: No Error,1: Error"
newline
eventfld.long 0x0 6. "MDA1_RGNERR_W,Region ID Error detect of MDA1 write port." "0: No Error,1: Error"
newline
eventfld.long 0x0 5. "MDA0_RGNERR_R,Region ID Error detect of MDA0 read port." "0: No Error,1: Error"
newline
eventfld.long 0x0 4. "MDA0_RGNERR_W,Region ID Error detect of MDA0 write port." "0: No Error,1: Error"
newline
eventfld.long 0x0 3. "U3DG1_RGNERR_R,Region ID Error detect of U3DG1 read port." "0: No Error,1: Error"
newline
eventfld.long 0x0 2. "U3DG1_RGNERR_W,Region ID Error detect of U3DG1 read port." "0: No Error,1: Error"
newline
eventfld.long 0x0 1. "U3DG0_RGNERR_R,Region ID Error detect of U3DG0 read port." "0: No Error,1: Error"
newline
eventfld.long 0x0 0. "U3DG0_RGNERR_W,Region ID Error detect of U3DG0 write port." "0: No Error,1: Error"
line.long 0x4 "PTSECCAUSER,"
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
eventfld.long 0x4 13. "MMU_SECERR_R,Secure Error detect of MMU read port." "0: No Error,1: Error"
newline
bitfld.long 0x4 12. "Reserved_12,Reserved" "0,1"
newline
eventfld.long 0x4 11. "CCI_SECERR_R,Secure Error detect of CCI read port." "0: No Error,1: Error"
newline
eventfld.long 0x4 10. "CCI_SECERR_W,Secure Error detect of CCI write port." "0: No Error,1: Error"
newline
eventfld.long 0x4 9. "PERI_SECERR_R,Secure Error detect of PERI read port." "0: No Error,1: Error"
newline
eventfld.long 0x4 8. "PERI_SECERR_W,Secure Error detect of PERI write port." "0: No Error,1: Error"
newline
eventfld.long 0x4 7. "MDA1_SECERR_R,Secure Error detect of MDA1 read port." "0: No Error,1: Error"
newline
eventfld.long 0x4 6. "MDA1_SECERR_W,Secure Error detect of MDA1 write port." "0: No Error,1: Error"
newline
eventfld.long 0x4 5. "MDA0_SECERR_R,Secure Error detect of MDA0 read port." "0: No Error,1: Error"
newline
eventfld.long 0x4 4. "MDA0_SECERR_W,Secure Error detect of MDA0 write port." "0: No Error,1: Error"
newline
eventfld.long 0x4 3. "U3DG1_SECERR_R,Secure Error detect of U3DG1 read port." "0: No Error,1: Error"
newline
eventfld.long 0x4 2. "U3DG1_SECERR_W,Secure Error detect of U3DG1 read port." "0: No Error,1: Error"
newline
eventfld.long 0x4 1. "U3DG0_SECERR_R,Secure Error detect of U3DG0 read port." "0: No Error,1: Error"
newline
eventfld.long 0x4 0. "U3DG0_SECERR_W,Secure Error detect of U3DG0 write port." "0: No Error,1: Error"
line.long 0x8 "PTRGNERRCR,"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
newline
eventfld.long 0x8 13. "MMU_RGNERR_INJ_R,Region ID Error injection of MMU read port." "0: No Error,1: Error"
newline
eventfld.long 0x8 12. "Reserved_12,Reserved" "0,1"
newline
eventfld.long 0x8 11. "CCI_RGNERR_INJ_R,Region ID Error injection of CCI read port." "0: No Error,1: Error"
newline
eventfld.long 0x8 10. "CCI_RGNERR_INJ_W,Region ID Error injection of CCI write port." "0: No Error,1: Error"
newline
eventfld.long 0x8 9. "PERI_RGNERR_INJ_R,Region ID Error injection of PERI read port." "0: No Error,1: Error"
newline
eventfld.long 0x8 8. "PERI_RGNERR_INJ_W,Region ID Error injection of PERI write port." "0: No Error,1: Error"
newline
eventfld.long 0x8 7. "MDA1_RGNERR_INJ_R,Region ID Error injection of MDA1 read port." "0: No Error,1: Error"
newline
eventfld.long 0x8 6. "MDA1_RGNERR_INJ_W,Region ID Error injection of MDA1 write port." "0: No Error,1: Error"
newline
eventfld.long 0x8 5. "MDA0_RGNERR_INJ_R,Region ID Error injection of MDA0 read port." "0: No Error,1: Error"
newline
eventfld.long 0x8 4. "MDA0_RGNERR_INJ_W,Region ID Error injection of MDA0 write port." "0: No Error,1: Error"
newline
eventfld.long 0x8 3. "U3DG1_RGNERR_INJ_R,Region ID Error injection of U3DG1 read port." "0: No Error,1: Error"
newline
eventfld.long 0x8 2. "U3DG1_RGNERR_INJ_W,Region ID Error injection of U3DG1 read port." "0: No Error,1: Error"
newline
eventfld.long 0x8 1. "U3DG0_RGNERR_INJ_R,Region ID Error injection of U3DG0 read port." "0: No Error,1: Error"
newline
eventfld.long 0x8 0. "U3DG0_RGNERR_INJ_W,Region ID Error injection of U3DG0 write port." "0: No Error,1: Error"
line.long 0xC "PTSECERRCR,"
hexmask.long.tbyte 0xC 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0xC 13. "MMU_SECERR_INJ_R,Secure Error injection of MMU read port." "0: No Error,1: Error"
newline
bitfld.long 0xC 12. "Reserved_12,Reserved" "0,1"
newline
bitfld.long 0xC 11. "CCI_SECERR_INJ_R,Secure Error injection of CCI read port." "0: No Error,1: Error"
newline
bitfld.long 0xC 10. "CCI_SECERR_INJ_W,Secure Error injection of CCI write port." "0: No Error,1: Error"
newline
bitfld.long 0xC 9. "PERI_SECERR_INJ_R,Secure Error injection of PERI read port." "0: No Error,1: Error"
newline
bitfld.long 0xC 8. "PERI_SECERR_INJ_W,Secure Error injection of PERI write port." "0: No Error,1: Error"
newline
bitfld.long 0xC 7. "MDA1_SECERR_INJ_R,Secure Error injection of MDA1 read port." "0: No Error,1: Error"
newline
bitfld.long 0xC 6. "MDA1_SECERR_INJ_W,Secure Error injection of MDA1 write port." "0: No Error,1: Error"
newline
bitfld.long 0xC 5. "MDA0_SECERR_INJ_R,Secure Error injection of MDA0 read port." "0: No Error,1: Error"
newline
bitfld.long 0xC 4. "MDA0_SECERR_INJ_W,Secure Error injection of MDA0 write port." "0: No Error,1: Error"
newline
bitfld.long 0xC 3. "U3DG1_SECERR_INJ_R,Secure Error injection of U3DG1 read port." "0: No Error,1: Error"
newline
bitfld.long 0xC 2. "U3DG1_SECERR_INJ_W,Secure Error injection of U3DG1 read port." "0: No Error,1: Error"
newline
bitfld.long 0xC 1. "U3DG0_SECERR_INJ_R,Secure Error injection of U3DG0 read port." "0: No Error,1: Error"
newline
bitfld.long 0xC 0. "U3DG0_SECERR_INJ_W,Secure Error injection of U3DG0 write port." "0: No Error,1: Error"
line.long 0x10 "PTRGNINF0,"
hexmask.long 0x10 0.--31. 1. "ADR_W_37_6,Region ID Error Write Address"
line.long 0x14 "PTRGNINF1,"
hexmask.long 0x14 0.--31. 1. "ADR_W_37_6,Region ID Error Write Address"
line.long 0x18 "PTRGNINF2,"
hexmask.long 0x18 0.--31. 1. "ADR_W_37_6,Region ID Error Write Address"
line.long 0x1C "PTRGNINF3,"
hexmask.long 0x1C 0.--31. 1. "ADR_W_37_6,Region ID Error Write Address"
line.long 0x20 "PTRGNINF4,"
hexmask.long 0x20 0.--31. 1. "ADR_W_37_6,Region ID Error Write Address"
line.long 0x24 "PTRGNINF5,"
hexmask.long 0x24 0.--31. 1. "ADR_W_37_6,Region ID Error Write Address"
line.long 0x28 "PTRGNINF6,"
hexmask.long 0x28 0.--31. 1. "ADR_W_37_6,Region ID Error Write Address"
line.long 0x2C "PTRGNINF7,"
hexmask.long.tbyte 0x2C 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x2C 0.--7. 1. "SRCID_W_7_0,Region ID Error Write SRCID"
line.long 0x30 "PTRGNINF8,"
hexmask.long.tbyte 0x30 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x30 0.--7. 1. "SRCID_W_7_0,Region ID Error Write SRCID"
line.long 0x34 "PTRGNINF9,"
hexmask.long.tbyte 0x34 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x34 0.--7. 1. "SRCID_W_7_0,Region ID Error Write SRCID"
line.long 0x38 "PTRGNINF10,"
hexmask.long.tbyte 0x38 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x38 0.--7. 1. "SRCID_W_7_0,Region ID Error Write SRCID"
line.long 0x3C "PTRGNINF11,"
hexmask.long.tbyte 0x3C 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x3C 0.--7. 1. "SRCID_W_7_0,Region ID Error Write SRCID"
line.long 0x40 "PTRGNINF12,"
hexmask.long.tbyte 0x40 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x40 0.--7. 1. "SRCID_W_7_0,Region ID Error Write SRCID"
line.long 0x44 "PTRGNINF13,"
hexmask.long.tbyte 0x44 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x44 0.--7. 1. "SRCID_W_7_0,Region ID Error Write SRCID"
line.long 0x48 "PTRGNINF14,"
hexmask.long 0x48 0.--31. 1. "ADR_R_37_6,Region ID Error Read Address"
line.long 0x4C "PTRGNINF15,"
hexmask.long 0x4C 0.--31. 1. "ADR_R_37_6,Region ID Error Read Address"
line.long 0x50 "PTRGNINF16,"
hexmask.long 0x50 0.--31. 1. "ADR_R_37_6,Region ID Error Read Address"
line.long 0x54 "PTRGNINF17,"
hexmask.long 0x54 0.--31. 1. "ADR_R_37_6,Region ID Error Read Address"
line.long 0x58 "PTRGNINF18,"
hexmask.long 0x58 0.--31. 1. "ADR_R_37_6,Region ID Error Read Address"
line.long 0x5C "PTRGNINF19,"
hexmask.long 0x5C 0.--31. 1. "ADR_R_37_6,Region ID Error Read Address"
line.long 0x60 "PTRGNINF20,"
hexmask.long 0x60 0.--31. 1. "ADR_R_37_6,Region ID Error Read Address"
line.long 0x64 "PTRGNINF21,"
hexmask.long.tbyte 0x64 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x64 0.--7. 1. "SRCID_R_7_0,Region ID Error Read SRCID"
line.long 0x68 "PTRGNINF22,"
hexmask.long.tbyte 0x68 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x68 0.--7. 1. "SRCID_R_7_0,Region ID Error Read SRCID"
line.long 0x6C "PTRGNINF23,"
hexmask.long.tbyte 0x6C 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x6C 0.--7. 1. "SRCID_R_7_0,Region ID Error Read SRCID"
line.long 0x70 "PTRGNINF24,"
hexmask.long.tbyte 0x70 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x70 0.--7. 1. "SRCID_R_7_0,Region ID Error Read SRCID"
line.long 0x74 "PTRGNINF25,"
hexmask.long.tbyte 0x74 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x74 0.--7. 1. "SRCID_R_7_0,Region ID Error Read SRCID"
line.long 0x78 "PTRGNINF26,"
hexmask.long.tbyte 0x78 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x78 0.--7. 1. "SRCID_R_7_0,Region ID Error Read SRCID"
line.long 0x7C "PTRGNINF27,"
hexmask.long.tbyte 0x7C 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x7C 0.--7. 1. "SRCID_R_7_0,Region ID Error Read SRCID"
line.long 0x80 "PTSECINF0,"
hexmask.long 0x80 0.--31. 1. "ADR_W_37_6,Secure Error Write Address"
line.long 0x84 "PTSECINF1,"
hexmask.long 0x84 0.--31. 1. "ADR_W_37_6,Secure Error Write Address"
line.long 0x88 "PTSECINF2,"
hexmask.long 0x88 0.--31. 1. "ADR_W_37_6,Secure Error Write Address"
line.long 0x8C "PTSECINF3,"
hexmask.long 0x8C 0.--31. 1. "ADR_W_37_6,Secure Error Write Address"
line.long 0x90 "PTSECINF4,"
hexmask.long 0x90 0.--31. 1. "ADR_W_37_6,Secure Error Write Address"
line.long 0x94 "PTSECINF5,"
hexmask.long 0x94 0.--31. 1. "ADR_W_37_6,Secure Error Write Address"
line.long 0x98 "PTSECINF6,"
hexmask.long 0x98 0.--31. 1. "ADR_W_37_6,Secure Error Write Address"
line.long 0x9C "PTSECINF7,"
hexmask.long.tbyte 0x9C 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x9C 0.--7. 1. "SRCID_W_7_0,Secure Error Write SRCID"
line.long 0xA0 "PTSECINF8,"
hexmask.long.tbyte 0xA0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xA0 0.--7. 1. "SRCID_W_7_0,Secure Error Write SRCID"
line.long 0xA4 "PTSECINF9,"
hexmask.long.tbyte 0xA4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xA4 0.--7. 1. "SRCID_W_7_0,Secure Error Write SRCID"
line.long 0xA8 "PTSECINF10,"
hexmask.long.tbyte 0xA8 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xA8 0.--7. 1. "SRCID_W_7_0,Secure Error Write SRCID"
line.long 0xAC "PTSECINF11,"
hexmask.long.tbyte 0xAC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xAC 0.--7. 1. "SRCID_W_7_0,Secure Error Write SRCID"
line.long 0xB0 "PTSECINF12,"
hexmask.long.tbyte 0xB0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xB0 0.--7. 1. "SRCID_W_7_0,Secure Error Write SRCID"
line.long 0xB4 "PTSECINF13,"
hexmask.long.tbyte 0xB4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xB4 0.--7. 1. "SRCID_W_7_0,Secure Error Write SRCID"
line.long 0xB8 "PTSECINF14,"
hexmask.long 0xB8 0.--31. 1. "ADR_R_37_6,Secure Error Read Address"
line.long 0xBC "PTSECINF15,"
hexmask.long 0xBC 0.--31. 1. "ADR_R_37_6,Secure Error Read Address"
line.long 0xC0 "PTSECINF16,"
hexmask.long 0xC0 0.--31. 1. "ADR_R_37_6,Secure Error Read Address"
line.long 0xC4 "PTSECINF17,"
hexmask.long 0xC4 0.--31. 1. "ADR_R_37_6,Secure Error Read Address"
line.long 0xC8 "PTSECINF18,"
hexmask.long 0xC8 0.--31. 1. "ADR_R_37_6,Secure Error Read Address"
line.long 0xCC "PTSECINF19,"
hexmask.long 0xCC 0.--31. 1. "ADR_R_37_6,Secure Error Read Address"
line.long 0xD0 "PTSECINF20,"
hexmask.long 0xD0 0.--31. 1. "ADR_R_37_6,Secure Error Read Address"
line.long 0xD4 "PTSECINF21,"
hexmask.long.tbyte 0xD4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xD4 0.--7. 1. "SRCID_R_7_0,Secure Error Read SRCID"
line.long 0xD8 "PTSECINF22,"
hexmask.long.tbyte 0xD8 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xD8 0.--7. 1. "SRCID_R_7_0,Secure Error Read SRCID"
line.long 0xDC "PTSECINF23,"
hexmask.long.tbyte 0xDC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xDC 0.--7. 1. "SRCID_R_7_0,Secure Error Read SRCID"
line.long 0xE0 "PTSECINF24,"
hexmask.long.tbyte 0xE0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xE0 0.--7. 1. "SRCID_R_7_0,Secure Error Read SRCID"
line.long 0xE4 "PTSECINF25,"
hexmask.long.tbyte 0xE4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xE4 0.--7. 1. "SRCID_R_7_0,Secure Error Read SRCID"
line.long 0xE8 "PTSECINF26,"
hexmask.long.tbyte 0xE8 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xE8 0.--7. 1. "SRCID_R_7_0,Secure Error Read SRCID"
line.long 0xEC "PTSECINF27,"
hexmask.long.tbyte 0xEC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xEC 0.--7. 1. "SRCID_R_7_0,Secure Error Read SRCID"
group.long 0x2400++0xF
line.long 0x0 "EDCCAUSER,"
hexmask.long.word 0x0 22.--31. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "PWDATA_EDC_ERR,PWDATA EDC Error detection of APB I/F" "0,1"
newline
bitfld.long 0x0 20. "PADD_EDC_ERR,PADD EDC Error detection of APB I/F" "0,1"
newline
bitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x0 18. "NODE_INFERR_W,Node Inforamtion Error of AWch for SlaveBus access" "0,1"
newline
bitfld.long 0x0 17. "NODE_INFERR_R,Node Inforamtion Error of ARch for SlaveBus access" "0,1"
newline
bitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
bitfld.long 0x0 15. "BSTID_ERR_R,BSTID error detect of SlaveBus(CCIS) read port." "0,1"
newline
bitfld.long 0x0 14. "RAM_EDC_ERR,EDC error detect of SRAM Read" "0,1"
newline
bitfld.long 0x0 13. "MMU_EDCERR_R,EDC error detect of MMU read port." "0,1"
newline
bitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
newline
bitfld.long 0x0 11. "CCI_EDCERR_R,EDC error detect of CCI read port." "0,1"
newline
bitfld.long 0x0 10. "CCI_EDCERR_W,EDC error detect of CCI write port." "0,1"
newline
bitfld.long 0x0 9. "PERI_EDCERR_R,EDC error detect of PERI read port." "0,1"
newline
bitfld.long 0x0 8. "PERI_EDCERR_W,EDC error detect of PERI write port." "0,1"
newline
bitfld.long 0x0 7. "MDA1_EDCERR_R,EDC error detect of MDA1 read port." "0,1"
newline
bitfld.long 0x0 6. "MDA1_EDCERR_W,EDC error detect of MDA1 write port." "0,1"
newline
bitfld.long 0x0 5. "MDA0_EDCERR_R,EDC error detect of MDA0 read port." "0,1"
newline
bitfld.long 0x0 4. "MDA0_EDCERR_W,EDC error detect of MDA0 write port." "0,1"
newline
bitfld.long 0x0 3. "RGX1_EDCERR_R,EDC error detect of RGX1 read port." "0,1"
newline
bitfld.long 0x0 2. "RGX1_EDCERR_W,EDC error detect of RGX1 write port." "0,1"
newline
bitfld.long 0x0 1. "RGX0_EDCERR_R,EDC error detect of RGX0 read port." "0,1"
newline
bitfld.long 0x0 0. "RGX0_EDCERR_W,EDC error detect of RGX0 write port." "0,1"
line.long 0x4 "EDCERRCR0,"
hexmask.long.byte 0x4 28.--31. 1. "Reserved_28,Reserved"
newline
bitfld.long 0x4 27. "MMU_EDCINJ_POST_R0,EDC error injection post of MMU read port" "0,1"
newline
bitfld.long 0x4 26. "MMU_EDCINJ_POST_R1,EDC error injection post of MMU read port" "0,1"
newline
bitfld.long 0x4 24.--25. "Reserved_24,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 23. "CCI_EDCINJ_POST_R,EDC error injection post of CCI read port" "0,1"
newline
bitfld.long 0x4 22. "CCI_EDCINJ_PRE_R,EDC error injection pre of CCI read port" "0,1"
newline
bitfld.long 0x4 21. "CCI_EDCINJ_POST_W,EDC error injection post of CCI write port" "0,1"
newline
bitfld.long 0x4 20. "CCI_EDCINJ_PRE_W,EDC error injection pre of CCI write port" "0,1"
newline
bitfld.long 0x4 19. "PERI_EDCINJ_POST_R,EDC error injection post of PERI read port" "0,1"
newline
bitfld.long 0x4 18. "PERI_EDCINJ_PRE_R,EDC error injection pre of PERI read port" "0,1"
newline
bitfld.long 0x4 17. "PERI_EDCINJ_POST_W,EDC error injection post of PERI write port" "0,1"
newline
bitfld.long 0x4 16. "PERI_EDCINJ_PRE_W,EDC error injection pre of PERI write port" "0,1"
newline
bitfld.long 0x4 15. "MDA1_EDCINJ_POST_R,EDC error injection post of MDA1 read port" "0,1"
newline
bitfld.long 0x4 14. "MDA1_EDCINJ_PRE_R,EDC error injection pre of MDA1 read port" "0,1"
newline
bitfld.long 0x4 13. "MDA1_EDCINJ_POST_W,EDC error injection post of MDA1 write port" "0,1"
newline
bitfld.long 0x4 12. "MDA1_EDCINJ_PRE_W,EDC error injection pre of MDA1 write port" "0,1"
newline
bitfld.long 0x4 11. "MDA0_EDCINJ_POST_R,EDC error injection post of MDA0 read port" "0,1"
newline
bitfld.long 0x4 10. "MDA0_EDCINJ_PRE_R,EDC error injection pre of MDA0 read port" "0,1"
newline
bitfld.long 0x4 9. "MDA0_EDCINJ_POST_W,EDC error injection post of MDA0 write port" "0,1"
newline
bitfld.long 0x4 8. "MDA0_EDCINJ_PRE_W,EDC error injection pre of MDA0 write port" "0,1"
newline
bitfld.long 0x4 7. "RGX1_EDCINJ_POST_R,EDC error injection post of RGX1 read port" "0,1"
newline
bitfld.long 0x4 6. "RGX1_EDCINJ_PRE_R,EDC error injection pre of RGX1 read port" "0,1"
newline
bitfld.long 0x4 5. "RGX1_EDCINJ_POST_W,EDC error injection post of RGX1 write port" "0,1"
newline
bitfld.long 0x4 4. "RGX1_EDCINJ_PRE_W,EDC error injection pre of RGX1 write port" "0,1"
newline
bitfld.long 0x4 3. "RGX0_EDCINJ_POST_R,EDC error injection post of RGX0 read port" "0,1"
newline
bitfld.long 0x4 2. "RGX0_EDCINJ_PRE_R,EDC error injection pre of RGX0 read port" "0,1"
newline
bitfld.long 0x4 1. "RGX0_EDCINJ_POST_W,EDC error injection post of RGX0 write port" "0,1"
newline
bitfld.long 0x4 0. "RGX0_EDCINJ_PRE_W,EDC error injection pre of RGX0 write port" "0,1"
line.long 0x8 "EDCERRCR1,"
hexmask.long 0x8 5.--31. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x8 4. "NODE_ERRINJ_W,Node Info error injection for slave bus write access" "0,1"
newline
bitfld.long 0x8 3. "NODE_ERRINJ_R,Node Info error injection for slave bus read access" "0,1"
newline
bitfld.long 0x8 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x8 1. "BSTID_ERRINJ_R,BSTID error injection of SlaveBus(CCIS) read port." "0,1"
newline
bitfld.long 0x8 0. "RAM_EDCINJ,EDC error injection of SRAM Read" "0,1"
line.long 0xC "EDCERRCR2,"
hexmask.long 0xC 4.--31. 1. "Reserved_4,Reserved"
newline
bitfld.long 0xC 3. "PWDATA_EDCINJ_POST,PWDATA EDC error injection post of APB I/F" "0,1"
newline
bitfld.long 0xC 2. "PWDATA_EDCINJ_PRE,PWDATA EDC error injection pre of APB I/F" "0,1"
newline
bitfld.long 0xC 1. "PADD_EDCINJ_POST,PADD EDC error injection post of APB I/F" "0,1"
newline
bitfld.long 0xC 0. "PADD_EDCINJ_PRE,PADD EDC error injection pre of APB I/F" "0,1"
rgroup.long 0x2410++0x4B
line.long 0x0 "EDCERRINF0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCIF_7_0,SRCID[7:0] of EDC Error"
line.long 0x4 "EDCERRINF1,"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCIF_7_0,SRCID[7:0] of EDC Error"
line.long 0x8 "EDCERRINF2,"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x8 0.--7. 1. "SRCIF_7_0,SRCID[7:0] of EDC Error"
line.long 0xC "EDCERRINF3,"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "SRCIF_7_0,SRCID[7:0] of EDC Error"
line.long 0x10 "EDCERRINF4,"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x10 0.--7. 1. "SRCIF_7_0,SRCID[7:0] of EDC Error"
line.long 0x14 "EDCERRINF5,"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x14 0.--7. 1. "SRCIF_7_0,SRCID[7:0] of EDC Error"
line.long 0x18 "EDCERRINF6,"
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x18 0.--7. 1. "SRCIF_7_0,SRCID[7:0] of EDC Error"
line.long 0x1C "EDCERRINF7,"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x1C 0.--7. 1. "SRCIF_7_0,SRCID[7:0] of EDC Error"
line.long 0x20 "EDCERRINF8,"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x20 0.--7. 1. "SRCIF_7_0,SRCID[7:0] of EDC Error"
line.long 0x24 "EDCERRINF9,"
hexmask.long.tbyte 0x24 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x24 0.--7. 1. "SRCIF_7_0,SRCID[7:0] of EDC Error"
line.long 0x28 "EDCERRINF10,"
hexmask.long.tbyte 0x28 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x28 0.--7. 1. "SRCIF_7_0,SRCID[7:0] of EDC Error"
line.long 0x2C "EDCERRINF11,"
hexmask.long.tbyte 0x2C 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x2C 0.--7. 1. "SRCIF_7_0,SRCID[7:0] of EDC Error"
line.long 0x30 "EDCERRINF12,"
hexmask.long.tbyte 0x30 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x30 0.--7. 1. "SRCIF_7_0,SRCID[7:0] of EDC Error"
line.long 0x34 "EDCERRINF13,"
hexmask.long.tbyte 0x34 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x34 0.--7. 1. "SRCIF_7_0,SRCID[7:0] of EDC Error"
line.long 0x38 "EDCERRINF14,"
hexmask.long.tbyte 0x38 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x38 0.--7. 1. "SRCIF_7_0,SRCID[7:0] of EDC Error"
line.long 0x3C "EDCERRINF15,"
hexmask.long.tbyte 0x3C 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x3C 0.--7. 1. "SRCIF_7_0,SRCID[7:0] of EDC Error"
line.long 0x40 "EDCERRINF16,"
hexmask.long.tbyte 0x40 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x40 0.--7. 1. "SRCIF_7_0,SRCID[7:0] of EDC Error"
line.long 0x44 "EDCERRINF17,"
hexmask.long.tbyte 0x44 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x44 0.--7. 1. "SRCIF_7_0,SRCID[7:0] of EDC Error"
line.long 0x48 "EDCERRINF18,"
hexmask.long.tbyte 0x48 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x48 0.--7. 1. "SRCIF_7_0,SRCID[7:0] of EDC Error"
group.long 0x2500++0x3
line.long 0x0 "DCLSERRCR,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "DCLS_INJ_POST,DCLS error injection post" "0,1"
newline
bitfld.long 0x0 0. "DCLS_INJ_PRE,DCLS error injection pre" "0,1"
tree.end
tree "AXI_bus_D_3"
base ad:0xE67D0000
group.long 0x0++0xF
line.long 0x0 "AXI_TR0CR0,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "TRCTRL16,TR Control 16." "0,1"
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
line.long 0x4 "AXI_TR1CR0,"
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x4 16. "TRCTRL16,TR Control 16." "0,1"
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "AXI_TR2CR0,"
hexmask.long.word 0x8 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x8 16. "TRCTRL16,TR Control 16." "0,1"
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
line.long 0xC "AXI_TR3CR0,"
hexmask.long.word 0xC 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0xC 16. "TRCTRL16,TR Control 16." "0,1"
hexmask.long.word 0xC 0.--15. 1. "Reserved_0,Reserved"
group.long 0x100++0xF
line.long 0x0 "AXI_TR0CR1,"
hexmask.long.byte 0x0 28.--31. 1. "CNT_END3,Counter end control 3"
hexmask.long.byte 0x0 24.--27. 1. "CNT_START3,Counter start control 3"
hexmask.long.byte 0x0 20.--23. 1. "CNT_END2,Counter end control 2"
hexmask.long.byte 0x0 16.--19. 1. "CNT_START2,Counter start control 2"
hexmask.long.byte 0x0 12.--15. 1. "CNT_END1,Counter end control 1"
hexmask.long.byte 0x0 8.--11. 1. "CNT_START1,Counter start control 1"
hexmask.long.byte 0x0 4.--7. 1. "CNT_END0,Counter end control 0"
hexmask.long.byte 0x0 0.--3. 1. "CNT_START0,Counter start control 0"
line.long 0x4 "AXI_TR1CR1,"
hexmask.long.byte 0x4 28.--31. 1. "CNT_END3,Counter end control 3"
hexmask.long.byte 0x4 24.--27. 1. "CNT_START3,Counter start control 3"
hexmask.long.byte 0x4 20.--23. 1. "CNT_END2,Counter end control 2"
hexmask.long.byte 0x4 16.--19. 1. "CNT_START2,Counter start control 2"
hexmask.long.byte 0x4 12.--15. 1. "CNT_END1,Counter end control 1"
hexmask.long.byte 0x4 8.--11. 1. "CNT_START1,Counter start control 1"
hexmask.long.byte 0x4 4.--7. 1. "CNT_END0,Counter end control 0"
hexmask.long.byte 0x4 0.--3. 1. "CNT_START0,Counter start control 0"
line.long 0x8 "AXI_TR2CR1,"
hexmask.long.byte 0x8 28.--31. 1. "CNT_END3,Counter end control 3"
hexmask.long.byte 0x8 24.--27. 1. "CNT_START3,Counter start control 3"
hexmask.long.byte 0x8 20.--23. 1. "CNT_END2,Counter end control 2"
hexmask.long.byte 0x8 16.--19. 1. "CNT_START2,Counter start control 2"
hexmask.long.byte 0x8 12.--15. 1. "CNT_END1,Counter end control 1"
hexmask.long.byte 0x8 8.--11. 1. "CNT_START1,Counter start control 1"
hexmask.long.byte 0x8 4.--7. 1. "CNT_END0,Counter end control 0"
hexmask.long.byte 0x8 0.--3. 1. "CNT_START0,Counter start control 0"
line.long 0xC "AXI_TR3CR1,"
hexmask.long.byte 0xC 28.--31. 1. "CNT_END3,Counter end control 3"
hexmask.long.byte 0xC 24.--27. 1. "CNT_START3,Counter start control 3"
hexmask.long.byte 0xC 20.--23. 1. "CNT_END2,Counter end control 2"
hexmask.long.byte 0xC 16.--19. 1. "CNT_START2,Counter start control 2"
hexmask.long.byte 0xC 12.--15. 1. "CNT_END1,Counter end control 1"
hexmask.long.byte 0xC 8.--11. 1. "CNT_START1,Counter start control 1"
hexmask.long.byte 0xC 4.--7. 1. "CNT_END0,Counter end control 0"
hexmask.long.byte 0xC 0.--3. 1. "CNT_START0,Counter start control 0"
group.long 0x200++0xF
line.long 0x0 "AXI_TR0CR2,"
hexmask.long.byte 0x0 28.--31. 1. "CNT_END7,Counter end control 7"
hexmask.long.byte 0x0 24.--27. 1. "CNT_START7,Counter start control 7"
hexmask.long.byte 0x0 20.--23. 1. "CNT_END6,Counter end control 6"
hexmask.long.byte 0x0 16.--19. 1. "CNT_START6,Counter start control 6"
hexmask.long.byte 0x0 12.--15. 1. "CNT_END5,Counter end control 5"
hexmask.long.byte 0x0 8.--11. 1. "CNT_START5,Counter start control 5"
hexmask.long.byte 0x0 4.--7. 1. "CNT_END4,Counter end control 4"
hexmask.long.byte 0x0 0.--3. 1. "CNT_START4,Counter start control 4"
line.long 0x4 "AXI_TR1CR2,"
hexmask.long.byte 0x4 28.--31. 1. "CNT_END7,Counter end control 7"
hexmask.long.byte 0x4 24.--27. 1. "CNT_START7,Counter start control 7"
hexmask.long.byte 0x4 20.--23. 1. "CNT_END6,Counter end control 6"
hexmask.long.byte 0x4 16.--19. 1. "CNT_START6,Counter start control 6"
hexmask.long.byte 0x4 12.--15. 1. "CNT_END5,Counter end control 5"
hexmask.long.byte 0x4 8.--11. 1. "CNT_START5,Counter start control 5"
hexmask.long.byte 0x4 4.--7. 1. "CNT_END4,Counter end control 4"
hexmask.long.byte 0x4 0.--3. 1. "CNT_START4,Counter start control 4"
line.long 0x8 "AXI_TR2CR2,"
hexmask.long.byte 0x8 28.--31. 1. "CNT_END7,Counter end control 7"
hexmask.long.byte 0x8 24.--27. 1. "CNT_START7,Counter start control 7"
hexmask.long.byte 0x8 20.--23. 1. "CNT_END6,Counter end control 6"
hexmask.long.byte 0x8 16.--19. 1. "CNT_START6,Counter start control 6"
hexmask.long.byte 0x8 12.--15. 1. "CNT_END5,Counter end control 5"
hexmask.long.byte 0x8 8.--11. 1. "CNT_START5,Counter start control 5"
hexmask.long.byte 0x8 4.--7. 1. "CNT_END4,Counter end control 4"
hexmask.long.byte 0x8 0.--3. 1. "CNT_START4,Counter start control 4"
line.long 0xC "AXI_TR3CR2,"
hexmask.long.byte 0xC 28.--31. 1. "CNT_END7,Counter end control 7"
hexmask.long.byte 0xC 24.--27. 1. "CNT_START7,Counter start control 7"
hexmask.long.byte 0xC 20.--23. 1. "CNT_END6,Counter end control 6"
hexmask.long.byte 0xC 16.--19. 1. "CNT_START6,Counter start control 6"
hexmask.long.byte 0xC 12.--15. 1. "CNT_END5,Counter end control 5"
hexmask.long.byte 0xC 8.--11. 1. "CNT_START5,Counter start control 5"
hexmask.long.byte 0xC 4.--7. 1. "CNT_END4,Counter end control 4"
hexmask.long.byte 0xC 0.--3. 1. "CNT_START4,Counter start control 4"
tree.end
tree.end
tree "BKBUF (Back-up Buffer)"
base ad:0xEB180000
group.long 0x280++0x3
line.long 0x0 "BKBAPR,1. Do not access the Back-up Buffer while protection of the stored data is enabled."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "BKBAP,Enables or disables protection of the data storage in the Back-up Buffer. *1  *2" "0: Enables protection of the data storage in the..,1: Disables protection of the data storage in the.."
tree.end
tree "CPG (Clock_Pulse_Generator)"
base ad:0x0
tree "CPG_0"
base ad:0xE6150000
group.long 0x0++0x7
line.long 0x0 "CPGWPR,CPGWPR is a 32-bit readable/writable register."
hexmask.long 0x0 0.--31. 1. "WPRTCT_31_0,Writing a value to CPG registers is enabled by writing the inverse of the value to this register."
line.long 0x4 "CPGWPCR,CPGWPCR is a 32-bit readable/writable register. See 8.4.1 in detail."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Code value (Hsingle_quotationA5A5). When read  return 0."
hexmask.long.word 0x4 1.--15. 1. "Reserved_1,Reserved. These bits are always read as 0. The write value should always be 0."
newline
bitfld.long 0x4 0. "WPE,Write protect enable." "0: Disable the write protect,1: Enable the write protect"
group.long 0x280++0x3
line.long 0x0 "BKBAPR,BKBAPR is a 32-bit readable/writable register. The usage method is described in 37.3."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x0 0. "BKBAPR,Enables or disables protection of the data storage in the Backup Buffer." "0: Enables protection of the data storage in the..,1: Disables protection of the data storage in the.."
rgroup.long 0x400++0x77
line.long 0x0 "FSRCHKRA0,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x0 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x4 "FSRCHKRA1,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x4 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x8 "FSRCHKRA2,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x8 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0xC "FSRCHKRA3,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0xC 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x10 "FSRCHKRA4,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x10 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x14 "FSRCHKRA5,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x14 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x18 "FSRCHKRA6,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x18 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x1C "FSRCHKRA7,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x1C 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x20 "FSRCHKRA8,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x20 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x24 "FSRCHKRA9,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x24 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x28 "FSRCHKRA10,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x28 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x2C "FSRCHKRA11,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x2C 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x30 "FSRCHKRA12,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x30 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x34 "FSRCHKRA13,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x34 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x38 "FSRCHKRA14,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x38 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x3C "FSRCHKRA15,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x3C 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x40 "FSRCHKRA16,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x40 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x44 "FSRCHKRA17,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x44 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x48 "FSRCHKRA18,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x48 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x4C "FSRCHKRA19,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x4C 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x50 "FSRCHKRA20,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x50 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x54 "FSRCHKRA21,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x54 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x58 "FSRCHKRA22,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x58 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x5C "FSRCHKRA23,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x5C 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x60 "FSRCHKRA24,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x60 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x64 "FSRCHKRA25,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x64 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x68 "FSRCHKRA26,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x68 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x6C "FSRCHKRA27,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x6C 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x70 "FSRCHKRA28,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x70 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x74 "FSRCHKRA29,FSRCHKRAn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x74 0.--31. 1. "RCHK_31_0,[Set Condition]"
rgroup.long 0x480++0x77
line.long 0x0 "FSRCHKRB0,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x0 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x4 "FSRCHKRB1,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x4 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x8 "FSRCHKRB2,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x8 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0xC "FSRCHKRB3,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0xC 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x10 "FSRCHKRB4,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x10 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x14 "FSRCHKRB5,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x14 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x18 "FSRCHKRB6,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x18 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x1C "FSRCHKRB7,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x1C 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x20 "FSRCHKRB8,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x20 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x24 "FSRCHKRB9,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x24 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x28 "FSRCHKRB10,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x28 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x2C "FSRCHKRB11,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x2C 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x30 "FSRCHKRB12,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x30 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x34 "FSRCHKRB13,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x34 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x38 "FSRCHKRB14,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x38 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x3C "FSRCHKRB15,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x3C 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x40 "FSRCHKRB16,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x40 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x44 "FSRCHKRB17,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x44 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x48 "FSRCHKRB18,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x48 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x4C "FSRCHKRB19,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x4C 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x50 "FSRCHKRB20,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x50 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x54 "FSRCHKRB21,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x54 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x58 "FSRCHKRB22,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x58 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x5C "FSRCHKRB23,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x5C 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x60 "FSRCHKRB24,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x60 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x64 "FSRCHKRB25,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x64 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x68 "FSRCHKRB26,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x68 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x6C "FSRCHKRB27,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x6C 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x70 "FSRCHKRB28,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x70 0.--31. 1. "RCHK_31_0,[Set Condition]"
line.long 0x74 "FSRCHKRB29,FSRCHKRBn is a 32-bit readable register. Each bit of these registers can be set by writing 1 to the corresponding bit of FSRCHKSETRn. Each bit is cleared by the reset signal of the module assigned to each bit. Each bit can be also cleared by.."
hexmask.long 0x74 0.--31. 1. "RCHK_31_0,[Set Condition]"
wgroup.long 0x500++0x77
line.long 0x0 "FSRCHKSETR0,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x0 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x4 "FSRCHKSETR1,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x4 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x8 "FSRCHKSETR2,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x8 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0xC "FSRCHKSETR3,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0xC 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x10 "FSRCHKSETR4,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x10 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x14 "FSRCHKSETR5,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x14 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x18 "FSRCHKSETR6,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x18 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x1C "FSRCHKSETR7,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x1C 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x20 "FSRCHKSETR8,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x20 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x24 "FSRCHKSETR9,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x24 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x28 "FSRCHKSETR10,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x28 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x2C "FSRCHKSETR11,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x2C 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x30 "FSRCHKSETR12,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x30 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x34 "FSRCHKSETR13,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x34 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x38 "FSRCHKSETR14,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x38 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x3C "FSRCHKSETR15,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x3C 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x40 "FSRCHKSETR16,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x40 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x44 "FSRCHKSETR17,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x44 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x48 "FSRCHKSETR18,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x48 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x4C "FSRCHKSETR19,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x4C 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x50 "FSRCHKSETR20,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x50 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x54 "FSRCHKSETR21,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x54 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x58 "FSRCHKSETR22,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x58 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x5C "FSRCHKSETR23,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x5C 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x60 "FSRCHKSETR24,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x60 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x64 "FSRCHKSETR25,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x64 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x68 "FSRCHKSETR26,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x68 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x6C "FSRCHKSETR27,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x6C 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x70 "FSRCHKSETR28,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x70 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x74 "FSRCHKSETR29,FSRCHKSETRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKSETRn. the corresponding"
hexmask.long 0x74 0.--31. 1. "RSET_31_0,When writing 1 to RSETm of FSRCHKSETRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are set to 1. Writing 0 to each bit of FSRCHKSETRn does not change the values of FSRCHKRAn and FSRCHKRBn."
wgroup.long 0x580++0x77
line.long 0x0 "FSRCHKCLRR0,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x0 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x4 "FSRCHKCLRR1,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x4 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x8 "FSRCHKCLRR2,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x8 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0xC "FSRCHKCLRR3,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0xC 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x10 "FSRCHKCLRR4,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x10 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x14 "FSRCHKCLRR5,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x14 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x18 "FSRCHKCLRR6,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x18 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x1C "FSRCHKCLRR7,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x1C 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x20 "FSRCHKCLRR8,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x20 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x24 "FSRCHKCLRR9,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x24 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x28 "FSRCHKCLRR10,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x28 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x2C "FSRCHKCLRR11,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x2C 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x30 "FSRCHKCLRR12,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x30 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x34 "FSRCHKCLRR13,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x34 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x38 "FSRCHKCLRR14,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x38 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x3C "FSRCHKCLRR15,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x3C 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x40 "FSRCHKCLRR16,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x40 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x44 "FSRCHKCLRR17,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x44 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x48 "FSRCHKCLRR18,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x48 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x4C "FSRCHKCLRR19,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x4C 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x50 "FSRCHKCLRR20,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x50 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x54 "FSRCHKCLRR21,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x54 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x58 "FSRCHKCLRR22,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x58 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x5C "FSRCHKCLRR23,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x5C 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x60 "FSRCHKCLRR24,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x60 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x64 "FSRCHKCLRR25,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x64 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x68 "FSRCHKCLRR26,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x68 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x6C "FSRCHKCLRR27,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x6C 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x70 "FSRCHKCLRR28,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x70 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
line.long 0x74 "FSRCHKCLRR29,FSRCHKCLRRn is a 32-bit writable register. When writing 1 to the designated bit of FSRCHKCLRRn. the corresponding bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of.."
hexmask.long 0x74 0.--31. 1. "RCLR_31_0,When writing 1 to RCLRm of FSRCHKCLRRn  RCHKm bits of both FSRCHKRAn and FSRCHKRBn are cleared to 0. Writing 0 to each bit of FSRCHKCLRRn does not change the values of FSRCHKRAn and FSRCHKRBn."
group.long 0x748++0x3
line.long 0x0 "CPGWPTCSR,CPGWPTCSR is a 32 bit readable/writable register. The register controls whether the interrupt and error notification flag are masked or not for Bus Access Protection shown in 8.3.4."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x0 1. "EIE,The bit controls whether the interrupt notification flag is sent to INTC or not. When the bit value is 1single_quotationb0  the interrupt is not sent to INTC even if there are illegal accesses to any registers in CPG." "0: Interrupt is masked,1: Interrupt is not masked"
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bitfld.long 0x0 0. "ERR,The bit controls whether the error notification flag is sent to ECM or not. When the bit value is 1single_quotationb0  the error notification is not sent to ECM even if there are illegal accesses to any registers in CPG." "0: Error notification is masked,1: Error notification is not masked"
group.long 0x804++0xB
line.long 0x0 "FRQCRB,FRQCRB is a 32-bit readable/writable register. This register specifies the frequency division ratios of Debug Trace port clock (ZTRphi). Debug Trace bus clock (ZTphi). and Debug clock (ZSphi). 3D Graphics Engine clock (ZGphi). These clocks are.."
bitfld.long 0x0 31. "KICK,KICK bit. Setting 1 to this register activates the FRQCRB setting." "0,1"
rbitfld.long 0x0 30. "Reserved_30,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
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bitfld.long 0x0 29. "ZGSTP,Stop control bit for 3D Graphics Engine clock (ZGphi)." "0,1"
hexmask.long.byte 0x0 24.--28. 1. "ZGFC_4_0,3D Graphics Engine clock (ZGphi) Frequency division ratio. As shown in Table 8.1.4d  the Maximum clock frequency is 600 MHz. ZGFC[4:0] should be set so that ZGphi frequency doesn't exceed 600 MHz."
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hexmask.long.byte 0x0 20.--23. 1. "ZTRFC_3_0,Debug Trace port clock (ZTRphi) Frequency division ratio. As shown in Table 8.1.4a  the Maximum clock frequency is 533.33 MHz. ZTRFC[3:0] should be set so that ZTRphi frequency doesn't exceed 533.33 MHz."
hexmask.long.byte 0x0 16.--19. 1. "ZTFC_3_0,Debug Trace port clock (ZTphi) Frequency division ratio. As shown in Table 8.1.4a  the Maximum clock frequency is 533.33 MHz. ZTFC[3:0] should be set so that ZTphi frequency doesn't exceed 533.33 MHz."
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hexmask.long.byte 0x0 12.--15. 1. "ZSFC_3_0,Debug Trace port clock (ZSphi) Frequency division ratio. As shown in Table 8.1.4a  the Maximum clock frequency is 533.33 MHz. ZSFC[3:0] should be set so that ZSphi frequency doesn't exceed 266.66 MHz."
hexmask.long.byte 0x0 5.--11. 1. "Reserved_5,Reserved. These bits are always read as 0. The write value should always be 0."
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bitfld.long 0x0 4. "ZDSTP,Stop control bit for CA76 Sub system clock (ZDphi)." "0,1"
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved. These bits are always read as 0. The write value should always be 0."
line.long 0x4 "FRQCRC0,FRQCRC0 is a 32-bit readable/writable register. This register specifies the frequency division ratios of CR52 clock (ZR0phi. ZR1phi). CA76 clock (Z0phi). When division ratio of these clocks is changed. any other clock division ratio should be.."
rbitfld.long 0x4 29.--31. "Reserved_29,Reserved. These bits are always read as 0. The write value should always be 0." "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x4 24.--28. 1. "ZR1FC_4_0,CR52 Core1 clock (ZR1phi) Frequency division ratio. As shown in Table 8.1.4f  the Maximum clock frequency is 1400 MHz. ZR1FC[4:0] should be set so that ZR1phi frequency doesn't exceed 1400 MHz."
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rbitfld.long 0x4 21.--23. "Reserved_21,Reserved. These bits are always read as 0. The write value should always be 0." "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x4 16.--20. 1. "ZR0FC_4_0,CR52 Core0 clock (ZR0phi) Frequency division ratio. As shown in Table 8.1.4f  the Maximum clock frequency is 1400 MHz. ZR0FC[4:0] should be set so that ZR0phi frequency doesn't exceed 1400 MHz."
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hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved. These bits are always read as 0. The write value should always be 0."
hexmask.long.byte 0x4 0.--4. 1. "Z0FC_4_0,CR55 clock (Z0phi) Frequency division ratio. As shown in Table 8.1.4b  the Maximum clock frequency is 1800 MHz. Z0FC[4:0] should be set so that Z0phi frequency doesn't exceed 1800 MHz."
line.long 0x8 "FRQCRD,FRQCRD0 is a 32-bit readable/writable register. This register specifies the DDR and DBSC clock (ZB3phi. ZB3D2phi. ZB3D4phi) frequency."
bitfld.long 0x8 31. "KICK,KICK bit. Setting 1 to this register activates the FRQCRD setting." "0,1"
hexmask.long 0x8 4.--30. 1. "Reserved_4,Reserved. These bits are always read as 0. The write value should always be 0."
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hexmask.long.byte 0x8 0.--3. 1. "ZB3FC_4_0,ZB3phi  ZB3D2phi  ZB3D4phi clock for DDR/DBSC frequency division ratio is set."
group.long 0x820++0x3
line.long 0x0 "PLLECR,PLLECR is a 32-bit readable/writable register."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved. These bits are always read as 0. The write value should always be 0."
rbitfld.long 0x0 24. "PLL7ST,PLL circuit 7 status. Displays PLL circuit 7 status (on or off)." "0: PLL circuit 7 is turned off,1: PLL circuit 7 is turned on"
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hexmask.long.byte 0x0 17.--23. 1. "Reserved_17,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x0 16. "PLL7E,PLL circuit 6 enable. Turns PLL circuit 7 on or off. Actual status of PLL7 is shown in PLL6ST bit." "0: Turns off PLL circuit 7,1: Turns on PLL circuit 7"
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rbitfld.long 0x0 15. "PLL6ST,PLL circuit 6 status. Displays PLL circuit 6 status (on or off)." "0: PLL circuit 6 is turned off,1: PLL circuit 6 is turned on"
rbitfld.long 0x0 14. "PLL5ST,PLL circuit 5 status. Displays PLL circuit 5 status (on or off)." "0: PLL circuit 5 is turned off,1: PLL circuit 5 is turned on"
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rbitfld.long 0x0 13. "PLL4ST,PLL circuit 4 status. Displays PLL circuit 4 status (on or off)." "0: PLL circuit 4 is turned off,1: PLL circuit 4 is turned on"
rbitfld.long 0x0 12. "Reserved_12,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
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rbitfld.long 0x0 11. "PLL3ST,PLL circuit 3 status. Displays PLL circuit 3 status (on or off)." "0: PLL circuit 3 is turned off,1: PLL circuit 3 is turned on"
rbitfld.long 0x0 10. "Reserved_10,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
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rbitfld.long 0x0 9. "PLL2ST,PLL circuit 2 status. Displays PLL circuit 2 status (on or off)." "0: PLL circuit 2 is turned off,1: PLL circuit 2 is turned on"
rbitfld.long 0x0 8. "PLL1ST,PLL circuit 1 status. Displays PLL circuit 1 status (on or off)." "0: PLL circuit 1 is turned off,1: PLL circuit 1 is turned on"
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bitfld.long 0x0 7. "PLL6E,PLL circuit 6 enable. Turns PLL circuit 6 on or off. Actual status of PLL6 is shown in PLL6ST bit." "0: Turns off PLL circuit 6,1: Turns on PLL circuit 6"
bitfld.long 0x0 6. "PLL5E,PLL circuit 5 enable. Turns PLL circuit 5 on or off. Actual status of PLL5 is shown in PLL5ST bit." "0: Turns off PLL circuit 5,1: Turns on PLL circuit 5"
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bitfld.long 0x0 5. "PLL4E,PLL circuit 4 enable. Turns PLL circuit 4 on or off. Actual status of PLL4 is shown in PLL4ST bit." "0: Turns off PLL circuit 4,1: Turns on PLL circuit 4"
rbitfld.long 0x0 4. "Reserved_4,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
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bitfld.long 0x0 3. "PLL3E,PLL circuit 3 enable. Turns PLL circuit 3 on or off. Actual status of PLL3 is shown in PLL3ST bit." "0: Turns off PLL circuit 3,1: Turns on PLL circuit 3"
rbitfld.long 0x0 2. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
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bitfld.long 0x0 1. "PLL2E,PLL circuit 2 enable. Turns PLL circuit 2 on or off. Actual status of PLL2 is shown in PLL2ST bit." "0: Turns off PLL circuit 2,1: Turns on PLL circuit 2"
bitfld.long 0x0 0. "PLL1E,PLL circuit 1 enable. Turns PLL circuit 1 on or off. Actual status of PLL1 is shown in PLL1ST bit." "0: Turns off PLL circuit 1,1: Turns on PLL circuit 1"
rgroup.long 0x830++0x3
line.long 0x0 "PLL1CR0,PLL1CR0 is a 32-bit readable/writable register. This register specifies the integer multiplication ratio and SSCG mode of PLL circuit 1. Mode pin control for PLL parameter setting is applied for PLL1 because the parameter cannot be changed by.."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved. These bits are always read as 0. The write value should always be 0."
hexmask.long.byte 0x0 20.--27. 1. "NI_7_0,PLL1 multiplication ratio control parameter."
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bitfld.long 0x0 19. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 16.--18. "SSMODE_2_0,PLL mode and output frequency dither mode are shown in the value of SSMODE[2:0]." "0: Integer multiplication PLL mode,?,?,?,4: Fractional multiplication PLL mode,?,6: Fractional multiplication PLL mode,7: Fractional multiplication PLL mode"
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bitfld.long 0x0 15. "Reserved_15,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 8.--14. 1. "SSFREQ_6_0,The parameter shows the SSCG modulation frequency (Fmod) defined in Figure 8.1.1. The detail value is shown in Table 8.1.5.1."
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bitfld.long 0x0 7. "Reserved_7,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 0.--6. 1. "SSDEPT_6_0,The parameter shows the modulation depth defined in Figure 8.1.1. As shown in Table 8.1.5.1  the SSDEPT[6:0] is always 7'b0010100 (-1.0 %)."
group.long 0x834++0x3
line.long 0x0 "PLL2CR0,PLL2CR0 is a 32-bit readable/writable register. This register specifies the integer multiplication ratio and SSCG mode of PLL circuit 2. The parameter setting of Center spread is prohibited because CA76 operation cannot be guaranteed. The PLL2.."
bitfld.long 0x0 31. "KICK,KICK bit. Setting 1 to this register activates the PLL2CRn (n = 0 1) setting." "0,1"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved. These bits are always read as 0. The write value should always be 0." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x0 20.--27. 1. "NI_7_0,PLL2 multiplication ratio control parameter."
rbitfld.long 0x0 19. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
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bitfld.long 0x0 16.--18. "SSMODE_2_0,PLL mode and output frequency dither mode are shown in the value of SSMODE[2:0]." "0: Integer multiplication PLL mode,?,?,?,4: Fractional multiplication PLL mode,?,6: Fractional multiplication PLL mode,?"
rbitfld.long 0x0 15. "Reserved_15,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
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hexmask.long.byte 0x0 8.--14. 1. "SSFREQ_6_0,The parameter shows the SSCG modulation frequency (Fmod) defined in Figure 8.1.1."
rbitfld.long 0x0 7. "Reserved_7,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
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hexmask.long.byte 0x0 0.--6. 1. "SSDEPT_6_0,The parameter shows the modulation depth defined in Figure 8.1.1. The SSDEPT[6:0] parameter is described in SSFREQ[6:0] bit description."
group.long 0x83C++0x3
line.long 0x0 "PLL3CR0,PLL3CR0 is a 32-bit readable/writable register. This register specifies the integer multiplication ratio. The parameter setting of SSCG mode is prohibited because DDR operation cannot be guaranteed. The PLL3 parameter can be changed by software.."
bitfld.long 0x0 31. "KICK,KICK bit. Setting 1 to this register activates the PLL3CRn (n = 0 1) setting." "0,1"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved. These bits are always read as 0. The write value should always be 0." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x0 20.--27. 1. "NI_7_0,PLL3 multiplication ratio control parameter."
rbitfld.long 0x0 19. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
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bitfld.long 0x0 16.--18. "SSMODE_2_0,As described in 8.1.5.3  DDR operation can be guaranteed only during the integer multiplication PLL mode." "0: Integer multiplication PLL mode,?,?,?,4: Fractional multiplication PLL mode,?,?,?"
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved. These bits are always read as 0. The write value should always be 0."
group.long 0x844++0x3
line.long 0x0 "PLL4CR0,PLL4CR0 is a 32-bit readable/writable register. This register specifies the integer multiplication ratio and SSCG mode of PLL circuit 2. The PLL4 parameter can be changed by software registers (PLL4CR0. PLL4CR1) as shown in 8.1.5.4 (PLL4.."
bitfld.long 0x0 31. "KICK,KICK bit. Setting 1 to this register activates the PLL4CRn (n = 0 1) setting." "0,1"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved. These bits are always read as 0. The write value should always be 0." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x0 20.--27. 1. "NI_7_0,PLL4 multiplication ratio control parameter."
rbitfld.long 0x0 19. "Reserved_19,Reserved. These bits are always read as 0. The write value should always be 0." "0,1"
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bitfld.long 0x0 16.--18. "SSMODE_2_0,PLL mode and output frequency dither mode are shown in the value of SSMODE[2:0]." "0: Integer multiplication PLL mode,?,?,?,4: Fractional multiplication PLL mode,?,6: Fractional multiplication PLL mode,?"
rbitfld.long 0x0 15. "Reserved_15,Reserved. These bits are always read as 0. The write value should always be 0." "0,1"
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hexmask.long.byte 0x0 8.--14. 1. "SSFREQ_6_0,The parameter shows the SSCG modulation frequency (Fmod) defined in Figure 8.2.13.1."
rbitfld.long 0x0 7. "Reserved_7,Reserved. These bits are always read as 0. The write value should always be 0." "0,1"
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hexmask.long.byte 0x0 0.--6. 1. "SSDEPT_6_0,The parameter shows the modulation depth defined in Figure 8.2.13.1. The SSDEPT[6:0] parameter is described in SSFREQ[6:0] bit description."
group.long 0x84C++0xB
line.long 0x0 "PLL6CR0,PLL6CR0 is a 32-bit readable/writable register. This register specifies the integer multiplication ratio and SSCG mode of PLL circuit 6. The parameter setting of Center spread is prohibited because CR52 operation cannot be guaranteed. The PLL6.."
bitfld.long 0x0 31. "KICK,KICK bit. Setting 1 to this register activates the PLL6CRn (n = 0 1) setting." "0,1"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved. These bits are always read as 0. The write value should always be 0." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x0 20.--27. 1. "NI_7_0,PLL6 multiplication ratio control parameter."
rbitfld.long 0x0 19. "Reserved_19,Reserved. These bits are always read as 0. The write value should always be 0." "0,1"
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bitfld.long 0x0 16.--18. "SSMODE_2_0,PLL mode and output frequency dither mode are shown in the value of SSMODE[2:0]." "0: Integer multiplication PLL mode,?,?,?,4: Fractional multiplication PLL mode,?,6: Fractional multiplication PLL mode,?"
rbitfld.long 0x0 15. "Reserved_15,Reserved. These bits are always read as 0. The write value should always be 0." "0,1"
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hexmask.long.byte 0x0 8.--14. 1. "SSFREQ_6_0,The parameter shows the SSCG modulation frequency (Fmod) defined in Figure 8.2.13.1."
rbitfld.long 0x0 7. "Reserved_7,Reserved. These bits are always read as 0. The write value should always be 0." "0,1"
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hexmask.long.byte 0x0 0.--6. 1. "SSDEPT_6_0,The parameter shows the modulation depth defined in Figure 8.2.13.1. The SSDEPT[6:0] parameter is described in SSFREQ[6:0] bit description."
line.long 0x4 "PLL1STPCR,PLL1STPCR is a 32-bit readable/writable register. This register specifies the stop condition of PLL circuit n when PLLECR.PLL1E is set to 1."
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x4 20. "A3IRSTP,PLL1 circuit Stop Condition by A3IR Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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hexmask.long.byte 0x4 15.--19. 1. "Reserved_15,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x4 14. "_3DGBSTP,PLL1 circuit Stop Condition by 3DGB Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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bitfld.long 0x4 13. "A3ISP1STP,PLL1 circuit Stop Condition by A3ISP1STP Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
bitfld.long 0x4 12. "A3ISP0STP,PLL1 circuit Stop Condition by A3ISP0STP Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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hexmask.long.byte 0x4 8.--11. 1. "Reserved_8,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x4 7. "A2E0D1STP,PLL1 circuit Stop Condition by A2E0D1 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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bitfld.long 0x4 6. "A2E0D0STP,PLL1 circuit Stop Condition by A2E0D0 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
rbitfld.long 0x4 5. "Reserved_5,Reserved. These bits are always read as 0. The write value should always be 0." "0,1"
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bitfld.long 0x4 4. "A3DULSTP,PLL1 circuit Stop Condition by A3DUL Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
rbitfld.long 0x4 3. "Reserved_3,Reserved. These bits are always read as 0. The write value should always be 0." "0,1"
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bitfld.long 0x4 2. "A3VIP2STP,PLL1 circuit Stop Condition by A3VIP2 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
bitfld.long 0x4 1. "A3VIP1STP,PLL1 circuit Stop Condition by A3VIP1 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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bitfld.long 0x4 0. "A3VIP0STP,PLL1 circuit Stop Condition by A3VIP0 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
line.long 0x8 "PLL2STPCR,PLL2STPCR is a 32-bit readable/writable register. This register specifies the stop condition of PLL circuit n when PLLECR.PLL2E is set to 1."
hexmask.long.word 0x8 21.--31. 1. "Reserved_21,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x8 20. "A3IRSTP,PLL2 circuit Stop Condition by A3IR Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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hexmask.long.byte 0x8 15.--19. 1. "Reserved_15,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x8 14. "_3DGBSTP,PLL2 circuit Stop Condition by 3DGB Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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bitfld.long 0x8 13. "A3ISP1STP,PLL2 circuit Stop Condition by A3ISP1STP Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
bitfld.long 0x8 12. "A3ISP0STP,PLL2 circuit Stop Condition by A3ISP0STP Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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hexmask.long.byte 0x8 5.--11. 1. "Reserved_5,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x8 4. "A3DULSTP,PLL2 circuit Stop Condition by A3DUL Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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rbitfld.long 0x8 3. "Reserved_3,Reserved. These bits are always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x8 2. "A3VIP2STP,PLL2 circuit Stop Condition by A3VIP2 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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bitfld.long 0x8 1. "A3VIP1STP,PLL2 circuit Stop Condition by A3VIP1 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
bitfld.long 0x8 0. "A3VIP0STP,PLL2 circuit Stop Condition by A3VIP0 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
group.long 0x85C++0x3
line.long 0x0 "PLL3STPCR,PLL3STPCR is a 32-bit readable/writable register. This register specifies the stop condition of PLL circuit n when PLLECR.PLL3E is set to 1."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x0 20. "A3IRSTP,PLL3 circuit Stop Condition by A3IR Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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hexmask.long.byte 0x0 15.--19. 1. "Reserved_15,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x0 14. "_3DGBSTP,PLL3 circuit Stop Condition by 3DGB Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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bitfld.long 0x0 13. "A3ISP1STP,PLL3 circuit Stop Condition by A3ISP1STP Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
bitfld.long 0x0 12. "A3ISP0STP,PLL3 circuit Stop Condition by A3ISP0STP Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x0 7. "A2E0D1STP,PLL3 circuit Stop Condition by A2E0D1 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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bitfld.long 0x0 6. "A2E0D0STP,PLL3 circuit Stop Condition by A2E0D0 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
rbitfld.long 0x0 5. "Reserved_5,Reserved. These bits are always read as 0. The write value should always be 0." "0,1"
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bitfld.long 0x0 4. "A3DULSTP,PLL3 circuit Stop Condition by A3DUL Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
rbitfld.long 0x0 3. "Reserved_3,Reserved. These bits are always read as 0. The write value should always be 0." "0,1"
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bitfld.long 0x0 2. "A3VIP2STP,PLL3 circuit Stop Condition by A3VIP2 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
bitfld.long 0x0 1. "A3VIP1STP,PLL3 circuit Stop Condition by A3VIP1 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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bitfld.long 0x0 0. "A3VIP0STP,PLL3 circuit Stop Condition by A3VIP0 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
group.long 0x864++0x23
line.long 0x0 "PLL4STPCR,PLL4STPCR is a 32-bit readable/writable register. This register specifies the stop condition of PLL circuit n when PLLECR.PLL4E is set to 1."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x0 20. "A3IRSTP,PLL4 circuit Stop Condition by A3IR Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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hexmask.long.byte 0x0 15.--19. 1. "Reserved_15,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x0 14. "_3DGBSTP,PLL4 circuit Stop Condition by 3DGB Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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bitfld.long 0x0 13. "A3ISP1STP,PLL4 circuit Stop Condition by A3ISP1STP Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
bitfld.long 0x0 12. "A3ISP0STP,PLL4 circuit Stop Condition by A3ISP0STP Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x0 7. "A2E0D1STP,PLL4 circuit Stop Condition by A2E0D1 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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bitfld.long 0x0 6. "A2E0D0STP,PLL4 circuit Stop Condition by A2E0D0 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
rbitfld.long 0x0 5. "Reserved_5,Reserved. These bits are always read as 0. The write value should always be 0." "0,1"
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bitfld.long 0x0 4. "A3DULSTP,PLL4 circuit Stop Condition by A3DUL Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
rbitfld.long 0x0 3. "Reserved_3,Reserved. These bits are always read as 0. The write value should always be 0." "0,1"
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bitfld.long 0x0 2. "A3VIP2STP,PLL4 circuit Stop Condition by A3VIP2 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
bitfld.long 0x0 1. "A3VIP1STP,PLL4 circuit Stop Condition by A3VIP1 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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bitfld.long 0x0 0. "A3VIP0STP,PLL4 circuit Stop Condition by A3VIP0 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
line.long 0x4 "PLL5STPCR,PLL5STPCR is a 32-bit readable/writable register. This register specifies the stop condition of PLL circuit n when PLLECR.PLL5E is set to 1."
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x4 20. "A3IRSTP,PLL5 circuit Stop Condition by A3IR Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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hexmask.long.byte 0x4 15.--19. 1. "Reserved_15,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x4 14. "_3DGBSTP,PLL5 circuit Stop Condition by 3DGB Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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bitfld.long 0x4 13. "A3ISP1STP,PLL5 circuit Stop Condition by A3ISP1STP Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
bitfld.long 0x4 12. "A3ISP0STP,PLL5 circuit Stop Condition by A3ISP0STP Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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hexmask.long.byte 0x4 8.--11. 1. "Reserved_8,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x4 7. "A2E0D1STP,PLL5 circuit Stop Condition by A2E0D1 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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bitfld.long 0x4 6. "A2E0D0STP,PLL5 circuit Stop Condition by A2E0D0 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
rbitfld.long 0x4 5. "Reserved_5,Reserved. These bits are always read as 0. The write value should always be 0." "0,1"
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bitfld.long 0x4 4. "A3DULSTP,PLL5 circuit Stop Condition by A3DUL Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
rbitfld.long 0x4 3. "Reserved_3,Reserved. These bits are always read as 0. The write value should always be 0." "0,1"
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bitfld.long 0x4 2. "A3VIP2STP,PLL5 circuit Stop Condition by A3VIP2 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
bitfld.long 0x4 1. "A3VIP1STP,PLL5 circuit Stop Condition by A3VIP1 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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bitfld.long 0x4 0. "A3VIP0STP,PLL5 circuit Stop Condition by A3VIP0 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
line.long 0x8 "PLL6STPCR,PLL6STPCR is a 32-bit readable/writable register. This register specifies the stop condition of PLL circuit n when PLLECR.PLL6E is set to 1."
hexmask.long.word 0x8 21.--31. 1. "Reserved_21,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x8 20. "A3IRSTP,PLL6 circuit Stop Condition by A3IR Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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hexmask.long.byte 0x8 15.--19. 1. "Reserved_15,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x8 14. "_3DGBSTP,PLL6 circuit Stop Condition by 3DGB Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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bitfld.long 0x8 13. "A3ISP1STP,PLL6 circuit Stop Condition by A3ISP1STP Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
bitfld.long 0x8 12. "A3ISP0STP,PLL6 circuit Stop Condition by A3ISP0STP Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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hexmask.long.byte 0x8 8.--11. 1. "Reserved_8,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x8 7. "A2E0D1STP,PLL6 circuit Stop Condition by A2E0D1 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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bitfld.long 0x8 6. "A2E0D0STP,PLL6 circuit Stop Condition by A2E0D0 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
rbitfld.long 0x8 5. "Reserved_5,Reserved. These bits are always read as 0. The write value should always be 0." "0,1"
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bitfld.long 0x8 4. "A3DULSTP,PLL6 circuit Stop Condition by A3DUL Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
rbitfld.long 0x8 3. "Reserved_3,Reserved. These bits are always read as 0. The write value should always be 0." "0,1"
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bitfld.long 0x8 2. "A3VIP2STP,PLL6 circuit Stop Condition by A3VIP2 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
bitfld.long 0x8 1. "A3VIP1STP,PLL6 circuit Stop Condition by A3VIP1 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
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bitfld.long 0x8 0. "A3VIP0STP,PLL6 circuit Stop Condition by A3VIP0 Power Status" "0: PLL circuit is not turned off when the power..,1: PLL circuit is turned off when the power supply.."
line.long 0xC "SD0CKCR,This register should be set before SD-IF0 module (SDHI) is operated. Do not access SD-IF0 module during changing the clock frequency of SD0Hphi. and SD0phi. or stopping these clocks."
hexmask.long.tbyte 0xC 10.--31. 1. "Reserved_10,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0xC 9. "STP0HCK,Clock Stop" "0: Supplies SD0H clock,1: Stops SD0H clock"
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bitfld.long 0xC 8. "STP0CK,Clock Stop" "0: Supplies SD0 clock,1: Stops SD0 clock"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved. These bits are always read as 0. The write value should always be 0." "0,1,2,3,4,5,6,7"
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bitfld.long 0xC 2.--4. "SDSRCFC_2_0,SD0Hphi clock Frequency Division Ratio" "0: SD0Hphi = SDSRCphi times 1/1,1: SD0Hphi = SDSRCphi times 1/2,?,?,?,?,?,?"
bitfld.long 0xC 0.--1. "SD0FC_1_0,Select SD0phi division Ratio" "0: SD0phi = SD0Hphi times 1/2,1: SD0phi = SD0Hphi times 1/4,?,?"
line.long 0x10 "RPCCKCR,RPCCKCR is a 32-bit readable/writable register. This register controls the RPC clock (RPCphi). This register should be set before RPC module is operated. Do not access RPC module during changing the clock frequency of RPCphi and RPCD2phi."
hexmask.long.tbyte 0x10 10.--31. 1. "Reserved_10,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x10 9. "CKSTP2,RPCD2phi Clock" "0: Supplies clock to RPC,1: Stops clock to RPC"
newline
bitfld.long 0x10 8. "CKSTP,RPCphi Clock Stop." "0: Supplies clock to RPC,1: Stops clock to RPC"
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved. These bits are always read as 0. The write value should always be 0." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x10 0.--4. 1. "RPCFC_4_0,RPC clock (RPCphi  RPCD2phi) Frequency Division Ratio.When PLL5 is turned off  RPC clock can't be oscillated (set CKSTP1 and CKSTP2 before turning off PLL5)."
line.long 0x14 "CANFDCKCR,CANFDCKCR is a 32-bit readable/writable register. This register controls the MSIOF clock (CANFDphi). This register should be set before MSIOF module is operated. Do not access CAN-FD module during changing the clock frequency of CANFDphi."
hexmask.long.tbyte 0x14 9.--31. 1. "Reserved_9,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x14 8. "CKSTP,Clock Stop." "0: Supplies clock to CAN-FD module,1: Stops clock to CAN-FD module"
newline
rbitfld.long 0x14 6.--7. "Reserved_6,Reserved. These bits are always read as 0. The write value should always be 0." "0,1,2,3"
hexmask.long.byte 0x14 0.--5. 1. "DIV_5_0,Division Ratio."
line.long 0x18 "MSOCKCR,MSOCKCR is a 32-bit readable/writable register. This register controls the MSIOF clock (MSOphi). This register should be set before MSIOF module is operated. Do not access MSIOF module during changing the clock frequency of MSOphi."
hexmask.long.tbyte 0x18 9.--31. 1. "Reserved_9,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x18 8. "CKSTP,Clock Stop." "0: Supplies clock to MSIOF module,1: Stops clock to MSIOF module"
newline
rbitfld.long 0x18 6.--7. "Reserved_6,Reserved. These bits are always read as 0. The write value should always be 0." "0,1,2,3"
hexmask.long.byte 0x18 0.--5. 1. "DIV_5_0,Division Ratio."
line.long 0x1C "CSICKCR,CSICKCR is a 32-bit readable/writable register. This register controls the CSI clock (CSIphi). This register should be set before CSI module is operated. Do not access MIPI-CSI2 module during changing the clock frequency of CSIphi."
hexmask.long.tbyte 0x1C 9.--31. 1. "Reserved_9,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x1C 8. "CKSTP,Clock Stop." "0: Supplies clock to CSI module,1: Stops clock to CSI module"
newline
rbitfld.long 0x1C 6.--7. "Reserved_6,Reserved. These bits are always read as 0. The write value should always be 0." "0,1,2,3"
hexmask.long.byte 0x1C 0.--5. 1. "DIV_5_0,Division Ratio."
line.long 0x20 "DSIEXTCKCR,DSIEXTCKCR is a 32-bit readable/writable register. This register controls the DSI clock (DSIEXTphi). This register should be set before DSI module is operated. Do not access MIPI-DSI module during changing the clock frequency of DSIEXTphi."
hexmask.long.tbyte 0x20 9.--31. 1. "Reserved_9,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x20 8. "CKSTP,Clock Stop." "0: Supplies clock to DSI module,1: Stops clock to DSI module"
newline
rbitfld.long 0x20 6.--7. "Reserved_6,Reserved. These bits are always read as 0. The write value should always be 0." "0,1,2,3"
hexmask.long.byte 0x20 0.--5. 1. "DIV_5_0,Division Ratio."
group.long 0x890++0xF
line.long 0x0 "POSTCKCR,POSTCKCR is a 32-bit readable/writable register. This register controls the Power-On Self Test clock (POSTphi). POST frequency is 66.66 MHz. so the initial frequency is also 66.66MHz. Run-Time Test is done at 66.66MHz. POSTphi target is any.."
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x0 8. "CKSTP,Clock Stop." "0: Supplies clock with POSTCK target modules,1: Stops POSTphi"
newline
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved. These bits are always read as 0. The write value should always be 0." "0,1,2,3"
hexmask.long.byte 0x0 0.--5. 1. "DIV_5_0,Division Ratio."
line.long 0x4 "POST2CKCR,POST2CKCR is a 32-bit readable/writable register. This register controls the Power-On Self Test 2 clock (POST2phi). which is used for CA76 during POST executing."
hexmask.long.tbyte 0x4 9.--31. 1. "Reserved_9,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x4 8. "CKSTP,Clock Stop." "0: Supplies clock with POST2CK target modules,1: Stops POST2phi"
newline
rbitfld.long 0x4 6.--7. "Reserved_6,Reserved. These bits are always read as 0. The write value should always be 0." "0,1,2,3"
hexmask.long.byte 0x4 0.--5. 1. "DIV_5_0,Division Ratio."
line.long 0x8 "POST3CKCR,POST3CKCR is a 32-bit readable/writable register. This register controls the Power-On Self Test clock (POST3phi). POST frequency is 66.66 MHz. so the initial frequency is also 66.66MHz. Run-Time Test is done at 66.66MHz. POST3phi target is 3D.."
hexmask.long.tbyte 0x8 9.--31. 1. "Reserved_9,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x8 8. "CKSTP,Clock Stop." "0: Supplies clock with POST3CK target modules,1: Stops POST3phi"
newline
rbitfld.long 0x8 6.--7. "Reserved_6,Reserved. These bits are always read as 0. The write value should always be 0." "0,1,2,3"
hexmask.long.byte 0x8 0.--5. 1. "DIV_5_0,Division Ratio."
line.long 0xC "POST4CKCR,POST4CKCR is a 32-bit readable/writable register. This register controls the Power-On Self Test clock (POST4phi). POST frequency is 66.66 MHz. so the initial frequency is also 66.66MHz. Run-Time Test is done at 66.66MHz. POST4phi target is.."
hexmask.long.tbyte 0xC 9.--31. 1. "Reserved_9,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0xC 8. "CKSTP,Clock Stop." "0: Supplies clock with POST4CK target modules,1: Stops POST4CK"
newline
rbitfld.long 0xC 6.--7. "Reserved_6,Reserved. These bits are always read as 0. The write value should always be 0." "0,1,2,3"
hexmask.long.byte 0xC 0.--5. 1. "DIV_5_0,Division Ratio."
tree.end
tree "CPG_1"
base ad:0xE6070000
group.long 0x0++0x7
line.long 0x0 "TOPCKMWPR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x0 0.--31. 1. "WPRTCT_31_0,The specification is same as 8.2.1 CPG Write Protect Register (CPGWPR)."
line.long 0x4 "TOPCKMWPCR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,The specification is same as 8.2.2 CPG Write Protect Register (CPGWPCR)."
hexmask.long.word 0x4 1.--15. 1. "Reserved_1,The specification is same as 8.2.2 CPG Write Protect Register (CPGWPCR)."
newline
bitfld.long 0x4 0. "WPE,The specification is same as 8.2.2 CPG Write Protect Register (CPGWPCR)." "0,1"
group.long 0xF0++0xF
line.long 0x0 "CLCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - CLCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "CLCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - CLCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "CLCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "CLCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x100++0x7
line.long 0x0 "CLCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring CLCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring CLCKMCNT.MONCNT value."
line.long 0x4 "CLCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,CLCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x190++0xF
line.long 0x0 "CPCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - CPCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "CPCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - CPCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "CPCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "CPCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x1A0++0x7
line.long 0x0 "CPCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring CPCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring CPCKMCNT.MONCNT value."
line.long 0x4 "CPCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,CPCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x1B0++0xF
line.long 0x0 "RCLKTOPCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - RCLKTOPCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "RCLKTOPCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - RCLKTOPCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "RCLKTOPCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "RCLKTOPCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x1C0++0x7
line.long 0x0 "RCLKTOPCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring RCLKTOPCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring RCLKTOPCKMCNT.MONCNT value."
line.long 0x4 "RCLKTOPCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,RCLKTOPCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x1D0++0xF
line.long 0x0 "CPEXCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - CPEXCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "CPEXCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - CPEXCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "CPEXCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "CPEXCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x1E0++0x7
line.long 0x0 "CPEXCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring CPEXCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring CPEXCKMCNT.MONCNT value."
line.long 0x4 "CPEXCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,CPEXCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x1F0++0xF
line.long 0x0 "CBFUSATOPCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - CBFUSATOPCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "CBFUSATOPCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - CBFUSATOPCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "CBFUSATOPCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "CBFUSATOPCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x200++0x7
line.long 0x0 "CBFUSATOPCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring CBFUSATOPCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring CBFUSATOPCKMCNT.MONCNT value."
line.long 0x4 "CBFUSATOPCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,CBFUSATOPCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
rgroup.long 0x210++0x3
line.long 0x0 "TOPACKMSR,It is a 32-bit readable register."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 30. "Reserved_30,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 29. "Reserved_29,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 28. "Reserved_28,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 27. "Reserved_27,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 26. "Reserved_26,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 25. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 24. "CHKRES024,CL16M" "0,1"
newline
bitfld.long 0x0 23. "CHKRES023,ZX" "0,1"
bitfld.long 0x0 22. "Reserved_22,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 21. "Reserved_21,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 20. "Reserved_20,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 19. "CHKRES019,S0D4" "0,1"
bitfld.long 0x0 18. "CHKRES018,S0D3" "0,1"
newline
bitfld.long 0x0 17. "CHKRES017,S0D2" "0,1"
bitfld.long 0x0 16. "Reserved_16,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 15. "CHKRES015,CBFUSA" "0,1"
bitfld.long 0x0 14. "CHKRES014,CPEX" "0,1"
newline
bitfld.long 0x0 13. "CHKRES013,RCLK" "0,1"
bitfld.long 0x0 12. "CHKRES012,CP" "0,1"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 10. "Reserved_10,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 8. "Reserved_8,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 7. "CHKRES007,CL" "0,1"
bitfld.long 0x0 6. "Reserved_6,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 5. "Reserved_5,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 4. "Reserved_4,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 3. "Reserved_3,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 2. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 0. "Reserved_0,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
group.long 0x240++0xF
line.long 0x0 "S0D2CKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D2CKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D2CKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D2CKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D2CKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D2CKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x250++0x7
line.long 0x0 "S0D2CKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D2CKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D2CKMCNT.MONCNT value."
line.long 0x4 "S0D2CKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D2CKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x260++0xF
line.long 0x0 "S0D3CKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D3CKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D3CKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D3CKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D3CKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D3CKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x270++0x7
line.long 0x0 "S0D3CKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D3CKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D3CKMCNT.MONCNT value."
line.long 0x4 "S0D3CKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D3CKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x280++0xF
line.long 0x0 "S0D4CKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D4CKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D4CKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D4CKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D4CKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D4CKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x290++0x7
line.long 0x0 "S0D4CKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D4CKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D4CKMCNT.MONCNT value."
line.long 0x4 "S0D4CKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D4CKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x320++0xF
line.long 0x0 "CL16MCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - CL16MCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "CL16MCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - CL16MCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "CL16MCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "CL16MCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x330++0x7
line.long 0x0 "CL16MCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring CL16MCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring CL16MCKMCNT.MONCNT value."
line.long 0x4 "CL16MCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,CL16MCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
tree.end
tree "CPG_2"
base ad:0xE67FA000
group.long 0x0++0x7
line.long 0x0 "MMCKMWPR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x0 0.--31. 1. "WPRTCT_31_0,The specification is same as 8.2.1 CPG Write Protect Register (CPGWPR)."
line.long 0x4 "MMCKMWPCR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,The specification is same as 8.2.2 CPG Write Protect Register (CPGWPCR)."
hexmask.long.word 0x4 1.--15. 1. "Reserved_1,The specification is same as 8.2.2 CPG Write Protect Register (CPGWPCR)."
newline
bitfld.long 0x4 0. "WPE,The specification is same as 8.2.2 CPG Write Protect Register (CPGWPCR)." "0,1"
group.long 0x70++0xF
line.long 0x0 "ZB3D2CKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - ZB3D2CKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "ZB3D2CKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - ZB3D2CKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "ZB3D2CKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "ZB3D2CKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x80++0x7
line.long 0x0 "ZB3D2CKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring ZB3D2CKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring ZB3D2CKMCNT.MONCNT value."
line.long 0x4 "ZB3D2CKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,ZB3D2CKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x90++0xF
line.long 0x0 "CL16MMMCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - CL16MMMCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "CL16MMMCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - CL16MMMCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "CL16MMMCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "CL16MMMCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0xA0++0x7
line.long 0x0 "CL16MMMCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring CL16MMMCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring CL16MMMCKMCNT.MONCNT value."
line.long 0x4 "CL16MMMCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,CL16MMMCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
rgroup.long 0xAC++0x3
line.long 0x0 "MMACKMSR,It is a 32-bit readable register."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 30. "Reserved_30,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 29. "Reserved_29,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 28. "Reserved_28,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 27. "Reserved_27,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 26. "Reserved_26,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 25. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 24. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 23. "Reserved_23,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 22. "Reserved_22,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 21. "Reserved_21,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 20. "Reserved_20,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 19. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 18. "Reserved_18,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 17. "Reserved_17,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 16. "Reserved_16,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 15. "Reserved_15,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 14. "Reserved_14,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 13. "CHKRES013,RCLK" "0,1"
bitfld.long 0x0 12. "CHKRES012,CBFUSA" "0,1"
newline
bitfld.long 0x0 11. "CHKRES011,ZB3D4" "0,1"
bitfld.long 0x0 10. "CHKRES010,ZB3D1" "0,1"
newline
bitfld.long 0x0 9. "CHKRES009,S0D4_MM" "0,1"
bitfld.long 0x0 8. "Reserved_8,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 7. "CHKRES007,S0D2_MM" "0,1"
bitfld.long 0x0 6. "Reserved_6,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 5. "CHKRES005,CL16M_MM" "0,1"
bitfld.long 0x0 4. "CHKRES004,ZB3D2" "0,1"
newline
bitfld.long 0x0 3. "Reserved_3,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 2. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 0. "Reserved_0,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
group.long 0xD0++0xF
line.long 0x0 "S0D2MMCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D2MMCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D2MMCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D2MMCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D2MMCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D2MMCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0xE0++0x7
line.long 0x0 "S0D2MMCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D2MMCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D2MMCKMCNT.MONCNT value."
line.long 0x4 "S0D2MMCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D2MMCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x110++0xF
line.long 0x0 "S0D4MMCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D4MMCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D4MMCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D4MMCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D4MMCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D4MMCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x120++0x7
line.long 0x0 "S0D4MMCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D4MMCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D4MMCKMCNT.MONCNT value."
line.long 0x4 "S0D4MMCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D4MMCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x130++0xF
line.long 0x0 "ZB3CKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - ZB3CKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "ZB3CKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - ZB3CKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "ZB3CKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "ZB3CKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x140++0x7
line.long 0x0 "ZB3CKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring ZB3CKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring ZB3CKMCNT.MONCNT value."
line.long 0x4 "ZB3CKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,ZB3CKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x150++0xF
line.long 0x0 "ZB3D4CKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - ZB3D4CKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "ZB3D4CKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - ZB3D4CKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "ZB3D4CKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "ZB3D4CKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x160++0x7
line.long 0x0 "ZB3D4CKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring ZB3D4CKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring ZB3D4CKMCNT.MONCNT value."
line.long 0x4 "ZB3D4CKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,ZB3D4CKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x170++0xF
line.long 0x0 "CBFUSAMMCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - CBFUSAMMCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "CBFUSAMMCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - CBFUSAMMCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "CBFUSAMMCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "CBFUSAMMCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x180++0x7
line.long 0x0 "CBFUSAMMCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring CBFUSAMMCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring CBFUSAMMCKMCNT.MONCNT value."
line.long 0x4 "CBFUSAMMCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,CBFUSAMMCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x190++0xF
line.long 0x0 "RCLKMMCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - RCLKMMCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "RCLKMMCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - RCLKMMCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "RCLKMMCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "RCLKMMCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x1A0++0x7
line.long 0x0 "RCLKMMCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring RCLKMMCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring RCLKMMCKMCNT.MONCNT value."
line.long 0x4 "RCLKMMCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,RCLKMMCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
tree.end
tree "CPG_3"
base ad:0xE61F0000
group.long 0x0++0x7
line.long 0x0 "RTCKMWPR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x0 0.--31. 1. "WPRTCT_31_0,The specification is same as 8.2.1 CPG Write Protect Register (CPGWPR)."
line.long 0x4 "RTCKMWPCR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,The specification is same as 8.2.2 CPG Write Protect Register (CPGWPCR)."
hexmask.long.word 0x4 1.--15. 1. "Reserved_1,The specification is same as 8.2.2 CPG Write Protect Register (CPGWPCR)."
newline
bitfld.long 0x4 0. "WPE,The specification is same as 8.2.2 CPG Write Protect Register (CPGWPCR)." "0,1"
group.long 0x170++0xF
line.long 0x0 "RCLKRTCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - RCLKRTCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "RCLKRTCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - RCLKRTCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "RCLKRTCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "RCLKRTCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x180++0x7
line.long 0x0 "RCLKRTCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring RCLKRTCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring RCLKRTCKMCNT.MONCNT value."
line.long 0x4 "RCLKRTCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,RCLKRTCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x190++0xF
line.long 0x0 "CL16MRTCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - CL16MRTCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "CL16MRTCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - CL16MRTCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "CL16MRTCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "CL16MRTCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x1A0++0x7
line.long 0x0 "CL16MRTCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring CL16MRTCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring CL16MRTCKMCNT.MONCNT value."
line.long 0x4 "CL16MRTCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,CL16MRTCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
rgroup.long 0x1AC++0x3
line.long 0x0 "RTACKMSR,It is a 32-bit readable register."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 30. "Reserved_30,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 29. "Reserved_29,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 28. "Reserved_28,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 27. "Reserved_27,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 26. "Reserved_26,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 25. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 24. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 23. "Reserved_23,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 22. "Reserved_22,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 21. "CHKRES021,SASYNCRT" "0,1"
bitfld.long 0x0 20. "CHKRES020,CBFUSA" "0,1"
newline
bitfld.long 0x0 19. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 18. "CHKRES018,S0D24_RT" "0,1"
newline
bitfld.long 0x0 17. "Reserved_17,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 16. "CHKRES016,S0D6_RT" "0,1"
newline
bitfld.long 0x0 15. "CHKRES015,S0D4_RT" "0,1"
bitfld.long 0x0 14. "CHKRES014,S0D3_RT" "0,1"
newline
bitfld.long 0x0 13. "CHKRES013,S0D2_RT" "0,1"
bitfld.long 0x0 12. "Reserved_12,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 11. "CHKRES011,CL16M_RT" "0,1"
bitfld.long 0x0 10. "CHKRES010,RCLK" "0,1"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 8. "Reserved_8,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 7. "Reserved_7,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 6. "Reserved_6,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 5. "Reserved_5,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 4. "Reserved_4,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 3. "Reserved_3,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 2. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 0. "Reserved_0,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
group.long 0x1D0++0xF
line.long 0x0 "S0D2RTCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D2RTCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D2RTCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D2RTCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D2RTCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D2RTCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x1E0++0x7
line.long 0x0 "S0D2RTCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D2RTCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D2RTCKMCNT.MONCNT value."
line.long 0x4 "S0D2RTCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D2RTCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x1F0++0xF
line.long 0x0 "S0D3RTCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D3RTCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D3RTCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D3RTCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D3RTCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D3RTCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x200++0x7
line.long 0x0 "S0D3RTCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D3RTCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D3RTCKMCNT.MONCNT value."
line.long 0x4 "S0D3RTCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D3RTCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x210++0xF
line.long 0x0 "S0D4RTCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D4RTCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D4RTCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D4RTCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D4RTCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D4RTCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x220++0x7
line.long 0x0 "S0D4RTCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D4RTCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D4RTCKMCNT.MONCNT value."
line.long 0x4 "S0D4RTCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D4RTCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x230++0xF
line.long 0x0 "S0D6RTCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D6RTCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D6RTCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D6RTCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D6RTCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D6RTCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x240++0x7
line.long 0x0 "S0D6RTCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D6RTCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D6RTCKMCNT.MONCNT value."
line.long 0x4 "S0D6RTCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D6RTCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x270++0xF
line.long 0x0 "S0D24RTCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D24RTCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D24RTCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D24RTCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D24RTCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D24RTCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x280++0x7
line.long 0x0 "S0D24RTCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D24RTCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D24RTCKMCNT.MONCNT value."
line.long 0x4 "S0D24RTCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D24RTCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x2B0++0xF
line.long 0x0 "CBFUSARTCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - CBFUSARTCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "CBFUSARTCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - CBFUSARTCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "CBFUSARTCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "CBFUSARTCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x2C0++0x7
line.long 0x0 "CBFUSARTCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring CBFUSARTCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring CBFUSARTCKMCNT.MONCNT value."
line.long 0x4 "CBFUSARTCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,CBFUSARTCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x2D0++0xF
line.long 0x0 "SASYNCRTCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - SASYNCRTCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "SASYNCRTCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - SASYNCRTCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "SASYNCRTCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "SASYNCRTCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x2E0++0x7
line.long 0x0 "SASYNCRTCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring SASYNCRTCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring SASYNCRTCKMCNT.MONCNT value."
line.long 0x4 "SASYNCRTCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,SASYNCRTCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
tree.end
tree "CPG_4"
base ad:0xE61F2000
group.long 0x0++0x7
line.long 0x0 "RTCR52CKMWPR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x0 0.--31. 1. "WPRTCT_31_0,The specification is same as 8.2.1 CPG Write Protect Register (CPGWPR)."
line.long 0x4 "RTCR52CKMWPCR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,The specification is same as 8.2.2 CPG Write Protect Register (CPGWPCR)."
hexmask.long.word 0x4 1.--15. 1. "Reserved_1,The specification is same as 8.2.2 CPG Write Protect Register (CPGWPCR)."
newline
bitfld.long 0x4 0. "WPE,The specification is same as 8.2.2 CPG Write Protect Register (CPGWPCR)." "0,1"
group.long 0x10++0xF
line.long 0x0 "ZR0CR52CKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - ZR0CR52CKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "ZR0CR52CKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - ZR0CR52CKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "ZR0CR52CKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "ZR0CR52CKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x20++0x7
line.long 0x0 "ZR0CR52CKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring ZR0CR52CKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring ZR0CR52CKMCNT.MONCNT value."
line.long 0x4 "ZR0CR52CKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,ZR0CR52CKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x70++0xF
line.long 0x0 "RCLKRTCR52CKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - RCLKRTCR52CKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "RCLKRTCR52CKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - RCLKRTCR52CKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "RCLKRTCR52CKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "RCLKRTCR52CKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x80++0x7
line.long 0x0 "RCLKRTCR52CKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring RCLKRTCR52CKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring RCLKRTCR52CKMCNT.MONCNT value."
line.long 0x4 "RCLKRTCR52CKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,RCLKRTCR52CKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x90++0xF
line.long 0x0 "CBFUSARTCR52CKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - CBFUSARTCR52CKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "CBFUSARTCR52CKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - CBFUSARTCR52CKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "CBFUSARTCR52CKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "CBFUSARTCR52CKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0xA0++0x7
line.long 0x0 "CBFUSARTCR52CKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring CBFUSARTCR52CKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring CBFUSARTCR52CKMCNT.MONCNT value."
line.long 0x4 "CBFUSARTCR52CKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,CBFUSARTCR52CKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
rgroup.long 0xB0++0x3
line.long 0x0 "RTCR52ACKMSR,It is a 32-bit readable register."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 30. "Reserved_30,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 29. "Reserved_29,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 28. "Reserved_28,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 27. "Reserved_27,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 26. "Reserved_26,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 25. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 24. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 23. "Reserved_23,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 22. "Reserved_22,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 21. "Reserved_21,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 20. "Reserved_20,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 19. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 18. "Reserved_18,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 17. "Reserved_17,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 16. "Reserved_16,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 15. "Reserved_15,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 14. "Reserved_14,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 13. "Reserved_13,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 12. "Reserved_12,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 10. "Reserved_10,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 8. "CHKRES008,ZR2" "0,1"
newline
bitfld.long 0x0 7. "CHKRES007,ZR1" "0,1"
bitfld.long 0x0 6. "Reserved_6,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 5. "CHKRES005,S0D2_RT" "0,1"
bitfld.long 0x0 4. "CHKRES004,CBFUSA" "0,1"
newline
bitfld.long 0x0 3. "CHKRES003,RCLK" "0,1"
bitfld.long 0x0 2. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 0. "CHKRES000,ZR0" "0,1"
group.long 0xC0++0xF
line.long 0x0 "S0D2RTCR52CKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D2RTCR52CKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D2RTCR52CKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D2RTCR52CKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D2RTCR52CKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D2RTCR52CKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0xD0++0x7
line.long 0x0 "S0D2RTCR52CKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D2RTCR52CKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D2RTCR52CKMCNT.MONCNT value."
line.long 0x4 "S0D2RTCR52CKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D2RTCR52CKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x100++0xF
line.long 0x0 "ZR1CR52CKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - ZR1CR52CKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "ZR1CR52CKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - ZR1CR52CKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "ZR1CR52CKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "ZR1CR52CKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x110++0x7
line.long 0x0 "ZR1CR52CKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring ZR1CR52CKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring ZR1CR52CKMCNT.MONCNT value."
line.long 0x4 "ZR1CR52CKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,ZR1CR52CKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x120++0xF
line.long 0x0 "ZR2CR52CKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - ZR2CR52CKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "ZR2CR52CKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - ZR2CR52CKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "ZR2CR52CKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "ZR2CR52CKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x130++0x7
line.long 0x0 "ZR2CR52CKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring ZR2CR52CKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring ZR2CR52CKMCNT.MONCNT value."
line.long 0x4 "ZR2CR52CKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,ZR2CR52CKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
tree.end
tree "CPG_5"
base ad:0xE677E000
group.long 0x0++0x7
line.long 0x0 "PERCKMWPR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x0 0.--31. 1. "WPRTCT_31_0,The specification is same as 8.2.1 CPG Write Protect Register (CPGWPR)."
line.long 0x4 "PERCKMWPCR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,The specification is same as 8.2.2 CPG Write Protect Register (CPGWPCR)."
hexmask.long.word 0x4 1.--15. 1. "Reserved_1,The specification is same as 8.2.2 CPG Write Protect Register (CPGWPCR)."
newline
bitfld.long 0x4 0. "WPE,The specification is same as 8.2.2 CPG Write Protect Register (CPGWPCR)." "0,1"
group.long 0x90++0xF
line.long 0x0 "SD0HCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - SD0HCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "SD0HCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - SD0HCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "SD0HCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "SD0HCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0xA0++0x7
line.long 0x0 "SD0HCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring SD0HCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring SD0HCKMCNT.MONCNT value."
line.long 0x4 "SD0HCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,SD0HCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0xB0++0xF
line.long 0x0 "SD0CKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - SD0CKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "SD0CKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - SD0CKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "SD0CKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "SD0CKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0xC0++0x7
line.long 0x0 "SD0CKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring SD0CKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring SD0CKMCNT.MONCNT value."
line.long 0x4 "SD0CKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,SD0CKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x130++0xF
line.long 0x0 "MSOCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - MSOCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "MSOCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - MSOCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "MSOCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "MSOCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x140++0x7
line.long 0x0 "MSOCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring MSOCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring MSOCKMCNT.MONCNT value."
line.long 0x4 "MSOCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,MSOCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x150++0xF
line.long 0x0 "RCLKPERCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - RCLKPERCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "RCLKPERCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - RCLKPERCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "RCLKPERCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "RCLKPERCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x160++0x7
line.long 0x0 "RCLKPERCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring RCLKPERCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring RCLKPERCKMCNT.MONCNT value."
line.long 0x4 "RCLKPERCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,RCLKPERCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x170++0xF
line.long 0x0 "FRAYCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - FRAYCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "FRAYCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - FRAYCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "FRAYCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "FRAYCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x180++0x7
line.long 0x0 "FRAYCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring FRAYCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring FRAYCKMCNT.MONCNT value."
line.long 0x4 "FRAYCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,FRAYCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x1B0++0xF
line.long 0x0 "CL16MPERCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - CL16MPERCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "CL16MPERCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - CL16MPERCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "CL16MPERCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "CL16MPERCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x1C0++0x7
line.long 0x0 "CL16MPERCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring CL16MPERCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring CL16MPERCKMCNT.MONCNT value."
line.long 0x4 "CL16MPERCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,CL16MPERCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x1D0++0xF
line.long 0x0 "CANFDCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - CANFDCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "CANFDCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - CANFDCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "CANFDCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "CANFDCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x1E0++0x7
line.long 0x0 "CANFDCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring CANFDCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring CANFDCKMCNT.MONCNT value."
line.long 0x4 "CANFDCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,CANFDCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x1F0++0xF
line.long 0x0 "RPCCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - RPCCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "RPCCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - RPCCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "RPCCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "RPCCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x200++0x7
line.long 0x0 "RPCCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring RPCCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring RPCCKMCNT.MONCNT value."
line.long 0x4 "RPCCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,RPCCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x210++0xF
line.long 0x0 "RPCD2CKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - RPCD2CKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "RPCD2CKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - RPCD2CKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "RPCD2CKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "RPCD2CKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x220++0x7
line.long 0x0 "RPCD2CKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring RPCD2CKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring RPCD2CKMCNT.MONCNT value."
line.long 0x4 "RPCD2CKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,RPCD2CKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
rgroup.long 0x250++0x3
line.long 0x0 "PERACKMSR,It is a 32-bit readable register."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 30. "CHKRES030,SASYNCPERD4" "0,1"
newline
bitfld.long 0x0 29. "CHKRES029,SASYNCPERD2" "0,1"
bitfld.long 0x0 28. "CHKRES028,SASYNCPERD1" "0,1"
newline
bitfld.long 0x0 27. "CHKRES027,CBFUSA" "0,1"
bitfld.long 0x0 26. "CHKRES026,ADGH" "0,1"
newline
bitfld.long 0x0 25. "CHKRES025,S0D24_PER" "0,1"
bitfld.long 0x0 24. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 23. "CHKRES023,S0D12_PER" "0,1"
bitfld.long 0x0 22. "CHKRES022,S0D6_PER" "0,1"
newline
bitfld.long 0x0 21. "CHKRES021,S0D4_PER" "0,1"
bitfld.long 0x0 20. "CHKRES020,S0D3_PER" "0,1"
newline
bitfld.long 0x0 19. "CHKRES019,S0D2_PER" "0,1"
bitfld.long 0x0 18. "Reserved_18,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 17. "Reserved_17,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 16. "CHKRES016,RPCD2" "0,1"
newline
bitfld.long 0x0 15. "CHKRES015,RPC" "0,1"
bitfld.long 0x0 14. "CHKRES014,CANFD" "0,1"
newline
bitfld.long 0x0 13. "CHKRES013,CL16M_PER" "0,1"
bitfld.long 0x0 12. "CHKRES012,IPC" "0,1"
newline
bitfld.long 0x0 11. "CHKRES011,FRAY" "0,1"
bitfld.long 0x0 10. "CHKRES010,RCLK" "0,1"
newline
bitfld.long 0x0 9. "CHKRES009,MSO" "0,1"
bitfld.long 0x0 8. "Reserved_8,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 7. "Reserved_7,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 6. "Reserved_6,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 5. "CHKRES005,SD0" "0,1"
bitfld.long 0x0 4. "CHKRES004,SD0H" "0,1"
newline
bitfld.long 0x0 3. "Reserved_3,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 2. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 0. "Reserved_0,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
group.long 0x280++0xF
line.long 0x0 "S0D2PERCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D2PERCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D2PERCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D2PERCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D2PERCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D2PERCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x290++0x7
line.long 0x0 "S0D2PERCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D2PERCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D2PERCKMCNT.MONCNT value."
line.long 0x4 "S0D2PERCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D2PERCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x2A0++0xF
line.long 0x0 "S0D3PERCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D3PERCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D3PERCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D3PERCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D3PERCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D3PERCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x2B0++0x7
line.long 0x0 "S0D3PERCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D3PERCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D3PERCKMCNT.MONCNT value."
line.long 0x4 "S0D3PERCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D3PERCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x2C0++0xF
line.long 0x0 "S0D4PERCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D4PERCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D4PERCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D4PERCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D4PERCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D4PERCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x2D0++0x7
line.long 0x0 "S0D4PERCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D4PERCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D4PERCKMCNT.MONCNT value."
line.long 0x4 "S0D4PERCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D4PERCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x2E0++0xF
line.long 0x0 "S0D6PERCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D6PERCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D6PERCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D6PERCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D6PERCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D6PERCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x2F0++0x7
line.long 0x0 "S0D6PERCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D6PERCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D6PERCKMCNT.MONCNT value."
line.long 0x4 "S0D6PERCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D6PERCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x300++0xF
line.long 0x0 "S0D12PERCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D12PERCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D12PERCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D12PERCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D12PERCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D12PERCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x310++0x7
line.long 0x0 "S0D12PERCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D12PERCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D12PERCKMCNT.MONCNT value."
line.long 0x4 "S0D12PERCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D12PERCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x340++0xF
line.long 0x0 "S0D24PERCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D24PERCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D24PERCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D24PERCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D24PERCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D24PERCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x350++0x7
line.long 0x0 "S0D24PERCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D24PERCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D24PERCKMCNT.MONCNT value."
line.long 0x4 "S0D24PERCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D24PERCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x360++0xF
line.long 0x0 "ADGHCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - ADGHCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "ADGHCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - ADGHCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "ADGHCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "ADGHCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x370++0x7
line.long 0x0 "ADGHCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring ADGHCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring ADGHCKMCNT.MONCNT value."
line.long 0x4 "ADGHCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,ADGHCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x380++0xF
line.long 0x0 "CBFUSAPERCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - CBFUSAPERCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "CBFUSAPERCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - CBFUSAPERCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "CBFUSAPERCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "CBFUSAPERCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x390++0x7
line.long 0x0 "CBFUSAPERCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring CBFUSAPERCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring CBFUSAPERCKMCNT.MONCNT value."
line.long 0x4 "CBFUSAPERCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,CBFUSAPERCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x3A0++0xF
line.long 0x0 "SASYNCPERD1CKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - SASYNCPERD1CKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "SASYNCPERD1CKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - SASYNCPERD1CKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "SASYNCPERD1CKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "SASYNCPERD1CKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x3B0++0x7
line.long 0x0 "SASYNCPERD1CKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring SASYNCPERD1CKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring SASYNCPERD1CKMCNT.MONCNT value."
line.long 0x4 "SASYNCPERD1CKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,SASYNCPERD1CKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x3C0++0xF
line.long 0x0 "SASYNCPERD2CKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - SASYNCPERD2CKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "SASYNCPERD2CKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - SASYNCPERD2CKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "SASYNCPERD2CKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "SASYNCPERD2CKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x3D0++0x7
line.long 0x0 "SASYNCPERD2CKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring SASYNCPERD2CKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring SASYNCPERD2CKMCNT.MONCNT value."
line.long 0x4 "SASYNCPERD2CKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,SASYNCPERD2CKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x3E0++0xF
line.long 0x0 "SASYNCPERD4CKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - SASYNCPERD4CKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "SASYNCPERD4CKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - SASYNCPERD4CKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "SASYNCPERD4CKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "SASYNCPERD4CKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x3F0++0x7
line.long 0x0 "SASYNCPERD4CKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring SASYNCPERD4CKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring SASYNCPERD4CKMCNT.MONCNT value."
line.long 0x4 "SASYNCPERD4CKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,SASYNCPERD4CKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
tree.end
tree "CPG_6"
base ad:0xE644E000
group.long 0x0++0x7
line.long 0x0 "HSCCKMWPR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (OHSCation chapter)."
hexmask.long 0x0 0.--31. 1. "WPRTCT_31_0,The specification is same as 8.2.1 CPG Write Protect Register (CPGWPR)."
line.long 0x4 "HSCCKMWPCR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (OHSCation chapter)."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,The specification is same as 8.2.2 CPG Write Protect Register (CPGWPCR)."
hexmask.long.word 0x4 1.--15. 1. "Reserved_1,The specification is same as 8.2.2 CPG Write Protect Register (CPGWPCR)."
newline
bitfld.long 0x4 0. "WPE,The specification is same as 8.2.2 CPG Write Protect Register (CPGWPCR)." "0,1"
group.long 0xB0++0xF
line.long 0x0 "CBFUSAHSCCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - CBFUSAHSCCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "CBFUSAHSCCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - CBFUSAHSCCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "CBFUSAHSCCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "CBFUSAHSCCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0xC0++0x7
line.long 0x0 "CBFUSAHSCCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring CBFUSAHSCCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring CBFUSAHSCCKMCNT.MONCNT value."
line.long 0x4 "CBFUSAHSCCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,CBFUSAHSCCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x130++0xF
line.long 0x0 "CL16MHSCCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - CL16MHSCCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "CL16MHSCCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - CL16MHSCCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "CL16MHSCCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "CL16MHSCCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x140++0x7
line.long 0x0 "CL16MHSCCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring CL16MHSCCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring CL16MHSCCKMCNT.MONCNT value."
line.long 0x4 "CL16MHSCCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,CL16MHSCCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
rgroup.long 0x14C++0x3
line.long 0x0 "HSCACKMSR,It is a 32-bit readable register."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 30. "Reserved_30,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 29. "Reserved_29,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 28. "Reserved_28,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 27. "Reserved_27,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 26. "Reserved_26,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 25. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 24. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 23. "Reserved_23,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 22. "Reserved_22,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 21. "CHKRES021,CBFUSA" "0,1"
bitfld.long 0x0 20. "Reserved_20,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 19. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 18. "Reserved_18,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 17. "Reserved_17,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 16. "Reserved_16,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 15. "Reserved_15,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 14. "Reserved_14,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 13. "Reserved_13,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 12. "Reserved_12,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 11. "CHKRES011,S0D4_HSC" "0,1"
bitfld.long 0x0 10. "Reserved_10,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 9. "CHKRES009,S0D2_HSC" "0,1"
bitfld.long 0x0 8. "Reserved_8,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 7. "CHKRES007,CL16M_HSC" "0,1"
bitfld.long 0x0 6. "Reserved_6,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 5. "CHKRES005,RCLK" "0,1"
bitfld.long 0x0 4. "Reserved_4,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 3. "Reserved_3,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 2. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 0. "Reserved_0,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
group.long 0x150++0xF
line.long 0x0 "S0D1HSCCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D1HSCCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D1HSCCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D1HSCCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D1HSCCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D1HSCCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x160++0x7
line.long 0x0 "S0D1HSCCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D1HSCCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D1HSCCKMCNT.MONCNT value."
line.long 0x4 "S0D1HSCCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D1HSCCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x170++0xF
line.long 0x0 "S0D2HSCCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D2HSCCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D2HSCCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D2HSCCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D2HSCCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D2HSCCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x180++0x7
line.long 0x0 "S0D2HSCCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D2HSCCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D2HSCCKMCNT.MONCNT value."
line.long 0x4 "S0D2HSCCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D2HSCCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x1B0++0xF
line.long 0x0 "S0D4HSCCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - S0D4HSCCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "S0D4HSCCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - S0D4HSCCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "S0D4HSCCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "S0D4HSCCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x1C0++0x7
line.long 0x0 "S0D4HSCCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring S0D4HSCCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring S0D4HSCCKMCNT.MONCNT value."
line.long 0x4 "S0D4HSCCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,S0D4HSCCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
group.long 0x2F0++0xF
line.long 0x0 "RCLKHSCCKMCSR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
rbitfld.long 0x0 31. "CHKRES,Check result." "0: Clock oscillates normally,1: Detect unexpected clock oscillation"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 24. "CLRMON,Reference for clear command signal - RCLKHSCCKMECR.CLRRES" "0: Clear command signal is released,1: Clear command signal is issued"
hexmask.long.byte 0x0 19.--23. 1. "Reserved_19,Reserved. This bit is always read as 0. The write value should always be 0."
newline
rbitfld.long 0x0 18. "RSTMMON,Reset status for monitor clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
rbitfld.long 0x0 17. "RSTMSMP,Reset status for sampling clock domain of clock monitor module." "0: Reset signal is issued,1: Reset signal is released"
newline
rbitfld.long 0x0 16. "ENMON,Operating status." "0: Clock monitor is stopped,1: Clock monitor is operating"
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. This bit is always read as 0. The write value should always be 0."
newline
bitfld.long 0x0 1. "INTEN,Interrupt mask bit." "0: Mask an interrupt,1: Permit to issue an interrupt when clock monitor.."
bitfld.long 0x0 0. "CHKEN,Enable for checking clock oscillation." "0: Stop clock monitor checking,1: Run clock monitor checking"
line.long 0x4 "RCLKHSCCKMECR,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. This bit is always read as 0. The write value should always be 0."
bitfld.long 0x4 0. "CLRRES,Reference for clear command signal - RCLKHSCCKMECR.CLRRES" "0: Release clear signal,1: Issue clear signal to clock monitor"
line.long 0x8 "RCLKHSCCKMLCH,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0x8 0.--23. 1. "CMPH_23_0,The upper limit to judge as expected oscillation."
line.long 0xC "RCLKHSCCKMLCL,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. This bit is always read as 0. The write value should always be 0."
hexmask.long.tbyte 0xC 0.--23. 1. "CMPL_23_0,The lower limit to judge as expected oscillation."
rgroup.long 0x300++0x7
line.long 0x0 "RCLKHSCCKMCNT,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x0 31. "Reserved_31,Reserved. This bit is always read as 0. The write value should always be 0." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "UPDCNT_6_0,Monitoring RCLKHSCCKMCNT.UPDCNT value."
newline
hexmask.long.tbyte 0x0 0.--23. 1. "MONCNTE_23_0,Monitoring RCLKHSCCKMCNT.MONCNT value."
line.long 0x4 "RCLKHSCCKMCNTE,It is a 32-bit readable/writable register. The usage is described in 8.5.2 Clock Monitor (Operation chapter)."
bitfld.long 0x4 31. "VLD,Valid bit." "0: UPDCNTE and MONCNTE are showing invalid value,1: UPDCNTE and MONCNTE are showing valid value"
hexmask.long.byte 0x4 24.--30. 1. "UPDCNTE_6_0,RCLKHSCCKMCNT.UPDCNT value when the first error occurred."
newline
hexmask.long.tbyte 0x4 0.--23. 1. "MONCNTE_23_0,The counter value of clock monitor when the first error occurred."
tree.end
tree.end
tree "CRC (Cyclic Redundancy Check)"
base ad:0x0
tree "CRC_0"
base ad:0xE7080000
group.long 0x0++0x3
line.long 0x0 "WCRC0_CAIP0_EN,WCRC0_CAIP0_EN is a register that sets enable the data transfer to/from each port for AES-ACC_n interface in FIFO."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "out_en,Output data from Data port in FIFO enable" "0: Disable output from Data port,1: Enable output from Data port"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "res_en,Output result data from Result port in FIFO enable" "0: Disable output from Result port,1: Enable output from Result port"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "trans_en,Transferring data from Data port in FIFO to AES-ACC_n enable" "0: Disable transferring data to AES-ACC_n,1: Enable transferring data to AES-ACC_n"
newline
bitfld.long 0x0 0. "in_en,Input data to Data/Command port in FIFO enable" "0: Disable input to Data/Command port,1: Enable input to Data/Command port"
group.long 0x20++0x3
line.long 0x0 "WCRC0_CAIP0_STOP,WCRC0_CAIP0_STOP is a register that stop transfer to AES-ACC_n interface."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "stop,1: Stop data transfer." "?,1: Stop data transfer"
group.long 0x30++0x3
line.long 0x0 "WCRC0_CAIP0_CMDEN,WCRC0_CAIP0_CMDEN is a register that sets enable command function for AES-ACC_n module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "cmd_en,Command function enable" "0: Disable command function,1: Enable command function"
group.long 0x80++0x3
line.long 0x0 "WCRC0_CAIP0_WAIT,WCRC0_CAIP0_WAIT is a register that wait subsequent command for AES-ACC_n interface."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "wait,1: Wait subsequent command for 128 cycles @ S0D2_RTphi." "?,1: Wait subsequent command for 128 cycles @.."
group.long 0x200++0x3
line.long 0x0 "WCRC0_CAIP0_STS,WCRC0_CAIP0_STS is a register that indicates the state of operation related to AES-ACC_n module."
eventfld.long 0x0 31. "stop_done,Indicates the state of stop operation by WCRC0_CAIP0_STOP register." "0: Stop operation in progress or not done,1: Stop operation is done"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
eventfld.long 0x0 24. "cmd_done,Indicates the state of command function." "0: Accessing to register by command in progress or..,1: Accessing to register by command is done"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
eventfld.long 0x0 20. "res_done,Indicates the state of result data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
newline
hexmask.long.tbyte 0x0 1.--19. 1. "Reserved_1,Reserved."
newline
eventfld.long 0x0 0. "trans_done,Indicates the state of input data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
group.long 0x240++0x3
line.long 0x0 "WCRC0_CAIP0_INTEN,WCRC0_CAIP0_INTEN is a register that sets enable for the interrupt of operation related to AES-ACC_n module."
bitfld.long 0x0 31. "stop_done_ie,Interrupt for the complete of stop operation by WCRC0_CAIP0_STOP register." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
bitfld.long 0x0 24. "cmd_done_ie,Interrupt for the complete of command function enable." "0: Disable interrupt,1: Enable interrupt"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "res_done_ie,Interrupt for the complete of result data transfer enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.tbyte 0x0 1.--19. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "trans_done_ie,Interrupt for the complete of input data transfer enable." "0: Disable interrupt,1: Enable interrupt"
group.long 0x2A0++0x3
line.long 0x0 "WCRC0_CAIP0_BUF_STS_RDEN,WCRC0_CAIP0_BUF_STS_RDEN is a register that sets enable for the interrupt of operation related to AES-ACC_n module."
hexmask.long.word 0x0 16.--31. 1. "Code_value,Code value (Hsingle_quotationA5A5)"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "BUF_STS_RDEN,WCRC0_CAIP0_BUF_STS enable." "0: Disable WCRC0_CAIP0_BUF_STS,1: Enable WCRC0_CAIP0_BUF_STS"
rgroup.long 0x2A4++0x3
line.long 0x0 "WCRC0_CAIP0_BUF_STS,WCRC0_CAIP0_BUF_STS is a register that sets enable for the interrupt of operation related to AES-ACC_n module."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved."
newline
bitfld.long 0x0 17. "Reserved_17,Reserved." "0,1"
newline
bitfld.long 0x0 16. "Reserved_16,Reserved." "0,1"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "Reserved_12,Reserved." "0,1"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved." "0,1,2,3"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x0 8. "buf_empty,Buffer empty flag." "0: Buffer is not empty,1: Buffer is empty"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved." "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved."
group.long 0x400++0x3
line.long 0x0 "WCRC0_CAIP1_EN,WCRC0_CAIP1_EN is a register that sets enable the data transfer to/from each ports for AES-ACC_p interface in FIFO."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "out_en,Output data from Data port in FIFO enable" "0: Disable output from Data port,1: Enable output from Data port"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "res_en,Output result data from Result port in FIFO enable" "0: Disable output from Result port,1: Enable output from Result port"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "trans_en,Transferring data from Data port in FIFO to AES-ACC_p enable" "0: Disable transferring data to AES-ACC_p,1: Enable transferring data to AES-ACC_p"
newline
bitfld.long 0x0 0. "in_en,Input data to Data/Command port in FIFO enable" "0: Disable input to Data/Command port,1: Enable input to Data/Command port"
group.long 0x420++0x3
line.long 0x0 "WCRC0_CAIP1_STOP,WCRC0_CAIP1_STOP is a register that stop transfer to AES-ACC_p interface."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "stop,1: Stop data transfer." "?,1: Stop data transfer"
group.long 0x430++0x3
line.long 0x0 "WCRC0_CAIP1_CMDEN,WCRC0_CAIP1_CMDEN is a register that sets enable command function for AES-ACC_p module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "cmd_en,Command function enable" "0: Disable command function,1: Enable command function"
group.long 0x480++0x3
line.long 0x0 "WCRC0_CAIP1_WAIT,WCRC0_CAIP1_WAIT is a register that wait subsequent command for AES-ACC_p interface."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "wait,1: Wait subsequent command for 128 cycles @ S0D2_RTphi." "?,1: Wait subsequent command for 128 cycles @.."
group.long 0x600++0x3
line.long 0x0 "WCRC0_CAIP1_STS,WCRC0_CAIP1_STS is a register that indicates the state of operation related to AES-ACC_p module."
eventfld.long 0x0 31. "stop_done,Indicates the state of stop operation by WCRC0_CAIP1_STOP register." "0: Stop operation in progress or not done,1: Stop operation is done"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
eventfld.long 0x0 24. "cmd_done,Indicates the state of command function." "0: Accessing to register by command in progress or..,1: Accessing to register by command is done"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
eventfld.long 0x0 20. "res_done,Indicates the state of result data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
newline
hexmask.long.tbyte 0x0 1.--19. 1. "Reserved_1,Reserved."
newline
eventfld.long 0x0 0. "trans_done,Indicates the state of input data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
group.long 0x640++0x3
line.long 0x0 "WCRC0_CAIP1_INTEN,WCRC0_CAIP1_INTEN is a register that sets enable for the interrupt of operation related to AES-ACC_p module."
bitfld.long 0x0 31. "stop_done_ie,Interrupt for the complete of stop operation by WCRC0_CAIP1_STOP register." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
bitfld.long 0x0 24. "cmd_done_ie,Interrupt for the complete of command function enable." "0: Disable interrupt,1: Enable interrupt"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "res_done_ie,Interrupt for the complete of result data transfer enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.tbyte 0x0 1.--19. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "trans_done_ie,Interrupt for the complete of input data transfer enable." "0: Disable interrupt,1: Enable interrupt"
group.long 0x6A0++0x3
line.long 0x0 "WCRC0_CAIP1_BUF_STS_RDEN,WCRC0_CAIP1_BUF_STS_RDEN is a register that sets enable for the interrupt of operation related to AES-ACC_p module."
hexmask.long.word 0x0 16.--31. 1. "Code_value,Code value (Hsingle_quotationA5A5)"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "BUF_STS_RDEN,WCRC0_CAIP1_BUF_STS enable." "0: Disable WCRC0_CAIP1_BUF_STS,1: Enable WCRC0_CAIP1_BUF_STS"
rgroup.long 0x6A4++0x3
line.long 0x0 "WCRC0_CAIP1_BUF_STS,WCRC0_CAIP1_BUF_STS is a register that sets enable for the interrupt of operation related to AES-ACC_p module."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved."
newline
bitfld.long 0x0 17. "Reserved_17,Reserved." "0,1"
newline
bitfld.long 0x0 16. "Reserved_16,Reserved." "0,1"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "Reserved_12,Reserved." "0,1"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved." "0,1,2,3"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x0 8. "buf_empty,Buffer empty flag." "0: Buffer is not empty,1: Buffer is empty"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved." "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved."
group.long 0x800++0x3
line.long 0x0 "WCRC0_CRC0_EN,WCRC[m]_CRC[m]_EN is a register that sets enable the data transfer to/from each port for CRC[m] module in FIFO."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "out_en,Output data from Data port in FIFO enable" "0: Disable output from Data port,1: Enable output from Data port"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "res_en,Output result data from Result port in FIFO enable" "0: Disable output from Result port,1: Enable output from Result port"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "trans_en,Transferring data from Data port in FIFO to CRC[m] enable" "0: Disable transferring data to CRC[m],1: Enable transferring data to CRC[m]"
newline
bitfld.long 0x0 0. "in_en,Input data to Data/Command/Expected data port in FIFO enable" "0: Disable input to Data/Command/Expected data port,1: Enable input to Data/Command/Expected data port"
group.long 0x820++0x3
line.long 0x0 "WCRC0_CRC0_STOP,WCRC[m]_CRC[m]_STOP is a register that stop transfer to CRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "stop,1: Stop data transfer." "?,1: Stop data transfer"
group.long 0x830++0x3
line.long 0x0 "WCRC0_CRC0_CMDEN,WCRC[m]_CRC[m]_CMDEN is a register that sets enable command function for CRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "cmd_en,Command function enable" "0: Disable command function,1: Enable command function"
group.long 0x840++0x3
line.long 0x0 "WCRC0_CRC0_COMP,WCRC[m]_CRC[m]_COMP is a register that sets enable comparing CRC result from CRC[m] module with expected data in FIFO."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved."
newline
bitfld.long 0x0 16.--17. "cmp_freq,Set the frequency of comparing." "0: ;Compare every 16Byte CRC generated,1: ;Compare every 32Byte CRC generated,?,?"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved."
newline
bitfld.long 0x0 1. "exp_reqsel,Select DMA Transfer request source for transferring expected data." "0: dmareq_wcrcm_crcm_in,1: dmareq_wcrcm_crcm_res"
newline
bitfld.long 0x0 0. "cmp_en,Comparing CRC result with expected data enable" "0: Disable comparing function,1: Enable comparing function"
group.long 0x850++0x3
line.long 0x0 "WCRC0_CRC0_COMP_RES,WCRC[m]_CRC[m]_COMP_RES is a register that indicates the result of comparing CRC for CRC[m] module."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved."
newline
hexmask.long.word 0x0 0.--15. 1. "cmp_res,The result of comparing CRC"
group.long 0x870++0x3
line.long 0x0 "WCRC0_CRC0_CONV,WCRC[m]_CRC[m]_CONV is a register that sets CRC conversion size to once for CRC[m] module."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x0 0.--20. 1. "conv,CRC conversion size specification"
group.long 0x880++0x3
line.long 0x0 "WCRC0_CRC0_WAIT,WCRC[m]_CRC[m]_WAIT is a register that wait subsequent command for CRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "wait,1: Wait subsequent command for 128 cycles @ S0D2_RTphi." "?,1: Wait subsequent command for 128 cycles @.."
group.long 0x910++0x3
line.long 0x0 "WCRC0_CRC0_INIT_CRC,WCRC[m]_CRC[m]_INIT_CRC is a register that sets CRC code value to DCRAmCOUT register at auto clear."
hexmask.long 0x0 0.--31. 1. "init_code,CRC code value to DCRAmCOUT register at auto clear."
group.long 0xA00++0x3
line.long 0x0 "WCRC0_CRC0_STS,WCRC[m]_CRC[m]_STS is a register that indicates the state of operation related to CRC[m] module."
eventfld.long 0x0 31. "stop_done,Indicates the state of stop operation by WCRC[m]_CRC[m]_STOP register." "0: Stop operation in progress or not done,1: Stop operation is done"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
eventfld.long 0x0 24. "cmd_done,Indicates the state of command function." "0: Accessing to register by command in progress or..,1: Accessing to register by command is done"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
eventfld.long 0x0 20. "res_done,Indicates the state of result data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
newline
hexmask.long.byte 0x0 14.--19. 1. "Reserved_14,Reserved."
newline
eventfld.long 0x0 13. "comp_err,Indicates the error of comparing CRC." "0: No comparing error or not comparing,1: Mismatch has occurred"
newline
eventfld.long 0x0 12. "comp_done,Indicates the state of comparing CRC." "0: Comparison in progress or not comparing,1: Comparing is done"
newline
hexmask.long.word 0x0 1.--11. 1. "Reserved_1,Reserved."
newline
eventfld.long 0x0 0. "trans_done,Indicates the state of input data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
group.long 0xA40++0x3
line.long 0x0 "WCRC0_CRC0_INTEN,WCRC[m]_CRC[m]_INTEN is a register that sets enable for the interrupt of operation related to CRC[m] module."
bitfld.long 0x0 31. "stop_done_ie,Interrupt for the complete of stop operation by WCRC[m]_CRC[m]_STOP register." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
bitfld.long 0x0 24. "cmd_done_ie,Interrupt for the complete of command function enable." "0: Disable interrupt,1: Enable interrupt"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "res_done_ie,Interrupt for the complete of result data transfer enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 14.--19. 1. "Reserved_14,Reserved."
newline
bitfld.long 0x0 13. "comp_err_ie,Interrupt for the error of comparing CRC enable" "0: Disable interrupt,1: Enable interrupt"
newline
bitfld.long 0x0 12. "comp_done_ie,Interrupt for the complete of comparing CRC enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.word 0x0 1.--11. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "trans_done_ie,Interrupt for the complete of input data transfer enable." "0: Disable interrupt,1: Enable interrupt"
group.long 0xA80++0x3
line.long 0x0 "WCRC0_CRC0_ECMEN,WCRC[m]_CRC[m]_ECMEN is a register that sets enable for error notification to ECM module on operation related to CRC[m] module."
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved."
newline
bitfld.long 0x0 13. "comp_err_oe,Error notification for the error of comparing CRC enable" "0: Disable notification,1: Enable notification"
newline
hexmask.long.word 0x0 0.--12. 1. "Reserved_0,Reserved."
group.long 0xAA0++0x3
line.long 0x0 "WCRC0_CRC0_BUF_STS_RDEN,WCRC[m]_CRC[m]_BUF_STS_RDEN is a register that sets enable for the interrupt of operation related to CRC[m] module."
hexmask.long.word 0x0 16.--31. 1. "Code_value,Code value (Hsingle_quotationA5A5)"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "BUF_STS_RDEN,WCRC[m]_CRC[m]_BUF_STS enable." "0: Disable WCRC[m]_CRC[m]_BUF_STS,1: Enable WCRC[m]_CRC[m]_BUF_STS"
rgroup.long 0xAA4++0x3
line.long 0x0 "WCRC0_CRC0_BUF_STS,WCRC[m]_CRC[m]_BUF_STS is a register that sets enable for the interrupt of operation related to CRC[m] module."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved."
newline
bitfld.long 0x0 18. "res_comp_endflag,Comparing CRC result end flag." "0: Comparing CRC result is not end,1: Comparing CRC result is end"
newline
bitfld.long 0x0 17. "Reserved_17,Reserved." "0,1"
newline
bitfld.long 0x0 16. "Reserved_16,Reserved." "0,1"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "Reserved_12,Reserved." "0,1"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved." "0,1,2,3"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x0 8. "buf_empty,Buffer empty flag." "0: Buffer is not empty,1: Buffer is empty"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved." "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved."
group.long 0xC00++0x3
line.long 0x0 "WCRC0_KCRC0_EN,WCRC[m]_KCRC[m]_EN is a register that sets enable the data transfer to/from each port for KCRC[m] module in FIFO."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "out_en,Output data from Data port in FIFO enable" "0: Disable output from Data port,1: Enable output from Data port"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "res_en,Output result data from Result port in FIFO enable" "0: Disable output from Result port,1: Enable output from Result port"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "trans_en,Transferring data from Data port in FIFO to KCRC[m] enable" "0: Disable transferring data to KCRC[m],1: Enable transferring data to KCRC[m]"
newline
bitfld.long 0x0 0. "in_en,Input data to Data/Command/Expected data port in FIFO enable" "0: Disable input to Data/Command/Expected data port,1: Enable input to Data/Command/Expected data port"
group.long 0xC20++0x3
line.long 0x0 "WCRC0_KCRC0_STOP,WCRC[m]_KCRC[m]_STOP is a register that stop transfer to KCRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "stop,1: Stop data transfer." "?,1: Stop data transfer"
group.long 0xC30++0x3
line.long 0x0 "WCRC0_KCRC0_CMDEN,WCRC[m]_KCRC[m]_CMDEN is a register that sets enable command function for KCRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "cmd_en,Command function enable" "0: Disable command function,1: Enable command function"
group.long 0xC40++0x3
line.long 0x0 "WCRC0_KCRC0_COMP,WCRC[m]_KCRC[m]_COMP is a register that sets enable comparing CRC result from KCRC[m] module with expected data in FIFO."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved."
newline
bitfld.long 0x0 16.--17. "cmp_freq,Set the frequency of comparing." "0: ;Compare every 16Byte CRC generated,1: ;Compare every 32Byte CRC generated,?,?"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved."
newline
bitfld.long 0x0 1. "exp_reqsel,Select DMA Transfer request source for transferring expected data." "0: dmareq_wcrcm_kcrcn_in,1: dmareq_wcrcm_kcrcn_res"
newline
bitfld.long 0x0 0. "cmp_en,Comparing CRC result with expected data enable" "0: Disable comparing function,1: Enable comparing function"
group.long 0xC50++0x3
line.long 0x0 "WCRC0_KCRC0_COMP_RES,WCRC[m]_KCRC[m]_COMP_RES is a register that indicates the result of comparing CRC for KCRC[m] module."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved."
newline
hexmask.long.word 0x0 0.--15. 1. "cmp_res,The result of comparing CRC"
group.long 0xC70++0x3
line.long 0x0 "WCRC0_KCRC0_CONV,WCRC[m]_KCRC[m]_CONV is a register that sets CRC conversion size to once for KCRC[m] module."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x0 0.--20. 1. "conv,CRC conversion size specification"
group.long 0xC80++0x3
line.long 0x0 "WCRC0_KCRC0_WAIT,WCRC[m]_KCRC[m]_WAIT is a register that wait subsequent command for KCRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "wait,1: Wait subsequent command for 128 cycles @ S0D2_RTphi." "?,1: Wait subsequent command for 128 cycles @.."
group.long 0xD10++0x3
line.long 0x0 "WCRC0_KCRC0_INIT_CRC,WCRC[m]_KCRC[m]_INIT_CRC is a register that sets CRC code value to KCRC[m]COUT register at auto clear."
hexmask.long 0x0 0.--31. 1. "init_code,CRC code value to KCRC[m]DOUT register at auto clear."
group.long 0xE00++0x3
line.long 0x0 "WCRC0_KCRC0_STS,WCRC[m]_KCRC[m]_STS is a register that indicates the state of operation related to KCRC[m] module."
eventfld.long 0x0 31. "stop_done,Indicates the state of stop operation by WCRC[m]_KCRC[m]_STOP register." "0: Stop operation in progress or not done,1: Stop operation is done"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
eventfld.long 0x0 24. "cmd_done,Indicates the state of command function." "0: Accessing to register by command in progress or..,1: Accessing to register by command is done"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
eventfld.long 0x0 20. "res_done,Indicates the state of result data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
newline
hexmask.long.byte 0x0 14.--19. 1. "Reserved_14,Reserved."
newline
eventfld.long 0x0 13. "comp_err,Indicates the error of comparing CRC." "0: No comparing error or not comparing,1: Mismatch has occurred"
newline
eventfld.long 0x0 12. "comp_done,Indicates the state of comparing CRC." "0: Comparison in progress or not comparing,1: Comparing is done"
newline
hexmask.long.word 0x0 1.--11. 1. "Reserved_1,Reserved."
newline
eventfld.long 0x0 0. "trans_done,Indicates the state of input data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
group.long 0xE40++0x3
line.long 0x0 "WCRC0_KCRC0_INTEN,WCRC[m]_KCRC[m]_INTEN is a register that sets enable for the interrupt of operation related to KCRC[m] module."
bitfld.long 0x0 31. "stop_done_ie,Interrupt for the complete of stop operation by WCRC[m]_KCRC[m]_STOP register." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
bitfld.long 0x0 24. "cmd_done_ie,Interrupt for the complete of command function enable." "0: Disable interrupt,1: Enable interrupt"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "res_done_ie,Interrupt for the complete of result data transfer enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 14.--19. 1. "Reserved_14,Reserved."
newline
bitfld.long 0x0 13. "comp_err_ie,Interrupt for the error of comparing CRC enable" "0: Disable interrupt,1: Enable interrupt"
newline
bitfld.long 0x0 12. "comp_done_ie,Interrupt for the complete of comparing CRC enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.word 0x0 1.--11. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "trans_done_ie,Interrupt for the complete of input data transfer enable." "0: Disable interrupt,1: Enable interrupt"
group.long 0xE80++0x3
line.long 0x0 "WCRC0_KCRC0_ECMEN,WCRC[m]_KCRC[m]_ECMEN is a register that sets enable for error notification to ECM module on operation related to KCRC[m] module."
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved."
newline
bitfld.long 0x0 13. "comp_err_oe,Error notification for the error of comparing CRC enable" "0: Disable notification,1: Enable notification"
newline
hexmask.long.word 0x0 0.--12. 1. "Reserved_0,Reserved."
group.long 0xEA0++0x3
line.long 0x0 "WCRC0_KCRC0_BUF_STS_RDEN,WCRC[m]_KCRC[m]_BUF_STS_RDEN is a register that sets enable for the interrupt of operation related to KCRC[m] module."
hexmask.long.word 0x0 16.--31. 1. "Code_value,Code value (Hsingle_quotationA5A5)"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "BUF_STS_RDEN,WCRC[m]_KCRC[m]_BUF_STS enable." "0: Disable WCRC[m]_KCRC[m]_BUF_STS,1: Enable WCRC[m]_KCRC[m]_BUF_STS"
rgroup.long 0xEA4++0x3
line.long 0x0 "WCRC0_KCRC0_BUF_STS,WCRC[m]_KCRC[m]_BUF_STS is a register that sets enable for the interrupt of operation related to KCRC[m] module."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved."
newline
bitfld.long 0x0 18. "res_comp_endflag,Comparing CRC result end flag." "0: Comparing CRC result is not end,1: Comparing CRC result is end"
newline
bitfld.long 0x0 17. "Reserved_17,Reserved." "0,1"
newline
bitfld.long 0x0 16. "Reserved_16,Reserved." "0,1"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "Reserved_12,Reserved." "0,1"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved." "0,1,2,3"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x0 8. "buf_empty,Buffer empty flag." "0: Buffer is not empty,1: Buffer is empty"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved." "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved."
group.long 0xF00++0x3
line.long 0x0 "WCRC0_COMMON_STS,WCRC[m]_COMMON_STS is a register that indicates the state of operation related to WCRC[m] module."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved."
newline
eventfld.long 0x0 16. "edc_err,Indicates the error of EDC." "0: No EDC error,1: EDC error has occurred"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved."
group.long 0xF40++0x3
line.long 0x0 "WCRC0_COMMON_INTEN,WCRC[m]_COMMON_INTEN is a register that sets enable for the interrupt of operation related to WCRC[m] module."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved."
newline
bitfld.long 0x0 16. "edc_err_ie,Interrupt for the error of EDC enable" "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved."
group.long 0xF80++0x3
line.long 0x0 "WCRC0_COMMON_ECMEN,WCRC[m]_COMMON_ECMEN is a register that sets enable for error notification to ECM module on operation related to WCRC[m] module."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved."
newline
bitfld.long 0x0 16. "edc_err_oe,Error notification for EDC error enable" "0: Disable notification,1: Enable notification"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved."
group.long 0xFC0++0x3
line.long 0x0 "WCRC0_ERRINJ,WCRC[m]_ERRINJ is a register that sets enable error injection for bus data signal or EDC code signal."
hexmask.long.word 0x0 16.--31. 1. "code,Code value"
newline
hexmask.long.word 0x0 3.--15. 1. "Reserved_3,Reserved."
newline
bitfld.long 0x0 0.--2. "err_inj_2_0,Error injection enable" "0: Disables error for EDC code signal,1: Enables error for EDC code signal,?,?,?,?,?,?"
tree.end
tree "CRC_1"
base ad:0xE7090000
group.long 0x0++0x3
line.long 0x0 "WCRC1_CAIP2_EN,WCRC1_CAIP2_EN is a register that sets enable the data transfer to/from each port for AES-ACC_n interface in FIFO."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "out_en,Output data from Data port in FIFO enable" "0: Disable output from Data port,1: Enable output from Data port"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "res_en,Output result data from Result port in FIFO enable" "0: Disable output from Result port,1: Enable output from Result port"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "trans_en,Transferring data from Data port in FIFO to AES-ACC_n enable" "0: Disable transferring data to AES-ACC_n,1: Enable transferring data to AES-ACC_n"
newline
bitfld.long 0x0 0. "in_en,Input data to Data/Command port in FIFO enable" "0: Disable input to Data/Command port,1: Enable input to Data/Command port"
group.long 0x20++0x3
line.long 0x0 "WCRC1_CAIP2_STOP,WCRC1_CAIP2_STOP is a register that stop transfer to AES-ACC_n interface."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "stop,1: Stop data transfer." "?,1: Stop data transfer"
group.long 0x30++0x3
line.long 0x0 "WCRC1_CAIP2_CMDEN,WCRC1_CAIP2_CMDEN is a register that sets enable command function for AES-ACC_n module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "cmd_en,Command function enable" "0: Disable command function,1: Enable command function"
group.long 0x80++0x3
line.long 0x0 "WCRC1_CAIP2_WAIT,WCRC1_CAIP2_WAIT is a register that wait subsequent command for AES-ACC_n interface."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "wait,1: Wait subsequent command for 128 cycles @ S0D2_RTphi." "?,1: Wait subsequent command for 128 cycles @.."
group.long 0x200++0x3
line.long 0x0 "WCRC1_CAIP2_STS,WCRC1_CAIP2_STS is a register that indicates the state of operation related to AES-ACC_n module."
eventfld.long 0x0 31. "stop_done,Indicates the state of stop operation by WCRC1_CAIP2_STOP register." "0: Stop operation in progress or not done,1: Stop operation is done"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
eventfld.long 0x0 24. "cmd_done,Indicates the state of command function." "0: Accessing to register by command in progress or..,1: Accessing to register by command is done"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
eventfld.long 0x0 20. "res_done,Indicates the state of result data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
newline
hexmask.long.tbyte 0x0 1.--19. 1. "Reserved_1,Reserved."
newline
eventfld.long 0x0 0. "trans_done,Indicates the state of input data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
group.long 0x240++0x3
line.long 0x0 "WCRC1_CAIP2_INTEN,WCRC1_CAIP2_INTEN is a register that sets enable for the interrupt of operation related to AES-ACC_n module."
bitfld.long 0x0 31. "stop_done_ie,Interrupt for the complete of stop operation by WCRC1_CAIP2_STOP register." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
bitfld.long 0x0 24. "cmd_done_ie,Interrupt for the complete of command function enable." "0: Disable interrupt,1: Enable interrupt"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "res_done_ie,Interrupt for the complete of result data transfer enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.tbyte 0x0 1.--19. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "trans_done_ie,Interrupt for the complete of input data transfer enable." "0: Disable interrupt,1: Enable interrupt"
group.long 0x2A0++0x3
line.long 0x0 "WCRC1_CAIP2_BUF_STS_RDEN,WCRC1_CAIP2_BUF_STS_RDEN is a register that sets enable for the interrupt of operation related to AES-ACC_n module."
hexmask.long.word 0x0 16.--31. 1. "Code_value,Code value (Hsingle_quotationA5A5)"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "BUF_STS_RDEN,WCRC1_CAIP2_BUF_STS enable." "0: Disable WCRC1_CAIP2_BUF_STS,1: Enable WCRC1_CAIP2_BUF_STS"
rgroup.long 0x2A4++0x3
line.long 0x0 "WCRC1_CAIP2_BUF_STS,WCRC1_CAIP2_BUF_STS is a register that sets enable for the interrupt of operation related to AES-ACC_n module."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved."
newline
bitfld.long 0x0 17. "Reserved_17,Reserved." "0,1"
newline
bitfld.long 0x0 16. "Reserved_16,Reserved." "0,1"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "Reserved_12,Reserved." "0,1"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved." "0,1,2,3"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x0 8. "buf_empty,Buffer empty flag." "0: Buffer is not empty,1: Buffer is empty"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved." "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved."
group.long 0x400++0x3
line.long 0x0 "WCRC1_CAIP3_EN,WCRC1_CAIP3_EN is a register that sets enable the data transfer to/from each ports for AES-ACC_p interface in FIFO."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "out_en,Output data from Data port in FIFO enable" "0: Disable output from Data port,1: Enable output from Data port"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "res_en,Output result data from Result port in FIFO enable" "0: Disable output from Result port,1: Enable output from Result port"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "trans_en,Transferring data from Data port in FIFO to AES-ACC_p enable" "0: Disable transferring data to AES-ACC_p,1: Enable transferring data to AES-ACC_p"
newline
bitfld.long 0x0 0. "in_en,Input data to Data/Command port in FIFO enable" "0: Disable input to Data/Command port,1: Enable input to Data/Command port"
group.long 0x420++0x3
line.long 0x0 "WCRC1_CAIP3_STOP,WCRC1_CAIP3_STOP is a register that stop transfer to AES-ACC_p interface."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "stop,1: Stop data transfer." "?,1: Stop data transfer"
group.long 0x430++0x3
line.long 0x0 "WCRC1_CAIP3_CMDEN,WCRC1_CAIP3_CMDEN is a register that sets enable command function for AES-ACC_p module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "cmd_en,Command function enable" "0: Disable command function,1: Enable command function"
group.long 0x480++0x3
line.long 0x0 "WCRC1_CAIP3_WAIT,WCRC1_CAIP3_WAIT is a register that wait subsequent command for AES-ACC_p interface."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "wait,1: Wait subsequent command for 128 cycles @ S0D2_RTphi." "?,1: Wait subsequent command for 128 cycles @.."
group.long 0x600++0x3
line.long 0x0 "WCRC1_CAIP3_STS,WCRC1_CAIP3_STS is a register that indicates the state of operation related to AES-ACC_p module."
eventfld.long 0x0 31. "stop_done,Indicates the state of stop operation by WCRC1_CAIP3_STOP register." "0: Stop operation in progress or not done,1: Stop operation is done"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
eventfld.long 0x0 24. "cmd_done,Indicates the state of command function." "0: Accessing to register by command in progress or..,1: Accessing to register by command is done"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
eventfld.long 0x0 20. "res_done,Indicates the state of result data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
newline
hexmask.long.tbyte 0x0 1.--19. 1. "Reserved_1,Reserved."
newline
eventfld.long 0x0 0. "trans_done,Indicates the state of input data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
group.long 0x640++0x3
line.long 0x0 "WCRC1_CAIP3_INTEN,WCRC1_CAIP3_INTEN is a register that sets enable for the interrupt of operation related to AES-ACC_p module."
bitfld.long 0x0 31. "stop_done_ie,Interrupt for the complete of stop operation by WCRC1_CAIP3_STOP register." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
bitfld.long 0x0 24. "cmd_done_ie,Interrupt for the complete of command function enable." "0: Disable interrupt,1: Enable interrupt"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "res_done_ie,Interrupt for the complete of result data transfer enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.tbyte 0x0 1.--19. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "trans_done_ie,Interrupt for the complete of input data transfer enable." "0: Disable interrupt,1: Enable interrupt"
group.long 0x6A0++0x3
line.long 0x0 "WCRC1_CAIP3_BUF_STS_RDEN,WCRC1_CAIP3_BUF_STS_RDEN is a register that sets enable for the interrupt of operation related to AES-ACC_p module."
hexmask.long.word 0x0 16.--31. 1. "Code_value,Code value (Hsingle_quotationA5A5)"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "BUF_STS_RDEN,WCRC1_CAIP3_BUF_STS enable." "0: Disable WCRC1_CAIP3_BUF_STS,1: Enable WCRC1_CAIP3_BUF_STS"
rgroup.long 0x6A4++0x3
line.long 0x0 "WCRC1_CAIP3_BUF_STS,WCRC1_CAIP3_BUF_STS is a register that sets enable for the interrupt of operation related to AES-ACC_p module."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved."
newline
bitfld.long 0x0 17. "Reserved_17,Reserved." "0,1"
newline
bitfld.long 0x0 16. "Reserved_16,Reserved." "0,1"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "Reserved_12,Reserved." "0,1"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved." "0,1,2,3"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x0 8. "buf_empty,Buffer empty flag." "0: Buffer is not empty,1: Buffer is empty"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved." "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved."
group.long 0x800++0x3
line.long 0x0 "WCRC1_CRC1_EN,WCRC[m]_CRC[m]_EN is a register that sets enable the data transfer to/from each port for CRC[m] module in FIFO."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "out_en,Output data from Data port in FIFO enable" "0: Disable output from Data port,1: Enable output from Data port"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "res_en,Output result data from Result port in FIFO enable" "0: Disable output from Result port,1: Enable output from Result port"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "trans_en,Transferring data from Data port in FIFO to CRC[m] enable" "0: Disable transferring data to CRC[m],1: Enable transferring data to CRC[m]"
newline
bitfld.long 0x0 0. "in_en,Input data to Data/Command/Expected data port in FIFO enable" "0: Disable input to Data/Command/Expected data port,1: Enable input to Data/Command/Expected data port"
group.long 0x820++0x3
line.long 0x0 "WCRC1_CRC1_STOP,WCRC[m]_CRC[m]_STOP is a register that stop transfer to CRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "stop,1: Stop data transfer." "?,1: Stop data transfer"
group.long 0x830++0x3
line.long 0x0 "WCRC1_CRC1_CMDEN,WCRC[m]_CRC[m]_CMDEN is a register that sets enable command function for CRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "cmd_en,Command function enable" "0: Disable command function,1: Enable command function"
group.long 0x840++0x3
line.long 0x0 "WCRC1_CRC1_COMP,WCRC[m]_CRC[m]_COMP is a register that sets enable comparing CRC result from CRC[m] module with expected data in FIFO."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved."
newline
bitfld.long 0x0 16.--17. "cmp_freq,Set the frequency of comparing." "0: ;Compare every 16Byte CRC generated,1: ;Compare every 32Byte CRC generated,?,?"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved."
newline
bitfld.long 0x0 1. "exp_reqsel,Select DMA Transfer request source for transferring expected data." "0: dmareq_wcrcm_crcm_in,1: dmareq_wcrcm_crcm_res"
newline
bitfld.long 0x0 0. "cmp_en,Comparing CRC result with expected data enable" "0: Disable comparing function,1: Enable comparing function"
group.long 0x850++0x3
line.long 0x0 "WCRC1_CRC1_COMP_RES,WCRC[m]_CRC[m]_COMP_RES is a register that indicates the result of comparing CRC for CRC[m] module."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved."
newline
hexmask.long.word 0x0 0.--15. 1. "cmp_res,The result of comparing CRC"
group.long 0x870++0x3
line.long 0x0 "WCRC1_CRC1_CONV,WCRC[m]_CRC[m]_CONV is a register that sets CRC conversion size to once for CRC[m] module."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x0 0.--20. 1. "conv,CRC conversion size specification"
group.long 0x880++0x3
line.long 0x0 "WCRC1_CRC1_WAIT,WCRC[m]_CRC[m]_WAIT is a register that wait subsequent command for CRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "wait,1: Wait subsequent command for 128 cycles @ S0D2_RTphi." "?,1: Wait subsequent command for 128 cycles @.."
group.long 0x910++0x3
line.long 0x0 "WCRC1_CRC1_INIT_CRC,WCRC[m]_CRC[m]_INIT_CRC is a register that sets CRC code value to DCRAmCOUT register at auto clear."
hexmask.long 0x0 0.--31. 1. "init_code,CRC code value to DCRAmCOUT register at auto clear."
group.long 0xA00++0x3
line.long 0x0 "WCRC1_CRC1_STS,WCRC[m]_CRC[m]_STS is a register that indicates the state of operation related to CRC[m] module."
eventfld.long 0x0 31. "stop_done,Indicates the state of stop operation by WCRC[m]_CRC[m]_STOP register." "0: Stop operation in progress or not done,1: Stop operation is done"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
eventfld.long 0x0 24. "cmd_done,Indicates the state of command function." "0: Accessing to register by command in progress or..,1: Accessing to register by command is done"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
eventfld.long 0x0 20. "res_done,Indicates the state of result data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
newline
hexmask.long.byte 0x0 14.--19. 1. "Reserved_14,Reserved."
newline
eventfld.long 0x0 13. "comp_err,Indicates the error of comparing CRC." "0: No comparing error or not comparing,1: Mismatch has occurred"
newline
eventfld.long 0x0 12. "comp_done,Indicates the state of comparing CRC." "0: Comparison in progress or not comparing,1: Comparing is done"
newline
hexmask.long.word 0x0 1.--11. 1. "Reserved_1,Reserved."
newline
eventfld.long 0x0 0. "trans_done,Indicates the state of input data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
group.long 0xA40++0x3
line.long 0x0 "WCRC1_CRC1_INTEN,WCRC[m]_CRC[m]_INTEN is a register that sets enable for the interrupt of operation related to CRC[m] module."
bitfld.long 0x0 31. "stop_done_ie,Interrupt for the complete of stop operation by WCRC[m]_CRC[m]_STOP register." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
bitfld.long 0x0 24. "cmd_done_ie,Interrupt for the complete of command function enable." "0: Disable interrupt,1: Enable interrupt"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "res_done_ie,Interrupt for the complete of result data transfer enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 14.--19. 1. "Reserved_14,Reserved."
newline
bitfld.long 0x0 13. "comp_err_ie,Interrupt for the error of comparing CRC enable" "0: Disable interrupt,1: Enable interrupt"
newline
bitfld.long 0x0 12. "comp_done_ie,Interrupt for the complete of comparing CRC enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.word 0x0 1.--11. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "trans_done_ie,Interrupt for the complete of input data transfer enable." "0: Disable interrupt,1: Enable interrupt"
group.long 0xA80++0x3
line.long 0x0 "WCRC1_CRC1_ECMEN,WCRC[m]_CRC[m]_ECMEN is a register that sets enable for error notification to ECM module on operation related to CRC[m] module."
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved."
newline
bitfld.long 0x0 13. "comp_err_oe,Error notification for the error of comparing CRC enable" "0: Disable notification,1: Enable notification"
newline
hexmask.long.word 0x0 0.--12. 1. "Reserved_0,Reserved."
group.long 0xAA0++0x3
line.long 0x0 "WCRC1_CRC1_BUF_STS_RDEN,WCRC[m]_CRC[m]_BUF_STS_RDEN is a register that sets enable for the interrupt of operation related to CRC[m] module."
hexmask.long.word 0x0 16.--31. 1. "Code_value,Code value (Hsingle_quotationA5A5)"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "BUF_STS_RDEN,WCRC[m]_CRC[m]_BUF_STS enable." "0: Disable WCRC[m]_CRC[m]_BUF_STS,1: Enable WCRC[m]_CRC[m]_BUF_STS"
rgroup.long 0xAA4++0x3
line.long 0x0 "WCRC1_CRC1_BUF_STS,WCRC[m]_CRC[m]_BUF_STS is a register that sets enable for the interrupt of operation related to CRC[m] module."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved."
newline
bitfld.long 0x0 18. "res_comp_endflag,Comparing CRC result end flag." "0: Comparing CRC result is not end,1: Comparing CRC result is end"
newline
bitfld.long 0x0 17. "Reserved_17,Reserved." "0,1"
newline
bitfld.long 0x0 16. "Reserved_16,Reserved." "0,1"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "Reserved_12,Reserved." "0,1"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved." "0,1,2,3"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x0 8. "buf_empty,Buffer empty flag." "0: Buffer is not empty,1: Buffer is empty"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved." "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved."
group.long 0xC00++0x3
line.long 0x0 "WCRC1_KCRC1_EN,WCRC[m]_KCRC[m]_EN is a register that sets enable the data transfer to/from each port for KCRC[m] module in FIFO."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "out_en,Output data from Data port in FIFO enable" "0: Disable output from Data port,1: Enable output from Data port"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "res_en,Output result data from Result port in FIFO enable" "0: Disable output from Result port,1: Enable output from Result port"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "trans_en,Transferring data from Data port in FIFO to KCRC[m] enable" "0: Disable transferring data to KCRC[m],1: Enable transferring data to KCRC[m]"
newline
bitfld.long 0x0 0. "in_en,Input data to Data/Command/Expected data port in FIFO enable" "0: Disable input to Data/Command/Expected data port,1: Enable input to Data/Command/Expected data port"
group.long 0xC20++0x3
line.long 0x0 "WCRC1_KCRC1_STOP,WCRC[m]_KCRC[m]_STOP is a register that stop transfer to KCRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "stop,1: Stop data transfer." "?,1: Stop data transfer"
group.long 0xC30++0x3
line.long 0x0 "WCRC1_KCRC1_CMDEN,WCRC[m]_KCRC[m]_CMDEN is a register that sets enable command function for KCRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "cmd_en,Command function enable" "0: Disable command function,1: Enable command function"
group.long 0xC40++0x3
line.long 0x0 "WCRC1_KCRC1_COMP,WCRC[m]_KCRC[m]_COMP is a register that sets enable comparing CRC result from KCRC[m] module with expected data in FIFO."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved."
newline
bitfld.long 0x0 16.--17. "cmp_freq,Set the frequency of comparing." "0: ;Compare every 16Byte CRC generated,1: ;Compare every 32Byte CRC generated,?,?"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved."
newline
bitfld.long 0x0 1. "exp_reqsel,Select DMA Transfer request source for transferring expected data." "0: dmareq_wcrcm_kcrcn_in,1: dmareq_wcrcm_kcrcn_res"
newline
bitfld.long 0x0 0. "cmp_en,Comparing CRC result with expected data enable" "0: Disable comparing function,1: Enable comparing function"
group.long 0xC50++0x3
line.long 0x0 "WCRC1_KCRC1_COMP_RES,WCRC[m]_KCRC[m]_COMP_RES is a register that indicates the result of comparing CRC for KCRC[m] module."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved."
newline
hexmask.long.word 0x0 0.--15. 1. "cmp_res,The result of comparing CRC"
group.long 0xC70++0x3
line.long 0x0 "WCRC1_KCRC1_CONV,WCRC[m]_KCRC[m]_CONV is a register that sets CRC conversion size to once for KCRC[m] module."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x0 0.--20. 1. "conv,CRC conversion size specification"
group.long 0xC80++0x3
line.long 0x0 "WCRC1_KCRC1_WAIT,WCRC[m]_KCRC[m]_WAIT is a register that wait subsequent command for KCRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "wait,1: Wait subsequent command for 128 cycles @ S0D2_RTphi." "?,1: Wait subsequent command for 128 cycles @.."
group.long 0xD10++0x3
line.long 0x0 "WCRC1_KCRC1_INIT_CRC,WCRC[m]_KCRC[m]_INIT_CRC is a register that sets CRC code value to KCRC[m]COUT register at auto clear."
hexmask.long 0x0 0.--31. 1. "init_code,CRC code value to KCRC[m]DOUT register at auto clear."
group.long 0xE00++0x3
line.long 0x0 "WCRC1_KCRC1_STS,WCRC[m]_KCRC[m]_STS is a register that indicates the state of operation related to KCRC[m] module."
eventfld.long 0x0 31. "stop_done,Indicates the state of stop operation by WCRC[m]_KCRC[m]_STOP register." "0: Stop operation in progress or not done,1: Stop operation is done"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
eventfld.long 0x0 24. "cmd_done,Indicates the state of command function." "0: Accessing to register by command in progress or..,1: Accessing to register by command is done"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
eventfld.long 0x0 20. "res_done,Indicates the state of result data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
newline
hexmask.long.byte 0x0 14.--19. 1. "Reserved_14,Reserved."
newline
eventfld.long 0x0 13. "comp_err,Indicates the error of comparing CRC." "0: No comparing error or not comparing,1: Mismatch has occurred"
newline
eventfld.long 0x0 12. "comp_done,Indicates the state of comparing CRC." "0: Comparison in progress or not comparing,1: Comparing is done"
newline
hexmask.long.word 0x0 1.--11. 1. "Reserved_1,Reserved."
newline
eventfld.long 0x0 0. "trans_done,Indicates the state of input data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
group.long 0xE40++0x3
line.long 0x0 "WCRC1_KCRC1_INTEN,WCRC[m]_KCRC[m]_INTEN is a register that sets enable for the interrupt of operation related to KCRC[m] module."
bitfld.long 0x0 31. "stop_done_ie,Interrupt for the complete of stop operation by WCRC[m]_KCRC[m]_STOP register." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
bitfld.long 0x0 24. "cmd_done_ie,Interrupt for the complete of command function enable." "0: Disable interrupt,1: Enable interrupt"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "res_done_ie,Interrupt for the complete of result data transfer enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 14.--19. 1. "Reserved_14,Reserved."
newline
bitfld.long 0x0 13. "comp_err_ie,Interrupt for the error of comparing CRC enable" "0: Disable interrupt,1: Enable interrupt"
newline
bitfld.long 0x0 12. "comp_done_ie,Interrupt for the complete of comparing CRC enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.word 0x0 1.--11. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "trans_done_ie,Interrupt for the complete of input data transfer enable." "0: Disable interrupt,1: Enable interrupt"
group.long 0xE80++0x3
line.long 0x0 "WCRC1_KCRC1_ECMEN,WCRC[m]_KCRC[m]_ECMEN is a register that sets enable for error notification to ECM module on operation related to KCRC[m] module."
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved."
newline
bitfld.long 0x0 13. "comp_err_oe,Error notification for the error of comparing CRC enable" "0: Disable notification,1: Enable notification"
newline
hexmask.long.word 0x0 0.--12. 1. "Reserved_0,Reserved."
group.long 0xEA0++0x3
line.long 0x0 "WCRC1_KCRC1_BUF_STS_RDEN,WCRC[m]_KCRC[m]_BUF_STS_RDEN is a register that sets enable for the interrupt of operation related to KCRC[m] module."
hexmask.long.word 0x0 16.--31. 1. "Code_value,Code value (Hsingle_quotationA5A5)"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "BUF_STS_RDEN,WCRC[m]_KCRC[m]_BUF_STS enable." "0: Disable WCRC[m]_KCRC[m]_BUF_STS,1: Enable WCRC[m]_KCRC[m]_BUF_STS"
rgroup.long 0xEA4++0x3
line.long 0x0 "WCRC1_KCRC1_BUF_STS,WCRC[m]_KCRC[m]_BUF_STS is a register that sets enable for the interrupt of operation related to KCRC[m] module."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved."
newline
bitfld.long 0x0 18. "res_comp_endflag,Comparing CRC result end flag." "0: Comparing CRC result is not end,1: Comparing CRC result is end"
newline
bitfld.long 0x0 17. "Reserved_17,Reserved." "0,1"
newline
bitfld.long 0x0 16. "Reserved_16,Reserved." "0,1"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "Reserved_12,Reserved." "0,1"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved." "0,1,2,3"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x0 8. "buf_empty,Buffer empty flag." "0: Buffer is not empty,1: Buffer is empty"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved." "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved."
group.long 0xF00++0x3
line.long 0x0 "WCRC1_COMMON_STS,WCRC[m]_COMMON_STS is a register that indicates the state of operation related to WCRC[m] module."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved."
newline
eventfld.long 0x0 16. "edc_err,Indicates the error of EDC." "0: No EDC error,1: EDC error has occurred"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved."
group.long 0xF40++0x3
line.long 0x0 "WCRC1_COMMON_INTEN,WCRC[m]_COMMON_INTEN is a register that sets enable for the interrupt of operation related to WCRC[m] module."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved."
newline
bitfld.long 0x0 16. "edc_err_ie,Interrupt for the error of EDC enable" "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved."
group.long 0xF80++0x3
line.long 0x0 "WCRC1_COMMON_ECMEN,WCRC[m]_COMMON_ECMEN is a register that sets enable for error notification to ECM module on operation related to WCRC[m] module."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved."
newline
bitfld.long 0x0 16. "edc_err_oe,Error notification for EDC error enable" "0: Disable notification,1: Enable notification"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved."
group.long 0xFC0++0x3
line.long 0x0 "WCRC1_ERRINJ,WCRC[m]_ERRINJ is a register that sets enable error injection for bus data signal or EDC code signal."
hexmask.long.word 0x0 16.--31. 1. "code,Code value"
newline
hexmask.long.word 0x0 3.--15. 1. "Reserved_3,Reserved."
newline
bitfld.long 0x0 0.--2. "err_inj_2_0,Error injection enable" "0: Disables error for EDC code signal,1: Enables error for EDC code signal,?,?,?,?,?,?"
tree.end
tree "CRC_2"
base ad:0xE70A0000
group.long 0x0++0x3
line.long 0x0 "WCRC2_CAIP4_EN,WCRC2_CAIP4_EN is a register that sets enable the data transfer to/from each port for AES-ACC_n interface in FIFO."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "out_en,Output data from Data port in FIFO enable" "0: Disable output from Data port,1: Enable output from Data port"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "res_en,Output result data from Result port in FIFO enable" "0: Disable output from Result port,1: Enable output from Result port"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "trans_en,Transferring data from Data port in FIFO to AES-ACC_n enable" "0: Disable transferring data to AES-ACC_n,1: Enable transferring data to AES-ACC_n"
newline
bitfld.long 0x0 0. "in_en,Input data to Data/Command port in FIFO enable" "0: Disable input to Data/Command port,1: Enable input to Data/Command port"
group.long 0x20++0x3
line.long 0x0 "WCRC2_CAIP4_STOP,WCRC2_CAIP4_STOP is a register that stop transfer to AES-ACC_n interface."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "stop,1: Stop data transfer." "?,1: Stop data transfer"
group.long 0x30++0x3
line.long 0x0 "WCRC2_CAIP4_CMDEN,WCRC2_CAIP4_CMDEN is a register that sets enable command function for AES-ACC_n module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "cmd_en,Command function enable" "0: Disable command function,1: Enable command function"
group.long 0x80++0x3
line.long 0x0 "WCRC2_CAIP4_WAIT,WCRC2_CAIP4_WAIT is a register that wait subsequent command for AES-ACC_n interface."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "wait,1: Wait subsequent command for 128 cycles @ S0D2_RTphi." "?,1: Wait subsequent command for 128 cycles @.."
group.long 0x200++0x3
line.long 0x0 "WCRC2_CAIP4_STS,WCRC2_CAIP4_STS is a register that indicates the state of operation related to AES-ACC_n module."
eventfld.long 0x0 31. "stop_done,Indicates the state of stop operation by WCRC2_CAIP4_STOP register." "0: Stop operation in progress or not done,1: Stop operation is done"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
eventfld.long 0x0 24. "cmd_done,Indicates the state of command function." "0: Accessing to register by command in progress or..,1: Accessing to register by command is done"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
eventfld.long 0x0 20. "res_done,Indicates the state of result data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
newline
hexmask.long.tbyte 0x0 1.--19. 1. "Reserved_1,Reserved."
newline
eventfld.long 0x0 0. "trans_done,Indicates the state of input data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
group.long 0x240++0x3
line.long 0x0 "WCRC2_CAIP4_INTEN,WCRC2_CAIP4_INTEN is a register that sets enable for the interrupt of operation related to AES-ACC_n module."
bitfld.long 0x0 31. "stop_done_ie,Interrupt for the complete of stop operation by WCRC2_CAIP4_STOP register." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
bitfld.long 0x0 24. "cmd_done_ie,Interrupt for the complete of command function enable." "0: Disable interrupt,1: Enable interrupt"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "res_done_ie,Interrupt for the complete of result data transfer enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.tbyte 0x0 1.--19. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "trans_done_ie,Interrupt for the complete of input data transfer enable." "0: Disable interrupt,1: Enable interrupt"
group.long 0x2A0++0x3
line.long 0x0 "WCRC2_CAIP4_BUF_STS_RDEN,WCRC2_CAIP4_BUF_STS_RDEN is a register that sets enable for the interrupt of operation related to AES-ACC_n module."
hexmask.long.word 0x0 16.--31. 1. "Code_value,Code value (Hsingle_quotationA5A5)"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "BUF_STS_RDEN,WCRC2_CAIP4_BUF_STS enable." "0: Disable WCRC2_CAIP4_BUF_STS,1: Enable WCRC2_CAIP4_BUF_STS"
rgroup.long 0x2A4++0x3
line.long 0x0 "WCRC2_CAIP4_BUF_STS,WCRC2_CAIP4_BUF_STS is a register that sets enable for the interrupt of operation related to AES-ACC_n module."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved."
newline
bitfld.long 0x0 17. "Reserved_17,Reserved." "0,1"
newline
bitfld.long 0x0 16. "Reserved_16,Reserved." "0,1"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "Reserved_12,Reserved." "0,1"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved." "0,1,2,3"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x0 8. "buf_empty,Buffer empty flag." "0: Buffer is not empty,1: Buffer is empty"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved." "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved."
group.long 0x400++0x3
line.long 0x0 "WCRC2_CAIP5_EN,WCRC2_CAIP5_EN is a register that sets enable the data transfer to/from each ports for AES-ACC_p interface in FIFO."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "out_en,Output data from Data port in FIFO enable" "0: Disable output from Data port,1: Enable output from Data port"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "res_en,Output result data from Result port in FIFO enable" "0: Disable output from Result port,1: Enable output from Result port"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "trans_en,Transferring data from Data port in FIFO to AES-ACC_p enable" "0: Disable transferring data to AES-ACC_p,1: Enable transferring data to AES-ACC_p"
newline
bitfld.long 0x0 0. "in_en,Input data to Data/Command port in FIFO enable" "0: Disable input to Data/Command port,1: Enable input to Data/Command port"
group.long 0x420++0x3
line.long 0x0 "WCRC2_CAIP5_STOP,WCRC2_CAIP5_STOP is a register that stop transfer to AES-ACC_p interface."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "stop,1: Stop data transfer." "?,1: Stop data transfer"
group.long 0x430++0x3
line.long 0x0 "WCRC2_CAIP5_CMDEN,WCRC2_CAIP5_CMDEN is a register that sets enable command function for AES-ACC_p module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "cmd_en,Command function enable" "0: Disable command function,1: Enable command function"
group.long 0x480++0x3
line.long 0x0 "WCRC2_CAIP5_WAIT,WCRC2_CAIP5_WAIT is a register that wait subsequent command for AES-ACC_p interface."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "wait,1: Wait subsequent command for 128 cycles @ S0D2_RTphi." "?,1: Wait subsequent command for 128 cycles @.."
group.long 0x600++0x3
line.long 0x0 "WCRC2_CAIP5_STS,WCRC2_CAIP5_STS is a register that indicates the state of operation related to AES-ACC_p module."
eventfld.long 0x0 31. "stop_done,Indicates the state of stop operation by WCRC2_CAIP5_STOP register." "0: Stop operation in progress or not done,1: Stop operation is done"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
eventfld.long 0x0 24. "cmd_done,Indicates the state of command function." "0: Accessing to register by command in progress or..,1: Accessing to register by command is done"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
eventfld.long 0x0 20. "res_done,Indicates the state of result data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
newline
hexmask.long.tbyte 0x0 1.--19. 1. "Reserved_1,Reserved."
newline
eventfld.long 0x0 0. "trans_done,Indicates the state of input data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
group.long 0x640++0x3
line.long 0x0 "WCRC2_CAIP5_INTEN,WCRC2_CAIP5_INTEN is a register that sets enable for the interrupt of operation related to AES-ACC_p module."
bitfld.long 0x0 31. "stop_done_ie,Interrupt for the complete of stop operation by WCRC2_CAIP5_STOP register." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
bitfld.long 0x0 24. "cmd_done_ie,Interrupt for the complete of command function enable." "0: Disable interrupt,1: Enable interrupt"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "res_done_ie,Interrupt for the complete of result data transfer enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.tbyte 0x0 1.--19. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "trans_done_ie,Interrupt for the complete of input data transfer enable." "0: Disable interrupt,1: Enable interrupt"
group.long 0x6A0++0x3
line.long 0x0 "WCRC2_CAIP5_BUF_STS_RDEN,WCRC2_CAIP5_BUF_STS_RDEN is a register that sets enable for the interrupt of operation related to AES-ACC_p module."
hexmask.long.word 0x0 16.--31. 1. "Code_value,Code value (Hsingle_quotationA5A5)"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "BUF_STS_RDEN,WCRC2_CAIP5_BUF_STS enable." "0: Disable WCRC2_CAIP5_BUF_STS,1: Enable WCRC2_CAIP5_BUF_STS"
rgroup.long 0x6A4++0x3
line.long 0x0 "WCRC2_CAIP5_BUF_STS,WCRC2_CAIP5_BUF_STS is a register that sets enable for the interrupt of operation related to AES-ACC_p module."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved."
newline
bitfld.long 0x0 17. "Reserved_17,Reserved." "0,1"
newline
bitfld.long 0x0 16. "Reserved_16,Reserved." "0,1"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "Reserved_12,Reserved." "0,1"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved." "0,1,2,3"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x0 8. "buf_empty,Buffer empty flag." "0: Buffer is not empty,1: Buffer is empty"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved." "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved."
group.long 0x800++0x3
line.long 0x0 "WCRC2_CRC2_EN,WCRC[m]_CRC[m]_EN is a register that sets enable the data transfer to/from each port for CRC[m] module in FIFO."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "out_en,Output data from Data port in FIFO enable" "0: Disable output from Data port,1: Enable output from Data port"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "res_en,Output result data from Result port in FIFO enable" "0: Disable output from Result port,1: Enable output from Result port"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "trans_en,Transferring data from Data port in FIFO to CRC[m] enable" "0: Disable transferring data to CRC[m],1: Enable transferring data to CRC[m]"
newline
bitfld.long 0x0 0. "in_en,Input data to Data/Command/Expected data port in FIFO enable" "0: Disable input to Data/Command/Expected data port,1: Enable input to Data/Command/Expected data port"
group.long 0x820++0x3
line.long 0x0 "WCRC2_CRC2_STOP,WCRC[m]_CRC[m]_STOP is a register that stop transfer to CRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "stop,1: Stop data transfer." "?,1: Stop data transfer"
group.long 0x830++0x3
line.long 0x0 "WCRC2_CRC2_CMDEN,WCRC[m]_CRC[m]_CMDEN is a register that sets enable command function for CRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "cmd_en,Command function enable" "0: Disable command function,1: Enable command function"
group.long 0x840++0x3
line.long 0x0 "WCRC2_CRC2_COMP,WCRC[m]_CRC[m]_COMP is a register that sets enable comparing CRC result from CRC[m] module with expected data in FIFO."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved."
newline
bitfld.long 0x0 16.--17. "cmp_freq,Set the frequency of comparing." "0: ;Compare every 16Byte CRC generated,1: ;Compare every 32Byte CRC generated,?,?"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved."
newline
bitfld.long 0x0 1. "exp_reqsel,Select DMA Transfer request source for transferring expected data." "0: dmareq_wcrcm_crcm_in,1: dmareq_wcrcm_crcm_res"
newline
bitfld.long 0x0 0. "cmp_en,Comparing CRC result with expected data enable" "0: Disable comparing function,1: Enable comparing function"
group.long 0x850++0x3
line.long 0x0 "WCRC2_CRC2_COMP_RES,WCRC[m]_CRC[m]_COMP_RES is a register that indicates the result of comparing CRC for CRC[m] module."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved."
newline
hexmask.long.word 0x0 0.--15. 1. "cmp_res,The result of comparing CRC"
group.long 0x870++0x3
line.long 0x0 "WCRC2_CRC2_CONV,WCRC[m]_CRC[m]_CONV is a register that sets CRC conversion size to once for CRC[m] module."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x0 0.--20. 1. "conv,CRC conversion size specification"
group.long 0x880++0x3
line.long 0x0 "WCRC2_CRC2_WAIT,WCRC[m]_CRC[m]_WAIT is a register that wait subsequent command for CRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "wait,1: Wait subsequent command for 128 cycles @ S0D2_RTphi." "?,1: Wait subsequent command for 128 cycles @.."
group.long 0x910++0x3
line.long 0x0 "WCRC2_CRC2_INIT_CRC,WCRC[m]_CRC[m]_INIT_CRC is a register that sets CRC code value to DCRAmCOUT register at auto clear."
hexmask.long 0x0 0.--31. 1. "init_code,CRC code value to DCRAmCOUT register at auto clear."
group.long 0xA00++0x3
line.long 0x0 "WCRC2_CRC2_STS,WCRC[m]_CRC[m]_STS is a register that indicates the state of operation related to CRC[m] module."
eventfld.long 0x0 31. "stop_done,Indicates the state of stop operation by WCRC[m]_CRC[m]_STOP register." "0: Stop operation in progress or not done,1: Stop operation is done"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
eventfld.long 0x0 24. "cmd_done,Indicates the state of command function." "0: Accessing to register by command in progress or..,1: Accessing to register by command is done"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
eventfld.long 0x0 20. "res_done,Indicates the state of result data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
newline
hexmask.long.byte 0x0 14.--19. 1. "Reserved_14,Reserved."
newline
eventfld.long 0x0 13. "comp_err,Indicates the error of comparing CRC." "0: No comparing error or not comparing,1: Mismatch has occurred"
newline
eventfld.long 0x0 12. "comp_done,Indicates the state of comparing CRC." "0: Comparison in progress or not comparing,1: Comparing is done"
newline
hexmask.long.word 0x0 1.--11. 1. "Reserved_1,Reserved."
newline
eventfld.long 0x0 0. "trans_done,Indicates the state of input data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
group.long 0xA40++0x3
line.long 0x0 "WCRC2_CRC2_INTEN,WCRC[m]_CRC[m]_INTEN is a register that sets enable for the interrupt of operation related to CRC[m] module."
bitfld.long 0x0 31. "stop_done_ie,Interrupt for the complete of stop operation by WCRC[m]_CRC[m]_STOP register." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
bitfld.long 0x0 24. "cmd_done_ie,Interrupt for the complete of command function enable." "0: Disable interrupt,1: Enable interrupt"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "res_done_ie,Interrupt for the complete of result data transfer enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 14.--19. 1. "Reserved_14,Reserved."
newline
bitfld.long 0x0 13. "comp_err_ie,Interrupt for the error of comparing CRC enable" "0: Disable interrupt,1: Enable interrupt"
newline
bitfld.long 0x0 12. "comp_done_ie,Interrupt for the complete of comparing CRC enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.word 0x0 1.--11. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "trans_done_ie,Interrupt for the complete of input data transfer enable." "0: Disable interrupt,1: Enable interrupt"
group.long 0xA80++0x3
line.long 0x0 "WCRC2_CRC2_ECMEN,WCRC[m]_CRC[m]_ECMEN is a register that sets enable for error notification to ECM module on operation related to CRC[m] module."
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved."
newline
bitfld.long 0x0 13. "comp_err_oe,Error notification for the error of comparing CRC enable" "0: Disable notification,1: Enable notification"
newline
hexmask.long.word 0x0 0.--12. 1. "Reserved_0,Reserved."
group.long 0xAA0++0x3
line.long 0x0 "WCRC2_CRC2_BUF_STS_RDEN,WCRC[m]_CRC[m]_BUF_STS_RDEN is a register that sets enable for the interrupt of operation related to CRC[m] module."
hexmask.long.word 0x0 16.--31. 1. "Code_value,Code value (Hsingle_quotationA5A5)"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "BUF_STS_RDEN,WCRC[m]_CRC[m]_BUF_STS enable." "0: Disable WCRC[m]_CRC[m]_BUF_STS,1: Enable WCRC[m]_CRC[m]_BUF_STS"
rgroup.long 0xAA4++0x3
line.long 0x0 "WCRC2_CRC2_BUF_STS,WCRC[m]_CRC[m]_BUF_STS is a register that sets enable for the interrupt of operation related to CRC[m] module."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved."
newline
bitfld.long 0x0 18. "res_comp_endflag,Comparing CRC result end flag." "0: Comparing CRC result is not end,1: Comparing CRC result is end"
newline
bitfld.long 0x0 17. "Reserved_17,Reserved." "0,1"
newline
bitfld.long 0x0 16. "Reserved_16,Reserved." "0,1"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "Reserved_12,Reserved." "0,1"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved." "0,1,2,3"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x0 8. "buf_empty,Buffer empty flag." "0: Buffer is not empty,1: Buffer is empty"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved." "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved."
group.long 0xC00++0x3
line.long 0x0 "WCRC2_KCRC2_EN,WCRC[m]_KCRC[m]_EN is a register that sets enable the data transfer to/from each port for KCRC[m] module in FIFO."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "out_en,Output data from Data port in FIFO enable" "0: Disable output from Data port,1: Enable output from Data port"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "res_en,Output result data from Result port in FIFO enable" "0: Disable output from Result port,1: Enable output from Result port"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "trans_en,Transferring data from Data port in FIFO to KCRC[m] enable" "0: Disable transferring data to KCRC[m],1: Enable transferring data to KCRC[m]"
newline
bitfld.long 0x0 0. "in_en,Input data to Data/Command/Expected data port in FIFO enable" "0: Disable input to Data/Command/Expected data port,1: Enable input to Data/Command/Expected data port"
group.long 0xC20++0x3
line.long 0x0 "WCRC2_KCRC2_STOP,WCRC[m]_KCRC[m]_STOP is a register that stop transfer to KCRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "stop,1: Stop data transfer." "?,1: Stop data transfer"
group.long 0xC30++0x3
line.long 0x0 "WCRC2_KCRC2_CMDEN,WCRC[m]_KCRC[m]_CMDEN is a register that sets enable command function for KCRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "cmd_en,Command function enable" "0: Disable command function,1: Enable command function"
group.long 0xC40++0x3
line.long 0x0 "WCRC2_KCRC2_COMP,WCRC[m]_KCRC[m]_COMP is a register that sets enable comparing CRC result from KCRC[m] module with expected data in FIFO."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved."
newline
bitfld.long 0x0 16.--17. "cmp_freq,Set the frequency of comparing." "0: ;Compare every 16Byte CRC generated,1: ;Compare every 32Byte CRC generated,?,?"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved."
newline
bitfld.long 0x0 1. "exp_reqsel,Select DMA Transfer request source for transferring expected data." "0: dmareq_wcrcm_kcrcn_in,1: dmareq_wcrcm_kcrcn_res"
newline
bitfld.long 0x0 0. "cmp_en,Comparing CRC result with expected data enable" "0: Disable comparing function,1: Enable comparing function"
group.long 0xC50++0x3
line.long 0x0 "WCRC2_KCRC2_COMP_RES,WCRC[m]_KCRC[m]_COMP_RES is a register that indicates the result of comparing CRC for KCRC[m] module."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved."
newline
hexmask.long.word 0x0 0.--15. 1. "cmp_res,The result of comparing CRC"
group.long 0xC70++0x3
line.long 0x0 "WCRC2_KCRC2_CONV,WCRC[m]_KCRC[m]_CONV is a register that sets CRC conversion size to once for KCRC[m] module."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x0 0.--20. 1. "conv,CRC conversion size specification"
group.long 0xC80++0x3
line.long 0x0 "WCRC2_KCRC2_WAIT,WCRC[m]_KCRC[m]_WAIT is a register that wait subsequent command for KCRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "wait,1: Wait subsequent command for 128 cycles @ S0D2_RTphi." "?,1: Wait subsequent command for 128 cycles @.."
group.long 0xD10++0x3
line.long 0x0 "WCRC2_KCRC2_INIT_CRC,WCRC[m]_KCRC[m]_INIT_CRC is a register that sets CRC code value to KCRC[m]COUT register at auto clear."
hexmask.long 0x0 0.--31. 1. "init_code,CRC code value to KCRC[m]DOUT register at auto clear."
group.long 0xE00++0x3
line.long 0x0 "WCRC2_KCRC2_STS,WCRC[m]_KCRC[m]_STS is a register that indicates the state of operation related to KCRC[m] module."
eventfld.long 0x0 31. "stop_done,Indicates the state of stop operation by WCRC[m]_KCRC[m]_STOP register." "0: Stop operation in progress or not done,1: Stop operation is done"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
eventfld.long 0x0 24. "cmd_done,Indicates the state of command function." "0: Accessing to register by command in progress or..,1: Accessing to register by command is done"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
eventfld.long 0x0 20. "res_done,Indicates the state of result data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
newline
hexmask.long.byte 0x0 14.--19. 1. "Reserved_14,Reserved."
newline
eventfld.long 0x0 13. "comp_err,Indicates the error of comparing CRC." "0: No comparing error or not comparing,1: Mismatch has occurred"
newline
eventfld.long 0x0 12. "comp_done,Indicates the state of comparing CRC." "0: Comparison in progress or not comparing,1: Comparing is done"
newline
hexmask.long.word 0x0 1.--11. 1. "Reserved_1,Reserved."
newline
eventfld.long 0x0 0. "trans_done,Indicates the state of input data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
group.long 0xE40++0x3
line.long 0x0 "WCRC2_KCRC2_INTEN,WCRC[m]_KCRC[m]_INTEN is a register that sets enable for the interrupt of operation related to KCRC[m] module."
bitfld.long 0x0 31. "stop_done_ie,Interrupt for the complete of stop operation by WCRC[m]_KCRC[m]_STOP register." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
bitfld.long 0x0 24. "cmd_done_ie,Interrupt for the complete of command function enable." "0: Disable interrupt,1: Enable interrupt"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "res_done_ie,Interrupt for the complete of result data transfer enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 14.--19. 1. "Reserved_14,Reserved."
newline
bitfld.long 0x0 13. "comp_err_ie,Interrupt for the error of comparing CRC enable" "0: Disable interrupt,1: Enable interrupt"
newline
bitfld.long 0x0 12. "comp_done_ie,Interrupt for the complete of comparing CRC enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.word 0x0 1.--11. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "trans_done_ie,Interrupt for the complete of input data transfer enable." "0: Disable interrupt,1: Enable interrupt"
group.long 0xE80++0x3
line.long 0x0 "WCRC2_KCRC2_ECMEN,WCRC[m]_KCRC[m]_ECMEN is a register that sets enable for error notification to ECM module on operation related to KCRC[m] module."
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved."
newline
bitfld.long 0x0 13. "comp_err_oe,Error notification for the error of comparing CRC enable" "0: Disable notification,1: Enable notification"
newline
hexmask.long.word 0x0 0.--12. 1. "Reserved_0,Reserved."
group.long 0xEA0++0x3
line.long 0x0 "WCRC2_KCRC2_BUF_STS_RDEN,WCRC[m]_KCRC[m]_BUF_STS_RDEN is a register that sets enable for the interrupt of operation related to KCRC[m] module."
hexmask.long.word 0x0 16.--31. 1. "Code_value,Code value (Hsingle_quotationA5A5)"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "BUF_STS_RDEN,WCRC[m]_KCRC[m]_BUF_STS enable." "0: Disable WCRC[m]_KCRC[m]_BUF_STS,1: Enable WCRC[m]_KCRC[m]_BUF_STS"
rgroup.long 0xEA4++0x3
line.long 0x0 "WCRC2_KCRC2_BUF_STS,WCRC[m]_KCRC[m]_BUF_STS is a register that sets enable for the interrupt of operation related to KCRC[m] module."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved."
newline
bitfld.long 0x0 18. "res_comp_endflag,Comparing CRC result end flag." "0: Comparing CRC result is not end,1: Comparing CRC result is end"
newline
bitfld.long 0x0 17. "Reserved_17,Reserved." "0,1"
newline
bitfld.long 0x0 16. "Reserved_16,Reserved." "0,1"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "Reserved_12,Reserved." "0,1"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved." "0,1,2,3"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x0 8. "buf_empty,Buffer empty flag." "0: Buffer is not empty,1: Buffer is empty"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved." "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved."
group.long 0xF00++0x3
line.long 0x0 "WCRC2_COMMON_STS,WCRC[m]_COMMON_STS is a register that indicates the state of operation related to WCRC[m] module."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved."
newline
eventfld.long 0x0 16. "edc_err,Indicates the error of EDC." "0: No EDC error,1: EDC error has occurred"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved."
group.long 0xF40++0x3
line.long 0x0 "WCRC2_COMMON_INTEN,WCRC[m]_COMMON_INTEN is a register that sets enable for the interrupt of operation related to WCRC[m] module."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved."
newline
bitfld.long 0x0 16. "edc_err_ie,Interrupt for the error of EDC enable" "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved."
group.long 0xF80++0x3
line.long 0x0 "WCRC2_COMMON_ECMEN,WCRC[m]_COMMON_ECMEN is a register that sets enable for error notification to ECM module on operation related to WCRC[m] module."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved."
newline
bitfld.long 0x0 16. "edc_err_oe,Error notification for EDC error enable" "0: Disable notification,1: Enable notification"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved."
group.long 0xFC0++0x3
line.long 0x0 "WCRC2_ERRINJ,WCRC[m]_ERRINJ is a register that sets enable error injection for bus data signal or EDC code signal."
hexmask.long.word 0x0 16.--31. 1. "code,Code value"
newline
hexmask.long.word 0x0 3.--15. 1. "Reserved_3,Reserved."
newline
bitfld.long 0x0 0.--2. "err_inj_2_0,Error injection enable" "0: Disables error for EDC code signal,1: Enables error for EDC code signal,?,?,?,?,?,?"
tree.end
tree "CRC_3"
base ad:0xE70B0000
group.long 0x0++0x3
line.long 0x0 "WCRC3_CAIP6_EN,WCRC3_CAIP6_EN is a register that sets enable the data transfer to/from each port for AES-ACC_n interface in FIFO."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "out_en,Output data from Data port in FIFO enable" "0: Disable output from Data port,1: Enable output from Data port"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "res_en,Output result data from Result port in FIFO enable" "0: Disable output from Result port,1: Enable output from Result port"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "trans_en,Transferring data from Data port in FIFO to AES-ACC_n enable" "0: Disable transferring data to AES-ACC_n,1: Enable transferring data to AES-ACC_n"
newline
bitfld.long 0x0 0. "in_en,Input data to Data/Command port in FIFO enable" "0: Disable input to Data/Command port,1: Enable input to Data/Command port"
group.long 0x20++0x3
line.long 0x0 "WCRC3_CAIP6_STOP,WCRC3_CAIP6_STOP is a register that stop transfer to AES-ACC_n interface."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "stop,1: Stop data transfer." "?,1: Stop data transfer"
group.long 0x30++0x3
line.long 0x0 "WCRC3_CAIP6_CMDEN,WCRC3_CAIP6_CMDEN is a register that sets enable command function for AES-ACC_n module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "cmd_en,Command function enable" "0: Disable command function,1: Enable command function"
group.long 0x80++0x3
line.long 0x0 "WCRC3_CAIP6_WAIT,WCRC3_CAIP6_WAIT is a register that wait subsequent command for AES-ACC_n interface."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "wait,1: Wait subsequent command for 128 cycles @ S0D2_RTphi." "?,1: Wait subsequent command for 128 cycles @.."
group.long 0x200++0x3
line.long 0x0 "WCRC3_CAIP6_STS,WCRC3_CAIP6_STS is a register that indicates the state of operation related to AES-ACC_n module."
eventfld.long 0x0 31. "stop_done,Indicates the state of stop operation by WCRC3_CAIP6_STOP register." "0: Stop operation in progress or not done,1: Stop operation is done"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
eventfld.long 0x0 24. "cmd_done,Indicates the state of command function." "0: Accessing to register by command in progress or..,1: Accessing to register by command is done"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
eventfld.long 0x0 20. "res_done,Indicates the state of result data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
newline
hexmask.long.tbyte 0x0 1.--19. 1. "Reserved_1,Reserved."
newline
eventfld.long 0x0 0. "trans_done,Indicates the state of input data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
group.long 0x240++0x3
line.long 0x0 "WCRC3_CAIP6_INTEN,WCRC3_CAIP6_INTEN is a register that sets enable for the interrupt of operation related to AES-ACC_n module."
bitfld.long 0x0 31. "stop_done_ie,Interrupt for the complete of stop operation by WCRC3_CAIP6_STOP register." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
bitfld.long 0x0 24. "cmd_done_ie,Interrupt for the complete of command function enable." "0: Disable interrupt,1: Enable interrupt"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "res_done_ie,Interrupt for the complete of result data transfer enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.tbyte 0x0 1.--19. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "trans_done_ie,Interrupt for the complete of input data transfer enable." "0: Disable interrupt,1: Enable interrupt"
group.long 0x2A0++0x3
line.long 0x0 "WCRC3_CAIP6_BUF_STS_RDEN,WCRC3_CAIP6_BUF_STS_RDEN is a register that sets enable for the interrupt of operation related to AES-ACC_n module."
hexmask.long.word 0x0 16.--31. 1. "Code_value,Code value (Hsingle_quotationA5A5)"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "BUF_STS_RDEN,WCRC3_CAIP6_BUF_STS enable." "0: Disable WCRC3_CAIP6_BUF_STS,1: Enable WCRC3_CAIP6_BUF_STS"
rgroup.long 0x2A4++0x3
line.long 0x0 "WCRC3_CAIP6_BUF_STS,WCRC3_CAIP6_BUF_STS is a register that sets enable for the interrupt of operation related to AES-ACC_n module."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved."
newline
bitfld.long 0x0 17. "Reserved_17,Reserved." "0,1"
newline
bitfld.long 0x0 16. "Reserved_16,Reserved." "0,1"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "Reserved_12,Reserved." "0,1"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved." "0,1,2,3"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x0 8. "buf_empty,Buffer empty flag." "0: Buffer is not empty,1: Buffer is empty"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved." "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved."
group.long 0x400++0x3
line.long 0x0 "WCRC3_CAIP7_EN,WCRC3_CAIP7_EN is a register that sets enable the data transfer to/from each ports for AES-ACC_p interface in FIFO."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "out_en,Output data from Data port in FIFO enable" "0: Disable output from Data port,1: Enable output from Data port"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "res_en,Output result data from Result port in FIFO enable" "0: Disable output from Result port,1: Enable output from Result port"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "trans_en,Transferring data from Data port in FIFO to AES-ACC_p enable" "0: Disable transferring data to AES-ACC_p,1: Enable transferring data to AES-ACC_p"
newline
bitfld.long 0x0 0. "in_en,Input data to Data/Command port in FIFO enable" "0: Disable input to Data/Command port,1: Enable input to Data/Command port"
group.long 0x420++0x3
line.long 0x0 "WCRC3_CAIP7_STOP,WCRC3_CAIP7_STOP is a register that stop transfer to AES-ACC_p interface."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "stop,1: Stop data transfer." "?,1: Stop data transfer"
group.long 0x430++0x3
line.long 0x0 "WCRC3_CAIP7_CMDEN,WCRC3_CAIP7_CMDEN is a register that sets enable command function for AES-ACC_p module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "cmd_en,Command function enable" "0: Disable command function,1: Enable command function"
group.long 0x480++0x3
line.long 0x0 "WCRC3_CAIP7_WAIT,WCRC3_CAIP7_WAIT is a register that wait subsequent command for AES-ACC_p interface."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "wait,1: Wait subsequent command for 128 cycles @ S0D2_RTphi." "?,1: Wait subsequent command for 128 cycles @.."
group.long 0x600++0x3
line.long 0x0 "WCRC3_CAIP7_STS,WCRC3_CAIP7_STS is a register that indicates the state of operation related to AES-ACC_p module."
eventfld.long 0x0 31. "stop_done,Indicates the state of stop operation by WCRC3_CAIP7_STOP register." "0: Stop operation in progress or not done,1: Stop operation is done"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
eventfld.long 0x0 24. "cmd_done,Indicates the state of command function." "0: Accessing to register by command in progress or..,1: Accessing to register by command is done"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
eventfld.long 0x0 20. "res_done,Indicates the state of result data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
newline
hexmask.long.tbyte 0x0 1.--19. 1. "Reserved_1,Reserved."
newline
eventfld.long 0x0 0. "trans_done,Indicates the state of input data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
group.long 0x640++0x3
line.long 0x0 "WCRC3_CAIP7_INTEN,WCRC3_CAIP7_INTEN is a register that sets enable for the interrupt of operation related to AES-ACC_p module."
bitfld.long 0x0 31. "stop_done_ie,Interrupt for the complete of stop operation by WCRC3_CAIP7_STOP register." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
bitfld.long 0x0 24. "cmd_done_ie,Interrupt for the complete of command function enable." "0: Disable interrupt,1: Enable interrupt"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "res_done_ie,Interrupt for the complete of result data transfer enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.tbyte 0x0 1.--19. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "trans_done_ie,Interrupt for the complete of input data transfer enable." "0: Disable interrupt,1: Enable interrupt"
group.long 0x6A0++0x3
line.long 0x0 "WCRC3_CAIP7_BUF_STS_RDEN,WCRC3_CAIP7_BUF_STS_RDEN is a register that sets enable for the interrupt of operation related to AES-ACC_p module."
hexmask.long.word 0x0 16.--31. 1. "Code_value,Code value (Hsingle_quotationA5A5)"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "BUF_STS_RDEN,WCRC3_CAIP7_BUF_STS enable." "0: Disable WCRC3_CAIP7_BUF_STS,1: Enable WCRC3_CAIP7_BUF_STS"
rgroup.long 0x6A4++0x3
line.long 0x0 "WCRC3_CAIP7_BUF_STS,WCRC3_CAIP7_BUF_STS is a register that sets enable for the interrupt of operation related to AES-ACC_p module."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved."
newline
bitfld.long 0x0 17. "Reserved_17,Reserved." "0,1"
newline
bitfld.long 0x0 16. "Reserved_16,Reserved." "0,1"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "Reserved_12,Reserved." "0,1"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved." "0,1,2,3"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x0 8. "buf_empty,Buffer empty flag." "0: Buffer is not empty,1: Buffer is empty"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved." "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved."
group.long 0x800++0x3
line.long 0x0 "WCRC3_CRC3_EN,WCRC[m]_CRC[m]_EN is a register that sets enable the data transfer to/from each port for CRC[m] module in FIFO."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "out_en,Output data from Data port in FIFO enable" "0: Disable output from Data port,1: Enable output from Data port"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "res_en,Output result data from Result port in FIFO enable" "0: Disable output from Result port,1: Enable output from Result port"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "trans_en,Transferring data from Data port in FIFO to CRC[m] enable" "0: Disable transferring data to CRC[m],1: Enable transferring data to CRC[m]"
newline
bitfld.long 0x0 0. "in_en,Input data to Data/Command/Expected data port in FIFO enable" "0: Disable input to Data/Command/Expected data port,1: Enable input to Data/Command/Expected data port"
group.long 0x820++0x3
line.long 0x0 "WCRC3_CRC3_STOP,WCRC[m]_CRC[m]_STOP is a register that stop transfer to CRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "stop,1: Stop data transfer." "?,1: Stop data transfer"
group.long 0x830++0x3
line.long 0x0 "WCRC3_CRC3_CMDEN,WCRC[m]_CRC[m]_CMDEN is a register that sets enable command function for CRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "cmd_en,Command function enable" "0: Disable command function,1: Enable command function"
group.long 0x840++0x3
line.long 0x0 "WCRC3_CRC3_COMP,WCRC[m]_CRC[m]_COMP is a register that sets enable comparing CRC result from CRC[m] module with expected data in FIFO."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved."
newline
bitfld.long 0x0 16.--17. "cmp_freq,Set the frequency of comparing." "0: ;Compare every 16Byte CRC generated,1: ;Compare every 32Byte CRC generated,?,?"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved."
newline
bitfld.long 0x0 1. "exp_reqsel,Select DMA Transfer request source for transferring expected data." "0: dmareq_wcrcm_crcm_in,1: dmareq_wcrcm_crcm_res"
newline
bitfld.long 0x0 0. "cmp_en,Comparing CRC result with expected data enable" "0: Disable comparing function,1: Enable comparing function"
group.long 0x850++0x3
line.long 0x0 "WCRC3_CRC3_COMP_RES,WCRC[m]_CRC[m]_COMP_RES is a register that indicates the result of comparing CRC for CRC[m] module."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved."
newline
hexmask.long.word 0x0 0.--15. 1. "cmp_res,The result of comparing CRC"
group.long 0x870++0x3
line.long 0x0 "WCRC3_CRC3_CONV,WCRC[m]_CRC[m]_CONV is a register that sets CRC conversion size to once for CRC[m] module."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x0 0.--20. 1. "conv,CRC conversion size specification"
group.long 0x880++0x3
line.long 0x0 "WCRC3_CRC3_WAIT,WCRC[m]_CRC[m]_WAIT is a register that wait subsequent command for CRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "wait,1: Wait subsequent command for 128 cycles @ S0D2_RTphi." "?,1: Wait subsequent command for 128 cycles @.."
group.long 0x910++0x3
line.long 0x0 "WCRC3_CRC3_INIT_CRC,WCRC[m]_CRC[m]_INIT_CRC is a register that sets CRC code value to DCRAmCOUT register at auto clear."
hexmask.long 0x0 0.--31. 1. "init_code,CRC code value to DCRAmCOUT register at auto clear."
group.long 0xA00++0x3
line.long 0x0 "WCRC3_CRC3_STS,WCRC[m]_CRC[m]_STS is a register that indicates the state of operation related to CRC[m] module."
eventfld.long 0x0 31. "stop_done,Indicates the state of stop operation by WCRC[m]_CRC[m]_STOP register." "0: Stop operation in progress or not done,1: Stop operation is done"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
eventfld.long 0x0 24. "cmd_done,Indicates the state of command function." "0: Accessing to register by command in progress or..,1: Accessing to register by command is done"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
eventfld.long 0x0 20. "res_done,Indicates the state of result data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
newline
hexmask.long.byte 0x0 14.--19. 1. "Reserved_14,Reserved."
newline
eventfld.long 0x0 13. "comp_err,Indicates the error of comparing CRC." "0: No comparing error or not comparing,1: Mismatch has occurred"
newline
eventfld.long 0x0 12. "comp_done,Indicates the state of comparing CRC." "0: Comparison in progress or not comparing,1: Comparing is done"
newline
hexmask.long.word 0x0 1.--11. 1. "Reserved_1,Reserved."
newline
eventfld.long 0x0 0. "trans_done,Indicates the state of input data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
group.long 0xA40++0x3
line.long 0x0 "WCRC3_CRC3_INTEN,WCRC[m]_CRC[m]_INTEN is a register that sets enable for the interrupt of operation related to CRC[m] module."
bitfld.long 0x0 31. "stop_done_ie,Interrupt for the complete of stop operation by WCRC[m]_CRC[m]_STOP register." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
bitfld.long 0x0 24. "cmd_done_ie,Interrupt for the complete of command function enable." "0: Disable interrupt,1: Enable interrupt"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "res_done_ie,Interrupt for the complete of result data transfer enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 14.--19. 1. "Reserved_14,Reserved."
newline
bitfld.long 0x0 13. "comp_err_ie,Interrupt for the error of comparing CRC enable" "0: Disable interrupt,1: Enable interrupt"
newline
bitfld.long 0x0 12. "comp_done_ie,Interrupt for the complete of comparing CRC enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.word 0x0 1.--11. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "trans_done_ie,Interrupt for the complete of input data transfer enable." "0: Disable interrupt,1: Enable interrupt"
group.long 0xA80++0x3
line.long 0x0 "WCRC3_CRC3_ECMEN,WCRC[m]_CRC[m]_ECMEN is a register that sets enable for error notification to ECM module on operation related to CRC[m] module."
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved."
newline
bitfld.long 0x0 13. "comp_err_oe,Error notification for the error of comparing CRC enable" "0: Disable notification,1: Enable notification"
newline
hexmask.long.word 0x0 0.--12. 1. "Reserved_0,Reserved."
group.long 0xAA0++0x3
line.long 0x0 "WCRC3_CRC3_BUF_STS_RDEN,WCRC[m]_CRC[m]_BUF_STS_RDEN is a register that sets enable for the interrupt of operation related to CRC[m] module."
hexmask.long.word 0x0 16.--31. 1. "Code_value,Code value (Hsingle_quotationA5A5)"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "BUF_STS_RDEN,WCRC[m]_CRC[m]_BUF_STS enable." "0: Disable WCRC[m]_CRC[m]_BUF_STS,1: Enable WCRC[m]_CRC[m]_BUF_STS"
rgroup.long 0xAA4++0x3
line.long 0x0 "WCRC3_CRC3_BUF_STS,WCRC[m]_CRC[m]_BUF_STS is a register that sets enable for the interrupt of operation related to CRC[m] module."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved."
newline
bitfld.long 0x0 18. "res_comp_endflag,Comparing CRC result end flag." "0: Comparing CRC result is not end,1: Comparing CRC result is end"
newline
bitfld.long 0x0 17. "Reserved_17,Reserved." "0,1"
newline
bitfld.long 0x0 16. "Reserved_16,Reserved." "0,1"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "Reserved_12,Reserved." "0,1"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved." "0,1,2,3"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x0 8. "buf_empty,Buffer empty flag." "0: Buffer is not empty,1: Buffer is empty"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved." "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved."
group.long 0xC00++0x3
line.long 0x0 "WCRC3_KCRC3_EN,WCRC[m]_KCRC[m]_EN is a register that sets enable the data transfer to/from each port for KCRC[m] module in FIFO."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "out_en,Output data from Data port in FIFO enable" "0: Disable output from Data port,1: Enable output from Data port"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "res_en,Output result data from Result port in FIFO enable" "0: Disable output from Result port,1: Enable output from Result port"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "trans_en,Transferring data from Data port in FIFO to KCRC[m] enable" "0: Disable transferring data to KCRC[m],1: Enable transferring data to KCRC[m]"
newline
bitfld.long 0x0 0. "in_en,Input data to Data/Command/Expected data port in FIFO enable" "0: Disable input to Data/Command/Expected data port,1: Enable input to Data/Command/Expected data port"
group.long 0xC20++0x3
line.long 0x0 "WCRC3_KCRC3_STOP,WCRC[m]_KCRC[m]_STOP is a register that stop transfer to KCRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "stop,1: Stop data transfer." "?,1: Stop data transfer"
group.long 0xC30++0x3
line.long 0x0 "WCRC3_KCRC3_CMDEN,WCRC[m]_KCRC[m]_CMDEN is a register that sets enable command function for KCRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "cmd_en,Command function enable" "0: Disable command function,1: Enable command function"
group.long 0xC40++0x3
line.long 0x0 "WCRC3_KCRC3_COMP,WCRC[m]_KCRC[m]_COMP is a register that sets enable comparing CRC result from KCRC[m] module with expected data in FIFO."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved."
newline
bitfld.long 0x0 16.--17. "cmp_freq,Set the frequency of comparing." "0: ;Compare every 16Byte CRC generated,1: ;Compare every 32Byte CRC generated,?,?"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved."
newline
bitfld.long 0x0 1. "exp_reqsel,Select DMA Transfer request source for transferring expected data." "0: dmareq_wcrcm_kcrcn_in,1: dmareq_wcrcm_kcrcn_res"
newline
bitfld.long 0x0 0. "cmp_en,Comparing CRC result with expected data enable" "0: Disable comparing function,1: Enable comparing function"
group.long 0xC50++0x3
line.long 0x0 "WCRC3_KCRC3_COMP_RES,WCRC[m]_KCRC[m]_COMP_RES is a register that indicates the result of comparing CRC for KCRC[m] module."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved."
newline
hexmask.long.word 0x0 0.--15. 1. "cmp_res,The result of comparing CRC"
group.long 0xC70++0x3
line.long 0x0 "WCRC3_KCRC3_CONV,WCRC[m]_KCRC[m]_CONV is a register that sets CRC conversion size to once for KCRC[m] module."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x0 0.--20. 1. "conv,CRC conversion size specification"
group.long 0xC80++0x3
line.long 0x0 "WCRC3_KCRC3_WAIT,WCRC[m]_KCRC[m]_WAIT is a register that wait subsequent command for KCRC[m] module."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "wait,1: Wait subsequent command for 128 cycles @ S0D2_RTphi." "?,1: Wait subsequent command for 128 cycles @.."
group.long 0xD10++0x3
line.long 0x0 "WCRC3_KCRC3_INIT_CRC,WCRC[m]_KCRC[m]_INIT_CRC is a register that sets CRC code value to KCRC[m]COUT register at auto clear."
hexmask.long 0x0 0.--31. 1. "init_code,CRC code value to KCRC[m]DOUT register at auto clear."
group.long 0xE00++0x3
line.long 0x0 "WCRC3_KCRC3_STS,WCRC[m]_KCRC[m]_STS is a register that indicates the state of operation related to KCRC[m] module."
eventfld.long 0x0 31. "stop_done,Indicates the state of stop operation by WCRC[m]_KCRC[m]_STOP register." "0: Stop operation in progress or not done,1: Stop operation is done"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
eventfld.long 0x0 24. "cmd_done,Indicates the state of command function." "0: Accessing to register by command in progress or..,1: Accessing to register by command is done"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
eventfld.long 0x0 20. "res_done,Indicates the state of result data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
newline
hexmask.long.byte 0x0 14.--19. 1. "Reserved_14,Reserved."
newline
eventfld.long 0x0 13. "comp_err,Indicates the error of comparing CRC." "0: No comparing error or not comparing,1: Mismatch has occurred"
newline
eventfld.long 0x0 12. "comp_done,Indicates the state of comparing CRC." "0: Comparison in progress or not comparing,1: Comparing is done"
newline
hexmask.long.word 0x0 1.--11. 1. "Reserved_1,Reserved."
newline
eventfld.long 0x0 0. "trans_done,Indicates the state of input data transfer." "0: Transfer in progress or not transferring,1: Transfer is done"
group.long 0xE40++0x3
line.long 0x0 "WCRC3_KCRC3_INTEN,WCRC[m]_KCRC[m]_INTEN is a register that sets enable for the interrupt of operation related to KCRC[m] module."
bitfld.long 0x0 31. "stop_done_ie,Interrupt for the complete of stop operation by WCRC[m]_KCRC[m]_STOP register." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved."
newline
bitfld.long 0x0 24. "cmd_done_ie,Interrupt for the complete of command function enable." "0: Disable interrupt,1: Enable interrupt"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "res_done_ie,Interrupt for the complete of result data transfer enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.byte 0x0 14.--19. 1. "Reserved_14,Reserved."
newline
bitfld.long 0x0 13. "comp_err_ie,Interrupt for the error of comparing CRC enable" "0: Disable interrupt,1: Enable interrupt"
newline
bitfld.long 0x0 12. "comp_done_ie,Interrupt for the complete of comparing CRC enable." "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.word 0x0 1.--11. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "trans_done_ie,Interrupt for the complete of input data transfer enable." "0: Disable interrupt,1: Enable interrupt"
group.long 0xE80++0x3
line.long 0x0 "WCRC3_KCRC3_ECMEN,WCRC[m]_KCRC[m]_ECMEN is a register that sets enable for error notification to ECM module on operation related to KCRC[m] module."
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved."
newline
bitfld.long 0x0 13. "comp_err_oe,Error notification for the error of comparing CRC enable" "0: Disable notification,1: Enable notification"
newline
hexmask.long.word 0x0 0.--12. 1. "Reserved_0,Reserved."
group.long 0xEA0++0x3
line.long 0x0 "WCRC3_KCRC3_BUF_STS_RDEN,WCRC[m]_KCRC[m]_BUF_STS_RDEN is a register that sets enable for the interrupt of operation related to KCRC[m] module."
hexmask.long.word 0x0 16.--31. 1. "Code_value,Code value (Hsingle_quotationA5A5)"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved."
newline
bitfld.long 0x0 0. "BUF_STS_RDEN,WCRC[m]_KCRC[m]_BUF_STS enable." "0: Disable WCRC[m]_KCRC[m]_BUF_STS,1: Enable WCRC[m]_KCRC[m]_BUF_STS"
rgroup.long 0xEA4++0x3
line.long 0x0 "WCRC3_KCRC3_BUF_STS,WCRC[m]_KCRC[m]_BUF_STS is a register that sets enable for the interrupt of operation related to KCRC[m] module."
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved."
newline
bitfld.long 0x0 18. "res_comp_endflag,Comparing CRC result end flag." "0: Comparing CRC result is not end,1: Comparing CRC result is end"
newline
bitfld.long 0x0 17. "Reserved_17,Reserved." "0,1"
newline
bitfld.long 0x0 16. "Reserved_16,Reserved." "0,1"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "Reserved_12,Reserved." "0,1"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved." "0,1,2,3"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x0 8. "buf_empty,Buffer empty flag." "0: Buffer is not empty,1: Buffer is empty"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved." "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved."
group.long 0xF00++0x3
line.long 0x0 "WCRC3_COMMON_STS,WCRC[m]_COMMON_STS is a register that indicates the state of operation related to WCRC[m] module."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved."
newline
eventfld.long 0x0 16. "edc_err,Indicates the error of EDC." "0: No EDC error,1: EDC error has occurred"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved."
group.long 0xF40++0x3
line.long 0x0 "WCRC3_COMMON_INTEN,WCRC[m]_COMMON_INTEN is a register that sets enable for the interrupt of operation related to WCRC[m] module."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved."
newline
bitfld.long 0x0 16. "edc_err_ie,Interrupt for the error of EDC enable" "0: Disable interrupt,1: Enable interrupt"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved."
group.long 0xF80++0x3
line.long 0x0 "WCRC3_COMMON_ECMEN,WCRC[m]_COMMON_ECMEN is a register that sets enable for error notification to ECM module on operation related to WCRC[m] module."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved."
newline
bitfld.long 0x0 16. "edc_err_oe,Error notification for EDC error enable" "0: Disable notification,1: Enable notification"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved."
group.long 0xFC0++0x3
line.long 0x0 "WCRC3_ERRINJ,WCRC[m]_ERRINJ is a register that sets enable error injection for bus data signal or EDC code signal."
hexmask.long.word 0x0 16.--31. 1. "code,Code value"
newline
hexmask.long.word 0x0 3.--15. 1. "Reserved_3,Reserved."
newline
bitfld.long 0x0 0.--2. "err_inj_2_0,Error injection enable" "0: Disables error for EDC code signal,1: Enables error for EDC code signal,?,?,?,?,?,?"
tree.end
tree "CRC_4"
base ad:0xE6F00000
group.long 0x0++0x7
line.long 0x0 "DCRA0CIN,DCRA[m]CIN is a register that sets input data."
hexmask.long 0x0 0.--31. 1. "Data_In,Set input data"
line.long 0x4 "DCRA0COUT,DCRA[m]COUT is a register that obtains the CRC codes."
hexmask.long 0x4 0.--31. 1. "CRC_Code,CRC code"
group.long 0x20++0x3
line.long 0x0 "DCRA0CTL,DCRA[m]CTL is a register that determines the valid bit width of the input data and generator polynomial for the CRC codes."
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
bitfld.long 0x0 4.--5. "ISZ_1_0,The value written to this field determines the valid bit width of input data." "0: 32bit,1: 16bit,2: 8bit,3: Setting prohibited"
newline
hexmask.long.byte 0x0 0.--3. 1. "POL_3_0,The value written to this field determines the generator polynomial for the CRC codes."
group.long 0x40++0x3
line.long 0x0 "DCRA0CTL2,DCRA[m]CTL2 is a register that determines the swap. exor of input data and output data."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "xorvalmode,The value written to this field determines EXOR ON of output data." "0: data out[31:0],1: Hsingle_quotationFFFF FFFF ^ data_out[31:0]"
newline
bitfld.long 0x0 6. "bitswapmode,The value written to this field determines bit swap of output data." "0,1"
bitfld.long 0x0 4.--5. "byteswapmode,The value written to this field determines byte swap of output data." "0,1,2,3"
newline
bitfld.long 0x0 3. "xorvalinmode,The value written to this field determines EXOR ON of input data." "0: data_in[31:0],1: Hsingle_quotationFFFF FFFF ^ data_in[31:0]"
bitfld.long 0x0 2. "bitswapinmode,The value written to this field determines bit swap of input data." "0,1"
newline
bitfld.long 0x0 0.--1. "byteswapinmode,The value written to this field determines byte swap of input data." "0,1,2,3"
tree.end
tree "CRC_5"
base ad:0xE6F10000
group.long 0x0++0x7
line.long 0x0 "DCRA1CIN,DCRA[m]CIN is a register that sets input data."
hexmask.long 0x0 0.--31. 1. "Data_In,Set input data"
line.long 0x4 "DCRA1COUT,DCRA[m]COUT is a register that obtains the CRC codes."
hexmask.long 0x4 0.--31. 1. "CRC_Code,CRC code"
group.long 0x20++0x3
line.long 0x0 "DCRA1CTL,DCRA[m]CTL is a register that determines the valid bit width of the input data and generator polynomial for the CRC codes."
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
bitfld.long 0x0 4.--5. "ISZ_1_0,The value written to this field determines the valid bit width of input data." "0: 32bit,1: 16bit,2: 8bit,3: Setting prohibited"
newline
hexmask.long.byte 0x0 0.--3. 1. "POL_3_0,The value written to this field determines the generator polynomial for the CRC codes."
group.long 0x40++0x3
line.long 0x0 "DCRA1CTL2,DCRA[m]CTL2 is a register that determines the swap. exor of input data and output data."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "xorvalmode,The value written to this field determines EXOR ON of output data." "0: data out[31:0],1: Hsingle_quotationFFFF FFFF ^ data_out[31:0]"
newline
bitfld.long 0x0 6. "bitswapmode,The value written to this field determines bit swap of output data." "0,1"
bitfld.long 0x0 4.--5. "byteswapmode,The value written to this field determines byte swap of output data." "0,1,2,3"
newline
bitfld.long 0x0 3. "xorvalinmode,The value written to this field determines EXOR ON of input data." "0: data_in[31:0],1: Hsingle_quotationFFFF FFFF ^ data_in[31:0]"
bitfld.long 0x0 2. "bitswapinmode,The value written to this field determines bit swap of input data." "0,1"
newline
bitfld.long 0x0 0.--1. "byteswapinmode,The value written to this field determines byte swap of input data." "0,1,2,3"
tree.end
tree "CRC_6"
base ad:0xE7000000
group.long 0x0++0x7
line.long 0x0 "DCRA2CIN,DCRA[m]CIN is a register that sets input data."
hexmask.long 0x0 0.--31. 1. "Data_In,Set input data"
line.long 0x4 "DCRA2COUT,DCRA[m]COUT is a register that obtains the CRC codes."
hexmask.long 0x4 0.--31. 1. "CRC_Code,CRC code"
group.long 0x20++0x3
line.long 0x0 "DCRA2CTL,DCRA[m]CTL is a register that determines the valid bit width of the input data and generator polynomial for the CRC codes."
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
bitfld.long 0x0 4.--5. "ISZ_1_0,The value written to this field determines the valid bit width of input data." "0: 32bit,1: 16bit,2: 8bit,3: Setting prohibited"
newline
hexmask.long.byte 0x0 0.--3. 1. "POL_3_0,The value written to this field determines the generator polynomial for the CRC codes."
group.long 0x40++0x3
line.long 0x0 "DCRA2CTL2,DCRA[m]CTL2 is a register that determines the swap. exor of input data and output data."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "xorvalmode,The value written to this field determines EXOR ON of output data." "0: data out[31:0],1: Hsingle_quotationFFFF FFFF ^ data_out[31:0]"
newline
bitfld.long 0x0 6. "bitswapmode,The value written to this field determines bit swap of output data." "0,1"
bitfld.long 0x0 4.--5. "byteswapmode,The value written to this field determines byte swap of output data." "0,1,2,3"
newline
bitfld.long 0x0 3. "xorvalinmode,The value written to this field determines EXOR ON of input data." "0: data_in[31:0],1: Hsingle_quotationFFFF FFFF ^ data_in[31:0]"
bitfld.long 0x0 2. "bitswapinmode,The value written to this field determines bit swap of input data." "0,1"
newline
bitfld.long 0x0 0.--1. "byteswapinmode,The value written to this field determines byte swap of input data." "0,1,2,3"
tree.end
tree "CRC_7"
base ad:0xE7010000
group.long 0x0++0x7
line.long 0x0 "DCRA3CIN,DCRA[m]CIN is a register that sets input data."
hexmask.long 0x0 0.--31. 1. "Data_In,Set input data"
line.long 0x4 "DCRA3COUT,DCRA[m]COUT is a register that obtains the CRC codes."
hexmask.long 0x4 0.--31. 1. "CRC_Code,CRC code"
group.long 0x20++0x3
line.long 0x0 "DCRA3CTL,DCRA[m]CTL is a register that determines the valid bit width of the input data and generator polynomial for the CRC codes."
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
bitfld.long 0x0 4.--5. "ISZ_1_0,The value written to this field determines the valid bit width of input data." "0: 32bit,1: 16bit,2: 8bit,3: Setting prohibited"
newline
hexmask.long.byte 0x0 0.--3. 1. "POL_3_0,The value written to this field determines the generator polynomial for the CRC codes."
group.long 0x40++0x3
line.long 0x0 "DCRA3CTL2,DCRA[m]CTL2 is a register that determines the swap. exor of input data and output data."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "xorvalmode,The value written to this field determines EXOR ON of output data." "0: data out[31:0],1: Hsingle_quotationFFFF FFFF ^ data_out[31:0]"
newline
bitfld.long 0x0 6. "bitswapmode,The value written to this field determines bit swap of output data." "0,1"
bitfld.long 0x0 4.--5. "byteswapmode,The value written to this field determines byte swap of output data." "0,1,2,3"
newline
bitfld.long 0x0 3. "xorvalinmode,The value written to this field determines EXOR ON of input data." "0: data_in[31:0],1: Hsingle_quotationFFFF FFFF ^ data_in[31:0]"
bitfld.long 0x0 2. "bitswapinmode,The value written to this field determines bit swap of input data." "0,1"
newline
bitfld.long 0x0 0.--1. "byteswapinmode,The value written to this field determines byte swap of input data." "0,1,2,3"
tree.end
tree "CRC_8"
base ad:0xE7020000
group.long 0x0++0x3
line.long 0x0 "KCRC0DIN,"
hexmask.long 0x0 0.--31. 1. "DIN,Input Data for CRC calculation."
group.long 0x80++0x3
line.long 0x0 "KCRC0DOUT,"
hexmask.long 0x0 0.--31. 1. "DOUT,Output Data for CRC calculation."
group.long 0x90++0x3
line.long 0x0 "KCRC0CTL,This register provided CRC calculate setting."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x0 16.--20. 1. "PSIZE,Polynomial size"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "CMD0,Calculate Mode 0" "0: Mode N,1: Mode R"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 5. "CMD1,Calculate Mode 1" "0: Mode N,1: Mode R"
bitfld.long 0x0 4. "CMD2,Calculate Mode 2" "0: Mode M,1: Mode L"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.long 0x0 0.--2. "DW,Input Data size select" "0: 32 bit fix mode,1: 16 bit fix mode,?,?,?,?,?,?"
group.long 0xA0++0x3
line.long 0x0 "KCRC0POLY,"
hexmask.long 0x0 0.--31. 1. "POLY,Polynomial for CRC calculation."
group.long 0xB0++0x3
line.long 0x0 "KCRC0XOR,"
hexmask.long 0x0 0.--31. 1. "XOR,XOR mask for Data output."
tree.end
tree "CRC_9"
base ad:0xE7030000
group.long 0x0++0x3
line.long 0x0 "KCRC1DIN,"
hexmask.long 0x0 0.--31. 1. "DIN,Input Data for CRC calculation."
group.long 0x80++0x3
line.long 0x0 "KCRC1DOUT,"
hexmask.long 0x0 0.--31. 1. "DOUT,Output Data for CRC calculation."
group.long 0x90++0x3
line.long 0x0 "KCRC1CTL,This register provided CRC calculate setting."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x0 16.--20. 1. "PSIZE,Polynomial size"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "CMD0,Calculate Mode 0" "0: Mode N,1: Mode R"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 5. "CMD1,Calculate Mode 1" "0: Mode N,1: Mode R"
bitfld.long 0x0 4. "CMD2,Calculate Mode 2" "0: Mode M,1: Mode L"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.long 0x0 0.--2. "DW,Input Data size select" "0: 32 bit fix mode,1: 16 bit fix mode,?,?,?,?,?,?"
group.long 0xA0++0x3
line.long 0x0 "KCRC1POLY,"
hexmask.long 0x0 0.--31. 1. "POLY,Polynomial for CRC calculation."
group.long 0xB0++0x3
line.long 0x0 "KCRC1XOR,"
hexmask.long 0x0 0.--31. 1. "XOR,XOR mask for Data output."
tree.end
tree "CRC_10"
base ad:0xE7040000
group.long 0x0++0x3
line.long 0x0 "KCRC2DIN,"
hexmask.long 0x0 0.--31. 1. "DIN,Input Data for CRC calculation."
group.long 0x80++0x3
line.long 0x0 "KCRC2DOUT,"
hexmask.long 0x0 0.--31. 1. "DOUT,Output Data for CRC calculation."
group.long 0x90++0x3
line.long 0x0 "KCRC2CTL,This register provided CRC calculate setting."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x0 16.--20. 1. "PSIZE,Polynomial size"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "CMD0,Calculate Mode 0" "0: Mode N,1: Mode R"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 5. "CMD1,Calculate Mode 1" "0: Mode N,1: Mode R"
bitfld.long 0x0 4. "CMD2,Calculate Mode 2" "0: Mode M,1: Mode L"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.long 0x0 0.--2. "DW,Input Data size select" "0: 32 bit fix mode,1: 16 bit fix mode,?,?,?,?,?,?"
group.long 0xA0++0x3
line.long 0x0 "KCRC2POLY,"
hexmask.long 0x0 0.--31. 1. "POLY,Polynomial for CRC calculation."
group.long 0xB0++0x3
line.long 0x0 "KCRC2XOR,"
hexmask.long 0x0 0.--31. 1. "XOR,XOR mask for Data output."
tree.end
tree "CRC_11"
base ad:0xE7050000
group.long 0x0++0x3
line.long 0x0 "KCRC3DIN,"
hexmask.long 0x0 0.--31. 1. "DIN,Input Data for CRC calculation."
group.long 0x80++0x3
line.long 0x0 "KCRC3DOUT,"
hexmask.long 0x0 0.--31. 1. "DOUT,Output Data for CRC calculation."
group.long 0x90++0x3
line.long 0x0 "KCRC3CTL,This register provided CRC calculate setting."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x0 16.--20. 1. "PSIZE,Polynomial size"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "CMD0,Calculate Mode 0" "0: Mode N,1: Mode R"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 5. "CMD1,Calculate Mode 1" "0: Mode N,1: Mode R"
bitfld.long 0x0 4. "CMD2,Calculate Mode 2" "0: Mode M,1: Mode L"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.long 0x0 0.--2. "DW,Input Data size select" "0: 32 bit fix mode,1: 16 bit fix mode,?,?,?,?,?,?"
group.long 0xA0++0x3
line.long 0x0 "KCRC3POLY,"
hexmask.long 0x0 0.--31. 1. "POLY,Polynomial for CRC calculation."
group.long 0xB0++0x3
line.long 0x0 "KCRC3XOR,"
hexmask.long 0x0 0.--31. 1. "XOR,XOR mask for Data output."
tree.end
tree.end
tree "CSI (Camera Serial Interface 2)"
base ad:0x0
tree "CSI_0"
base ad:0xFE500000
rgroup.long 0x0++0x3
line.long 0x0 "CSI20_VERSION,"
hexmask.long 0x0 0.--31. 1. "version,This field indicates the version of the LINK."
group.long 0x4++0x7
line.long 0x0 "CSI20_N_LANES,"
hexmask.long 0x0 3.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x0 0.--2. "n_lanes,This can only be updated when the PHY lane is in stopstate.Number of active data lanes:" "0,1,2,3,4,5,6,7"
line.long 0x4 "CSI20_CSI2_RESETN,"
hexmask.long 0x4 1.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x4 0. "csi2_resetn,LINK and PHY reset output. Active Low." "0,1"
rgroup.long 0xC++0x3
line.long 0x0 "CSI20_INT_ST_MAIN,"
hexmask.long.byte 0x0 26.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x0 25. "reserved1,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 24. "reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 23. "reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 22. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 21. "reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 20. "reserved6,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "reserved7,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 18. "reserved8,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 17. "status_int_line,Status of int_st_line" "0,1"
newline
bitfld.long 0x0 16. "status_int_phy,Status of int_st_phy." "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved9,Reserved and read as zero."
newline
bitfld.long 0x0 7. "status_int_ecc_corrected,Status of int_ecc_corrected." "0,1"
newline
bitfld.long 0x0 6. "status_int_data_id,Status of int_data_id." "0,1"
newline
bitfld.long 0x0 5. "status_int_pld_crc_fatal,Status of int_pld_crc_fatal." "0,1"
newline
bitfld.long 0x0 4. "status_int_crc_frame_fatal,Status of int_crc_frame_fatal." "0,1"
newline
bitfld.long 0x0 3. "status_int_seq_frame_fatal,Status of int_seq_frame_fatal." "0,1"
newline
bitfld.long 0x0 2. "status_int_bndry_frame_fatal,Status of int_st_bndry_frame_fatal." "0,1"
newline
bitfld.long 0x0 1. "status_int_pkt_fatal,Status of int_st_pkt_fatal." "0,1"
newline
bitfld.long 0x0 0. "status_int_phy_fatal,Status of int_st_phy_fatal." "0,1"
group.long 0x10++0x3
line.long 0x0 "CSI20_DATA_IDS_1,"
rbitfld.long 0x0 30.--31. "reserved0,Reserved and read as zero." "0,1,2,3"
newline
hexmask.long.byte 0x0 24.--29. 1. "di3_dt,Data type for programmed data ID 3."
newline
rbitfld.long 0x0 22.--23. "reserved1,Reserved and read as zero." "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--21. 1. "di2_dt,Data type for programmed Data ID 2."
newline
rbitfld.long 0x0 14.--15. "reserved2,Reserved and read as zero." "0,1,2,3"
newline
hexmask.long.byte 0x0 8.--13. 1. "di1_dt,Data type for programmed data ID 1."
newline
rbitfld.long 0x0 6.--7. "reserved3,Reserved and read as zero." "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "di0_dt,Data type for programmed data ID 0."
group.long 0x1C++0x3
line.long 0x0 "CSI20_PHY_MODE,"
hexmask.long 0x0 1.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x0 0. "phy_mode,Select the PHY interface:" "0,1"
group.long 0x30++0x3
line.long 0x0 "CSI20_DATA_IDS_VC_1,"
rbitfld.long 0x0 29.--31. "reserved0,Reserved and read as zero." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "di3_vcx_2,Virtual channel extension extra bit for programmed data ID 3" "0,1"
newline
bitfld.long 0x0 26.--27. "di3_vcx_0_1,Virtual channel extension for programmed data ID 3." "0,1,2,3"
newline
bitfld.long 0x0 24.--25. "di3_vc,Virtual channel for programmed data ID 3." "0,1,2,3"
newline
rbitfld.long 0x0 21.--23. "reserved1,Reserved and read as zero." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "di2_vcx_2,Virtual channel extension extra bit for programmed data ID 2" "0,1"
newline
bitfld.long 0x0 18.--19. "di2_vcx_0_1,Virtual channel extension for programmed data ID 2." "0,1,2,3"
newline
bitfld.long 0x0 16.--17. "di2_vc,Virtual channel for programmed data ID 2." "0,1,2,3"
newline
rbitfld.long 0x0 13.--15. "reserved2,Reserved and read as zero." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "di1_vcx_2,Virtual channel extension extra bit for programmed data ID 1" "0,1"
newline
bitfld.long 0x0 10.--11. "di1_vcx_0_1,Virtual channel extension for programmed data ID 1." "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "di1_vc,Virtual channel for programmed data ID 1." "0,1,2,3"
newline
rbitfld.long 0x0 5.--7. "reserved3,Reserved and read as zero." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "di0_vcx_2,Virtual channel extension extra bit for programmed data ID 0" "0,1"
newline
bitfld.long 0x0 2.--3. "di0_vcx_0_1,Virtual channel extension for programmed data ID 0." "0,1,2,3"
newline
bitfld.long 0x0 0.--1. "di0_vc,Virtual channel for programmed data ID 0." "0,1,2,3"
group.long 0x40++0x7
line.long 0x0 "CSI20_PHY_SHUTDOWNZ,"
hexmask.long 0x0 1.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x0 0. "phy_shutdownz,Shutdown input. This line is used to place the complete macro in power down. All analog blocks are in power down mode and digital logic is cleared. Active Low." "0,1"
line.long 0x4 "CSI20_DPHY_RSTZ,"
hexmask.long 0x4 1.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x4 0. "dphy_rstz,PHY reset output. Active Low." "0,1"
rgroup.long 0x48++0x7
line.long 0x0 "CSI20_PHY_RX,"
hexmask.long.word 0x0 18.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x0 17. "phy_rxclkactivehs,Indicates that D-PHY clock lane is actively receiving a DDR clock" "0,1"
newline
bitfld.long 0x0 16. "phy_rxulpsclknot,Active Low. This signal indicates that D-PHY Clock Lane module has entered the Ultra Low Power state" "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved1,Reserved and read as zero."
newline
bitfld.long 0x0 7. "reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 6. "reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 5. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 4. "reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "phy_rxulpsesc_3,Lane module 3 has entered the Ultra Low Power mode" "0,1"
newline
bitfld.long 0x0 2. "phy_rxulpsesc_2,Lane module 2 has entered the Ultra Low Power mode" "0,1"
newline
bitfld.long 0x0 1. "phy_rxulpsesc_1,Lane module 1 has entered the Ultra Low Power mode" "0,1"
newline
bitfld.long 0x0 0. "phy_rxulpsesc_0,Lane module 0 has entered the Ultra Low Power mode." "0,1"
line.long 0x4 "CSI20_PHY_STOPSTATE,"
hexmask.long.word 0x4 17.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x4 16. "phy_stopstateclk,D-PHY Clock lane in Stop state" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "reserved1,Reserved and read as zero."
newline
bitfld.long 0x4 7. "reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x4 6. "reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x4 5. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x4 4. "reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x4 3. "phy_stopstatedata_3,Data lane 3 in Stop state" "0,1"
newline
bitfld.long 0x4 2. "phy_stopstatedata_2,Data lane 2 in Stop state" "0,1"
newline
bitfld.long 0x4 1. "phy_stopstatedata_1,Data lane 1 in Stop state" "0,1"
newline
bitfld.long 0x4 0. "phy_stopstatedata_0,Data lane 0 in Stop state" "0,1"
rgroup.long 0xCC++0x3
line.long 0x0 "CSI20_PHY_CAL,"
hexmask.long 0x0 1.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x0 0. "rxskewcalhs,A low-to-high transition on rxskewcalhs signal means that the PHY has initiated the de-skew calibration." "0,1"
rgroup.long 0xE0++0x3
line.long 0x0 "CSI20_INT_ST_PHY_FATAL,"
hexmask.long.word 0x0 19.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x0 18. "phy_rxinvalidcodehs_2,High Speed Invalid Code Word Detection on lane 2" "0,1"
newline
bitfld.long 0x0 17. "phy_rxinvalidcodehs_1,High Speed Invalid Code Word Detection on lane 1" "0,1"
newline
bitfld.long 0x0 16. "phy_rxinvalidcodehs_0,High Speed Invalid Code Word Detection on lane 0" "0,1"
newline
hexmask.long.byte 0x0 9.--15. 1. "reserved1,Reserved and read as zero."
newline
bitfld.long 0x0 8. "err_deskew,Reports whenever data is lost due to an existent skew between lanes greater than 2 rxwordclkhs" "0,1"
newline
bitfld.long 0x0 7. "reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 6. "reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 5. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 4. "reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "phy_errsotsynchs_3,Start of transmission error on data lane 3 (no synchronization achieved)" "0,1"
newline
bitfld.long 0x0 2. "phy_errsotsynchs_2,Start of transmission error on data lane 2 (no synchronization achieved)" "0,1"
newline
bitfld.long 0x0 1. "phy_errsotsynchs_1,Start of transmission error on data lane 1 (no synchronization achieved)" "0,1"
newline
bitfld.long 0x0 0. "phy_errsotsynchs_0,Start of transmission error on data lane 0 (no synchronization achieved)." "0,1"
group.long 0xE4++0x3
line.long 0x0 "CSI20_INT_MSK_PHY_FATAL,"
hexmask.long.word 0x0 19.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x0 18. "mask_phy_rxinvalidcodehs_2,Mask for phy_rxinvalidcodehs_2" "0,1"
newline
bitfld.long 0x0 17. "mask_phy_rxinvalidcodehs_1,Mask for phy_rxinvalidcodehs_1" "0,1"
newline
bitfld.long 0x0 16. "mask_phy_rxinvalidcodehs_0,Mask for phy_rxinvalidcodehs_0" "0,1"
newline
hexmask.long.byte 0x0 9.--15. 1. "reserved1,Reserved and read as zero."
newline
bitfld.long 0x0 8. "err_deskew,Mask for err_deskew" "0,1"
newline
rbitfld.long 0x0 7. "reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 6. "reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 5. "reserved4,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 4. "reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "mask_phy_errsotsynchs_3,Mask for phy_errsotsynchs_3" "0,1"
newline
bitfld.long 0x0 2. "mask_phy_errsotsynchs_2,Mask for phy_errsotsynchs_2" "0,1"
newline
bitfld.long 0x0 1. "mask_phy_errsotsynchs_1,Mask for phy_errsotsynchs_1" "0,1"
newline
bitfld.long 0x0 0. "mask_phy_errsotsynchs_0,Mask for phy_errsotsynchs_0" "0,1"
rgroup.long 0xF0++0x3
line.long 0x0 "CSI20_INT_ST_PKT_FATAL,"
hexmask.long 0x0 2.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x0 1. "shorter_payload,D-PHY mode: Reported greater WC than received  unrecoverable. C-PHY mode: Reported greater WC than received  unrecoverable." "0,1"
newline
bitfld.long 0x0 0. "err_ecc_double,D-PHY mode: Header ECC contains at least 2 errors  unrecoverable. C-PHY mode: Header CRC unrecoverable." "0,1"
group.long 0xF4++0x3
line.long 0x0 "CSI20_INT_MSK_PKT_FATAL,"
hexmask.long 0x0 2.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x0 1. "mask_shorter_payload,Mask for shorter_payload." "0,1"
newline
bitfld.long 0x0 0. "mask_err_ecc_double,Mask for err_ecc_double." "0,1"
rgroup.long 0x110++0x3
line.long 0x0 "CSI20_INT_ST_PHY,"
hexmask.long.byte 0x0 24.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x0 23. "reserved1,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 22. "reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 21. "reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 20. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "phy_erresc_3,Escape Entry Error on data lane 3" "0,1"
newline
bitfld.long 0x0 18. "phy_erresc_2,Escape Entry Error on data lane 2" "0,1"
newline
bitfld.long 0x0 17. "phy_erresc_1,Escape Entry Error on data lane 1" "0,1"
newline
bitfld.long 0x0 16. "phy_erresc_0,Escape Entry Error on data lane 0" "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved5,Reserved and read as zero."
newline
bitfld.long 0x0 7. "reserved6,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 6. "reserved7,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 5. "reserved8,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 4. "reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "phy_errsoths_3,Start of transmission error on data lane 3 (synchronization can still be achieved)" "0,1"
newline
bitfld.long 0x0 2. "phy_errsoths_2,Start of transmission error on data lane 2 (synchronization can still be achieved)" "0,1"
newline
bitfld.long 0x0 1. "phy_errsoths_1,Start of transmission error on data lane 1 (synchronization can still be achieved)" "0,1"
newline
bitfld.long 0x0 0. "phy_errsoths_0,Start of transmission error on data lane 0 (synchronization can still be achieved)" "0,1"
group.long 0x114++0x3
line.long 0x0 "CSI20_INT_MSK_PHY,"
hexmask.long.byte 0x0 24.--31. 1. "reserved0,Reserved and read as zero."
newline
rbitfld.long 0x0 23. "reserved1,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 22. "reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 21. "reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 20. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "mask_phy_erresc_3,Mask for phy_erresc_3" "0,1"
newline
bitfld.long 0x0 18. "mask_phy_erresc_2,Mask for phy_erresc_2" "0,1"
newline
bitfld.long 0x0 17. "mask_phy_erresc_1,Mask for phy_erresc_1" "0,1"
newline
bitfld.long 0x0 16. "mask_phy_erresc_0,Mask for phy_erresc_0" "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved5,Reserved and read as zero."
newline
rbitfld.long 0x0 7. "reserved6,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 6. "reserved7,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 5. "reserved8,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 4. "reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "mask_phy_errsoths_3,Mask for phy_errsoths_3" "0,1"
newline
bitfld.long 0x0 2. "mask_phy_errsoths_2,Mask for phy_errsoths_2" "0,1"
newline
bitfld.long 0x0 1. "mask_phy_errsoths_1,Mask for phy_errsoths_1" "0,1"
newline
bitfld.long 0x0 0. "mask_phy_errsoths_0,Mask for phy_errsoths_0" "0,1"
rgroup.long 0x130++0x3
line.long 0x0 "CSI20_INT_ST_LINE,"
hexmask.long.byte 0x0 24.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x0 23. "reserved1,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 22. "reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 21. "reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 20. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "err_l_seq_di3,Error in the sequence of lines for vc3 and dt3" "0,1"
newline
bitfld.long 0x0 18. "err_l_seq_di2,Error in the sequence of lines for vc2 and dt2" "0,1"
newline
bitfld.long 0x0 17. "err_l_seq_di1,Error in the sequence of lines for vc1 and dt1" "0,1"
newline
bitfld.long 0x0 16. "err_l_seq_di0,Error in the sequence of lines for vc0 and dt0" "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved5,Reserved and read as zero."
newline
bitfld.long 0x0 7. "reserved6,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 6. "reserved7,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 5. "reserved8,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 4. "reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "err_l_bndry_match_di3,Error matching line start with line end for vc3 and dt3" "0,1"
newline
bitfld.long 0x0 2. "err_l_bndry_match_di2,Error matching line start with line end for vc2 and dt2" "0,1"
newline
bitfld.long 0x0 1. "err_l_bndry_match_di1,Error matching line start with line end for vc1 and dt1" "0,1"
newline
bitfld.long 0x0 0. "err_l_bndry_match_di0,Error matching line start with line end for vc0 and dt0" "0,1"
group.long 0x134++0x3
line.long 0x0 "CSI20_INT_MSK_LINE,"
hexmask.long.byte 0x0 24.--31. 1. "reserved0,Reserved and read as zero."
newline
rbitfld.long 0x0 23. "reserved1,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 22. "reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 21. "reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 20. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "mask_err_l_seq_di3,Mask for err_l_seq_di3" "0,1"
newline
bitfld.long 0x0 18. "mask_err_l_seq_di2,Mask for err_l_seq_di2" "0,1"
newline
bitfld.long 0x0 17. "mask_err_l_seq_di1,Mask for err_l_seq_di1" "0,1"
newline
bitfld.long 0x0 16. "mask_err_l_seq_di0,Mask for err_l_seq_di0" "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved5,Reserved and read as zero."
newline
rbitfld.long 0x0 7. "reserved6,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 6. "reserved7,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 5. "reserved8,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 4. "reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "mask_err_l_bndry_match_di3,Mask for err_l_bndry_match_di3" "0,1"
newline
bitfld.long 0x0 2. "mask_err_l_bndry_match_di2,Mask for err_l_bndry_match_di2" "0,1"
newline
bitfld.long 0x0 1. "mask_err_l_bndry_match_di1,Mask for err_l_bndry_match_di1" "0,1"
newline
bitfld.long 0x0 0. "mask_err_l_bndry_match_di0,Mask for err_l_bndry_match_di0" "0,1"
rgroup.long 0x2B0++0x3
line.long 0x0 "CSI20_INT_ST_PLD_CRC_FATAL,"
bitfld.long 0x0 31. "Reserved0,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 30. "Reserved1,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 29. "Reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 28. "Reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 27. "Reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 26. "Reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 25. "Reserved6,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 24. "Reserved7,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 23. "Reserved8,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 22. "Reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 21. "Reserved10,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 20. "Reserved11,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "Reserved12,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 18. "Reserved13,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 17. "Reserved14,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 16. "Reserved15,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 15. "err_crc_vc15,Payload Checksum error detected on virtual channel 15" "0,1"
newline
bitfld.long 0x0 14. "err_crc_vc14,Payload Checksum error detected on virtual channel 14" "0,1"
newline
bitfld.long 0x0 13. "err_crc_vc13,Payload Checksum error detected on virtual channel 13" "0,1"
newline
bitfld.long 0x0 12. "err_crc_vc12,Payload Checksum error detected on virtual channel 12" "0,1"
newline
bitfld.long 0x0 11. "err_crc_vc11,Payload Checksum error detected on virtual channel 11" "0,1"
newline
bitfld.long 0x0 10. "err_crc_vc10,Payload Checksum error detected on virtual channel 10" "0,1"
newline
bitfld.long 0x0 9. "err_crc_vc9,Payload Checksum error detected on virtual channel 9" "0,1"
newline
bitfld.long 0x0 8. "err_crc_vc8,Payload Checksum error detected on virtual channel 8" "0,1"
newline
bitfld.long 0x0 7. "err_crc_vc7,Payload Checksum error detected on virtual channel 7" "0,1"
newline
bitfld.long 0x0 6. "err_crc_vc6,Payload Checksum error detected on virtual channel 6" "0,1"
newline
bitfld.long 0x0 5. "err_crc_vc5,Payload Checksum error detected on virtual channel 5" "0,1"
newline
bitfld.long 0x0 4. "err_crc_vc4,Payload Checksum error detected on virtual channel 4" "0,1"
newline
bitfld.long 0x0 3. "err_crc_vc3,Payload Checksum error detected on virtual channel 3" "0,1"
newline
bitfld.long 0x0 2. "err_crc_vc2,Payload Checksum error detected on virtual channel 2" "0,1"
newline
bitfld.long 0x0 1. "err_crc_vc1,Payload Checksum error detected on virtual channel 1" "0,1"
newline
bitfld.long 0x0 0. "err_crc_vc0,Payload Checksum error detected on virtual channel 0" "0,1"
group.long 0x2B4++0x3
line.long 0x0 "CSI20_INT_MSK_PLD_CRC_FATAL,"
rbitfld.long 0x0 31. "Reserved0,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 30. "Reserved1,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 29. "Reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 28. "Reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 27. "Reserved4,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 26. "Reserved5,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 25. "Reserved6,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 24. "Reserved7,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 23. "Reserved8,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 22. "Reserved9,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 21. "Reserved10,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 20. "Reserved11,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 19. "Reserved12,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 18. "Reserved13,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 17. "Reserved14,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 16. "Reserved15,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 15. "err_crc_vc15,Mask for err_crc_vc15" "0,1"
newline
bitfld.long 0x0 14. "err_crc_vc14,Mask for err_crc_vc14" "0,1"
newline
bitfld.long 0x0 13. "err_crc_vc13,Mask for err_crc_vc13" "0,1"
newline
bitfld.long 0x0 12. "err_crc_vc12,Mask for err_crc_vc12" "0,1"
newline
bitfld.long 0x0 11. "err_crc_vc11,Mask for err_crc_vc11" "0,1"
newline
bitfld.long 0x0 10. "err_crc_vc10,Mask for err_crc_vc10" "0,1"
newline
bitfld.long 0x0 9. "err_crc_vc9,Mask for err_crc_vc9" "0,1"
newline
bitfld.long 0x0 8. "err_crc_vc8,Mask for err_crc_vc8" "0,1"
newline
bitfld.long 0x0 7. "err_crc_vc7,Mask for err_crc_vc7" "0,1"
newline
bitfld.long 0x0 6. "err_crc_vc6,Mask for err_crc_vc6" "0,1"
newline
bitfld.long 0x0 5. "err_crc_vc5,Mask for err_crc_vc5" "0,1"
newline
bitfld.long 0x0 4. "err_crc_vc4,Mask for err_crc_vc4" "0,1"
newline
bitfld.long 0x0 3. "err_crc_vc3,Mask for err_crc_vc3" "0,1"
newline
bitfld.long 0x0 2. "err_crc_vc2,Mask for err_crc_vc2" "0,1"
newline
bitfld.long 0x0 1. "err_crc_vc1,Mask for err_crc_vc1" "0,1"
newline
bitfld.long 0x0 0. "err_crc_vc0,Mask for err_crc_vc0" "0,1"
rgroup.long 0x2C0++0x3
line.long 0x0 "CSI20_INT_ST_DATA_ID,"
bitfld.long 0x0 31. "Reserved0,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 30. "Reserved1,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 29. "Reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 28. "Reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 27. "Reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 26. "Reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 25. "Reserved6,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 24. "Reserved7,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 23. "Reserved8,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 22. "Reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 21. "Reserved10,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 20. "Reserved11,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "Reserved12,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 18. "Reserved13,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 17. "Reserved14,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 16. "Reserved15,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 15. "err_id_vc15,Unrecognized or unimplemented data type detected in virtual channel 15" "0,1"
newline
bitfld.long 0x0 14. "err_id_vc14,Unrecognized or unimplemented data type detected in virtual channel 14" "0,1"
newline
bitfld.long 0x0 13. "err_id_vc13,Unrecognized or unimplemented data type detected in virtual channel 13" "0,1"
newline
bitfld.long 0x0 12. "err_id_vc12,Unrecognized or unimplemented data type detected in virtual channel 12" "0,1"
newline
bitfld.long 0x0 11. "err_id_vc11,Unrecognized or unimplemented data type detected in virtual channel 11" "0,1"
newline
bitfld.long 0x0 10. "err_id_vc10,Unrecognized or unimplemented data type detected in virtual channel 10" "0,1"
newline
bitfld.long 0x0 9. "err_id_vc9,Unrecognized or unimplemented data type detected in virtual channel 9" "0,1"
newline
bitfld.long 0x0 8. "err_id_vc8,Unrecognized or unimplemented data type detected in virtual channel 8" "0,1"
newline
bitfld.long 0x0 7. "err_id_vc7,Unrecognized or unimplemented data type detected in virtual channel 7" "0,1"
newline
bitfld.long 0x0 6. "err_id_vc6,Unrecognized or unimplemented data type detected in virtual channel 6" "0,1"
newline
bitfld.long 0x0 5. "err_id_vc5,Unrecognized or unimplemented data type detected in virtual channel 5" "0,1"
newline
bitfld.long 0x0 4. "err_id_vc4,Unrecognized or unimplemented data type detected in virtual channel 4" "0,1"
newline
bitfld.long 0x0 3. "err_id_vc3,Unrecognized or unimplemented data type detected in virtual channel 3" "0,1"
newline
bitfld.long 0x0 2. "err_id_vc2,Unrecognized or unimplemented data type detected in virtual channel 2" "0,1"
newline
bitfld.long 0x0 1. "err_id_vc1,Unrecognized or unimplemented data type detected in virtual channel 1" "0,1"
newline
bitfld.long 0x0 0. "err_id_vc0,Unrecognized or unimplemented data type detected in virtual channel 0" "0,1"
group.long 0x2C4++0x3
line.long 0x0 "CSI20_INT_MSK_DATA_ID,"
rbitfld.long 0x0 31. "Reserved0,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 30. "Reserved1,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 29. "Reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 28. "Reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 27. "Reserved4,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 26. "Reserved5,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 25. "Reserved6,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 24. "Reserved7,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 23. "Reserved8,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 22. "Reserved9,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 21. "Reserved10,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 20. "Reserved11,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 19. "Reserved12,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 18. "Reserved13,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 17. "Reserved14,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 16. "Reserved15,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 15. "err_id_vc15,Mask for err_id_vc15" "0,1"
newline
bitfld.long 0x0 14. "err_id_vc14,Mask for err_id_vc14" "0,1"
newline
bitfld.long 0x0 13. "err_id_vc13,Mask for err_id_vc13" "0,1"
newline
bitfld.long 0x0 12. "err_id_vc12,Mask for err_id_vc12" "0,1"
newline
bitfld.long 0x0 11. "err_id_vc11,Mask for err_id_vc11" "0,1"
newline
bitfld.long 0x0 10. "err_id_vc10,Mask for err_id_vc10" "0,1"
newline
bitfld.long 0x0 9. "err_id_vc9,Mask for err_id_vc9" "0,1"
newline
bitfld.long 0x0 8. "err_id_vc8,Mask for err_id_vc8" "0,1"
newline
bitfld.long 0x0 7. "err_id_vc7,Mask for err_id_vc7" "0,1"
newline
bitfld.long 0x0 6. "err_id_vc6,Mask for err_id_vc6" "0,1"
newline
bitfld.long 0x0 5. "err_id_vc5,Mask for err_id_vc5" "0,1"
newline
bitfld.long 0x0 4. "err_id_vc4,Mask for err_id_vc4" "0,1"
newline
bitfld.long 0x0 3. "err_id_vc3,Mask for err_id_vc3" "0,1"
newline
bitfld.long 0x0 2. "err_id_vc2,Mask for err_id_vc2" "0,1"
newline
bitfld.long 0x0 1. "err_id_vc1,Mask for err_id_vc1" "0,1"
newline
bitfld.long 0x0 0. "err_id_vc0,Mask for err_id_vc0" "0,1"
rgroup.long 0x2D0++0x3
line.long 0x0 "CSI20_INT_ST_ECC_CORRECTED,"
bitfld.long 0x0 31. "Reserved0,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 30. "Reserved1,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 29. "Reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 28. "Reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 27. "Reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 26. "Reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 25. "Reserved6,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 24. "Reserved7,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 23. "Reserved8,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 22. "Reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 21. "Reserved10,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 20. "Reserved11,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "Reserved12,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 18. "Reserved13,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 17. "Reserved14,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 16. "Reserved15,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 15. "err_ecc_corrected15,C-PHY mode: Header CRC recoverable on virtual channel 15" "0,1"
newline
bitfld.long 0x0 14. "err_ecc_corrected14,C-PHY mode: Header CRC recoverable on virtual channel 14" "0,1"
newline
bitfld.long 0x0 13. "err_ecc_corrected13,C-PHY mode: Header CRC recoverable on virtual channel 13" "0,1"
newline
bitfld.long 0x0 12. "err_ecc_corrected12,C-PHY mode: Header CRC recoverable on virtual channel 12" "0,1"
newline
bitfld.long 0x0 11. "err_ecc_corrected11,C-PHY mode: Header CRC recoverable on virtual channel 11" "0,1"
newline
bitfld.long 0x0 10. "err_ecc_corrected10,C-PHY mode: Header CRC recoverable on virtual channel 10" "0,1"
newline
bitfld.long 0x0 9. "err_ecc_corrected9,C-PHY mode: Header CRC recoverable on virtual channel 9" "0,1"
newline
bitfld.long 0x0 8. "err_ecc_corrected8,C-PHY mode: Header CRC recoverable on virtual channel 8" "0,1"
newline
bitfld.long 0x0 7. "err_ecc_corrected7,C-PHY mode: Header CRC recoverable on virtual channel 7" "0,1"
newline
bitfld.long 0x0 6. "err_ecc_corrected6,C-PHY mode: Header CRC recoverable on virtual channel 6" "0,1"
newline
bitfld.long 0x0 5. "err_ecc_corrected5,C-PHY mode: Header CRC recoverable on virtual channel 5" "0,1"
newline
bitfld.long 0x0 4. "err_ecc_corrected4,C-PHY mode: Header CRC recoverable on virtual channel 4" "0,1"
newline
bitfld.long 0x0 3. "err_ecc_corrected3,C-PHY mode: Header CRC recoverable on virtual channel 3" "0,1"
newline
bitfld.long 0x0 2. "err_ecc_corrected2,C-PHY mode: Header CRC recoverable on virtual channel 2" "0,1"
newline
bitfld.long 0x0 1. "err_ecc_corrected1,C-PHY mode: Header CRC recoverable on virtual channel 1" "0,1"
newline
bitfld.long 0x0 0. "err_ecc_corrected0,C-PHY mode: Header CRC recoverable on virtual channel 0" "0,1"
group.long 0x2D4++0x3
line.long 0x0 "CSI20_INT_MSK_ECC_CORRECTED,"
rbitfld.long 0x0 31. "Reserved0,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 30. "Reserved1,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 29. "Reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 28. "Reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 27. "Reserved4,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 26. "Reserved5,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 25. "Reserved6,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 24. "Reserved7,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 23. "Reserved8,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 22. "Reserved9,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 21. "Reserved10,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 20. "Reserved11,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 19. "Reserved12,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 18. "Reserved13,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 17. "Reserved14,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 16. "Reserved15,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 15. "err_ecc_corrected15,Mask for err_ecc_corrected_vc15" "0,1"
newline
bitfld.long 0x0 14. "err_ecc_corrected14,Mask for err_ecc_corrected_vc14" "0,1"
newline
bitfld.long 0x0 13. "err_ecc_corrected13,Mask for err_ecc_corrected_vc13" "0,1"
newline
bitfld.long 0x0 12. "err_ecc_corrected12,Mask for err_ecc_corrected_vc12" "0,1"
newline
bitfld.long 0x0 11. "err_ecc_corrected11,Mask for err_ecc_corrected_vc11" "0,1"
newline
bitfld.long 0x0 10. "err_ecc_corrected10,Mask for err_ecc_corrected_vc10" "0,1"
newline
bitfld.long 0x0 9. "err_ecc_corrected9,Mask for err_ecc_corrected_vc9" "0,1"
newline
bitfld.long 0x0 8. "err_ecc_corrected8,Mask for err_ecc_corrected_vc8" "0,1"
newline
bitfld.long 0x0 7. "err_ecc_corrected7,Mask for err_ecc_corrected_vc7" "0,1"
newline
bitfld.long 0x0 6. "err_ecc_corrected6,Mask for err_ecc_corrected_vc6" "0,1"
newline
bitfld.long 0x0 5. "err_ecc_corrected5,Mask for err_ecc_corrected_vc5" "0,1"
newline
bitfld.long 0x0 4. "err_ecc_corrected4,Mask for err_ecc_corrected_vc4" "0,1"
newline
bitfld.long 0x0 3. "err_ecc_corrected3,Mask for err_ecc_corrected_vc3" "0,1"
newline
bitfld.long 0x0 2. "err_ecc_corrected2,Mask for err_ecc_corrected_vc2" "0,1"
newline
bitfld.long 0x0 1. "err_ecc_corrected1,Mask for err_ecc_corrected_vc1" "0,1"
newline
bitfld.long 0x0 0. "err_ecc_corrected0,Mask for err_ecc_corrected_vc0" "0,1"
rgroup.long 0x360++0x3
line.long 0x0 "CSI20_INT_ST_FAP_PHY_FATAL,"
hexmask.long.word 0x0 19.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x0 18. "phy_rxinvalidcodehs_2,High Speed Invalid Code Word Detection on lane 2" "0,1"
newline
bitfld.long 0x0 17. "phy_rxinvalidcodehs_1,High Speed Invalid Code Word Detection on lane 1" "0,1"
newline
bitfld.long 0x0 16. "phy_rxinvalidcodehs_0,High Speed Invalid Code Word Detection on lane 0" "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved1,Reserved and read as zero."
newline
bitfld.long 0x0 7. "reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 6. "reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 5. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 4. "reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "phy_errsotsynchs_3,Start of transmission error on data lane 3 (no synchronization achieved)" "0,1"
newline
bitfld.long 0x0 2. "phy_errsotsynchs_2,Start of transmission error on data lane 2 (no synchronization achieved)" "0,1"
newline
bitfld.long 0x0 1. "phy_errsotsynchs_1,Start of transmission error on data lane 1 (no synchronization achieved)" "0,1"
newline
bitfld.long 0x0 0. "phy_errsotsynchs_0,Start of transmission error on data lane 0 (no synchronization achieved)" "0,1"
group.long 0x364++0x7
line.long 0x0 "CSI20_INT_MSK_FAP_PHY_FATAL,"
hexmask.long.word 0x0 19.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x0 18. "mask_phy_rxinvalidcodehs_2,Mask for phy_rxinvalidcodehs_2" "0,1"
newline
bitfld.long 0x0 17. "mask_phy_rxinvalidcodehs_1,Mask for phy_rxinvalidcodehs_1" "0,1"
newline
bitfld.long 0x0 16. "mask_phy_rxinvalidcodehs_0,Mask for phy_rxinvalidcodehs_0" "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved1,Reserved"
newline
rbitfld.long 0x0 7. "reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 6. "reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 5. "reserved4,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 4. "reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "mask_phy_errsotsynchs_3,Mask for phy_errsotsynchs_3" "0,1"
newline
bitfld.long 0x0 2. "mask_phy_errsotsynchs_2,Mask for phy_errsotsynchs_2" "0,1"
newline
bitfld.long 0x0 1. "mask_phy_errsotsynchs_1,Mask for phy_errsotsynchs_1" "0,1"
newline
bitfld.long 0x0 0. "mask_phy_errsotsynchs_0,Mask for phy_errsotsynchs_0" "0,1"
line.long 0x4 "CSI20_INT_FORCE_FAP_PHY_FATAL,"
hexmask.long.word 0x4 19.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x4 18. "force_phy_rxinvalidcodehs_2,Force phy_rxinvalidcodehs_2" "0,1"
newline
bitfld.long 0x4 17. "force_phy_rxinvalidcodehs_1,Force phy_rxinvalidcodehs_1" "0,1"
newline
bitfld.long 0x4 16. "force_phy_rxinvalidcodehs_0,Force phy_rxinvalidcodehs_0" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "reserved1,Reserved"
newline
rbitfld.long 0x4 7. "reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x4 6. "reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x4 5. "reserved4,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x4 4. "reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x4 3. "force_phy_errsotsynchs_3,Force phy_errsotsynchs_3" "0,1"
newline
bitfld.long 0x4 2. "force_phy_errsotsynchs_2,Force phy_errsotsynchs_2" "0,1"
newline
bitfld.long 0x4 1. "force_phy_errsotsynchs_1,Force phy_errsotsynchs_1" "0,1"
newline
bitfld.long 0x4 0. "force_phy_errsotsynchs_0,Force phy_errsotsynchs_0" "0,1"
rgroup.long 0x370++0x3
line.long 0x0 "CSI20_INT_ST_FAP_PKT_FATAL,"
hexmask.long 0x0 2.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x0 1. "shorter_payload,D-PHY mode: Reported greater WC than received  unrecoverable. C-PHY mode: Reported greater WC than received  unrecoverable." "0,1"
newline
bitfld.long 0x0 0. "err_ecc_double,D-PHY mode: Header ECC contains at least 2 errors  unrecoverable. C-PHY mode: Header CRC unrecoverable." "0,1"
group.long 0x374++0x7
line.long 0x0 "CSI20_INT_MSK_FAP_PKT_FATAL,"
hexmask.long 0x0 2.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x0 1. "mask_shorter_payload,Mask for shorter_payload." "0,1"
newline
bitfld.long 0x0 0. "mask_err_ecc_double,Mask for err_ecc_double." "0,1"
line.long 0x4 "CSI20_INT_FORCE_FAP_PKT_FATAL,"
hexmask.long 0x4 2.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x4 1. "force_shorter_payload,Force shorter_payload." "0,1"
newline
bitfld.long 0x4 0. "force_err_ecc_double,Force err_ecc_double." "0,1"
rgroup.long 0x390++0x3
line.long 0x0 "CSI20_INT_ST_FAP_PHY,"
hexmask.long.byte 0x0 24.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x0 23. "reserved1,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 22. "reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 21. "reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 20. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "phy_erresc_3,Escape Entry Error on data lane 3" "0,1"
newline
bitfld.long 0x0 18. "phy_erresc_2,Escape Entry Error on data lane 2" "0,1"
newline
bitfld.long 0x0 17. "phy_erresc_1,Escape Entry Error on data lane 1" "0,1"
newline
bitfld.long 0x0 16. "phy_erresc_0,Escape Entry Error on data lane 0" "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved5,Reserved and read as zero."
newline
bitfld.long 0x0 7. "reserved6,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 6. "reserved7,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 5. "reserved8,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 4. "reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "phy_errsoths_3,Start of transmission error on data lane 3 (synchronization can still be achieved)" "0,1"
newline
bitfld.long 0x0 2. "phy_errsoths_2,Start of transmission error on data lane 2 (synchronization can still be achieved)" "0,1"
newline
bitfld.long 0x0 1. "phy_errsoths_1,Start of transmission error on data lane 1 (synchronization can still be achieved)" "0,1"
newline
bitfld.long 0x0 0. "phy_errsoths_0,Start of transmission error on data lane 0 (synchronization can still be achieved)" "0,1"
group.long 0x394++0x7
line.long 0x0 "CSI20_INT_MSK_FAP_PHY,"
hexmask.long.byte 0x0 24.--31. 1. "reserved0,Reserved and read as zero."
newline
rbitfld.long 0x0 23. "reserved1,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 22. "reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 21. "reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 20. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "mask_phy_erresc_3,Mask for phy_erresc_3" "0,1"
newline
bitfld.long 0x0 18. "mask_phy_erresc_2,Mask for phy_erresc_2" "0,1"
newline
bitfld.long 0x0 17. "mask_phy_erresc_1,Mask for phy_erresc_1" "0,1"
newline
bitfld.long 0x0 16. "mask_phy_erresc_0,Mask for phy_erresc_0" "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved5,Reserved and read as zero."
newline
rbitfld.long 0x0 7. "reserved6,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 6. "reserved7,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 5. "reserved8,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 4. "reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "mask_phy_errsoths_3,Mask for phy_errsoths_3" "0,1"
newline
bitfld.long 0x0 2. "mask_phy_errsoths_2,Mask for phy_errsoths_2" "0,1"
newline
bitfld.long 0x0 1. "mask_phy_errsoths_1,Mask for phy_errsoths_1" "0,1"
newline
bitfld.long 0x0 0. "mask_phy_errsoths_0,Mask for phy_errsoths_0" "0,1"
line.long 0x4 "CSI20_INT_FORCE_FAP_PHY,"
hexmask.long.byte 0x4 24.--31. 1. "reserved0,Reserved and read as zero."
newline
rbitfld.long 0x4 23. "reserved1,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x4 22. "reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x4 21. "reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x4 20. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x4 19. "force_phy_erresc_3,Force phy_erresc_3" "0,1"
newline
bitfld.long 0x4 18. "force_phy_erresc_2,Force phy_erresc_2" "0,1"
newline
bitfld.long 0x4 17. "force_phy_erresc_1,Force phy_erresc_1" "0,1"
newline
bitfld.long 0x4 16. "force_phy_erresc_0,Force phy_erresc_0" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "reserved5,Reserved and read as zero."
newline
rbitfld.long 0x4 7. "reserved6,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x4 6. "reserved7,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x4 5. "reserved8,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x4 4. "reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x4 3. "force_phy_errsoths_3,Force phy_errsoths_3" "0,1"
newline
bitfld.long 0x4 2. "force_phy_errsoths_2,Force phy_errsoths_2" "0,1"
newline
bitfld.long 0x4 1. "force_phy_errsoths_1,Force phy_errsoths_1" "0,1"
newline
bitfld.long 0x4 0. "force_phy_errsoths_0,Force phy_errsoths_0" "0,1"
rgroup.long 0x420++0x3
line.long 0x0 "CSI20_INT_ST_FAP_BNDRY_FRAME_FATAL,"
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x0 15. "err_f_bndry_match_vc15,Error matching Frame Start with Frame End for virtual channel 15" "0,1"
newline
bitfld.long 0x0 14. "err_f_bndry_match_vc14,Error matching Frame Start with Frame End for virtual channel 14" "0,1"
newline
bitfld.long 0x0 13. "err_f_bndry_match_vc13,Error matching Frame Start with Frame End for virtual channel 13" "0,1"
newline
bitfld.long 0x0 12. "err_f_bndry_match_vc12,Error matching Frame Start with Frame End for virtual channel 12" "0,1"
newline
bitfld.long 0x0 11. "err_f_bndry_match_vc11,Error matching Frame Start with Frame End for virtual channel 11" "0,1"
newline
bitfld.long 0x0 10. "err_f_bndry_match_vc10,Error matching Frame Start with Frame End for virtual channel 10" "0,1"
newline
bitfld.long 0x0 9. "err_f_bndry_match_vc9,Error matching Frame Start with Frame End for virtual channel 9" "0,1"
newline
bitfld.long 0x0 8. "err_f_bndry_match_vc8,Error matching Frame Start with Frame End for virtual channel 8" "0,1"
newline
bitfld.long 0x0 7. "err_f_bndry_match_vc7,Error matching Frame Start with Frame End for virtual channel 7" "0,1"
newline
bitfld.long 0x0 6. "err_f_bndry_match_vc6,Error matching Frame Start with Frame End for virtual channel 6" "0,1"
newline
bitfld.long 0x0 5. "err_f_bndry_match_vc5,Error matching Frame Start with Frame End for virtual channel 5" "0,1"
newline
bitfld.long 0x0 4. "err_f_bndry_match_vc4,Error matching Frame Start with Frame End for virtual channel 4" "0,1"
newline
bitfld.long 0x0 3. "err_f_bndry_match_vc3,Error matching Frame Start with Frame End for virtual channel 3" "0,1"
newline
bitfld.long 0x0 2. "err_f_bndry_match_vc2,Error matching Frame Start with Frame End for virtual channel 2" "0,1"
newline
bitfld.long 0x0 1. "err_f_bndry_match_vc1,Error matching Frame Start with Frame End for virtual channel 1" "0,1"
newline
bitfld.long 0x0 0. "err_f_bndry_match_vc0,Error matching Frame Start with Frame End for virtual channel 0" "0,1"
group.long 0x424++0x7
line.long 0x0 "CSI20_INT_MSK_FAP_BNDRY_FRAME_FATAL,"
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x0 15. "err_f_bndry_match_vc15,Mask for err_f_bndry_match_vc15" "0,1"
newline
bitfld.long 0x0 14. "err_f_bndry_match_vc14,Mask for err_f_bndry_match_vc14" "0,1"
newline
bitfld.long 0x0 13. "err_f_bndry_match_vc13,Mask for err_f_bndry_match_vc13" "0,1"
newline
bitfld.long 0x0 12. "err_f_bndry_match_vc12,Mask for err_f_bndry_match_vc12" "0,1"
newline
bitfld.long 0x0 11. "err_f_bndry_match_vc11,Mask for err_f_bndry_match_vc11" "0,1"
newline
bitfld.long 0x0 10. "err_f_bndry_match_vc10,Mask for err_f_bndry_match_vc10" "0,1"
newline
bitfld.long 0x0 9. "err_f_bndry_match_vc9,Mask for err_f_bndry_match_vc9" "0,1"
newline
bitfld.long 0x0 8. "err_f_bndry_match_vc8,Mask for err_f_bndry_match_vc8" "0,1"
newline
bitfld.long 0x0 7. "err_f_bndry_match_vc7,Mask for err_f_bndry_match_vc7" "0,1"
newline
bitfld.long 0x0 6. "err_f_bndry_match_vc6,Mask for err_f_bndry_match_vc6" "0,1"
newline
bitfld.long 0x0 5. "err_f_bndry_match_vc5,Mask for err_f_bndry_match_vc5" "0,1"
newline
bitfld.long 0x0 4. "err_f_bndry_match_vc4,Mask for err_f_bndry_match_vc4" "0,1"
newline
bitfld.long 0x0 3. "err_f_bndry_match_vc3,Mask for err_f_bndry_match_vc3" "0,1"
newline
bitfld.long 0x0 2. "err_f_bndry_match_vc2,Mask for err_f_bndry_match_vc2" "0,1"
newline
bitfld.long 0x0 1. "err_f_bndry_match_vc1,Mask for err_f_bndry_match_vc1" "0,1"
newline
bitfld.long 0x0 0. "err_f_bndry_match_vc0,Mask for err_f_bndry_match_vc0" "0,1"
line.long 0x4 "CSI20_INT_FORCE_FAP_BNDRY_FRAME_FATAL,"
hexmask.long.word 0x4 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x4 15. "err_f_bndry_match_vc15,Force err_f_bndry_match_vc15" "0,1"
newline
bitfld.long 0x4 14. "err_f_bndry_match_vc14,Force err_f_bndry_match_vc14" "0,1"
newline
bitfld.long 0x4 13. "err_f_bndry_match_vc13,Force err_f_bndry_match_vc13" "0,1"
newline
bitfld.long 0x4 12. "err_f_bndry_match_vc12,Force err_f_bndry_match_vc12" "0,1"
newline
bitfld.long 0x4 11. "err_f_bndry_match_vc11,Force err_f_bndry_match_vc11" "0,1"
newline
bitfld.long 0x4 10. "err_f_bndry_match_vc10,Force err_f_bndry_match_vc10" "0,1"
newline
bitfld.long 0x4 9. "err_f_bndry_match_vc9,Force err_f_bndry_match_vc9" "0,1"
newline
bitfld.long 0x4 8. "err_f_bndry_match_vc8,Force err_f_bndry_match_vc8" "0,1"
newline
bitfld.long 0x4 7. "err_f_bndry_match_vc7,Force err_f_bndry_match_vc7" "0,1"
newline
bitfld.long 0x4 6. "err_f_bndry_match_vc6,Force err_f_bndry_match_vc6" "0,1"
newline
bitfld.long 0x4 5. "err_f_bndry_match_vc5,Force err_f_bndry_match_vc5" "0,1"
newline
bitfld.long 0x4 4. "err_f_bndry_match_vc4,Force err_f_bndry_match_vc4" "0,1"
newline
bitfld.long 0x4 3. "err_f_bndry_match_vc3,Force err_f_bndry_match_vc3" "0,1"
newline
bitfld.long 0x4 2. "err_f_bndry_match_vc2,Force err_f_bndry_match_vc2" "0,1"
newline
bitfld.long 0x4 1. "err_f_bndry_match_vc1,Force err_f_bndry_match_vc1" "0,1"
newline
bitfld.long 0x4 0. "err_f_bndry_match_vc0,Force err_f_bndry_match_vc0" "0,1"
rgroup.long 0x430++0x3
line.long 0x0 "CSI20_INT_ST_FAP_SEQ_FRAME_FATAL,"
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x0 15. "err_f_seq_vc15,Incorrect Frame sequence detected in virtual channel 15" "0,1"
newline
bitfld.long 0x0 14. "err_f_seq_vc14,Incorrect Frame sequence detected in virtual channel 14" "0,1"
newline
bitfld.long 0x0 13. "err_f_seq_vc13,Incorrect Frame sequence detected in virtual channel 13" "0,1"
newline
bitfld.long 0x0 12. "err_f_seq_vc12,Incorrect Frame sequence detected in virtual channel 12" "0,1"
newline
bitfld.long 0x0 11. "err_f_seq_vc11,Incorrect Frame sequence detected in virtual channel 11" "0,1"
newline
bitfld.long 0x0 10. "err_f_seq_vc10,Incorrect Frame sequence detected in virtual channel 10" "0,1"
newline
bitfld.long 0x0 9. "err_f_seq_vc9,Incorrect Frame sequence detected in virtual channel 9" "0,1"
newline
bitfld.long 0x0 8. "err_f_seq_vc8,Incorrect Frame sequence detected in virtual channel 8" "0,1"
newline
bitfld.long 0x0 7. "err_f_seq_vc7,Incorrect Frame sequence detected in virtual channel 7" "0,1"
newline
bitfld.long 0x0 6. "err_f_seq_vc6,Incorrect Frame sequence detected in virtual channel 6" "0,1"
newline
bitfld.long 0x0 5. "err_f_seq_vc5,Incorrect Frame sequence detected in virtual channel 5" "0,1"
newline
bitfld.long 0x0 4. "err_f_seq_vc4,Incorrect Frame sequence detected in virtual channel 4" "0,1"
newline
bitfld.long 0x0 3. "err_f_seq_vc3,Incorrect Frame sequence detected in virtual channel 3" "0,1"
newline
bitfld.long 0x0 2. "err_f_seq_vc2,Incorrect Frame sequence detected in virtual channel 2" "0,1"
newline
bitfld.long 0x0 1. "err_f_seq_vc1,Incorrect Frame sequence detected in virtual channel 1" "0,1"
newline
bitfld.long 0x0 0. "err_f_seq_vc0,Incorrect Frame sequence detected in virtual channel 0" "0,1"
group.long 0x434++0x7
line.long 0x0 "CSI20_INT_MSK_FAP_SEQ_FRAME_FATAL,"
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x0 15. "err_f_seq_vc15,Mask for err_f_seq_vc15" "0,1"
newline
bitfld.long 0x0 14. "err_f_seq_vc14,Mask for err_f_seq_vc14" "0,1"
newline
bitfld.long 0x0 13. "err_f_seq_vc13,Mask for err_f_seq_vc13" "0,1"
newline
bitfld.long 0x0 12. "err_f_seq_vc12,Mask for err_f_seq_vc12" "0,1"
newline
bitfld.long 0x0 11. "err_f_seq_vc11,Mask for err_f_seq_vc11" "0,1"
newline
bitfld.long 0x0 10. "err_f_seq_vc10,Mask for err_f_seq_vc10" "0,1"
newline
bitfld.long 0x0 9. "err_f_seq_vc9,Mask for err_f_seq_vc9" "0,1"
newline
bitfld.long 0x0 8. "err_f_seq_vc8,Mask for err_f_seq_vc8" "0,1"
newline
bitfld.long 0x0 7. "err_f_seq_vc7,Mask for err_f_seq_vc7" "0,1"
newline
bitfld.long 0x0 6. "err_f_seq_vc6,Mask for err_f_seq_vc6" "0,1"
newline
bitfld.long 0x0 5. "err_f_seq_vc5,Mask for err_f_seq_vc5" "0,1"
newline
bitfld.long 0x0 4. "err_f_seq_vc4,Mask for err_f_seq_vc4" "0,1"
newline
bitfld.long 0x0 3. "err_f_seq_vc3,Mask for err_f_seq_vc3" "0,1"
newline
bitfld.long 0x0 2. "err_f_seq_vc2,Mask for err_f_seq_vc2" "0,1"
newline
bitfld.long 0x0 1. "err_f_seq_vc1,Mask for err_f_seq_vc1" "0,1"
newline
bitfld.long 0x0 0. "err_f_seq_vc0,Mask for err_f_seq_vc0" "0,1"
line.long 0x4 "CSI20_INT_FORCE_FAP_SEQ_FRAME_FATAL,"
hexmask.long.word 0x4 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x4 15. "err_f_seq_vc15,Force err_f_seq_vc15" "0,1"
newline
bitfld.long 0x4 14. "err_f_seq_vc14,Force err_f_seq_vc14" "0,1"
newline
bitfld.long 0x4 13. "err_f_seq_vc13,Force err_f_seq_vc13" "0,1"
newline
bitfld.long 0x4 12. "err_f_seq_vc12,Force err_f_seq_vc12" "0,1"
newline
bitfld.long 0x4 11. "err_f_seq_vc11,Force err_f_seq_vc11" "0,1"
newline
bitfld.long 0x4 10. "err_f_seq_vc10,Force err_f_seq_vc10" "0,1"
newline
bitfld.long 0x4 9. "err_f_seq_vc9,Force err_f_seq_vc9" "0,1"
newline
bitfld.long 0x4 8. "err_f_seq_vc8,Force err_f_seq_vc8" "0,1"
newline
bitfld.long 0x4 7. "err_f_seq_vc7,Force err_f_seq_vc7" "0,1"
newline
bitfld.long 0x4 6. "err_f_seq_vc6,Force err_f_seq_vc6" "0,1"
newline
bitfld.long 0x4 5. "err_f_seq_vc5,Force err_f_seq_vc5" "0,1"
newline
bitfld.long 0x4 4. "err_f_seq_vc4,Force err_f_seq_vc4" "0,1"
newline
bitfld.long 0x4 3. "err_f_seq_vc3,Force err_f_seq_vc3" "0,1"
newline
bitfld.long 0x4 2. "err_f_seq_vc2,Force err_f_seq_vc2" "0,1"
newline
bitfld.long 0x4 1. "err_f_seq_vc1,Force err_f_seq_vc1" "0,1"
newline
bitfld.long 0x4 0. "err_f_seq_vc0,Force err_f_seq_vc0" "0,1"
rgroup.long 0x450++0x3
line.long 0x0 "CSI20_INT_ST_FAP_PLD_CRC_FATAL,"
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x0 15. "err_crc_vc15,Payload Checksum error detected on virtual channel 15" "0,1"
newline
bitfld.long 0x0 14. "err_crc_vc14,Payload Checksum error detected on virtual channel 14" "0,1"
newline
bitfld.long 0x0 13. "err_crc_vc13,Payload Checksum error detected on virtual channel 13" "0,1"
newline
bitfld.long 0x0 12. "err_crc_vc12,Payload Checksum error detected on virtual channel 12" "0,1"
newline
bitfld.long 0x0 11. "err_crc_vc11,Payload Checksum error detected on virtual channel 11" "0,1"
newline
bitfld.long 0x0 10. "err_crc_vc10,Payload Checksum error detected on virtual channel 10" "0,1"
newline
bitfld.long 0x0 9. "err_crc_vc9,Payload Checksum error detected on virtual channel 9" "0,1"
newline
bitfld.long 0x0 8. "err_crc_vc8,Payload Checksum error detected on virtual channel 8" "0,1"
newline
bitfld.long 0x0 7. "err_crc_vc7,Payload Checksum error detected on virtual channel 7" "0,1"
newline
bitfld.long 0x0 6. "err_crc_vc6,Payload Checksum error detected on virtual channel 6" "0,1"
newline
bitfld.long 0x0 5. "err_crc_vc5,Payload Checksum error detected on virtual channel 5" "0,1"
newline
bitfld.long 0x0 4. "err_crc_vc4,Payload Checksum error detected on virtual channel 4" "0,1"
newline
bitfld.long 0x0 3. "err_crc_vc3,Payload Checksum error detected on virtual channel 3" "0,1"
newline
bitfld.long 0x0 2. "err_crc_vc2,Payload Checksum error detected on virtual channel 2" "0,1"
newline
bitfld.long 0x0 1. "err_crc_vc1,Payload Checksum error detected on virtual channel 1" "0,1"
newline
bitfld.long 0x0 0. "err_crc_vc0,Payload Checksum error detected on virtual channel 0" "0,1"
group.long 0x454++0x7
line.long 0x0 "CSI20_INT_MSK_FAP_PLD_CRC_FATAL,"
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x0 15. "err_crc_vc15,Mask for err_crc_vc15" "0,1"
newline
bitfld.long 0x0 14. "err_crc_vc14,Mask for err_crc_vc14" "0,1"
newline
bitfld.long 0x0 13. "err_crc_vc13,Mask for err_crc_vc13" "0,1"
newline
bitfld.long 0x0 12. "err_crc_vc12,Mask for err_crc_vc12" "0,1"
newline
bitfld.long 0x0 11. "err_crc_vc11,Mask for err_crc_vc11" "0,1"
newline
bitfld.long 0x0 10. "err_crc_vc10,Mask for err_crc_vc10" "0,1"
newline
bitfld.long 0x0 9. "err_crc_vc9,Mask for err_crc_vc9" "0,1"
newline
bitfld.long 0x0 8. "err_crc_vc8,Mask for err_crc_vc8" "0,1"
newline
bitfld.long 0x0 7. "err_crc_vc7,Mask for err_crc_vc7" "0,1"
newline
bitfld.long 0x0 6. "err_crc_vc6,Mask for err_crc_vc6" "0,1"
newline
bitfld.long 0x0 5. "err_crc_vc5,Mask for err_crc_vc5" "0,1"
newline
bitfld.long 0x0 4. "err_crc_vc4,Mask for err_crc_vc4" "0,1"
newline
bitfld.long 0x0 3. "err_crc_vc3,Mask for err_crc_vc3" "0,1"
newline
bitfld.long 0x0 2. "err_crc_vc2,Mask for err_crc_vc2" "0,1"
newline
bitfld.long 0x0 1. "err_crc_vc1,Mask for err_crc_vc1" "0,1"
newline
bitfld.long 0x0 0. "err_crc_vc0,Mask for err_crc_vc0" "0,1"
line.long 0x4 "CSI20_INT_FORCE_FAP_PLD_CRC_FATAL,"
hexmask.long.word 0x4 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x4 15. "err_crc_vc15,Force err_crc_vc15" "0,1"
newline
bitfld.long 0x4 14. "err_crc_vc14,Force err_crc_vc14" "0,1"
newline
bitfld.long 0x4 13. "err_crc_vc13,Force err_crc_vc13" "0,1"
newline
bitfld.long 0x4 12. "err_crc_vc12,Force err_crc_vc12" "0,1"
newline
bitfld.long 0x4 11. "err_crc_vc11,Force err_crc_vc11" "0,1"
newline
bitfld.long 0x4 10. "err_crc_vc10,Force err_crc_vc10" "0,1"
newline
bitfld.long 0x4 9. "err_crc_vc9,Force err_crc_vc9" "0,1"
newline
bitfld.long 0x4 8. "err_crc_vc8,Force err_crc_vc8" "0,1"
newline
bitfld.long 0x4 7. "err_crc_vc7,Force err_crc_vc7" "0,1"
newline
bitfld.long 0x4 6. "err_crc_vc6,Force err_crc_vc6" "0,1"
newline
bitfld.long 0x4 5. "err_crc_vc5,Force err_crc_vc5" "0,1"
newline
bitfld.long 0x4 4. "err_crc_vc4,Force err_crc_vc4" "0,1"
newline
bitfld.long 0x4 3. "err_crc_vc3,Force err_crc_vc3" "0,1"
newline
bitfld.long 0x4 2. "err_crc_vc2,Force err_crc_vc2" "0,1"
newline
bitfld.long 0x4 1. "err_crc_vc1,Force err_crc_vc1" "0,1"
newline
bitfld.long 0x4 0. "err_crc_vc0,Force err_crc_vc0" "0,1"
rgroup.long 0x470++0x3
line.long 0x0 "CSI20_INT_ST_FAP_ECC_CORRECTED,"
bitfld.long 0x0 31. "Reserved0,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 30. "Reserved1,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 29. "Reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 28. "Reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 27. "Reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 26. "Reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 25. "Reserved6,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 24. "Reserved7,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 23. "Reserved8,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 22. "Reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 21. "Reserved10,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 20. "Reserved11,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "Reserved12,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 18. "Reserved13,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 17. "Reserved14,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 16. "Reserved15,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 15. "err_ecc_corrected15,C-PHY mode: Header CRC recoverable on virtual channel 15" "0,1"
newline
bitfld.long 0x0 14. "err_ecc_corrected14,C-PHY mode: Header CRC recoverable on virtual channel 14" "0,1"
newline
bitfld.long 0x0 13. "err_ecc_corrected13,C-PHY mode: Header CRC recoverable on virtual channel 13" "0,1"
newline
bitfld.long 0x0 12. "err_ecc_corrected12,C-PHY mode: Header CRC recoverable on virtual channel 12" "0,1"
newline
bitfld.long 0x0 11. "err_ecc_corrected11,C-PHY mode: Header CRC recoverable on virtual channel 11" "0,1"
newline
bitfld.long 0x0 10. "err_ecc_corrected10,C-PHY mode: Header CRC recoverable on virtual channel 10" "0,1"
newline
bitfld.long 0x0 9. "err_ecc_corrected9,C-PHY mode: Header CRC recoverable on virtual channel 9" "0,1"
newline
bitfld.long 0x0 8. "err_ecc_corrected8,C-PHY mode: Header CRC recoverable on virtual channel 8" "0,1"
newline
bitfld.long 0x0 7. "err_ecc_corrected7,C-PHY mode: Header CRC recoverable on virtual channel 7" "0,1"
newline
bitfld.long 0x0 6. "err_ecc_corrected6,C-PHY mode: Header CRC recoverable on virtual channel 6" "0,1"
newline
bitfld.long 0x0 5. "err_ecc_corrected5,C-PHY mode: Header CRC recoverable on virtual channel 5" "0,1"
newline
bitfld.long 0x0 4. "err_ecc_corrected4,C-PHY mode: Header CRC recoverable on virtual channel 4" "0,1"
newline
bitfld.long 0x0 3. "err_ecc_corrected3,C-PHY mode: Header CRC recoverable on virtual channel 3" "0,1"
newline
bitfld.long 0x0 2. "err_ecc_corrected2,C-PHY mode: Header CRC recoverable on virtual channel 2" "0,1"
newline
bitfld.long 0x0 1. "err_ecc_corrected1,C-PHY mode: Header CRC recoverable on virtual channel 1" "0,1"
newline
bitfld.long 0x0 0. "err_ecc_corrected0,C-PHY mode: Header CRC recoverable on virtual channel 0" "0,1"
group.long 0x474++0x7
line.long 0x0 "CSI20_INT_MSK_FAP_ECC_CORRECTED,"
rbitfld.long 0x0 31. "Reserved0,Reserved" "0,1"
newline
rbitfld.long 0x0 30. "Reserved1,Reserved" "0,1"
newline
rbitfld.long 0x0 29. "Reserved2,Reserved" "0,1"
newline
rbitfld.long 0x0 28. "Reserved3,Reserved" "0,1"
newline
rbitfld.long 0x0 27. "Reserved4,Reserved" "0,1"
newline
rbitfld.long 0x0 26. "Reserved5,Reserved" "0,1"
newline
rbitfld.long 0x0 25. "Reserved6,Reserved" "0,1"
newline
rbitfld.long 0x0 24. "Reserved7,Reserved" "0,1"
newline
rbitfld.long 0x0 23. "Reserved8,Reserved" "0,1"
newline
rbitfld.long 0x0 22. "Reserved9,Reserved" "0,1"
newline
rbitfld.long 0x0 21. "Reserved10,Reserved" "0,1"
newline
rbitfld.long 0x0 20. "Reserved11,Reserved" "0,1"
newline
rbitfld.long 0x0 19. "Reserved12,Reserved" "0,1"
newline
rbitfld.long 0x0 18. "Reserved13,Reserved" "0,1"
newline
rbitfld.long 0x0 17. "Reserved14,Reserved" "0,1"
newline
rbitfld.long 0x0 16. "Reserved15,Reserved" "0,1"
newline
bitfld.long 0x0 15. "err_ecc_corrected15,Mask for err_ecc_corrected_vc15" "0,1"
newline
bitfld.long 0x0 14. "err_ecc_corrected14,Mask for err_ecc_corrected_vc14" "0,1"
newline
bitfld.long 0x0 13. "err_ecc_corrected13,Mask for err_ecc_corrected_vc13" "0,1"
newline
bitfld.long 0x0 12. "err_ecc_corrected12,Mask for err_ecc_corrected_vc12" "0,1"
newline
bitfld.long 0x0 11. "err_ecc_corrected11,Mask for err_ecc_corrected_vc11" "0,1"
newline
bitfld.long 0x0 10. "err_ecc_corrected10,Mask for err_ecc_corrected_vc10" "0,1"
newline
bitfld.long 0x0 9. "err_ecc_corrected9,Mask for err_ecc_corrected_vc9" "0,1"
newline
bitfld.long 0x0 8. "err_ecc_corrected8,Mask for err_ecc_corrected_vc8" "0,1"
newline
bitfld.long 0x0 7. "err_ecc_corrected7,Mask for err_ecc_corrected_vc7" "0,1"
newline
bitfld.long 0x0 6. "err_ecc_corrected6,Mask for err_ecc_corrected_vc6" "0,1"
newline
bitfld.long 0x0 5. "err_ecc_corrected5,Mask for err_ecc_corrected_vc5" "0,1"
newline
bitfld.long 0x0 4. "err_ecc_corrected4,Mask for err_ecc_corrected_vc4" "0,1"
newline
bitfld.long 0x0 3. "err_ecc_corrected3,Mask for err_ecc_corrected_vc3" "0,1"
newline
bitfld.long 0x0 2. "err_ecc_corrected2,Mask for err_ecc_corrected_vc2" "0,1"
newline
bitfld.long 0x0 1. "err_ecc_corrected1,Mask for err_ecc_corrected_vc1" "0,1"
newline
bitfld.long 0x0 0. "err_ecc_corrected0,Mask for err_ecc_corrected_vc0" "0,1"
line.long 0x4 "CSI20_INT_FORCE_FAP_ECC_CORRECTED,"
hexmask.long.word 0x4 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x4 15. "err_ecc_corrected15,Force err_ecc_corrected_vc15" "0,1"
newline
bitfld.long 0x4 14. "err_ecc_corrected14,Force err_ecc_corrected_vc14" "0,1"
newline
bitfld.long 0x4 13. "err_ecc_corrected13,Force err_ecc_corrected_vc13" "0,1"
newline
bitfld.long 0x4 12. "err_ecc_corrected12,Force err_ecc_corrected_vc12" "0,1"
newline
bitfld.long 0x4 11. "err_ecc_corrected11,Force err_ecc_corrected_vc11" "0,1"
newline
bitfld.long 0x4 10. "err_ecc_corrected10,Force err_ecc_corrected_vc10" "0,1"
newline
bitfld.long 0x4 9. "err_ecc_corrected9,Force err_ecc_corrected_vc9" "0,1"
newline
bitfld.long 0x4 8. "err_ecc_corrected8,Force err_ecc_corrected_vc8" "0,1"
newline
bitfld.long 0x4 7. "err_ecc_corrected7,Force err_ecc_corrected_vc7" "0,1"
newline
bitfld.long 0x4 6. "err_ecc_corrected6,Force err_ecc_corrected_vc6" "0,1"
newline
bitfld.long 0x4 5. "err_ecc_corrected5,Force err_ecc_corrected_vc5" "0,1"
newline
bitfld.long 0x4 4. "err_ecc_corrected4,Force err_ecc_corrected_vc4" "0,1"
newline
bitfld.long 0x4 3. "err_ecc_corrected3,Force err_ecc_corrected_vc3" "0,1"
newline
bitfld.long 0x4 2. "err_ecc_corrected2,Force err_ecc_corrected_vc2" "0,1"
newline
bitfld.long 0x4 1. "err_ecc_corrected1,Force err_ecc_corrected_vc1" "0,1"
newline
bitfld.long 0x4 0. "err_ecc_corrected0,Force err_ecc_corrected_vc0" "0,1"
group.long 0x804++0x7
line.long 0x0 "CSI20_FLDC,"
hexmask.long.word 0x0 18.--31. 1. "reserved,Reserved"
newline
bitfld.long 0x0 16.--17. "DET_SEL,Even field detection condition select" "0: The field is detected as the even field when..,1: The field is detected as the even field when..,?,?"
newline
hexmask.long.word 0x0 0.--15. 1. "FLD_Enable,Virtual Channel even field detection control"
line.long 0x4 "CSI20_FLDD,"
hexmask.long.word 0x4 16.--31. 1. "reserved,Reserved"
newline
hexmask.long.word 0x4 0.--15. 1. "FLD_NUM,Even field number setting"
group.long 0x810++0x3
line.long 0x0 "CSI20_IDIC,"
hexmask.long.word 0x0 17.--31. 1. "reserved0,Reserved"
newline
bitfld.long 0x0 16. "DT_SWAP,ISP Output Data Swap Control" "0: SWAP OFF,1: SWAP ON"
newline
hexmask.long.word 0x0 1.--15. 1. "reserved1,Reserved"
newline
bitfld.long 0x0 0. "LS_LE_OPT,ISP Output HD Control" "0: Output HD when DT = long Paket,1: Set DT = LS"
group.long 0x848++0x3
line.long 0x0 "CSI20_OVR1,"
hexmask.long.tbyte 0x0 13.--31. 1. "reserved0,Reserved"
newline
hexmask.long.byte 0x0 9.--12. 1. "forcerxmode_N,Override enable for FRXM/forcerxmode_N"
newline
hexmask.long.word 0x0 0.--8. 1. "reserved1,Reserved"
group.long 0x2000++0x7
line.long 0x0 "CSI20_PHY_EN,"
hexmask.long.tbyte 0x0 8.--31. 1. "reserved0,Reserved"
newline
bitfld.long 0x0 7. "ENABLE_3,ENABLE_3" "0,1"
newline
bitfld.long 0x0 6. "ENABLE_2,ENABLE_2" "0,1"
newline
bitfld.long 0x0 5. "ENABLE_1,ENABLE_1" "0,1"
newline
bitfld.long 0x0 4. "ENABLE_0,ENABLE_0" "0,1"
newline
rbitfld.long 0x0 1.--3. "reserved1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "ENABLECLK,ENABLECLK" "0,1"
line.long 0x4 "CSI20_FRXM,"
hexmask.long 0x4 4.--31. 1. "reserved,Reserved"
newline
bitfld.long 0x4 3. "FORCERXMODE_3,FORCERXMODE_3" "0,1"
newline
bitfld.long 0x4 2. "FORCERXMODE_2,FORCERXMODE_2" "0,1"
newline
bitfld.long 0x4 1. "FORCERXMODE_1,FORCERXMODE_1" "0,1"
newline
bitfld.long 0x4 0. "FORCERXMODE_0,FORCERXMODE_0" "0,1"
group.long 0x2050++0x7
line.long 0x0 "CSI20_PHYPLL,"
hexmask.long.word 0x0 23.--31. 1. "reserved0,Reserved"
newline
hexmask.long.byte 0x0 16.--22. 1. "HSFREQRANGE_6_0,PHY high speed range select bits"
newline
hexmask.long.word 0x0 0.--15. 1. "reserved1,Reserved"
line.long 0x4 "CSI20_CSI0CLKFCPR,"
hexmask.long.byte 0x4 24.--31. 1. "reserved0,Reserved"
newline
hexmask.long.byte 0x4 16.--23. 1. "CSI0CLKFREQRANGE_7_0,CSI0phy frequency configuration"
newline
hexmask.long.word 0x4 0.--15. 1. "reserved1,Reserved"
group.long 0x2060++0x3
line.long 0x0 "CSI20_PHTW,"
hexmask.long.byte 0x0 25.--31. 1. "reserved0,Reserved"
newline
bitfld.long 0x0 24. "DWEN,TESTDIN_DATA enable" "0: Disable,1: Enable"
newline
hexmask.long.byte 0x0 16.--23. 1. "TESTDIN_DATA,TESTDATE Input for DATA"
newline
hexmask.long.byte 0x0 9.--15. 1. "reserved1,Reserved"
newline
bitfld.long 0x0 8. "CWEN,TESTDIN_CODE enable" "0: Disable,1: Enable"
newline
hexmask.long.byte 0x0 0.--7. 1. "TESTDIN_CODE,TESTDATE Input for CODE"
rgroup.long 0x2064++0x3
line.long 0x0 "CSI20_PHTR,"
hexmask.long.byte 0x0 24.--31. 1. "reserved0,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "TESTDOUT,Those bits are TESTDIN_DATA loopback value from CSI2 PHY."
newline
hexmask.long.word 0x0 0.--15. 1. "reserved1,Reserved"
group.long 0x2068++0x3
line.long 0x0 "CSI20_PHTC,"
hexmask.long.word 0x0 18.--31. 1. "reserved0,Reserved"
newline
bitfld.long 0x0 16.--17. "TEST_PERIOD,Control TESTCLK divider" "0: divide by 1,1: divide by 2,?,?"
newline
hexmask.long.word 0x0 1.--15. 1. "reserved1,Reserved"
newline
bitfld.long 0x0 0. "TESTCLR,This bit sets TESTCLR of the PHY." "0,1"
rgroup.long 0x2814++0x3
line.long 0x0 "CSI20_ST_PHYST,"
bitfld.long 0x0 31. "ST_PHY_READY,ST_PHY_READY (fixed to 0)" "0,1"
newline
hexmask.long.word 0x0 18.--30. 1. "reserved0,Reserved"
newline
hexmask.long.word 0x0 8.--17. 1. "Reserved,Reserved"
newline
bitfld.long 0x0 7. "ST_STOPSTATE_DCK,ST_STOPSTATE_DCK (stopstateclk)" "0,1"
newline
bitfld.long 0x0 4.--6. "reserved1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 3. "ST_STOPSTATE_3,ST_STOPSTATE_3 (stopstatedata_3)" "0,1"
newline
bitfld.long 0x0 2. "ST_STOPSTATE_2,ST_STOPSTATE_2 (stopstatedata_2)" "0,1"
newline
bitfld.long 0x0 1. "ST_STOPSTATE_1,ST_STOPSTATE_1 (stopstatedata_1)" "0,1"
newline
bitfld.long 0x0 0. "ST_STOPSTATE_0,ST_STOPSTATE_0 (stopstatedata_0)" "0,1"
tree.end
tree "CSI_1"
base ad:0xFE540000
rgroup.long 0x0++0x3
line.long 0x0 "CSI21_VERSION,"
hexmask.long 0x0 0.--31. 1. "version,This field indicates the version of the LINK."
group.long 0x4++0x7
line.long 0x0 "CSI21_N_LANES,"
hexmask.long 0x0 3.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x0 0.--2. "n_lanes,This can only be updated when the PHY lane is in stopstate.Number of active data lanes:" "0,1,2,3,4,5,6,7"
line.long 0x4 "CSI21_CSI2_RESETN,"
hexmask.long 0x4 1.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x4 0. "csi2_resetn,LINK and PHY reset output. Active Low." "0,1"
rgroup.long 0xC++0x3
line.long 0x0 "CSI21_INT_ST_MAIN,"
hexmask.long.byte 0x0 26.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x0 25. "reserved1,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 24. "reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 23. "reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 22. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 21. "reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 20. "reserved6,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "reserved7,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 18. "reserved8,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 17. "status_int_line,Status of int_st_line" "0,1"
newline
bitfld.long 0x0 16. "status_int_phy,Status of int_st_phy." "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved9,Reserved and read as zero."
newline
bitfld.long 0x0 7. "status_int_ecc_corrected,Status of int_ecc_corrected." "0,1"
newline
bitfld.long 0x0 6. "status_int_data_id,Status of int_data_id." "0,1"
newline
bitfld.long 0x0 5. "status_int_pld_crc_fatal,Status of int_pld_crc_fatal." "0,1"
newline
bitfld.long 0x0 4. "status_int_crc_frame_fatal,Status of int_crc_frame_fatal." "0,1"
newline
bitfld.long 0x0 3. "status_int_seq_frame_fatal,Status of int_seq_frame_fatal." "0,1"
newline
bitfld.long 0x0 2. "status_int_bndry_frame_fatal,Status of int_st_bndry_frame_fatal." "0,1"
newline
bitfld.long 0x0 1. "status_int_pkt_fatal,Status of int_st_pkt_fatal." "0,1"
newline
bitfld.long 0x0 0. "status_int_phy_fatal,Status of int_st_phy_fatal." "0,1"
group.long 0x10++0x3
line.long 0x0 "CSI21_DATA_IDS_1,"
rbitfld.long 0x0 30.--31. "reserved0,Reserved and read as zero." "0,1,2,3"
newline
hexmask.long.byte 0x0 24.--29. 1. "di3_dt,Data type for programmed data ID 3."
newline
rbitfld.long 0x0 22.--23. "reserved1,Reserved and read as zero." "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--21. 1. "di2_dt,Data type for programmed Data ID 2."
newline
rbitfld.long 0x0 14.--15. "reserved2,Reserved and read as zero." "0,1,2,3"
newline
hexmask.long.byte 0x0 8.--13. 1. "di1_dt,Data type for programmed data ID 1."
newline
rbitfld.long 0x0 6.--7. "reserved3,Reserved and read as zero." "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "di0_dt,Data type for programmed data ID 0."
group.long 0x1C++0x3
line.long 0x0 "CSI21_PHY_MODE,"
hexmask.long 0x0 1.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x0 0. "phy_mode,Select the PHY interface:" "0,1"
group.long 0x30++0x3
line.long 0x0 "CSI21_DATA_IDS_VC_1,"
rbitfld.long 0x0 29.--31. "reserved0,Reserved and read as zero." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "di3_vcx_2,Virtual channel extension extra bit for programmed data ID 3" "0,1"
newline
bitfld.long 0x0 26.--27. "di3_vcx_0_1,Virtual channel extension for programmed data ID 3." "0,1,2,3"
newline
bitfld.long 0x0 24.--25. "di3_vc,Virtual channel for programmed data ID 3." "0,1,2,3"
newline
rbitfld.long 0x0 21.--23. "reserved1,Reserved and read as zero." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "di2_vcx_2,Virtual channel extension extra bit for programmed data ID 2" "0,1"
newline
bitfld.long 0x0 18.--19. "di2_vcx_0_1,Virtual channel extension for programmed data ID 2." "0,1,2,3"
newline
bitfld.long 0x0 16.--17. "di2_vc,Virtual channel for programmed data ID 2." "0,1,2,3"
newline
rbitfld.long 0x0 13.--15. "reserved2,Reserved and read as zero." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "di1_vcx_2,Virtual channel extension extra bit for programmed data ID 1" "0,1"
newline
bitfld.long 0x0 10.--11. "di1_vcx_0_1,Virtual channel extension for programmed data ID 1." "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "di1_vc,Virtual channel for programmed data ID 1." "0,1,2,3"
newline
rbitfld.long 0x0 5.--7. "reserved3,Reserved and read as zero." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "di0_vcx_2,Virtual channel extension extra bit for programmed data ID 0" "0,1"
newline
bitfld.long 0x0 2.--3. "di0_vcx_0_1,Virtual channel extension for programmed data ID 0." "0,1,2,3"
newline
bitfld.long 0x0 0.--1. "di0_vc,Virtual channel for programmed data ID 0." "0,1,2,3"
group.long 0x40++0x7
line.long 0x0 "CSI21_PHY_SHUTDOWNZ,"
hexmask.long 0x0 1.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x0 0. "phy_shutdownz,Shutdown input. This line is used to place the complete macro in power down. All analog blocks are in power down mode and digital logic is cleared. Active Low." "0,1"
line.long 0x4 "CSI21_DPHY_RSTZ,"
hexmask.long 0x4 1.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x4 0. "dphy_rstz,PHY reset output. Active Low." "0,1"
rgroup.long 0x48++0x7
line.long 0x0 "CSI21_PHY_RX,"
hexmask.long.word 0x0 18.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x0 17. "phy_rxclkactivehs,Indicates that D-PHY clock lane is actively receiving a DDR clock" "0,1"
newline
bitfld.long 0x0 16. "phy_rxulpsclknot,Active Low. This signal indicates that D-PHY Clock Lane module has entered the Ultra Low Power state" "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved1,Reserved and read as zero."
newline
bitfld.long 0x0 7. "reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 6. "reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 5. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 4. "reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "phy_rxulpsesc_3,Lane module 3 has entered the Ultra Low Power mode" "0,1"
newline
bitfld.long 0x0 2. "phy_rxulpsesc_2,Lane module 2 has entered the Ultra Low Power mode" "0,1"
newline
bitfld.long 0x0 1. "phy_rxulpsesc_1,Lane module 1 has entered the Ultra Low Power mode" "0,1"
newline
bitfld.long 0x0 0. "phy_rxulpsesc_0,Lane module 0 has entered the Ultra Low Power mode." "0,1"
line.long 0x4 "CSI21_PHY_STOPSTATE,"
hexmask.long.word 0x4 17.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x4 16. "phy_stopstateclk,D-PHY Clock lane in Stop state" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "reserved1,Reserved and read as zero."
newline
bitfld.long 0x4 7. "reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x4 6. "reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x4 5. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x4 4. "reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x4 3. "phy_stopstatedata_3,Data lane 3 in Stop state" "0,1"
newline
bitfld.long 0x4 2. "phy_stopstatedata_2,Data lane 2 in Stop state" "0,1"
newline
bitfld.long 0x4 1. "phy_stopstatedata_1,Data lane 1 in Stop state" "0,1"
newline
bitfld.long 0x4 0. "phy_stopstatedata_0,Data lane 0 in Stop state" "0,1"
rgroup.long 0xCC++0x3
line.long 0x0 "CSI21_PHY_CAL,"
hexmask.long 0x0 1.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x0 0. "rxskewcalhs,A low-to-high transition on rxskewcalhs signal means that the PHY has initiated the de-skew calibration." "0,1"
rgroup.long 0xE0++0x3
line.long 0x0 "CSI21_INT_ST_PHY_FATAL,"
hexmask.long.word 0x0 19.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x0 18. "phy_rxinvalidcodehs_2,High Speed Invalid Code Word Detection on lane 2" "0,1"
newline
bitfld.long 0x0 17. "phy_rxinvalidcodehs_1,High Speed Invalid Code Word Detection on lane 1" "0,1"
newline
bitfld.long 0x0 16. "phy_rxinvalidcodehs_0,High Speed Invalid Code Word Detection on lane 0" "0,1"
newline
hexmask.long.byte 0x0 9.--15. 1. "reserved1,Reserved and read as zero."
newline
bitfld.long 0x0 8. "err_deskew,Reports whenever data is lost due to an existent skew between lanes greater than 2 rxwordclkhs" "0,1"
newline
bitfld.long 0x0 7. "reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 6. "reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 5. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 4. "reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "phy_errsotsynchs_3,Start of transmission error on data lane 3 (no synchronization achieved)" "0,1"
newline
bitfld.long 0x0 2. "phy_errsotsynchs_2,Start of transmission error on data lane 2 (no synchronization achieved)" "0,1"
newline
bitfld.long 0x0 1. "phy_errsotsynchs_1,Start of transmission error on data lane 1 (no synchronization achieved)" "0,1"
newline
bitfld.long 0x0 0. "phy_errsotsynchs_0,Start of transmission error on data lane 0 (no synchronization achieved)." "0,1"
group.long 0xE4++0x3
line.long 0x0 "CSI21_INT_MSK_PHY_FATAL,"
hexmask.long.word 0x0 19.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x0 18. "mask_phy_rxinvalidcodehs_2,Mask for phy_rxinvalidcodehs_2" "0,1"
newline
bitfld.long 0x0 17. "mask_phy_rxinvalidcodehs_1,Mask for phy_rxinvalidcodehs_1" "0,1"
newline
bitfld.long 0x0 16. "mask_phy_rxinvalidcodehs_0,Mask for phy_rxinvalidcodehs_0" "0,1"
newline
hexmask.long.byte 0x0 9.--15. 1. "reserved1,Reserved and read as zero."
newline
bitfld.long 0x0 8. "err_deskew,Mask for err_deskew" "0,1"
newline
rbitfld.long 0x0 7. "reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 6. "reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 5. "reserved4,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 4. "reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "mask_phy_errsotsynchs_3,Mask for phy_errsotsynchs_3" "0,1"
newline
bitfld.long 0x0 2. "mask_phy_errsotsynchs_2,Mask for phy_errsotsynchs_2" "0,1"
newline
bitfld.long 0x0 1. "mask_phy_errsotsynchs_1,Mask for phy_errsotsynchs_1" "0,1"
newline
bitfld.long 0x0 0. "mask_phy_errsotsynchs_0,Mask for phy_errsotsynchs_0" "0,1"
rgroup.long 0xF0++0x3
line.long 0x0 "CSI21_INT_ST_PKT_FATAL,"
hexmask.long 0x0 2.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x0 1. "shorter_payload,D-PHY mode: Reported greater WC than received  unrecoverable. C-PHY mode: Reported greater WC than received  unrecoverable." "0,1"
newline
bitfld.long 0x0 0. "err_ecc_double,D-PHY mode: Header ECC contains at least 2 errors  unrecoverable. C-PHY mode: Header CRC unrecoverable." "0,1"
group.long 0xF4++0x3
line.long 0x0 "CSI21_INT_MSK_PKT_FATAL,"
hexmask.long 0x0 2.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x0 1. "mask_shorter_payload,Mask for shorter_payload." "0,1"
newline
bitfld.long 0x0 0. "mask_err_ecc_double,Mask for err_ecc_double." "0,1"
rgroup.long 0x110++0x3
line.long 0x0 "CSI21_INT_ST_PHY,"
hexmask.long.byte 0x0 24.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x0 23. "reserved1,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 22. "reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 21. "reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 20. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "phy_erresc_3,Escape Entry Error on data lane 3" "0,1"
newline
bitfld.long 0x0 18. "phy_erresc_2,Escape Entry Error on data lane 2" "0,1"
newline
bitfld.long 0x0 17. "phy_erresc_1,Escape Entry Error on data lane 1" "0,1"
newline
bitfld.long 0x0 16. "phy_erresc_0,Escape Entry Error on data lane 0" "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved5,Reserved and read as zero."
newline
bitfld.long 0x0 7. "reserved6,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 6. "reserved7,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 5. "reserved8,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 4. "reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "phy_errsoths_3,Start of transmission error on data lane 3 (synchronization can still be achieved)" "0,1"
newline
bitfld.long 0x0 2. "phy_errsoths_2,Start of transmission error on data lane 2 (synchronization can still be achieved)" "0,1"
newline
bitfld.long 0x0 1. "phy_errsoths_1,Start of transmission error on data lane 1 (synchronization can still be achieved)" "0,1"
newline
bitfld.long 0x0 0. "phy_errsoths_0,Start of transmission error on data lane 0 (synchronization can still be achieved)" "0,1"
group.long 0x114++0x3
line.long 0x0 "CSI21_INT_MSK_PHY,"
hexmask.long.byte 0x0 24.--31. 1. "reserved0,Reserved and read as zero."
newline
rbitfld.long 0x0 23. "reserved1,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 22. "reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 21. "reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 20. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "mask_phy_erresc_3,Mask for phy_erresc_3" "0,1"
newline
bitfld.long 0x0 18. "mask_phy_erresc_2,Mask for phy_erresc_2" "0,1"
newline
bitfld.long 0x0 17. "mask_phy_erresc_1,Mask for phy_erresc_1" "0,1"
newline
bitfld.long 0x0 16. "mask_phy_erresc_0,Mask for phy_erresc_0" "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved5,Reserved and read as zero."
newline
rbitfld.long 0x0 7. "reserved6,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 6. "reserved7,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 5. "reserved8,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 4. "reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "mask_phy_errsoths_3,Mask for phy_errsoths_3" "0,1"
newline
bitfld.long 0x0 2. "mask_phy_errsoths_2,Mask for phy_errsoths_2" "0,1"
newline
bitfld.long 0x0 1. "mask_phy_errsoths_1,Mask for phy_errsoths_1" "0,1"
newline
bitfld.long 0x0 0. "mask_phy_errsoths_0,Mask for phy_errsoths_0" "0,1"
rgroup.long 0x130++0x3
line.long 0x0 "CSI21_INT_ST_LINE,"
hexmask.long.byte 0x0 24.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x0 23. "reserved1,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 22. "reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 21. "reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 20. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "err_l_seq_di3,Error in the sequence of lines for vc3 and dt3" "0,1"
newline
bitfld.long 0x0 18. "err_l_seq_di2,Error in the sequence of lines for vc2 and dt2" "0,1"
newline
bitfld.long 0x0 17. "err_l_seq_di1,Error in the sequence of lines for vc1 and dt1" "0,1"
newline
bitfld.long 0x0 16. "err_l_seq_di0,Error in the sequence of lines for vc0 and dt0" "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved5,Reserved and read as zero."
newline
bitfld.long 0x0 7. "reserved6,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 6. "reserved7,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 5. "reserved8,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 4. "reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "err_l_bndry_match_di3,Error matching line start with line end for vc3 and dt3" "0,1"
newline
bitfld.long 0x0 2. "err_l_bndry_match_di2,Error matching line start with line end for vc2 and dt2" "0,1"
newline
bitfld.long 0x0 1. "err_l_bndry_match_di1,Error matching line start with line end for vc1 and dt1" "0,1"
newline
bitfld.long 0x0 0. "err_l_bndry_match_di0,Error matching line start with line end for vc0 and dt0" "0,1"
group.long 0x134++0x3
line.long 0x0 "CSI21_INT_MSK_LINE,"
hexmask.long.byte 0x0 24.--31. 1. "reserved0,Reserved and read as zero."
newline
rbitfld.long 0x0 23. "reserved1,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 22. "reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 21. "reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 20. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "mask_err_l_seq_di3,Mask for err_l_seq_di3" "0,1"
newline
bitfld.long 0x0 18. "mask_err_l_seq_di2,Mask for err_l_seq_di2" "0,1"
newline
bitfld.long 0x0 17. "mask_err_l_seq_di1,Mask for err_l_seq_di1" "0,1"
newline
bitfld.long 0x0 16. "mask_err_l_seq_di0,Mask for err_l_seq_di0" "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved5,Reserved and read as zero."
newline
rbitfld.long 0x0 7. "reserved6,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 6. "reserved7,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 5. "reserved8,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 4. "reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "mask_err_l_bndry_match_di3,Mask for err_l_bndry_match_di3" "0,1"
newline
bitfld.long 0x0 2. "mask_err_l_bndry_match_di2,Mask for err_l_bndry_match_di2" "0,1"
newline
bitfld.long 0x0 1. "mask_err_l_bndry_match_di1,Mask for err_l_bndry_match_di1" "0,1"
newline
bitfld.long 0x0 0. "mask_err_l_bndry_match_di0,Mask for err_l_bndry_match_di0" "0,1"
rgroup.long 0x2B0++0x3
line.long 0x0 "CSI21_INT_ST_PLD_CRC_FATAL,"
bitfld.long 0x0 31. "Reserved0,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 30. "Reserved1,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 29. "Reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 28. "Reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 27. "Reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 26. "Reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 25. "Reserved6,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 24. "Reserved7,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 23. "Reserved8,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 22. "Reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 21. "Reserved10,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 20. "Reserved11,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "Reserved12,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 18. "Reserved13,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 17. "Reserved14,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 16. "Reserved15,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 15. "err_crc_vc15,Payload Checksum error detected on virtual channel 15" "0,1"
newline
bitfld.long 0x0 14. "err_crc_vc14,Payload Checksum error detected on virtual channel 14" "0,1"
newline
bitfld.long 0x0 13. "err_crc_vc13,Payload Checksum error detected on virtual channel 13" "0,1"
newline
bitfld.long 0x0 12. "err_crc_vc12,Payload Checksum error detected on virtual channel 12" "0,1"
newline
bitfld.long 0x0 11. "err_crc_vc11,Payload Checksum error detected on virtual channel 11" "0,1"
newline
bitfld.long 0x0 10. "err_crc_vc10,Payload Checksum error detected on virtual channel 10" "0,1"
newline
bitfld.long 0x0 9. "err_crc_vc9,Payload Checksum error detected on virtual channel 9" "0,1"
newline
bitfld.long 0x0 8. "err_crc_vc8,Payload Checksum error detected on virtual channel 8" "0,1"
newline
bitfld.long 0x0 7. "err_crc_vc7,Payload Checksum error detected on virtual channel 7" "0,1"
newline
bitfld.long 0x0 6. "err_crc_vc6,Payload Checksum error detected on virtual channel 6" "0,1"
newline
bitfld.long 0x0 5. "err_crc_vc5,Payload Checksum error detected on virtual channel 5" "0,1"
newline
bitfld.long 0x0 4. "err_crc_vc4,Payload Checksum error detected on virtual channel 4" "0,1"
newline
bitfld.long 0x0 3. "err_crc_vc3,Payload Checksum error detected on virtual channel 3" "0,1"
newline
bitfld.long 0x0 2. "err_crc_vc2,Payload Checksum error detected on virtual channel 2" "0,1"
newline
bitfld.long 0x0 1. "err_crc_vc1,Payload Checksum error detected on virtual channel 1" "0,1"
newline
bitfld.long 0x0 0. "err_crc_vc0,Payload Checksum error detected on virtual channel 0" "0,1"
group.long 0x2B4++0x3
line.long 0x0 "CSI21_INT_MSK_PLD_CRC_FATAL,"
rbitfld.long 0x0 31. "Reserved0,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 30. "Reserved1,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 29. "Reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 28. "Reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 27. "Reserved4,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 26. "Reserved5,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 25. "Reserved6,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 24. "Reserved7,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 23. "Reserved8,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 22. "Reserved9,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 21. "Reserved10,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 20. "Reserved11,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 19. "Reserved12,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 18. "Reserved13,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 17. "Reserved14,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 16. "Reserved15,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 15. "err_crc_vc15,Mask for err_crc_vc15" "0,1"
newline
bitfld.long 0x0 14. "err_crc_vc14,Mask for err_crc_vc14" "0,1"
newline
bitfld.long 0x0 13. "err_crc_vc13,Mask for err_crc_vc13" "0,1"
newline
bitfld.long 0x0 12. "err_crc_vc12,Mask for err_crc_vc12" "0,1"
newline
bitfld.long 0x0 11. "err_crc_vc11,Mask for err_crc_vc11" "0,1"
newline
bitfld.long 0x0 10. "err_crc_vc10,Mask for err_crc_vc10" "0,1"
newline
bitfld.long 0x0 9. "err_crc_vc9,Mask for err_crc_vc9" "0,1"
newline
bitfld.long 0x0 8. "err_crc_vc8,Mask for err_crc_vc8" "0,1"
newline
bitfld.long 0x0 7. "err_crc_vc7,Mask for err_crc_vc7" "0,1"
newline
bitfld.long 0x0 6. "err_crc_vc6,Mask for err_crc_vc6" "0,1"
newline
bitfld.long 0x0 5. "err_crc_vc5,Mask for err_crc_vc5" "0,1"
newline
bitfld.long 0x0 4. "err_crc_vc4,Mask for err_crc_vc4" "0,1"
newline
bitfld.long 0x0 3. "err_crc_vc3,Mask for err_crc_vc3" "0,1"
newline
bitfld.long 0x0 2. "err_crc_vc2,Mask for err_crc_vc2" "0,1"
newline
bitfld.long 0x0 1. "err_crc_vc1,Mask for err_crc_vc1" "0,1"
newline
bitfld.long 0x0 0. "err_crc_vc0,Mask for err_crc_vc0" "0,1"
rgroup.long 0x2C0++0x3
line.long 0x0 "CSI21_INT_ST_DATA_ID,"
bitfld.long 0x0 31. "Reserved0,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 30. "Reserved1,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 29. "Reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 28. "Reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 27. "Reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 26. "Reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 25. "Reserved6,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 24. "Reserved7,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 23. "Reserved8,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 22. "Reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 21. "Reserved10,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 20. "Reserved11,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "Reserved12,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 18. "Reserved13,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 17. "Reserved14,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 16. "Reserved15,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 15. "err_id_vc15,Unrecognized or unimplemented data type detected in virtual channel 15" "0,1"
newline
bitfld.long 0x0 14. "err_id_vc14,Unrecognized or unimplemented data type detected in virtual channel 14" "0,1"
newline
bitfld.long 0x0 13. "err_id_vc13,Unrecognized or unimplemented data type detected in virtual channel 13" "0,1"
newline
bitfld.long 0x0 12. "err_id_vc12,Unrecognized or unimplemented data type detected in virtual channel 12" "0,1"
newline
bitfld.long 0x0 11. "err_id_vc11,Unrecognized or unimplemented data type detected in virtual channel 11" "0,1"
newline
bitfld.long 0x0 10. "err_id_vc10,Unrecognized or unimplemented data type detected in virtual channel 10" "0,1"
newline
bitfld.long 0x0 9. "err_id_vc9,Unrecognized or unimplemented data type detected in virtual channel 9" "0,1"
newline
bitfld.long 0x0 8. "err_id_vc8,Unrecognized or unimplemented data type detected in virtual channel 8" "0,1"
newline
bitfld.long 0x0 7. "err_id_vc7,Unrecognized or unimplemented data type detected in virtual channel 7" "0,1"
newline
bitfld.long 0x0 6. "err_id_vc6,Unrecognized or unimplemented data type detected in virtual channel 6" "0,1"
newline
bitfld.long 0x0 5. "err_id_vc5,Unrecognized or unimplemented data type detected in virtual channel 5" "0,1"
newline
bitfld.long 0x0 4. "err_id_vc4,Unrecognized or unimplemented data type detected in virtual channel 4" "0,1"
newline
bitfld.long 0x0 3. "err_id_vc3,Unrecognized or unimplemented data type detected in virtual channel 3" "0,1"
newline
bitfld.long 0x0 2. "err_id_vc2,Unrecognized or unimplemented data type detected in virtual channel 2" "0,1"
newline
bitfld.long 0x0 1. "err_id_vc1,Unrecognized or unimplemented data type detected in virtual channel 1" "0,1"
newline
bitfld.long 0x0 0. "err_id_vc0,Unrecognized or unimplemented data type detected in virtual channel 0" "0,1"
group.long 0x2C4++0x3
line.long 0x0 "CSI21_INT_MSK_DATA_ID,"
rbitfld.long 0x0 31. "Reserved0,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 30. "Reserved1,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 29. "Reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 28. "Reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 27. "Reserved4,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 26. "Reserved5,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 25. "Reserved6,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 24. "Reserved7,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 23. "Reserved8,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 22. "Reserved9,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 21. "Reserved10,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 20. "Reserved11,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 19. "Reserved12,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 18. "Reserved13,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 17. "Reserved14,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 16. "Reserved15,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 15. "err_id_vc15,Mask for err_id_vc15" "0,1"
newline
bitfld.long 0x0 14. "err_id_vc14,Mask for err_id_vc14" "0,1"
newline
bitfld.long 0x0 13. "err_id_vc13,Mask for err_id_vc13" "0,1"
newline
bitfld.long 0x0 12. "err_id_vc12,Mask for err_id_vc12" "0,1"
newline
bitfld.long 0x0 11. "err_id_vc11,Mask for err_id_vc11" "0,1"
newline
bitfld.long 0x0 10. "err_id_vc10,Mask for err_id_vc10" "0,1"
newline
bitfld.long 0x0 9. "err_id_vc9,Mask for err_id_vc9" "0,1"
newline
bitfld.long 0x0 8. "err_id_vc8,Mask for err_id_vc8" "0,1"
newline
bitfld.long 0x0 7. "err_id_vc7,Mask for err_id_vc7" "0,1"
newline
bitfld.long 0x0 6. "err_id_vc6,Mask for err_id_vc6" "0,1"
newline
bitfld.long 0x0 5. "err_id_vc5,Mask for err_id_vc5" "0,1"
newline
bitfld.long 0x0 4. "err_id_vc4,Mask for err_id_vc4" "0,1"
newline
bitfld.long 0x0 3. "err_id_vc3,Mask for err_id_vc3" "0,1"
newline
bitfld.long 0x0 2. "err_id_vc2,Mask for err_id_vc2" "0,1"
newline
bitfld.long 0x0 1. "err_id_vc1,Mask for err_id_vc1" "0,1"
newline
bitfld.long 0x0 0. "err_id_vc0,Mask for err_id_vc0" "0,1"
rgroup.long 0x2D0++0x3
line.long 0x0 "CSI21_INT_ST_ECC_CORRECTED,"
bitfld.long 0x0 31. "Reserved0,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 30. "Reserved1,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 29. "Reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 28. "Reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 27. "Reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 26. "Reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 25. "Reserved6,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 24. "Reserved7,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 23. "Reserved8,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 22. "Reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 21. "Reserved10,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 20. "Reserved11,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "Reserved12,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 18. "Reserved13,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 17. "Reserved14,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 16. "Reserved15,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 15. "err_ecc_corrected15,C-PHY mode: Header CRC recoverable on virtual channel 15" "0,1"
newline
bitfld.long 0x0 14. "err_ecc_corrected14,C-PHY mode: Header CRC recoverable on virtual channel 14" "0,1"
newline
bitfld.long 0x0 13. "err_ecc_corrected13,C-PHY mode: Header CRC recoverable on virtual channel 13" "0,1"
newline
bitfld.long 0x0 12. "err_ecc_corrected12,C-PHY mode: Header CRC recoverable on virtual channel 12" "0,1"
newline
bitfld.long 0x0 11. "err_ecc_corrected11,C-PHY mode: Header CRC recoverable on virtual channel 11" "0,1"
newline
bitfld.long 0x0 10. "err_ecc_corrected10,C-PHY mode: Header CRC recoverable on virtual channel 10" "0,1"
newline
bitfld.long 0x0 9. "err_ecc_corrected9,C-PHY mode: Header CRC recoverable on virtual channel 9" "0,1"
newline
bitfld.long 0x0 8. "err_ecc_corrected8,C-PHY mode: Header CRC recoverable on virtual channel 8" "0,1"
newline
bitfld.long 0x0 7. "err_ecc_corrected7,C-PHY mode: Header CRC recoverable on virtual channel 7" "0,1"
newline
bitfld.long 0x0 6. "err_ecc_corrected6,C-PHY mode: Header CRC recoverable on virtual channel 6" "0,1"
newline
bitfld.long 0x0 5. "err_ecc_corrected5,C-PHY mode: Header CRC recoverable on virtual channel 5" "0,1"
newline
bitfld.long 0x0 4. "err_ecc_corrected4,C-PHY mode: Header CRC recoverable on virtual channel 4" "0,1"
newline
bitfld.long 0x0 3. "err_ecc_corrected3,C-PHY mode: Header CRC recoverable on virtual channel 3" "0,1"
newline
bitfld.long 0x0 2. "err_ecc_corrected2,C-PHY mode: Header CRC recoverable on virtual channel 2" "0,1"
newline
bitfld.long 0x0 1. "err_ecc_corrected1,C-PHY mode: Header CRC recoverable on virtual channel 1" "0,1"
newline
bitfld.long 0x0 0. "err_ecc_corrected0,C-PHY mode: Header CRC recoverable on virtual channel 0" "0,1"
group.long 0x2D4++0x3
line.long 0x0 "CSI21_INT_MSK_ECC_CORRECTED,"
rbitfld.long 0x0 31. "Reserved0,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 30. "Reserved1,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 29. "Reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 28. "Reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 27. "Reserved4,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 26. "Reserved5,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 25. "Reserved6,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 24. "Reserved7,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 23. "Reserved8,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 22. "Reserved9,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 21. "Reserved10,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 20. "Reserved11,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 19. "Reserved12,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 18. "Reserved13,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 17. "Reserved14,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 16. "Reserved15,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 15. "err_ecc_corrected15,Mask for err_ecc_corrected_vc15" "0,1"
newline
bitfld.long 0x0 14. "err_ecc_corrected14,Mask for err_ecc_corrected_vc14" "0,1"
newline
bitfld.long 0x0 13. "err_ecc_corrected13,Mask for err_ecc_corrected_vc13" "0,1"
newline
bitfld.long 0x0 12. "err_ecc_corrected12,Mask for err_ecc_corrected_vc12" "0,1"
newline
bitfld.long 0x0 11. "err_ecc_corrected11,Mask for err_ecc_corrected_vc11" "0,1"
newline
bitfld.long 0x0 10. "err_ecc_corrected10,Mask for err_ecc_corrected_vc10" "0,1"
newline
bitfld.long 0x0 9. "err_ecc_corrected9,Mask for err_ecc_corrected_vc9" "0,1"
newline
bitfld.long 0x0 8. "err_ecc_corrected8,Mask for err_ecc_corrected_vc8" "0,1"
newline
bitfld.long 0x0 7. "err_ecc_corrected7,Mask for err_ecc_corrected_vc7" "0,1"
newline
bitfld.long 0x0 6. "err_ecc_corrected6,Mask for err_ecc_corrected_vc6" "0,1"
newline
bitfld.long 0x0 5. "err_ecc_corrected5,Mask for err_ecc_corrected_vc5" "0,1"
newline
bitfld.long 0x0 4. "err_ecc_corrected4,Mask for err_ecc_corrected_vc4" "0,1"
newline
bitfld.long 0x0 3. "err_ecc_corrected3,Mask for err_ecc_corrected_vc3" "0,1"
newline
bitfld.long 0x0 2. "err_ecc_corrected2,Mask for err_ecc_corrected_vc2" "0,1"
newline
bitfld.long 0x0 1. "err_ecc_corrected1,Mask for err_ecc_corrected_vc1" "0,1"
newline
bitfld.long 0x0 0. "err_ecc_corrected0,Mask for err_ecc_corrected_vc0" "0,1"
rgroup.long 0x360++0x3
line.long 0x0 "CSI21_INT_ST_FAP_PHY_FATAL,"
hexmask.long.word 0x0 19.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x0 18. "phy_rxinvalidcodehs_2,High Speed Invalid Code Word Detection on lane 2" "0,1"
newline
bitfld.long 0x0 17. "phy_rxinvalidcodehs_1,High Speed Invalid Code Word Detection on lane 1" "0,1"
newline
bitfld.long 0x0 16. "phy_rxinvalidcodehs_0,High Speed Invalid Code Word Detection on lane 0" "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved1,Reserved and read as zero."
newline
bitfld.long 0x0 7. "reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 6. "reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 5. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 4. "reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "phy_errsotsynchs_3,Start of transmission error on data lane 3 (no synchronization achieved)" "0,1"
newline
bitfld.long 0x0 2. "phy_errsotsynchs_2,Start of transmission error on data lane 2 (no synchronization achieved)" "0,1"
newline
bitfld.long 0x0 1. "phy_errsotsynchs_1,Start of transmission error on data lane 1 (no synchronization achieved)" "0,1"
newline
bitfld.long 0x0 0. "phy_errsotsynchs_0,Start of transmission error on data lane 0 (no synchronization achieved)" "0,1"
group.long 0x364++0x7
line.long 0x0 "CSI21_INT_MSK_FAP_PHY_FATAL,"
hexmask.long.word 0x0 19.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x0 18. "mask_phy_rxinvalidcodehs_2,Mask for phy_rxinvalidcodehs_2" "0,1"
newline
bitfld.long 0x0 17. "mask_phy_rxinvalidcodehs_1,Mask for phy_rxinvalidcodehs_1" "0,1"
newline
bitfld.long 0x0 16. "mask_phy_rxinvalidcodehs_0,Mask for phy_rxinvalidcodehs_0" "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved1,Reserved"
newline
rbitfld.long 0x0 7. "reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 6. "reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 5. "reserved4,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 4. "reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "mask_phy_errsotsynchs_3,Mask for phy_errsotsynchs_3" "0,1"
newline
bitfld.long 0x0 2. "mask_phy_errsotsynchs_2,Mask for phy_errsotsynchs_2" "0,1"
newline
bitfld.long 0x0 1. "mask_phy_errsotsynchs_1,Mask for phy_errsotsynchs_1" "0,1"
newline
bitfld.long 0x0 0. "mask_phy_errsotsynchs_0,Mask for phy_errsotsynchs_0" "0,1"
line.long 0x4 "CSI21_INT_FORCE_FAP_PHY_FATAL,"
hexmask.long.word 0x4 19.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x4 18. "force_phy_rxinvalidcodehs_2,Force phy_rxinvalidcodehs_2" "0,1"
newline
bitfld.long 0x4 17. "force_phy_rxinvalidcodehs_1,Force phy_rxinvalidcodehs_1" "0,1"
newline
bitfld.long 0x4 16. "force_phy_rxinvalidcodehs_0,Force phy_rxinvalidcodehs_0" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "reserved1,Reserved"
newline
rbitfld.long 0x4 7. "reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x4 6. "reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x4 5. "reserved4,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x4 4. "reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x4 3. "force_phy_errsotsynchs_3,Force phy_errsotsynchs_3" "0,1"
newline
bitfld.long 0x4 2. "force_phy_errsotsynchs_2,Force phy_errsotsynchs_2" "0,1"
newline
bitfld.long 0x4 1. "force_phy_errsotsynchs_1,Force phy_errsotsynchs_1" "0,1"
newline
bitfld.long 0x4 0. "force_phy_errsotsynchs_0,Force phy_errsotsynchs_0" "0,1"
rgroup.long 0x370++0x3
line.long 0x0 "CSI21_INT_ST_FAP_PKT_FATAL,"
hexmask.long 0x0 2.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x0 1. "shorter_payload,D-PHY mode: Reported greater WC than received  unrecoverable. C-PHY mode: Reported greater WC than received  unrecoverable." "0,1"
newline
bitfld.long 0x0 0. "err_ecc_double,D-PHY mode: Header ECC contains at least 2 errors  unrecoverable. C-PHY mode: Header CRC unrecoverable." "0,1"
group.long 0x374++0x7
line.long 0x0 "CSI21_INT_MSK_FAP_PKT_FATAL,"
hexmask.long 0x0 2.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x0 1. "mask_shorter_payload,Mask for shorter_payload." "0,1"
newline
bitfld.long 0x0 0. "mask_err_ecc_double,Mask for err_ecc_double." "0,1"
line.long 0x4 "CSI21_INT_FORCE_FAP_PKT_FATAL,"
hexmask.long 0x4 2.--31. 1. "reserved,Reserved and read as zero."
newline
bitfld.long 0x4 1. "force_shorter_payload,Force shorter_payload." "0,1"
newline
bitfld.long 0x4 0. "force_err_ecc_double,Force err_ecc_double." "0,1"
rgroup.long 0x390++0x3
line.long 0x0 "CSI21_INT_ST_FAP_PHY,"
hexmask.long.byte 0x0 24.--31. 1. "reserved0,Reserved and read as zero."
newline
bitfld.long 0x0 23. "reserved1,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 22. "reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 21. "reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 20. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "phy_erresc_3,Escape Entry Error on data lane 3" "0,1"
newline
bitfld.long 0x0 18. "phy_erresc_2,Escape Entry Error on data lane 2" "0,1"
newline
bitfld.long 0x0 17. "phy_erresc_1,Escape Entry Error on data lane 1" "0,1"
newline
bitfld.long 0x0 16. "phy_erresc_0,Escape Entry Error on data lane 0" "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved5,Reserved and read as zero."
newline
bitfld.long 0x0 7. "reserved6,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 6. "reserved7,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 5. "reserved8,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 4. "reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "phy_errsoths_3,Start of transmission error on data lane 3 (synchronization can still be achieved)" "0,1"
newline
bitfld.long 0x0 2. "phy_errsoths_2,Start of transmission error on data lane 2 (synchronization can still be achieved)" "0,1"
newline
bitfld.long 0x0 1. "phy_errsoths_1,Start of transmission error on data lane 1 (synchronization can still be achieved)" "0,1"
newline
bitfld.long 0x0 0. "phy_errsoths_0,Start of transmission error on data lane 0 (synchronization can still be achieved)" "0,1"
group.long 0x394++0x7
line.long 0x0 "CSI21_INT_MSK_FAP_PHY,"
hexmask.long.byte 0x0 24.--31. 1. "reserved0,Reserved and read as zero."
newline
rbitfld.long 0x0 23. "reserved1,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 22. "reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 21. "reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 20. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "mask_phy_erresc_3,Mask for phy_erresc_3" "0,1"
newline
bitfld.long 0x0 18. "mask_phy_erresc_2,Mask for phy_erresc_2" "0,1"
newline
bitfld.long 0x0 17. "mask_phy_erresc_1,Mask for phy_erresc_1" "0,1"
newline
bitfld.long 0x0 16. "mask_phy_erresc_0,Mask for phy_erresc_0" "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "reserved5,Reserved and read as zero."
newline
rbitfld.long 0x0 7. "reserved6,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 6. "reserved7,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 5. "reserved8,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x0 4. "reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 3. "mask_phy_errsoths_3,Mask for phy_errsoths_3" "0,1"
newline
bitfld.long 0x0 2. "mask_phy_errsoths_2,Mask for phy_errsoths_2" "0,1"
newline
bitfld.long 0x0 1. "mask_phy_errsoths_1,Mask for phy_errsoths_1" "0,1"
newline
bitfld.long 0x0 0. "mask_phy_errsoths_0,Mask for phy_errsoths_0" "0,1"
line.long 0x4 "CSI21_INT_FORCE_FAP_PHY,"
hexmask.long.byte 0x4 24.--31. 1. "reserved0,Reserved and read as zero."
newline
rbitfld.long 0x4 23. "reserved1,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x4 22. "reserved2,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x4 21. "reserved3,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x4 20. "reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x4 19. "force_phy_erresc_3,Force phy_erresc_3" "0,1"
newline
bitfld.long 0x4 18. "force_phy_erresc_2,Force phy_erresc_2" "0,1"
newline
bitfld.long 0x4 17. "force_phy_erresc_1,Force phy_erresc_1" "0,1"
newline
bitfld.long 0x4 16. "force_phy_erresc_0,Force phy_erresc_0" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "reserved5,Reserved and read as zero."
newline
rbitfld.long 0x4 7. "reserved6,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x4 6. "reserved7,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x4 5. "reserved8,Reserved and read as zero." "0,1"
newline
rbitfld.long 0x4 4. "reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x4 3. "force_phy_errsoths_3,Force phy_errsoths_3" "0,1"
newline
bitfld.long 0x4 2. "force_phy_errsoths_2,Force phy_errsoths_2" "0,1"
newline
bitfld.long 0x4 1. "force_phy_errsoths_1,Force phy_errsoths_1" "0,1"
newline
bitfld.long 0x4 0. "force_phy_errsoths_0,Force phy_errsoths_0" "0,1"
rgroup.long 0x420++0x3
line.long 0x0 "CSI21_INT_ST_FAP_BNDRY_FRAME_FATAL,"
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x0 15. "err_f_bndry_match_vc15,Error matching Frame Start with Frame End for virtual channel 15" "0,1"
newline
bitfld.long 0x0 14. "err_f_bndry_match_vc14,Error matching Frame Start with Frame End for virtual channel 14" "0,1"
newline
bitfld.long 0x0 13. "err_f_bndry_match_vc13,Error matching Frame Start with Frame End for virtual channel 13" "0,1"
newline
bitfld.long 0x0 12. "err_f_bndry_match_vc12,Error matching Frame Start with Frame End for virtual channel 12" "0,1"
newline
bitfld.long 0x0 11. "err_f_bndry_match_vc11,Error matching Frame Start with Frame End for virtual channel 11" "0,1"
newline
bitfld.long 0x0 10. "err_f_bndry_match_vc10,Error matching Frame Start with Frame End for virtual channel 10" "0,1"
newline
bitfld.long 0x0 9. "err_f_bndry_match_vc9,Error matching Frame Start with Frame End for virtual channel 9" "0,1"
newline
bitfld.long 0x0 8. "err_f_bndry_match_vc8,Error matching Frame Start with Frame End for virtual channel 8" "0,1"
newline
bitfld.long 0x0 7. "err_f_bndry_match_vc7,Error matching Frame Start with Frame End for virtual channel 7" "0,1"
newline
bitfld.long 0x0 6. "err_f_bndry_match_vc6,Error matching Frame Start with Frame End for virtual channel 6" "0,1"
newline
bitfld.long 0x0 5. "err_f_bndry_match_vc5,Error matching Frame Start with Frame End for virtual channel 5" "0,1"
newline
bitfld.long 0x0 4. "err_f_bndry_match_vc4,Error matching Frame Start with Frame End for virtual channel 4" "0,1"
newline
bitfld.long 0x0 3. "err_f_bndry_match_vc3,Error matching Frame Start with Frame End for virtual channel 3" "0,1"
newline
bitfld.long 0x0 2. "err_f_bndry_match_vc2,Error matching Frame Start with Frame End for virtual channel 2" "0,1"
newline
bitfld.long 0x0 1. "err_f_bndry_match_vc1,Error matching Frame Start with Frame End for virtual channel 1" "0,1"
newline
bitfld.long 0x0 0. "err_f_bndry_match_vc0,Error matching Frame Start with Frame End for virtual channel 0" "0,1"
group.long 0x424++0x7
line.long 0x0 "CSI21_INT_MSK_FAP_BNDRY_FRAME_FATAL,"
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x0 15. "err_f_bndry_match_vc15,Mask for err_f_bndry_match_vc15" "0,1"
newline
bitfld.long 0x0 14. "err_f_bndry_match_vc14,Mask for err_f_bndry_match_vc14" "0,1"
newline
bitfld.long 0x0 13. "err_f_bndry_match_vc13,Mask for err_f_bndry_match_vc13" "0,1"
newline
bitfld.long 0x0 12. "err_f_bndry_match_vc12,Mask for err_f_bndry_match_vc12" "0,1"
newline
bitfld.long 0x0 11. "err_f_bndry_match_vc11,Mask for err_f_bndry_match_vc11" "0,1"
newline
bitfld.long 0x0 10. "err_f_bndry_match_vc10,Mask for err_f_bndry_match_vc10" "0,1"
newline
bitfld.long 0x0 9. "err_f_bndry_match_vc9,Mask for err_f_bndry_match_vc9" "0,1"
newline
bitfld.long 0x0 8. "err_f_bndry_match_vc8,Mask for err_f_bndry_match_vc8" "0,1"
newline
bitfld.long 0x0 7. "err_f_bndry_match_vc7,Mask for err_f_bndry_match_vc7" "0,1"
newline
bitfld.long 0x0 6. "err_f_bndry_match_vc6,Mask for err_f_bndry_match_vc6" "0,1"
newline
bitfld.long 0x0 5. "err_f_bndry_match_vc5,Mask for err_f_bndry_match_vc5" "0,1"
newline
bitfld.long 0x0 4. "err_f_bndry_match_vc4,Mask for err_f_bndry_match_vc4" "0,1"
newline
bitfld.long 0x0 3. "err_f_bndry_match_vc3,Mask for err_f_bndry_match_vc3" "0,1"
newline
bitfld.long 0x0 2. "err_f_bndry_match_vc2,Mask for err_f_bndry_match_vc2" "0,1"
newline
bitfld.long 0x0 1. "err_f_bndry_match_vc1,Mask for err_f_bndry_match_vc1" "0,1"
newline
bitfld.long 0x0 0. "err_f_bndry_match_vc0,Mask for err_f_bndry_match_vc0" "0,1"
line.long 0x4 "CSI21_INT_FORCE_FAP_BNDRY_FRAME_FATAL,"
hexmask.long.word 0x4 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x4 15. "err_f_bndry_match_vc15,Force err_f_bndry_match_vc15" "0,1"
newline
bitfld.long 0x4 14. "err_f_bndry_match_vc14,Force err_f_bndry_match_vc14" "0,1"
newline
bitfld.long 0x4 13. "err_f_bndry_match_vc13,Force err_f_bndry_match_vc13" "0,1"
newline
bitfld.long 0x4 12. "err_f_bndry_match_vc12,Force err_f_bndry_match_vc12" "0,1"
newline
bitfld.long 0x4 11. "err_f_bndry_match_vc11,Force err_f_bndry_match_vc11" "0,1"
newline
bitfld.long 0x4 10. "err_f_bndry_match_vc10,Force err_f_bndry_match_vc10" "0,1"
newline
bitfld.long 0x4 9. "err_f_bndry_match_vc9,Force err_f_bndry_match_vc9" "0,1"
newline
bitfld.long 0x4 8. "err_f_bndry_match_vc8,Force err_f_bndry_match_vc8" "0,1"
newline
bitfld.long 0x4 7. "err_f_bndry_match_vc7,Force err_f_bndry_match_vc7" "0,1"
newline
bitfld.long 0x4 6. "err_f_bndry_match_vc6,Force err_f_bndry_match_vc6" "0,1"
newline
bitfld.long 0x4 5. "err_f_bndry_match_vc5,Force err_f_bndry_match_vc5" "0,1"
newline
bitfld.long 0x4 4. "err_f_bndry_match_vc4,Force err_f_bndry_match_vc4" "0,1"
newline
bitfld.long 0x4 3. "err_f_bndry_match_vc3,Force err_f_bndry_match_vc3" "0,1"
newline
bitfld.long 0x4 2. "err_f_bndry_match_vc2,Force err_f_bndry_match_vc2" "0,1"
newline
bitfld.long 0x4 1. "err_f_bndry_match_vc1,Force err_f_bndry_match_vc1" "0,1"
newline
bitfld.long 0x4 0. "err_f_bndry_match_vc0,Force err_f_bndry_match_vc0" "0,1"
rgroup.long 0x430++0x3
line.long 0x0 "CSI21_INT_ST_FAP_SEQ_FRAME_FATAL,"
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x0 15. "err_f_seq_vc15,Incorrect Frame sequence detected in virtual channel 15" "0,1"
newline
bitfld.long 0x0 14. "err_f_seq_vc14,Incorrect Frame sequence detected in virtual channel 14" "0,1"
newline
bitfld.long 0x0 13. "err_f_seq_vc13,Incorrect Frame sequence detected in virtual channel 13" "0,1"
newline
bitfld.long 0x0 12. "err_f_seq_vc12,Incorrect Frame sequence detected in virtual channel 12" "0,1"
newline
bitfld.long 0x0 11. "err_f_seq_vc11,Incorrect Frame sequence detected in virtual channel 11" "0,1"
newline
bitfld.long 0x0 10. "err_f_seq_vc10,Incorrect Frame sequence detected in virtual channel 10" "0,1"
newline
bitfld.long 0x0 9. "err_f_seq_vc9,Incorrect Frame sequence detected in virtual channel 9" "0,1"
newline
bitfld.long 0x0 8. "err_f_seq_vc8,Incorrect Frame sequence detected in virtual channel 8" "0,1"
newline
bitfld.long 0x0 7. "err_f_seq_vc7,Incorrect Frame sequence detected in virtual channel 7" "0,1"
newline
bitfld.long 0x0 6. "err_f_seq_vc6,Incorrect Frame sequence detected in virtual channel 6" "0,1"
newline
bitfld.long 0x0 5. "err_f_seq_vc5,Incorrect Frame sequence detected in virtual channel 5" "0,1"
newline
bitfld.long 0x0 4. "err_f_seq_vc4,Incorrect Frame sequence detected in virtual channel 4" "0,1"
newline
bitfld.long 0x0 3. "err_f_seq_vc3,Incorrect Frame sequence detected in virtual channel 3" "0,1"
newline
bitfld.long 0x0 2. "err_f_seq_vc2,Incorrect Frame sequence detected in virtual channel 2" "0,1"
newline
bitfld.long 0x0 1. "err_f_seq_vc1,Incorrect Frame sequence detected in virtual channel 1" "0,1"
newline
bitfld.long 0x0 0. "err_f_seq_vc0,Incorrect Frame sequence detected in virtual channel 0" "0,1"
group.long 0x434++0x7
line.long 0x0 "CSI21_INT_MSK_FAP_SEQ_FRAME_FATAL,"
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x0 15. "err_f_seq_vc15,Mask for err_f_seq_vc15" "0,1"
newline
bitfld.long 0x0 14. "err_f_seq_vc14,Mask for err_f_seq_vc14" "0,1"
newline
bitfld.long 0x0 13. "err_f_seq_vc13,Mask for err_f_seq_vc13" "0,1"
newline
bitfld.long 0x0 12. "err_f_seq_vc12,Mask for err_f_seq_vc12" "0,1"
newline
bitfld.long 0x0 11. "err_f_seq_vc11,Mask for err_f_seq_vc11" "0,1"
newline
bitfld.long 0x0 10. "err_f_seq_vc10,Mask for err_f_seq_vc10" "0,1"
newline
bitfld.long 0x0 9. "err_f_seq_vc9,Mask for err_f_seq_vc9" "0,1"
newline
bitfld.long 0x0 8. "err_f_seq_vc8,Mask for err_f_seq_vc8" "0,1"
newline
bitfld.long 0x0 7. "err_f_seq_vc7,Mask for err_f_seq_vc7" "0,1"
newline
bitfld.long 0x0 6. "err_f_seq_vc6,Mask for err_f_seq_vc6" "0,1"
newline
bitfld.long 0x0 5. "err_f_seq_vc5,Mask for err_f_seq_vc5" "0,1"
newline
bitfld.long 0x0 4. "err_f_seq_vc4,Mask for err_f_seq_vc4" "0,1"
newline
bitfld.long 0x0 3. "err_f_seq_vc3,Mask for err_f_seq_vc3" "0,1"
newline
bitfld.long 0x0 2. "err_f_seq_vc2,Mask for err_f_seq_vc2" "0,1"
newline
bitfld.long 0x0 1. "err_f_seq_vc1,Mask for err_f_seq_vc1" "0,1"
newline
bitfld.long 0x0 0. "err_f_seq_vc0,Mask for err_f_seq_vc0" "0,1"
line.long 0x4 "CSI21_INT_FORCE_FAP_SEQ_FRAME_FATAL,"
hexmask.long.word 0x4 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x4 15. "err_f_seq_vc15,Force err_f_seq_vc15" "0,1"
newline
bitfld.long 0x4 14. "err_f_seq_vc14,Force err_f_seq_vc14" "0,1"
newline
bitfld.long 0x4 13. "err_f_seq_vc13,Force err_f_seq_vc13" "0,1"
newline
bitfld.long 0x4 12. "err_f_seq_vc12,Force err_f_seq_vc12" "0,1"
newline
bitfld.long 0x4 11. "err_f_seq_vc11,Force err_f_seq_vc11" "0,1"
newline
bitfld.long 0x4 10. "err_f_seq_vc10,Force err_f_seq_vc10" "0,1"
newline
bitfld.long 0x4 9. "err_f_seq_vc9,Force err_f_seq_vc9" "0,1"
newline
bitfld.long 0x4 8. "err_f_seq_vc8,Force err_f_seq_vc8" "0,1"
newline
bitfld.long 0x4 7. "err_f_seq_vc7,Force err_f_seq_vc7" "0,1"
newline
bitfld.long 0x4 6. "err_f_seq_vc6,Force err_f_seq_vc6" "0,1"
newline
bitfld.long 0x4 5. "err_f_seq_vc5,Force err_f_seq_vc5" "0,1"
newline
bitfld.long 0x4 4. "err_f_seq_vc4,Force err_f_seq_vc4" "0,1"
newline
bitfld.long 0x4 3. "err_f_seq_vc3,Force err_f_seq_vc3" "0,1"
newline
bitfld.long 0x4 2. "err_f_seq_vc2,Force err_f_seq_vc2" "0,1"
newline
bitfld.long 0x4 1. "err_f_seq_vc1,Force err_f_seq_vc1" "0,1"
newline
bitfld.long 0x4 0. "err_f_seq_vc0,Force err_f_seq_vc0" "0,1"
rgroup.long 0x450++0x3
line.long 0x0 "CSI21_INT_ST_FAP_PLD_CRC_FATAL,"
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x0 15. "err_crc_vc15,Payload Checksum error detected on virtual channel 15" "0,1"
newline
bitfld.long 0x0 14. "err_crc_vc14,Payload Checksum error detected on virtual channel 14" "0,1"
newline
bitfld.long 0x0 13. "err_crc_vc13,Payload Checksum error detected on virtual channel 13" "0,1"
newline
bitfld.long 0x0 12. "err_crc_vc12,Payload Checksum error detected on virtual channel 12" "0,1"
newline
bitfld.long 0x0 11. "err_crc_vc11,Payload Checksum error detected on virtual channel 11" "0,1"
newline
bitfld.long 0x0 10. "err_crc_vc10,Payload Checksum error detected on virtual channel 10" "0,1"
newline
bitfld.long 0x0 9. "err_crc_vc9,Payload Checksum error detected on virtual channel 9" "0,1"
newline
bitfld.long 0x0 8. "err_crc_vc8,Payload Checksum error detected on virtual channel 8" "0,1"
newline
bitfld.long 0x0 7. "err_crc_vc7,Payload Checksum error detected on virtual channel 7" "0,1"
newline
bitfld.long 0x0 6. "err_crc_vc6,Payload Checksum error detected on virtual channel 6" "0,1"
newline
bitfld.long 0x0 5. "err_crc_vc5,Payload Checksum error detected on virtual channel 5" "0,1"
newline
bitfld.long 0x0 4. "err_crc_vc4,Payload Checksum error detected on virtual channel 4" "0,1"
newline
bitfld.long 0x0 3. "err_crc_vc3,Payload Checksum error detected on virtual channel 3" "0,1"
newline
bitfld.long 0x0 2. "err_crc_vc2,Payload Checksum error detected on virtual channel 2" "0,1"
newline
bitfld.long 0x0 1. "err_crc_vc1,Payload Checksum error detected on virtual channel 1" "0,1"
newline
bitfld.long 0x0 0. "err_crc_vc0,Payload Checksum error detected on virtual channel 0" "0,1"
group.long 0x454++0x7
line.long 0x0 "CSI21_INT_MSK_FAP_PLD_CRC_FATAL,"
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x0 15. "err_crc_vc15,Mask for err_crc_vc15" "0,1"
newline
bitfld.long 0x0 14. "err_crc_vc14,Mask for err_crc_vc14" "0,1"
newline
bitfld.long 0x0 13. "err_crc_vc13,Mask for err_crc_vc13" "0,1"
newline
bitfld.long 0x0 12. "err_crc_vc12,Mask for err_crc_vc12" "0,1"
newline
bitfld.long 0x0 11. "err_crc_vc11,Mask for err_crc_vc11" "0,1"
newline
bitfld.long 0x0 10. "err_crc_vc10,Mask for err_crc_vc10" "0,1"
newline
bitfld.long 0x0 9. "err_crc_vc9,Mask for err_crc_vc9" "0,1"
newline
bitfld.long 0x0 8. "err_crc_vc8,Mask for err_crc_vc8" "0,1"
newline
bitfld.long 0x0 7. "err_crc_vc7,Mask for err_crc_vc7" "0,1"
newline
bitfld.long 0x0 6. "err_crc_vc6,Mask for err_crc_vc6" "0,1"
newline
bitfld.long 0x0 5. "err_crc_vc5,Mask for err_crc_vc5" "0,1"
newline
bitfld.long 0x0 4. "err_crc_vc4,Mask for err_crc_vc4" "0,1"
newline
bitfld.long 0x0 3. "err_crc_vc3,Mask for err_crc_vc3" "0,1"
newline
bitfld.long 0x0 2. "err_crc_vc2,Mask for err_crc_vc2" "0,1"
newline
bitfld.long 0x0 1. "err_crc_vc1,Mask for err_crc_vc1" "0,1"
newline
bitfld.long 0x0 0. "err_crc_vc0,Mask for err_crc_vc0" "0,1"
line.long 0x4 "CSI21_INT_FORCE_FAP_PLD_CRC_FATAL,"
hexmask.long.word 0x4 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x4 15. "err_crc_vc15,Force err_crc_vc15" "0,1"
newline
bitfld.long 0x4 14. "err_crc_vc14,Force err_crc_vc14" "0,1"
newline
bitfld.long 0x4 13. "err_crc_vc13,Force err_crc_vc13" "0,1"
newline
bitfld.long 0x4 12. "err_crc_vc12,Force err_crc_vc12" "0,1"
newline
bitfld.long 0x4 11. "err_crc_vc11,Force err_crc_vc11" "0,1"
newline
bitfld.long 0x4 10. "err_crc_vc10,Force err_crc_vc10" "0,1"
newline
bitfld.long 0x4 9. "err_crc_vc9,Force err_crc_vc9" "0,1"
newline
bitfld.long 0x4 8. "err_crc_vc8,Force err_crc_vc8" "0,1"
newline
bitfld.long 0x4 7. "err_crc_vc7,Force err_crc_vc7" "0,1"
newline
bitfld.long 0x4 6. "err_crc_vc6,Force err_crc_vc6" "0,1"
newline
bitfld.long 0x4 5. "err_crc_vc5,Force err_crc_vc5" "0,1"
newline
bitfld.long 0x4 4. "err_crc_vc4,Force err_crc_vc4" "0,1"
newline
bitfld.long 0x4 3. "err_crc_vc3,Force err_crc_vc3" "0,1"
newline
bitfld.long 0x4 2. "err_crc_vc2,Force err_crc_vc2" "0,1"
newline
bitfld.long 0x4 1. "err_crc_vc1,Force err_crc_vc1" "0,1"
newline
bitfld.long 0x4 0. "err_crc_vc0,Force err_crc_vc0" "0,1"
rgroup.long 0x470++0x3
line.long 0x0 "CSI21_INT_ST_FAP_ECC_CORRECTED,"
bitfld.long 0x0 31. "Reserved0,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 30. "Reserved1,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 29. "Reserved2,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 28. "Reserved3,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 27. "Reserved4,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 26. "Reserved5,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 25. "Reserved6,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 24. "Reserved7,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 23. "Reserved8,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 22. "Reserved9,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 21. "Reserved10,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 20. "Reserved11,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 19. "Reserved12,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 18. "Reserved13,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 17. "Reserved14,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 16. "Reserved15,Reserved and read as zero." "0,1"
newline
bitfld.long 0x0 15. "err_ecc_corrected15,C-PHY mode: Header CRC recoverable on virtual channel 15" "0,1"
newline
bitfld.long 0x0 14. "err_ecc_corrected14,C-PHY mode: Header CRC recoverable on virtual channel 14" "0,1"
newline
bitfld.long 0x0 13. "err_ecc_corrected13,C-PHY mode: Header CRC recoverable on virtual channel 13" "0,1"
newline
bitfld.long 0x0 12. "err_ecc_corrected12,C-PHY mode: Header CRC recoverable on virtual channel 12" "0,1"
newline
bitfld.long 0x0 11. "err_ecc_corrected11,C-PHY mode: Header CRC recoverable on virtual channel 11" "0,1"
newline
bitfld.long 0x0 10. "err_ecc_corrected10,C-PHY mode: Header CRC recoverable on virtual channel 10" "0,1"
newline
bitfld.long 0x0 9. "err_ecc_corrected9,C-PHY mode: Header CRC recoverable on virtual channel 9" "0,1"
newline
bitfld.long 0x0 8. "err_ecc_corrected8,C-PHY mode: Header CRC recoverable on virtual channel 8" "0,1"
newline
bitfld.long 0x0 7. "err_ecc_corrected7,C-PHY mode: Header CRC recoverable on virtual channel 7" "0,1"
newline
bitfld.long 0x0 6. "err_ecc_corrected6,C-PHY mode: Header CRC recoverable on virtual channel 6" "0,1"
newline
bitfld.long 0x0 5. "err_ecc_corrected5,C-PHY mode: Header CRC recoverable on virtual channel 5" "0,1"
newline
bitfld.long 0x0 4. "err_ecc_corrected4,C-PHY mode: Header CRC recoverable on virtual channel 4" "0,1"
newline
bitfld.long 0x0 3. "err_ecc_corrected3,C-PHY mode: Header CRC recoverable on virtual channel 3" "0,1"
newline
bitfld.long 0x0 2. "err_ecc_corrected2,C-PHY mode: Header CRC recoverable on virtual channel 2" "0,1"
newline
bitfld.long 0x0 1. "err_ecc_corrected1,C-PHY mode: Header CRC recoverable on virtual channel 1" "0,1"
newline
bitfld.long 0x0 0. "err_ecc_corrected0,C-PHY mode: Header CRC recoverable on virtual channel 0" "0,1"
group.long 0x474++0x7
line.long 0x0 "CSI21_INT_MSK_FAP_ECC_CORRECTED,"
rbitfld.long 0x0 31. "Reserved0,Reserved" "0,1"
newline
rbitfld.long 0x0 30. "Reserved1,Reserved" "0,1"
newline
rbitfld.long 0x0 29. "Reserved2,Reserved" "0,1"
newline
rbitfld.long 0x0 28. "Reserved3,Reserved" "0,1"
newline
rbitfld.long 0x0 27. "Reserved4,Reserved" "0,1"
newline
rbitfld.long 0x0 26. "Reserved5,Reserved" "0,1"
newline
rbitfld.long 0x0 25. "Reserved6,Reserved" "0,1"
newline
rbitfld.long 0x0 24. "Reserved7,Reserved" "0,1"
newline
rbitfld.long 0x0 23. "Reserved8,Reserved" "0,1"
newline
rbitfld.long 0x0 22. "Reserved9,Reserved" "0,1"
newline
rbitfld.long 0x0 21. "Reserved10,Reserved" "0,1"
newline
rbitfld.long 0x0 20. "Reserved11,Reserved" "0,1"
newline
rbitfld.long 0x0 19. "Reserved12,Reserved" "0,1"
newline
rbitfld.long 0x0 18. "Reserved13,Reserved" "0,1"
newline
rbitfld.long 0x0 17. "Reserved14,Reserved" "0,1"
newline
rbitfld.long 0x0 16. "Reserved15,Reserved" "0,1"
newline
bitfld.long 0x0 15. "err_ecc_corrected15,Mask for err_ecc_corrected_vc15" "0,1"
newline
bitfld.long 0x0 14. "err_ecc_corrected14,Mask for err_ecc_corrected_vc14" "0,1"
newline
bitfld.long 0x0 13. "err_ecc_corrected13,Mask for err_ecc_corrected_vc13" "0,1"
newline
bitfld.long 0x0 12. "err_ecc_corrected12,Mask for err_ecc_corrected_vc12" "0,1"
newline
bitfld.long 0x0 11. "err_ecc_corrected11,Mask for err_ecc_corrected_vc11" "0,1"
newline
bitfld.long 0x0 10. "err_ecc_corrected10,Mask for err_ecc_corrected_vc10" "0,1"
newline
bitfld.long 0x0 9. "err_ecc_corrected9,Mask for err_ecc_corrected_vc9" "0,1"
newline
bitfld.long 0x0 8. "err_ecc_corrected8,Mask for err_ecc_corrected_vc8" "0,1"
newline
bitfld.long 0x0 7. "err_ecc_corrected7,Mask for err_ecc_corrected_vc7" "0,1"
newline
bitfld.long 0x0 6. "err_ecc_corrected6,Mask for err_ecc_corrected_vc6" "0,1"
newline
bitfld.long 0x0 5. "err_ecc_corrected5,Mask for err_ecc_corrected_vc5" "0,1"
newline
bitfld.long 0x0 4. "err_ecc_corrected4,Mask for err_ecc_corrected_vc4" "0,1"
newline
bitfld.long 0x0 3. "err_ecc_corrected3,Mask for err_ecc_corrected_vc3" "0,1"
newline
bitfld.long 0x0 2. "err_ecc_corrected2,Mask for err_ecc_corrected_vc2" "0,1"
newline
bitfld.long 0x0 1. "err_ecc_corrected1,Mask for err_ecc_corrected_vc1" "0,1"
newline
bitfld.long 0x0 0. "err_ecc_corrected0,Mask for err_ecc_corrected_vc0" "0,1"
line.long 0x4 "CSI21_INT_FORCE_FAP_ECC_CORRECTED,"
hexmask.long.word 0x4 16.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x4 15. "err_ecc_corrected15,Force err_ecc_corrected_vc15" "0,1"
newline
bitfld.long 0x4 14. "err_ecc_corrected14,Force err_ecc_corrected_vc14" "0,1"
newline
bitfld.long 0x4 13. "err_ecc_corrected13,Force err_ecc_corrected_vc13" "0,1"
newline
bitfld.long 0x4 12. "err_ecc_corrected12,Force err_ecc_corrected_vc12" "0,1"
newline
bitfld.long 0x4 11. "err_ecc_corrected11,Force err_ecc_corrected_vc11" "0,1"
newline
bitfld.long 0x4 10. "err_ecc_corrected10,Force err_ecc_corrected_vc10" "0,1"
newline
bitfld.long 0x4 9. "err_ecc_corrected9,Force err_ecc_corrected_vc9" "0,1"
newline
bitfld.long 0x4 8. "err_ecc_corrected8,Force err_ecc_corrected_vc8" "0,1"
newline
bitfld.long 0x4 7. "err_ecc_corrected7,Force err_ecc_corrected_vc7" "0,1"
newline
bitfld.long 0x4 6. "err_ecc_corrected6,Force err_ecc_corrected_vc6" "0,1"
newline
bitfld.long 0x4 5. "err_ecc_corrected5,Force err_ecc_corrected_vc5" "0,1"
newline
bitfld.long 0x4 4. "err_ecc_corrected4,Force err_ecc_corrected_vc4" "0,1"
newline
bitfld.long 0x4 3. "err_ecc_corrected3,Force err_ecc_corrected_vc3" "0,1"
newline
bitfld.long 0x4 2. "err_ecc_corrected2,Force err_ecc_corrected_vc2" "0,1"
newline
bitfld.long 0x4 1. "err_ecc_corrected1,Force err_ecc_corrected_vc1" "0,1"
newline
bitfld.long 0x4 0. "err_ecc_corrected0,Force err_ecc_corrected_vc0" "0,1"
group.long 0x804++0x7
line.long 0x0 "CSI21_FLDC,"
hexmask.long.word 0x0 18.--31. 1. "reserved,Reserved"
newline
bitfld.long 0x0 16.--17. "DET_SEL,Even field detection condition select" "0: The field is detected as the even field when..,1: The field is detected as the even field when..,?,?"
newline
hexmask.long.word 0x0 0.--15. 1. "FLD_Enable,Virtual Channel even field detection control"
line.long 0x4 "CSI21_FLDD,"
hexmask.long.word 0x4 16.--31. 1. "reserved,Reserved"
newline
hexmask.long.word 0x4 0.--15. 1. "FLD_NUM,Even field number setting"
group.long 0x810++0x3
line.long 0x0 "CSI21_IDIC,"
hexmask.long.word 0x0 17.--31. 1. "reserved0,Reserved"
newline
bitfld.long 0x0 16. "DT_SWAP,ISP Output Data Swap Control" "0: SWAP OFF,1: SWAP ON"
newline
hexmask.long.word 0x0 1.--15. 1. "reserved1,Reserved"
newline
bitfld.long 0x0 0. "LS_LE_OPT,ISP Output HD Control" "0: Output HD when DT = long Paket,1: Set DT = LS"
group.long 0x848++0x3
line.long 0x0 "CSI21_OVR1,"
hexmask.long.tbyte 0x0 13.--31. 1. "reserved0,Reserved"
newline
hexmask.long.byte 0x0 9.--12. 1. "forcerxmode_N,Override enable for FRXM/forcerxmode_N"
newline
hexmask.long.word 0x0 0.--8. 1. "reserved1,Reserved"
group.long 0x2000++0x7
line.long 0x0 "CSI21_PHY_EN,"
hexmask.long.tbyte 0x0 8.--31. 1. "reserved0,Reserved"
newline
bitfld.long 0x0 7. "ENABLE_3,ENABLE_3" "0,1"
newline
bitfld.long 0x0 6. "ENABLE_2,ENABLE_2" "0,1"
newline
bitfld.long 0x0 5. "ENABLE_1,ENABLE_1" "0,1"
newline
bitfld.long 0x0 4. "ENABLE_0,ENABLE_0" "0,1"
newline
rbitfld.long 0x0 1.--3. "reserved1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "ENABLECLK,ENABLECLK" "0,1"
line.long 0x4 "CSI21_FRXM,"
hexmask.long 0x4 4.--31. 1. "reserved,Reserved"
newline
bitfld.long 0x4 3. "FORCERXMODE_3,FORCERXMODE_3" "0,1"
newline
bitfld.long 0x4 2. "FORCERXMODE_2,FORCERXMODE_2" "0,1"
newline
bitfld.long 0x4 1. "FORCERXMODE_1,FORCERXMODE_1" "0,1"
newline
bitfld.long 0x4 0. "FORCERXMODE_0,FORCERXMODE_0" "0,1"
group.long 0x2050++0x7
line.long 0x0 "CSI21_PHYPLL,"
hexmask.long.word 0x0 23.--31. 1. "reserved0,Reserved"
newline
hexmask.long.byte 0x0 16.--22. 1. "HSFREQRANGE_6_0,PHY high speed range select bits"
newline
hexmask.long.word 0x0 0.--15. 1. "reserved1,Reserved"
line.long 0x4 "CSI21_CSI0CLKFCPR,"
hexmask.long.byte 0x4 24.--31. 1. "reserved0,Reserved"
newline
hexmask.long.byte 0x4 16.--23. 1. "CSI0CLKFREQRANGE_7_0,CSI0phy frequency configuration"
newline
hexmask.long.word 0x4 0.--15. 1. "reserved1,Reserved"
group.long 0x2060++0x3
line.long 0x0 "CSI21_PHTW,"
hexmask.long.byte 0x0 25.--31. 1. "reserved0,Reserved"
newline
bitfld.long 0x0 24. "DWEN,TESTDIN_DATA enable" "0: Disable,1: Enable"
newline
hexmask.long.byte 0x0 16.--23. 1. "TESTDIN_DATA,TESTDATE Input for DATA"
newline
hexmask.long.byte 0x0 9.--15. 1. "reserved1,Reserved"
newline
bitfld.long 0x0 8. "CWEN,TESTDIN_CODE enable" "0: Disable,1: Enable"
newline
hexmask.long.byte 0x0 0.--7. 1. "TESTDIN_CODE,TESTDATE Input for CODE"
rgroup.long 0x2064++0x3
line.long 0x0 "CSI21_PHTR,"
hexmask.long.byte 0x0 24.--31. 1. "reserved0,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "TESTDOUT,Those bits are TESTDIN_DATA loopback value from CSI2 PHY."
newline
hexmask.long.word 0x0 0.--15. 1. "reserved1,Reserved"
group.long 0x2068++0x3
line.long 0x0 "CSI21_PHTC,"
hexmask.long.word 0x0 18.--31. 1. "reserved0,Reserved"
newline
bitfld.long 0x0 16.--17. "TEST_PERIOD,Control TESTCLK divider" "0: divide by 1,1: divide by 2,?,?"
newline
hexmask.long.word 0x0 1.--15. 1. "reserved1,Reserved"
newline
bitfld.long 0x0 0. "TESTCLR,This bit sets TESTCLR of the PHY." "0,1"
rgroup.long 0x2814++0x3
line.long 0x0 "CSI21_ST_PHYST,"
bitfld.long 0x0 31. "ST_PHY_READY,ST_PHY_READY (fixed to 0)" "0,1"
newline
hexmask.long.word 0x0 18.--30. 1. "reserved0,Reserved"
newline
hexmask.long.word 0x0 8.--17. 1. "Reserved,Reserved"
newline
bitfld.long 0x0 7. "ST_STOPSTATE_DCK,ST_STOPSTATE_DCK (stopstateclk)" "0,1"
newline
bitfld.long 0x0 4.--6. "reserved1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 3. "ST_STOPSTATE_3,ST_STOPSTATE_3 (stopstatedata_3)" "0,1"
newline
bitfld.long 0x0 2. "ST_STOPSTATE_2,ST_STOPSTATE_2 (stopstatedata_2)" "0,1"
newline
bitfld.long 0x0 1. "ST_STOPSTATE_1,ST_STOPSTATE_1 (stopstatedata_1)" "0,1"
newline
bitfld.long 0x0 0. "ST_STOPSTATE_0,ST_STOPSTATE_0 (stopstatedata_0)" "0,1"
tree.end
tree.end
tree "DAT (Debug and Trace)"
base ad:0x0
tree "Debug_and_Trace_CPU_0"
base ad:0xF81F0000
group.long 0x800++0x3
line.long 0x0 "PMUSNAPSHOTREQ,Address CPU view: H' F81F 0800 Debugger view: H' 801F 0800"
hexmask.long 0x0 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x0 0. "CA760_DSU0,Write signal value of PMUSNAPSHOTREQ to CA760 DSU0" "0,1"
rgroup.long 0x804++0x3
line.long 0x0 "PMUSNAPSHOTACK,Address CPU view: H' F81F 0804 Debugger view: H' 801F 0804"
hexmask.long 0x0 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x0 0. "CA760_DSU0,Read signal value of PMUSNAPSHOTACK from CA760 DSU0" "0,1"
group.long 0xE00++0x7
line.long 0x0 "CSREG_E00,Address CPU view: H' F81F 0E00 Debugger view: H' 801F 0E00"
hexmask.long 0x0 5.--31. 1. "Reserved,Reserved"
bitfld.long 0x0 4. "STM4_FIXED_AWBURST_enable,Override AWBURST at input of STM4 to FIXED type." "0: disable,1: enable"
newline
bitfld.long 0x0 3. "STM3_FIXED_AWBURST_enable,Override AWBURST at input of STM2 to FIXED type." "0: disable,1: enable"
bitfld.long 0x0 2. "STM2_FIXED_AWBURST_enable,Override AWBURST at input of STM2 to FIXED type." "0: disable,1: enable"
newline
bitfld.long 0x0 1. "STM1_FIXED_AWBURST_enable,Override AWBURST at input of STM1 to FIXED type." "0: disable,1: enable"
bitfld.long 0x0 0. "STM0_FIXED_AWBURST_enable,Override AWBURST at input of STM0 to FIXED type." "0: disable,1: enable"
line.long 0x4 "CSREG_E01,Address CPU view: H' F81F 0E04 Debugger view: H' 801F 0E04"
hexmask.long.byte 0x4 24.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x4 20.--23. 1. "STM1_Master_ID_Generator_Operating_Mode,4'b0000: Normal Mode"
newline
hexmask.long.byte 0x4 16.--19. 1. "STM0_Master_ID_Generator_Operating_Mode,See above"
hexmask.long.word 0x4 0.--15. 1. "Reserved1,Reserved"
wgroup.long 0xFB0++0x3
line.long 0x0 "LOCKACCESS,Address CPU view: H' F81F 0FB0 Debugger view: H' 801F 0FB0"
hexmask.long 0x0 0.--31. 1. "KEY_31_0,Lock Access Register. See CoreSight Architecture Specification"
rgroup.long 0xFB4++0x3
line.long 0x0 "LOCKSTATUS,Address CPU view: H' F81F 0FB4 Debugger view: H' 801F 0FB4"
hexmask.long 0x0 3.--31. 1. "Reserved,Lock Status Register. See CoreSight Architecture Specification"
bitfld.long 0x0 2. "nTT,Lock Status Register. See CoreSight Architecture Specification" "0,1"
newline
bitfld.long 0x0 1. "SLK,Lock Status Register. See CoreSight Architecture Specification" "0,1"
bitfld.long 0x0 0. "SLI,Lock Status Register. See CoreSight Architecture Specification" "0,1"
rgroup.long 0xFD0++0x3
line.long 0x0 "Peripheral_ID4,Address CPU view: H' F81F 0FD0 Debugger view: H' 801F 0FD0"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,Reserved"
hexmask.long.byte 0x0 4.--7. 1. "fourKB_count_3_0,Indicates that the device only occupies 4KB of memory"
newline
hexmask.long.byte 0x0 0.--3. 1. "JEP106_continuation_code_3_0,JEDEC code"
rgroup.long 0xFE0++0x1F
line.long 0x0 "Peripheral_ID0,Address CPU view: H' F81F 0FE0 Debugger view: H' 801F 0FE0"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Part_No_0_7_0,part number of the component"
line.long 0x4 "Peripheral_ID1,Address CPU view: H' F81F 0FE4 Debugger view: H' 801F 0FE4"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved,Reserved"
hexmask.long.byte 0x4 4.--7. 1. "JEP106_ID_code_3_0,JEDEC code"
newline
hexmask.long.byte 0x4 0.--3. 1. "Part_No_1_3_0,part number of the component"
line.long 0x8 "Peripheral_ID2,Address CPU view: H' F81F 0FE8 Debugger view: H' 801F 0FE8"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x8 4.--7. 1. "Rev_3_0,Revision"
newline
bitfld.long 0x8 3. "Reserved1,Reserved" "0,1"
bitfld.long 0x8 0.--2. "JEP106_ID_code_6_4,JEDEC code" "0,1,2,3,4,5,6,7"
line.long 0xC "Peripheral_ID3,Address CPU view: H' F81F 0FEC Debugger view: H' 801F 0FEC"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved,Reserved"
hexmask.long.byte 0xC 4.--7. 1. "RevAnd_3_0,Indicates that there are no errata fixes to this component"
newline
hexmask.long.byte 0xC 0.--3. 1. "CustomerModified_3_0,Indicates that the customer has not modified this component"
line.long 0x10 "Component_ID0,Address CPU view: H' F81F 0FF0 Debugger view: H' 801F 0FF0"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "Preamble_7_0,component identification code"
line.long 0x14 "Component_ID1,Address CPU view: H' F81F 0FF4 Debugger view: H' 801F 0FF4"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved,Reserved"
hexmask.long.byte 0x14 4.--7. 1. "Component_class_3_0,Class of the component"
newline
hexmask.long.byte 0x14 0.--3. 1. "Preamble_3_0,component identification code"
line.long 0x18 "Component_ID2,Address CPU view: H' F81F 0FF8 Debugger view: H' 801F 0FF8"
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved,Reserved"
hexmask.long.byte 0x18 0.--7. 1. "Preamble_7_0,component identification code"
line.long 0x1C "Component_ID3,Address CPU view: H' F81F 0FFC Debugger view: H' 801F 0FFC"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved,Reserved"
hexmask.long.byte 0x1C 0.--7. 1. "Preamble_7_0,component identification code"
tree.end
tree "Debug_and_Trace_CPU_1"
base ad:0xE6100000
rgroup.long 0x20++0x3
line.long 0x0 "DBGREG1,"
bitfld.long 0x0 31. "MD11,The value of the MD11 pin input is reflected in the initial value." "0,1"
bitfld.long 0x0 30. "MD10,The value of the MD10 pin input is reflected in the initial value." "0,1"
newline
bitfld.long 0x0 28.--29. "MD21_MD20,The value of MD21 and MD20 pin input is reflected in the initial value." "0,1,2,3"
hexmask.long.word 0x0 18.--27. 1. "Reserved0,Reserved"
newline
bitfld.long 0x0 17. "Reserved1,Reserved" "0,1"
bitfld.long 0x0 16. "MDT_0,The value of the MDT0 pin input is reflected in the initial value." "0,1"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved2,Reserved"
group.long 0x24++0x3
line.long 0x0 "DBGREG2,"
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.word 0x0 2.--15. 1. "Reserved1,Reserved"
newline
bitfld.long 0x0 0.--1. "DMON2EN,Selects the 2-lane HSSTP or not used" "0: PCIE trace output isnsingle_quotationt used by..,1: 2-lane HSSTP uses PCIE port0 trace output,?,?"
rgroup.long 0x2C++0x3
line.long 0x0 "DBGREG4,This is a status register showing debug features are enable or disable. It is possible to perform read operations only from the CPU."
hexmask.long.byte 0x0 28.--31. 1. "Reserved0,Reserved"
bitfld.long 0x0 27. "CRIMP_HNIDEN,Indicates disable or enable of the HNIDEN of Cortex-R52 2(for IMP)." "0: Disable,1: Enable"
newline
bitfld.long 0x0 26. "CRIMP_HIDEN,Indicates disable or enable of the HIDEN of Cortex-R52 2(for IMP)." "0: Disable,1: Enable"
bitfld.long 0x0 25. "CRIMP_NIDEN,Indicates disable or enable of the NIDEN of Cortex-R52 2(for IMP)." "0: Disable,1: Enable"
newline
bitfld.long 0x0 24. "CRIMP_DBGEN,Indicates disable or enable of the DBGEN of Cortex-R52 2(for IMP)." "0: Disable,1: Enable"
bitfld.long 0x0 23. "PAP_NIDEN,Indicates disable or enable of the NIDEN of PAP." "0: Disable,1: Enable"
newline
bitfld.long 0x0 22. "PAP_DBGEN,Indicates disable or enable of the DBGEN of PAP." "0: Disable,1: Enable"
bitfld.long 0x0 21. "DTA_NIDEN,Indicates disable or enable of the NIDEN of DTA." "0: Disable,1: Enable"
newline
bitfld.long 0x0 20. "DTA_DBGEN,Indicates disable or enable of the DBGEN of DTA." "0: Disable,1: Enable"
bitfld.long 0x0 19. "VDSP_SPNIDEN,Indicates disable or enable of the SPNIDEN of VDSP." "0: Disable,1: Enable"
newline
bitfld.long 0x0 18. "VDSP_SPIDEN,Indicates disable or enable of the SPIDEN of VDSP." "0: Disable,1: Enable"
bitfld.long 0x0 17. "VDSP_NIDEN,Indicates disable or enable of the NIDEN of VDSP." "0: Disable,1: Enable"
newline
bitfld.long 0x0 16. "VDSP_DBGEN,Indicates disable or enable of the DBGEN of VDSP." "0: Disable,1: Enable"
bitfld.long 0x0 13.--15. "Reserved1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "CS_DEVEN,Indicates disable or enable of the DAP_DEVICEEN of CoreSight." "0: Disable,1: Enable"
bitfld.long 0x0 11. "CS_SPNIDEN,Indicates disable or enable of the SPNIDEN of CoreSight." "0: Disable,1: Enable"
newline
bitfld.long 0x0 10. "CS_SPIDEN,Indicates disable or enable of the SPIDEN of CoreSight." "0: Disable,1: Enable"
bitfld.long 0x0 9. "CS_NIDEN,Indicates disable or enable of the NIDEN of CoreSight." "0: Disable,1: Enable"
newline
bitfld.long 0x0 8. "CS_DBGEN,Indicates disable or enable of the DBGEN of CoreSight." "0: Disable,1: Enable"
bitfld.long 0x0 7. "CR_HNIDEN,Indicates disable or enable of the HNIDEN of Cortex-R52 0  Cortex-R52 1." "0: Disable,1: Enable"
newline
bitfld.long 0x0 6. "CR_HIDEN,Indicates disable or enable of the HIDEN of Cortex-R52 0  Cortex-R52 1." "0: Disable,1: Enable"
bitfld.long 0x0 5. "CR_NIDEN,Indicates disable or enable of the NIDEN of Cortex-R52 0  Cortex-R52 1." "0: Disable,1: Enable"
newline
bitfld.long 0x0 4. "CR_DBGEN,Indicates disable or enable of the DBGEN of Cortex-R52 0  Cortex-R52 1." "0: Disable,1: Enable"
bitfld.long 0x0 3. "CA_SPNIDEN,Indicates disable or enable of the SPNIDEN of Cortex-A76." "0: Disable,1: Enable"
newline
bitfld.long 0x0 2. "CA_SPIDEN,Indicates disable or enable of the SPIDEN of Cortex-A76." "0: Disable,1: Enable"
bitfld.long 0x0 1. "CA_NIDEN,Indicates disable or enable of the NIDEN of Cortex-A76." "0: Disable,1: Enable"
newline
bitfld.long 0x0 0. "CA_DBGEN,Indicates disable or enable of the DBGEN of Cortex-A76." "0: Disable,1: Enable"
group.long 0x40++0x3
line.long 0x0 "DBGREG9,"
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "AID_7_0,KEY Bit Write Aid"
newline
hexmask.long.byte 0x0 1.--7. 1. "Reserved1,Reserved"
bitfld.long 0x0 0. "KEY,DBGREG2 access control" "0: It is not possible to perform write operations..,1: It is possible to perform write operations to.."
tree.end
tree.end
tree "DBSC5 (External Bus Controller for SDRAM)"
base ad:0x0
tree "DBSC5_0"
base ad:0xE6790000
group.long 0x0++0xB
line.long 0x0 "DB0SYSCONF0,Note:This register should be accessed in 32-bit units. Otherwise. correct operation cannot be guaranteed."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved. (These bits are always read as 0.)"
rbitfld.long 0x0 8.--10. "Reserved_8,Reserved. (These bits are always read as 0.)" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 3.--7. 1. "Reserved_3,Reserved. (These bits are always read as 0.)"
bitfld.long 0x0 0.--2. "pch,The number of physical for each logic 1ch channels is specified." "0,1,2,3,4,5,6,7"
line.long 0x4 "DB0SYSCONF1A,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x4 0.--1. "freqratioa,Frequency Ratio Setting" "?,1: 4,?,?"
line.long 0x8 "DB0SYSCONF2A,"
hexmask.long.tbyte 0x8 10.--31. 1. "Reserved_10,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x8 9. "dfickm,Select DDR-PHY clock for LPDDR4X LPDDR5 and their memory initialization sequence." "0: LPDDR4x,1: LPDDR5"
newline
hexmask.long.byte 0x8 3.--8. 1. "chpos,channel position"
bitfld.long 0x8 0.--2. "sli_schmda,Select DDR Data bus with and number of channel." "?,1: 16bit x 2ch,?,?,?,?,?,?"
group.long 0x20++0x3
line.long 0x0 "DB0MEMKINDA,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 0.--3. 1. "ddcga,SDRAM Type"
group.long 0x30++0x7
line.long 0x0 "DB0MEMCONF00A,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
bitfld.long 0x0 30.--31. "dens00a,Channel 0 Rank 0 Memory Density Type" "0: 2^n type,1: 2^n and#65431,?,?"
rbitfld.long 0x0 29. "Reserved_29,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
newline
hexmask.long.byte 0x0 24.--28. 1. "awrw00a,Channel 0 Rank 0 Row Address Bit width"
rbitfld.long 0x0 22.--23. "Reserved_22,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
newline
bitfld.long 0x0 20.--21. "awbg00a,Ch.0 Rank0 bank group bit width" "0: 0 Bankgroup,?,2: 4 Bankgroups,?"
rbitfld.long 0x0 19. "Reserved_19,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
newline
bitfld.long 0x0 16.--18. "awbk00a,Channel 0 Rank 0 Number of Banks" "?,?,2: 4 banks,3: 8 banks,?,?,?,?"
hexmask.long.byte 0x0 12.--15. 1. "Reserved_12,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
hexmask.long.byte 0x0 8.--11. 1. "awcl00a,Channel 0 Rank 0 Column Address Bit Width"
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
bitfld.long 0x0 0.--1. "dw00a,Channel 0 Rank 0 Memory External Data Bus Width" "?,1: 16 bits,?,?"
line.long 0x4 "DB0MEMCONF01A,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
bitfld.long 0x4 30.--31. "dens01a,Channel 0 Rank 1 Memory Density Type" "0: 2^n type,1: 2^n and#65431,?,?"
rbitfld.long 0x4 29. "Reserved_29,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
newline
hexmask.long.byte 0x4 24.--28. 1. "awrw01a,Channel 0 Rank 1 Row Address Bit Width"
rbitfld.long 0x4 22.--23. "Reserved_22,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
newline
bitfld.long 0x4 20.--21. "awbg01a,Ch.0 Rank1 bank group bit width" "0: 0 Bankgroup,?,2: 4 Bankgroups,?"
rbitfld.long 0x4 19. "Reserved_19,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
newline
bitfld.long 0x4 16.--18. "awbk01a,Channel 0 Rank 1 Number of Banks" "?,?,2: 4 banks,3: 8 banks,?,?,?,?"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
hexmask.long.byte 0x4 8.--11. 1. "awcl01a,Channel 0 Rank 1 Column Address Bit Width"
hexmask.long.byte 0x4 2.--7. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
bitfld.long 0x4 0.--1. "dw01a,Channel 0 Rank 1 External Data Bus Width" "?,1: 16 bits,?,?"
group.long 0x40++0x7
line.long 0x0 "DB0MEMCONF10A,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
bitfld.long 0x0 30.--31. "dens10a,Channel 1 Rank 0 Memory Density Type" "0: 2^n type,1: 2^n and#65431,?,?"
rbitfld.long 0x0 29. "Reserved_29,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
newline
hexmask.long.byte 0x0 24.--28. 1. "awrw10a,Channel 1 Rank 0 Row Address Bit width"
rbitfld.long 0x0 22.--23. "Reserved_22,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
newline
bitfld.long 0x0 20.--21. "awbg10a,Ch.1 Rank0 bank group bit width" "0: 0 Bankgroup,?,2: 4 Bankgroups,?"
rbitfld.long 0x0 19. "Reserved_19,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
newline
bitfld.long 0x0 16.--18. "awbk10a,Channel 1 Rank 0 Number of Banks" "?,?,2: 4 banks,3: 8 banks,4: 16 banks,?,?,?"
hexmask.long.byte 0x0 12.--15. 1. "Reserved_12,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
hexmask.long.byte 0x0 8.--11. 1. "awcl10a,Channel 1 Rank 0 Column Address Bit Width"
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
bitfld.long 0x0 0.--1. "dw10a,Channel 1 Rank 0 Memory External Data Bus Width" "?,1: 16 bits,?,?"
line.long 0x4 "DB0MEMCONF11A,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
bitfld.long 0x4 30.--31. "dens11a,Channel 1 Rank 1 Memory Density Type" "0: 2^n type,1: 2^n and#65431,?,?"
rbitfld.long 0x4 29. "Reserved_29,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
newline
hexmask.long.byte 0x4 24.--28. 1. "awrw11a,Channel 1 Rank 1 Row Address Bit Width"
rbitfld.long 0x4 22.--23. "Reserved_22,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
newline
bitfld.long 0x4 20.--21. "awbg11a,Ch.1 Rank1 bank group bit width" "0: 0 Bankgroup,?,2: 4 Bankgroups,?"
rbitfld.long 0x4 19. "Reserved_19,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
newline
bitfld.long 0x4 16.--18. "awbk11a,Channel 1 Rank 1 Number of Banks" "?,?,2: 4 banks,3: 8 banks,4: 16 banks,?,?,?"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
hexmask.long.byte 0x4 8.--11. 1. "awcl11a,Channel 1 Rank 1 Column Address Bit Width"
hexmask.long.byte 0x4 2.--7. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
bitfld.long 0x4 0.--1. "dw11a,Channel 1 Rank 1 External Data Bus Width" "?,1: 16 bits,?,?"
group.long 0x100++0x3
line.long 0x0 "DB0SYSCNT0A,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x0 0.--15. 1. "reglocka,Register Write Enable Pattern"
group.long 0x110++0x3
line.long 0x0 "DB0FCPRSCTRL00A,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0. "fcscachedis,FCPRS Cache disable" "0: enable,1: disable"
group.long 0x200++0x3
line.long 0x0 "DB0ACEN,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0. "accen,SDRAM Access Enable" "0: Disables access to the SDRAM,1: Enables access to the SDRAM"
group.long 0x400++0x3
line.long 0x0 "DB0BLA,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0.--1. "bla,Burst Length" "0: Fixed to 8,?,2: Fixed to 16,?"
group.long 0x804++0x3
line.long 0x0 "DB0BUS0CNF1,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 16. "bgadm,Bank group address comatible mode" "0: Normal mode,1: Comatible Mode"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
hexmask.long.byte 0x0 8.--13. 1. "Reserved_8,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x0 2.--7. 1. "bkadp,Bank Interleave Mode Setting."
bitfld.long 0x0 0.--1. "bkadm,Bank Address Mode" "0: The whole logical address space is regarded as..,1: Setting prohibited,2: Setting prohibited,3: One for bank 0"
group.long 0x904++0xB
line.long 0x0 "DB0CAM0CNF1,Notes: 1.This register must only be written from within the activation sequence (see section 33.4.1. Activation"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 16.--23. 1. "wbkwait,Writeback Wait Setting"
newline
hexmask.long.byte 0x0 12.--15. 1. "swpinpri3,Swap-In Priority Threshold 3"
hexmask.long.byte 0x0 8.--11. 1. "swpinpri2,Swap-In Priority Threshold 2"
newline
hexmask.long.byte 0x0 4.--7. 1. "swpinpri1,Swap-In Priority Threshold 1"
hexmask.long.byte 0x0 0.--3. 1. "swpinpri1f,Swap-In Priority Threshold 1F"
line.long 0x4 "DB0CAM0CNF2,Notes: 1.This register must only be written from within the activation sequence (see section 33.4.1. Activation"
hexmask.long.tbyte 0x4 10.--31. 1. "Reserved_10,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x4 8.--9. "fillunit,Read Fill Minimum Size" "0: 64 bytes,1: 128 bytes,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "fcdirtymax,Swap-In Threshold"
hexmask.long.byte 0x4 0.--3. 1. "fcdirtymin,Swap-Out Threshold"
line.long 0x8 "DB0CAM0CNF3,Notes: 1.This register must only be written from within the activation sequence (see section 33.4.1. Activation"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x8 0.--7. 1. "rdfull,Read Queue Full Threshold setting"
group.long 0x940++0x3
line.long 0x0 "DB0CAM0CTRL0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0. "camflush,CAM Flush" "0: No flush,1: Flush"
rgroup.long 0x980++0x3
line.long 0x0 "DB0CAM0STAT0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0. "camempty0,CAM0 Empty" "0: Data exists in cache 0,1: Data is empty in cache 0"
group.long 0x1000++0x7
line.long 0x0 "DB0SCHCNT0,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.byte 0x0 26.--31. 1. "Reserved_26,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 24.--25. "scqosckps,Prescaler Setting for QoS counter." "0: No scaler apply,1: Divide clock freq,2: Divide clock freq,3: Divide clock freq"
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 16.--19. 1. "scqtzen,Quantization Bit Enable"
newline
hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 5. "scszen,Burst Size Based Scheduling Enable" "0: disable,1: enable"
newline
bitfld.long 0x0 4. "scbaen,Bank Miss Based Scheduling Enable" "0: disable,1: enable"
rbitfld.long 0x0 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x0 2. "scpgen,Page Hit Based Scheduling Enable" "0: disable,1: enable"
bitfld.long 0x0 1. "scrwen,Read/Write Based Scheduling Enable" "0: disable,1: enable"
newline
bitfld.long 0x0 0. "scqosen,QoS Level Based Scheduling Enable" "0: disable,1: enable"
line.long 0x4 "DB0SCHCNT1,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x4 8.--15. 1. "Reserved_8,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x4 4.--7. 1. "schch1,Channel Number for Physical Channel 1 Setting"
hexmask.long.byte 0x4 0.--3. 1. "schch0,Channel Number for Physical Channel 0 Setting"
group.long 0x1010++0x3
line.long 0x0 "DB0SCHSZ0,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 0.--7. 1. "szth,Size Miss Threshold Setting"
group.long 0x1020++0x7
line.long 0x0 "DB0SCHRW0,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.byte 0x0 28.--31. 1. "rdstptol3,Stop Tolerance for Read Period on Quantization Level 3"
hexmask.long.byte 0x0 24.--27. 1. "rdstptol2,Stop Tolerance for Read Period on Quantization Level 2"
newline
hexmask.long.byte 0x0 20.--23. 1. "rdstptol1,Stop Tolerance for Read Period on Quantization Level 1"
hexmask.long.byte 0x0 16.--19. 1. "rdstptol0,Stop Tolerance for Read Period on Quantization Level 0"
newline
hexmask.long.byte 0x0 12.--15. 1. "wrstptol3,Stop Tolerance for Write Period on Quantization Level 3"
hexmask.long.byte 0x0 8.--11. 1. "wrstptol2,Stop Tolerance for Write Period on Quantization Level 2"
newline
hexmask.long.byte 0x0 4.--7. 1. "wrstptol1,Stop Tolerance for Write Period on Quantization Level 1"
hexmask.long.byte 0x0 0.--3. 1. "wrstptol0,Stop Tolerance for Write Period on Quantization Level 0"
line.long 0x4 "DB0SCHRW1,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.byte 0x4 24.--31. 1. "Reserved_24,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x4 8.--23. 1. "Reserved_8,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x4 0.--7. 1. "sctrfcab,REF to ACT/REF for All Banks Interval Setting for scheduler"
group.long 0x1030++0x3
line.long 0x0 "DB0SCHTR0,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.byte 0x0 24.--31. 1. "scdt3,Data Transfer Cycle Setting for 256 Bytes Data"
hexmask.long.byte 0x0 16.--23. 1. "scdt2,Data Transfer Cycle Setting for 192 Bytes Data"
newline
hexmask.long.byte 0x0 8.--15. 1. "scdt1,Data Transfer Cycle Setting for 128 Bytes Data"
hexmask.long.byte 0x0 0.--7. 1. "scdt0,Data Transfer Cycle Setting for 64 Bytes Data"
group.long 0x1040++0xB
line.long 0x0 "DB0SCHFCTST0,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.byte 0x0 24.--31. 1. "scactact,ACT to ACT Interval Setting for scheduler"
hexmask.long.byte 0x0 16.--23. 1. "scrdact,RD to ACT Interval Setting for scheduler"
newline
hexmask.long.byte 0x0 8.--15. 1. "scwract,WR to ACT Interval Setting for scheduler"
hexmask.long.byte 0x0 0.--7. 1. "scpreact,PRE to ACT Interval Setting for scheduler"
line.long 0x4 "DB0SCHFCTST1,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.byte 0x4 24.--31. 1. "scrdwr,RD to WR Interval Setting for scheduler"
hexmask.long.byte 0x4 16.--23. 1. "scwrrd,WR to RD Interval Setting for scheduler"
newline
hexmask.long.byte 0x4 8.--15. 1. "scactrdwr,ACT to RD/WR Interval Setting for scheduler"
hexmask.long.byte 0x4 0.--7. 1. "scasyncofs,Asynchronous stage offset Setting"
line.long 0x8 "DB0SCHFCTST2,Notes: 1.This register must only be written from within the activation sequence (see section 33.4.1. Activation"
hexmask.long.byte 0x8 28.--31. 1. "wrperi3,Write Priority Period setting on Quantization Level 3"
hexmask.long.byte 0x8 24.--27. 1. "wrperi2,Write Priority Period setting on Quantization Level 2"
newline
hexmask.long.byte 0x8 20.--23. 1. "wrperi1,Write Priority Period setting on Quantization Level 1"
hexmask.long.byte 0x8 16.--19. 1. "wrperi0,Write Priority Period setting on Quantization Level 0"
newline
hexmask.long.byte 0x8 12.--15. 1. "rdperi3,Read Priority Period setting on Quantization Level 3"
hexmask.long.byte 0x8 8.--11. 1. "rdperi2,Read Priority Period setting on Quantization Level 2"
newline
hexmask.long.byte 0x8 4.--7. 1. "rdperi1,Read Priority Period setting on Quantization Level 1"
hexmask.long.byte 0x8 0.--3. 1. "rdperi0,Read Priority Period setting on Quantization Level 0"
group.long 0x1100++0xF
line.long 0x0 "DB0SCHQOS00,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x0 0.--15. 1. "qos0ini,QoS Level 0 Counter Initial Value Setting"
line.long 0x4 "DB0SCHQOS01,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x4 0.--15. 1. "qos0th0,QoS Level 0 Threshold 0 Setting"
line.long 0x8 "DB0SCHQOS02,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x8 0.--15. 1. "qos0th1,QoS Level 0 Threshold 1 Setting"
line.long 0xC "DB0SCHQOS03,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0xC 0.--15. 1. "qos0th2,QoS Level 0 Threshold 2 Setting"
group.long 0x1140++0xF
line.long 0x0 "DB0SCHQOS40,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x0 0.--15. 1. "qos4ini,QoS Level 4 Counter Initial Value Setting"
line.long 0x4 "DB0SCHQOS41,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x4 0.--15. 1. "qos4th0,QoS Level 4 Threshold 0 Setting"
line.long 0x8 "DB0SCHQOS42,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x8 0.--15. 1. "qos4th1,QoS Level 4 Threshold 1 Setting"
line.long 0xC "DB0SCHQOS43,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0xC 0.--15. 1. "qos4th2,QoS Level 4 Threshold 2 Setting"
group.long 0x1190++0xF
line.long 0x0 "DB0SCHQOS90,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x0 0.--15. 1. "qos9ini,QoS Level 9 Counter Initial Value Setting"
line.long 0x4 "DB0SCHQOS91,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x4 0.--15. 1. "qos9th0,QoS Level 9 Threshold 0 Setting"
line.long 0x8 "DB0SCHQOS92,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x8 0.--15. 1. "qos9th1,QoS Level 9 Threshold 1 Setting"
line.long 0xC "DB0SCHQOS93,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0xC 0.--15. 1. "qos9th2,QoS Level 9 Threshold 2 Setting"
group.long 0x11C0++0x3F
line.long 0x0 "DB0SCHQOS120,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x0 0.--15. 1. "qos12ini,QoS Level 12 Counter Initial Value Setting"
line.long 0x4 "DB0SCHQOS121,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x4 0.--15. 1. "qos12th0,QoS Level 12 Threshold 0 Setting"
line.long 0x8 "DB0SCHQOS122,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x8 0.--15. 1. "qos12th1,QoS Level 12 Threshold 1 Setting"
line.long 0xC "DB0SCHQOS123,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0xC 0.--15. 1. "qos12th2,QoS Level 12 Threshold 2 Setting"
line.long 0x10 "DB0SCHQOS130,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x10 0.--15. 1. "qos13ini,QoS Level 13 Counter Initial Value Setting"
line.long 0x14 "DB0SCHQOS131,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x14 0.--15. 1. "qos13th0,QoS Level 13 Threshold 0 Setting"
line.long 0x18 "DB0SCHQOS132,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x18 0.--15. 1. "qos13th1,QoS Level 13 Threshold 1 Setting"
line.long 0x1C "DB0SCHQOS133,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x1C 0.--15. 1. "qos13th2,QoS Level 13 Threshold 2 Setting"
line.long 0x20 "DB0SCHQOS140,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x20 0.--15. 1. "qos14ini,QoS Level 14 Counter Initial Value Setting"
line.long 0x24 "DB0SCHQOS141,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x24 0.--15. 1. "qos14th0,QoS Level 14 Threshold 0 Setting"
line.long 0x28 "DB0SCHQOS142,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x28 0.--15. 1. "qos14th1,QoS Level 14 Threshold 1 Setting"
line.long 0x2C "DB0SCHQOS143,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x2C 0.--15. 1. "qos14th2,QoS Level 14 Threshold 2 Setting"
line.long 0x30 "DB0SCHQOS150,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x30 0.--15. 1. "qos15ini,QoS Level 15 Counter Initial Value Setting"
line.long 0x34 "DB0SCHQOS151,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x34 0.--15. 1. "qos15th0,QoS Level 15 Threshold 0 Setting"
line.long 0x38 "DB0SCHQOS152,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x38 0.--15. 1. "qos15th1,QoS Level 15 Threshold 1 Setting"
line.long 0x3C "DB0SCHQOS153,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x3C 0.--15. 1. "qos15th2,QoS Level 15 Threshold 2 Setting"
group.long 0x7000++0x13
line.long 0x0 "DB0FSINTXXX00A,"
bitfld.long 0x0 31. "intexdclaxa,DCLS comparator error interrupt indication for AXI-domain (excluding SRAM related); 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
bitfld.long 0x0 30. "intexdclsra,DCLS comparator error interrupt indication for AXI-domain (SRAM related); 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
newline
hexmask.long.tbyte 0x0 11.--29. 1. "Reserved_11,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 10. "intodasbda,OrderID error in AXI64 Bch clk_dbs side Interrupt indication; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
newline
bitfld.long 0x0 9. "intodasrda,OrderID error in AXI64 Rch clk_dbs side Interrupt indication; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
bitfld.long 0x0 8. "intodasbxa,OrderID error in AXI64 Bch clk_axi side Interrupt indication; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
newline
bitfld.long 0x0 7. "intodasrxa,OrderID error in AXI64 Rch clk_axi side Interrupt indication; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
bitfld.long 0x0 6. "intodaswxa,OrderID error in AXI64 Wch clk_axi side Interrupt indication; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
newline
bitfld.long 0x0 5. "intodasawa,OrderID error in AXI64 AWch clk_axi side Interrupt indication; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
bitfld.long 0x0 4. "intodasara,OrderID error in AXI64 ARch clk_axi side Interrupt indication; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
bitfld.long 0x0 2. "intdxaswxa,EDC error in AXSM W Ch clk_axi domain Interrupt indication; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
newline
bitfld.long 0x0 1. "intdxasawa,EDC error in AXSM AW Ch clk_axi domain Interrupt indication; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
bitfld.long 0x0 0. "intdxasara,EDC error in AXSM AR Ch clk_axi domain Interrupt indication; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
line.long 0x4 "DB0FSINTXXX01A,"
hexmask.long.word 0x4 23.--31. 1. "Reserved_23,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x4 16.--22. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x4 7.--15. 1. "Reserved_7,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x4 6. "intnomem0a,No mem error in address decoder of dbsccore0 interrupt indication; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
newline
bitfld.long 0x4 5. "intedbccr0a,Cache RAM duplication error interrupt indication for dbsccore0; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
rbitfld.long 0x4 4. "Reserved_4,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 3. "intdxamawx0a,EDC error in AXMM W Ch Interrupt indication for dbsccore0; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
bitfld.long 0x4 2. "intdxamaw0a,EDC error in AXMM AW Ch Interrupt indication for dbsccore0; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
newline
bitfld.long 0x4 1. "intdxamar0a,EDC error in AXMM AR Ch Interrupt indication for dbsccore0; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
bitfld.long 0x4 0. "intepdvaxi0a,POST error in AXI domain interrupt indication for dbsccore0; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
line.long 0x8 "DB0FSINTXXX02A,"
hexmask.long.byte 0x8 24.--31. 1. "intcmbcsr0a,ECC error (multi: over 2bit error) for SystemRAM RMW Interrupt indication for dbsccore0; 0: no interrupt  1: interrupt"
hexmask.long.byte 0x8 16.--23. 1. "intcdbcsr0a,ECC error (detect: 1bit error and correct) for SystemRAM RMW Interrupt indication for dbsccore0; 0: no interrupt  1: interrupt"
newline
hexmask.long.byte 0x8 8.--15. 1. "intcmbcrr0a,ECC error (multi: over 2bit error) for read response Interrupt indication for dbsccore0; 0: no interrupt  1: interrupt"
hexmask.long.byte 0x8 0.--7. 1. "intcdbcrr0a,ECC error (detect: 1bit error and correct) for read response Interrupt indication for dbsccore0; 0: no interrupt  1: interrupt"
line.long 0xC "DB0FSINTXXX03A,"
hexmask.long 0xC 0.--31. 1. "intcdbcdr0a,ECC error (detect: 1bit error and correct) for DRAM RMW interrupt indication for dbsccore0; 0: no interrupt  1: interrupt"
line.long 0x10 "DB0FSINTXXX04A,"
hexmask.long 0x10 0.--31. 1. "intcmbcdr0a,ECC error (multi: over 2bit error) for DRAM RMW interrupt indication for dbsccore0; 0: no interrupt  1: interrupt"
group.long 0x7020++0xB
line.long 0x0 "DB0FSINTXXX08A,"
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,ECC error injection for ECC checker for DRAM RMW interrupt indication for dbsccore1; 0: no interrupt  1: interrupt"
rbitfld.long 0x0 16.--18. "Reserved_16,Reserved. (These bits are always read as 0.)" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x0 3.--15. 1. "Reserved_3,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 2. "intexbcdr0a,ECC error injection for ECC checker for DRAM RMW interrupt indication for dbsccore0; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
newline
bitfld.long 0x0 1. "intexbcsr0a,ECC error injection for ECC checker for SystemRAM RMW Interrupt indication for dbsccore0; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
bitfld.long 0x0 0. "intexbcrr0a,ECC error injection for ECC checker for read response Interrupt indication for dbsccore0; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
line.long 0x4 "DB0FSINTXXX09A,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
rbitfld.long 0x4 24.--25. "Reserved_24,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
rbitfld.long 0x4 16.--17. "Reserved_16,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x4 9. "intoddvard1a,OrderID error of isbus async read ch. interrupt indication for memory channel 1; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
newline
bitfld.long 0x4 8. "intdxdvard1a,EDC error of isbus async read ch. interrupt indication for memory channel 1; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
hexmask.long.byte 0x4 2.--7. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
bitfld.long 0x4 1. "intoddvard0a,OrderID error of isbus async read ch. interrupt indication for memory channel 0; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
bitfld.long 0x4 0. "intdxdvard0a,EDC error of isbus async read ch. interrupt indication for memory channel 0; 0: no interrupt  1: interrupt" "0: no interrupt,1: interrupt"
line.long 0x8 "DB0FSINTXXX10A,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x8 0.--15. 1. "intxxasynsba,Async sideband errors in axi domain;"
group.long 0x7040++0x3
line.long 0x0 "DB0FSINTCLR00A,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0. "icldclsa,Clear safety error interrupt signal (level) for clk_axi domain" "?,1: clear interrupt"
group.long 0x7080++0xF
line.long 0x0 "DB0FSINTENB00A,"
bitfld.long 0x0 31. "ienexdclaxa,Comparator error of DCLS for clk_axi group Interrupt enable bit; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
bitfld.long 0x0 30. "ienexdclsra,Comparator error of DCLS group sram interrupt enable bit; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
newline
hexmask.long.tbyte 0x0 11.--29. 1. "Reserved_11,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 10. "ienodasbda,OrderID error in AXI64 Bch clk_dbs side Interrupt enable bit; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
newline
bitfld.long 0x0 9. "ienodasrda,OrderID error in AXI64 Rch clk_dbs side Interrupt enable bit; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
bitfld.long 0x0 8. "ienodasbxa,OrderID error in AXI64 Bch clk_axi side Interrupt enable bit; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
newline
bitfld.long 0x0 7. "ienodasrxa,OrderID error in AXI64 Rch clk_axi side Interrupt enable bit; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
bitfld.long 0x0 6. "ienodaswxa,OrderID error in AXI64 Wch clk_axi side Interrupt enable bit; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
newline
bitfld.long 0x0 5. "ienodasawa,OrderID error in AXI64 AWch clk_axi side Interrupt enable bit; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
bitfld.long 0x0 4. "ienodasara,OrderID error in AXI64 ARch clk_axi side Interrupt enable bit; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
bitfld.long 0x0 2. "iendxaswxa,EDC error in AXSM W Ch clk_axi domain Interrupt enable bit; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
newline
bitfld.long 0x0 1. "iendxasawa,EDC error in AXSM AW Ch clk_axi domain Interrupt enable bit; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
bitfld.long 0x0 0. "iendxasara,EDC error in AXSM AR Ch clk_axi domain Interrupt enable bit; 0: Interrupt disable  1: Interrupt enable." "0: Interrupt disable,1: Interrupt enable"
line.long 0x4 "DB0FSINTENB01A,"
hexmask.long.word 0x4 23.--31. 1. "Reserved_23,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x4 16.--22. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x4 7.--15. 1. "Reserved_7,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x4 6. "iennomem0a,No mem error in address decoder of dbsccore0 interrupt enable bit; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
newline
bitfld.long 0x4 5. "ienedbccr0a,Cache RAM duplication error interrupt enable bit for dbsccore0; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
rbitfld.long 0x4 4. "Reserved_4,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 3. "iendxamawx0a,EDC error in AXMM W Ch Interrupt enable bit for dbsccore0; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
bitfld.long 0x4 2. "iendxamaw0a,EDC error in AXMM AW Ch Interrupt enable bit for dbsccore0; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
newline
bitfld.long 0x4 1. "iendxamar0a,EDC error in AXMM AR Ch Interrupt enable bit for dbsccore0; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
bitfld.long 0x4 0. "ienepdvaxi0a,POST error in AXI domain interrupt enable bit for dbsccore0; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
line.long 0x8 "DB0FSINTENB02A,"
hexmask.long.byte 0x8 24.--31. 1. "iencmbcsr0a,ECC error (multi: over 2bit error) for SystemRAM RMW Interrupt enable bit for dbsccore0;"
hexmask.long.byte 0x8 16.--23. 1. "iencdbcsr0a,ECC error (detect: 1bit error and correct) for SystemRAM RMW Interrupt enable bit for dbsccore0;"
newline
hexmask.long.byte 0x8 8.--15. 1. "iencmbcrr0a,ECC error (multi: over 2bit error) for read response Interrupt enable bit for dbsccore0;"
hexmask.long.byte 0x8 0.--7. 1. "iencdbcrr0a,ECC error (detect: 1bit error and correct) for read response Interrupt enable bit for dbsccore0;"
line.long 0xC "DB0FSINTENB03A,"
hexmask.long 0xC 0.--31. 1. "iencdbcdr0a,ECC error (detect: 1bit error and correct) for DRAM RMW interrupt enable bit for dbsccore0"
group.long 0x7094++0x3
line.long 0x0 "DB0FSINTENB04A,"
hexmask.long 0x0 0.--31. 1. "iencmbcdr0a,ECC error (multi: over 2bit error) for DRAM RMW interrupt enable bit for dbsccore0"
group.long 0x70A4++0x7
line.long 0x0 "DB0FSINTENB08A,"
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
rbitfld.long 0x0 16.--18. "Reserved_16,Reserved. (These bits are always read as 0.)" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x0 3.--15. 1. "Reserved_3,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 2. "ienexbcdr0a,ECC error injection for ECC checker for DRAM RMW interrupt enable bit for dbsccore0; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
newline
bitfld.long 0x0 1. "ienexbcsr0a,ECC error injection for ECC checker for SystemRAM RMW Interrupt enable bit for dbsccore0; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
bitfld.long 0x0 0. "ienexbcrr0a,ECC error injection for ECC checker for read response Interrupt enable bit for dbsccore0; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
line.long 0x4 "DB0FSINTENB09A,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
rbitfld.long 0x4 24.--25. "Reserved_24,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
rbitfld.long 0x4 16.--17. "Reserved_16,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x4 9. "ienoddvard1a,OrderID error of isbus async read ch. interrupt enable for memory channel 1; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
newline
bitfld.long 0x4 8. "iendxdvard1a,EDC error of isbus async read ch. interrupt enable for memory channel 1; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
hexmask.long.byte 0x4 2.--7. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
bitfld.long 0x4 1. "ienoddvard0a,OrderID error of isbus async read ch. interrupt enable for memory channel 0; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
bitfld.long 0x4 0. "iendxdvard0a,EDC error of isbus async read ch. interrupt enable for memory channel 0; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
group.long 0x7100++0x17
line.long 0x0 "DB0FSINTENB10A,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x0 0.--15. 1. "ienxxasynsba,Async sideband errors interrupt enable in axi domain;"
line.long 0x4 "DB0FSINJECT00A,"
bitfld.long 0x4 31. "ijtexdclaxa,Comparator error of DCLS for clk_axi group Interrupt injection mode" "0: uninjection mode,1: injection mode"
bitfld.long 0x4 30. "ijtexdclsra,Comparator error of DCLS for sram Interrupt injection mode" "0: uninjection mode,1: injection mode"
newline
hexmask.long.tbyte 0x4 11.--29. 1. "Reserved_11,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x4 10. "ijtodasbda,OrderID error in AXI64 Bch clk_dbs side Interrupt injection mode" "0: uninjection mode,1: injection mode"
newline
bitfld.long 0x4 9. "ijtodasrda,OrderID error in AXI64 Rch clk_dbs side Interrupt injection mode" "0: uninjection mode,1: injection mode"
bitfld.long 0x4 8. "ijtodasbxa,OrderID error in AXI64 Bch clk_axi side Interrupt injection mode" "0: uninjection mode,1: injection mode"
newline
bitfld.long 0x4 7. "ijtodasrxa,OrderID error in AXI64 Rch clk_axi side Interrupt injection mode" "0: uninjection mode,1: injection mode"
bitfld.long 0x4 6. "ijtodaswxa,OrderID error in AXI64 Wch clk_axi side Interrupt injection mode" "0: uninjection mode,1: injection mode"
newline
bitfld.long 0x4 5. "ijtodasawa,OrderID error in AXI64 AWch clk_axi side Interrupt injection mode" "0: uninjection mode,1: injection mode"
bitfld.long 0x4 4. "ijtodasara,OrderID error in AXI64 ARch clk_axi side Interrupt injection mode" "0: uninjection mode,1: injection mode"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
bitfld.long 0x4 2. "ijtdxaswxa,EDC error in AXSM W C" "0: uninjection mode,1: injection modeh clk_axi domain Interrupt.."
newline
bitfld.long 0x4 1. "ijtdxasawa,EDC error in AXSM AW Ch clk_axi domain Interrupt injection mode" "0: uninjection mode,1: injection mode"
bitfld.long 0x4 0. "ijtdxasara,EDC error in AXSM AR Ch clk_axi domain Interrupt injection mode" "0: uninjection mode,1: injection mode"
line.long 0x8 "DB0FSINJECT01A,"
hexmask.long.word 0x8 23.--31. 1. "Reserved_23,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x8 16.--22. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x8 7.--15. 1. "Reserved_7,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x8 6. "ijtnomem0a,No mem error in address decoder of dbsccore0 interrupt injection mode" "0: uninjection mode,1: injection mode"
newline
bitfld.long 0x8 5. "ijtedbccr0a,Cache RAM duplication error interrupt injection mode for dbsccore0" "0: uninjection mode,1: injection mode"
rbitfld.long 0x8 4. "Reserved_4,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x8 3. "ijtdxamawx0a,EDC error in AXMM W Ch Interrupt injection mode for dbsccore0" "0: uninjection mode,1: injection mode"
bitfld.long 0x8 2. "ijtdxamaw0a,EDC error in AXMM AW Ch Interrupt injection mode for dbsccore0" "0: uninjection mode,1: injection mode"
newline
bitfld.long 0x8 1. "ijtdxamar0a,EDC error in AXMM AR Ch Interrupt injection mode for dbsccore0" "0: uninjection mode,1: injection mode"
bitfld.long 0x8 0. "ijtepdvaxi0a,POST error in AXI domain interrupt injection mode for dbsccore0" "0: uninjection mode,1: injection mode"
line.long 0xC "DB0FSINJECT02A,"
hexmask.long.byte 0xC 25.--31. 1. "Reserved_25,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0xC 24. "ijtcmbcsr0a,ECC error (multi: over 2bit error) for SystemRAM RMW Interrupt injection mode for dbsccore0" "0: uninjection mode,1: injection mode"
newline
hexmask.long.byte 0xC 17.--23. 1. "Reserved_17,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0xC 16. "ijtcdbcsr0a,ECC error (detect: 1bit error and correct) for SystemRAM RMW Interrupt injection mode for dbsccore0" "0: uninjection mode,1: injection mode"
newline
hexmask.long.byte 0xC 9.--15. 1. "Reserved_9,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0xC 8. "ijtcmbcrr0a,ECC error (multi: over 2bit error) for read response Interrupt injection mode for dbsccore0" "0: uninjection mode,1: injection mode"
newline
hexmask.long.byte 0xC 1.--7. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0xC 0. "ijtcdbcrr0a,ECC error (detect: 1bit error and correct) for read response Interrupt injection mode for dbsccore0" "0: uninjection mode,1: injection mode"
line.long 0x10 "DB0FSINJECT03A,"
hexmask.long 0x10 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x10 0. "ijtcdbcdr0a,ECC error (detect: 1bit error and correct) for DRAM RMW interrupt injection mode for dbsccore0" "0: uninjection mode,1: injection mode"
line.long 0x14 "DB0FSINJECT04A,"
hexmask.long 0x14 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x14 0. "ijtcmbcdr0a,ECC error (multi: over 2bit error) for DRAM RMW interrupt injection mode for dbsccore0" "0: uninjection mode,1: injection mode"
rgroup.long 0x7118++0xB
line.long 0x0 "DB0FSINJECT05A,"
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 24. "Reserved_24,Reserved. (These bits are always read as 0.)" "0,1"
newline
hexmask.long.byte 0x0 17.--23. 1. "Reserved_17,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 16. "Reserved_16,Reserved. (These bits are always read as 0.)" "0,1"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 8. "Reserved_8,Reserved. (These bits are always read as 0.)" "0,1"
newline
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0. "Reserved_0,Reserved. (These bits are always read as 0.)" "0,1"
line.long 0x4 "DB0FSINJECT06A,"
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x4 0. "Reserved_0,Reserved. (These bits are always read as 0.)" "0,1"
line.long 0x8 "DB0FSINJECT07A,"
hexmask.long 0x8 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x8 0. "Reserved_0,Reserved. (These bits are always read as 0.)" "0,1"
group.long 0x7124++0x7
line.long 0x0 "DB0FSINJECT09A,"
hexmask.long.byte 0x0 26.--31. 1. "Reserved_26,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x0 18.--23. 1. "Reserved_18,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
rbitfld.long 0x0 16.--17. "Reserved_16,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x0 10.--15. 1. "Reserved_10,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 9. "ijtoddvard1a,OrderID error of isbus async read ch. interrupt injection mode for memory channel 1" "0: uninjection mode,1: injection mode"
newline
bitfld.long 0x0 8. "ijtdxdvard1a,EDC error of isbus async read ch. interrupt injection mode for memory channel 1" "0: uninjection mode,1: injection mode"
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
bitfld.long 0x0 1. "ijtoddvard0a,OrderID error of isbus async read ch. interrupt injection mode for memory channel 0" "0: uninjection mode,1: injection mode"
bitfld.long 0x0 0. "ijtdxdvard0a,EDC error of isbus async read ch. interrupt injection mode for memory channel 0" "0: uninjection mode,1: injection mode"
line.long 0x4 "DB0FSINJECT10A,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x4 0.--15. 1. "ijtxxasynsba,Async sideband errors interrupt injection mode"
rgroup.long 0x7200++0x7
line.long 0x0 "DB0FSINTCNT0A,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 16.--23. 1. "cntdxaswxa,EDC error in AXSM W Ch clk_axi domain Interrupt counter mode"
newline
hexmask.long.byte 0x0 8.--15. 1. "cntdxasawa,EDC error in AXSM AW Ch clk_axi domain Interrupt counter mode"
hexmask.long.byte 0x0 0.--7. 1. "cntdxasara,EDC error in AXSM AR Ch clk_axi domain Interrupt counter mode"
line.long 0x4 "DB0FSINTCNT1A,"
hexmask.long.byte 0x4 24.--31. 1. "cntcxfcprd0a,CRC error in FCPRD Interrupt counter for dbsccore0"
hexmask.long.byte 0x4 16.--23. 1. "cntdxamawx0a,EDC error in AXMM W Ch Interrupt counter for dbsccore0"
newline
hexmask.long.byte 0x4 8.--15. 1. "cntdxamaw0a,EDC error in AXMM AW Ch Interrupt counter for dbsccore0"
hexmask.long.byte 0x4 0.--7. 1. "cntdxamar0a,EDC error in AXMM AR Ch Interrupt counter for dbsccore0"
rgroup.long 0x720C++0x7
line.long 0x0 "DB0FSINTCNT3A,"
hexmask.long.byte 0x0 24.--31. 1. "cntcmbcsr0a,ECC error (multi: over 2bit error) for SystemRAM RMW Interrupt counter mode for dbsccore0"
hexmask.long.byte 0x0 16.--23. 1. "cntcdbcsr0a,ECC error (detect: 1bit error and correct) for SystemRAM RMW Interrupt counter mode for dbsccore0"
newline
hexmask.long.byte 0x0 8.--15. 1. "cntcmbcrr0a,ECC error (multi: over 2bit error) for read response Interrupt counter mode for dbsccore0"
hexmask.long.byte 0x0 0.--7. 1. "cntcdbcrr0a,ECC error (detect: 1bit error and correct) for read response Interrupt counter mode for dbsccore0"
line.long 0x4 "DB0FSINTCNT04A,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x4 8.--15. 1. "cntcmbcdr0a,ECC error (multi: over 2bit error) for DRAM RMW interrupt counter for dbsccore0"
newline
hexmask.long.byte 0x4 0.--7. 1. "cntcdbcdr0a,ECC error (detect: 1bit error and correct) for DRAM RMW interrupt counter for dbsccore0"
rgroup.long 0x7218++0x3
line.long 0x0 "DB0FSINTCNT06A,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved. (These bits are always read as 0.)"
group.long 0x7400++0x3
line.long 0x0 "DB0FSCONFAXI0,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
rbitfld.long 0x0 10.--11. "Reserved_10,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
bitfld.long 0x0 9. "drameccen01,ECC protection enable for DDR access for rank1 on dbsccore0." "0: disable DRAM ECC protection,1: enable DRAM ECC protection"
newline
bitfld.long 0x0 8. "drameccen00,ECC protection enable for DDR access for rank0 on dbsccore0." "0: disable DRAM ECC protection,1: enable DRAM ECC protection"
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "srameccdis,ECC protection disable for SysRAM access." "0: enable SysRAM ECC protection,1: disable SysRAM ECC protection"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "errcrctdis,Error correction disable." "0: enable error correction,1: disable error correction"
rgroup.long 0x7410++0x3
line.long 0x0 "DB0FSECCIJTCHK,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x0 0.--13. 1. "eccijtchk,ECC package of 64 bits data inject"
group.long 0x7414++0xB
line.long 0x0 "DB0FSECCIJTERRL,"
hexmask.long 0x0 0.--31. 1. "eccijterrl,Invert any 64bit data and 14 check bits (Low bit side)"
line.long 0x4 "DB0FSECCIJTERRM,"
hexmask.long 0x4 0.--31. 1. "eccijterrm,Invert any 64bit data and 14 check bits (Middle bit side)"
line.long 0x8 "DB0FSECCIJTERRH,"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x8 0.--13. 1. "eccijterrh,Invert any 64bit data and 14 check bits (High bit side)"
group.long 0x7430++0xF
line.long 0x0 "DB0FSECCIJTADRL0,"
hexmask.long 0x0 0.--31. 1. "eccijtadrl0,Specific address register for error injection for ECC chk.(LSB side)"
line.long 0x4 "DB0FSECCIJTADRH0,"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x4 0.--7. 1. "eccijtadrh0,Specific address register for error injection for ECC chk.(MSB side)"
line.long 0x8 "DB0FSECCIJTDATL0,"
hexmask.long 0x8 0.--31. 1. "eccijtdatl0,Data for error injection(LSB side)"
line.long 0xC "DB0FSECCIJTDATH0,"
hexmask.long 0xC 0.--31. 1. "eccijtdath0,Data for error injection(MSB side)"
group.long 0x7450++0x7
line.long 0x0 "DB0FSDRAMECCAREA00,"
hexmask.long 0x0 0.--31. 1. "drameccarea00,ECC protection area for rank0 on dbsccore0."
line.long 0x4 "DB0FSDRAMECCAREA01,"
hexmask.long 0x4 0.--31. 1. "drameccarea01,ECC protection area for rank1 on dbsccore0."
group.long 0x7480++0x3
line.long 0x0 "DB0FSCTRLAXI0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0. "postenaxi,Start POST for asynchronous bridge in devcnt. When this bit is asserted  this bit is cleared to 0 at next cycle autmatically." "0,1"
group.long 0x74A0++0x7
line.long 0x0 "DB0FSCTRLBCAM0A,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0. "bcijtreq,Error injection for ECC of RMW. When this bit is asserted " "0,1"
line.long 0x4 "DB0FSCTRLBCAM1A,"
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x4 0. "bcijtaddr,Enable of Error injection mode. If this bit is asserted  error injection request is generated." "0,1"
rgroup.long 0x7510++0xF
line.long 0x0 "DB0FSMNDEA0LA,"
hexmask.long 0x0 0.--31. 1. "mndea0la,If AXMM access invalid address range to dbsccore00  this register will return error address (LSB bits)"
line.long 0x4 "DB0FSMNDEA0HA,"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x4 0.--7. 1. "mndea0ha,If AXMM access invalid address range to dbsccore00  this register will return error address (MSB bits)"
line.long 0x8 "DB0FSMNDESID0A,"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x8 0.--7. 1. "mndesid0a,If AXMM access invalid address range to dbsccore00  this register will return error Source ID"
line.long 0xC "DB0FSMNEDCSID0A,"
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0xC 16.--23. 1. "mnedcsidwx0a,EDC error source ID for W channel of dbsccore0"
newline
hexmask.long.byte 0xC 8.--15. 1. "mnedcsidaw0a,EDC error source ID for AW channel of dbsccore0"
hexmask.long.byte 0xC 0.--7. 1. "mnedcsidar0a,EDC error source ID for AR channel of dbsccore0"
group.long 0x7600++0x7
line.long 0x0 "DB0FSCTRL00A,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0. "srainidis,System-RAM initialization disable." "0: Enable,1: Disable"
line.long 0x4 "DB0FSCTRL01A,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
rbitfld.long 0x4 1. "Reserved_1,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0. "ddrinistart0,DDR initialization start trigger for dbsccore0 (1-shot pulse  clear right after asserting)" "0: Not trigger,1: trigger asserted"
group.long 0x7640++0xB
line.long 0x0 "DB0FSCONF00A,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0.--1. "ddrinirank0,DDR initialization area rank address for dbsccore 0." "0,1,2,3"
line.long 0x4 "DB0FSCONF01A,"
hexmask.long 0x4 0.--31. 1. "ddriniareas0,DDR initialization area start row address for dbsccore0."
line.long 0x8 "DB0FSCONF02A,"
hexmask.long 0x8 0.--31. 1. "ddriniareae0,DDR initialization area end row address for dbsccore0."
rgroup.long 0x7650++0x3
line.long 0x0 "DB0FSCONF03A,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0.--1. "Reserved_0,Reserved. (These bits are always read as 0.)" "0,1,2,3"
rgroup.long 0x7680++0xB
line.long 0x0 "DB0FSSTAT00A,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 1. "Reserved_1,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x0 0. "srainiend0,System-RAM initialization completion of dbsccore0" "0,1"
line.long 0x4 "DB0FSSTAT01A,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x4 1. "Reserved_1,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0. "ddriniend0,DRAM initialization completion of dbsccore0" "0,1"
line.long 0x8 "DB0FSSTAT02A,"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x8 1. "Reserved_1,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x8 0. "bceccempty0,Status register for dbsccore0. mean that cache doesn't have dirty entry of ECC target." "0,1"
group.long 0x7700++0x3
line.long 0x0 "DB0FCPRSFS00A,"
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 8.--9. "fserr_force,(FuSa) bit[0]:EDC error force assert (level)  bit[1]:DCLS error force assert (level)" "0,1,2,3"
newline
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 0.--3. 1. "fserr_inj,(FuSa) bit[0]:DCLS error injection (level)  bit[1]:SRAM EDC error injection (level)  bit[2]:AXMM IF EDC error injection (level)  bit[3]:CRC error injection (level)"
rgroup.long 0x7704++0x3
line.long 0x0 "DB0FCPRSFS01A,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 0.--3. 1. "fserr_sta,(FuSa) bit[0]:DCLS error status (level)  bit[1]:SRAM EDC error status (level)  bit[2]:AXMM IF EDC error status (level)  bit[3]:CRC error status (level)"
group.long 0x7708++0x3
line.long 0x0 "DB0FCPRSFS02A,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 0.--3. 1. "fserr_sta_clr,(FuSa) error status clear signal. bit[0]:DCLS error status clear (pulse  active high)  bit[1]:SRAM EDC error status clear (pulse  active high)  bit[2]:AXMM IF EDC error status clear (pulse  active high)  bit[3]:CRC error status clear.."
rgroup.long 0x770C++0x3
line.long 0x0 "DB0FCPRSFS03A,"
hexmask.long 0x0 0.--31. 1. "fstrd,Total amount of read data from compression area in 64-byte unit."
group.long 0x7710++0x3
line.long 0x0 "DB0FCPRSFS04A,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0.--1. "fstrd_clr,fso_db0_trd clear signal (pulse  active high)" "0,1,2,3"
rgroup.long 0x7714++0x3
line.long 0x0 "DB0FCPRSFS05A,"
hexmask.long 0x0 0.--31. 1. "fstdcd,Total amount of compressed data in 64-byte unit."
group.long 0x7718++0x3
line.long 0x0 "DB0FCPRSFS06A,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0.--1. "fstdcd_clr,fso_db0_tdcd clear signal (pulse  active high)" "0,1,2,3"
tree.end
tree "DBSC5_1"
base ad:0xE67A4000
group.long 0x0++0xB
line.long 0x0 "DB0SYSCONF1,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 16.--17. "ddrckr,WCK:CK frequency ratio " "?,1: 4,?,?"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0.--1. "freqratio,Frequency Ratio Setting" "0: Frequency ratio of DBSC5 clock to memory clock =,1: 4,2: Frequency ratio of DBSC5 clock to memory clock =,?"
line.long 0x4 "DB0SYSCONF2,"
hexmask.long 0x4 3.--31. 1. "Reserved_3,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x4 0.--2. "sli_schmdd,Select DDR Data bus with and number of channel." "?,1: 16bit x 2ch,?,?,?,?,?,?"
line.long 0x8 "DB0PHYCONF0,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.tbyte 0x8 9.--31. 1. "Reserved_9,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
rbitfld.long 0x8 8. "Reserved_8,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.byte 0x8 2.--7. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x8 0.--1. "phytype,PHY Type" "?,1: DFI,?,?"
group.long 0x20++0x3
line.long 0x0 "DB0MEMKIND,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 0.--3. 1. "ddcg,SDRAM Type"
group.long 0x30++0x7
line.long 0x0 "DB0MEMCONF00,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
bitfld.long 0x0 30.--31. "dens00,Channel 0 Rank 0 Memory Density Type" "0: 2^n type,1: 2^n and#65431,?,?"
rbitfld.long 0x0 29. "Reserved_29,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
newline
hexmask.long.byte 0x0 24.--28. 1. "awrw00,Channel 0 Rank 0 Row Address Bit width"
rbitfld.long 0x0 22.--23. "Reserved_22,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
newline
bitfld.long 0x0 20.--21. "awbg00,Ch.0 Rank0 bank group bit width" "0: 0 Bankgroup,?,2: 4 Bankgroups,?"
rbitfld.long 0x0 19. "Reserved_19,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
newline
bitfld.long 0x0 16.--18. "awbk00,Channel 0 Rank 0 Number of Banks" "?,?,2: 4 banks,3: 8 banks,4: 16 banks,?,?,?"
hexmask.long.byte 0x0 12.--15. 1. "Reserved_12,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
hexmask.long.byte 0x0 8.--11. 1. "awcl00,Channel 0 Rank 0 Column Address Bit Width"
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
bitfld.long 0x0 0.--1. "dw00,Channel 0 Rank 0 Memory External Data Bus Width" "?,1: 16 bits,?,?"
line.long 0x4 "DB0MEMCONF01,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
bitfld.long 0x4 30.--31. "dens01,Channel 0 Rank 1 Memory Density Type" "0: 2^n type,1: 2^n and#65431,?,?"
rbitfld.long 0x4 29. "Reserved_29,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
newline
hexmask.long.byte 0x4 24.--28. 1. "awrw01,Channel 0 Rank 1 Row Address Bit Width"
rbitfld.long 0x4 22.--23. "Reserved_22,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
newline
bitfld.long 0x4 20.--21. "awbg01,Ch.0 Rank1 bank group bit width" "0: 0 Bankgroup,?,2: 4 Bankgroups,?"
rbitfld.long 0x4 19. "Reserved_19,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
newline
bitfld.long 0x4 16.--18. "awbk01,Channel 0 Rank 1 Number of Banks" "?,?,2: 4 banks,3: 8 banks,4: 16 banks,?,?,?"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
hexmask.long.byte 0x4 8.--11. 1. "awcl01,Channel 0 Rank 1 Column Address Bit Width"
hexmask.long.byte 0x4 2.--7. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
bitfld.long 0x4 0.--1. "dw01,Channel 0 Rank 1 External Data Bus Width" "?,1: 16 bits,?,?"
group.long 0x40++0x7
line.long 0x0 "DB0MEMCONF10,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
bitfld.long 0x0 30.--31. "dens10,Channel 1 Rank 0 Memory Density Type" "0: 2^n type,1: 2^n and#65431,?,?"
rbitfld.long 0x0 29. "Reserved_29,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
newline
hexmask.long.byte 0x0 24.--28. 1. "awrw10,Channel 1 Rank 0 Row Address Bit width"
rbitfld.long 0x0 22.--23. "Reserved_22,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
newline
bitfld.long 0x0 20.--21. "awbg10,Ch.1 Rank0 bank group bit width" "0: 0 Bankgroup,?,2: 4 Bankgroups,?"
rbitfld.long 0x0 19. "Reserved_19,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
newline
bitfld.long 0x0 16.--18. "awbk10,Channel 1 Rank 0 Number of Banks" "?,?,2: 4 banks,3: 8 banks,4: 16 banks,?,?,?"
hexmask.long.byte 0x0 12.--15. 1. "Reserved_12,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
hexmask.long.byte 0x0 8.--11. 1. "awcl10,Channel 1 Rank 0 Column Address Bit Width"
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
bitfld.long 0x0 0.--1. "dw10,Channel 1 Rank 0 Memory External Data Bus Width" "?,1: 16 bits,?,?"
line.long 0x4 "DB0MEMCONF11,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
bitfld.long 0x4 30.--31. "dens11,Channel 1 Rank 1 Memory Density Type" "0: 2^n type,1: 2^n and#65431,?,?"
rbitfld.long 0x4 29. "Reserved_29,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
newline
hexmask.long.byte 0x4 24.--28. 1. "awrw11,Channel 1 Rank 1 Row Address Bit Width"
rbitfld.long 0x4 22.--23. "Reserved_22,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
newline
bitfld.long 0x4 20.--21. "awbg11,Ch.1 Rank1 bank group bit width" "0: 0 Bankgroup,?,2: 4 Bankgroups,?"
rbitfld.long 0x4 19. "Reserved_19,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
newline
bitfld.long 0x4 16.--18. "awbk11,Channel 1 Rank 1 Number of Banks" "?,?,2: 4 banks,3: 8 banks,4: 16 banks,?,?,?"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
hexmask.long.byte 0x4 8.--11. 1. "awcl11,Channel 1 Rank 1 Column Address Bit Width"
hexmask.long.byte 0x4 2.--7. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
bitfld.long 0x4 0.--1. "dw11,Channel 1 Rank 1 External Data Bus Width" "?,1: 16 bits,?,?"
group.long 0x100++0x3
line.long 0x0 "DB0SYSCNT0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x0 0.--15. 1. "reglock,Register Write Enable Pattern"
group.long 0x204++0x7
line.long 0x0 "DB0RFEN,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
rbitfld.long 0x0 16. "Reserved_16,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0. "arfen,Auto-Refresh Enable" "0: Stops the auto-refresh function,1: Starts the auto-refresh function"
line.long 0x4 "DB0CMD,Notes: 1. Set the value specified for the product type you are using. Refer to table 21.1"
hexmask.long.byte 0x4 24.--31. 1. "opc,Operation Code"
hexmask.long.byte 0x4 20.--23. 1. "ch,Channel Specification"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
bitfld.long 0x4 16.--18. "rank,Rank Specification" "0: Rank 0,1: Rank 1,?,?,?,?,?,?"
newline
hexmask.long.word 0x4 0.--15. 1. "arg,Argument"
rgroup.long 0x210++0x3
line.long 0x0 "DB0WAIT,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0. "busy,Operation Completion Waiting" "0: The command specified by using the DBCMD..,1: The command specified by using the DBCMD.."
group.long 0x300++0x33
line.long 0x0 "DB0TR0,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 0.--7. 1. "cl,CL/RL (CAS Latency/Read Latency)"
line.long 0x4 "DB0TR1,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x4 0.--7. 1. "cwl,CWL/WL (CAS Write Latency/Write Latency)"
line.long 0x8 "DB0TR2,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x8 0.--7. 1. "al,AL (AditiveLatency)"
line.long 0xC "DB0TR3,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0xC 0.--7. 1. "trcd,tRCD (ACT to internal read or write delay time/RAS-to-CAS delay)"
line.long 0x10 "DB0TR4,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.byte 0x10 24.--31. 1. "Reserved_24,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x10 16.--23. 1. "trpa,tRP/tRPab (PRE command period/Row precharge time (all banks))"
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hexmask.long.byte 0x10 8.--15. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x10 0.--7. 1. "trp,tRP/tRPpb (PRE command period/Row precharge time (single bank))"
line.long 0x14 "DB0TR5,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x14 0.--7. 1. "trc,tRC (ACT to ACT or REF command period/ACTIVATE-to-ACTIVATE command period (same bank))"
line.long 0x18 "DB0TR6,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x18 0.--7. 1. "tras,tRAS (ACT to PRE command period/Row active time)"
line.long 0x1C "DB0TR7,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.byte 0x1C 24.--31. 1. "Reserved_24,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x1C 16.--23. 1. "trrd_s,tRRD (ACT to ACT different bankgroup)"
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hexmask.long.byte 0x1C 8.--15. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x1C 0.--7. 1. "trrd,tRRD (ACT to ACT same bank group)"
line.long 0x20 "DB0TR8,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x20 0.--7. 1. "tfaw,tFAW (Four activate window/Four-bank ACTIVATE window)"
line.long 0x24 "DB0TR9,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.tbyte 0x24 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x24 0.--7. 1. "trdpr,tRTP/nRTP (Internal READ Command to PRECHARGE Command delay/Internal READ to PRECHARGE command delay)"
line.long 0x28 "DB0TR10,Notes: 1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.tbyte 0x28 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x28 0.--7. 1. "twr,WR/nWR (WRITE recovery time)"
line.long 0x2C "DB0TR11,Notes: 1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.tbyte 0x2C 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x2C 0.--7. 1. "trdwr,Read-to-Write Interval"
line.long 0x30 "DB0TR12,Notes: 1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.byte 0x30 24.--31. 1. "Reserved_24,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x30 16.--23. 1. "twrrd_s,Write-to-Read different bankgroup interval"
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hexmask.long.byte 0x30 8.--15. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x30 0.--7. 1. "twrrd,Write-to-Read same bankgroup Interval"
group.long 0x338++0x13
line.long 0x0 "DB0TR14,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 16.--23. 1. "tckehdll,tXPDLL (Exit Precharge Power Down with DLL frozen to commands requiring a locked DLL)"
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hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 0.--7. 1. "tckeh,tXP (Exit Power Down with DLL on to any valid command; Exit Precharge Power Down with DLL frozen to commands not requiring a locked DLL/Exit power- down to next valid command delay)"
line.long 0x4 "DB0TR15,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.byte 0x4 24.--31. 1. "tespd,tESPD - Timing interval between SRE and PDE"
hexmask.long.byte 0x4 16.--23. 1. "tckesr,tCKESR/tSR (Minimum CKE low width for Self Refresh entry to exit timing/Minimum Self-Refresh Time (Entry to Exit))"
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hexmask.long.byte 0x4 8.--15. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x4 0.--7. 1. "tckel,tCKE (CKE minimum pulse width)"
line.long 0x8 "DB0TR16,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.byte 0x8 24.--31. 1. "dqienltncy,dqienltncy Setting"
hexmask.long.byte 0x8 16.--23. 1. "dql,dqltncy Setting"
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hexmask.long.byte 0x8 8.--15. 1. "dqenltncy,dqenltncy Setting"
hexmask.long.byte 0x8 0.--7. 1. "wdql,wdqltncy Setting"
line.long 0xC "DB0TR17,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.byte 0xC 24.--31. 1. "tmodrd,tMRR (MODE REGISTER READ command period)"
hexmask.long.byte 0xC 16.--23. 1. "tmod,tMOD/tMRD (Mode Register Set command update delay/Mode register set command delay)"
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hexmask.long.word 0xC 0.--15. 1. "Reserved_0,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
line.long 0x10 "DB0TR18,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.byte 0x10 27.--31. 1. "Reserved_27,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x10 24.--26. "rodtl,ODT Assert Period Setting in Reading" "0: BL/2 cycles,1: BL/2 + 1 cycles,?,?,?,?,?,?"
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hexmask.long.byte 0x10 19.--23. 1. "Reserved_19,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x10 16.--18. "rodta,ODT Assert Start Timing Setting in Reading" "0: Simultaneous with the read command,1: 1 cycle after the read command,?,?,?,?,?,?"
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hexmask.long.byte 0x10 11.--15. 1. "Reserved_11,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x10 8.--10. "wodtl,ODT Assert Period Setting in Writing" "0: BL/2 cycles,1: BL/2 + 1 cycles,?,?,?,?,?,?"
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hexmask.long.byte 0x10 3.--7. 1. "Reserved_3,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x10 0.--2. "wodta,ODT Assert Start Timing Setting in Writing" "0: Simultaneous with the write command,1: 1 cycle after the write command,?,?,?,?,?,?"
group.long 0x350++0x13
line.long 0x0 "DB0TR20,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.word 0x0 16.--31. 1. "txsdll,tXSDLL (Exit Self Refresh to commands requiring a locked DLL)"
hexmask.long.word 0x0 0.--15. 1. "txs,tXS/tXSR (Exit Self Refresh to commands not requiring a locked DLL/SELF REFRESH exit to next valid command delay)"
line.long 0x4 "DB0TR21,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.byte 0x4 24.--31. 1. "Reserved_24,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x4 16.--23. 1. "tccd_s,tCCD (CAS# to CAS# command delay/CAS-to-CAS delay different bankgroup)"
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hexmask.long.byte 0x4 8.--15. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x4 0.--7. 1. "tccd,tCCD (CAS# to CAS# command delay/CAS-to-CAS delay same bankgroup)"
line.long 0x8 "DB0TR22,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.word 0x8 16.--31. 1. "tzqcal,tZQCAL (ZQ calibration time)"
hexmask.long.byte 0x8 8.--15. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
hexmask.long.byte 0x8 0.--7. 1. "tzqlat,tZQLAT (ZQCAL latch quiet time)"
line.long 0xC "DB0TR23,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0xC 0.--1. "rrspc,RD to RD Interval Limitation" "0: No limitation,1: (TCCD_S + 1,?,?"
line.long 0x10 "DB0TR24,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.byte 0x10 24.--31. 1. "rdcsgap,dfi_rddata_cs gap"
hexmask.long.byte 0x10 16.--23. 1. "rdcslat,dfi_rddata_cs latency"
newline
hexmask.long.byte 0x10 8.--15. 1. "wrcsgap,dfi_wrdata_cs gap"
hexmask.long.byte 0x10 0.--7. 1. "wrcslat,dfi_wrdata_cs latency"
rgroup.long 0x364++0x3
line.long 0x0 "DB0TR25,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 16.--23. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved. (These bits are always read as 0.)"
group.long 0x36C++0x2B
line.long 0x0 "DB0TR27,"
hexmask.long 0x0 0.--31. 1. "tpdn,tPDN (Timing interval between DSM entry and DSM exit (PDX))"
line.long 0x4 "DB0TR28,"
hexmask.long 0x4 0.--31. 1. "txsrdsm,tXSR_DSM (Timing interval between DSM exit (PDX) to SRX)"
line.long 0x8 "DB0TR29,"
hexmask.long 0x8 0.--31. 1. "tdsmxp,tXDSM_XP (Timing interval between DSM exit (1st PDX) to 2nd PDX)"
line.long 0xC "DB0TR30,"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0xC 0.--7. 1. "tcmdpd,tCMDPD (Basic timing interval between valid command to PDE  from SRE to DSM entry)"
line.long 0x10 "DB0TR31,"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x10 4.--7. 1. "twck2dqomax,WCK to DQ output offset (tWCK2DQO)"
newline
hexmask.long.byte 0x10 0.--3. 1. "twck2dqimax,DQ to WCK input offset (tWCK2DQI)"
line.long 0x14 "DB0TR32,"
hexmask.long.byte 0x14 24.--31. 1. "twckpresta,This is twck_toggle in DFI 5.0  unit is WCK  it is tWCKPRE_STATIC*4 with WCK:CK = 4:1  tWCKPRE_STATIC*2 with WCK:CK = 2:1"
hexmask.long.byte 0x14 16.--23. 1. "twckenlf,This is twck_en_fs in DFI 5.0  unit is WCK  it is tWCKENL_FS*4 + 4 -1 with WCK:CK = 4:1  tWCKENL_FS*2-1 with WCK:CK = 2:1"
newline
hexmask.long.byte 0x14 8.--15. 1. "twckenw,This is twck_en_wr in DFI 5.0  unit is WCK  it is tWCKENL_WR*4 + 4 -1 with WCK:CK = 4:1  tWCKENL_WR*2-1 with WCK:CK = 2:1"
hexmask.long.byte 0x14 0.--7. 1. "twckenr,This is twck_en_rd in DFI 5.0  unit is WCK  it is tWCKENL_RD*4 + 4 -1 with WCK:CK = 4:1  tWCKENL_RD*2-1 with WCK:CK = 2:1"
line.long 0x18 "DB0TR33,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x18 8.--15. 1. "twckdis,Period that WCK must keep toggle after receive command to turn off WCK before stop WCK (WCK unit)"
newline
hexmask.long.byte 0x18 4.--7. 1. "Reserved_4,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x18 0.--3. 1. "twcktgl,This is timing Twck_fast_toggle in DFI5.0  unit is WCK"
line.long 0x1C "DB0TR34,"
hexmask.long.tbyte 0x1C 10.--31. 1. "Reserved_10,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x1C 8.--9. "twckpst,tWCKPST - DQ burst post-amble timing that WCK must keep toggle after end of DQ burst" "0,1,2,3"
newline
hexmask.long.byte 0x1C 3.--7. 1. "Reserved_3,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x1C 0.--2. "twcksus,tWCKSUS - Period minimum from WCKSUSP command to RD/WR/MWR(nCK unit)" "0,1,2,3,4,5,6,7"
line.long 0x20 "DB0TR35,"
hexmask.long.byte 0x20 24.--31. 1. "Reserved_24,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x20 16.--23. 1. "twr2wckoff,tWCKPST - timing WCK off from WR  it is WL + BL/n_max + Round-down(tWCK/tCK)(nCK unit)"
newline
hexmask.long.byte 0x20 8.--15. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x20 0.--7. 1. "trd2wckoff,timing WCK off from WR  it is RL + BL/n_max + Round-down(tWCK/tCK)(nCK unit)"
line.long 0x24 "DB0TR36,"
hexmask.long.word 0x24 20.--31. 1. "Reserved_20,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x24 16.--19. 1. "twsfswrx,Timing interval from command CAS WSF to CAS WRX (nCK unit)"
newline
hexmask.long.byte 0x24 12.--15. 1. "Reserved_12,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x24 8.--11. 1. "twsoffwrx,Timing interval from command CAS OFF to CAS WRX (nCK unit)"
newline
hexmask.long.byte 0x24 4.--7. 1. "Reserved_4,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x24 0.--3. 1. "twssuswrx,Timing interval from command CAS SUS to CAS WRX (nCK unit)"
line.long 0x28 "DB0TR37,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x28 0.--15. 1. "tosco,tOSCDQI/tOSCDQO - Timing interval from oscillator to MRR command"
group.long 0x400++0x3
line.long 0x0 "DB0BL,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0.--1. "bl,Burst Length" "0: Fixed to 8,?,2: Fixed to 16,?"
group.long 0x414++0x7
line.long 0x0 "DB0RFCNF1,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.word 0x0 16.--31. 1. "refpmax,Maximum Pulling-in Number of Refresh Commands Setting"
hexmask.long.word 0x0 0.--15. 1. "refint,tREFI (Average periodic refresh interval/Average Refresh Interval)"
line.long 0x4 "DB0RFCNF2,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x4 20.--31. 1. "Reserved_20,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x4 16.--19. 1. "refpmin,Minimum Pulling-in Number of Refresh Commands Setting"
newline
hexmask.long.word 0x4 2.--15. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x4 0.--1. "refints,Average Refresh Interval Adjustment" "0: Average interval is REFINT,1: Average interval is 1/2 REFINT,?,?"
group.long 0x424++0x3
line.long 0x0 "DB0CALCNF,Notes:1.When CALINT = 0. calibration is executed (ZQCS command is issued) only once after auto-refresh executed immediately after 1 is written to the CALEN bit; no calibration is executed after that."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 24. "calen,SDRAM Calibration Enable" "0: SDRAM calibration is disabled,1: SDRAM calibration is enabled"
newline
hexmask.long.byte 0x0 17.--23. 1. "Reserved_17,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
rbitfld.long 0x0 16. "Reserved_16,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 0.--15. 1. "calint,SDRAM Calibration Frequency"
group.long 0x438++0xF
line.long 0x0 "DB0RNK2,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x0 4.--7. 1. "rkrr1,Additional Restriction on READ-READ Interval between Different Ranks for Channel 1."
hexmask.long.byte 0x0 0.--3. 1. "rkrr0,Additional Restriction on READ-READ Interval between Different Ranks for Channel 0."
line.long 0x4 "DB0RNK3,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x4 8.--15. 1. "Reserved_8,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x4 4.--7. 1. "rkrw1,Additional Restriction on READ-WRITE Interval between Different Ranks for Channel 1."
hexmask.long.byte 0x4 0.--3. 1. "rkrw0,Additional Restriction on READ-WRITE Interval between Different Ranks for Channel 0."
line.long 0x8 "DB0RNK4,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x8 8.--15. 1. "Reserved_8,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x8 4.--7. 1. "rkwr1,Additional Restriction on WRITE-READ Interval between Different Ranks for Channel 1."
hexmask.long.byte 0x8 0.--3. 1. "rkwr0,Additional Restriction on WRITE-READ Interval between Different Ranks for Channel 0."
line.long 0xC "DB0RNK5,Notes:1.The setting is in cycles of the SDRAM operating clock."
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0xC 8.--15. 1. "Reserved_8,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0xC 4.--7. 1. "rkww1,Additional Restriction on WRITE-WRITE Interval between Different Ranks for Channel 1."
hexmask.long.byte 0xC 0.--3. 1. "rkww0,Additional Restriction on WRITE-WRITE Interval between Different Ranks for Channel 0."
group.long 0x480++0x7
line.long 0x0 "DB0WRX0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 1. "wxfe0,Write X function enable for physical channel 0" "0: disable,1: enable"
newline
bitfld.long 0x0 0. "wxs0,Write X Data Selection (0: data to be written is double_quotation0double_quotation only  1: data written can be selected with 0 and 1 and byte control for physical channel 0)" "0: data to be written is..,1: data written can be selected with 0 and 1 and.."
line.long 0x4 "DB0WRX1,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x4 1. "wxfe1,Write X function enable for physical channel 1" "0: disable,1: enable"
newline
bitfld.long 0x4 0. "wxs1,Write X Data Selection (0: data to be written is double_quotation0double_quotation only  1: data written can be selected with 0 and 1 and byte control for physical channel 1)" "0: data to be written is..,1: data written can be selected with 0 and 1 and.."
group.long 0x490++0x3
line.long 0x0 "DB0DCLPCNT,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 1. "rdcfen,Read data copy enable . This is a optional low power setting for LPDDR5" "0: disable,1: enable"
newline
bitfld.long 0x0 0. "wdcfen,Write data copy enable." "0: disable,1: enable"
group.long 0x510++0x3
line.long 0x0 "DB0BSWAP,"
hexmask.long 0x0 0.--31. 1. "bswap,Byte Swap Table Setting"
group.long 0x518++0x3
line.long 0x0 "DB0DBICNT,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 1. "dbirden,Read DBI Setting" "0: Read DBI function is disabled,1: Read DBI function is enabled"
newline
bitfld.long 0x0 0. "dbiwren,Write DBI Setting" "0: Write DBI function is disabled,1: Write DBI function is enabled"
group.long 0x520++0x3
line.long 0x0 "DB0DFIPMSTRCNF,Notes:1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 4.--5. "wtmode,DFI PHY Master receive mode" "0,1,2,3"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "pmstren,DFI PHY Master Control" "0,1"
rgroup.long 0x524++0x7
line.long 0x0 "DB0DFIPMSTRSTAT0,Notes:1.Only write to this register after having disabled SDRAM access (i.e. the ACCEN bit in the DBACEN register = 0)."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved. (These bits are always read as 0.)"
line.long 0x4 "DB0DFIPMSTRSTAT1,Notes:1.Only write to this register after having disabled SDRAM access (i.e. the ACCEN bit in the DBACEN register = 0). 2.This register should be accessed in 32-bit units. Otherwise. correct operation cannot be guaranteed."
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x4 3. "pmstrreq1,dfi_phymstr_req status for channel 1" "0,1"
newline
bitfld.long 0x4 2. "pmstrack1,dfi_phymstr_ack status for channel 1" "0,1"
bitfld.long 0x4 1. "pmstrreq0,dfi_phymstr_req status for channel 0" "0,1"
newline
bitfld.long 0x4 0. "pmstrack0,dfi_phymstr_ack status for channel 0" "0,1"
group.long 0x534++0x3
line.long 0x0 "DB0DFILPCNF1,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 0.--7. 1. "lpresp,Low power Control/Data request assert period. The setting is in cycles of the DFI clock (not DFI PHY clock)."
group.long 0x540++0x3
line.long 0x0 "DB0DFICUPDCNF,Notes: 1.Writing this register should only be performed when the following conditions are met."
hexmask.long.byte 0x0 24.--31. 1. "cupdreqmax,Maximum of Control Update Request Assert Period"
hexmask.long.byte 0x0 16.--23. 1. "cupdreqmin,Minimum of Control Update Request Assert Period"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0. "cupden,Control Update Interface Enable." "0: Disable,1: Enable"
group.long 0x550++0x7
line.long 0x0 "DB0RFMC0,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
rbitfld.long 0x0 10.--11. "Reserved_10,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
rbitfld.long 0x0 8.--9. "Reserved_8,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
bitfld.long 0x0 4.--5. "rfmsb01,Ch.0 Rank1  reflect config RFM sub-bank counter implemented (RFMSBC - LP5 SDRAM MR57)" "0,1,2,3"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
bitfld.long 0x0 0.--1. "rfmsb00,Ch.0 Rank0  reflect config RFM sub-bank counter implemented (RFMSBC - LP5 SDRAM MR57)" "0,1,2,3"
line.long 0x4 "DB0RFMC1,"
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
rbitfld.long 0x4 12.--13. "Reserved_12,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
rbitfld.long 0x4 10.--11. "Reserved_10,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
rbitfld.long 0x4 8.--9. "Reserved_8,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
rbitfld.long 0x4 6.--7. "Reserved_6,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
bitfld.long 0x4 4.--5. "rfmsb11,Ch.1 Rank1  reflect config RFM sub-bank counter implemented (RFMSBC - LP5 SDRAM MR57)" "0,1,2,3"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
bitfld.long 0x4 0.--1. "rfmsb10,Ch.1 Rank0  reflect config RFM sub-bank counter implemented (RFMSBC - LP5 SDRAM MR57)" "0,1,2,3"
group.long 0x560++0x3
line.long 0x0 "DB0WCKCNT,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 1.--2. "cntwckwr,Control dfi_wck_wr_p*" "0: toggle dfi_wck_wr_p* according to read or write,1: fix dfi_wck_wr_p* to 0,2: fix dfi_wck_wr_p* to 1,?"
newline
bitfld.long 0x0 0. "cntwcken,Negate dfi_wck_en (means stop WCK) when changing DQ direction or rank" "0,1"
rgroup.long 0x600++0x3
line.long 0x0 "DB0DFISTAT0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0. "dfiinitcompl0,DFIINITCOMPL for Channel 0" "0,1"
group.long 0x604++0x3
line.long 0x0 "DB0DFICNT0,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
rbitfld.long 0x0 29.--31. "Reserved_29,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 24.--28. 1. "dfifrequency0,FREQUENCY for Channel 0"
newline
hexmask.long.byte 0x0 16.--23. 1. "dfibytedis0,BYTEDIS for Channel 0"
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "dfifreqfsp0,FREQUENCY FSP for channel 0" "0,1,2,3"
hexmask.long.byte 0x0 8.--11. 1. "dficlkdis0,CLKDIS for Channel 0"
newline
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
bitfld.long 0x0 4.--5. "dfifreqratio0,FREQRATIO for Channel 0" "?,1: 2,?,?"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "dfiinitstart0,INITSTART for Channel 0" "0,1"
group.long 0x618++0x17
line.long 0x0 "DB0PDCNT02,Notes: 1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x0 0.--15. 1. "freqchgack0,freq_change_ack0 signal control"
line.long 0x4 "DB0PDCNT03,Notes: 1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x4 0.--15. 1. "dllrstn0,dll_rst_n0 port control"
line.long 0x8 "DB0PDLK0,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long 0x8 0.--31. 1. "plock0,PHY Unit Access Lock Setting for Channel 0"
line.long 0xC "DB0PDRGA0,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0xC 0.--15. 1. "pra0,PHY Unit Register Address for Channel 0"
line.long 0x10 "DB0PDRGD0,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long 0x10 0.--31. 1. "prd0,PHY Unit Registers Access for channel 0"
line.long 0x14 "DB0PDRGM0,"
hexmask.long 0x14 4.--31. 1. "Reserved_4,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x14 0.--3. 1. "prm0,PHY Unit Registers Mask for channel 0"
rgroup.long 0x630++0x3
line.long 0x0 "DB0PDSTAT00,"
hexmask.long 0x0 0.--31. 1. "cntstat00,Status bits for phy0. The following signal values are reflected."
rgroup.long 0x640++0x3
line.long 0x0 "DB0DFISTAT1,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0. "dfiinitcompl1,DFIINITCOMPL for Channel 1" "0,1"
group.long 0x644++0x3
line.long 0x0 "DB0DFICNT1,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
rbitfld.long 0x0 29.--31. "Reserved_29,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 24.--28. 1. "dfifrequency1,FREQUENCY for Channel 1"
newline
hexmask.long.byte 0x0 16.--23. 1. "dfibytedis1,BYTEDIS for Channel 1"
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "dfifreqfsp1,FREQUENCY FSP for channel 1" "0,1,2,3"
hexmask.long.byte 0x0 8.--11. 1. "dficlkdis1,CLKDIS for Channel 1"
newline
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3"
bitfld.long 0x0 4.--5. "dfifreqratio1,FREQRATIO for Channel 1" "?,1: 2,?,?"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "dfiinitstart1,INITSTART for Channel 1" "0,1"
group.long 0x658++0x17
line.long 0x0 "DB0PDCNT12,Notes: 1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x0 0.--15. 1. "freqchgack1,freq_change_ack1 port control"
line.long 0x4 "DB0PDCNT13,Notes: 1.This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x4 0.--15. 1. "dllrstn1,dll_rst_n1 port control"
line.long 0x8 "DB0PDLK1,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long 0x8 0.--31. 1. "plock1,PHY Unit Access Lock Setting for Channel 1"
line.long 0xC "DB0PDRGA1,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0xC 0.--15. 1. "pra1,PHY Unit Register Address for Channel 1"
line.long 0x10 "DB0PDRGD1,Note:This register must only be written from within the activation sequence (see section 33.4.1. Activation Sequence)."
hexmask.long 0x10 0.--31. 1. "prd1,PHY Unit Registers Access for channel 1"
line.long 0x14 "DB0PDRGM1,"
hexmask.long 0x14 4.--31. 1. "Reserved_4,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x14 0.--3. 1. "prm1,PHY Unit Registers Mask for channel 1"
rgroup.long 0x670++0x3
line.long 0x0 "DB0PDSTAT10,"
hexmask.long 0x0 0.--31. 1. "cntstat10,Status bits for phy1. The following signal values are reflected."
rgroup.long 0x700++0x7
line.long 0x0 "DB0MRRDR0,Note:This register is applicable only for LPDDR4 SDRAM. For the other SDRAM types. this register is unused. Refer to table 21.1."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 8.--15. 1. "mrrdr01,MRR Read Data for Channel 0/A/Rank 1"
newline
hexmask.long.byte 0x0 0.--7. 1. "mrrdr00,MRR Read Data for Channel 0/A/Rank 0"
line.long 0x4 "DB0MRRDR1,Note:This register is applicable only for LPDDR4 SDRAM. For the other SDRAM types. this register is unused. Refer to table 21.1."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x4 8.--15. 1. "mrrdr11,MRR Read Data for Channel 0/B/Rank 1"
newline
hexmask.long.byte 0x4 0.--7. 1. "mrrdr10,MRR Read Data for Channel 0/B/Rank 0"
rgroup.long 0x800++0x3
line.long 0x0 "DB0WCK2DQMD,"
hexmask.long 0x0 0.--31. 1. "wck2dqmd,Oscillator mode selection for LPDDR5:"
group.long 0x810++0x3
line.long 0x0 "DB0WCK2DQOSCTHH00,"
hexmask.long.word 0x0 16.--31. 1. "wck2dqoscthh01,Ch.0/Rank1 wck2dq threshhold(High)"
hexmask.long.word 0x0 0.--15. 1. "wck2dqoscthh00,Ch.0/Rank0 wck2dq threshhold(High)"
group.long 0x818++0x3
line.long 0x0 "DB0WCK2DQOSCTHH10,"
hexmask.long.word 0x0 16.--31. 1. "wck2dqoscthh11,Ch.1/Rank1 wck2dq threshhold(High)"
hexmask.long.word 0x0 0.--15. 1. "wck2dqoscthh10,Ch.1/Rank0 wck2dq threshhold(High)"
group.long 0x850++0x3
line.long 0x0 "DB0WCK2DQOSCTHL00,"
hexmask.long.word 0x0 16.--31. 1. "wck2dqoscthl01,Ch.0/Rank1 wck2dq threshhold(Low)"
hexmask.long.word 0x0 0.--15. 1. "wck2dqoscthl00,Ch.0/Rank0 wck2dq threshhold(Low)"
group.long 0x858++0x3
line.long 0x0 "DB0WCK2DQOSCTHL10,"
hexmask.long.word 0x0 16.--31. 1. "wck2dqoscthl11,Ch.1/Rank1 wck2dq threshhold(Low)"
hexmask.long.word 0x0 0.--15. 1. "wck2dqoscthl10,Ch.1/Rank0 wck2dq threshhold(Low)"
group.long 0xF80++0x3
line.long 0x0 "DB0TSTCONF1,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0. "lowfreqmd,Change clock frequence for test" "0: Normal,1: Low frequency for test"
group.long 0x3000++0x7
line.long 0x0 "DB0FSINTXXX00D,"
hexmask.long 0x0 7.--31. 1. "Reserved_7,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 6. "intodaswxd,OrderID error in AXI64 Wch clk_dbsc side Interrupt indication; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
newline
bitfld.long 0x0 5. "intodasawd,OrderID error in AXI64 AWch clk_dbsc side Interrupt indication; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
bitfld.long 0x0 4. "intodasard,OrderID error in AXI64 ARch clk_dbsc side Interrupt indication; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
bitfld.long 0x0 2. "intdxaswxd,EDC error in AXSM W Ch clk_dbsc domain Interrupt indication; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
newline
bitfld.long 0x0 1. "intdxasawd,EDC error in AXSM AW Ch clk_dbsc domain Interrupt indication; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
bitfld.long 0x0 0. "intdxasard,EDC error in AXSM AR Ch clk_dbsc domain Interrupt indication; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
line.long 0x4 "DB0FSINTXXX01D,"
bitfld.long 0x4 31. "intexdcld1d,DCLS comparator error interrupt indication for memory channel 1 (DDR1) in DFI clock domain; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.byte 0x4 26.--29. 1. "Reserved_26,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x4 25. "intoddvawr1d,OrderID error of isbus async write ch. interrupt indication for memory channel 1; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
newline
bitfld.long 0x4 24. "intoddvacq1d,OrderID error of isbus async address (command queue) ch. interrupt indication for memory channel 1; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
bitfld.long 0x4 23. "intdxdvawr1d,EDC error of isbus async write ch. interrupt indication for memory channel 1; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
newline
bitfld.long 0x4 22. "intdxdvacq1d,EDC error of isbus async address (command queue) ch. interrupt indication for memory channel 1; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
bitfld.long 0x4 21. "intoddvphy1d,OrderID error in DFI DDR PHY interrupt indication for memory channel 1; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
newline
bitfld.long 0x4 20. "intoddvdbs1d,OrderID error in DFI DBSC interrupt indication for memory channel 1; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
bitfld.long 0x4 19. "intdxdvphy1d,EDC error in DFI DDR PHY interrupt indication for memory channel 1; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
newline
bitfld.long 0x4 18. "intdxdvdbs1d,EDC error in DFI DBSC interrupt indication for memory channel 1; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
bitfld.long 0x4 17. "intepdvphy1d,POST error in ddrf interrupt indication for memory channel 1; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
newline
bitfld.long 0x4 16. "intepdvdbs1d,POST error in DBSC domain interrupt indication for memory channel 1; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
bitfld.long 0x4 15. "intexdcld0d,DCLS comparator error interrupt indication for memory channel 0 (DDR0) in DFI clock domain; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
newline
rbitfld.long 0x4 14. "Reserved_14,Reserved. (This bit is always read as 0.)" "0,1"
hexmask.long.byte 0x4 10.--13. 1. "Reserved_10,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
newline
bitfld.long 0x4 9. "intoddvawr0d,OrderID error of isbus async write ch. interrupt indication for memory channel 0; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
bitfld.long 0x4 8. "intoddvacq0d,OrderID error of isbus async address (command queue) ch. interrupt indication for memory channel 0; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
newline
bitfld.long 0x4 7. "intdxdvawr0d,EDC error of isbus async write ch. interrupt indication for memory channel 0; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
bitfld.long 0x4 6. "intdxdvacq0d,EDC error of isbus async address (command queue) ch. interrupt indication for memory channel 0; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
newline
bitfld.long 0x4 5. "intoddvphy0d,OrderID error in DFI DDR PHY interrupt indication for memory channel 0; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
bitfld.long 0x4 4. "intoddvdbs0d,OrderID error in DFI DBSC interrupt indication for memory channel 0; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
newline
bitfld.long 0x4 3. "intdxdvphy0d,EDC error in DFI DDR PHY interrupt indication for memory channel 0; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
bitfld.long 0x4 2. "intdxdvdbs0d,EDC error in DFI DBSC interrupt indication for memory channel 0; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
newline
bitfld.long 0x4 1. "intepdvphy0d,POST error in ddrf interrupt indication for memory channel 0; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
bitfld.long 0x4 0. "intepdvdbs0d,POST error in DBSC domain interrupt indication for memory channel 0; 0: no interupt  1: interrupt" "0: no interupt,1: interrupt"
group.long 0x300C++0x3
line.long 0x0 "DB0FSINTXXX03D,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x0 0.--15. 1. "intxxasynsbd,Async sideband errors in dbs domain;"
group.long 0x3040++0x3
line.long 0x0 "DB0FSINTCLR00D,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0. "icldclsd,Clear safety error interrupt signal (level) for clk_dbsc domain" "?,1: clear interrupt"
group.long 0x3080++0x3
line.long 0x0 "DB0FSINTENB00D,"
hexmask.long 0x0 7.--31. 1. "Reserved_7,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 6. "ienodaswxd,OrderID error in AXI64 Wch clk_dbsc side interrupt enable; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
newline
bitfld.long 0x0 5. "ienodasawd,OrderID error in AXI64 AWch clk_dbsc side interrupt enable; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
bitfld.long 0x0 4. "ienodasard,OrderID error in AXI64 ARch clk_dbsc side interrupt enable; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
bitfld.long 0x0 2. "iendxaswxd,EDC error in AXSM W Ch clk_dbsc domain interrupt enable; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
newline
bitfld.long 0x0 1. "iendxasawd,EDC error in AXSM AW Ch clk_dbsc domain interrupt enable; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
bitfld.long 0x0 0. "iendxasard,EDC error in AXSM AR Ch clk_dbsc domain interrupt enable; 0: Interrupt disable  1: Interrupt enable" "0: Interrupt disable,1: Interrupt enable"
group.long 0x308C++0x3
line.long 0x0 "DB0FSINTENB03D,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x0 0.--15. 1. "ienxxasynsbd,Async sideband errors interrupt enable in dbs domain;"
group.long 0x3100++0x3
line.long 0x0 "DB0FSINJECT00D,"
hexmask.long 0x0 7.--31. 1. "Reserved_7,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 6. "ijtodaswxd,OrderID error in AXI64 Wch clk_dbsc side interrupt injection mode; 0: uninjection mode 1:injection mode" "0: uninjection mode,1: injection mode"
newline
bitfld.long 0x0 5. "ijtodasawd,OrderID error in AXI64 AWch clk_dbsc side interrupt injection mode; 0: uninjection mode 1:injection mode" "0: uninjection mode,1: injection mode"
bitfld.long 0x0 4. "ijtodasard,OrderID error in AXI64 ARch clk_dbsc side interrupt injection mode; 0: uninjection mode 1:injection mode" "0: uninjection mode,1: injection mode"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed." "0,1"
bitfld.long 0x0 2. "ijtdxaswxd,EDC error in AXSM W Ch clk_dbsc domain interrupt injection mode; 0: uninjection mode 1:injection mode" "0: uninjection mode,1: injection mode"
newline
bitfld.long 0x0 1. "ijtdxasawd,EDC error in AXSM AW Ch clk_dbsc domain interrupt injection mode; 0: uninjection mode 1:injection mode" "0: uninjection mode,1: injection mode"
bitfld.long 0x0 0. "ijtdxasard,EDC error in AXSM AR Ch clk_dbsc domain interrupt injection mode; 0: uninjection mode 1:injection mode" "0: uninjection mode,1: injection mode"
group.long 0x310C++0x3
line.long 0x0 "DB0FSINJECT03D,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.word 0x0 0.--15. 1. "ijtxxasynsbd,Async sideband errors interrupt injection mode in dbs domain;"
rgroup.long 0x3200++0x13
line.long 0x0 "DB0FSINTCNT00D,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 16.--23. 1. "cntdxaswxd,EDC error in AXSM W Ch clk_dbsc domain interrupt counter"
newline
hexmask.long.byte 0x0 8.--15. 1. "cntdxasawd,EDC error in AXSM AW Ch clk_dbsc domain interrupt counter"
hexmask.long.byte 0x0 0.--7. 1. "cntdxasard,EDC error in AXSM AR Ch clk_dbsc domain interrupt counter"
line.long 0x4 "DB0FSINTCNT01D,"
hexmask.long.byte 0x4 24.--31. 1. "cntdxdvawr0d,EDC error of isbus async write ch. interrupt counter for memory channel 0"
hexmask.long.byte 0x4 16.--23. 1. "cntdxdvacq0d,EDC error of isbus async address (command queue) ch. interrupt counter for memory channel 0"
newline
hexmask.long.byte 0x4 8.--15. 1. "cntdxdvphy0d,EDC error in DFI DDR PHY interrupt counter for memory channel 0"
hexmask.long.byte 0x4 0.--7. 1. "cntdxdvdbs0d,EDC error in DFI DBSC interrupt counter for memory channel 0"
line.long 0x8 "DB0FSINTCNT02D,"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x8 0.--7. 1. "Reserved_0,Reserved. (These bits are always read as 0.)"
line.long 0xC "DB0FSINTCNT03D,"
hexmask.long.byte 0xC 24.--31. 1. "cntdxdvawr1d,EDC error of isbus async write ch. interrupt counter for memory channel 1"
hexmask.long.byte 0xC 16.--23. 1. "cntdxdvacq1d,EDC error of isbus async address (command queue) ch. interrupt counter for memory channel 1"
newline
hexmask.long.byte 0xC 8.--15. 1. "cntdxdvphy1d,EDC error in DFI DDR PHY interrupt counter for memory channel 1"
hexmask.long.byte 0xC 0.--7. 1. "cntdxdvdbs1d,EDC error in DFI DBSC interrupt counter for memory channel 1"
line.long 0x10 "DB0FSINTCNT04D,"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x10 0.--7. 1. "Reserved_0,Reserved. (These bits are always read as 0.)"
rgroup.long 0x3218++0x3
line.long 0x0 "DB0FSINTCNT06D,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved. (These bits are always read as 0.)"
rgroup.long 0x3220++0x3
line.long 0x0 "DB0FSINTCNT08D,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved. (These bits are always read as 0.)"
rgroup.long 0x3400++0x3
line.long 0x0 "DB0FSCONFDBS0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0. "Reserved_0,Reserved. (These bits are always read as 0.)" "0,1"
rgroup.long 0x3484++0x3
line.long 0x0 "DB0FSCTRLDBS0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0.If a value other than 0 is written  correct operation cannot be guaranteed."
bitfld.long 0x0 0. "Reserved_0,Reserved. (These bits are always read as 0.)" "0,1"
tree.end
tree.end
tree "DMAC (Direct Memory Access Controller)"
base ad:0x0
tree "DMAC_0"
base ad:0xFFD60000
group.word 0x60++0x1
line.word 0x0 "RDMOR_0,DMOR is a 16-bit readable/writable register which control master enable and specifies the priority level of all DMA channels. This register also shows the Address Error status."
hexmask.word.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.word 0x0 8.--9. "PR_1_0,Priority Mode" "0: CH0 greater_than CH1 greater_than CH2..,?,?,?"
newline
hexmask.word.byte 0x0 3.--7. 1. "Reserved_3,Reserved"
newline
rbitfld.word 0x0 2. "AE,Address Error Flag" "0: No RT-DMAC address error interrupt,1: RT-DMAC address error interrupt occurs during.."
newline
rbitfld.word 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.word 0x0 0. "DME,DMA Master Enable" "0: Disables DMA transfers on all channels,1: Enables DMA transfers on all channels"
group.long 0xA0++0x7
line.long 0x0 "RDMDPSEC_0,DPSEC is a 32-bit readable/writeable register that controls the secure attribute of Descriptor Memory. Only the initiator in the secure mode can change this register."
bitfld.long 0x0 31. "DPSEC,Secure attribute setting of Descriptor memory" "0: nonsecure attribute,1: secure attribute"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
hexmask.long.word 0x0 16.--24. 1. "DPSECA_8_0,Secure attribute base address of Descriptor memory"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.word 0x0 0.--8. 1. "DPSECM_8_0,Secure attribute base address mask of Descriptor memory"
line.long 0x4 "RDMBUFMODE_0,BUFMODE is a 32-bit readable/writeable register that controls the partial outstanding function mode."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "BUFMODE,Partial OS enable" "0: Normal OS,1: Partial OS"
group.long 0xC0++0x3
line.long 0x0 "RDMERRDET_0,ERRDET is 32-bit readable/writable register that indicates the Secure error information"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "ERROR_DETECT,Secure Error" "0: No Error,1: Secure Error"
rgroup.long 0xC4++0x7
line.long 0x0 "RDMERRADR_0,ERRADR is 32-bit readable/writable register that indicates the Secure error information"
hexmask.long 0x0 0.--31. 1. "ERROR_ADDR_31_0,Secure Error APB address"
line.long 0x4 "RDMERRPID_0,ERRPID is 32-bit readable/writable register that indicates the Secure error information"
hexmask.long 0x4 0.--31. 1. "ERROR_PID_31_0,Secure error APB ID"
group.long 0xCC++0x7
line.long 0x0 "RDMADRFB_0,ADRFB is 32-bit readable/writable register that specify the control of address feedback of DPRAM"
bitfld.long 0x0 31. "ADDRFB_EN,Address Feedback Enable" "0: Disable and clear error,1: Enable"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
hexmask.long.word 0x0 16.--24. 1. "REF_A_8_0,Reference address when comparing"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "P_ADDRFB_ERR_POST,Address Feedback Post-Fault injection" "0: No fault injection,1: Fault injection"
newline
bitfld.long 0x0 0. "P_ADDRFB_ERR_PRE,Address Feedback Pre-Fault injection" "0: No fault injection,1: Fault injection"
line.long 0x4 "RDMAPBEDC_0,APBEDC is 32-bit readable/writable register that specify the control APBEDC injection and EDC error status"
hexmask.long.word 0x4 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x4 19. "PWDATA_PUBLIC_ERR,PUBLIC PWDATA EDC error status" "0: normal,1: Error"
newline
rbitfld.long 0x4 18. "PADDR_PUBLIC_ERR,PUBLIC PADDR EDC error status" "0: normal,1: Error"
newline
rbitfld.long 0x4 17. "PWDATA_CH_ERR,CH PWDATA EDC error status" "0: normal,1: Error"
newline
rbitfld.long 0x4 16. "PADDR_CH_ERR,CH PWDATA EDC error status" "0: normal,1: Error"
newline
hexmask.long.word 0x4 2.--15. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x4 1. "P_APBPUBLIC_ERR,PUBLIC APB I/F Fault injection" "0: No fault injection,1: Fault injection"
newline
bitfld.long 0x4 0. "P_APBCH_ERR,CH APB I/F Fault injection" "0: No fault injection,1: Fault injection"
rgroup.long 0xD4++0xF
line.long 0x0 "RDMAPB_CH_PADDR_0,APB_CH_PADDR is 32-bit readable register that specify the EDC error information"
hexmask.long 0x0 0.--31. 1. "PADDR_31_0,CH EDC error PADDR information"
line.long 0x4 "RDMAPB_CH_PWDATA_0,APB_CH_PWDATA is 32-bit readable register that specify the EDC error information"
hexmask.long 0x4 0.--31. 1. "PWDATA_31_0,CH EDC error PADDR information"
line.long 0x8 "RDMAPB_PUBLIC_PADDR_0,APB_PUBLIC_PADDR is 32-bit readable register that specify the EDC error information"
hexmask.long 0x8 0.--31. 1. "PADDR_31_0,PUBLIC EDC error PADDR information"
line.long 0xC "RDMAPB_PUBLIC_PWDATA_0,APB_PUBLIC_PWDATA is 32-bit readable register that specify the EDC error information"
hexmask.long 0xC 0.--31. 1. "PWDATA_31_0,PUBLIC EDC error PADDR information"
group.long 0xF0++0xB
line.long 0x0 "RDMCMP_STAUS_0,DMCMP_STATUS is 32-bit readable/writable register that specify the control of DCLS comparison and error status."
bitfld.long 0x0 31. "EN,DCLS compare enable" "0: Disable and Clear error,1: Enable and detect"
newline
bitfld.long 0x0 30. "P_ERR_POST,Post-Fault Injection" "0: Disable Fault injection,1: Fault Injection"
newline
hexmask.long.word 0x0 17.--29. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "P_ERR_PRE,Pre-Fault Injection" "0: Disable Fault injection,1: Fault Injection"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
newline
rbitfld.long 0x0 4. "E_PERI,Error status on PERI AXI I/F" "0,1"
newline
rbitfld.long 0x0 3. "E_MEM,Error status on MEM AXI I/F" "0,1"
newline
rbitfld.long 0x0 2. "E_BUS,Error status on BUS AXI I/F" "0,1"
newline
rbitfld.long 0x0 1. "E_APB,Error status on APB I/F" "0,1"
newline
rbitfld.long 0x0 0. "E_OTH,Error status on other signals" "0,1"
line.long 0x4 "RDMRATE_RD_0,RRATE_RD is 32-bit readable/writable register that specify the control of rate control of BUS I/F read."
bitfld.long 0x4 31. "RATE_RD_ACCESS_CNT_EN,Rate Control for read Enable" "0: Disable,1: Enable"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "RATE_RD_ACCESS_CNT,Rate Control counter setting for read transaction"
line.long 0x8 "RDMRATE_WR_0,RRATE_WR is 32-bit readable/writable register that specify the control of rate control of BUS I/F write."
bitfld.long 0x8 31. "RATE_WR_ACCESS_CNT_EN,Rate Control for write Enable" "0: Disable,1: Enable"
newline
hexmask.long.tbyte 0x8 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x8 0.--7. 1. "RATE_WR_ACCESS_CNT,Rate Control counter setting for write transaction"
tree.end
tree "DMAC_1"
base ad:0xFFD61000
group.word 0x60++0x1
line.word 0x0 "RDMOR_1,DMOR is a 16-bit readable/writable register which control master enable and specifies the priority level of all DMA channels. This register also shows the Address Error status."
hexmask.word.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.word 0x0 8.--9. "PR_1_0,Priority Mode" "0: CH0 greater_than CH1 greater_than CH2..,?,?,?"
newline
hexmask.word.byte 0x0 3.--7. 1. "Reserved_3,Reserved"
newline
rbitfld.word 0x0 2. "AE,Address Error Flag" "0: No RT-DMAC address error interrupt,1: RT-DMAC address error interrupt occurs during.."
newline
rbitfld.word 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.word 0x0 0. "DME,DMA Master Enable" "0: Disables DMA transfers on all channels,1: Enables DMA transfers on all channels"
group.long 0xA0++0x7
line.long 0x0 "RDMDPSEC_1,DPSEC is a 32-bit readable/writeable register that controls the secure attribute of Descriptor Memory. Only the initiator in the secure mode can change this register."
bitfld.long 0x0 31. "DPSEC,Secure attribute setting of Descriptor memory" "0: nonsecure attribute,1: secure attribute"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
hexmask.long.word 0x0 16.--24. 1. "DPSECA_8_0,Secure attribute base address of Descriptor memory"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.word 0x0 0.--8. 1. "DPSECM_8_0,Secure attribute base address mask of Descriptor memory"
line.long 0x4 "RDMBUFMODE_1,BUFMODE is a 32-bit readable/writeable register that controls the partial outstanding function mode."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "BUFMODE,Partial OS enable" "0: Normal OS,1: Partial OS"
group.long 0xC0++0x3
line.long 0x0 "RDMERRDET_1,ERRDET is 32-bit readable/writable register that indicates the Secure error information"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "ERROR_DETECT,Secure Error" "0: No Error,1: Secure Error"
rgroup.long 0xC4++0x7
line.long 0x0 "RDMERRADR_1,ERRADR is 32-bit readable/writable register that indicates the Secure error information"
hexmask.long 0x0 0.--31. 1. "ERROR_ADDR_31_0,Secure Error APB address"
line.long 0x4 "RDMERRPID_1,ERRPID is 32-bit readable/writable register that indicates the Secure error information"
hexmask.long 0x4 0.--31. 1. "ERROR_PID_31_0,Secure error APB ID"
group.long 0xCC++0x7
line.long 0x0 "RDMADRFB_1,ADRFB is 32-bit readable/writable register that specify the control of address feedback of DPRAM"
bitfld.long 0x0 31. "ADDRFB_EN,Address Feedback Enable" "0: Disable and clear error,1: Enable"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
hexmask.long.word 0x0 16.--24. 1. "REF_A_8_0,Reference address when comparing"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "P_ADDRFB_ERR_POST,Address Feedback Post-Fault injection" "0: No fault injection,1: Fault injection"
newline
bitfld.long 0x0 0. "P_ADDRFB_ERR_PRE,Address Feedback Pre-Fault injection" "0: No fault injection,1: Fault injection"
line.long 0x4 "RDMAPBEDC_1,APBEDC is 32-bit readable/writable register that specify the control APBEDC injection and EDC error status"
hexmask.long.word 0x4 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x4 19. "PWDATA_PUBLIC_ERR,PUBLIC PWDATA EDC error status" "0: normal,1: Error"
newline
rbitfld.long 0x4 18. "PADDR_PUBLIC_ERR,PUBLIC PADDR EDC error status" "0: normal,1: Error"
newline
rbitfld.long 0x4 17. "PWDATA_CH_ERR,CH PWDATA EDC error status" "0: normal,1: Error"
newline
rbitfld.long 0x4 16. "PADDR_CH_ERR,CH PWDATA EDC error status" "0: normal,1: Error"
newline
hexmask.long.word 0x4 2.--15. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x4 1. "P_APBPUBLIC_ERR,PUBLIC APB I/F Fault injection" "0: No fault injection,1: Fault injection"
newline
bitfld.long 0x4 0. "P_APBCH_ERR,CH APB I/F Fault injection" "0: No fault injection,1: Fault injection"
rgroup.long 0xD4++0xF
line.long 0x0 "RDMAPB_CH_PADDR_1,APB_CH_PADDR is 32-bit readable register that specify the EDC error information"
hexmask.long 0x0 0.--31. 1. "PADDR_31_0,CH EDC error PADDR information"
line.long 0x4 "RDMAPB_CH_PWDATA_1,APB_CH_PWDATA is 32-bit readable register that specify the EDC error information"
hexmask.long 0x4 0.--31. 1. "PWDATA_31_0,CH EDC error PADDR information"
line.long 0x8 "RDMAPB_PUBLIC_PADDR_1,APB_PUBLIC_PADDR is 32-bit readable register that specify the EDC error information"
hexmask.long 0x8 0.--31. 1. "PADDR_31_0,PUBLIC EDC error PADDR information"
line.long 0xC "RDMAPB_PUBLIC_PWDATA_1,APB_PUBLIC_PWDATA is 32-bit readable register that specify the EDC error information"
hexmask.long 0xC 0.--31. 1. "PWDATA_31_0,PUBLIC EDC error PADDR information"
group.long 0xF0++0xB
line.long 0x0 "RDMCMP_STAUS_1,DMCMP_STATUS is 32-bit readable/writable register that specify the control of DCLS comparison and error status."
bitfld.long 0x0 31. "EN,DCLS compare enable" "0: Disable and Clear error,1: Enable and detect"
newline
bitfld.long 0x0 30. "P_ERR_POST,Post-Fault Injection" "0: Disable Fault injection,1: Fault Injection"
newline
hexmask.long.word 0x0 17.--29. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "P_ERR_PRE,Pre-Fault Injection" "0: Disable Fault injection,1: Fault Injection"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
newline
rbitfld.long 0x0 4. "E_PERI,Error status on PERI AXI I/F" "0,1"
newline
rbitfld.long 0x0 3. "E_MEM,Error status on MEM AXI I/F" "0,1"
newline
rbitfld.long 0x0 2. "E_BUS,Error status on BUS AXI I/F" "0,1"
newline
rbitfld.long 0x0 1. "E_APB,Error status on APB I/F" "0,1"
newline
rbitfld.long 0x0 0. "E_OTH,Error status on other signals" "0,1"
line.long 0x4 "RDMRATE_RD_1,RRATE_RD is 32-bit readable/writable register that specify the control of rate control of BUS I/F read."
bitfld.long 0x4 31. "RATE_RD_ACCESS_CNT_EN,Rate Control for read Enable" "0: Disable,1: Enable"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "RATE_RD_ACCESS_CNT,Rate Control counter setting for read transaction"
line.long 0x8 "RDMRATE_WR_1,RRATE_WR is 32-bit readable/writable register that specify the control of rate control of BUS I/F write."
bitfld.long 0x8 31. "RATE_WR_ACCESS_CNT_EN,Rate Control for write Enable" "0: Disable,1: Enable"
newline
hexmask.long.tbyte 0x8 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x8 0.--7. 1. "RATE_WR_ACCESS_CNT,Rate Control counter setting for write transaction"
tree.end
tree "DMAC_2"
base ad:0xFFC10000
group.long 0x0++0x1F
line.long 0x0 "RDMSAR_0_0,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_0_0,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_0_0,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_0_0,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_0_0,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_0_0,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_0_0,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_0_0,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x28++0x3
line.long 0x0 "RDMTSR_0_0,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x38++0x3
line.long 0x0 "RDMTSRB_0_0,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x40++0x1
line.word 0x0 "RDMRS_0_0,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x48++0x3
line.long 0x0 "RDMBUFCR_0_0,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x50++0x13
line.long 0x0 "RDMDPBASE_0_0,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_0_0,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_0_0,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_0_0,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_0_0,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x64++0x3
line.long 0x0 "RDMDREQOS_0_0,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x78++0x3
line.long 0x0 "RDMREGIONID_0_0,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x80++0x3
line.long 0x0 "RDMCHID_0_0,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xB0++0x3
line.long 0x0 "RDMSEC_0_0,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x100++0x3
line.long 0x0 "RDMCHCLR_0_0,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x110++0x3
line.long 0x0 "RDMISTA_0_0,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x114++0x3
line.long 0x0 "RDMADR40MODE_0_0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x1000++0x1F
line.long 0x0 "RDMSAR_0_1,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_0_1,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_0_1,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_0_1,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_0_1,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_0_1,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_0_1,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_0_1,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x1028++0x3
line.long 0x0 "RDMTSR_0_1,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x1038++0x3
line.long 0x0 "RDMTSRB_0_1,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x1040++0x1
line.word 0x0 "RDMRS_0_1,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x1048++0x3
line.long 0x0 "RDMBUFCR_0_1,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x1050++0x13
line.long 0x0 "RDMDPBASE_0_1,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_0_1,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_0_1,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_0_1,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_0_1,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x1064++0x3
line.long 0x0 "RDMDREQOS_0_1,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x1078++0x3
line.long 0x0 "RDMREGIONID_0_1,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x1080++0x3
line.long 0x0 "RDMCHID_0_1,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x10B0++0x3
line.long 0x0 "RDMSEC_0_1,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x1100++0x3
line.long 0x0 "RDMCHCLR_0_1,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x1110++0x3
line.long 0x0 "RDMISTA_0_1,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x1114++0x3
line.long 0x0 "RDMADR40MODE_0_1,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x2000++0x1F
line.long 0x0 "RDMSAR_0_2,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_0_2,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_0_2,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_0_2,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_0_2,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_0_2,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_0_2,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_0_2,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x2028++0x3
line.long 0x0 "RDMTSR_0_2,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x2038++0x3
line.long 0x0 "RDMTSRB_0_2,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x2040++0x1
line.word 0x0 "RDMRS_0_2,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x2048++0x3
line.long 0x0 "RDMBUFCR_0_2,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x2050++0x13
line.long 0x0 "RDMDPBASE_0_2,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_0_2,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_0_2,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_0_2,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_0_2,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x2064++0x3
line.long 0x0 "RDMDREQOS_0_2,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x2078++0x3
line.long 0x0 "RDMREGIONID_0_2,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x2080++0x3
line.long 0x0 "RDMCHID_0_2,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x20B0++0x3
line.long 0x0 "RDMSEC_0_2,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x2100++0x3
line.long 0x0 "RDMCHCLR_0_2,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x2110++0x3
line.long 0x0 "RDMISTA_0_2,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x2114++0x3
line.long 0x0 "RDMADR40MODE_0_2,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x3000++0x1F
line.long 0x0 "RDMSAR_0_3,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_0_3,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_0_3,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_0_3,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_0_3,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_0_3,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_0_3,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_0_3,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x3028++0x3
line.long 0x0 "RDMTSR_0_3,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x3038++0x3
line.long 0x0 "RDMTSRB_0_3,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x3040++0x1
line.word 0x0 "RDMRS_0_3,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x3048++0x3
line.long 0x0 "RDMBUFCR_0_3,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x3050++0x13
line.long 0x0 "RDMDPBASE_0_3,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_0_3,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_0_3,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_0_3,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_0_3,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x3064++0x3
line.long 0x0 "RDMDREQOS_0_3,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x3078++0x3
line.long 0x0 "RDMREGIONID_0_3,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x3080++0x3
line.long 0x0 "RDMCHID_0_3,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x30B0++0x3
line.long 0x0 "RDMSEC_0_3,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x3100++0x3
line.long 0x0 "RDMCHCLR_0_3,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x3110++0x3
line.long 0x0 "RDMISTA_0_3,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x3114++0x3
line.long 0x0 "RDMADR40MODE_0_3,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x4000++0x1F
line.long 0x0 "RDMSAR_0_4,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_0_4,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_0_4,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_0_4,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_0_4,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_0_4,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_0_4,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_0_4,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x4028++0x3
line.long 0x0 "RDMTSR_0_4,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x4038++0x3
line.long 0x0 "RDMTSRB_0_4,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x4040++0x1
line.word 0x0 "RDMRS_0_4,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x4048++0x3
line.long 0x0 "RDMBUFCR_0_4,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x4050++0x13
line.long 0x0 "RDMDPBASE_0_4,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_0_4,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_0_4,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_0_4,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_0_4,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x4064++0x3
line.long 0x0 "RDMDREQOS_0_4,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x4078++0x3
line.long 0x0 "RDMREGIONID_0_4,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x4080++0x3
line.long 0x0 "RDMCHID_0_4,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x40B0++0x3
line.long 0x0 "RDMSEC_0_4,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x4100++0x3
line.long 0x0 "RDMCHCLR_0_4,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x4110++0x3
line.long 0x0 "RDMISTA_0_4,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x4114++0x3
line.long 0x0 "RDMADR40MODE_0_4,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x5000++0x1F
line.long 0x0 "RDMSAR_0_5,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_0_5,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_0_5,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_0_5,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_0_5,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_0_5,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_0_5,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_0_5,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x5028++0x3
line.long 0x0 "RDMTSR_0_5,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x5038++0x3
line.long 0x0 "RDMTSRB_0_5,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x5040++0x1
line.word 0x0 "RDMRS_0_5,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x5048++0x3
line.long 0x0 "RDMBUFCR_0_5,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x5050++0x13
line.long 0x0 "RDMDPBASE_0_5,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_0_5,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_0_5,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_0_5,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_0_5,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x5064++0x3
line.long 0x0 "RDMDREQOS_0_5,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x5078++0x3
line.long 0x0 "RDMREGIONID_0_5,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x5080++0x3
line.long 0x0 "RDMCHID_0_5,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x50B0++0x3
line.long 0x0 "RDMSEC_0_5,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x5100++0x3
line.long 0x0 "RDMCHCLR_0_5,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x5110++0x3
line.long 0x0 "RDMISTA_0_5,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x5114++0x3
line.long 0x0 "RDMADR40MODE_0_5,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x6000++0x1F
line.long 0x0 "RDMSAR_0_6,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_0_6,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_0_6,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_0_6,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_0_6,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_0_6,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_0_6,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_0_6,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x6028++0x3
line.long 0x0 "RDMTSR_0_6,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x6038++0x3
line.long 0x0 "RDMTSRB_0_6,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x6040++0x1
line.word 0x0 "RDMRS_0_6,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x6048++0x3
line.long 0x0 "RDMBUFCR_0_6,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x6050++0x13
line.long 0x0 "RDMDPBASE_0_6,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_0_6,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_0_6,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_0_6,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_0_6,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x6064++0x3
line.long 0x0 "RDMDREQOS_0_6,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x6078++0x3
line.long 0x0 "RDMREGIONID_0_6,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x6080++0x3
line.long 0x0 "RDMCHID_0_6,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x60B0++0x3
line.long 0x0 "RDMSEC_0_6,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x6100++0x3
line.long 0x0 "RDMCHCLR_0_6,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x6110++0x3
line.long 0x0 "RDMISTA_0_6,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x6114++0x3
line.long 0x0 "RDMADR40MODE_0_6,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x7000++0x1F
line.long 0x0 "RDMSAR_0_7,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_0_7,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_0_7,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_0_7,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_0_7,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_0_7,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_0_7,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_0_7,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x7028++0x3
line.long 0x0 "RDMTSR_0_7,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x7038++0x3
line.long 0x0 "RDMTSRB_0_7,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x7040++0x1
line.word 0x0 "RDMRS_0_7,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x7048++0x3
line.long 0x0 "RDMBUFCR_0_7,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x7050++0x13
line.long 0x0 "RDMDPBASE_0_7,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_0_7,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_0_7,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_0_7,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_0_7,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x7064++0x3
line.long 0x0 "RDMDREQOS_0_7,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x7078++0x3
line.long 0x0 "RDMREGIONID_0_7,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x7080++0x3
line.long 0x0 "RDMCHID_0_7,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x70B0++0x3
line.long 0x0 "RDMSEC_0_7,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x7100++0x3
line.long 0x0 "RDMCHCLR_0_7,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x7110++0x3
line.long 0x0 "RDMISTA_0_7,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x7114++0x3
line.long 0x0 "RDMADR40MODE_0_7,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x8000++0x1F
line.long 0x0 "RDMSAR_0_8,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_0_8,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_0_8,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_0_8,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_0_8,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_0_8,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_0_8,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_0_8,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x8028++0x3
line.long 0x0 "RDMTSR_0_8,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x8038++0x3
line.long 0x0 "RDMTSRB_0_8,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x8040++0x1
line.word 0x0 "RDMRS_0_8,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x8048++0x3
line.long 0x0 "RDMBUFCR_0_8,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x8050++0x13
line.long 0x0 "RDMDPBASE_0_8,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_0_8,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_0_8,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_0_8,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_0_8,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x8064++0x3
line.long 0x0 "RDMDREQOS_0_8,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x8078++0x3
line.long 0x0 "RDMREGIONID_0_8,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x8080++0x3
line.long 0x0 "RDMCHID_0_8,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x80B0++0x3
line.long 0x0 "RDMSEC_0_8,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x8100++0x3
line.long 0x0 "RDMCHCLR_0_8,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x8110++0x3
line.long 0x0 "RDMISTA_0_8,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x8114++0x3
line.long 0x0 "RDMADR40MODE_0_8,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x9000++0x1F
line.long 0x0 "RDMSAR_0_9,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_0_9,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_0_9,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_0_9,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_0_9,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_0_9,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_0_9,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_0_9,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x9028++0x3
line.long 0x0 "RDMTSR_0_9,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x9038++0x3
line.long 0x0 "RDMTSRB_0_9,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x9040++0x1
line.word 0x0 "RDMRS_0_9,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x9048++0x3
line.long 0x0 "RDMBUFCR_0_9,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x9050++0x13
line.long 0x0 "RDMDPBASE_0_9,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_0_9,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_0_9,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_0_9,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_0_9,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x9064++0x3
line.long 0x0 "RDMDREQOS_0_9,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x9078++0x3
line.long 0x0 "RDMREGIONID_0_9,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x9080++0x3
line.long 0x0 "RDMCHID_0_9,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x90B0++0x3
line.long 0x0 "RDMSEC_0_9,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x9100++0x3
line.long 0x0 "RDMCHCLR_0_9,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x9110++0x3
line.long 0x0 "RDMISTA_0_9,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x9114++0x3
line.long 0x0 "RDMADR40MODE_0_9,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0xA000++0x1F
line.long 0x0 "RDMSAR_0_10,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_0_10,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_0_10,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_0_10,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_0_10,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_0_10,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_0_10,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_0_10,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0xA028++0x3
line.long 0x0 "RDMTSR_0_10,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0xA038++0x3
line.long 0x0 "RDMTSRB_0_10,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0xA040++0x1
line.word 0x0 "RDMRS_0_10,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0xA048++0x3
line.long 0x0 "RDMBUFCR_0_10,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0xA050++0x13
line.long 0x0 "RDMDPBASE_0_10,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_0_10,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_0_10,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_0_10,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_0_10,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0xA064++0x3
line.long 0x0 "RDMDREQOS_0_10,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0xA078++0x3
line.long 0x0 "RDMREGIONID_0_10,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0xA080++0x3
line.long 0x0 "RDMCHID_0_10,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xA0B0++0x3
line.long 0x0 "RDMSEC_0_10,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0xA100++0x3
line.long 0x0 "RDMCHCLR_0_10,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0xA110++0x3
line.long 0x0 "RDMISTA_0_10,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0xA114++0x3
line.long 0x0 "RDMADR40MODE_0_10,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0xB000++0x1F
line.long 0x0 "RDMSAR_0_11,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_0_11,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_0_11,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_0_11,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_0_11,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_0_11,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_0_11,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_0_11,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0xB028++0x3
line.long 0x0 "RDMTSR_0_11,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0xB038++0x3
line.long 0x0 "RDMTSRB_0_11,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0xB040++0x1
line.word 0x0 "RDMRS_0_11,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0xB048++0x3
line.long 0x0 "RDMBUFCR_0_11,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0xB050++0x13
line.long 0x0 "RDMDPBASE_0_11,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_0_11,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_0_11,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_0_11,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_0_11,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0xB064++0x3
line.long 0x0 "RDMDREQOS_0_11,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0xB078++0x3
line.long 0x0 "RDMREGIONID_0_11,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0xB080++0x3
line.long 0x0 "RDMCHID_0_11,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xB0B0++0x3
line.long 0x0 "RDMSEC_0_11,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0xB100++0x3
line.long 0x0 "RDMCHCLR_0_11,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0xB110++0x3
line.long 0x0 "RDMISTA_0_11,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0xB114++0x3
line.long 0x0 "RDMADR40MODE_0_11,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0xC000++0x1F
line.long 0x0 "RDMSAR_0_12,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_0_12,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_0_12,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_0_12,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_0_12,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_0_12,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_0_12,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_0_12,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0xC028++0x3
line.long 0x0 "RDMTSR_0_12,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0xC038++0x3
line.long 0x0 "RDMTSRB_0_12,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0xC040++0x1
line.word 0x0 "RDMRS_0_12,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0xC048++0x3
line.long 0x0 "RDMBUFCR_0_12,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0xC050++0x13
line.long 0x0 "RDMDPBASE_0_12,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_0_12,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_0_12,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_0_12,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_0_12,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0xC064++0x3
line.long 0x0 "RDMDREQOS_0_12,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0xC078++0x3
line.long 0x0 "RDMREGIONID_0_12,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0xC080++0x3
line.long 0x0 "RDMCHID_0_12,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xC0B0++0x3
line.long 0x0 "RDMSEC_0_12,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0xC100++0x3
line.long 0x0 "RDMCHCLR_0_12,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0xC110++0x3
line.long 0x0 "RDMISTA_0_12,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0xC114++0x3
line.long 0x0 "RDMADR40MODE_0_12,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0xD000++0x1F
line.long 0x0 "RDMSAR_0_13,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_0_13,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_0_13,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_0_13,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_0_13,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_0_13,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_0_13,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_0_13,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0xD028++0x3
line.long 0x0 "RDMTSR_0_13,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0xD038++0x3
line.long 0x0 "RDMTSRB_0_13,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0xD040++0x1
line.word 0x0 "RDMRS_0_13,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0xD048++0x3
line.long 0x0 "RDMBUFCR_0_13,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0xD050++0x13
line.long 0x0 "RDMDPBASE_0_13,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_0_13,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_0_13,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_0_13,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_0_13,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0xD064++0x3
line.long 0x0 "RDMDREQOS_0_13,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0xD078++0x3
line.long 0x0 "RDMREGIONID_0_13,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0xD080++0x3
line.long 0x0 "RDMCHID_0_13,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xD0B0++0x3
line.long 0x0 "RDMSEC_0_13,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0xD100++0x3
line.long 0x0 "RDMCHCLR_0_13,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0xD110++0x3
line.long 0x0 "RDMISTA_0_13,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0xD114++0x3
line.long 0x0 "RDMADR40MODE_0_13,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0xE000++0x1F
line.long 0x0 "RDMSAR_0_14,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_0_14,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_0_14,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_0_14,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_0_14,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_0_14,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_0_14,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_0_14,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0xE028++0x3
line.long 0x0 "RDMTSR_0_14,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0xE038++0x3
line.long 0x0 "RDMTSRB_0_14,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0xE040++0x1
line.word 0x0 "RDMRS_0_14,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0xE048++0x3
line.long 0x0 "RDMBUFCR_0_14,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0xE050++0x13
line.long 0x0 "RDMDPBASE_0_14,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_0_14,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_0_14,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_0_14,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_0_14,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0xE064++0x3
line.long 0x0 "RDMDREQOS_0_14,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0xE078++0x3
line.long 0x0 "RDMREGIONID_0_14,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0xE080++0x3
line.long 0x0 "RDMCHID_0_14,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xE0B0++0x3
line.long 0x0 "RDMSEC_0_14,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0xE100++0x3
line.long 0x0 "RDMCHCLR_0_14,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0xE110++0x3
line.long 0x0 "RDMISTA_0_14,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0xE114++0x3
line.long 0x0 "RDMADR40MODE_0_14,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0xF000++0x1F
line.long 0x0 "RDMSAR_0_15,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_0_15,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_0_15,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_0_15,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_0_15,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_0_15,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_0_15,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_0_15,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0xF028++0x3
line.long 0x0 "RDMTSR_0_15,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0xF038++0x3
line.long 0x0 "RDMTSRB_0_15,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0xF040++0x1
line.word 0x0 "RDMRS_0_15,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0xF048++0x3
line.long 0x0 "RDMBUFCR_0_15,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0xF050++0x13
line.long 0x0 "RDMDPBASE_0_15,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_0_15,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_0_15,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_0_15,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_0_15,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0xF064++0x3
line.long 0x0 "RDMDREQOS_0_15,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0xF078++0x3
line.long 0x0 "RDMREGIONID_0_15,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0xF080++0x3
line.long 0x0 "RDMCHID_0_15,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xF0B0++0x3
line.long 0x0 "RDMSEC_0_15,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0xF100++0x3
line.long 0x0 "RDMCHCLR_0_15,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0xF110++0x3
line.long 0x0 "RDMISTA_0_15,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0xF114++0x3
line.long 0x0 "RDMADR40MODE_0_15,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
tree.end
tree "DMAC_3"
base ad:0xFFC20000
group.long 0x0++0x1F
line.long 0x0 "RDMSAR_1_0,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_1_0,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_1_0,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_1_0,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_1_0,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_1_0,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_1_0,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_1_0,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x28++0x3
line.long 0x0 "RDMTSR_1_0,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x38++0x3
line.long 0x0 "RDMTSRB_1_0,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x40++0x1
line.word 0x0 "RDMRS_1_0,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x48++0x3
line.long 0x0 "RDMBUFCR_1_0,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x50++0x13
line.long 0x0 "RDMDPBASE_1_0,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_1_0,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_1_0,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_1_0,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_1_0,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x64++0x3
line.long 0x0 "RDMDREQOS_1_0,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x78++0x3
line.long 0x0 "RDMREGIONID_1_0,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x80++0x3
line.long 0x0 "RDMCHID_1_0,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xB0++0x3
line.long 0x0 "RDMSEC_1_0,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x100++0x3
line.long 0x0 "RDMCHCLR_1_0,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x110++0x3
line.long 0x0 "RDMISTA_1_0,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x114++0x3
line.long 0x0 "RDMADR40MODE_1_0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x1000++0x1F
line.long 0x0 "RDMSAR_1_1,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_1_1,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_1_1,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_1_1,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_1_1,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_1_1,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_1_1,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_1_1,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x1028++0x3
line.long 0x0 "RDMTSR_1_1,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x1038++0x3
line.long 0x0 "RDMTSRB_1_1,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x1040++0x1
line.word 0x0 "RDMRS_1_1,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x1048++0x3
line.long 0x0 "RDMBUFCR_1_1,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x1050++0x13
line.long 0x0 "RDMDPBASE_1_1,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_1_1,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_1_1,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_1_1,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_1_1,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x1064++0x3
line.long 0x0 "RDMDREQOS_1_1,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x1078++0x3
line.long 0x0 "RDMREGIONID_1_1,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x1080++0x3
line.long 0x0 "RDMCHID_1_1,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x10B0++0x3
line.long 0x0 "RDMSEC_1_1,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x1100++0x3
line.long 0x0 "RDMCHCLR_1_1,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x1110++0x3
line.long 0x0 "RDMISTA_1_1,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x1114++0x3
line.long 0x0 "RDMADR40MODE_1_1,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x2000++0x1F
line.long 0x0 "RDMSAR_1_2,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_1_2,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_1_2,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_1_2,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_1_2,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_1_2,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_1_2,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_1_2,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x2028++0x3
line.long 0x0 "RDMTSR_1_2,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x2038++0x3
line.long 0x0 "RDMTSRB_1_2,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x2040++0x1
line.word 0x0 "RDMRS_1_2,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x2048++0x3
line.long 0x0 "RDMBUFCR_1_2,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x2050++0x13
line.long 0x0 "RDMDPBASE_1_2,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_1_2,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_1_2,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_1_2,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_1_2,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x2064++0x3
line.long 0x0 "RDMDREQOS_1_2,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x2078++0x3
line.long 0x0 "RDMREGIONID_1_2,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x2080++0x3
line.long 0x0 "RDMCHID_1_2,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x20B0++0x3
line.long 0x0 "RDMSEC_1_2,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x2100++0x3
line.long 0x0 "RDMCHCLR_1_2,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x2110++0x3
line.long 0x0 "RDMISTA_1_2,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x2114++0x3
line.long 0x0 "RDMADR40MODE_1_2,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x3000++0x1F
line.long 0x0 "RDMSAR_1_3,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_1_3,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_1_3,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_1_3,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_1_3,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_1_3,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_1_3,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_1_3,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x3028++0x3
line.long 0x0 "RDMTSR_1_3,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x3038++0x3
line.long 0x0 "RDMTSRB_1_3,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x3040++0x1
line.word 0x0 "RDMRS_1_3,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x3048++0x3
line.long 0x0 "RDMBUFCR_1_3,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x3050++0x13
line.long 0x0 "RDMDPBASE_1_3,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_1_3,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_1_3,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_1_3,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_1_3,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x3064++0x3
line.long 0x0 "RDMDREQOS_1_3,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x3078++0x3
line.long 0x0 "RDMREGIONID_1_3,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x3080++0x3
line.long 0x0 "RDMCHID_1_3,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x30B0++0x3
line.long 0x0 "RDMSEC_1_3,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x3100++0x3
line.long 0x0 "RDMCHCLR_1_3,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x3110++0x3
line.long 0x0 "RDMISTA_1_3,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x3114++0x3
line.long 0x0 "RDMADR40MODE_1_3,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x4000++0x1F
line.long 0x0 "RDMSAR_1_4,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_1_4,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_1_4,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_1_4,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_1_4,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_1_4,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_1_4,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_1_4,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x4028++0x3
line.long 0x0 "RDMTSR_1_4,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x4038++0x3
line.long 0x0 "RDMTSRB_1_4,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x4040++0x1
line.word 0x0 "RDMRS_1_4,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x4048++0x3
line.long 0x0 "RDMBUFCR_1_4,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x4050++0x13
line.long 0x0 "RDMDPBASE_1_4,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_1_4,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_1_4,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_1_4,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_1_4,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x4064++0x3
line.long 0x0 "RDMDREQOS_1_4,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x4078++0x3
line.long 0x0 "RDMREGIONID_1_4,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x4080++0x3
line.long 0x0 "RDMCHID_1_4,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x40B0++0x3
line.long 0x0 "RDMSEC_1_4,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x4100++0x3
line.long 0x0 "RDMCHCLR_1_4,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x4110++0x3
line.long 0x0 "RDMISTA_1_4,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x4114++0x3
line.long 0x0 "RDMADR40MODE_1_4,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x5000++0x1F
line.long 0x0 "RDMSAR_1_5,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_1_5,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_1_5,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_1_5,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_1_5,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_1_5,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_1_5,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_1_5,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x5028++0x3
line.long 0x0 "RDMTSR_1_5,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x5038++0x3
line.long 0x0 "RDMTSRB_1_5,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x5040++0x1
line.word 0x0 "RDMRS_1_5,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x5048++0x3
line.long 0x0 "RDMBUFCR_1_5,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x5050++0x13
line.long 0x0 "RDMDPBASE_1_5,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_1_5,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_1_5,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_1_5,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_1_5,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x5064++0x3
line.long 0x0 "RDMDREQOS_1_5,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x5078++0x3
line.long 0x0 "RDMREGIONID_1_5,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x5080++0x3
line.long 0x0 "RDMCHID_1_5,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x50B0++0x3
line.long 0x0 "RDMSEC_1_5,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x5100++0x3
line.long 0x0 "RDMCHCLR_1_5,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x5110++0x3
line.long 0x0 "RDMISTA_1_5,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x5114++0x3
line.long 0x0 "RDMADR40MODE_1_5,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x6000++0x1F
line.long 0x0 "RDMSAR_1_6,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_1_6,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_1_6,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_1_6,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_1_6,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_1_6,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_1_6,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_1_6,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x6028++0x3
line.long 0x0 "RDMTSR_1_6,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x6038++0x3
line.long 0x0 "RDMTSRB_1_6,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x6040++0x1
line.word 0x0 "RDMRS_1_6,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x6048++0x3
line.long 0x0 "RDMBUFCR_1_6,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x6050++0x13
line.long 0x0 "RDMDPBASE_1_6,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_1_6,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_1_6,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_1_6,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_1_6,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x6064++0x3
line.long 0x0 "RDMDREQOS_1_6,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x6078++0x3
line.long 0x0 "RDMREGIONID_1_6,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x6080++0x3
line.long 0x0 "RDMCHID_1_6,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x60B0++0x3
line.long 0x0 "RDMSEC_1_6,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x6100++0x3
line.long 0x0 "RDMCHCLR_1_6,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x6110++0x3
line.long 0x0 "RDMISTA_1_6,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x6114++0x3
line.long 0x0 "RDMADR40MODE_1_6,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x7000++0x1F
line.long 0x0 "RDMSAR_1_7,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_1_7,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_1_7,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_1_7,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_1_7,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_1_7,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_1_7,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_1_7,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x7028++0x3
line.long 0x0 "RDMTSR_1_7,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x7038++0x3
line.long 0x0 "RDMTSRB_1_7,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x7040++0x1
line.word 0x0 "RDMRS_1_7,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x7048++0x3
line.long 0x0 "RDMBUFCR_1_7,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x7050++0x13
line.long 0x0 "RDMDPBASE_1_7,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_1_7,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_1_7,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_1_7,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_1_7,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x7064++0x3
line.long 0x0 "RDMDREQOS_1_7,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x7078++0x3
line.long 0x0 "RDMREGIONID_1_7,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x7080++0x3
line.long 0x0 "RDMCHID_1_7,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x70B0++0x3
line.long 0x0 "RDMSEC_1_7,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x7100++0x3
line.long 0x0 "RDMCHCLR_1_7,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x7110++0x3
line.long 0x0 "RDMISTA_1_7,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x7114++0x3
line.long 0x0 "RDMADR40MODE_1_7,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x8000++0x1F
line.long 0x0 "RDMSAR_1_8,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_1_8,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_1_8,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_1_8,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_1_8,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_1_8,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_1_8,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_1_8,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x8028++0x3
line.long 0x0 "RDMTSR_1_8,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x8038++0x3
line.long 0x0 "RDMTSRB_1_8,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x8040++0x1
line.word 0x0 "RDMRS_1_8,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x8048++0x3
line.long 0x0 "RDMBUFCR_1_8,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x8050++0x13
line.long 0x0 "RDMDPBASE_1_8,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_1_8,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_1_8,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_1_8,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_1_8,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x8064++0x3
line.long 0x0 "RDMDREQOS_1_8,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x8078++0x3
line.long 0x0 "RDMREGIONID_1_8,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x8080++0x3
line.long 0x0 "RDMCHID_1_8,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x80B0++0x3
line.long 0x0 "RDMSEC_1_8,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x8100++0x3
line.long 0x0 "RDMCHCLR_1_8,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x8110++0x3
line.long 0x0 "RDMISTA_1_8,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x8114++0x3
line.long 0x0 "RDMADR40MODE_1_8,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x9000++0x1F
line.long 0x0 "RDMSAR_1_9,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_1_9,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_1_9,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_1_9,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_1_9,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_1_9,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_1_9,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_1_9,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x9028++0x3
line.long 0x0 "RDMTSR_1_9,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x9038++0x3
line.long 0x0 "RDMTSRB_1_9,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x9040++0x1
line.word 0x0 "RDMRS_1_9,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x9048++0x3
line.long 0x0 "RDMBUFCR_1_9,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x9050++0x13
line.long 0x0 "RDMDPBASE_1_9,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_1_9,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_1_9,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_1_9,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_1_9,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x9064++0x3
line.long 0x0 "RDMDREQOS_1_9,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x9078++0x3
line.long 0x0 "RDMREGIONID_1_9,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x9080++0x3
line.long 0x0 "RDMCHID_1_9,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x90B0++0x3
line.long 0x0 "RDMSEC_1_9,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x9100++0x3
line.long 0x0 "RDMCHCLR_1_9,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x9110++0x3
line.long 0x0 "RDMISTA_1_9,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x9114++0x3
line.long 0x0 "RDMADR40MODE_1_9,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0xA000++0x1F
line.long 0x0 "RDMSAR_1_10,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_1_10,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_1_10,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_1_10,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_1_10,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_1_10,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_1_10,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_1_10,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0xA028++0x3
line.long 0x0 "RDMTSR_1_10,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0xA038++0x3
line.long 0x0 "RDMTSRB_1_10,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0xA040++0x1
line.word 0x0 "RDMRS_1_10,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0xA048++0x3
line.long 0x0 "RDMBUFCR_1_10,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0xA050++0x13
line.long 0x0 "RDMDPBASE_1_10,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_1_10,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_1_10,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_1_10,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_1_10,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0xA064++0x3
line.long 0x0 "RDMDREQOS_1_10,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0xA078++0x3
line.long 0x0 "RDMREGIONID_1_10,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0xA080++0x3
line.long 0x0 "RDMCHID_1_10,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xA0B0++0x3
line.long 0x0 "RDMSEC_1_10,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0xA100++0x3
line.long 0x0 "RDMCHCLR_1_10,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0xA110++0x3
line.long 0x0 "RDMISTA_1_10,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0xA114++0x3
line.long 0x0 "RDMADR40MODE_1_10,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0xB000++0x1F
line.long 0x0 "RDMSAR_1_11,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_1_11,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_1_11,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_1_11,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_1_11,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_1_11,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_1_11,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_1_11,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0xB028++0x3
line.long 0x0 "RDMTSR_1_11,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0xB038++0x3
line.long 0x0 "RDMTSRB_1_11,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0xB040++0x1
line.word 0x0 "RDMRS_1_11,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0xB048++0x3
line.long 0x0 "RDMBUFCR_1_11,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0xB050++0x13
line.long 0x0 "RDMDPBASE_1_11,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_1_11,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_1_11,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_1_11,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_1_11,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0xB064++0x3
line.long 0x0 "RDMDREQOS_1_11,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0xB078++0x3
line.long 0x0 "RDMREGIONID_1_11,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0xB080++0x3
line.long 0x0 "RDMCHID_1_11,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xB0B0++0x3
line.long 0x0 "RDMSEC_1_11,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0xB100++0x3
line.long 0x0 "RDMCHCLR_1_11,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0xB110++0x3
line.long 0x0 "RDMISTA_1_11,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0xB114++0x3
line.long 0x0 "RDMADR40MODE_1_11,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0xC000++0x1F
line.long 0x0 "RDMSAR_1_12,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_1_12,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_1_12,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_1_12,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_1_12,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_1_12,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_1_12,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_1_12,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0xC028++0x3
line.long 0x0 "RDMTSR_1_12,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0xC038++0x3
line.long 0x0 "RDMTSRB_1_12,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0xC040++0x1
line.word 0x0 "RDMRS_1_12,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0xC048++0x3
line.long 0x0 "RDMBUFCR_1_12,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0xC050++0x13
line.long 0x0 "RDMDPBASE_1_12,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_1_12,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_1_12,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_1_12,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_1_12,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0xC064++0x3
line.long 0x0 "RDMDREQOS_1_12,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0xC078++0x3
line.long 0x0 "RDMREGIONID_1_12,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0xC080++0x3
line.long 0x0 "RDMCHID_1_12,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xC0B0++0x3
line.long 0x0 "RDMSEC_1_12,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0xC100++0x3
line.long 0x0 "RDMCHCLR_1_12,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0xC110++0x3
line.long 0x0 "RDMISTA_1_12,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0xC114++0x3
line.long 0x0 "RDMADR40MODE_1_12,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0xD000++0x1F
line.long 0x0 "RDMSAR_1_13,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_1_13,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_1_13,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_1_13,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_1_13,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_1_13,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_1_13,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_1_13,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0xD028++0x3
line.long 0x0 "RDMTSR_1_13,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0xD038++0x3
line.long 0x0 "RDMTSRB_1_13,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0xD040++0x1
line.word 0x0 "RDMRS_1_13,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0xD048++0x3
line.long 0x0 "RDMBUFCR_1_13,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0xD050++0x13
line.long 0x0 "RDMDPBASE_1_13,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_1_13,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_1_13,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_1_13,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_1_13,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0xD064++0x3
line.long 0x0 "RDMDREQOS_1_13,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0xD078++0x3
line.long 0x0 "RDMREGIONID_1_13,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0xD080++0x3
line.long 0x0 "RDMCHID_1_13,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xD0B0++0x3
line.long 0x0 "RDMSEC_1_13,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0xD100++0x3
line.long 0x0 "RDMCHCLR_1_13,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0xD110++0x3
line.long 0x0 "RDMISTA_1_13,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0xD114++0x3
line.long 0x0 "RDMADR40MODE_1_13,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0xE000++0x1F
line.long 0x0 "RDMSAR_1_14,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_1_14,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_1_14,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_1_14,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_1_14,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_1_14,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_1_14,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_1_14,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0xE028++0x3
line.long 0x0 "RDMTSR_1_14,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0xE038++0x3
line.long 0x0 "RDMTSRB_1_14,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0xE040++0x1
line.word 0x0 "RDMRS_1_14,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0xE048++0x3
line.long 0x0 "RDMBUFCR_1_14,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0xE050++0x13
line.long 0x0 "RDMDPBASE_1_14,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_1_14,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_1_14,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_1_14,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_1_14,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0xE064++0x3
line.long 0x0 "RDMDREQOS_1_14,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0xE078++0x3
line.long 0x0 "RDMREGIONID_1_14,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0xE080++0x3
line.long 0x0 "RDMCHID_1_14,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xE0B0++0x3
line.long 0x0 "RDMSEC_1_14,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0xE100++0x3
line.long 0x0 "RDMCHCLR_1_14,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0xE110++0x3
line.long 0x0 "RDMISTA_1_14,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0xE114++0x3
line.long 0x0 "RDMADR40MODE_1_14,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0xF000++0x1F
line.long 0x0 "RDMSAR_1_15,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "RDMDAR_1_15,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "RDMTCR_1_15,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,RT-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "RDMCHCR_1_15,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "RDMFIXSAR_1_15,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "RDMFIXDAR_1_15,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "RDMTCRB_1_15,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "RDMCHCRB_1_15,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0xF028++0x3
line.long 0x0 "RDMTSR_1_15,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0xF038++0x3
line.long 0x0 "RDMTSRB_1_15,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0xF040++0x1
line.word 0x0 "RDMRS_1_15,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0xF048++0x3
line.long 0x0 "RDMBUFCR_1_15,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0xF050++0x13
line.long 0x0 "RDMDPBASE_1_15,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "RDMDPCR_1_15,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "RDMDPEVTCR_1_15,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "RDMDPEVTCNT_1_15,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "RDMFIXDPBASE_1_15,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0xF064++0x3
line.long 0x0 "RDMDREQOS_1_15,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0xF078++0x3
line.long 0x0 "RDMREGIONID_1_15,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0xF080++0x3
line.long 0x0 "RDMCHID_1_15,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xF0B0++0x3
line.long 0x0 "RDMSEC_1_15,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0xF100++0x3
line.long 0x0 "RDMCHCLR_1_15,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0xF110++0x3
line.long 0x0 "RDMISTA_1_15,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0xF114++0x3
line.long 0x0 "RDMADR40MODE_1_15,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
tree.end
tree "DMAC_4"
base ad:0xE7350000
group.word 0x60++0x1
line.word 0x0 "SDMOR_1,DMOR is a 16-bit readable/writable register which control master enable and specifies the priority level of all DMA channels. This register also shows the Address Error status."
hexmask.word.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.word 0x0 8.--9. "PR_1_0,Priority Mode" "0: CH0 greater_than CH1 greater_than CH2..,?,?,?"
newline
hexmask.word.byte 0x0 3.--7. 1. "Reserved_3,Reserved"
newline
rbitfld.word 0x0 2. "AE,Address Error Flag" "0: No SYS-DMAC address error interrupt,1: SYS-DMAC address error interrupt occurs during.."
newline
rbitfld.word 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.word 0x0 0. "DME,DMA Master Enable" "0: Disables DMA transfers on all channels,1: Enables DMA transfers on all channels"
group.long 0xA0++0x3
line.long 0x0 "SDMDPSEC_1,DPSEC is a 32-bit readable/writeable register that controls the secure attribute of Descriptor Memory. Only the initiator in the secure mode can change this register."
bitfld.long 0x0 31. "DPSEC,Secure attribute setting of Descriptor memory" "0: nonsecure attribute,1: secure attribute"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
hexmask.long.word 0x0 16.--24. 1. "DPSECA_8_0,Secure attribute base address of Descriptor memory"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.word 0x0 0.--8. 1. "DPSECM_8_0,Secure attribute base address mask of Descriptor memory"
group.long 0xC0++0x3
line.long 0x0 "SDMERRDET_1,ERRDET is 32-bit readable/writable register that indicates the Secure error information"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "ERROR_DETECT,Secure Error" "0: No Error,1: Secure Error"
rgroup.long 0xC4++0x7
line.long 0x0 "SDMERRADR_1,ERRADR is 32-bit readable/writable register that indicates the Secure error information"
hexmask.long 0x0 0.--31. 1. "ERROR_ADDR_31_0,Secure Error APB address"
line.long 0x4 "SDMERRPID_1,ERRPID is 32-bit readable/writable register that indicates the Secure error information"
hexmask.long 0x4 0.--31. 1. "ERROR_PID_31_0,Secure error APB ID"
group.long 0xCC++0x7
line.long 0x0 "SDMADRFB_1,ADRFB is 32-bit readable/writable register that specify the control of address feedback of DPRAM"
bitfld.long 0x0 31. "ADDRFB_EN,Address Feedback Enable" "0: Disable and clear error,1: Enable"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
hexmask.long.word 0x0 16.--24. 1. "REF_A_8_0,Reference address when comparing"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "P_ADDRFB_ERR_POST,Address Feedback Post-Fault injection" "0: No fault injection,1: Fault injection"
newline
bitfld.long 0x0 0. "P_ADDRFB_ERR_PRE,Address Feedback Pre-Fault injection" "0: No fault injection,1: Fault injection"
line.long 0x4 "SDMAPBEDC_1,APBEDC is 32-bit readable/writable register that specify the control APBEDC injection and EDC error status"
hexmask.long.word 0x4 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x4 19. "PWDATA_PUBLIC_ERR,PUBLIC PWDATA EDC error status" "0: normal,1: Error"
newline
rbitfld.long 0x4 18. "PADDR_PUBLIC_ERR,PUBLIC PADDR EDC error status" "0: normal,1: Error"
newline
rbitfld.long 0x4 17. "PWDATA_CH_ERR,CH PWDATA EDC error status" "0: normal,1: Error"
newline
rbitfld.long 0x4 16. "PADDR_CH_ERR,CH PWDATA EDC error status" "0: normal,1: Error"
newline
hexmask.long.word 0x4 2.--15. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x4 1. "P_APBPUBLIC_ERR,PUBLIC APB I/F Fault injection" "0: No fault injection,1: Fault injection"
newline
bitfld.long 0x4 0. "P_APBCH_ERR,CH APB I/F Fault injection" "0: No fault injection,1: Fault injection"
rgroup.long 0xD4++0xF
line.long 0x0 "SDMAPB_CH_PADDR_1,APB_CH_PADDR is 32-bit readable register that specify the EDC error information"
hexmask.long 0x0 0.--31. 1. "PADDR_31_0,CH EDC error PADDR information"
line.long 0x4 "SDMAPB_CH_PWDATA_1,APB_CH_PWDATA is 32-bit readable register that specify the EDC error information"
hexmask.long 0x4 0.--31. 1. "PWDATA_31_0,CH EDC error PADDR information"
line.long 0x8 "SDMAPB_PUBLIC_PADDR_1,APB_PUBLIC_PADDR is 32-bit readable register that specify the EDC error information"
hexmask.long 0x8 0.--31. 1. "PADDR_31_0,PUBLIC EDC error PADDR information"
line.long 0xC "SDMAPB_PUBLIC_PWDATA_1,APB_PUBLIC_PWDATA is 32-bit readable register that specify the EDC error information"
hexmask.long 0xC 0.--31. 1. "PWDATA_31_0,PUBLIC EDC error PADDR information"
group.long 0xF0++0xB
line.long 0x0 "SDMDMCMP_STAUS_1,DMCMP_STATUS is 32-bit readable/writable register that specify the control of DCLS comparison and error status."
bitfld.long 0x0 31. "EN,DCLS compare enable" "0: Disable and Clear error,1: Enable and detect"
newline
bitfld.long 0x0 30. "P_ERR_POST,Post-Fault Injection" "0: Disable Fault injection,1: Fault Injection"
newline
hexmask.long.word 0x0 17.--29. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "P_ERR_PRE,Pre-Fault Injection" "0: Disable Fault injection,1: Fault Injection"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
newline
rbitfld.long 0x0 4. "E_PERI,Error status on PERI AXI I/F" "0,1"
newline
rbitfld.long 0x0 3. "E_MEM,Error status on MEM AXI I/F" "0,1"
newline
rbitfld.long 0x0 2. "E_BUS,Error status on BUS AXI I/F" "0,1"
newline
rbitfld.long 0x0 1. "E_APB,Error status on APB I/F" "0,1"
newline
rbitfld.long 0x0 0. "E_OTH,Error status on other signals" "0,1"
line.long 0x4 "SDMRATE_RD_1,RRATE_RD is 32-bit readable/writable register that specify the control of rate control of BUS I/F read."
bitfld.long 0x4 31. "RATE_RD_ACCESS_CNT_EN,Rate Control for read Enable" "0: Disable,1: Enable"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "RATE_RD_ACCESS_CNT,Rate Control counter setting for read transaction"
line.long 0x8 "SDMRATE_WR_1,RRATE_WR is 32-bit readable/writable register that specify the control of rate control of BUS I/F write."
bitfld.long 0x8 31. "RATE_WR_ACCESS_CNT_EN,Rate Control for write Enable" "0: Disable,1: Enable"
newline
hexmask.long.tbyte 0x8 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x8 0.--7. 1. "RATE_WR_ACCESS_CNT,Rate Control counter setting for write transaction"
tree.end
tree "DMAC_5"
base ad:0xE7351000
group.word 0x60++0x1
line.word 0x0 "SDMOR_2,DMOR is a 16-bit readable/writable register which control master enable and specifies the priority level of all DMA channels. This register also shows the Address Error status."
hexmask.word.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.word 0x0 8.--9. "PR_1_0,Priority Mode" "0: CH0 greater_than CH1 greater_than CH2..,?,?,?"
newline
hexmask.word.byte 0x0 3.--7. 1. "Reserved_3,Reserved"
newline
rbitfld.word 0x0 2. "AE,Address Error Flag" "0: No SYS-DMAC address error interrupt,1: SYS-DMAC address error interrupt occurs during.."
newline
rbitfld.word 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.word 0x0 0. "DME,DMA Master Enable" "0: Disables DMA transfers on all channels,1: Enables DMA transfers on all channels"
group.long 0xA0++0x3
line.long 0x0 "SDMDPSEC_2,DPSEC is a 32-bit readable/writeable register that controls the secure attribute of Descriptor Memory. Only the initiator in the secure mode can change this register."
bitfld.long 0x0 31. "DPSEC,Secure attribute setting of Descriptor memory" "0: nonsecure attribute,1: secure attribute"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
hexmask.long.word 0x0 16.--24. 1. "DPSECA_8_0,Secure attribute base address of Descriptor memory"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.word 0x0 0.--8. 1. "DPSECM_8_0,Secure attribute base address mask of Descriptor memory"
group.long 0xC0++0x3
line.long 0x0 "SDMERRDET_2,ERRDET is 32-bit readable/writable register that indicates the Secure error information"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "ERROR_DETECT,Secure Error" "0: No Error,1: Secure Error"
rgroup.long 0xC4++0x7
line.long 0x0 "SDMERRADR_2,ERRADR is 32-bit readable/writable register that indicates the Secure error information"
hexmask.long 0x0 0.--31. 1. "ERROR_ADDR_31_0,Secure Error APB address"
line.long 0x4 "SDMERRPID_2,ERRPID is 32-bit readable/writable register that indicates the Secure error information"
hexmask.long 0x4 0.--31. 1. "ERROR_PID_31_0,Secure error APB ID"
group.long 0xCC++0x7
line.long 0x0 "SDMADRFB_2,ADRFB is 32-bit readable/writable register that specify the control of address feedback of DPRAM"
bitfld.long 0x0 31. "ADDRFB_EN,Address Feedback Enable" "0: Disable and clear error,1: Enable"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
hexmask.long.word 0x0 16.--24. 1. "REF_A_8_0,Reference address when comparing"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "P_ADDRFB_ERR_POST,Address Feedback Post-Fault injection" "0: No fault injection,1: Fault injection"
newline
bitfld.long 0x0 0. "P_ADDRFB_ERR_PRE,Address Feedback Pre-Fault injection" "0: No fault injection,1: Fault injection"
line.long 0x4 "SDMAPBEDC_2,APBEDC is 32-bit readable/writable register that specify the control APBEDC injection and EDC error status"
hexmask.long.word 0x4 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x4 19. "PWDATA_PUBLIC_ERR,PUBLIC PWDATA EDC error status" "0: normal,1: Error"
newline
rbitfld.long 0x4 18. "PADDR_PUBLIC_ERR,PUBLIC PADDR EDC error status" "0: normal,1: Error"
newline
rbitfld.long 0x4 17. "PWDATA_CH_ERR,CH PWDATA EDC error status" "0: normal,1: Error"
newline
rbitfld.long 0x4 16. "PADDR_CH_ERR,CH PWDATA EDC error status" "0: normal,1: Error"
newline
hexmask.long.word 0x4 2.--15. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x4 1. "P_APBPUBLIC_ERR,PUBLIC APB I/F Fault injection" "0: No fault injection,1: Fault injection"
newline
bitfld.long 0x4 0. "P_APBCH_ERR,CH APB I/F Fault injection" "0: No fault injection,1: Fault injection"
rgroup.long 0xD4++0xF
line.long 0x0 "SDMAPB_CH_PADDR_2,APB_CH_PADDR is 32-bit readable register that specify the EDC error information"
hexmask.long 0x0 0.--31. 1. "PADDR_31_0,CH EDC error PADDR information"
line.long 0x4 "SDMAPB_CH_PWDATA_2,APB_CH_PWDATA is 32-bit readable register that specify the EDC error information"
hexmask.long 0x4 0.--31. 1. "PWDATA_31_0,CH EDC error PADDR information"
line.long 0x8 "SDMAPB_PUBLIC_PADDR_2,APB_PUBLIC_PADDR is 32-bit readable register that specify the EDC error information"
hexmask.long 0x8 0.--31. 1. "PADDR_31_0,PUBLIC EDC error PADDR information"
line.long 0xC "SDMAPB_PUBLIC_PWDATA_2,APB_PUBLIC_PWDATA is 32-bit readable register that specify the EDC error information"
hexmask.long 0xC 0.--31. 1. "PWDATA_31_0,PUBLIC EDC error PADDR information"
group.long 0xF0++0xB
line.long 0x0 "SDMDMCMP_STAUS_2,DMCMP_STATUS is 32-bit readable/writable register that specify the control of DCLS comparison and error status."
bitfld.long 0x0 31. "EN,DCLS compare enable" "0: Disable and Clear error,1: Enable and detect"
newline
bitfld.long 0x0 30. "P_ERR_POST,Post-Fault Injection" "0: Disable Fault injection,1: Fault Injection"
newline
hexmask.long.word 0x0 17.--29. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "P_ERR_PRE,Pre-Fault Injection" "0: Disable Fault injection,1: Fault Injection"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
newline
rbitfld.long 0x0 4. "E_PERI,Error status on PERI AXI I/F" "0,1"
newline
rbitfld.long 0x0 3. "E_MEM,Error status on MEM AXI I/F" "0,1"
newline
rbitfld.long 0x0 2. "E_BUS,Error status on BUS AXI I/F" "0,1"
newline
rbitfld.long 0x0 1. "E_APB,Error status on APB I/F" "0,1"
newline
rbitfld.long 0x0 0. "E_OTH,Error status on other signals" "0,1"
line.long 0x4 "SDMRATE_RD_2,RRATE_RD is 32-bit readable/writable register that specify the control of rate control of BUS I/F read."
bitfld.long 0x4 31. "RATE_RD_ACCESS_CNT_EN,Rate Control for read Enable" "0: Disable,1: Enable"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "RATE_RD_ACCESS_CNT,Rate Control counter setting for read transaction"
line.long 0x8 "SDMRATE_WR_2,RRATE_WR is 32-bit readable/writable register that specify the control of rate control of BUS I/F write."
bitfld.long 0x8 31. "RATE_WR_ACCESS_CNT_EN,Rate Control for write Enable" "0: Disable,1: Enable"
newline
hexmask.long.tbyte 0x8 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x8 0.--7. 1. "RATE_WR_ACCESS_CNT,Rate Control counter setting for write transaction"
tree.end
tree "DMAC_6"
base ad:0xE7300000
group.long 0x0++0x1F
line.long 0x0 "SDMSAR_1_0,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_1_0,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_1_0,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_1_0,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_1_0,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_1_0,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_1_0,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_1_0,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x28++0x3
line.long 0x0 "SDMTSR_1_0,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x38++0x3
line.long 0x0 "SDMTSRB_1_0,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x40++0x1
line.word 0x0 "SDMRS_1_0,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x48++0x3
line.long 0x0 "SDMBUFCR_1_0,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x50++0x13
line.long 0x0 "SDMDPBASE_1_0,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_1_0,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_1_0,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_1_0,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_1_0,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x64++0x3
line.long 0x0 "SDMDREQOS_1_0,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x78++0x3
line.long 0x0 "SDMREGIONID_1_0,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x80++0x3
line.long 0x0 "SDMCHID_1_0,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xB0++0x3
line.long 0x0 "SDMSEC_1_0,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x100++0x3
line.long 0x0 "SDMCHCLR_1_0,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x110++0x3
line.long 0x0 "SDMISTA_1_0,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x114++0x3
line.long 0x0 "SDMADR40MODE_1_0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x1000++0x1F
line.long 0x0 "SDMSAR_1_1,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_1_1,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_1_1,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_1_1,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_1_1,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_1_1,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_1_1,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_1_1,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x1028++0x3
line.long 0x0 "SDMTSR_1_1,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x1038++0x3
line.long 0x0 "SDMTSRB_1_1,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x1040++0x1
line.word 0x0 "SDMRS_1_1,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x1048++0x3
line.long 0x0 "SDMBUFCR_1_1,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x1050++0x13
line.long 0x0 "SDMDPBASE_1_1,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_1_1,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_1_1,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_1_1,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_1_1,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x1064++0x3
line.long 0x0 "SDMDREQOS_1_1,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x1078++0x3
line.long 0x0 "SDMREGIONID_1_1,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x1080++0x3
line.long 0x0 "SDMCHID_1_1,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x10B0++0x3
line.long 0x0 "SDMSEC_1_1,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x1100++0x3
line.long 0x0 "SDMCHCLR_1_1,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x1110++0x3
line.long 0x0 "SDMISTA_1_1,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x1114++0x3
line.long 0x0 "SDMADR40MODE_1_1,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x2000++0x1F
line.long 0x0 "SDMSAR_1_2,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_1_2,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_1_2,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_1_2,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_1_2,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_1_2,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_1_2,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_1_2,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x2028++0x3
line.long 0x0 "SDMTSR_1_2,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x2038++0x3
line.long 0x0 "SDMTSRB_1_2,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x2040++0x1
line.word 0x0 "SDMRS_1_2,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x2048++0x3
line.long 0x0 "SDMBUFCR_1_2,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x2050++0x13
line.long 0x0 "SDMDPBASE_1_2,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_1_2,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_1_2,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_1_2,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_1_2,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x2064++0x3
line.long 0x0 "SDMDREQOS_1_2,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x2078++0x3
line.long 0x0 "SDMREGIONID_1_2,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x2080++0x3
line.long 0x0 "SDMCHID_1_2,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x20B0++0x3
line.long 0x0 "SDMSEC_1_2,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x2100++0x3
line.long 0x0 "SDMCHCLR_1_2,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x2110++0x3
line.long 0x0 "SDMISTA_1_2,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x2114++0x3
line.long 0x0 "SDMADR40MODE_1_2,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x3000++0x1F
line.long 0x0 "SDMSAR_1_3,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_1_3,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_1_3,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_1_3,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_1_3,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_1_3,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_1_3,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_1_3,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x3028++0x3
line.long 0x0 "SDMTSR_1_3,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x3038++0x3
line.long 0x0 "SDMTSRB_1_3,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x3040++0x1
line.word 0x0 "SDMRS_1_3,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x3048++0x3
line.long 0x0 "SDMBUFCR_1_3,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x3050++0x13
line.long 0x0 "SDMDPBASE_1_3,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_1_3,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_1_3,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_1_3,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_1_3,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x3064++0x3
line.long 0x0 "SDMDREQOS_1_3,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x3078++0x3
line.long 0x0 "SDMREGIONID_1_3,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x3080++0x3
line.long 0x0 "SDMCHID_1_3,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x30B0++0x3
line.long 0x0 "SDMSEC_1_3,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x3100++0x3
line.long 0x0 "SDMCHCLR_1_3,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x3110++0x3
line.long 0x0 "SDMISTA_1_3,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x3114++0x3
line.long 0x0 "SDMADR40MODE_1_3,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x4000++0x1F
line.long 0x0 "SDMSAR_1_4,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_1_4,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_1_4,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_1_4,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_1_4,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_1_4,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_1_4,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_1_4,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x4028++0x3
line.long 0x0 "SDMTSR_1_4,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x4038++0x3
line.long 0x0 "SDMTSRB_1_4,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x4040++0x1
line.word 0x0 "SDMRS_1_4,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x4048++0x3
line.long 0x0 "SDMBUFCR_1_4,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x4050++0x13
line.long 0x0 "SDMDPBASE_1_4,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_1_4,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_1_4,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_1_4,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_1_4,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x4064++0x3
line.long 0x0 "SDMDREQOS_1_4,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x4078++0x3
line.long 0x0 "SDMREGIONID_1_4,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x4080++0x3
line.long 0x0 "SDMCHID_1_4,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x40B0++0x3
line.long 0x0 "SDMSEC_1_4,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x4100++0x3
line.long 0x0 "SDMCHCLR_1_4,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x4110++0x3
line.long 0x0 "SDMISTA_1_4,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x4114++0x3
line.long 0x0 "SDMADR40MODE_1_4,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x5000++0x1F
line.long 0x0 "SDMSAR_1_5,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_1_5,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_1_5,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_1_5,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_1_5,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_1_5,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_1_5,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_1_5,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x5028++0x3
line.long 0x0 "SDMTSR_1_5,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x5038++0x3
line.long 0x0 "SDMTSRB_1_5,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x5040++0x1
line.word 0x0 "SDMRS_1_5,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x5048++0x3
line.long 0x0 "SDMBUFCR_1_5,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x5050++0x13
line.long 0x0 "SDMDPBASE_1_5,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_1_5,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_1_5,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_1_5,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_1_5,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x5064++0x3
line.long 0x0 "SDMDREQOS_1_5,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x5078++0x3
line.long 0x0 "SDMREGIONID_1_5,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x5080++0x3
line.long 0x0 "SDMCHID_1_5,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x50B0++0x3
line.long 0x0 "SDMSEC_1_5,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x5100++0x3
line.long 0x0 "SDMCHCLR_1_5,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x5110++0x3
line.long 0x0 "SDMISTA_1_5,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x5114++0x3
line.long 0x0 "SDMADR40MODE_1_5,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x6000++0x1F
line.long 0x0 "SDMSAR_1_6,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_1_6,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_1_6,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_1_6,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_1_6,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_1_6,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_1_6,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_1_6,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x6028++0x3
line.long 0x0 "SDMTSR_1_6,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x6038++0x3
line.long 0x0 "SDMTSRB_1_6,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x6040++0x1
line.word 0x0 "SDMRS_1_6,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x6048++0x3
line.long 0x0 "SDMBUFCR_1_6,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x6050++0x13
line.long 0x0 "SDMDPBASE_1_6,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_1_6,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_1_6,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_1_6,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_1_6,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x6064++0x3
line.long 0x0 "SDMDREQOS_1_6,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x6078++0x3
line.long 0x0 "SDMREGIONID_1_6,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x6080++0x3
line.long 0x0 "SDMCHID_1_6,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x60B0++0x3
line.long 0x0 "SDMSEC_1_6,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x6100++0x3
line.long 0x0 "SDMCHCLR_1_6,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x6110++0x3
line.long 0x0 "SDMISTA_1_6,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x6114++0x3
line.long 0x0 "SDMADR40MODE_1_6,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x7000++0x1F
line.long 0x0 "SDMSAR_1_7,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_1_7,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_1_7,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_1_7,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_1_7,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_1_7,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_1_7,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_1_7,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x7028++0x3
line.long 0x0 "SDMTSR_1_7,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x7038++0x3
line.long 0x0 "SDMTSRB_1_7,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x7040++0x1
line.word 0x0 "SDMRS_1_7,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x7048++0x3
line.long 0x0 "SDMBUFCR_1_7,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x7050++0x13
line.long 0x0 "SDMDPBASE_1_7,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_1_7,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_1_7,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_1_7,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_1_7,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x7064++0x3
line.long 0x0 "SDMDREQOS_1_7,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x7078++0x3
line.long 0x0 "SDMREGIONID_1_7,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x7080++0x3
line.long 0x0 "SDMCHID_1_7,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x70B0++0x3
line.long 0x0 "SDMSEC_1_7,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x7100++0x3
line.long 0x0 "SDMCHCLR_1_7,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x7110++0x3
line.long 0x0 "SDMISTA_1_7,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x7114++0x3
line.long 0x0 "SDMADR40MODE_1_7,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x8000++0x1F
line.long 0x0 "SDMSAR_1_8,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_1_8,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_1_8,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_1_8,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_1_8,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_1_8,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_1_8,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_1_8,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x8028++0x3
line.long 0x0 "SDMTSR_1_8,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x8038++0x3
line.long 0x0 "SDMTSRB_1_8,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x8040++0x1
line.word 0x0 "SDMRS_1_8,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x8048++0x3
line.long 0x0 "SDMBUFCR_1_8,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x8050++0x13
line.long 0x0 "SDMDPBASE_1_8,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_1_8,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_1_8,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_1_8,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_1_8,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x8064++0x3
line.long 0x0 "SDMDREQOS_1_8,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x8078++0x3
line.long 0x0 "SDMREGIONID_1_8,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x8080++0x3
line.long 0x0 "SDMCHID_1_8,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x80B0++0x3
line.long 0x0 "SDMSEC_1_8,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x8100++0x3
line.long 0x0 "SDMCHCLR_1_8,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x8110++0x3
line.long 0x0 "SDMISTA_1_8,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x8114++0x3
line.long 0x0 "SDMADR40MODE_1_8,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x9000++0x1F
line.long 0x0 "SDMSAR_1_9,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_1_9,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_1_9,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_1_9,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_1_9,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_1_9,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_1_9,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_1_9,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x9028++0x3
line.long 0x0 "SDMTSR_1_9,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x9038++0x3
line.long 0x0 "SDMTSRB_1_9,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x9040++0x1
line.word 0x0 "SDMRS_1_9,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x9048++0x3
line.long 0x0 "SDMBUFCR_1_9,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x9050++0x13
line.long 0x0 "SDMDPBASE_1_9,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_1_9,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_1_9,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_1_9,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_1_9,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x9064++0x3
line.long 0x0 "SDMDREQOS_1_9,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x9078++0x3
line.long 0x0 "SDMREGIONID_1_9,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x9080++0x3
line.long 0x0 "SDMCHID_1_9,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x90B0++0x3
line.long 0x0 "SDMSEC_1_9,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x9100++0x3
line.long 0x0 "SDMCHCLR_1_9,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x9110++0x3
line.long 0x0 "SDMISTA_1_9,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x9114++0x3
line.long 0x0 "SDMADR40MODE_1_9,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0xA000++0x1F
line.long 0x0 "SDMSAR_1_10,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_1_10,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_1_10,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_1_10,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_1_10,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_1_10,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_1_10,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_1_10,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0xA028++0x3
line.long 0x0 "SDMTSR_1_10,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0xA038++0x3
line.long 0x0 "SDMTSRB_1_10,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0xA040++0x1
line.word 0x0 "SDMRS_1_10,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0xA048++0x3
line.long 0x0 "SDMBUFCR_1_10,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0xA050++0x13
line.long 0x0 "SDMDPBASE_1_10,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_1_10,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_1_10,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_1_10,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_1_10,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0xA064++0x3
line.long 0x0 "SDMDREQOS_1_10,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0xA078++0x3
line.long 0x0 "SDMREGIONID_1_10,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0xA080++0x3
line.long 0x0 "SDMCHID_1_10,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xA0B0++0x3
line.long 0x0 "SDMSEC_1_10,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0xA100++0x3
line.long 0x0 "SDMCHCLR_1_10,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0xA110++0x3
line.long 0x0 "SDMISTA_1_10,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0xA114++0x3
line.long 0x0 "SDMADR40MODE_1_10,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0xB000++0x1F
line.long 0x0 "SDMSAR_1_11,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_1_11,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_1_11,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_1_11,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_1_11,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_1_11,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_1_11,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_1_11,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0xB028++0x3
line.long 0x0 "SDMTSR_1_11,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0xB038++0x3
line.long 0x0 "SDMTSRB_1_11,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0xB040++0x1
line.word 0x0 "SDMRS_1_11,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0xB048++0x3
line.long 0x0 "SDMBUFCR_1_11,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0xB050++0x13
line.long 0x0 "SDMDPBASE_1_11,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_1_11,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_1_11,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_1_11,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_1_11,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0xB064++0x3
line.long 0x0 "SDMDREQOS_1_11,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0xB078++0x3
line.long 0x0 "SDMREGIONID_1_11,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0xB080++0x3
line.long 0x0 "SDMCHID_1_11,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xB0B0++0x3
line.long 0x0 "SDMSEC_1_11,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0xB100++0x3
line.long 0x0 "SDMCHCLR_1_11,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0xB110++0x3
line.long 0x0 "SDMISTA_1_11,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0xB114++0x3
line.long 0x0 "SDMADR40MODE_1_11,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0xC000++0x1F
line.long 0x0 "SDMSAR_1_12,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_1_12,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_1_12,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_1_12,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_1_12,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_1_12,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_1_12,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_1_12,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0xC028++0x3
line.long 0x0 "SDMTSR_1_12,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0xC038++0x3
line.long 0x0 "SDMTSRB_1_12,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0xC040++0x1
line.word 0x0 "SDMRS_1_12,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0xC048++0x3
line.long 0x0 "SDMBUFCR_1_12,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0xC050++0x13
line.long 0x0 "SDMDPBASE_1_12,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_1_12,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_1_12,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_1_12,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_1_12,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0xC064++0x3
line.long 0x0 "SDMDREQOS_1_12,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0xC078++0x3
line.long 0x0 "SDMREGIONID_1_12,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0xC080++0x3
line.long 0x0 "SDMCHID_1_12,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xC0B0++0x3
line.long 0x0 "SDMSEC_1_12,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0xC100++0x3
line.long 0x0 "SDMCHCLR_1_12,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0xC110++0x3
line.long 0x0 "SDMISTA_1_12,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0xC114++0x3
line.long 0x0 "SDMADR40MODE_1_12,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0xD000++0x1F
line.long 0x0 "SDMSAR_1_13,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_1_13,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_1_13,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_1_13,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_1_13,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_1_13,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_1_13,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_1_13,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0xD028++0x3
line.long 0x0 "SDMTSR_1_13,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0xD038++0x3
line.long 0x0 "SDMTSRB_1_13,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0xD040++0x1
line.word 0x0 "SDMRS_1_13,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0xD048++0x3
line.long 0x0 "SDMBUFCR_1_13,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0xD050++0x13
line.long 0x0 "SDMDPBASE_1_13,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_1_13,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_1_13,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_1_13,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_1_13,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0xD064++0x3
line.long 0x0 "SDMDREQOS_1_13,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0xD078++0x3
line.long 0x0 "SDMREGIONID_1_13,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0xD080++0x3
line.long 0x0 "SDMCHID_1_13,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xD0B0++0x3
line.long 0x0 "SDMSEC_1_13,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0xD100++0x3
line.long 0x0 "SDMCHCLR_1_13,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0xD110++0x3
line.long 0x0 "SDMISTA_1_13,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0xD114++0x3
line.long 0x0 "SDMADR40MODE_1_13,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0xE000++0x1F
line.long 0x0 "SDMSAR_1_14,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_1_14,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_1_14,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_1_14,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_1_14,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_1_14,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_1_14,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_1_14,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0xE028++0x3
line.long 0x0 "SDMTSR_1_14,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0xE038++0x3
line.long 0x0 "SDMTSRB_1_14,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0xE040++0x1
line.word 0x0 "SDMRS_1_14,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0xE048++0x3
line.long 0x0 "SDMBUFCR_1_14,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0xE050++0x13
line.long 0x0 "SDMDPBASE_1_14,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_1_14,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_1_14,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_1_14,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_1_14,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0xE064++0x3
line.long 0x0 "SDMDREQOS_1_14,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0xE078++0x3
line.long 0x0 "SDMREGIONID_1_14,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0xE080++0x3
line.long 0x0 "SDMCHID_1_14,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xE0B0++0x3
line.long 0x0 "SDMSEC_1_14,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0xE100++0x3
line.long 0x0 "SDMCHCLR_1_14,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0xE110++0x3
line.long 0x0 "SDMISTA_1_14,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0xE114++0x3
line.long 0x0 "SDMADR40MODE_1_14,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0xF000++0x1F
line.long 0x0 "SDMSAR_1_15,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_1_15,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_1_15,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_1_15,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_1_15,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_1_15,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_1_15,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_1_15,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0xF028++0x3
line.long 0x0 "SDMTSR_1_15,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0xF038++0x3
line.long 0x0 "SDMTSRB_1_15,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0xF040++0x1
line.word 0x0 "SDMRS_1_15,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0xF048++0x3
line.long 0x0 "SDMBUFCR_1_15,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0xF050++0x13
line.long 0x0 "SDMDPBASE_1_15,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_1_15,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_1_15,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_1_15,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_1_15,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0xF064++0x3
line.long 0x0 "SDMDREQOS_1_15,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0xF078++0x3
line.long 0x0 "SDMREGIONID_1_15,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0xF080++0x3
line.long 0x0 "SDMCHID_1_15,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xF0B0++0x3
line.long 0x0 "SDMSEC_1_15,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0xF100++0x3
line.long 0x0 "SDMCHCLR_1_15,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0xF110++0x3
line.long 0x0 "SDMISTA_1_15,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0xF114++0x3
line.long 0x0 "SDMADR40MODE_1_15,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
tree.end
tree "DMAC_7"
base ad:0xE7310000
group.long 0x0++0x1F
line.long 0x0 "SDMSAR_2_0,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_2_0,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_2_0,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_2_0,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_2_0,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_2_0,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_2_0,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_2_0,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x28++0x3
line.long 0x0 "SDMTSR_2_0,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x38++0x3
line.long 0x0 "SDMTSRB_2_0,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x40++0x1
line.word 0x0 "SDMRS_2_0,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x48++0x3
line.long 0x0 "SDMBUFCR_2_0,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x50++0x13
line.long 0x0 "SDMDPBASE_2_0,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_2_0,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_2_0,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_2_0,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_2_0,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x64++0x3
line.long 0x0 "SDMDREQOS_2_0,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x78++0x3
line.long 0x0 "SDMREGIONID_2_0,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x80++0x3
line.long 0x0 "SDMCHID_2_0,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0xB0++0x3
line.long 0x0 "SDMSEC_2_0,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x100++0x3
line.long 0x0 "SDMCHCLR_2_0,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x110++0x3
line.long 0x0 "SDMISTA_2_0,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x114++0x3
line.long 0x0 "SDMADR40MODE_2_0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x1000++0x1F
line.long 0x0 "SDMSAR_2_1,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_2_1,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_2_1,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_2_1,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_2_1,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_2_1,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_2_1,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_2_1,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x1028++0x3
line.long 0x0 "SDMTSR_2_1,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x1038++0x3
line.long 0x0 "SDMTSRB_2_1,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x1040++0x1
line.word 0x0 "SDMRS_2_1,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x1048++0x3
line.long 0x0 "SDMBUFCR_2_1,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x1050++0x13
line.long 0x0 "SDMDPBASE_2_1,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_2_1,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_2_1,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_2_1,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_2_1,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x1064++0x3
line.long 0x0 "SDMDREQOS_2_1,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x1078++0x3
line.long 0x0 "SDMREGIONID_2_1,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x1080++0x3
line.long 0x0 "SDMCHID_2_1,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x10B0++0x3
line.long 0x0 "SDMSEC_2_1,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x1100++0x3
line.long 0x0 "SDMCHCLR_2_1,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x1110++0x3
line.long 0x0 "SDMISTA_2_1,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x1114++0x3
line.long 0x0 "SDMADR40MODE_2_1,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x2000++0x1F
line.long 0x0 "SDMSAR_2_2,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_2_2,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_2_2,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_2_2,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_2_2,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_2_2,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_2_2,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_2_2,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x2028++0x3
line.long 0x0 "SDMTSR_2_2,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x2038++0x3
line.long 0x0 "SDMTSRB_2_2,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x2040++0x1
line.word 0x0 "SDMRS_2_2,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x2048++0x3
line.long 0x0 "SDMBUFCR_2_2,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x2050++0x13
line.long 0x0 "SDMDPBASE_2_2,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_2_2,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_2_2,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_2_2,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_2_2,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x2064++0x3
line.long 0x0 "SDMDREQOS_2_2,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x2078++0x3
line.long 0x0 "SDMREGIONID_2_2,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x2080++0x3
line.long 0x0 "SDMCHID_2_2,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x20B0++0x3
line.long 0x0 "SDMSEC_2_2,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x2100++0x3
line.long 0x0 "SDMCHCLR_2_2,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x2110++0x3
line.long 0x0 "SDMISTA_2_2,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x2114++0x3
line.long 0x0 "SDMADR40MODE_2_2,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x3000++0x1F
line.long 0x0 "SDMSAR_2_3,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_2_3,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_2_3,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_2_3,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_2_3,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_2_3,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_2_3,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_2_3,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x3028++0x3
line.long 0x0 "SDMTSR_2_3,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x3038++0x3
line.long 0x0 "SDMTSRB_2_3,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x3040++0x1
line.word 0x0 "SDMRS_2_3,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x3048++0x3
line.long 0x0 "SDMBUFCR_2_3,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x3050++0x13
line.long 0x0 "SDMDPBASE_2_3,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_2_3,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_2_3,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_2_3,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_2_3,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x3064++0x3
line.long 0x0 "SDMDREQOS_2_3,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x3078++0x3
line.long 0x0 "SDMREGIONID_2_3,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x3080++0x3
line.long 0x0 "SDMCHID_2_3,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x30B0++0x3
line.long 0x0 "SDMSEC_2_3,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x3100++0x3
line.long 0x0 "SDMCHCLR_2_3,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x3110++0x3
line.long 0x0 "SDMISTA_2_3,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x3114++0x3
line.long 0x0 "SDMADR40MODE_2_3,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x4000++0x1F
line.long 0x0 "SDMSAR_2_4,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_2_4,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_2_4,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_2_4,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_2_4,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_2_4,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_2_4,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_2_4,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x4028++0x3
line.long 0x0 "SDMTSR_2_4,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x4038++0x3
line.long 0x0 "SDMTSRB_2_4,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x4040++0x1
line.word 0x0 "SDMRS_2_4,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x4048++0x3
line.long 0x0 "SDMBUFCR_2_4,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x4050++0x13
line.long 0x0 "SDMDPBASE_2_4,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_2_4,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_2_4,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_2_4,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_2_4,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x4064++0x3
line.long 0x0 "SDMDREQOS_2_4,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x4078++0x3
line.long 0x0 "SDMREGIONID_2_4,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x4080++0x3
line.long 0x0 "SDMCHID_2_4,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x40B0++0x3
line.long 0x0 "SDMSEC_2_4,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x4100++0x3
line.long 0x0 "SDMCHCLR_2_4,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x4110++0x3
line.long 0x0 "SDMISTA_2_4,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x4114++0x3
line.long 0x0 "SDMADR40MODE_2_4,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x5000++0x1F
line.long 0x0 "SDMSAR_2_5,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_2_5,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_2_5,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_2_5,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_2_5,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_2_5,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_2_5,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_2_5,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x5028++0x3
line.long 0x0 "SDMTSR_2_5,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x5038++0x3
line.long 0x0 "SDMTSRB_2_5,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x5040++0x1
line.word 0x0 "SDMRS_2_5,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x5048++0x3
line.long 0x0 "SDMBUFCR_2_5,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x5050++0x13
line.long 0x0 "SDMDPBASE_2_5,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_2_5,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_2_5,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_2_5,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_2_5,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x5064++0x3
line.long 0x0 "SDMDREQOS_2_5,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x5078++0x3
line.long 0x0 "SDMREGIONID_2_5,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x5080++0x3
line.long 0x0 "SDMCHID_2_5,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x50B0++0x3
line.long 0x0 "SDMSEC_2_5,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x5100++0x3
line.long 0x0 "SDMCHCLR_2_5,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x5110++0x3
line.long 0x0 "SDMISTA_2_5,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x5114++0x3
line.long 0x0 "SDMADR40MODE_2_5,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x6000++0x1F
line.long 0x0 "SDMSAR_2_6,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_2_6,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_2_6,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_2_6,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_2_6,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_2_6,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_2_6,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_2_6,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x6028++0x3
line.long 0x0 "SDMTSR_2_6,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x6038++0x3
line.long 0x0 "SDMTSRB_2_6,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x6040++0x1
line.word 0x0 "SDMRS_2_6,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x6048++0x3
line.long 0x0 "SDMBUFCR_2_6,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x6050++0x13
line.long 0x0 "SDMDPBASE_2_6,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_2_6,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_2_6,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_2_6,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_2_6,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x6064++0x3
line.long 0x0 "SDMDREQOS_2_6,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x6078++0x3
line.long 0x0 "SDMREGIONID_2_6,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x6080++0x3
line.long 0x0 "SDMCHID_2_6,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x60B0++0x3
line.long 0x0 "SDMSEC_2_6,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x6100++0x3
line.long 0x0 "SDMCHCLR_2_6,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x6110++0x3
line.long 0x0 "SDMISTA_2_6,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x6114++0x3
line.long 0x0 "SDMADR40MODE_2_6,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
group.long 0x7000++0x1F
line.long 0x0 "SDMSAR_2_7,SAR is 32-bit readable/writable register that specify the source address of a DMA transfer. During a DMA transfer. this register indicates the next source address."
hexmask.long 0x0 0.--31. 1. "SAR_31_0,the source address of a DMA transfer. During a DMA transfer  this register indicates the next source address."
line.long 0x4 "SDMDAR_2_7,DAR is 32-bit readable/writable register that specify the destination address of a DMA transfer. During a DMA transfer. this register indicates the next destination address."
hexmask.long 0x4 0.--31. 1. "DAR_31_0,the destination address of a DMA transfer. During a DMA transfer  this register indicates the next destination address."
line.long 0x8 "SDMTCR_2_7,TCR register is 32-bit readable/writable register that specify the number of times of DMA transfer. The number of times of DMA transfer is 1 when the setting is H'0000 0001. 16.777.215 when H'00FF FFFF is set (the maximum). During a DMA.."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x8 0.--23. 1. "TCR_23_0,SYS-DMAC includes DATA buffer and Read/Write are behaving independently. Therefore  Read transfer counter and Write transfer counter represent the different value. This register indicates the read transfer counter value."
line.long 0xC "SDMCHCR_2_7,CHCR register is 32-bit readable/writable register that controls the DMA transfer mode."
bitfld.long 0xC 31. "CAE,Address error flag" "0,1"
bitfld.long 0xC 30. "CAIE,Channel address error interrupt enable" "0: Interrupt request disabled,1: Interrupt request enabled"
newline
bitfld.long 0xC 28.--29. "DPM_1_0,Descriptor operating mode" "0: disable,1: enable,?,?"
hexmask.long.byte 0xC 24.--27. 1. "RPT_3_0,Descriptor Setting Update"
newline
rbitfld.long 0xC 23. "WAIT,Descriptor WAIT status" "0: Normal Processing,1: WAIT/Suspend"
bitfld.long 0xC 22. "DPB,Descriptor start bit" "0: Starts from SAR,1: Starting after Descriptor Read-out"
newline
bitfld.long 0xC 20.--21. "TS_3_2,DMA transfer size" "0: Byte units transfer,1: Word,?,?"
bitfld.long 0xC 19. "DSE,Descriptor step end" "0: DMA transfer is still running or terminated,1: Termination of one step of Descriptor"
newline
bitfld.long 0xC 18. "DSIE,Descriptor step end interrupt enable" "0: Interrupt request is disabled,1: Interrupt request is enabled"
rbitfld.long 0xC 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "DM_1_0,Destination address mode" "0: Fixed destination address,1: Destination address is incremented,?,?"
bitfld.long 0xC 12.--13. "SM_1_0,Source Address Mode" "0: Fixed source address,1: Source address is incremented,?,?"
newline
hexmask.long.byte 0xC 8.--11. 1. "RS_3_0,Resource selection"
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 3.--4. "TS_1_0,DMA transfer size" "0,1,2,3"
bitfld.long 0xC 2. "IE,Interrupt enabling" "0: Interrupt request is disabled,1: Interrupt request is enabled"
newline
bitfld.long 0xC 1. "TE,Transfer end flag" "0: During the DMA transfer or DMA transfer has been..,?"
bitfld.long 0xC 0. "DE,DMA Enable" "0,1"
line.long 0x10 "SDMFIXSAR_2_7,FIXSAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits source address of a DMA transfer."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "SAR_39_32,MSB 8-bits of the 40-bits source address of a DMA transfer."
line.long 0x14 "SDMFIXDAR_2_7,FIXDAR is 32-bit readable/writable register that specify the MSB 8-bits of the 40-bits destination address of a DMA transfer."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "DAR_39_32,MSB 8-bits of the 40-bits destination address of a DMA transfer."
line.long 0x18 "SDMTCRB_2_7,TCRB register is 32-bit readable/writable register that specify the number of times of DMA transfer."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.tbyte 0x18 0.--23. 1. "TCRB_23_0,The number of times of DMA transfer is 1 when the setting is H'0000 0001  16 777 215 when H'00FF FFFF is set (the maximum). During a DMA transfer  this register indicates the remaining number of transfer times."
line.long 0x1C "SDMCHCRB_2_7,CHCRB registers are 32-bit readable/writable registers that control the DMA transfer mode."
hexmask.long.byte 0x1C 24.--31. 1. "DCNT_7_0,Descriptor number of step"
hexmask.long.byte 0x1C 16.--23. 1. "DPTR_7_0,Descriptor pointer"
newline
bitfld.long 0x1C 15. "DRST,Descriptor reset" "0,1"
bitfld.long 0x1C 14. "DREQOSEN,DREQ Outstanding Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x1C 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "DSIEEN,Descriptor DSIE Enable" "0: DSIE setting prohibit,1: DSIE setting enable"
newline
rbitfld.long 0x1C 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x1C 8. "DTS,Descriptor Byte Size Transfer" "0: CHCR,1: Byte Size"
newline
hexmask.long.byte 0x1C 4.--7. 1. "SLM_3_0,DMA Transfer Slow Speed mode"
hexmask.long.byte 0x1C 0.--3. 1. "PRI_3_0,Channel Request Priority Setting"
group.long 0x7028++0x3
line.long 0x0 "SDMTSR_2_7,TSRS register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
rgroup.long 0x7038++0x3
line.long 0x0 "SDMTSRB_2_7,TSRB register is 32-bit readable/writable register that specify the total size of DMA transfer."
hexmask.long 0x0 0.--31. 1. "TSR_31_0,The total size of DMA transfer is 1-byte when the setting is H'0000 0001  4 294 967 295-byte when H'FFFF FFFF is set  and 4 294 967 296-byte (the maximum) when H'0000 0000 is set. During a DMA transfer  this register indicates the remaining.."
group.word 0x7040++0x1
line.word 0x0 "SDMRS_2_7,The DMRS registers are 16-bit readable/writable registers that specify the peripheral module as the source of the DMA transfer request for each channel. DMRS_0 specifies for channels 0. DMRS_1 specifies for channels 1 and so on."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.word.byte 0x0 2.--7. 1. "MID_5_0,DMA Request Source Adoption MID[5] to MID[0] (MID)"
newline
bitfld.word 0x0 0.--1. "RID_1_0,DMA Request Source Adoption RID[1] and RID[0] (RID)" "0,1,2,3"
group.long 0x7048++0x3
line.long 0x0 "SDMBUFCR_2_7,BUFCR register is 32-bit readable/writable register that controls the upper limit of buffer and burst unit to the SDRAM."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.word 0x0 16.--24. 1. "MBU_8_0,Maximum burst unit to SDRAM"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "ULB_10_0,Upper limit of buffer"
group.long 0x7050++0x13
line.long 0x0 "SDMDPBASE_2_7,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long 0x0 4.--31. 1. "DPBASE_31_4,Base address of Descriptor"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SEL,Descriptor memory selection bit" "0: Setting Prohibited,1: Built-in memory or External memory is used"
line.long 0x4 "SDMDPCR_2_7,DPCR register is 32-bit readable/writable register that controls the timing which will output descriptor read-out interruption at descriptor mode 3."
hexmask.long.byte 0x4 24.--31. 1. "DIPT_7_0,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "DIPT_11_8,DIPT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x4 8.--11. 1. "DCNT_11_8,DCNT extend to 12bits to support descriptor entries up to 4096"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "DPTR_11_8,DPTR extend to 12bits to support descriptor entries up to 4096"
line.long 0x8 "SDMDPEVTCR_2_7,DPEVTCR register is 32-bit readable/writable register that controls the event handling for descriptor processing."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "RST,Initialize event counter" "0,1"
newline
bitfld.long 0x8 6. "EXEN,Watching external event is enable" "0,1"
rbitfld.long 0x8 5. "Reserved_5,Reserved" "0,1"
newline
hexmask.long.byte 0x8 0.--4. 1. "EVTID_4_0,Select external event id"
line.long 0xC "SDMDPEVTCNT_2_7,DPEVTCNT register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "OV,Event Counter Overflow flag" "0: not overflow,1: Overflow"
newline
hexmask.long.byte 0xC 0.--6. 1. "EVTCNT_6_0,Event Counter"
line.long 0x10 "SDMFIXDPBASE_2_7,DPBASE specifies base address of Descriptor. According to this. address range of Descriptor memory is specified."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "DPBASE_39_32,Base address of Descriptor"
rgroup.long 0x7064++0x3
line.long 0x0 "SDMDREQOS_2_7,DREQOS register is 32-bit readable/writable register that specify the counter for event handling."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "DREQOS_7_0,DREQ Outstanding"
group.long 0x7078++0x3
line.long 0x0 "SDMREGIONID_2_7,REGIONID register is 32-bit readable/writable register that specify Region ID for security access."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "REGIONID,Region ID for each channel  the value will set to AR/AW USER_OUT[5:2] of MEM/BUS/PERI I/F"
rgroup.long 0x7080++0x3
line.long 0x0 "SDMCHID_2_7,CHID register is 32-bit readable register that specify CH ID."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "CHID,Current Channel ID. Value: 0~15"
group.long 0x70B0++0x3
line.long 0x0 "SDMSEC_2_7,DMSEC is a 32-bit readable/writeable register that controls the secure attribute of each channel. Only the initiator in the secure mode can change this register."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "S,Current channel secure mode setting" "0: nonsecure mode,1: secure mode"
group.long 0x7100++0x3
line.long 0x0 "SDMCHCLR_2_7,CHCLR registers are 32-bit writable registers that initialize in the channel unit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLR,All registers in the channel can be cleared by writing in these bits." "0: Ignored,1: Channel registers are cleared"
rgroup.long 0x7110++0x3
line.long 0x0 "SDMISTA_2_7,DMISTA is 32-bit readable register which indicates interrupt signal status of each channel."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "OV,Event counter overflow status of channel" "0: Event counter overflow not exist,1: Event counter overflow exist"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "I,Interrupt status of channel" "0: Interrupt not exist,1: Interrupt exist"
group.long 0x7114++0x3
line.long 0x0 "SDMADR40MODE_2_7,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ADR40,Address 40bit mode enable" "0: Legacy 32-bit address,1: 40-bit address"
tree.end
tree.end
tree "DOC (Display Output Checker)"
base ad:0xFEBA0000
rgroup.long 0x0++0x3
line.long 0x0 "DOC0STR,"
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
bitfld.long 0x0 24. "VOCAnACTSTR,Activity Monitor status" "0: not active,1: active"
newline
bitfld.long 0x0 23. "VOCAnE18,Parameter error" "0,1"
bitfld.long 0x0 22. "VOCAnVOCSTR,VOC monitor status" "0: Video Output Monitor not active in current video..,1: Video Output Monitor active in current video.."
newline
hexmask.long.byte 0x0 18.--21. 1. "VOCAnSELMON,Monitor number of the current video channel frame"
bitfld.long 0x0 17. "VOCAnE17,Activity Monitor of video channel 1 error" "0: no error occurred,1: error occurred*1"
newline
bitfld.long 0x0 16. "VOCAnE16,Activity Monitor of video channel 0 error" "0: no error occurred,1: error occurred*1"
hexmask.long.word 0x0 0.--15. 1. "VOCAnEm,Video Output Monitor area m error (m=15-0)"
group.long 0x4++0xF
line.long 0x0 "DOC0CTL,"
bitfld.long 0x0 31. "VOCAnMKVOC,Video Output Monitor error detection mode" "0: continuous mode: after detection of an area m..,1: stop mode: after detection of the first area m.."
bitfld.long 0x0 30. "VOCAnMKINT,Interrupt masking" "0: DOC0,1: DOC0"
newline
bitfld.long 0x0 29. "VOCAnSRST,Software reset" "0: software reset released,1: software reset active"
hexmask.long.word 0x0 19.--28. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x0 18. "VOCAnCL18,Parameter error clear" "0: sets VOCSnCL18 = 0,1: clear DOC0STR"
bitfld.long 0x0 17. "VOCAnCL17,Activity Monitor of video channel 0 error flag clear" "0: sets VOCSnCL17 = 0,1: clear DOC0STR"
newline
bitfld.long 0x0 16. "VOCAnCL16,Activity Monitor of video channel 1 error flag clear" "0: sets VOCSnCL16 = 0,1: clear DOC0STR"
hexmask.long.word 0x0 0.--15. 1. "VOCAnCLm,Video Output Monitor m error flag clear (m=15-0)"
line.long 0x4 "DOC0EN,"
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x4 16. "VOCAnEN16,Enable/disable Activity Monitors" "0: Activity Monitors disabled,1: Activity Monitors enabled"
newline
hexmask.long.word 0x4 0.--15. 1. "VOCAnENm,Enable/disable Video Output Monitor m (m=15-0)"
line.long 0x8 "DOC0CH,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "VOCAnCHm,Video channel assignment to Video Output Monitor m (m=15-0)"
line.long 0xC "DOC0TIME0,"
hexmask.long.byte 0xC 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0xC 16.--27. 1. "VOCAnMAX0,Assign upper detection time for Activity Monitor (0~125.1ms)"
newline
hexmask.long.byte 0xC 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.word 0xC 0.--11. 1. "VOCAnMIN0,Assign upper detection time for Activity Monitor (0~125.1ms)"
group.long 0x20++0x3
line.long 0x0 "DOC0OFFS0,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x0 16.--27. 1. "VOCAnHOFFS0,Horizontal back porch offset of video channel 0 in pixels"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "VOCAnVOFFS0,Vertical back porch offset of video channel 0 in lines"
group.long 0x28++0x3
line.long 0x0 "DOC0DISP0,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x0 16.--27. 1. "VOCAnHSIZE0,Horizontal size of the video channel 0 image in pixels"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "VOCAnVSIZE0,Vertical size of the video channel 0 image in pixels"
group.long 0x30++0x3
line.long 0x0 "DOC0ACT0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "VOCAnVOUT0,Video channel 0 availability selection" "0: Video channel 0 is not available,1: Video channel 0 is available"
rgroup.long 0x40++0x3
line.long 0x0 "DOC0DIFF,"
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0x0 0.--17. 1. "VOCAnDIFF,Last discriminator value"
group.long 0x60++0x3
line.long 0x0 "DOC0YCMODE0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0x0 2.--3. "SEL_PARAM," "0: BT601 Extension type,1: BT601 Compressed type,2: BT709 Extension type,3: BT709 Compressed type"
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0x100++0xFFF
line.long 0x0 "DOC0M0CFG0,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x0 16.--27. 1. "VOCAnMmHSTRT,Video Output Monitor m area horizontal start point in pixels.(m=15-0)"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "VOCAnMmVSTRT,Video Output Monitor m area vertical start point in pixels.(m=15-0)"
line.long 0x4 "DOC0M0CFG1,"
hexmask.long.byte 0x4 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x4 16.--23. 1. "VOCAnMmHSIZE,Video Output Monitor m area horizontal size in pixels.(m=15-0)"
newline
hexmask.long.byte 0x4 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "VOCAnMmVSIZE,Video Output Monitor m area vertical size in pixels.(m=15-0)"
line.long 0x8 "DOC0M0CFG2,"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x8 0.--13. 1. "VOCAnMmADDR,Video Output Monitor m reference RAM start address.(m=15-0)"
line.long 0xC "DOC0M0CFG3,"
hexmask.long.word 0xC 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0xC 0.--17. 1. "VOCAnMmTHSH,Video Output Monitor m acceptance threshold.(m=15-0)"
line.long 0x10 "DOC0M0CFG4,"
hexmask.long.byte 0x10 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x10 24.--27. 1. "VOCAnMmRUP0,Video Output Monitor m reference color 0: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x10 20.--23. 1. "VOCAnMmGUP0,Video Output Monitor m reference color 0: green upper limit.(m=15-0)"
hexmask.long.byte 0x10 16.--19. 1. "VOCAnMmBUP0,Video Output Monitor m reference color 0: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x10 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x10 8.--11. 1. "VOCAnMmRLO0,Video Output Monitor m reference color 0: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x10 4.--7. 1. "VOCAnMmGLO0,Video Output Monitor m reference color 0: green lower limit.(m=15-0)"
hexmask.long.byte 0x10 0.--3. 1. "VOCAnMmBLO0,Video Output Monitor m reference color 0: blue lower limit.(m=15-0)"
line.long 0x14 "DOC0M0CFG5,"
hexmask.long.byte 0x14 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x14 24.--27. 1. "VOCAnMmRUP1,Video Output Monitor m reference color 1: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x14 20.--23. 1. "VOCAnMmGUP1,Video Output Monitor m reference color 1: green upper limit.(m=15-0)"
hexmask.long.byte 0x14 16.--19. 1. "VOCAnMmBUP1,Video Output Monitor m reference color 1: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x14 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x14 8.--11. 1. "VOCAnMmRLO1,Video Output Monitor m reference color 1: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x14 4.--7. 1. "VOCAnMmGLO1,Video Output Monitor m reference color 1: green lower limit.(m=15-0)"
hexmask.long.byte 0x14 0.--3. 1. "VOCAnMmBLO1,Video Output Monitor m reference color 1: blue lower limit.(m=15-0)"
line.long 0x18 "DOC0M0CFG6,"
hexmask.long.byte 0x18 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x18 24.--27. 1. "VOCAnMmRUP2,Video Output Monitor m reference color 2: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x18 20.--23. 1. "VOCAnMmGUP2,Video Output Monitor m reference color 2: green upper limit.(m=15-0)"
hexmask.long.byte 0x18 16.--19. 1. "VOCAnMmBUP2,Video Output Monitor m reference color 2: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x18 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x18 8.--11. 1. "VOCAnMmRLO2,Video Output Monitor m reference color 2: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x18 4.--7. 1. "VOCAnMmGLO2,Video Output Monitor m reference color 2: green lower limit.(m=15-0)"
hexmask.long.byte 0x18 0.--3. 1. "VOCAnMmBLO2,Video Output Monitor m reference color 2: blue lower limit.(m=15-0)"
line.long 0x1C "DOC0M0CFG7,"
hexmask.long.byte 0x1C 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x1C 24.--27. 1. "VOCAnMmRUP3,Video Output Monitor m reference color 3: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1C 20.--23. 1. "VOCAnMmGUP3,Video Output Monitor m reference color 3: green upper limit.(m=15-0)"
hexmask.long.byte 0x1C 16.--19. 1. "VOCAnMmBUP3,Video Output Monitor m reference color 3: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1C 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x1C 8.--11. 1. "VOCAnMmRLO3,Video Output Monitor m reference color 3: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x1C 4.--7. 1. "VOCAnMmGLO3,Video Output Monitor m reference color 3: green lower limit.(m=15-0)"
hexmask.long.byte 0x1C 0.--3. 1. "VOCAnMmBLO3,Video Output Monitor m reference color 3: blue lower limit.(m=15-0)"
line.long 0x20 "DOC0M1CFG0,"
hexmask.long.byte 0x20 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x20 16.--27. 1. "VOCAnMmHSTRT,Video Output Monitor m area horizontal start point in pixels.(m=15-0)"
newline
hexmask.long.byte 0x20 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x20 0.--10. 1. "VOCAnMmVSTRT,Video Output Monitor m area vertical start point in pixels.(m=15-0)"
line.long 0x24 "DOC0M1CFG1,"
hexmask.long.byte 0x24 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x24 16.--23. 1. "VOCAnMmHSIZE,Video Output Monitor m area horizontal size in pixels.(m=15-0)"
newline
hexmask.long.byte 0x24 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24 0.--7. 1. "VOCAnMmVSIZE,Video Output Monitor m area vertical size in pixels.(m=15-0)"
line.long 0x28 "DOC0M1CFG2,"
hexmask.long.tbyte 0x28 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x28 0.--13. 1. "VOCAnMmADDR,Video Output Monitor m reference RAM start address.(m=15-0)"
line.long 0x2C "DOC0M1CFG3,"
hexmask.long.word 0x2C 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0x2C 0.--17. 1. "VOCAnMmTHSH,Video Output Monitor m acceptance threshold.(m=15-0)"
line.long 0x30 "DOC0M1CFG4,"
hexmask.long.byte 0x30 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x30 24.--27. 1. "VOCAnMmRUP0,Video Output Monitor m reference color 0: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x30 20.--23. 1. "VOCAnMmGUP0,Video Output Monitor m reference color 0: green upper limit.(m=15-0)"
hexmask.long.byte 0x30 16.--19. 1. "VOCAnMmBUP0,Video Output Monitor m reference color 0: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x30 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x30 8.--11. 1. "VOCAnMmRLO0,Video Output Monitor m reference color 0: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x30 4.--7. 1. "VOCAnMmGLO0,Video Output Monitor m reference color 0: green lower limit.(m=15-0)"
hexmask.long.byte 0x30 0.--3. 1. "VOCAnMmBLO0,Video Output Monitor m reference color 0: blue lower limit.(m=15-0)"
line.long 0x34 "DOC0M1CFG5,"
hexmask.long.byte 0x34 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x34 24.--27. 1. "VOCAnMmRUP1,Video Output Monitor m reference color 1: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x34 20.--23. 1. "VOCAnMmGUP1,Video Output Monitor m reference color 1: green upper limit.(m=15-0)"
hexmask.long.byte 0x34 16.--19. 1. "VOCAnMmBUP1,Video Output Monitor m reference color 1: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x34 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x34 8.--11. 1. "VOCAnMmRLO1,Video Output Monitor m reference color 1: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x34 4.--7. 1. "VOCAnMmGLO1,Video Output Monitor m reference color 1: green lower limit.(m=15-0)"
hexmask.long.byte 0x34 0.--3. 1. "VOCAnMmBLO1,Video Output Monitor m reference color 1: blue lower limit.(m=15-0)"
line.long 0x38 "DOC0M1CFG6,"
hexmask.long.byte 0x38 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x38 24.--27. 1. "VOCAnMmRUP2,Video Output Monitor m reference color 2: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x38 20.--23. 1. "VOCAnMmGUP2,Video Output Monitor m reference color 2: green upper limit.(m=15-0)"
hexmask.long.byte 0x38 16.--19. 1. "VOCAnMmBUP2,Video Output Monitor m reference color 2: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x38 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x38 8.--11. 1. "VOCAnMmRLO2,Video Output Monitor m reference color 2: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x38 4.--7. 1. "VOCAnMmGLO2,Video Output Monitor m reference color 2: green lower limit.(m=15-0)"
hexmask.long.byte 0x38 0.--3. 1. "VOCAnMmBLO2,Video Output Monitor m reference color 2: blue lower limit.(m=15-0)"
line.long 0x3C "DOC0M1CFG7,"
hexmask.long.byte 0x3C 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x3C 24.--27. 1. "VOCAnMmRUP3,Video Output Monitor m reference color 3: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x3C 20.--23. 1. "VOCAnMmGUP3,Video Output Monitor m reference color 3: green upper limit.(m=15-0)"
hexmask.long.byte 0x3C 16.--19. 1. "VOCAnMmBUP3,Video Output Monitor m reference color 3: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x3C 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x3C 8.--11. 1. "VOCAnMmRLO3,Video Output Monitor m reference color 3: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x3C 4.--7. 1. "VOCAnMmGLO3,Video Output Monitor m reference color 3: green lower limit.(m=15-0)"
hexmask.long.byte 0x3C 0.--3. 1. "VOCAnMmBLO3,Video Output Monitor m reference color 3: blue lower limit.(m=15-0)"
line.long 0x40 "DOC0M2CFG0,"
hexmask.long.byte 0x40 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x40 16.--27. 1. "VOCAnMmHSTRT,Video Output Monitor m area horizontal start point in pixels.(m=15-0)"
newline
hexmask.long.byte 0x40 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x40 0.--10. 1. "VOCAnMmVSTRT,Video Output Monitor m area vertical start point in pixels.(m=15-0)"
line.long 0x44 "DOC0M2CFG1,"
hexmask.long.byte 0x44 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x44 16.--23. 1. "VOCAnMmHSIZE,Video Output Monitor m area horizontal size in pixels.(m=15-0)"
newline
hexmask.long.byte 0x44 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x44 0.--7. 1. "VOCAnMmVSIZE,Video Output Monitor m area vertical size in pixels.(m=15-0)"
line.long 0x48 "DOC0M2CFG2,"
hexmask.long.tbyte 0x48 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x48 0.--13. 1. "VOCAnMmADDR,Video Output Monitor m reference RAM start address.(m=15-0)"
line.long 0x4C "DOC0M2CFG3,"
hexmask.long.word 0x4C 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0x4C 0.--17. 1. "VOCAnMmTHSH,Video Output Monitor m acceptance threshold.(m=15-0)"
line.long 0x50 "DOC0M2CFG4,"
hexmask.long.byte 0x50 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x50 24.--27. 1. "VOCAnMmRUP0,Video Output Monitor m reference color 0: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x50 20.--23. 1. "VOCAnMmGUP0,Video Output Monitor m reference color 0: green upper limit.(m=15-0)"
hexmask.long.byte 0x50 16.--19. 1. "VOCAnMmBUP0,Video Output Monitor m reference color 0: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x50 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x50 8.--11. 1. "VOCAnMmRLO0,Video Output Monitor m reference color 0: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x50 4.--7. 1. "VOCAnMmGLO0,Video Output Monitor m reference color 0: green lower limit.(m=15-0)"
hexmask.long.byte 0x50 0.--3. 1. "VOCAnMmBLO0,Video Output Monitor m reference color 0: blue lower limit.(m=15-0)"
line.long 0x54 "DOC0M2CFG5,"
hexmask.long.byte 0x54 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x54 24.--27. 1. "VOCAnMmRUP1,Video Output Monitor m reference color 1: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x54 20.--23. 1. "VOCAnMmGUP1,Video Output Monitor m reference color 1: green upper limit.(m=15-0)"
hexmask.long.byte 0x54 16.--19. 1. "VOCAnMmBUP1,Video Output Monitor m reference color 1: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x54 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x54 8.--11. 1. "VOCAnMmRLO1,Video Output Monitor m reference color 1: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x54 4.--7. 1. "VOCAnMmGLO1,Video Output Monitor m reference color 1: green lower limit.(m=15-0)"
hexmask.long.byte 0x54 0.--3. 1. "VOCAnMmBLO1,Video Output Monitor m reference color 1: blue lower limit.(m=15-0)"
line.long 0x58 "DOC0M2CFG6,"
hexmask.long.byte 0x58 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x58 24.--27. 1. "VOCAnMmRUP2,Video Output Monitor m reference color 2: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x58 20.--23. 1. "VOCAnMmGUP2,Video Output Monitor m reference color 2: green upper limit.(m=15-0)"
hexmask.long.byte 0x58 16.--19. 1. "VOCAnMmBUP2,Video Output Monitor m reference color 2: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x58 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x58 8.--11. 1. "VOCAnMmRLO2,Video Output Monitor m reference color 2: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x58 4.--7. 1. "VOCAnMmGLO2,Video Output Monitor m reference color 2: green lower limit.(m=15-0)"
hexmask.long.byte 0x58 0.--3. 1. "VOCAnMmBLO2,Video Output Monitor m reference color 2: blue lower limit.(m=15-0)"
line.long 0x5C "DOC0M2CFG7,"
hexmask.long.byte 0x5C 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x5C 24.--27. 1. "VOCAnMmRUP3,Video Output Monitor m reference color 3: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x5C 20.--23. 1. "VOCAnMmGUP3,Video Output Monitor m reference color 3: green upper limit.(m=15-0)"
hexmask.long.byte 0x5C 16.--19. 1. "VOCAnMmBUP3,Video Output Monitor m reference color 3: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x5C 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x5C 8.--11. 1. "VOCAnMmRLO3,Video Output Monitor m reference color 3: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x5C 4.--7. 1. "VOCAnMmGLO3,Video Output Monitor m reference color 3: green lower limit.(m=15-0)"
hexmask.long.byte 0x5C 0.--3. 1. "VOCAnMmBLO3,Video Output Monitor m reference color 3: blue lower limit.(m=15-0)"
line.long 0x60 "DOC0M3CFG0,"
hexmask.long.byte 0x60 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x60 16.--27. 1. "VOCAnMmHSTRT,Video Output Monitor m area horizontal start point in pixels.(m=15-0)"
newline
hexmask.long.byte 0x60 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x60 0.--10. 1. "VOCAnMmVSTRT,Video Output Monitor m area vertical start point in pixels.(m=15-0)"
line.long 0x64 "DOC0M3CFG1,"
hexmask.long.byte 0x64 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x64 16.--23. 1. "VOCAnMmHSIZE,Video Output Monitor m area horizontal size in pixels.(m=15-0)"
newline
hexmask.long.byte 0x64 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x64 0.--7. 1. "VOCAnMmVSIZE,Video Output Monitor m area vertical size in pixels.(m=15-0)"
line.long 0x68 "DOC0M3CFG2,"
hexmask.long.tbyte 0x68 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x68 0.--13. 1. "VOCAnMmADDR,Video Output Monitor m reference RAM start address.(m=15-0)"
line.long 0x6C "DOC0M3CFG3,"
hexmask.long.word 0x6C 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0x6C 0.--17. 1. "VOCAnMmTHSH,Video Output Monitor m acceptance threshold.(m=15-0)"
line.long 0x70 "DOC0M3CFG4,"
hexmask.long.byte 0x70 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x70 24.--27. 1. "VOCAnMmRUP0,Video Output Monitor m reference color 0: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x70 20.--23. 1. "VOCAnMmGUP0,Video Output Monitor m reference color 0: green upper limit.(m=15-0)"
hexmask.long.byte 0x70 16.--19. 1. "VOCAnMmBUP0,Video Output Monitor m reference color 0: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x70 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x70 8.--11. 1. "VOCAnMmRLO0,Video Output Monitor m reference color 0: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x70 4.--7. 1. "VOCAnMmGLO0,Video Output Monitor m reference color 0: green lower limit.(m=15-0)"
hexmask.long.byte 0x70 0.--3. 1. "VOCAnMmBLO0,Video Output Monitor m reference color 0: blue lower limit.(m=15-0)"
line.long 0x74 "DOC0M3CFG5,"
hexmask.long.byte 0x74 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x74 24.--27. 1. "VOCAnMmRUP1,Video Output Monitor m reference color 1: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x74 20.--23. 1. "VOCAnMmGUP1,Video Output Monitor m reference color 1: green upper limit.(m=15-0)"
hexmask.long.byte 0x74 16.--19. 1. "VOCAnMmBUP1,Video Output Monitor m reference color 1: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x74 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x74 8.--11. 1. "VOCAnMmRLO1,Video Output Monitor m reference color 1: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x74 4.--7. 1. "VOCAnMmGLO1,Video Output Monitor m reference color 1: green lower limit.(m=15-0)"
hexmask.long.byte 0x74 0.--3. 1. "VOCAnMmBLO1,Video Output Monitor m reference color 1: blue lower limit.(m=15-0)"
line.long 0x78 "DOC0M3CFG6,"
hexmask.long.byte 0x78 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x78 24.--27. 1. "VOCAnMmRUP2,Video Output Monitor m reference color 2: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x78 20.--23. 1. "VOCAnMmGUP2,Video Output Monitor m reference color 2: green upper limit.(m=15-0)"
hexmask.long.byte 0x78 16.--19. 1. "VOCAnMmBUP2,Video Output Monitor m reference color 2: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x78 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x78 8.--11. 1. "VOCAnMmRLO2,Video Output Monitor m reference color 2: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x78 4.--7. 1. "VOCAnMmGLO2,Video Output Monitor m reference color 2: green lower limit.(m=15-0)"
hexmask.long.byte 0x78 0.--3. 1. "VOCAnMmBLO2,Video Output Monitor m reference color 2: blue lower limit.(m=15-0)"
line.long 0x7C "DOC0M3CFG7,"
hexmask.long.byte 0x7C 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x7C 24.--27. 1. "VOCAnMmRUP3,Video Output Monitor m reference color 3: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x7C 20.--23. 1. "VOCAnMmGUP3,Video Output Monitor m reference color 3: green upper limit.(m=15-0)"
hexmask.long.byte 0x7C 16.--19. 1. "VOCAnMmBUP3,Video Output Monitor m reference color 3: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x7C 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x7C 8.--11. 1. "VOCAnMmRLO3,Video Output Monitor m reference color 3: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x7C 4.--7. 1. "VOCAnMmGLO3,Video Output Monitor m reference color 3: green lower limit.(m=15-0)"
hexmask.long.byte 0x7C 0.--3. 1. "VOCAnMmBLO3,Video Output Monitor m reference color 3: blue lower limit.(m=15-0)"
line.long 0x80 "DOC0M4CFG0,"
hexmask.long.byte 0x80 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x80 16.--27. 1. "VOCAnMmHSTRT,Video Output Monitor m area horizontal start point in pixels.(m=15-0)"
newline
hexmask.long.byte 0x80 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x80 0.--10. 1. "VOCAnMmVSTRT,Video Output Monitor m area vertical start point in pixels.(m=15-0)"
line.long 0x84 "DOC0M4CFG1,"
hexmask.long.byte 0x84 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x84 16.--23. 1. "VOCAnMmHSIZE,Video Output Monitor m area horizontal size in pixels.(m=15-0)"
newline
hexmask.long.byte 0x84 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x84 0.--7. 1. "VOCAnMmVSIZE,Video Output Monitor m area vertical size in pixels.(m=15-0)"
line.long 0x88 "DOC0M4CFG2,"
hexmask.long.tbyte 0x88 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x88 0.--13. 1. "VOCAnMmADDR,Video Output Monitor m reference RAM start address.(m=15-0)"
line.long 0x8C "DOC0M4CFG3,"
hexmask.long.word 0x8C 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0x8C 0.--17. 1. "VOCAnMmTHSH,Video Output Monitor m acceptance threshold.(m=15-0)"
line.long 0x90 "DOC0M4CFG4,"
hexmask.long.byte 0x90 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x90 24.--27. 1. "VOCAnMmRUP0,Video Output Monitor m reference color 0: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x90 20.--23. 1. "VOCAnMmGUP0,Video Output Monitor m reference color 0: green upper limit.(m=15-0)"
hexmask.long.byte 0x90 16.--19. 1. "VOCAnMmBUP0,Video Output Monitor m reference color 0: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x90 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x90 8.--11. 1. "VOCAnMmRLO0,Video Output Monitor m reference color 0: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x90 4.--7. 1. "VOCAnMmGLO0,Video Output Monitor m reference color 0: green lower limit.(m=15-0)"
hexmask.long.byte 0x90 0.--3. 1. "VOCAnMmBLO0,Video Output Monitor m reference color 0: blue lower limit.(m=15-0)"
line.long 0x94 "DOC0M4CFG5,"
hexmask.long.byte 0x94 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x94 24.--27. 1. "VOCAnMmRUP1,Video Output Monitor m reference color 1: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x94 20.--23. 1. "VOCAnMmGUP1,Video Output Monitor m reference color 1: green upper limit.(m=15-0)"
hexmask.long.byte 0x94 16.--19. 1. "VOCAnMmBUP1,Video Output Monitor m reference color 1: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x94 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x94 8.--11. 1. "VOCAnMmRLO1,Video Output Monitor m reference color 1: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x94 4.--7. 1. "VOCAnMmGLO1,Video Output Monitor m reference color 1: green lower limit.(m=15-0)"
hexmask.long.byte 0x94 0.--3. 1. "VOCAnMmBLO1,Video Output Monitor m reference color 1: blue lower limit.(m=15-0)"
line.long 0x98 "DOC0M4CFG6,"
hexmask.long.byte 0x98 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x98 24.--27. 1. "VOCAnMmRUP2,Video Output Monitor m reference color 2: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x98 20.--23. 1. "VOCAnMmGUP2,Video Output Monitor m reference color 2: green upper limit.(m=15-0)"
hexmask.long.byte 0x98 16.--19. 1. "VOCAnMmBUP2,Video Output Monitor m reference color 2: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x98 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x98 8.--11. 1. "VOCAnMmRLO2,Video Output Monitor m reference color 2: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x98 4.--7. 1. "VOCAnMmGLO2,Video Output Monitor m reference color 2: green lower limit.(m=15-0)"
hexmask.long.byte 0x98 0.--3. 1. "VOCAnMmBLO2,Video Output Monitor m reference color 2: blue lower limit.(m=15-0)"
line.long 0x9C "DOC0M4CFG7,"
hexmask.long.byte 0x9C 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x9C 24.--27. 1. "VOCAnMmRUP3,Video Output Monitor m reference color 3: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x9C 20.--23. 1. "VOCAnMmGUP3,Video Output Monitor m reference color 3: green upper limit.(m=15-0)"
hexmask.long.byte 0x9C 16.--19. 1. "VOCAnMmBUP3,Video Output Monitor m reference color 3: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x9C 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x9C 8.--11. 1. "VOCAnMmRLO3,Video Output Monitor m reference color 3: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x9C 4.--7. 1. "VOCAnMmGLO3,Video Output Monitor m reference color 3: green lower limit.(m=15-0)"
hexmask.long.byte 0x9C 0.--3. 1. "VOCAnMmBLO3,Video Output Monitor m reference color 3: blue lower limit.(m=15-0)"
line.long 0xA0 "DOC0M5CFG0,"
hexmask.long.byte 0xA0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0xA0 16.--27. 1. "VOCAnMmHSTRT,Video Output Monitor m area horizontal start point in pixels.(m=15-0)"
newline
hexmask.long.byte 0xA0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0xA0 0.--10. 1. "VOCAnMmVSTRT,Video Output Monitor m area vertical start point in pixels.(m=15-0)"
line.long 0xA4 "DOC0M5CFG1,"
hexmask.long.byte 0xA4 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0xA4 16.--23. 1. "VOCAnMmHSIZE,Video Output Monitor m area horizontal size in pixels.(m=15-0)"
newline
hexmask.long.byte 0xA4 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA4 0.--7. 1. "VOCAnMmVSIZE,Video Output Monitor m area vertical size in pixels.(m=15-0)"
line.long 0xA8 "DOC0M5CFG2,"
hexmask.long.tbyte 0xA8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0xA8 0.--13. 1. "VOCAnMmADDR,Video Output Monitor m reference RAM start address.(m=15-0)"
line.long 0xAC "DOC0M5CFG3,"
hexmask.long.word 0xAC 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0xAC 0.--17. 1. "VOCAnMmTHSH,Video Output Monitor m acceptance threshold.(m=15-0)"
line.long 0xB0 "DOC0M5CFG4,"
hexmask.long.byte 0xB0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0xB0 24.--27. 1. "VOCAnMmRUP0,Video Output Monitor m reference color 0: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0xB0 20.--23. 1. "VOCAnMmGUP0,Video Output Monitor m reference color 0: green upper limit.(m=15-0)"
hexmask.long.byte 0xB0 16.--19. 1. "VOCAnMmBUP0,Video Output Monitor m reference color 0: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0xB0 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0xB0 8.--11. 1. "VOCAnMmRLO0,Video Output Monitor m reference color 0: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0xB0 4.--7. 1. "VOCAnMmGLO0,Video Output Monitor m reference color 0: green lower limit.(m=15-0)"
hexmask.long.byte 0xB0 0.--3. 1. "VOCAnMmBLO0,Video Output Monitor m reference color 0: blue lower limit.(m=15-0)"
line.long 0xB4 "DOC0M5CFG5,"
hexmask.long.byte 0xB4 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0xB4 24.--27. 1. "VOCAnMmRUP1,Video Output Monitor m reference color 1: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0xB4 20.--23. 1. "VOCAnMmGUP1,Video Output Monitor m reference color 1: green upper limit.(m=15-0)"
hexmask.long.byte 0xB4 16.--19. 1. "VOCAnMmBUP1,Video Output Monitor m reference color 1: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0xB4 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0xB4 8.--11. 1. "VOCAnMmRLO1,Video Output Monitor m reference color 1: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0xB4 4.--7. 1. "VOCAnMmGLO1,Video Output Monitor m reference color 1: green lower limit.(m=15-0)"
hexmask.long.byte 0xB4 0.--3. 1. "VOCAnMmBLO1,Video Output Monitor m reference color 1: blue lower limit.(m=15-0)"
line.long 0xB8 "DOC0M5CFG6,"
hexmask.long.byte 0xB8 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0xB8 24.--27. 1. "VOCAnMmRUP2,Video Output Monitor m reference color 2: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0xB8 20.--23. 1. "VOCAnMmGUP2,Video Output Monitor m reference color 2: green upper limit.(m=15-0)"
hexmask.long.byte 0xB8 16.--19. 1. "VOCAnMmBUP2,Video Output Monitor m reference color 2: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0xB8 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0xB8 8.--11. 1. "VOCAnMmRLO2,Video Output Monitor m reference color 2: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0xB8 4.--7. 1. "VOCAnMmGLO2,Video Output Monitor m reference color 2: green lower limit.(m=15-0)"
hexmask.long.byte 0xB8 0.--3. 1. "VOCAnMmBLO2,Video Output Monitor m reference color 2: blue lower limit.(m=15-0)"
line.long 0xBC "DOC0M5CFG7,"
hexmask.long.byte 0xBC 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0xBC 24.--27. 1. "VOCAnMmRUP3,Video Output Monitor m reference color 3: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0xBC 20.--23. 1. "VOCAnMmGUP3,Video Output Monitor m reference color 3: green upper limit.(m=15-0)"
hexmask.long.byte 0xBC 16.--19. 1. "VOCAnMmBUP3,Video Output Monitor m reference color 3: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0xBC 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0xBC 8.--11. 1. "VOCAnMmRLO3,Video Output Monitor m reference color 3: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0xBC 4.--7. 1. "VOCAnMmGLO3,Video Output Monitor m reference color 3: green lower limit.(m=15-0)"
hexmask.long.byte 0xBC 0.--3. 1. "VOCAnMmBLO3,Video Output Monitor m reference color 3: blue lower limit.(m=15-0)"
line.long 0xC0 "DOC0M6CFG0,"
hexmask.long.byte 0xC0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0xC0 16.--27. 1. "VOCAnMmHSTRT,Video Output Monitor m area horizontal start point in pixels.(m=15-0)"
newline
hexmask.long.byte 0xC0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0xC0 0.--10. 1. "VOCAnMmVSTRT,Video Output Monitor m area vertical start point in pixels.(m=15-0)"
line.long 0xC4 "DOC0M6CFG1,"
hexmask.long.byte 0xC4 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0xC4 16.--23. 1. "VOCAnMmHSIZE,Video Output Monitor m area horizontal size in pixels.(m=15-0)"
newline
hexmask.long.byte 0xC4 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC4 0.--7. 1. "VOCAnMmVSIZE,Video Output Monitor m area vertical size in pixels.(m=15-0)"
line.long 0xC8 "DOC0M6CFG2,"
hexmask.long.tbyte 0xC8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0xC8 0.--13. 1. "VOCAnMmADDR,Video Output Monitor m reference RAM start address.(m=15-0)"
line.long 0xCC "DOC0M6CFG3,"
hexmask.long.word 0xCC 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0xCC 0.--17. 1. "VOCAnMmTHSH,Video Output Monitor m acceptance threshold.(m=15-0)"
line.long 0xD0 "DOC0M6CFG4,"
hexmask.long.byte 0xD0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0xD0 24.--27. 1. "VOCAnMmRUP0,Video Output Monitor m reference color 0: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0xD0 20.--23. 1. "VOCAnMmGUP0,Video Output Monitor m reference color 0: green upper limit.(m=15-0)"
hexmask.long.byte 0xD0 16.--19. 1. "VOCAnMmBUP0,Video Output Monitor m reference color 0: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0xD0 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0xD0 8.--11. 1. "VOCAnMmRLO0,Video Output Monitor m reference color 0: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0xD0 4.--7. 1. "VOCAnMmGLO0,Video Output Monitor m reference color 0: green lower limit.(m=15-0)"
hexmask.long.byte 0xD0 0.--3. 1. "VOCAnMmBLO0,Video Output Monitor m reference color 0: blue lower limit.(m=15-0)"
line.long 0xD4 "DOC0M6CFG5,"
hexmask.long.byte 0xD4 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0xD4 24.--27. 1. "VOCAnMmRUP1,Video Output Monitor m reference color 1: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0xD4 20.--23. 1. "VOCAnMmGUP1,Video Output Monitor m reference color 1: green upper limit.(m=15-0)"
hexmask.long.byte 0xD4 16.--19. 1. "VOCAnMmBUP1,Video Output Monitor m reference color 1: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0xD4 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0xD4 8.--11. 1. "VOCAnMmRLO1,Video Output Monitor m reference color 1: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0xD4 4.--7. 1. "VOCAnMmGLO1,Video Output Monitor m reference color 1: green lower limit.(m=15-0)"
hexmask.long.byte 0xD4 0.--3. 1. "VOCAnMmBLO1,Video Output Monitor m reference color 1: blue lower limit.(m=15-0)"
line.long 0xD8 "DOC0M6CFG6,"
hexmask.long.byte 0xD8 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0xD8 24.--27. 1. "VOCAnMmRUP2,Video Output Monitor m reference color 2: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0xD8 20.--23. 1. "VOCAnMmGUP2,Video Output Monitor m reference color 2: green upper limit.(m=15-0)"
hexmask.long.byte 0xD8 16.--19. 1. "VOCAnMmBUP2,Video Output Monitor m reference color 2: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0xD8 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0xD8 8.--11. 1. "VOCAnMmRLO2,Video Output Monitor m reference color 2: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0xD8 4.--7. 1. "VOCAnMmGLO2,Video Output Monitor m reference color 2: green lower limit.(m=15-0)"
hexmask.long.byte 0xD8 0.--3. 1. "VOCAnMmBLO2,Video Output Monitor m reference color 2: blue lower limit.(m=15-0)"
line.long 0xDC "DOC0M6CFG7,"
hexmask.long.byte 0xDC 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0xDC 24.--27. 1. "VOCAnMmRUP3,Video Output Monitor m reference color 3: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0xDC 20.--23. 1. "VOCAnMmGUP3,Video Output Monitor m reference color 3: green upper limit.(m=15-0)"
hexmask.long.byte 0xDC 16.--19. 1. "VOCAnMmBUP3,Video Output Monitor m reference color 3: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0xDC 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0xDC 8.--11. 1. "VOCAnMmRLO3,Video Output Monitor m reference color 3: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0xDC 4.--7. 1. "VOCAnMmGLO3,Video Output Monitor m reference color 3: green lower limit.(m=15-0)"
hexmask.long.byte 0xDC 0.--3. 1. "VOCAnMmBLO3,Video Output Monitor m reference color 3: blue lower limit.(m=15-0)"
line.long 0xE0 "DOC0M7CFG0,"
hexmask.long.byte 0xE0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0xE0 16.--27. 1. "VOCAnMmHSTRT,Video Output Monitor m area horizontal start point in pixels.(m=15-0)"
newline
hexmask.long.byte 0xE0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0xE0 0.--10. 1. "VOCAnMmVSTRT,Video Output Monitor m area vertical start point in pixels.(m=15-0)"
line.long 0xE4 "DOC0M7CFG1,"
hexmask.long.byte 0xE4 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0xE4 16.--23. 1. "VOCAnMmHSIZE,Video Output Monitor m area horizontal size in pixels.(m=15-0)"
newline
hexmask.long.byte 0xE4 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE4 0.--7. 1. "VOCAnMmVSIZE,Video Output Monitor m area vertical size in pixels.(m=15-0)"
line.long 0xE8 "DOC0M7CFG2,"
hexmask.long.tbyte 0xE8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0xE8 0.--13. 1. "VOCAnMmADDR,Video Output Monitor m reference RAM start address.(m=15-0)"
line.long 0xEC "DOC0M7CFG3,"
hexmask.long.word 0xEC 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0xEC 0.--17. 1. "VOCAnMmTHSH,Video Output Monitor m acceptance threshold.(m=15-0)"
line.long 0xF0 "DOC0M7CFG4,"
hexmask.long.byte 0xF0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0xF0 24.--27. 1. "VOCAnMmRUP0,Video Output Monitor m reference color 0: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0xF0 20.--23. 1. "VOCAnMmGUP0,Video Output Monitor m reference color 0: green upper limit.(m=15-0)"
hexmask.long.byte 0xF0 16.--19. 1. "VOCAnMmBUP0,Video Output Monitor m reference color 0: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0xF0 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0xF0 8.--11. 1. "VOCAnMmRLO0,Video Output Monitor m reference color 0: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0xF0 4.--7. 1. "VOCAnMmGLO0,Video Output Monitor m reference color 0: green lower limit.(m=15-0)"
hexmask.long.byte 0xF0 0.--3. 1. "VOCAnMmBLO0,Video Output Monitor m reference color 0: blue lower limit.(m=15-0)"
line.long 0xF4 "DOC0M7CFG5,"
hexmask.long.byte 0xF4 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0xF4 24.--27. 1. "VOCAnMmRUP1,Video Output Monitor m reference color 1: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0xF4 20.--23. 1. "VOCAnMmGUP1,Video Output Monitor m reference color 1: green upper limit.(m=15-0)"
hexmask.long.byte 0xF4 16.--19. 1. "VOCAnMmBUP1,Video Output Monitor m reference color 1: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0xF4 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0xF4 8.--11. 1. "VOCAnMmRLO1,Video Output Monitor m reference color 1: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0xF4 4.--7. 1. "VOCAnMmGLO1,Video Output Monitor m reference color 1: green lower limit.(m=15-0)"
hexmask.long.byte 0xF4 0.--3. 1. "VOCAnMmBLO1,Video Output Monitor m reference color 1: blue lower limit.(m=15-0)"
line.long 0xF8 "DOC0M7CFG6,"
hexmask.long.byte 0xF8 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0xF8 24.--27. 1. "VOCAnMmRUP2,Video Output Monitor m reference color 2: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0xF8 20.--23. 1. "VOCAnMmGUP2,Video Output Monitor m reference color 2: green upper limit.(m=15-0)"
hexmask.long.byte 0xF8 16.--19. 1. "VOCAnMmBUP2,Video Output Monitor m reference color 2: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0xF8 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0xF8 8.--11. 1. "VOCAnMmRLO2,Video Output Monitor m reference color 2: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0xF8 4.--7. 1. "VOCAnMmGLO2,Video Output Monitor m reference color 2: green lower limit.(m=15-0)"
hexmask.long.byte 0xF8 0.--3. 1. "VOCAnMmBLO2,Video Output Monitor m reference color 2: blue lower limit.(m=15-0)"
line.long 0xFC "DOC0M7CFG7,"
hexmask.long.byte 0xFC 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0xFC 24.--27. 1. "VOCAnMmRUP3,Video Output Monitor m reference color 3: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0xFC 20.--23. 1. "VOCAnMmGUP3,Video Output Monitor m reference color 3: green upper limit.(m=15-0)"
hexmask.long.byte 0xFC 16.--19. 1. "VOCAnMmBUP3,Video Output Monitor m reference color 3: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0xFC 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0xFC 8.--11. 1. "VOCAnMmRLO3,Video Output Monitor m reference color 3: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0xFC 4.--7. 1. "VOCAnMmGLO3,Video Output Monitor m reference color 3: green lower limit.(m=15-0)"
hexmask.long.byte 0xFC 0.--3. 1. "VOCAnMmBLO3,Video Output Monitor m reference color 3: blue lower limit.(m=15-0)"
line.long 0x100 "DOC0M8CFG0,"
hexmask.long.byte 0x100 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x100 16.--27. 1. "VOCAnMmHSTRT,Video Output Monitor m area horizontal start point in pixels.(m=15-0)"
newline
hexmask.long.byte 0x100 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x100 0.--10. 1. "VOCAnMmVSTRT,Video Output Monitor m area vertical start point in pixels.(m=15-0)"
line.long 0x104 "DOC0M8CFG1,"
hexmask.long.byte 0x104 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x104 16.--23. 1. "VOCAnMmHSIZE,Video Output Monitor m area horizontal size in pixels.(m=15-0)"
newline
hexmask.long.byte 0x104 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x104 0.--7. 1. "VOCAnMmVSIZE,Video Output Monitor m area vertical size in pixels.(m=15-0)"
line.long 0x108 "DOC0M8CFG2,"
hexmask.long.tbyte 0x108 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x108 0.--13. 1. "VOCAnMmADDR,Video Output Monitor m reference RAM start address.(m=15-0)"
line.long 0x10C "DOC0M8CFG3,"
hexmask.long.word 0x10C 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0x10C 0.--17. 1. "VOCAnMmTHSH,Video Output Monitor m acceptance threshold.(m=15-0)"
line.long 0x110 "DOC0M8CFG4,"
hexmask.long.byte 0x110 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x110 24.--27. 1. "VOCAnMmRUP0,Video Output Monitor m reference color 0: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x110 20.--23. 1. "VOCAnMmGUP0,Video Output Monitor m reference color 0: green upper limit.(m=15-0)"
hexmask.long.byte 0x110 16.--19. 1. "VOCAnMmBUP0,Video Output Monitor m reference color 0: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x110 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x110 8.--11. 1. "VOCAnMmRLO0,Video Output Monitor m reference color 0: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x110 4.--7. 1. "VOCAnMmGLO0,Video Output Monitor m reference color 0: green lower limit.(m=15-0)"
hexmask.long.byte 0x110 0.--3. 1. "VOCAnMmBLO0,Video Output Monitor m reference color 0: blue lower limit.(m=15-0)"
line.long 0x114 "DOC0M8CFG5,"
hexmask.long.byte 0x114 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x114 24.--27. 1. "VOCAnMmRUP1,Video Output Monitor m reference color 1: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x114 20.--23. 1. "VOCAnMmGUP1,Video Output Monitor m reference color 1: green upper limit.(m=15-0)"
hexmask.long.byte 0x114 16.--19. 1. "VOCAnMmBUP1,Video Output Monitor m reference color 1: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x114 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x114 8.--11. 1. "VOCAnMmRLO1,Video Output Monitor m reference color 1: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x114 4.--7. 1. "VOCAnMmGLO1,Video Output Monitor m reference color 1: green lower limit.(m=15-0)"
hexmask.long.byte 0x114 0.--3. 1. "VOCAnMmBLO1,Video Output Monitor m reference color 1: blue lower limit.(m=15-0)"
line.long 0x118 "DOC0M8CFG6,"
hexmask.long.byte 0x118 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x118 24.--27. 1. "VOCAnMmRUP2,Video Output Monitor m reference color 2: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x118 20.--23. 1. "VOCAnMmGUP2,Video Output Monitor m reference color 2: green upper limit.(m=15-0)"
hexmask.long.byte 0x118 16.--19. 1. "VOCAnMmBUP2,Video Output Monitor m reference color 2: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x118 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x118 8.--11. 1. "VOCAnMmRLO2,Video Output Monitor m reference color 2: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x118 4.--7. 1. "VOCAnMmGLO2,Video Output Monitor m reference color 2: green lower limit.(m=15-0)"
hexmask.long.byte 0x118 0.--3. 1. "VOCAnMmBLO2,Video Output Monitor m reference color 2: blue lower limit.(m=15-0)"
line.long 0x11C "DOC0M8CFG7,"
hexmask.long.byte 0x11C 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x11C 24.--27. 1. "VOCAnMmRUP3,Video Output Monitor m reference color 3: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x11C 20.--23. 1. "VOCAnMmGUP3,Video Output Monitor m reference color 3: green upper limit.(m=15-0)"
hexmask.long.byte 0x11C 16.--19. 1. "VOCAnMmBUP3,Video Output Monitor m reference color 3: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x11C 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x11C 8.--11. 1. "VOCAnMmRLO3,Video Output Monitor m reference color 3: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x11C 4.--7. 1. "VOCAnMmGLO3,Video Output Monitor m reference color 3: green lower limit.(m=15-0)"
hexmask.long.byte 0x11C 0.--3. 1. "VOCAnMmBLO3,Video Output Monitor m reference color 3: blue lower limit.(m=15-0)"
line.long 0x120 "DOC0M9CFG0,"
hexmask.long.byte 0x120 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x120 16.--27. 1. "VOCAnMmHSTRT,Video Output Monitor m area horizontal start point in pixels.(m=15-0)"
newline
hexmask.long.byte 0x120 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x120 0.--10. 1. "VOCAnMmVSTRT,Video Output Monitor m area vertical start point in pixels.(m=15-0)"
line.long 0x124 "DOC0M9CFG1,"
hexmask.long.byte 0x124 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x124 16.--23. 1. "VOCAnMmHSIZE,Video Output Monitor m area horizontal size in pixels.(m=15-0)"
newline
hexmask.long.byte 0x124 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x124 0.--7. 1. "VOCAnMmVSIZE,Video Output Monitor m area vertical size in pixels.(m=15-0)"
line.long 0x128 "DOC0M9CFG2,"
hexmask.long.tbyte 0x128 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x128 0.--13. 1. "VOCAnMmADDR,Video Output Monitor m reference RAM start address.(m=15-0)"
line.long 0x12C "DOC0M9CFG3,"
hexmask.long.word 0x12C 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0x12C 0.--17. 1. "VOCAnMmTHSH,Video Output Monitor m acceptance threshold.(m=15-0)"
line.long 0x130 "DOC0M9CFG4,"
hexmask.long.byte 0x130 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x130 24.--27. 1. "VOCAnMmRUP0,Video Output Monitor m reference color 0: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x130 20.--23. 1. "VOCAnMmGUP0,Video Output Monitor m reference color 0: green upper limit.(m=15-0)"
hexmask.long.byte 0x130 16.--19. 1. "VOCAnMmBUP0,Video Output Monitor m reference color 0: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x130 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x130 8.--11. 1. "VOCAnMmRLO0,Video Output Monitor m reference color 0: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x130 4.--7. 1. "VOCAnMmGLO0,Video Output Monitor m reference color 0: green lower limit.(m=15-0)"
hexmask.long.byte 0x130 0.--3. 1. "VOCAnMmBLO0,Video Output Monitor m reference color 0: blue lower limit.(m=15-0)"
line.long 0x134 "DOC0M9CFG5,"
hexmask.long.byte 0x134 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x134 24.--27. 1. "VOCAnMmRUP1,Video Output Monitor m reference color 1: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x134 20.--23. 1. "VOCAnMmGUP1,Video Output Monitor m reference color 1: green upper limit.(m=15-0)"
hexmask.long.byte 0x134 16.--19. 1. "VOCAnMmBUP1,Video Output Monitor m reference color 1: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x134 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x134 8.--11. 1. "VOCAnMmRLO1,Video Output Monitor m reference color 1: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x134 4.--7. 1. "VOCAnMmGLO1,Video Output Monitor m reference color 1: green lower limit.(m=15-0)"
hexmask.long.byte 0x134 0.--3. 1. "VOCAnMmBLO1,Video Output Monitor m reference color 1: blue lower limit.(m=15-0)"
line.long 0x138 "DOC0M9CFG6,"
hexmask.long.byte 0x138 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x138 24.--27. 1. "VOCAnMmRUP2,Video Output Monitor m reference color 2: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x138 20.--23. 1. "VOCAnMmGUP2,Video Output Monitor m reference color 2: green upper limit.(m=15-0)"
hexmask.long.byte 0x138 16.--19. 1. "VOCAnMmBUP2,Video Output Monitor m reference color 2: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x138 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x138 8.--11. 1. "VOCAnMmRLO2,Video Output Monitor m reference color 2: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x138 4.--7. 1. "VOCAnMmGLO2,Video Output Monitor m reference color 2: green lower limit.(m=15-0)"
hexmask.long.byte 0x138 0.--3. 1. "VOCAnMmBLO2,Video Output Monitor m reference color 2: blue lower limit.(m=15-0)"
line.long 0x13C "DOC0M9CFG7,"
hexmask.long.byte 0x13C 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x13C 24.--27. 1. "VOCAnMmRUP3,Video Output Monitor m reference color 3: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x13C 20.--23. 1. "VOCAnMmGUP3,Video Output Monitor m reference color 3: green upper limit.(m=15-0)"
hexmask.long.byte 0x13C 16.--19. 1. "VOCAnMmBUP3,Video Output Monitor m reference color 3: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x13C 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x13C 8.--11. 1. "VOCAnMmRLO3,Video Output Monitor m reference color 3: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x13C 4.--7. 1. "VOCAnMmGLO3,Video Output Monitor m reference color 3: green lower limit.(m=15-0)"
hexmask.long.byte 0x13C 0.--3. 1. "VOCAnMmBLO3,Video Output Monitor m reference color 3: blue lower limit.(m=15-0)"
line.long 0x140 "DOC0M10CFG0,"
hexmask.long.byte 0x140 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x140 16.--27. 1. "VOCAnMmHSTRT,Video Output Monitor m area horizontal start point in pixels.(m=15-0)"
newline
hexmask.long.byte 0x140 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x140 0.--10. 1. "VOCAnMmVSTRT,Video Output Monitor m area vertical start point in pixels.(m=15-0)"
line.long 0x144 "DOC0M10CFG1,"
hexmask.long.byte 0x144 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x144 16.--23. 1. "VOCAnMmHSIZE,Video Output Monitor m area horizontal size in pixels.(m=15-0)"
newline
hexmask.long.byte 0x144 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x144 0.--7. 1. "VOCAnMmVSIZE,Video Output Monitor m area vertical size in pixels.(m=15-0)"
line.long 0x148 "DOC0M10CFG2,"
hexmask.long.tbyte 0x148 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x148 0.--13. 1. "VOCAnMmADDR,Video Output Monitor m reference RAM start address.(m=15-0)"
line.long 0x14C "DOC0M10CFG3,"
hexmask.long.word 0x14C 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0x14C 0.--17. 1. "VOCAnMmTHSH,Video Output Monitor m acceptance threshold.(m=15-0)"
line.long 0x150 "DOC0M10CFG4,"
hexmask.long.byte 0x150 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x150 24.--27. 1. "VOCAnMmRUP0,Video Output Monitor m reference color 0: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x150 20.--23. 1. "VOCAnMmGUP0,Video Output Monitor m reference color 0: green upper limit.(m=15-0)"
hexmask.long.byte 0x150 16.--19. 1. "VOCAnMmBUP0,Video Output Monitor m reference color 0: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x150 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x150 8.--11. 1. "VOCAnMmRLO0,Video Output Monitor m reference color 0: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x150 4.--7. 1. "VOCAnMmGLO0,Video Output Monitor m reference color 0: green lower limit.(m=15-0)"
hexmask.long.byte 0x150 0.--3. 1. "VOCAnMmBLO0,Video Output Monitor m reference color 0: blue lower limit.(m=15-0)"
line.long 0x154 "DOC0M10CFG5,"
hexmask.long.byte 0x154 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x154 24.--27. 1. "VOCAnMmRUP1,Video Output Monitor m reference color 1: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x154 20.--23. 1. "VOCAnMmGUP1,Video Output Monitor m reference color 1: green upper limit.(m=15-0)"
hexmask.long.byte 0x154 16.--19. 1. "VOCAnMmBUP1,Video Output Monitor m reference color 1: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x154 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x154 8.--11. 1. "VOCAnMmRLO1,Video Output Monitor m reference color 1: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x154 4.--7. 1. "VOCAnMmGLO1,Video Output Monitor m reference color 1: green lower limit.(m=15-0)"
hexmask.long.byte 0x154 0.--3. 1. "VOCAnMmBLO1,Video Output Monitor m reference color 1: blue lower limit.(m=15-0)"
line.long 0x158 "DOC0M10CFG6,"
hexmask.long.byte 0x158 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x158 24.--27. 1. "VOCAnMmRUP2,Video Output Monitor m reference color 2: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x158 20.--23. 1. "VOCAnMmGUP2,Video Output Monitor m reference color 2: green upper limit.(m=15-0)"
hexmask.long.byte 0x158 16.--19. 1. "VOCAnMmBUP2,Video Output Monitor m reference color 2: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x158 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x158 8.--11. 1. "VOCAnMmRLO2,Video Output Monitor m reference color 2: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x158 4.--7. 1. "VOCAnMmGLO2,Video Output Monitor m reference color 2: green lower limit.(m=15-0)"
hexmask.long.byte 0x158 0.--3. 1. "VOCAnMmBLO2,Video Output Monitor m reference color 2: blue lower limit.(m=15-0)"
line.long 0x15C "DOC0M10CFG7,"
hexmask.long.byte 0x15C 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x15C 24.--27. 1. "VOCAnMmRUP3,Video Output Monitor m reference color 3: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x15C 20.--23. 1. "VOCAnMmGUP3,Video Output Monitor m reference color 3: green upper limit.(m=15-0)"
hexmask.long.byte 0x15C 16.--19. 1. "VOCAnMmBUP3,Video Output Monitor m reference color 3: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x15C 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x15C 8.--11. 1. "VOCAnMmRLO3,Video Output Monitor m reference color 3: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x15C 4.--7. 1. "VOCAnMmGLO3,Video Output Monitor m reference color 3: green lower limit.(m=15-0)"
hexmask.long.byte 0x15C 0.--3. 1. "VOCAnMmBLO3,Video Output Monitor m reference color 3: blue lower limit.(m=15-0)"
line.long 0x160 "DOC0M11CFG0,"
hexmask.long.byte 0x160 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x160 16.--27. 1. "VOCAnMmHSTRT,Video Output Monitor m area horizontal start point in pixels.(m=15-0)"
newline
hexmask.long.byte 0x160 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x160 0.--10. 1. "VOCAnMmVSTRT,Video Output Monitor m area vertical start point in pixels.(m=15-0)"
line.long 0x164 "DOC0M11CFG1,"
hexmask.long.byte 0x164 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x164 16.--23. 1. "VOCAnMmHSIZE,Video Output Monitor m area horizontal size in pixels.(m=15-0)"
newline
hexmask.long.byte 0x164 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x164 0.--7. 1. "VOCAnMmVSIZE,Video Output Monitor m area vertical size in pixels.(m=15-0)"
line.long 0x168 "DOC0M11CFG2,"
hexmask.long.tbyte 0x168 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x168 0.--13. 1. "VOCAnMmADDR,Video Output Monitor m reference RAM start address.(m=15-0)"
line.long 0x16C "DOC0M11CFG3,"
hexmask.long.word 0x16C 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0x16C 0.--17. 1. "VOCAnMmTHSH,Video Output Monitor m acceptance threshold.(m=15-0)"
line.long 0x170 "DOC0M11CFG4,"
hexmask.long.byte 0x170 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x170 24.--27. 1. "VOCAnMmRUP0,Video Output Monitor m reference color 0: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x170 20.--23. 1. "VOCAnMmGUP0,Video Output Monitor m reference color 0: green upper limit.(m=15-0)"
hexmask.long.byte 0x170 16.--19. 1. "VOCAnMmBUP0,Video Output Monitor m reference color 0: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x170 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x170 8.--11. 1. "VOCAnMmRLO0,Video Output Monitor m reference color 0: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x170 4.--7. 1. "VOCAnMmGLO0,Video Output Monitor m reference color 0: green lower limit.(m=15-0)"
hexmask.long.byte 0x170 0.--3. 1. "VOCAnMmBLO0,Video Output Monitor m reference color 0: blue lower limit.(m=15-0)"
line.long 0x174 "DOC0M11CFG5,"
hexmask.long.byte 0x174 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x174 24.--27. 1. "VOCAnMmRUP1,Video Output Monitor m reference color 1: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x174 20.--23. 1. "VOCAnMmGUP1,Video Output Monitor m reference color 1: green upper limit.(m=15-0)"
hexmask.long.byte 0x174 16.--19. 1. "VOCAnMmBUP1,Video Output Monitor m reference color 1: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x174 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x174 8.--11. 1. "VOCAnMmRLO1,Video Output Monitor m reference color 1: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x174 4.--7. 1. "VOCAnMmGLO1,Video Output Monitor m reference color 1: green lower limit.(m=15-0)"
hexmask.long.byte 0x174 0.--3. 1. "VOCAnMmBLO1,Video Output Monitor m reference color 1: blue lower limit.(m=15-0)"
line.long 0x178 "DOC0M11CFG6,"
hexmask.long.byte 0x178 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x178 24.--27. 1. "VOCAnMmRUP2,Video Output Monitor m reference color 2: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x178 20.--23. 1. "VOCAnMmGUP2,Video Output Monitor m reference color 2: green upper limit.(m=15-0)"
hexmask.long.byte 0x178 16.--19. 1. "VOCAnMmBUP2,Video Output Monitor m reference color 2: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x178 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x178 8.--11. 1. "VOCAnMmRLO2,Video Output Monitor m reference color 2: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x178 4.--7. 1. "VOCAnMmGLO2,Video Output Monitor m reference color 2: green lower limit.(m=15-0)"
hexmask.long.byte 0x178 0.--3. 1. "VOCAnMmBLO2,Video Output Monitor m reference color 2: blue lower limit.(m=15-0)"
line.long 0x17C "DOC0M11CFG7,"
hexmask.long.byte 0x17C 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x17C 24.--27. 1. "VOCAnMmRUP3,Video Output Monitor m reference color 3: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x17C 20.--23. 1. "VOCAnMmGUP3,Video Output Monitor m reference color 3: green upper limit.(m=15-0)"
hexmask.long.byte 0x17C 16.--19. 1. "VOCAnMmBUP3,Video Output Monitor m reference color 3: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x17C 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x17C 8.--11. 1. "VOCAnMmRLO3,Video Output Monitor m reference color 3: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x17C 4.--7. 1. "VOCAnMmGLO3,Video Output Monitor m reference color 3: green lower limit.(m=15-0)"
hexmask.long.byte 0x17C 0.--3. 1. "VOCAnMmBLO3,Video Output Monitor m reference color 3: blue lower limit.(m=15-0)"
line.long 0x180 "DOC0M12CFG0,"
hexmask.long.byte 0x180 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x180 16.--27. 1. "VOCAnMmHSTRT,Video Output Monitor m area horizontal start point in pixels.(m=15-0)"
newline
hexmask.long.byte 0x180 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x180 0.--10. 1. "VOCAnMmVSTRT,Video Output Monitor m area vertical start point in pixels.(m=15-0)"
line.long 0x184 "DOC0M12CFG1,"
hexmask.long.byte 0x184 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x184 16.--23. 1. "VOCAnMmHSIZE,Video Output Monitor m area horizontal size in pixels.(m=15-0)"
newline
hexmask.long.byte 0x184 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x184 0.--7. 1. "VOCAnMmVSIZE,Video Output Monitor m area vertical size in pixels.(m=15-0)"
line.long 0x188 "DOC0M12CFG2,"
hexmask.long.tbyte 0x188 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x188 0.--13. 1. "VOCAnMmADDR,Video Output Monitor m reference RAM start address.(m=15-0)"
line.long 0x18C "DOC0M12CFG3,"
hexmask.long.word 0x18C 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0x18C 0.--17. 1. "VOCAnMmTHSH,Video Output Monitor m acceptance threshold.(m=15-0)"
line.long 0x190 "DOC0M12CFG4,"
hexmask.long.byte 0x190 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x190 24.--27. 1. "VOCAnMmRUP0,Video Output Monitor m reference color 0: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x190 20.--23. 1. "VOCAnMmGUP0,Video Output Monitor m reference color 0: green upper limit.(m=15-0)"
hexmask.long.byte 0x190 16.--19. 1. "VOCAnMmBUP0,Video Output Monitor m reference color 0: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x190 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x190 8.--11. 1. "VOCAnMmRLO0,Video Output Monitor m reference color 0: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x190 4.--7. 1. "VOCAnMmGLO0,Video Output Monitor m reference color 0: green lower limit.(m=15-0)"
hexmask.long.byte 0x190 0.--3. 1. "VOCAnMmBLO0,Video Output Monitor m reference color 0: blue lower limit.(m=15-0)"
line.long 0x194 "DOC0M12CFG5,"
hexmask.long.byte 0x194 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x194 24.--27. 1. "VOCAnMmRUP1,Video Output Monitor m reference color 1: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x194 20.--23. 1. "VOCAnMmGUP1,Video Output Monitor m reference color 1: green upper limit.(m=15-0)"
hexmask.long.byte 0x194 16.--19. 1. "VOCAnMmBUP1,Video Output Monitor m reference color 1: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x194 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x194 8.--11. 1. "VOCAnMmRLO1,Video Output Monitor m reference color 1: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x194 4.--7. 1. "VOCAnMmGLO1,Video Output Monitor m reference color 1: green lower limit.(m=15-0)"
hexmask.long.byte 0x194 0.--3. 1. "VOCAnMmBLO1,Video Output Monitor m reference color 1: blue lower limit.(m=15-0)"
line.long 0x198 "DOC0M12CFG6,"
hexmask.long.byte 0x198 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x198 24.--27. 1. "VOCAnMmRUP2,Video Output Monitor m reference color 2: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x198 20.--23. 1. "VOCAnMmGUP2,Video Output Monitor m reference color 2: green upper limit.(m=15-0)"
hexmask.long.byte 0x198 16.--19. 1. "VOCAnMmBUP2,Video Output Monitor m reference color 2: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x198 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x198 8.--11. 1. "VOCAnMmRLO2,Video Output Monitor m reference color 2: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x198 4.--7. 1. "VOCAnMmGLO2,Video Output Monitor m reference color 2: green lower limit.(m=15-0)"
hexmask.long.byte 0x198 0.--3. 1. "VOCAnMmBLO2,Video Output Monitor m reference color 2: blue lower limit.(m=15-0)"
line.long 0x19C "DOC0M12CFG7,"
hexmask.long.byte 0x19C 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x19C 24.--27. 1. "VOCAnMmRUP3,Video Output Monitor m reference color 3: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x19C 20.--23. 1. "VOCAnMmGUP3,Video Output Monitor m reference color 3: green upper limit.(m=15-0)"
hexmask.long.byte 0x19C 16.--19. 1. "VOCAnMmBUP3,Video Output Monitor m reference color 3: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x19C 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x19C 8.--11. 1. "VOCAnMmRLO3,Video Output Monitor m reference color 3: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x19C 4.--7. 1. "VOCAnMmGLO3,Video Output Monitor m reference color 3: green lower limit.(m=15-0)"
hexmask.long.byte 0x19C 0.--3. 1. "VOCAnMmBLO3,Video Output Monitor m reference color 3: blue lower limit.(m=15-0)"
line.long 0x1A0 "DOC0M13CFG0,"
hexmask.long.byte 0x1A0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x1A0 16.--27. 1. "VOCAnMmHSTRT,Video Output Monitor m area horizontal start point in pixels.(m=15-0)"
newline
hexmask.long.byte 0x1A0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x1A0 0.--10. 1. "VOCAnMmVSTRT,Video Output Monitor m area vertical start point in pixels.(m=15-0)"
line.long 0x1A4 "DOC0M13CFG1,"
hexmask.long.byte 0x1A4 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x1A4 16.--23. 1. "VOCAnMmHSIZE,Video Output Monitor m area horizontal size in pixels.(m=15-0)"
newline
hexmask.long.byte 0x1A4 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1A4 0.--7. 1. "VOCAnMmVSIZE,Video Output Monitor m area vertical size in pixels.(m=15-0)"
line.long 0x1A8 "DOC0M13CFG2,"
hexmask.long.tbyte 0x1A8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x1A8 0.--13. 1. "VOCAnMmADDR,Video Output Monitor m reference RAM start address.(m=15-0)"
line.long 0x1AC "DOC0M13CFG3,"
hexmask.long.word 0x1AC 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0x1AC 0.--17. 1. "VOCAnMmTHSH,Video Output Monitor m acceptance threshold.(m=15-0)"
line.long 0x1B0 "DOC0M13CFG4,"
hexmask.long.byte 0x1B0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x1B0 24.--27. 1. "VOCAnMmRUP0,Video Output Monitor m reference color 0: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1B0 20.--23. 1. "VOCAnMmGUP0,Video Output Monitor m reference color 0: green upper limit.(m=15-0)"
hexmask.long.byte 0x1B0 16.--19. 1. "VOCAnMmBUP0,Video Output Monitor m reference color 0: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1B0 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x1B0 8.--11. 1. "VOCAnMmRLO0,Video Output Monitor m reference color 0: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x1B0 4.--7. 1. "VOCAnMmGLO0,Video Output Monitor m reference color 0: green lower limit.(m=15-0)"
hexmask.long.byte 0x1B0 0.--3. 1. "VOCAnMmBLO0,Video Output Monitor m reference color 0: blue lower limit.(m=15-0)"
line.long 0x1B4 "DOC0M13CFG5,"
hexmask.long.byte 0x1B4 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x1B4 24.--27. 1. "VOCAnMmRUP1,Video Output Monitor m reference color 1: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1B4 20.--23. 1. "VOCAnMmGUP1,Video Output Monitor m reference color 1: green upper limit.(m=15-0)"
hexmask.long.byte 0x1B4 16.--19. 1. "VOCAnMmBUP1,Video Output Monitor m reference color 1: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1B4 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x1B4 8.--11. 1. "VOCAnMmRLO1,Video Output Monitor m reference color 1: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x1B4 4.--7. 1. "VOCAnMmGLO1,Video Output Monitor m reference color 1: green lower limit.(m=15-0)"
hexmask.long.byte 0x1B4 0.--3. 1. "VOCAnMmBLO1,Video Output Monitor m reference color 1: blue lower limit.(m=15-0)"
line.long 0x1B8 "DOC0M13CFG6,"
hexmask.long.byte 0x1B8 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x1B8 24.--27. 1. "VOCAnMmRUP2,Video Output Monitor m reference color 2: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1B8 20.--23. 1. "VOCAnMmGUP2,Video Output Monitor m reference color 2: green upper limit.(m=15-0)"
hexmask.long.byte 0x1B8 16.--19. 1. "VOCAnMmBUP2,Video Output Monitor m reference color 2: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1B8 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x1B8 8.--11. 1. "VOCAnMmRLO2,Video Output Monitor m reference color 2: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x1B8 4.--7. 1. "VOCAnMmGLO2,Video Output Monitor m reference color 2: green lower limit.(m=15-0)"
hexmask.long.byte 0x1B8 0.--3. 1. "VOCAnMmBLO2,Video Output Monitor m reference color 2: blue lower limit.(m=15-0)"
line.long 0x1BC "DOC0M13CFG7,"
hexmask.long.byte 0x1BC 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x1BC 24.--27. 1. "VOCAnMmRUP3,Video Output Monitor m reference color 3: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1BC 20.--23. 1. "VOCAnMmGUP3,Video Output Monitor m reference color 3: green upper limit.(m=15-0)"
hexmask.long.byte 0x1BC 16.--19. 1. "VOCAnMmBUP3,Video Output Monitor m reference color 3: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1BC 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x1BC 8.--11. 1. "VOCAnMmRLO3,Video Output Monitor m reference color 3: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x1BC 4.--7. 1. "VOCAnMmGLO3,Video Output Monitor m reference color 3: green lower limit.(m=15-0)"
hexmask.long.byte 0x1BC 0.--3. 1. "VOCAnMmBLO3,Video Output Monitor m reference color 3: blue lower limit.(m=15-0)"
line.long 0x1C0 "DOC0M14CFG0,"
hexmask.long.byte 0x1C0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x1C0 16.--27. 1. "VOCAnMmHSTRT,Video Output Monitor m area horizontal start point in pixels.(m=15-0)"
newline
hexmask.long.byte 0x1C0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x1C0 0.--10. 1. "VOCAnMmVSTRT,Video Output Monitor m area vertical start point in pixels.(m=15-0)"
line.long 0x1C4 "DOC0M14CFG1,"
hexmask.long.byte 0x1C4 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x1C4 16.--23. 1. "VOCAnMmHSIZE,Video Output Monitor m area horizontal size in pixels.(m=15-0)"
newline
hexmask.long.byte 0x1C4 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C4 0.--7. 1. "VOCAnMmVSIZE,Video Output Monitor m area vertical size in pixels.(m=15-0)"
line.long 0x1C8 "DOC0M14CFG2,"
hexmask.long.tbyte 0x1C8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x1C8 0.--13. 1. "VOCAnMmADDR,Video Output Monitor m reference RAM start address.(m=15-0)"
line.long 0x1CC "DOC0M14CFG3,"
hexmask.long.word 0x1CC 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0x1CC 0.--17. 1. "VOCAnMmTHSH,Video Output Monitor m acceptance threshold.(m=15-0)"
line.long 0x1D0 "DOC0M14CFG4,"
hexmask.long.byte 0x1D0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x1D0 24.--27. 1. "VOCAnMmRUP0,Video Output Monitor m reference color 0: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1D0 20.--23. 1. "VOCAnMmGUP0,Video Output Monitor m reference color 0: green upper limit.(m=15-0)"
hexmask.long.byte 0x1D0 16.--19. 1. "VOCAnMmBUP0,Video Output Monitor m reference color 0: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1D0 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x1D0 8.--11. 1. "VOCAnMmRLO0,Video Output Monitor m reference color 0: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x1D0 4.--7. 1. "VOCAnMmGLO0,Video Output Monitor m reference color 0: green lower limit.(m=15-0)"
hexmask.long.byte 0x1D0 0.--3. 1. "VOCAnMmBLO0,Video Output Monitor m reference color 0: blue lower limit.(m=15-0)"
line.long 0x1D4 "DOC0M14CFG5,"
hexmask.long.byte 0x1D4 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x1D4 24.--27. 1. "VOCAnMmRUP1,Video Output Monitor m reference color 1: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1D4 20.--23. 1. "VOCAnMmGUP1,Video Output Monitor m reference color 1: green upper limit.(m=15-0)"
hexmask.long.byte 0x1D4 16.--19. 1. "VOCAnMmBUP1,Video Output Monitor m reference color 1: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1D4 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x1D4 8.--11. 1. "VOCAnMmRLO1,Video Output Monitor m reference color 1: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x1D4 4.--7. 1. "VOCAnMmGLO1,Video Output Monitor m reference color 1: green lower limit.(m=15-0)"
hexmask.long.byte 0x1D4 0.--3. 1. "VOCAnMmBLO1,Video Output Monitor m reference color 1: blue lower limit.(m=15-0)"
line.long 0x1D8 "DOC0M14CFG6,"
hexmask.long.byte 0x1D8 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x1D8 24.--27. 1. "VOCAnMmRUP2,Video Output Monitor m reference color 2: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1D8 20.--23. 1. "VOCAnMmGUP2,Video Output Monitor m reference color 2: green upper limit.(m=15-0)"
hexmask.long.byte 0x1D8 16.--19. 1. "VOCAnMmBUP2,Video Output Monitor m reference color 2: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1D8 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x1D8 8.--11. 1. "VOCAnMmRLO2,Video Output Monitor m reference color 2: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x1D8 4.--7. 1. "VOCAnMmGLO2,Video Output Monitor m reference color 2: green lower limit.(m=15-0)"
hexmask.long.byte 0x1D8 0.--3. 1. "VOCAnMmBLO2,Video Output Monitor m reference color 2: blue lower limit.(m=15-0)"
line.long 0x1DC "DOC0M14CFG7,"
hexmask.long.byte 0x1DC 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x1DC 24.--27. 1. "VOCAnMmRUP3,Video Output Monitor m reference color 3: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1DC 20.--23. 1. "VOCAnMmGUP3,Video Output Monitor m reference color 3: green upper limit.(m=15-0)"
hexmask.long.byte 0x1DC 16.--19. 1. "VOCAnMmBUP3,Video Output Monitor m reference color 3: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1DC 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x1DC 8.--11. 1. "VOCAnMmRLO3,Video Output Monitor m reference color 3: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x1DC 4.--7. 1. "VOCAnMmGLO3,Video Output Monitor m reference color 3: green lower limit.(m=15-0)"
hexmask.long.byte 0x1DC 0.--3. 1. "VOCAnMmBLO3,Video Output Monitor m reference color 3: blue lower limit.(m=15-0)"
line.long 0x1E0 "DOC0M15CFG0,"
hexmask.long.byte 0x1E0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x1E0 16.--27. 1. "VOCAnMmHSTRT,Video Output Monitor m area horizontal start point in pixels.(m=15-0)"
newline
hexmask.long.byte 0x1E0 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x1E0 0.--10. 1. "VOCAnMmVSTRT,Video Output Monitor m area vertical start point in pixels.(m=15-0)"
line.long 0x1E4 "DOC0M15CFG1,"
hexmask.long.byte 0x1E4 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x1E4 16.--23. 1. "VOCAnMmHSIZE,Video Output Monitor m area horizontal size in pixels.(m=15-0)"
newline
hexmask.long.byte 0x1E4 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1E4 0.--7. 1. "VOCAnMmVSIZE,Video Output Monitor m area vertical size in pixels.(m=15-0)"
line.long 0x1E8 "DOC0M15CFG2,"
hexmask.long.tbyte 0x1E8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x1E8 0.--13. 1. "VOCAnMmADDR,Video Output Monitor m reference RAM start address.(m=15-0)"
line.long 0x1EC "DOC0M15CFG3,"
hexmask.long.word 0x1EC 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0x1EC 0.--17. 1. "VOCAnMmTHSH,Video Output Monitor m acceptance threshold.(m=15-0)"
line.long 0x1F0 "DOC0M15CFG4,"
hexmask.long.byte 0x1F0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x1F0 24.--27. 1. "VOCAnMmRUP0,Video Output Monitor m reference color 0: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1F0 20.--23. 1. "VOCAnMmGUP0,Video Output Monitor m reference color 0: green upper limit.(m=15-0)"
hexmask.long.byte 0x1F0 16.--19. 1. "VOCAnMmBUP0,Video Output Monitor m reference color 0: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1F0 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x1F0 8.--11. 1. "VOCAnMmRLO0,Video Output Monitor m reference color 0: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x1F0 4.--7. 1. "VOCAnMmGLO0,Video Output Monitor m reference color 0: green lower limit.(m=15-0)"
hexmask.long.byte 0x1F0 0.--3. 1. "VOCAnMmBLO0,Video Output Monitor m reference color 0: blue lower limit.(m=15-0)"
line.long 0x1F4 "DOC0M15CFG5,"
hexmask.long.byte 0x1F4 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x1F4 24.--27. 1. "VOCAnMmRUP1,Video Output Monitor m reference color 1: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1F4 20.--23. 1. "VOCAnMmGUP1,Video Output Monitor m reference color 1: green upper limit.(m=15-0)"
hexmask.long.byte 0x1F4 16.--19. 1. "VOCAnMmBUP1,Video Output Monitor m reference color 1: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1F4 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x1F4 8.--11. 1. "VOCAnMmRLO1,Video Output Monitor m reference color 1: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x1F4 4.--7. 1. "VOCAnMmGLO1,Video Output Monitor m reference color 1: green lower limit.(m=15-0)"
hexmask.long.byte 0x1F4 0.--3. 1. "VOCAnMmBLO1,Video Output Monitor m reference color 1: blue lower limit.(m=15-0)"
line.long 0x1F8 "DOC0M15CFG6,"
hexmask.long.byte 0x1F8 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x1F8 24.--27. 1. "VOCAnMmRUP2,Video Output Monitor m reference color 2: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1F8 20.--23. 1. "VOCAnMmGUP2,Video Output Monitor m reference color 2: green upper limit.(m=15-0)"
hexmask.long.byte 0x1F8 16.--19. 1. "VOCAnMmBUP2,Video Output Monitor m reference color 2: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1F8 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x1F8 8.--11. 1. "VOCAnMmRLO2,Video Output Monitor m reference color 2: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x1F8 4.--7. 1. "VOCAnMmGLO2,Video Output Monitor m reference color 2: green lower limit.(m=15-0)"
hexmask.long.byte 0x1F8 0.--3. 1. "VOCAnMmBLO2,Video Output Monitor m reference color 2: blue lower limit.(m=15-0)"
line.long 0x1FC "DOC0M15CFG7,"
hexmask.long.byte 0x1FC 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x1FC 24.--27. 1. "VOCAnMmRUP3,Video Output Monitor m reference color 3: red upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1FC 20.--23. 1. "VOCAnMmGUP3,Video Output Monitor m reference color 3: green upper limit.(m=15-0)"
hexmask.long.byte 0x1FC 16.--19. 1. "VOCAnMmBUP3,Video Output Monitor m reference color 3: blue upper limit.(m=15-0)"
newline
hexmask.long.byte 0x1FC 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x1FC 8.--11. 1. "VOCAnMmRLO3,Video Output Monitor m reference color 3: red lower limit.(m=15-0)"
newline
hexmask.long.byte 0x1FC 4.--7. 1. "VOCAnMmGLO3,Video Output Monitor m reference color 3: green lower limit.(m=15-0)"
hexmask.long.byte 0x1FC 0.--3. 1. "VOCAnMmBLO3,Video Output Monitor m reference color 3: blue lower limit.(m=15-0)"
line.long 0x200 "DOC0EXPD0,"
hexmask.long.word 0x200 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x200 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x200 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x200 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x200 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x200 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x200 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x200 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x200 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x204 "DOC0EXPD1,"
hexmask.long.word 0x204 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x204 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x204 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x204 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x204 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x204 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x204 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x204 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x204 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x208 "DOC0EXPD2,"
hexmask.long.word 0x208 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x208 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x208 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x208 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x208 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x208 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x208 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x208 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x208 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x20C "DOC0EXPD3,"
hexmask.long.word 0x20C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x20C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x20C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x20C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x20C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x20C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x20C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x20C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x20C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x210 "DOC0EXPD4,"
hexmask.long.word 0x210 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x210 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x210 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x210 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x210 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x210 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x210 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x210 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x210 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x214 "DOC0EXPD5,"
hexmask.long.word 0x214 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x214 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x214 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x214 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x214 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x214 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x214 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x214 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x214 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x218 "DOC0EXPD6,"
hexmask.long.word 0x218 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x218 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x218 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x218 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x218 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x218 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x218 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x218 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x218 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x21C "DOC0EXPD7,"
hexmask.long.word 0x21C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x21C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x21C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x21C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x21C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x21C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x21C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x21C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x21C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x220 "DOC0EXPD8,"
hexmask.long.word 0x220 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x220 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x220 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x220 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x220 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x220 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x220 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x220 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x220 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x224 "DOC0EXPD9,"
hexmask.long.word 0x224 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x224 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x224 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x224 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x224 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x224 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x224 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x224 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x224 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x228 "DOC0EXPD10,"
hexmask.long.word 0x228 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x228 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x228 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x228 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x228 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x228 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x228 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x228 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x228 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x22C "DOC0EXPD11,"
hexmask.long.word 0x22C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x22C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x22C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x22C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x22C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x22C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x22C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x22C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x22C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x230 "DOC0EXPD12,"
hexmask.long.word 0x230 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x230 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x230 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x230 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x230 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x230 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x230 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x230 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x230 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x234 "DOC0EXPD13,"
hexmask.long.word 0x234 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x234 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x234 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x234 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x234 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x234 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x234 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x234 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x234 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x238 "DOC0EXPD14,"
hexmask.long.word 0x238 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x238 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x238 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x238 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x238 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x238 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x238 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x238 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x238 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x23C "DOC0EXPD15,"
hexmask.long.word 0x23C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x23C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x23C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x23C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x23C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x23C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x23C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x23C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x23C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x240 "DOC0EXPD16,"
hexmask.long.word 0x240 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x240 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x240 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x240 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x240 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x240 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x240 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x240 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x240 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x244 "DOC0EXPD17,"
hexmask.long.word 0x244 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x244 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x244 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x244 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x244 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x244 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x244 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x244 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x244 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x248 "DOC0EXPD18,"
hexmask.long.word 0x248 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x248 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x248 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x248 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x248 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x248 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x248 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x248 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x248 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x24C "DOC0EXPD19,"
hexmask.long.word 0x24C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x24C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x24C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x24C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x24C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x24C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x24C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x24C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x24C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x250 "DOC0EXPD20,"
hexmask.long.word 0x250 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x250 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x250 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x250 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x250 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x250 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x250 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x250 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x250 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x254 "DOC0EXPD21,"
hexmask.long.word 0x254 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x254 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x254 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x254 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x254 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x254 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x254 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x254 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x254 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x258 "DOC0EXPD22,"
hexmask.long.word 0x258 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x258 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x258 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x258 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x258 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x258 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x258 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x258 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x258 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x25C "DOC0EXPD23,"
hexmask.long.word 0x25C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x25C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x25C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x25C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x25C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x25C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x25C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x25C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x25C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x260 "DOC0EXPD24,"
hexmask.long.word 0x260 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x260 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x260 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x260 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x260 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x260 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x260 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x260 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x260 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x264 "DOC0EXPD25,"
hexmask.long.word 0x264 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x264 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x264 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x264 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x264 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x264 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x264 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x264 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x264 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x268 "DOC0EXPD26,"
hexmask.long.word 0x268 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x268 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x268 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x268 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x268 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x268 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x268 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x268 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x268 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x26C "DOC0EXPD27,"
hexmask.long.word 0x26C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x26C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x26C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x26C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x26C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x26C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x26C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x26C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x26C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x270 "DOC0EXPD28,"
hexmask.long.word 0x270 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x270 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x270 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x270 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x270 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x270 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x270 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x270 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x270 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x274 "DOC0EXPD29,"
hexmask.long.word 0x274 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x274 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x274 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x274 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x274 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x274 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x274 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x274 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x274 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x278 "DOC0EXPD30,"
hexmask.long.word 0x278 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x278 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x278 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x278 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x278 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x278 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x278 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x278 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x278 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x27C "DOC0EXPD31,"
hexmask.long.word 0x27C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x27C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x27C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x27C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x27C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x27C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x27C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x27C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x27C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x280 "DOC0EXPD32,"
hexmask.long.word 0x280 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x280 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x280 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x280 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x280 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x280 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x280 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x280 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x280 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x284 "DOC0EXPD33,"
hexmask.long.word 0x284 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x284 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x284 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x284 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x284 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x284 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x284 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x284 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x284 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x288 "DOC0EXPD34,"
hexmask.long.word 0x288 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x288 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x288 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x288 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x288 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x288 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x288 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x288 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x288 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x28C "DOC0EXPD35,"
hexmask.long.word 0x28C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x28C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x28C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x28C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x28C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x28C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x28C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x28C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x28C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x290 "DOC0EXPD36,"
hexmask.long.word 0x290 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x290 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x290 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x290 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x290 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x290 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x290 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x290 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x290 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x294 "DOC0EXPD37,"
hexmask.long.word 0x294 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x294 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x294 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x294 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x294 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x294 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x294 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x294 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x294 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x298 "DOC0EXPD38,"
hexmask.long.word 0x298 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x298 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x298 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x298 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x298 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x298 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x298 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x298 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x298 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x29C "DOC0EXPD39,"
hexmask.long.word 0x29C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x29C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x29C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x29C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x29C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x29C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x29C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x29C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x29C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A0 "DOC0EXPD40,"
hexmask.long.word 0x2A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A4 "DOC0EXPD41,"
hexmask.long.word 0x2A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A8 "DOC0EXPD42,"
hexmask.long.word 0x2A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2AC "DOC0EXPD43,"
hexmask.long.word 0x2AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B0 "DOC0EXPD44,"
hexmask.long.word 0x2B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B4 "DOC0EXPD45,"
hexmask.long.word 0x2B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B8 "DOC0EXPD46,"
hexmask.long.word 0x2B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2BC "DOC0EXPD47,"
hexmask.long.word 0x2BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C0 "DOC0EXPD48,"
hexmask.long.word 0x2C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C4 "DOC0EXPD49,"
hexmask.long.word 0x2C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C8 "DOC0EXPD50,"
hexmask.long.word 0x2C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2CC "DOC0EXPD51,"
hexmask.long.word 0x2CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D0 "DOC0EXPD52,"
hexmask.long.word 0x2D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D4 "DOC0EXPD53,"
hexmask.long.word 0x2D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D8 "DOC0EXPD54,"
hexmask.long.word 0x2D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2DC "DOC0EXPD55,"
hexmask.long.word 0x2DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E0 "DOC0EXPD56,"
hexmask.long.word 0x2E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E4 "DOC0EXPD57,"
hexmask.long.word 0x2E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E8 "DOC0EXPD58,"
hexmask.long.word 0x2E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2EC "DOC0EXPD59,"
hexmask.long.word 0x2EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F0 "DOC0EXPD60,"
hexmask.long.word 0x2F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F4 "DOC0EXPD61,"
hexmask.long.word 0x2F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F8 "DOC0EXPD62,"
hexmask.long.word 0x2F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2FC "DOC0EXPD63,"
hexmask.long.word 0x2FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x300 "DOC0EXPD64,"
hexmask.long.word 0x300 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x300 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x300 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x300 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x300 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x300 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x300 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x300 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x300 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x304 "DOC0EXPD65,"
hexmask.long.word 0x304 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x304 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x304 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x304 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x304 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x304 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x304 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x304 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x304 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x308 "DOC0EXPD66,"
hexmask.long.word 0x308 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x308 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x308 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x308 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x308 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x308 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x308 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x308 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x308 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x30C "DOC0EXPD67,"
hexmask.long.word 0x30C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x30C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x30C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x30C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x30C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x30C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x30C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x30C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x30C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x310 "DOC0EXPD68,"
hexmask.long.word 0x310 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x310 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x310 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x310 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x310 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x310 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x310 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x310 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x310 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x314 "DOC0EXPD69,"
hexmask.long.word 0x314 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x314 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x314 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x314 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x314 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x314 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x314 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x314 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x314 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x318 "DOC0EXPD70,"
hexmask.long.word 0x318 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x318 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x318 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x318 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x318 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x318 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x318 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x318 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x318 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x31C "DOC0EXPD71,"
hexmask.long.word 0x31C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x31C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x31C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x31C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x31C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x31C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x31C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x31C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x31C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x320 "DOC0EXPD72,"
hexmask.long.word 0x320 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x320 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x320 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x320 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x320 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x320 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x320 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x320 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x320 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x324 "DOC0EXPD73,"
hexmask.long.word 0x324 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x324 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x324 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x324 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x324 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x324 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x324 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x324 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x324 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x328 "DOC0EXPD74,"
hexmask.long.word 0x328 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x328 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x328 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x328 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x328 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x328 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x328 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x328 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x328 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x32C "DOC0EXPD75,"
hexmask.long.word 0x32C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x32C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x32C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x32C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x32C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x32C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x32C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x32C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x32C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x330 "DOC0EXPD76,"
hexmask.long.word 0x330 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x330 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x330 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x330 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x330 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x330 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x330 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x330 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x330 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x334 "DOC0EXPD77,"
hexmask.long.word 0x334 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x334 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x334 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x334 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x334 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x334 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x334 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x334 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x334 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x338 "DOC0EXPD78,"
hexmask.long.word 0x338 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x338 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x338 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x338 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x338 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x338 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x338 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x338 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x338 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x33C "DOC0EXPD79,"
hexmask.long.word 0x33C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x33C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x33C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x33C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x33C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x33C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x33C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x33C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x33C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x340 "DOC0EXPD80,"
hexmask.long.word 0x340 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x340 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x340 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x340 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x340 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x340 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x340 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x340 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x340 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x344 "DOC0EXPD81,"
hexmask.long.word 0x344 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x344 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x344 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x344 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x344 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x344 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x344 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x344 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x344 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x348 "DOC0EXPD82,"
hexmask.long.word 0x348 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x348 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x348 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x348 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x348 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x348 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x348 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x348 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x348 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x34C "DOC0EXPD83,"
hexmask.long.word 0x34C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x34C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x34C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x34C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x34C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x34C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x34C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x34C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x34C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x350 "DOC0EXPD84,"
hexmask.long.word 0x350 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x350 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x350 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x350 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x350 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x350 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x350 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x350 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x350 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x354 "DOC0EXPD85,"
hexmask.long.word 0x354 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x354 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x354 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x354 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x354 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x354 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x354 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x354 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x354 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x358 "DOC0EXPD86,"
hexmask.long.word 0x358 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x358 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x358 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x358 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x358 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x358 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x358 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x358 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x358 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x35C "DOC0EXPD87,"
hexmask.long.word 0x35C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x35C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x35C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x35C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x35C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x35C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x35C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x35C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x35C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x360 "DOC0EXPD88,"
hexmask.long.word 0x360 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x360 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x360 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x360 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x360 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x360 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x360 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x360 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x360 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x364 "DOC0EXPD89,"
hexmask.long.word 0x364 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x364 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x364 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x364 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x364 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x364 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x364 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x364 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x364 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x368 "DOC0EXPD90,"
hexmask.long.word 0x368 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x368 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x368 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x368 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x368 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x368 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x368 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x368 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x368 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x36C "DOC0EXPD91,"
hexmask.long.word 0x36C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x36C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x36C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x36C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x36C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x36C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x36C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x36C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x36C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x370 "DOC0EXPD92,"
hexmask.long.word 0x370 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x370 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x370 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x370 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x370 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x370 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x370 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x370 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x370 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x374 "DOC0EXPD93,"
hexmask.long.word 0x374 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x374 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x374 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x374 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x374 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x374 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x374 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x374 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x374 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x378 "DOC0EXPD94,"
hexmask.long.word 0x378 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x378 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x378 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x378 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x378 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x378 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x378 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x378 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x378 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x37C "DOC0EXPD95,"
hexmask.long.word 0x37C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x37C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x37C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x37C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x37C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x37C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x37C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x37C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x37C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x380 "DOC0EXPD96,"
hexmask.long.word 0x380 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x380 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x380 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x380 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x380 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x380 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x380 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x380 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x380 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x384 "DOC0EXPD97,"
hexmask.long.word 0x384 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x384 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x384 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x384 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x384 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x384 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x384 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x384 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x384 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x388 "DOC0EXPD98,"
hexmask.long.word 0x388 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x388 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x388 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x388 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x388 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x388 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x388 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x388 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x388 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x38C "DOC0EXPD99,"
hexmask.long.word 0x38C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x38C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x38C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x38C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x38C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x38C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x38C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x38C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x38C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x390 "DOC0EXPD100,"
hexmask.long.word 0x390 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x390 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x390 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x390 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x390 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x390 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x390 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x390 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x390 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x394 "DOC0EXPD101,"
hexmask.long.word 0x394 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x394 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x394 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x394 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x394 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x394 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x394 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x394 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x394 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x398 "DOC0EXPD102,"
hexmask.long.word 0x398 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x398 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x398 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x398 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x398 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x398 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x398 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x398 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x398 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x39C "DOC0EXPD103,"
hexmask.long.word 0x39C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x39C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x39C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x39C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x39C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x39C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x39C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x39C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x39C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A0 "DOC0EXPD104,"
hexmask.long.word 0x3A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A4 "DOC0EXPD105,"
hexmask.long.word 0x3A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A8 "DOC0EXPD106,"
hexmask.long.word 0x3A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3AC "DOC0EXPD107,"
hexmask.long.word 0x3AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B0 "DOC0EXPD108,"
hexmask.long.word 0x3B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B4 "DOC0EXPD109,"
hexmask.long.word 0x3B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B8 "DOC0EXPD110,"
hexmask.long.word 0x3B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3BC "DOC0EXPD111,"
hexmask.long.word 0x3BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C0 "DOC0EXPD112,"
hexmask.long.word 0x3C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C4 "DOC0EXPD113,"
hexmask.long.word 0x3C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C8 "DOC0EXPD114,"
hexmask.long.word 0x3C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3CC "DOC0EXPD115,"
hexmask.long.word 0x3CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D0 "DOC0EXPD116,"
hexmask.long.word 0x3D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D4 "DOC0EXPD117,"
hexmask.long.word 0x3D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D8 "DOC0EXPD118,"
hexmask.long.word 0x3D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3DC "DOC0EXPD119,"
hexmask.long.word 0x3DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E0 "DOC0EXPD120,"
hexmask.long.word 0x3E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E4 "DOC0EXPD121,"
hexmask.long.word 0x3E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E8 "DOC0EXPD122,"
hexmask.long.word 0x3E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3EC "DOC0EXPD123,"
hexmask.long.word 0x3EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F0 "DOC0EXPD124,"
hexmask.long.word 0x3F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F4 "DOC0EXPD125,"
hexmask.long.word 0x3F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F8 "DOC0EXPD126,"
hexmask.long.word 0x3F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3FC "DOC0EXPD127,"
hexmask.long.word 0x3FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x400 "DOC0EXPD128,"
hexmask.long.word 0x400 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x400 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x400 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x400 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x400 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x400 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x400 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x400 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x400 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x404 "DOC0EXPD129,"
hexmask.long.word 0x404 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x404 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x404 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x404 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x404 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x404 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x404 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x404 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x404 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x408 "DOC0EXPD130,"
hexmask.long.word 0x408 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x408 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x408 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x408 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x408 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x408 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x408 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x408 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x408 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x40C "DOC0EXPD131,"
hexmask.long.word 0x40C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x40C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x40C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x40C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x40C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x40C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x40C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x40C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x40C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x410 "DOC0EXPD132,"
hexmask.long.word 0x410 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x410 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x410 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x410 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x410 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x410 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x410 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x410 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x410 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x414 "DOC0EXPD133,"
hexmask.long.word 0x414 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x414 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x414 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x414 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x414 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x414 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x414 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x414 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x414 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x418 "DOC0EXPD134,"
hexmask.long.word 0x418 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x418 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x418 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x418 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x418 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x418 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x418 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x418 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x418 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x41C "DOC0EXPD135,"
hexmask.long.word 0x41C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x41C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x41C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x41C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x41C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x41C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x41C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x41C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x41C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x420 "DOC0EXPD136,"
hexmask.long.word 0x420 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x420 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x420 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x420 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x420 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x420 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x420 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x420 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x420 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x424 "DOC0EXPD137,"
hexmask.long.word 0x424 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x424 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x424 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x424 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x424 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x424 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x424 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x424 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x424 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x428 "DOC0EXPD138,"
hexmask.long.word 0x428 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x428 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x428 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x428 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x428 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x428 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x428 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x428 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x428 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x42C "DOC0EXPD139,"
hexmask.long.word 0x42C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x42C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x42C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x42C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x42C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x42C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x42C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x42C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x42C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x430 "DOC0EXPD140,"
hexmask.long.word 0x430 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x430 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x430 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x430 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x430 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x430 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x430 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x430 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x430 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x434 "DOC0EXPD141,"
hexmask.long.word 0x434 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x434 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x434 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x434 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x434 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x434 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x434 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x434 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x434 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x438 "DOC0EXPD142,"
hexmask.long.word 0x438 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x438 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x438 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x438 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x438 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x438 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x438 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x438 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x438 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x43C "DOC0EXPD143,"
hexmask.long.word 0x43C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x43C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x43C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x43C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x43C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x43C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x43C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x43C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x43C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x440 "DOC0EXPD144,"
hexmask.long.word 0x440 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x440 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x440 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x440 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x440 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x440 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x440 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x440 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x440 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x444 "DOC0EXPD145,"
hexmask.long.word 0x444 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x444 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x444 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x444 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x444 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x444 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x444 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x444 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x444 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x448 "DOC0EXPD146,"
hexmask.long.word 0x448 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x448 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x448 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x448 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x448 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x448 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x448 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x448 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x448 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x44C "DOC0EXPD147,"
hexmask.long.word 0x44C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x44C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x44C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x44C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x44C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x44C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x44C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x44C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x44C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x450 "DOC0EXPD148,"
hexmask.long.word 0x450 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x450 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x450 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x450 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x450 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x450 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x450 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x450 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x450 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x454 "DOC0EXPD149,"
hexmask.long.word 0x454 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x454 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x454 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x454 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x454 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x454 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x454 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x454 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x454 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x458 "DOC0EXPD150,"
hexmask.long.word 0x458 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x458 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x458 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x458 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x458 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x458 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x458 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x458 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x458 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x45C "DOC0EXPD151,"
hexmask.long.word 0x45C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x45C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x45C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x45C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x45C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x45C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x45C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x45C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x45C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x460 "DOC0EXPD152,"
hexmask.long.word 0x460 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x460 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x460 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x460 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x460 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x460 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x460 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x460 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x460 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x464 "DOC0EXPD153,"
hexmask.long.word 0x464 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x464 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x464 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x464 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x464 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x464 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x464 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x464 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x464 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x468 "DOC0EXPD154,"
hexmask.long.word 0x468 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x468 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x468 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x468 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x468 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x468 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x468 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x468 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x468 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x46C "DOC0EXPD155,"
hexmask.long.word 0x46C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x46C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x46C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x46C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x46C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x46C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x46C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x46C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x46C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x470 "DOC0EXPD156,"
hexmask.long.word 0x470 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x470 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x470 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x470 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x470 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x470 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x470 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x470 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x470 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x474 "DOC0EXPD157,"
hexmask.long.word 0x474 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x474 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x474 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x474 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x474 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x474 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x474 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x474 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x474 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x478 "DOC0EXPD158,"
hexmask.long.word 0x478 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x478 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x478 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x478 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x478 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x478 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x478 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x478 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x478 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x47C "DOC0EXPD159,"
hexmask.long.word 0x47C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x47C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x47C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x47C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x47C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x47C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x47C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x47C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x47C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x480 "DOC0EXPD160,"
hexmask.long.word 0x480 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x480 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x480 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x480 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x480 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x480 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x480 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x480 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x480 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x484 "DOC0EXPD161,"
hexmask.long.word 0x484 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x484 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x484 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x484 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x484 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x484 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x484 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x484 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x484 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x488 "DOC0EXPD162,"
hexmask.long.word 0x488 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x488 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x488 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x488 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x488 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x488 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x488 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x488 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x488 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x48C "DOC0EXPD163,"
hexmask.long.word 0x48C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x48C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x48C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x48C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x48C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x48C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x48C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x48C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x48C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x490 "DOC0EXPD164,"
hexmask.long.word 0x490 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x490 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x490 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x490 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x490 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x490 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x490 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x490 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x490 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x494 "DOC0EXPD165,"
hexmask.long.word 0x494 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x494 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x494 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x494 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x494 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x494 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x494 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x494 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x494 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x498 "DOC0EXPD166,"
hexmask.long.word 0x498 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x498 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x498 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x498 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x498 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x498 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x498 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x498 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x498 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x49C "DOC0EXPD167,"
hexmask.long.word 0x49C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x49C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x49C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x49C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x49C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x49C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x49C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x49C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x49C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A0 "DOC0EXPD168,"
hexmask.long.word 0x4A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A4 "DOC0EXPD169,"
hexmask.long.word 0x4A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A8 "DOC0EXPD170,"
hexmask.long.word 0x4A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4AC "DOC0EXPD171,"
hexmask.long.word 0x4AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B0 "DOC0EXPD172,"
hexmask.long.word 0x4B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B4 "DOC0EXPD173,"
hexmask.long.word 0x4B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B8 "DOC0EXPD174,"
hexmask.long.word 0x4B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4BC "DOC0EXPD175,"
hexmask.long.word 0x4BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C0 "DOC0EXPD176,"
hexmask.long.word 0x4C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C4 "DOC0EXPD177,"
hexmask.long.word 0x4C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C8 "DOC0EXPD178,"
hexmask.long.word 0x4C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4CC "DOC0EXPD179,"
hexmask.long.word 0x4CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D0 "DOC0EXPD180,"
hexmask.long.word 0x4D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D4 "DOC0EXPD181,"
hexmask.long.word 0x4D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D8 "DOC0EXPD182,"
hexmask.long.word 0x4D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4DC "DOC0EXPD183,"
hexmask.long.word 0x4DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E0 "DOC0EXPD184,"
hexmask.long.word 0x4E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E4 "DOC0EXPD185,"
hexmask.long.word 0x4E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E8 "DOC0EXPD186,"
hexmask.long.word 0x4E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4EC "DOC0EXPD187,"
hexmask.long.word 0x4EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F0 "DOC0EXPD188,"
hexmask.long.word 0x4F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F4 "DOC0EXPD189,"
hexmask.long.word 0x4F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F8 "DOC0EXPD190,"
hexmask.long.word 0x4F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4FC "DOC0EXPD191,"
hexmask.long.word 0x4FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x500 "DOC0EXPD192,"
hexmask.long.word 0x500 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x500 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x500 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x500 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x500 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x500 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x500 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x500 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x500 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x504 "DOC0EXPD193,"
hexmask.long.word 0x504 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x504 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x504 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x504 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x504 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x504 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x504 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x504 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x504 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x508 "DOC0EXPD194,"
hexmask.long.word 0x508 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x508 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x508 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x508 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x508 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x508 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x508 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x508 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x508 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x50C "DOC0EXPD195,"
hexmask.long.word 0x50C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x50C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x50C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x50C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x50C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x50C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x50C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x50C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x50C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x510 "DOC0EXPD196,"
hexmask.long.word 0x510 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x510 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x510 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x510 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x510 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x510 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x510 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x510 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x510 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x514 "DOC0EXPD197,"
hexmask.long.word 0x514 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x514 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x514 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x514 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x514 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x514 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x514 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x514 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x514 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x518 "DOC0EXPD198,"
hexmask.long.word 0x518 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x518 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x518 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x518 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x518 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x518 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x518 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x518 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x518 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x51C "DOC0EXPD199,"
hexmask.long.word 0x51C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x51C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x51C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x51C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x51C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x51C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x51C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x51C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x51C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x520 "DOC0EXPD200,"
hexmask.long.word 0x520 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x520 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x520 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x520 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x520 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x520 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x520 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x520 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x520 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x524 "DOC0EXPD201,"
hexmask.long.word 0x524 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x524 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x524 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x524 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x524 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x524 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x524 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x524 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x524 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x528 "DOC0EXPD202,"
hexmask.long.word 0x528 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x528 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x528 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x528 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x528 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x528 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x528 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x528 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x528 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x52C "DOC0EXPD203,"
hexmask.long.word 0x52C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x52C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x52C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x52C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x52C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x52C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x52C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x52C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x52C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x530 "DOC0EXPD204,"
hexmask.long.word 0x530 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x530 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x530 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x530 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x530 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x530 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x530 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x530 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x530 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x534 "DOC0EXPD205,"
hexmask.long.word 0x534 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x534 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x534 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x534 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x534 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x534 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x534 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x534 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x534 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x538 "DOC0EXPD206,"
hexmask.long.word 0x538 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x538 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x538 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x538 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x538 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x538 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x538 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x538 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x538 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x53C "DOC0EXPD207,"
hexmask.long.word 0x53C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x53C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x53C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x53C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x53C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x53C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x53C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x53C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x53C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x540 "DOC0EXPD208,"
hexmask.long.word 0x540 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x540 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x540 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x540 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x540 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x540 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x540 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x540 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x540 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x544 "DOC0EXPD209,"
hexmask.long.word 0x544 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x544 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x544 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x544 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x544 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x544 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x544 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x544 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x544 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x548 "DOC0EXPD210,"
hexmask.long.word 0x548 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x548 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x548 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x548 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x548 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x548 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x548 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x548 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x548 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x54C "DOC0EXPD211,"
hexmask.long.word 0x54C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x54C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x54C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x54C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x54C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x54C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x54C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x54C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x54C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x550 "DOC0EXPD212,"
hexmask.long.word 0x550 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x550 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x550 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x550 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x550 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x550 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x550 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x550 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x550 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x554 "DOC0EXPD213,"
hexmask.long.word 0x554 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x554 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x554 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x554 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x554 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x554 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x554 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x554 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x554 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x558 "DOC0EXPD214,"
hexmask.long.word 0x558 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x558 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x558 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x558 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x558 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x558 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x558 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x558 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x558 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x55C "DOC0EXPD215,"
hexmask.long.word 0x55C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x55C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x55C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x55C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x55C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x55C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x55C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x55C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x55C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x560 "DOC0EXPD216,"
hexmask.long.word 0x560 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x560 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x560 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x560 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x560 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x560 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x560 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x560 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x560 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x564 "DOC0EXPD217,"
hexmask.long.word 0x564 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x564 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x564 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x564 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x564 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x564 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x564 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x564 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x564 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x568 "DOC0EXPD218,"
hexmask.long.word 0x568 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x568 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x568 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x568 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x568 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x568 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x568 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x568 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x568 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x56C "DOC0EXPD219,"
hexmask.long.word 0x56C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x56C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x56C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x56C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x56C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x56C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x56C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x56C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x56C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x570 "DOC0EXPD220,"
hexmask.long.word 0x570 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x570 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x570 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x570 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x570 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x570 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x570 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x570 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x570 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x574 "DOC0EXPD221,"
hexmask.long.word 0x574 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x574 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x574 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x574 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x574 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x574 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x574 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x574 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x574 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x578 "DOC0EXPD222,"
hexmask.long.word 0x578 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x578 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x578 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x578 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x578 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x578 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x578 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x578 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x578 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x57C "DOC0EXPD223,"
hexmask.long.word 0x57C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x57C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x57C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x57C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x57C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x57C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x57C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x57C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x57C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x580 "DOC0EXPD224,"
hexmask.long.word 0x580 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x580 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x580 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x580 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x580 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x580 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x580 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x580 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x580 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x584 "DOC0EXPD225,"
hexmask.long.word 0x584 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x584 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x584 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x584 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x584 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x584 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x584 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x584 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x584 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x588 "DOC0EXPD226,"
hexmask.long.word 0x588 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x588 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x588 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x588 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x588 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x588 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x588 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x588 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x588 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x58C "DOC0EXPD227,"
hexmask.long.word 0x58C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x58C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x58C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x58C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x58C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x58C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x58C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x58C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x58C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x590 "DOC0EXPD228,"
hexmask.long.word 0x590 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x590 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x590 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x590 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x590 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x590 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x590 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x590 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x590 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x594 "DOC0EXPD229,"
hexmask.long.word 0x594 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x594 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x594 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x594 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x594 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x594 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x594 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x594 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x594 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x598 "DOC0EXPD230,"
hexmask.long.word 0x598 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x598 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x598 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x598 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x598 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x598 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x598 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x598 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x598 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x59C "DOC0EXPD231,"
hexmask.long.word 0x59C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x59C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x59C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x59C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x59C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x59C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x59C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x59C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x59C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A0 "DOC0EXPD232,"
hexmask.long.word 0x5A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A4 "DOC0EXPD233,"
hexmask.long.word 0x5A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A8 "DOC0EXPD234,"
hexmask.long.word 0x5A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5AC "DOC0EXPD235,"
hexmask.long.word 0x5AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B0 "DOC0EXPD236,"
hexmask.long.word 0x5B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B4 "DOC0EXPD237,"
hexmask.long.word 0x5B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B8 "DOC0EXPD238,"
hexmask.long.word 0x5B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5BC "DOC0EXPD239,"
hexmask.long.word 0x5BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C0 "DOC0EXPD240,"
hexmask.long.word 0x5C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C4 "DOC0EXPD241,"
hexmask.long.word 0x5C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C8 "DOC0EXPD242,"
hexmask.long.word 0x5C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5CC "DOC0EXPD243,"
hexmask.long.word 0x5CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D0 "DOC0EXPD244,"
hexmask.long.word 0x5D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D4 "DOC0EXPD245,"
hexmask.long.word 0x5D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D8 "DOC0EXPD246,"
hexmask.long.word 0x5D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5DC "DOC0EXPD247,"
hexmask.long.word 0x5DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E0 "DOC0EXPD248,"
hexmask.long.word 0x5E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E4 "DOC0EXPD249,"
hexmask.long.word 0x5E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E8 "DOC0EXPD250,"
hexmask.long.word 0x5E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5EC "DOC0EXPD251,"
hexmask.long.word 0x5EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F0 "DOC0EXPD252,"
hexmask.long.word 0x5F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F4 "DOC0EXPD253,"
hexmask.long.word 0x5F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F8 "DOC0EXPD254,"
hexmask.long.word 0x5F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5FC "DOC0EXPD255,"
hexmask.long.word 0x5FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x600 "DOC0EXPD256,"
hexmask.long.word 0x600 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x600 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x600 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x600 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x600 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x600 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x600 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x600 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x600 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x604 "DOC0EXPD257,"
hexmask.long.word 0x604 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x604 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x604 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x604 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x604 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x604 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x604 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x604 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x604 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x608 "DOC0EXPD258,"
hexmask.long.word 0x608 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x608 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x608 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x608 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x608 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x608 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x608 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x608 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x608 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x60C "DOC0EXPD259,"
hexmask.long.word 0x60C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x60C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x60C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x60C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x60C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x60C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x60C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x60C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x60C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x610 "DOC0EXPD260,"
hexmask.long.word 0x610 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x610 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x610 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x610 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x610 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x610 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x610 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x610 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x610 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x614 "DOC0EXPD261,"
hexmask.long.word 0x614 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x614 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x614 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x614 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x614 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x614 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x614 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x614 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x614 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x618 "DOC0EXPD262,"
hexmask.long.word 0x618 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x618 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x618 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x618 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x618 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x618 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x618 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x618 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x618 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x61C "DOC0EXPD263,"
hexmask.long.word 0x61C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x61C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x61C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x61C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x61C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x61C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x61C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x61C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x61C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x620 "DOC0EXPD264,"
hexmask.long.word 0x620 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x620 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x620 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x620 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x620 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x620 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x620 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x620 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x620 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x624 "DOC0EXPD265,"
hexmask.long.word 0x624 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x624 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x624 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x624 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x624 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x624 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x624 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x624 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x624 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x628 "DOC0EXPD266,"
hexmask.long.word 0x628 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x628 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x628 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x628 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x628 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x628 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x628 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x628 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x628 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x62C "DOC0EXPD267,"
hexmask.long.word 0x62C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x62C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x62C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x62C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x62C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x62C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x62C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x62C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x62C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x630 "DOC0EXPD268,"
hexmask.long.word 0x630 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x630 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x630 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x630 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x630 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x630 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x630 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x630 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x630 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x634 "DOC0EXPD269,"
hexmask.long.word 0x634 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x634 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x634 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x634 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x634 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x634 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x634 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x634 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x634 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x638 "DOC0EXPD270,"
hexmask.long.word 0x638 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x638 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x638 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x638 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x638 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x638 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x638 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x638 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x638 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x63C "DOC0EXPD271,"
hexmask.long.word 0x63C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x63C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x63C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x63C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x63C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x63C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x63C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x63C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x63C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x640 "DOC0EXPD272,"
hexmask.long.word 0x640 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x640 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x640 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x640 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x640 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x640 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x640 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x640 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x640 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x644 "DOC0EXPD273,"
hexmask.long.word 0x644 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x644 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x644 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x644 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x644 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x644 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x644 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x644 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x644 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x648 "DOC0EXPD274,"
hexmask.long.word 0x648 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x648 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x648 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x648 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x648 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x648 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x648 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x648 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x648 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x64C "DOC0EXPD275,"
hexmask.long.word 0x64C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x64C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x64C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x64C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x64C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x64C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x64C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x64C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x64C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x650 "DOC0EXPD276,"
hexmask.long.word 0x650 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x650 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x650 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x650 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x650 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x650 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x650 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x650 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x650 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x654 "DOC0EXPD277,"
hexmask.long.word 0x654 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x654 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x654 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x654 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x654 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x654 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x654 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x654 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x654 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x658 "DOC0EXPD278,"
hexmask.long.word 0x658 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x658 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x658 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x658 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x658 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x658 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x658 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x658 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x658 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x65C "DOC0EXPD279,"
hexmask.long.word 0x65C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x65C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x65C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x65C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x65C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x65C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x65C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x65C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x65C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x660 "DOC0EXPD280,"
hexmask.long.word 0x660 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x660 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x660 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x660 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x660 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x660 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x660 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x660 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x660 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x664 "DOC0EXPD281,"
hexmask.long.word 0x664 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x664 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x664 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x664 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x664 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x664 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x664 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x664 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x664 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x668 "DOC0EXPD282,"
hexmask.long.word 0x668 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x668 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x668 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x668 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x668 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x668 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x668 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x668 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x668 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x66C "DOC0EXPD283,"
hexmask.long.word 0x66C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x66C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x66C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x66C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x66C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x66C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x66C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x66C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x66C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x670 "DOC0EXPD284,"
hexmask.long.word 0x670 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x670 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x670 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x670 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x670 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x670 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x670 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x670 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x670 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x674 "DOC0EXPD285,"
hexmask.long.word 0x674 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x674 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x674 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x674 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x674 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x674 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x674 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x674 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x674 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x678 "DOC0EXPD286,"
hexmask.long.word 0x678 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x678 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x678 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x678 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x678 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x678 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x678 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x678 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x678 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x67C "DOC0EXPD287,"
hexmask.long.word 0x67C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x67C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x67C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x67C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x67C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x67C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x67C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x67C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x67C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x680 "DOC0EXPD288,"
hexmask.long.word 0x680 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x680 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x680 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x680 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x680 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x680 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x680 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x680 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x680 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x684 "DOC0EXPD289,"
hexmask.long.word 0x684 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x684 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x684 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x684 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x684 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x684 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x684 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x684 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x684 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x688 "DOC0EXPD290,"
hexmask.long.word 0x688 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x688 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x688 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x688 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x688 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x688 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x688 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x688 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x688 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x68C "DOC0EXPD291,"
hexmask.long.word 0x68C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x68C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x68C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x68C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x68C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x68C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x68C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x68C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x68C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x690 "DOC0EXPD292,"
hexmask.long.word 0x690 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x690 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x690 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x690 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x690 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x690 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x690 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x690 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x690 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x694 "DOC0EXPD293,"
hexmask.long.word 0x694 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x694 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x694 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x694 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x694 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x694 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x694 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x694 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x694 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x698 "DOC0EXPD294,"
hexmask.long.word 0x698 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x698 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x698 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x698 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x698 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x698 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x698 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x698 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x698 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x69C "DOC0EXPD295,"
hexmask.long.word 0x69C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x69C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x69C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x69C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x69C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x69C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x69C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x69C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x69C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A0 "DOC0EXPD296,"
hexmask.long.word 0x6A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A4 "DOC0EXPD297,"
hexmask.long.word 0x6A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A8 "DOC0EXPD298,"
hexmask.long.word 0x6A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6AC "DOC0EXPD299,"
hexmask.long.word 0x6AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B0 "DOC0EXPD300,"
hexmask.long.word 0x6B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B4 "DOC0EXPD301,"
hexmask.long.word 0x6B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B8 "DOC0EXPD302,"
hexmask.long.word 0x6B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6BC "DOC0EXPD303,"
hexmask.long.word 0x6BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C0 "DOC0EXPD304,"
hexmask.long.word 0x6C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C4 "DOC0EXPD305,"
hexmask.long.word 0x6C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C8 "DOC0EXPD306,"
hexmask.long.word 0x6C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6CC "DOC0EXPD307,"
hexmask.long.word 0x6CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D0 "DOC0EXPD308,"
hexmask.long.word 0x6D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D4 "DOC0EXPD309,"
hexmask.long.word 0x6D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D8 "DOC0EXPD310,"
hexmask.long.word 0x6D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6DC "DOC0EXPD311,"
hexmask.long.word 0x6DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E0 "DOC0EXPD312,"
hexmask.long.word 0x6E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E4 "DOC0EXPD313,"
hexmask.long.word 0x6E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E8 "DOC0EXPD314,"
hexmask.long.word 0x6E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6EC "DOC0EXPD315,"
hexmask.long.word 0x6EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F0 "DOC0EXPD316,"
hexmask.long.word 0x6F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F4 "DOC0EXPD317,"
hexmask.long.word 0x6F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F8 "DOC0EXPD318,"
hexmask.long.word 0x6F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6FC "DOC0EXPD319,"
hexmask.long.word 0x6FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x700 "DOC0EXPD320,"
hexmask.long.word 0x700 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x700 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x700 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x700 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x700 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x700 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x700 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x700 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x700 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x704 "DOC0EXPD321,"
hexmask.long.word 0x704 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x704 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x704 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x704 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x704 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x704 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x704 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x704 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x704 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x708 "DOC0EXPD322,"
hexmask.long.word 0x708 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x708 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x708 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x708 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x708 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x708 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x708 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x708 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x708 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x70C "DOC0EXPD323,"
hexmask.long.word 0x70C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x70C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x70C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x70C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x70C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x70C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x70C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x70C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x70C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x710 "DOC0EXPD324,"
hexmask.long.word 0x710 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x710 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x710 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x710 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x710 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x710 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x710 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x710 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x710 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x714 "DOC0EXPD325,"
hexmask.long.word 0x714 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x714 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x714 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x714 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x714 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x714 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x714 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x714 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x714 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x718 "DOC0EXPD326,"
hexmask.long.word 0x718 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x718 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x718 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x718 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x718 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x718 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x718 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x718 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x718 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x71C "DOC0EXPD327,"
hexmask.long.word 0x71C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x71C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x71C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x71C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x71C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x71C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x71C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x71C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x71C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x720 "DOC0EXPD328,"
hexmask.long.word 0x720 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x720 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x720 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x720 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x720 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x720 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x720 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x720 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x720 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x724 "DOC0EXPD329,"
hexmask.long.word 0x724 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x724 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x724 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x724 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x724 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x724 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x724 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x724 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x724 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x728 "DOC0EXPD330,"
hexmask.long.word 0x728 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x728 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x728 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x728 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x728 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x728 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x728 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x728 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x728 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x72C "DOC0EXPD331,"
hexmask.long.word 0x72C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x72C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x72C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x72C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x72C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x72C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x72C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x72C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x72C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x730 "DOC0EXPD332,"
hexmask.long.word 0x730 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x730 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x730 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x730 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x730 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x730 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x730 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x730 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x730 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x734 "DOC0EXPD333,"
hexmask.long.word 0x734 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x734 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x734 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x734 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x734 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x734 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x734 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x734 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x734 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x738 "DOC0EXPD334,"
hexmask.long.word 0x738 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x738 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x738 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x738 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x738 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x738 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x738 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x738 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x738 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x73C "DOC0EXPD335,"
hexmask.long.word 0x73C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x73C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x73C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x73C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x73C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x73C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x73C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x73C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x73C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x740 "DOC0EXPD336,"
hexmask.long.word 0x740 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x740 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x740 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x740 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x740 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x740 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x740 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x740 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x740 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x744 "DOC0EXPD337,"
hexmask.long.word 0x744 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x744 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x744 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x744 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x744 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x744 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x744 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x744 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x744 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x748 "DOC0EXPD338,"
hexmask.long.word 0x748 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x748 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x748 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x748 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x748 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x748 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x748 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x748 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x748 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x74C "DOC0EXPD339,"
hexmask.long.word 0x74C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x74C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x74C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x74C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x74C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x74C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x74C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x74C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x74C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x750 "DOC0EXPD340,"
hexmask.long.word 0x750 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x750 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x750 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x750 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x750 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x750 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x750 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x750 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x750 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x754 "DOC0EXPD341,"
hexmask.long.word 0x754 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x754 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x754 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x754 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x754 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x754 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x754 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x754 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x754 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x758 "DOC0EXPD342,"
hexmask.long.word 0x758 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x758 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x758 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x758 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x758 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x758 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x758 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x758 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x758 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x75C "DOC0EXPD343,"
hexmask.long.word 0x75C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x75C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x75C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x75C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x75C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x75C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x75C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x75C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x75C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x760 "DOC0EXPD344,"
hexmask.long.word 0x760 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x760 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x760 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x760 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x760 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x760 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x760 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x760 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x760 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x764 "DOC0EXPD345,"
hexmask.long.word 0x764 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x764 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x764 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x764 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x764 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x764 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x764 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x764 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x764 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x768 "DOC0EXPD346,"
hexmask.long.word 0x768 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x768 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x768 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x768 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x768 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x768 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x768 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x768 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x768 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x76C "DOC0EXPD347,"
hexmask.long.word 0x76C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x76C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x76C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x76C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x76C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x76C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x76C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x76C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x76C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x770 "DOC0EXPD348,"
hexmask.long.word 0x770 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x770 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x770 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x770 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x770 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x770 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x770 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x770 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x770 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x774 "DOC0EXPD349,"
hexmask.long.word 0x774 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x774 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x774 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x774 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x774 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x774 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x774 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x774 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x774 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x778 "DOC0EXPD350,"
hexmask.long.word 0x778 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x778 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x778 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x778 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x778 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x778 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x778 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x778 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x778 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x77C "DOC0EXPD351,"
hexmask.long.word 0x77C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x77C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x77C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x77C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x77C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x77C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x77C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x77C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x77C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x780 "DOC0EXPD352,"
hexmask.long.word 0x780 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x780 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x780 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x780 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x780 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x780 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x780 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x780 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x780 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x784 "DOC0EXPD353,"
hexmask.long.word 0x784 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x784 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x784 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x784 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x784 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x784 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x784 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x784 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x784 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x788 "DOC0EXPD354,"
hexmask.long.word 0x788 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x788 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x788 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x788 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x788 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x788 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x788 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x788 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x788 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x78C "DOC0EXPD355,"
hexmask.long.word 0x78C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x78C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x78C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x78C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x78C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x78C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x78C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x78C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x78C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x790 "DOC0EXPD356,"
hexmask.long.word 0x790 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x790 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x790 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x790 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x790 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x790 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x790 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x790 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x790 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x794 "DOC0EXPD357,"
hexmask.long.word 0x794 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x794 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x794 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x794 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x794 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x794 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x794 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x794 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x794 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x798 "DOC0EXPD358,"
hexmask.long.word 0x798 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x798 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x798 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x798 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x798 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x798 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x798 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x798 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x798 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x79C "DOC0EXPD359,"
hexmask.long.word 0x79C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x79C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x79C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x79C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x79C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x79C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x79C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x79C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x79C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A0 "DOC0EXPD360,"
hexmask.long.word 0x7A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A4 "DOC0EXPD361,"
hexmask.long.word 0x7A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A8 "DOC0EXPD362,"
hexmask.long.word 0x7A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7AC "DOC0EXPD363,"
hexmask.long.word 0x7AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B0 "DOC0EXPD364,"
hexmask.long.word 0x7B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B4 "DOC0EXPD365,"
hexmask.long.word 0x7B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B8 "DOC0EXPD366,"
hexmask.long.word 0x7B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7BC "DOC0EXPD367,"
hexmask.long.word 0x7BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C0 "DOC0EXPD368,"
hexmask.long.word 0x7C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C4 "DOC0EXPD369,"
hexmask.long.word 0x7C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C8 "DOC0EXPD370,"
hexmask.long.word 0x7C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7CC "DOC0EXPD371,"
hexmask.long.word 0x7CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D0 "DOC0EXPD372,"
hexmask.long.word 0x7D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D4 "DOC0EXPD373,"
hexmask.long.word 0x7D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D8 "DOC0EXPD374,"
hexmask.long.word 0x7D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7DC "DOC0EXPD375,"
hexmask.long.word 0x7DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E0 "DOC0EXPD376,"
hexmask.long.word 0x7E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E4 "DOC0EXPD377,"
hexmask.long.word 0x7E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E8 "DOC0EXPD378,"
hexmask.long.word 0x7E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7EC "DOC0EXPD379,"
hexmask.long.word 0x7EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F0 "DOC0EXPD380,"
hexmask.long.word 0x7F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F4 "DOC0EXPD381,"
hexmask.long.word 0x7F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F8 "DOC0EXPD382,"
hexmask.long.word 0x7F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7FC "DOC0EXPD383,"
hexmask.long.word 0x7FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x800 "DOC0EXPD384,"
hexmask.long.word 0x800 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x800 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x800 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x800 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x800 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x800 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x800 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x800 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x800 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x804 "DOC0EXPD385,"
hexmask.long.word 0x804 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x804 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x804 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x804 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x804 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x804 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x804 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x804 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x804 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x808 "DOC0EXPD386,"
hexmask.long.word 0x808 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x808 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x808 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x808 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x808 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x808 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x808 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x808 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x808 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x80C "DOC0EXPD387,"
hexmask.long.word 0x80C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x80C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x80C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x80C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x80C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x80C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x80C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x80C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x80C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x810 "DOC0EXPD388,"
hexmask.long.word 0x810 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x810 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x810 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x810 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x810 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x810 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x810 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x810 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x810 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x814 "DOC0EXPD389,"
hexmask.long.word 0x814 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x814 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x814 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x814 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x814 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x814 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x814 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x814 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x814 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x818 "DOC0EXPD390,"
hexmask.long.word 0x818 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x818 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x818 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x818 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x818 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x818 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x818 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x818 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x818 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x81C "DOC0EXPD391,"
hexmask.long.word 0x81C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x81C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x81C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x81C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x81C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x81C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x81C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x81C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x81C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x820 "DOC0EXPD392,"
hexmask.long.word 0x820 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x820 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x820 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x820 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x820 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x820 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x820 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x820 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x820 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x824 "DOC0EXPD393,"
hexmask.long.word 0x824 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x824 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x824 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x824 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x824 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x824 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x824 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x824 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x824 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x828 "DOC0EXPD394,"
hexmask.long.word 0x828 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x828 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x828 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x828 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x828 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x828 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x828 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x828 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x828 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x82C "DOC0EXPD395,"
hexmask.long.word 0x82C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x82C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x82C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x82C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x82C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x82C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x82C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x82C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x82C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x830 "DOC0EXPD396,"
hexmask.long.word 0x830 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x830 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x830 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x830 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x830 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x830 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x830 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x830 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x830 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x834 "DOC0EXPD397,"
hexmask.long.word 0x834 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x834 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x834 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x834 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x834 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x834 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x834 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x834 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x834 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x838 "DOC0EXPD398,"
hexmask.long.word 0x838 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x838 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x838 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x838 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x838 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x838 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x838 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x838 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x838 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x83C "DOC0EXPD399,"
hexmask.long.word 0x83C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x83C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x83C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x83C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x83C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x83C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x83C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x83C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x83C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x840 "DOC0EXPD400,"
hexmask.long.word 0x840 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x840 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x840 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x840 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x840 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x840 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x840 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x840 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x840 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x844 "DOC0EXPD401,"
hexmask.long.word 0x844 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x844 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x844 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x844 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x844 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x844 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x844 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x844 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x844 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x848 "DOC0EXPD402,"
hexmask.long.word 0x848 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x848 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x848 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x848 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x848 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x848 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x848 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x848 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x848 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x84C "DOC0EXPD403,"
hexmask.long.word 0x84C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x84C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x84C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x84C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x84C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x84C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x84C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x84C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x84C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x850 "DOC0EXPD404,"
hexmask.long.word 0x850 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x850 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x850 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x850 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x850 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x850 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x850 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x850 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x850 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x854 "DOC0EXPD405,"
hexmask.long.word 0x854 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x854 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x854 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x854 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x854 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x854 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x854 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x854 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x854 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x858 "DOC0EXPD406,"
hexmask.long.word 0x858 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x858 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x858 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x858 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x858 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x858 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x858 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x858 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x858 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x85C "DOC0EXPD407,"
hexmask.long.word 0x85C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x85C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x85C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x85C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x85C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x85C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x85C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x85C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x85C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x860 "DOC0EXPD408,"
hexmask.long.word 0x860 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x860 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x860 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x860 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x860 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x860 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x860 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x860 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x860 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x864 "DOC0EXPD409,"
hexmask.long.word 0x864 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x864 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x864 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x864 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x864 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x864 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x864 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x864 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x864 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x868 "DOC0EXPD410,"
hexmask.long.word 0x868 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x868 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x868 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x868 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x868 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x868 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x868 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x868 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x868 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x86C "DOC0EXPD411,"
hexmask.long.word 0x86C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x86C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x86C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x86C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x86C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x86C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x86C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x86C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x86C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x870 "DOC0EXPD412,"
hexmask.long.word 0x870 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x870 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x870 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x870 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x870 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x870 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x870 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x870 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x870 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x874 "DOC0EXPD413,"
hexmask.long.word 0x874 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x874 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x874 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x874 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x874 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x874 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x874 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x874 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x874 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x878 "DOC0EXPD414,"
hexmask.long.word 0x878 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x878 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x878 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x878 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x878 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x878 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x878 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x878 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x878 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x87C "DOC0EXPD415,"
hexmask.long.word 0x87C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x87C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x87C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x87C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x87C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x87C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x87C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x87C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x87C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x880 "DOC0EXPD416,"
hexmask.long.word 0x880 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x880 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x880 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x880 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x880 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x880 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x880 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x880 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x880 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x884 "DOC0EXPD417,"
hexmask.long.word 0x884 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x884 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x884 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x884 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x884 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x884 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x884 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x884 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x884 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x888 "DOC0EXPD418,"
hexmask.long.word 0x888 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x888 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x888 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x888 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x888 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x888 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x888 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x888 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x888 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x88C "DOC0EXPD419,"
hexmask.long.word 0x88C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x88C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x88C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x88C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x88C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x88C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x88C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x88C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x88C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x890 "DOC0EXPD420,"
hexmask.long.word 0x890 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x890 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x890 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x890 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x890 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x890 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x890 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x890 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x890 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x894 "DOC0EXPD421,"
hexmask.long.word 0x894 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x894 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x894 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x894 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x894 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x894 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x894 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x894 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x894 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x898 "DOC0EXPD422,"
hexmask.long.word 0x898 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x898 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x898 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x898 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x898 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x898 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x898 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x898 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x898 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x89C "DOC0EXPD423,"
hexmask.long.word 0x89C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x89C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x89C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x89C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x89C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x89C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x89C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x89C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x89C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A0 "DOC0EXPD424,"
hexmask.long.word 0x8A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A4 "DOC0EXPD425,"
hexmask.long.word 0x8A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A8 "DOC0EXPD426,"
hexmask.long.word 0x8A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8AC "DOC0EXPD427,"
hexmask.long.word 0x8AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B0 "DOC0EXPD428,"
hexmask.long.word 0x8B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B4 "DOC0EXPD429,"
hexmask.long.word 0x8B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B8 "DOC0EXPD430,"
hexmask.long.word 0x8B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8BC "DOC0EXPD431,"
hexmask.long.word 0x8BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C0 "DOC0EXPD432,"
hexmask.long.word 0x8C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C4 "DOC0EXPD433,"
hexmask.long.word 0x8C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C8 "DOC0EXPD434,"
hexmask.long.word 0x8C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8CC "DOC0EXPD435,"
hexmask.long.word 0x8CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D0 "DOC0EXPD436,"
hexmask.long.word 0x8D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D4 "DOC0EXPD437,"
hexmask.long.word 0x8D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D8 "DOC0EXPD438,"
hexmask.long.word 0x8D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8DC "DOC0EXPD439,"
hexmask.long.word 0x8DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E0 "DOC0EXPD440,"
hexmask.long.word 0x8E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E4 "DOC0EXPD441,"
hexmask.long.word 0x8E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E8 "DOC0EXPD442,"
hexmask.long.word 0x8E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8EC "DOC0EXPD443,"
hexmask.long.word 0x8EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F0 "DOC0EXPD444,"
hexmask.long.word 0x8F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F4 "DOC0EXPD445,"
hexmask.long.word 0x8F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F8 "DOC0EXPD446,"
hexmask.long.word 0x8F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8FC "DOC0EXPD447,"
hexmask.long.word 0x8FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x900 "DOC0EXPD448,"
hexmask.long.word 0x900 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x900 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x900 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x900 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x900 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x900 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x900 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x900 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x900 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x904 "DOC0EXPD449,"
hexmask.long.word 0x904 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x904 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x904 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x904 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x904 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x904 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x904 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x904 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x904 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x908 "DOC0EXPD450,"
hexmask.long.word 0x908 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x908 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x908 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x908 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x908 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x908 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x908 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x908 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x908 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x90C "DOC0EXPD451,"
hexmask.long.word 0x90C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x90C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x90C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x90C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x90C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x90C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x90C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x90C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x90C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x910 "DOC0EXPD452,"
hexmask.long.word 0x910 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x910 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x910 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x910 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x910 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x910 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x910 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x910 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x910 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x914 "DOC0EXPD453,"
hexmask.long.word 0x914 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x914 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x914 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x914 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x914 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x914 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x914 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x914 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x914 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x918 "DOC0EXPD454,"
hexmask.long.word 0x918 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x918 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x918 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x918 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x918 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x918 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x918 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x918 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x918 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x91C "DOC0EXPD455,"
hexmask.long.word 0x91C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x91C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x91C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x91C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x91C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x91C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x91C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x91C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x91C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x920 "DOC0EXPD456,"
hexmask.long.word 0x920 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x920 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x920 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x920 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x920 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x920 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x920 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x920 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x920 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x924 "DOC0EXPD457,"
hexmask.long.word 0x924 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x924 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x924 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x924 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x924 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x924 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x924 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x924 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x924 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x928 "DOC0EXPD458,"
hexmask.long.word 0x928 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x928 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x928 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x928 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x928 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x928 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x928 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x928 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x928 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x92C "DOC0EXPD459,"
hexmask.long.word 0x92C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x92C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x92C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x92C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x92C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x92C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x92C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x92C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x92C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x930 "DOC0EXPD460,"
hexmask.long.word 0x930 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x930 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x930 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x930 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x930 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x930 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x930 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x930 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x930 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x934 "DOC0EXPD461,"
hexmask.long.word 0x934 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x934 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x934 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x934 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x934 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x934 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x934 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x934 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x934 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x938 "DOC0EXPD462,"
hexmask.long.word 0x938 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x938 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x938 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x938 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x938 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x938 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x938 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x938 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x938 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x93C "DOC0EXPD463,"
hexmask.long.word 0x93C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x93C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x93C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x93C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x93C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x93C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x93C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x93C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x93C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x940 "DOC0EXPD464,"
hexmask.long.word 0x940 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x940 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x940 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x940 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x940 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x940 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x940 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x940 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x940 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x944 "DOC0EXPD465,"
hexmask.long.word 0x944 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x944 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x944 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x944 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x944 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x944 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x944 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x944 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x944 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x948 "DOC0EXPD466,"
hexmask.long.word 0x948 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x948 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x948 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x948 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x948 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x948 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x948 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x948 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x948 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x94C "DOC0EXPD467,"
hexmask.long.word 0x94C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x94C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x94C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x94C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x94C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x94C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x94C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x94C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x94C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x950 "DOC0EXPD468,"
hexmask.long.word 0x950 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x950 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x950 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x950 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x950 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x950 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x950 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x950 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x950 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x954 "DOC0EXPD469,"
hexmask.long.word 0x954 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x954 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x954 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x954 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x954 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x954 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x954 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x954 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x954 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x958 "DOC0EXPD470,"
hexmask.long.word 0x958 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x958 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x958 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x958 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x958 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x958 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x958 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x958 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x958 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x95C "DOC0EXPD471,"
hexmask.long.word 0x95C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x95C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x95C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x95C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x95C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x95C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x95C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x95C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x95C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x960 "DOC0EXPD472,"
hexmask.long.word 0x960 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x960 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x960 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x960 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x960 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x960 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x960 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x960 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x960 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x964 "DOC0EXPD473,"
hexmask.long.word 0x964 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x964 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x964 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x964 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x964 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x964 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x964 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x964 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x964 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x968 "DOC0EXPD474,"
hexmask.long.word 0x968 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x968 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x968 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x968 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x968 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x968 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x968 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x968 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x968 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x96C "DOC0EXPD475,"
hexmask.long.word 0x96C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x96C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x96C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x96C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x96C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x96C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x96C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x96C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x96C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x970 "DOC0EXPD476,"
hexmask.long.word 0x970 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x970 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x970 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x970 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x970 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x970 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x970 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x970 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x970 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x974 "DOC0EXPD477,"
hexmask.long.word 0x974 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x974 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x974 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x974 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x974 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x974 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x974 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x974 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x974 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x978 "DOC0EXPD478,"
hexmask.long.word 0x978 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x978 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x978 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x978 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x978 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x978 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x978 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x978 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x978 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x97C "DOC0EXPD479,"
hexmask.long.word 0x97C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x97C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x97C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x97C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x97C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x97C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x97C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x97C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x97C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x980 "DOC0EXPD480,"
hexmask.long.word 0x980 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x980 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x980 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x980 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x980 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x980 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x980 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x980 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x980 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x984 "DOC0EXPD481,"
hexmask.long.word 0x984 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x984 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x984 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x984 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x984 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x984 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x984 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x984 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x984 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x988 "DOC0EXPD482,"
hexmask.long.word 0x988 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x988 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x988 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x988 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x988 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x988 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x988 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x988 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x988 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x98C "DOC0EXPD483,"
hexmask.long.word 0x98C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x98C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x98C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x98C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x98C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x98C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x98C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x98C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x98C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x990 "DOC0EXPD484,"
hexmask.long.word 0x990 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x990 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x990 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x990 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x990 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x990 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x990 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x990 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x990 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x994 "DOC0EXPD485,"
hexmask.long.word 0x994 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x994 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x994 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x994 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x994 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x994 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x994 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x994 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x994 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x998 "DOC0EXPD486,"
hexmask.long.word 0x998 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x998 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x998 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x998 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x998 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x998 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x998 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x998 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x998 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x99C "DOC0EXPD487,"
hexmask.long.word 0x99C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x99C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x99C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x99C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x99C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x99C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x99C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x99C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x99C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A0 "DOC0EXPD488,"
hexmask.long.word 0x9A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A4 "DOC0EXPD489,"
hexmask.long.word 0x9A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A8 "DOC0EXPD490,"
hexmask.long.word 0x9A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9AC "DOC0EXPD491,"
hexmask.long.word 0x9AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B0 "DOC0EXPD492,"
hexmask.long.word 0x9B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B4 "DOC0EXPD493,"
hexmask.long.word 0x9B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B8 "DOC0EXPD494,"
hexmask.long.word 0x9B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9BC "DOC0EXPD495,"
hexmask.long.word 0x9BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C0 "DOC0EXPD496,"
hexmask.long.word 0x9C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C4 "DOC0EXPD497,"
hexmask.long.word 0x9C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C8 "DOC0EXPD498,"
hexmask.long.word 0x9C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9CC "DOC0EXPD499,"
hexmask.long.word 0x9CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D0 "DOC0EXPD500,"
hexmask.long.word 0x9D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D4 "DOC0EXPD501,"
hexmask.long.word 0x9D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D8 "DOC0EXPD502,"
hexmask.long.word 0x9D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9DC "DOC0EXPD503,"
hexmask.long.word 0x9DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E0 "DOC0EXPD504,"
hexmask.long.word 0x9E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E4 "DOC0EXPD505,"
hexmask.long.word 0x9E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E8 "DOC0EXPD506,"
hexmask.long.word 0x9E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9EC "DOC0EXPD507,"
hexmask.long.word 0x9EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F0 "DOC0EXPD508,"
hexmask.long.word 0x9F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F4 "DOC0EXPD509,"
hexmask.long.word 0x9F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F8 "DOC0EXPD510,"
hexmask.long.word 0x9F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9FC "DOC0EXPD511,"
hexmask.long.word 0x9FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA00 "DOC0EXPD512,"
hexmask.long.word 0xA00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA04 "DOC0EXPD513,"
hexmask.long.word 0xA04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA08 "DOC0EXPD514,"
hexmask.long.word 0xA08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA0C "DOC0EXPD515,"
hexmask.long.word 0xA0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA10 "DOC0EXPD516,"
hexmask.long.word 0xA10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA14 "DOC0EXPD517,"
hexmask.long.word 0xA14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA18 "DOC0EXPD518,"
hexmask.long.word 0xA18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA1C "DOC0EXPD519,"
hexmask.long.word 0xA1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA20 "DOC0EXPD520,"
hexmask.long.word 0xA20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA24 "DOC0EXPD521,"
hexmask.long.word 0xA24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA28 "DOC0EXPD522,"
hexmask.long.word 0xA28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA2C "DOC0EXPD523,"
hexmask.long.word 0xA2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA30 "DOC0EXPD524,"
hexmask.long.word 0xA30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA34 "DOC0EXPD525,"
hexmask.long.word 0xA34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA38 "DOC0EXPD526,"
hexmask.long.word 0xA38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA3C "DOC0EXPD527,"
hexmask.long.word 0xA3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA40 "DOC0EXPD528,"
hexmask.long.word 0xA40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA44 "DOC0EXPD529,"
hexmask.long.word 0xA44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA48 "DOC0EXPD530,"
hexmask.long.word 0xA48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA4C "DOC0EXPD531,"
hexmask.long.word 0xA4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA50 "DOC0EXPD532,"
hexmask.long.word 0xA50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA54 "DOC0EXPD533,"
hexmask.long.word 0xA54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA58 "DOC0EXPD534,"
hexmask.long.word 0xA58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA5C "DOC0EXPD535,"
hexmask.long.word 0xA5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA60 "DOC0EXPD536,"
hexmask.long.word 0xA60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA64 "DOC0EXPD537,"
hexmask.long.word 0xA64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA68 "DOC0EXPD538,"
hexmask.long.word 0xA68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA6C "DOC0EXPD539,"
hexmask.long.word 0xA6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA70 "DOC0EXPD540,"
hexmask.long.word 0xA70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA74 "DOC0EXPD541,"
hexmask.long.word 0xA74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA78 "DOC0EXPD542,"
hexmask.long.word 0xA78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA7C "DOC0EXPD543,"
hexmask.long.word 0xA7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA80 "DOC0EXPD544,"
hexmask.long.word 0xA80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA84 "DOC0EXPD545,"
hexmask.long.word 0xA84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA88 "DOC0EXPD546,"
hexmask.long.word 0xA88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA8C "DOC0EXPD547,"
hexmask.long.word 0xA8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA90 "DOC0EXPD548,"
hexmask.long.word 0xA90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA94 "DOC0EXPD549,"
hexmask.long.word 0xA94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA98 "DOC0EXPD550,"
hexmask.long.word 0xA98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA9C "DOC0EXPD551,"
hexmask.long.word 0xA9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA0 "DOC0EXPD552,"
hexmask.long.word 0xAA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA4 "DOC0EXPD553,"
hexmask.long.word 0xAA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA8 "DOC0EXPD554,"
hexmask.long.word 0xAA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAAC "DOC0EXPD555,"
hexmask.long.word 0xAAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB0 "DOC0EXPD556,"
hexmask.long.word 0xAB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB4 "DOC0EXPD557,"
hexmask.long.word 0xAB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB8 "DOC0EXPD558,"
hexmask.long.word 0xAB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xABC "DOC0EXPD559,"
hexmask.long.word 0xABC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xABC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xABC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xABC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xABC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xABC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xABC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xABC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xABC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC0 "DOC0EXPD560,"
hexmask.long.word 0xAC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC4 "DOC0EXPD561,"
hexmask.long.word 0xAC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC8 "DOC0EXPD562,"
hexmask.long.word 0xAC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xACC "DOC0EXPD563,"
hexmask.long.word 0xACC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xACC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xACC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xACC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xACC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xACC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xACC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xACC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xACC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD0 "DOC0EXPD564,"
hexmask.long.word 0xAD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD4 "DOC0EXPD565,"
hexmask.long.word 0xAD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD8 "DOC0EXPD566,"
hexmask.long.word 0xAD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xADC "DOC0EXPD567,"
hexmask.long.word 0xADC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xADC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xADC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xADC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xADC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xADC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xADC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xADC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xADC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE0 "DOC0EXPD568,"
hexmask.long.word 0xAE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE4 "DOC0EXPD569,"
hexmask.long.word 0xAE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE8 "DOC0EXPD570,"
hexmask.long.word 0xAE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAEC "DOC0EXPD571,"
hexmask.long.word 0xAEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF0 "DOC0EXPD572,"
hexmask.long.word 0xAF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF4 "DOC0EXPD573,"
hexmask.long.word 0xAF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF8 "DOC0EXPD574,"
hexmask.long.word 0xAF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAFC "DOC0EXPD575,"
hexmask.long.word 0xAFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB00 "DOC0EXPD576,"
hexmask.long.word 0xB00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB04 "DOC0EXPD577,"
hexmask.long.word 0xB04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB08 "DOC0EXPD578,"
hexmask.long.word 0xB08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB0C "DOC0EXPD579,"
hexmask.long.word 0xB0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB10 "DOC0EXPD580,"
hexmask.long.word 0xB10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB14 "DOC0EXPD581,"
hexmask.long.word 0xB14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB18 "DOC0EXPD582,"
hexmask.long.word 0xB18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB1C "DOC0EXPD583,"
hexmask.long.word 0xB1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB20 "DOC0EXPD584,"
hexmask.long.word 0xB20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB24 "DOC0EXPD585,"
hexmask.long.word 0xB24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB28 "DOC0EXPD586,"
hexmask.long.word 0xB28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB2C "DOC0EXPD587,"
hexmask.long.word 0xB2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB30 "DOC0EXPD588,"
hexmask.long.word 0xB30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB34 "DOC0EXPD589,"
hexmask.long.word 0xB34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB38 "DOC0EXPD590,"
hexmask.long.word 0xB38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB3C "DOC0EXPD591,"
hexmask.long.word 0xB3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB40 "DOC0EXPD592,"
hexmask.long.word 0xB40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB44 "DOC0EXPD593,"
hexmask.long.word 0xB44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB48 "DOC0EXPD594,"
hexmask.long.word 0xB48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB4C "DOC0EXPD595,"
hexmask.long.word 0xB4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB50 "DOC0EXPD596,"
hexmask.long.word 0xB50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB54 "DOC0EXPD597,"
hexmask.long.word 0xB54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB58 "DOC0EXPD598,"
hexmask.long.word 0xB58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB5C "DOC0EXPD599,"
hexmask.long.word 0xB5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB60 "DOC0EXPD600,"
hexmask.long.word 0xB60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB64 "DOC0EXPD601,"
hexmask.long.word 0xB64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB68 "DOC0EXPD602,"
hexmask.long.word 0xB68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB6C "DOC0EXPD603,"
hexmask.long.word 0xB6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB70 "DOC0EXPD604,"
hexmask.long.word 0xB70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB74 "DOC0EXPD605,"
hexmask.long.word 0xB74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB78 "DOC0EXPD606,"
hexmask.long.word 0xB78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB7C "DOC0EXPD607,"
hexmask.long.word 0xB7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB80 "DOC0EXPD608,"
hexmask.long.word 0xB80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB84 "DOC0EXPD609,"
hexmask.long.word 0xB84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB88 "DOC0EXPD610,"
hexmask.long.word 0xB88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB8C "DOC0EXPD611,"
hexmask.long.word 0xB8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB90 "DOC0EXPD612,"
hexmask.long.word 0xB90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB94 "DOC0EXPD613,"
hexmask.long.word 0xB94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB98 "DOC0EXPD614,"
hexmask.long.word 0xB98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB9C "DOC0EXPD615,"
hexmask.long.word 0xB9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA0 "DOC0EXPD616,"
hexmask.long.word 0xBA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA4 "DOC0EXPD617,"
hexmask.long.word 0xBA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA8 "DOC0EXPD618,"
hexmask.long.word 0xBA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBAC "DOC0EXPD619,"
hexmask.long.word 0xBAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB0 "DOC0EXPD620,"
hexmask.long.word 0xBB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB4 "DOC0EXPD621,"
hexmask.long.word 0xBB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB8 "DOC0EXPD622,"
hexmask.long.word 0xBB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBBC "DOC0EXPD623,"
hexmask.long.word 0xBBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC0 "DOC0EXPD624,"
hexmask.long.word 0xBC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC4 "DOC0EXPD625,"
hexmask.long.word 0xBC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC8 "DOC0EXPD626,"
hexmask.long.word 0xBC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBCC "DOC0EXPD627,"
hexmask.long.word 0xBCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD0 "DOC0EXPD628,"
hexmask.long.word 0xBD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD4 "DOC0EXPD629,"
hexmask.long.word 0xBD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD8 "DOC0EXPD630,"
hexmask.long.word 0xBD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBDC "DOC0EXPD631,"
hexmask.long.word 0xBDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE0 "DOC0EXPD632,"
hexmask.long.word 0xBE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE4 "DOC0EXPD633,"
hexmask.long.word 0xBE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE8 "DOC0EXPD634,"
hexmask.long.word 0xBE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBEC "DOC0EXPD635,"
hexmask.long.word 0xBEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF0 "DOC0EXPD636,"
hexmask.long.word 0xBF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF4 "DOC0EXPD637,"
hexmask.long.word 0xBF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF8 "DOC0EXPD638,"
hexmask.long.word 0xBF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBFC "DOC0EXPD639,"
hexmask.long.word 0xBFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC00 "DOC0EXPD640,"
hexmask.long.word 0xC00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC04 "DOC0EXPD641,"
hexmask.long.word 0xC04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC08 "DOC0EXPD642,"
hexmask.long.word 0xC08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC0C "DOC0EXPD643,"
hexmask.long.word 0xC0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC10 "DOC0EXPD644,"
hexmask.long.word 0xC10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC14 "DOC0EXPD645,"
hexmask.long.word 0xC14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC18 "DOC0EXPD646,"
hexmask.long.word 0xC18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC1C "DOC0EXPD647,"
hexmask.long.word 0xC1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC20 "DOC0EXPD648,"
hexmask.long.word 0xC20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC24 "DOC0EXPD649,"
hexmask.long.word 0xC24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC28 "DOC0EXPD650,"
hexmask.long.word 0xC28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC2C "DOC0EXPD651,"
hexmask.long.word 0xC2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC30 "DOC0EXPD652,"
hexmask.long.word 0xC30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC34 "DOC0EXPD653,"
hexmask.long.word 0xC34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC38 "DOC0EXPD654,"
hexmask.long.word 0xC38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC3C "DOC0EXPD655,"
hexmask.long.word 0xC3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC40 "DOC0EXPD656,"
hexmask.long.word 0xC40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC44 "DOC0EXPD657,"
hexmask.long.word 0xC44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC48 "DOC0EXPD658,"
hexmask.long.word 0xC48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC4C "DOC0EXPD659,"
hexmask.long.word 0xC4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC50 "DOC0EXPD660,"
hexmask.long.word 0xC50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC54 "DOC0EXPD661,"
hexmask.long.word 0xC54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC58 "DOC0EXPD662,"
hexmask.long.word 0xC58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC5C "DOC0EXPD663,"
hexmask.long.word 0xC5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC60 "DOC0EXPD664,"
hexmask.long.word 0xC60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC64 "DOC0EXPD665,"
hexmask.long.word 0xC64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC68 "DOC0EXPD666,"
hexmask.long.word 0xC68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC6C "DOC0EXPD667,"
hexmask.long.word 0xC6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC70 "DOC0EXPD668,"
hexmask.long.word 0xC70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC74 "DOC0EXPD669,"
hexmask.long.word 0xC74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC78 "DOC0EXPD670,"
hexmask.long.word 0xC78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC7C "DOC0EXPD671,"
hexmask.long.word 0xC7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC80 "DOC0EXPD672,"
hexmask.long.word 0xC80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC84 "DOC0EXPD673,"
hexmask.long.word 0xC84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC88 "DOC0EXPD674,"
hexmask.long.word 0xC88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC8C "DOC0EXPD675,"
hexmask.long.word 0xC8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC90 "DOC0EXPD676,"
hexmask.long.word 0xC90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC94 "DOC0EXPD677,"
hexmask.long.word 0xC94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC98 "DOC0EXPD678,"
hexmask.long.word 0xC98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC9C "DOC0EXPD679,"
hexmask.long.word 0xC9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA0 "DOC0EXPD680,"
hexmask.long.word 0xCA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA4 "DOC0EXPD681,"
hexmask.long.word 0xCA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA8 "DOC0EXPD682,"
hexmask.long.word 0xCA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCAC "DOC0EXPD683,"
hexmask.long.word 0xCAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB0 "DOC0EXPD684,"
hexmask.long.word 0xCB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB4 "DOC0EXPD685,"
hexmask.long.word 0xCB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB8 "DOC0EXPD686,"
hexmask.long.word 0xCB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCBC "DOC0EXPD687,"
hexmask.long.word 0xCBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC0 "DOC0EXPD688,"
hexmask.long.word 0xCC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC4 "DOC0EXPD689,"
hexmask.long.word 0xCC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC8 "DOC0EXPD690,"
hexmask.long.word 0xCC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCCC "DOC0EXPD691,"
hexmask.long.word 0xCCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD0 "DOC0EXPD692,"
hexmask.long.word 0xCD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD4 "DOC0EXPD693,"
hexmask.long.word 0xCD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD8 "DOC0EXPD694,"
hexmask.long.word 0xCD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCDC "DOC0EXPD695,"
hexmask.long.word 0xCDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE0 "DOC0EXPD696,"
hexmask.long.word 0xCE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE4 "DOC0EXPD697,"
hexmask.long.word 0xCE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE8 "DOC0EXPD698,"
hexmask.long.word 0xCE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCEC "DOC0EXPD699,"
hexmask.long.word 0xCEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF0 "DOC0EXPD700,"
hexmask.long.word 0xCF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF4 "DOC0EXPD701,"
hexmask.long.word 0xCF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF8 "DOC0EXPD702,"
hexmask.long.word 0xCF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCFC "DOC0EXPD703,"
hexmask.long.word 0xCFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD00 "DOC0EXPD704,"
hexmask.long.word 0xD00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD04 "DOC0EXPD705,"
hexmask.long.word 0xD04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD08 "DOC0EXPD706,"
hexmask.long.word 0xD08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD0C "DOC0EXPD707,"
hexmask.long.word 0xD0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD10 "DOC0EXPD708,"
hexmask.long.word 0xD10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD14 "DOC0EXPD709,"
hexmask.long.word 0xD14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD18 "DOC0EXPD710,"
hexmask.long.word 0xD18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD1C "DOC0EXPD711,"
hexmask.long.word 0xD1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD20 "DOC0EXPD712,"
hexmask.long.word 0xD20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD24 "DOC0EXPD713,"
hexmask.long.word 0xD24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD28 "DOC0EXPD714,"
hexmask.long.word 0xD28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD2C "DOC0EXPD715,"
hexmask.long.word 0xD2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD30 "DOC0EXPD716,"
hexmask.long.word 0xD30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD34 "DOC0EXPD717,"
hexmask.long.word 0xD34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD38 "DOC0EXPD718,"
hexmask.long.word 0xD38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD3C "DOC0EXPD719,"
hexmask.long.word 0xD3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD40 "DOC0EXPD720,"
hexmask.long.word 0xD40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD44 "DOC0EXPD721,"
hexmask.long.word 0xD44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD48 "DOC0EXPD722,"
hexmask.long.word 0xD48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD4C "DOC0EXPD723,"
hexmask.long.word 0xD4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD50 "DOC0EXPD724,"
hexmask.long.word 0xD50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD54 "DOC0EXPD725,"
hexmask.long.word 0xD54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD58 "DOC0EXPD726,"
hexmask.long.word 0xD58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD5C "DOC0EXPD727,"
hexmask.long.word 0xD5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD60 "DOC0EXPD728,"
hexmask.long.word 0xD60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD64 "DOC0EXPD729,"
hexmask.long.word 0xD64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD68 "DOC0EXPD730,"
hexmask.long.word 0xD68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD6C "DOC0EXPD731,"
hexmask.long.word 0xD6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD70 "DOC0EXPD732,"
hexmask.long.word 0xD70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD74 "DOC0EXPD733,"
hexmask.long.word 0xD74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD78 "DOC0EXPD734,"
hexmask.long.word 0xD78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD7C "DOC0EXPD735,"
hexmask.long.word 0xD7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD80 "DOC0EXPD736,"
hexmask.long.word 0xD80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD84 "DOC0EXPD737,"
hexmask.long.word 0xD84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD88 "DOC0EXPD738,"
hexmask.long.word 0xD88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD8C "DOC0EXPD739,"
hexmask.long.word 0xD8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD90 "DOC0EXPD740,"
hexmask.long.word 0xD90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD94 "DOC0EXPD741,"
hexmask.long.word 0xD94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD98 "DOC0EXPD742,"
hexmask.long.word 0xD98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD9C "DOC0EXPD743,"
hexmask.long.word 0xD9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA0 "DOC0EXPD744,"
hexmask.long.word 0xDA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA4 "DOC0EXPD745,"
hexmask.long.word 0xDA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA8 "DOC0EXPD746,"
hexmask.long.word 0xDA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDAC "DOC0EXPD747,"
hexmask.long.word 0xDAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB0 "DOC0EXPD748,"
hexmask.long.word 0xDB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB4 "DOC0EXPD749,"
hexmask.long.word 0xDB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB8 "DOC0EXPD750,"
hexmask.long.word 0xDB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDBC "DOC0EXPD751,"
hexmask.long.word 0xDBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC0 "DOC0EXPD752,"
hexmask.long.word 0xDC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC4 "DOC0EXPD753,"
hexmask.long.word 0xDC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC8 "DOC0EXPD754,"
hexmask.long.word 0xDC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDCC "DOC0EXPD755,"
hexmask.long.word 0xDCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD0 "DOC0EXPD756,"
hexmask.long.word 0xDD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD4 "DOC0EXPD757,"
hexmask.long.word 0xDD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD8 "DOC0EXPD758,"
hexmask.long.word 0xDD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDDC "DOC0EXPD759,"
hexmask.long.word 0xDDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE0 "DOC0EXPD760,"
hexmask.long.word 0xDE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE4 "DOC0EXPD761,"
hexmask.long.word 0xDE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE8 "DOC0EXPD762,"
hexmask.long.word 0xDE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDEC "DOC0EXPD763,"
hexmask.long.word 0xDEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF0 "DOC0EXPD764,"
hexmask.long.word 0xDF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF4 "DOC0EXPD765,"
hexmask.long.word 0xDF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF8 "DOC0EXPD766,"
hexmask.long.word 0xDF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDFC "DOC0EXPD767,"
hexmask.long.word 0xDFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE00 "DOC0EXPD768,"
hexmask.long.word 0xE00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE04 "DOC0EXPD769,"
hexmask.long.word 0xE04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE08 "DOC0EXPD770,"
hexmask.long.word 0xE08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE0C "DOC0EXPD771,"
hexmask.long.word 0xE0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE10 "DOC0EXPD772,"
hexmask.long.word 0xE10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE14 "DOC0EXPD773,"
hexmask.long.word 0xE14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE18 "DOC0EXPD774,"
hexmask.long.word 0xE18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE1C "DOC0EXPD775,"
hexmask.long.word 0xE1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE20 "DOC0EXPD776,"
hexmask.long.word 0xE20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE24 "DOC0EXPD777,"
hexmask.long.word 0xE24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE28 "DOC0EXPD778,"
hexmask.long.word 0xE28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE2C "DOC0EXPD779,"
hexmask.long.word 0xE2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE30 "DOC0EXPD780,"
hexmask.long.word 0xE30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE34 "DOC0EXPD781,"
hexmask.long.word 0xE34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE38 "DOC0EXPD782,"
hexmask.long.word 0xE38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE3C "DOC0EXPD783,"
hexmask.long.word 0xE3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE40 "DOC0EXPD784,"
hexmask.long.word 0xE40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE44 "DOC0EXPD785,"
hexmask.long.word 0xE44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE48 "DOC0EXPD786,"
hexmask.long.word 0xE48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE4C "DOC0EXPD787,"
hexmask.long.word 0xE4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE50 "DOC0EXPD788,"
hexmask.long.word 0xE50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE54 "DOC0EXPD789,"
hexmask.long.word 0xE54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE58 "DOC0EXPD790,"
hexmask.long.word 0xE58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE5C "DOC0EXPD791,"
hexmask.long.word 0xE5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE60 "DOC0EXPD792,"
hexmask.long.word 0xE60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE64 "DOC0EXPD793,"
hexmask.long.word 0xE64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE68 "DOC0EXPD794,"
hexmask.long.word 0xE68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE6C "DOC0EXPD795,"
hexmask.long.word 0xE6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE70 "DOC0EXPD796,"
hexmask.long.word 0xE70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE74 "DOC0EXPD797,"
hexmask.long.word 0xE74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE78 "DOC0EXPD798,"
hexmask.long.word 0xE78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE7C "DOC0EXPD799,"
hexmask.long.word 0xE7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE80 "DOC0EXPD800,"
hexmask.long.word 0xE80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE84 "DOC0EXPD801,"
hexmask.long.word 0xE84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE88 "DOC0EXPD802,"
hexmask.long.word 0xE88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE8C "DOC0EXPD803,"
hexmask.long.word 0xE8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE90 "DOC0EXPD804,"
hexmask.long.word 0xE90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE94 "DOC0EXPD805,"
hexmask.long.word 0xE94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE98 "DOC0EXPD806,"
hexmask.long.word 0xE98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE9C "DOC0EXPD807,"
hexmask.long.word 0xE9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA0 "DOC0EXPD808,"
hexmask.long.word 0xEA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA4 "DOC0EXPD809,"
hexmask.long.word 0xEA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA8 "DOC0EXPD810,"
hexmask.long.word 0xEA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEAC "DOC0EXPD811,"
hexmask.long.word 0xEAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB0 "DOC0EXPD812,"
hexmask.long.word 0xEB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB4 "DOC0EXPD813,"
hexmask.long.word 0xEB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB8 "DOC0EXPD814,"
hexmask.long.word 0xEB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEBC "DOC0EXPD815,"
hexmask.long.word 0xEBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC0 "DOC0EXPD816,"
hexmask.long.word 0xEC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC4 "DOC0EXPD817,"
hexmask.long.word 0xEC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC8 "DOC0EXPD818,"
hexmask.long.word 0xEC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xECC "DOC0EXPD819,"
hexmask.long.word 0xECC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xECC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xECC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xECC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xECC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xECC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xECC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xECC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xECC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED0 "DOC0EXPD820,"
hexmask.long.word 0xED0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED4 "DOC0EXPD821,"
hexmask.long.word 0xED4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED8 "DOC0EXPD822,"
hexmask.long.word 0xED8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEDC "DOC0EXPD823,"
hexmask.long.word 0xEDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE0 "DOC0EXPD824,"
hexmask.long.word 0xEE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE4 "DOC0EXPD825,"
hexmask.long.word 0xEE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE8 "DOC0EXPD826,"
hexmask.long.word 0xEE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEEC "DOC0EXPD827,"
hexmask.long.word 0xEEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF0 "DOC0EXPD828,"
hexmask.long.word 0xEF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF4 "DOC0EXPD829,"
hexmask.long.word 0xEF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF8 "DOC0EXPD830,"
hexmask.long.word 0xEF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEFC "DOC0EXPD831,"
hexmask.long.word 0xEFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF00 "DOC0EXPD832,"
hexmask.long.word 0xF00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF04 "DOC0EXPD833,"
hexmask.long.word 0xF04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF08 "DOC0EXPD834,"
hexmask.long.word 0xF08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF0C "DOC0EXPD835,"
hexmask.long.word 0xF0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF10 "DOC0EXPD836,"
hexmask.long.word 0xF10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF14 "DOC0EXPD837,"
hexmask.long.word 0xF14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF18 "DOC0EXPD838,"
hexmask.long.word 0xF18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF1C "DOC0EXPD839,"
hexmask.long.word 0xF1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF20 "DOC0EXPD840,"
hexmask.long.word 0xF20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF24 "DOC0EXPD841,"
hexmask.long.word 0xF24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF28 "DOC0EXPD842,"
hexmask.long.word 0xF28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF2C "DOC0EXPD843,"
hexmask.long.word 0xF2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF30 "DOC0EXPD844,"
hexmask.long.word 0xF30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF34 "DOC0EXPD845,"
hexmask.long.word 0xF34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF38 "DOC0EXPD846,"
hexmask.long.word 0xF38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF3C "DOC0EXPD847,"
hexmask.long.word 0xF3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF40 "DOC0EXPD848,"
hexmask.long.word 0xF40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF44 "DOC0EXPD849,"
hexmask.long.word 0xF44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF48 "DOC0EXPD850,"
hexmask.long.word 0xF48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF4C "DOC0EXPD851,"
hexmask.long.word 0xF4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF50 "DOC0EXPD852,"
hexmask.long.word 0xF50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF54 "DOC0EXPD853,"
hexmask.long.word 0xF54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF58 "DOC0EXPD854,"
hexmask.long.word 0xF58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF5C "DOC0EXPD855,"
hexmask.long.word 0xF5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF60 "DOC0EXPD856,"
hexmask.long.word 0xF60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF64 "DOC0EXPD857,"
hexmask.long.word 0xF64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF68 "DOC0EXPD858,"
hexmask.long.word 0xF68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF6C "DOC0EXPD859,"
hexmask.long.word 0xF6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF70 "DOC0EXPD860,"
hexmask.long.word 0xF70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF74 "DOC0EXPD861,"
hexmask.long.word 0xF74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF78 "DOC0EXPD862,"
hexmask.long.word 0xF78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF7C "DOC0EXPD863,"
hexmask.long.word 0xF7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF80 "DOC0EXPD864,"
hexmask.long.word 0xF80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF84 "DOC0EXPD865,"
hexmask.long.word 0xF84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF88 "DOC0EXPD866,"
hexmask.long.word 0xF88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF8C "DOC0EXPD867,"
hexmask.long.word 0xF8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF90 "DOC0EXPD868,"
hexmask.long.word 0xF90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF94 "DOC0EXPD869,"
hexmask.long.word 0xF94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF98 "DOC0EXPD870,"
hexmask.long.word 0xF98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF9C "DOC0EXPD871,"
hexmask.long.word 0xF9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA0 "DOC0EXPD872,"
hexmask.long.word 0xFA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA4 "DOC0EXPD873,"
hexmask.long.word 0xFA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA8 "DOC0EXPD874,"
hexmask.long.word 0xFA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFAC "DOC0EXPD875,"
hexmask.long.word 0xFAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB0 "DOC0EXPD876,"
hexmask.long.word 0xFB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB4 "DOC0EXPD877,"
hexmask.long.word 0xFB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB8 "DOC0EXPD878,"
hexmask.long.word 0xFB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFBC "DOC0EXPD879,"
hexmask.long.word 0xFBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC0 "DOC0EXPD880,"
hexmask.long.word 0xFC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC4 "DOC0EXPD881,"
hexmask.long.word 0xFC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC8 "DOC0EXPD882,"
hexmask.long.word 0xFC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFCC "DOC0EXPD883,"
hexmask.long.word 0xFCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD0 "DOC0EXPD884,"
hexmask.long.word 0xFD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD4 "DOC0EXPD885,"
hexmask.long.word 0xFD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD8 "DOC0EXPD886,"
hexmask.long.word 0xFD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFDC "DOC0EXPD887,"
hexmask.long.word 0xFDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE0 "DOC0EXPD888,"
hexmask.long.word 0xFE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE4 "DOC0EXPD889,"
hexmask.long.word 0xFE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE8 "DOC0EXPD890,"
hexmask.long.word 0xFE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFEC "DOC0EXPD891,"
hexmask.long.word 0xFEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF0 "DOC0EXPD892,"
hexmask.long.word 0xFF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF4 "DOC0EXPD893,"
hexmask.long.word 0xFF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF8 "DOC0EXPD894,"
hexmask.long.word 0xFF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFFC "DOC0EXPD895,"
hexmask.long.word 0xFFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
group.long 0x1100++0xFFF
line.long 0x0 "DOC0EXPD896,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4 "DOC0EXPD897,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8 "DOC0EXPD898,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC "DOC0EXPD899,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x10 "DOC0EXPD900,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x14 "DOC0EXPD901,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x18 "DOC0EXPD902,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C "DOC0EXPD903,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x20 "DOC0EXPD904,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x24 "DOC0EXPD905,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x28 "DOC0EXPD906,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C "DOC0EXPD907,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x30 "DOC0EXPD908,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x34 "DOC0EXPD909,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x38 "DOC0EXPD910,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C "DOC0EXPD911,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x40 "DOC0EXPD912,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x44 "DOC0EXPD913,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x48 "DOC0EXPD914,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C "DOC0EXPD915,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x50 "DOC0EXPD916,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x54 "DOC0EXPD917,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x58 "DOC0EXPD918,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C "DOC0EXPD919,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x60 "DOC0EXPD920,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x64 "DOC0EXPD921,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x68 "DOC0EXPD922,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C "DOC0EXPD923,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x70 "DOC0EXPD924,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x74 "DOC0EXPD925,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x78 "DOC0EXPD926,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C "DOC0EXPD927,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x80 "DOC0EXPD928,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x84 "DOC0EXPD929,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x88 "DOC0EXPD930,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C "DOC0EXPD931,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x90 "DOC0EXPD932,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x94 "DOC0EXPD933,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x98 "DOC0EXPD934,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C "DOC0EXPD935,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA0 "DOC0EXPD936,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA4 "DOC0EXPD937,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA8 "DOC0EXPD938,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC "DOC0EXPD939,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB0 "DOC0EXPD940,"
hexmask.long.word 0xB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB4 "DOC0EXPD941,"
hexmask.long.word 0xB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB8 "DOC0EXPD942,"
hexmask.long.word 0xB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC "DOC0EXPD943,"
hexmask.long.word 0xBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC0 "DOC0EXPD944,"
hexmask.long.word 0xC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC4 "DOC0EXPD945,"
hexmask.long.word 0xC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC8 "DOC0EXPD946,"
hexmask.long.word 0xC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC "DOC0EXPD947,"
hexmask.long.word 0xCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD0 "DOC0EXPD948,"
hexmask.long.word 0xD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD4 "DOC0EXPD949,"
hexmask.long.word 0xD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD8 "DOC0EXPD950,"
hexmask.long.word 0xD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC "DOC0EXPD951,"
hexmask.long.word 0xDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE0 "DOC0EXPD952,"
hexmask.long.word 0xE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE4 "DOC0EXPD953,"
hexmask.long.word 0xE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE8 "DOC0EXPD954,"
hexmask.long.word 0xE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC "DOC0EXPD955,"
hexmask.long.word 0xEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF0 "DOC0EXPD956,"
hexmask.long.word 0xF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF4 "DOC0EXPD957,"
hexmask.long.word 0xF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF8 "DOC0EXPD958,"
hexmask.long.word 0xF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC "DOC0EXPD959,"
hexmask.long.word 0xFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x100 "DOC0EXPD960,"
hexmask.long.word 0x100 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x100 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x100 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x100 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x100 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x100 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x100 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x100 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x100 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x104 "DOC0EXPD961,"
hexmask.long.word 0x104 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x104 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x104 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x104 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x104 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x104 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x104 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x104 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x104 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x108 "DOC0EXPD962,"
hexmask.long.word 0x108 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x108 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x108 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x108 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x108 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x108 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x108 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x108 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x108 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x10C "DOC0EXPD963,"
hexmask.long.word 0x10C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x10C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x10C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x10C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x10C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x10C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x10C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x10C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x10C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x110 "DOC0EXPD964,"
hexmask.long.word 0x110 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x110 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x110 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x110 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x110 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x110 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x110 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x110 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x110 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x114 "DOC0EXPD965,"
hexmask.long.word 0x114 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x114 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x114 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x114 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x114 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x114 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x114 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x114 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x114 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x118 "DOC0EXPD966,"
hexmask.long.word 0x118 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x118 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x118 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x118 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x118 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x118 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x118 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x118 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x118 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x11C "DOC0EXPD967,"
hexmask.long.word 0x11C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x11C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x11C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x11C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x11C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x11C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x11C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x11C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x11C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x120 "DOC0EXPD968,"
hexmask.long.word 0x120 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x120 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x120 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x120 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x120 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x120 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x120 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x120 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x120 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x124 "DOC0EXPD969,"
hexmask.long.word 0x124 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x124 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x124 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x124 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x124 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x124 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x124 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x124 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x124 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x128 "DOC0EXPD970,"
hexmask.long.word 0x128 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x128 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x128 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x128 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x128 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x128 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x128 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x128 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x128 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x12C "DOC0EXPD971,"
hexmask.long.word 0x12C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x12C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x12C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x12C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x12C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x12C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x12C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x12C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x12C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x130 "DOC0EXPD972,"
hexmask.long.word 0x130 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x130 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x130 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x130 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x130 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x130 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x130 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x130 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x130 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x134 "DOC0EXPD973,"
hexmask.long.word 0x134 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x134 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x134 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x134 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x134 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x134 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x134 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x134 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x134 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x138 "DOC0EXPD974,"
hexmask.long.word 0x138 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x138 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x138 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x138 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x138 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x138 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x138 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x138 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x138 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x13C "DOC0EXPD975,"
hexmask.long.word 0x13C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x13C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x13C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x13C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x13C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x13C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x13C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x13C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x13C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x140 "DOC0EXPD976,"
hexmask.long.word 0x140 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x140 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x140 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x140 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x140 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x140 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x140 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x140 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x140 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x144 "DOC0EXPD977,"
hexmask.long.word 0x144 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x144 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x144 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x144 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x144 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x144 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x144 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x144 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x144 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x148 "DOC0EXPD978,"
hexmask.long.word 0x148 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x148 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x148 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x148 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x148 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x148 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x148 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x148 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x148 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x14C "DOC0EXPD979,"
hexmask.long.word 0x14C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x14C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x14C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x14C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x14C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x14C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x14C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x14C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x150 "DOC0EXPD980,"
hexmask.long.word 0x150 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x150 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x150 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x150 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x150 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x150 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x150 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x150 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x150 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x154 "DOC0EXPD981,"
hexmask.long.word 0x154 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x154 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x154 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x154 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x154 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x154 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x154 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x154 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x154 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x158 "DOC0EXPD982,"
hexmask.long.word 0x158 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x158 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x158 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x158 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x158 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x158 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x158 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x158 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x158 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x15C "DOC0EXPD983,"
hexmask.long.word 0x15C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x15C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x15C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x15C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x15C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x15C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x15C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x15C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x15C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x160 "DOC0EXPD984,"
hexmask.long.word 0x160 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x160 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x160 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x160 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x160 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x160 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x160 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x160 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x160 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x164 "DOC0EXPD985,"
hexmask.long.word 0x164 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x164 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x164 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x164 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x164 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x164 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x164 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x164 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x164 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x168 "DOC0EXPD986,"
hexmask.long.word 0x168 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x168 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x168 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x168 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x168 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x168 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x168 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x168 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x168 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x16C "DOC0EXPD987,"
hexmask.long.word 0x16C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x16C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x16C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x16C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x16C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x16C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x16C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x16C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x16C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x170 "DOC0EXPD988,"
hexmask.long.word 0x170 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x170 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x170 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x170 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x170 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x170 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x170 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x170 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x170 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x174 "DOC0EXPD989,"
hexmask.long.word 0x174 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x174 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x174 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x174 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x174 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x174 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x174 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x174 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x174 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x178 "DOC0EXPD990,"
hexmask.long.word 0x178 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x178 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x178 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x178 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x178 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x178 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x178 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x178 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x178 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x17C "DOC0EXPD991,"
hexmask.long.word 0x17C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x17C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x17C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x17C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x17C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x17C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x17C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x17C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x17C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x180 "DOC0EXPD992,"
hexmask.long.word 0x180 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x180 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x180 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x180 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x180 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x180 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x180 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x180 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x180 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x184 "DOC0EXPD993,"
hexmask.long.word 0x184 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x184 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x184 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x184 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x184 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x184 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x184 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x184 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x184 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x188 "DOC0EXPD994,"
hexmask.long.word 0x188 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x188 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x188 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x188 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x188 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x188 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x188 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x188 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x188 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x18C "DOC0EXPD995,"
hexmask.long.word 0x18C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x18C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x18C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x18C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x18C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x18C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x18C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x18C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x18C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x190 "DOC0EXPD996,"
hexmask.long.word 0x190 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x190 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x190 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x190 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x190 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x190 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x190 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x190 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x190 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x194 "DOC0EXPD997,"
hexmask.long.word 0x194 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x194 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x194 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x194 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x194 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x194 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x194 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x194 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x194 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x198 "DOC0EXPD998,"
hexmask.long.word 0x198 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x198 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x198 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x198 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x198 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x198 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x198 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x198 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x198 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x19C "DOC0EXPD999,"
hexmask.long.word 0x19C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x19C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x19C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x19C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x19C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x19C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x19C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x19C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x19C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A0 "DOC0EXPD1000,"
hexmask.long.word 0x1A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A4 "DOC0EXPD1001,"
hexmask.long.word 0x1A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A8 "DOC0EXPD1002,"
hexmask.long.word 0x1A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1AC "DOC0EXPD1003,"
hexmask.long.word 0x1AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B0 "DOC0EXPD1004,"
hexmask.long.word 0x1B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B4 "DOC0EXPD1005,"
hexmask.long.word 0x1B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B8 "DOC0EXPD1006,"
hexmask.long.word 0x1B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1BC "DOC0EXPD1007,"
hexmask.long.word 0x1BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C0 "DOC0EXPD1008,"
hexmask.long.word 0x1C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C4 "DOC0EXPD1009,"
hexmask.long.word 0x1C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C8 "DOC0EXPD1010,"
hexmask.long.word 0x1C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1CC "DOC0EXPD1011,"
hexmask.long.word 0x1CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D0 "DOC0EXPD1012,"
hexmask.long.word 0x1D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D4 "DOC0EXPD1013,"
hexmask.long.word 0x1D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D8 "DOC0EXPD1014,"
hexmask.long.word 0x1D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1DC "DOC0EXPD1015,"
hexmask.long.word 0x1DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E0 "DOC0EXPD1016,"
hexmask.long.word 0x1E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E4 "DOC0EXPD1017,"
hexmask.long.word 0x1E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E8 "DOC0EXPD1018,"
hexmask.long.word 0x1E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1EC "DOC0EXPD1019,"
hexmask.long.word 0x1EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F0 "DOC0EXPD1020,"
hexmask.long.word 0x1F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F4 "DOC0EXPD1021,"
hexmask.long.word 0x1F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F8 "DOC0EXPD1022,"
hexmask.long.word 0x1F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1FC "DOC0EXPD1023,"
hexmask.long.word 0x1FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x200 "DOC0EXPD1024,"
hexmask.long.word 0x200 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x200 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x200 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x200 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x200 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x200 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x200 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x200 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x200 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x204 "DOC0EXPD1025,"
hexmask.long.word 0x204 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x204 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x204 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x204 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x204 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x204 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x204 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x204 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x204 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x208 "DOC0EXPD1026,"
hexmask.long.word 0x208 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x208 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x208 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x208 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x208 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x208 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x208 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x208 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x208 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x20C "DOC0EXPD1027,"
hexmask.long.word 0x20C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x20C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x20C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x20C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x20C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x20C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x20C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x20C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x20C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x210 "DOC0EXPD1028,"
hexmask.long.word 0x210 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x210 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x210 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x210 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x210 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x210 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x210 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x210 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x210 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x214 "DOC0EXPD1029,"
hexmask.long.word 0x214 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x214 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x214 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x214 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x214 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x214 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x214 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x214 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x214 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x218 "DOC0EXPD1030,"
hexmask.long.word 0x218 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x218 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x218 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x218 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x218 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x218 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x218 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x218 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x218 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x21C "DOC0EXPD1031,"
hexmask.long.word 0x21C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x21C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x21C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x21C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x21C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x21C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x21C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x21C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x21C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x220 "DOC0EXPD1032,"
hexmask.long.word 0x220 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x220 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x220 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x220 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x220 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x220 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x220 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x220 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x220 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x224 "DOC0EXPD1033,"
hexmask.long.word 0x224 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x224 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x224 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x224 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x224 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x224 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x224 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x224 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x224 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x228 "DOC0EXPD1034,"
hexmask.long.word 0x228 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x228 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x228 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x228 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x228 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x228 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x228 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x228 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x228 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x22C "DOC0EXPD1035,"
hexmask.long.word 0x22C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x22C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x22C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x22C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x22C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x22C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x22C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x22C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x22C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x230 "DOC0EXPD1036,"
hexmask.long.word 0x230 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x230 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x230 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x230 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x230 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x230 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x230 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x230 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x230 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x234 "DOC0EXPD1037,"
hexmask.long.word 0x234 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x234 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x234 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x234 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x234 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x234 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x234 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x234 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x234 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x238 "DOC0EXPD1038,"
hexmask.long.word 0x238 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x238 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x238 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x238 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x238 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x238 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x238 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x238 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x238 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x23C "DOC0EXPD1039,"
hexmask.long.word 0x23C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x23C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x23C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x23C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x23C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x23C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x23C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x23C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x23C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x240 "DOC0EXPD1040,"
hexmask.long.word 0x240 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x240 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x240 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x240 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x240 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x240 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x240 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x240 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x240 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x244 "DOC0EXPD1041,"
hexmask.long.word 0x244 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x244 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x244 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x244 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x244 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x244 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x244 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x244 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x244 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x248 "DOC0EXPD1042,"
hexmask.long.word 0x248 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x248 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x248 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x248 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x248 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x248 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x248 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x248 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x248 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x24C "DOC0EXPD1043,"
hexmask.long.word 0x24C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x24C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x24C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x24C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x24C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x24C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x24C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x24C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x24C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x250 "DOC0EXPD1044,"
hexmask.long.word 0x250 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x250 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x250 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x250 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x250 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x250 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x250 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x250 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x250 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x254 "DOC0EXPD1045,"
hexmask.long.word 0x254 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x254 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x254 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x254 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x254 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x254 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x254 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x254 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x254 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x258 "DOC0EXPD1046,"
hexmask.long.word 0x258 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x258 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x258 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x258 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x258 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x258 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x258 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x258 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x258 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x25C "DOC0EXPD1047,"
hexmask.long.word 0x25C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x25C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x25C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x25C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x25C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x25C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x25C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x25C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x25C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x260 "DOC0EXPD1048,"
hexmask.long.word 0x260 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x260 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x260 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x260 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x260 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x260 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x260 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x260 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x260 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x264 "DOC0EXPD1049,"
hexmask.long.word 0x264 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x264 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x264 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x264 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x264 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x264 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x264 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x264 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x264 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x268 "DOC0EXPD1050,"
hexmask.long.word 0x268 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x268 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x268 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x268 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x268 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x268 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x268 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x268 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x268 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x26C "DOC0EXPD1051,"
hexmask.long.word 0x26C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x26C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x26C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x26C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x26C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x26C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x26C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x26C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x26C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x270 "DOC0EXPD1052,"
hexmask.long.word 0x270 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x270 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x270 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x270 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x270 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x270 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x270 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x270 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x270 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x274 "DOC0EXPD1053,"
hexmask.long.word 0x274 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x274 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x274 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x274 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x274 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x274 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x274 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x274 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x274 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x278 "DOC0EXPD1054,"
hexmask.long.word 0x278 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x278 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x278 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x278 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x278 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x278 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x278 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x278 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x278 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x27C "DOC0EXPD1055,"
hexmask.long.word 0x27C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x27C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x27C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x27C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x27C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x27C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x27C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x27C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x27C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x280 "DOC0EXPD1056,"
hexmask.long.word 0x280 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x280 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x280 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x280 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x280 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x280 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x280 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x280 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x280 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x284 "DOC0EXPD1057,"
hexmask.long.word 0x284 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x284 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x284 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x284 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x284 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x284 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x284 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x284 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x284 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x288 "DOC0EXPD1058,"
hexmask.long.word 0x288 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x288 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x288 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x288 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x288 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x288 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x288 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x288 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x288 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x28C "DOC0EXPD1059,"
hexmask.long.word 0x28C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x28C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x28C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x28C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x28C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x28C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x28C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x28C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x28C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x290 "DOC0EXPD1060,"
hexmask.long.word 0x290 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x290 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x290 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x290 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x290 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x290 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x290 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x290 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x290 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x294 "DOC0EXPD1061,"
hexmask.long.word 0x294 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x294 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x294 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x294 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x294 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x294 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x294 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x294 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x294 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x298 "DOC0EXPD1062,"
hexmask.long.word 0x298 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x298 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x298 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x298 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x298 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x298 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x298 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x298 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x298 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x29C "DOC0EXPD1063,"
hexmask.long.word 0x29C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x29C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x29C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x29C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x29C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x29C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x29C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x29C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x29C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A0 "DOC0EXPD1064,"
hexmask.long.word 0x2A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A4 "DOC0EXPD1065,"
hexmask.long.word 0x2A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A8 "DOC0EXPD1066,"
hexmask.long.word 0x2A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2AC "DOC0EXPD1067,"
hexmask.long.word 0x2AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B0 "DOC0EXPD1068,"
hexmask.long.word 0x2B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B4 "DOC0EXPD1069,"
hexmask.long.word 0x2B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B8 "DOC0EXPD1070,"
hexmask.long.word 0x2B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2BC "DOC0EXPD1071,"
hexmask.long.word 0x2BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C0 "DOC0EXPD1072,"
hexmask.long.word 0x2C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C4 "DOC0EXPD1073,"
hexmask.long.word 0x2C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C8 "DOC0EXPD1074,"
hexmask.long.word 0x2C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2CC "DOC0EXPD1075,"
hexmask.long.word 0x2CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D0 "DOC0EXPD1076,"
hexmask.long.word 0x2D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D4 "DOC0EXPD1077,"
hexmask.long.word 0x2D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D8 "DOC0EXPD1078,"
hexmask.long.word 0x2D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2DC "DOC0EXPD1079,"
hexmask.long.word 0x2DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E0 "DOC0EXPD1080,"
hexmask.long.word 0x2E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E4 "DOC0EXPD1081,"
hexmask.long.word 0x2E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E8 "DOC0EXPD1082,"
hexmask.long.word 0x2E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2EC "DOC0EXPD1083,"
hexmask.long.word 0x2EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F0 "DOC0EXPD1084,"
hexmask.long.word 0x2F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F4 "DOC0EXPD1085,"
hexmask.long.word 0x2F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F8 "DOC0EXPD1086,"
hexmask.long.word 0x2F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2FC "DOC0EXPD1087,"
hexmask.long.word 0x2FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x300 "DOC0EXPD1088,"
hexmask.long.word 0x300 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x300 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x300 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x300 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x300 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x300 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x300 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x300 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x300 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x304 "DOC0EXPD1089,"
hexmask.long.word 0x304 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x304 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x304 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x304 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x304 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x304 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x304 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x304 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x304 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x308 "DOC0EXPD1090,"
hexmask.long.word 0x308 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x308 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x308 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x308 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x308 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x308 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x308 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x308 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x308 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x30C "DOC0EXPD1091,"
hexmask.long.word 0x30C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x30C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x30C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x30C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x30C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x30C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x30C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x30C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x30C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x310 "DOC0EXPD1092,"
hexmask.long.word 0x310 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x310 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x310 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x310 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x310 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x310 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x310 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x310 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x310 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x314 "DOC0EXPD1093,"
hexmask.long.word 0x314 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x314 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x314 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x314 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x314 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x314 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x314 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x314 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x314 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x318 "DOC0EXPD1094,"
hexmask.long.word 0x318 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x318 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x318 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x318 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x318 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x318 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x318 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x318 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x318 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x31C "DOC0EXPD1095,"
hexmask.long.word 0x31C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x31C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x31C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x31C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x31C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x31C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x31C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x31C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x31C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x320 "DOC0EXPD1096,"
hexmask.long.word 0x320 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x320 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x320 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x320 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x320 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x320 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x320 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x320 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x320 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x324 "DOC0EXPD1097,"
hexmask.long.word 0x324 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x324 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x324 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x324 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x324 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x324 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x324 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x324 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x324 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x328 "DOC0EXPD1098,"
hexmask.long.word 0x328 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x328 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x328 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x328 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x328 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x328 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x328 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x328 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x328 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x32C "DOC0EXPD1099,"
hexmask.long.word 0x32C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x32C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x32C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x32C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x32C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x32C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x32C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x32C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x32C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x330 "DOC0EXPD1100,"
hexmask.long.word 0x330 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x330 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x330 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x330 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x330 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x330 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x330 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x330 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x330 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x334 "DOC0EXPD1101,"
hexmask.long.word 0x334 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x334 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x334 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x334 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x334 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x334 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x334 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x334 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x334 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x338 "DOC0EXPD1102,"
hexmask.long.word 0x338 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x338 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x338 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x338 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x338 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x338 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x338 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x338 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x338 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x33C "DOC0EXPD1103,"
hexmask.long.word 0x33C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x33C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x33C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x33C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x33C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x33C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x33C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x33C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x33C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x340 "DOC0EXPD1104,"
hexmask.long.word 0x340 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x340 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x340 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x340 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x340 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x340 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x340 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x340 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x340 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x344 "DOC0EXPD1105,"
hexmask.long.word 0x344 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x344 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x344 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x344 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x344 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x344 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x344 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x344 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x344 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x348 "DOC0EXPD1106,"
hexmask.long.word 0x348 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x348 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x348 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x348 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x348 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x348 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x348 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x348 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x348 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x34C "DOC0EXPD1107,"
hexmask.long.word 0x34C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x34C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x34C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x34C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x34C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x34C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x34C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x34C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x34C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x350 "DOC0EXPD1108,"
hexmask.long.word 0x350 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x350 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x350 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x350 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x350 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x350 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x350 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x350 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x350 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x354 "DOC0EXPD1109,"
hexmask.long.word 0x354 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x354 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x354 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x354 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x354 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x354 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x354 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x354 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x354 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x358 "DOC0EXPD1110,"
hexmask.long.word 0x358 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x358 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x358 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x358 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x358 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x358 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x358 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x358 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x358 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x35C "DOC0EXPD1111,"
hexmask.long.word 0x35C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x35C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x35C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x35C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x35C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x35C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x35C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x35C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x35C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x360 "DOC0EXPD1112,"
hexmask.long.word 0x360 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x360 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x360 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x360 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x360 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x360 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x360 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x360 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x360 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x364 "DOC0EXPD1113,"
hexmask.long.word 0x364 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x364 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x364 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x364 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x364 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x364 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x364 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x364 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x364 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x368 "DOC0EXPD1114,"
hexmask.long.word 0x368 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x368 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x368 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x368 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x368 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x368 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x368 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x368 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x368 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x36C "DOC0EXPD1115,"
hexmask.long.word 0x36C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x36C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x36C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x36C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x36C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x36C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x36C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x36C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x36C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x370 "DOC0EXPD1116,"
hexmask.long.word 0x370 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x370 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x370 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x370 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x370 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x370 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x370 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x370 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x370 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x374 "DOC0EXPD1117,"
hexmask.long.word 0x374 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x374 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x374 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x374 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x374 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x374 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x374 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x374 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x374 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x378 "DOC0EXPD1118,"
hexmask.long.word 0x378 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x378 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x378 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x378 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x378 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x378 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x378 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x378 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x378 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x37C "DOC0EXPD1119,"
hexmask.long.word 0x37C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x37C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x37C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x37C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x37C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x37C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x37C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x37C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x37C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x380 "DOC0EXPD1120,"
hexmask.long.word 0x380 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x380 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x380 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x380 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x380 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x380 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x380 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x380 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x380 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x384 "DOC0EXPD1121,"
hexmask.long.word 0x384 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x384 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x384 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x384 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x384 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x384 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x384 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x384 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x384 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x388 "DOC0EXPD1122,"
hexmask.long.word 0x388 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x388 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x388 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x388 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x388 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x388 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x388 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x388 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x388 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x38C "DOC0EXPD1123,"
hexmask.long.word 0x38C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x38C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x38C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x38C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x38C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x38C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x38C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x38C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x38C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x390 "DOC0EXPD1124,"
hexmask.long.word 0x390 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x390 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x390 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x390 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x390 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x390 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x390 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x390 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x390 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x394 "DOC0EXPD1125,"
hexmask.long.word 0x394 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x394 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x394 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x394 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x394 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x394 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x394 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x394 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x394 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x398 "DOC0EXPD1126,"
hexmask.long.word 0x398 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x398 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x398 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x398 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x398 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x398 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x398 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x398 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x398 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x39C "DOC0EXPD1127,"
hexmask.long.word 0x39C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x39C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x39C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x39C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x39C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x39C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x39C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x39C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x39C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A0 "DOC0EXPD1128,"
hexmask.long.word 0x3A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A4 "DOC0EXPD1129,"
hexmask.long.word 0x3A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A8 "DOC0EXPD1130,"
hexmask.long.word 0x3A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3AC "DOC0EXPD1131,"
hexmask.long.word 0x3AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B0 "DOC0EXPD1132,"
hexmask.long.word 0x3B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B4 "DOC0EXPD1133,"
hexmask.long.word 0x3B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B8 "DOC0EXPD1134,"
hexmask.long.word 0x3B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3BC "DOC0EXPD1135,"
hexmask.long.word 0x3BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C0 "DOC0EXPD1136,"
hexmask.long.word 0x3C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C4 "DOC0EXPD1137,"
hexmask.long.word 0x3C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C8 "DOC0EXPD1138,"
hexmask.long.word 0x3C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3CC "DOC0EXPD1139,"
hexmask.long.word 0x3CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D0 "DOC0EXPD1140,"
hexmask.long.word 0x3D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D4 "DOC0EXPD1141,"
hexmask.long.word 0x3D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D8 "DOC0EXPD1142,"
hexmask.long.word 0x3D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3DC "DOC0EXPD1143,"
hexmask.long.word 0x3DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E0 "DOC0EXPD1144,"
hexmask.long.word 0x3E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E4 "DOC0EXPD1145,"
hexmask.long.word 0x3E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E8 "DOC0EXPD1146,"
hexmask.long.word 0x3E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3EC "DOC0EXPD1147,"
hexmask.long.word 0x3EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F0 "DOC0EXPD1148,"
hexmask.long.word 0x3F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F4 "DOC0EXPD1149,"
hexmask.long.word 0x3F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F8 "DOC0EXPD1150,"
hexmask.long.word 0x3F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3FC "DOC0EXPD1151,"
hexmask.long.word 0x3FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x400 "DOC0EXPD1152,"
hexmask.long.word 0x400 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x400 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x400 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x400 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x400 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x400 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x400 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x400 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x400 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x404 "DOC0EXPD1153,"
hexmask.long.word 0x404 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x404 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x404 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x404 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x404 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x404 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x404 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x404 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x404 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x408 "DOC0EXPD1154,"
hexmask.long.word 0x408 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x408 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x408 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x408 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x408 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x408 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x408 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x408 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x408 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x40C "DOC0EXPD1155,"
hexmask.long.word 0x40C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x40C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x40C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x40C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x40C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x40C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x40C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x40C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x40C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x410 "DOC0EXPD1156,"
hexmask.long.word 0x410 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x410 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x410 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x410 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x410 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x410 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x410 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x410 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x410 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x414 "DOC0EXPD1157,"
hexmask.long.word 0x414 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x414 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x414 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x414 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x414 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x414 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x414 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x414 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x414 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x418 "DOC0EXPD1158,"
hexmask.long.word 0x418 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x418 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x418 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x418 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x418 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x418 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x418 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x418 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x418 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x41C "DOC0EXPD1159,"
hexmask.long.word 0x41C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x41C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x41C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x41C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x41C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x41C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x41C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x41C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x41C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x420 "DOC0EXPD1160,"
hexmask.long.word 0x420 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x420 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x420 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x420 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x420 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x420 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x420 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x420 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x420 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x424 "DOC0EXPD1161,"
hexmask.long.word 0x424 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x424 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x424 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x424 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x424 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x424 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x424 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x424 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x424 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x428 "DOC0EXPD1162,"
hexmask.long.word 0x428 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x428 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x428 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x428 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x428 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x428 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x428 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x428 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x428 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x42C "DOC0EXPD1163,"
hexmask.long.word 0x42C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x42C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x42C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x42C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x42C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x42C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x42C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x42C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x42C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x430 "DOC0EXPD1164,"
hexmask.long.word 0x430 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x430 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x430 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x430 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x430 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x430 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x430 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x430 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x430 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x434 "DOC0EXPD1165,"
hexmask.long.word 0x434 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x434 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x434 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x434 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x434 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x434 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x434 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x434 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x434 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x438 "DOC0EXPD1166,"
hexmask.long.word 0x438 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x438 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x438 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x438 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x438 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x438 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x438 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x438 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x438 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x43C "DOC0EXPD1167,"
hexmask.long.word 0x43C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x43C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x43C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x43C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x43C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x43C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x43C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x43C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x43C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x440 "DOC0EXPD1168,"
hexmask.long.word 0x440 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x440 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x440 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x440 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x440 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x440 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x440 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x440 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x440 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x444 "DOC0EXPD1169,"
hexmask.long.word 0x444 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x444 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x444 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x444 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x444 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x444 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x444 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x444 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x444 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x448 "DOC0EXPD1170,"
hexmask.long.word 0x448 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x448 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x448 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x448 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x448 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x448 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x448 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x448 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x448 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x44C "DOC0EXPD1171,"
hexmask.long.word 0x44C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x44C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x44C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x44C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x44C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x44C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x44C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x44C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x44C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x450 "DOC0EXPD1172,"
hexmask.long.word 0x450 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x450 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x450 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x450 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x450 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x450 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x450 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x450 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x450 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x454 "DOC0EXPD1173,"
hexmask.long.word 0x454 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x454 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x454 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x454 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x454 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x454 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x454 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x454 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x454 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x458 "DOC0EXPD1174,"
hexmask.long.word 0x458 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x458 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x458 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x458 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x458 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x458 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x458 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x458 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x458 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x45C "DOC0EXPD1175,"
hexmask.long.word 0x45C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x45C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x45C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x45C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x45C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x45C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x45C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x45C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x45C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x460 "DOC0EXPD1176,"
hexmask.long.word 0x460 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x460 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x460 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x460 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x460 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x460 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x460 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x460 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x460 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x464 "DOC0EXPD1177,"
hexmask.long.word 0x464 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x464 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x464 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x464 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x464 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x464 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x464 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x464 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x464 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x468 "DOC0EXPD1178,"
hexmask.long.word 0x468 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x468 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x468 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x468 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x468 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x468 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x468 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x468 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x468 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x46C "DOC0EXPD1179,"
hexmask.long.word 0x46C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x46C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x46C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x46C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x46C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x46C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x46C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x46C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x46C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x470 "DOC0EXPD1180,"
hexmask.long.word 0x470 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x470 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x470 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x470 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x470 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x470 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x470 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x470 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x470 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x474 "DOC0EXPD1181,"
hexmask.long.word 0x474 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x474 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x474 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x474 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x474 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x474 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x474 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x474 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x474 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x478 "DOC0EXPD1182,"
hexmask.long.word 0x478 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x478 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x478 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x478 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x478 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x478 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x478 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x478 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x478 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x47C "DOC0EXPD1183,"
hexmask.long.word 0x47C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x47C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x47C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x47C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x47C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x47C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x47C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x47C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x47C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x480 "DOC0EXPD1184,"
hexmask.long.word 0x480 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x480 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x480 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x480 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x480 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x480 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x480 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x480 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x480 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x484 "DOC0EXPD1185,"
hexmask.long.word 0x484 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x484 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x484 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x484 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x484 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x484 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x484 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x484 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x484 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x488 "DOC0EXPD1186,"
hexmask.long.word 0x488 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x488 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x488 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x488 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x488 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x488 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x488 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x488 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x488 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x48C "DOC0EXPD1187,"
hexmask.long.word 0x48C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x48C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x48C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x48C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x48C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x48C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x48C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x48C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x48C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x490 "DOC0EXPD1188,"
hexmask.long.word 0x490 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x490 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x490 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x490 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x490 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x490 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x490 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x490 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x490 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x494 "DOC0EXPD1189,"
hexmask.long.word 0x494 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x494 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x494 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x494 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x494 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x494 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x494 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x494 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x494 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x498 "DOC0EXPD1190,"
hexmask.long.word 0x498 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x498 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x498 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x498 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x498 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x498 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x498 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x498 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x498 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x49C "DOC0EXPD1191,"
hexmask.long.word 0x49C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x49C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x49C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x49C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x49C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x49C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x49C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x49C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x49C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A0 "DOC0EXPD1192,"
hexmask.long.word 0x4A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A4 "DOC0EXPD1193,"
hexmask.long.word 0x4A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A8 "DOC0EXPD1194,"
hexmask.long.word 0x4A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4AC "DOC0EXPD1195,"
hexmask.long.word 0x4AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B0 "DOC0EXPD1196,"
hexmask.long.word 0x4B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B4 "DOC0EXPD1197,"
hexmask.long.word 0x4B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B8 "DOC0EXPD1198,"
hexmask.long.word 0x4B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4BC "DOC0EXPD1199,"
hexmask.long.word 0x4BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C0 "DOC0EXPD1200,"
hexmask.long.word 0x4C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C4 "DOC0EXPD1201,"
hexmask.long.word 0x4C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C8 "DOC0EXPD1202,"
hexmask.long.word 0x4C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4CC "DOC0EXPD1203,"
hexmask.long.word 0x4CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D0 "DOC0EXPD1204,"
hexmask.long.word 0x4D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D4 "DOC0EXPD1205,"
hexmask.long.word 0x4D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D8 "DOC0EXPD1206,"
hexmask.long.word 0x4D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4DC "DOC0EXPD1207,"
hexmask.long.word 0x4DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E0 "DOC0EXPD1208,"
hexmask.long.word 0x4E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E4 "DOC0EXPD1209,"
hexmask.long.word 0x4E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E8 "DOC0EXPD1210,"
hexmask.long.word 0x4E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4EC "DOC0EXPD1211,"
hexmask.long.word 0x4EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F0 "DOC0EXPD1212,"
hexmask.long.word 0x4F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F4 "DOC0EXPD1213,"
hexmask.long.word 0x4F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F8 "DOC0EXPD1214,"
hexmask.long.word 0x4F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4FC "DOC0EXPD1215,"
hexmask.long.word 0x4FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x500 "DOC0EXPD1216,"
hexmask.long.word 0x500 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x500 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x500 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x500 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x500 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x500 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x500 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x500 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x500 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x504 "DOC0EXPD1217,"
hexmask.long.word 0x504 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x504 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x504 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x504 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x504 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x504 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x504 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x504 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x504 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x508 "DOC0EXPD1218,"
hexmask.long.word 0x508 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x508 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x508 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x508 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x508 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x508 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x508 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x508 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x508 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x50C "DOC0EXPD1219,"
hexmask.long.word 0x50C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x50C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x50C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x50C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x50C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x50C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x50C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x50C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x50C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x510 "DOC0EXPD1220,"
hexmask.long.word 0x510 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x510 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x510 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x510 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x510 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x510 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x510 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x510 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x510 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x514 "DOC0EXPD1221,"
hexmask.long.word 0x514 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x514 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x514 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x514 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x514 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x514 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x514 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x514 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x514 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x518 "DOC0EXPD1222,"
hexmask.long.word 0x518 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x518 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x518 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x518 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x518 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x518 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x518 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x518 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x518 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x51C "DOC0EXPD1223,"
hexmask.long.word 0x51C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x51C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x51C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x51C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x51C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x51C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x51C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x51C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x51C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x520 "DOC0EXPD1224,"
hexmask.long.word 0x520 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x520 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x520 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x520 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x520 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x520 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x520 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x520 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x520 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x524 "DOC0EXPD1225,"
hexmask.long.word 0x524 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x524 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x524 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x524 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x524 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x524 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x524 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x524 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x524 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x528 "DOC0EXPD1226,"
hexmask.long.word 0x528 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x528 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x528 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x528 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x528 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x528 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x528 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x528 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x528 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x52C "DOC0EXPD1227,"
hexmask.long.word 0x52C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x52C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x52C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x52C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x52C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x52C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x52C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x52C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x52C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x530 "DOC0EXPD1228,"
hexmask.long.word 0x530 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x530 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x530 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x530 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x530 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x530 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x530 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x530 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x530 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x534 "DOC0EXPD1229,"
hexmask.long.word 0x534 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x534 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x534 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x534 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x534 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x534 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x534 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x534 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x534 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x538 "DOC0EXPD1230,"
hexmask.long.word 0x538 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x538 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x538 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x538 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x538 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x538 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x538 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x538 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x538 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x53C "DOC0EXPD1231,"
hexmask.long.word 0x53C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x53C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x53C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x53C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x53C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x53C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x53C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x53C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x53C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x540 "DOC0EXPD1232,"
hexmask.long.word 0x540 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x540 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x540 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x540 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x540 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x540 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x540 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x540 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x540 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x544 "DOC0EXPD1233,"
hexmask.long.word 0x544 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x544 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x544 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x544 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x544 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x544 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x544 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x544 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x544 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x548 "DOC0EXPD1234,"
hexmask.long.word 0x548 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x548 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x548 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x548 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x548 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x548 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x548 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x548 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x548 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x54C "DOC0EXPD1235,"
hexmask.long.word 0x54C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x54C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x54C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x54C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x54C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x54C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x54C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x54C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x54C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x550 "DOC0EXPD1236,"
hexmask.long.word 0x550 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x550 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x550 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x550 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x550 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x550 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x550 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x550 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x550 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x554 "DOC0EXPD1237,"
hexmask.long.word 0x554 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x554 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x554 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x554 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x554 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x554 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x554 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x554 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x554 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x558 "DOC0EXPD1238,"
hexmask.long.word 0x558 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x558 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x558 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x558 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x558 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x558 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x558 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x558 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x558 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x55C "DOC0EXPD1239,"
hexmask.long.word 0x55C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x55C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x55C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x55C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x55C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x55C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x55C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x55C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x55C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x560 "DOC0EXPD1240,"
hexmask.long.word 0x560 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x560 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x560 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x560 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x560 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x560 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x560 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x560 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x560 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x564 "DOC0EXPD1241,"
hexmask.long.word 0x564 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x564 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x564 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x564 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x564 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x564 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x564 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x564 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x564 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x568 "DOC0EXPD1242,"
hexmask.long.word 0x568 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x568 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x568 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x568 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x568 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x568 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x568 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x568 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x568 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x56C "DOC0EXPD1243,"
hexmask.long.word 0x56C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x56C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x56C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x56C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x56C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x56C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x56C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x56C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x56C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x570 "DOC0EXPD1244,"
hexmask.long.word 0x570 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x570 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x570 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x570 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x570 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x570 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x570 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x570 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x570 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x574 "DOC0EXPD1245,"
hexmask.long.word 0x574 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x574 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x574 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x574 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x574 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x574 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x574 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x574 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x574 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x578 "DOC0EXPD1246,"
hexmask.long.word 0x578 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x578 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x578 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x578 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x578 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x578 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x578 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x578 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x578 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x57C "DOC0EXPD1247,"
hexmask.long.word 0x57C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x57C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x57C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x57C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x57C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x57C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x57C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x57C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x57C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x580 "DOC0EXPD1248,"
hexmask.long.word 0x580 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x580 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x580 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x580 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x580 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x580 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x580 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x580 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x580 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x584 "DOC0EXPD1249,"
hexmask.long.word 0x584 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x584 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x584 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x584 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x584 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x584 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x584 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x584 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x584 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x588 "DOC0EXPD1250,"
hexmask.long.word 0x588 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x588 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x588 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x588 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x588 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x588 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x588 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x588 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x588 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x58C "DOC0EXPD1251,"
hexmask.long.word 0x58C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x58C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x58C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x58C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x58C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x58C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x58C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x58C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x58C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x590 "DOC0EXPD1252,"
hexmask.long.word 0x590 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x590 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x590 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x590 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x590 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x590 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x590 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x590 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x590 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x594 "DOC0EXPD1253,"
hexmask.long.word 0x594 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x594 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x594 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x594 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x594 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x594 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x594 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x594 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x594 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x598 "DOC0EXPD1254,"
hexmask.long.word 0x598 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x598 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x598 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x598 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x598 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x598 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x598 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x598 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x598 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x59C "DOC0EXPD1255,"
hexmask.long.word 0x59C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x59C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x59C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x59C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x59C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x59C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x59C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x59C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x59C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A0 "DOC0EXPD1256,"
hexmask.long.word 0x5A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A4 "DOC0EXPD1257,"
hexmask.long.word 0x5A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A8 "DOC0EXPD1258,"
hexmask.long.word 0x5A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5AC "DOC0EXPD1259,"
hexmask.long.word 0x5AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B0 "DOC0EXPD1260,"
hexmask.long.word 0x5B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B4 "DOC0EXPD1261,"
hexmask.long.word 0x5B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B8 "DOC0EXPD1262,"
hexmask.long.word 0x5B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5BC "DOC0EXPD1263,"
hexmask.long.word 0x5BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C0 "DOC0EXPD1264,"
hexmask.long.word 0x5C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C4 "DOC0EXPD1265,"
hexmask.long.word 0x5C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C8 "DOC0EXPD1266,"
hexmask.long.word 0x5C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5CC "DOC0EXPD1267,"
hexmask.long.word 0x5CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D0 "DOC0EXPD1268,"
hexmask.long.word 0x5D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D4 "DOC0EXPD1269,"
hexmask.long.word 0x5D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D8 "DOC0EXPD1270,"
hexmask.long.word 0x5D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5DC "DOC0EXPD1271,"
hexmask.long.word 0x5DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E0 "DOC0EXPD1272,"
hexmask.long.word 0x5E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E4 "DOC0EXPD1273,"
hexmask.long.word 0x5E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E8 "DOC0EXPD1274,"
hexmask.long.word 0x5E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5EC "DOC0EXPD1275,"
hexmask.long.word 0x5EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F0 "DOC0EXPD1276,"
hexmask.long.word 0x5F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F4 "DOC0EXPD1277,"
hexmask.long.word 0x5F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F8 "DOC0EXPD1278,"
hexmask.long.word 0x5F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5FC "DOC0EXPD1279,"
hexmask.long.word 0x5FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x600 "DOC0EXPD1280,"
hexmask.long.word 0x600 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x600 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x600 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x600 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x600 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x600 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x600 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x600 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x600 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x604 "DOC0EXPD1281,"
hexmask.long.word 0x604 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x604 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x604 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x604 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x604 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x604 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x604 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x604 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x604 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x608 "DOC0EXPD1282,"
hexmask.long.word 0x608 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x608 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x608 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x608 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x608 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x608 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x608 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x608 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x608 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x60C "DOC0EXPD1283,"
hexmask.long.word 0x60C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x60C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x60C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x60C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x60C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x60C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x60C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x60C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x60C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x610 "DOC0EXPD1284,"
hexmask.long.word 0x610 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x610 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x610 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x610 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x610 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x610 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x610 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x610 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x610 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x614 "DOC0EXPD1285,"
hexmask.long.word 0x614 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x614 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x614 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x614 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x614 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x614 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x614 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x614 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x614 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x618 "DOC0EXPD1286,"
hexmask.long.word 0x618 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x618 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x618 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x618 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x618 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x618 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x618 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x618 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x618 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x61C "DOC0EXPD1287,"
hexmask.long.word 0x61C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x61C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x61C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x61C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x61C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x61C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x61C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x61C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x61C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x620 "DOC0EXPD1288,"
hexmask.long.word 0x620 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x620 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x620 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x620 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x620 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x620 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x620 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x620 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x620 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x624 "DOC0EXPD1289,"
hexmask.long.word 0x624 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x624 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x624 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x624 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x624 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x624 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x624 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x624 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x624 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x628 "DOC0EXPD1290,"
hexmask.long.word 0x628 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x628 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x628 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x628 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x628 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x628 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x628 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x628 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x628 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x62C "DOC0EXPD1291,"
hexmask.long.word 0x62C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x62C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x62C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x62C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x62C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x62C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x62C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x62C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x62C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x630 "DOC0EXPD1292,"
hexmask.long.word 0x630 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x630 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x630 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x630 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x630 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x630 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x630 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x630 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x630 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x634 "DOC0EXPD1293,"
hexmask.long.word 0x634 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x634 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x634 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x634 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x634 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x634 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x634 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x634 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x634 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x638 "DOC0EXPD1294,"
hexmask.long.word 0x638 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x638 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x638 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x638 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x638 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x638 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x638 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x638 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x638 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x63C "DOC0EXPD1295,"
hexmask.long.word 0x63C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x63C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x63C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x63C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x63C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x63C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x63C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x63C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x63C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x640 "DOC0EXPD1296,"
hexmask.long.word 0x640 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x640 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x640 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x640 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x640 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x640 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x640 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x640 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x640 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x644 "DOC0EXPD1297,"
hexmask.long.word 0x644 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x644 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x644 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x644 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x644 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x644 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x644 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x644 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x644 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x648 "DOC0EXPD1298,"
hexmask.long.word 0x648 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x648 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x648 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x648 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x648 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x648 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x648 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x648 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x648 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x64C "DOC0EXPD1299,"
hexmask.long.word 0x64C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x64C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x64C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x64C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x64C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x64C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x64C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x64C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x64C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x650 "DOC0EXPD1300,"
hexmask.long.word 0x650 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x650 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x650 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x650 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x650 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x650 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x650 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x650 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x650 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x654 "DOC0EXPD1301,"
hexmask.long.word 0x654 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x654 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x654 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x654 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x654 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x654 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x654 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x654 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x654 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x658 "DOC0EXPD1302,"
hexmask.long.word 0x658 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x658 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x658 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x658 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x658 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x658 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x658 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x658 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x658 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x65C "DOC0EXPD1303,"
hexmask.long.word 0x65C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x65C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x65C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x65C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x65C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x65C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x65C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x65C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x65C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x660 "DOC0EXPD1304,"
hexmask.long.word 0x660 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x660 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x660 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x660 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x660 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x660 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x660 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x660 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x660 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x664 "DOC0EXPD1305,"
hexmask.long.word 0x664 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x664 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x664 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x664 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x664 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x664 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x664 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x664 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x664 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x668 "DOC0EXPD1306,"
hexmask.long.word 0x668 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x668 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x668 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x668 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x668 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x668 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x668 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x668 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x668 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x66C "DOC0EXPD1307,"
hexmask.long.word 0x66C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x66C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x66C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x66C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x66C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x66C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x66C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x66C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x66C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x670 "DOC0EXPD1308,"
hexmask.long.word 0x670 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x670 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x670 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x670 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x670 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x670 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x670 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x670 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x670 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x674 "DOC0EXPD1309,"
hexmask.long.word 0x674 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x674 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x674 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x674 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x674 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x674 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x674 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x674 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x674 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x678 "DOC0EXPD1310,"
hexmask.long.word 0x678 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x678 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x678 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x678 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x678 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x678 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x678 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x678 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x678 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x67C "DOC0EXPD1311,"
hexmask.long.word 0x67C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x67C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x67C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x67C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x67C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x67C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x67C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x67C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x67C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x680 "DOC0EXPD1312,"
hexmask.long.word 0x680 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x680 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x680 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x680 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x680 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x680 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x680 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x680 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x680 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x684 "DOC0EXPD1313,"
hexmask.long.word 0x684 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x684 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x684 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x684 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x684 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x684 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x684 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x684 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x684 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x688 "DOC0EXPD1314,"
hexmask.long.word 0x688 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x688 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x688 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x688 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x688 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x688 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x688 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x688 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x688 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x68C "DOC0EXPD1315,"
hexmask.long.word 0x68C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x68C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x68C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x68C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x68C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x68C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x68C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x68C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x68C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x690 "DOC0EXPD1316,"
hexmask.long.word 0x690 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x690 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x690 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x690 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x690 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x690 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x690 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x690 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x690 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x694 "DOC0EXPD1317,"
hexmask.long.word 0x694 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x694 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x694 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x694 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x694 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x694 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x694 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x694 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x694 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x698 "DOC0EXPD1318,"
hexmask.long.word 0x698 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x698 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x698 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x698 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x698 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x698 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x698 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x698 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x698 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x69C "DOC0EXPD1319,"
hexmask.long.word 0x69C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x69C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x69C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x69C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x69C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x69C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x69C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x69C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x69C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A0 "DOC0EXPD1320,"
hexmask.long.word 0x6A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A4 "DOC0EXPD1321,"
hexmask.long.word 0x6A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A8 "DOC0EXPD1322,"
hexmask.long.word 0x6A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6AC "DOC0EXPD1323,"
hexmask.long.word 0x6AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B0 "DOC0EXPD1324,"
hexmask.long.word 0x6B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B4 "DOC0EXPD1325,"
hexmask.long.word 0x6B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B8 "DOC0EXPD1326,"
hexmask.long.word 0x6B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6BC "DOC0EXPD1327,"
hexmask.long.word 0x6BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C0 "DOC0EXPD1328,"
hexmask.long.word 0x6C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C4 "DOC0EXPD1329,"
hexmask.long.word 0x6C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C8 "DOC0EXPD1330,"
hexmask.long.word 0x6C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6CC "DOC0EXPD1331,"
hexmask.long.word 0x6CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D0 "DOC0EXPD1332,"
hexmask.long.word 0x6D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D4 "DOC0EXPD1333,"
hexmask.long.word 0x6D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D8 "DOC0EXPD1334,"
hexmask.long.word 0x6D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6DC "DOC0EXPD1335,"
hexmask.long.word 0x6DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E0 "DOC0EXPD1336,"
hexmask.long.word 0x6E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E4 "DOC0EXPD1337,"
hexmask.long.word 0x6E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E8 "DOC0EXPD1338,"
hexmask.long.word 0x6E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6EC "DOC0EXPD1339,"
hexmask.long.word 0x6EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F0 "DOC0EXPD1340,"
hexmask.long.word 0x6F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F4 "DOC0EXPD1341,"
hexmask.long.word 0x6F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F8 "DOC0EXPD1342,"
hexmask.long.word 0x6F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6FC "DOC0EXPD1343,"
hexmask.long.word 0x6FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x700 "DOC0EXPD1344,"
hexmask.long.word 0x700 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x700 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x700 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x700 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x700 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x700 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x700 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x700 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x700 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x704 "DOC0EXPD1345,"
hexmask.long.word 0x704 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x704 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x704 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x704 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x704 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x704 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x704 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x704 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x704 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x708 "DOC0EXPD1346,"
hexmask.long.word 0x708 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x708 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x708 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x708 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x708 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x708 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x708 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x708 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x708 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x70C "DOC0EXPD1347,"
hexmask.long.word 0x70C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x70C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x70C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x70C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x70C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x70C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x70C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x70C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x70C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x710 "DOC0EXPD1348,"
hexmask.long.word 0x710 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x710 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x710 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x710 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x710 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x710 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x710 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x710 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x710 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x714 "DOC0EXPD1349,"
hexmask.long.word 0x714 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x714 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x714 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x714 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x714 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x714 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x714 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x714 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x714 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x718 "DOC0EXPD1350,"
hexmask.long.word 0x718 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x718 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x718 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x718 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x718 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x718 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x718 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x718 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x718 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x71C "DOC0EXPD1351,"
hexmask.long.word 0x71C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x71C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x71C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x71C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x71C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x71C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x71C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x71C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x71C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x720 "DOC0EXPD1352,"
hexmask.long.word 0x720 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x720 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x720 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x720 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x720 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x720 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x720 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x720 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x720 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x724 "DOC0EXPD1353,"
hexmask.long.word 0x724 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x724 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x724 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x724 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x724 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x724 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x724 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x724 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x724 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x728 "DOC0EXPD1354,"
hexmask.long.word 0x728 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x728 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x728 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x728 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x728 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x728 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x728 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x728 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x728 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x72C "DOC0EXPD1355,"
hexmask.long.word 0x72C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x72C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x72C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x72C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x72C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x72C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x72C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x72C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x72C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x730 "DOC0EXPD1356,"
hexmask.long.word 0x730 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x730 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x730 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x730 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x730 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x730 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x730 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x730 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x730 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x734 "DOC0EXPD1357,"
hexmask.long.word 0x734 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x734 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x734 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x734 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x734 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x734 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x734 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x734 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x734 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x738 "DOC0EXPD1358,"
hexmask.long.word 0x738 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x738 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x738 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x738 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x738 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x738 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x738 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x738 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x738 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x73C "DOC0EXPD1359,"
hexmask.long.word 0x73C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x73C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x73C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x73C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x73C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x73C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x73C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x73C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x73C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x740 "DOC0EXPD1360,"
hexmask.long.word 0x740 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x740 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x740 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x740 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x740 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x740 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x740 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x740 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x740 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x744 "DOC0EXPD1361,"
hexmask.long.word 0x744 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x744 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x744 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x744 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x744 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x744 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x744 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x744 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x744 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x748 "DOC0EXPD1362,"
hexmask.long.word 0x748 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x748 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x748 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x748 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x748 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x748 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x748 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x748 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x748 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x74C "DOC0EXPD1363,"
hexmask.long.word 0x74C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x74C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x74C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x74C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x74C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x74C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x74C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x74C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x74C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x750 "DOC0EXPD1364,"
hexmask.long.word 0x750 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x750 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x750 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x750 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x750 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x750 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x750 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x750 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x750 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x754 "DOC0EXPD1365,"
hexmask.long.word 0x754 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x754 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x754 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x754 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x754 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x754 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x754 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x754 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x754 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x758 "DOC0EXPD1366,"
hexmask.long.word 0x758 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x758 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x758 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x758 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x758 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x758 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x758 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x758 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x758 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x75C "DOC0EXPD1367,"
hexmask.long.word 0x75C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x75C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x75C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x75C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x75C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x75C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x75C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x75C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x75C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x760 "DOC0EXPD1368,"
hexmask.long.word 0x760 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x760 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x760 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x760 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x760 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x760 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x760 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x760 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x760 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x764 "DOC0EXPD1369,"
hexmask.long.word 0x764 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x764 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x764 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x764 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x764 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x764 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x764 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x764 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x764 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x768 "DOC0EXPD1370,"
hexmask.long.word 0x768 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x768 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x768 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x768 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x768 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x768 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x768 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x768 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x768 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x76C "DOC0EXPD1371,"
hexmask.long.word 0x76C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x76C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x76C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x76C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x76C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x76C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x76C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x76C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x76C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x770 "DOC0EXPD1372,"
hexmask.long.word 0x770 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x770 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x770 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x770 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x770 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x770 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x770 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x770 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x770 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x774 "DOC0EXPD1373,"
hexmask.long.word 0x774 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x774 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x774 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x774 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x774 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x774 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x774 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x774 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x774 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x778 "DOC0EXPD1374,"
hexmask.long.word 0x778 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x778 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x778 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x778 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x778 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x778 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x778 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x778 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x778 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x77C "DOC0EXPD1375,"
hexmask.long.word 0x77C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x77C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x77C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x77C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x77C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x77C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x77C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x77C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x77C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x780 "DOC0EXPD1376,"
hexmask.long.word 0x780 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x780 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x780 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x780 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x780 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x780 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x780 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x780 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x780 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x784 "DOC0EXPD1377,"
hexmask.long.word 0x784 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x784 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x784 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x784 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x784 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x784 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x784 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x784 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x784 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x788 "DOC0EXPD1378,"
hexmask.long.word 0x788 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x788 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x788 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x788 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x788 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x788 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x788 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x788 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x788 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x78C "DOC0EXPD1379,"
hexmask.long.word 0x78C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x78C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x78C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x78C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x78C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x78C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x78C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x78C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x78C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x790 "DOC0EXPD1380,"
hexmask.long.word 0x790 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x790 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x790 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x790 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x790 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x790 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x790 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x790 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x790 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x794 "DOC0EXPD1381,"
hexmask.long.word 0x794 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x794 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x794 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x794 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x794 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x794 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x794 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x794 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x794 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x798 "DOC0EXPD1382,"
hexmask.long.word 0x798 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x798 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x798 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x798 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x798 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x798 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x798 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x798 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x798 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x79C "DOC0EXPD1383,"
hexmask.long.word 0x79C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x79C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x79C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x79C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x79C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x79C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x79C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x79C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x79C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A0 "DOC0EXPD1384,"
hexmask.long.word 0x7A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A4 "DOC0EXPD1385,"
hexmask.long.word 0x7A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A8 "DOC0EXPD1386,"
hexmask.long.word 0x7A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7AC "DOC0EXPD1387,"
hexmask.long.word 0x7AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B0 "DOC0EXPD1388,"
hexmask.long.word 0x7B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B4 "DOC0EXPD1389,"
hexmask.long.word 0x7B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B8 "DOC0EXPD1390,"
hexmask.long.word 0x7B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7BC "DOC0EXPD1391,"
hexmask.long.word 0x7BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C0 "DOC0EXPD1392,"
hexmask.long.word 0x7C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C4 "DOC0EXPD1393,"
hexmask.long.word 0x7C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C8 "DOC0EXPD1394,"
hexmask.long.word 0x7C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7CC "DOC0EXPD1395,"
hexmask.long.word 0x7CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D0 "DOC0EXPD1396,"
hexmask.long.word 0x7D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D4 "DOC0EXPD1397,"
hexmask.long.word 0x7D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D8 "DOC0EXPD1398,"
hexmask.long.word 0x7D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7DC "DOC0EXPD1399,"
hexmask.long.word 0x7DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E0 "DOC0EXPD1400,"
hexmask.long.word 0x7E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E4 "DOC0EXPD1401,"
hexmask.long.word 0x7E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E8 "DOC0EXPD1402,"
hexmask.long.word 0x7E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7EC "DOC0EXPD1403,"
hexmask.long.word 0x7EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F0 "DOC0EXPD1404,"
hexmask.long.word 0x7F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F4 "DOC0EXPD1405,"
hexmask.long.word 0x7F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F8 "DOC0EXPD1406,"
hexmask.long.word 0x7F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7FC "DOC0EXPD1407,"
hexmask.long.word 0x7FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x800 "DOC0EXPD1408,"
hexmask.long.word 0x800 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x800 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x800 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x800 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x800 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x800 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x800 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x800 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x800 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x804 "DOC0EXPD1409,"
hexmask.long.word 0x804 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x804 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x804 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x804 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x804 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x804 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x804 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x804 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x804 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x808 "DOC0EXPD1410,"
hexmask.long.word 0x808 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x808 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x808 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x808 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x808 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x808 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x808 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x808 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x808 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x80C "DOC0EXPD1411,"
hexmask.long.word 0x80C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x80C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x80C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x80C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x80C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x80C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x80C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x80C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x80C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x810 "DOC0EXPD1412,"
hexmask.long.word 0x810 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x810 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x810 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x810 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x810 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x810 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x810 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x810 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x810 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x814 "DOC0EXPD1413,"
hexmask.long.word 0x814 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x814 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x814 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x814 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x814 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x814 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x814 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x814 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x814 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x818 "DOC0EXPD1414,"
hexmask.long.word 0x818 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x818 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x818 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x818 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x818 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x818 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x818 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x818 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x818 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x81C "DOC0EXPD1415,"
hexmask.long.word 0x81C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x81C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x81C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x81C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x81C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x81C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x81C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x81C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x81C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x820 "DOC0EXPD1416,"
hexmask.long.word 0x820 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x820 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x820 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x820 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x820 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x820 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x820 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x820 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x820 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x824 "DOC0EXPD1417,"
hexmask.long.word 0x824 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x824 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x824 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x824 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x824 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x824 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x824 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x824 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x824 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x828 "DOC0EXPD1418,"
hexmask.long.word 0x828 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x828 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x828 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x828 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x828 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x828 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x828 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x828 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x828 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x82C "DOC0EXPD1419,"
hexmask.long.word 0x82C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x82C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x82C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x82C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x82C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x82C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x82C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x82C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x82C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x830 "DOC0EXPD1420,"
hexmask.long.word 0x830 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x830 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x830 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x830 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x830 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x830 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x830 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x830 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x830 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x834 "DOC0EXPD1421,"
hexmask.long.word 0x834 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x834 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x834 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x834 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x834 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x834 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x834 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x834 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x834 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x838 "DOC0EXPD1422,"
hexmask.long.word 0x838 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x838 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x838 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x838 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x838 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x838 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x838 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x838 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x838 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x83C "DOC0EXPD1423,"
hexmask.long.word 0x83C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x83C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x83C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x83C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x83C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x83C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x83C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x83C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x83C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x840 "DOC0EXPD1424,"
hexmask.long.word 0x840 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x840 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x840 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x840 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x840 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x840 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x840 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x840 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x840 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x844 "DOC0EXPD1425,"
hexmask.long.word 0x844 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x844 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x844 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x844 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x844 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x844 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x844 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x844 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x844 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x848 "DOC0EXPD1426,"
hexmask.long.word 0x848 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x848 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x848 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x848 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x848 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x848 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x848 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x848 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x848 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x84C "DOC0EXPD1427,"
hexmask.long.word 0x84C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x84C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x84C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x84C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x84C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x84C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x84C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x84C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x84C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x850 "DOC0EXPD1428,"
hexmask.long.word 0x850 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x850 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x850 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x850 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x850 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x850 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x850 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x850 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x850 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x854 "DOC0EXPD1429,"
hexmask.long.word 0x854 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x854 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x854 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x854 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x854 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x854 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x854 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x854 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x854 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x858 "DOC0EXPD1430,"
hexmask.long.word 0x858 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x858 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x858 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x858 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x858 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x858 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x858 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x858 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x858 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x85C "DOC0EXPD1431,"
hexmask.long.word 0x85C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x85C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x85C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x85C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x85C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x85C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x85C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x85C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x85C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x860 "DOC0EXPD1432,"
hexmask.long.word 0x860 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x860 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x860 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x860 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x860 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x860 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x860 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x860 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x860 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x864 "DOC0EXPD1433,"
hexmask.long.word 0x864 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x864 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x864 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x864 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x864 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x864 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x864 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x864 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x864 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x868 "DOC0EXPD1434,"
hexmask.long.word 0x868 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x868 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x868 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x868 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x868 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x868 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x868 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x868 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x868 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x86C "DOC0EXPD1435,"
hexmask.long.word 0x86C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x86C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x86C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x86C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x86C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x86C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x86C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x86C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x86C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x870 "DOC0EXPD1436,"
hexmask.long.word 0x870 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x870 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x870 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x870 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x870 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x870 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x870 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x870 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x870 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x874 "DOC0EXPD1437,"
hexmask.long.word 0x874 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x874 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x874 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x874 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x874 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x874 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x874 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x874 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x874 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x878 "DOC0EXPD1438,"
hexmask.long.word 0x878 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x878 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x878 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x878 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x878 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x878 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x878 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x878 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x878 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x87C "DOC0EXPD1439,"
hexmask.long.word 0x87C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x87C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x87C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x87C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x87C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x87C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x87C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x87C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x87C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x880 "DOC0EXPD1440,"
hexmask.long.word 0x880 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x880 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x880 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x880 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x880 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x880 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x880 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x880 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x880 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x884 "DOC0EXPD1441,"
hexmask.long.word 0x884 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x884 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x884 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x884 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x884 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x884 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x884 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x884 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x884 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x888 "DOC0EXPD1442,"
hexmask.long.word 0x888 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x888 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x888 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x888 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x888 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x888 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x888 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x888 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x888 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x88C "DOC0EXPD1443,"
hexmask.long.word 0x88C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x88C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x88C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x88C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x88C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x88C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x88C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x88C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x88C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x890 "DOC0EXPD1444,"
hexmask.long.word 0x890 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x890 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x890 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x890 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x890 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x890 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x890 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x890 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x890 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x894 "DOC0EXPD1445,"
hexmask.long.word 0x894 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x894 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x894 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x894 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x894 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x894 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x894 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x894 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x894 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x898 "DOC0EXPD1446,"
hexmask.long.word 0x898 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x898 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x898 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x898 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x898 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x898 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x898 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x898 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x898 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x89C "DOC0EXPD1447,"
hexmask.long.word 0x89C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x89C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x89C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x89C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x89C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x89C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x89C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x89C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x89C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A0 "DOC0EXPD1448,"
hexmask.long.word 0x8A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A4 "DOC0EXPD1449,"
hexmask.long.word 0x8A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A8 "DOC0EXPD1450,"
hexmask.long.word 0x8A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8AC "DOC0EXPD1451,"
hexmask.long.word 0x8AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B0 "DOC0EXPD1452,"
hexmask.long.word 0x8B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B4 "DOC0EXPD1453,"
hexmask.long.word 0x8B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B8 "DOC0EXPD1454,"
hexmask.long.word 0x8B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8BC "DOC0EXPD1455,"
hexmask.long.word 0x8BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C0 "DOC0EXPD1456,"
hexmask.long.word 0x8C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C4 "DOC0EXPD1457,"
hexmask.long.word 0x8C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C8 "DOC0EXPD1458,"
hexmask.long.word 0x8C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8CC "DOC0EXPD1459,"
hexmask.long.word 0x8CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D0 "DOC0EXPD1460,"
hexmask.long.word 0x8D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D4 "DOC0EXPD1461,"
hexmask.long.word 0x8D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D8 "DOC0EXPD1462,"
hexmask.long.word 0x8D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8DC "DOC0EXPD1463,"
hexmask.long.word 0x8DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E0 "DOC0EXPD1464,"
hexmask.long.word 0x8E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E4 "DOC0EXPD1465,"
hexmask.long.word 0x8E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E8 "DOC0EXPD1466,"
hexmask.long.word 0x8E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8EC "DOC0EXPD1467,"
hexmask.long.word 0x8EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F0 "DOC0EXPD1468,"
hexmask.long.word 0x8F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F4 "DOC0EXPD1469,"
hexmask.long.word 0x8F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F8 "DOC0EXPD1470,"
hexmask.long.word 0x8F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8FC "DOC0EXPD1471,"
hexmask.long.word 0x8FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x900 "DOC0EXPD1472,"
hexmask.long.word 0x900 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x900 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x900 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x900 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x900 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x900 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x900 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x900 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x900 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x904 "DOC0EXPD1473,"
hexmask.long.word 0x904 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x904 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x904 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x904 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x904 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x904 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x904 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x904 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x904 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x908 "DOC0EXPD1474,"
hexmask.long.word 0x908 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x908 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x908 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x908 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x908 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x908 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x908 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x908 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x908 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x90C "DOC0EXPD1475,"
hexmask.long.word 0x90C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x90C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x90C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x90C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x90C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x90C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x90C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x90C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x90C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x910 "DOC0EXPD1476,"
hexmask.long.word 0x910 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x910 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x910 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x910 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x910 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x910 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x910 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x910 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x910 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x914 "DOC0EXPD1477,"
hexmask.long.word 0x914 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x914 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x914 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x914 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x914 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x914 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x914 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x914 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x914 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x918 "DOC0EXPD1478,"
hexmask.long.word 0x918 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x918 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x918 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x918 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x918 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x918 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x918 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x918 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x918 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x91C "DOC0EXPD1479,"
hexmask.long.word 0x91C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x91C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x91C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x91C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x91C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x91C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x91C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x91C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x91C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x920 "DOC0EXPD1480,"
hexmask.long.word 0x920 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x920 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x920 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x920 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x920 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x920 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x920 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x920 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x920 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x924 "DOC0EXPD1481,"
hexmask.long.word 0x924 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x924 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x924 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x924 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x924 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x924 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x924 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x924 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x924 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x928 "DOC0EXPD1482,"
hexmask.long.word 0x928 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x928 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x928 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x928 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x928 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x928 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x928 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x928 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x928 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x92C "DOC0EXPD1483,"
hexmask.long.word 0x92C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x92C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x92C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x92C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x92C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x92C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x92C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x92C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x92C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x930 "DOC0EXPD1484,"
hexmask.long.word 0x930 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x930 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x930 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x930 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x930 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x930 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x930 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x930 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x930 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x934 "DOC0EXPD1485,"
hexmask.long.word 0x934 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x934 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x934 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x934 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x934 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x934 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x934 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x934 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x934 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x938 "DOC0EXPD1486,"
hexmask.long.word 0x938 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x938 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x938 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x938 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x938 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x938 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x938 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x938 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x938 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x93C "DOC0EXPD1487,"
hexmask.long.word 0x93C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x93C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x93C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x93C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x93C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x93C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x93C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x93C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x93C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x940 "DOC0EXPD1488,"
hexmask.long.word 0x940 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x940 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x940 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x940 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x940 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x940 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x940 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x940 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x940 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x944 "DOC0EXPD1489,"
hexmask.long.word 0x944 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x944 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x944 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x944 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x944 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x944 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x944 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x944 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x944 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x948 "DOC0EXPD1490,"
hexmask.long.word 0x948 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x948 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x948 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x948 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x948 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x948 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x948 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x948 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x948 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x94C "DOC0EXPD1491,"
hexmask.long.word 0x94C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x94C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x94C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x94C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x94C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x94C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x94C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x94C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x94C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x950 "DOC0EXPD1492,"
hexmask.long.word 0x950 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x950 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x950 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x950 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x950 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x950 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x950 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x950 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x950 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x954 "DOC0EXPD1493,"
hexmask.long.word 0x954 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x954 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x954 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x954 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x954 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x954 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x954 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x954 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x954 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x958 "DOC0EXPD1494,"
hexmask.long.word 0x958 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x958 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x958 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x958 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x958 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x958 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x958 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x958 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x958 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x95C "DOC0EXPD1495,"
hexmask.long.word 0x95C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x95C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x95C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x95C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x95C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x95C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x95C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x95C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x95C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x960 "DOC0EXPD1496,"
hexmask.long.word 0x960 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x960 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x960 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x960 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x960 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x960 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x960 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x960 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x960 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x964 "DOC0EXPD1497,"
hexmask.long.word 0x964 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x964 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x964 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x964 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x964 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x964 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x964 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x964 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x964 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x968 "DOC0EXPD1498,"
hexmask.long.word 0x968 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x968 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x968 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x968 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x968 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x968 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x968 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x968 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x968 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x96C "DOC0EXPD1499,"
hexmask.long.word 0x96C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x96C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x96C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x96C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x96C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x96C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x96C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x96C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x96C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x970 "DOC0EXPD1500,"
hexmask.long.word 0x970 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x970 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x970 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x970 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x970 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x970 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x970 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x970 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x970 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x974 "DOC0EXPD1501,"
hexmask.long.word 0x974 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x974 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x974 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x974 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x974 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x974 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x974 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x974 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x974 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x978 "DOC0EXPD1502,"
hexmask.long.word 0x978 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x978 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x978 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x978 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x978 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x978 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x978 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x978 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x978 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x97C "DOC0EXPD1503,"
hexmask.long.word 0x97C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x97C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x97C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x97C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x97C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x97C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x97C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x97C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x97C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x980 "DOC0EXPD1504,"
hexmask.long.word 0x980 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x980 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x980 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x980 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x980 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x980 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x980 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x980 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x980 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x984 "DOC0EXPD1505,"
hexmask.long.word 0x984 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x984 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x984 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x984 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x984 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x984 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x984 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x984 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x984 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x988 "DOC0EXPD1506,"
hexmask.long.word 0x988 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x988 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x988 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x988 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x988 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x988 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x988 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x988 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x988 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x98C "DOC0EXPD1507,"
hexmask.long.word 0x98C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x98C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x98C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x98C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x98C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x98C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x98C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x98C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x98C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x990 "DOC0EXPD1508,"
hexmask.long.word 0x990 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x990 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x990 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x990 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x990 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x990 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x990 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x990 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x990 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x994 "DOC0EXPD1509,"
hexmask.long.word 0x994 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x994 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x994 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x994 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x994 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x994 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x994 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x994 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x994 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x998 "DOC0EXPD1510,"
hexmask.long.word 0x998 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x998 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x998 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x998 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x998 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x998 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x998 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x998 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x998 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x99C "DOC0EXPD1511,"
hexmask.long.word 0x99C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x99C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x99C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x99C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x99C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x99C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x99C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x99C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x99C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A0 "DOC0EXPD1512,"
hexmask.long.word 0x9A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A4 "DOC0EXPD1513,"
hexmask.long.word 0x9A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A8 "DOC0EXPD1514,"
hexmask.long.word 0x9A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9AC "DOC0EXPD1515,"
hexmask.long.word 0x9AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B0 "DOC0EXPD1516,"
hexmask.long.word 0x9B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B4 "DOC0EXPD1517,"
hexmask.long.word 0x9B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B8 "DOC0EXPD1518,"
hexmask.long.word 0x9B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9BC "DOC0EXPD1519,"
hexmask.long.word 0x9BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C0 "DOC0EXPD1520,"
hexmask.long.word 0x9C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C4 "DOC0EXPD1521,"
hexmask.long.word 0x9C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C8 "DOC0EXPD1522,"
hexmask.long.word 0x9C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9CC "DOC0EXPD1523,"
hexmask.long.word 0x9CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D0 "DOC0EXPD1524,"
hexmask.long.word 0x9D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D4 "DOC0EXPD1525,"
hexmask.long.word 0x9D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D8 "DOC0EXPD1526,"
hexmask.long.word 0x9D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9DC "DOC0EXPD1527,"
hexmask.long.word 0x9DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E0 "DOC0EXPD1528,"
hexmask.long.word 0x9E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E4 "DOC0EXPD1529,"
hexmask.long.word 0x9E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E8 "DOC0EXPD1530,"
hexmask.long.word 0x9E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9EC "DOC0EXPD1531,"
hexmask.long.word 0x9EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F0 "DOC0EXPD1532,"
hexmask.long.word 0x9F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F4 "DOC0EXPD1533,"
hexmask.long.word 0x9F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F8 "DOC0EXPD1534,"
hexmask.long.word 0x9F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9FC "DOC0EXPD1535,"
hexmask.long.word 0x9FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA00 "DOC0EXPD1536,"
hexmask.long.word 0xA00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA04 "DOC0EXPD1537,"
hexmask.long.word 0xA04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA08 "DOC0EXPD1538,"
hexmask.long.word 0xA08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA0C "DOC0EXPD1539,"
hexmask.long.word 0xA0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA10 "DOC0EXPD1540,"
hexmask.long.word 0xA10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA14 "DOC0EXPD1541,"
hexmask.long.word 0xA14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA18 "DOC0EXPD1542,"
hexmask.long.word 0xA18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA1C "DOC0EXPD1543,"
hexmask.long.word 0xA1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA20 "DOC0EXPD1544,"
hexmask.long.word 0xA20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA24 "DOC0EXPD1545,"
hexmask.long.word 0xA24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA28 "DOC0EXPD1546,"
hexmask.long.word 0xA28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA2C "DOC0EXPD1547,"
hexmask.long.word 0xA2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA30 "DOC0EXPD1548,"
hexmask.long.word 0xA30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA34 "DOC0EXPD1549,"
hexmask.long.word 0xA34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA38 "DOC0EXPD1550,"
hexmask.long.word 0xA38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA3C "DOC0EXPD1551,"
hexmask.long.word 0xA3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA40 "DOC0EXPD1552,"
hexmask.long.word 0xA40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA44 "DOC0EXPD1553,"
hexmask.long.word 0xA44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA48 "DOC0EXPD1554,"
hexmask.long.word 0xA48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA4C "DOC0EXPD1555,"
hexmask.long.word 0xA4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA50 "DOC0EXPD1556,"
hexmask.long.word 0xA50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA54 "DOC0EXPD1557,"
hexmask.long.word 0xA54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA58 "DOC0EXPD1558,"
hexmask.long.word 0xA58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA5C "DOC0EXPD1559,"
hexmask.long.word 0xA5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA60 "DOC0EXPD1560,"
hexmask.long.word 0xA60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA64 "DOC0EXPD1561,"
hexmask.long.word 0xA64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA68 "DOC0EXPD1562,"
hexmask.long.word 0xA68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA6C "DOC0EXPD1563,"
hexmask.long.word 0xA6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA70 "DOC0EXPD1564,"
hexmask.long.word 0xA70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA74 "DOC0EXPD1565,"
hexmask.long.word 0xA74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA78 "DOC0EXPD1566,"
hexmask.long.word 0xA78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA7C "DOC0EXPD1567,"
hexmask.long.word 0xA7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA80 "DOC0EXPD1568,"
hexmask.long.word 0xA80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA84 "DOC0EXPD1569,"
hexmask.long.word 0xA84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA88 "DOC0EXPD1570,"
hexmask.long.word 0xA88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA8C "DOC0EXPD1571,"
hexmask.long.word 0xA8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA90 "DOC0EXPD1572,"
hexmask.long.word 0xA90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA94 "DOC0EXPD1573,"
hexmask.long.word 0xA94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA98 "DOC0EXPD1574,"
hexmask.long.word 0xA98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA9C "DOC0EXPD1575,"
hexmask.long.word 0xA9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA0 "DOC0EXPD1576,"
hexmask.long.word 0xAA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA4 "DOC0EXPD1577,"
hexmask.long.word 0xAA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA8 "DOC0EXPD1578,"
hexmask.long.word 0xAA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAAC "DOC0EXPD1579,"
hexmask.long.word 0xAAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB0 "DOC0EXPD1580,"
hexmask.long.word 0xAB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB4 "DOC0EXPD1581,"
hexmask.long.word 0xAB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB8 "DOC0EXPD1582,"
hexmask.long.word 0xAB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xABC "DOC0EXPD1583,"
hexmask.long.word 0xABC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xABC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xABC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xABC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xABC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xABC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xABC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xABC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xABC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC0 "DOC0EXPD1584,"
hexmask.long.word 0xAC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC4 "DOC0EXPD1585,"
hexmask.long.word 0xAC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC8 "DOC0EXPD1586,"
hexmask.long.word 0xAC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xACC "DOC0EXPD1587,"
hexmask.long.word 0xACC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xACC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xACC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xACC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xACC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xACC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xACC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xACC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xACC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD0 "DOC0EXPD1588,"
hexmask.long.word 0xAD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD4 "DOC0EXPD1589,"
hexmask.long.word 0xAD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD8 "DOC0EXPD1590,"
hexmask.long.word 0xAD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xADC "DOC0EXPD1591,"
hexmask.long.word 0xADC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xADC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xADC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xADC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xADC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xADC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xADC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xADC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xADC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE0 "DOC0EXPD1592,"
hexmask.long.word 0xAE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE4 "DOC0EXPD1593,"
hexmask.long.word 0xAE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE8 "DOC0EXPD1594,"
hexmask.long.word 0xAE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAEC "DOC0EXPD1595,"
hexmask.long.word 0xAEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF0 "DOC0EXPD1596,"
hexmask.long.word 0xAF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF4 "DOC0EXPD1597,"
hexmask.long.word 0xAF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF8 "DOC0EXPD1598,"
hexmask.long.word 0xAF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAFC "DOC0EXPD1599,"
hexmask.long.word 0xAFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB00 "DOC0EXPD1600,"
hexmask.long.word 0xB00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB04 "DOC0EXPD1601,"
hexmask.long.word 0xB04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB08 "DOC0EXPD1602,"
hexmask.long.word 0xB08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB0C "DOC0EXPD1603,"
hexmask.long.word 0xB0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB10 "DOC0EXPD1604,"
hexmask.long.word 0xB10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB14 "DOC0EXPD1605,"
hexmask.long.word 0xB14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB18 "DOC0EXPD1606,"
hexmask.long.word 0xB18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB1C "DOC0EXPD1607,"
hexmask.long.word 0xB1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB20 "DOC0EXPD1608,"
hexmask.long.word 0xB20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB24 "DOC0EXPD1609,"
hexmask.long.word 0xB24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB28 "DOC0EXPD1610,"
hexmask.long.word 0xB28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB2C "DOC0EXPD1611,"
hexmask.long.word 0xB2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB30 "DOC0EXPD1612,"
hexmask.long.word 0xB30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB34 "DOC0EXPD1613,"
hexmask.long.word 0xB34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB38 "DOC0EXPD1614,"
hexmask.long.word 0xB38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB3C "DOC0EXPD1615,"
hexmask.long.word 0xB3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB40 "DOC0EXPD1616,"
hexmask.long.word 0xB40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB44 "DOC0EXPD1617,"
hexmask.long.word 0xB44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB48 "DOC0EXPD1618,"
hexmask.long.word 0xB48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB4C "DOC0EXPD1619,"
hexmask.long.word 0xB4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB50 "DOC0EXPD1620,"
hexmask.long.word 0xB50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB54 "DOC0EXPD1621,"
hexmask.long.word 0xB54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB58 "DOC0EXPD1622,"
hexmask.long.word 0xB58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB5C "DOC0EXPD1623,"
hexmask.long.word 0xB5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB60 "DOC0EXPD1624,"
hexmask.long.word 0xB60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB64 "DOC0EXPD1625,"
hexmask.long.word 0xB64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB68 "DOC0EXPD1626,"
hexmask.long.word 0xB68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB6C "DOC0EXPD1627,"
hexmask.long.word 0xB6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB70 "DOC0EXPD1628,"
hexmask.long.word 0xB70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB74 "DOC0EXPD1629,"
hexmask.long.word 0xB74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB78 "DOC0EXPD1630,"
hexmask.long.word 0xB78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB7C "DOC0EXPD1631,"
hexmask.long.word 0xB7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB80 "DOC0EXPD1632,"
hexmask.long.word 0xB80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB84 "DOC0EXPD1633,"
hexmask.long.word 0xB84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB88 "DOC0EXPD1634,"
hexmask.long.word 0xB88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB8C "DOC0EXPD1635,"
hexmask.long.word 0xB8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB90 "DOC0EXPD1636,"
hexmask.long.word 0xB90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB94 "DOC0EXPD1637,"
hexmask.long.word 0xB94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB98 "DOC0EXPD1638,"
hexmask.long.word 0xB98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB9C "DOC0EXPD1639,"
hexmask.long.word 0xB9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA0 "DOC0EXPD1640,"
hexmask.long.word 0xBA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA4 "DOC0EXPD1641,"
hexmask.long.word 0xBA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA8 "DOC0EXPD1642,"
hexmask.long.word 0xBA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBAC "DOC0EXPD1643,"
hexmask.long.word 0xBAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB0 "DOC0EXPD1644,"
hexmask.long.word 0xBB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB4 "DOC0EXPD1645,"
hexmask.long.word 0xBB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB8 "DOC0EXPD1646,"
hexmask.long.word 0xBB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBBC "DOC0EXPD1647,"
hexmask.long.word 0xBBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC0 "DOC0EXPD1648,"
hexmask.long.word 0xBC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC4 "DOC0EXPD1649,"
hexmask.long.word 0xBC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC8 "DOC0EXPD1650,"
hexmask.long.word 0xBC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBCC "DOC0EXPD1651,"
hexmask.long.word 0xBCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD0 "DOC0EXPD1652,"
hexmask.long.word 0xBD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD4 "DOC0EXPD1653,"
hexmask.long.word 0xBD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD8 "DOC0EXPD1654,"
hexmask.long.word 0xBD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBDC "DOC0EXPD1655,"
hexmask.long.word 0xBDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE0 "DOC0EXPD1656,"
hexmask.long.word 0xBE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE4 "DOC0EXPD1657,"
hexmask.long.word 0xBE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE8 "DOC0EXPD1658,"
hexmask.long.word 0xBE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBEC "DOC0EXPD1659,"
hexmask.long.word 0xBEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF0 "DOC0EXPD1660,"
hexmask.long.word 0xBF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF4 "DOC0EXPD1661,"
hexmask.long.word 0xBF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF8 "DOC0EXPD1662,"
hexmask.long.word 0xBF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBFC "DOC0EXPD1663,"
hexmask.long.word 0xBFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC00 "DOC0EXPD1664,"
hexmask.long.word 0xC00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC04 "DOC0EXPD1665,"
hexmask.long.word 0xC04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC08 "DOC0EXPD1666,"
hexmask.long.word 0xC08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC0C "DOC0EXPD1667,"
hexmask.long.word 0xC0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC10 "DOC0EXPD1668,"
hexmask.long.word 0xC10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC14 "DOC0EXPD1669,"
hexmask.long.word 0xC14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC18 "DOC0EXPD1670,"
hexmask.long.word 0xC18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC1C "DOC0EXPD1671,"
hexmask.long.word 0xC1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC20 "DOC0EXPD1672,"
hexmask.long.word 0xC20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC24 "DOC0EXPD1673,"
hexmask.long.word 0xC24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC28 "DOC0EXPD1674,"
hexmask.long.word 0xC28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC2C "DOC0EXPD1675,"
hexmask.long.word 0xC2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC30 "DOC0EXPD1676,"
hexmask.long.word 0xC30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC34 "DOC0EXPD1677,"
hexmask.long.word 0xC34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC38 "DOC0EXPD1678,"
hexmask.long.word 0xC38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC3C "DOC0EXPD1679,"
hexmask.long.word 0xC3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC40 "DOC0EXPD1680,"
hexmask.long.word 0xC40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC44 "DOC0EXPD1681,"
hexmask.long.word 0xC44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC48 "DOC0EXPD1682,"
hexmask.long.word 0xC48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC4C "DOC0EXPD1683,"
hexmask.long.word 0xC4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC50 "DOC0EXPD1684,"
hexmask.long.word 0xC50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC54 "DOC0EXPD1685,"
hexmask.long.word 0xC54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC58 "DOC0EXPD1686,"
hexmask.long.word 0xC58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC5C "DOC0EXPD1687,"
hexmask.long.word 0xC5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC60 "DOC0EXPD1688,"
hexmask.long.word 0xC60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC64 "DOC0EXPD1689,"
hexmask.long.word 0xC64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC68 "DOC0EXPD1690,"
hexmask.long.word 0xC68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC6C "DOC0EXPD1691,"
hexmask.long.word 0xC6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC70 "DOC0EXPD1692,"
hexmask.long.word 0xC70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC74 "DOC0EXPD1693,"
hexmask.long.word 0xC74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC78 "DOC0EXPD1694,"
hexmask.long.word 0xC78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC7C "DOC0EXPD1695,"
hexmask.long.word 0xC7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC80 "DOC0EXPD1696,"
hexmask.long.word 0xC80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC84 "DOC0EXPD1697,"
hexmask.long.word 0xC84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC88 "DOC0EXPD1698,"
hexmask.long.word 0xC88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC8C "DOC0EXPD1699,"
hexmask.long.word 0xC8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC90 "DOC0EXPD1700,"
hexmask.long.word 0xC90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC94 "DOC0EXPD1701,"
hexmask.long.word 0xC94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC98 "DOC0EXPD1702,"
hexmask.long.word 0xC98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC9C "DOC0EXPD1703,"
hexmask.long.word 0xC9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA0 "DOC0EXPD1704,"
hexmask.long.word 0xCA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA4 "DOC0EXPD1705,"
hexmask.long.word 0xCA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA8 "DOC0EXPD1706,"
hexmask.long.word 0xCA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCAC "DOC0EXPD1707,"
hexmask.long.word 0xCAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB0 "DOC0EXPD1708,"
hexmask.long.word 0xCB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB4 "DOC0EXPD1709,"
hexmask.long.word 0xCB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB8 "DOC0EXPD1710,"
hexmask.long.word 0xCB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCBC "DOC0EXPD1711,"
hexmask.long.word 0xCBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC0 "DOC0EXPD1712,"
hexmask.long.word 0xCC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC4 "DOC0EXPD1713,"
hexmask.long.word 0xCC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC8 "DOC0EXPD1714,"
hexmask.long.word 0xCC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCCC "DOC0EXPD1715,"
hexmask.long.word 0xCCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD0 "DOC0EXPD1716,"
hexmask.long.word 0xCD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD4 "DOC0EXPD1717,"
hexmask.long.word 0xCD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD8 "DOC0EXPD1718,"
hexmask.long.word 0xCD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCDC "DOC0EXPD1719,"
hexmask.long.word 0xCDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE0 "DOC0EXPD1720,"
hexmask.long.word 0xCE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE4 "DOC0EXPD1721,"
hexmask.long.word 0xCE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE8 "DOC0EXPD1722,"
hexmask.long.word 0xCE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCEC "DOC0EXPD1723,"
hexmask.long.word 0xCEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF0 "DOC0EXPD1724,"
hexmask.long.word 0xCF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF4 "DOC0EXPD1725,"
hexmask.long.word 0xCF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF8 "DOC0EXPD1726,"
hexmask.long.word 0xCF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCFC "DOC0EXPD1727,"
hexmask.long.word 0xCFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD00 "DOC0EXPD1728,"
hexmask.long.word 0xD00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD04 "DOC0EXPD1729,"
hexmask.long.word 0xD04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD08 "DOC0EXPD1730,"
hexmask.long.word 0xD08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD0C "DOC0EXPD1731,"
hexmask.long.word 0xD0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD10 "DOC0EXPD1732,"
hexmask.long.word 0xD10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD14 "DOC0EXPD1733,"
hexmask.long.word 0xD14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD18 "DOC0EXPD1734,"
hexmask.long.word 0xD18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD1C "DOC0EXPD1735,"
hexmask.long.word 0xD1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD20 "DOC0EXPD1736,"
hexmask.long.word 0xD20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD24 "DOC0EXPD1737,"
hexmask.long.word 0xD24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD28 "DOC0EXPD1738,"
hexmask.long.word 0xD28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD2C "DOC0EXPD1739,"
hexmask.long.word 0xD2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD30 "DOC0EXPD1740,"
hexmask.long.word 0xD30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD34 "DOC0EXPD1741,"
hexmask.long.word 0xD34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD38 "DOC0EXPD1742,"
hexmask.long.word 0xD38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD3C "DOC0EXPD1743,"
hexmask.long.word 0xD3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD40 "DOC0EXPD1744,"
hexmask.long.word 0xD40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD44 "DOC0EXPD1745,"
hexmask.long.word 0xD44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD48 "DOC0EXPD1746,"
hexmask.long.word 0xD48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD4C "DOC0EXPD1747,"
hexmask.long.word 0xD4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD50 "DOC0EXPD1748,"
hexmask.long.word 0xD50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD54 "DOC0EXPD1749,"
hexmask.long.word 0xD54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD58 "DOC0EXPD1750,"
hexmask.long.word 0xD58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD5C "DOC0EXPD1751,"
hexmask.long.word 0xD5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD60 "DOC0EXPD1752,"
hexmask.long.word 0xD60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD64 "DOC0EXPD1753,"
hexmask.long.word 0xD64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD68 "DOC0EXPD1754,"
hexmask.long.word 0xD68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD6C "DOC0EXPD1755,"
hexmask.long.word 0xD6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD70 "DOC0EXPD1756,"
hexmask.long.word 0xD70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD74 "DOC0EXPD1757,"
hexmask.long.word 0xD74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD78 "DOC0EXPD1758,"
hexmask.long.word 0xD78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD7C "DOC0EXPD1759,"
hexmask.long.word 0xD7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD80 "DOC0EXPD1760,"
hexmask.long.word 0xD80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD84 "DOC0EXPD1761,"
hexmask.long.word 0xD84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD88 "DOC0EXPD1762,"
hexmask.long.word 0xD88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD8C "DOC0EXPD1763,"
hexmask.long.word 0xD8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD90 "DOC0EXPD1764,"
hexmask.long.word 0xD90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD94 "DOC0EXPD1765,"
hexmask.long.word 0xD94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD98 "DOC0EXPD1766,"
hexmask.long.word 0xD98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD9C "DOC0EXPD1767,"
hexmask.long.word 0xD9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA0 "DOC0EXPD1768,"
hexmask.long.word 0xDA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA4 "DOC0EXPD1769,"
hexmask.long.word 0xDA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA8 "DOC0EXPD1770,"
hexmask.long.word 0xDA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDAC "DOC0EXPD1771,"
hexmask.long.word 0xDAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB0 "DOC0EXPD1772,"
hexmask.long.word 0xDB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB4 "DOC0EXPD1773,"
hexmask.long.word 0xDB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB8 "DOC0EXPD1774,"
hexmask.long.word 0xDB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDBC "DOC0EXPD1775,"
hexmask.long.word 0xDBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC0 "DOC0EXPD1776,"
hexmask.long.word 0xDC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC4 "DOC0EXPD1777,"
hexmask.long.word 0xDC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC8 "DOC0EXPD1778,"
hexmask.long.word 0xDC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDCC "DOC0EXPD1779,"
hexmask.long.word 0xDCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD0 "DOC0EXPD1780,"
hexmask.long.word 0xDD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD4 "DOC0EXPD1781,"
hexmask.long.word 0xDD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD8 "DOC0EXPD1782,"
hexmask.long.word 0xDD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDDC "DOC0EXPD1783,"
hexmask.long.word 0xDDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE0 "DOC0EXPD1784,"
hexmask.long.word 0xDE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE4 "DOC0EXPD1785,"
hexmask.long.word 0xDE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE8 "DOC0EXPD1786,"
hexmask.long.word 0xDE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDEC "DOC0EXPD1787,"
hexmask.long.word 0xDEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF0 "DOC0EXPD1788,"
hexmask.long.word 0xDF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF4 "DOC0EXPD1789,"
hexmask.long.word 0xDF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF8 "DOC0EXPD1790,"
hexmask.long.word 0xDF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDFC "DOC0EXPD1791,"
hexmask.long.word 0xDFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE00 "DOC0EXPD1792,"
hexmask.long.word 0xE00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE04 "DOC0EXPD1793,"
hexmask.long.word 0xE04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE08 "DOC0EXPD1794,"
hexmask.long.word 0xE08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE0C "DOC0EXPD1795,"
hexmask.long.word 0xE0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE10 "DOC0EXPD1796,"
hexmask.long.word 0xE10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE14 "DOC0EXPD1797,"
hexmask.long.word 0xE14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE18 "DOC0EXPD1798,"
hexmask.long.word 0xE18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE1C "DOC0EXPD1799,"
hexmask.long.word 0xE1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE20 "DOC0EXPD1800,"
hexmask.long.word 0xE20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE24 "DOC0EXPD1801,"
hexmask.long.word 0xE24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE28 "DOC0EXPD1802,"
hexmask.long.word 0xE28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE2C "DOC0EXPD1803,"
hexmask.long.word 0xE2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE30 "DOC0EXPD1804,"
hexmask.long.word 0xE30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE34 "DOC0EXPD1805,"
hexmask.long.word 0xE34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE38 "DOC0EXPD1806,"
hexmask.long.word 0xE38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE3C "DOC0EXPD1807,"
hexmask.long.word 0xE3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE40 "DOC0EXPD1808,"
hexmask.long.word 0xE40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE44 "DOC0EXPD1809,"
hexmask.long.word 0xE44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE48 "DOC0EXPD1810,"
hexmask.long.word 0xE48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE4C "DOC0EXPD1811,"
hexmask.long.word 0xE4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE50 "DOC0EXPD1812,"
hexmask.long.word 0xE50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE54 "DOC0EXPD1813,"
hexmask.long.word 0xE54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE58 "DOC0EXPD1814,"
hexmask.long.word 0xE58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE5C "DOC0EXPD1815,"
hexmask.long.word 0xE5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE60 "DOC0EXPD1816,"
hexmask.long.word 0xE60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE64 "DOC0EXPD1817,"
hexmask.long.word 0xE64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE68 "DOC0EXPD1818,"
hexmask.long.word 0xE68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE6C "DOC0EXPD1819,"
hexmask.long.word 0xE6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE70 "DOC0EXPD1820,"
hexmask.long.word 0xE70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE74 "DOC0EXPD1821,"
hexmask.long.word 0xE74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE78 "DOC0EXPD1822,"
hexmask.long.word 0xE78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE7C "DOC0EXPD1823,"
hexmask.long.word 0xE7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE80 "DOC0EXPD1824,"
hexmask.long.word 0xE80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE84 "DOC0EXPD1825,"
hexmask.long.word 0xE84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE88 "DOC0EXPD1826,"
hexmask.long.word 0xE88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE8C "DOC0EXPD1827,"
hexmask.long.word 0xE8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE90 "DOC0EXPD1828,"
hexmask.long.word 0xE90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE94 "DOC0EXPD1829,"
hexmask.long.word 0xE94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE98 "DOC0EXPD1830,"
hexmask.long.word 0xE98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE9C "DOC0EXPD1831,"
hexmask.long.word 0xE9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA0 "DOC0EXPD1832,"
hexmask.long.word 0xEA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA4 "DOC0EXPD1833,"
hexmask.long.word 0xEA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA8 "DOC0EXPD1834,"
hexmask.long.word 0xEA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEAC "DOC0EXPD1835,"
hexmask.long.word 0xEAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB0 "DOC0EXPD1836,"
hexmask.long.word 0xEB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB4 "DOC0EXPD1837,"
hexmask.long.word 0xEB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB8 "DOC0EXPD1838,"
hexmask.long.word 0xEB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEBC "DOC0EXPD1839,"
hexmask.long.word 0xEBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC0 "DOC0EXPD1840,"
hexmask.long.word 0xEC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC4 "DOC0EXPD1841,"
hexmask.long.word 0xEC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC8 "DOC0EXPD1842,"
hexmask.long.word 0xEC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xECC "DOC0EXPD1843,"
hexmask.long.word 0xECC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xECC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xECC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xECC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xECC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xECC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xECC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xECC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xECC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED0 "DOC0EXPD1844,"
hexmask.long.word 0xED0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED4 "DOC0EXPD1845,"
hexmask.long.word 0xED4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED8 "DOC0EXPD1846,"
hexmask.long.word 0xED8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEDC "DOC0EXPD1847,"
hexmask.long.word 0xEDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE0 "DOC0EXPD1848,"
hexmask.long.word 0xEE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE4 "DOC0EXPD1849,"
hexmask.long.word 0xEE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE8 "DOC0EXPD1850,"
hexmask.long.word 0xEE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEEC "DOC0EXPD1851,"
hexmask.long.word 0xEEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF0 "DOC0EXPD1852,"
hexmask.long.word 0xEF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF4 "DOC0EXPD1853,"
hexmask.long.word 0xEF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF8 "DOC0EXPD1854,"
hexmask.long.word 0xEF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEFC "DOC0EXPD1855,"
hexmask.long.word 0xEFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF00 "DOC0EXPD1856,"
hexmask.long.word 0xF00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF04 "DOC0EXPD1857,"
hexmask.long.word 0xF04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF08 "DOC0EXPD1858,"
hexmask.long.word 0xF08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF0C "DOC0EXPD1859,"
hexmask.long.word 0xF0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF10 "DOC0EXPD1860,"
hexmask.long.word 0xF10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF14 "DOC0EXPD1861,"
hexmask.long.word 0xF14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF18 "DOC0EXPD1862,"
hexmask.long.word 0xF18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF1C "DOC0EXPD1863,"
hexmask.long.word 0xF1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF20 "DOC0EXPD1864,"
hexmask.long.word 0xF20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF24 "DOC0EXPD1865,"
hexmask.long.word 0xF24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF28 "DOC0EXPD1866,"
hexmask.long.word 0xF28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF2C "DOC0EXPD1867,"
hexmask.long.word 0xF2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF30 "DOC0EXPD1868,"
hexmask.long.word 0xF30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF34 "DOC0EXPD1869,"
hexmask.long.word 0xF34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF38 "DOC0EXPD1870,"
hexmask.long.word 0xF38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF3C "DOC0EXPD1871,"
hexmask.long.word 0xF3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF40 "DOC0EXPD1872,"
hexmask.long.word 0xF40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF44 "DOC0EXPD1873,"
hexmask.long.word 0xF44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF48 "DOC0EXPD1874,"
hexmask.long.word 0xF48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF4C "DOC0EXPD1875,"
hexmask.long.word 0xF4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF50 "DOC0EXPD1876,"
hexmask.long.word 0xF50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF54 "DOC0EXPD1877,"
hexmask.long.word 0xF54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF58 "DOC0EXPD1878,"
hexmask.long.word 0xF58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF5C "DOC0EXPD1879,"
hexmask.long.word 0xF5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF60 "DOC0EXPD1880,"
hexmask.long.word 0xF60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF64 "DOC0EXPD1881,"
hexmask.long.word 0xF64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF68 "DOC0EXPD1882,"
hexmask.long.word 0xF68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF6C "DOC0EXPD1883,"
hexmask.long.word 0xF6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF70 "DOC0EXPD1884,"
hexmask.long.word 0xF70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF74 "DOC0EXPD1885,"
hexmask.long.word 0xF74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF78 "DOC0EXPD1886,"
hexmask.long.word 0xF78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF7C "DOC0EXPD1887,"
hexmask.long.word 0xF7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF80 "DOC0EXPD1888,"
hexmask.long.word 0xF80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF84 "DOC0EXPD1889,"
hexmask.long.word 0xF84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF88 "DOC0EXPD1890,"
hexmask.long.word 0xF88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF8C "DOC0EXPD1891,"
hexmask.long.word 0xF8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF90 "DOC0EXPD1892,"
hexmask.long.word 0xF90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF94 "DOC0EXPD1893,"
hexmask.long.word 0xF94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF98 "DOC0EXPD1894,"
hexmask.long.word 0xF98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF9C "DOC0EXPD1895,"
hexmask.long.word 0xF9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA0 "DOC0EXPD1896,"
hexmask.long.word 0xFA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA4 "DOC0EXPD1897,"
hexmask.long.word 0xFA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA8 "DOC0EXPD1898,"
hexmask.long.word 0xFA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFAC "DOC0EXPD1899,"
hexmask.long.word 0xFAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB0 "DOC0EXPD1900,"
hexmask.long.word 0xFB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB4 "DOC0EXPD1901,"
hexmask.long.word 0xFB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB8 "DOC0EXPD1902,"
hexmask.long.word 0xFB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFBC "DOC0EXPD1903,"
hexmask.long.word 0xFBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC0 "DOC0EXPD1904,"
hexmask.long.word 0xFC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC4 "DOC0EXPD1905,"
hexmask.long.word 0xFC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC8 "DOC0EXPD1906,"
hexmask.long.word 0xFC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFCC "DOC0EXPD1907,"
hexmask.long.word 0xFCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD0 "DOC0EXPD1908,"
hexmask.long.word 0xFD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD4 "DOC0EXPD1909,"
hexmask.long.word 0xFD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD8 "DOC0EXPD1910,"
hexmask.long.word 0xFD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFDC "DOC0EXPD1911,"
hexmask.long.word 0xFDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE0 "DOC0EXPD1912,"
hexmask.long.word 0xFE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE4 "DOC0EXPD1913,"
hexmask.long.word 0xFE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE8 "DOC0EXPD1914,"
hexmask.long.word 0xFE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFEC "DOC0EXPD1915,"
hexmask.long.word 0xFEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF0 "DOC0EXPD1916,"
hexmask.long.word 0xFF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF4 "DOC0EXPD1917,"
hexmask.long.word 0xFF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF8 "DOC0EXPD1918,"
hexmask.long.word 0xFF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFFC "DOC0EXPD1919,"
hexmask.long.word 0xFFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
group.long 0x2100++0xFFF
line.long 0x0 "DOC0EXPD1920,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4 "DOC0EXPD1921,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8 "DOC0EXPD1922,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC "DOC0EXPD1923,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x10 "DOC0EXPD1924,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x14 "DOC0EXPD1925,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x18 "DOC0EXPD1926,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C "DOC0EXPD1927,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x20 "DOC0EXPD1928,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x24 "DOC0EXPD1929,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x28 "DOC0EXPD1930,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C "DOC0EXPD1931,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x30 "DOC0EXPD1932,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x34 "DOC0EXPD1933,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x38 "DOC0EXPD1934,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C "DOC0EXPD1935,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x40 "DOC0EXPD1936,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x44 "DOC0EXPD1937,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x48 "DOC0EXPD1938,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C "DOC0EXPD1939,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x50 "DOC0EXPD1940,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x54 "DOC0EXPD1941,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x58 "DOC0EXPD1942,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C "DOC0EXPD1943,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x60 "DOC0EXPD1944,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x64 "DOC0EXPD1945,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x68 "DOC0EXPD1946,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C "DOC0EXPD1947,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x70 "DOC0EXPD1948,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x74 "DOC0EXPD1949,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x78 "DOC0EXPD1950,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C "DOC0EXPD1951,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x80 "DOC0EXPD1952,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x84 "DOC0EXPD1953,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x88 "DOC0EXPD1954,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C "DOC0EXPD1955,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x90 "DOC0EXPD1956,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x94 "DOC0EXPD1957,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x98 "DOC0EXPD1958,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C "DOC0EXPD1959,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA0 "DOC0EXPD1960,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA4 "DOC0EXPD1961,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA8 "DOC0EXPD1962,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC "DOC0EXPD1963,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB0 "DOC0EXPD1964,"
hexmask.long.word 0xB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB4 "DOC0EXPD1965,"
hexmask.long.word 0xB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB8 "DOC0EXPD1966,"
hexmask.long.word 0xB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC "DOC0EXPD1967,"
hexmask.long.word 0xBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC0 "DOC0EXPD1968,"
hexmask.long.word 0xC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC4 "DOC0EXPD1969,"
hexmask.long.word 0xC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC8 "DOC0EXPD1970,"
hexmask.long.word 0xC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC "DOC0EXPD1971,"
hexmask.long.word 0xCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD0 "DOC0EXPD1972,"
hexmask.long.word 0xD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD4 "DOC0EXPD1973,"
hexmask.long.word 0xD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD8 "DOC0EXPD1974,"
hexmask.long.word 0xD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC "DOC0EXPD1975,"
hexmask.long.word 0xDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE0 "DOC0EXPD1976,"
hexmask.long.word 0xE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE4 "DOC0EXPD1977,"
hexmask.long.word 0xE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE8 "DOC0EXPD1978,"
hexmask.long.word 0xE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC "DOC0EXPD1979,"
hexmask.long.word 0xEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF0 "DOC0EXPD1980,"
hexmask.long.word 0xF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF4 "DOC0EXPD1981,"
hexmask.long.word 0xF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF8 "DOC0EXPD1982,"
hexmask.long.word 0xF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC "DOC0EXPD1983,"
hexmask.long.word 0xFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x100 "DOC0EXPD1984,"
hexmask.long.word 0x100 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x100 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x100 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x100 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x100 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x100 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x100 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x100 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x100 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x104 "DOC0EXPD1985,"
hexmask.long.word 0x104 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x104 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x104 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x104 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x104 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x104 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x104 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x104 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x104 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x108 "DOC0EXPD1986,"
hexmask.long.word 0x108 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x108 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x108 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x108 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x108 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x108 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x108 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x108 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x108 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x10C "DOC0EXPD1987,"
hexmask.long.word 0x10C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x10C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x10C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x10C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x10C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x10C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x10C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x10C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x10C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x110 "DOC0EXPD1988,"
hexmask.long.word 0x110 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x110 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x110 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x110 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x110 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x110 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x110 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x110 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x110 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x114 "DOC0EXPD1989,"
hexmask.long.word 0x114 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x114 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x114 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x114 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x114 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x114 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x114 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x114 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x114 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x118 "DOC0EXPD1990,"
hexmask.long.word 0x118 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x118 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x118 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x118 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x118 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x118 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x118 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x118 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x118 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x11C "DOC0EXPD1991,"
hexmask.long.word 0x11C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x11C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x11C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x11C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x11C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x11C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x11C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x11C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x11C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x120 "DOC0EXPD1992,"
hexmask.long.word 0x120 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x120 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x120 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x120 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x120 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x120 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x120 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x120 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x120 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x124 "DOC0EXPD1993,"
hexmask.long.word 0x124 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x124 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x124 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x124 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x124 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x124 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x124 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x124 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x124 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x128 "DOC0EXPD1994,"
hexmask.long.word 0x128 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x128 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x128 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x128 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x128 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x128 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x128 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x128 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x128 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x12C "DOC0EXPD1995,"
hexmask.long.word 0x12C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x12C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x12C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x12C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x12C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x12C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x12C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x12C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x12C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x130 "DOC0EXPD1996,"
hexmask.long.word 0x130 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x130 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x130 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x130 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x130 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x130 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x130 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x130 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x130 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x134 "DOC0EXPD1997,"
hexmask.long.word 0x134 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x134 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x134 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x134 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x134 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x134 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x134 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x134 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x134 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x138 "DOC0EXPD1998,"
hexmask.long.word 0x138 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x138 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x138 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x138 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x138 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x138 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x138 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x138 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x138 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x13C "DOC0EXPD1999,"
hexmask.long.word 0x13C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x13C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x13C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x13C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x13C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x13C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x13C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x13C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x13C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x140 "DOC0EXPD2000,"
hexmask.long.word 0x140 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x140 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x140 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x140 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x140 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x140 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x140 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x140 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x140 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x144 "DOC0EXPD2001,"
hexmask.long.word 0x144 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x144 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x144 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x144 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x144 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x144 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x144 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x144 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x144 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x148 "DOC0EXPD2002,"
hexmask.long.word 0x148 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x148 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x148 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x148 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x148 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x148 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x148 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x148 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x148 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x14C "DOC0EXPD2003,"
hexmask.long.word 0x14C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x14C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x14C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x14C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x14C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x14C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x14C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x14C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x150 "DOC0EXPD2004,"
hexmask.long.word 0x150 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x150 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x150 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x150 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x150 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x150 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x150 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x150 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x150 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x154 "DOC0EXPD2005,"
hexmask.long.word 0x154 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x154 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x154 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x154 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x154 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x154 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x154 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x154 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x154 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x158 "DOC0EXPD2006,"
hexmask.long.word 0x158 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x158 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x158 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x158 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x158 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x158 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x158 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x158 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x158 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x15C "DOC0EXPD2007,"
hexmask.long.word 0x15C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x15C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x15C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x15C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x15C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x15C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x15C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x15C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x15C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x160 "DOC0EXPD2008,"
hexmask.long.word 0x160 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x160 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x160 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x160 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x160 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x160 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x160 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x160 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x160 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x164 "DOC0EXPD2009,"
hexmask.long.word 0x164 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x164 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x164 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x164 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x164 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x164 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x164 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x164 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x164 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x168 "DOC0EXPD2010,"
hexmask.long.word 0x168 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x168 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x168 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x168 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x168 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x168 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x168 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x168 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x168 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x16C "DOC0EXPD2011,"
hexmask.long.word 0x16C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x16C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x16C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x16C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x16C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x16C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x16C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x16C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x16C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x170 "DOC0EXPD2012,"
hexmask.long.word 0x170 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x170 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x170 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x170 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x170 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x170 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x170 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x170 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x170 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x174 "DOC0EXPD2013,"
hexmask.long.word 0x174 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x174 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x174 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x174 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x174 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x174 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x174 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x174 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x174 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x178 "DOC0EXPD2014,"
hexmask.long.word 0x178 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x178 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x178 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x178 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x178 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x178 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x178 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x178 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x178 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x17C "DOC0EXPD2015,"
hexmask.long.word 0x17C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x17C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x17C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x17C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x17C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x17C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x17C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x17C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x17C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x180 "DOC0EXPD2016,"
hexmask.long.word 0x180 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x180 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x180 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x180 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x180 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x180 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x180 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x180 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x180 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x184 "DOC0EXPD2017,"
hexmask.long.word 0x184 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x184 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x184 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x184 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x184 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x184 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x184 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x184 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x184 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x188 "DOC0EXPD2018,"
hexmask.long.word 0x188 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x188 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x188 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x188 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x188 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x188 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x188 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x188 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x188 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x18C "DOC0EXPD2019,"
hexmask.long.word 0x18C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x18C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x18C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x18C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x18C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x18C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x18C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x18C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x18C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x190 "DOC0EXPD2020,"
hexmask.long.word 0x190 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x190 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x190 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x190 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x190 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x190 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x190 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x190 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x190 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x194 "DOC0EXPD2021,"
hexmask.long.word 0x194 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x194 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x194 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x194 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x194 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x194 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x194 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x194 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x194 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x198 "DOC0EXPD2022,"
hexmask.long.word 0x198 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x198 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x198 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x198 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x198 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x198 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x198 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x198 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x198 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x19C "DOC0EXPD2023,"
hexmask.long.word 0x19C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x19C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x19C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x19C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x19C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x19C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x19C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x19C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x19C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A0 "DOC0EXPD2024,"
hexmask.long.word 0x1A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A4 "DOC0EXPD2025,"
hexmask.long.word 0x1A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A8 "DOC0EXPD2026,"
hexmask.long.word 0x1A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1AC "DOC0EXPD2027,"
hexmask.long.word 0x1AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B0 "DOC0EXPD2028,"
hexmask.long.word 0x1B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B4 "DOC0EXPD2029,"
hexmask.long.word 0x1B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B8 "DOC0EXPD2030,"
hexmask.long.word 0x1B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1BC "DOC0EXPD2031,"
hexmask.long.word 0x1BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C0 "DOC0EXPD2032,"
hexmask.long.word 0x1C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C4 "DOC0EXPD2033,"
hexmask.long.word 0x1C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C8 "DOC0EXPD2034,"
hexmask.long.word 0x1C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1CC "DOC0EXPD2035,"
hexmask.long.word 0x1CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D0 "DOC0EXPD2036,"
hexmask.long.word 0x1D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D4 "DOC0EXPD2037,"
hexmask.long.word 0x1D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D8 "DOC0EXPD2038,"
hexmask.long.word 0x1D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1DC "DOC0EXPD2039,"
hexmask.long.word 0x1DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E0 "DOC0EXPD2040,"
hexmask.long.word 0x1E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E4 "DOC0EXPD2041,"
hexmask.long.word 0x1E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E8 "DOC0EXPD2042,"
hexmask.long.word 0x1E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1EC "DOC0EXPD2043,"
hexmask.long.word 0x1EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F0 "DOC0EXPD2044,"
hexmask.long.word 0x1F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F4 "DOC0EXPD2045,"
hexmask.long.word 0x1F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F8 "DOC0EXPD2046,"
hexmask.long.word 0x1F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1FC "DOC0EXPD2047,"
hexmask.long.word 0x1FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x200 "DOC0EXPD2048,"
hexmask.long.word 0x200 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x200 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x200 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x200 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x200 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x200 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x200 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x200 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x200 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x204 "DOC0EXPD2049,"
hexmask.long.word 0x204 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x204 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x204 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x204 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x204 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x204 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x204 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x204 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x204 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x208 "DOC0EXPD2050,"
hexmask.long.word 0x208 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x208 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x208 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x208 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x208 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x208 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x208 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x208 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x208 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x20C "DOC0EXPD2051,"
hexmask.long.word 0x20C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x20C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x20C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x20C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x20C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x20C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x20C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x20C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x20C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x210 "DOC0EXPD2052,"
hexmask.long.word 0x210 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x210 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x210 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x210 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x210 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x210 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x210 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x210 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x210 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x214 "DOC0EXPD2053,"
hexmask.long.word 0x214 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x214 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x214 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x214 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x214 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x214 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x214 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x214 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x214 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x218 "DOC0EXPD2054,"
hexmask.long.word 0x218 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x218 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x218 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x218 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x218 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x218 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x218 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x218 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x218 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x21C "DOC0EXPD2055,"
hexmask.long.word 0x21C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x21C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x21C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x21C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x21C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x21C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x21C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x21C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x21C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x220 "DOC0EXPD2056,"
hexmask.long.word 0x220 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x220 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x220 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x220 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x220 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x220 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x220 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x220 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x220 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x224 "DOC0EXPD2057,"
hexmask.long.word 0x224 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x224 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x224 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x224 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x224 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x224 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x224 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x224 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x224 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x228 "DOC0EXPD2058,"
hexmask.long.word 0x228 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x228 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x228 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x228 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x228 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x228 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x228 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x228 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x228 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x22C "DOC0EXPD2059,"
hexmask.long.word 0x22C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x22C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x22C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x22C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x22C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x22C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x22C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x22C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x22C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x230 "DOC0EXPD2060,"
hexmask.long.word 0x230 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x230 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x230 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x230 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x230 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x230 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x230 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x230 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x230 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x234 "DOC0EXPD2061,"
hexmask.long.word 0x234 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x234 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x234 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x234 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x234 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x234 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x234 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x234 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x234 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x238 "DOC0EXPD2062,"
hexmask.long.word 0x238 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x238 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x238 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x238 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x238 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x238 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x238 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x238 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x238 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x23C "DOC0EXPD2063,"
hexmask.long.word 0x23C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x23C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x23C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x23C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x23C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x23C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x23C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x23C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x23C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x240 "DOC0EXPD2064,"
hexmask.long.word 0x240 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x240 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x240 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x240 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x240 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x240 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x240 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x240 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x240 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x244 "DOC0EXPD2065,"
hexmask.long.word 0x244 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x244 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x244 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x244 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x244 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x244 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x244 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x244 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x244 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x248 "DOC0EXPD2066,"
hexmask.long.word 0x248 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x248 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x248 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x248 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x248 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x248 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x248 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x248 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x248 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x24C "DOC0EXPD2067,"
hexmask.long.word 0x24C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x24C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x24C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x24C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x24C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x24C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x24C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x24C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x24C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x250 "DOC0EXPD2068,"
hexmask.long.word 0x250 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x250 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x250 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x250 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x250 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x250 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x250 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x250 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x250 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x254 "DOC0EXPD2069,"
hexmask.long.word 0x254 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x254 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x254 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x254 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x254 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x254 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x254 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x254 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x254 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x258 "DOC0EXPD2070,"
hexmask.long.word 0x258 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x258 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x258 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x258 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x258 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x258 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x258 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x258 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x258 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x25C "DOC0EXPD2071,"
hexmask.long.word 0x25C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x25C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x25C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x25C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x25C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x25C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x25C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x25C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x25C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x260 "DOC0EXPD2072,"
hexmask.long.word 0x260 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x260 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x260 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x260 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x260 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x260 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x260 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x260 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x260 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x264 "DOC0EXPD2073,"
hexmask.long.word 0x264 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x264 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x264 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x264 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x264 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x264 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x264 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x264 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x264 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x268 "DOC0EXPD2074,"
hexmask.long.word 0x268 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x268 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x268 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x268 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x268 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x268 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x268 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x268 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x268 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x26C "DOC0EXPD2075,"
hexmask.long.word 0x26C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x26C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x26C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x26C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x26C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x26C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x26C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x26C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x26C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x270 "DOC0EXPD2076,"
hexmask.long.word 0x270 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x270 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x270 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x270 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x270 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x270 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x270 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x270 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x270 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x274 "DOC0EXPD2077,"
hexmask.long.word 0x274 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x274 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x274 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x274 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x274 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x274 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x274 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x274 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x274 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x278 "DOC0EXPD2078,"
hexmask.long.word 0x278 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x278 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x278 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x278 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x278 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x278 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x278 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x278 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x278 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x27C "DOC0EXPD2079,"
hexmask.long.word 0x27C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x27C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x27C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x27C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x27C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x27C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x27C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x27C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x27C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x280 "DOC0EXPD2080,"
hexmask.long.word 0x280 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x280 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x280 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x280 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x280 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x280 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x280 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x280 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x280 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x284 "DOC0EXPD2081,"
hexmask.long.word 0x284 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x284 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x284 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x284 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x284 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x284 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x284 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x284 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x284 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x288 "DOC0EXPD2082,"
hexmask.long.word 0x288 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x288 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x288 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x288 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x288 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x288 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x288 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x288 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x288 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x28C "DOC0EXPD2083,"
hexmask.long.word 0x28C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x28C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x28C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x28C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x28C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x28C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x28C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x28C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x28C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x290 "DOC0EXPD2084,"
hexmask.long.word 0x290 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x290 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x290 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x290 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x290 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x290 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x290 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x290 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x290 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x294 "DOC0EXPD2085,"
hexmask.long.word 0x294 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x294 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x294 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x294 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x294 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x294 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x294 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x294 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x294 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x298 "DOC0EXPD2086,"
hexmask.long.word 0x298 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x298 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x298 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x298 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x298 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x298 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x298 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x298 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x298 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x29C "DOC0EXPD2087,"
hexmask.long.word 0x29C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x29C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x29C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x29C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x29C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x29C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x29C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x29C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x29C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A0 "DOC0EXPD2088,"
hexmask.long.word 0x2A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A4 "DOC0EXPD2089,"
hexmask.long.word 0x2A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A8 "DOC0EXPD2090,"
hexmask.long.word 0x2A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2AC "DOC0EXPD2091,"
hexmask.long.word 0x2AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B0 "DOC0EXPD2092,"
hexmask.long.word 0x2B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B4 "DOC0EXPD2093,"
hexmask.long.word 0x2B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B8 "DOC0EXPD2094,"
hexmask.long.word 0x2B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2BC "DOC0EXPD2095,"
hexmask.long.word 0x2BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C0 "DOC0EXPD2096,"
hexmask.long.word 0x2C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C4 "DOC0EXPD2097,"
hexmask.long.word 0x2C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C8 "DOC0EXPD2098,"
hexmask.long.word 0x2C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2CC "DOC0EXPD2099,"
hexmask.long.word 0x2CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D0 "DOC0EXPD2100,"
hexmask.long.word 0x2D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D4 "DOC0EXPD2101,"
hexmask.long.word 0x2D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D8 "DOC0EXPD2102,"
hexmask.long.word 0x2D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2DC "DOC0EXPD2103,"
hexmask.long.word 0x2DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E0 "DOC0EXPD2104,"
hexmask.long.word 0x2E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E4 "DOC0EXPD2105,"
hexmask.long.word 0x2E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E8 "DOC0EXPD2106,"
hexmask.long.word 0x2E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2EC "DOC0EXPD2107,"
hexmask.long.word 0x2EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F0 "DOC0EXPD2108,"
hexmask.long.word 0x2F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F4 "DOC0EXPD2109,"
hexmask.long.word 0x2F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F8 "DOC0EXPD2110,"
hexmask.long.word 0x2F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2FC "DOC0EXPD2111,"
hexmask.long.word 0x2FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x300 "DOC0EXPD2112,"
hexmask.long.word 0x300 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x300 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x300 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x300 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x300 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x300 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x300 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x300 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x300 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x304 "DOC0EXPD2113,"
hexmask.long.word 0x304 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x304 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x304 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x304 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x304 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x304 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x304 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x304 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x304 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x308 "DOC0EXPD2114,"
hexmask.long.word 0x308 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x308 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x308 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x308 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x308 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x308 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x308 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x308 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x308 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x30C "DOC0EXPD2115,"
hexmask.long.word 0x30C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x30C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x30C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x30C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x30C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x30C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x30C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x30C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x30C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x310 "DOC0EXPD2116,"
hexmask.long.word 0x310 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x310 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x310 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x310 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x310 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x310 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x310 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x310 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x310 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x314 "DOC0EXPD2117,"
hexmask.long.word 0x314 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x314 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x314 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x314 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x314 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x314 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x314 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x314 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x314 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x318 "DOC0EXPD2118,"
hexmask.long.word 0x318 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x318 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x318 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x318 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x318 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x318 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x318 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x318 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x318 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x31C "DOC0EXPD2119,"
hexmask.long.word 0x31C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x31C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x31C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x31C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x31C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x31C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x31C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x31C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x31C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x320 "DOC0EXPD2120,"
hexmask.long.word 0x320 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x320 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x320 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x320 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x320 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x320 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x320 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x320 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x320 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x324 "DOC0EXPD2121,"
hexmask.long.word 0x324 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x324 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x324 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x324 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x324 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x324 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x324 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x324 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x324 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x328 "DOC0EXPD2122,"
hexmask.long.word 0x328 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x328 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x328 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x328 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x328 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x328 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x328 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x328 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x328 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x32C "DOC0EXPD2123,"
hexmask.long.word 0x32C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x32C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x32C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x32C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x32C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x32C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x32C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x32C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x32C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x330 "DOC0EXPD2124,"
hexmask.long.word 0x330 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x330 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x330 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x330 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x330 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x330 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x330 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x330 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x330 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x334 "DOC0EXPD2125,"
hexmask.long.word 0x334 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x334 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x334 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x334 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x334 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x334 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x334 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x334 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x334 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x338 "DOC0EXPD2126,"
hexmask.long.word 0x338 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x338 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x338 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x338 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x338 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x338 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x338 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x338 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x338 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x33C "DOC0EXPD2127,"
hexmask.long.word 0x33C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x33C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x33C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x33C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x33C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x33C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x33C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x33C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x33C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x340 "DOC0EXPD2128,"
hexmask.long.word 0x340 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x340 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x340 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x340 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x340 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x340 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x340 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x340 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x340 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x344 "DOC0EXPD2129,"
hexmask.long.word 0x344 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x344 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x344 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x344 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x344 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x344 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x344 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x344 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x344 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x348 "DOC0EXPD2130,"
hexmask.long.word 0x348 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x348 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x348 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x348 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x348 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x348 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x348 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x348 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x348 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x34C "DOC0EXPD2131,"
hexmask.long.word 0x34C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x34C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x34C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x34C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x34C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x34C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x34C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x34C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x34C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x350 "DOC0EXPD2132,"
hexmask.long.word 0x350 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x350 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x350 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x350 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x350 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x350 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x350 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x350 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x350 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x354 "DOC0EXPD2133,"
hexmask.long.word 0x354 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x354 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x354 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x354 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x354 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x354 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x354 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x354 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x354 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x358 "DOC0EXPD2134,"
hexmask.long.word 0x358 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x358 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x358 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x358 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x358 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x358 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x358 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x358 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x358 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x35C "DOC0EXPD2135,"
hexmask.long.word 0x35C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x35C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x35C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x35C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x35C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x35C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x35C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x35C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x35C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x360 "DOC0EXPD2136,"
hexmask.long.word 0x360 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x360 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x360 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x360 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x360 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x360 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x360 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x360 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x360 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x364 "DOC0EXPD2137,"
hexmask.long.word 0x364 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x364 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x364 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x364 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x364 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x364 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x364 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x364 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x364 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x368 "DOC0EXPD2138,"
hexmask.long.word 0x368 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x368 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x368 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x368 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x368 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x368 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x368 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x368 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x368 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x36C "DOC0EXPD2139,"
hexmask.long.word 0x36C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x36C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x36C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x36C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x36C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x36C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x36C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x36C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x36C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x370 "DOC0EXPD2140,"
hexmask.long.word 0x370 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x370 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x370 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x370 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x370 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x370 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x370 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x370 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x370 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x374 "DOC0EXPD2141,"
hexmask.long.word 0x374 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x374 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x374 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x374 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x374 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x374 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x374 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x374 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x374 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x378 "DOC0EXPD2142,"
hexmask.long.word 0x378 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x378 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x378 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x378 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x378 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x378 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x378 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x378 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x378 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x37C "DOC0EXPD2143,"
hexmask.long.word 0x37C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x37C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x37C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x37C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x37C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x37C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x37C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x37C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x37C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x380 "DOC0EXPD2144,"
hexmask.long.word 0x380 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x380 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x380 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x380 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x380 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x380 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x380 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x380 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x380 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x384 "DOC0EXPD2145,"
hexmask.long.word 0x384 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x384 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x384 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x384 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x384 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x384 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x384 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x384 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x384 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x388 "DOC0EXPD2146,"
hexmask.long.word 0x388 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x388 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x388 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x388 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x388 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x388 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x388 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x388 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x388 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x38C "DOC0EXPD2147,"
hexmask.long.word 0x38C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x38C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x38C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x38C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x38C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x38C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x38C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x38C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x38C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x390 "DOC0EXPD2148,"
hexmask.long.word 0x390 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x390 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x390 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x390 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x390 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x390 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x390 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x390 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x390 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x394 "DOC0EXPD2149,"
hexmask.long.word 0x394 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x394 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x394 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x394 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x394 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x394 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x394 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x394 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x394 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x398 "DOC0EXPD2150,"
hexmask.long.word 0x398 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x398 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x398 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x398 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x398 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x398 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x398 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x398 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x398 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x39C "DOC0EXPD2151,"
hexmask.long.word 0x39C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x39C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x39C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x39C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x39C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x39C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x39C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x39C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x39C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A0 "DOC0EXPD2152,"
hexmask.long.word 0x3A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A4 "DOC0EXPD2153,"
hexmask.long.word 0x3A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A8 "DOC0EXPD2154,"
hexmask.long.word 0x3A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3AC "DOC0EXPD2155,"
hexmask.long.word 0x3AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B0 "DOC0EXPD2156,"
hexmask.long.word 0x3B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B4 "DOC0EXPD2157,"
hexmask.long.word 0x3B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B8 "DOC0EXPD2158,"
hexmask.long.word 0x3B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3BC "DOC0EXPD2159,"
hexmask.long.word 0x3BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C0 "DOC0EXPD2160,"
hexmask.long.word 0x3C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C4 "DOC0EXPD2161,"
hexmask.long.word 0x3C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C8 "DOC0EXPD2162,"
hexmask.long.word 0x3C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3CC "DOC0EXPD2163,"
hexmask.long.word 0x3CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D0 "DOC0EXPD2164,"
hexmask.long.word 0x3D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D4 "DOC0EXPD2165,"
hexmask.long.word 0x3D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D8 "DOC0EXPD2166,"
hexmask.long.word 0x3D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3DC "DOC0EXPD2167,"
hexmask.long.word 0x3DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E0 "DOC0EXPD2168,"
hexmask.long.word 0x3E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E4 "DOC0EXPD2169,"
hexmask.long.word 0x3E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E8 "DOC0EXPD2170,"
hexmask.long.word 0x3E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3EC "DOC0EXPD2171,"
hexmask.long.word 0x3EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F0 "DOC0EXPD2172,"
hexmask.long.word 0x3F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F4 "DOC0EXPD2173,"
hexmask.long.word 0x3F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F8 "DOC0EXPD2174,"
hexmask.long.word 0x3F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3FC "DOC0EXPD2175,"
hexmask.long.word 0x3FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x400 "DOC0EXPD2176,"
hexmask.long.word 0x400 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x400 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x400 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x400 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x400 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x400 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x400 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x400 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x400 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x404 "DOC0EXPD2177,"
hexmask.long.word 0x404 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x404 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x404 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x404 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x404 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x404 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x404 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x404 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x404 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x408 "DOC0EXPD2178,"
hexmask.long.word 0x408 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x408 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x408 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x408 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x408 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x408 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x408 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x408 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x408 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x40C "DOC0EXPD2179,"
hexmask.long.word 0x40C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x40C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x40C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x40C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x40C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x40C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x40C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x40C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x40C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x410 "DOC0EXPD2180,"
hexmask.long.word 0x410 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x410 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x410 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x410 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x410 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x410 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x410 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x410 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x410 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x414 "DOC0EXPD2181,"
hexmask.long.word 0x414 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x414 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x414 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x414 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x414 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x414 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x414 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x414 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x414 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x418 "DOC0EXPD2182,"
hexmask.long.word 0x418 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x418 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x418 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x418 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x418 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x418 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x418 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x418 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x418 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x41C "DOC0EXPD2183,"
hexmask.long.word 0x41C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x41C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x41C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x41C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x41C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x41C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x41C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x41C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x41C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x420 "DOC0EXPD2184,"
hexmask.long.word 0x420 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x420 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x420 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x420 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x420 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x420 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x420 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x420 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x420 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x424 "DOC0EXPD2185,"
hexmask.long.word 0x424 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x424 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x424 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x424 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x424 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x424 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x424 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x424 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x424 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x428 "DOC0EXPD2186,"
hexmask.long.word 0x428 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x428 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x428 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x428 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x428 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x428 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x428 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x428 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x428 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x42C "DOC0EXPD2187,"
hexmask.long.word 0x42C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x42C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x42C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x42C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x42C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x42C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x42C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x42C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x42C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x430 "DOC0EXPD2188,"
hexmask.long.word 0x430 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x430 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x430 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x430 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x430 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x430 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x430 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x430 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x430 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x434 "DOC0EXPD2189,"
hexmask.long.word 0x434 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x434 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x434 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x434 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x434 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x434 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x434 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x434 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x434 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x438 "DOC0EXPD2190,"
hexmask.long.word 0x438 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x438 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x438 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x438 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x438 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x438 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x438 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x438 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x438 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x43C "DOC0EXPD2191,"
hexmask.long.word 0x43C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x43C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x43C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x43C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x43C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x43C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x43C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x43C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x43C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x440 "DOC0EXPD2192,"
hexmask.long.word 0x440 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x440 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x440 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x440 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x440 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x440 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x440 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x440 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x440 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x444 "DOC0EXPD2193,"
hexmask.long.word 0x444 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x444 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x444 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x444 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x444 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x444 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x444 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x444 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x444 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x448 "DOC0EXPD2194,"
hexmask.long.word 0x448 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x448 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x448 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x448 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x448 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x448 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x448 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x448 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x448 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x44C "DOC0EXPD2195,"
hexmask.long.word 0x44C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x44C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x44C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x44C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x44C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x44C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x44C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x44C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x44C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x450 "DOC0EXPD2196,"
hexmask.long.word 0x450 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x450 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x450 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x450 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x450 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x450 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x450 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x450 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x450 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x454 "DOC0EXPD2197,"
hexmask.long.word 0x454 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x454 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x454 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x454 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x454 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x454 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x454 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x454 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x454 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x458 "DOC0EXPD2198,"
hexmask.long.word 0x458 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x458 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x458 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x458 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x458 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x458 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x458 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x458 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x458 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x45C "DOC0EXPD2199,"
hexmask.long.word 0x45C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x45C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x45C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x45C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x45C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x45C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x45C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x45C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x45C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x460 "DOC0EXPD2200,"
hexmask.long.word 0x460 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x460 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x460 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x460 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x460 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x460 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x460 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x460 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x460 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x464 "DOC0EXPD2201,"
hexmask.long.word 0x464 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x464 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x464 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x464 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x464 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x464 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x464 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x464 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x464 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x468 "DOC0EXPD2202,"
hexmask.long.word 0x468 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x468 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x468 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x468 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x468 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x468 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x468 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x468 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x468 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x46C "DOC0EXPD2203,"
hexmask.long.word 0x46C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x46C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x46C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x46C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x46C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x46C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x46C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x46C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x46C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x470 "DOC0EXPD2204,"
hexmask.long.word 0x470 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x470 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x470 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x470 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x470 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x470 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x470 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x470 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x470 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x474 "DOC0EXPD2205,"
hexmask.long.word 0x474 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x474 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x474 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x474 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x474 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x474 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x474 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x474 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x474 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x478 "DOC0EXPD2206,"
hexmask.long.word 0x478 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x478 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x478 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x478 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x478 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x478 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x478 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x478 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x478 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x47C "DOC0EXPD2207,"
hexmask.long.word 0x47C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x47C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x47C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x47C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x47C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x47C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x47C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x47C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x47C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x480 "DOC0EXPD2208,"
hexmask.long.word 0x480 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x480 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x480 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x480 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x480 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x480 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x480 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x480 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x480 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x484 "DOC0EXPD2209,"
hexmask.long.word 0x484 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x484 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x484 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x484 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x484 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x484 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x484 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x484 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x484 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x488 "DOC0EXPD2210,"
hexmask.long.word 0x488 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x488 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x488 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x488 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x488 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x488 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x488 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x488 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x488 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x48C "DOC0EXPD2211,"
hexmask.long.word 0x48C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x48C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x48C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x48C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x48C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x48C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x48C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x48C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x48C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x490 "DOC0EXPD2212,"
hexmask.long.word 0x490 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x490 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x490 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x490 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x490 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x490 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x490 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x490 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x490 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x494 "DOC0EXPD2213,"
hexmask.long.word 0x494 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x494 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x494 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x494 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x494 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x494 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x494 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x494 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x494 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x498 "DOC0EXPD2214,"
hexmask.long.word 0x498 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x498 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x498 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x498 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x498 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x498 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x498 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x498 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x498 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x49C "DOC0EXPD2215,"
hexmask.long.word 0x49C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x49C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x49C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x49C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x49C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x49C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x49C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x49C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x49C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A0 "DOC0EXPD2216,"
hexmask.long.word 0x4A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A4 "DOC0EXPD2217,"
hexmask.long.word 0x4A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A8 "DOC0EXPD2218,"
hexmask.long.word 0x4A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4AC "DOC0EXPD2219,"
hexmask.long.word 0x4AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B0 "DOC0EXPD2220,"
hexmask.long.word 0x4B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B4 "DOC0EXPD2221,"
hexmask.long.word 0x4B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B8 "DOC0EXPD2222,"
hexmask.long.word 0x4B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4BC "DOC0EXPD2223,"
hexmask.long.word 0x4BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C0 "DOC0EXPD2224,"
hexmask.long.word 0x4C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C4 "DOC0EXPD2225,"
hexmask.long.word 0x4C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C8 "DOC0EXPD2226,"
hexmask.long.word 0x4C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4CC "DOC0EXPD2227,"
hexmask.long.word 0x4CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D0 "DOC0EXPD2228,"
hexmask.long.word 0x4D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D4 "DOC0EXPD2229,"
hexmask.long.word 0x4D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D8 "DOC0EXPD2230,"
hexmask.long.word 0x4D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4DC "DOC0EXPD2231,"
hexmask.long.word 0x4DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E0 "DOC0EXPD2232,"
hexmask.long.word 0x4E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E4 "DOC0EXPD2233,"
hexmask.long.word 0x4E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E8 "DOC0EXPD2234,"
hexmask.long.word 0x4E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4EC "DOC0EXPD2235,"
hexmask.long.word 0x4EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F0 "DOC0EXPD2236,"
hexmask.long.word 0x4F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F4 "DOC0EXPD2237,"
hexmask.long.word 0x4F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F8 "DOC0EXPD2238,"
hexmask.long.word 0x4F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4FC "DOC0EXPD2239,"
hexmask.long.word 0x4FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x500 "DOC0EXPD2240,"
hexmask.long.word 0x500 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x500 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x500 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x500 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x500 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x500 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x500 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x500 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x500 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x504 "DOC0EXPD2241,"
hexmask.long.word 0x504 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x504 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x504 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x504 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x504 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x504 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x504 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x504 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x504 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x508 "DOC0EXPD2242,"
hexmask.long.word 0x508 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x508 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x508 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x508 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x508 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x508 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x508 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x508 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x508 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x50C "DOC0EXPD2243,"
hexmask.long.word 0x50C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x50C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x50C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x50C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x50C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x50C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x50C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x50C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x50C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x510 "DOC0EXPD2244,"
hexmask.long.word 0x510 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x510 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x510 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x510 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x510 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x510 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x510 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x510 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x510 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x514 "DOC0EXPD2245,"
hexmask.long.word 0x514 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x514 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x514 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x514 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x514 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x514 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x514 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x514 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x514 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x518 "DOC0EXPD2246,"
hexmask.long.word 0x518 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x518 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x518 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x518 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x518 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x518 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x518 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x518 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x518 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x51C "DOC0EXPD2247,"
hexmask.long.word 0x51C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x51C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x51C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x51C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x51C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x51C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x51C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x51C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x51C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x520 "DOC0EXPD2248,"
hexmask.long.word 0x520 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x520 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x520 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x520 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x520 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x520 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x520 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x520 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x520 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x524 "DOC0EXPD2249,"
hexmask.long.word 0x524 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x524 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x524 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x524 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x524 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x524 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x524 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x524 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x524 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x528 "DOC0EXPD2250,"
hexmask.long.word 0x528 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x528 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x528 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x528 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x528 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x528 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x528 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x528 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x528 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x52C "DOC0EXPD2251,"
hexmask.long.word 0x52C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x52C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x52C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x52C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x52C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x52C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x52C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x52C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x52C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x530 "DOC0EXPD2252,"
hexmask.long.word 0x530 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x530 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x530 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x530 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x530 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x530 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x530 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x530 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x530 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x534 "DOC0EXPD2253,"
hexmask.long.word 0x534 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x534 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x534 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x534 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x534 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x534 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x534 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x534 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x534 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x538 "DOC0EXPD2254,"
hexmask.long.word 0x538 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x538 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x538 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x538 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x538 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x538 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x538 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x538 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x538 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x53C "DOC0EXPD2255,"
hexmask.long.word 0x53C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x53C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x53C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x53C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x53C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x53C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x53C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x53C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x53C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x540 "DOC0EXPD2256,"
hexmask.long.word 0x540 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x540 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x540 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x540 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x540 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x540 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x540 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x540 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x540 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x544 "DOC0EXPD2257,"
hexmask.long.word 0x544 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x544 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x544 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x544 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x544 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x544 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x544 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x544 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x544 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x548 "DOC0EXPD2258,"
hexmask.long.word 0x548 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x548 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x548 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x548 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x548 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x548 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x548 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x548 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x548 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x54C "DOC0EXPD2259,"
hexmask.long.word 0x54C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x54C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x54C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x54C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x54C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x54C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x54C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x54C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x54C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x550 "DOC0EXPD2260,"
hexmask.long.word 0x550 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x550 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x550 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x550 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x550 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x550 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x550 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x550 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x550 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x554 "DOC0EXPD2261,"
hexmask.long.word 0x554 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x554 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x554 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x554 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x554 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x554 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x554 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x554 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x554 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x558 "DOC0EXPD2262,"
hexmask.long.word 0x558 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x558 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x558 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x558 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x558 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x558 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x558 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x558 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x558 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x55C "DOC0EXPD2263,"
hexmask.long.word 0x55C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x55C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x55C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x55C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x55C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x55C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x55C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x55C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x55C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x560 "DOC0EXPD2264,"
hexmask.long.word 0x560 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x560 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x560 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x560 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x560 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x560 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x560 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x560 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x560 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x564 "DOC0EXPD2265,"
hexmask.long.word 0x564 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x564 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x564 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x564 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x564 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x564 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x564 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x564 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x564 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x568 "DOC0EXPD2266,"
hexmask.long.word 0x568 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x568 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x568 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x568 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x568 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x568 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x568 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x568 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x568 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x56C "DOC0EXPD2267,"
hexmask.long.word 0x56C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x56C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x56C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x56C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x56C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x56C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x56C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x56C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x56C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x570 "DOC0EXPD2268,"
hexmask.long.word 0x570 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x570 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x570 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x570 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x570 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x570 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x570 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x570 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x570 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x574 "DOC0EXPD2269,"
hexmask.long.word 0x574 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x574 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x574 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x574 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x574 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x574 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x574 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x574 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x574 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x578 "DOC0EXPD2270,"
hexmask.long.word 0x578 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x578 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x578 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x578 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x578 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x578 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x578 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x578 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x578 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x57C "DOC0EXPD2271,"
hexmask.long.word 0x57C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x57C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x57C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x57C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x57C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x57C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x57C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x57C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x57C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x580 "DOC0EXPD2272,"
hexmask.long.word 0x580 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x580 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x580 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x580 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x580 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x580 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x580 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x580 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x580 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x584 "DOC0EXPD2273,"
hexmask.long.word 0x584 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x584 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x584 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x584 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x584 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x584 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x584 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x584 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x584 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x588 "DOC0EXPD2274,"
hexmask.long.word 0x588 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x588 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x588 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x588 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x588 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x588 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x588 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x588 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x588 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x58C "DOC0EXPD2275,"
hexmask.long.word 0x58C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x58C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x58C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x58C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x58C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x58C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x58C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x58C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x58C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x590 "DOC0EXPD2276,"
hexmask.long.word 0x590 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x590 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x590 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x590 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x590 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x590 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x590 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x590 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x590 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x594 "DOC0EXPD2277,"
hexmask.long.word 0x594 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x594 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x594 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x594 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x594 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x594 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x594 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x594 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x594 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x598 "DOC0EXPD2278,"
hexmask.long.word 0x598 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x598 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x598 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x598 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x598 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x598 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x598 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x598 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x598 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x59C "DOC0EXPD2279,"
hexmask.long.word 0x59C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x59C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x59C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x59C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x59C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x59C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x59C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x59C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x59C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A0 "DOC0EXPD2280,"
hexmask.long.word 0x5A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A4 "DOC0EXPD2281,"
hexmask.long.word 0x5A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A8 "DOC0EXPD2282,"
hexmask.long.word 0x5A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5AC "DOC0EXPD2283,"
hexmask.long.word 0x5AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B0 "DOC0EXPD2284,"
hexmask.long.word 0x5B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B4 "DOC0EXPD2285,"
hexmask.long.word 0x5B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B8 "DOC0EXPD2286,"
hexmask.long.word 0x5B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5BC "DOC0EXPD2287,"
hexmask.long.word 0x5BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C0 "DOC0EXPD2288,"
hexmask.long.word 0x5C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C4 "DOC0EXPD2289,"
hexmask.long.word 0x5C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C8 "DOC0EXPD2290,"
hexmask.long.word 0x5C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5CC "DOC0EXPD2291,"
hexmask.long.word 0x5CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D0 "DOC0EXPD2292,"
hexmask.long.word 0x5D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D4 "DOC0EXPD2293,"
hexmask.long.word 0x5D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D8 "DOC0EXPD2294,"
hexmask.long.word 0x5D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5DC "DOC0EXPD2295,"
hexmask.long.word 0x5DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E0 "DOC0EXPD2296,"
hexmask.long.word 0x5E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E4 "DOC0EXPD2297,"
hexmask.long.word 0x5E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E8 "DOC0EXPD2298,"
hexmask.long.word 0x5E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5EC "DOC0EXPD2299,"
hexmask.long.word 0x5EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F0 "DOC0EXPD2300,"
hexmask.long.word 0x5F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F4 "DOC0EXPD2301,"
hexmask.long.word 0x5F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F8 "DOC0EXPD2302,"
hexmask.long.word 0x5F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5FC "DOC0EXPD2303,"
hexmask.long.word 0x5FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x600 "DOC0EXPD2304,"
hexmask.long.word 0x600 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x600 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x600 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x600 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x600 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x600 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x600 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x600 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x600 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x604 "DOC0EXPD2305,"
hexmask.long.word 0x604 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x604 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x604 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x604 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x604 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x604 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x604 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x604 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x604 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x608 "DOC0EXPD2306,"
hexmask.long.word 0x608 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x608 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x608 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x608 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x608 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x608 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x608 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x608 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x608 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x60C "DOC0EXPD2307,"
hexmask.long.word 0x60C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x60C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x60C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x60C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x60C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x60C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x60C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x60C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x60C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x610 "DOC0EXPD2308,"
hexmask.long.word 0x610 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x610 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x610 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x610 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x610 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x610 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x610 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x610 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x610 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x614 "DOC0EXPD2309,"
hexmask.long.word 0x614 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x614 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x614 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x614 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x614 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x614 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x614 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x614 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x614 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x618 "DOC0EXPD2310,"
hexmask.long.word 0x618 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x618 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x618 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x618 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x618 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x618 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x618 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x618 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x618 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x61C "DOC0EXPD2311,"
hexmask.long.word 0x61C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x61C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x61C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x61C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x61C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x61C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x61C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x61C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x61C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x620 "DOC0EXPD2312,"
hexmask.long.word 0x620 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x620 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x620 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x620 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x620 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x620 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x620 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x620 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x620 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x624 "DOC0EXPD2313,"
hexmask.long.word 0x624 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x624 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x624 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x624 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x624 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x624 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x624 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x624 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x624 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x628 "DOC0EXPD2314,"
hexmask.long.word 0x628 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x628 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x628 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x628 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x628 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x628 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x628 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x628 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x628 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x62C "DOC0EXPD2315,"
hexmask.long.word 0x62C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x62C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x62C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x62C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x62C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x62C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x62C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x62C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x62C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x630 "DOC0EXPD2316,"
hexmask.long.word 0x630 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x630 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x630 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x630 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x630 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x630 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x630 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x630 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x630 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x634 "DOC0EXPD2317,"
hexmask.long.word 0x634 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x634 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x634 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x634 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x634 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x634 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x634 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x634 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x634 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x638 "DOC0EXPD2318,"
hexmask.long.word 0x638 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x638 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x638 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x638 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x638 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x638 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x638 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x638 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x638 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x63C "DOC0EXPD2319,"
hexmask.long.word 0x63C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x63C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x63C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x63C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x63C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x63C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x63C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x63C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x63C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x640 "DOC0EXPD2320,"
hexmask.long.word 0x640 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x640 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x640 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x640 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x640 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x640 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x640 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x640 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x640 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x644 "DOC0EXPD2321,"
hexmask.long.word 0x644 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x644 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x644 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x644 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x644 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x644 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x644 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x644 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x644 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x648 "DOC0EXPD2322,"
hexmask.long.word 0x648 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x648 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x648 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x648 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x648 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x648 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x648 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x648 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x648 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x64C "DOC0EXPD2323,"
hexmask.long.word 0x64C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x64C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x64C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x64C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x64C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x64C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x64C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x64C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x64C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x650 "DOC0EXPD2324,"
hexmask.long.word 0x650 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x650 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x650 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x650 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x650 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x650 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x650 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x650 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x650 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x654 "DOC0EXPD2325,"
hexmask.long.word 0x654 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x654 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x654 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x654 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x654 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x654 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x654 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x654 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x654 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x658 "DOC0EXPD2326,"
hexmask.long.word 0x658 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x658 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x658 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x658 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x658 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x658 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x658 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x658 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x658 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x65C "DOC0EXPD2327,"
hexmask.long.word 0x65C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x65C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x65C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x65C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x65C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x65C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x65C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x65C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x65C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x660 "DOC0EXPD2328,"
hexmask.long.word 0x660 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x660 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x660 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x660 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x660 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x660 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x660 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x660 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x660 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x664 "DOC0EXPD2329,"
hexmask.long.word 0x664 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x664 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x664 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x664 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x664 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x664 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x664 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x664 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x664 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x668 "DOC0EXPD2330,"
hexmask.long.word 0x668 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x668 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x668 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x668 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x668 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x668 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x668 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x668 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x668 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x66C "DOC0EXPD2331,"
hexmask.long.word 0x66C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x66C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x66C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x66C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x66C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x66C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x66C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x66C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x66C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x670 "DOC0EXPD2332,"
hexmask.long.word 0x670 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x670 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x670 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x670 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x670 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x670 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x670 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x670 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x670 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x674 "DOC0EXPD2333,"
hexmask.long.word 0x674 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x674 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x674 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x674 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x674 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x674 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x674 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x674 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x674 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x678 "DOC0EXPD2334,"
hexmask.long.word 0x678 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x678 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x678 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x678 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x678 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x678 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x678 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x678 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x678 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x67C "DOC0EXPD2335,"
hexmask.long.word 0x67C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x67C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x67C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x67C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x67C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x67C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x67C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x67C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x67C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x680 "DOC0EXPD2336,"
hexmask.long.word 0x680 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x680 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x680 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x680 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x680 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x680 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x680 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x680 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x680 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x684 "DOC0EXPD2337,"
hexmask.long.word 0x684 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x684 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x684 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x684 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x684 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x684 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x684 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x684 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x684 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x688 "DOC0EXPD2338,"
hexmask.long.word 0x688 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x688 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x688 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x688 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x688 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x688 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x688 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x688 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x688 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x68C "DOC0EXPD2339,"
hexmask.long.word 0x68C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x68C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x68C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x68C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x68C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x68C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x68C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x68C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x68C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x690 "DOC0EXPD2340,"
hexmask.long.word 0x690 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x690 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x690 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x690 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x690 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x690 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x690 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x690 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x690 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x694 "DOC0EXPD2341,"
hexmask.long.word 0x694 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x694 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x694 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x694 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x694 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x694 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x694 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x694 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x694 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x698 "DOC0EXPD2342,"
hexmask.long.word 0x698 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x698 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x698 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x698 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x698 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x698 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x698 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x698 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x698 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x69C "DOC0EXPD2343,"
hexmask.long.word 0x69C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x69C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x69C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x69C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x69C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x69C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x69C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x69C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x69C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A0 "DOC0EXPD2344,"
hexmask.long.word 0x6A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A4 "DOC0EXPD2345,"
hexmask.long.word 0x6A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A8 "DOC0EXPD2346,"
hexmask.long.word 0x6A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6AC "DOC0EXPD2347,"
hexmask.long.word 0x6AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B0 "DOC0EXPD2348,"
hexmask.long.word 0x6B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B4 "DOC0EXPD2349,"
hexmask.long.word 0x6B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B8 "DOC0EXPD2350,"
hexmask.long.word 0x6B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6BC "DOC0EXPD2351,"
hexmask.long.word 0x6BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C0 "DOC0EXPD2352,"
hexmask.long.word 0x6C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C4 "DOC0EXPD2353,"
hexmask.long.word 0x6C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C8 "DOC0EXPD2354,"
hexmask.long.word 0x6C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6CC "DOC0EXPD2355,"
hexmask.long.word 0x6CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D0 "DOC0EXPD2356,"
hexmask.long.word 0x6D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D4 "DOC0EXPD2357,"
hexmask.long.word 0x6D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D8 "DOC0EXPD2358,"
hexmask.long.word 0x6D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6DC "DOC0EXPD2359,"
hexmask.long.word 0x6DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E0 "DOC0EXPD2360,"
hexmask.long.word 0x6E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E4 "DOC0EXPD2361,"
hexmask.long.word 0x6E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E8 "DOC0EXPD2362,"
hexmask.long.word 0x6E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6EC "DOC0EXPD2363,"
hexmask.long.word 0x6EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F0 "DOC0EXPD2364,"
hexmask.long.word 0x6F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F4 "DOC0EXPD2365,"
hexmask.long.word 0x6F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F8 "DOC0EXPD2366,"
hexmask.long.word 0x6F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6FC "DOC0EXPD2367,"
hexmask.long.word 0x6FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x700 "DOC0EXPD2368,"
hexmask.long.word 0x700 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x700 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x700 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x700 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x700 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x700 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x700 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x700 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x700 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x704 "DOC0EXPD2369,"
hexmask.long.word 0x704 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x704 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x704 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x704 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x704 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x704 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x704 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x704 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x704 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x708 "DOC0EXPD2370,"
hexmask.long.word 0x708 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x708 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x708 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x708 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x708 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x708 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x708 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x708 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x708 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x70C "DOC0EXPD2371,"
hexmask.long.word 0x70C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x70C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x70C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x70C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x70C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x70C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x70C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x70C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x70C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x710 "DOC0EXPD2372,"
hexmask.long.word 0x710 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x710 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x710 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x710 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x710 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x710 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x710 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x710 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x710 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x714 "DOC0EXPD2373,"
hexmask.long.word 0x714 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x714 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x714 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x714 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x714 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x714 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x714 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x714 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x714 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x718 "DOC0EXPD2374,"
hexmask.long.word 0x718 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x718 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x718 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x718 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x718 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x718 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x718 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x718 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x718 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x71C "DOC0EXPD2375,"
hexmask.long.word 0x71C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x71C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x71C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x71C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x71C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x71C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x71C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x71C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x71C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x720 "DOC0EXPD2376,"
hexmask.long.word 0x720 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x720 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x720 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x720 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x720 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x720 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x720 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x720 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x720 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x724 "DOC0EXPD2377,"
hexmask.long.word 0x724 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x724 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x724 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x724 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x724 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x724 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x724 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x724 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x724 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x728 "DOC0EXPD2378,"
hexmask.long.word 0x728 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x728 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x728 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x728 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x728 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x728 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x728 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x728 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x728 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x72C "DOC0EXPD2379,"
hexmask.long.word 0x72C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x72C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x72C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x72C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x72C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x72C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x72C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x72C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x72C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x730 "DOC0EXPD2380,"
hexmask.long.word 0x730 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x730 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x730 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x730 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x730 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x730 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x730 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x730 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x730 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x734 "DOC0EXPD2381,"
hexmask.long.word 0x734 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x734 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x734 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x734 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x734 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x734 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x734 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x734 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x734 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x738 "DOC0EXPD2382,"
hexmask.long.word 0x738 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x738 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x738 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x738 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x738 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x738 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x738 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x738 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x738 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x73C "DOC0EXPD2383,"
hexmask.long.word 0x73C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x73C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x73C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x73C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x73C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x73C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x73C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x73C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x73C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x740 "DOC0EXPD2384,"
hexmask.long.word 0x740 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x740 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x740 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x740 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x740 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x740 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x740 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x740 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x740 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x744 "DOC0EXPD2385,"
hexmask.long.word 0x744 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x744 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x744 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x744 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x744 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x744 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x744 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x744 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x744 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x748 "DOC0EXPD2386,"
hexmask.long.word 0x748 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x748 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x748 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x748 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x748 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x748 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x748 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x748 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x748 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x74C "DOC0EXPD2387,"
hexmask.long.word 0x74C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x74C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x74C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x74C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x74C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x74C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x74C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x74C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x74C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x750 "DOC0EXPD2388,"
hexmask.long.word 0x750 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x750 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x750 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x750 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x750 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x750 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x750 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x750 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x750 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x754 "DOC0EXPD2389,"
hexmask.long.word 0x754 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x754 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x754 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x754 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x754 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x754 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x754 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x754 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x754 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x758 "DOC0EXPD2390,"
hexmask.long.word 0x758 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x758 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x758 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x758 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x758 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x758 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x758 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x758 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x758 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x75C "DOC0EXPD2391,"
hexmask.long.word 0x75C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x75C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x75C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x75C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x75C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x75C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x75C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x75C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x75C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x760 "DOC0EXPD2392,"
hexmask.long.word 0x760 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x760 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x760 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x760 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x760 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x760 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x760 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x760 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x760 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x764 "DOC0EXPD2393,"
hexmask.long.word 0x764 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x764 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x764 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x764 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x764 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x764 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x764 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x764 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x764 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x768 "DOC0EXPD2394,"
hexmask.long.word 0x768 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x768 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x768 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x768 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x768 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x768 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x768 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x768 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x768 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x76C "DOC0EXPD2395,"
hexmask.long.word 0x76C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x76C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x76C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x76C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x76C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x76C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x76C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x76C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x76C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x770 "DOC0EXPD2396,"
hexmask.long.word 0x770 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x770 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x770 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x770 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x770 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x770 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x770 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x770 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x770 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x774 "DOC0EXPD2397,"
hexmask.long.word 0x774 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x774 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x774 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x774 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x774 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x774 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x774 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x774 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x774 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x778 "DOC0EXPD2398,"
hexmask.long.word 0x778 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x778 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x778 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x778 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x778 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x778 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x778 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x778 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x778 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x77C "DOC0EXPD2399,"
hexmask.long.word 0x77C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x77C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x77C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x77C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x77C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x77C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x77C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x77C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x77C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x780 "DOC0EXPD2400,"
hexmask.long.word 0x780 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x780 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x780 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x780 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x780 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x780 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x780 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x780 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x780 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x784 "DOC0EXPD2401,"
hexmask.long.word 0x784 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x784 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x784 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x784 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x784 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x784 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x784 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x784 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x784 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x788 "DOC0EXPD2402,"
hexmask.long.word 0x788 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x788 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x788 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x788 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x788 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x788 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x788 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x788 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x788 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x78C "DOC0EXPD2403,"
hexmask.long.word 0x78C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x78C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x78C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x78C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x78C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x78C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x78C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x78C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x78C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x790 "DOC0EXPD2404,"
hexmask.long.word 0x790 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x790 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x790 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x790 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x790 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x790 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x790 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x790 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x790 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x794 "DOC0EXPD2405,"
hexmask.long.word 0x794 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x794 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x794 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x794 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x794 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x794 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x794 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x794 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x794 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x798 "DOC0EXPD2406,"
hexmask.long.word 0x798 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x798 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x798 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x798 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x798 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x798 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x798 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x798 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x798 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x79C "DOC0EXPD2407,"
hexmask.long.word 0x79C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x79C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x79C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x79C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x79C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x79C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x79C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x79C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x79C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A0 "DOC0EXPD2408,"
hexmask.long.word 0x7A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A4 "DOC0EXPD2409,"
hexmask.long.word 0x7A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A8 "DOC0EXPD2410,"
hexmask.long.word 0x7A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7AC "DOC0EXPD2411,"
hexmask.long.word 0x7AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B0 "DOC0EXPD2412,"
hexmask.long.word 0x7B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B4 "DOC0EXPD2413,"
hexmask.long.word 0x7B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B8 "DOC0EXPD2414,"
hexmask.long.word 0x7B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7BC "DOC0EXPD2415,"
hexmask.long.word 0x7BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C0 "DOC0EXPD2416,"
hexmask.long.word 0x7C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C4 "DOC0EXPD2417,"
hexmask.long.word 0x7C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C8 "DOC0EXPD2418,"
hexmask.long.word 0x7C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7CC "DOC0EXPD2419,"
hexmask.long.word 0x7CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D0 "DOC0EXPD2420,"
hexmask.long.word 0x7D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D4 "DOC0EXPD2421,"
hexmask.long.word 0x7D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D8 "DOC0EXPD2422,"
hexmask.long.word 0x7D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7DC "DOC0EXPD2423,"
hexmask.long.word 0x7DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E0 "DOC0EXPD2424,"
hexmask.long.word 0x7E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E4 "DOC0EXPD2425,"
hexmask.long.word 0x7E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E8 "DOC0EXPD2426,"
hexmask.long.word 0x7E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7EC "DOC0EXPD2427,"
hexmask.long.word 0x7EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F0 "DOC0EXPD2428,"
hexmask.long.word 0x7F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F4 "DOC0EXPD2429,"
hexmask.long.word 0x7F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F8 "DOC0EXPD2430,"
hexmask.long.word 0x7F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7FC "DOC0EXPD2431,"
hexmask.long.word 0x7FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x800 "DOC0EXPD2432,"
hexmask.long.word 0x800 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x800 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x800 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x800 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x800 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x800 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x800 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x800 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x800 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x804 "DOC0EXPD2433,"
hexmask.long.word 0x804 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x804 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x804 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x804 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x804 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x804 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x804 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x804 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x804 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x808 "DOC0EXPD2434,"
hexmask.long.word 0x808 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x808 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x808 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x808 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x808 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x808 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x808 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x808 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x808 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x80C "DOC0EXPD2435,"
hexmask.long.word 0x80C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x80C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x80C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x80C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x80C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x80C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x80C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x80C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x80C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x810 "DOC0EXPD2436,"
hexmask.long.word 0x810 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x810 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x810 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x810 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x810 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x810 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x810 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x810 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x810 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x814 "DOC0EXPD2437,"
hexmask.long.word 0x814 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x814 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x814 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x814 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x814 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x814 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x814 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x814 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x814 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x818 "DOC0EXPD2438,"
hexmask.long.word 0x818 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x818 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x818 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x818 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x818 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x818 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x818 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x818 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x818 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x81C "DOC0EXPD2439,"
hexmask.long.word 0x81C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x81C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x81C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x81C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x81C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x81C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x81C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x81C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x81C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x820 "DOC0EXPD2440,"
hexmask.long.word 0x820 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x820 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x820 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x820 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x820 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x820 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x820 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x820 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x820 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x824 "DOC0EXPD2441,"
hexmask.long.word 0x824 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x824 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x824 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x824 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x824 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x824 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x824 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x824 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x824 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x828 "DOC0EXPD2442,"
hexmask.long.word 0x828 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x828 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x828 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x828 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x828 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x828 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x828 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x828 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x828 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x82C "DOC0EXPD2443,"
hexmask.long.word 0x82C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x82C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x82C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x82C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x82C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x82C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x82C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x82C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x82C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x830 "DOC0EXPD2444,"
hexmask.long.word 0x830 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x830 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x830 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x830 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x830 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x830 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x830 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x830 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x830 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x834 "DOC0EXPD2445,"
hexmask.long.word 0x834 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x834 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x834 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x834 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x834 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x834 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x834 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x834 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x834 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x838 "DOC0EXPD2446,"
hexmask.long.word 0x838 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x838 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x838 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x838 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x838 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x838 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x838 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x838 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x838 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x83C "DOC0EXPD2447,"
hexmask.long.word 0x83C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x83C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x83C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x83C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x83C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x83C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x83C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x83C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x83C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x840 "DOC0EXPD2448,"
hexmask.long.word 0x840 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x840 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x840 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x840 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x840 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x840 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x840 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x840 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x840 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x844 "DOC0EXPD2449,"
hexmask.long.word 0x844 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x844 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x844 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x844 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x844 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x844 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x844 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x844 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x844 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x848 "DOC0EXPD2450,"
hexmask.long.word 0x848 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x848 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x848 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x848 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x848 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x848 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x848 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x848 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x848 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x84C "DOC0EXPD2451,"
hexmask.long.word 0x84C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x84C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x84C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x84C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x84C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x84C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x84C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x84C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x84C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x850 "DOC0EXPD2452,"
hexmask.long.word 0x850 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x850 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x850 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x850 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x850 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x850 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x850 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x850 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x850 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x854 "DOC0EXPD2453,"
hexmask.long.word 0x854 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x854 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x854 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x854 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x854 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x854 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x854 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x854 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x854 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x858 "DOC0EXPD2454,"
hexmask.long.word 0x858 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x858 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x858 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x858 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x858 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x858 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x858 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x858 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x858 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x85C "DOC0EXPD2455,"
hexmask.long.word 0x85C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x85C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x85C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x85C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x85C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x85C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x85C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x85C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x85C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x860 "DOC0EXPD2456,"
hexmask.long.word 0x860 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x860 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x860 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x860 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x860 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x860 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x860 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x860 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x860 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x864 "DOC0EXPD2457,"
hexmask.long.word 0x864 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x864 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x864 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x864 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x864 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x864 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x864 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x864 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x864 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x868 "DOC0EXPD2458,"
hexmask.long.word 0x868 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x868 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x868 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x868 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x868 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x868 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x868 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x868 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x868 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x86C "DOC0EXPD2459,"
hexmask.long.word 0x86C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x86C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x86C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x86C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x86C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x86C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x86C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x86C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x86C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x870 "DOC0EXPD2460,"
hexmask.long.word 0x870 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x870 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x870 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x870 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x870 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x870 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x870 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x870 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x870 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x874 "DOC0EXPD2461,"
hexmask.long.word 0x874 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x874 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x874 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x874 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x874 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x874 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x874 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x874 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x874 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x878 "DOC0EXPD2462,"
hexmask.long.word 0x878 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x878 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x878 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x878 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x878 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x878 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x878 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x878 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x878 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x87C "DOC0EXPD2463,"
hexmask.long.word 0x87C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x87C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x87C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x87C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x87C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x87C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x87C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x87C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x87C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x880 "DOC0EXPD2464,"
hexmask.long.word 0x880 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x880 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x880 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x880 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x880 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x880 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x880 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x880 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x880 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x884 "DOC0EXPD2465,"
hexmask.long.word 0x884 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x884 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x884 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x884 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x884 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x884 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x884 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x884 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x884 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x888 "DOC0EXPD2466,"
hexmask.long.word 0x888 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x888 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x888 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x888 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x888 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x888 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x888 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x888 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x888 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x88C "DOC0EXPD2467,"
hexmask.long.word 0x88C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x88C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x88C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x88C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x88C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x88C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x88C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x88C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x88C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x890 "DOC0EXPD2468,"
hexmask.long.word 0x890 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x890 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x890 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x890 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x890 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x890 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x890 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x890 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x890 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x894 "DOC0EXPD2469,"
hexmask.long.word 0x894 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x894 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x894 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x894 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x894 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x894 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x894 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x894 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x894 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x898 "DOC0EXPD2470,"
hexmask.long.word 0x898 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x898 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x898 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x898 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x898 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x898 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x898 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x898 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x898 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x89C "DOC0EXPD2471,"
hexmask.long.word 0x89C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x89C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x89C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x89C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x89C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x89C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x89C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x89C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x89C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A0 "DOC0EXPD2472,"
hexmask.long.word 0x8A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A4 "DOC0EXPD2473,"
hexmask.long.word 0x8A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A8 "DOC0EXPD2474,"
hexmask.long.word 0x8A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8AC "DOC0EXPD2475,"
hexmask.long.word 0x8AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B0 "DOC0EXPD2476,"
hexmask.long.word 0x8B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B4 "DOC0EXPD2477,"
hexmask.long.word 0x8B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B8 "DOC0EXPD2478,"
hexmask.long.word 0x8B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8BC "DOC0EXPD2479,"
hexmask.long.word 0x8BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C0 "DOC0EXPD2480,"
hexmask.long.word 0x8C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C4 "DOC0EXPD2481,"
hexmask.long.word 0x8C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C8 "DOC0EXPD2482,"
hexmask.long.word 0x8C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8CC "DOC0EXPD2483,"
hexmask.long.word 0x8CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D0 "DOC0EXPD2484,"
hexmask.long.word 0x8D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D4 "DOC0EXPD2485,"
hexmask.long.word 0x8D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D8 "DOC0EXPD2486,"
hexmask.long.word 0x8D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8DC "DOC0EXPD2487,"
hexmask.long.word 0x8DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E0 "DOC0EXPD2488,"
hexmask.long.word 0x8E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E4 "DOC0EXPD2489,"
hexmask.long.word 0x8E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E8 "DOC0EXPD2490,"
hexmask.long.word 0x8E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8EC "DOC0EXPD2491,"
hexmask.long.word 0x8EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F0 "DOC0EXPD2492,"
hexmask.long.word 0x8F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F4 "DOC0EXPD2493,"
hexmask.long.word 0x8F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F8 "DOC0EXPD2494,"
hexmask.long.word 0x8F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8FC "DOC0EXPD2495,"
hexmask.long.word 0x8FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x900 "DOC0EXPD2496,"
hexmask.long.word 0x900 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x900 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x900 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x900 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x900 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x900 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x900 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x900 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x900 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x904 "DOC0EXPD2497,"
hexmask.long.word 0x904 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x904 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x904 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x904 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x904 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x904 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x904 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x904 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x904 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x908 "DOC0EXPD2498,"
hexmask.long.word 0x908 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x908 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x908 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x908 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x908 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x908 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x908 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x908 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x908 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x90C "DOC0EXPD2499,"
hexmask.long.word 0x90C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x90C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x90C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x90C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x90C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x90C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x90C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x90C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x90C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x910 "DOC0EXPD2500,"
hexmask.long.word 0x910 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x910 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x910 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x910 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x910 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x910 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x910 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x910 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x910 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x914 "DOC0EXPD2501,"
hexmask.long.word 0x914 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x914 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x914 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x914 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x914 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x914 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x914 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x914 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x914 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x918 "DOC0EXPD2502,"
hexmask.long.word 0x918 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x918 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x918 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x918 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x918 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x918 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x918 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x918 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x918 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x91C "DOC0EXPD2503,"
hexmask.long.word 0x91C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x91C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x91C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x91C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x91C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x91C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x91C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x91C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x91C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x920 "DOC0EXPD2504,"
hexmask.long.word 0x920 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x920 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x920 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x920 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x920 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x920 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x920 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x920 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x920 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x924 "DOC0EXPD2505,"
hexmask.long.word 0x924 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x924 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x924 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x924 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x924 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x924 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x924 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x924 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x924 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x928 "DOC0EXPD2506,"
hexmask.long.word 0x928 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x928 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x928 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x928 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x928 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x928 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x928 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x928 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x928 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x92C "DOC0EXPD2507,"
hexmask.long.word 0x92C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x92C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x92C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x92C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x92C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x92C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x92C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x92C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x92C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x930 "DOC0EXPD2508,"
hexmask.long.word 0x930 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x930 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x930 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x930 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x930 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x930 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x930 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x930 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x930 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x934 "DOC0EXPD2509,"
hexmask.long.word 0x934 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x934 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x934 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x934 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x934 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x934 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x934 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x934 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x934 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x938 "DOC0EXPD2510,"
hexmask.long.word 0x938 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x938 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x938 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x938 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x938 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x938 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x938 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x938 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x938 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x93C "DOC0EXPD2511,"
hexmask.long.word 0x93C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x93C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x93C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x93C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x93C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x93C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x93C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x93C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x93C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x940 "DOC0EXPD2512,"
hexmask.long.word 0x940 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x940 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x940 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x940 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x940 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x940 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x940 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x940 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x940 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x944 "DOC0EXPD2513,"
hexmask.long.word 0x944 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x944 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x944 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x944 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x944 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x944 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x944 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x944 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x944 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x948 "DOC0EXPD2514,"
hexmask.long.word 0x948 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x948 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x948 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x948 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x948 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x948 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x948 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x948 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x948 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x94C "DOC0EXPD2515,"
hexmask.long.word 0x94C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x94C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x94C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x94C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x94C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x94C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x94C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x94C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x94C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x950 "DOC0EXPD2516,"
hexmask.long.word 0x950 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x950 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x950 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x950 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x950 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x950 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x950 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x950 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x950 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x954 "DOC0EXPD2517,"
hexmask.long.word 0x954 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x954 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x954 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x954 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x954 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x954 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x954 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x954 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x954 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x958 "DOC0EXPD2518,"
hexmask.long.word 0x958 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x958 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x958 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x958 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x958 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x958 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x958 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x958 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x958 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x95C "DOC0EXPD2519,"
hexmask.long.word 0x95C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x95C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x95C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x95C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x95C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x95C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x95C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x95C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x95C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x960 "DOC0EXPD2520,"
hexmask.long.word 0x960 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x960 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x960 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x960 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x960 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x960 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x960 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x960 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x960 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x964 "DOC0EXPD2521,"
hexmask.long.word 0x964 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x964 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x964 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x964 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x964 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x964 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x964 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x964 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x964 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x968 "DOC0EXPD2522,"
hexmask.long.word 0x968 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x968 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x968 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x968 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x968 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x968 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x968 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x968 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x968 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x96C "DOC0EXPD2523,"
hexmask.long.word 0x96C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x96C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x96C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x96C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x96C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x96C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x96C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x96C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x96C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x970 "DOC0EXPD2524,"
hexmask.long.word 0x970 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x970 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x970 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x970 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x970 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x970 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x970 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x970 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x970 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x974 "DOC0EXPD2525,"
hexmask.long.word 0x974 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x974 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x974 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x974 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x974 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x974 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x974 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x974 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x974 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x978 "DOC0EXPD2526,"
hexmask.long.word 0x978 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x978 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x978 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x978 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x978 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x978 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x978 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x978 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x978 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x97C "DOC0EXPD2527,"
hexmask.long.word 0x97C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x97C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x97C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x97C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x97C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x97C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x97C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x97C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x97C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x980 "DOC0EXPD2528,"
hexmask.long.word 0x980 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x980 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x980 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x980 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x980 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x980 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x980 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x980 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x980 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x984 "DOC0EXPD2529,"
hexmask.long.word 0x984 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x984 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x984 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x984 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x984 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x984 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x984 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x984 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x984 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x988 "DOC0EXPD2530,"
hexmask.long.word 0x988 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x988 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x988 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x988 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x988 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x988 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x988 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x988 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x988 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x98C "DOC0EXPD2531,"
hexmask.long.word 0x98C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x98C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x98C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x98C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x98C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x98C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x98C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x98C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x98C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x990 "DOC0EXPD2532,"
hexmask.long.word 0x990 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x990 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x990 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x990 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x990 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x990 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x990 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x990 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x990 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x994 "DOC0EXPD2533,"
hexmask.long.word 0x994 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x994 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x994 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x994 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x994 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x994 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x994 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x994 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x994 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x998 "DOC0EXPD2534,"
hexmask.long.word 0x998 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x998 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x998 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x998 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x998 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x998 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x998 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x998 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x998 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x99C "DOC0EXPD2535,"
hexmask.long.word 0x99C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x99C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x99C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x99C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x99C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x99C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x99C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x99C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x99C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A0 "DOC0EXPD2536,"
hexmask.long.word 0x9A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A4 "DOC0EXPD2537,"
hexmask.long.word 0x9A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A8 "DOC0EXPD2538,"
hexmask.long.word 0x9A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9AC "DOC0EXPD2539,"
hexmask.long.word 0x9AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B0 "DOC0EXPD2540,"
hexmask.long.word 0x9B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B4 "DOC0EXPD2541,"
hexmask.long.word 0x9B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B8 "DOC0EXPD2542,"
hexmask.long.word 0x9B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9BC "DOC0EXPD2543,"
hexmask.long.word 0x9BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C0 "DOC0EXPD2544,"
hexmask.long.word 0x9C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C4 "DOC0EXPD2545,"
hexmask.long.word 0x9C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C8 "DOC0EXPD2546,"
hexmask.long.word 0x9C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9CC "DOC0EXPD2547,"
hexmask.long.word 0x9CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D0 "DOC0EXPD2548,"
hexmask.long.word 0x9D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D4 "DOC0EXPD2549,"
hexmask.long.word 0x9D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D8 "DOC0EXPD2550,"
hexmask.long.word 0x9D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9DC "DOC0EXPD2551,"
hexmask.long.word 0x9DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E0 "DOC0EXPD2552,"
hexmask.long.word 0x9E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E4 "DOC0EXPD2553,"
hexmask.long.word 0x9E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E8 "DOC0EXPD2554,"
hexmask.long.word 0x9E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9EC "DOC0EXPD2555,"
hexmask.long.word 0x9EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F0 "DOC0EXPD2556,"
hexmask.long.word 0x9F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F4 "DOC0EXPD2557,"
hexmask.long.word 0x9F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F8 "DOC0EXPD2558,"
hexmask.long.word 0x9F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9FC "DOC0EXPD2559,"
hexmask.long.word 0x9FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA00 "DOC0EXPD2560,"
hexmask.long.word 0xA00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA04 "DOC0EXPD2561,"
hexmask.long.word 0xA04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA08 "DOC0EXPD2562,"
hexmask.long.word 0xA08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA0C "DOC0EXPD2563,"
hexmask.long.word 0xA0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA10 "DOC0EXPD2564,"
hexmask.long.word 0xA10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA14 "DOC0EXPD2565,"
hexmask.long.word 0xA14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA18 "DOC0EXPD2566,"
hexmask.long.word 0xA18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA1C "DOC0EXPD2567,"
hexmask.long.word 0xA1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA20 "DOC0EXPD2568,"
hexmask.long.word 0xA20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA24 "DOC0EXPD2569,"
hexmask.long.word 0xA24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA28 "DOC0EXPD2570,"
hexmask.long.word 0xA28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA2C "DOC0EXPD2571,"
hexmask.long.word 0xA2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA30 "DOC0EXPD2572,"
hexmask.long.word 0xA30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA34 "DOC0EXPD2573,"
hexmask.long.word 0xA34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA38 "DOC0EXPD2574,"
hexmask.long.word 0xA38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA3C "DOC0EXPD2575,"
hexmask.long.word 0xA3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA40 "DOC0EXPD2576,"
hexmask.long.word 0xA40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA44 "DOC0EXPD2577,"
hexmask.long.word 0xA44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA48 "DOC0EXPD2578,"
hexmask.long.word 0xA48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA4C "DOC0EXPD2579,"
hexmask.long.word 0xA4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA50 "DOC0EXPD2580,"
hexmask.long.word 0xA50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA54 "DOC0EXPD2581,"
hexmask.long.word 0xA54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA58 "DOC0EXPD2582,"
hexmask.long.word 0xA58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA5C "DOC0EXPD2583,"
hexmask.long.word 0xA5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA60 "DOC0EXPD2584,"
hexmask.long.word 0xA60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA64 "DOC0EXPD2585,"
hexmask.long.word 0xA64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA68 "DOC0EXPD2586,"
hexmask.long.word 0xA68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA6C "DOC0EXPD2587,"
hexmask.long.word 0xA6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA70 "DOC0EXPD2588,"
hexmask.long.word 0xA70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA74 "DOC0EXPD2589,"
hexmask.long.word 0xA74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA78 "DOC0EXPD2590,"
hexmask.long.word 0xA78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA7C "DOC0EXPD2591,"
hexmask.long.word 0xA7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA80 "DOC0EXPD2592,"
hexmask.long.word 0xA80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA84 "DOC0EXPD2593,"
hexmask.long.word 0xA84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA88 "DOC0EXPD2594,"
hexmask.long.word 0xA88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA8C "DOC0EXPD2595,"
hexmask.long.word 0xA8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA90 "DOC0EXPD2596,"
hexmask.long.word 0xA90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA94 "DOC0EXPD2597,"
hexmask.long.word 0xA94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA98 "DOC0EXPD2598,"
hexmask.long.word 0xA98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA9C "DOC0EXPD2599,"
hexmask.long.word 0xA9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA0 "DOC0EXPD2600,"
hexmask.long.word 0xAA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA4 "DOC0EXPD2601,"
hexmask.long.word 0xAA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA8 "DOC0EXPD2602,"
hexmask.long.word 0xAA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAAC "DOC0EXPD2603,"
hexmask.long.word 0xAAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB0 "DOC0EXPD2604,"
hexmask.long.word 0xAB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB4 "DOC0EXPD2605,"
hexmask.long.word 0xAB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB8 "DOC0EXPD2606,"
hexmask.long.word 0xAB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xABC "DOC0EXPD2607,"
hexmask.long.word 0xABC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xABC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xABC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xABC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xABC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xABC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xABC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xABC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xABC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC0 "DOC0EXPD2608,"
hexmask.long.word 0xAC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC4 "DOC0EXPD2609,"
hexmask.long.word 0xAC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC8 "DOC0EXPD2610,"
hexmask.long.word 0xAC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xACC "DOC0EXPD2611,"
hexmask.long.word 0xACC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xACC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xACC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xACC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xACC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xACC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xACC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xACC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xACC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD0 "DOC0EXPD2612,"
hexmask.long.word 0xAD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD4 "DOC0EXPD2613,"
hexmask.long.word 0xAD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD8 "DOC0EXPD2614,"
hexmask.long.word 0xAD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xADC "DOC0EXPD2615,"
hexmask.long.word 0xADC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xADC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xADC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xADC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xADC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xADC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xADC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xADC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xADC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE0 "DOC0EXPD2616,"
hexmask.long.word 0xAE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE4 "DOC0EXPD2617,"
hexmask.long.word 0xAE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE8 "DOC0EXPD2618,"
hexmask.long.word 0xAE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAEC "DOC0EXPD2619,"
hexmask.long.word 0xAEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF0 "DOC0EXPD2620,"
hexmask.long.word 0xAF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF4 "DOC0EXPD2621,"
hexmask.long.word 0xAF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF8 "DOC0EXPD2622,"
hexmask.long.word 0xAF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAFC "DOC0EXPD2623,"
hexmask.long.word 0xAFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB00 "DOC0EXPD2624,"
hexmask.long.word 0xB00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB04 "DOC0EXPD2625,"
hexmask.long.word 0xB04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB08 "DOC0EXPD2626,"
hexmask.long.word 0xB08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB0C "DOC0EXPD2627,"
hexmask.long.word 0xB0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB10 "DOC0EXPD2628,"
hexmask.long.word 0xB10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB14 "DOC0EXPD2629,"
hexmask.long.word 0xB14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB18 "DOC0EXPD2630,"
hexmask.long.word 0xB18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB1C "DOC0EXPD2631,"
hexmask.long.word 0xB1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB20 "DOC0EXPD2632,"
hexmask.long.word 0xB20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB24 "DOC0EXPD2633,"
hexmask.long.word 0xB24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB28 "DOC0EXPD2634,"
hexmask.long.word 0xB28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB2C "DOC0EXPD2635,"
hexmask.long.word 0xB2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB30 "DOC0EXPD2636,"
hexmask.long.word 0xB30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB34 "DOC0EXPD2637,"
hexmask.long.word 0xB34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB38 "DOC0EXPD2638,"
hexmask.long.word 0xB38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB3C "DOC0EXPD2639,"
hexmask.long.word 0xB3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB40 "DOC0EXPD2640,"
hexmask.long.word 0xB40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB44 "DOC0EXPD2641,"
hexmask.long.word 0xB44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB48 "DOC0EXPD2642,"
hexmask.long.word 0xB48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB4C "DOC0EXPD2643,"
hexmask.long.word 0xB4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB50 "DOC0EXPD2644,"
hexmask.long.word 0xB50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB54 "DOC0EXPD2645,"
hexmask.long.word 0xB54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB58 "DOC0EXPD2646,"
hexmask.long.word 0xB58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB5C "DOC0EXPD2647,"
hexmask.long.word 0xB5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB60 "DOC0EXPD2648,"
hexmask.long.word 0xB60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB64 "DOC0EXPD2649,"
hexmask.long.word 0xB64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB68 "DOC0EXPD2650,"
hexmask.long.word 0xB68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB6C "DOC0EXPD2651,"
hexmask.long.word 0xB6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB70 "DOC0EXPD2652,"
hexmask.long.word 0xB70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB74 "DOC0EXPD2653,"
hexmask.long.word 0xB74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB78 "DOC0EXPD2654,"
hexmask.long.word 0xB78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB7C "DOC0EXPD2655,"
hexmask.long.word 0xB7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB80 "DOC0EXPD2656,"
hexmask.long.word 0xB80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB84 "DOC0EXPD2657,"
hexmask.long.word 0xB84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB88 "DOC0EXPD2658,"
hexmask.long.word 0xB88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB8C "DOC0EXPD2659,"
hexmask.long.word 0xB8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB90 "DOC0EXPD2660,"
hexmask.long.word 0xB90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB94 "DOC0EXPD2661,"
hexmask.long.word 0xB94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB98 "DOC0EXPD2662,"
hexmask.long.word 0xB98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB9C "DOC0EXPD2663,"
hexmask.long.word 0xB9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA0 "DOC0EXPD2664,"
hexmask.long.word 0xBA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA4 "DOC0EXPD2665,"
hexmask.long.word 0xBA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA8 "DOC0EXPD2666,"
hexmask.long.word 0xBA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBAC "DOC0EXPD2667,"
hexmask.long.word 0xBAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB0 "DOC0EXPD2668,"
hexmask.long.word 0xBB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB4 "DOC0EXPD2669,"
hexmask.long.word 0xBB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB8 "DOC0EXPD2670,"
hexmask.long.word 0xBB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBBC "DOC0EXPD2671,"
hexmask.long.word 0xBBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC0 "DOC0EXPD2672,"
hexmask.long.word 0xBC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC4 "DOC0EXPD2673,"
hexmask.long.word 0xBC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC8 "DOC0EXPD2674,"
hexmask.long.word 0xBC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBCC "DOC0EXPD2675,"
hexmask.long.word 0xBCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD0 "DOC0EXPD2676,"
hexmask.long.word 0xBD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD4 "DOC0EXPD2677,"
hexmask.long.word 0xBD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD8 "DOC0EXPD2678,"
hexmask.long.word 0xBD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBDC "DOC0EXPD2679,"
hexmask.long.word 0xBDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE0 "DOC0EXPD2680,"
hexmask.long.word 0xBE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE4 "DOC0EXPD2681,"
hexmask.long.word 0xBE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE8 "DOC0EXPD2682,"
hexmask.long.word 0xBE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBEC "DOC0EXPD2683,"
hexmask.long.word 0xBEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF0 "DOC0EXPD2684,"
hexmask.long.word 0xBF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF4 "DOC0EXPD2685,"
hexmask.long.word 0xBF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF8 "DOC0EXPD2686,"
hexmask.long.word 0xBF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBFC "DOC0EXPD2687,"
hexmask.long.word 0xBFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC00 "DOC0EXPD2688,"
hexmask.long.word 0xC00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC04 "DOC0EXPD2689,"
hexmask.long.word 0xC04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC08 "DOC0EXPD2690,"
hexmask.long.word 0xC08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC0C "DOC0EXPD2691,"
hexmask.long.word 0xC0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC10 "DOC0EXPD2692,"
hexmask.long.word 0xC10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC14 "DOC0EXPD2693,"
hexmask.long.word 0xC14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC18 "DOC0EXPD2694,"
hexmask.long.word 0xC18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC1C "DOC0EXPD2695,"
hexmask.long.word 0xC1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC20 "DOC0EXPD2696,"
hexmask.long.word 0xC20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC24 "DOC0EXPD2697,"
hexmask.long.word 0xC24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC28 "DOC0EXPD2698,"
hexmask.long.word 0xC28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC2C "DOC0EXPD2699,"
hexmask.long.word 0xC2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC30 "DOC0EXPD2700,"
hexmask.long.word 0xC30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC34 "DOC0EXPD2701,"
hexmask.long.word 0xC34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC38 "DOC0EXPD2702,"
hexmask.long.word 0xC38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC3C "DOC0EXPD2703,"
hexmask.long.word 0xC3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC40 "DOC0EXPD2704,"
hexmask.long.word 0xC40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC44 "DOC0EXPD2705,"
hexmask.long.word 0xC44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC48 "DOC0EXPD2706,"
hexmask.long.word 0xC48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC4C "DOC0EXPD2707,"
hexmask.long.word 0xC4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC50 "DOC0EXPD2708,"
hexmask.long.word 0xC50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC54 "DOC0EXPD2709,"
hexmask.long.word 0xC54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC58 "DOC0EXPD2710,"
hexmask.long.word 0xC58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC5C "DOC0EXPD2711,"
hexmask.long.word 0xC5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC60 "DOC0EXPD2712,"
hexmask.long.word 0xC60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC64 "DOC0EXPD2713,"
hexmask.long.word 0xC64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC68 "DOC0EXPD2714,"
hexmask.long.word 0xC68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC6C "DOC0EXPD2715,"
hexmask.long.word 0xC6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC70 "DOC0EXPD2716,"
hexmask.long.word 0xC70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC74 "DOC0EXPD2717,"
hexmask.long.word 0xC74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC78 "DOC0EXPD2718,"
hexmask.long.word 0xC78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC7C "DOC0EXPD2719,"
hexmask.long.word 0xC7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC80 "DOC0EXPD2720,"
hexmask.long.word 0xC80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC84 "DOC0EXPD2721,"
hexmask.long.word 0xC84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC88 "DOC0EXPD2722,"
hexmask.long.word 0xC88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC8C "DOC0EXPD2723,"
hexmask.long.word 0xC8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC90 "DOC0EXPD2724,"
hexmask.long.word 0xC90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC94 "DOC0EXPD2725,"
hexmask.long.word 0xC94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC98 "DOC0EXPD2726,"
hexmask.long.word 0xC98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC9C "DOC0EXPD2727,"
hexmask.long.word 0xC9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA0 "DOC0EXPD2728,"
hexmask.long.word 0xCA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA4 "DOC0EXPD2729,"
hexmask.long.word 0xCA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA8 "DOC0EXPD2730,"
hexmask.long.word 0xCA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCAC "DOC0EXPD2731,"
hexmask.long.word 0xCAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB0 "DOC0EXPD2732,"
hexmask.long.word 0xCB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB4 "DOC0EXPD2733,"
hexmask.long.word 0xCB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB8 "DOC0EXPD2734,"
hexmask.long.word 0xCB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCBC "DOC0EXPD2735,"
hexmask.long.word 0xCBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC0 "DOC0EXPD2736,"
hexmask.long.word 0xCC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC4 "DOC0EXPD2737,"
hexmask.long.word 0xCC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC8 "DOC0EXPD2738,"
hexmask.long.word 0xCC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCCC "DOC0EXPD2739,"
hexmask.long.word 0xCCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD0 "DOC0EXPD2740,"
hexmask.long.word 0xCD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD4 "DOC0EXPD2741,"
hexmask.long.word 0xCD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD8 "DOC0EXPD2742,"
hexmask.long.word 0xCD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCDC "DOC0EXPD2743,"
hexmask.long.word 0xCDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE0 "DOC0EXPD2744,"
hexmask.long.word 0xCE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE4 "DOC0EXPD2745,"
hexmask.long.word 0xCE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE8 "DOC0EXPD2746,"
hexmask.long.word 0xCE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCEC "DOC0EXPD2747,"
hexmask.long.word 0xCEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF0 "DOC0EXPD2748,"
hexmask.long.word 0xCF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF4 "DOC0EXPD2749,"
hexmask.long.word 0xCF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF8 "DOC0EXPD2750,"
hexmask.long.word 0xCF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCFC "DOC0EXPD2751,"
hexmask.long.word 0xCFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD00 "DOC0EXPD2752,"
hexmask.long.word 0xD00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD04 "DOC0EXPD2753,"
hexmask.long.word 0xD04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD08 "DOC0EXPD2754,"
hexmask.long.word 0xD08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD0C "DOC0EXPD2755,"
hexmask.long.word 0xD0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD10 "DOC0EXPD2756,"
hexmask.long.word 0xD10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD14 "DOC0EXPD2757,"
hexmask.long.word 0xD14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD18 "DOC0EXPD2758,"
hexmask.long.word 0xD18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD1C "DOC0EXPD2759,"
hexmask.long.word 0xD1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD20 "DOC0EXPD2760,"
hexmask.long.word 0xD20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD24 "DOC0EXPD2761,"
hexmask.long.word 0xD24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD28 "DOC0EXPD2762,"
hexmask.long.word 0xD28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD2C "DOC0EXPD2763,"
hexmask.long.word 0xD2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD30 "DOC0EXPD2764,"
hexmask.long.word 0xD30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD34 "DOC0EXPD2765,"
hexmask.long.word 0xD34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD38 "DOC0EXPD2766,"
hexmask.long.word 0xD38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD3C "DOC0EXPD2767,"
hexmask.long.word 0xD3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD40 "DOC0EXPD2768,"
hexmask.long.word 0xD40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD44 "DOC0EXPD2769,"
hexmask.long.word 0xD44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD48 "DOC0EXPD2770,"
hexmask.long.word 0xD48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD4C "DOC0EXPD2771,"
hexmask.long.word 0xD4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD50 "DOC0EXPD2772,"
hexmask.long.word 0xD50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD54 "DOC0EXPD2773,"
hexmask.long.word 0xD54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD58 "DOC0EXPD2774,"
hexmask.long.word 0xD58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD5C "DOC0EXPD2775,"
hexmask.long.word 0xD5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD60 "DOC0EXPD2776,"
hexmask.long.word 0xD60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD64 "DOC0EXPD2777,"
hexmask.long.word 0xD64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD68 "DOC0EXPD2778,"
hexmask.long.word 0xD68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD6C "DOC0EXPD2779,"
hexmask.long.word 0xD6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD70 "DOC0EXPD2780,"
hexmask.long.word 0xD70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD74 "DOC0EXPD2781,"
hexmask.long.word 0xD74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD78 "DOC0EXPD2782,"
hexmask.long.word 0xD78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD7C "DOC0EXPD2783,"
hexmask.long.word 0xD7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD80 "DOC0EXPD2784,"
hexmask.long.word 0xD80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD84 "DOC0EXPD2785,"
hexmask.long.word 0xD84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD88 "DOC0EXPD2786,"
hexmask.long.word 0xD88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD8C "DOC0EXPD2787,"
hexmask.long.word 0xD8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD90 "DOC0EXPD2788,"
hexmask.long.word 0xD90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD94 "DOC0EXPD2789,"
hexmask.long.word 0xD94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD98 "DOC0EXPD2790,"
hexmask.long.word 0xD98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD9C "DOC0EXPD2791,"
hexmask.long.word 0xD9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA0 "DOC0EXPD2792,"
hexmask.long.word 0xDA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA4 "DOC0EXPD2793,"
hexmask.long.word 0xDA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA8 "DOC0EXPD2794,"
hexmask.long.word 0xDA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDAC "DOC0EXPD2795,"
hexmask.long.word 0xDAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB0 "DOC0EXPD2796,"
hexmask.long.word 0xDB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB4 "DOC0EXPD2797,"
hexmask.long.word 0xDB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB8 "DOC0EXPD2798,"
hexmask.long.word 0xDB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDBC "DOC0EXPD2799,"
hexmask.long.word 0xDBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC0 "DOC0EXPD2800,"
hexmask.long.word 0xDC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC4 "DOC0EXPD2801,"
hexmask.long.word 0xDC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC8 "DOC0EXPD2802,"
hexmask.long.word 0xDC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDCC "DOC0EXPD2803,"
hexmask.long.word 0xDCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD0 "DOC0EXPD2804,"
hexmask.long.word 0xDD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD4 "DOC0EXPD2805,"
hexmask.long.word 0xDD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD8 "DOC0EXPD2806,"
hexmask.long.word 0xDD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDDC "DOC0EXPD2807,"
hexmask.long.word 0xDDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE0 "DOC0EXPD2808,"
hexmask.long.word 0xDE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE4 "DOC0EXPD2809,"
hexmask.long.word 0xDE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE8 "DOC0EXPD2810,"
hexmask.long.word 0xDE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDEC "DOC0EXPD2811,"
hexmask.long.word 0xDEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF0 "DOC0EXPD2812,"
hexmask.long.word 0xDF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF4 "DOC0EXPD2813,"
hexmask.long.word 0xDF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF8 "DOC0EXPD2814,"
hexmask.long.word 0xDF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDFC "DOC0EXPD2815,"
hexmask.long.word 0xDFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE00 "DOC0EXPD2816,"
hexmask.long.word 0xE00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE04 "DOC0EXPD2817,"
hexmask.long.word 0xE04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE08 "DOC0EXPD2818,"
hexmask.long.word 0xE08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE0C "DOC0EXPD2819,"
hexmask.long.word 0xE0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE10 "DOC0EXPD2820,"
hexmask.long.word 0xE10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE14 "DOC0EXPD2821,"
hexmask.long.word 0xE14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE18 "DOC0EXPD2822,"
hexmask.long.word 0xE18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE1C "DOC0EXPD2823,"
hexmask.long.word 0xE1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE20 "DOC0EXPD2824,"
hexmask.long.word 0xE20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE24 "DOC0EXPD2825,"
hexmask.long.word 0xE24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE28 "DOC0EXPD2826,"
hexmask.long.word 0xE28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE2C "DOC0EXPD2827,"
hexmask.long.word 0xE2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE30 "DOC0EXPD2828,"
hexmask.long.word 0xE30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE34 "DOC0EXPD2829,"
hexmask.long.word 0xE34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE38 "DOC0EXPD2830,"
hexmask.long.word 0xE38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE3C "DOC0EXPD2831,"
hexmask.long.word 0xE3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE40 "DOC0EXPD2832,"
hexmask.long.word 0xE40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE44 "DOC0EXPD2833,"
hexmask.long.word 0xE44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE48 "DOC0EXPD2834,"
hexmask.long.word 0xE48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE4C "DOC0EXPD2835,"
hexmask.long.word 0xE4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE50 "DOC0EXPD2836,"
hexmask.long.word 0xE50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE54 "DOC0EXPD2837,"
hexmask.long.word 0xE54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE58 "DOC0EXPD2838,"
hexmask.long.word 0xE58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE5C "DOC0EXPD2839,"
hexmask.long.word 0xE5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE60 "DOC0EXPD2840,"
hexmask.long.word 0xE60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE64 "DOC0EXPD2841,"
hexmask.long.word 0xE64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE68 "DOC0EXPD2842,"
hexmask.long.word 0xE68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE6C "DOC0EXPD2843,"
hexmask.long.word 0xE6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE70 "DOC0EXPD2844,"
hexmask.long.word 0xE70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE74 "DOC0EXPD2845,"
hexmask.long.word 0xE74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE78 "DOC0EXPD2846,"
hexmask.long.word 0xE78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE7C "DOC0EXPD2847,"
hexmask.long.word 0xE7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE80 "DOC0EXPD2848,"
hexmask.long.word 0xE80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE84 "DOC0EXPD2849,"
hexmask.long.word 0xE84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE88 "DOC0EXPD2850,"
hexmask.long.word 0xE88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE8C "DOC0EXPD2851,"
hexmask.long.word 0xE8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE90 "DOC0EXPD2852,"
hexmask.long.word 0xE90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE94 "DOC0EXPD2853,"
hexmask.long.word 0xE94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE98 "DOC0EXPD2854,"
hexmask.long.word 0xE98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE9C "DOC0EXPD2855,"
hexmask.long.word 0xE9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA0 "DOC0EXPD2856,"
hexmask.long.word 0xEA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA4 "DOC0EXPD2857,"
hexmask.long.word 0xEA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA8 "DOC0EXPD2858,"
hexmask.long.word 0xEA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEAC "DOC0EXPD2859,"
hexmask.long.word 0xEAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB0 "DOC0EXPD2860,"
hexmask.long.word 0xEB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB4 "DOC0EXPD2861,"
hexmask.long.word 0xEB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB8 "DOC0EXPD2862,"
hexmask.long.word 0xEB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEBC "DOC0EXPD2863,"
hexmask.long.word 0xEBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC0 "DOC0EXPD2864,"
hexmask.long.word 0xEC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC4 "DOC0EXPD2865,"
hexmask.long.word 0xEC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC8 "DOC0EXPD2866,"
hexmask.long.word 0xEC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xECC "DOC0EXPD2867,"
hexmask.long.word 0xECC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xECC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xECC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xECC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xECC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xECC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xECC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xECC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xECC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED0 "DOC0EXPD2868,"
hexmask.long.word 0xED0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED4 "DOC0EXPD2869,"
hexmask.long.word 0xED4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED8 "DOC0EXPD2870,"
hexmask.long.word 0xED8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEDC "DOC0EXPD2871,"
hexmask.long.word 0xEDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE0 "DOC0EXPD2872,"
hexmask.long.word 0xEE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE4 "DOC0EXPD2873,"
hexmask.long.word 0xEE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE8 "DOC0EXPD2874,"
hexmask.long.word 0xEE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEEC "DOC0EXPD2875,"
hexmask.long.word 0xEEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF0 "DOC0EXPD2876,"
hexmask.long.word 0xEF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF4 "DOC0EXPD2877,"
hexmask.long.word 0xEF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF8 "DOC0EXPD2878,"
hexmask.long.word 0xEF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEFC "DOC0EXPD2879,"
hexmask.long.word 0xEFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF00 "DOC0EXPD2880,"
hexmask.long.word 0xF00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF04 "DOC0EXPD2881,"
hexmask.long.word 0xF04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF08 "DOC0EXPD2882,"
hexmask.long.word 0xF08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF0C "DOC0EXPD2883,"
hexmask.long.word 0xF0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF10 "DOC0EXPD2884,"
hexmask.long.word 0xF10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF14 "DOC0EXPD2885,"
hexmask.long.word 0xF14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF18 "DOC0EXPD2886,"
hexmask.long.word 0xF18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF1C "DOC0EXPD2887,"
hexmask.long.word 0xF1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF20 "DOC0EXPD2888,"
hexmask.long.word 0xF20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF24 "DOC0EXPD2889,"
hexmask.long.word 0xF24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF28 "DOC0EXPD2890,"
hexmask.long.word 0xF28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF2C "DOC0EXPD2891,"
hexmask.long.word 0xF2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF30 "DOC0EXPD2892,"
hexmask.long.word 0xF30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF34 "DOC0EXPD2893,"
hexmask.long.word 0xF34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF38 "DOC0EXPD2894,"
hexmask.long.word 0xF38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF3C "DOC0EXPD2895,"
hexmask.long.word 0xF3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF40 "DOC0EXPD2896,"
hexmask.long.word 0xF40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF44 "DOC0EXPD2897,"
hexmask.long.word 0xF44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF48 "DOC0EXPD2898,"
hexmask.long.word 0xF48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF4C "DOC0EXPD2899,"
hexmask.long.word 0xF4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF50 "DOC0EXPD2900,"
hexmask.long.word 0xF50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF54 "DOC0EXPD2901,"
hexmask.long.word 0xF54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF58 "DOC0EXPD2902,"
hexmask.long.word 0xF58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF5C "DOC0EXPD2903,"
hexmask.long.word 0xF5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF60 "DOC0EXPD2904,"
hexmask.long.word 0xF60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF64 "DOC0EXPD2905,"
hexmask.long.word 0xF64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF68 "DOC0EXPD2906,"
hexmask.long.word 0xF68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF6C "DOC0EXPD2907,"
hexmask.long.word 0xF6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF70 "DOC0EXPD2908,"
hexmask.long.word 0xF70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF74 "DOC0EXPD2909,"
hexmask.long.word 0xF74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF78 "DOC0EXPD2910,"
hexmask.long.word 0xF78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF7C "DOC0EXPD2911,"
hexmask.long.word 0xF7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF80 "DOC0EXPD2912,"
hexmask.long.word 0xF80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF84 "DOC0EXPD2913,"
hexmask.long.word 0xF84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF88 "DOC0EXPD2914,"
hexmask.long.word 0xF88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF8C "DOC0EXPD2915,"
hexmask.long.word 0xF8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF90 "DOC0EXPD2916,"
hexmask.long.word 0xF90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF94 "DOC0EXPD2917,"
hexmask.long.word 0xF94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF98 "DOC0EXPD2918,"
hexmask.long.word 0xF98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF9C "DOC0EXPD2919,"
hexmask.long.word 0xF9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA0 "DOC0EXPD2920,"
hexmask.long.word 0xFA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA4 "DOC0EXPD2921,"
hexmask.long.word 0xFA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA8 "DOC0EXPD2922,"
hexmask.long.word 0xFA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFAC "DOC0EXPD2923,"
hexmask.long.word 0xFAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB0 "DOC0EXPD2924,"
hexmask.long.word 0xFB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB4 "DOC0EXPD2925,"
hexmask.long.word 0xFB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB8 "DOC0EXPD2926,"
hexmask.long.word 0xFB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFBC "DOC0EXPD2927,"
hexmask.long.word 0xFBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC0 "DOC0EXPD2928,"
hexmask.long.word 0xFC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC4 "DOC0EXPD2929,"
hexmask.long.word 0xFC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC8 "DOC0EXPD2930,"
hexmask.long.word 0xFC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFCC "DOC0EXPD2931,"
hexmask.long.word 0xFCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD0 "DOC0EXPD2932,"
hexmask.long.word 0xFD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD4 "DOC0EXPD2933,"
hexmask.long.word 0xFD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD8 "DOC0EXPD2934,"
hexmask.long.word 0xFD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFDC "DOC0EXPD2935,"
hexmask.long.word 0xFDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE0 "DOC0EXPD2936,"
hexmask.long.word 0xFE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE4 "DOC0EXPD2937,"
hexmask.long.word 0xFE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE8 "DOC0EXPD2938,"
hexmask.long.word 0xFE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFEC "DOC0EXPD2939,"
hexmask.long.word 0xFEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF0 "DOC0EXPD2940,"
hexmask.long.word 0xFF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF4 "DOC0EXPD2941,"
hexmask.long.word 0xFF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF8 "DOC0EXPD2942,"
hexmask.long.word 0xFF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFFC "DOC0EXPD2943,"
hexmask.long.word 0xFFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
group.long 0x3100++0xFFF
line.long 0x0 "DOC0EXPD2944,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4 "DOC0EXPD2945,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8 "DOC0EXPD2946,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC "DOC0EXPD2947,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x10 "DOC0EXPD2948,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x14 "DOC0EXPD2949,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x18 "DOC0EXPD2950,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C "DOC0EXPD2951,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x20 "DOC0EXPD2952,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x24 "DOC0EXPD2953,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x28 "DOC0EXPD2954,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C "DOC0EXPD2955,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x30 "DOC0EXPD2956,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x34 "DOC0EXPD2957,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x38 "DOC0EXPD2958,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C "DOC0EXPD2959,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x40 "DOC0EXPD2960,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x44 "DOC0EXPD2961,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x48 "DOC0EXPD2962,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C "DOC0EXPD2963,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x50 "DOC0EXPD2964,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x54 "DOC0EXPD2965,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x58 "DOC0EXPD2966,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C "DOC0EXPD2967,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x60 "DOC0EXPD2968,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x64 "DOC0EXPD2969,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x68 "DOC0EXPD2970,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C "DOC0EXPD2971,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x70 "DOC0EXPD2972,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x74 "DOC0EXPD2973,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x78 "DOC0EXPD2974,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C "DOC0EXPD2975,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x80 "DOC0EXPD2976,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x84 "DOC0EXPD2977,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x88 "DOC0EXPD2978,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C "DOC0EXPD2979,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x90 "DOC0EXPD2980,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x94 "DOC0EXPD2981,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x98 "DOC0EXPD2982,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C "DOC0EXPD2983,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA0 "DOC0EXPD2984,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA4 "DOC0EXPD2985,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA8 "DOC0EXPD2986,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC "DOC0EXPD2987,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB0 "DOC0EXPD2988,"
hexmask.long.word 0xB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB4 "DOC0EXPD2989,"
hexmask.long.word 0xB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB8 "DOC0EXPD2990,"
hexmask.long.word 0xB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC "DOC0EXPD2991,"
hexmask.long.word 0xBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC0 "DOC0EXPD2992,"
hexmask.long.word 0xC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC4 "DOC0EXPD2993,"
hexmask.long.word 0xC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC8 "DOC0EXPD2994,"
hexmask.long.word 0xC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC "DOC0EXPD2995,"
hexmask.long.word 0xCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD0 "DOC0EXPD2996,"
hexmask.long.word 0xD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD4 "DOC0EXPD2997,"
hexmask.long.word 0xD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD8 "DOC0EXPD2998,"
hexmask.long.word 0xD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC "DOC0EXPD2999,"
hexmask.long.word 0xDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE0 "DOC0EXPD3000,"
hexmask.long.word 0xE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE4 "DOC0EXPD3001,"
hexmask.long.word 0xE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE8 "DOC0EXPD3002,"
hexmask.long.word 0xE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC "DOC0EXPD3003,"
hexmask.long.word 0xEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF0 "DOC0EXPD3004,"
hexmask.long.word 0xF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF4 "DOC0EXPD3005,"
hexmask.long.word 0xF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF8 "DOC0EXPD3006,"
hexmask.long.word 0xF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC "DOC0EXPD3007,"
hexmask.long.word 0xFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x100 "DOC0EXPD3008,"
hexmask.long.word 0x100 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x100 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x100 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x100 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x100 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x100 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x100 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x100 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x100 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x104 "DOC0EXPD3009,"
hexmask.long.word 0x104 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x104 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x104 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x104 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x104 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x104 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x104 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x104 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x104 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x108 "DOC0EXPD3010,"
hexmask.long.word 0x108 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x108 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x108 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x108 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x108 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x108 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x108 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x108 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x108 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x10C "DOC0EXPD3011,"
hexmask.long.word 0x10C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x10C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x10C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x10C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x10C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x10C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x10C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x10C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x10C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x110 "DOC0EXPD3012,"
hexmask.long.word 0x110 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x110 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x110 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x110 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x110 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x110 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x110 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x110 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x110 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x114 "DOC0EXPD3013,"
hexmask.long.word 0x114 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x114 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x114 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x114 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x114 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x114 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x114 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x114 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x114 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x118 "DOC0EXPD3014,"
hexmask.long.word 0x118 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x118 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x118 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x118 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x118 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x118 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x118 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x118 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x118 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x11C "DOC0EXPD3015,"
hexmask.long.word 0x11C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x11C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x11C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x11C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x11C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x11C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x11C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x11C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x11C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x120 "DOC0EXPD3016,"
hexmask.long.word 0x120 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x120 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x120 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x120 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x120 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x120 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x120 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x120 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x120 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x124 "DOC0EXPD3017,"
hexmask.long.word 0x124 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x124 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x124 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x124 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x124 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x124 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x124 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x124 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x124 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x128 "DOC0EXPD3018,"
hexmask.long.word 0x128 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x128 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x128 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x128 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x128 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x128 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x128 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x128 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x128 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x12C "DOC0EXPD3019,"
hexmask.long.word 0x12C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x12C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x12C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x12C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x12C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x12C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x12C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x12C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x12C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x130 "DOC0EXPD3020,"
hexmask.long.word 0x130 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x130 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x130 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x130 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x130 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x130 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x130 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x130 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x130 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x134 "DOC0EXPD3021,"
hexmask.long.word 0x134 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x134 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x134 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x134 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x134 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x134 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x134 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x134 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x134 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x138 "DOC0EXPD3022,"
hexmask.long.word 0x138 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x138 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x138 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x138 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x138 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x138 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x138 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x138 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x138 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x13C "DOC0EXPD3023,"
hexmask.long.word 0x13C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x13C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x13C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x13C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x13C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x13C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x13C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x13C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x13C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x140 "DOC0EXPD3024,"
hexmask.long.word 0x140 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x140 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x140 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x140 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x140 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x140 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x140 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x140 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x140 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x144 "DOC0EXPD3025,"
hexmask.long.word 0x144 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x144 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x144 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x144 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x144 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x144 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x144 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x144 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x144 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x148 "DOC0EXPD3026,"
hexmask.long.word 0x148 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x148 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x148 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x148 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x148 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x148 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x148 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x148 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x148 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x14C "DOC0EXPD3027,"
hexmask.long.word 0x14C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x14C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x14C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x14C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x14C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x14C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x14C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x14C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x150 "DOC0EXPD3028,"
hexmask.long.word 0x150 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x150 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x150 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x150 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x150 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x150 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x150 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x150 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x150 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x154 "DOC0EXPD3029,"
hexmask.long.word 0x154 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x154 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x154 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x154 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x154 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x154 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x154 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x154 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x154 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x158 "DOC0EXPD3030,"
hexmask.long.word 0x158 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x158 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x158 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x158 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x158 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x158 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x158 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x158 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x158 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x15C "DOC0EXPD3031,"
hexmask.long.word 0x15C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x15C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x15C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x15C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x15C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x15C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x15C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x15C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x15C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x160 "DOC0EXPD3032,"
hexmask.long.word 0x160 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x160 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x160 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x160 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x160 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x160 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x160 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x160 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x160 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x164 "DOC0EXPD3033,"
hexmask.long.word 0x164 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x164 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x164 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x164 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x164 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x164 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x164 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x164 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x164 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x168 "DOC0EXPD3034,"
hexmask.long.word 0x168 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x168 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x168 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x168 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x168 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x168 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x168 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x168 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x168 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x16C "DOC0EXPD3035,"
hexmask.long.word 0x16C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x16C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x16C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x16C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x16C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x16C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x16C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x16C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x16C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x170 "DOC0EXPD3036,"
hexmask.long.word 0x170 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x170 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x170 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x170 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x170 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x170 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x170 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x170 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x170 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x174 "DOC0EXPD3037,"
hexmask.long.word 0x174 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x174 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x174 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x174 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x174 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x174 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x174 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x174 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x174 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x178 "DOC0EXPD3038,"
hexmask.long.word 0x178 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x178 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x178 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x178 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x178 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x178 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x178 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x178 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x178 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x17C "DOC0EXPD3039,"
hexmask.long.word 0x17C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x17C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x17C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x17C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x17C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x17C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x17C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x17C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x17C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x180 "DOC0EXPD3040,"
hexmask.long.word 0x180 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x180 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x180 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x180 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x180 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x180 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x180 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x180 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x180 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x184 "DOC0EXPD3041,"
hexmask.long.word 0x184 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x184 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x184 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x184 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x184 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x184 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x184 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x184 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x184 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x188 "DOC0EXPD3042,"
hexmask.long.word 0x188 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x188 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x188 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x188 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x188 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x188 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x188 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x188 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x188 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x18C "DOC0EXPD3043,"
hexmask.long.word 0x18C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x18C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x18C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x18C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x18C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x18C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x18C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x18C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x18C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x190 "DOC0EXPD3044,"
hexmask.long.word 0x190 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x190 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x190 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x190 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x190 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x190 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x190 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x190 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x190 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x194 "DOC0EXPD3045,"
hexmask.long.word 0x194 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x194 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x194 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x194 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x194 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x194 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x194 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x194 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x194 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x198 "DOC0EXPD3046,"
hexmask.long.word 0x198 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x198 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x198 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x198 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x198 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x198 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x198 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x198 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x198 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x19C "DOC0EXPD3047,"
hexmask.long.word 0x19C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x19C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x19C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x19C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x19C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x19C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x19C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x19C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x19C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A0 "DOC0EXPD3048,"
hexmask.long.word 0x1A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A4 "DOC0EXPD3049,"
hexmask.long.word 0x1A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A8 "DOC0EXPD3050,"
hexmask.long.word 0x1A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1AC "DOC0EXPD3051,"
hexmask.long.word 0x1AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B0 "DOC0EXPD3052,"
hexmask.long.word 0x1B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B4 "DOC0EXPD3053,"
hexmask.long.word 0x1B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B8 "DOC0EXPD3054,"
hexmask.long.word 0x1B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1BC "DOC0EXPD3055,"
hexmask.long.word 0x1BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C0 "DOC0EXPD3056,"
hexmask.long.word 0x1C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C4 "DOC0EXPD3057,"
hexmask.long.word 0x1C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C8 "DOC0EXPD3058,"
hexmask.long.word 0x1C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1CC "DOC0EXPD3059,"
hexmask.long.word 0x1CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D0 "DOC0EXPD3060,"
hexmask.long.word 0x1D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D4 "DOC0EXPD3061,"
hexmask.long.word 0x1D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D8 "DOC0EXPD3062,"
hexmask.long.word 0x1D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1DC "DOC0EXPD3063,"
hexmask.long.word 0x1DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E0 "DOC0EXPD3064,"
hexmask.long.word 0x1E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E4 "DOC0EXPD3065,"
hexmask.long.word 0x1E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E8 "DOC0EXPD3066,"
hexmask.long.word 0x1E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1EC "DOC0EXPD3067,"
hexmask.long.word 0x1EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F0 "DOC0EXPD3068,"
hexmask.long.word 0x1F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F4 "DOC0EXPD3069,"
hexmask.long.word 0x1F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F8 "DOC0EXPD3070,"
hexmask.long.word 0x1F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1FC "DOC0EXPD3071,"
hexmask.long.word 0x1FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x200 "DOC0EXPD3072,"
hexmask.long.word 0x200 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x200 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x200 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x200 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x200 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x200 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x200 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x200 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x200 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x204 "DOC0EXPD3073,"
hexmask.long.word 0x204 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x204 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x204 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x204 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x204 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x204 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x204 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x204 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x204 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x208 "DOC0EXPD3074,"
hexmask.long.word 0x208 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x208 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x208 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x208 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x208 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x208 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x208 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x208 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x208 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x20C "DOC0EXPD3075,"
hexmask.long.word 0x20C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x20C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x20C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x20C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x20C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x20C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x20C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x20C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x20C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x210 "DOC0EXPD3076,"
hexmask.long.word 0x210 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x210 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x210 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x210 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x210 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x210 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x210 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x210 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x210 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x214 "DOC0EXPD3077,"
hexmask.long.word 0x214 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x214 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x214 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x214 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x214 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x214 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x214 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x214 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x214 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x218 "DOC0EXPD3078,"
hexmask.long.word 0x218 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x218 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x218 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x218 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x218 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x218 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x218 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x218 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x218 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x21C "DOC0EXPD3079,"
hexmask.long.word 0x21C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x21C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x21C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x21C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x21C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x21C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x21C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x21C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x21C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x220 "DOC0EXPD3080,"
hexmask.long.word 0x220 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x220 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x220 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x220 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x220 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x220 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x220 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x220 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x220 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x224 "DOC0EXPD3081,"
hexmask.long.word 0x224 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x224 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x224 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x224 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x224 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x224 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x224 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x224 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x224 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x228 "DOC0EXPD3082,"
hexmask.long.word 0x228 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x228 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x228 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x228 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x228 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x228 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x228 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x228 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x228 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x22C "DOC0EXPD3083,"
hexmask.long.word 0x22C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x22C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x22C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x22C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x22C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x22C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x22C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x22C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x22C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x230 "DOC0EXPD3084,"
hexmask.long.word 0x230 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x230 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x230 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x230 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x230 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x230 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x230 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x230 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x230 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x234 "DOC0EXPD3085,"
hexmask.long.word 0x234 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x234 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x234 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x234 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x234 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x234 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x234 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x234 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x234 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x238 "DOC0EXPD3086,"
hexmask.long.word 0x238 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x238 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x238 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x238 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x238 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x238 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x238 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x238 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x238 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x23C "DOC0EXPD3087,"
hexmask.long.word 0x23C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x23C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x23C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x23C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x23C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x23C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x23C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x23C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x23C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x240 "DOC0EXPD3088,"
hexmask.long.word 0x240 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x240 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x240 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x240 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x240 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x240 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x240 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x240 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x240 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x244 "DOC0EXPD3089,"
hexmask.long.word 0x244 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x244 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x244 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x244 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x244 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x244 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x244 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x244 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x244 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x248 "DOC0EXPD3090,"
hexmask.long.word 0x248 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x248 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x248 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x248 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x248 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x248 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x248 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x248 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x248 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x24C "DOC0EXPD3091,"
hexmask.long.word 0x24C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x24C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x24C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x24C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x24C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x24C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x24C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x24C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x24C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x250 "DOC0EXPD3092,"
hexmask.long.word 0x250 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x250 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x250 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x250 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x250 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x250 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x250 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x250 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x250 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x254 "DOC0EXPD3093,"
hexmask.long.word 0x254 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x254 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x254 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x254 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x254 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x254 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x254 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x254 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x254 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x258 "DOC0EXPD3094,"
hexmask.long.word 0x258 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x258 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x258 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x258 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x258 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x258 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x258 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x258 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x258 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x25C "DOC0EXPD3095,"
hexmask.long.word 0x25C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x25C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x25C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x25C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x25C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x25C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x25C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x25C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x25C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x260 "DOC0EXPD3096,"
hexmask.long.word 0x260 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x260 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x260 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x260 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x260 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x260 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x260 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x260 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x260 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x264 "DOC0EXPD3097,"
hexmask.long.word 0x264 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x264 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x264 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x264 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x264 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x264 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x264 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x264 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x264 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x268 "DOC0EXPD3098,"
hexmask.long.word 0x268 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x268 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x268 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x268 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x268 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x268 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x268 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x268 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x268 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x26C "DOC0EXPD3099,"
hexmask.long.word 0x26C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x26C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x26C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x26C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x26C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x26C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x26C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x26C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x26C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x270 "DOC0EXPD3100,"
hexmask.long.word 0x270 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x270 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x270 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x270 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x270 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x270 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x270 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x270 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x270 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x274 "DOC0EXPD3101,"
hexmask.long.word 0x274 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x274 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x274 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x274 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x274 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x274 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x274 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x274 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x274 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x278 "DOC0EXPD3102,"
hexmask.long.word 0x278 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x278 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x278 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x278 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x278 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x278 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x278 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x278 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x278 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x27C "DOC0EXPD3103,"
hexmask.long.word 0x27C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x27C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x27C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x27C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x27C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x27C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x27C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x27C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x27C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x280 "DOC0EXPD3104,"
hexmask.long.word 0x280 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x280 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x280 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x280 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x280 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x280 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x280 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x280 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x280 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x284 "DOC0EXPD3105,"
hexmask.long.word 0x284 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x284 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x284 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x284 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x284 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x284 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x284 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x284 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x284 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x288 "DOC0EXPD3106,"
hexmask.long.word 0x288 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x288 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x288 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x288 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x288 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x288 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x288 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x288 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x288 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x28C "DOC0EXPD3107,"
hexmask.long.word 0x28C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x28C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x28C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x28C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x28C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x28C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x28C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x28C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x28C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x290 "DOC0EXPD3108,"
hexmask.long.word 0x290 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x290 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x290 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x290 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x290 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x290 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x290 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x290 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x290 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x294 "DOC0EXPD3109,"
hexmask.long.word 0x294 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x294 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x294 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x294 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x294 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x294 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x294 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x294 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x294 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x298 "DOC0EXPD3110,"
hexmask.long.word 0x298 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x298 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x298 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x298 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x298 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x298 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x298 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x298 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x298 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x29C "DOC0EXPD3111,"
hexmask.long.word 0x29C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x29C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x29C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x29C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x29C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x29C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x29C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x29C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x29C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A0 "DOC0EXPD3112,"
hexmask.long.word 0x2A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A4 "DOC0EXPD3113,"
hexmask.long.word 0x2A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A8 "DOC0EXPD3114,"
hexmask.long.word 0x2A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2AC "DOC0EXPD3115,"
hexmask.long.word 0x2AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B0 "DOC0EXPD3116,"
hexmask.long.word 0x2B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B4 "DOC0EXPD3117,"
hexmask.long.word 0x2B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B8 "DOC0EXPD3118,"
hexmask.long.word 0x2B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2BC "DOC0EXPD3119,"
hexmask.long.word 0x2BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C0 "DOC0EXPD3120,"
hexmask.long.word 0x2C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C4 "DOC0EXPD3121,"
hexmask.long.word 0x2C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C8 "DOC0EXPD3122,"
hexmask.long.word 0x2C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2CC "DOC0EXPD3123,"
hexmask.long.word 0x2CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D0 "DOC0EXPD3124,"
hexmask.long.word 0x2D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D4 "DOC0EXPD3125,"
hexmask.long.word 0x2D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D8 "DOC0EXPD3126,"
hexmask.long.word 0x2D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2DC "DOC0EXPD3127,"
hexmask.long.word 0x2DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E0 "DOC0EXPD3128,"
hexmask.long.word 0x2E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E4 "DOC0EXPD3129,"
hexmask.long.word 0x2E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E8 "DOC0EXPD3130,"
hexmask.long.word 0x2E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2EC "DOC0EXPD3131,"
hexmask.long.word 0x2EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F0 "DOC0EXPD3132,"
hexmask.long.word 0x2F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F4 "DOC0EXPD3133,"
hexmask.long.word 0x2F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F8 "DOC0EXPD3134,"
hexmask.long.word 0x2F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2FC "DOC0EXPD3135,"
hexmask.long.word 0x2FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x300 "DOC0EXPD3136,"
hexmask.long.word 0x300 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x300 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x300 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x300 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x300 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x300 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x300 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x300 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x300 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x304 "DOC0EXPD3137,"
hexmask.long.word 0x304 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x304 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x304 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x304 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x304 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x304 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x304 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x304 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x304 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x308 "DOC0EXPD3138,"
hexmask.long.word 0x308 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x308 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x308 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x308 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x308 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x308 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x308 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x308 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x308 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x30C "DOC0EXPD3139,"
hexmask.long.word 0x30C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x30C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x30C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x30C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x30C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x30C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x30C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x30C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x30C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x310 "DOC0EXPD3140,"
hexmask.long.word 0x310 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x310 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x310 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x310 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x310 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x310 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x310 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x310 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x310 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x314 "DOC0EXPD3141,"
hexmask.long.word 0x314 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x314 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x314 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x314 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x314 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x314 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x314 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x314 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x314 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x318 "DOC0EXPD3142,"
hexmask.long.word 0x318 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x318 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x318 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x318 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x318 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x318 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x318 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x318 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x318 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x31C "DOC0EXPD3143,"
hexmask.long.word 0x31C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x31C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x31C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x31C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x31C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x31C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x31C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x31C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x31C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x320 "DOC0EXPD3144,"
hexmask.long.word 0x320 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x320 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x320 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x320 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x320 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x320 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x320 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x320 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x320 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x324 "DOC0EXPD3145,"
hexmask.long.word 0x324 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x324 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x324 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x324 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x324 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x324 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x324 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x324 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x324 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x328 "DOC0EXPD3146,"
hexmask.long.word 0x328 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x328 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x328 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x328 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x328 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x328 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x328 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x328 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x328 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x32C "DOC0EXPD3147,"
hexmask.long.word 0x32C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x32C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x32C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x32C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x32C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x32C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x32C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x32C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x32C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x330 "DOC0EXPD3148,"
hexmask.long.word 0x330 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x330 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x330 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x330 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x330 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x330 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x330 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x330 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x330 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x334 "DOC0EXPD3149,"
hexmask.long.word 0x334 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x334 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x334 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x334 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x334 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x334 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x334 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x334 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x334 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x338 "DOC0EXPD3150,"
hexmask.long.word 0x338 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x338 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x338 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x338 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x338 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x338 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x338 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x338 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x338 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x33C "DOC0EXPD3151,"
hexmask.long.word 0x33C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x33C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x33C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x33C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x33C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x33C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x33C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x33C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x33C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x340 "DOC0EXPD3152,"
hexmask.long.word 0x340 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x340 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x340 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x340 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x340 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x340 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x340 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x340 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x340 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x344 "DOC0EXPD3153,"
hexmask.long.word 0x344 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x344 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x344 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x344 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x344 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x344 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x344 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x344 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x344 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x348 "DOC0EXPD3154,"
hexmask.long.word 0x348 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x348 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x348 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x348 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x348 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x348 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x348 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x348 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x348 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x34C "DOC0EXPD3155,"
hexmask.long.word 0x34C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x34C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x34C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x34C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x34C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x34C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x34C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x34C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x34C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x350 "DOC0EXPD3156,"
hexmask.long.word 0x350 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x350 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x350 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x350 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x350 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x350 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x350 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x350 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x350 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x354 "DOC0EXPD3157,"
hexmask.long.word 0x354 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x354 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x354 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x354 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x354 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x354 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x354 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x354 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x354 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x358 "DOC0EXPD3158,"
hexmask.long.word 0x358 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x358 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x358 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x358 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x358 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x358 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x358 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x358 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x358 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x35C "DOC0EXPD3159,"
hexmask.long.word 0x35C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x35C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x35C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x35C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x35C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x35C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x35C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x35C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x35C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x360 "DOC0EXPD3160,"
hexmask.long.word 0x360 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x360 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x360 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x360 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x360 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x360 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x360 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x360 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x360 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x364 "DOC0EXPD3161,"
hexmask.long.word 0x364 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x364 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x364 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x364 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x364 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x364 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x364 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x364 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x364 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x368 "DOC0EXPD3162,"
hexmask.long.word 0x368 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x368 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x368 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x368 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x368 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x368 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x368 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x368 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x368 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x36C "DOC0EXPD3163,"
hexmask.long.word 0x36C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x36C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x36C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x36C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x36C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x36C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x36C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x36C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x36C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x370 "DOC0EXPD3164,"
hexmask.long.word 0x370 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x370 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x370 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x370 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x370 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x370 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x370 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x370 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x370 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x374 "DOC0EXPD3165,"
hexmask.long.word 0x374 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x374 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x374 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x374 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x374 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x374 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x374 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x374 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x374 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x378 "DOC0EXPD3166,"
hexmask.long.word 0x378 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x378 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x378 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x378 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x378 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x378 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x378 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x378 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x378 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x37C "DOC0EXPD3167,"
hexmask.long.word 0x37C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x37C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x37C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x37C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x37C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x37C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x37C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x37C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x37C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x380 "DOC0EXPD3168,"
hexmask.long.word 0x380 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x380 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x380 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x380 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x380 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x380 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x380 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x380 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x380 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x384 "DOC0EXPD3169,"
hexmask.long.word 0x384 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x384 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x384 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x384 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x384 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x384 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x384 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x384 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x384 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x388 "DOC0EXPD3170,"
hexmask.long.word 0x388 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x388 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x388 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x388 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x388 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x388 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x388 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x388 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x388 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x38C "DOC0EXPD3171,"
hexmask.long.word 0x38C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x38C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x38C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x38C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x38C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x38C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x38C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x38C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x38C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x390 "DOC0EXPD3172,"
hexmask.long.word 0x390 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x390 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x390 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x390 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x390 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x390 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x390 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x390 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x390 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x394 "DOC0EXPD3173,"
hexmask.long.word 0x394 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x394 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x394 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x394 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x394 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x394 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x394 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x394 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x394 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x398 "DOC0EXPD3174,"
hexmask.long.word 0x398 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x398 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x398 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x398 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x398 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x398 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x398 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x398 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x398 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x39C "DOC0EXPD3175,"
hexmask.long.word 0x39C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x39C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x39C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x39C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x39C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x39C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x39C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x39C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x39C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A0 "DOC0EXPD3176,"
hexmask.long.word 0x3A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A4 "DOC0EXPD3177,"
hexmask.long.word 0x3A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A8 "DOC0EXPD3178,"
hexmask.long.word 0x3A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3AC "DOC0EXPD3179,"
hexmask.long.word 0x3AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B0 "DOC0EXPD3180,"
hexmask.long.word 0x3B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B4 "DOC0EXPD3181,"
hexmask.long.word 0x3B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B8 "DOC0EXPD3182,"
hexmask.long.word 0x3B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3BC "DOC0EXPD3183,"
hexmask.long.word 0x3BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C0 "DOC0EXPD3184,"
hexmask.long.word 0x3C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C4 "DOC0EXPD3185,"
hexmask.long.word 0x3C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C8 "DOC0EXPD3186,"
hexmask.long.word 0x3C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3CC "DOC0EXPD3187,"
hexmask.long.word 0x3CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D0 "DOC0EXPD3188,"
hexmask.long.word 0x3D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D4 "DOC0EXPD3189,"
hexmask.long.word 0x3D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D8 "DOC0EXPD3190,"
hexmask.long.word 0x3D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3DC "DOC0EXPD3191,"
hexmask.long.word 0x3DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E0 "DOC0EXPD3192,"
hexmask.long.word 0x3E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E4 "DOC0EXPD3193,"
hexmask.long.word 0x3E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E8 "DOC0EXPD3194,"
hexmask.long.word 0x3E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3EC "DOC0EXPD3195,"
hexmask.long.word 0x3EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F0 "DOC0EXPD3196,"
hexmask.long.word 0x3F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F4 "DOC0EXPD3197,"
hexmask.long.word 0x3F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F8 "DOC0EXPD3198,"
hexmask.long.word 0x3F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3FC "DOC0EXPD3199,"
hexmask.long.word 0x3FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x400 "DOC0EXPD3200,"
hexmask.long.word 0x400 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x400 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x400 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x400 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x400 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x400 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x400 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x400 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x400 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x404 "DOC0EXPD3201,"
hexmask.long.word 0x404 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x404 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x404 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x404 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x404 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x404 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x404 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x404 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x404 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x408 "DOC0EXPD3202,"
hexmask.long.word 0x408 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x408 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x408 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x408 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x408 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x408 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x408 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x408 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x408 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x40C "DOC0EXPD3203,"
hexmask.long.word 0x40C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x40C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x40C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x40C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x40C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x40C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x40C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x40C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x40C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x410 "DOC0EXPD3204,"
hexmask.long.word 0x410 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x410 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x410 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x410 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x410 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x410 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x410 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x410 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x410 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x414 "DOC0EXPD3205,"
hexmask.long.word 0x414 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x414 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x414 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x414 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x414 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x414 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x414 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x414 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x414 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x418 "DOC0EXPD3206,"
hexmask.long.word 0x418 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x418 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x418 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x418 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x418 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x418 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x418 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x418 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x418 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x41C "DOC0EXPD3207,"
hexmask.long.word 0x41C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x41C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x41C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x41C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x41C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x41C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x41C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x41C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x41C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x420 "DOC0EXPD3208,"
hexmask.long.word 0x420 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x420 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x420 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x420 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x420 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x420 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x420 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x420 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x420 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x424 "DOC0EXPD3209,"
hexmask.long.word 0x424 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x424 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x424 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x424 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x424 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x424 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x424 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x424 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x424 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x428 "DOC0EXPD3210,"
hexmask.long.word 0x428 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x428 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x428 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x428 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x428 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x428 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x428 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x428 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x428 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x42C "DOC0EXPD3211,"
hexmask.long.word 0x42C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x42C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x42C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x42C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x42C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x42C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x42C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x42C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x42C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x430 "DOC0EXPD3212,"
hexmask.long.word 0x430 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x430 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x430 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x430 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x430 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x430 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x430 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x430 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x430 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x434 "DOC0EXPD3213,"
hexmask.long.word 0x434 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x434 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x434 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x434 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x434 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x434 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x434 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x434 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x434 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x438 "DOC0EXPD3214,"
hexmask.long.word 0x438 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x438 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x438 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x438 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x438 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x438 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x438 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x438 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x438 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x43C "DOC0EXPD3215,"
hexmask.long.word 0x43C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x43C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x43C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x43C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x43C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x43C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x43C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x43C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x43C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x440 "DOC0EXPD3216,"
hexmask.long.word 0x440 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x440 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x440 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x440 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x440 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x440 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x440 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x440 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x440 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x444 "DOC0EXPD3217,"
hexmask.long.word 0x444 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x444 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x444 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x444 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x444 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x444 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x444 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x444 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x444 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x448 "DOC0EXPD3218,"
hexmask.long.word 0x448 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x448 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x448 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x448 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x448 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x448 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x448 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x448 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x448 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x44C "DOC0EXPD3219,"
hexmask.long.word 0x44C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x44C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x44C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x44C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x44C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x44C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x44C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x44C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x44C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x450 "DOC0EXPD3220,"
hexmask.long.word 0x450 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x450 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x450 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x450 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x450 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x450 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x450 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x450 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x450 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x454 "DOC0EXPD3221,"
hexmask.long.word 0x454 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x454 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x454 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x454 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x454 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x454 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x454 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x454 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x454 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x458 "DOC0EXPD3222,"
hexmask.long.word 0x458 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x458 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x458 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x458 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x458 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x458 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x458 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x458 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x458 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x45C "DOC0EXPD3223,"
hexmask.long.word 0x45C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x45C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x45C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x45C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x45C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x45C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x45C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x45C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x45C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x460 "DOC0EXPD3224,"
hexmask.long.word 0x460 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x460 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x460 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x460 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x460 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x460 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x460 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x460 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x460 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x464 "DOC0EXPD3225,"
hexmask.long.word 0x464 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x464 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x464 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x464 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x464 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x464 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x464 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x464 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x464 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x468 "DOC0EXPD3226,"
hexmask.long.word 0x468 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x468 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x468 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x468 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x468 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x468 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x468 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x468 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x468 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x46C "DOC0EXPD3227,"
hexmask.long.word 0x46C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x46C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x46C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x46C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x46C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x46C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x46C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x46C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x46C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x470 "DOC0EXPD3228,"
hexmask.long.word 0x470 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x470 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x470 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x470 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x470 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x470 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x470 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x470 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x470 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x474 "DOC0EXPD3229,"
hexmask.long.word 0x474 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x474 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x474 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x474 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x474 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x474 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x474 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x474 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x474 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x478 "DOC0EXPD3230,"
hexmask.long.word 0x478 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x478 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x478 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x478 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x478 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x478 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x478 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x478 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x478 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x47C "DOC0EXPD3231,"
hexmask.long.word 0x47C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x47C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x47C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x47C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x47C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x47C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x47C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x47C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x47C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x480 "DOC0EXPD3232,"
hexmask.long.word 0x480 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x480 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x480 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x480 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x480 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x480 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x480 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x480 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x480 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x484 "DOC0EXPD3233,"
hexmask.long.word 0x484 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x484 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x484 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x484 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x484 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x484 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x484 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x484 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x484 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x488 "DOC0EXPD3234,"
hexmask.long.word 0x488 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x488 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x488 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x488 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x488 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x488 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x488 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x488 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x488 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x48C "DOC0EXPD3235,"
hexmask.long.word 0x48C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x48C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x48C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x48C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x48C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x48C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x48C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x48C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x48C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x490 "DOC0EXPD3236,"
hexmask.long.word 0x490 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x490 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x490 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x490 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x490 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x490 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x490 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x490 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x490 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x494 "DOC0EXPD3237,"
hexmask.long.word 0x494 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x494 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x494 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x494 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x494 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x494 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x494 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x494 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x494 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x498 "DOC0EXPD3238,"
hexmask.long.word 0x498 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x498 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x498 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x498 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x498 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x498 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x498 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x498 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x498 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x49C "DOC0EXPD3239,"
hexmask.long.word 0x49C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x49C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x49C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x49C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x49C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x49C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x49C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x49C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x49C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A0 "DOC0EXPD3240,"
hexmask.long.word 0x4A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A4 "DOC0EXPD3241,"
hexmask.long.word 0x4A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A8 "DOC0EXPD3242,"
hexmask.long.word 0x4A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4AC "DOC0EXPD3243,"
hexmask.long.word 0x4AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B0 "DOC0EXPD3244,"
hexmask.long.word 0x4B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B4 "DOC0EXPD3245,"
hexmask.long.word 0x4B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B8 "DOC0EXPD3246,"
hexmask.long.word 0x4B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4BC "DOC0EXPD3247,"
hexmask.long.word 0x4BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C0 "DOC0EXPD3248,"
hexmask.long.word 0x4C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C4 "DOC0EXPD3249,"
hexmask.long.word 0x4C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C8 "DOC0EXPD3250,"
hexmask.long.word 0x4C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4CC "DOC0EXPD3251,"
hexmask.long.word 0x4CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D0 "DOC0EXPD3252,"
hexmask.long.word 0x4D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D4 "DOC0EXPD3253,"
hexmask.long.word 0x4D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D8 "DOC0EXPD3254,"
hexmask.long.word 0x4D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4DC "DOC0EXPD3255,"
hexmask.long.word 0x4DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E0 "DOC0EXPD3256,"
hexmask.long.word 0x4E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E4 "DOC0EXPD3257,"
hexmask.long.word 0x4E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E8 "DOC0EXPD3258,"
hexmask.long.word 0x4E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4EC "DOC0EXPD3259,"
hexmask.long.word 0x4EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F0 "DOC0EXPD3260,"
hexmask.long.word 0x4F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F4 "DOC0EXPD3261,"
hexmask.long.word 0x4F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F8 "DOC0EXPD3262,"
hexmask.long.word 0x4F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4FC "DOC0EXPD3263,"
hexmask.long.word 0x4FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x500 "DOC0EXPD3264,"
hexmask.long.word 0x500 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x500 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x500 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x500 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x500 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x500 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x500 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x500 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x500 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x504 "DOC0EXPD3265,"
hexmask.long.word 0x504 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x504 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x504 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x504 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x504 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x504 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x504 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x504 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x504 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x508 "DOC0EXPD3266,"
hexmask.long.word 0x508 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x508 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x508 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x508 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x508 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x508 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x508 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x508 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x508 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x50C "DOC0EXPD3267,"
hexmask.long.word 0x50C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x50C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x50C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x50C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x50C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x50C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x50C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x50C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x50C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x510 "DOC0EXPD3268,"
hexmask.long.word 0x510 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x510 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x510 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x510 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x510 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x510 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x510 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x510 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x510 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x514 "DOC0EXPD3269,"
hexmask.long.word 0x514 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x514 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x514 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x514 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x514 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x514 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x514 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x514 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x514 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x518 "DOC0EXPD3270,"
hexmask.long.word 0x518 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x518 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x518 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x518 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x518 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x518 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x518 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x518 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x518 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x51C "DOC0EXPD3271,"
hexmask.long.word 0x51C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x51C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x51C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x51C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x51C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x51C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x51C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x51C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x51C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x520 "DOC0EXPD3272,"
hexmask.long.word 0x520 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x520 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x520 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x520 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x520 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x520 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x520 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x520 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x520 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x524 "DOC0EXPD3273,"
hexmask.long.word 0x524 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x524 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x524 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x524 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x524 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x524 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x524 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x524 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x524 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x528 "DOC0EXPD3274,"
hexmask.long.word 0x528 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x528 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x528 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x528 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x528 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x528 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x528 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x528 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x528 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x52C "DOC0EXPD3275,"
hexmask.long.word 0x52C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x52C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x52C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x52C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x52C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x52C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x52C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x52C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x52C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x530 "DOC0EXPD3276,"
hexmask.long.word 0x530 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x530 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x530 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x530 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x530 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x530 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x530 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x530 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x530 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x534 "DOC0EXPD3277,"
hexmask.long.word 0x534 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x534 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x534 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x534 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x534 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x534 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x534 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x534 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x534 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x538 "DOC0EXPD3278,"
hexmask.long.word 0x538 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x538 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x538 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x538 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x538 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x538 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x538 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x538 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x538 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x53C "DOC0EXPD3279,"
hexmask.long.word 0x53C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x53C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x53C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x53C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x53C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x53C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x53C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x53C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x53C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x540 "DOC0EXPD3280,"
hexmask.long.word 0x540 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x540 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x540 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x540 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x540 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x540 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x540 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x540 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x540 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x544 "DOC0EXPD3281,"
hexmask.long.word 0x544 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x544 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x544 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x544 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x544 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x544 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x544 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x544 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x544 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x548 "DOC0EXPD3282,"
hexmask.long.word 0x548 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x548 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x548 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x548 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x548 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x548 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x548 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x548 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x548 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x54C "DOC0EXPD3283,"
hexmask.long.word 0x54C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x54C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x54C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x54C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x54C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x54C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x54C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x54C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x54C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x550 "DOC0EXPD3284,"
hexmask.long.word 0x550 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x550 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x550 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x550 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x550 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x550 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x550 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x550 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x550 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x554 "DOC0EXPD3285,"
hexmask.long.word 0x554 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x554 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x554 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x554 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x554 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x554 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x554 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x554 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x554 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x558 "DOC0EXPD3286,"
hexmask.long.word 0x558 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x558 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x558 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x558 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x558 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x558 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x558 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x558 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x558 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x55C "DOC0EXPD3287,"
hexmask.long.word 0x55C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x55C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x55C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x55C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x55C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x55C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x55C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x55C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x55C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x560 "DOC0EXPD3288,"
hexmask.long.word 0x560 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x560 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x560 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x560 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x560 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x560 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x560 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x560 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x560 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x564 "DOC0EXPD3289,"
hexmask.long.word 0x564 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x564 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x564 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x564 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x564 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x564 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x564 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x564 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x564 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x568 "DOC0EXPD3290,"
hexmask.long.word 0x568 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x568 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x568 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x568 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x568 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x568 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x568 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x568 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x568 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x56C "DOC0EXPD3291,"
hexmask.long.word 0x56C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x56C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x56C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x56C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x56C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x56C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x56C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x56C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x56C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x570 "DOC0EXPD3292,"
hexmask.long.word 0x570 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x570 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x570 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x570 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x570 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x570 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x570 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x570 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x570 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x574 "DOC0EXPD3293,"
hexmask.long.word 0x574 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x574 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x574 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x574 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x574 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x574 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x574 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x574 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x574 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x578 "DOC0EXPD3294,"
hexmask.long.word 0x578 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x578 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x578 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x578 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x578 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x578 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x578 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x578 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x578 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x57C "DOC0EXPD3295,"
hexmask.long.word 0x57C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x57C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x57C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x57C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x57C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x57C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x57C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x57C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x57C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x580 "DOC0EXPD3296,"
hexmask.long.word 0x580 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x580 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x580 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x580 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x580 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x580 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x580 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x580 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x580 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x584 "DOC0EXPD3297,"
hexmask.long.word 0x584 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x584 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x584 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x584 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x584 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x584 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x584 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x584 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x584 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x588 "DOC0EXPD3298,"
hexmask.long.word 0x588 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x588 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x588 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x588 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x588 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x588 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x588 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x588 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x588 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x58C "DOC0EXPD3299,"
hexmask.long.word 0x58C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x58C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x58C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x58C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x58C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x58C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x58C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x58C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x58C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x590 "DOC0EXPD3300,"
hexmask.long.word 0x590 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x590 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x590 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x590 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x590 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x590 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x590 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x590 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x590 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x594 "DOC0EXPD3301,"
hexmask.long.word 0x594 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x594 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x594 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x594 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x594 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x594 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x594 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x594 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x594 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x598 "DOC0EXPD3302,"
hexmask.long.word 0x598 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x598 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x598 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x598 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x598 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x598 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x598 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x598 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x598 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x59C "DOC0EXPD3303,"
hexmask.long.word 0x59C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x59C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x59C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x59C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x59C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x59C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x59C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x59C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x59C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A0 "DOC0EXPD3304,"
hexmask.long.word 0x5A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A4 "DOC0EXPD3305,"
hexmask.long.word 0x5A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A8 "DOC0EXPD3306,"
hexmask.long.word 0x5A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5AC "DOC0EXPD3307,"
hexmask.long.word 0x5AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B0 "DOC0EXPD3308,"
hexmask.long.word 0x5B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B4 "DOC0EXPD3309,"
hexmask.long.word 0x5B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B8 "DOC0EXPD3310,"
hexmask.long.word 0x5B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5BC "DOC0EXPD3311,"
hexmask.long.word 0x5BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C0 "DOC0EXPD3312,"
hexmask.long.word 0x5C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C4 "DOC0EXPD3313,"
hexmask.long.word 0x5C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C8 "DOC0EXPD3314,"
hexmask.long.word 0x5C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5CC "DOC0EXPD3315,"
hexmask.long.word 0x5CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D0 "DOC0EXPD3316,"
hexmask.long.word 0x5D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D4 "DOC0EXPD3317,"
hexmask.long.word 0x5D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D8 "DOC0EXPD3318,"
hexmask.long.word 0x5D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5DC "DOC0EXPD3319,"
hexmask.long.word 0x5DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E0 "DOC0EXPD3320,"
hexmask.long.word 0x5E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E4 "DOC0EXPD3321,"
hexmask.long.word 0x5E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E8 "DOC0EXPD3322,"
hexmask.long.word 0x5E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5EC "DOC0EXPD3323,"
hexmask.long.word 0x5EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F0 "DOC0EXPD3324,"
hexmask.long.word 0x5F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F4 "DOC0EXPD3325,"
hexmask.long.word 0x5F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F8 "DOC0EXPD3326,"
hexmask.long.word 0x5F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5FC "DOC0EXPD3327,"
hexmask.long.word 0x5FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x600 "DOC0EXPD3328,"
hexmask.long.word 0x600 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x600 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x600 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x600 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x600 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x600 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x600 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x600 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x600 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x604 "DOC0EXPD3329,"
hexmask.long.word 0x604 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x604 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x604 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x604 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x604 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x604 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x604 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x604 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x604 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x608 "DOC0EXPD3330,"
hexmask.long.word 0x608 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x608 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x608 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x608 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x608 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x608 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x608 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x608 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x608 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x60C "DOC0EXPD3331,"
hexmask.long.word 0x60C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x60C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x60C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x60C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x60C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x60C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x60C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x60C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x60C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x610 "DOC0EXPD3332,"
hexmask.long.word 0x610 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x610 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x610 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x610 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x610 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x610 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x610 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x610 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x610 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x614 "DOC0EXPD3333,"
hexmask.long.word 0x614 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x614 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x614 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x614 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x614 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x614 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x614 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x614 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x614 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x618 "DOC0EXPD3334,"
hexmask.long.word 0x618 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x618 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x618 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x618 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x618 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x618 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x618 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x618 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x618 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x61C "DOC0EXPD3335,"
hexmask.long.word 0x61C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x61C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x61C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x61C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x61C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x61C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x61C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x61C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x61C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x620 "DOC0EXPD3336,"
hexmask.long.word 0x620 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x620 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x620 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x620 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x620 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x620 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x620 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x620 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x620 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x624 "DOC0EXPD3337,"
hexmask.long.word 0x624 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x624 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x624 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x624 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x624 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x624 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x624 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x624 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x624 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x628 "DOC0EXPD3338,"
hexmask.long.word 0x628 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x628 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x628 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x628 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x628 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x628 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x628 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x628 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x628 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x62C "DOC0EXPD3339,"
hexmask.long.word 0x62C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x62C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x62C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x62C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x62C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x62C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x62C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x62C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x62C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x630 "DOC0EXPD3340,"
hexmask.long.word 0x630 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x630 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x630 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x630 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x630 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x630 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x630 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x630 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x630 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x634 "DOC0EXPD3341,"
hexmask.long.word 0x634 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x634 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x634 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x634 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x634 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x634 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x634 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x634 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x634 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x638 "DOC0EXPD3342,"
hexmask.long.word 0x638 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x638 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x638 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x638 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x638 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x638 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x638 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x638 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x638 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x63C "DOC0EXPD3343,"
hexmask.long.word 0x63C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x63C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x63C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x63C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x63C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x63C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x63C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x63C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x63C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x640 "DOC0EXPD3344,"
hexmask.long.word 0x640 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x640 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x640 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x640 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x640 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x640 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x640 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x640 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x640 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x644 "DOC0EXPD3345,"
hexmask.long.word 0x644 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x644 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x644 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x644 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x644 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x644 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x644 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x644 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x644 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x648 "DOC0EXPD3346,"
hexmask.long.word 0x648 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x648 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x648 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x648 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x648 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x648 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x648 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x648 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x648 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x64C "DOC0EXPD3347,"
hexmask.long.word 0x64C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x64C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x64C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x64C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x64C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x64C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x64C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x64C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x64C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x650 "DOC0EXPD3348,"
hexmask.long.word 0x650 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x650 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x650 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x650 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x650 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x650 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x650 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x650 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x650 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x654 "DOC0EXPD3349,"
hexmask.long.word 0x654 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x654 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x654 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x654 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x654 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x654 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x654 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x654 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x654 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x658 "DOC0EXPD3350,"
hexmask.long.word 0x658 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x658 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x658 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x658 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x658 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x658 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x658 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x658 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x658 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x65C "DOC0EXPD3351,"
hexmask.long.word 0x65C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x65C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x65C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x65C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x65C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x65C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x65C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x65C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x65C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x660 "DOC0EXPD3352,"
hexmask.long.word 0x660 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x660 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x660 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x660 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x660 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x660 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x660 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x660 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x660 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x664 "DOC0EXPD3353,"
hexmask.long.word 0x664 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x664 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x664 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x664 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x664 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x664 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x664 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x664 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x664 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x668 "DOC0EXPD3354,"
hexmask.long.word 0x668 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x668 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x668 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x668 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x668 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x668 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x668 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x668 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x668 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x66C "DOC0EXPD3355,"
hexmask.long.word 0x66C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x66C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x66C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x66C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x66C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x66C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x66C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x66C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x66C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x670 "DOC0EXPD3356,"
hexmask.long.word 0x670 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x670 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x670 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x670 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x670 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x670 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x670 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x670 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x670 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x674 "DOC0EXPD3357,"
hexmask.long.word 0x674 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x674 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x674 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x674 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x674 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x674 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x674 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x674 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x674 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x678 "DOC0EXPD3358,"
hexmask.long.word 0x678 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x678 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x678 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x678 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x678 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x678 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x678 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x678 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x678 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x67C "DOC0EXPD3359,"
hexmask.long.word 0x67C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x67C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x67C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x67C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x67C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x67C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x67C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x67C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x67C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x680 "DOC0EXPD3360,"
hexmask.long.word 0x680 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x680 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x680 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x680 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x680 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x680 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x680 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x680 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x680 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x684 "DOC0EXPD3361,"
hexmask.long.word 0x684 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x684 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x684 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x684 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x684 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x684 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x684 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x684 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x684 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x688 "DOC0EXPD3362,"
hexmask.long.word 0x688 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x688 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x688 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x688 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x688 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x688 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x688 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x688 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x688 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x68C "DOC0EXPD3363,"
hexmask.long.word 0x68C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x68C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x68C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x68C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x68C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x68C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x68C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x68C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x68C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x690 "DOC0EXPD3364,"
hexmask.long.word 0x690 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x690 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x690 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x690 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x690 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x690 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x690 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x690 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x690 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x694 "DOC0EXPD3365,"
hexmask.long.word 0x694 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x694 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x694 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x694 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x694 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x694 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x694 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x694 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x694 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x698 "DOC0EXPD3366,"
hexmask.long.word 0x698 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x698 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x698 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x698 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x698 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x698 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x698 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x698 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x698 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x69C "DOC0EXPD3367,"
hexmask.long.word 0x69C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x69C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x69C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x69C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x69C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x69C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x69C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x69C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x69C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A0 "DOC0EXPD3368,"
hexmask.long.word 0x6A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A4 "DOC0EXPD3369,"
hexmask.long.word 0x6A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A8 "DOC0EXPD3370,"
hexmask.long.word 0x6A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6AC "DOC0EXPD3371,"
hexmask.long.word 0x6AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B0 "DOC0EXPD3372,"
hexmask.long.word 0x6B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B4 "DOC0EXPD3373,"
hexmask.long.word 0x6B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B8 "DOC0EXPD3374,"
hexmask.long.word 0x6B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6BC "DOC0EXPD3375,"
hexmask.long.word 0x6BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C0 "DOC0EXPD3376,"
hexmask.long.word 0x6C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C4 "DOC0EXPD3377,"
hexmask.long.word 0x6C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C8 "DOC0EXPD3378,"
hexmask.long.word 0x6C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6CC "DOC0EXPD3379,"
hexmask.long.word 0x6CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D0 "DOC0EXPD3380,"
hexmask.long.word 0x6D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D4 "DOC0EXPD3381,"
hexmask.long.word 0x6D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D8 "DOC0EXPD3382,"
hexmask.long.word 0x6D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6DC "DOC0EXPD3383,"
hexmask.long.word 0x6DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E0 "DOC0EXPD3384,"
hexmask.long.word 0x6E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E4 "DOC0EXPD3385,"
hexmask.long.word 0x6E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E8 "DOC0EXPD3386,"
hexmask.long.word 0x6E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6EC "DOC0EXPD3387,"
hexmask.long.word 0x6EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F0 "DOC0EXPD3388,"
hexmask.long.word 0x6F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F4 "DOC0EXPD3389,"
hexmask.long.word 0x6F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F8 "DOC0EXPD3390,"
hexmask.long.word 0x6F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6FC "DOC0EXPD3391,"
hexmask.long.word 0x6FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x700 "DOC0EXPD3392,"
hexmask.long.word 0x700 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x700 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x700 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x700 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x700 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x700 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x700 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x700 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x700 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x704 "DOC0EXPD3393,"
hexmask.long.word 0x704 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x704 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x704 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x704 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x704 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x704 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x704 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x704 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x704 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x708 "DOC0EXPD3394,"
hexmask.long.word 0x708 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x708 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x708 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x708 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x708 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x708 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x708 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x708 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x708 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x70C "DOC0EXPD3395,"
hexmask.long.word 0x70C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x70C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x70C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x70C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x70C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x70C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x70C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x70C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x70C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x710 "DOC0EXPD3396,"
hexmask.long.word 0x710 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x710 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x710 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x710 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x710 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x710 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x710 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x710 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x710 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x714 "DOC0EXPD3397,"
hexmask.long.word 0x714 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x714 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x714 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x714 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x714 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x714 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x714 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x714 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x714 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x718 "DOC0EXPD3398,"
hexmask.long.word 0x718 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x718 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x718 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x718 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x718 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x718 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x718 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x718 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x718 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x71C "DOC0EXPD3399,"
hexmask.long.word 0x71C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x71C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x71C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x71C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x71C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x71C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x71C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x71C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x71C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x720 "DOC0EXPD3400,"
hexmask.long.word 0x720 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x720 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x720 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x720 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x720 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x720 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x720 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x720 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x720 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x724 "DOC0EXPD3401,"
hexmask.long.word 0x724 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x724 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x724 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x724 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x724 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x724 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x724 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x724 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x724 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x728 "DOC0EXPD3402,"
hexmask.long.word 0x728 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x728 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x728 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x728 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x728 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x728 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x728 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x728 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x728 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x72C "DOC0EXPD3403,"
hexmask.long.word 0x72C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x72C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x72C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x72C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x72C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x72C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x72C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x72C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x72C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x730 "DOC0EXPD3404,"
hexmask.long.word 0x730 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x730 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x730 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x730 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x730 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x730 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x730 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x730 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x730 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x734 "DOC0EXPD3405,"
hexmask.long.word 0x734 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x734 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x734 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x734 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x734 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x734 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x734 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x734 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x734 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x738 "DOC0EXPD3406,"
hexmask.long.word 0x738 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x738 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x738 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x738 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x738 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x738 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x738 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x738 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x738 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x73C "DOC0EXPD3407,"
hexmask.long.word 0x73C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x73C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x73C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x73C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x73C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x73C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x73C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x73C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x73C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x740 "DOC0EXPD3408,"
hexmask.long.word 0x740 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x740 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x740 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x740 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x740 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x740 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x740 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x740 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x740 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x744 "DOC0EXPD3409,"
hexmask.long.word 0x744 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x744 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x744 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x744 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x744 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x744 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x744 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x744 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x744 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x748 "DOC0EXPD3410,"
hexmask.long.word 0x748 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x748 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x748 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x748 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x748 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x748 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x748 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x748 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x748 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x74C "DOC0EXPD3411,"
hexmask.long.word 0x74C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x74C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x74C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x74C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x74C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x74C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x74C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x74C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x74C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x750 "DOC0EXPD3412,"
hexmask.long.word 0x750 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x750 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x750 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x750 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x750 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x750 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x750 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x750 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x750 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x754 "DOC0EXPD3413,"
hexmask.long.word 0x754 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x754 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x754 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x754 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x754 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x754 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x754 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x754 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x754 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x758 "DOC0EXPD3414,"
hexmask.long.word 0x758 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x758 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x758 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x758 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x758 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x758 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x758 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x758 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x758 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x75C "DOC0EXPD3415,"
hexmask.long.word 0x75C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x75C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x75C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x75C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x75C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x75C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x75C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x75C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x75C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x760 "DOC0EXPD3416,"
hexmask.long.word 0x760 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x760 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x760 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x760 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x760 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x760 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x760 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x760 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x760 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x764 "DOC0EXPD3417,"
hexmask.long.word 0x764 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x764 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x764 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x764 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x764 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x764 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x764 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x764 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x764 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x768 "DOC0EXPD3418,"
hexmask.long.word 0x768 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x768 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x768 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x768 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x768 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x768 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x768 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x768 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x768 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x76C "DOC0EXPD3419,"
hexmask.long.word 0x76C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x76C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x76C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x76C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x76C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x76C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x76C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x76C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x76C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x770 "DOC0EXPD3420,"
hexmask.long.word 0x770 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x770 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x770 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x770 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x770 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x770 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x770 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x770 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x770 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x774 "DOC0EXPD3421,"
hexmask.long.word 0x774 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x774 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x774 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x774 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x774 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x774 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x774 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x774 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x774 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x778 "DOC0EXPD3422,"
hexmask.long.word 0x778 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x778 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x778 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x778 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x778 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x778 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x778 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x778 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x778 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x77C "DOC0EXPD3423,"
hexmask.long.word 0x77C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x77C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x77C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x77C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x77C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x77C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x77C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x77C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x77C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x780 "DOC0EXPD3424,"
hexmask.long.word 0x780 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x780 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x780 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x780 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x780 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x780 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x780 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x780 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x780 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x784 "DOC0EXPD3425,"
hexmask.long.word 0x784 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x784 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x784 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x784 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x784 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x784 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x784 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x784 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x784 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x788 "DOC0EXPD3426,"
hexmask.long.word 0x788 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x788 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x788 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x788 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x788 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x788 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x788 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x788 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x788 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x78C "DOC0EXPD3427,"
hexmask.long.word 0x78C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x78C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x78C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x78C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x78C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x78C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x78C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x78C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x78C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x790 "DOC0EXPD3428,"
hexmask.long.word 0x790 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x790 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x790 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x790 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x790 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x790 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x790 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x790 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x790 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x794 "DOC0EXPD3429,"
hexmask.long.word 0x794 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x794 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x794 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x794 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x794 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x794 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x794 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x794 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x794 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x798 "DOC0EXPD3430,"
hexmask.long.word 0x798 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x798 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x798 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x798 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x798 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x798 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x798 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x798 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x798 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x79C "DOC0EXPD3431,"
hexmask.long.word 0x79C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x79C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x79C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x79C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x79C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x79C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x79C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x79C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x79C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A0 "DOC0EXPD3432,"
hexmask.long.word 0x7A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A4 "DOC0EXPD3433,"
hexmask.long.word 0x7A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A8 "DOC0EXPD3434,"
hexmask.long.word 0x7A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7AC "DOC0EXPD3435,"
hexmask.long.word 0x7AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B0 "DOC0EXPD3436,"
hexmask.long.word 0x7B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B4 "DOC0EXPD3437,"
hexmask.long.word 0x7B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B8 "DOC0EXPD3438,"
hexmask.long.word 0x7B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7BC "DOC0EXPD3439,"
hexmask.long.word 0x7BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C0 "DOC0EXPD3440,"
hexmask.long.word 0x7C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C4 "DOC0EXPD3441,"
hexmask.long.word 0x7C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C8 "DOC0EXPD3442,"
hexmask.long.word 0x7C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7CC "DOC0EXPD3443,"
hexmask.long.word 0x7CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D0 "DOC0EXPD3444,"
hexmask.long.word 0x7D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D4 "DOC0EXPD3445,"
hexmask.long.word 0x7D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D8 "DOC0EXPD3446,"
hexmask.long.word 0x7D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7DC "DOC0EXPD3447,"
hexmask.long.word 0x7DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E0 "DOC0EXPD3448,"
hexmask.long.word 0x7E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E4 "DOC0EXPD3449,"
hexmask.long.word 0x7E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E8 "DOC0EXPD3450,"
hexmask.long.word 0x7E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7EC "DOC0EXPD3451,"
hexmask.long.word 0x7EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F0 "DOC0EXPD3452,"
hexmask.long.word 0x7F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F4 "DOC0EXPD3453,"
hexmask.long.word 0x7F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F8 "DOC0EXPD3454,"
hexmask.long.word 0x7F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7FC "DOC0EXPD3455,"
hexmask.long.word 0x7FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x800 "DOC0EXPD3456,"
hexmask.long.word 0x800 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x800 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x800 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x800 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x800 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x800 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x800 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x800 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x800 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x804 "DOC0EXPD3457,"
hexmask.long.word 0x804 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x804 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x804 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x804 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x804 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x804 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x804 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x804 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x804 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x808 "DOC0EXPD3458,"
hexmask.long.word 0x808 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x808 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x808 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x808 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x808 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x808 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x808 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x808 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x808 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x80C "DOC0EXPD3459,"
hexmask.long.word 0x80C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x80C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x80C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x80C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x80C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x80C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x80C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x80C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x80C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x810 "DOC0EXPD3460,"
hexmask.long.word 0x810 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x810 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x810 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x810 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x810 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x810 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x810 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x810 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x810 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x814 "DOC0EXPD3461,"
hexmask.long.word 0x814 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x814 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x814 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x814 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x814 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x814 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x814 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x814 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x814 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x818 "DOC0EXPD3462,"
hexmask.long.word 0x818 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x818 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x818 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x818 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x818 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x818 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x818 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x818 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x818 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x81C "DOC0EXPD3463,"
hexmask.long.word 0x81C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x81C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x81C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x81C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x81C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x81C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x81C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x81C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x81C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x820 "DOC0EXPD3464,"
hexmask.long.word 0x820 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x820 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x820 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x820 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x820 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x820 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x820 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x820 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x820 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x824 "DOC0EXPD3465,"
hexmask.long.word 0x824 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x824 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x824 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x824 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x824 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x824 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x824 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x824 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x824 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x828 "DOC0EXPD3466,"
hexmask.long.word 0x828 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x828 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x828 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x828 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x828 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x828 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x828 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x828 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x828 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x82C "DOC0EXPD3467,"
hexmask.long.word 0x82C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x82C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x82C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x82C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x82C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x82C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x82C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x82C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x82C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x830 "DOC0EXPD3468,"
hexmask.long.word 0x830 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x830 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x830 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x830 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x830 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x830 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x830 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x830 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x830 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x834 "DOC0EXPD3469,"
hexmask.long.word 0x834 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x834 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x834 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x834 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x834 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x834 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x834 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x834 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x834 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x838 "DOC0EXPD3470,"
hexmask.long.word 0x838 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x838 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x838 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x838 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x838 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x838 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x838 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x838 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x838 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x83C "DOC0EXPD3471,"
hexmask.long.word 0x83C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x83C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x83C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x83C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x83C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x83C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x83C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x83C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x83C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x840 "DOC0EXPD3472,"
hexmask.long.word 0x840 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x840 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x840 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x840 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x840 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x840 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x840 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x840 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x840 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x844 "DOC0EXPD3473,"
hexmask.long.word 0x844 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x844 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x844 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x844 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x844 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x844 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x844 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x844 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x844 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x848 "DOC0EXPD3474,"
hexmask.long.word 0x848 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x848 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x848 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x848 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x848 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x848 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x848 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x848 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x848 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x84C "DOC0EXPD3475,"
hexmask.long.word 0x84C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x84C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x84C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x84C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x84C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x84C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x84C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x84C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x84C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x850 "DOC0EXPD3476,"
hexmask.long.word 0x850 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x850 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x850 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x850 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x850 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x850 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x850 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x850 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x850 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x854 "DOC0EXPD3477,"
hexmask.long.word 0x854 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x854 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x854 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x854 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x854 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x854 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x854 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x854 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x854 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x858 "DOC0EXPD3478,"
hexmask.long.word 0x858 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x858 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x858 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x858 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x858 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x858 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x858 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x858 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x858 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x85C "DOC0EXPD3479,"
hexmask.long.word 0x85C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x85C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x85C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x85C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x85C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x85C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x85C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x85C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x85C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x860 "DOC0EXPD3480,"
hexmask.long.word 0x860 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x860 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x860 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x860 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x860 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x860 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x860 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x860 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x860 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x864 "DOC0EXPD3481,"
hexmask.long.word 0x864 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x864 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x864 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x864 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x864 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x864 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x864 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x864 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x864 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x868 "DOC0EXPD3482,"
hexmask.long.word 0x868 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x868 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x868 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x868 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x868 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x868 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x868 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x868 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x868 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x86C "DOC0EXPD3483,"
hexmask.long.word 0x86C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x86C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x86C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x86C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x86C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x86C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x86C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x86C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x86C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x870 "DOC0EXPD3484,"
hexmask.long.word 0x870 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x870 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x870 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x870 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x870 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x870 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x870 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x870 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x870 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x874 "DOC0EXPD3485,"
hexmask.long.word 0x874 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x874 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x874 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x874 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x874 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x874 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x874 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x874 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x874 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x878 "DOC0EXPD3486,"
hexmask.long.word 0x878 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x878 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x878 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x878 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x878 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x878 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x878 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x878 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x878 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x87C "DOC0EXPD3487,"
hexmask.long.word 0x87C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x87C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x87C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x87C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x87C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x87C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x87C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x87C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x87C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x880 "DOC0EXPD3488,"
hexmask.long.word 0x880 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x880 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x880 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x880 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x880 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x880 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x880 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x880 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x880 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x884 "DOC0EXPD3489,"
hexmask.long.word 0x884 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x884 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x884 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x884 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x884 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x884 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x884 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x884 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x884 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x888 "DOC0EXPD3490,"
hexmask.long.word 0x888 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x888 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x888 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x888 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x888 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x888 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x888 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x888 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x888 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x88C "DOC0EXPD3491,"
hexmask.long.word 0x88C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x88C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x88C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x88C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x88C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x88C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x88C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x88C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x88C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x890 "DOC0EXPD3492,"
hexmask.long.word 0x890 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x890 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x890 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x890 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x890 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x890 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x890 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x890 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x890 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x894 "DOC0EXPD3493,"
hexmask.long.word 0x894 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x894 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x894 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x894 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x894 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x894 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x894 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x894 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x894 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x898 "DOC0EXPD3494,"
hexmask.long.word 0x898 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x898 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x898 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x898 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x898 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x898 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x898 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x898 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x898 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x89C "DOC0EXPD3495,"
hexmask.long.word 0x89C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x89C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x89C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x89C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x89C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x89C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x89C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x89C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x89C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A0 "DOC0EXPD3496,"
hexmask.long.word 0x8A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A4 "DOC0EXPD3497,"
hexmask.long.word 0x8A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A8 "DOC0EXPD3498,"
hexmask.long.word 0x8A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8AC "DOC0EXPD3499,"
hexmask.long.word 0x8AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B0 "DOC0EXPD3500,"
hexmask.long.word 0x8B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B4 "DOC0EXPD3501,"
hexmask.long.word 0x8B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B8 "DOC0EXPD3502,"
hexmask.long.word 0x8B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8BC "DOC0EXPD3503,"
hexmask.long.word 0x8BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C0 "DOC0EXPD3504,"
hexmask.long.word 0x8C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C4 "DOC0EXPD3505,"
hexmask.long.word 0x8C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C8 "DOC0EXPD3506,"
hexmask.long.word 0x8C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8CC "DOC0EXPD3507,"
hexmask.long.word 0x8CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D0 "DOC0EXPD3508,"
hexmask.long.word 0x8D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D4 "DOC0EXPD3509,"
hexmask.long.word 0x8D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D8 "DOC0EXPD3510,"
hexmask.long.word 0x8D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8DC "DOC0EXPD3511,"
hexmask.long.word 0x8DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E0 "DOC0EXPD3512,"
hexmask.long.word 0x8E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E4 "DOC0EXPD3513,"
hexmask.long.word 0x8E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E8 "DOC0EXPD3514,"
hexmask.long.word 0x8E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8EC "DOC0EXPD3515,"
hexmask.long.word 0x8EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F0 "DOC0EXPD3516,"
hexmask.long.word 0x8F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F4 "DOC0EXPD3517,"
hexmask.long.word 0x8F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F8 "DOC0EXPD3518,"
hexmask.long.word 0x8F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8FC "DOC0EXPD3519,"
hexmask.long.word 0x8FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x900 "DOC0EXPD3520,"
hexmask.long.word 0x900 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x900 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x900 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x900 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x900 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x900 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x900 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x900 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x900 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x904 "DOC0EXPD3521,"
hexmask.long.word 0x904 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x904 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x904 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x904 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x904 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x904 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x904 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x904 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x904 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x908 "DOC0EXPD3522,"
hexmask.long.word 0x908 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x908 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x908 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x908 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x908 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x908 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x908 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x908 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x908 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x90C "DOC0EXPD3523,"
hexmask.long.word 0x90C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x90C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x90C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x90C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x90C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x90C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x90C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x90C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x90C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x910 "DOC0EXPD3524,"
hexmask.long.word 0x910 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x910 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x910 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x910 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x910 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x910 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x910 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x910 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x910 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x914 "DOC0EXPD3525,"
hexmask.long.word 0x914 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x914 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x914 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x914 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x914 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x914 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x914 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x914 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x914 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x918 "DOC0EXPD3526,"
hexmask.long.word 0x918 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x918 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x918 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x918 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x918 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x918 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x918 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x918 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x918 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x91C "DOC0EXPD3527,"
hexmask.long.word 0x91C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x91C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x91C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x91C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x91C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x91C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x91C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x91C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x91C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x920 "DOC0EXPD3528,"
hexmask.long.word 0x920 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x920 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x920 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x920 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x920 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x920 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x920 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x920 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x920 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x924 "DOC0EXPD3529,"
hexmask.long.word 0x924 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x924 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x924 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x924 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x924 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x924 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x924 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x924 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x924 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x928 "DOC0EXPD3530,"
hexmask.long.word 0x928 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x928 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x928 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x928 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x928 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x928 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x928 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x928 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x928 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x92C "DOC0EXPD3531,"
hexmask.long.word 0x92C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x92C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x92C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x92C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x92C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x92C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x92C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x92C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x92C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x930 "DOC0EXPD3532,"
hexmask.long.word 0x930 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x930 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x930 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x930 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x930 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x930 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x930 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x930 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x930 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x934 "DOC0EXPD3533,"
hexmask.long.word 0x934 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x934 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x934 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x934 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x934 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x934 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x934 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x934 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x934 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x938 "DOC0EXPD3534,"
hexmask.long.word 0x938 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x938 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x938 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x938 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x938 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x938 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x938 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x938 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x938 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x93C "DOC0EXPD3535,"
hexmask.long.word 0x93C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x93C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x93C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x93C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x93C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x93C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x93C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x93C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x93C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x940 "DOC0EXPD3536,"
hexmask.long.word 0x940 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x940 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x940 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x940 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x940 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x940 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x940 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x940 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x940 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x944 "DOC0EXPD3537,"
hexmask.long.word 0x944 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x944 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x944 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x944 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x944 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x944 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x944 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x944 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x944 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x948 "DOC0EXPD3538,"
hexmask.long.word 0x948 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x948 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x948 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x948 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x948 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x948 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x948 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x948 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x948 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x94C "DOC0EXPD3539,"
hexmask.long.word 0x94C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x94C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x94C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x94C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x94C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x94C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x94C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x94C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x94C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x950 "DOC0EXPD3540,"
hexmask.long.word 0x950 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x950 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x950 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x950 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x950 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x950 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x950 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x950 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x950 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x954 "DOC0EXPD3541,"
hexmask.long.word 0x954 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x954 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x954 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x954 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x954 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x954 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x954 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x954 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x954 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x958 "DOC0EXPD3542,"
hexmask.long.word 0x958 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x958 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x958 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x958 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x958 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x958 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x958 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x958 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x958 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x95C "DOC0EXPD3543,"
hexmask.long.word 0x95C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x95C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x95C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x95C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x95C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x95C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x95C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x95C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x95C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x960 "DOC0EXPD3544,"
hexmask.long.word 0x960 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x960 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x960 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x960 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x960 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x960 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x960 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x960 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x960 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x964 "DOC0EXPD3545,"
hexmask.long.word 0x964 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x964 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x964 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x964 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x964 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x964 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x964 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x964 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x964 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x968 "DOC0EXPD3546,"
hexmask.long.word 0x968 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x968 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x968 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x968 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x968 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x968 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x968 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x968 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x968 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x96C "DOC0EXPD3547,"
hexmask.long.word 0x96C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x96C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x96C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x96C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x96C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x96C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x96C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x96C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x96C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x970 "DOC0EXPD3548,"
hexmask.long.word 0x970 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x970 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x970 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x970 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x970 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x970 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x970 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x970 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x970 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x974 "DOC0EXPD3549,"
hexmask.long.word 0x974 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x974 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x974 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x974 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x974 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x974 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x974 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x974 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x974 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x978 "DOC0EXPD3550,"
hexmask.long.word 0x978 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x978 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x978 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x978 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x978 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x978 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x978 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x978 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x978 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x97C "DOC0EXPD3551,"
hexmask.long.word 0x97C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x97C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x97C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x97C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x97C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x97C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x97C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x97C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x97C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x980 "DOC0EXPD3552,"
hexmask.long.word 0x980 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x980 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x980 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x980 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x980 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x980 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x980 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x980 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x980 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x984 "DOC0EXPD3553,"
hexmask.long.word 0x984 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x984 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x984 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x984 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x984 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x984 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x984 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x984 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x984 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x988 "DOC0EXPD3554,"
hexmask.long.word 0x988 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x988 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x988 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x988 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x988 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x988 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x988 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x988 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x988 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x98C "DOC0EXPD3555,"
hexmask.long.word 0x98C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x98C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x98C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x98C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x98C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x98C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x98C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x98C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x98C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x990 "DOC0EXPD3556,"
hexmask.long.word 0x990 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x990 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x990 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x990 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x990 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x990 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x990 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x990 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x990 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x994 "DOC0EXPD3557,"
hexmask.long.word 0x994 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x994 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x994 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x994 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x994 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x994 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x994 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x994 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x994 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x998 "DOC0EXPD3558,"
hexmask.long.word 0x998 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x998 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x998 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x998 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x998 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x998 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x998 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x998 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x998 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x99C "DOC0EXPD3559,"
hexmask.long.word 0x99C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x99C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x99C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x99C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x99C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x99C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x99C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x99C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x99C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A0 "DOC0EXPD3560,"
hexmask.long.word 0x9A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A4 "DOC0EXPD3561,"
hexmask.long.word 0x9A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A8 "DOC0EXPD3562,"
hexmask.long.word 0x9A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9AC "DOC0EXPD3563,"
hexmask.long.word 0x9AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B0 "DOC0EXPD3564,"
hexmask.long.word 0x9B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B4 "DOC0EXPD3565,"
hexmask.long.word 0x9B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B8 "DOC0EXPD3566,"
hexmask.long.word 0x9B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9BC "DOC0EXPD3567,"
hexmask.long.word 0x9BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C0 "DOC0EXPD3568,"
hexmask.long.word 0x9C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C4 "DOC0EXPD3569,"
hexmask.long.word 0x9C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C8 "DOC0EXPD3570,"
hexmask.long.word 0x9C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9CC "DOC0EXPD3571,"
hexmask.long.word 0x9CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D0 "DOC0EXPD3572,"
hexmask.long.word 0x9D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D4 "DOC0EXPD3573,"
hexmask.long.word 0x9D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D8 "DOC0EXPD3574,"
hexmask.long.word 0x9D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9DC "DOC0EXPD3575,"
hexmask.long.word 0x9DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E0 "DOC0EXPD3576,"
hexmask.long.word 0x9E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E4 "DOC0EXPD3577,"
hexmask.long.word 0x9E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E8 "DOC0EXPD3578,"
hexmask.long.word 0x9E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9EC "DOC0EXPD3579,"
hexmask.long.word 0x9EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F0 "DOC0EXPD3580,"
hexmask.long.word 0x9F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F4 "DOC0EXPD3581,"
hexmask.long.word 0x9F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F8 "DOC0EXPD3582,"
hexmask.long.word 0x9F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9FC "DOC0EXPD3583,"
hexmask.long.word 0x9FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA00 "DOC0EXPD3584,"
hexmask.long.word 0xA00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA04 "DOC0EXPD3585,"
hexmask.long.word 0xA04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA08 "DOC0EXPD3586,"
hexmask.long.word 0xA08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA0C "DOC0EXPD3587,"
hexmask.long.word 0xA0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA10 "DOC0EXPD3588,"
hexmask.long.word 0xA10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA14 "DOC0EXPD3589,"
hexmask.long.word 0xA14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA18 "DOC0EXPD3590,"
hexmask.long.word 0xA18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA1C "DOC0EXPD3591,"
hexmask.long.word 0xA1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA20 "DOC0EXPD3592,"
hexmask.long.word 0xA20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA24 "DOC0EXPD3593,"
hexmask.long.word 0xA24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA28 "DOC0EXPD3594,"
hexmask.long.word 0xA28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA2C "DOC0EXPD3595,"
hexmask.long.word 0xA2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA30 "DOC0EXPD3596,"
hexmask.long.word 0xA30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA34 "DOC0EXPD3597,"
hexmask.long.word 0xA34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA38 "DOC0EXPD3598,"
hexmask.long.word 0xA38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA3C "DOC0EXPD3599,"
hexmask.long.word 0xA3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA40 "DOC0EXPD3600,"
hexmask.long.word 0xA40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA44 "DOC0EXPD3601,"
hexmask.long.word 0xA44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA48 "DOC0EXPD3602,"
hexmask.long.word 0xA48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA4C "DOC0EXPD3603,"
hexmask.long.word 0xA4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA50 "DOC0EXPD3604,"
hexmask.long.word 0xA50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA54 "DOC0EXPD3605,"
hexmask.long.word 0xA54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA58 "DOC0EXPD3606,"
hexmask.long.word 0xA58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA5C "DOC0EXPD3607,"
hexmask.long.word 0xA5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA60 "DOC0EXPD3608,"
hexmask.long.word 0xA60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA64 "DOC0EXPD3609,"
hexmask.long.word 0xA64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA68 "DOC0EXPD3610,"
hexmask.long.word 0xA68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA6C "DOC0EXPD3611,"
hexmask.long.word 0xA6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA70 "DOC0EXPD3612,"
hexmask.long.word 0xA70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA74 "DOC0EXPD3613,"
hexmask.long.word 0xA74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA78 "DOC0EXPD3614,"
hexmask.long.word 0xA78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA7C "DOC0EXPD3615,"
hexmask.long.word 0xA7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA80 "DOC0EXPD3616,"
hexmask.long.word 0xA80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA84 "DOC0EXPD3617,"
hexmask.long.word 0xA84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA88 "DOC0EXPD3618,"
hexmask.long.word 0xA88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA8C "DOC0EXPD3619,"
hexmask.long.word 0xA8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA90 "DOC0EXPD3620,"
hexmask.long.word 0xA90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA94 "DOC0EXPD3621,"
hexmask.long.word 0xA94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA98 "DOC0EXPD3622,"
hexmask.long.word 0xA98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA9C "DOC0EXPD3623,"
hexmask.long.word 0xA9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA0 "DOC0EXPD3624,"
hexmask.long.word 0xAA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA4 "DOC0EXPD3625,"
hexmask.long.word 0xAA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA8 "DOC0EXPD3626,"
hexmask.long.word 0xAA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAAC "DOC0EXPD3627,"
hexmask.long.word 0xAAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB0 "DOC0EXPD3628,"
hexmask.long.word 0xAB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB4 "DOC0EXPD3629,"
hexmask.long.word 0xAB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB8 "DOC0EXPD3630,"
hexmask.long.word 0xAB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xABC "DOC0EXPD3631,"
hexmask.long.word 0xABC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xABC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xABC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xABC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xABC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xABC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xABC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xABC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xABC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC0 "DOC0EXPD3632,"
hexmask.long.word 0xAC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC4 "DOC0EXPD3633,"
hexmask.long.word 0xAC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC8 "DOC0EXPD3634,"
hexmask.long.word 0xAC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xACC "DOC0EXPD3635,"
hexmask.long.word 0xACC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xACC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xACC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xACC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xACC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xACC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xACC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xACC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xACC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD0 "DOC0EXPD3636,"
hexmask.long.word 0xAD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD4 "DOC0EXPD3637,"
hexmask.long.word 0xAD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD8 "DOC0EXPD3638,"
hexmask.long.word 0xAD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xADC "DOC0EXPD3639,"
hexmask.long.word 0xADC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xADC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xADC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xADC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xADC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xADC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xADC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xADC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xADC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE0 "DOC0EXPD3640,"
hexmask.long.word 0xAE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE4 "DOC0EXPD3641,"
hexmask.long.word 0xAE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE8 "DOC0EXPD3642,"
hexmask.long.word 0xAE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAEC "DOC0EXPD3643,"
hexmask.long.word 0xAEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF0 "DOC0EXPD3644,"
hexmask.long.word 0xAF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF4 "DOC0EXPD3645,"
hexmask.long.word 0xAF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF8 "DOC0EXPD3646,"
hexmask.long.word 0xAF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAFC "DOC0EXPD3647,"
hexmask.long.word 0xAFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB00 "DOC0EXPD3648,"
hexmask.long.word 0xB00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB04 "DOC0EXPD3649,"
hexmask.long.word 0xB04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB08 "DOC0EXPD3650,"
hexmask.long.word 0xB08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB0C "DOC0EXPD3651,"
hexmask.long.word 0xB0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB10 "DOC0EXPD3652,"
hexmask.long.word 0xB10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB14 "DOC0EXPD3653,"
hexmask.long.word 0xB14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB18 "DOC0EXPD3654,"
hexmask.long.word 0xB18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB1C "DOC0EXPD3655,"
hexmask.long.word 0xB1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB20 "DOC0EXPD3656,"
hexmask.long.word 0xB20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB24 "DOC0EXPD3657,"
hexmask.long.word 0xB24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB28 "DOC0EXPD3658,"
hexmask.long.word 0xB28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB2C "DOC0EXPD3659,"
hexmask.long.word 0xB2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB30 "DOC0EXPD3660,"
hexmask.long.word 0xB30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB34 "DOC0EXPD3661,"
hexmask.long.word 0xB34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB38 "DOC0EXPD3662,"
hexmask.long.word 0xB38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB3C "DOC0EXPD3663,"
hexmask.long.word 0xB3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB40 "DOC0EXPD3664,"
hexmask.long.word 0xB40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB44 "DOC0EXPD3665,"
hexmask.long.word 0xB44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB48 "DOC0EXPD3666,"
hexmask.long.word 0xB48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB4C "DOC0EXPD3667,"
hexmask.long.word 0xB4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB50 "DOC0EXPD3668,"
hexmask.long.word 0xB50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB54 "DOC0EXPD3669,"
hexmask.long.word 0xB54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB58 "DOC0EXPD3670,"
hexmask.long.word 0xB58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB5C "DOC0EXPD3671,"
hexmask.long.word 0xB5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB60 "DOC0EXPD3672,"
hexmask.long.word 0xB60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB64 "DOC0EXPD3673,"
hexmask.long.word 0xB64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB68 "DOC0EXPD3674,"
hexmask.long.word 0xB68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB6C "DOC0EXPD3675,"
hexmask.long.word 0xB6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB70 "DOC0EXPD3676,"
hexmask.long.word 0xB70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB74 "DOC0EXPD3677,"
hexmask.long.word 0xB74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB78 "DOC0EXPD3678,"
hexmask.long.word 0xB78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB7C "DOC0EXPD3679,"
hexmask.long.word 0xB7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB80 "DOC0EXPD3680,"
hexmask.long.word 0xB80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB84 "DOC0EXPD3681,"
hexmask.long.word 0xB84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB88 "DOC0EXPD3682,"
hexmask.long.word 0xB88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB8C "DOC0EXPD3683,"
hexmask.long.word 0xB8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB90 "DOC0EXPD3684,"
hexmask.long.word 0xB90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB94 "DOC0EXPD3685,"
hexmask.long.word 0xB94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB98 "DOC0EXPD3686,"
hexmask.long.word 0xB98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB9C "DOC0EXPD3687,"
hexmask.long.word 0xB9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA0 "DOC0EXPD3688,"
hexmask.long.word 0xBA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA4 "DOC0EXPD3689,"
hexmask.long.word 0xBA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA8 "DOC0EXPD3690,"
hexmask.long.word 0xBA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBAC "DOC0EXPD3691,"
hexmask.long.word 0xBAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB0 "DOC0EXPD3692,"
hexmask.long.word 0xBB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB4 "DOC0EXPD3693,"
hexmask.long.word 0xBB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB8 "DOC0EXPD3694,"
hexmask.long.word 0xBB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBBC "DOC0EXPD3695,"
hexmask.long.word 0xBBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC0 "DOC0EXPD3696,"
hexmask.long.word 0xBC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC4 "DOC0EXPD3697,"
hexmask.long.word 0xBC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC8 "DOC0EXPD3698,"
hexmask.long.word 0xBC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBCC "DOC0EXPD3699,"
hexmask.long.word 0xBCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD0 "DOC0EXPD3700,"
hexmask.long.word 0xBD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD4 "DOC0EXPD3701,"
hexmask.long.word 0xBD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD8 "DOC0EXPD3702,"
hexmask.long.word 0xBD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBDC "DOC0EXPD3703,"
hexmask.long.word 0xBDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE0 "DOC0EXPD3704,"
hexmask.long.word 0xBE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE4 "DOC0EXPD3705,"
hexmask.long.word 0xBE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE8 "DOC0EXPD3706,"
hexmask.long.word 0xBE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBEC "DOC0EXPD3707,"
hexmask.long.word 0xBEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF0 "DOC0EXPD3708,"
hexmask.long.word 0xBF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF4 "DOC0EXPD3709,"
hexmask.long.word 0xBF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF8 "DOC0EXPD3710,"
hexmask.long.word 0xBF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBFC "DOC0EXPD3711,"
hexmask.long.word 0xBFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC00 "DOC0EXPD3712,"
hexmask.long.word 0xC00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC04 "DOC0EXPD3713,"
hexmask.long.word 0xC04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC08 "DOC0EXPD3714,"
hexmask.long.word 0xC08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC0C "DOC0EXPD3715,"
hexmask.long.word 0xC0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC10 "DOC0EXPD3716,"
hexmask.long.word 0xC10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC14 "DOC0EXPD3717,"
hexmask.long.word 0xC14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC18 "DOC0EXPD3718,"
hexmask.long.word 0xC18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC1C "DOC0EXPD3719,"
hexmask.long.word 0xC1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC20 "DOC0EXPD3720,"
hexmask.long.word 0xC20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC24 "DOC0EXPD3721,"
hexmask.long.word 0xC24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC28 "DOC0EXPD3722,"
hexmask.long.word 0xC28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC2C "DOC0EXPD3723,"
hexmask.long.word 0xC2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC30 "DOC0EXPD3724,"
hexmask.long.word 0xC30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC34 "DOC0EXPD3725,"
hexmask.long.word 0xC34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC38 "DOC0EXPD3726,"
hexmask.long.word 0xC38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC3C "DOC0EXPD3727,"
hexmask.long.word 0xC3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC40 "DOC0EXPD3728,"
hexmask.long.word 0xC40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC44 "DOC0EXPD3729,"
hexmask.long.word 0xC44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC48 "DOC0EXPD3730,"
hexmask.long.word 0xC48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC4C "DOC0EXPD3731,"
hexmask.long.word 0xC4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC50 "DOC0EXPD3732,"
hexmask.long.word 0xC50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC54 "DOC0EXPD3733,"
hexmask.long.word 0xC54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC58 "DOC0EXPD3734,"
hexmask.long.word 0xC58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC5C "DOC0EXPD3735,"
hexmask.long.word 0xC5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC60 "DOC0EXPD3736,"
hexmask.long.word 0xC60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC64 "DOC0EXPD3737,"
hexmask.long.word 0xC64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC68 "DOC0EXPD3738,"
hexmask.long.word 0xC68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC6C "DOC0EXPD3739,"
hexmask.long.word 0xC6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC70 "DOC0EXPD3740,"
hexmask.long.word 0xC70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC74 "DOC0EXPD3741,"
hexmask.long.word 0xC74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC78 "DOC0EXPD3742,"
hexmask.long.word 0xC78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC7C "DOC0EXPD3743,"
hexmask.long.word 0xC7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC80 "DOC0EXPD3744,"
hexmask.long.word 0xC80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC84 "DOC0EXPD3745,"
hexmask.long.word 0xC84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC88 "DOC0EXPD3746,"
hexmask.long.word 0xC88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC8C "DOC0EXPD3747,"
hexmask.long.word 0xC8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC90 "DOC0EXPD3748,"
hexmask.long.word 0xC90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC94 "DOC0EXPD3749,"
hexmask.long.word 0xC94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC98 "DOC0EXPD3750,"
hexmask.long.word 0xC98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC9C "DOC0EXPD3751,"
hexmask.long.word 0xC9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA0 "DOC0EXPD3752,"
hexmask.long.word 0xCA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA4 "DOC0EXPD3753,"
hexmask.long.word 0xCA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA8 "DOC0EXPD3754,"
hexmask.long.word 0xCA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCAC "DOC0EXPD3755,"
hexmask.long.word 0xCAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB0 "DOC0EXPD3756,"
hexmask.long.word 0xCB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB4 "DOC0EXPD3757,"
hexmask.long.word 0xCB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB8 "DOC0EXPD3758,"
hexmask.long.word 0xCB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCBC "DOC0EXPD3759,"
hexmask.long.word 0xCBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC0 "DOC0EXPD3760,"
hexmask.long.word 0xCC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC4 "DOC0EXPD3761,"
hexmask.long.word 0xCC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC8 "DOC0EXPD3762,"
hexmask.long.word 0xCC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCCC "DOC0EXPD3763,"
hexmask.long.word 0xCCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD0 "DOC0EXPD3764,"
hexmask.long.word 0xCD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD4 "DOC0EXPD3765,"
hexmask.long.word 0xCD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD8 "DOC0EXPD3766,"
hexmask.long.word 0xCD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCDC "DOC0EXPD3767,"
hexmask.long.word 0xCDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE0 "DOC0EXPD3768,"
hexmask.long.word 0xCE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE4 "DOC0EXPD3769,"
hexmask.long.word 0xCE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE8 "DOC0EXPD3770,"
hexmask.long.word 0xCE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCEC "DOC0EXPD3771,"
hexmask.long.word 0xCEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF0 "DOC0EXPD3772,"
hexmask.long.word 0xCF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF4 "DOC0EXPD3773,"
hexmask.long.word 0xCF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF8 "DOC0EXPD3774,"
hexmask.long.word 0xCF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCFC "DOC0EXPD3775,"
hexmask.long.word 0xCFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD00 "DOC0EXPD3776,"
hexmask.long.word 0xD00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD04 "DOC0EXPD3777,"
hexmask.long.word 0xD04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD08 "DOC0EXPD3778,"
hexmask.long.word 0xD08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD0C "DOC0EXPD3779,"
hexmask.long.word 0xD0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD10 "DOC0EXPD3780,"
hexmask.long.word 0xD10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD14 "DOC0EXPD3781,"
hexmask.long.word 0xD14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD18 "DOC0EXPD3782,"
hexmask.long.word 0xD18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD1C "DOC0EXPD3783,"
hexmask.long.word 0xD1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD20 "DOC0EXPD3784,"
hexmask.long.word 0xD20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD24 "DOC0EXPD3785,"
hexmask.long.word 0xD24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD28 "DOC0EXPD3786,"
hexmask.long.word 0xD28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD2C "DOC0EXPD3787,"
hexmask.long.word 0xD2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD30 "DOC0EXPD3788,"
hexmask.long.word 0xD30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD34 "DOC0EXPD3789,"
hexmask.long.word 0xD34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD38 "DOC0EXPD3790,"
hexmask.long.word 0xD38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD3C "DOC0EXPD3791,"
hexmask.long.word 0xD3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD40 "DOC0EXPD3792,"
hexmask.long.word 0xD40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD44 "DOC0EXPD3793,"
hexmask.long.word 0xD44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD48 "DOC0EXPD3794,"
hexmask.long.word 0xD48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD4C "DOC0EXPD3795,"
hexmask.long.word 0xD4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD50 "DOC0EXPD3796,"
hexmask.long.word 0xD50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD54 "DOC0EXPD3797,"
hexmask.long.word 0xD54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD58 "DOC0EXPD3798,"
hexmask.long.word 0xD58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD5C "DOC0EXPD3799,"
hexmask.long.word 0xD5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD60 "DOC0EXPD3800,"
hexmask.long.word 0xD60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD64 "DOC0EXPD3801,"
hexmask.long.word 0xD64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD68 "DOC0EXPD3802,"
hexmask.long.word 0xD68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD6C "DOC0EXPD3803,"
hexmask.long.word 0xD6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD70 "DOC0EXPD3804,"
hexmask.long.word 0xD70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD74 "DOC0EXPD3805,"
hexmask.long.word 0xD74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD78 "DOC0EXPD3806,"
hexmask.long.word 0xD78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD7C "DOC0EXPD3807,"
hexmask.long.word 0xD7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD80 "DOC0EXPD3808,"
hexmask.long.word 0xD80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD84 "DOC0EXPD3809,"
hexmask.long.word 0xD84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD88 "DOC0EXPD3810,"
hexmask.long.word 0xD88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD8C "DOC0EXPD3811,"
hexmask.long.word 0xD8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD90 "DOC0EXPD3812,"
hexmask.long.word 0xD90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD94 "DOC0EXPD3813,"
hexmask.long.word 0xD94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD98 "DOC0EXPD3814,"
hexmask.long.word 0xD98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD9C "DOC0EXPD3815,"
hexmask.long.word 0xD9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA0 "DOC0EXPD3816,"
hexmask.long.word 0xDA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA4 "DOC0EXPD3817,"
hexmask.long.word 0xDA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA8 "DOC0EXPD3818,"
hexmask.long.word 0xDA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDAC "DOC0EXPD3819,"
hexmask.long.word 0xDAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB0 "DOC0EXPD3820,"
hexmask.long.word 0xDB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB4 "DOC0EXPD3821,"
hexmask.long.word 0xDB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB8 "DOC0EXPD3822,"
hexmask.long.word 0xDB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDBC "DOC0EXPD3823,"
hexmask.long.word 0xDBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC0 "DOC0EXPD3824,"
hexmask.long.word 0xDC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC4 "DOC0EXPD3825,"
hexmask.long.word 0xDC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC8 "DOC0EXPD3826,"
hexmask.long.word 0xDC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDCC "DOC0EXPD3827,"
hexmask.long.word 0xDCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD0 "DOC0EXPD3828,"
hexmask.long.word 0xDD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD4 "DOC0EXPD3829,"
hexmask.long.word 0xDD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD8 "DOC0EXPD3830,"
hexmask.long.word 0xDD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDDC "DOC0EXPD3831,"
hexmask.long.word 0xDDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE0 "DOC0EXPD3832,"
hexmask.long.word 0xDE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE4 "DOC0EXPD3833,"
hexmask.long.word 0xDE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE8 "DOC0EXPD3834,"
hexmask.long.word 0xDE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDEC "DOC0EXPD3835,"
hexmask.long.word 0xDEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF0 "DOC0EXPD3836,"
hexmask.long.word 0xDF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF4 "DOC0EXPD3837,"
hexmask.long.word 0xDF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF8 "DOC0EXPD3838,"
hexmask.long.word 0xDF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDFC "DOC0EXPD3839,"
hexmask.long.word 0xDFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE00 "DOC0EXPD3840,"
hexmask.long.word 0xE00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE04 "DOC0EXPD3841,"
hexmask.long.word 0xE04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE08 "DOC0EXPD3842,"
hexmask.long.word 0xE08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE0C "DOC0EXPD3843,"
hexmask.long.word 0xE0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE10 "DOC0EXPD3844,"
hexmask.long.word 0xE10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE14 "DOC0EXPD3845,"
hexmask.long.word 0xE14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE18 "DOC0EXPD3846,"
hexmask.long.word 0xE18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE1C "DOC0EXPD3847,"
hexmask.long.word 0xE1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE20 "DOC0EXPD3848,"
hexmask.long.word 0xE20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE24 "DOC0EXPD3849,"
hexmask.long.word 0xE24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE28 "DOC0EXPD3850,"
hexmask.long.word 0xE28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE2C "DOC0EXPD3851,"
hexmask.long.word 0xE2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE30 "DOC0EXPD3852,"
hexmask.long.word 0xE30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE34 "DOC0EXPD3853,"
hexmask.long.word 0xE34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE38 "DOC0EXPD3854,"
hexmask.long.word 0xE38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE3C "DOC0EXPD3855,"
hexmask.long.word 0xE3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE40 "DOC0EXPD3856,"
hexmask.long.word 0xE40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE44 "DOC0EXPD3857,"
hexmask.long.word 0xE44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE48 "DOC0EXPD3858,"
hexmask.long.word 0xE48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE4C "DOC0EXPD3859,"
hexmask.long.word 0xE4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE50 "DOC0EXPD3860,"
hexmask.long.word 0xE50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE54 "DOC0EXPD3861,"
hexmask.long.word 0xE54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE58 "DOC0EXPD3862,"
hexmask.long.word 0xE58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE5C "DOC0EXPD3863,"
hexmask.long.word 0xE5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE60 "DOC0EXPD3864,"
hexmask.long.word 0xE60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE64 "DOC0EXPD3865,"
hexmask.long.word 0xE64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE68 "DOC0EXPD3866,"
hexmask.long.word 0xE68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE6C "DOC0EXPD3867,"
hexmask.long.word 0xE6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE70 "DOC0EXPD3868,"
hexmask.long.word 0xE70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE74 "DOC0EXPD3869,"
hexmask.long.word 0xE74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE78 "DOC0EXPD3870,"
hexmask.long.word 0xE78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE7C "DOC0EXPD3871,"
hexmask.long.word 0xE7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE80 "DOC0EXPD3872,"
hexmask.long.word 0xE80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE84 "DOC0EXPD3873,"
hexmask.long.word 0xE84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE88 "DOC0EXPD3874,"
hexmask.long.word 0xE88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE8C "DOC0EXPD3875,"
hexmask.long.word 0xE8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE90 "DOC0EXPD3876,"
hexmask.long.word 0xE90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE94 "DOC0EXPD3877,"
hexmask.long.word 0xE94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE98 "DOC0EXPD3878,"
hexmask.long.word 0xE98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE9C "DOC0EXPD3879,"
hexmask.long.word 0xE9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA0 "DOC0EXPD3880,"
hexmask.long.word 0xEA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA4 "DOC0EXPD3881,"
hexmask.long.word 0xEA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA8 "DOC0EXPD3882,"
hexmask.long.word 0xEA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEAC "DOC0EXPD3883,"
hexmask.long.word 0xEAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB0 "DOC0EXPD3884,"
hexmask.long.word 0xEB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB4 "DOC0EXPD3885,"
hexmask.long.word 0xEB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB8 "DOC0EXPD3886,"
hexmask.long.word 0xEB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEBC "DOC0EXPD3887,"
hexmask.long.word 0xEBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC0 "DOC0EXPD3888,"
hexmask.long.word 0xEC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC4 "DOC0EXPD3889,"
hexmask.long.word 0xEC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC8 "DOC0EXPD3890,"
hexmask.long.word 0xEC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xECC "DOC0EXPD3891,"
hexmask.long.word 0xECC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xECC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xECC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xECC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xECC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xECC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xECC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xECC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xECC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED0 "DOC0EXPD3892,"
hexmask.long.word 0xED0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED4 "DOC0EXPD3893,"
hexmask.long.word 0xED4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED8 "DOC0EXPD3894,"
hexmask.long.word 0xED8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEDC "DOC0EXPD3895,"
hexmask.long.word 0xEDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE0 "DOC0EXPD3896,"
hexmask.long.word 0xEE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE4 "DOC0EXPD3897,"
hexmask.long.word 0xEE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE8 "DOC0EXPD3898,"
hexmask.long.word 0xEE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEEC "DOC0EXPD3899,"
hexmask.long.word 0xEEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF0 "DOC0EXPD3900,"
hexmask.long.word 0xEF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF4 "DOC0EXPD3901,"
hexmask.long.word 0xEF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF8 "DOC0EXPD3902,"
hexmask.long.word 0xEF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEFC "DOC0EXPD3903,"
hexmask.long.word 0xEFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF00 "DOC0EXPD3904,"
hexmask.long.word 0xF00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF04 "DOC0EXPD3905,"
hexmask.long.word 0xF04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF08 "DOC0EXPD3906,"
hexmask.long.word 0xF08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF0C "DOC0EXPD3907,"
hexmask.long.word 0xF0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF10 "DOC0EXPD3908,"
hexmask.long.word 0xF10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF14 "DOC0EXPD3909,"
hexmask.long.word 0xF14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF18 "DOC0EXPD3910,"
hexmask.long.word 0xF18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF1C "DOC0EXPD3911,"
hexmask.long.word 0xF1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF20 "DOC0EXPD3912,"
hexmask.long.word 0xF20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF24 "DOC0EXPD3913,"
hexmask.long.word 0xF24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF28 "DOC0EXPD3914,"
hexmask.long.word 0xF28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF2C "DOC0EXPD3915,"
hexmask.long.word 0xF2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF30 "DOC0EXPD3916,"
hexmask.long.word 0xF30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF34 "DOC0EXPD3917,"
hexmask.long.word 0xF34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF38 "DOC0EXPD3918,"
hexmask.long.word 0xF38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF3C "DOC0EXPD3919,"
hexmask.long.word 0xF3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF40 "DOC0EXPD3920,"
hexmask.long.word 0xF40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF44 "DOC0EXPD3921,"
hexmask.long.word 0xF44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF48 "DOC0EXPD3922,"
hexmask.long.word 0xF48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF4C "DOC0EXPD3923,"
hexmask.long.word 0xF4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF50 "DOC0EXPD3924,"
hexmask.long.word 0xF50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF54 "DOC0EXPD3925,"
hexmask.long.word 0xF54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF58 "DOC0EXPD3926,"
hexmask.long.word 0xF58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF5C "DOC0EXPD3927,"
hexmask.long.word 0xF5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF60 "DOC0EXPD3928,"
hexmask.long.word 0xF60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF64 "DOC0EXPD3929,"
hexmask.long.word 0xF64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF68 "DOC0EXPD3930,"
hexmask.long.word 0xF68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF6C "DOC0EXPD3931,"
hexmask.long.word 0xF6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF70 "DOC0EXPD3932,"
hexmask.long.word 0xF70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF74 "DOC0EXPD3933,"
hexmask.long.word 0xF74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF78 "DOC0EXPD3934,"
hexmask.long.word 0xF78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF7C "DOC0EXPD3935,"
hexmask.long.word 0xF7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF80 "DOC0EXPD3936,"
hexmask.long.word 0xF80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF84 "DOC0EXPD3937,"
hexmask.long.word 0xF84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF88 "DOC0EXPD3938,"
hexmask.long.word 0xF88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF8C "DOC0EXPD3939,"
hexmask.long.word 0xF8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF90 "DOC0EXPD3940,"
hexmask.long.word 0xF90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF94 "DOC0EXPD3941,"
hexmask.long.word 0xF94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF98 "DOC0EXPD3942,"
hexmask.long.word 0xF98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF9C "DOC0EXPD3943,"
hexmask.long.word 0xF9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA0 "DOC0EXPD3944,"
hexmask.long.word 0xFA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA4 "DOC0EXPD3945,"
hexmask.long.word 0xFA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA8 "DOC0EXPD3946,"
hexmask.long.word 0xFA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFAC "DOC0EXPD3947,"
hexmask.long.word 0xFAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB0 "DOC0EXPD3948,"
hexmask.long.word 0xFB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB4 "DOC0EXPD3949,"
hexmask.long.word 0xFB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB8 "DOC0EXPD3950,"
hexmask.long.word 0xFB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFBC "DOC0EXPD3951,"
hexmask.long.word 0xFBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC0 "DOC0EXPD3952,"
hexmask.long.word 0xFC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC4 "DOC0EXPD3953,"
hexmask.long.word 0xFC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC8 "DOC0EXPD3954,"
hexmask.long.word 0xFC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFCC "DOC0EXPD3955,"
hexmask.long.word 0xFCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD0 "DOC0EXPD3956,"
hexmask.long.word 0xFD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD4 "DOC0EXPD3957,"
hexmask.long.word 0xFD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD8 "DOC0EXPD3958,"
hexmask.long.word 0xFD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFDC "DOC0EXPD3959,"
hexmask.long.word 0xFDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE0 "DOC0EXPD3960,"
hexmask.long.word 0xFE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE4 "DOC0EXPD3961,"
hexmask.long.word 0xFE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE8 "DOC0EXPD3962,"
hexmask.long.word 0xFE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFEC "DOC0EXPD3963,"
hexmask.long.word 0xFEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF0 "DOC0EXPD3964,"
hexmask.long.word 0xFF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF4 "DOC0EXPD3965,"
hexmask.long.word 0xFF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF8 "DOC0EXPD3966,"
hexmask.long.word 0xFF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFFC "DOC0EXPD3967,"
hexmask.long.word 0xFFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
group.long 0x4100++0x1FF
line.long 0x0 "DOC0EXPD3968,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4 "DOC0EXPD3969,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8 "DOC0EXPD3970,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC "DOC0EXPD3971,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x10 "DOC0EXPD3972,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x14 "DOC0EXPD3973,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x18 "DOC0EXPD3974,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C "DOC0EXPD3975,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x20 "DOC0EXPD3976,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x24 "DOC0EXPD3977,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x28 "DOC0EXPD3978,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C "DOC0EXPD3979,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x30 "DOC0EXPD3980,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x34 "DOC0EXPD3981,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x38 "DOC0EXPD3982,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C "DOC0EXPD3983,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x40 "DOC0EXPD3984,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x44 "DOC0EXPD3985,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x48 "DOC0EXPD3986,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C "DOC0EXPD3987,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x50 "DOC0EXPD3988,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x54 "DOC0EXPD3989,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x58 "DOC0EXPD3990,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C "DOC0EXPD3991,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x60 "DOC0EXPD3992,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x64 "DOC0EXPD3993,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x68 "DOC0EXPD3994,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C "DOC0EXPD3995,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x70 "DOC0EXPD3996,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x74 "DOC0EXPD3997,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x78 "DOC0EXPD3998,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C "DOC0EXPD3999,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x80 "DOC0EXPD4000,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x84 "DOC0EXPD4001,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x88 "DOC0EXPD4002,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C "DOC0EXPD4003,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x90 "DOC0EXPD4004,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x94 "DOC0EXPD4005,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x98 "DOC0EXPD4006,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C "DOC0EXPD4007,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA0 "DOC0EXPD4008,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA4 "DOC0EXPD4009,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA8 "DOC0EXPD4010,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC "DOC0EXPD4011,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB0 "DOC0EXPD4012,"
hexmask.long.word 0xB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB4 "DOC0EXPD4013,"
hexmask.long.word 0xB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB8 "DOC0EXPD4014,"
hexmask.long.word 0xB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC "DOC0EXPD4015,"
hexmask.long.word 0xBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC0 "DOC0EXPD4016,"
hexmask.long.word 0xC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC4 "DOC0EXPD4017,"
hexmask.long.word 0xC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC8 "DOC0EXPD4018,"
hexmask.long.word 0xC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC "DOC0EXPD4019,"
hexmask.long.word 0xCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD0 "DOC0EXPD4020,"
hexmask.long.word 0xD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD4 "DOC0EXPD4021,"
hexmask.long.word 0xD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD8 "DOC0EXPD4022,"
hexmask.long.word 0xD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC "DOC0EXPD4023,"
hexmask.long.word 0xDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE0 "DOC0EXPD4024,"
hexmask.long.word 0xE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE4 "DOC0EXPD4025,"
hexmask.long.word 0xE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE8 "DOC0EXPD4026,"
hexmask.long.word 0xE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC "DOC0EXPD4027,"
hexmask.long.word 0xEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF0 "DOC0EXPD4028,"
hexmask.long.word 0xF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF4 "DOC0EXPD4029,"
hexmask.long.word 0xF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF8 "DOC0EXPD4030,"
hexmask.long.word 0xF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC "DOC0EXPD4031,"
hexmask.long.word 0xFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x100 "DOC0EXPD4032,"
hexmask.long.word 0x100 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x100 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x100 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x100 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x100 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x100 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x100 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x100 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x100 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x104 "DOC0EXPD4033,"
hexmask.long.word 0x104 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x104 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x104 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x104 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x104 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x104 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x104 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x104 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x104 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x108 "DOC0EXPD4034,"
hexmask.long.word 0x108 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x108 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x108 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x108 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x108 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x108 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x108 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x108 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x108 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x10C "DOC0EXPD4035,"
hexmask.long.word 0x10C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x10C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x10C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x10C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x10C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x10C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x10C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x10C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x10C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x110 "DOC0EXPD4036,"
hexmask.long.word 0x110 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x110 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x110 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x110 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x110 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x110 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x110 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x110 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x110 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x114 "DOC0EXPD4037,"
hexmask.long.word 0x114 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x114 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x114 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x114 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x114 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x114 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x114 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x114 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x114 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x118 "DOC0EXPD4038,"
hexmask.long.word 0x118 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x118 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x118 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x118 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x118 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x118 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x118 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x118 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x118 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x11C "DOC0EXPD4039,"
hexmask.long.word 0x11C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x11C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x11C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x11C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x11C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x11C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x11C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x11C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x11C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x120 "DOC0EXPD4040,"
hexmask.long.word 0x120 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x120 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x120 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x120 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x120 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x120 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x120 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x120 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x120 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x124 "DOC0EXPD4041,"
hexmask.long.word 0x124 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x124 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x124 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x124 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x124 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x124 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x124 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x124 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x124 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x128 "DOC0EXPD4042,"
hexmask.long.word 0x128 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x128 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x128 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x128 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x128 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x128 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x128 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x128 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x128 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x12C "DOC0EXPD4043,"
hexmask.long.word 0x12C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x12C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x12C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x12C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x12C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x12C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x12C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x12C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x12C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x130 "DOC0EXPD4044,"
hexmask.long.word 0x130 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x130 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x130 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x130 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x130 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x130 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x130 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x130 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x130 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x134 "DOC0EXPD4045,"
hexmask.long.word 0x134 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x134 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x134 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x134 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x134 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x134 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x134 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x134 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x134 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x138 "DOC0EXPD4046,"
hexmask.long.word 0x138 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x138 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x138 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x138 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x138 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x138 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x138 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x138 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x138 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x13C "DOC0EXPD4047,"
hexmask.long.word 0x13C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x13C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x13C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x13C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x13C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x13C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x13C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x13C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x13C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x140 "DOC0EXPD4048,"
hexmask.long.word 0x140 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x140 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x140 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x140 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x140 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x140 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x140 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x140 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x140 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x144 "DOC0EXPD4049,"
hexmask.long.word 0x144 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x144 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x144 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x144 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x144 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x144 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x144 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x144 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x144 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x148 "DOC0EXPD4050,"
hexmask.long.word 0x148 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x148 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x148 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x148 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x148 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x148 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x148 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x148 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x148 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x14C "DOC0EXPD4051,"
hexmask.long.word 0x14C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x14C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x14C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x14C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x14C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x14C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x14C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x14C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x150 "DOC0EXPD4052,"
hexmask.long.word 0x150 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x150 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x150 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x150 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x150 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x150 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x150 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x150 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x150 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x154 "DOC0EXPD4053,"
hexmask.long.word 0x154 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x154 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x154 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x154 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x154 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x154 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x154 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x154 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x154 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x158 "DOC0EXPD4054,"
hexmask.long.word 0x158 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x158 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x158 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x158 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x158 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x158 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x158 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x158 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x158 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x15C "DOC0EXPD4055,"
hexmask.long.word 0x15C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x15C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x15C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x15C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x15C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x15C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x15C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x15C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x15C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x160 "DOC0EXPD4056,"
hexmask.long.word 0x160 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x160 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x160 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x160 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x160 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x160 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x160 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x160 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x160 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x164 "DOC0EXPD4057,"
hexmask.long.word 0x164 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x164 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x164 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x164 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x164 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x164 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x164 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x164 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x164 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x168 "DOC0EXPD4058,"
hexmask.long.word 0x168 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x168 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x168 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x168 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x168 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x168 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x168 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x168 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x168 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x16C "DOC0EXPD4059,"
hexmask.long.word 0x16C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x16C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x16C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x16C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x16C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x16C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x16C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x16C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x16C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x170 "DOC0EXPD4060,"
hexmask.long.word 0x170 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x170 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x170 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x170 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x170 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x170 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x170 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x170 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x170 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x174 "DOC0EXPD4061,"
hexmask.long.word 0x174 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x174 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x174 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x174 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x174 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x174 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x174 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x174 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x174 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x178 "DOC0EXPD4062,"
hexmask.long.word 0x178 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x178 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x178 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x178 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x178 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x178 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x178 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x178 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x178 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x17C "DOC0EXPD4063,"
hexmask.long.word 0x17C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x17C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x17C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x17C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x17C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x17C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x17C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x17C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x17C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x180 "DOC0EXPD4064,"
hexmask.long.word 0x180 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x180 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x180 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x180 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x180 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x180 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x180 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x180 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x180 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x184 "DOC0EXPD4065,"
hexmask.long.word 0x184 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x184 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x184 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x184 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x184 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x184 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x184 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x184 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x184 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x188 "DOC0EXPD4066,"
hexmask.long.word 0x188 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x188 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x188 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x188 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x188 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x188 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x188 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x188 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x188 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x18C "DOC0EXPD4067,"
hexmask.long.word 0x18C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x18C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x18C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x18C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x18C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x18C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x18C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x18C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x18C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x190 "DOC0EXPD4068,"
hexmask.long.word 0x190 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x190 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x190 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x190 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x190 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x190 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x190 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x190 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x190 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x194 "DOC0EXPD4069,"
hexmask.long.word 0x194 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x194 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x194 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x194 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x194 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x194 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x194 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x194 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x194 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x198 "DOC0EXPD4070,"
hexmask.long.word 0x198 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x198 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x198 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x198 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x198 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x198 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x198 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x198 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x198 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x19C "DOC0EXPD4071,"
hexmask.long.word 0x19C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x19C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x19C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x19C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x19C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x19C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x19C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x19C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x19C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A0 "DOC0EXPD4072,"
hexmask.long.word 0x1A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A4 "DOC0EXPD4073,"
hexmask.long.word 0x1A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A8 "DOC0EXPD4074,"
hexmask.long.word 0x1A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1AC "DOC0EXPD4075,"
hexmask.long.word 0x1AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B0 "DOC0EXPD4076,"
hexmask.long.word 0x1B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B4 "DOC0EXPD4077,"
hexmask.long.word 0x1B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B8 "DOC0EXPD4078,"
hexmask.long.word 0x1B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1BC "DOC0EXPD4079,"
hexmask.long.word 0x1BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C0 "DOC0EXPD4080,"
hexmask.long.word 0x1C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C4 "DOC0EXPD4081,"
hexmask.long.word 0x1C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C8 "DOC0EXPD4082,"
hexmask.long.word 0x1C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1CC "DOC0EXPD4083,"
hexmask.long.word 0x1CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D0 "DOC0EXPD4084,"
hexmask.long.word 0x1D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D4 "DOC0EXPD4085,"
hexmask.long.word 0x1D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D8 "DOC0EXPD4086,"
hexmask.long.word 0x1D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1DC "DOC0EXPD4087,"
hexmask.long.word 0x1DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E0 "DOC0EXPD4088,"
hexmask.long.word 0x1E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E4 "DOC0EXPD4089,"
hexmask.long.word 0x1E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E8 "DOC0EXPD4090,"
hexmask.long.word 0x1E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1EC "DOC0EXPD4091,"
hexmask.long.word 0x1EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F0 "DOC0EXPD4092,"
hexmask.long.word 0x1F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F4 "DOC0EXPD4093,"
hexmask.long.word 0x1F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F8 "DOC0EXPD4094,"
hexmask.long.word 0x1F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1FC "DOC0EXPD4095,"
hexmask.long.word 0x1FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
group.long 0x8300++0xFFF
line.long 0x0 "DOC0EXPD4096,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4 "DOC0EXPD4097,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8 "DOC0EXPD4098,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC "DOC0EXPD4099,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x10 "DOC0EXPD4100,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x14 "DOC0EXPD4101,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x18 "DOC0EXPD4102,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C "DOC0EXPD4103,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x20 "DOC0EXPD4104,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x24 "DOC0EXPD4105,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x28 "DOC0EXPD4106,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C "DOC0EXPD4107,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x30 "DOC0EXPD4108,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x34 "DOC0EXPD4109,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x38 "DOC0EXPD4110,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C "DOC0EXPD4111,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x40 "DOC0EXPD4112,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x44 "DOC0EXPD4113,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x48 "DOC0EXPD4114,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C "DOC0EXPD4115,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x50 "DOC0EXPD4116,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x54 "DOC0EXPD4117,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x58 "DOC0EXPD4118,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C "DOC0EXPD4119,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x60 "DOC0EXPD4120,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x64 "DOC0EXPD4121,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x68 "DOC0EXPD4122,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C "DOC0EXPD4123,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x70 "DOC0EXPD4124,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x74 "DOC0EXPD4125,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x78 "DOC0EXPD4126,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C "DOC0EXPD4127,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x80 "DOC0EXPD4128,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x84 "DOC0EXPD4129,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x88 "DOC0EXPD4130,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C "DOC0EXPD4131,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x90 "DOC0EXPD4132,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x94 "DOC0EXPD4133,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x98 "DOC0EXPD4134,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C "DOC0EXPD4135,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA0 "DOC0EXPD4136,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA4 "DOC0EXPD4137,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA8 "DOC0EXPD4138,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC "DOC0EXPD4139,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB0 "DOC0EXPD4140,"
hexmask.long.word 0xB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB4 "DOC0EXPD4141,"
hexmask.long.word 0xB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB8 "DOC0EXPD4142,"
hexmask.long.word 0xB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC "DOC0EXPD4143,"
hexmask.long.word 0xBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC0 "DOC0EXPD4144,"
hexmask.long.word 0xC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC4 "DOC0EXPD4145,"
hexmask.long.word 0xC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC8 "DOC0EXPD4146,"
hexmask.long.word 0xC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC "DOC0EXPD4147,"
hexmask.long.word 0xCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD0 "DOC0EXPD4148,"
hexmask.long.word 0xD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD4 "DOC0EXPD4149,"
hexmask.long.word 0xD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD8 "DOC0EXPD4150,"
hexmask.long.word 0xD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC "DOC0EXPD4151,"
hexmask.long.word 0xDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE0 "DOC0EXPD4152,"
hexmask.long.word 0xE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE4 "DOC0EXPD4153,"
hexmask.long.word 0xE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE8 "DOC0EXPD4154,"
hexmask.long.word 0xE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC "DOC0EXPD4155,"
hexmask.long.word 0xEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF0 "DOC0EXPD4156,"
hexmask.long.word 0xF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF4 "DOC0EXPD4157,"
hexmask.long.word 0xF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF8 "DOC0EXPD4158,"
hexmask.long.word 0xF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC "DOC0EXPD4159,"
hexmask.long.word 0xFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x100 "DOC0EXPD4160,"
hexmask.long.word 0x100 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x100 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x100 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x100 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x100 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x100 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x100 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x100 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x100 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x104 "DOC0EXPD4161,"
hexmask.long.word 0x104 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x104 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x104 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x104 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x104 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x104 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x104 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x104 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x104 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x108 "DOC0EXPD4162,"
hexmask.long.word 0x108 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x108 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x108 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x108 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x108 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x108 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x108 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x108 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x108 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x10C "DOC0EXPD4163,"
hexmask.long.word 0x10C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x10C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x10C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x10C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x10C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x10C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x10C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x10C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x10C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x110 "DOC0EXPD4164,"
hexmask.long.word 0x110 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x110 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x110 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x110 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x110 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x110 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x110 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x110 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x110 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x114 "DOC0EXPD4165,"
hexmask.long.word 0x114 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x114 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x114 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x114 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x114 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x114 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x114 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x114 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x114 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x118 "DOC0EXPD4166,"
hexmask.long.word 0x118 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x118 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x118 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x118 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x118 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x118 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x118 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x118 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x118 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x11C "DOC0EXPD4167,"
hexmask.long.word 0x11C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x11C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x11C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x11C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x11C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x11C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x11C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x11C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x11C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x120 "DOC0EXPD4168,"
hexmask.long.word 0x120 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x120 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x120 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x120 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x120 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x120 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x120 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x120 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x120 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x124 "DOC0EXPD4169,"
hexmask.long.word 0x124 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x124 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x124 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x124 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x124 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x124 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x124 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x124 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x124 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x128 "DOC0EXPD4170,"
hexmask.long.word 0x128 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x128 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x128 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x128 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x128 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x128 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x128 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x128 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x128 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x12C "DOC0EXPD4171,"
hexmask.long.word 0x12C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x12C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x12C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x12C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x12C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x12C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x12C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x12C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x12C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x130 "DOC0EXPD4172,"
hexmask.long.word 0x130 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x130 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x130 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x130 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x130 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x130 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x130 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x130 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x130 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x134 "DOC0EXPD4173,"
hexmask.long.word 0x134 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x134 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x134 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x134 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x134 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x134 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x134 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x134 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x134 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x138 "DOC0EXPD4174,"
hexmask.long.word 0x138 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x138 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x138 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x138 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x138 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x138 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x138 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x138 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x138 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x13C "DOC0EXPD4175,"
hexmask.long.word 0x13C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x13C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x13C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x13C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x13C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x13C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x13C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x13C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x13C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x140 "DOC0EXPD4176,"
hexmask.long.word 0x140 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x140 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x140 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x140 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x140 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x140 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x140 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x140 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x140 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x144 "DOC0EXPD4177,"
hexmask.long.word 0x144 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x144 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x144 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x144 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x144 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x144 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x144 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x144 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x144 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x148 "DOC0EXPD4178,"
hexmask.long.word 0x148 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x148 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x148 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x148 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x148 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x148 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x148 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x148 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x148 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x14C "DOC0EXPD4179,"
hexmask.long.word 0x14C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x14C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x14C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x14C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x14C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x14C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x14C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x14C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x150 "DOC0EXPD4180,"
hexmask.long.word 0x150 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x150 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x150 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x150 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x150 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x150 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x150 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x150 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x150 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x154 "DOC0EXPD4181,"
hexmask.long.word 0x154 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x154 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x154 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x154 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x154 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x154 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x154 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x154 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x154 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x158 "DOC0EXPD4182,"
hexmask.long.word 0x158 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x158 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x158 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x158 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x158 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x158 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x158 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x158 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x158 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x15C "DOC0EXPD4183,"
hexmask.long.word 0x15C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x15C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x15C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x15C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x15C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x15C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x15C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x15C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x15C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x160 "DOC0EXPD4184,"
hexmask.long.word 0x160 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x160 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x160 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x160 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x160 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x160 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x160 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x160 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x160 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x164 "DOC0EXPD4185,"
hexmask.long.word 0x164 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x164 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x164 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x164 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x164 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x164 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x164 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x164 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x164 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x168 "DOC0EXPD4186,"
hexmask.long.word 0x168 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x168 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x168 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x168 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x168 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x168 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x168 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x168 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x168 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x16C "DOC0EXPD4187,"
hexmask.long.word 0x16C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x16C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x16C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x16C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x16C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x16C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x16C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x16C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x16C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x170 "DOC0EXPD4188,"
hexmask.long.word 0x170 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x170 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x170 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x170 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x170 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x170 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x170 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x170 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x170 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x174 "DOC0EXPD4189,"
hexmask.long.word 0x174 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x174 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x174 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x174 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x174 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x174 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x174 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x174 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x174 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x178 "DOC0EXPD4190,"
hexmask.long.word 0x178 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x178 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x178 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x178 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x178 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x178 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x178 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x178 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x178 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x17C "DOC0EXPD4191,"
hexmask.long.word 0x17C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x17C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x17C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x17C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x17C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x17C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x17C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x17C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x17C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x180 "DOC0EXPD4192,"
hexmask.long.word 0x180 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x180 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x180 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x180 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x180 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x180 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x180 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x180 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x180 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x184 "DOC0EXPD4193,"
hexmask.long.word 0x184 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x184 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x184 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x184 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x184 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x184 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x184 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x184 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x184 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x188 "DOC0EXPD4194,"
hexmask.long.word 0x188 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x188 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x188 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x188 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x188 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x188 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x188 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x188 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x188 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x18C "DOC0EXPD4195,"
hexmask.long.word 0x18C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x18C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x18C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x18C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x18C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x18C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x18C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x18C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x18C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x190 "DOC0EXPD4196,"
hexmask.long.word 0x190 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x190 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x190 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x190 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x190 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x190 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x190 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x190 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x190 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x194 "DOC0EXPD4197,"
hexmask.long.word 0x194 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x194 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x194 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x194 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x194 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x194 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x194 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x194 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x194 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x198 "DOC0EXPD4198,"
hexmask.long.word 0x198 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x198 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x198 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x198 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x198 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x198 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x198 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x198 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x198 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x19C "DOC0EXPD4199,"
hexmask.long.word 0x19C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x19C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x19C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x19C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x19C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x19C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x19C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x19C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x19C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A0 "DOC0EXPD4200,"
hexmask.long.word 0x1A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A4 "DOC0EXPD4201,"
hexmask.long.word 0x1A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A8 "DOC0EXPD4202,"
hexmask.long.word 0x1A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1AC "DOC0EXPD4203,"
hexmask.long.word 0x1AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B0 "DOC0EXPD4204,"
hexmask.long.word 0x1B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B4 "DOC0EXPD4205,"
hexmask.long.word 0x1B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B8 "DOC0EXPD4206,"
hexmask.long.word 0x1B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1BC "DOC0EXPD4207,"
hexmask.long.word 0x1BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C0 "DOC0EXPD4208,"
hexmask.long.word 0x1C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C4 "DOC0EXPD4209,"
hexmask.long.word 0x1C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C8 "DOC0EXPD4210,"
hexmask.long.word 0x1C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1CC "DOC0EXPD4211,"
hexmask.long.word 0x1CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D0 "DOC0EXPD4212,"
hexmask.long.word 0x1D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D4 "DOC0EXPD4213,"
hexmask.long.word 0x1D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D8 "DOC0EXPD4214,"
hexmask.long.word 0x1D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1DC "DOC0EXPD4215,"
hexmask.long.word 0x1DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E0 "DOC0EXPD4216,"
hexmask.long.word 0x1E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E4 "DOC0EXPD4217,"
hexmask.long.word 0x1E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E8 "DOC0EXPD4218,"
hexmask.long.word 0x1E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1EC "DOC0EXPD4219,"
hexmask.long.word 0x1EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F0 "DOC0EXPD4220,"
hexmask.long.word 0x1F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F4 "DOC0EXPD4221,"
hexmask.long.word 0x1F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F8 "DOC0EXPD4222,"
hexmask.long.word 0x1F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1FC "DOC0EXPD4223,"
hexmask.long.word 0x1FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x200 "DOC0EXPD4224,"
hexmask.long.word 0x200 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x200 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x200 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x200 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x200 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x200 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x200 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x200 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x200 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x204 "DOC0EXPD4225,"
hexmask.long.word 0x204 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x204 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x204 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x204 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x204 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x204 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x204 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x204 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x204 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x208 "DOC0EXPD4226,"
hexmask.long.word 0x208 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x208 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x208 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x208 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x208 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x208 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x208 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x208 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x208 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x20C "DOC0EXPD4227,"
hexmask.long.word 0x20C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x20C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x20C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x20C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x20C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x20C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x20C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x20C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x20C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x210 "DOC0EXPD4228,"
hexmask.long.word 0x210 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x210 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x210 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x210 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x210 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x210 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x210 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x210 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x210 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x214 "DOC0EXPD4229,"
hexmask.long.word 0x214 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x214 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x214 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x214 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x214 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x214 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x214 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x214 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x214 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x218 "DOC0EXPD4230,"
hexmask.long.word 0x218 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x218 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x218 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x218 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x218 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x218 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x218 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x218 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x218 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x21C "DOC0EXPD4231,"
hexmask.long.word 0x21C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x21C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x21C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x21C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x21C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x21C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x21C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x21C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x21C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x220 "DOC0EXPD4232,"
hexmask.long.word 0x220 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x220 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x220 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x220 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x220 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x220 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x220 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x220 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x220 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x224 "DOC0EXPD4233,"
hexmask.long.word 0x224 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x224 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x224 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x224 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x224 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x224 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x224 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x224 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x224 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x228 "DOC0EXPD4234,"
hexmask.long.word 0x228 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x228 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x228 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x228 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x228 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x228 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x228 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x228 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x228 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x22C "DOC0EXPD4235,"
hexmask.long.word 0x22C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x22C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x22C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x22C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x22C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x22C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x22C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x22C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x22C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x230 "DOC0EXPD4236,"
hexmask.long.word 0x230 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x230 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x230 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x230 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x230 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x230 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x230 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x230 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x230 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x234 "DOC0EXPD4237,"
hexmask.long.word 0x234 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x234 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x234 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x234 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x234 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x234 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x234 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x234 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x234 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x238 "DOC0EXPD4238,"
hexmask.long.word 0x238 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x238 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x238 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x238 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x238 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x238 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x238 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x238 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x238 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x23C "DOC0EXPD4239,"
hexmask.long.word 0x23C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x23C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x23C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x23C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x23C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x23C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x23C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x23C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x23C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x240 "DOC0EXPD4240,"
hexmask.long.word 0x240 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x240 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x240 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x240 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x240 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x240 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x240 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x240 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x240 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x244 "DOC0EXPD4241,"
hexmask.long.word 0x244 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x244 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x244 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x244 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x244 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x244 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x244 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x244 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x244 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x248 "DOC0EXPD4242,"
hexmask.long.word 0x248 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x248 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x248 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x248 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x248 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x248 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x248 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x248 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x248 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x24C "DOC0EXPD4243,"
hexmask.long.word 0x24C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x24C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x24C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x24C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x24C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x24C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x24C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x24C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x24C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x250 "DOC0EXPD4244,"
hexmask.long.word 0x250 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x250 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x250 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x250 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x250 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x250 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x250 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x250 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x250 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x254 "DOC0EXPD4245,"
hexmask.long.word 0x254 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x254 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x254 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x254 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x254 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x254 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x254 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x254 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x254 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x258 "DOC0EXPD4246,"
hexmask.long.word 0x258 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x258 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x258 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x258 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x258 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x258 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x258 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x258 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x258 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x25C "DOC0EXPD4247,"
hexmask.long.word 0x25C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x25C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x25C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x25C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x25C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x25C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x25C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x25C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x25C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x260 "DOC0EXPD4248,"
hexmask.long.word 0x260 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x260 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x260 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x260 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x260 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x260 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x260 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x260 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x260 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x264 "DOC0EXPD4249,"
hexmask.long.word 0x264 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x264 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x264 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x264 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x264 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x264 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x264 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x264 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x264 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x268 "DOC0EXPD4250,"
hexmask.long.word 0x268 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x268 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x268 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x268 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x268 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x268 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x268 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x268 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x268 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x26C "DOC0EXPD4251,"
hexmask.long.word 0x26C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x26C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x26C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x26C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x26C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x26C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x26C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x26C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x26C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x270 "DOC0EXPD4252,"
hexmask.long.word 0x270 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x270 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x270 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x270 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x270 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x270 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x270 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x270 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x270 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x274 "DOC0EXPD4253,"
hexmask.long.word 0x274 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x274 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x274 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x274 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x274 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x274 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x274 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x274 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x274 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x278 "DOC0EXPD4254,"
hexmask.long.word 0x278 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x278 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x278 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x278 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x278 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x278 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x278 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x278 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x278 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x27C "DOC0EXPD4255,"
hexmask.long.word 0x27C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x27C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x27C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x27C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x27C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x27C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x27C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x27C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x27C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x280 "DOC0EXPD4256,"
hexmask.long.word 0x280 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x280 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x280 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x280 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x280 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x280 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x280 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x280 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x280 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x284 "DOC0EXPD4257,"
hexmask.long.word 0x284 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x284 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x284 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x284 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x284 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x284 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x284 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x284 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x284 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x288 "DOC0EXPD4258,"
hexmask.long.word 0x288 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x288 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x288 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x288 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x288 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x288 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x288 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x288 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x288 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x28C "DOC0EXPD4259,"
hexmask.long.word 0x28C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x28C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x28C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x28C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x28C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x28C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x28C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x28C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x28C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x290 "DOC0EXPD4260,"
hexmask.long.word 0x290 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x290 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x290 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x290 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x290 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x290 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x290 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x290 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x290 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x294 "DOC0EXPD4261,"
hexmask.long.word 0x294 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x294 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x294 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x294 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x294 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x294 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x294 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x294 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x294 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x298 "DOC0EXPD4262,"
hexmask.long.word 0x298 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x298 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x298 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x298 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x298 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x298 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x298 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x298 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x298 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x29C "DOC0EXPD4263,"
hexmask.long.word 0x29C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x29C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x29C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x29C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x29C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x29C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x29C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x29C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x29C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A0 "DOC0EXPD4264,"
hexmask.long.word 0x2A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A4 "DOC0EXPD4265,"
hexmask.long.word 0x2A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A8 "DOC0EXPD4266,"
hexmask.long.word 0x2A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2AC "DOC0EXPD4267,"
hexmask.long.word 0x2AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B0 "DOC0EXPD4268,"
hexmask.long.word 0x2B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B4 "DOC0EXPD4269,"
hexmask.long.word 0x2B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B8 "DOC0EXPD4270,"
hexmask.long.word 0x2B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2BC "DOC0EXPD4271,"
hexmask.long.word 0x2BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C0 "DOC0EXPD4272,"
hexmask.long.word 0x2C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C4 "DOC0EXPD4273,"
hexmask.long.word 0x2C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C8 "DOC0EXPD4274,"
hexmask.long.word 0x2C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2CC "DOC0EXPD4275,"
hexmask.long.word 0x2CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D0 "DOC0EXPD4276,"
hexmask.long.word 0x2D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D4 "DOC0EXPD4277,"
hexmask.long.word 0x2D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D8 "DOC0EXPD4278,"
hexmask.long.word 0x2D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2DC "DOC0EXPD4279,"
hexmask.long.word 0x2DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E0 "DOC0EXPD4280,"
hexmask.long.word 0x2E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E4 "DOC0EXPD4281,"
hexmask.long.word 0x2E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E8 "DOC0EXPD4282,"
hexmask.long.word 0x2E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2EC "DOC0EXPD4283,"
hexmask.long.word 0x2EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F0 "DOC0EXPD4284,"
hexmask.long.word 0x2F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F4 "DOC0EXPD4285,"
hexmask.long.word 0x2F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F8 "DOC0EXPD4286,"
hexmask.long.word 0x2F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2FC "DOC0EXPD4287,"
hexmask.long.word 0x2FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x300 "DOC0EXPD4288,"
hexmask.long.word 0x300 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x300 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x300 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x300 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x300 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x300 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x300 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x300 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x300 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x304 "DOC0EXPD4289,"
hexmask.long.word 0x304 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x304 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x304 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x304 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x304 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x304 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x304 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x304 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x304 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x308 "DOC0EXPD4290,"
hexmask.long.word 0x308 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x308 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x308 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x308 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x308 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x308 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x308 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x308 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x308 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x30C "DOC0EXPD4291,"
hexmask.long.word 0x30C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x30C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x30C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x30C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x30C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x30C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x30C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x30C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x30C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x310 "DOC0EXPD4292,"
hexmask.long.word 0x310 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x310 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x310 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x310 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x310 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x310 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x310 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x310 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x310 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x314 "DOC0EXPD4293,"
hexmask.long.word 0x314 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x314 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x314 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x314 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x314 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x314 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x314 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x314 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x314 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x318 "DOC0EXPD4294,"
hexmask.long.word 0x318 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x318 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x318 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x318 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x318 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x318 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x318 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x318 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x318 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x31C "DOC0EXPD4295,"
hexmask.long.word 0x31C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x31C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x31C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x31C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x31C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x31C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x31C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x31C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x31C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x320 "DOC0EXPD4296,"
hexmask.long.word 0x320 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x320 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x320 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x320 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x320 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x320 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x320 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x320 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x320 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x324 "DOC0EXPD4297,"
hexmask.long.word 0x324 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x324 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x324 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x324 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x324 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x324 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x324 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x324 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x324 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x328 "DOC0EXPD4298,"
hexmask.long.word 0x328 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x328 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x328 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x328 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x328 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x328 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x328 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x328 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x328 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x32C "DOC0EXPD4299,"
hexmask.long.word 0x32C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x32C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x32C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x32C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x32C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x32C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x32C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x32C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x32C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x330 "DOC0EXPD4300,"
hexmask.long.word 0x330 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x330 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x330 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x330 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x330 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x330 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x330 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x330 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x330 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x334 "DOC0EXPD4301,"
hexmask.long.word 0x334 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x334 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x334 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x334 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x334 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x334 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x334 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x334 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x334 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x338 "DOC0EXPD4302,"
hexmask.long.word 0x338 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x338 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x338 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x338 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x338 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x338 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x338 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x338 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x338 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x33C "DOC0EXPD4303,"
hexmask.long.word 0x33C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x33C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x33C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x33C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x33C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x33C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x33C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x33C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x33C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x340 "DOC0EXPD4304,"
hexmask.long.word 0x340 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x340 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x340 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x340 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x340 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x340 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x340 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x340 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x340 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x344 "DOC0EXPD4305,"
hexmask.long.word 0x344 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x344 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x344 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x344 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x344 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x344 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x344 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x344 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x344 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x348 "DOC0EXPD4306,"
hexmask.long.word 0x348 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x348 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x348 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x348 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x348 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x348 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x348 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x348 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x348 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x34C "DOC0EXPD4307,"
hexmask.long.word 0x34C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x34C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x34C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x34C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x34C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x34C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x34C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x34C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x34C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x350 "DOC0EXPD4308,"
hexmask.long.word 0x350 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x350 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x350 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x350 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x350 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x350 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x350 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x350 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x350 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x354 "DOC0EXPD4309,"
hexmask.long.word 0x354 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x354 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x354 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x354 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x354 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x354 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x354 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x354 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x354 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x358 "DOC0EXPD4310,"
hexmask.long.word 0x358 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x358 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x358 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x358 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x358 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x358 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x358 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x358 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x358 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x35C "DOC0EXPD4311,"
hexmask.long.word 0x35C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x35C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x35C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x35C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x35C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x35C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x35C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x35C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x35C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x360 "DOC0EXPD4312,"
hexmask.long.word 0x360 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x360 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x360 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x360 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x360 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x360 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x360 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x360 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x360 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x364 "DOC0EXPD4313,"
hexmask.long.word 0x364 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x364 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x364 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x364 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x364 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x364 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x364 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x364 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x364 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x368 "DOC0EXPD4314,"
hexmask.long.word 0x368 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x368 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x368 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x368 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x368 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x368 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x368 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x368 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x368 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x36C "DOC0EXPD4315,"
hexmask.long.word 0x36C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x36C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x36C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x36C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x36C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x36C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x36C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x36C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x36C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x370 "DOC0EXPD4316,"
hexmask.long.word 0x370 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x370 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x370 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x370 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x370 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x370 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x370 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x370 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x370 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x374 "DOC0EXPD4317,"
hexmask.long.word 0x374 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x374 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x374 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x374 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x374 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x374 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x374 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x374 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x374 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x378 "DOC0EXPD4318,"
hexmask.long.word 0x378 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x378 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x378 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x378 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x378 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x378 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x378 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x378 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x378 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x37C "DOC0EXPD4319,"
hexmask.long.word 0x37C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x37C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x37C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x37C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x37C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x37C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x37C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x37C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x37C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x380 "DOC0EXPD4320,"
hexmask.long.word 0x380 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x380 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x380 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x380 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x380 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x380 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x380 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x380 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x380 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x384 "DOC0EXPD4321,"
hexmask.long.word 0x384 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x384 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x384 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x384 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x384 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x384 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x384 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x384 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x384 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x388 "DOC0EXPD4322,"
hexmask.long.word 0x388 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x388 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x388 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x388 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x388 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x388 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x388 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x388 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x388 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x38C "DOC0EXPD4323,"
hexmask.long.word 0x38C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x38C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x38C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x38C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x38C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x38C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x38C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x38C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x38C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x390 "DOC0EXPD4324,"
hexmask.long.word 0x390 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x390 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x390 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x390 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x390 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x390 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x390 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x390 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x390 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x394 "DOC0EXPD4325,"
hexmask.long.word 0x394 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x394 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x394 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x394 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x394 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x394 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x394 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x394 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x394 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x398 "DOC0EXPD4326,"
hexmask.long.word 0x398 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x398 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x398 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x398 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x398 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x398 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x398 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x398 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x398 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x39C "DOC0EXPD4327,"
hexmask.long.word 0x39C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x39C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x39C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x39C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x39C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x39C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x39C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x39C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x39C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A0 "DOC0EXPD4328,"
hexmask.long.word 0x3A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A4 "DOC0EXPD4329,"
hexmask.long.word 0x3A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A8 "DOC0EXPD4330,"
hexmask.long.word 0x3A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3AC "DOC0EXPD4331,"
hexmask.long.word 0x3AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B0 "DOC0EXPD4332,"
hexmask.long.word 0x3B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B4 "DOC0EXPD4333,"
hexmask.long.word 0x3B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B8 "DOC0EXPD4334,"
hexmask.long.word 0x3B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3BC "DOC0EXPD4335,"
hexmask.long.word 0x3BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C0 "DOC0EXPD4336,"
hexmask.long.word 0x3C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C4 "DOC0EXPD4337,"
hexmask.long.word 0x3C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C8 "DOC0EXPD4338,"
hexmask.long.word 0x3C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3CC "DOC0EXPD4339,"
hexmask.long.word 0x3CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D0 "DOC0EXPD4340,"
hexmask.long.word 0x3D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D4 "DOC0EXPD4341,"
hexmask.long.word 0x3D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D8 "DOC0EXPD4342,"
hexmask.long.word 0x3D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3DC "DOC0EXPD4343,"
hexmask.long.word 0x3DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E0 "DOC0EXPD4344,"
hexmask.long.word 0x3E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E4 "DOC0EXPD4345,"
hexmask.long.word 0x3E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E8 "DOC0EXPD4346,"
hexmask.long.word 0x3E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3EC "DOC0EXPD4347,"
hexmask.long.word 0x3EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F0 "DOC0EXPD4348,"
hexmask.long.word 0x3F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F4 "DOC0EXPD4349,"
hexmask.long.word 0x3F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F8 "DOC0EXPD4350,"
hexmask.long.word 0x3F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3FC "DOC0EXPD4351,"
hexmask.long.word 0x3FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x400 "DOC0EXPD4352,"
hexmask.long.word 0x400 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x400 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x400 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x400 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x400 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x400 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x400 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x400 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x400 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x404 "DOC0EXPD4353,"
hexmask.long.word 0x404 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x404 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x404 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x404 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x404 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x404 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x404 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x404 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x404 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x408 "DOC0EXPD4354,"
hexmask.long.word 0x408 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x408 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x408 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x408 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x408 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x408 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x408 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x408 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x408 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x40C "DOC0EXPD4355,"
hexmask.long.word 0x40C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x40C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x40C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x40C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x40C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x40C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x40C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x40C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x40C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x410 "DOC0EXPD4356,"
hexmask.long.word 0x410 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x410 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x410 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x410 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x410 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x410 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x410 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x410 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x410 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x414 "DOC0EXPD4357,"
hexmask.long.word 0x414 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x414 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x414 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x414 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x414 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x414 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x414 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x414 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x414 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x418 "DOC0EXPD4358,"
hexmask.long.word 0x418 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x418 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x418 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x418 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x418 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x418 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x418 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x418 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x418 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x41C "DOC0EXPD4359,"
hexmask.long.word 0x41C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x41C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x41C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x41C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x41C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x41C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x41C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x41C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x41C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x420 "DOC0EXPD4360,"
hexmask.long.word 0x420 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x420 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x420 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x420 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x420 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x420 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x420 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x420 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x420 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x424 "DOC0EXPD4361,"
hexmask.long.word 0x424 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x424 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x424 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x424 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x424 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x424 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x424 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x424 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x424 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x428 "DOC0EXPD4362,"
hexmask.long.word 0x428 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x428 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x428 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x428 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x428 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x428 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x428 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x428 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x428 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x42C "DOC0EXPD4363,"
hexmask.long.word 0x42C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x42C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x42C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x42C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x42C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x42C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x42C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x42C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x42C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x430 "DOC0EXPD4364,"
hexmask.long.word 0x430 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x430 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x430 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x430 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x430 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x430 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x430 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x430 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x430 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x434 "DOC0EXPD4365,"
hexmask.long.word 0x434 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x434 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x434 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x434 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x434 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x434 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x434 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x434 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x434 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x438 "DOC0EXPD4366,"
hexmask.long.word 0x438 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x438 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x438 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x438 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x438 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x438 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x438 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x438 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x438 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x43C "DOC0EXPD4367,"
hexmask.long.word 0x43C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x43C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x43C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x43C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x43C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x43C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x43C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x43C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x43C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x440 "DOC0EXPD4368,"
hexmask.long.word 0x440 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x440 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x440 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x440 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x440 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x440 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x440 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x440 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x440 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x444 "DOC0EXPD4369,"
hexmask.long.word 0x444 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x444 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x444 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x444 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x444 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x444 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x444 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x444 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x444 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x448 "DOC0EXPD4370,"
hexmask.long.word 0x448 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x448 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x448 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x448 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x448 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x448 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x448 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x448 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x448 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x44C "DOC0EXPD4371,"
hexmask.long.word 0x44C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x44C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x44C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x44C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x44C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x44C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x44C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x44C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x44C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x450 "DOC0EXPD4372,"
hexmask.long.word 0x450 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x450 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x450 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x450 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x450 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x450 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x450 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x450 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x450 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x454 "DOC0EXPD4373,"
hexmask.long.word 0x454 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x454 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x454 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x454 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x454 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x454 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x454 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x454 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x454 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x458 "DOC0EXPD4374,"
hexmask.long.word 0x458 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x458 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x458 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x458 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x458 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x458 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x458 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x458 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x458 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x45C "DOC0EXPD4375,"
hexmask.long.word 0x45C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x45C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x45C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x45C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x45C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x45C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x45C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x45C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x45C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x460 "DOC0EXPD4376,"
hexmask.long.word 0x460 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x460 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x460 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x460 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x460 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x460 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x460 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x460 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x460 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x464 "DOC0EXPD4377,"
hexmask.long.word 0x464 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x464 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x464 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x464 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x464 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x464 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x464 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x464 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x464 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x468 "DOC0EXPD4378,"
hexmask.long.word 0x468 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x468 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x468 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x468 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x468 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x468 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x468 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x468 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x468 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x46C "DOC0EXPD4379,"
hexmask.long.word 0x46C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x46C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x46C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x46C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x46C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x46C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x46C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x46C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x46C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x470 "DOC0EXPD4380,"
hexmask.long.word 0x470 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x470 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x470 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x470 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x470 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x470 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x470 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x470 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x470 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x474 "DOC0EXPD4381,"
hexmask.long.word 0x474 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x474 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x474 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x474 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x474 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x474 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x474 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x474 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x474 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x478 "DOC0EXPD4382,"
hexmask.long.word 0x478 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x478 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x478 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x478 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x478 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x478 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x478 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x478 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x478 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x47C "DOC0EXPD4383,"
hexmask.long.word 0x47C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x47C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x47C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x47C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x47C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x47C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x47C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x47C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x47C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x480 "DOC0EXPD4384,"
hexmask.long.word 0x480 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x480 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x480 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x480 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x480 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x480 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x480 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x480 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x480 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x484 "DOC0EXPD4385,"
hexmask.long.word 0x484 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x484 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x484 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x484 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x484 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x484 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x484 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x484 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x484 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x488 "DOC0EXPD4386,"
hexmask.long.word 0x488 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x488 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x488 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x488 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x488 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x488 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x488 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x488 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x488 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x48C "DOC0EXPD4387,"
hexmask.long.word 0x48C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x48C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x48C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x48C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x48C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x48C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x48C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x48C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x48C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x490 "DOC0EXPD4388,"
hexmask.long.word 0x490 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x490 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x490 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x490 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x490 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x490 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x490 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x490 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x490 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x494 "DOC0EXPD4389,"
hexmask.long.word 0x494 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x494 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x494 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x494 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x494 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x494 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x494 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x494 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x494 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x498 "DOC0EXPD4390,"
hexmask.long.word 0x498 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x498 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x498 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x498 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x498 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x498 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x498 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x498 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x498 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x49C "DOC0EXPD4391,"
hexmask.long.word 0x49C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x49C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x49C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x49C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x49C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x49C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x49C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x49C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x49C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A0 "DOC0EXPD4392,"
hexmask.long.word 0x4A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A4 "DOC0EXPD4393,"
hexmask.long.word 0x4A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A8 "DOC0EXPD4394,"
hexmask.long.word 0x4A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4AC "DOC0EXPD4395,"
hexmask.long.word 0x4AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B0 "DOC0EXPD4396,"
hexmask.long.word 0x4B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B4 "DOC0EXPD4397,"
hexmask.long.word 0x4B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B8 "DOC0EXPD4398,"
hexmask.long.word 0x4B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4BC "DOC0EXPD4399,"
hexmask.long.word 0x4BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C0 "DOC0EXPD4400,"
hexmask.long.word 0x4C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C4 "DOC0EXPD4401,"
hexmask.long.word 0x4C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C8 "DOC0EXPD4402,"
hexmask.long.word 0x4C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4CC "DOC0EXPD4403,"
hexmask.long.word 0x4CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D0 "DOC0EXPD4404,"
hexmask.long.word 0x4D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D4 "DOC0EXPD4405,"
hexmask.long.word 0x4D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D8 "DOC0EXPD4406,"
hexmask.long.word 0x4D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4DC "DOC0EXPD4407,"
hexmask.long.word 0x4DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E0 "DOC0EXPD4408,"
hexmask.long.word 0x4E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E4 "DOC0EXPD4409,"
hexmask.long.word 0x4E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E8 "DOC0EXPD4410,"
hexmask.long.word 0x4E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4EC "DOC0EXPD4411,"
hexmask.long.word 0x4EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F0 "DOC0EXPD4412,"
hexmask.long.word 0x4F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F4 "DOC0EXPD4413,"
hexmask.long.word 0x4F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F8 "DOC0EXPD4414,"
hexmask.long.word 0x4F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4FC "DOC0EXPD4415,"
hexmask.long.word 0x4FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x500 "DOC0EXPD4416,"
hexmask.long.word 0x500 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x500 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x500 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x500 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x500 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x500 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x500 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x500 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x500 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x504 "DOC0EXPD4417,"
hexmask.long.word 0x504 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x504 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x504 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x504 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x504 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x504 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x504 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x504 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x504 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x508 "DOC0EXPD4418,"
hexmask.long.word 0x508 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x508 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x508 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x508 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x508 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x508 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x508 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x508 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x508 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x50C "DOC0EXPD4419,"
hexmask.long.word 0x50C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x50C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x50C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x50C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x50C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x50C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x50C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x50C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x50C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x510 "DOC0EXPD4420,"
hexmask.long.word 0x510 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x510 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x510 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x510 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x510 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x510 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x510 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x510 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x510 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x514 "DOC0EXPD4421,"
hexmask.long.word 0x514 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x514 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x514 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x514 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x514 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x514 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x514 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x514 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x514 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x518 "DOC0EXPD4422,"
hexmask.long.word 0x518 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x518 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x518 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x518 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x518 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x518 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x518 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x518 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x518 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x51C "DOC0EXPD4423,"
hexmask.long.word 0x51C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x51C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x51C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x51C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x51C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x51C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x51C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x51C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x51C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x520 "DOC0EXPD4424,"
hexmask.long.word 0x520 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x520 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x520 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x520 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x520 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x520 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x520 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x520 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x520 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x524 "DOC0EXPD4425,"
hexmask.long.word 0x524 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x524 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x524 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x524 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x524 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x524 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x524 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x524 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x524 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x528 "DOC0EXPD4426,"
hexmask.long.word 0x528 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x528 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x528 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x528 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x528 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x528 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x528 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x528 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x528 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x52C "DOC0EXPD4427,"
hexmask.long.word 0x52C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x52C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x52C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x52C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x52C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x52C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x52C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x52C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x52C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x530 "DOC0EXPD4428,"
hexmask.long.word 0x530 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x530 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x530 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x530 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x530 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x530 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x530 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x530 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x530 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x534 "DOC0EXPD4429,"
hexmask.long.word 0x534 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x534 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x534 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x534 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x534 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x534 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x534 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x534 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x534 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x538 "DOC0EXPD4430,"
hexmask.long.word 0x538 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x538 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x538 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x538 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x538 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x538 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x538 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x538 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x538 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x53C "DOC0EXPD4431,"
hexmask.long.word 0x53C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x53C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x53C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x53C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x53C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x53C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x53C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x53C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x53C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x540 "DOC0EXPD4432,"
hexmask.long.word 0x540 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x540 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x540 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x540 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x540 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x540 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x540 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x540 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x540 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x544 "DOC0EXPD4433,"
hexmask.long.word 0x544 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x544 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x544 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x544 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x544 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x544 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x544 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x544 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x544 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x548 "DOC0EXPD4434,"
hexmask.long.word 0x548 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x548 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x548 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x548 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x548 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x548 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x548 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x548 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x548 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x54C "DOC0EXPD4435,"
hexmask.long.word 0x54C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x54C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x54C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x54C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x54C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x54C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x54C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x54C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x54C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x550 "DOC0EXPD4436,"
hexmask.long.word 0x550 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x550 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x550 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x550 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x550 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x550 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x550 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x550 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x550 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x554 "DOC0EXPD4437,"
hexmask.long.word 0x554 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x554 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x554 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x554 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x554 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x554 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x554 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x554 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x554 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x558 "DOC0EXPD4438,"
hexmask.long.word 0x558 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x558 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x558 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x558 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x558 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x558 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x558 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x558 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x558 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x55C "DOC0EXPD4439,"
hexmask.long.word 0x55C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x55C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x55C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x55C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x55C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x55C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x55C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x55C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x55C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x560 "DOC0EXPD4440,"
hexmask.long.word 0x560 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x560 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x560 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x560 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x560 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x560 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x560 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x560 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x560 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x564 "DOC0EXPD4441,"
hexmask.long.word 0x564 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x564 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x564 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x564 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x564 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x564 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x564 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x564 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x564 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x568 "DOC0EXPD4442,"
hexmask.long.word 0x568 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x568 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x568 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x568 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x568 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x568 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x568 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x568 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x568 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x56C "DOC0EXPD4443,"
hexmask.long.word 0x56C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x56C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x56C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x56C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x56C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x56C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x56C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x56C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x56C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x570 "DOC0EXPD4444,"
hexmask.long.word 0x570 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x570 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x570 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x570 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x570 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x570 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x570 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x570 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x570 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x574 "DOC0EXPD4445,"
hexmask.long.word 0x574 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x574 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x574 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x574 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x574 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x574 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x574 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x574 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x574 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x578 "DOC0EXPD4446,"
hexmask.long.word 0x578 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x578 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x578 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x578 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x578 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x578 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x578 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x578 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x578 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x57C "DOC0EXPD4447,"
hexmask.long.word 0x57C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x57C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x57C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x57C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x57C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x57C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x57C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x57C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x57C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x580 "DOC0EXPD4448,"
hexmask.long.word 0x580 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x580 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x580 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x580 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x580 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x580 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x580 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x580 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x580 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x584 "DOC0EXPD4449,"
hexmask.long.word 0x584 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x584 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x584 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x584 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x584 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x584 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x584 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x584 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x584 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x588 "DOC0EXPD4450,"
hexmask.long.word 0x588 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x588 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x588 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x588 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x588 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x588 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x588 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x588 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x588 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x58C "DOC0EXPD4451,"
hexmask.long.word 0x58C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x58C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x58C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x58C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x58C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x58C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x58C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x58C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x58C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x590 "DOC0EXPD4452,"
hexmask.long.word 0x590 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x590 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x590 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x590 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x590 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x590 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x590 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x590 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x590 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x594 "DOC0EXPD4453,"
hexmask.long.word 0x594 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x594 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x594 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x594 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x594 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x594 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x594 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x594 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x594 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x598 "DOC0EXPD4454,"
hexmask.long.word 0x598 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x598 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x598 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x598 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x598 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x598 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x598 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x598 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x598 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x59C "DOC0EXPD4455,"
hexmask.long.word 0x59C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x59C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x59C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x59C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x59C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x59C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x59C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x59C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x59C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A0 "DOC0EXPD4456,"
hexmask.long.word 0x5A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A4 "DOC0EXPD4457,"
hexmask.long.word 0x5A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A8 "DOC0EXPD4458,"
hexmask.long.word 0x5A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5AC "DOC0EXPD4459,"
hexmask.long.word 0x5AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B0 "DOC0EXPD4460,"
hexmask.long.word 0x5B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B4 "DOC0EXPD4461,"
hexmask.long.word 0x5B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B8 "DOC0EXPD4462,"
hexmask.long.word 0x5B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5BC "DOC0EXPD4463,"
hexmask.long.word 0x5BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C0 "DOC0EXPD4464,"
hexmask.long.word 0x5C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C4 "DOC0EXPD4465,"
hexmask.long.word 0x5C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C8 "DOC0EXPD4466,"
hexmask.long.word 0x5C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5CC "DOC0EXPD4467,"
hexmask.long.word 0x5CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D0 "DOC0EXPD4468,"
hexmask.long.word 0x5D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D4 "DOC0EXPD4469,"
hexmask.long.word 0x5D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D8 "DOC0EXPD4470,"
hexmask.long.word 0x5D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5DC "DOC0EXPD4471,"
hexmask.long.word 0x5DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E0 "DOC0EXPD4472,"
hexmask.long.word 0x5E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E4 "DOC0EXPD4473,"
hexmask.long.word 0x5E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E8 "DOC0EXPD4474,"
hexmask.long.word 0x5E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5EC "DOC0EXPD4475,"
hexmask.long.word 0x5EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F0 "DOC0EXPD4476,"
hexmask.long.word 0x5F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F4 "DOC0EXPD4477,"
hexmask.long.word 0x5F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F8 "DOC0EXPD4478,"
hexmask.long.word 0x5F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5FC "DOC0EXPD4479,"
hexmask.long.word 0x5FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x600 "DOC0EXPD4480,"
hexmask.long.word 0x600 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x600 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x600 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x600 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x600 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x600 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x600 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x600 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x600 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x604 "DOC0EXPD4481,"
hexmask.long.word 0x604 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x604 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x604 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x604 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x604 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x604 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x604 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x604 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x604 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x608 "DOC0EXPD4482,"
hexmask.long.word 0x608 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x608 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x608 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x608 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x608 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x608 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x608 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x608 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x608 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x60C "DOC0EXPD4483,"
hexmask.long.word 0x60C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x60C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x60C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x60C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x60C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x60C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x60C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x60C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x60C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x610 "DOC0EXPD4484,"
hexmask.long.word 0x610 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x610 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x610 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x610 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x610 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x610 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x610 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x610 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x610 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x614 "DOC0EXPD4485,"
hexmask.long.word 0x614 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x614 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x614 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x614 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x614 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x614 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x614 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x614 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x614 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x618 "DOC0EXPD4486,"
hexmask.long.word 0x618 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x618 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x618 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x618 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x618 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x618 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x618 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x618 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x618 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x61C "DOC0EXPD4487,"
hexmask.long.word 0x61C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x61C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x61C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x61C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x61C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x61C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x61C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x61C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x61C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x620 "DOC0EXPD4488,"
hexmask.long.word 0x620 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x620 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x620 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x620 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x620 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x620 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x620 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x620 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x620 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x624 "DOC0EXPD4489,"
hexmask.long.word 0x624 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x624 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x624 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x624 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x624 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x624 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x624 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x624 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x624 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x628 "DOC0EXPD4490,"
hexmask.long.word 0x628 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x628 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x628 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x628 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x628 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x628 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x628 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x628 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x628 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x62C "DOC0EXPD4491,"
hexmask.long.word 0x62C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x62C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x62C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x62C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x62C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x62C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x62C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x62C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x62C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x630 "DOC0EXPD4492,"
hexmask.long.word 0x630 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x630 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x630 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x630 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x630 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x630 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x630 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x630 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x630 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x634 "DOC0EXPD4493,"
hexmask.long.word 0x634 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x634 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x634 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x634 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x634 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x634 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x634 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x634 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x634 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x638 "DOC0EXPD4494,"
hexmask.long.word 0x638 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x638 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x638 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x638 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x638 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x638 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x638 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x638 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x638 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x63C "DOC0EXPD4495,"
hexmask.long.word 0x63C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x63C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x63C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x63C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x63C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x63C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x63C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x63C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x63C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x640 "DOC0EXPD4496,"
hexmask.long.word 0x640 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x640 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x640 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x640 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x640 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x640 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x640 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x640 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x640 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x644 "DOC0EXPD4497,"
hexmask.long.word 0x644 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x644 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x644 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x644 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x644 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x644 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x644 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x644 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x644 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x648 "DOC0EXPD4498,"
hexmask.long.word 0x648 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x648 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x648 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x648 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x648 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x648 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x648 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x648 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x648 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x64C "DOC0EXPD4499,"
hexmask.long.word 0x64C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x64C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x64C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x64C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x64C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x64C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x64C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x64C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x64C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x650 "DOC0EXPD4500,"
hexmask.long.word 0x650 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x650 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x650 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x650 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x650 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x650 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x650 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x650 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x650 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x654 "DOC0EXPD4501,"
hexmask.long.word 0x654 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x654 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x654 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x654 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x654 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x654 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x654 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x654 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x654 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x658 "DOC0EXPD4502,"
hexmask.long.word 0x658 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x658 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x658 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x658 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x658 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x658 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x658 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x658 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x658 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x65C "DOC0EXPD4503,"
hexmask.long.word 0x65C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x65C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x65C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x65C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x65C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x65C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x65C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x65C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x65C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x660 "DOC0EXPD4504,"
hexmask.long.word 0x660 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x660 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x660 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x660 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x660 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x660 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x660 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x660 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x660 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x664 "DOC0EXPD4505,"
hexmask.long.word 0x664 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x664 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x664 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x664 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x664 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x664 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x664 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x664 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x664 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x668 "DOC0EXPD4506,"
hexmask.long.word 0x668 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x668 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x668 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x668 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x668 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x668 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x668 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x668 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x668 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x66C "DOC0EXPD4507,"
hexmask.long.word 0x66C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x66C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x66C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x66C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x66C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x66C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x66C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x66C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x66C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x670 "DOC0EXPD4508,"
hexmask.long.word 0x670 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x670 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x670 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x670 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x670 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x670 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x670 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x670 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x670 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x674 "DOC0EXPD4509,"
hexmask.long.word 0x674 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x674 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x674 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x674 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x674 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x674 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x674 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x674 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x674 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x678 "DOC0EXPD4510,"
hexmask.long.word 0x678 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x678 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x678 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x678 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x678 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x678 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x678 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x678 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x678 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x67C "DOC0EXPD4511,"
hexmask.long.word 0x67C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x67C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x67C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x67C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x67C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x67C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x67C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x67C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x67C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x680 "DOC0EXPD4512,"
hexmask.long.word 0x680 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x680 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x680 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x680 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x680 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x680 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x680 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x680 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x680 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x684 "DOC0EXPD4513,"
hexmask.long.word 0x684 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x684 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x684 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x684 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x684 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x684 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x684 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x684 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x684 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x688 "DOC0EXPD4514,"
hexmask.long.word 0x688 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x688 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x688 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x688 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x688 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x688 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x688 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x688 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x688 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x68C "DOC0EXPD4515,"
hexmask.long.word 0x68C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x68C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x68C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x68C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x68C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x68C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x68C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x68C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x68C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x690 "DOC0EXPD4516,"
hexmask.long.word 0x690 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x690 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x690 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x690 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x690 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x690 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x690 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x690 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x690 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x694 "DOC0EXPD4517,"
hexmask.long.word 0x694 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x694 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x694 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x694 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x694 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x694 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x694 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x694 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x694 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x698 "DOC0EXPD4518,"
hexmask.long.word 0x698 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x698 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x698 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x698 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x698 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x698 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x698 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x698 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x698 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x69C "DOC0EXPD4519,"
hexmask.long.word 0x69C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x69C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x69C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x69C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x69C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x69C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x69C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x69C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x69C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A0 "DOC0EXPD4520,"
hexmask.long.word 0x6A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A4 "DOC0EXPD4521,"
hexmask.long.word 0x6A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A8 "DOC0EXPD4522,"
hexmask.long.word 0x6A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6AC "DOC0EXPD4523,"
hexmask.long.word 0x6AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B0 "DOC0EXPD4524,"
hexmask.long.word 0x6B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B4 "DOC0EXPD4525,"
hexmask.long.word 0x6B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B8 "DOC0EXPD4526,"
hexmask.long.word 0x6B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6BC "DOC0EXPD4527,"
hexmask.long.word 0x6BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C0 "DOC0EXPD4528,"
hexmask.long.word 0x6C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C4 "DOC0EXPD4529,"
hexmask.long.word 0x6C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C8 "DOC0EXPD4530,"
hexmask.long.word 0x6C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6CC "DOC0EXPD4531,"
hexmask.long.word 0x6CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D0 "DOC0EXPD4532,"
hexmask.long.word 0x6D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D4 "DOC0EXPD4533,"
hexmask.long.word 0x6D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D8 "DOC0EXPD4534,"
hexmask.long.word 0x6D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6DC "DOC0EXPD4535,"
hexmask.long.word 0x6DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E0 "DOC0EXPD4536,"
hexmask.long.word 0x6E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E4 "DOC0EXPD4537,"
hexmask.long.word 0x6E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E8 "DOC0EXPD4538,"
hexmask.long.word 0x6E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6EC "DOC0EXPD4539,"
hexmask.long.word 0x6EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F0 "DOC0EXPD4540,"
hexmask.long.word 0x6F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F4 "DOC0EXPD4541,"
hexmask.long.word 0x6F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F8 "DOC0EXPD4542,"
hexmask.long.word 0x6F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6FC "DOC0EXPD4543,"
hexmask.long.word 0x6FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x700 "DOC0EXPD4544,"
hexmask.long.word 0x700 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x700 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x700 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x700 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x700 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x700 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x700 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x700 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x700 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x704 "DOC0EXPD4545,"
hexmask.long.word 0x704 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x704 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x704 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x704 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x704 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x704 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x704 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x704 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x704 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x708 "DOC0EXPD4546,"
hexmask.long.word 0x708 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x708 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x708 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x708 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x708 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x708 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x708 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x708 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x708 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x70C "DOC0EXPD4547,"
hexmask.long.word 0x70C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x70C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x70C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x70C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x70C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x70C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x70C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x70C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x70C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x710 "DOC0EXPD4548,"
hexmask.long.word 0x710 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x710 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x710 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x710 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x710 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x710 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x710 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x710 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x710 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x714 "DOC0EXPD4549,"
hexmask.long.word 0x714 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x714 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x714 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x714 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x714 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x714 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x714 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x714 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x714 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x718 "DOC0EXPD4550,"
hexmask.long.word 0x718 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x718 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x718 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x718 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x718 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x718 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x718 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x718 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x718 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x71C "DOC0EXPD4551,"
hexmask.long.word 0x71C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x71C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x71C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x71C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x71C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x71C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x71C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x71C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x71C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x720 "DOC0EXPD4552,"
hexmask.long.word 0x720 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x720 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x720 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x720 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x720 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x720 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x720 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x720 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x720 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x724 "DOC0EXPD4553,"
hexmask.long.word 0x724 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x724 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x724 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x724 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x724 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x724 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x724 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x724 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x724 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x728 "DOC0EXPD4554,"
hexmask.long.word 0x728 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x728 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x728 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x728 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x728 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x728 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x728 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x728 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x728 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x72C "DOC0EXPD4555,"
hexmask.long.word 0x72C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x72C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x72C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x72C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x72C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x72C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x72C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x72C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x72C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x730 "DOC0EXPD4556,"
hexmask.long.word 0x730 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x730 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x730 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x730 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x730 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x730 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x730 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x730 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x730 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x734 "DOC0EXPD4557,"
hexmask.long.word 0x734 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x734 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x734 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x734 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x734 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x734 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x734 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x734 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x734 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x738 "DOC0EXPD4558,"
hexmask.long.word 0x738 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x738 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x738 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x738 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x738 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x738 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x738 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x738 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x738 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x73C "DOC0EXPD4559,"
hexmask.long.word 0x73C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x73C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x73C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x73C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x73C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x73C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x73C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x73C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x73C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x740 "DOC0EXPD4560,"
hexmask.long.word 0x740 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x740 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x740 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x740 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x740 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x740 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x740 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x740 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x740 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x744 "DOC0EXPD4561,"
hexmask.long.word 0x744 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x744 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x744 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x744 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x744 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x744 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x744 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x744 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x744 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x748 "DOC0EXPD4562,"
hexmask.long.word 0x748 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x748 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x748 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x748 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x748 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x748 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x748 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x748 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x748 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x74C "DOC0EXPD4563,"
hexmask.long.word 0x74C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x74C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x74C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x74C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x74C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x74C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x74C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x74C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x74C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x750 "DOC0EXPD4564,"
hexmask.long.word 0x750 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x750 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x750 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x750 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x750 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x750 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x750 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x750 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x750 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x754 "DOC0EXPD4565,"
hexmask.long.word 0x754 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x754 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x754 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x754 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x754 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x754 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x754 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x754 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x754 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x758 "DOC0EXPD4566,"
hexmask.long.word 0x758 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x758 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x758 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x758 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x758 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x758 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x758 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x758 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x758 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x75C "DOC0EXPD4567,"
hexmask.long.word 0x75C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x75C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x75C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x75C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x75C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x75C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x75C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x75C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x75C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x760 "DOC0EXPD4568,"
hexmask.long.word 0x760 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x760 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x760 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x760 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x760 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x760 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x760 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x760 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x760 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x764 "DOC0EXPD4569,"
hexmask.long.word 0x764 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x764 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x764 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x764 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x764 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x764 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x764 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x764 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x764 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x768 "DOC0EXPD4570,"
hexmask.long.word 0x768 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x768 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x768 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x768 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x768 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x768 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x768 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x768 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x768 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x76C "DOC0EXPD4571,"
hexmask.long.word 0x76C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x76C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x76C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x76C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x76C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x76C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x76C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x76C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x76C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x770 "DOC0EXPD4572,"
hexmask.long.word 0x770 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x770 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x770 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x770 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x770 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x770 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x770 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x770 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x770 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x774 "DOC0EXPD4573,"
hexmask.long.word 0x774 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x774 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x774 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x774 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x774 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x774 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x774 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x774 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x774 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x778 "DOC0EXPD4574,"
hexmask.long.word 0x778 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x778 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x778 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x778 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x778 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x778 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x778 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x778 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x778 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x77C "DOC0EXPD4575,"
hexmask.long.word 0x77C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x77C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x77C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x77C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x77C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x77C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x77C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x77C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x77C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x780 "DOC0EXPD4576,"
hexmask.long.word 0x780 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x780 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x780 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x780 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x780 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x780 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x780 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x780 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x780 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x784 "DOC0EXPD4577,"
hexmask.long.word 0x784 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x784 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x784 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x784 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x784 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x784 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x784 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x784 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x784 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x788 "DOC0EXPD4578,"
hexmask.long.word 0x788 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x788 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x788 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x788 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x788 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x788 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x788 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x788 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x788 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x78C "DOC0EXPD4579,"
hexmask.long.word 0x78C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x78C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x78C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x78C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x78C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x78C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x78C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x78C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x78C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x790 "DOC0EXPD4580,"
hexmask.long.word 0x790 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x790 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x790 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x790 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x790 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x790 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x790 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x790 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x790 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x794 "DOC0EXPD4581,"
hexmask.long.word 0x794 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x794 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x794 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x794 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x794 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x794 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x794 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x794 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x794 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x798 "DOC0EXPD4582,"
hexmask.long.word 0x798 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x798 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x798 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x798 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x798 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x798 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x798 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x798 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x798 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x79C "DOC0EXPD4583,"
hexmask.long.word 0x79C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x79C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x79C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x79C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x79C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x79C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x79C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x79C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x79C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A0 "DOC0EXPD4584,"
hexmask.long.word 0x7A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A4 "DOC0EXPD4585,"
hexmask.long.word 0x7A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A8 "DOC0EXPD4586,"
hexmask.long.word 0x7A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7AC "DOC0EXPD4587,"
hexmask.long.word 0x7AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B0 "DOC0EXPD4588,"
hexmask.long.word 0x7B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B4 "DOC0EXPD4589,"
hexmask.long.word 0x7B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B8 "DOC0EXPD4590,"
hexmask.long.word 0x7B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7BC "DOC0EXPD4591,"
hexmask.long.word 0x7BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C0 "DOC0EXPD4592,"
hexmask.long.word 0x7C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C4 "DOC0EXPD4593,"
hexmask.long.word 0x7C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C8 "DOC0EXPD4594,"
hexmask.long.word 0x7C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7CC "DOC0EXPD4595,"
hexmask.long.word 0x7CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D0 "DOC0EXPD4596,"
hexmask.long.word 0x7D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D4 "DOC0EXPD4597,"
hexmask.long.word 0x7D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D8 "DOC0EXPD4598,"
hexmask.long.word 0x7D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7DC "DOC0EXPD4599,"
hexmask.long.word 0x7DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E0 "DOC0EXPD4600,"
hexmask.long.word 0x7E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E4 "DOC0EXPD4601,"
hexmask.long.word 0x7E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E8 "DOC0EXPD4602,"
hexmask.long.word 0x7E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7EC "DOC0EXPD4603,"
hexmask.long.word 0x7EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F0 "DOC0EXPD4604,"
hexmask.long.word 0x7F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F4 "DOC0EXPD4605,"
hexmask.long.word 0x7F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F8 "DOC0EXPD4606,"
hexmask.long.word 0x7F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7FC "DOC0EXPD4607,"
hexmask.long.word 0x7FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x800 "DOC0EXPD4608,"
hexmask.long.word 0x800 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x800 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x800 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x800 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x800 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x800 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x800 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x800 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x800 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x804 "DOC0EXPD4609,"
hexmask.long.word 0x804 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x804 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x804 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x804 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x804 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x804 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x804 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x804 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x804 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x808 "DOC0EXPD4610,"
hexmask.long.word 0x808 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x808 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x808 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x808 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x808 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x808 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x808 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x808 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x808 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x80C "DOC0EXPD4611,"
hexmask.long.word 0x80C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x80C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x80C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x80C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x80C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x80C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x80C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x80C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x80C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x810 "DOC0EXPD4612,"
hexmask.long.word 0x810 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x810 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x810 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x810 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x810 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x810 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x810 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x810 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x810 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x814 "DOC0EXPD4613,"
hexmask.long.word 0x814 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x814 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x814 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x814 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x814 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x814 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x814 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x814 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x814 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x818 "DOC0EXPD4614,"
hexmask.long.word 0x818 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x818 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x818 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x818 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x818 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x818 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x818 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x818 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x818 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x81C "DOC0EXPD4615,"
hexmask.long.word 0x81C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x81C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x81C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x81C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x81C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x81C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x81C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x81C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x81C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x820 "DOC0EXPD4616,"
hexmask.long.word 0x820 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x820 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x820 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x820 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x820 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x820 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x820 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x820 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x820 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x824 "DOC0EXPD4617,"
hexmask.long.word 0x824 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x824 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x824 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x824 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x824 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x824 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x824 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x824 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x824 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x828 "DOC0EXPD4618,"
hexmask.long.word 0x828 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x828 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x828 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x828 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x828 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x828 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x828 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x828 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x828 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x82C "DOC0EXPD4619,"
hexmask.long.word 0x82C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x82C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x82C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x82C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x82C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x82C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x82C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x82C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x82C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x830 "DOC0EXPD4620,"
hexmask.long.word 0x830 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x830 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x830 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x830 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x830 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x830 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x830 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x830 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x830 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x834 "DOC0EXPD4621,"
hexmask.long.word 0x834 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x834 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x834 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x834 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x834 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x834 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x834 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x834 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x834 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x838 "DOC0EXPD4622,"
hexmask.long.word 0x838 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x838 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x838 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x838 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x838 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x838 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x838 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x838 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x838 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x83C "DOC0EXPD4623,"
hexmask.long.word 0x83C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x83C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x83C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x83C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x83C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x83C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x83C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x83C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x83C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x840 "DOC0EXPD4624,"
hexmask.long.word 0x840 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x840 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x840 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x840 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x840 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x840 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x840 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x840 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x840 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x844 "DOC0EXPD4625,"
hexmask.long.word 0x844 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x844 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x844 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x844 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x844 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x844 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x844 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x844 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x844 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x848 "DOC0EXPD4626,"
hexmask.long.word 0x848 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x848 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x848 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x848 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x848 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x848 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x848 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x848 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x848 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x84C "DOC0EXPD4627,"
hexmask.long.word 0x84C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x84C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x84C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x84C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x84C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x84C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x84C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x84C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x84C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x850 "DOC0EXPD4628,"
hexmask.long.word 0x850 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x850 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x850 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x850 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x850 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x850 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x850 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x850 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x850 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x854 "DOC0EXPD4629,"
hexmask.long.word 0x854 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x854 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x854 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x854 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x854 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x854 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x854 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x854 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x854 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x858 "DOC0EXPD4630,"
hexmask.long.word 0x858 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x858 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x858 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x858 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x858 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x858 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x858 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x858 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x858 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x85C "DOC0EXPD4631,"
hexmask.long.word 0x85C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x85C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x85C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x85C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x85C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x85C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x85C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x85C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x85C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x860 "DOC0EXPD4632,"
hexmask.long.word 0x860 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x860 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x860 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x860 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x860 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x860 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x860 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x860 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x860 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x864 "DOC0EXPD4633,"
hexmask.long.word 0x864 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x864 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x864 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x864 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x864 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x864 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x864 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x864 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x864 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x868 "DOC0EXPD4634,"
hexmask.long.word 0x868 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x868 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x868 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x868 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x868 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x868 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x868 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x868 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x868 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x86C "DOC0EXPD4635,"
hexmask.long.word 0x86C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x86C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x86C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x86C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x86C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x86C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x86C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x86C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x86C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x870 "DOC0EXPD4636,"
hexmask.long.word 0x870 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x870 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x870 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x870 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x870 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x870 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x870 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x870 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x870 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x874 "DOC0EXPD4637,"
hexmask.long.word 0x874 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x874 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x874 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x874 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x874 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x874 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x874 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x874 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x874 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x878 "DOC0EXPD4638,"
hexmask.long.word 0x878 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x878 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x878 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x878 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x878 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x878 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x878 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x878 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x878 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x87C "DOC0EXPD4639,"
hexmask.long.word 0x87C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x87C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x87C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x87C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x87C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x87C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x87C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x87C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x87C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x880 "DOC0EXPD4640,"
hexmask.long.word 0x880 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x880 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x880 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x880 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x880 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x880 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x880 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x880 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x880 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x884 "DOC0EXPD4641,"
hexmask.long.word 0x884 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x884 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x884 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x884 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x884 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x884 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x884 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x884 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x884 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x888 "DOC0EXPD4642,"
hexmask.long.word 0x888 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x888 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x888 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x888 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x888 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x888 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x888 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x888 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x888 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x88C "DOC0EXPD4643,"
hexmask.long.word 0x88C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x88C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x88C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x88C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x88C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x88C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x88C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x88C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x88C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x890 "DOC0EXPD4644,"
hexmask.long.word 0x890 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x890 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x890 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x890 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x890 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x890 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x890 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x890 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x890 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x894 "DOC0EXPD4645,"
hexmask.long.word 0x894 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x894 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x894 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x894 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x894 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x894 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x894 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x894 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x894 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x898 "DOC0EXPD4646,"
hexmask.long.word 0x898 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x898 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x898 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x898 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x898 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x898 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x898 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x898 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x898 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x89C "DOC0EXPD4647,"
hexmask.long.word 0x89C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x89C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x89C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x89C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x89C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x89C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x89C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x89C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x89C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A0 "DOC0EXPD4648,"
hexmask.long.word 0x8A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A4 "DOC0EXPD4649,"
hexmask.long.word 0x8A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A8 "DOC0EXPD4650,"
hexmask.long.word 0x8A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8AC "DOC0EXPD4651,"
hexmask.long.word 0x8AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B0 "DOC0EXPD4652,"
hexmask.long.word 0x8B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B4 "DOC0EXPD4653,"
hexmask.long.word 0x8B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B8 "DOC0EXPD4654,"
hexmask.long.word 0x8B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8BC "DOC0EXPD4655,"
hexmask.long.word 0x8BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C0 "DOC0EXPD4656,"
hexmask.long.word 0x8C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C4 "DOC0EXPD4657,"
hexmask.long.word 0x8C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C8 "DOC0EXPD4658,"
hexmask.long.word 0x8C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8CC "DOC0EXPD4659,"
hexmask.long.word 0x8CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D0 "DOC0EXPD4660,"
hexmask.long.word 0x8D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D4 "DOC0EXPD4661,"
hexmask.long.word 0x8D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D8 "DOC0EXPD4662,"
hexmask.long.word 0x8D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8DC "DOC0EXPD4663,"
hexmask.long.word 0x8DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E0 "DOC0EXPD4664,"
hexmask.long.word 0x8E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E4 "DOC0EXPD4665,"
hexmask.long.word 0x8E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E8 "DOC0EXPD4666,"
hexmask.long.word 0x8E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8EC "DOC0EXPD4667,"
hexmask.long.word 0x8EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F0 "DOC0EXPD4668,"
hexmask.long.word 0x8F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F4 "DOC0EXPD4669,"
hexmask.long.word 0x8F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F8 "DOC0EXPD4670,"
hexmask.long.word 0x8F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8FC "DOC0EXPD4671,"
hexmask.long.word 0x8FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x900 "DOC0EXPD4672,"
hexmask.long.word 0x900 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x900 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x900 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x900 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x900 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x900 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x900 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x900 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x900 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x904 "DOC0EXPD4673,"
hexmask.long.word 0x904 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x904 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x904 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x904 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x904 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x904 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x904 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x904 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x904 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x908 "DOC0EXPD4674,"
hexmask.long.word 0x908 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x908 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x908 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x908 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x908 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x908 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x908 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x908 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x908 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x90C "DOC0EXPD4675,"
hexmask.long.word 0x90C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x90C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x90C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x90C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x90C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x90C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x90C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x90C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x90C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x910 "DOC0EXPD4676,"
hexmask.long.word 0x910 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x910 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x910 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x910 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x910 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x910 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x910 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x910 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x910 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x914 "DOC0EXPD4677,"
hexmask.long.word 0x914 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x914 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x914 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x914 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x914 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x914 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x914 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x914 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x914 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x918 "DOC0EXPD4678,"
hexmask.long.word 0x918 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x918 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x918 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x918 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x918 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x918 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x918 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x918 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x918 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x91C "DOC0EXPD4679,"
hexmask.long.word 0x91C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x91C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x91C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x91C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x91C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x91C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x91C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x91C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x91C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x920 "DOC0EXPD4680,"
hexmask.long.word 0x920 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x920 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x920 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x920 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x920 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x920 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x920 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x920 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x920 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x924 "DOC0EXPD4681,"
hexmask.long.word 0x924 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x924 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x924 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x924 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x924 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x924 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x924 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x924 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x924 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x928 "DOC0EXPD4682,"
hexmask.long.word 0x928 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x928 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x928 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x928 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x928 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x928 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x928 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x928 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x928 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x92C "DOC0EXPD4683,"
hexmask.long.word 0x92C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x92C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x92C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x92C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x92C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x92C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x92C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x92C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x92C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x930 "DOC0EXPD4684,"
hexmask.long.word 0x930 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x930 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x930 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x930 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x930 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x930 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x930 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x930 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x930 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x934 "DOC0EXPD4685,"
hexmask.long.word 0x934 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x934 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x934 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x934 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x934 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x934 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x934 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x934 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x934 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x938 "DOC0EXPD4686,"
hexmask.long.word 0x938 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x938 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x938 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x938 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x938 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x938 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x938 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x938 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x938 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x93C "DOC0EXPD4687,"
hexmask.long.word 0x93C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x93C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x93C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x93C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x93C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x93C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x93C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x93C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x93C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x940 "DOC0EXPD4688,"
hexmask.long.word 0x940 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x940 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x940 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x940 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x940 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x940 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x940 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x940 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x940 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x944 "DOC0EXPD4689,"
hexmask.long.word 0x944 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x944 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x944 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x944 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x944 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x944 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x944 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x944 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x944 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x948 "DOC0EXPD4690,"
hexmask.long.word 0x948 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x948 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x948 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x948 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x948 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x948 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x948 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x948 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x948 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x94C "DOC0EXPD4691,"
hexmask.long.word 0x94C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x94C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x94C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x94C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x94C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x94C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x94C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x94C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x94C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x950 "DOC0EXPD4692,"
hexmask.long.word 0x950 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x950 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x950 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x950 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x950 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x950 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x950 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x950 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x950 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x954 "DOC0EXPD4693,"
hexmask.long.word 0x954 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x954 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x954 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x954 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x954 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x954 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x954 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x954 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x954 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x958 "DOC0EXPD4694,"
hexmask.long.word 0x958 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x958 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x958 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x958 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x958 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x958 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x958 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x958 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x958 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x95C "DOC0EXPD4695,"
hexmask.long.word 0x95C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x95C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x95C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x95C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x95C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x95C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x95C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x95C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x95C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x960 "DOC0EXPD4696,"
hexmask.long.word 0x960 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x960 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x960 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x960 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x960 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x960 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x960 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x960 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x960 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x964 "DOC0EXPD4697,"
hexmask.long.word 0x964 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x964 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x964 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x964 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x964 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x964 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x964 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x964 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x964 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x968 "DOC0EXPD4698,"
hexmask.long.word 0x968 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x968 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x968 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x968 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x968 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x968 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x968 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x968 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x968 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x96C "DOC0EXPD4699,"
hexmask.long.word 0x96C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x96C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x96C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x96C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x96C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x96C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x96C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x96C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x96C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x970 "DOC0EXPD4700,"
hexmask.long.word 0x970 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x970 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x970 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x970 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x970 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x970 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x970 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x970 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x970 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x974 "DOC0EXPD4701,"
hexmask.long.word 0x974 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x974 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x974 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x974 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x974 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x974 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x974 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x974 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x974 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x978 "DOC0EXPD4702,"
hexmask.long.word 0x978 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x978 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x978 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x978 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x978 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x978 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x978 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x978 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x978 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x97C "DOC0EXPD4703,"
hexmask.long.word 0x97C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x97C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x97C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x97C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x97C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x97C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x97C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x97C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x97C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x980 "DOC0EXPD4704,"
hexmask.long.word 0x980 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x980 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x980 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x980 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x980 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x980 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x980 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x980 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x980 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x984 "DOC0EXPD4705,"
hexmask.long.word 0x984 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x984 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x984 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x984 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x984 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x984 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x984 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x984 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x984 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x988 "DOC0EXPD4706,"
hexmask.long.word 0x988 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x988 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x988 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x988 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x988 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x988 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x988 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x988 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x988 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x98C "DOC0EXPD4707,"
hexmask.long.word 0x98C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x98C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x98C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x98C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x98C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x98C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x98C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x98C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x98C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x990 "DOC0EXPD4708,"
hexmask.long.word 0x990 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x990 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x990 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x990 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x990 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x990 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x990 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x990 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x990 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x994 "DOC0EXPD4709,"
hexmask.long.word 0x994 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x994 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x994 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x994 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x994 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x994 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x994 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x994 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x994 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x998 "DOC0EXPD4710,"
hexmask.long.word 0x998 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x998 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x998 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x998 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x998 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x998 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x998 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x998 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x998 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x99C "DOC0EXPD4711,"
hexmask.long.word 0x99C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x99C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x99C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x99C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x99C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x99C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x99C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x99C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x99C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A0 "DOC0EXPD4712,"
hexmask.long.word 0x9A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A4 "DOC0EXPD4713,"
hexmask.long.word 0x9A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A8 "DOC0EXPD4714,"
hexmask.long.word 0x9A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9AC "DOC0EXPD4715,"
hexmask.long.word 0x9AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B0 "DOC0EXPD4716,"
hexmask.long.word 0x9B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B4 "DOC0EXPD4717,"
hexmask.long.word 0x9B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B8 "DOC0EXPD4718,"
hexmask.long.word 0x9B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9BC "DOC0EXPD4719,"
hexmask.long.word 0x9BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C0 "DOC0EXPD4720,"
hexmask.long.word 0x9C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C4 "DOC0EXPD4721,"
hexmask.long.word 0x9C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C8 "DOC0EXPD4722,"
hexmask.long.word 0x9C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9CC "DOC0EXPD4723,"
hexmask.long.word 0x9CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D0 "DOC0EXPD4724,"
hexmask.long.word 0x9D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D4 "DOC0EXPD4725,"
hexmask.long.word 0x9D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D8 "DOC0EXPD4726,"
hexmask.long.word 0x9D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9DC "DOC0EXPD4727,"
hexmask.long.word 0x9DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E0 "DOC0EXPD4728,"
hexmask.long.word 0x9E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E4 "DOC0EXPD4729,"
hexmask.long.word 0x9E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E8 "DOC0EXPD4730,"
hexmask.long.word 0x9E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9EC "DOC0EXPD4731,"
hexmask.long.word 0x9EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F0 "DOC0EXPD4732,"
hexmask.long.word 0x9F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F4 "DOC0EXPD4733,"
hexmask.long.word 0x9F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F8 "DOC0EXPD4734,"
hexmask.long.word 0x9F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9FC "DOC0EXPD4735,"
hexmask.long.word 0x9FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA00 "DOC0EXPD4736,"
hexmask.long.word 0xA00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA04 "DOC0EXPD4737,"
hexmask.long.word 0xA04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA08 "DOC0EXPD4738,"
hexmask.long.word 0xA08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA0C "DOC0EXPD4739,"
hexmask.long.word 0xA0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA10 "DOC0EXPD4740,"
hexmask.long.word 0xA10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA14 "DOC0EXPD4741,"
hexmask.long.word 0xA14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA18 "DOC0EXPD4742,"
hexmask.long.word 0xA18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA1C "DOC0EXPD4743,"
hexmask.long.word 0xA1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA20 "DOC0EXPD4744,"
hexmask.long.word 0xA20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA24 "DOC0EXPD4745,"
hexmask.long.word 0xA24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA28 "DOC0EXPD4746,"
hexmask.long.word 0xA28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA2C "DOC0EXPD4747,"
hexmask.long.word 0xA2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA30 "DOC0EXPD4748,"
hexmask.long.word 0xA30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA34 "DOC0EXPD4749,"
hexmask.long.word 0xA34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA38 "DOC0EXPD4750,"
hexmask.long.word 0xA38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA3C "DOC0EXPD4751,"
hexmask.long.word 0xA3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA40 "DOC0EXPD4752,"
hexmask.long.word 0xA40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA44 "DOC0EXPD4753,"
hexmask.long.word 0xA44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA48 "DOC0EXPD4754,"
hexmask.long.word 0xA48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA4C "DOC0EXPD4755,"
hexmask.long.word 0xA4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA50 "DOC0EXPD4756,"
hexmask.long.word 0xA50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA54 "DOC0EXPD4757,"
hexmask.long.word 0xA54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA58 "DOC0EXPD4758,"
hexmask.long.word 0xA58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA5C "DOC0EXPD4759,"
hexmask.long.word 0xA5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA60 "DOC0EXPD4760,"
hexmask.long.word 0xA60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA64 "DOC0EXPD4761,"
hexmask.long.word 0xA64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA68 "DOC0EXPD4762,"
hexmask.long.word 0xA68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA6C "DOC0EXPD4763,"
hexmask.long.word 0xA6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA70 "DOC0EXPD4764,"
hexmask.long.word 0xA70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA74 "DOC0EXPD4765,"
hexmask.long.word 0xA74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA78 "DOC0EXPD4766,"
hexmask.long.word 0xA78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA7C "DOC0EXPD4767,"
hexmask.long.word 0xA7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA80 "DOC0EXPD4768,"
hexmask.long.word 0xA80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA84 "DOC0EXPD4769,"
hexmask.long.word 0xA84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA88 "DOC0EXPD4770,"
hexmask.long.word 0xA88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA8C "DOC0EXPD4771,"
hexmask.long.word 0xA8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA90 "DOC0EXPD4772,"
hexmask.long.word 0xA90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA94 "DOC0EXPD4773,"
hexmask.long.word 0xA94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA98 "DOC0EXPD4774,"
hexmask.long.word 0xA98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA9C "DOC0EXPD4775,"
hexmask.long.word 0xA9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA0 "DOC0EXPD4776,"
hexmask.long.word 0xAA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA4 "DOC0EXPD4777,"
hexmask.long.word 0xAA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA8 "DOC0EXPD4778,"
hexmask.long.word 0xAA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAAC "DOC0EXPD4779,"
hexmask.long.word 0xAAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB0 "DOC0EXPD4780,"
hexmask.long.word 0xAB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB4 "DOC0EXPD4781,"
hexmask.long.word 0xAB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB8 "DOC0EXPD4782,"
hexmask.long.word 0xAB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xABC "DOC0EXPD4783,"
hexmask.long.word 0xABC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xABC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xABC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xABC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xABC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xABC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xABC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xABC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xABC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC0 "DOC0EXPD4784,"
hexmask.long.word 0xAC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC4 "DOC0EXPD4785,"
hexmask.long.word 0xAC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC8 "DOC0EXPD4786,"
hexmask.long.word 0xAC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xACC "DOC0EXPD4787,"
hexmask.long.word 0xACC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xACC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xACC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xACC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xACC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xACC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xACC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xACC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xACC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD0 "DOC0EXPD4788,"
hexmask.long.word 0xAD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD4 "DOC0EXPD4789,"
hexmask.long.word 0xAD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD8 "DOC0EXPD4790,"
hexmask.long.word 0xAD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xADC "DOC0EXPD4791,"
hexmask.long.word 0xADC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xADC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xADC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xADC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xADC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xADC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xADC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xADC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xADC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE0 "DOC0EXPD4792,"
hexmask.long.word 0xAE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE4 "DOC0EXPD4793,"
hexmask.long.word 0xAE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE8 "DOC0EXPD4794,"
hexmask.long.word 0xAE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAEC "DOC0EXPD4795,"
hexmask.long.word 0xAEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF0 "DOC0EXPD4796,"
hexmask.long.word 0xAF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF4 "DOC0EXPD4797,"
hexmask.long.word 0xAF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF8 "DOC0EXPD4798,"
hexmask.long.word 0xAF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAFC "DOC0EXPD4799,"
hexmask.long.word 0xAFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB00 "DOC0EXPD4800,"
hexmask.long.word 0xB00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB04 "DOC0EXPD4801,"
hexmask.long.word 0xB04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB08 "DOC0EXPD4802,"
hexmask.long.word 0xB08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB0C "DOC0EXPD4803,"
hexmask.long.word 0xB0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB10 "DOC0EXPD4804,"
hexmask.long.word 0xB10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB14 "DOC0EXPD4805,"
hexmask.long.word 0xB14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB18 "DOC0EXPD4806,"
hexmask.long.word 0xB18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB1C "DOC0EXPD4807,"
hexmask.long.word 0xB1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB20 "DOC0EXPD4808,"
hexmask.long.word 0xB20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB24 "DOC0EXPD4809,"
hexmask.long.word 0xB24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB28 "DOC0EXPD4810,"
hexmask.long.word 0xB28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB2C "DOC0EXPD4811,"
hexmask.long.word 0xB2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB30 "DOC0EXPD4812,"
hexmask.long.word 0xB30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB34 "DOC0EXPD4813,"
hexmask.long.word 0xB34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB38 "DOC0EXPD4814,"
hexmask.long.word 0xB38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB3C "DOC0EXPD4815,"
hexmask.long.word 0xB3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB40 "DOC0EXPD4816,"
hexmask.long.word 0xB40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB44 "DOC0EXPD4817,"
hexmask.long.word 0xB44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB48 "DOC0EXPD4818,"
hexmask.long.word 0xB48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB4C "DOC0EXPD4819,"
hexmask.long.word 0xB4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB50 "DOC0EXPD4820,"
hexmask.long.word 0xB50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB54 "DOC0EXPD4821,"
hexmask.long.word 0xB54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB58 "DOC0EXPD4822,"
hexmask.long.word 0xB58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB5C "DOC0EXPD4823,"
hexmask.long.word 0xB5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB60 "DOC0EXPD4824,"
hexmask.long.word 0xB60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB64 "DOC0EXPD4825,"
hexmask.long.word 0xB64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB68 "DOC0EXPD4826,"
hexmask.long.word 0xB68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB6C "DOC0EXPD4827,"
hexmask.long.word 0xB6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB70 "DOC0EXPD4828,"
hexmask.long.word 0xB70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB74 "DOC0EXPD4829,"
hexmask.long.word 0xB74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB78 "DOC0EXPD4830,"
hexmask.long.word 0xB78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB7C "DOC0EXPD4831,"
hexmask.long.word 0xB7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB80 "DOC0EXPD4832,"
hexmask.long.word 0xB80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB84 "DOC0EXPD4833,"
hexmask.long.word 0xB84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB88 "DOC0EXPD4834,"
hexmask.long.word 0xB88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB8C "DOC0EXPD4835,"
hexmask.long.word 0xB8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB90 "DOC0EXPD4836,"
hexmask.long.word 0xB90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB94 "DOC0EXPD4837,"
hexmask.long.word 0xB94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB98 "DOC0EXPD4838,"
hexmask.long.word 0xB98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB9C "DOC0EXPD4839,"
hexmask.long.word 0xB9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA0 "DOC0EXPD4840,"
hexmask.long.word 0xBA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA4 "DOC0EXPD4841,"
hexmask.long.word 0xBA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA8 "DOC0EXPD4842,"
hexmask.long.word 0xBA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBAC "DOC0EXPD4843,"
hexmask.long.word 0xBAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB0 "DOC0EXPD4844,"
hexmask.long.word 0xBB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB4 "DOC0EXPD4845,"
hexmask.long.word 0xBB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB8 "DOC0EXPD4846,"
hexmask.long.word 0xBB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBBC "DOC0EXPD4847,"
hexmask.long.word 0xBBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC0 "DOC0EXPD4848,"
hexmask.long.word 0xBC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC4 "DOC0EXPD4849,"
hexmask.long.word 0xBC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC8 "DOC0EXPD4850,"
hexmask.long.word 0xBC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBCC "DOC0EXPD4851,"
hexmask.long.word 0xBCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD0 "DOC0EXPD4852,"
hexmask.long.word 0xBD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD4 "DOC0EXPD4853,"
hexmask.long.word 0xBD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD8 "DOC0EXPD4854,"
hexmask.long.word 0xBD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBDC "DOC0EXPD4855,"
hexmask.long.word 0xBDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE0 "DOC0EXPD4856,"
hexmask.long.word 0xBE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE4 "DOC0EXPD4857,"
hexmask.long.word 0xBE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE8 "DOC0EXPD4858,"
hexmask.long.word 0xBE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBEC "DOC0EXPD4859,"
hexmask.long.word 0xBEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF0 "DOC0EXPD4860,"
hexmask.long.word 0xBF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF4 "DOC0EXPD4861,"
hexmask.long.word 0xBF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF8 "DOC0EXPD4862,"
hexmask.long.word 0xBF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBFC "DOC0EXPD4863,"
hexmask.long.word 0xBFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC00 "DOC0EXPD4864,"
hexmask.long.word 0xC00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC04 "DOC0EXPD4865,"
hexmask.long.word 0xC04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC08 "DOC0EXPD4866,"
hexmask.long.word 0xC08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC0C "DOC0EXPD4867,"
hexmask.long.word 0xC0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC10 "DOC0EXPD4868,"
hexmask.long.word 0xC10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC14 "DOC0EXPD4869,"
hexmask.long.word 0xC14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC18 "DOC0EXPD4870,"
hexmask.long.word 0xC18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC1C "DOC0EXPD4871,"
hexmask.long.word 0xC1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC20 "DOC0EXPD4872,"
hexmask.long.word 0xC20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC24 "DOC0EXPD4873,"
hexmask.long.word 0xC24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC28 "DOC0EXPD4874,"
hexmask.long.word 0xC28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC2C "DOC0EXPD4875,"
hexmask.long.word 0xC2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC30 "DOC0EXPD4876,"
hexmask.long.word 0xC30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC34 "DOC0EXPD4877,"
hexmask.long.word 0xC34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC38 "DOC0EXPD4878,"
hexmask.long.word 0xC38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC3C "DOC0EXPD4879,"
hexmask.long.word 0xC3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC40 "DOC0EXPD4880,"
hexmask.long.word 0xC40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC44 "DOC0EXPD4881,"
hexmask.long.word 0xC44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC48 "DOC0EXPD4882,"
hexmask.long.word 0xC48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC4C "DOC0EXPD4883,"
hexmask.long.word 0xC4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC50 "DOC0EXPD4884,"
hexmask.long.word 0xC50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC54 "DOC0EXPD4885,"
hexmask.long.word 0xC54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC58 "DOC0EXPD4886,"
hexmask.long.word 0xC58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC5C "DOC0EXPD4887,"
hexmask.long.word 0xC5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC60 "DOC0EXPD4888,"
hexmask.long.word 0xC60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC64 "DOC0EXPD4889,"
hexmask.long.word 0xC64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC68 "DOC0EXPD4890,"
hexmask.long.word 0xC68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC6C "DOC0EXPD4891,"
hexmask.long.word 0xC6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC70 "DOC0EXPD4892,"
hexmask.long.word 0xC70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC74 "DOC0EXPD4893,"
hexmask.long.word 0xC74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC78 "DOC0EXPD4894,"
hexmask.long.word 0xC78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC7C "DOC0EXPD4895,"
hexmask.long.word 0xC7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC80 "DOC0EXPD4896,"
hexmask.long.word 0xC80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC84 "DOC0EXPD4897,"
hexmask.long.word 0xC84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC88 "DOC0EXPD4898,"
hexmask.long.word 0xC88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC8C "DOC0EXPD4899,"
hexmask.long.word 0xC8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC90 "DOC0EXPD4900,"
hexmask.long.word 0xC90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC94 "DOC0EXPD4901,"
hexmask.long.word 0xC94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC98 "DOC0EXPD4902,"
hexmask.long.word 0xC98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC9C "DOC0EXPD4903,"
hexmask.long.word 0xC9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA0 "DOC0EXPD4904,"
hexmask.long.word 0xCA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA4 "DOC0EXPD4905,"
hexmask.long.word 0xCA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA8 "DOC0EXPD4906,"
hexmask.long.word 0xCA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCAC "DOC0EXPD4907,"
hexmask.long.word 0xCAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB0 "DOC0EXPD4908,"
hexmask.long.word 0xCB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB4 "DOC0EXPD4909,"
hexmask.long.word 0xCB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB8 "DOC0EXPD4910,"
hexmask.long.word 0xCB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCBC "DOC0EXPD4911,"
hexmask.long.word 0xCBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC0 "DOC0EXPD4912,"
hexmask.long.word 0xCC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC4 "DOC0EXPD4913,"
hexmask.long.word 0xCC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC8 "DOC0EXPD4914,"
hexmask.long.word 0xCC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCCC "DOC0EXPD4915,"
hexmask.long.word 0xCCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD0 "DOC0EXPD4916,"
hexmask.long.word 0xCD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD4 "DOC0EXPD4917,"
hexmask.long.word 0xCD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD8 "DOC0EXPD4918,"
hexmask.long.word 0xCD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCDC "DOC0EXPD4919,"
hexmask.long.word 0xCDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE0 "DOC0EXPD4920,"
hexmask.long.word 0xCE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE4 "DOC0EXPD4921,"
hexmask.long.word 0xCE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE8 "DOC0EXPD4922,"
hexmask.long.word 0xCE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCEC "DOC0EXPD4923,"
hexmask.long.word 0xCEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF0 "DOC0EXPD4924,"
hexmask.long.word 0xCF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF4 "DOC0EXPD4925,"
hexmask.long.word 0xCF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF8 "DOC0EXPD4926,"
hexmask.long.word 0xCF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCFC "DOC0EXPD4927,"
hexmask.long.word 0xCFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD00 "DOC0EXPD4928,"
hexmask.long.word 0xD00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD04 "DOC0EXPD4929,"
hexmask.long.word 0xD04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD08 "DOC0EXPD4930,"
hexmask.long.word 0xD08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD0C "DOC0EXPD4931,"
hexmask.long.word 0xD0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD10 "DOC0EXPD4932,"
hexmask.long.word 0xD10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD14 "DOC0EXPD4933,"
hexmask.long.word 0xD14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD18 "DOC0EXPD4934,"
hexmask.long.word 0xD18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD1C "DOC0EXPD4935,"
hexmask.long.word 0xD1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD20 "DOC0EXPD4936,"
hexmask.long.word 0xD20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD24 "DOC0EXPD4937,"
hexmask.long.word 0xD24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD28 "DOC0EXPD4938,"
hexmask.long.word 0xD28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD2C "DOC0EXPD4939,"
hexmask.long.word 0xD2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD30 "DOC0EXPD4940,"
hexmask.long.word 0xD30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD34 "DOC0EXPD4941,"
hexmask.long.word 0xD34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD38 "DOC0EXPD4942,"
hexmask.long.word 0xD38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD3C "DOC0EXPD4943,"
hexmask.long.word 0xD3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD40 "DOC0EXPD4944,"
hexmask.long.word 0xD40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD44 "DOC0EXPD4945,"
hexmask.long.word 0xD44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD48 "DOC0EXPD4946,"
hexmask.long.word 0xD48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD4C "DOC0EXPD4947,"
hexmask.long.word 0xD4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD50 "DOC0EXPD4948,"
hexmask.long.word 0xD50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD54 "DOC0EXPD4949,"
hexmask.long.word 0xD54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD58 "DOC0EXPD4950,"
hexmask.long.word 0xD58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD5C "DOC0EXPD4951,"
hexmask.long.word 0xD5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD60 "DOC0EXPD4952,"
hexmask.long.word 0xD60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD64 "DOC0EXPD4953,"
hexmask.long.word 0xD64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD68 "DOC0EXPD4954,"
hexmask.long.word 0xD68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD6C "DOC0EXPD4955,"
hexmask.long.word 0xD6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD70 "DOC0EXPD4956,"
hexmask.long.word 0xD70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD74 "DOC0EXPD4957,"
hexmask.long.word 0xD74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD78 "DOC0EXPD4958,"
hexmask.long.word 0xD78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD7C "DOC0EXPD4959,"
hexmask.long.word 0xD7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD80 "DOC0EXPD4960,"
hexmask.long.word 0xD80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD84 "DOC0EXPD4961,"
hexmask.long.word 0xD84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD88 "DOC0EXPD4962,"
hexmask.long.word 0xD88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD8C "DOC0EXPD4963,"
hexmask.long.word 0xD8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD90 "DOC0EXPD4964,"
hexmask.long.word 0xD90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD94 "DOC0EXPD4965,"
hexmask.long.word 0xD94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD98 "DOC0EXPD4966,"
hexmask.long.word 0xD98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD9C "DOC0EXPD4967,"
hexmask.long.word 0xD9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA0 "DOC0EXPD4968,"
hexmask.long.word 0xDA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA4 "DOC0EXPD4969,"
hexmask.long.word 0xDA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA8 "DOC0EXPD4970,"
hexmask.long.word 0xDA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDAC "DOC0EXPD4971,"
hexmask.long.word 0xDAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB0 "DOC0EXPD4972,"
hexmask.long.word 0xDB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB4 "DOC0EXPD4973,"
hexmask.long.word 0xDB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB8 "DOC0EXPD4974,"
hexmask.long.word 0xDB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDBC "DOC0EXPD4975,"
hexmask.long.word 0xDBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC0 "DOC0EXPD4976,"
hexmask.long.word 0xDC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC4 "DOC0EXPD4977,"
hexmask.long.word 0xDC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC8 "DOC0EXPD4978,"
hexmask.long.word 0xDC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDCC "DOC0EXPD4979,"
hexmask.long.word 0xDCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD0 "DOC0EXPD4980,"
hexmask.long.word 0xDD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD4 "DOC0EXPD4981,"
hexmask.long.word 0xDD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD8 "DOC0EXPD4982,"
hexmask.long.word 0xDD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDDC "DOC0EXPD4983,"
hexmask.long.word 0xDDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE0 "DOC0EXPD4984,"
hexmask.long.word 0xDE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE4 "DOC0EXPD4985,"
hexmask.long.word 0xDE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE8 "DOC0EXPD4986,"
hexmask.long.word 0xDE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDEC "DOC0EXPD4987,"
hexmask.long.word 0xDEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF0 "DOC0EXPD4988,"
hexmask.long.word 0xDF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF4 "DOC0EXPD4989,"
hexmask.long.word 0xDF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF8 "DOC0EXPD4990,"
hexmask.long.word 0xDF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDFC "DOC0EXPD4991,"
hexmask.long.word 0xDFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE00 "DOC0EXPD4992,"
hexmask.long.word 0xE00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE04 "DOC0EXPD4993,"
hexmask.long.word 0xE04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE08 "DOC0EXPD4994,"
hexmask.long.word 0xE08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE0C "DOC0EXPD4995,"
hexmask.long.word 0xE0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE10 "DOC0EXPD4996,"
hexmask.long.word 0xE10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE14 "DOC0EXPD4997,"
hexmask.long.word 0xE14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE18 "DOC0EXPD4998,"
hexmask.long.word 0xE18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE1C "DOC0EXPD4999,"
hexmask.long.word 0xE1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE20 "DOC0EXPD5000,"
hexmask.long.word 0xE20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE24 "DOC0EXPD5001,"
hexmask.long.word 0xE24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE28 "DOC0EXPD5002,"
hexmask.long.word 0xE28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE2C "DOC0EXPD5003,"
hexmask.long.word 0xE2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE30 "DOC0EXPD5004,"
hexmask.long.word 0xE30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE34 "DOC0EXPD5005,"
hexmask.long.word 0xE34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE38 "DOC0EXPD5006,"
hexmask.long.word 0xE38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE3C "DOC0EXPD5007,"
hexmask.long.word 0xE3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE40 "DOC0EXPD5008,"
hexmask.long.word 0xE40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE44 "DOC0EXPD5009,"
hexmask.long.word 0xE44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE48 "DOC0EXPD5010,"
hexmask.long.word 0xE48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE4C "DOC0EXPD5011,"
hexmask.long.word 0xE4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE50 "DOC0EXPD5012,"
hexmask.long.word 0xE50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE54 "DOC0EXPD5013,"
hexmask.long.word 0xE54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE58 "DOC0EXPD5014,"
hexmask.long.word 0xE58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE5C "DOC0EXPD5015,"
hexmask.long.word 0xE5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE60 "DOC0EXPD5016,"
hexmask.long.word 0xE60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE64 "DOC0EXPD5017,"
hexmask.long.word 0xE64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE68 "DOC0EXPD5018,"
hexmask.long.word 0xE68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE6C "DOC0EXPD5019,"
hexmask.long.word 0xE6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE70 "DOC0EXPD5020,"
hexmask.long.word 0xE70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE74 "DOC0EXPD5021,"
hexmask.long.word 0xE74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE78 "DOC0EXPD5022,"
hexmask.long.word 0xE78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE7C "DOC0EXPD5023,"
hexmask.long.word 0xE7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE80 "DOC0EXPD5024,"
hexmask.long.word 0xE80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE84 "DOC0EXPD5025,"
hexmask.long.word 0xE84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE88 "DOC0EXPD5026,"
hexmask.long.word 0xE88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE8C "DOC0EXPD5027,"
hexmask.long.word 0xE8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE90 "DOC0EXPD5028,"
hexmask.long.word 0xE90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE94 "DOC0EXPD5029,"
hexmask.long.word 0xE94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE98 "DOC0EXPD5030,"
hexmask.long.word 0xE98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE9C "DOC0EXPD5031,"
hexmask.long.word 0xE9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA0 "DOC0EXPD5032,"
hexmask.long.word 0xEA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA4 "DOC0EXPD5033,"
hexmask.long.word 0xEA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA8 "DOC0EXPD5034,"
hexmask.long.word 0xEA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEAC "DOC0EXPD5035,"
hexmask.long.word 0xEAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB0 "DOC0EXPD5036,"
hexmask.long.word 0xEB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB4 "DOC0EXPD5037,"
hexmask.long.word 0xEB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB8 "DOC0EXPD5038,"
hexmask.long.word 0xEB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEBC "DOC0EXPD5039,"
hexmask.long.word 0xEBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC0 "DOC0EXPD5040,"
hexmask.long.word 0xEC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC4 "DOC0EXPD5041,"
hexmask.long.word 0xEC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC8 "DOC0EXPD5042,"
hexmask.long.word 0xEC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xECC "DOC0EXPD5043,"
hexmask.long.word 0xECC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xECC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xECC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xECC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xECC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xECC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xECC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xECC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xECC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED0 "DOC0EXPD5044,"
hexmask.long.word 0xED0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED4 "DOC0EXPD5045,"
hexmask.long.word 0xED4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED8 "DOC0EXPD5046,"
hexmask.long.word 0xED8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEDC "DOC0EXPD5047,"
hexmask.long.word 0xEDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE0 "DOC0EXPD5048,"
hexmask.long.word 0xEE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE4 "DOC0EXPD5049,"
hexmask.long.word 0xEE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE8 "DOC0EXPD5050,"
hexmask.long.word 0xEE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEEC "DOC0EXPD5051,"
hexmask.long.word 0xEEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF0 "DOC0EXPD5052,"
hexmask.long.word 0xEF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF4 "DOC0EXPD5053,"
hexmask.long.word 0xEF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF8 "DOC0EXPD5054,"
hexmask.long.word 0xEF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEFC "DOC0EXPD5055,"
hexmask.long.word 0xEFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF00 "DOC0EXPD5056,"
hexmask.long.word 0xF00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF04 "DOC0EXPD5057,"
hexmask.long.word 0xF04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF08 "DOC0EXPD5058,"
hexmask.long.word 0xF08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF0C "DOC0EXPD5059,"
hexmask.long.word 0xF0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF10 "DOC0EXPD5060,"
hexmask.long.word 0xF10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF14 "DOC0EXPD5061,"
hexmask.long.word 0xF14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF18 "DOC0EXPD5062,"
hexmask.long.word 0xF18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF1C "DOC0EXPD5063,"
hexmask.long.word 0xF1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF20 "DOC0EXPD5064,"
hexmask.long.word 0xF20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF24 "DOC0EXPD5065,"
hexmask.long.word 0xF24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF28 "DOC0EXPD5066,"
hexmask.long.word 0xF28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF2C "DOC0EXPD5067,"
hexmask.long.word 0xF2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF30 "DOC0EXPD5068,"
hexmask.long.word 0xF30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF34 "DOC0EXPD5069,"
hexmask.long.word 0xF34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF38 "DOC0EXPD5070,"
hexmask.long.word 0xF38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF3C "DOC0EXPD5071,"
hexmask.long.word 0xF3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF40 "DOC0EXPD5072,"
hexmask.long.word 0xF40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF44 "DOC0EXPD5073,"
hexmask.long.word 0xF44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF48 "DOC0EXPD5074,"
hexmask.long.word 0xF48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF4C "DOC0EXPD5075,"
hexmask.long.word 0xF4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF50 "DOC0EXPD5076,"
hexmask.long.word 0xF50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF54 "DOC0EXPD5077,"
hexmask.long.word 0xF54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF58 "DOC0EXPD5078,"
hexmask.long.word 0xF58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF5C "DOC0EXPD5079,"
hexmask.long.word 0xF5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF60 "DOC0EXPD5080,"
hexmask.long.word 0xF60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF64 "DOC0EXPD5081,"
hexmask.long.word 0xF64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF68 "DOC0EXPD5082,"
hexmask.long.word 0xF68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF6C "DOC0EXPD5083,"
hexmask.long.word 0xF6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF70 "DOC0EXPD5084,"
hexmask.long.word 0xF70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF74 "DOC0EXPD5085,"
hexmask.long.word 0xF74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF78 "DOC0EXPD5086,"
hexmask.long.word 0xF78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF7C "DOC0EXPD5087,"
hexmask.long.word 0xF7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF80 "DOC0EXPD5088,"
hexmask.long.word 0xF80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF84 "DOC0EXPD5089,"
hexmask.long.word 0xF84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF88 "DOC0EXPD5090,"
hexmask.long.word 0xF88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF8C "DOC0EXPD5091,"
hexmask.long.word 0xF8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF90 "DOC0EXPD5092,"
hexmask.long.word 0xF90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF94 "DOC0EXPD5093,"
hexmask.long.word 0xF94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF98 "DOC0EXPD5094,"
hexmask.long.word 0xF98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF9C "DOC0EXPD5095,"
hexmask.long.word 0xF9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA0 "DOC0EXPD5096,"
hexmask.long.word 0xFA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA4 "DOC0EXPD5097,"
hexmask.long.word 0xFA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA8 "DOC0EXPD5098,"
hexmask.long.word 0xFA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFAC "DOC0EXPD5099,"
hexmask.long.word 0xFAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB0 "DOC0EXPD5100,"
hexmask.long.word 0xFB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB4 "DOC0EXPD5101,"
hexmask.long.word 0xFB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB8 "DOC0EXPD5102,"
hexmask.long.word 0xFB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFBC "DOC0EXPD5103,"
hexmask.long.word 0xFBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC0 "DOC0EXPD5104,"
hexmask.long.word 0xFC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC4 "DOC0EXPD5105,"
hexmask.long.word 0xFC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC8 "DOC0EXPD5106,"
hexmask.long.word 0xFC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFCC "DOC0EXPD5107,"
hexmask.long.word 0xFCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD0 "DOC0EXPD5108,"
hexmask.long.word 0xFD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD4 "DOC0EXPD5109,"
hexmask.long.word 0xFD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD8 "DOC0EXPD5110,"
hexmask.long.word 0xFD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFDC "DOC0EXPD5111,"
hexmask.long.word 0xFDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE0 "DOC0EXPD5112,"
hexmask.long.word 0xFE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE4 "DOC0EXPD5113,"
hexmask.long.word 0xFE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE8 "DOC0EXPD5114,"
hexmask.long.word 0xFE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFEC "DOC0EXPD5115,"
hexmask.long.word 0xFEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF0 "DOC0EXPD5116,"
hexmask.long.word 0xFF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF4 "DOC0EXPD5117,"
hexmask.long.word 0xFF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF8 "DOC0EXPD5118,"
hexmask.long.word 0xFF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFFC "DOC0EXPD5119,"
hexmask.long.word 0xFFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
group.long 0x9300++0xFFF
line.long 0x0 "DOC0EXPD5120,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4 "DOC0EXPD5121,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8 "DOC0EXPD5122,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC "DOC0EXPD5123,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x10 "DOC0EXPD5124,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x14 "DOC0EXPD5125,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x18 "DOC0EXPD5126,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C "DOC0EXPD5127,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x20 "DOC0EXPD5128,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x24 "DOC0EXPD5129,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x28 "DOC0EXPD5130,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C "DOC0EXPD5131,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x30 "DOC0EXPD5132,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x34 "DOC0EXPD5133,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x38 "DOC0EXPD5134,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C "DOC0EXPD5135,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x40 "DOC0EXPD5136,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x44 "DOC0EXPD5137,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x48 "DOC0EXPD5138,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C "DOC0EXPD5139,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x50 "DOC0EXPD5140,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x54 "DOC0EXPD5141,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x58 "DOC0EXPD5142,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C "DOC0EXPD5143,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x60 "DOC0EXPD5144,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x64 "DOC0EXPD5145,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x68 "DOC0EXPD5146,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C "DOC0EXPD5147,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x70 "DOC0EXPD5148,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x74 "DOC0EXPD5149,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x78 "DOC0EXPD5150,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C "DOC0EXPD5151,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x80 "DOC0EXPD5152,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x84 "DOC0EXPD5153,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x88 "DOC0EXPD5154,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C "DOC0EXPD5155,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x90 "DOC0EXPD5156,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x94 "DOC0EXPD5157,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x98 "DOC0EXPD5158,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C "DOC0EXPD5159,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA0 "DOC0EXPD5160,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA4 "DOC0EXPD5161,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA8 "DOC0EXPD5162,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC "DOC0EXPD5163,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB0 "DOC0EXPD5164,"
hexmask.long.word 0xB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB4 "DOC0EXPD5165,"
hexmask.long.word 0xB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB8 "DOC0EXPD5166,"
hexmask.long.word 0xB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC "DOC0EXPD5167,"
hexmask.long.word 0xBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC0 "DOC0EXPD5168,"
hexmask.long.word 0xC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC4 "DOC0EXPD5169,"
hexmask.long.word 0xC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC8 "DOC0EXPD5170,"
hexmask.long.word 0xC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC "DOC0EXPD5171,"
hexmask.long.word 0xCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD0 "DOC0EXPD5172,"
hexmask.long.word 0xD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD4 "DOC0EXPD5173,"
hexmask.long.word 0xD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD8 "DOC0EXPD5174,"
hexmask.long.word 0xD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC "DOC0EXPD5175,"
hexmask.long.word 0xDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE0 "DOC0EXPD5176,"
hexmask.long.word 0xE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE4 "DOC0EXPD5177,"
hexmask.long.word 0xE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE8 "DOC0EXPD5178,"
hexmask.long.word 0xE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC "DOC0EXPD5179,"
hexmask.long.word 0xEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF0 "DOC0EXPD5180,"
hexmask.long.word 0xF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF4 "DOC0EXPD5181,"
hexmask.long.word 0xF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF8 "DOC0EXPD5182,"
hexmask.long.word 0xF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC "DOC0EXPD5183,"
hexmask.long.word 0xFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x100 "DOC0EXPD5184,"
hexmask.long.word 0x100 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x100 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x100 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x100 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x100 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x100 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x100 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x100 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x100 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x104 "DOC0EXPD5185,"
hexmask.long.word 0x104 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x104 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x104 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x104 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x104 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x104 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x104 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x104 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x104 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x108 "DOC0EXPD5186,"
hexmask.long.word 0x108 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x108 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x108 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x108 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x108 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x108 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x108 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x108 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x108 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x10C "DOC0EXPD5187,"
hexmask.long.word 0x10C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x10C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x10C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x10C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x10C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x10C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x10C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x10C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x10C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x110 "DOC0EXPD5188,"
hexmask.long.word 0x110 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x110 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x110 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x110 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x110 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x110 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x110 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x110 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x110 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x114 "DOC0EXPD5189,"
hexmask.long.word 0x114 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x114 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x114 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x114 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x114 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x114 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x114 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x114 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x114 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x118 "DOC0EXPD5190,"
hexmask.long.word 0x118 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x118 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x118 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x118 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x118 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x118 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x118 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x118 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x118 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x11C "DOC0EXPD5191,"
hexmask.long.word 0x11C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x11C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x11C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x11C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x11C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x11C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x11C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x11C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x11C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x120 "DOC0EXPD5192,"
hexmask.long.word 0x120 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x120 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x120 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x120 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x120 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x120 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x120 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x120 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x120 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x124 "DOC0EXPD5193,"
hexmask.long.word 0x124 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x124 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x124 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x124 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x124 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x124 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x124 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x124 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x124 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x128 "DOC0EXPD5194,"
hexmask.long.word 0x128 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x128 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x128 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x128 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x128 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x128 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x128 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x128 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x128 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x12C "DOC0EXPD5195,"
hexmask.long.word 0x12C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x12C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x12C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x12C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x12C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x12C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x12C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x12C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x12C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x130 "DOC0EXPD5196,"
hexmask.long.word 0x130 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x130 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x130 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x130 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x130 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x130 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x130 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x130 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x130 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x134 "DOC0EXPD5197,"
hexmask.long.word 0x134 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x134 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x134 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x134 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x134 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x134 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x134 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x134 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x134 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x138 "DOC0EXPD5198,"
hexmask.long.word 0x138 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x138 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x138 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x138 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x138 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x138 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x138 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x138 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x138 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x13C "DOC0EXPD5199,"
hexmask.long.word 0x13C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x13C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x13C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x13C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x13C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x13C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x13C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x13C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x13C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x140 "DOC0EXPD5200,"
hexmask.long.word 0x140 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x140 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x140 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x140 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x140 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x140 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x140 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x140 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x140 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x144 "DOC0EXPD5201,"
hexmask.long.word 0x144 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x144 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x144 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x144 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x144 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x144 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x144 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x144 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x144 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x148 "DOC0EXPD5202,"
hexmask.long.word 0x148 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x148 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x148 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x148 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x148 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x148 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x148 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x148 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x148 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x14C "DOC0EXPD5203,"
hexmask.long.word 0x14C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x14C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x14C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x14C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x14C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x14C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x14C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x14C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x150 "DOC0EXPD5204,"
hexmask.long.word 0x150 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x150 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x150 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x150 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x150 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x150 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x150 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x150 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x150 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x154 "DOC0EXPD5205,"
hexmask.long.word 0x154 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x154 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x154 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x154 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x154 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x154 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x154 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x154 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x154 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x158 "DOC0EXPD5206,"
hexmask.long.word 0x158 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x158 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x158 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x158 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x158 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x158 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x158 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x158 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x158 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x15C "DOC0EXPD5207,"
hexmask.long.word 0x15C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x15C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x15C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x15C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x15C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x15C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x15C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x15C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x15C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x160 "DOC0EXPD5208,"
hexmask.long.word 0x160 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x160 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x160 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x160 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x160 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x160 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x160 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x160 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x160 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x164 "DOC0EXPD5209,"
hexmask.long.word 0x164 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x164 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x164 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x164 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x164 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x164 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x164 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x164 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x164 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x168 "DOC0EXPD5210,"
hexmask.long.word 0x168 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x168 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x168 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x168 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x168 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x168 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x168 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x168 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x168 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x16C "DOC0EXPD5211,"
hexmask.long.word 0x16C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x16C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x16C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x16C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x16C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x16C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x16C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x16C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x16C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x170 "DOC0EXPD5212,"
hexmask.long.word 0x170 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x170 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x170 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x170 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x170 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x170 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x170 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x170 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x170 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x174 "DOC0EXPD5213,"
hexmask.long.word 0x174 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x174 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x174 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x174 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x174 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x174 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x174 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x174 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x174 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x178 "DOC0EXPD5214,"
hexmask.long.word 0x178 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x178 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x178 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x178 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x178 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x178 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x178 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x178 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x178 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x17C "DOC0EXPD5215,"
hexmask.long.word 0x17C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x17C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x17C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x17C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x17C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x17C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x17C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x17C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x17C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x180 "DOC0EXPD5216,"
hexmask.long.word 0x180 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x180 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x180 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x180 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x180 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x180 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x180 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x180 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x180 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x184 "DOC0EXPD5217,"
hexmask.long.word 0x184 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x184 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x184 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x184 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x184 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x184 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x184 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x184 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x184 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x188 "DOC0EXPD5218,"
hexmask.long.word 0x188 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x188 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x188 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x188 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x188 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x188 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x188 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x188 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x188 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x18C "DOC0EXPD5219,"
hexmask.long.word 0x18C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x18C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x18C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x18C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x18C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x18C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x18C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x18C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x18C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x190 "DOC0EXPD5220,"
hexmask.long.word 0x190 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x190 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x190 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x190 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x190 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x190 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x190 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x190 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x190 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x194 "DOC0EXPD5221,"
hexmask.long.word 0x194 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x194 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x194 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x194 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x194 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x194 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x194 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x194 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x194 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x198 "DOC0EXPD5222,"
hexmask.long.word 0x198 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x198 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x198 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x198 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x198 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x198 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x198 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x198 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x198 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x19C "DOC0EXPD5223,"
hexmask.long.word 0x19C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x19C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x19C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x19C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x19C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x19C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x19C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x19C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x19C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A0 "DOC0EXPD5224,"
hexmask.long.word 0x1A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A4 "DOC0EXPD5225,"
hexmask.long.word 0x1A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A8 "DOC0EXPD5226,"
hexmask.long.word 0x1A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1AC "DOC0EXPD5227,"
hexmask.long.word 0x1AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B0 "DOC0EXPD5228,"
hexmask.long.word 0x1B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B4 "DOC0EXPD5229,"
hexmask.long.word 0x1B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B8 "DOC0EXPD5230,"
hexmask.long.word 0x1B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1BC "DOC0EXPD5231,"
hexmask.long.word 0x1BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C0 "DOC0EXPD5232,"
hexmask.long.word 0x1C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C4 "DOC0EXPD5233,"
hexmask.long.word 0x1C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C8 "DOC0EXPD5234,"
hexmask.long.word 0x1C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1CC "DOC0EXPD5235,"
hexmask.long.word 0x1CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D0 "DOC0EXPD5236,"
hexmask.long.word 0x1D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D4 "DOC0EXPD5237,"
hexmask.long.word 0x1D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D8 "DOC0EXPD5238,"
hexmask.long.word 0x1D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1DC "DOC0EXPD5239,"
hexmask.long.word 0x1DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E0 "DOC0EXPD5240,"
hexmask.long.word 0x1E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E4 "DOC0EXPD5241,"
hexmask.long.word 0x1E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E8 "DOC0EXPD5242,"
hexmask.long.word 0x1E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1EC "DOC0EXPD5243,"
hexmask.long.word 0x1EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F0 "DOC0EXPD5244,"
hexmask.long.word 0x1F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F4 "DOC0EXPD5245,"
hexmask.long.word 0x1F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F8 "DOC0EXPD5246,"
hexmask.long.word 0x1F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1FC "DOC0EXPD5247,"
hexmask.long.word 0x1FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x200 "DOC0EXPD5248,"
hexmask.long.word 0x200 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x200 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x200 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x200 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x200 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x200 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x200 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x200 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x200 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x204 "DOC0EXPD5249,"
hexmask.long.word 0x204 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x204 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x204 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x204 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x204 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x204 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x204 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x204 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x204 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x208 "DOC0EXPD5250,"
hexmask.long.word 0x208 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x208 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x208 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x208 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x208 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x208 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x208 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x208 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x208 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x20C "DOC0EXPD5251,"
hexmask.long.word 0x20C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x20C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x20C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x20C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x20C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x20C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x20C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x20C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x20C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x210 "DOC0EXPD5252,"
hexmask.long.word 0x210 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x210 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x210 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x210 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x210 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x210 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x210 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x210 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x210 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x214 "DOC0EXPD5253,"
hexmask.long.word 0x214 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x214 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x214 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x214 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x214 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x214 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x214 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x214 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x214 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x218 "DOC0EXPD5254,"
hexmask.long.word 0x218 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x218 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x218 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x218 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x218 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x218 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x218 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x218 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x218 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x21C "DOC0EXPD5255,"
hexmask.long.word 0x21C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x21C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x21C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x21C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x21C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x21C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x21C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x21C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x21C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x220 "DOC0EXPD5256,"
hexmask.long.word 0x220 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x220 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x220 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x220 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x220 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x220 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x220 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x220 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x220 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x224 "DOC0EXPD5257,"
hexmask.long.word 0x224 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x224 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x224 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x224 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x224 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x224 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x224 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x224 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x224 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x228 "DOC0EXPD5258,"
hexmask.long.word 0x228 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x228 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x228 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x228 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x228 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x228 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x228 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x228 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x228 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x22C "DOC0EXPD5259,"
hexmask.long.word 0x22C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x22C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x22C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x22C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x22C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x22C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x22C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x22C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x22C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x230 "DOC0EXPD5260,"
hexmask.long.word 0x230 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x230 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x230 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x230 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x230 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x230 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x230 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x230 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x230 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x234 "DOC0EXPD5261,"
hexmask.long.word 0x234 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x234 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x234 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x234 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x234 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x234 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x234 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x234 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x234 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x238 "DOC0EXPD5262,"
hexmask.long.word 0x238 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x238 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x238 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x238 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x238 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x238 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x238 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x238 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x238 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x23C "DOC0EXPD5263,"
hexmask.long.word 0x23C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x23C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x23C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x23C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x23C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x23C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x23C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x23C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x23C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x240 "DOC0EXPD5264,"
hexmask.long.word 0x240 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x240 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x240 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x240 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x240 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x240 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x240 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x240 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x240 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x244 "DOC0EXPD5265,"
hexmask.long.word 0x244 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x244 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x244 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x244 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x244 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x244 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x244 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x244 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x244 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x248 "DOC0EXPD5266,"
hexmask.long.word 0x248 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x248 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x248 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x248 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x248 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x248 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x248 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x248 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x248 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x24C "DOC0EXPD5267,"
hexmask.long.word 0x24C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x24C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x24C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x24C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x24C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x24C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x24C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x24C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x24C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x250 "DOC0EXPD5268,"
hexmask.long.word 0x250 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x250 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x250 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x250 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x250 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x250 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x250 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x250 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x250 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x254 "DOC0EXPD5269,"
hexmask.long.word 0x254 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x254 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x254 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x254 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x254 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x254 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x254 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x254 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x254 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x258 "DOC0EXPD5270,"
hexmask.long.word 0x258 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x258 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x258 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x258 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x258 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x258 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x258 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x258 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x258 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x25C "DOC0EXPD5271,"
hexmask.long.word 0x25C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x25C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x25C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x25C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x25C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x25C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x25C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x25C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x25C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x260 "DOC0EXPD5272,"
hexmask.long.word 0x260 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x260 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x260 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x260 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x260 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x260 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x260 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x260 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x260 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x264 "DOC0EXPD5273,"
hexmask.long.word 0x264 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x264 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x264 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x264 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x264 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x264 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x264 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x264 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x264 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x268 "DOC0EXPD5274,"
hexmask.long.word 0x268 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x268 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x268 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x268 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x268 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x268 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x268 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x268 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x268 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x26C "DOC0EXPD5275,"
hexmask.long.word 0x26C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x26C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x26C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x26C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x26C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x26C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x26C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x26C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x26C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x270 "DOC0EXPD5276,"
hexmask.long.word 0x270 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x270 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x270 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x270 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x270 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x270 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x270 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x270 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x270 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x274 "DOC0EXPD5277,"
hexmask.long.word 0x274 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x274 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x274 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x274 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x274 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x274 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x274 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x274 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x274 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x278 "DOC0EXPD5278,"
hexmask.long.word 0x278 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x278 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x278 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x278 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x278 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x278 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x278 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x278 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x278 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x27C "DOC0EXPD5279,"
hexmask.long.word 0x27C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x27C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x27C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x27C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x27C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x27C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x27C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x27C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x27C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x280 "DOC0EXPD5280,"
hexmask.long.word 0x280 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x280 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x280 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x280 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x280 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x280 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x280 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x280 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x280 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x284 "DOC0EXPD5281,"
hexmask.long.word 0x284 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x284 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x284 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x284 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x284 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x284 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x284 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x284 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x284 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x288 "DOC0EXPD5282,"
hexmask.long.word 0x288 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x288 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x288 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x288 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x288 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x288 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x288 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x288 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x288 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x28C "DOC0EXPD5283,"
hexmask.long.word 0x28C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x28C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x28C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x28C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x28C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x28C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x28C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x28C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x28C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x290 "DOC0EXPD5284,"
hexmask.long.word 0x290 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x290 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x290 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x290 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x290 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x290 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x290 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x290 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x290 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x294 "DOC0EXPD5285,"
hexmask.long.word 0x294 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x294 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x294 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x294 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x294 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x294 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x294 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x294 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x294 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x298 "DOC0EXPD5286,"
hexmask.long.word 0x298 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x298 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x298 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x298 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x298 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x298 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x298 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x298 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x298 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x29C "DOC0EXPD5287,"
hexmask.long.word 0x29C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x29C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x29C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x29C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x29C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x29C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x29C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x29C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x29C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A0 "DOC0EXPD5288,"
hexmask.long.word 0x2A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A4 "DOC0EXPD5289,"
hexmask.long.word 0x2A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A8 "DOC0EXPD5290,"
hexmask.long.word 0x2A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2AC "DOC0EXPD5291,"
hexmask.long.word 0x2AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B0 "DOC0EXPD5292,"
hexmask.long.word 0x2B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B4 "DOC0EXPD5293,"
hexmask.long.word 0x2B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B8 "DOC0EXPD5294,"
hexmask.long.word 0x2B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2BC "DOC0EXPD5295,"
hexmask.long.word 0x2BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C0 "DOC0EXPD5296,"
hexmask.long.word 0x2C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C4 "DOC0EXPD5297,"
hexmask.long.word 0x2C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C8 "DOC0EXPD5298,"
hexmask.long.word 0x2C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2CC "DOC0EXPD5299,"
hexmask.long.word 0x2CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D0 "DOC0EXPD5300,"
hexmask.long.word 0x2D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D4 "DOC0EXPD5301,"
hexmask.long.word 0x2D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D8 "DOC0EXPD5302,"
hexmask.long.word 0x2D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2DC "DOC0EXPD5303,"
hexmask.long.word 0x2DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E0 "DOC0EXPD5304,"
hexmask.long.word 0x2E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E4 "DOC0EXPD5305,"
hexmask.long.word 0x2E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E8 "DOC0EXPD5306,"
hexmask.long.word 0x2E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2EC "DOC0EXPD5307,"
hexmask.long.word 0x2EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F0 "DOC0EXPD5308,"
hexmask.long.word 0x2F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F4 "DOC0EXPD5309,"
hexmask.long.word 0x2F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F8 "DOC0EXPD5310,"
hexmask.long.word 0x2F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2FC "DOC0EXPD5311,"
hexmask.long.word 0x2FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x300 "DOC0EXPD5312,"
hexmask.long.word 0x300 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x300 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x300 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x300 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x300 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x300 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x300 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x300 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x300 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x304 "DOC0EXPD5313,"
hexmask.long.word 0x304 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x304 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x304 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x304 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x304 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x304 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x304 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x304 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x304 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x308 "DOC0EXPD5314,"
hexmask.long.word 0x308 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x308 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x308 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x308 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x308 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x308 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x308 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x308 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x308 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x30C "DOC0EXPD5315,"
hexmask.long.word 0x30C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x30C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x30C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x30C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x30C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x30C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x30C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x30C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x30C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x310 "DOC0EXPD5316,"
hexmask.long.word 0x310 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x310 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x310 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x310 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x310 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x310 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x310 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x310 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x310 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x314 "DOC0EXPD5317,"
hexmask.long.word 0x314 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x314 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x314 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x314 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x314 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x314 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x314 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x314 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x314 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x318 "DOC0EXPD5318,"
hexmask.long.word 0x318 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x318 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x318 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x318 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x318 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x318 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x318 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x318 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x318 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x31C "DOC0EXPD5319,"
hexmask.long.word 0x31C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x31C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x31C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x31C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x31C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x31C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x31C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x31C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x31C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x320 "DOC0EXPD5320,"
hexmask.long.word 0x320 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x320 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x320 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x320 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x320 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x320 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x320 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x320 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x320 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x324 "DOC0EXPD5321,"
hexmask.long.word 0x324 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x324 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x324 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x324 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x324 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x324 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x324 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x324 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x324 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x328 "DOC0EXPD5322,"
hexmask.long.word 0x328 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x328 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x328 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x328 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x328 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x328 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x328 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x328 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x328 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x32C "DOC0EXPD5323,"
hexmask.long.word 0x32C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x32C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x32C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x32C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x32C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x32C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x32C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x32C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x32C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x330 "DOC0EXPD5324,"
hexmask.long.word 0x330 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x330 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x330 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x330 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x330 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x330 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x330 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x330 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x330 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x334 "DOC0EXPD5325,"
hexmask.long.word 0x334 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x334 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x334 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x334 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x334 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x334 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x334 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x334 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x334 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x338 "DOC0EXPD5326,"
hexmask.long.word 0x338 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x338 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x338 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x338 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x338 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x338 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x338 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x338 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x338 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x33C "DOC0EXPD5327,"
hexmask.long.word 0x33C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x33C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x33C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x33C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x33C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x33C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x33C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x33C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x33C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x340 "DOC0EXPD5328,"
hexmask.long.word 0x340 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x340 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x340 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x340 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x340 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x340 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x340 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x340 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x340 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x344 "DOC0EXPD5329,"
hexmask.long.word 0x344 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x344 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x344 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x344 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x344 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x344 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x344 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x344 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x344 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x348 "DOC0EXPD5330,"
hexmask.long.word 0x348 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x348 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x348 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x348 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x348 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x348 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x348 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x348 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x348 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x34C "DOC0EXPD5331,"
hexmask.long.word 0x34C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x34C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x34C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x34C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x34C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x34C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x34C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x34C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x34C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x350 "DOC0EXPD5332,"
hexmask.long.word 0x350 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x350 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x350 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x350 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x350 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x350 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x350 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x350 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x350 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x354 "DOC0EXPD5333,"
hexmask.long.word 0x354 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x354 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x354 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x354 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x354 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x354 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x354 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x354 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x354 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x358 "DOC0EXPD5334,"
hexmask.long.word 0x358 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x358 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x358 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x358 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x358 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x358 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x358 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x358 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x358 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x35C "DOC0EXPD5335,"
hexmask.long.word 0x35C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x35C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x35C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x35C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x35C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x35C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x35C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x35C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x35C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x360 "DOC0EXPD5336,"
hexmask.long.word 0x360 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x360 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x360 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x360 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x360 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x360 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x360 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x360 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x360 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x364 "DOC0EXPD5337,"
hexmask.long.word 0x364 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x364 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x364 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x364 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x364 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x364 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x364 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x364 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x364 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x368 "DOC0EXPD5338,"
hexmask.long.word 0x368 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x368 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x368 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x368 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x368 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x368 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x368 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x368 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x368 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x36C "DOC0EXPD5339,"
hexmask.long.word 0x36C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x36C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x36C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x36C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x36C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x36C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x36C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x36C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x36C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x370 "DOC0EXPD5340,"
hexmask.long.word 0x370 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x370 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x370 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x370 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x370 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x370 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x370 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x370 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x370 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x374 "DOC0EXPD5341,"
hexmask.long.word 0x374 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x374 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x374 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x374 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x374 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x374 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x374 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x374 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x374 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x378 "DOC0EXPD5342,"
hexmask.long.word 0x378 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x378 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x378 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x378 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x378 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x378 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x378 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x378 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x378 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x37C "DOC0EXPD5343,"
hexmask.long.word 0x37C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x37C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x37C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x37C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x37C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x37C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x37C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x37C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x37C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x380 "DOC0EXPD5344,"
hexmask.long.word 0x380 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x380 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x380 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x380 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x380 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x380 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x380 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x380 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x380 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x384 "DOC0EXPD5345,"
hexmask.long.word 0x384 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x384 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x384 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x384 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x384 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x384 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x384 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x384 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x384 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x388 "DOC0EXPD5346,"
hexmask.long.word 0x388 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x388 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x388 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x388 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x388 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x388 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x388 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x388 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x388 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x38C "DOC0EXPD5347,"
hexmask.long.word 0x38C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x38C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x38C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x38C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x38C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x38C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x38C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x38C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x38C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x390 "DOC0EXPD5348,"
hexmask.long.word 0x390 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x390 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x390 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x390 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x390 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x390 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x390 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x390 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x390 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x394 "DOC0EXPD5349,"
hexmask.long.word 0x394 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x394 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x394 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x394 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x394 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x394 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x394 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x394 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x394 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x398 "DOC0EXPD5350,"
hexmask.long.word 0x398 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x398 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x398 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x398 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x398 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x398 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x398 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x398 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x398 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x39C "DOC0EXPD5351,"
hexmask.long.word 0x39C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x39C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x39C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x39C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x39C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x39C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x39C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x39C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x39C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A0 "DOC0EXPD5352,"
hexmask.long.word 0x3A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A4 "DOC0EXPD5353,"
hexmask.long.word 0x3A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A8 "DOC0EXPD5354,"
hexmask.long.word 0x3A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3AC "DOC0EXPD5355,"
hexmask.long.word 0x3AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B0 "DOC0EXPD5356,"
hexmask.long.word 0x3B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B4 "DOC0EXPD5357,"
hexmask.long.word 0x3B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B8 "DOC0EXPD5358,"
hexmask.long.word 0x3B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3BC "DOC0EXPD5359,"
hexmask.long.word 0x3BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C0 "DOC0EXPD5360,"
hexmask.long.word 0x3C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C4 "DOC0EXPD5361,"
hexmask.long.word 0x3C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C8 "DOC0EXPD5362,"
hexmask.long.word 0x3C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3CC "DOC0EXPD5363,"
hexmask.long.word 0x3CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D0 "DOC0EXPD5364,"
hexmask.long.word 0x3D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D4 "DOC0EXPD5365,"
hexmask.long.word 0x3D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D8 "DOC0EXPD5366,"
hexmask.long.word 0x3D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3DC "DOC0EXPD5367,"
hexmask.long.word 0x3DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E0 "DOC0EXPD5368,"
hexmask.long.word 0x3E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E4 "DOC0EXPD5369,"
hexmask.long.word 0x3E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E8 "DOC0EXPD5370,"
hexmask.long.word 0x3E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3EC "DOC0EXPD5371,"
hexmask.long.word 0x3EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F0 "DOC0EXPD5372,"
hexmask.long.word 0x3F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F4 "DOC0EXPD5373,"
hexmask.long.word 0x3F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F8 "DOC0EXPD5374,"
hexmask.long.word 0x3F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3FC "DOC0EXPD5375,"
hexmask.long.word 0x3FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x400 "DOC0EXPD5376,"
hexmask.long.word 0x400 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x400 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x400 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x400 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x400 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x400 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x400 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x400 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x400 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x404 "DOC0EXPD5377,"
hexmask.long.word 0x404 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x404 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x404 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x404 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x404 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x404 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x404 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x404 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x404 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x408 "DOC0EXPD5378,"
hexmask.long.word 0x408 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x408 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x408 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x408 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x408 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x408 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x408 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x408 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x408 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x40C "DOC0EXPD5379,"
hexmask.long.word 0x40C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x40C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x40C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x40C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x40C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x40C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x40C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x40C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x40C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x410 "DOC0EXPD5380,"
hexmask.long.word 0x410 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x410 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x410 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x410 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x410 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x410 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x410 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x410 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x410 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x414 "DOC0EXPD5381,"
hexmask.long.word 0x414 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x414 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x414 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x414 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x414 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x414 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x414 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x414 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x414 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x418 "DOC0EXPD5382,"
hexmask.long.word 0x418 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x418 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x418 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x418 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x418 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x418 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x418 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x418 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x418 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x41C "DOC0EXPD5383,"
hexmask.long.word 0x41C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x41C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x41C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x41C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x41C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x41C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x41C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x41C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x41C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x420 "DOC0EXPD5384,"
hexmask.long.word 0x420 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x420 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x420 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x420 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x420 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x420 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x420 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x420 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x420 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x424 "DOC0EXPD5385,"
hexmask.long.word 0x424 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x424 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x424 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x424 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x424 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x424 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x424 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x424 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x424 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x428 "DOC0EXPD5386,"
hexmask.long.word 0x428 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x428 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x428 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x428 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x428 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x428 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x428 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x428 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x428 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x42C "DOC0EXPD5387,"
hexmask.long.word 0x42C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x42C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x42C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x42C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x42C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x42C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x42C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x42C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x42C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x430 "DOC0EXPD5388,"
hexmask.long.word 0x430 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x430 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x430 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x430 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x430 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x430 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x430 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x430 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x430 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x434 "DOC0EXPD5389,"
hexmask.long.word 0x434 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x434 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x434 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x434 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x434 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x434 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x434 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x434 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x434 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x438 "DOC0EXPD5390,"
hexmask.long.word 0x438 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x438 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x438 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x438 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x438 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x438 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x438 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x438 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x438 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x43C "DOC0EXPD5391,"
hexmask.long.word 0x43C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x43C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x43C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x43C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x43C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x43C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x43C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x43C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x43C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x440 "DOC0EXPD5392,"
hexmask.long.word 0x440 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x440 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x440 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x440 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x440 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x440 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x440 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x440 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x440 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x444 "DOC0EXPD5393,"
hexmask.long.word 0x444 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x444 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x444 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x444 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x444 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x444 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x444 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x444 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x444 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x448 "DOC0EXPD5394,"
hexmask.long.word 0x448 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x448 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x448 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x448 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x448 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x448 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x448 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x448 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x448 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x44C "DOC0EXPD5395,"
hexmask.long.word 0x44C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x44C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x44C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x44C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x44C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x44C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x44C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x44C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x44C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x450 "DOC0EXPD5396,"
hexmask.long.word 0x450 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x450 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x450 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x450 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x450 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x450 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x450 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x450 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x450 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x454 "DOC0EXPD5397,"
hexmask.long.word 0x454 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x454 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x454 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x454 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x454 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x454 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x454 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x454 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x454 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x458 "DOC0EXPD5398,"
hexmask.long.word 0x458 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x458 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x458 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x458 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x458 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x458 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x458 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x458 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x458 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x45C "DOC0EXPD5399,"
hexmask.long.word 0x45C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x45C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x45C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x45C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x45C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x45C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x45C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x45C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x45C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x460 "DOC0EXPD5400,"
hexmask.long.word 0x460 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x460 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x460 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x460 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x460 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x460 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x460 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x460 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x460 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x464 "DOC0EXPD5401,"
hexmask.long.word 0x464 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x464 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x464 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x464 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x464 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x464 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x464 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x464 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x464 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x468 "DOC0EXPD5402,"
hexmask.long.word 0x468 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x468 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x468 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x468 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x468 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x468 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x468 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x468 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x468 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x46C "DOC0EXPD5403,"
hexmask.long.word 0x46C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x46C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x46C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x46C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x46C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x46C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x46C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x46C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x46C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x470 "DOC0EXPD5404,"
hexmask.long.word 0x470 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x470 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x470 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x470 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x470 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x470 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x470 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x470 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x470 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x474 "DOC0EXPD5405,"
hexmask.long.word 0x474 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x474 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x474 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x474 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x474 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x474 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x474 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x474 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x474 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x478 "DOC0EXPD5406,"
hexmask.long.word 0x478 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x478 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x478 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x478 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x478 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x478 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x478 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x478 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x478 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x47C "DOC0EXPD5407,"
hexmask.long.word 0x47C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x47C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x47C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x47C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x47C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x47C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x47C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x47C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x47C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x480 "DOC0EXPD5408,"
hexmask.long.word 0x480 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x480 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x480 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x480 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x480 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x480 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x480 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x480 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x480 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x484 "DOC0EXPD5409,"
hexmask.long.word 0x484 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x484 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x484 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x484 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x484 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x484 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x484 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x484 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x484 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x488 "DOC0EXPD5410,"
hexmask.long.word 0x488 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x488 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x488 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x488 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x488 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x488 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x488 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x488 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x488 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x48C "DOC0EXPD5411,"
hexmask.long.word 0x48C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x48C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x48C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x48C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x48C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x48C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x48C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x48C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x48C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x490 "DOC0EXPD5412,"
hexmask.long.word 0x490 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x490 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x490 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x490 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x490 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x490 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x490 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x490 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x490 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x494 "DOC0EXPD5413,"
hexmask.long.word 0x494 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x494 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x494 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x494 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x494 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x494 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x494 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x494 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x494 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x498 "DOC0EXPD5414,"
hexmask.long.word 0x498 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x498 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x498 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x498 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x498 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x498 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x498 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x498 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x498 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x49C "DOC0EXPD5415,"
hexmask.long.word 0x49C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x49C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x49C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x49C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x49C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x49C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x49C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x49C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x49C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A0 "DOC0EXPD5416,"
hexmask.long.word 0x4A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A4 "DOC0EXPD5417,"
hexmask.long.word 0x4A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A8 "DOC0EXPD5418,"
hexmask.long.word 0x4A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4AC "DOC0EXPD5419,"
hexmask.long.word 0x4AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B0 "DOC0EXPD5420,"
hexmask.long.word 0x4B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B4 "DOC0EXPD5421,"
hexmask.long.word 0x4B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B8 "DOC0EXPD5422,"
hexmask.long.word 0x4B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4BC "DOC0EXPD5423,"
hexmask.long.word 0x4BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C0 "DOC0EXPD5424,"
hexmask.long.word 0x4C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C4 "DOC0EXPD5425,"
hexmask.long.word 0x4C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C8 "DOC0EXPD5426,"
hexmask.long.word 0x4C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4CC "DOC0EXPD5427,"
hexmask.long.word 0x4CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D0 "DOC0EXPD5428,"
hexmask.long.word 0x4D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D4 "DOC0EXPD5429,"
hexmask.long.word 0x4D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D8 "DOC0EXPD5430,"
hexmask.long.word 0x4D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4DC "DOC0EXPD5431,"
hexmask.long.word 0x4DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E0 "DOC0EXPD5432,"
hexmask.long.word 0x4E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E4 "DOC0EXPD5433,"
hexmask.long.word 0x4E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E8 "DOC0EXPD5434,"
hexmask.long.word 0x4E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4EC "DOC0EXPD5435,"
hexmask.long.word 0x4EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F0 "DOC0EXPD5436,"
hexmask.long.word 0x4F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F4 "DOC0EXPD5437,"
hexmask.long.word 0x4F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F8 "DOC0EXPD5438,"
hexmask.long.word 0x4F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4FC "DOC0EXPD5439,"
hexmask.long.word 0x4FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x500 "DOC0EXPD5440,"
hexmask.long.word 0x500 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x500 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x500 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x500 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x500 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x500 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x500 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x500 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x500 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x504 "DOC0EXPD5441,"
hexmask.long.word 0x504 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x504 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x504 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x504 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x504 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x504 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x504 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x504 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x504 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x508 "DOC0EXPD5442,"
hexmask.long.word 0x508 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x508 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x508 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x508 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x508 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x508 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x508 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x508 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x508 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x50C "DOC0EXPD5443,"
hexmask.long.word 0x50C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x50C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x50C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x50C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x50C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x50C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x50C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x50C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x50C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x510 "DOC0EXPD5444,"
hexmask.long.word 0x510 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x510 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x510 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x510 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x510 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x510 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x510 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x510 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x510 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x514 "DOC0EXPD5445,"
hexmask.long.word 0x514 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x514 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x514 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x514 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x514 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x514 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x514 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x514 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x514 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x518 "DOC0EXPD5446,"
hexmask.long.word 0x518 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x518 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x518 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x518 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x518 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x518 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x518 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x518 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x518 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x51C "DOC0EXPD5447,"
hexmask.long.word 0x51C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x51C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x51C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x51C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x51C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x51C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x51C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x51C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x51C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x520 "DOC0EXPD5448,"
hexmask.long.word 0x520 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x520 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x520 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x520 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x520 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x520 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x520 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x520 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x520 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x524 "DOC0EXPD5449,"
hexmask.long.word 0x524 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x524 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x524 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x524 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x524 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x524 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x524 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x524 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x524 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x528 "DOC0EXPD5450,"
hexmask.long.word 0x528 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x528 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x528 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x528 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x528 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x528 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x528 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x528 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x528 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x52C "DOC0EXPD5451,"
hexmask.long.word 0x52C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x52C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x52C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x52C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x52C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x52C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x52C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x52C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x52C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x530 "DOC0EXPD5452,"
hexmask.long.word 0x530 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x530 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x530 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x530 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x530 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x530 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x530 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x530 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x530 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x534 "DOC0EXPD5453,"
hexmask.long.word 0x534 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x534 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x534 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x534 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x534 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x534 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x534 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x534 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x534 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x538 "DOC0EXPD5454,"
hexmask.long.word 0x538 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x538 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x538 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x538 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x538 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x538 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x538 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x538 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x538 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x53C "DOC0EXPD5455,"
hexmask.long.word 0x53C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x53C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x53C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x53C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x53C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x53C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x53C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x53C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x53C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x540 "DOC0EXPD5456,"
hexmask.long.word 0x540 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x540 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x540 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x540 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x540 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x540 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x540 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x540 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x540 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x544 "DOC0EXPD5457,"
hexmask.long.word 0x544 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x544 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x544 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x544 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x544 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x544 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x544 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x544 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x544 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x548 "DOC0EXPD5458,"
hexmask.long.word 0x548 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x548 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x548 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x548 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x548 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x548 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x548 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x548 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x548 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x54C "DOC0EXPD5459,"
hexmask.long.word 0x54C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x54C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x54C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x54C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x54C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x54C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x54C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x54C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x54C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x550 "DOC0EXPD5460,"
hexmask.long.word 0x550 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x550 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x550 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x550 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x550 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x550 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x550 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x550 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x550 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x554 "DOC0EXPD5461,"
hexmask.long.word 0x554 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x554 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x554 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x554 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x554 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x554 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x554 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x554 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x554 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x558 "DOC0EXPD5462,"
hexmask.long.word 0x558 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x558 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x558 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x558 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x558 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x558 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x558 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x558 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x558 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x55C "DOC0EXPD5463,"
hexmask.long.word 0x55C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x55C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x55C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x55C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x55C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x55C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x55C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x55C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x55C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x560 "DOC0EXPD5464,"
hexmask.long.word 0x560 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x560 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x560 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x560 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x560 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x560 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x560 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x560 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x560 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x564 "DOC0EXPD5465,"
hexmask.long.word 0x564 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x564 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x564 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x564 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x564 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x564 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x564 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x564 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x564 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x568 "DOC0EXPD5466,"
hexmask.long.word 0x568 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x568 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x568 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x568 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x568 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x568 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x568 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x568 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x568 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x56C "DOC0EXPD5467,"
hexmask.long.word 0x56C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x56C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x56C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x56C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x56C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x56C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x56C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x56C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x56C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x570 "DOC0EXPD5468,"
hexmask.long.word 0x570 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x570 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x570 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x570 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x570 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x570 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x570 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x570 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x570 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x574 "DOC0EXPD5469,"
hexmask.long.word 0x574 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x574 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x574 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x574 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x574 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x574 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x574 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x574 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x574 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x578 "DOC0EXPD5470,"
hexmask.long.word 0x578 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x578 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x578 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x578 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x578 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x578 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x578 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x578 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x578 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x57C "DOC0EXPD5471,"
hexmask.long.word 0x57C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x57C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x57C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x57C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x57C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x57C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x57C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x57C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x57C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x580 "DOC0EXPD5472,"
hexmask.long.word 0x580 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x580 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x580 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x580 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x580 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x580 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x580 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x580 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x580 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x584 "DOC0EXPD5473,"
hexmask.long.word 0x584 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x584 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x584 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x584 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x584 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x584 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x584 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x584 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x584 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x588 "DOC0EXPD5474,"
hexmask.long.word 0x588 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x588 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x588 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x588 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x588 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x588 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x588 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x588 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x588 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x58C "DOC0EXPD5475,"
hexmask.long.word 0x58C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x58C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x58C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x58C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x58C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x58C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x58C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x58C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x58C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x590 "DOC0EXPD5476,"
hexmask.long.word 0x590 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x590 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x590 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x590 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x590 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x590 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x590 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x590 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x590 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x594 "DOC0EXPD5477,"
hexmask.long.word 0x594 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x594 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x594 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x594 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x594 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x594 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x594 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x594 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x594 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x598 "DOC0EXPD5478,"
hexmask.long.word 0x598 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x598 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x598 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x598 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x598 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x598 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x598 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x598 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x598 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x59C "DOC0EXPD5479,"
hexmask.long.word 0x59C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x59C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x59C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x59C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x59C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x59C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x59C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x59C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x59C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A0 "DOC0EXPD5480,"
hexmask.long.word 0x5A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A4 "DOC0EXPD5481,"
hexmask.long.word 0x5A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A8 "DOC0EXPD5482,"
hexmask.long.word 0x5A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5AC "DOC0EXPD5483,"
hexmask.long.word 0x5AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B0 "DOC0EXPD5484,"
hexmask.long.word 0x5B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B4 "DOC0EXPD5485,"
hexmask.long.word 0x5B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B8 "DOC0EXPD5486,"
hexmask.long.word 0x5B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5BC "DOC0EXPD5487,"
hexmask.long.word 0x5BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C0 "DOC0EXPD5488,"
hexmask.long.word 0x5C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C4 "DOC0EXPD5489,"
hexmask.long.word 0x5C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C8 "DOC0EXPD5490,"
hexmask.long.word 0x5C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5CC "DOC0EXPD5491,"
hexmask.long.word 0x5CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D0 "DOC0EXPD5492,"
hexmask.long.word 0x5D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D4 "DOC0EXPD5493,"
hexmask.long.word 0x5D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D8 "DOC0EXPD5494,"
hexmask.long.word 0x5D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5DC "DOC0EXPD5495,"
hexmask.long.word 0x5DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E0 "DOC0EXPD5496,"
hexmask.long.word 0x5E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E4 "DOC0EXPD5497,"
hexmask.long.word 0x5E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E8 "DOC0EXPD5498,"
hexmask.long.word 0x5E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5EC "DOC0EXPD5499,"
hexmask.long.word 0x5EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F0 "DOC0EXPD5500,"
hexmask.long.word 0x5F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F4 "DOC0EXPD5501,"
hexmask.long.word 0x5F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F8 "DOC0EXPD5502,"
hexmask.long.word 0x5F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5FC "DOC0EXPD5503,"
hexmask.long.word 0x5FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x600 "DOC0EXPD5504,"
hexmask.long.word 0x600 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x600 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x600 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x600 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x600 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x600 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x600 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x600 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x600 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x604 "DOC0EXPD5505,"
hexmask.long.word 0x604 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x604 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x604 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x604 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x604 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x604 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x604 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x604 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x604 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x608 "DOC0EXPD5506,"
hexmask.long.word 0x608 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x608 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x608 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x608 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x608 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x608 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x608 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x608 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x608 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x60C "DOC0EXPD5507,"
hexmask.long.word 0x60C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x60C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x60C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x60C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x60C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x60C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x60C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x60C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x60C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x610 "DOC0EXPD5508,"
hexmask.long.word 0x610 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x610 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x610 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x610 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x610 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x610 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x610 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x610 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x610 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x614 "DOC0EXPD5509,"
hexmask.long.word 0x614 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x614 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x614 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x614 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x614 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x614 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x614 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x614 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x614 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x618 "DOC0EXPD5510,"
hexmask.long.word 0x618 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x618 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x618 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x618 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x618 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x618 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x618 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x618 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x618 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x61C "DOC0EXPD5511,"
hexmask.long.word 0x61C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x61C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x61C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x61C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x61C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x61C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x61C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x61C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x61C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x620 "DOC0EXPD5512,"
hexmask.long.word 0x620 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x620 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x620 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x620 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x620 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x620 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x620 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x620 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x620 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x624 "DOC0EXPD5513,"
hexmask.long.word 0x624 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x624 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x624 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x624 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x624 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x624 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x624 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x624 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x624 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x628 "DOC0EXPD5514,"
hexmask.long.word 0x628 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x628 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x628 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x628 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x628 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x628 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x628 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x628 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x628 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x62C "DOC0EXPD5515,"
hexmask.long.word 0x62C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x62C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x62C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x62C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x62C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x62C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x62C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x62C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x62C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x630 "DOC0EXPD5516,"
hexmask.long.word 0x630 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x630 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x630 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x630 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x630 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x630 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x630 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x630 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x630 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x634 "DOC0EXPD5517,"
hexmask.long.word 0x634 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x634 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x634 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x634 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x634 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x634 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x634 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x634 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x634 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x638 "DOC0EXPD5518,"
hexmask.long.word 0x638 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x638 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x638 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x638 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x638 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x638 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x638 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x638 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x638 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x63C "DOC0EXPD5519,"
hexmask.long.word 0x63C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x63C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x63C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x63C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x63C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x63C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x63C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x63C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x63C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x640 "DOC0EXPD5520,"
hexmask.long.word 0x640 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x640 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x640 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x640 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x640 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x640 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x640 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x640 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x640 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x644 "DOC0EXPD5521,"
hexmask.long.word 0x644 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x644 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x644 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x644 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x644 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x644 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x644 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x644 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x644 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x648 "DOC0EXPD5522,"
hexmask.long.word 0x648 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x648 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x648 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x648 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x648 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x648 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x648 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x648 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x648 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x64C "DOC0EXPD5523,"
hexmask.long.word 0x64C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x64C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x64C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x64C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x64C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x64C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x64C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x64C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x64C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x650 "DOC0EXPD5524,"
hexmask.long.word 0x650 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x650 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x650 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x650 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x650 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x650 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x650 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x650 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x650 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x654 "DOC0EXPD5525,"
hexmask.long.word 0x654 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x654 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x654 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x654 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x654 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x654 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x654 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x654 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x654 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x658 "DOC0EXPD5526,"
hexmask.long.word 0x658 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x658 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x658 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x658 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x658 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x658 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x658 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x658 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x658 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x65C "DOC0EXPD5527,"
hexmask.long.word 0x65C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x65C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x65C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x65C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x65C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x65C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x65C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x65C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x65C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x660 "DOC0EXPD5528,"
hexmask.long.word 0x660 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x660 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x660 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x660 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x660 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x660 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x660 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x660 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x660 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x664 "DOC0EXPD5529,"
hexmask.long.word 0x664 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x664 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x664 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x664 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x664 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x664 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x664 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x664 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x664 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x668 "DOC0EXPD5530,"
hexmask.long.word 0x668 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x668 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x668 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x668 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x668 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x668 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x668 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x668 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x668 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x66C "DOC0EXPD5531,"
hexmask.long.word 0x66C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x66C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x66C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x66C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x66C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x66C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x66C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x66C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x66C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x670 "DOC0EXPD5532,"
hexmask.long.word 0x670 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x670 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x670 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x670 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x670 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x670 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x670 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x670 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x670 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x674 "DOC0EXPD5533,"
hexmask.long.word 0x674 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x674 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x674 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x674 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x674 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x674 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x674 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x674 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x674 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x678 "DOC0EXPD5534,"
hexmask.long.word 0x678 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x678 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x678 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x678 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x678 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x678 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x678 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x678 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x678 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x67C "DOC0EXPD5535,"
hexmask.long.word 0x67C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x67C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x67C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x67C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x67C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x67C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x67C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x67C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x67C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x680 "DOC0EXPD5536,"
hexmask.long.word 0x680 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x680 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x680 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x680 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x680 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x680 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x680 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x680 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x680 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x684 "DOC0EXPD5537,"
hexmask.long.word 0x684 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x684 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x684 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x684 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x684 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x684 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x684 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x684 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x684 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x688 "DOC0EXPD5538,"
hexmask.long.word 0x688 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x688 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x688 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x688 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x688 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x688 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x688 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x688 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x688 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x68C "DOC0EXPD5539,"
hexmask.long.word 0x68C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x68C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x68C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x68C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x68C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x68C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x68C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x68C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x68C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x690 "DOC0EXPD5540,"
hexmask.long.word 0x690 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x690 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x690 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x690 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x690 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x690 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x690 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x690 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x690 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x694 "DOC0EXPD5541,"
hexmask.long.word 0x694 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x694 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x694 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x694 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x694 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x694 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x694 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x694 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x694 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x698 "DOC0EXPD5542,"
hexmask.long.word 0x698 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x698 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x698 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x698 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x698 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x698 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x698 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x698 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x698 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x69C "DOC0EXPD5543,"
hexmask.long.word 0x69C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x69C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x69C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x69C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x69C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x69C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x69C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x69C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x69C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A0 "DOC0EXPD5544,"
hexmask.long.word 0x6A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A4 "DOC0EXPD5545,"
hexmask.long.word 0x6A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A8 "DOC0EXPD5546,"
hexmask.long.word 0x6A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6AC "DOC0EXPD5547,"
hexmask.long.word 0x6AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B0 "DOC0EXPD5548,"
hexmask.long.word 0x6B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B4 "DOC0EXPD5549,"
hexmask.long.word 0x6B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B8 "DOC0EXPD5550,"
hexmask.long.word 0x6B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6BC "DOC0EXPD5551,"
hexmask.long.word 0x6BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C0 "DOC0EXPD5552,"
hexmask.long.word 0x6C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C4 "DOC0EXPD5553,"
hexmask.long.word 0x6C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C8 "DOC0EXPD5554,"
hexmask.long.word 0x6C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6CC "DOC0EXPD5555,"
hexmask.long.word 0x6CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D0 "DOC0EXPD5556,"
hexmask.long.word 0x6D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D4 "DOC0EXPD5557,"
hexmask.long.word 0x6D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D8 "DOC0EXPD5558,"
hexmask.long.word 0x6D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6DC "DOC0EXPD5559,"
hexmask.long.word 0x6DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E0 "DOC0EXPD5560,"
hexmask.long.word 0x6E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E4 "DOC0EXPD5561,"
hexmask.long.word 0x6E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E8 "DOC0EXPD5562,"
hexmask.long.word 0x6E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6EC "DOC0EXPD5563,"
hexmask.long.word 0x6EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F0 "DOC0EXPD5564,"
hexmask.long.word 0x6F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F4 "DOC0EXPD5565,"
hexmask.long.word 0x6F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F8 "DOC0EXPD5566,"
hexmask.long.word 0x6F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6FC "DOC0EXPD5567,"
hexmask.long.word 0x6FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x700 "DOC0EXPD5568,"
hexmask.long.word 0x700 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x700 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x700 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x700 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x700 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x700 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x700 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x700 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x700 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x704 "DOC0EXPD5569,"
hexmask.long.word 0x704 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x704 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x704 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x704 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x704 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x704 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x704 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x704 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x704 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x708 "DOC0EXPD5570,"
hexmask.long.word 0x708 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x708 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x708 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x708 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x708 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x708 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x708 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x708 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x708 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x70C "DOC0EXPD5571,"
hexmask.long.word 0x70C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x70C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x70C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x70C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x70C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x70C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x70C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x70C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x70C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x710 "DOC0EXPD5572,"
hexmask.long.word 0x710 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x710 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x710 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x710 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x710 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x710 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x710 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x710 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x710 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x714 "DOC0EXPD5573,"
hexmask.long.word 0x714 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x714 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x714 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x714 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x714 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x714 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x714 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x714 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x714 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x718 "DOC0EXPD5574,"
hexmask.long.word 0x718 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x718 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x718 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x718 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x718 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x718 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x718 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x718 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x718 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x71C "DOC0EXPD5575,"
hexmask.long.word 0x71C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x71C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x71C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x71C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x71C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x71C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x71C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x71C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x71C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x720 "DOC0EXPD5576,"
hexmask.long.word 0x720 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x720 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x720 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x720 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x720 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x720 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x720 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x720 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x720 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x724 "DOC0EXPD5577,"
hexmask.long.word 0x724 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x724 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x724 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x724 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x724 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x724 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x724 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x724 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x724 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x728 "DOC0EXPD5578,"
hexmask.long.word 0x728 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x728 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x728 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x728 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x728 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x728 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x728 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x728 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x728 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x72C "DOC0EXPD5579,"
hexmask.long.word 0x72C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x72C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x72C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x72C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x72C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x72C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x72C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x72C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x72C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x730 "DOC0EXPD5580,"
hexmask.long.word 0x730 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x730 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x730 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x730 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x730 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x730 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x730 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x730 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x730 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x734 "DOC0EXPD5581,"
hexmask.long.word 0x734 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x734 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x734 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x734 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x734 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x734 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x734 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x734 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x734 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x738 "DOC0EXPD5582,"
hexmask.long.word 0x738 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x738 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x738 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x738 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x738 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x738 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x738 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x738 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x738 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x73C "DOC0EXPD5583,"
hexmask.long.word 0x73C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x73C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x73C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x73C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x73C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x73C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x73C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x73C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x73C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x740 "DOC0EXPD5584,"
hexmask.long.word 0x740 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x740 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x740 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x740 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x740 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x740 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x740 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x740 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x740 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x744 "DOC0EXPD5585,"
hexmask.long.word 0x744 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x744 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x744 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x744 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x744 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x744 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x744 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x744 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x744 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x748 "DOC0EXPD5586,"
hexmask.long.word 0x748 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x748 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x748 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x748 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x748 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x748 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x748 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x748 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x748 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x74C "DOC0EXPD5587,"
hexmask.long.word 0x74C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x74C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x74C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x74C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x74C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x74C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x74C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x74C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x74C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x750 "DOC0EXPD5588,"
hexmask.long.word 0x750 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x750 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x750 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x750 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x750 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x750 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x750 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x750 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x750 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x754 "DOC0EXPD5589,"
hexmask.long.word 0x754 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x754 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x754 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x754 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x754 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x754 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x754 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x754 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x754 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x758 "DOC0EXPD5590,"
hexmask.long.word 0x758 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x758 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x758 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x758 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x758 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x758 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x758 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x758 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x758 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x75C "DOC0EXPD5591,"
hexmask.long.word 0x75C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x75C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x75C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x75C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x75C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x75C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x75C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x75C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x75C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x760 "DOC0EXPD5592,"
hexmask.long.word 0x760 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x760 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x760 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x760 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x760 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x760 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x760 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x760 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x760 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x764 "DOC0EXPD5593,"
hexmask.long.word 0x764 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x764 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x764 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x764 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x764 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x764 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x764 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x764 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x764 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x768 "DOC0EXPD5594,"
hexmask.long.word 0x768 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x768 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x768 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x768 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x768 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x768 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x768 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x768 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x768 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x76C "DOC0EXPD5595,"
hexmask.long.word 0x76C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x76C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x76C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x76C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x76C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x76C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x76C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x76C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x76C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x770 "DOC0EXPD5596,"
hexmask.long.word 0x770 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x770 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x770 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x770 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x770 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x770 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x770 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x770 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x770 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x774 "DOC0EXPD5597,"
hexmask.long.word 0x774 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x774 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x774 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x774 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x774 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x774 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x774 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x774 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x774 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x778 "DOC0EXPD5598,"
hexmask.long.word 0x778 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x778 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x778 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x778 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x778 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x778 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x778 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x778 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x778 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x77C "DOC0EXPD5599,"
hexmask.long.word 0x77C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x77C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x77C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x77C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x77C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x77C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x77C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x77C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x77C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x780 "DOC0EXPD5600,"
hexmask.long.word 0x780 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x780 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x780 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x780 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x780 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x780 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x780 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x780 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x780 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x784 "DOC0EXPD5601,"
hexmask.long.word 0x784 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x784 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x784 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x784 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x784 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x784 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x784 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x784 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x784 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x788 "DOC0EXPD5602,"
hexmask.long.word 0x788 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x788 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x788 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x788 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x788 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x788 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x788 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x788 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x788 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x78C "DOC0EXPD5603,"
hexmask.long.word 0x78C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x78C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x78C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x78C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x78C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x78C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x78C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x78C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x78C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x790 "DOC0EXPD5604,"
hexmask.long.word 0x790 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x790 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x790 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x790 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x790 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x790 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x790 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x790 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x790 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x794 "DOC0EXPD5605,"
hexmask.long.word 0x794 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x794 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x794 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x794 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x794 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x794 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x794 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x794 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x794 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x798 "DOC0EXPD5606,"
hexmask.long.word 0x798 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x798 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x798 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x798 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x798 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x798 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x798 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x798 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x798 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x79C "DOC0EXPD5607,"
hexmask.long.word 0x79C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x79C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x79C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x79C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x79C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x79C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x79C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x79C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x79C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A0 "DOC0EXPD5608,"
hexmask.long.word 0x7A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A4 "DOC0EXPD5609,"
hexmask.long.word 0x7A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A8 "DOC0EXPD5610,"
hexmask.long.word 0x7A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7AC "DOC0EXPD5611,"
hexmask.long.word 0x7AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B0 "DOC0EXPD5612,"
hexmask.long.word 0x7B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B4 "DOC0EXPD5613,"
hexmask.long.word 0x7B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B8 "DOC0EXPD5614,"
hexmask.long.word 0x7B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7BC "DOC0EXPD5615,"
hexmask.long.word 0x7BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C0 "DOC0EXPD5616,"
hexmask.long.word 0x7C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C4 "DOC0EXPD5617,"
hexmask.long.word 0x7C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C8 "DOC0EXPD5618,"
hexmask.long.word 0x7C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7CC "DOC0EXPD5619,"
hexmask.long.word 0x7CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D0 "DOC0EXPD5620,"
hexmask.long.word 0x7D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D4 "DOC0EXPD5621,"
hexmask.long.word 0x7D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D8 "DOC0EXPD5622,"
hexmask.long.word 0x7D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7DC "DOC0EXPD5623,"
hexmask.long.word 0x7DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E0 "DOC0EXPD5624,"
hexmask.long.word 0x7E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E4 "DOC0EXPD5625,"
hexmask.long.word 0x7E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E8 "DOC0EXPD5626,"
hexmask.long.word 0x7E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7EC "DOC0EXPD5627,"
hexmask.long.word 0x7EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F0 "DOC0EXPD5628,"
hexmask.long.word 0x7F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F4 "DOC0EXPD5629,"
hexmask.long.word 0x7F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F8 "DOC0EXPD5630,"
hexmask.long.word 0x7F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7FC "DOC0EXPD5631,"
hexmask.long.word 0x7FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x800 "DOC0EXPD5632,"
hexmask.long.word 0x800 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x800 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x800 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x800 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x800 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x800 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x800 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x800 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x800 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x804 "DOC0EXPD5633,"
hexmask.long.word 0x804 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x804 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x804 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x804 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x804 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x804 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x804 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x804 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x804 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x808 "DOC0EXPD5634,"
hexmask.long.word 0x808 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x808 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x808 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x808 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x808 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x808 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x808 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x808 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x808 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x80C "DOC0EXPD5635,"
hexmask.long.word 0x80C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x80C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x80C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x80C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x80C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x80C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x80C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x80C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x80C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x810 "DOC0EXPD5636,"
hexmask.long.word 0x810 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x810 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x810 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x810 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x810 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x810 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x810 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x810 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x810 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x814 "DOC0EXPD5637,"
hexmask.long.word 0x814 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x814 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x814 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x814 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x814 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x814 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x814 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x814 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x814 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x818 "DOC0EXPD5638,"
hexmask.long.word 0x818 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x818 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x818 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x818 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x818 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x818 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x818 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x818 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x818 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x81C "DOC0EXPD5639,"
hexmask.long.word 0x81C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x81C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x81C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x81C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x81C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x81C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x81C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x81C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x81C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x820 "DOC0EXPD5640,"
hexmask.long.word 0x820 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x820 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x820 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x820 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x820 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x820 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x820 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x820 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x820 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x824 "DOC0EXPD5641,"
hexmask.long.word 0x824 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x824 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x824 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x824 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x824 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x824 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x824 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x824 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x824 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x828 "DOC0EXPD5642,"
hexmask.long.word 0x828 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x828 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x828 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x828 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x828 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x828 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x828 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x828 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x828 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x82C "DOC0EXPD5643,"
hexmask.long.word 0x82C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x82C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x82C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x82C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x82C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x82C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x82C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x82C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x82C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x830 "DOC0EXPD5644,"
hexmask.long.word 0x830 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x830 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x830 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x830 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x830 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x830 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x830 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x830 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x830 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x834 "DOC0EXPD5645,"
hexmask.long.word 0x834 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x834 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x834 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x834 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x834 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x834 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x834 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x834 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x834 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x838 "DOC0EXPD5646,"
hexmask.long.word 0x838 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x838 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x838 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x838 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x838 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x838 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x838 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x838 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x838 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x83C "DOC0EXPD5647,"
hexmask.long.word 0x83C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x83C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x83C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x83C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x83C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x83C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x83C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x83C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x83C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x840 "DOC0EXPD5648,"
hexmask.long.word 0x840 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x840 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x840 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x840 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x840 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x840 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x840 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x840 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x840 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x844 "DOC0EXPD5649,"
hexmask.long.word 0x844 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x844 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x844 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x844 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x844 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x844 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x844 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x844 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x844 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x848 "DOC0EXPD5650,"
hexmask.long.word 0x848 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x848 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x848 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x848 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x848 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x848 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x848 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x848 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x848 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x84C "DOC0EXPD5651,"
hexmask.long.word 0x84C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x84C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x84C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x84C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x84C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x84C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x84C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x84C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x84C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x850 "DOC0EXPD5652,"
hexmask.long.word 0x850 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x850 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x850 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x850 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x850 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x850 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x850 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x850 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x850 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x854 "DOC0EXPD5653,"
hexmask.long.word 0x854 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x854 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x854 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x854 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x854 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x854 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x854 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x854 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x854 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x858 "DOC0EXPD5654,"
hexmask.long.word 0x858 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x858 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x858 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x858 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x858 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x858 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x858 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x858 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x858 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x85C "DOC0EXPD5655,"
hexmask.long.word 0x85C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x85C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x85C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x85C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x85C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x85C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x85C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x85C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x85C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x860 "DOC0EXPD5656,"
hexmask.long.word 0x860 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x860 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x860 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x860 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x860 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x860 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x860 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x860 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x860 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x864 "DOC0EXPD5657,"
hexmask.long.word 0x864 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x864 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x864 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x864 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x864 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x864 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x864 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x864 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x864 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x868 "DOC0EXPD5658,"
hexmask.long.word 0x868 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x868 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x868 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x868 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x868 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x868 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x868 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x868 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x868 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x86C "DOC0EXPD5659,"
hexmask.long.word 0x86C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x86C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x86C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x86C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x86C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x86C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x86C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x86C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x86C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x870 "DOC0EXPD5660,"
hexmask.long.word 0x870 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x870 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x870 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x870 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x870 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x870 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x870 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x870 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x870 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x874 "DOC0EXPD5661,"
hexmask.long.word 0x874 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x874 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x874 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x874 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x874 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x874 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x874 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x874 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x874 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x878 "DOC0EXPD5662,"
hexmask.long.word 0x878 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x878 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x878 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x878 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x878 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x878 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x878 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x878 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x878 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x87C "DOC0EXPD5663,"
hexmask.long.word 0x87C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x87C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x87C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x87C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x87C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x87C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x87C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x87C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x87C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x880 "DOC0EXPD5664,"
hexmask.long.word 0x880 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x880 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x880 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x880 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x880 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x880 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x880 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x880 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x880 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x884 "DOC0EXPD5665,"
hexmask.long.word 0x884 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x884 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x884 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x884 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x884 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x884 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x884 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x884 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x884 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x888 "DOC0EXPD5666,"
hexmask.long.word 0x888 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x888 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x888 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x888 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x888 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x888 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x888 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x888 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x888 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x88C "DOC0EXPD5667,"
hexmask.long.word 0x88C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x88C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x88C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x88C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x88C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x88C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x88C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x88C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x88C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x890 "DOC0EXPD5668,"
hexmask.long.word 0x890 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x890 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x890 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x890 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x890 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x890 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x890 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x890 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x890 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x894 "DOC0EXPD5669,"
hexmask.long.word 0x894 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x894 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x894 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x894 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x894 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x894 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x894 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x894 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x894 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x898 "DOC0EXPD5670,"
hexmask.long.word 0x898 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x898 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x898 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x898 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x898 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x898 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x898 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x898 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x898 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x89C "DOC0EXPD5671,"
hexmask.long.word 0x89C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x89C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x89C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x89C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x89C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x89C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x89C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x89C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x89C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A0 "DOC0EXPD5672,"
hexmask.long.word 0x8A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A4 "DOC0EXPD5673,"
hexmask.long.word 0x8A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A8 "DOC0EXPD5674,"
hexmask.long.word 0x8A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8AC "DOC0EXPD5675,"
hexmask.long.word 0x8AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B0 "DOC0EXPD5676,"
hexmask.long.word 0x8B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B4 "DOC0EXPD5677,"
hexmask.long.word 0x8B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B8 "DOC0EXPD5678,"
hexmask.long.word 0x8B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8BC "DOC0EXPD5679,"
hexmask.long.word 0x8BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C0 "DOC0EXPD5680,"
hexmask.long.word 0x8C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C4 "DOC0EXPD5681,"
hexmask.long.word 0x8C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C8 "DOC0EXPD5682,"
hexmask.long.word 0x8C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8CC "DOC0EXPD5683,"
hexmask.long.word 0x8CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D0 "DOC0EXPD5684,"
hexmask.long.word 0x8D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D4 "DOC0EXPD5685,"
hexmask.long.word 0x8D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D8 "DOC0EXPD5686,"
hexmask.long.word 0x8D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8DC "DOC0EXPD5687,"
hexmask.long.word 0x8DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E0 "DOC0EXPD5688,"
hexmask.long.word 0x8E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E4 "DOC0EXPD5689,"
hexmask.long.word 0x8E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E8 "DOC0EXPD5690,"
hexmask.long.word 0x8E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8EC "DOC0EXPD5691,"
hexmask.long.word 0x8EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F0 "DOC0EXPD5692,"
hexmask.long.word 0x8F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F4 "DOC0EXPD5693,"
hexmask.long.word 0x8F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F8 "DOC0EXPD5694,"
hexmask.long.word 0x8F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8FC "DOC0EXPD5695,"
hexmask.long.word 0x8FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x900 "DOC0EXPD5696,"
hexmask.long.word 0x900 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x900 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x900 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x900 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x900 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x900 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x900 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x900 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x900 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x904 "DOC0EXPD5697,"
hexmask.long.word 0x904 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x904 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x904 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x904 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x904 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x904 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x904 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x904 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x904 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x908 "DOC0EXPD5698,"
hexmask.long.word 0x908 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x908 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x908 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x908 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x908 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x908 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x908 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x908 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x908 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x90C "DOC0EXPD5699,"
hexmask.long.word 0x90C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x90C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x90C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x90C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x90C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x90C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x90C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x90C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x90C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x910 "DOC0EXPD5700,"
hexmask.long.word 0x910 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x910 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x910 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x910 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x910 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x910 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x910 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x910 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x910 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x914 "DOC0EXPD5701,"
hexmask.long.word 0x914 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x914 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x914 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x914 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x914 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x914 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x914 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x914 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x914 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x918 "DOC0EXPD5702,"
hexmask.long.word 0x918 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x918 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x918 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x918 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x918 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x918 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x918 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x918 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x918 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x91C "DOC0EXPD5703,"
hexmask.long.word 0x91C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x91C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x91C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x91C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x91C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x91C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x91C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x91C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x91C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x920 "DOC0EXPD5704,"
hexmask.long.word 0x920 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x920 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x920 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x920 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x920 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x920 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x920 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x920 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x920 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x924 "DOC0EXPD5705,"
hexmask.long.word 0x924 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x924 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x924 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x924 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x924 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x924 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x924 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x924 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x924 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x928 "DOC0EXPD5706,"
hexmask.long.word 0x928 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x928 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x928 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x928 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x928 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x928 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x928 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x928 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x928 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x92C "DOC0EXPD5707,"
hexmask.long.word 0x92C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x92C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x92C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x92C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x92C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x92C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x92C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x92C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x92C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x930 "DOC0EXPD5708,"
hexmask.long.word 0x930 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x930 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x930 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x930 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x930 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x930 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x930 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x930 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x930 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x934 "DOC0EXPD5709,"
hexmask.long.word 0x934 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x934 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x934 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x934 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x934 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x934 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x934 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x934 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x934 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x938 "DOC0EXPD5710,"
hexmask.long.word 0x938 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x938 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x938 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x938 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x938 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x938 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x938 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x938 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x938 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x93C "DOC0EXPD5711,"
hexmask.long.word 0x93C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x93C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x93C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x93C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x93C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x93C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x93C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x93C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x93C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x940 "DOC0EXPD5712,"
hexmask.long.word 0x940 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x940 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x940 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x940 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x940 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x940 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x940 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x940 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x940 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x944 "DOC0EXPD5713,"
hexmask.long.word 0x944 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x944 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x944 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x944 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x944 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x944 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x944 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x944 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x944 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x948 "DOC0EXPD5714,"
hexmask.long.word 0x948 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x948 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x948 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x948 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x948 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x948 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x948 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x948 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x948 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x94C "DOC0EXPD5715,"
hexmask.long.word 0x94C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x94C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x94C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x94C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x94C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x94C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x94C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x94C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x94C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x950 "DOC0EXPD5716,"
hexmask.long.word 0x950 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x950 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x950 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x950 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x950 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x950 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x950 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x950 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x950 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x954 "DOC0EXPD5717,"
hexmask.long.word 0x954 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x954 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x954 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x954 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x954 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x954 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x954 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x954 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x954 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x958 "DOC0EXPD5718,"
hexmask.long.word 0x958 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x958 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x958 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x958 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x958 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x958 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x958 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x958 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x958 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x95C "DOC0EXPD5719,"
hexmask.long.word 0x95C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x95C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x95C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x95C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x95C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x95C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x95C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x95C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x95C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x960 "DOC0EXPD5720,"
hexmask.long.word 0x960 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x960 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x960 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x960 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x960 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x960 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x960 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x960 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x960 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x964 "DOC0EXPD5721,"
hexmask.long.word 0x964 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x964 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x964 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x964 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x964 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x964 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x964 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x964 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x964 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x968 "DOC0EXPD5722,"
hexmask.long.word 0x968 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x968 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x968 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x968 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x968 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x968 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x968 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x968 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x968 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x96C "DOC0EXPD5723,"
hexmask.long.word 0x96C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x96C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x96C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x96C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x96C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x96C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x96C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x96C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x96C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x970 "DOC0EXPD5724,"
hexmask.long.word 0x970 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x970 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x970 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x970 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x970 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x970 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x970 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x970 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x970 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x974 "DOC0EXPD5725,"
hexmask.long.word 0x974 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x974 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x974 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x974 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x974 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x974 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x974 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x974 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x974 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x978 "DOC0EXPD5726,"
hexmask.long.word 0x978 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x978 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x978 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x978 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x978 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x978 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x978 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x978 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x978 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x97C "DOC0EXPD5727,"
hexmask.long.word 0x97C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x97C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x97C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x97C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x97C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x97C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x97C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x97C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x97C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x980 "DOC0EXPD5728,"
hexmask.long.word 0x980 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x980 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x980 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x980 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x980 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x980 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x980 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x980 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x980 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x984 "DOC0EXPD5729,"
hexmask.long.word 0x984 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x984 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x984 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x984 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x984 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x984 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x984 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x984 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x984 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x988 "DOC0EXPD5730,"
hexmask.long.word 0x988 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x988 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x988 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x988 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x988 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x988 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x988 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x988 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x988 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x98C "DOC0EXPD5731,"
hexmask.long.word 0x98C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x98C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x98C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x98C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x98C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x98C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x98C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x98C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x98C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x990 "DOC0EXPD5732,"
hexmask.long.word 0x990 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x990 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x990 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x990 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x990 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x990 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x990 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x990 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x990 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x994 "DOC0EXPD5733,"
hexmask.long.word 0x994 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x994 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x994 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x994 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x994 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x994 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x994 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x994 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x994 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x998 "DOC0EXPD5734,"
hexmask.long.word 0x998 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x998 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x998 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x998 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x998 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x998 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x998 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x998 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x998 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x99C "DOC0EXPD5735,"
hexmask.long.word 0x99C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x99C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x99C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x99C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x99C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x99C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x99C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x99C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x99C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A0 "DOC0EXPD5736,"
hexmask.long.word 0x9A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A4 "DOC0EXPD5737,"
hexmask.long.word 0x9A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A8 "DOC0EXPD5738,"
hexmask.long.word 0x9A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9AC "DOC0EXPD5739,"
hexmask.long.word 0x9AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B0 "DOC0EXPD5740,"
hexmask.long.word 0x9B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B4 "DOC0EXPD5741,"
hexmask.long.word 0x9B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B8 "DOC0EXPD5742,"
hexmask.long.word 0x9B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9BC "DOC0EXPD5743,"
hexmask.long.word 0x9BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C0 "DOC0EXPD5744,"
hexmask.long.word 0x9C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C4 "DOC0EXPD5745,"
hexmask.long.word 0x9C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C8 "DOC0EXPD5746,"
hexmask.long.word 0x9C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9CC "DOC0EXPD5747,"
hexmask.long.word 0x9CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D0 "DOC0EXPD5748,"
hexmask.long.word 0x9D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D4 "DOC0EXPD5749,"
hexmask.long.word 0x9D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D8 "DOC0EXPD5750,"
hexmask.long.word 0x9D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9DC "DOC0EXPD5751,"
hexmask.long.word 0x9DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E0 "DOC0EXPD5752,"
hexmask.long.word 0x9E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E4 "DOC0EXPD5753,"
hexmask.long.word 0x9E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E8 "DOC0EXPD5754,"
hexmask.long.word 0x9E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9EC "DOC0EXPD5755,"
hexmask.long.word 0x9EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F0 "DOC0EXPD5756,"
hexmask.long.word 0x9F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F4 "DOC0EXPD5757,"
hexmask.long.word 0x9F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F8 "DOC0EXPD5758,"
hexmask.long.word 0x9F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9FC "DOC0EXPD5759,"
hexmask.long.word 0x9FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA00 "DOC0EXPD5760,"
hexmask.long.word 0xA00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA04 "DOC0EXPD5761,"
hexmask.long.word 0xA04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA08 "DOC0EXPD5762,"
hexmask.long.word 0xA08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA0C "DOC0EXPD5763,"
hexmask.long.word 0xA0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA10 "DOC0EXPD5764,"
hexmask.long.word 0xA10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA14 "DOC0EXPD5765,"
hexmask.long.word 0xA14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA18 "DOC0EXPD5766,"
hexmask.long.word 0xA18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA1C "DOC0EXPD5767,"
hexmask.long.word 0xA1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA20 "DOC0EXPD5768,"
hexmask.long.word 0xA20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA24 "DOC0EXPD5769,"
hexmask.long.word 0xA24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA28 "DOC0EXPD5770,"
hexmask.long.word 0xA28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA2C "DOC0EXPD5771,"
hexmask.long.word 0xA2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA30 "DOC0EXPD5772,"
hexmask.long.word 0xA30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA34 "DOC0EXPD5773,"
hexmask.long.word 0xA34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA38 "DOC0EXPD5774,"
hexmask.long.word 0xA38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA3C "DOC0EXPD5775,"
hexmask.long.word 0xA3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA40 "DOC0EXPD5776,"
hexmask.long.word 0xA40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA44 "DOC0EXPD5777,"
hexmask.long.word 0xA44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA48 "DOC0EXPD5778,"
hexmask.long.word 0xA48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA4C "DOC0EXPD5779,"
hexmask.long.word 0xA4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA50 "DOC0EXPD5780,"
hexmask.long.word 0xA50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA54 "DOC0EXPD5781,"
hexmask.long.word 0xA54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA58 "DOC0EXPD5782,"
hexmask.long.word 0xA58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA5C "DOC0EXPD5783,"
hexmask.long.word 0xA5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA60 "DOC0EXPD5784,"
hexmask.long.word 0xA60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA64 "DOC0EXPD5785,"
hexmask.long.word 0xA64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA68 "DOC0EXPD5786,"
hexmask.long.word 0xA68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA6C "DOC0EXPD5787,"
hexmask.long.word 0xA6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA70 "DOC0EXPD5788,"
hexmask.long.word 0xA70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA74 "DOC0EXPD5789,"
hexmask.long.word 0xA74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA78 "DOC0EXPD5790,"
hexmask.long.word 0xA78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA7C "DOC0EXPD5791,"
hexmask.long.word 0xA7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA80 "DOC0EXPD5792,"
hexmask.long.word 0xA80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA84 "DOC0EXPD5793,"
hexmask.long.word 0xA84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA88 "DOC0EXPD5794,"
hexmask.long.word 0xA88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA8C "DOC0EXPD5795,"
hexmask.long.word 0xA8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA90 "DOC0EXPD5796,"
hexmask.long.word 0xA90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA94 "DOC0EXPD5797,"
hexmask.long.word 0xA94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA98 "DOC0EXPD5798,"
hexmask.long.word 0xA98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA9C "DOC0EXPD5799,"
hexmask.long.word 0xA9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA0 "DOC0EXPD5800,"
hexmask.long.word 0xAA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA4 "DOC0EXPD5801,"
hexmask.long.word 0xAA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA8 "DOC0EXPD5802,"
hexmask.long.word 0xAA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAAC "DOC0EXPD5803,"
hexmask.long.word 0xAAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB0 "DOC0EXPD5804,"
hexmask.long.word 0xAB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB4 "DOC0EXPD5805,"
hexmask.long.word 0xAB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB8 "DOC0EXPD5806,"
hexmask.long.word 0xAB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xABC "DOC0EXPD5807,"
hexmask.long.word 0xABC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xABC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xABC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xABC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xABC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xABC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xABC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xABC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xABC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC0 "DOC0EXPD5808,"
hexmask.long.word 0xAC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC4 "DOC0EXPD5809,"
hexmask.long.word 0xAC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC8 "DOC0EXPD5810,"
hexmask.long.word 0xAC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xACC "DOC0EXPD5811,"
hexmask.long.word 0xACC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xACC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xACC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xACC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xACC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xACC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xACC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xACC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xACC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD0 "DOC0EXPD5812,"
hexmask.long.word 0xAD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD4 "DOC0EXPD5813,"
hexmask.long.word 0xAD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD8 "DOC0EXPD5814,"
hexmask.long.word 0xAD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xADC "DOC0EXPD5815,"
hexmask.long.word 0xADC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xADC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xADC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xADC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xADC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xADC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xADC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xADC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xADC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE0 "DOC0EXPD5816,"
hexmask.long.word 0xAE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE4 "DOC0EXPD5817,"
hexmask.long.word 0xAE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE8 "DOC0EXPD5818,"
hexmask.long.word 0xAE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAEC "DOC0EXPD5819,"
hexmask.long.word 0xAEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF0 "DOC0EXPD5820,"
hexmask.long.word 0xAF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF4 "DOC0EXPD5821,"
hexmask.long.word 0xAF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF8 "DOC0EXPD5822,"
hexmask.long.word 0xAF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAFC "DOC0EXPD5823,"
hexmask.long.word 0xAFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB00 "DOC0EXPD5824,"
hexmask.long.word 0xB00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB04 "DOC0EXPD5825,"
hexmask.long.word 0xB04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB08 "DOC0EXPD5826,"
hexmask.long.word 0xB08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB0C "DOC0EXPD5827,"
hexmask.long.word 0xB0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB10 "DOC0EXPD5828,"
hexmask.long.word 0xB10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB14 "DOC0EXPD5829,"
hexmask.long.word 0xB14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB18 "DOC0EXPD5830,"
hexmask.long.word 0xB18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB1C "DOC0EXPD5831,"
hexmask.long.word 0xB1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB20 "DOC0EXPD5832,"
hexmask.long.word 0xB20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB24 "DOC0EXPD5833,"
hexmask.long.word 0xB24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB28 "DOC0EXPD5834,"
hexmask.long.word 0xB28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB2C "DOC0EXPD5835,"
hexmask.long.word 0xB2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB30 "DOC0EXPD5836,"
hexmask.long.word 0xB30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB34 "DOC0EXPD5837,"
hexmask.long.word 0xB34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB38 "DOC0EXPD5838,"
hexmask.long.word 0xB38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB3C "DOC0EXPD5839,"
hexmask.long.word 0xB3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB40 "DOC0EXPD5840,"
hexmask.long.word 0xB40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB44 "DOC0EXPD5841,"
hexmask.long.word 0xB44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB48 "DOC0EXPD5842,"
hexmask.long.word 0xB48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB4C "DOC0EXPD5843,"
hexmask.long.word 0xB4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB50 "DOC0EXPD5844,"
hexmask.long.word 0xB50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB54 "DOC0EXPD5845,"
hexmask.long.word 0xB54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB58 "DOC0EXPD5846,"
hexmask.long.word 0xB58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB5C "DOC0EXPD5847,"
hexmask.long.word 0xB5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB60 "DOC0EXPD5848,"
hexmask.long.word 0xB60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB64 "DOC0EXPD5849,"
hexmask.long.word 0xB64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB68 "DOC0EXPD5850,"
hexmask.long.word 0xB68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB6C "DOC0EXPD5851,"
hexmask.long.word 0xB6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB70 "DOC0EXPD5852,"
hexmask.long.word 0xB70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB74 "DOC0EXPD5853,"
hexmask.long.word 0xB74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB78 "DOC0EXPD5854,"
hexmask.long.word 0xB78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB7C "DOC0EXPD5855,"
hexmask.long.word 0xB7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB80 "DOC0EXPD5856,"
hexmask.long.word 0xB80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB84 "DOC0EXPD5857,"
hexmask.long.word 0xB84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB88 "DOC0EXPD5858,"
hexmask.long.word 0xB88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB8C "DOC0EXPD5859,"
hexmask.long.word 0xB8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB90 "DOC0EXPD5860,"
hexmask.long.word 0xB90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB94 "DOC0EXPD5861,"
hexmask.long.word 0xB94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB98 "DOC0EXPD5862,"
hexmask.long.word 0xB98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB9C "DOC0EXPD5863,"
hexmask.long.word 0xB9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA0 "DOC0EXPD5864,"
hexmask.long.word 0xBA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA4 "DOC0EXPD5865,"
hexmask.long.word 0xBA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA8 "DOC0EXPD5866,"
hexmask.long.word 0xBA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBAC "DOC0EXPD5867,"
hexmask.long.word 0xBAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB0 "DOC0EXPD5868,"
hexmask.long.word 0xBB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB4 "DOC0EXPD5869,"
hexmask.long.word 0xBB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB8 "DOC0EXPD5870,"
hexmask.long.word 0xBB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBBC "DOC0EXPD5871,"
hexmask.long.word 0xBBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC0 "DOC0EXPD5872,"
hexmask.long.word 0xBC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC4 "DOC0EXPD5873,"
hexmask.long.word 0xBC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC8 "DOC0EXPD5874,"
hexmask.long.word 0xBC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBCC "DOC0EXPD5875,"
hexmask.long.word 0xBCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD0 "DOC0EXPD5876,"
hexmask.long.word 0xBD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD4 "DOC0EXPD5877,"
hexmask.long.word 0xBD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD8 "DOC0EXPD5878,"
hexmask.long.word 0xBD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBDC "DOC0EXPD5879,"
hexmask.long.word 0xBDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE0 "DOC0EXPD5880,"
hexmask.long.word 0xBE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE4 "DOC0EXPD5881,"
hexmask.long.word 0xBE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE8 "DOC0EXPD5882,"
hexmask.long.word 0xBE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBEC "DOC0EXPD5883,"
hexmask.long.word 0xBEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF0 "DOC0EXPD5884,"
hexmask.long.word 0xBF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF4 "DOC0EXPD5885,"
hexmask.long.word 0xBF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF8 "DOC0EXPD5886,"
hexmask.long.word 0xBF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBFC "DOC0EXPD5887,"
hexmask.long.word 0xBFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC00 "DOC0EXPD5888,"
hexmask.long.word 0xC00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC04 "DOC0EXPD5889,"
hexmask.long.word 0xC04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC08 "DOC0EXPD5890,"
hexmask.long.word 0xC08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC0C "DOC0EXPD5891,"
hexmask.long.word 0xC0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC10 "DOC0EXPD5892,"
hexmask.long.word 0xC10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC14 "DOC0EXPD5893,"
hexmask.long.word 0xC14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC18 "DOC0EXPD5894,"
hexmask.long.word 0xC18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC1C "DOC0EXPD5895,"
hexmask.long.word 0xC1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC20 "DOC0EXPD5896,"
hexmask.long.word 0xC20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC24 "DOC0EXPD5897,"
hexmask.long.word 0xC24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC28 "DOC0EXPD5898,"
hexmask.long.word 0xC28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC2C "DOC0EXPD5899,"
hexmask.long.word 0xC2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC30 "DOC0EXPD5900,"
hexmask.long.word 0xC30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC34 "DOC0EXPD5901,"
hexmask.long.word 0xC34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC38 "DOC0EXPD5902,"
hexmask.long.word 0xC38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC3C "DOC0EXPD5903,"
hexmask.long.word 0xC3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC40 "DOC0EXPD5904,"
hexmask.long.word 0xC40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC44 "DOC0EXPD5905,"
hexmask.long.word 0xC44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC48 "DOC0EXPD5906,"
hexmask.long.word 0xC48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC4C "DOC0EXPD5907,"
hexmask.long.word 0xC4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC50 "DOC0EXPD5908,"
hexmask.long.word 0xC50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC54 "DOC0EXPD5909,"
hexmask.long.word 0xC54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC58 "DOC0EXPD5910,"
hexmask.long.word 0xC58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC5C "DOC0EXPD5911,"
hexmask.long.word 0xC5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC60 "DOC0EXPD5912,"
hexmask.long.word 0xC60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC64 "DOC0EXPD5913,"
hexmask.long.word 0xC64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC68 "DOC0EXPD5914,"
hexmask.long.word 0xC68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC6C "DOC0EXPD5915,"
hexmask.long.word 0xC6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC70 "DOC0EXPD5916,"
hexmask.long.word 0xC70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC74 "DOC0EXPD5917,"
hexmask.long.word 0xC74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC78 "DOC0EXPD5918,"
hexmask.long.word 0xC78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC7C "DOC0EXPD5919,"
hexmask.long.word 0xC7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC80 "DOC0EXPD5920,"
hexmask.long.word 0xC80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC84 "DOC0EXPD5921,"
hexmask.long.word 0xC84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC88 "DOC0EXPD5922,"
hexmask.long.word 0xC88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC8C "DOC0EXPD5923,"
hexmask.long.word 0xC8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC90 "DOC0EXPD5924,"
hexmask.long.word 0xC90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC94 "DOC0EXPD5925,"
hexmask.long.word 0xC94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC98 "DOC0EXPD5926,"
hexmask.long.word 0xC98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC9C "DOC0EXPD5927,"
hexmask.long.word 0xC9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA0 "DOC0EXPD5928,"
hexmask.long.word 0xCA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA4 "DOC0EXPD5929,"
hexmask.long.word 0xCA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA8 "DOC0EXPD5930,"
hexmask.long.word 0xCA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCAC "DOC0EXPD5931,"
hexmask.long.word 0xCAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB0 "DOC0EXPD5932,"
hexmask.long.word 0xCB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB4 "DOC0EXPD5933,"
hexmask.long.word 0xCB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB8 "DOC0EXPD5934,"
hexmask.long.word 0xCB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCBC "DOC0EXPD5935,"
hexmask.long.word 0xCBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC0 "DOC0EXPD5936,"
hexmask.long.word 0xCC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC4 "DOC0EXPD5937,"
hexmask.long.word 0xCC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC8 "DOC0EXPD5938,"
hexmask.long.word 0xCC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCCC "DOC0EXPD5939,"
hexmask.long.word 0xCCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD0 "DOC0EXPD5940,"
hexmask.long.word 0xCD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD4 "DOC0EXPD5941,"
hexmask.long.word 0xCD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD8 "DOC0EXPD5942,"
hexmask.long.word 0xCD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCDC "DOC0EXPD5943,"
hexmask.long.word 0xCDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE0 "DOC0EXPD5944,"
hexmask.long.word 0xCE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE4 "DOC0EXPD5945,"
hexmask.long.word 0xCE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE8 "DOC0EXPD5946,"
hexmask.long.word 0xCE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCEC "DOC0EXPD5947,"
hexmask.long.word 0xCEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF0 "DOC0EXPD5948,"
hexmask.long.word 0xCF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF4 "DOC0EXPD5949,"
hexmask.long.word 0xCF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF8 "DOC0EXPD5950,"
hexmask.long.word 0xCF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCFC "DOC0EXPD5951,"
hexmask.long.word 0xCFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD00 "DOC0EXPD5952,"
hexmask.long.word 0xD00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD04 "DOC0EXPD5953,"
hexmask.long.word 0xD04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD08 "DOC0EXPD5954,"
hexmask.long.word 0xD08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD0C "DOC0EXPD5955,"
hexmask.long.word 0xD0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD10 "DOC0EXPD5956,"
hexmask.long.word 0xD10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD14 "DOC0EXPD5957,"
hexmask.long.word 0xD14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD18 "DOC0EXPD5958,"
hexmask.long.word 0xD18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD1C "DOC0EXPD5959,"
hexmask.long.word 0xD1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD20 "DOC0EXPD5960,"
hexmask.long.word 0xD20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD24 "DOC0EXPD5961,"
hexmask.long.word 0xD24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD28 "DOC0EXPD5962,"
hexmask.long.word 0xD28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD2C "DOC0EXPD5963,"
hexmask.long.word 0xD2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD30 "DOC0EXPD5964,"
hexmask.long.word 0xD30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD34 "DOC0EXPD5965,"
hexmask.long.word 0xD34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD38 "DOC0EXPD5966,"
hexmask.long.word 0xD38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD3C "DOC0EXPD5967,"
hexmask.long.word 0xD3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD40 "DOC0EXPD5968,"
hexmask.long.word 0xD40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD44 "DOC0EXPD5969,"
hexmask.long.word 0xD44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD48 "DOC0EXPD5970,"
hexmask.long.word 0xD48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD4C "DOC0EXPD5971,"
hexmask.long.word 0xD4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD50 "DOC0EXPD5972,"
hexmask.long.word 0xD50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD54 "DOC0EXPD5973,"
hexmask.long.word 0xD54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD58 "DOC0EXPD5974,"
hexmask.long.word 0xD58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD5C "DOC0EXPD5975,"
hexmask.long.word 0xD5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD60 "DOC0EXPD5976,"
hexmask.long.word 0xD60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD64 "DOC0EXPD5977,"
hexmask.long.word 0xD64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD68 "DOC0EXPD5978,"
hexmask.long.word 0xD68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD6C "DOC0EXPD5979,"
hexmask.long.word 0xD6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD70 "DOC0EXPD5980,"
hexmask.long.word 0xD70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD74 "DOC0EXPD5981,"
hexmask.long.word 0xD74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD78 "DOC0EXPD5982,"
hexmask.long.word 0xD78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD7C "DOC0EXPD5983,"
hexmask.long.word 0xD7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD80 "DOC0EXPD5984,"
hexmask.long.word 0xD80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD84 "DOC0EXPD5985,"
hexmask.long.word 0xD84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD88 "DOC0EXPD5986,"
hexmask.long.word 0xD88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD8C "DOC0EXPD5987,"
hexmask.long.word 0xD8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD90 "DOC0EXPD5988,"
hexmask.long.word 0xD90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD94 "DOC0EXPD5989,"
hexmask.long.word 0xD94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD98 "DOC0EXPD5990,"
hexmask.long.word 0xD98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD9C "DOC0EXPD5991,"
hexmask.long.word 0xD9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA0 "DOC0EXPD5992,"
hexmask.long.word 0xDA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA4 "DOC0EXPD5993,"
hexmask.long.word 0xDA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA8 "DOC0EXPD5994,"
hexmask.long.word 0xDA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDAC "DOC0EXPD5995,"
hexmask.long.word 0xDAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB0 "DOC0EXPD5996,"
hexmask.long.word 0xDB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB4 "DOC0EXPD5997,"
hexmask.long.word 0xDB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB8 "DOC0EXPD5998,"
hexmask.long.word 0xDB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDBC "DOC0EXPD5999,"
hexmask.long.word 0xDBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC0 "DOC0EXPD6000,"
hexmask.long.word 0xDC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC4 "DOC0EXPD6001,"
hexmask.long.word 0xDC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC8 "DOC0EXPD6002,"
hexmask.long.word 0xDC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDCC "DOC0EXPD6003,"
hexmask.long.word 0xDCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD0 "DOC0EXPD6004,"
hexmask.long.word 0xDD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD4 "DOC0EXPD6005,"
hexmask.long.word 0xDD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD8 "DOC0EXPD6006,"
hexmask.long.word 0xDD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDDC "DOC0EXPD6007,"
hexmask.long.word 0xDDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE0 "DOC0EXPD6008,"
hexmask.long.word 0xDE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE4 "DOC0EXPD6009,"
hexmask.long.word 0xDE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE8 "DOC0EXPD6010,"
hexmask.long.word 0xDE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDEC "DOC0EXPD6011,"
hexmask.long.word 0xDEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF0 "DOC0EXPD6012,"
hexmask.long.word 0xDF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF4 "DOC0EXPD6013,"
hexmask.long.word 0xDF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF8 "DOC0EXPD6014,"
hexmask.long.word 0xDF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDFC "DOC0EXPD6015,"
hexmask.long.word 0xDFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE00 "DOC0EXPD6016,"
hexmask.long.word 0xE00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE04 "DOC0EXPD6017,"
hexmask.long.word 0xE04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE08 "DOC0EXPD6018,"
hexmask.long.word 0xE08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE0C "DOC0EXPD6019,"
hexmask.long.word 0xE0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE10 "DOC0EXPD6020,"
hexmask.long.word 0xE10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE14 "DOC0EXPD6021,"
hexmask.long.word 0xE14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE18 "DOC0EXPD6022,"
hexmask.long.word 0xE18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE1C "DOC0EXPD6023,"
hexmask.long.word 0xE1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE20 "DOC0EXPD6024,"
hexmask.long.word 0xE20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE24 "DOC0EXPD6025,"
hexmask.long.word 0xE24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE28 "DOC0EXPD6026,"
hexmask.long.word 0xE28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE2C "DOC0EXPD6027,"
hexmask.long.word 0xE2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE30 "DOC0EXPD6028,"
hexmask.long.word 0xE30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE34 "DOC0EXPD6029,"
hexmask.long.word 0xE34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE38 "DOC0EXPD6030,"
hexmask.long.word 0xE38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE3C "DOC0EXPD6031,"
hexmask.long.word 0xE3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE40 "DOC0EXPD6032,"
hexmask.long.word 0xE40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE44 "DOC0EXPD6033,"
hexmask.long.word 0xE44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE48 "DOC0EXPD6034,"
hexmask.long.word 0xE48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE4C "DOC0EXPD6035,"
hexmask.long.word 0xE4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE50 "DOC0EXPD6036,"
hexmask.long.word 0xE50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE54 "DOC0EXPD6037,"
hexmask.long.word 0xE54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE58 "DOC0EXPD6038,"
hexmask.long.word 0xE58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE5C "DOC0EXPD6039,"
hexmask.long.word 0xE5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE60 "DOC0EXPD6040,"
hexmask.long.word 0xE60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE64 "DOC0EXPD6041,"
hexmask.long.word 0xE64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE68 "DOC0EXPD6042,"
hexmask.long.word 0xE68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE6C "DOC0EXPD6043,"
hexmask.long.word 0xE6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE70 "DOC0EXPD6044,"
hexmask.long.word 0xE70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE74 "DOC0EXPD6045,"
hexmask.long.word 0xE74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE78 "DOC0EXPD6046,"
hexmask.long.word 0xE78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE7C "DOC0EXPD6047,"
hexmask.long.word 0xE7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE80 "DOC0EXPD6048,"
hexmask.long.word 0xE80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE84 "DOC0EXPD6049,"
hexmask.long.word 0xE84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE88 "DOC0EXPD6050,"
hexmask.long.word 0xE88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE8C "DOC0EXPD6051,"
hexmask.long.word 0xE8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE90 "DOC0EXPD6052,"
hexmask.long.word 0xE90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE94 "DOC0EXPD6053,"
hexmask.long.word 0xE94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE98 "DOC0EXPD6054,"
hexmask.long.word 0xE98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE9C "DOC0EXPD6055,"
hexmask.long.word 0xE9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA0 "DOC0EXPD6056,"
hexmask.long.word 0xEA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA4 "DOC0EXPD6057,"
hexmask.long.word 0xEA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA8 "DOC0EXPD6058,"
hexmask.long.word 0xEA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEAC "DOC0EXPD6059,"
hexmask.long.word 0xEAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB0 "DOC0EXPD6060,"
hexmask.long.word 0xEB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB4 "DOC0EXPD6061,"
hexmask.long.word 0xEB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB8 "DOC0EXPD6062,"
hexmask.long.word 0xEB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEBC "DOC0EXPD6063,"
hexmask.long.word 0xEBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC0 "DOC0EXPD6064,"
hexmask.long.word 0xEC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC4 "DOC0EXPD6065,"
hexmask.long.word 0xEC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC8 "DOC0EXPD6066,"
hexmask.long.word 0xEC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xECC "DOC0EXPD6067,"
hexmask.long.word 0xECC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xECC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xECC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xECC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xECC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xECC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xECC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xECC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xECC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED0 "DOC0EXPD6068,"
hexmask.long.word 0xED0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED4 "DOC0EXPD6069,"
hexmask.long.word 0xED4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED8 "DOC0EXPD6070,"
hexmask.long.word 0xED8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEDC "DOC0EXPD6071,"
hexmask.long.word 0xEDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE0 "DOC0EXPD6072,"
hexmask.long.word 0xEE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE4 "DOC0EXPD6073,"
hexmask.long.word 0xEE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE8 "DOC0EXPD6074,"
hexmask.long.word 0xEE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEEC "DOC0EXPD6075,"
hexmask.long.word 0xEEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF0 "DOC0EXPD6076,"
hexmask.long.word 0xEF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF4 "DOC0EXPD6077,"
hexmask.long.word 0xEF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF8 "DOC0EXPD6078,"
hexmask.long.word 0xEF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEFC "DOC0EXPD6079,"
hexmask.long.word 0xEFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF00 "DOC0EXPD6080,"
hexmask.long.word 0xF00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF04 "DOC0EXPD6081,"
hexmask.long.word 0xF04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF08 "DOC0EXPD6082,"
hexmask.long.word 0xF08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF0C "DOC0EXPD6083,"
hexmask.long.word 0xF0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF10 "DOC0EXPD6084,"
hexmask.long.word 0xF10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF14 "DOC0EXPD6085,"
hexmask.long.word 0xF14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF18 "DOC0EXPD6086,"
hexmask.long.word 0xF18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF1C "DOC0EXPD6087,"
hexmask.long.word 0xF1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF20 "DOC0EXPD6088,"
hexmask.long.word 0xF20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF24 "DOC0EXPD6089,"
hexmask.long.word 0xF24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF28 "DOC0EXPD6090,"
hexmask.long.word 0xF28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF2C "DOC0EXPD6091,"
hexmask.long.word 0xF2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF30 "DOC0EXPD6092,"
hexmask.long.word 0xF30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF34 "DOC0EXPD6093,"
hexmask.long.word 0xF34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF38 "DOC0EXPD6094,"
hexmask.long.word 0xF38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF3C "DOC0EXPD6095,"
hexmask.long.word 0xF3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF40 "DOC0EXPD6096,"
hexmask.long.word 0xF40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF44 "DOC0EXPD6097,"
hexmask.long.word 0xF44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF48 "DOC0EXPD6098,"
hexmask.long.word 0xF48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF4C "DOC0EXPD6099,"
hexmask.long.word 0xF4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF50 "DOC0EXPD6100,"
hexmask.long.word 0xF50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF54 "DOC0EXPD6101,"
hexmask.long.word 0xF54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF58 "DOC0EXPD6102,"
hexmask.long.word 0xF58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF5C "DOC0EXPD6103,"
hexmask.long.word 0xF5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF60 "DOC0EXPD6104,"
hexmask.long.word 0xF60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF64 "DOC0EXPD6105,"
hexmask.long.word 0xF64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF68 "DOC0EXPD6106,"
hexmask.long.word 0xF68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF6C "DOC0EXPD6107,"
hexmask.long.word 0xF6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF70 "DOC0EXPD6108,"
hexmask.long.word 0xF70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF74 "DOC0EXPD6109,"
hexmask.long.word 0xF74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF78 "DOC0EXPD6110,"
hexmask.long.word 0xF78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF7C "DOC0EXPD6111,"
hexmask.long.word 0xF7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF80 "DOC0EXPD6112,"
hexmask.long.word 0xF80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF84 "DOC0EXPD6113,"
hexmask.long.word 0xF84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF88 "DOC0EXPD6114,"
hexmask.long.word 0xF88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF8C "DOC0EXPD6115,"
hexmask.long.word 0xF8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF90 "DOC0EXPD6116,"
hexmask.long.word 0xF90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF94 "DOC0EXPD6117,"
hexmask.long.word 0xF94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF98 "DOC0EXPD6118,"
hexmask.long.word 0xF98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF9C "DOC0EXPD6119,"
hexmask.long.word 0xF9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA0 "DOC0EXPD6120,"
hexmask.long.word 0xFA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA4 "DOC0EXPD6121,"
hexmask.long.word 0xFA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA8 "DOC0EXPD6122,"
hexmask.long.word 0xFA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFAC "DOC0EXPD6123,"
hexmask.long.word 0xFAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB0 "DOC0EXPD6124,"
hexmask.long.word 0xFB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB4 "DOC0EXPD6125,"
hexmask.long.word 0xFB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB8 "DOC0EXPD6126,"
hexmask.long.word 0xFB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFBC "DOC0EXPD6127,"
hexmask.long.word 0xFBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC0 "DOC0EXPD6128,"
hexmask.long.word 0xFC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC4 "DOC0EXPD6129,"
hexmask.long.word 0xFC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC8 "DOC0EXPD6130,"
hexmask.long.word 0xFC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFCC "DOC0EXPD6131,"
hexmask.long.word 0xFCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD0 "DOC0EXPD6132,"
hexmask.long.word 0xFD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD4 "DOC0EXPD6133,"
hexmask.long.word 0xFD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD8 "DOC0EXPD6134,"
hexmask.long.word 0xFD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFDC "DOC0EXPD6135,"
hexmask.long.word 0xFDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE0 "DOC0EXPD6136,"
hexmask.long.word 0xFE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE4 "DOC0EXPD6137,"
hexmask.long.word 0xFE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE8 "DOC0EXPD6138,"
hexmask.long.word 0xFE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFEC "DOC0EXPD6139,"
hexmask.long.word 0xFEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF0 "DOC0EXPD6140,"
hexmask.long.word 0xFF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF4 "DOC0EXPD6141,"
hexmask.long.word 0xFF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF8 "DOC0EXPD6142,"
hexmask.long.word 0xFF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFFC "DOC0EXPD6143,"
hexmask.long.word 0xFFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
group.long 0xA300++0xFFF
line.long 0x0 "DOC0EXPD6144,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4 "DOC0EXPD6145,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8 "DOC0EXPD6146,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC "DOC0EXPD6147,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x10 "DOC0EXPD6148,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x14 "DOC0EXPD6149,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x18 "DOC0EXPD6150,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C "DOC0EXPD6151,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x20 "DOC0EXPD6152,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x24 "DOC0EXPD6153,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x28 "DOC0EXPD6154,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C "DOC0EXPD6155,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x30 "DOC0EXPD6156,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x34 "DOC0EXPD6157,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x38 "DOC0EXPD6158,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C "DOC0EXPD6159,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x40 "DOC0EXPD6160,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x44 "DOC0EXPD6161,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x48 "DOC0EXPD6162,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C "DOC0EXPD6163,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x50 "DOC0EXPD6164,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x54 "DOC0EXPD6165,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x58 "DOC0EXPD6166,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C "DOC0EXPD6167,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x60 "DOC0EXPD6168,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x64 "DOC0EXPD6169,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x68 "DOC0EXPD6170,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C "DOC0EXPD6171,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x70 "DOC0EXPD6172,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x74 "DOC0EXPD6173,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x78 "DOC0EXPD6174,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C "DOC0EXPD6175,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x80 "DOC0EXPD6176,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x84 "DOC0EXPD6177,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x88 "DOC0EXPD6178,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C "DOC0EXPD6179,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x90 "DOC0EXPD6180,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x94 "DOC0EXPD6181,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x98 "DOC0EXPD6182,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C "DOC0EXPD6183,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA0 "DOC0EXPD6184,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA4 "DOC0EXPD6185,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA8 "DOC0EXPD6186,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC "DOC0EXPD6187,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB0 "DOC0EXPD6188,"
hexmask.long.word 0xB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB4 "DOC0EXPD6189,"
hexmask.long.word 0xB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB8 "DOC0EXPD6190,"
hexmask.long.word 0xB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC "DOC0EXPD6191,"
hexmask.long.word 0xBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC0 "DOC0EXPD6192,"
hexmask.long.word 0xC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC4 "DOC0EXPD6193,"
hexmask.long.word 0xC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC8 "DOC0EXPD6194,"
hexmask.long.word 0xC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC "DOC0EXPD6195,"
hexmask.long.word 0xCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD0 "DOC0EXPD6196,"
hexmask.long.word 0xD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD4 "DOC0EXPD6197,"
hexmask.long.word 0xD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD8 "DOC0EXPD6198,"
hexmask.long.word 0xD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC "DOC0EXPD6199,"
hexmask.long.word 0xDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE0 "DOC0EXPD6200,"
hexmask.long.word 0xE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE4 "DOC0EXPD6201,"
hexmask.long.word 0xE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE8 "DOC0EXPD6202,"
hexmask.long.word 0xE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC "DOC0EXPD6203,"
hexmask.long.word 0xEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF0 "DOC0EXPD6204,"
hexmask.long.word 0xF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF4 "DOC0EXPD6205,"
hexmask.long.word 0xF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF8 "DOC0EXPD6206,"
hexmask.long.word 0xF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC "DOC0EXPD6207,"
hexmask.long.word 0xFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x100 "DOC0EXPD6208,"
hexmask.long.word 0x100 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x100 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x100 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x100 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x100 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x100 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x100 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x100 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x100 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x104 "DOC0EXPD6209,"
hexmask.long.word 0x104 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x104 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x104 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x104 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x104 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x104 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x104 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x104 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x104 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x108 "DOC0EXPD6210,"
hexmask.long.word 0x108 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x108 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x108 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x108 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x108 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x108 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x108 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x108 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x108 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x10C "DOC0EXPD6211,"
hexmask.long.word 0x10C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x10C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x10C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x10C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x10C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x10C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x10C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x10C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x10C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x110 "DOC0EXPD6212,"
hexmask.long.word 0x110 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x110 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x110 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x110 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x110 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x110 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x110 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x110 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x110 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x114 "DOC0EXPD6213,"
hexmask.long.word 0x114 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x114 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x114 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x114 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x114 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x114 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x114 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x114 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x114 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x118 "DOC0EXPD6214,"
hexmask.long.word 0x118 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x118 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x118 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x118 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x118 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x118 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x118 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x118 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x118 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x11C "DOC0EXPD6215,"
hexmask.long.word 0x11C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x11C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x11C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x11C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x11C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x11C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x11C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x11C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x11C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x120 "DOC0EXPD6216,"
hexmask.long.word 0x120 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x120 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x120 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x120 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x120 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x120 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x120 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x120 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x120 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x124 "DOC0EXPD6217,"
hexmask.long.word 0x124 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x124 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x124 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x124 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x124 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x124 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x124 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x124 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x124 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x128 "DOC0EXPD6218,"
hexmask.long.word 0x128 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x128 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x128 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x128 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x128 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x128 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x128 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x128 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x128 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x12C "DOC0EXPD6219,"
hexmask.long.word 0x12C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x12C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x12C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x12C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x12C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x12C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x12C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x12C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x12C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x130 "DOC0EXPD6220,"
hexmask.long.word 0x130 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x130 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x130 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x130 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x130 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x130 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x130 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x130 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x130 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x134 "DOC0EXPD6221,"
hexmask.long.word 0x134 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x134 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x134 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x134 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x134 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x134 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x134 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x134 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x134 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x138 "DOC0EXPD6222,"
hexmask.long.word 0x138 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x138 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x138 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x138 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x138 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x138 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x138 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x138 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x138 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x13C "DOC0EXPD6223,"
hexmask.long.word 0x13C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x13C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x13C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x13C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x13C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x13C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x13C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x13C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x13C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x140 "DOC0EXPD6224,"
hexmask.long.word 0x140 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x140 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x140 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x140 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x140 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x140 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x140 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x140 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x140 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x144 "DOC0EXPD6225,"
hexmask.long.word 0x144 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x144 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x144 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x144 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x144 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x144 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x144 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x144 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x144 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x148 "DOC0EXPD6226,"
hexmask.long.word 0x148 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x148 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x148 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x148 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x148 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x148 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x148 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x148 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x148 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x14C "DOC0EXPD6227,"
hexmask.long.word 0x14C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x14C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x14C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x14C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x14C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x14C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x14C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x14C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x150 "DOC0EXPD6228,"
hexmask.long.word 0x150 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x150 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x150 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x150 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x150 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x150 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x150 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x150 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x150 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x154 "DOC0EXPD6229,"
hexmask.long.word 0x154 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x154 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x154 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x154 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x154 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x154 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x154 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x154 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x154 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x158 "DOC0EXPD6230,"
hexmask.long.word 0x158 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x158 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x158 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x158 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x158 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x158 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x158 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x158 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x158 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x15C "DOC0EXPD6231,"
hexmask.long.word 0x15C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x15C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x15C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x15C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x15C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x15C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x15C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x15C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x15C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x160 "DOC0EXPD6232,"
hexmask.long.word 0x160 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x160 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x160 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x160 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x160 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x160 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x160 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x160 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x160 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x164 "DOC0EXPD6233,"
hexmask.long.word 0x164 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x164 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x164 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x164 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x164 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x164 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x164 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x164 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x164 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x168 "DOC0EXPD6234,"
hexmask.long.word 0x168 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x168 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x168 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x168 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x168 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x168 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x168 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x168 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x168 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x16C "DOC0EXPD6235,"
hexmask.long.word 0x16C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x16C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x16C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x16C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x16C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x16C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x16C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x16C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x16C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x170 "DOC0EXPD6236,"
hexmask.long.word 0x170 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x170 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x170 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x170 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x170 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x170 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x170 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x170 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x170 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x174 "DOC0EXPD6237,"
hexmask.long.word 0x174 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x174 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x174 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x174 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x174 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x174 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x174 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x174 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x174 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x178 "DOC0EXPD6238,"
hexmask.long.word 0x178 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x178 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x178 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x178 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x178 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x178 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x178 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x178 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x178 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x17C "DOC0EXPD6239,"
hexmask.long.word 0x17C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x17C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x17C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x17C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x17C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x17C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x17C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x17C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x17C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x180 "DOC0EXPD6240,"
hexmask.long.word 0x180 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x180 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x180 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x180 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x180 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x180 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x180 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x180 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x180 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x184 "DOC0EXPD6241,"
hexmask.long.word 0x184 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x184 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x184 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x184 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x184 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x184 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x184 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x184 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x184 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x188 "DOC0EXPD6242,"
hexmask.long.word 0x188 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x188 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x188 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x188 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x188 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x188 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x188 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x188 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x188 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x18C "DOC0EXPD6243,"
hexmask.long.word 0x18C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x18C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x18C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x18C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x18C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x18C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x18C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x18C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x18C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x190 "DOC0EXPD6244,"
hexmask.long.word 0x190 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x190 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x190 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x190 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x190 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x190 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x190 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x190 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x190 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x194 "DOC0EXPD6245,"
hexmask.long.word 0x194 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x194 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x194 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x194 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x194 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x194 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x194 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x194 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x194 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x198 "DOC0EXPD6246,"
hexmask.long.word 0x198 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x198 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x198 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x198 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x198 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x198 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x198 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x198 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x198 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x19C "DOC0EXPD6247,"
hexmask.long.word 0x19C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x19C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x19C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x19C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x19C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x19C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x19C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x19C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x19C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A0 "DOC0EXPD6248,"
hexmask.long.word 0x1A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A4 "DOC0EXPD6249,"
hexmask.long.word 0x1A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A8 "DOC0EXPD6250,"
hexmask.long.word 0x1A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1AC "DOC0EXPD6251,"
hexmask.long.word 0x1AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B0 "DOC0EXPD6252,"
hexmask.long.word 0x1B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B4 "DOC0EXPD6253,"
hexmask.long.word 0x1B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B8 "DOC0EXPD6254,"
hexmask.long.word 0x1B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1BC "DOC0EXPD6255,"
hexmask.long.word 0x1BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C0 "DOC0EXPD6256,"
hexmask.long.word 0x1C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C4 "DOC0EXPD6257,"
hexmask.long.word 0x1C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C8 "DOC0EXPD6258,"
hexmask.long.word 0x1C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1CC "DOC0EXPD6259,"
hexmask.long.word 0x1CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D0 "DOC0EXPD6260,"
hexmask.long.word 0x1D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D4 "DOC0EXPD6261,"
hexmask.long.word 0x1D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D8 "DOC0EXPD6262,"
hexmask.long.word 0x1D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1DC "DOC0EXPD6263,"
hexmask.long.word 0x1DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E0 "DOC0EXPD6264,"
hexmask.long.word 0x1E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E4 "DOC0EXPD6265,"
hexmask.long.word 0x1E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E8 "DOC0EXPD6266,"
hexmask.long.word 0x1E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1EC "DOC0EXPD6267,"
hexmask.long.word 0x1EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F0 "DOC0EXPD6268,"
hexmask.long.word 0x1F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F4 "DOC0EXPD6269,"
hexmask.long.word 0x1F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F8 "DOC0EXPD6270,"
hexmask.long.word 0x1F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1FC "DOC0EXPD6271,"
hexmask.long.word 0x1FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x200 "DOC0EXPD6272,"
hexmask.long.word 0x200 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x200 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x200 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x200 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x200 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x200 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x200 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x200 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x200 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x204 "DOC0EXPD6273,"
hexmask.long.word 0x204 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x204 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x204 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x204 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x204 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x204 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x204 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x204 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x204 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x208 "DOC0EXPD6274,"
hexmask.long.word 0x208 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x208 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x208 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x208 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x208 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x208 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x208 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x208 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x208 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x20C "DOC0EXPD6275,"
hexmask.long.word 0x20C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x20C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x20C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x20C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x20C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x20C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x20C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x20C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x20C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x210 "DOC0EXPD6276,"
hexmask.long.word 0x210 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x210 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x210 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x210 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x210 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x210 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x210 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x210 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x210 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x214 "DOC0EXPD6277,"
hexmask.long.word 0x214 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x214 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x214 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x214 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x214 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x214 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x214 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x214 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x214 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x218 "DOC0EXPD6278,"
hexmask.long.word 0x218 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x218 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x218 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x218 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x218 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x218 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x218 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x218 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x218 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x21C "DOC0EXPD6279,"
hexmask.long.word 0x21C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x21C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x21C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x21C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x21C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x21C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x21C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x21C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x21C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x220 "DOC0EXPD6280,"
hexmask.long.word 0x220 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x220 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x220 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x220 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x220 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x220 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x220 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x220 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x220 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x224 "DOC0EXPD6281,"
hexmask.long.word 0x224 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x224 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x224 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x224 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x224 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x224 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x224 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x224 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x224 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x228 "DOC0EXPD6282,"
hexmask.long.word 0x228 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x228 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x228 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x228 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x228 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x228 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x228 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x228 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x228 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x22C "DOC0EXPD6283,"
hexmask.long.word 0x22C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x22C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x22C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x22C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x22C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x22C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x22C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x22C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x22C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x230 "DOC0EXPD6284,"
hexmask.long.word 0x230 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x230 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x230 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x230 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x230 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x230 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x230 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x230 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x230 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x234 "DOC0EXPD6285,"
hexmask.long.word 0x234 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x234 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x234 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x234 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x234 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x234 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x234 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x234 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x234 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x238 "DOC0EXPD6286,"
hexmask.long.word 0x238 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x238 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x238 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x238 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x238 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x238 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x238 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x238 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x238 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x23C "DOC0EXPD6287,"
hexmask.long.word 0x23C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x23C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x23C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x23C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x23C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x23C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x23C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x23C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x23C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x240 "DOC0EXPD6288,"
hexmask.long.word 0x240 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x240 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x240 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x240 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x240 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x240 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x240 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x240 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x240 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x244 "DOC0EXPD6289,"
hexmask.long.word 0x244 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x244 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x244 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x244 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x244 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x244 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x244 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x244 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x244 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x248 "DOC0EXPD6290,"
hexmask.long.word 0x248 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x248 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x248 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x248 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x248 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x248 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x248 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x248 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x248 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x24C "DOC0EXPD6291,"
hexmask.long.word 0x24C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x24C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x24C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x24C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x24C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x24C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x24C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x24C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x24C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x250 "DOC0EXPD6292,"
hexmask.long.word 0x250 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x250 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x250 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x250 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x250 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x250 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x250 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x250 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x250 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x254 "DOC0EXPD6293,"
hexmask.long.word 0x254 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x254 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x254 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x254 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x254 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x254 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x254 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x254 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x254 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x258 "DOC0EXPD6294,"
hexmask.long.word 0x258 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x258 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x258 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x258 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x258 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x258 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x258 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x258 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x258 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x25C "DOC0EXPD6295,"
hexmask.long.word 0x25C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x25C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x25C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x25C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x25C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x25C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x25C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x25C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x25C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x260 "DOC0EXPD6296,"
hexmask.long.word 0x260 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x260 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x260 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x260 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x260 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x260 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x260 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x260 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x260 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x264 "DOC0EXPD6297,"
hexmask.long.word 0x264 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x264 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x264 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x264 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x264 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x264 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x264 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x264 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x264 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x268 "DOC0EXPD6298,"
hexmask.long.word 0x268 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x268 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x268 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x268 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x268 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x268 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x268 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x268 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x268 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x26C "DOC0EXPD6299,"
hexmask.long.word 0x26C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x26C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x26C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x26C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x26C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x26C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x26C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x26C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x26C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x270 "DOC0EXPD6300,"
hexmask.long.word 0x270 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x270 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x270 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x270 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x270 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x270 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x270 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x270 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x270 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x274 "DOC0EXPD6301,"
hexmask.long.word 0x274 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x274 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x274 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x274 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x274 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x274 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x274 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x274 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x274 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x278 "DOC0EXPD6302,"
hexmask.long.word 0x278 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x278 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x278 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x278 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x278 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x278 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x278 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x278 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x278 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x27C "DOC0EXPD6303,"
hexmask.long.word 0x27C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x27C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x27C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x27C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x27C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x27C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x27C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x27C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x27C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x280 "DOC0EXPD6304,"
hexmask.long.word 0x280 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x280 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x280 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x280 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x280 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x280 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x280 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x280 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x280 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x284 "DOC0EXPD6305,"
hexmask.long.word 0x284 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x284 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x284 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x284 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x284 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x284 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x284 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x284 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x284 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x288 "DOC0EXPD6306,"
hexmask.long.word 0x288 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x288 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x288 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x288 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x288 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x288 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x288 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x288 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x288 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x28C "DOC0EXPD6307,"
hexmask.long.word 0x28C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x28C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x28C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x28C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x28C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x28C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x28C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x28C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x28C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x290 "DOC0EXPD6308,"
hexmask.long.word 0x290 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x290 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x290 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x290 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x290 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x290 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x290 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x290 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x290 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x294 "DOC0EXPD6309,"
hexmask.long.word 0x294 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x294 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x294 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x294 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x294 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x294 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x294 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x294 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x294 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x298 "DOC0EXPD6310,"
hexmask.long.word 0x298 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x298 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x298 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x298 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x298 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x298 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x298 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x298 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x298 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x29C "DOC0EXPD6311,"
hexmask.long.word 0x29C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x29C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x29C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x29C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x29C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x29C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x29C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x29C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x29C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A0 "DOC0EXPD6312,"
hexmask.long.word 0x2A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A4 "DOC0EXPD6313,"
hexmask.long.word 0x2A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A8 "DOC0EXPD6314,"
hexmask.long.word 0x2A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2AC "DOC0EXPD6315,"
hexmask.long.word 0x2AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B0 "DOC0EXPD6316,"
hexmask.long.word 0x2B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B4 "DOC0EXPD6317,"
hexmask.long.word 0x2B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B8 "DOC0EXPD6318,"
hexmask.long.word 0x2B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2BC "DOC0EXPD6319,"
hexmask.long.word 0x2BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C0 "DOC0EXPD6320,"
hexmask.long.word 0x2C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C4 "DOC0EXPD6321,"
hexmask.long.word 0x2C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C8 "DOC0EXPD6322,"
hexmask.long.word 0x2C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2CC "DOC0EXPD6323,"
hexmask.long.word 0x2CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D0 "DOC0EXPD6324,"
hexmask.long.word 0x2D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D4 "DOC0EXPD6325,"
hexmask.long.word 0x2D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D8 "DOC0EXPD6326,"
hexmask.long.word 0x2D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2DC "DOC0EXPD6327,"
hexmask.long.word 0x2DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E0 "DOC0EXPD6328,"
hexmask.long.word 0x2E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E4 "DOC0EXPD6329,"
hexmask.long.word 0x2E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E8 "DOC0EXPD6330,"
hexmask.long.word 0x2E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2EC "DOC0EXPD6331,"
hexmask.long.word 0x2EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F0 "DOC0EXPD6332,"
hexmask.long.word 0x2F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F4 "DOC0EXPD6333,"
hexmask.long.word 0x2F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F8 "DOC0EXPD6334,"
hexmask.long.word 0x2F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2FC "DOC0EXPD6335,"
hexmask.long.word 0x2FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x300 "DOC0EXPD6336,"
hexmask.long.word 0x300 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x300 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x300 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x300 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x300 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x300 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x300 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x300 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x300 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x304 "DOC0EXPD6337,"
hexmask.long.word 0x304 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x304 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x304 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x304 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x304 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x304 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x304 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x304 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x304 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x308 "DOC0EXPD6338,"
hexmask.long.word 0x308 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x308 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x308 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x308 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x308 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x308 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x308 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x308 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x308 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x30C "DOC0EXPD6339,"
hexmask.long.word 0x30C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x30C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x30C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x30C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x30C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x30C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x30C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x30C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x30C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x310 "DOC0EXPD6340,"
hexmask.long.word 0x310 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x310 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x310 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x310 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x310 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x310 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x310 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x310 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x310 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x314 "DOC0EXPD6341,"
hexmask.long.word 0x314 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x314 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x314 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x314 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x314 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x314 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x314 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x314 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x314 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x318 "DOC0EXPD6342,"
hexmask.long.word 0x318 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x318 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x318 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x318 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x318 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x318 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x318 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x318 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x318 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x31C "DOC0EXPD6343,"
hexmask.long.word 0x31C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x31C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x31C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x31C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x31C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x31C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x31C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x31C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x31C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x320 "DOC0EXPD6344,"
hexmask.long.word 0x320 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x320 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x320 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x320 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x320 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x320 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x320 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x320 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x320 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x324 "DOC0EXPD6345,"
hexmask.long.word 0x324 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x324 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x324 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x324 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x324 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x324 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x324 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x324 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x324 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x328 "DOC0EXPD6346,"
hexmask.long.word 0x328 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x328 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x328 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x328 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x328 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x328 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x328 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x328 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x328 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x32C "DOC0EXPD6347,"
hexmask.long.word 0x32C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x32C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x32C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x32C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x32C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x32C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x32C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x32C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x32C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x330 "DOC0EXPD6348,"
hexmask.long.word 0x330 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x330 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x330 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x330 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x330 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x330 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x330 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x330 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x330 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x334 "DOC0EXPD6349,"
hexmask.long.word 0x334 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x334 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x334 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x334 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x334 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x334 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x334 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x334 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x334 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x338 "DOC0EXPD6350,"
hexmask.long.word 0x338 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x338 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x338 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x338 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x338 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x338 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x338 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x338 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x338 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x33C "DOC0EXPD6351,"
hexmask.long.word 0x33C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x33C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x33C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x33C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x33C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x33C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x33C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x33C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x33C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x340 "DOC0EXPD6352,"
hexmask.long.word 0x340 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x340 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x340 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x340 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x340 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x340 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x340 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x340 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x340 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x344 "DOC0EXPD6353,"
hexmask.long.word 0x344 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x344 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x344 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x344 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x344 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x344 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x344 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x344 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x344 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x348 "DOC0EXPD6354,"
hexmask.long.word 0x348 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x348 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x348 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x348 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x348 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x348 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x348 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x348 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x348 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x34C "DOC0EXPD6355,"
hexmask.long.word 0x34C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x34C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x34C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x34C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x34C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x34C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x34C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x34C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x34C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x350 "DOC0EXPD6356,"
hexmask.long.word 0x350 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x350 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x350 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x350 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x350 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x350 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x350 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x350 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x350 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x354 "DOC0EXPD6357,"
hexmask.long.word 0x354 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x354 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x354 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x354 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x354 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x354 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x354 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x354 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x354 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x358 "DOC0EXPD6358,"
hexmask.long.word 0x358 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x358 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x358 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x358 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x358 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x358 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x358 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x358 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x358 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x35C "DOC0EXPD6359,"
hexmask.long.word 0x35C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x35C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x35C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x35C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x35C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x35C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x35C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x35C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x35C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x360 "DOC0EXPD6360,"
hexmask.long.word 0x360 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x360 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x360 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x360 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x360 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x360 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x360 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x360 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x360 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x364 "DOC0EXPD6361,"
hexmask.long.word 0x364 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x364 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x364 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x364 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x364 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x364 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x364 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x364 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x364 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x368 "DOC0EXPD6362,"
hexmask.long.word 0x368 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x368 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x368 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x368 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x368 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x368 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x368 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x368 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x368 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x36C "DOC0EXPD6363,"
hexmask.long.word 0x36C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x36C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x36C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x36C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x36C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x36C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x36C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x36C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x36C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x370 "DOC0EXPD6364,"
hexmask.long.word 0x370 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x370 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x370 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x370 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x370 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x370 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x370 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x370 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x370 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x374 "DOC0EXPD6365,"
hexmask.long.word 0x374 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x374 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x374 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x374 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x374 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x374 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x374 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x374 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x374 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x378 "DOC0EXPD6366,"
hexmask.long.word 0x378 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x378 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x378 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x378 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x378 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x378 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x378 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x378 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x378 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x37C "DOC0EXPD6367,"
hexmask.long.word 0x37C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x37C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x37C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x37C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x37C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x37C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x37C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x37C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x37C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x380 "DOC0EXPD6368,"
hexmask.long.word 0x380 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x380 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x380 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x380 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x380 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x380 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x380 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x380 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x380 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x384 "DOC0EXPD6369,"
hexmask.long.word 0x384 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x384 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x384 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x384 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x384 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x384 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x384 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x384 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x384 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x388 "DOC0EXPD6370,"
hexmask.long.word 0x388 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x388 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x388 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x388 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x388 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x388 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x388 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x388 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x388 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x38C "DOC0EXPD6371,"
hexmask.long.word 0x38C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x38C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x38C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x38C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x38C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x38C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x38C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x38C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x38C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x390 "DOC0EXPD6372,"
hexmask.long.word 0x390 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x390 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x390 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x390 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x390 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x390 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x390 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x390 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x390 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x394 "DOC0EXPD6373,"
hexmask.long.word 0x394 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x394 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x394 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x394 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x394 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x394 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x394 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x394 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x394 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x398 "DOC0EXPD6374,"
hexmask.long.word 0x398 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x398 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x398 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x398 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x398 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x398 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x398 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x398 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x398 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x39C "DOC0EXPD6375,"
hexmask.long.word 0x39C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x39C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x39C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x39C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x39C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x39C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x39C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x39C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x39C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A0 "DOC0EXPD6376,"
hexmask.long.word 0x3A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A4 "DOC0EXPD6377,"
hexmask.long.word 0x3A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A8 "DOC0EXPD6378,"
hexmask.long.word 0x3A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3AC "DOC0EXPD6379,"
hexmask.long.word 0x3AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B0 "DOC0EXPD6380,"
hexmask.long.word 0x3B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B4 "DOC0EXPD6381,"
hexmask.long.word 0x3B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B8 "DOC0EXPD6382,"
hexmask.long.word 0x3B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3BC "DOC0EXPD6383,"
hexmask.long.word 0x3BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C0 "DOC0EXPD6384,"
hexmask.long.word 0x3C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C4 "DOC0EXPD6385,"
hexmask.long.word 0x3C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C8 "DOC0EXPD6386,"
hexmask.long.word 0x3C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3CC "DOC0EXPD6387,"
hexmask.long.word 0x3CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D0 "DOC0EXPD6388,"
hexmask.long.word 0x3D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D4 "DOC0EXPD6389,"
hexmask.long.word 0x3D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D8 "DOC0EXPD6390,"
hexmask.long.word 0x3D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3DC "DOC0EXPD6391,"
hexmask.long.word 0x3DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E0 "DOC0EXPD6392,"
hexmask.long.word 0x3E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E4 "DOC0EXPD6393,"
hexmask.long.word 0x3E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E8 "DOC0EXPD6394,"
hexmask.long.word 0x3E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3EC "DOC0EXPD6395,"
hexmask.long.word 0x3EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F0 "DOC0EXPD6396,"
hexmask.long.word 0x3F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F4 "DOC0EXPD6397,"
hexmask.long.word 0x3F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F8 "DOC0EXPD6398,"
hexmask.long.word 0x3F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3FC "DOC0EXPD6399,"
hexmask.long.word 0x3FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x400 "DOC0EXPD6400,"
hexmask.long.word 0x400 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x400 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x400 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x400 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x400 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x400 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x400 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x400 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x400 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x404 "DOC0EXPD6401,"
hexmask.long.word 0x404 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x404 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x404 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x404 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x404 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x404 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x404 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x404 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x404 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x408 "DOC0EXPD6402,"
hexmask.long.word 0x408 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x408 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x408 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x408 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x408 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x408 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x408 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x408 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x408 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x40C "DOC0EXPD6403,"
hexmask.long.word 0x40C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x40C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x40C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x40C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x40C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x40C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x40C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x40C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x40C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x410 "DOC0EXPD6404,"
hexmask.long.word 0x410 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x410 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x410 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x410 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x410 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x410 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x410 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x410 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x410 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x414 "DOC0EXPD6405,"
hexmask.long.word 0x414 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x414 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x414 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x414 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x414 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x414 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x414 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x414 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x414 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x418 "DOC0EXPD6406,"
hexmask.long.word 0x418 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x418 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x418 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x418 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x418 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x418 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x418 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x418 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x418 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x41C "DOC0EXPD6407,"
hexmask.long.word 0x41C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x41C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x41C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x41C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x41C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x41C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x41C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x41C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x41C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x420 "DOC0EXPD6408,"
hexmask.long.word 0x420 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x420 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x420 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x420 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x420 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x420 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x420 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x420 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x420 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x424 "DOC0EXPD6409,"
hexmask.long.word 0x424 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x424 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x424 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x424 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x424 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x424 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x424 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x424 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x424 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x428 "DOC0EXPD6410,"
hexmask.long.word 0x428 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x428 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x428 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x428 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x428 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x428 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x428 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x428 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x428 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x42C "DOC0EXPD6411,"
hexmask.long.word 0x42C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x42C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x42C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x42C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x42C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x42C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x42C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x42C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x42C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x430 "DOC0EXPD6412,"
hexmask.long.word 0x430 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x430 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x430 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x430 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x430 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x430 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x430 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x430 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x430 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x434 "DOC0EXPD6413,"
hexmask.long.word 0x434 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x434 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x434 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x434 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x434 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x434 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x434 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x434 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x434 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x438 "DOC0EXPD6414,"
hexmask.long.word 0x438 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x438 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x438 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x438 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x438 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x438 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x438 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x438 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x438 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x43C "DOC0EXPD6415,"
hexmask.long.word 0x43C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x43C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x43C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x43C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x43C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x43C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x43C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x43C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x43C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x440 "DOC0EXPD6416,"
hexmask.long.word 0x440 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x440 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x440 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x440 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x440 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x440 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x440 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x440 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x440 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x444 "DOC0EXPD6417,"
hexmask.long.word 0x444 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x444 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x444 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x444 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x444 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x444 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x444 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x444 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x444 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x448 "DOC0EXPD6418,"
hexmask.long.word 0x448 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x448 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x448 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x448 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x448 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x448 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x448 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x448 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x448 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x44C "DOC0EXPD6419,"
hexmask.long.word 0x44C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x44C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x44C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x44C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x44C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x44C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x44C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x44C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x44C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x450 "DOC0EXPD6420,"
hexmask.long.word 0x450 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x450 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x450 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x450 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x450 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x450 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x450 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x450 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x450 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x454 "DOC0EXPD6421,"
hexmask.long.word 0x454 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x454 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x454 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x454 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x454 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x454 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x454 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x454 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x454 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x458 "DOC0EXPD6422,"
hexmask.long.word 0x458 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x458 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x458 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x458 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x458 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x458 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x458 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x458 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x458 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x45C "DOC0EXPD6423,"
hexmask.long.word 0x45C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x45C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x45C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x45C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x45C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x45C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x45C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x45C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x45C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x460 "DOC0EXPD6424,"
hexmask.long.word 0x460 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x460 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x460 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x460 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x460 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x460 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x460 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x460 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x460 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x464 "DOC0EXPD6425,"
hexmask.long.word 0x464 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x464 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x464 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x464 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x464 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x464 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x464 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x464 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x464 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x468 "DOC0EXPD6426,"
hexmask.long.word 0x468 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x468 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x468 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x468 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x468 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x468 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x468 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x468 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x468 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x46C "DOC0EXPD6427,"
hexmask.long.word 0x46C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x46C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x46C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x46C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x46C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x46C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x46C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x46C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x46C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x470 "DOC0EXPD6428,"
hexmask.long.word 0x470 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x470 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x470 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x470 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x470 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x470 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x470 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x470 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x470 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x474 "DOC0EXPD6429,"
hexmask.long.word 0x474 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x474 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x474 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x474 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x474 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x474 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x474 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x474 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x474 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x478 "DOC0EXPD6430,"
hexmask.long.word 0x478 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x478 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x478 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x478 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x478 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x478 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x478 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x478 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x478 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x47C "DOC0EXPD6431,"
hexmask.long.word 0x47C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x47C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x47C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x47C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x47C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x47C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x47C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x47C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x47C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x480 "DOC0EXPD6432,"
hexmask.long.word 0x480 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x480 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x480 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x480 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x480 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x480 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x480 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x480 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x480 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x484 "DOC0EXPD6433,"
hexmask.long.word 0x484 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x484 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x484 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x484 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x484 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x484 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x484 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x484 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x484 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x488 "DOC0EXPD6434,"
hexmask.long.word 0x488 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x488 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x488 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x488 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x488 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x488 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x488 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x488 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x488 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x48C "DOC0EXPD6435,"
hexmask.long.word 0x48C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x48C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x48C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x48C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x48C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x48C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x48C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x48C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x48C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x490 "DOC0EXPD6436,"
hexmask.long.word 0x490 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x490 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x490 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x490 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x490 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x490 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x490 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x490 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x490 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x494 "DOC0EXPD6437,"
hexmask.long.word 0x494 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x494 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x494 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x494 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x494 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x494 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x494 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x494 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x494 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x498 "DOC0EXPD6438,"
hexmask.long.word 0x498 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x498 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x498 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x498 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x498 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x498 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x498 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x498 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x498 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x49C "DOC0EXPD6439,"
hexmask.long.word 0x49C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x49C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x49C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x49C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x49C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x49C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x49C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x49C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x49C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A0 "DOC0EXPD6440,"
hexmask.long.word 0x4A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A4 "DOC0EXPD6441,"
hexmask.long.word 0x4A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A8 "DOC0EXPD6442,"
hexmask.long.word 0x4A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4AC "DOC0EXPD6443,"
hexmask.long.word 0x4AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B0 "DOC0EXPD6444,"
hexmask.long.word 0x4B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B4 "DOC0EXPD6445,"
hexmask.long.word 0x4B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B8 "DOC0EXPD6446,"
hexmask.long.word 0x4B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4BC "DOC0EXPD6447,"
hexmask.long.word 0x4BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C0 "DOC0EXPD6448,"
hexmask.long.word 0x4C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C4 "DOC0EXPD6449,"
hexmask.long.word 0x4C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C8 "DOC0EXPD6450,"
hexmask.long.word 0x4C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4CC "DOC0EXPD6451,"
hexmask.long.word 0x4CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D0 "DOC0EXPD6452,"
hexmask.long.word 0x4D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D4 "DOC0EXPD6453,"
hexmask.long.word 0x4D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D8 "DOC0EXPD6454,"
hexmask.long.word 0x4D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4DC "DOC0EXPD6455,"
hexmask.long.word 0x4DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E0 "DOC0EXPD6456,"
hexmask.long.word 0x4E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E4 "DOC0EXPD6457,"
hexmask.long.word 0x4E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E8 "DOC0EXPD6458,"
hexmask.long.word 0x4E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4EC "DOC0EXPD6459,"
hexmask.long.word 0x4EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F0 "DOC0EXPD6460,"
hexmask.long.word 0x4F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F4 "DOC0EXPD6461,"
hexmask.long.word 0x4F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F8 "DOC0EXPD6462,"
hexmask.long.word 0x4F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4FC "DOC0EXPD6463,"
hexmask.long.word 0x4FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x500 "DOC0EXPD6464,"
hexmask.long.word 0x500 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x500 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x500 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x500 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x500 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x500 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x500 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x500 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x500 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x504 "DOC0EXPD6465,"
hexmask.long.word 0x504 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x504 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x504 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x504 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x504 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x504 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x504 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x504 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x504 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x508 "DOC0EXPD6466,"
hexmask.long.word 0x508 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x508 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x508 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x508 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x508 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x508 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x508 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x508 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x508 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x50C "DOC0EXPD6467,"
hexmask.long.word 0x50C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x50C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x50C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x50C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x50C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x50C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x50C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x50C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x50C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x510 "DOC0EXPD6468,"
hexmask.long.word 0x510 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x510 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x510 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x510 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x510 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x510 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x510 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x510 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x510 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x514 "DOC0EXPD6469,"
hexmask.long.word 0x514 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x514 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x514 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x514 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x514 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x514 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x514 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x514 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x514 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x518 "DOC0EXPD6470,"
hexmask.long.word 0x518 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x518 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x518 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x518 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x518 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x518 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x518 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x518 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x518 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x51C "DOC0EXPD6471,"
hexmask.long.word 0x51C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x51C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x51C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x51C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x51C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x51C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x51C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x51C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x51C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x520 "DOC0EXPD6472,"
hexmask.long.word 0x520 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x520 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x520 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x520 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x520 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x520 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x520 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x520 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x520 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x524 "DOC0EXPD6473,"
hexmask.long.word 0x524 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x524 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x524 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x524 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x524 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x524 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x524 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x524 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x524 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x528 "DOC0EXPD6474,"
hexmask.long.word 0x528 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x528 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x528 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x528 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x528 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x528 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x528 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x528 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x528 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x52C "DOC0EXPD6475,"
hexmask.long.word 0x52C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x52C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x52C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x52C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x52C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x52C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x52C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x52C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x52C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x530 "DOC0EXPD6476,"
hexmask.long.word 0x530 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x530 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x530 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x530 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x530 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x530 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x530 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x530 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x530 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x534 "DOC0EXPD6477,"
hexmask.long.word 0x534 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x534 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x534 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x534 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x534 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x534 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x534 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x534 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x534 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x538 "DOC0EXPD6478,"
hexmask.long.word 0x538 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x538 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x538 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x538 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x538 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x538 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x538 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x538 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x538 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x53C "DOC0EXPD6479,"
hexmask.long.word 0x53C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x53C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x53C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x53C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x53C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x53C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x53C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x53C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x53C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x540 "DOC0EXPD6480,"
hexmask.long.word 0x540 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x540 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x540 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x540 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x540 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x540 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x540 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x540 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x540 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x544 "DOC0EXPD6481,"
hexmask.long.word 0x544 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x544 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x544 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x544 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x544 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x544 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x544 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x544 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x544 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x548 "DOC0EXPD6482,"
hexmask.long.word 0x548 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x548 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x548 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x548 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x548 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x548 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x548 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x548 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x548 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x54C "DOC0EXPD6483,"
hexmask.long.word 0x54C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x54C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x54C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x54C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x54C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x54C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x54C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x54C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x54C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x550 "DOC0EXPD6484,"
hexmask.long.word 0x550 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x550 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x550 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x550 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x550 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x550 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x550 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x550 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x550 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x554 "DOC0EXPD6485,"
hexmask.long.word 0x554 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x554 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x554 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x554 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x554 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x554 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x554 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x554 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x554 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x558 "DOC0EXPD6486,"
hexmask.long.word 0x558 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x558 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x558 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x558 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x558 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x558 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x558 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x558 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x558 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x55C "DOC0EXPD6487,"
hexmask.long.word 0x55C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x55C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x55C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x55C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x55C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x55C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x55C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x55C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x55C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x560 "DOC0EXPD6488,"
hexmask.long.word 0x560 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x560 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x560 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x560 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x560 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x560 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x560 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x560 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x560 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x564 "DOC0EXPD6489,"
hexmask.long.word 0x564 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x564 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x564 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x564 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x564 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x564 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x564 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x564 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x564 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x568 "DOC0EXPD6490,"
hexmask.long.word 0x568 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x568 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x568 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x568 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x568 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x568 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x568 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x568 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x568 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x56C "DOC0EXPD6491,"
hexmask.long.word 0x56C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x56C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x56C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x56C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x56C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x56C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x56C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x56C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x56C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x570 "DOC0EXPD6492,"
hexmask.long.word 0x570 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x570 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x570 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x570 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x570 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x570 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x570 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x570 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x570 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x574 "DOC0EXPD6493,"
hexmask.long.word 0x574 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x574 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x574 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x574 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x574 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x574 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x574 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x574 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x574 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x578 "DOC0EXPD6494,"
hexmask.long.word 0x578 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x578 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x578 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x578 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x578 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x578 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x578 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x578 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x578 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x57C "DOC0EXPD6495,"
hexmask.long.word 0x57C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x57C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x57C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x57C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x57C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x57C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x57C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x57C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x57C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x580 "DOC0EXPD6496,"
hexmask.long.word 0x580 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x580 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x580 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x580 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x580 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x580 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x580 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x580 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x580 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x584 "DOC0EXPD6497,"
hexmask.long.word 0x584 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x584 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x584 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x584 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x584 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x584 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x584 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x584 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x584 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x588 "DOC0EXPD6498,"
hexmask.long.word 0x588 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x588 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x588 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x588 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x588 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x588 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x588 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x588 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x588 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x58C "DOC0EXPD6499,"
hexmask.long.word 0x58C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x58C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x58C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x58C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x58C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x58C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x58C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x58C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x58C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x590 "DOC0EXPD6500,"
hexmask.long.word 0x590 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x590 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x590 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x590 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x590 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x590 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x590 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x590 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x590 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x594 "DOC0EXPD6501,"
hexmask.long.word 0x594 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x594 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x594 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x594 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x594 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x594 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x594 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x594 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x594 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x598 "DOC0EXPD6502,"
hexmask.long.word 0x598 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x598 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x598 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x598 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x598 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x598 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x598 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x598 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x598 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x59C "DOC0EXPD6503,"
hexmask.long.word 0x59C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x59C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x59C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x59C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x59C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x59C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x59C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x59C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x59C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A0 "DOC0EXPD6504,"
hexmask.long.word 0x5A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A4 "DOC0EXPD6505,"
hexmask.long.word 0x5A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A8 "DOC0EXPD6506,"
hexmask.long.word 0x5A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5AC "DOC0EXPD6507,"
hexmask.long.word 0x5AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B0 "DOC0EXPD6508,"
hexmask.long.word 0x5B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B4 "DOC0EXPD6509,"
hexmask.long.word 0x5B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B8 "DOC0EXPD6510,"
hexmask.long.word 0x5B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5BC "DOC0EXPD6511,"
hexmask.long.word 0x5BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C0 "DOC0EXPD6512,"
hexmask.long.word 0x5C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C4 "DOC0EXPD6513,"
hexmask.long.word 0x5C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C8 "DOC0EXPD6514,"
hexmask.long.word 0x5C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5CC "DOC0EXPD6515,"
hexmask.long.word 0x5CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D0 "DOC0EXPD6516,"
hexmask.long.word 0x5D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D4 "DOC0EXPD6517,"
hexmask.long.word 0x5D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D8 "DOC0EXPD6518,"
hexmask.long.word 0x5D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5DC "DOC0EXPD6519,"
hexmask.long.word 0x5DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E0 "DOC0EXPD6520,"
hexmask.long.word 0x5E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E4 "DOC0EXPD6521,"
hexmask.long.word 0x5E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E8 "DOC0EXPD6522,"
hexmask.long.word 0x5E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5EC "DOC0EXPD6523,"
hexmask.long.word 0x5EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F0 "DOC0EXPD6524,"
hexmask.long.word 0x5F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F4 "DOC0EXPD6525,"
hexmask.long.word 0x5F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F8 "DOC0EXPD6526,"
hexmask.long.word 0x5F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5FC "DOC0EXPD6527,"
hexmask.long.word 0x5FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x600 "DOC0EXPD6528,"
hexmask.long.word 0x600 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x600 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x600 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x600 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x600 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x600 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x600 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x600 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x600 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x604 "DOC0EXPD6529,"
hexmask.long.word 0x604 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x604 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x604 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x604 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x604 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x604 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x604 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x604 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x604 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x608 "DOC0EXPD6530,"
hexmask.long.word 0x608 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x608 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x608 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x608 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x608 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x608 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x608 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x608 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x608 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x60C "DOC0EXPD6531,"
hexmask.long.word 0x60C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x60C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x60C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x60C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x60C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x60C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x60C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x60C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x60C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x610 "DOC0EXPD6532,"
hexmask.long.word 0x610 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x610 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x610 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x610 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x610 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x610 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x610 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x610 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x610 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x614 "DOC0EXPD6533,"
hexmask.long.word 0x614 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x614 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x614 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x614 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x614 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x614 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x614 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x614 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x614 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x618 "DOC0EXPD6534,"
hexmask.long.word 0x618 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x618 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x618 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x618 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x618 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x618 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x618 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x618 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x618 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x61C "DOC0EXPD6535,"
hexmask.long.word 0x61C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x61C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x61C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x61C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x61C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x61C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x61C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x61C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x61C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x620 "DOC0EXPD6536,"
hexmask.long.word 0x620 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x620 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x620 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x620 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x620 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x620 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x620 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x620 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x620 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x624 "DOC0EXPD6537,"
hexmask.long.word 0x624 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x624 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x624 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x624 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x624 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x624 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x624 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x624 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x624 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x628 "DOC0EXPD6538,"
hexmask.long.word 0x628 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x628 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x628 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x628 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x628 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x628 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x628 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x628 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x628 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x62C "DOC0EXPD6539,"
hexmask.long.word 0x62C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x62C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x62C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x62C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x62C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x62C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x62C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x62C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x62C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x630 "DOC0EXPD6540,"
hexmask.long.word 0x630 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x630 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x630 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x630 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x630 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x630 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x630 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x630 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x630 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x634 "DOC0EXPD6541,"
hexmask.long.word 0x634 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x634 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x634 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x634 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x634 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x634 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x634 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x634 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x634 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x638 "DOC0EXPD6542,"
hexmask.long.word 0x638 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x638 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x638 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x638 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x638 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x638 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x638 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x638 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x638 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x63C "DOC0EXPD6543,"
hexmask.long.word 0x63C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x63C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x63C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x63C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x63C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x63C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x63C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x63C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x63C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x640 "DOC0EXPD6544,"
hexmask.long.word 0x640 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x640 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x640 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x640 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x640 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x640 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x640 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x640 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x640 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x644 "DOC0EXPD6545,"
hexmask.long.word 0x644 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x644 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x644 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x644 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x644 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x644 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x644 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x644 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x644 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x648 "DOC0EXPD6546,"
hexmask.long.word 0x648 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x648 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x648 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x648 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x648 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x648 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x648 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x648 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x648 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x64C "DOC0EXPD6547,"
hexmask.long.word 0x64C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x64C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x64C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x64C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x64C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x64C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x64C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x64C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x64C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x650 "DOC0EXPD6548,"
hexmask.long.word 0x650 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x650 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x650 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x650 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x650 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x650 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x650 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x650 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x650 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x654 "DOC0EXPD6549,"
hexmask.long.word 0x654 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x654 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x654 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x654 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x654 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x654 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x654 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x654 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x654 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x658 "DOC0EXPD6550,"
hexmask.long.word 0x658 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x658 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x658 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x658 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x658 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x658 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x658 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x658 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x658 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x65C "DOC0EXPD6551,"
hexmask.long.word 0x65C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x65C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x65C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x65C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x65C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x65C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x65C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x65C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x65C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x660 "DOC0EXPD6552,"
hexmask.long.word 0x660 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x660 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x660 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x660 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x660 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x660 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x660 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x660 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x660 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x664 "DOC0EXPD6553,"
hexmask.long.word 0x664 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x664 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x664 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x664 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x664 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x664 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x664 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x664 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x664 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x668 "DOC0EXPD6554,"
hexmask.long.word 0x668 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x668 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x668 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x668 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x668 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x668 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x668 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x668 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x668 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x66C "DOC0EXPD6555,"
hexmask.long.word 0x66C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x66C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x66C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x66C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x66C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x66C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x66C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x66C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x66C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x670 "DOC0EXPD6556,"
hexmask.long.word 0x670 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x670 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x670 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x670 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x670 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x670 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x670 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x670 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x670 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x674 "DOC0EXPD6557,"
hexmask.long.word 0x674 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x674 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x674 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x674 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x674 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x674 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x674 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x674 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x674 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x678 "DOC0EXPD6558,"
hexmask.long.word 0x678 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x678 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x678 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x678 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x678 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x678 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x678 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x678 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x678 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x67C "DOC0EXPD6559,"
hexmask.long.word 0x67C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x67C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x67C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x67C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x67C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x67C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x67C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x67C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x67C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x680 "DOC0EXPD6560,"
hexmask.long.word 0x680 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x680 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x680 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x680 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x680 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x680 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x680 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x680 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x680 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x684 "DOC0EXPD6561,"
hexmask.long.word 0x684 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x684 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x684 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x684 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x684 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x684 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x684 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x684 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x684 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x688 "DOC0EXPD6562,"
hexmask.long.word 0x688 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x688 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x688 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x688 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x688 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x688 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x688 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x688 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x688 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x68C "DOC0EXPD6563,"
hexmask.long.word 0x68C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x68C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x68C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x68C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x68C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x68C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x68C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x68C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x68C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x690 "DOC0EXPD6564,"
hexmask.long.word 0x690 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x690 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x690 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x690 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x690 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x690 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x690 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x690 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x690 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x694 "DOC0EXPD6565,"
hexmask.long.word 0x694 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x694 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x694 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x694 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x694 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x694 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x694 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x694 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x694 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x698 "DOC0EXPD6566,"
hexmask.long.word 0x698 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x698 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x698 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x698 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x698 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x698 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x698 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x698 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x698 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x69C "DOC0EXPD6567,"
hexmask.long.word 0x69C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x69C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x69C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x69C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x69C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x69C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x69C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x69C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x69C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A0 "DOC0EXPD6568,"
hexmask.long.word 0x6A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A4 "DOC0EXPD6569,"
hexmask.long.word 0x6A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A8 "DOC0EXPD6570,"
hexmask.long.word 0x6A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6AC "DOC0EXPD6571,"
hexmask.long.word 0x6AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B0 "DOC0EXPD6572,"
hexmask.long.word 0x6B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B4 "DOC0EXPD6573,"
hexmask.long.word 0x6B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B8 "DOC0EXPD6574,"
hexmask.long.word 0x6B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6BC "DOC0EXPD6575,"
hexmask.long.word 0x6BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C0 "DOC0EXPD6576,"
hexmask.long.word 0x6C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C4 "DOC0EXPD6577,"
hexmask.long.word 0x6C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C8 "DOC0EXPD6578,"
hexmask.long.word 0x6C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6CC "DOC0EXPD6579,"
hexmask.long.word 0x6CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D0 "DOC0EXPD6580,"
hexmask.long.word 0x6D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D4 "DOC0EXPD6581,"
hexmask.long.word 0x6D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D8 "DOC0EXPD6582,"
hexmask.long.word 0x6D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6DC "DOC0EXPD6583,"
hexmask.long.word 0x6DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E0 "DOC0EXPD6584,"
hexmask.long.word 0x6E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E4 "DOC0EXPD6585,"
hexmask.long.word 0x6E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E8 "DOC0EXPD6586,"
hexmask.long.word 0x6E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6EC "DOC0EXPD6587,"
hexmask.long.word 0x6EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F0 "DOC0EXPD6588,"
hexmask.long.word 0x6F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F4 "DOC0EXPD6589,"
hexmask.long.word 0x6F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F8 "DOC0EXPD6590,"
hexmask.long.word 0x6F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6FC "DOC0EXPD6591,"
hexmask.long.word 0x6FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x700 "DOC0EXPD6592,"
hexmask.long.word 0x700 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x700 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x700 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x700 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x700 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x700 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x700 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x700 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x700 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x704 "DOC0EXPD6593,"
hexmask.long.word 0x704 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x704 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x704 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x704 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x704 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x704 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x704 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x704 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x704 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x708 "DOC0EXPD6594,"
hexmask.long.word 0x708 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x708 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x708 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x708 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x708 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x708 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x708 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x708 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x708 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x70C "DOC0EXPD6595,"
hexmask.long.word 0x70C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x70C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x70C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x70C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x70C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x70C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x70C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x70C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x70C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x710 "DOC0EXPD6596,"
hexmask.long.word 0x710 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x710 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x710 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x710 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x710 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x710 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x710 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x710 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x710 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x714 "DOC0EXPD6597,"
hexmask.long.word 0x714 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x714 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x714 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x714 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x714 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x714 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x714 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x714 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x714 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x718 "DOC0EXPD6598,"
hexmask.long.word 0x718 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x718 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x718 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x718 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x718 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x718 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x718 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x718 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x718 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x71C "DOC0EXPD6599,"
hexmask.long.word 0x71C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x71C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x71C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x71C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x71C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x71C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x71C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x71C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x71C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x720 "DOC0EXPD6600,"
hexmask.long.word 0x720 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x720 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x720 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x720 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x720 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x720 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x720 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x720 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x720 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x724 "DOC0EXPD6601,"
hexmask.long.word 0x724 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x724 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x724 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x724 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x724 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x724 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x724 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x724 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x724 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x728 "DOC0EXPD6602,"
hexmask.long.word 0x728 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x728 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x728 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x728 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x728 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x728 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x728 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x728 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x728 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x72C "DOC0EXPD6603,"
hexmask.long.word 0x72C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x72C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x72C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x72C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x72C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x72C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x72C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x72C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x72C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x730 "DOC0EXPD6604,"
hexmask.long.word 0x730 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x730 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x730 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x730 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x730 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x730 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x730 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x730 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x730 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x734 "DOC0EXPD6605,"
hexmask.long.word 0x734 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x734 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x734 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x734 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x734 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x734 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x734 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x734 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x734 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x738 "DOC0EXPD6606,"
hexmask.long.word 0x738 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x738 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x738 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x738 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x738 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x738 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x738 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x738 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x738 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x73C "DOC0EXPD6607,"
hexmask.long.word 0x73C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x73C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x73C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x73C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x73C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x73C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x73C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x73C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x73C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x740 "DOC0EXPD6608,"
hexmask.long.word 0x740 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x740 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x740 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x740 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x740 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x740 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x740 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x740 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x740 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x744 "DOC0EXPD6609,"
hexmask.long.word 0x744 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x744 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x744 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x744 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x744 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x744 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x744 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x744 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x744 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x748 "DOC0EXPD6610,"
hexmask.long.word 0x748 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x748 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x748 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x748 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x748 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x748 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x748 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x748 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x748 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x74C "DOC0EXPD6611,"
hexmask.long.word 0x74C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x74C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x74C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x74C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x74C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x74C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x74C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x74C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x74C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x750 "DOC0EXPD6612,"
hexmask.long.word 0x750 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x750 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x750 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x750 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x750 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x750 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x750 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x750 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x750 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x754 "DOC0EXPD6613,"
hexmask.long.word 0x754 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x754 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x754 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x754 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x754 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x754 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x754 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x754 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x754 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x758 "DOC0EXPD6614,"
hexmask.long.word 0x758 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x758 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x758 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x758 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x758 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x758 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x758 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x758 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x758 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x75C "DOC0EXPD6615,"
hexmask.long.word 0x75C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x75C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x75C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x75C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x75C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x75C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x75C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x75C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x75C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x760 "DOC0EXPD6616,"
hexmask.long.word 0x760 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x760 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x760 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x760 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x760 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x760 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x760 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x760 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x760 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x764 "DOC0EXPD6617,"
hexmask.long.word 0x764 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x764 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x764 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x764 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x764 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x764 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x764 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x764 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x764 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x768 "DOC0EXPD6618,"
hexmask.long.word 0x768 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x768 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x768 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x768 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x768 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x768 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x768 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x768 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x768 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x76C "DOC0EXPD6619,"
hexmask.long.word 0x76C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x76C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x76C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x76C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x76C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x76C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x76C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x76C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x76C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x770 "DOC0EXPD6620,"
hexmask.long.word 0x770 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x770 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x770 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x770 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x770 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x770 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x770 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x770 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x770 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x774 "DOC0EXPD6621,"
hexmask.long.word 0x774 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x774 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x774 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x774 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x774 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x774 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x774 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x774 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x774 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x778 "DOC0EXPD6622,"
hexmask.long.word 0x778 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x778 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x778 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x778 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x778 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x778 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x778 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x778 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x778 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x77C "DOC0EXPD6623,"
hexmask.long.word 0x77C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x77C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x77C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x77C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x77C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x77C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x77C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x77C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x77C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x780 "DOC0EXPD6624,"
hexmask.long.word 0x780 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x780 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x780 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x780 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x780 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x780 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x780 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x780 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x780 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x784 "DOC0EXPD6625,"
hexmask.long.word 0x784 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x784 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x784 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x784 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x784 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x784 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x784 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x784 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x784 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x788 "DOC0EXPD6626,"
hexmask.long.word 0x788 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x788 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x788 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x788 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x788 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x788 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x788 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x788 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x788 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x78C "DOC0EXPD6627,"
hexmask.long.word 0x78C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x78C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x78C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x78C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x78C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x78C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x78C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x78C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x78C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x790 "DOC0EXPD6628,"
hexmask.long.word 0x790 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x790 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x790 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x790 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x790 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x790 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x790 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x790 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x790 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x794 "DOC0EXPD6629,"
hexmask.long.word 0x794 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x794 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x794 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x794 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x794 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x794 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x794 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x794 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x794 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x798 "DOC0EXPD6630,"
hexmask.long.word 0x798 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x798 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x798 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x798 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x798 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x798 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x798 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x798 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x798 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x79C "DOC0EXPD6631,"
hexmask.long.word 0x79C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x79C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x79C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x79C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x79C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x79C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x79C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x79C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x79C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A0 "DOC0EXPD6632,"
hexmask.long.word 0x7A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A4 "DOC0EXPD6633,"
hexmask.long.word 0x7A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A8 "DOC0EXPD6634,"
hexmask.long.word 0x7A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7AC "DOC0EXPD6635,"
hexmask.long.word 0x7AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B0 "DOC0EXPD6636,"
hexmask.long.word 0x7B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B4 "DOC0EXPD6637,"
hexmask.long.word 0x7B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B8 "DOC0EXPD6638,"
hexmask.long.word 0x7B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7BC "DOC0EXPD6639,"
hexmask.long.word 0x7BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C0 "DOC0EXPD6640,"
hexmask.long.word 0x7C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C4 "DOC0EXPD6641,"
hexmask.long.word 0x7C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C8 "DOC0EXPD6642,"
hexmask.long.word 0x7C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7CC "DOC0EXPD6643,"
hexmask.long.word 0x7CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D0 "DOC0EXPD6644,"
hexmask.long.word 0x7D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D4 "DOC0EXPD6645,"
hexmask.long.word 0x7D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D8 "DOC0EXPD6646,"
hexmask.long.word 0x7D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7DC "DOC0EXPD6647,"
hexmask.long.word 0x7DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E0 "DOC0EXPD6648,"
hexmask.long.word 0x7E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E4 "DOC0EXPD6649,"
hexmask.long.word 0x7E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E8 "DOC0EXPD6650,"
hexmask.long.word 0x7E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7EC "DOC0EXPD6651,"
hexmask.long.word 0x7EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F0 "DOC0EXPD6652,"
hexmask.long.word 0x7F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F4 "DOC0EXPD6653,"
hexmask.long.word 0x7F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F8 "DOC0EXPD6654,"
hexmask.long.word 0x7F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7FC "DOC0EXPD6655,"
hexmask.long.word 0x7FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x800 "DOC0EXPD6656,"
hexmask.long.word 0x800 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x800 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x800 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x800 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x800 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x800 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x800 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x800 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x800 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x804 "DOC0EXPD6657,"
hexmask.long.word 0x804 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x804 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x804 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x804 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x804 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x804 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x804 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x804 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x804 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x808 "DOC0EXPD6658,"
hexmask.long.word 0x808 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x808 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x808 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x808 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x808 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x808 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x808 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x808 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x808 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x80C "DOC0EXPD6659,"
hexmask.long.word 0x80C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x80C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x80C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x80C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x80C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x80C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x80C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x80C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x80C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x810 "DOC0EXPD6660,"
hexmask.long.word 0x810 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x810 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x810 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x810 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x810 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x810 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x810 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x810 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x810 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x814 "DOC0EXPD6661,"
hexmask.long.word 0x814 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x814 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x814 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x814 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x814 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x814 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x814 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x814 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x814 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x818 "DOC0EXPD6662,"
hexmask.long.word 0x818 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x818 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x818 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x818 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x818 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x818 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x818 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x818 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x818 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x81C "DOC0EXPD6663,"
hexmask.long.word 0x81C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x81C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x81C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x81C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x81C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x81C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x81C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x81C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x81C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x820 "DOC0EXPD6664,"
hexmask.long.word 0x820 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x820 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x820 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x820 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x820 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x820 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x820 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x820 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x820 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x824 "DOC0EXPD6665,"
hexmask.long.word 0x824 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x824 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x824 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x824 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x824 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x824 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x824 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x824 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x824 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x828 "DOC0EXPD6666,"
hexmask.long.word 0x828 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x828 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x828 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x828 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x828 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x828 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x828 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x828 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x828 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x82C "DOC0EXPD6667,"
hexmask.long.word 0x82C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x82C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x82C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x82C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x82C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x82C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x82C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x82C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x82C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x830 "DOC0EXPD6668,"
hexmask.long.word 0x830 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x830 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x830 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x830 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x830 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x830 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x830 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x830 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x830 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x834 "DOC0EXPD6669,"
hexmask.long.word 0x834 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x834 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x834 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x834 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x834 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x834 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x834 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x834 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x834 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x838 "DOC0EXPD6670,"
hexmask.long.word 0x838 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x838 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x838 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x838 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x838 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x838 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x838 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x838 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x838 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x83C "DOC0EXPD6671,"
hexmask.long.word 0x83C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x83C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x83C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x83C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x83C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x83C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x83C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x83C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x83C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x840 "DOC0EXPD6672,"
hexmask.long.word 0x840 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x840 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x840 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x840 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x840 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x840 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x840 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x840 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x840 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x844 "DOC0EXPD6673,"
hexmask.long.word 0x844 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x844 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x844 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x844 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x844 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x844 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x844 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x844 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x844 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x848 "DOC0EXPD6674,"
hexmask.long.word 0x848 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x848 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x848 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x848 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x848 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x848 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x848 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x848 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x848 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x84C "DOC0EXPD6675,"
hexmask.long.word 0x84C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x84C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x84C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x84C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x84C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x84C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x84C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x84C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x84C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x850 "DOC0EXPD6676,"
hexmask.long.word 0x850 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x850 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x850 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x850 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x850 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x850 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x850 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x850 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x850 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x854 "DOC0EXPD6677,"
hexmask.long.word 0x854 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x854 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x854 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x854 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x854 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x854 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x854 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x854 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x854 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x858 "DOC0EXPD6678,"
hexmask.long.word 0x858 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x858 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x858 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x858 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x858 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x858 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x858 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x858 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x858 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x85C "DOC0EXPD6679,"
hexmask.long.word 0x85C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x85C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x85C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x85C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x85C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x85C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x85C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x85C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x85C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x860 "DOC0EXPD6680,"
hexmask.long.word 0x860 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x860 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x860 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x860 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x860 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x860 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x860 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x860 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x860 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x864 "DOC0EXPD6681,"
hexmask.long.word 0x864 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x864 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x864 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x864 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x864 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x864 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x864 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x864 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x864 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x868 "DOC0EXPD6682,"
hexmask.long.word 0x868 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x868 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x868 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x868 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x868 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x868 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x868 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x868 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x868 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x86C "DOC0EXPD6683,"
hexmask.long.word 0x86C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x86C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x86C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x86C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x86C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x86C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x86C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x86C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x86C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x870 "DOC0EXPD6684,"
hexmask.long.word 0x870 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x870 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x870 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x870 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x870 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x870 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x870 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x870 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x870 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x874 "DOC0EXPD6685,"
hexmask.long.word 0x874 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x874 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x874 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x874 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x874 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x874 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x874 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x874 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x874 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x878 "DOC0EXPD6686,"
hexmask.long.word 0x878 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x878 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x878 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x878 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x878 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x878 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x878 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x878 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x878 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x87C "DOC0EXPD6687,"
hexmask.long.word 0x87C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x87C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x87C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x87C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x87C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x87C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x87C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x87C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x87C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x880 "DOC0EXPD6688,"
hexmask.long.word 0x880 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x880 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x880 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x880 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x880 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x880 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x880 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x880 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x880 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x884 "DOC0EXPD6689,"
hexmask.long.word 0x884 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x884 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x884 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x884 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x884 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x884 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x884 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x884 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x884 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x888 "DOC0EXPD6690,"
hexmask.long.word 0x888 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x888 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x888 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x888 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x888 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x888 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x888 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x888 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x888 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x88C "DOC0EXPD6691,"
hexmask.long.word 0x88C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x88C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x88C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x88C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x88C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x88C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x88C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x88C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x88C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x890 "DOC0EXPD6692,"
hexmask.long.word 0x890 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x890 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x890 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x890 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x890 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x890 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x890 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x890 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x890 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x894 "DOC0EXPD6693,"
hexmask.long.word 0x894 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x894 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x894 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x894 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x894 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x894 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x894 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x894 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x894 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x898 "DOC0EXPD6694,"
hexmask.long.word 0x898 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x898 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x898 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x898 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x898 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x898 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x898 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x898 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x898 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x89C "DOC0EXPD6695,"
hexmask.long.word 0x89C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x89C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x89C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x89C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x89C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x89C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x89C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x89C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x89C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A0 "DOC0EXPD6696,"
hexmask.long.word 0x8A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A4 "DOC0EXPD6697,"
hexmask.long.word 0x8A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A8 "DOC0EXPD6698,"
hexmask.long.word 0x8A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8AC "DOC0EXPD6699,"
hexmask.long.word 0x8AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B0 "DOC0EXPD6700,"
hexmask.long.word 0x8B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B4 "DOC0EXPD6701,"
hexmask.long.word 0x8B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B8 "DOC0EXPD6702,"
hexmask.long.word 0x8B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8BC "DOC0EXPD6703,"
hexmask.long.word 0x8BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C0 "DOC0EXPD6704,"
hexmask.long.word 0x8C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C4 "DOC0EXPD6705,"
hexmask.long.word 0x8C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C8 "DOC0EXPD6706,"
hexmask.long.word 0x8C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8CC "DOC0EXPD6707,"
hexmask.long.word 0x8CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D0 "DOC0EXPD6708,"
hexmask.long.word 0x8D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D4 "DOC0EXPD6709,"
hexmask.long.word 0x8D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D8 "DOC0EXPD6710,"
hexmask.long.word 0x8D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8DC "DOC0EXPD6711,"
hexmask.long.word 0x8DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E0 "DOC0EXPD6712,"
hexmask.long.word 0x8E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E4 "DOC0EXPD6713,"
hexmask.long.word 0x8E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E8 "DOC0EXPD6714,"
hexmask.long.word 0x8E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8EC "DOC0EXPD6715,"
hexmask.long.word 0x8EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F0 "DOC0EXPD6716,"
hexmask.long.word 0x8F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F4 "DOC0EXPD6717,"
hexmask.long.word 0x8F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F8 "DOC0EXPD6718,"
hexmask.long.word 0x8F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8FC "DOC0EXPD6719,"
hexmask.long.word 0x8FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x900 "DOC0EXPD6720,"
hexmask.long.word 0x900 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x900 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x900 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x900 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x900 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x900 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x900 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x900 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x900 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x904 "DOC0EXPD6721,"
hexmask.long.word 0x904 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x904 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x904 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x904 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x904 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x904 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x904 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x904 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x904 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x908 "DOC0EXPD6722,"
hexmask.long.word 0x908 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x908 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x908 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x908 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x908 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x908 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x908 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x908 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x908 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x90C "DOC0EXPD6723,"
hexmask.long.word 0x90C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x90C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x90C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x90C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x90C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x90C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x90C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x90C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x90C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x910 "DOC0EXPD6724,"
hexmask.long.word 0x910 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x910 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x910 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x910 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x910 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x910 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x910 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x910 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x910 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x914 "DOC0EXPD6725,"
hexmask.long.word 0x914 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x914 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x914 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x914 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x914 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x914 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x914 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x914 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x914 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x918 "DOC0EXPD6726,"
hexmask.long.word 0x918 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x918 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x918 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x918 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x918 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x918 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x918 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x918 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x918 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x91C "DOC0EXPD6727,"
hexmask.long.word 0x91C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x91C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x91C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x91C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x91C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x91C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x91C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x91C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x91C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x920 "DOC0EXPD6728,"
hexmask.long.word 0x920 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x920 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x920 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x920 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x920 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x920 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x920 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x920 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x920 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x924 "DOC0EXPD6729,"
hexmask.long.word 0x924 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x924 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x924 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x924 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x924 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x924 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x924 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x924 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x924 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x928 "DOC0EXPD6730,"
hexmask.long.word 0x928 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x928 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x928 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x928 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x928 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x928 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x928 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x928 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x928 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x92C "DOC0EXPD6731,"
hexmask.long.word 0x92C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x92C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x92C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x92C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x92C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x92C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x92C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x92C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x92C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x930 "DOC0EXPD6732,"
hexmask.long.word 0x930 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x930 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x930 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x930 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x930 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x930 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x930 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x930 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x930 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x934 "DOC0EXPD6733,"
hexmask.long.word 0x934 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x934 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x934 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x934 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x934 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x934 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x934 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x934 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x934 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x938 "DOC0EXPD6734,"
hexmask.long.word 0x938 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x938 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x938 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x938 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x938 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x938 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x938 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x938 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x938 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x93C "DOC0EXPD6735,"
hexmask.long.word 0x93C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x93C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x93C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x93C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x93C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x93C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x93C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x93C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x93C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x940 "DOC0EXPD6736,"
hexmask.long.word 0x940 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x940 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x940 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x940 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x940 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x940 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x940 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x940 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x940 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x944 "DOC0EXPD6737,"
hexmask.long.word 0x944 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x944 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x944 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x944 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x944 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x944 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x944 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x944 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x944 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x948 "DOC0EXPD6738,"
hexmask.long.word 0x948 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x948 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x948 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x948 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x948 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x948 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x948 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x948 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x948 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x94C "DOC0EXPD6739,"
hexmask.long.word 0x94C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x94C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x94C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x94C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x94C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x94C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x94C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x94C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x94C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x950 "DOC0EXPD6740,"
hexmask.long.word 0x950 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x950 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x950 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x950 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x950 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x950 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x950 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x950 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x950 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x954 "DOC0EXPD6741,"
hexmask.long.word 0x954 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x954 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x954 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x954 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x954 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x954 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x954 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x954 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x954 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x958 "DOC0EXPD6742,"
hexmask.long.word 0x958 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x958 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x958 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x958 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x958 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x958 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x958 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x958 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x958 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x95C "DOC0EXPD6743,"
hexmask.long.word 0x95C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x95C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x95C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x95C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x95C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x95C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x95C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x95C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x95C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x960 "DOC0EXPD6744,"
hexmask.long.word 0x960 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x960 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x960 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x960 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x960 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x960 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x960 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x960 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x960 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x964 "DOC0EXPD6745,"
hexmask.long.word 0x964 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x964 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x964 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x964 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x964 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x964 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x964 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x964 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x964 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x968 "DOC0EXPD6746,"
hexmask.long.word 0x968 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x968 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x968 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x968 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x968 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x968 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x968 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x968 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x968 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x96C "DOC0EXPD6747,"
hexmask.long.word 0x96C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x96C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x96C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x96C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x96C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x96C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x96C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x96C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x96C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x970 "DOC0EXPD6748,"
hexmask.long.word 0x970 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x970 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x970 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x970 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x970 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x970 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x970 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x970 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x970 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x974 "DOC0EXPD6749,"
hexmask.long.word 0x974 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x974 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x974 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x974 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x974 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x974 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x974 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x974 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x974 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x978 "DOC0EXPD6750,"
hexmask.long.word 0x978 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x978 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x978 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x978 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x978 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x978 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x978 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x978 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x978 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x97C "DOC0EXPD6751,"
hexmask.long.word 0x97C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x97C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x97C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x97C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x97C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x97C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x97C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x97C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x97C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x980 "DOC0EXPD6752,"
hexmask.long.word 0x980 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x980 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x980 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x980 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x980 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x980 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x980 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x980 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x980 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x984 "DOC0EXPD6753,"
hexmask.long.word 0x984 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x984 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x984 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x984 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x984 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x984 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x984 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x984 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x984 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x988 "DOC0EXPD6754,"
hexmask.long.word 0x988 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x988 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x988 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x988 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x988 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x988 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x988 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x988 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x988 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x98C "DOC0EXPD6755,"
hexmask.long.word 0x98C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x98C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x98C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x98C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x98C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x98C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x98C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x98C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x98C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x990 "DOC0EXPD6756,"
hexmask.long.word 0x990 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x990 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x990 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x990 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x990 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x990 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x990 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x990 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x990 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x994 "DOC0EXPD6757,"
hexmask.long.word 0x994 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x994 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x994 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x994 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x994 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x994 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x994 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x994 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x994 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x998 "DOC0EXPD6758,"
hexmask.long.word 0x998 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x998 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x998 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x998 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x998 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x998 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x998 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x998 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x998 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x99C "DOC0EXPD6759,"
hexmask.long.word 0x99C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x99C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x99C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x99C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x99C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x99C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x99C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x99C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x99C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A0 "DOC0EXPD6760,"
hexmask.long.word 0x9A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A4 "DOC0EXPD6761,"
hexmask.long.word 0x9A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A8 "DOC0EXPD6762,"
hexmask.long.word 0x9A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9AC "DOC0EXPD6763,"
hexmask.long.word 0x9AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B0 "DOC0EXPD6764,"
hexmask.long.word 0x9B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B4 "DOC0EXPD6765,"
hexmask.long.word 0x9B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B8 "DOC0EXPD6766,"
hexmask.long.word 0x9B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9BC "DOC0EXPD6767,"
hexmask.long.word 0x9BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C0 "DOC0EXPD6768,"
hexmask.long.word 0x9C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C4 "DOC0EXPD6769,"
hexmask.long.word 0x9C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C8 "DOC0EXPD6770,"
hexmask.long.word 0x9C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9CC "DOC0EXPD6771,"
hexmask.long.word 0x9CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D0 "DOC0EXPD6772,"
hexmask.long.word 0x9D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D4 "DOC0EXPD6773,"
hexmask.long.word 0x9D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D8 "DOC0EXPD6774,"
hexmask.long.word 0x9D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9DC "DOC0EXPD6775,"
hexmask.long.word 0x9DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E0 "DOC0EXPD6776,"
hexmask.long.word 0x9E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E4 "DOC0EXPD6777,"
hexmask.long.word 0x9E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E8 "DOC0EXPD6778,"
hexmask.long.word 0x9E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9EC "DOC0EXPD6779,"
hexmask.long.word 0x9EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F0 "DOC0EXPD6780,"
hexmask.long.word 0x9F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F4 "DOC0EXPD6781,"
hexmask.long.word 0x9F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F8 "DOC0EXPD6782,"
hexmask.long.word 0x9F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9FC "DOC0EXPD6783,"
hexmask.long.word 0x9FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA00 "DOC0EXPD6784,"
hexmask.long.word 0xA00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA04 "DOC0EXPD6785,"
hexmask.long.word 0xA04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA08 "DOC0EXPD6786,"
hexmask.long.word 0xA08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA0C "DOC0EXPD6787,"
hexmask.long.word 0xA0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA10 "DOC0EXPD6788,"
hexmask.long.word 0xA10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA14 "DOC0EXPD6789,"
hexmask.long.word 0xA14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA18 "DOC0EXPD6790,"
hexmask.long.word 0xA18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA1C "DOC0EXPD6791,"
hexmask.long.word 0xA1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA20 "DOC0EXPD6792,"
hexmask.long.word 0xA20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA24 "DOC0EXPD6793,"
hexmask.long.word 0xA24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA28 "DOC0EXPD6794,"
hexmask.long.word 0xA28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA2C "DOC0EXPD6795,"
hexmask.long.word 0xA2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA30 "DOC0EXPD6796,"
hexmask.long.word 0xA30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA34 "DOC0EXPD6797,"
hexmask.long.word 0xA34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA38 "DOC0EXPD6798,"
hexmask.long.word 0xA38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA3C "DOC0EXPD6799,"
hexmask.long.word 0xA3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA40 "DOC0EXPD6800,"
hexmask.long.word 0xA40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA44 "DOC0EXPD6801,"
hexmask.long.word 0xA44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA48 "DOC0EXPD6802,"
hexmask.long.word 0xA48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA4C "DOC0EXPD6803,"
hexmask.long.word 0xA4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA50 "DOC0EXPD6804,"
hexmask.long.word 0xA50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA54 "DOC0EXPD6805,"
hexmask.long.word 0xA54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA58 "DOC0EXPD6806,"
hexmask.long.word 0xA58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA5C "DOC0EXPD6807,"
hexmask.long.word 0xA5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA60 "DOC0EXPD6808,"
hexmask.long.word 0xA60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA64 "DOC0EXPD6809,"
hexmask.long.word 0xA64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA68 "DOC0EXPD6810,"
hexmask.long.word 0xA68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA6C "DOC0EXPD6811,"
hexmask.long.word 0xA6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA70 "DOC0EXPD6812,"
hexmask.long.word 0xA70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA74 "DOC0EXPD6813,"
hexmask.long.word 0xA74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA78 "DOC0EXPD6814,"
hexmask.long.word 0xA78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA7C "DOC0EXPD6815,"
hexmask.long.word 0xA7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA80 "DOC0EXPD6816,"
hexmask.long.word 0xA80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA84 "DOC0EXPD6817,"
hexmask.long.word 0xA84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA88 "DOC0EXPD6818,"
hexmask.long.word 0xA88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA8C "DOC0EXPD6819,"
hexmask.long.word 0xA8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA90 "DOC0EXPD6820,"
hexmask.long.word 0xA90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA94 "DOC0EXPD6821,"
hexmask.long.word 0xA94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA98 "DOC0EXPD6822,"
hexmask.long.word 0xA98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA9C "DOC0EXPD6823,"
hexmask.long.word 0xA9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA0 "DOC0EXPD6824,"
hexmask.long.word 0xAA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA4 "DOC0EXPD6825,"
hexmask.long.word 0xAA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA8 "DOC0EXPD6826,"
hexmask.long.word 0xAA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAAC "DOC0EXPD6827,"
hexmask.long.word 0xAAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB0 "DOC0EXPD6828,"
hexmask.long.word 0xAB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB4 "DOC0EXPD6829,"
hexmask.long.word 0xAB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB8 "DOC0EXPD6830,"
hexmask.long.word 0xAB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xABC "DOC0EXPD6831,"
hexmask.long.word 0xABC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xABC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xABC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xABC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xABC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xABC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xABC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xABC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xABC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC0 "DOC0EXPD6832,"
hexmask.long.word 0xAC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC4 "DOC0EXPD6833,"
hexmask.long.word 0xAC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC8 "DOC0EXPD6834,"
hexmask.long.word 0xAC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xACC "DOC0EXPD6835,"
hexmask.long.word 0xACC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xACC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xACC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xACC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xACC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xACC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xACC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xACC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xACC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD0 "DOC0EXPD6836,"
hexmask.long.word 0xAD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD4 "DOC0EXPD6837,"
hexmask.long.word 0xAD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD8 "DOC0EXPD6838,"
hexmask.long.word 0xAD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xADC "DOC0EXPD6839,"
hexmask.long.word 0xADC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xADC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xADC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xADC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xADC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xADC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xADC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xADC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xADC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE0 "DOC0EXPD6840,"
hexmask.long.word 0xAE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE4 "DOC0EXPD6841,"
hexmask.long.word 0xAE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE8 "DOC0EXPD6842,"
hexmask.long.word 0xAE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAEC "DOC0EXPD6843,"
hexmask.long.word 0xAEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF0 "DOC0EXPD6844,"
hexmask.long.word 0xAF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF4 "DOC0EXPD6845,"
hexmask.long.word 0xAF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF8 "DOC0EXPD6846,"
hexmask.long.word 0xAF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAFC "DOC0EXPD6847,"
hexmask.long.word 0xAFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB00 "DOC0EXPD6848,"
hexmask.long.word 0xB00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB04 "DOC0EXPD6849,"
hexmask.long.word 0xB04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB08 "DOC0EXPD6850,"
hexmask.long.word 0xB08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB0C "DOC0EXPD6851,"
hexmask.long.word 0xB0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB10 "DOC0EXPD6852,"
hexmask.long.word 0xB10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB14 "DOC0EXPD6853,"
hexmask.long.word 0xB14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB18 "DOC0EXPD6854,"
hexmask.long.word 0xB18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB1C "DOC0EXPD6855,"
hexmask.long.word 0xB1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB20 "DOC0EXPD6856,"
hexmask.long.word 0xB20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB24 "DOC0EXPD6857,"
hexmask.long.word 0xB24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB28 "DOC0EXPD6858,"
hexmask.long.word 0xB28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB2C "DOC0EXPD6859,"
hexmask.long.word 0xB2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB30 "DOC0EXPD6860,"
hexmask.long.word 0xB30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB34 "DOC0EXPD6861,"
hexmask.long.word 0xB34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB38 "DOC0EXPD6862,"
hexmask.long.word 0xB38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB3C "DOC0EXPD6863,"
hexmask.long.word 0xB3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB40 "DOC0EXPD6864,"
hexmask.long.word 0xB40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB44 "DOC0EXPD6865,"
hexmask.long.word 0xB44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB48 "DOC0EXPD6866,"
hexmask.long.word 0xB48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB4C "DOC0EXPD6867,"
hexmask.long.word 0xB4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB50 "DOC0EXPD6868,"
hexmask.long.word 0xB50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB54 "DOC0EXPD6869,"
hexmask.long.word 0xB54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB58 "DOC0EXPD6870,"
hexmask.long.word 0xB58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB5C "DOC0EXPD6871,"
hexmask.long.word 0xB5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB60 "DOC0EXPD6872,"
hexmask.long.word 0xB60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB64 "DOC0EXPD6873,"
hexmask.long.word 0xB64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB68 "DOC0EXPD6874,"
hexmask.long.word 0xB68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB6C "DOC0EXPD6875,"
hexmask.long.word 0xB6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB70 "DOC0EXPD6876,"
hexmask.long.word 0xB70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB74 "DOC0EXPD6877,"
hexmask.long.word 0xB74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB78 "DOC0EXPD6878,"
hexmask.long.word 0xB78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB7C "DOC0EXPD6879,"
hexmask.long.word 0xB7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB80 "DOC0EXPD6880,"
hexmask.long.word 0xB80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB84 "DOC0EXPD6881,"
hexmask.long.word 0xB84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB88 "DOC0EXPD6882,"
hexmask.long.word 0xB88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB8C "DOC0EXPD6883,"
hexmask.long.word 0xB8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB90 "DOC0EXPD6884,"
hexmask.long.word 0xB90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB94 "DOC0EXPD6885,"
hexmask.long.word 0xB94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB98 "DOC0EXPD6886,"
hexmask.long.word 0xB98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB9C "DOC0EXPD6887,"
hexmask.long.word 0xB9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA0 "DOC0EXPD6888,"
hexmask.long.word 0xBA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA4 "DOC0EXPD6889,"
hexmask.long.word 0xBA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA8 "DOC0EXPD6890,"
hexmask.long.word 0xBA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBAC "DOC0EXPD6891,"
hexmask.long.word 0xBAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB0 "DOC0EXPD6892,"
hexmask.long.word 0xBB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB4 "DOC0EXPD6893,"
hexmask.long.word 0xBB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB8 "DOC0EXPD6894,"
hexmask.long.word 0xBB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBBC "DOC0EXPD6895,"
hexmask.long.word 0xBBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC0 "DOC0EXPD6896,"
hexmask.long.word 0xBC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC4 "DOC0EXPD6897,"
hexmask.long.word 0xBC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC8 "DOC0EXPD6898,"
hexmask.long.word 0xBC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBCC "DOC0EXPD6899,"
hexmask.long.word 0xBCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD0 "DOC0EXPD6900,"
hexmask.long.word 0xBD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD4 "DOC0EXPD6901,"
hexmask.long.word 0xBD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD8 "DOC0EXPD6902,"
hexmask.long.word 0xBD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBDC "DOC0EXPD6903,"
hexmask.long.word 0xBDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE0 "DOC0EXPD6904,"
hexmask.long.word 0xBE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE4 "DOC0EXPD6905,"
hexmask.long.word 0xBE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE8 "DOC0EXPD6906,"
hexmask.long.word 0xBE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBEC "DOC0EXPD6907,"
hexmask.long.word 0xBEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF0 "DOC0EXPD6908,"
hexmask.long.word 0xBF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF4 "DOC0EXPD6909,"
hexmask.long.word 0xBF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF8 "DOC0EXPD6910,"
hexmask.long.word 0xBF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBFC "DOC0EXPD6911,"
hexmask.long.word 0xBFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC00 "DOC0EXPD6912,"
hexmask.long.word 0xC00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC04 "DOC0EXPD6913,"
hexmask.long.word 0xC04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC08 "DOC0EXPD6914,"
hexmask.long.word 0xC08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC0C "DOC0EXPD6915,"
hexmask.long.word 0xC0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC10 "DOC0EXPD6916,"
hexmask.long.word 0xC10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC14 "DOC0EXPD6917,"
hexmask.long.word 0xC14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC18 "DOC0EXPD6918,"
hexmask.long.word 0xC18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC1C "DOC0EXPD6919,"
hexmask.long.word 0xC1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC20 "DOC0EXPD6920,"
hexmask.long.word 0xC20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC24 "DOC0EXPD6921,"
hexmask.long.word 0xC24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC28 "DOC0EXPD6922,"
hexmask.long.word 0xC28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC2C "DOC0EXPD6923,"
hexmask.long.word 0xC2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC30 "DOC0EXPD6924,"
hexmask.long.word 0xC30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC34 "DOC0EXPD6925,"
hexmask.long.word 0xC34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC38 "DOC0EXPD6926,"
hexmask.long.word 0xC38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC3C "DOC0EXPD6927,"
hexmask.long.word 0xC3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC40 "DOC0EXPD6928,"
hexmask.long.word 0xC40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC44 "DOC0EXPD6929,"
hexmask.long.word 0xC44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC48 "DOC0EXPD6930,"
hexmask.long.word 0xC48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC4C "DOC0EXPD6931,"
hexmask.long.word 0xC4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC50 "DOC0EXPD6932,"
hexmask.long.word 0xC50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC54 "DOC0EXPD6933,"
hexmask.long.word 0xC54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC58 "DOC0EXPD6934,"
hexmask.long.word 0xC58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC5C "DOC0EXPD6935,"
hexmask.long.word 0xC5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC60 "DOC0EXPD6936,"
hexmask.long.word 0xC60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC64 "DOC0EXPD6937,"
hexmask.long.word 0xC64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC68 "DOC0EXPD6938,"
hexmask.long.word 0xC68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC6C "DOC0EXPD6939,"
hexmask.long.word 0xC6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC70 "DOC0EXPD6940,"
hexmask.long.word 0xC70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC74 "DOC0EXPD6941,"
hexmask.long.word 0xC74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC78 "DOC0EXPD6942,"
hexmask.long.word 0xC78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC7C "DOC0EXPD6943,"
hexmask.long.word 0xC7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC80 "DOC0EXPD6944,"
hexmask.long.word 0xC80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC84 "DOC0EXPD6945,"
hexmask.long.word 0xC84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC88 "DOC0EXPD6946,"
hexmask.long.word 0xC88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC8C "DOC0EXPD6947,"
hexmask.long.word 0xC8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC90 "DOC0EXPD6948,"
hexmask.long.word 0xC90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC94 "DOC0EXPD6949,"
hexmask.long.word 0xC94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC98 "DOC0EXPD6950,"
hexmask.long.word 0xC98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC9C "DOC0EXPD6951,"
hexmask.long.word 0xC9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA0 "DOC0EXPD6952,"
hexmask.long.word 0xCA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA4 "DOC0EXPD6953,"
hexmask.long.word 0xCA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA8 "DOC0EXPD6954,"
hexmask.long.word 0xCA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCAC "DOC0EXPD6955,"
hexmask.long.word 0xCAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB0 "DOC0EXPD6956,"
hexmask.long.word 0xCB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB4 "DOC0EXPD6957,"
hexmask.long.word 0xCB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB8 "DOC0EXPD6958,"
hexmask.long.word 0xCB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCBC "DOC0EXPD6959,"
hexmask.long.word 0xCBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC0 "DOC0EXPD6960,"
hexmask.long.word 0xCC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC4 "DOC0EXPD6961,"
hexmask.long.word 0xCC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC8 "DOC0EXPD6962,"
hexmask.long.word 0xCC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCCC "DOC0EXPD6963,"
hexmask.long.word 0xCCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD0 "DOC0EXPD6964,"
hexmask.long.word 0xCD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD4 "DOC0EXPD6965,"
hexmask.long.word 0xCD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD8 "DOC0EXPD6966,"
hexmask.long.word 0xCD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCDC "DOC0EXPD6967,"
hexmask.long.word 0xCDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE0 "DOC0EXPD6968,"
hexmask.long.word 0xCE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE4 "DOC0EXPD6969,"
hexmask.long.word 0xCE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE8 "DOC0EXPD6970,"
hexmask.long.word 0xCE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCEC "DOC0EXPD6971,"
hexmask.long.word 0xCEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF0 "DOC0EXPD6972,"
hexmask.long.word 0xCF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF4 "DOC0EXPD6973,"
hexmask.long.word 0xCF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF8 "DOC0EXPD6974,"
hexmask.long.word 0xCF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCFC "DOC0EXPD6975,"
hexmask.long.word 0xCFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD00 "DOC0EXPD6976,"
hexmask.long.word 0xD00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD04 "DOC0EXPD6977,"
hexmask.long.word 0xD04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD08 "DOC0EXPD6978,"
hexmask.long.word 0xD08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD0C "DOC0EXPD6979,"
hexmask.long.word 0xD0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD10 "DOC0EXPD6980,"
hexmask.long.word 0xD10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD14 "DOC0EXPD6981,"
hexmask.long.word 0xD14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD18 "DOC0EXPD6982,"
hexmask.long.word 0xD18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD1C "DOC0EXPD6983,"
hexmask.long.word 0xD1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD20 "DOC0EXPD6984,"
hexmask.long.word 0xD20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD24 "DOC0EXPD6985,"
hexmask.long.word 0xD24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD28 "DOC0EXPD6986,"
hexmask.long.word 0xD28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD2C "DOC0EXPD6987,"
hexmask.long.word 0xD2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD30 "DOC0EXPD6988,"
hexmask.long.word 0xD30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD34 "DOC0EXPD6989,"
hexmask.long.word 0xD34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD38 "DOC0EXPD6990,"
hexmask.long.word 0xD38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD3C "DOC0EXPD6991,"
hexmask.long.word 0xD3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD40 "DOC0EXPD6992,"
hexmask.long.word 0xD40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD44 "DOC0EXPD6993,"
hexmask.long.word 0xD44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD48 "DOC0EXPD6994,"
hexmask.long.word 0xD48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD4C "DOC0EXPD6995,"
hexmask.long.word 0xD4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD50 "DOC0EXPD6996,"
hexmask.long.word 0xD50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD54 "DOC0EXPD6997,"
hexmask.long.word 0xD54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD58 "DOC0EXPD6998,"
hexmask.long.word 0xD58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD5C "DOC0EXPD6999,"
hexmask.long.word 0xD5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD60 "DOC0EXPD7000,"
hexmask.long.word 0xD60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD64 "DOC0EXPD7001,"
hexmask.long.word 0xD64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD68 "DOC0EXPD7002,"
hexmask.long.word 0xD68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD6C "DOC0EXPD7003,"
hexmask.long.word 0xD6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD70 "DOC0EXPD7004,"
hexmask.long.word 0xD70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD74 "DOC0EXPD7005,"
hexmask.long.word 0xD74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD78 "DOC0EXPD7006,"
hexmask.long.word 0xD78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD7C "DOC0EXPD7007,"
hexmask.long.word 0xD7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD80 "DOC0EXPD7008,"
hexmask.long.word 0xD80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD84 "DOC0EXPD7009,"
hexmask.long.word 0xD84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD88 "DOC0EXPD7010,"
hexmask.long.word 0xD88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD8C "DOC0EXPD7011,"
hexmask.long.word 0xD8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD90 "DOC0EXPD7012,"
hexmask.long.word 0xD90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD94 "DOC0EXPD7013,"
hexmask.long.word 0xD94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD98 "DOC0EXPD7014,"
hexmask.long.word 0xD98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD9C "DOC0EXPD7015,"
hexmask.long.word 0xD9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA0 "DOC0EXPD7016,"
hexmask.long.word 0xDA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA4 "DOC0EXPD7017,"
hexmask.long.word 0xDA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA8 "DOC0EXPD7018,"
hexmask.long.word 0xDA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDAC "DOC0EXPD7019,"
hexmask.long.word 0xDAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB0 "DOC0EXPD7020,"
hexmask.long.word 0xDB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB4 "DOC0EXPD7021,"
hexmask.long.word 0xDB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB8 "DOC0EXPD7022,"
hexmask.long.word 0xDB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDBC "DOC0EXPD7023,"
hexmask.long.word 0xDBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC0 "DOC0EXPD7024,"
hexmask.long.word 0xDC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC4 "DOC0EXPD7025,"
hexmask.long.word 0xDC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC8 "DOC0EXPD7026,"
hexmask.long.word 0xDC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDCC "DOC0EXPD7027,"
hexmask.long.word 0xDCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD0 "DOC0EXPD7028,"
hexmask.long.word 0xDD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD4 "DOC0EXPD7029,"
hexmask.long.word 0xDD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD8 "DOC0EXPD7030,"
hexmask.long.word 0xDD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDDC "DOC0EXPD7031,"
hexmask.long.word 0xDDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE0 "DOC0EXPD7032,"
hexmask.long.word 0xDE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE4 "DOC0EXPD7033,"
hexmask.long.word 0xDE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE8 "DOC0EXPD7034,"
hexmask.long.word 0xDE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDEC "DOC0EXPD7035,"
hexmask.long.word 0xDEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF0 "DOC0EXPD7036,"
hexmask.long.word 0xDF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF4 "DOC0EXPD7037,"
hexmask.long.word 0xDF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF8 "DOC0EXPD7038,"
hexmask.long.word 0xDF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDFC "DOC0EXPD7039,"
hexmask.long.word 0xDFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE00 "DOC0EXPD7040,"
hexmask.long.word 0xE00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE04 "DOC0EXPD7041,"
hexmask.long.word 0xE04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE08 "DOC0EXPD7042,"
hexmask.long.word 0xE08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE0C "DOC0EXPD7043,"
hexmask.long.word 0xE0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE10 "DOC0EXPD7044,"
hexmask.long.word 0xE10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE14 "DOC0EXPD7045,"
hexmask.long.word 0xE14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE18 "DOC0EXPD7046,"
hexmask.long.word 0xE18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE1C "DOC0EXPD7047,"
hexmask.long.word 0xE1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE20 "DOC0EXPD7048,"
hexmask.long.word 0xE20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE24 "DOC0EXPD7049,"
hexmask.long.word 0xE24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE28 "DOC0EXPD7050,"
hexmask.long.word 0xE28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE2C "DOC0EXPD7051,"
hexmask.long.word 0xE2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE30 "DOC0EXPD7052,"
hexmask.long.word 0xE30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE34 "DOC0EXPD7053,"
hexmask.long.word 0xE34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE38 "DOC0EXPD7054,"
hexmask.long.word 0xE38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE3C "DOC0EXPD7055,"
hexmask.long.word 0xE3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE40 "DOC0EXPD7056,"
hexmask.long.word 0xE40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE44 "DOC0EXPD7057,"
hexmask.long.word 0xE44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE48 "DOC0EXPD7058,"
hexmask.long.word 0xE48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE4C "DOC0EXPD7059,"
hexmask.long.word 0xE4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE50 "DOC0EXPD7060,"
hexmask.long.word 0xE50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE54 "DOC0EXPD7061,"
hexmask.long.word 0xE54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE58 "DOC0EXPD7062,"
hexmask.long.word 0xE58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE5C "DOC0EXPD7063,"
hexmask.long.word 0xE5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE60 "DOC0EXPD7064,"
hexmask.long.word 0xE60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE64 "DOC0EXPD7065,"
hexmask.long.word 0xE64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE68 "DOC0EXPD7066,"
hexmask.long.word 0xE68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE6C "DOC0EXPD7067,"
hexmask.long.word 0xE6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE70 "DOC0EXPD7068,"
hexmask.long.word 0xE70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE74 "DOC0EXPD7069,"
hexmask.long.word 0xE74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE78 "DOC0EXPD7070,"
hexmask.long.word 0xE78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE7C "DOC0EXPD7071,"
hexmask.long.word 0xE7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE80 "DOC0EXPD7072,"
hexmask.long.word 0xE80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE84 "DOC0EXPD7073,"
hexmask.long.word 0xE84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE88 "DOC0EXPD7074,"
hexmask.long.word 0xE88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE8C "DOC0EXPD7075,"
hexmask.long.word 0xE8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE90 "DOC0EXPD7076,"
hexmask.long.word 0xE90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE94 "DOC0EXPD7077,"
hexmask.long.word 0xE94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE98 "DOC0EXPD7078,"
hexmask.long.word 0xE98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE9C "DOC0EXPD7079,"
hexmask.long.word 0xE9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA0 "DOC0EXPD7080,"
hexmask.long.word 0xEA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA4 "DOC0EXPD7081,"
hexmask.long.word 0xEA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA8 "DOC0EXPD7082,"
hexmask.long.word 0xEA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEAC "DOC0EXPD7083,"
hexmask.long.word 0xEAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB0 "DOC0EXPD7084,"
hexmask.long.word 0xEB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB4 "DOC0EXPD7085,"
hexmask.long.word 0xEB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB8 "DOC0EXPD7086,"
hexmask.long.word 0xEB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEBC "DOC0EXPD7087,"
hexmask.long.word 0xEBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC0 "DOC0EXPD7088,"
hexmask.long.word 0xEC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC4 "DOC0EXPD7089,"
hexmask.long.word 0xEC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC8 "DOC0EXPD7090,"
hexmask.long.word 0xEC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xECC "DOC0EXPD7091,"
hexmask.long.word 0xECC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xECC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xECC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xECC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xECC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xECC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xECC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xECC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xECC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED0 "DOC0EXPD7092,"
hexmask.long.word 0xED0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED4 "DOC0EXPD7093,"
hexmask.long.word 0xED4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED8 "DOC0EXPD7094,"
hexmask.long.word 0xED8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEDC "DOC0EXPD7095,"
hexmask.long.word 0xEDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE0 "DOC0EXPD7096,"
hexmask.long.word 0xEE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE4 "DOC0EXPD7097,"
hexmask.long.word 0xEE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE8 "DOC0EXPD7098,"
hexmask.long.word 0xEE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEEC "DOC0EXPD7099,"
hexmask.long.word 0xEEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF0 "DOC0EXPD7100,"
hexmask.long.word 0xEF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF4 "DOC0EXPD7101,"
hexmask.long.word 0xEF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF8 "DOC0EXPD7102,"
hexmask.long.word 0xEF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEFC "DOC0EXPD7103,"
hexmask.long.word 0xEFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF00 "DOC0EXPD7104,"
hexmask.long.word 0xF00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF04 "DOC0EXPD7105,"
hexmask.long.word 0xF04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF08 "DOC0EXPD7106,"
hexmask.long.word 0xF08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF0C "DOC0EXPD7107,"
hexmask.long.word 0xF0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF10 "DOC0EXPD7108,"
hexmask.long.word 0xF10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF14 "DOC0EXPD7109,"
hexmask.long.word 0xF14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF18 "DOC0EXPD7110,"
hexmask.long.word 0xF18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF1C "DOC0EXPD7111,"
hexmask.long.word 0xF1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF20 "DOC0EXPD7112,"
hexmask.long.word 0xF20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF24 "DOC0EXPD7113,"
hexmask.long.word 0xF24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF28 "DOC0EXPD7114,"
hexmask.long.word 0xF28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF2C "DOC0EXPD7115,"
hexmask.long.word 0xF2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF30 "DOC0EXPD7116,"
hexmask.long.word 0xF30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF34 "DOC0EXPD7117,"
hexmask.long.word 0xF34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF38 "DOC0EXPD7118,"
hexmask.long.word 0xF38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF3C "DOC0EXPD7119,"
hexmask.long.word 0xF3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF40 "DOC0EXPD7120,"
hexmask.long.word 0xF40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF44 "DOC0EXPD7121,"
hexmask.long.word 0xF44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF48 "DOC0EXPD7122,"
hexmask.long.word 0xF48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF4C "DOC0EXPD7123,"
hexmask.long.word 0xF4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF50 "DOC0EXPD7124,"
hexmask.long.word 0xF50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF54 "DOC0EXPD7125,"
hexmask.long.word 0xF54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF58 "DOC0EXPD7126,"
hexmask.long.word 0xF58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF5C "DOC0EXPD7127,"
hexmask.long.word 0xF5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF60 "DOC0EXPD7128,"
hexmask.long.word 0xF60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF64 "DOC0EXPD7129,"
hexmask.long.word 0xF64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF68 "DOC0EXPD7130,"
hexmask.long.word 0xF68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF6C "DOC0EXPD7131,"
hexmask.long.word 0xF6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF70 "DOC0EXPD7132,"
hexmask.long.word 0xF70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF74 "DOC0EXPD7133,"
hexmask.long.word 0xF74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF78 "DOC0EXPD7134,"
hexmask.long.word 0xF78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF7C "DOC0EXPD7135,"
hexmask.long.word 0xF7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF80 "DOC0EXPD7136,"
hexmask.long.word 0xF80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF84 "DOC0EXPD7137,"
hexmask.long.word 0xF84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF88 "DOC0EXPD7138,"
hexmask.long.word 0xF88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF8C "DOC0EXPD7139,"
hexmask.long.word 0xF8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF90 "DOC0EXPD7140,"
hexmask.long.word 0xF90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF94 "DOC0EXPD7141,"
hexmask.long.word 0xF94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF98 "DOC0EXPD7142,"
hexmask.long.word 0xF98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF9C "DOC0EXPD7143,"
hexmask.long.word 0xF9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA0 "DOC0EXPD7144,"
hexmask.long.word 0xFA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA4 "DOC0EXPD7145,"
hexmask.long.word 0xFA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA8 "DOC0EXPD7146,"
hexmask.long.word 0xFA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFAC "DOC0EXPD7147,"
hexmask.long.word 0xFAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB0 "DOC0EXPD7148,"
hexmask.long.word 0xFB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB4 "DOC0EXPD7149,"
hexmask.long.word 0xFB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB8 "DOC0EXPD7150,"
hexmask.long.word 0xFB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFBC "DOC0EXPD7151,"
hexmask.long.word 0xFBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC0 "DOC0EXPD7152,"
hexmask.long.word 0xFC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC4 "DOC0EXPD7153,"
hexmask.long.word 0xFC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC8 "DOC0EXPD7154,"
hexmask.long.word 0xFC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFCC "DOC0EXPD7155,"
hexmask.long.word 0xFCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD0 "DOC0EXPD7156,"
hexmask.long.word 0xFD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD4 "DOC0EXPD7157,"
hexmask.long.word 0xFD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD8 "DOC0EXPD7158,"
hexmask.long.word 0xFD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFDC "DOC0EXPD7159,"
hexmask.long.word 0xFDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE0 "DOC0EXPD7160,"
hexmask.long.word 0xFE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE4 "DOC0EXPD7161,"
hexmask.long.word 0xFE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE8 "DOC0EXPD7162,"
hexmask.long.word 0xFE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFEC "DOC0EXPD7163,"
hexmask.long.word 0xFEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF0 "DOC0EXPD7164,"
hexmask.long.word 0xFF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF4 "DOC0EXPD7165,"
hexmask.long.word 0xFF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF8 "DOC0EXPD7166,"
hexmask.long.word 0xFF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFFC "DOC0EXPD7167,"
hexmask.long.word 0xFFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
group.long 0xB300++0xFFF
line.long 0x0 "DOC0EXPD7168,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4 "DOC0EXPD7169,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8 "DOC0EXPD7170,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC "DOC0EXPD7171,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x10 "DOC0EXPD7172,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x14 "DOC0EXPD7173,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x18 "DOC0EXPD7174,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C "DOC0EXPD7175,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x20 "DOC0EXPD7176,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x24 "DOC0EXPD7177,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x28 "DOC0EXPD7178,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C "DOC0EXPD7179,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x30 "DOC0EXPD7180,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x34 "DOC0EXPD7181,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x38 "DOC0EXPD7182,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C "DOC0EXPD7183,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x40 "DOC0EXPD7184,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x44 "DOC0EXPD7185,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x48 "DOC0EXPD7186,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C "DOC0EXPD7187,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x50 "DOC0EXPD7188,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x54 "DOC0EXPD7189,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x58 "DOC0EXPD7190,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C "DOC0EXPD7191,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x60 "DOC0EXPD7192,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x64 "DOC0EXPD7193,"
hexmask.long.word 0x64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x68 "DOC0EXPD7194,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C "DOC0EXPD7195,"
hexmask.long.word 0x6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x70 "DOC0EXPD7196,"
hexmask.long.word 0x70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x74 "DOC0EXPD7197,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x78 "DOC0EXPD7198,"
hexmask.long.word 0x78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C "DOC0EXPD7199,"
hexmask.long.word 0x7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x80 "DOC0EXPD7200,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x84 "DOC0EXPD7201,"
hexmask.long.word 0x84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x88 "DOC0EXPD7202,"
hexmask.long.word 0x88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C "DOC0EXPD7203,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x90 "DOC0EXPD7204,"
hexmask.long.word 0x90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x94 "DOC0EXPD7205,"
hexmask.long.word 0x94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x98 "DOC0EXPD7206,"
hexmask.long.word 0x98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C "DOC0EXPD7207,"
hexmask.long.word 0x9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA0 "DOC0EXPD7208,"
hexmask.long.word 0xA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA4 "DOC0EXPD7209,"
hexmask.long.word 0xA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA8 "DOC0EXPD7210,"
hexmask.long.word 0xA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC "DOC0EXPD7211,"
hexmask.long.word 0xAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB0 "DOC0EXPD7212,"
hexmask.long.word 0xB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB4 "DOC0EXPD7213,"
hexmask.long.word 0xB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB8 "DOC0EXPD7214,"
hexmask.long.word 0xB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC "DOC0EXPD7215,"
hexmask.long.word 0xBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC0 "DOC0EXPD7216,"
hexmask.long.word 0xC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC4 "DOC0EXPD7217,"
hexmask.long.word 0xC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC8 "DOC0EXPD7218,"
hexmask.long.word 0xC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC "DOC0EXPD7219,"
hexmask.long.word 0xCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD0 "DOC0EXPD7220,"
hexmask.long.word 0xD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD4 "DOC0EXPD7221,"
hexmask.long.word 0xD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD8 "DOC0EXPD7222,"
hexmask.long.word 0xD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC "DOC0EXPD7223,"
hexmask.long.word 0xDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE0 "DOC0EXPD7224,"
hexmask.long.word 0xE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE4 "DOC0EXPD7225,"
hexmask.long.word 0xE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE8 "DOC0EXPD7226,"
hexmask.long.word 0xE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC "DOC0EXPD7227,"
hexmask.long.word 0xEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF0 "DOC0EXPD7228,"
hexmask.long.word 0xF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF4 "DOC0EXPD7229,"
hexmask.long.word 0xF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF8 "DOC0EXPD7230,"
hexmask.long.word 0xF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC "DOC0EXPD7231,"
hexmask.long.word 0xFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x100 "DOC0EXPD7232,"
hexmask.long.word 0x100 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x100 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x100 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x100 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x100 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x100 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x100 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x100 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x100 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x104 "DOC0EXPD7233,"
hexmask.long.word 0x104 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x104 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x104 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x104 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x104 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x104 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x104 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x104 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x104 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x108 "DOC0EXPD7234,"
hexmask.long.word 0x108 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x108 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x108 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x108 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x108 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x108 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x108 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x108 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x108 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x10C "DOC0EXPD7235,"
hexmask.long.word 0x10C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x10C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x10C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x10C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x10C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x10C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x10C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x10C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x10C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x110 "DOC0EXPD7236,"
hexmask.long.word 0x110 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x110 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x110 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x110 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x110 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x110 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x110 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x110 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x110 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x114 "DOC0EXPD7237,"
hexmask.long.word 0x114 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x114 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x114 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x114 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x114 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x114 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x114 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x114 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x114 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x118 "DOC0EXPD7238,"
hexmask.long.word 0x118 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x118 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x118 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x118 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x118 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x118 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x118 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x118 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x118 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x11C "DOC0EXPD7239,"
hexmask.long.word 0x11C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x11C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x11C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x11C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x11C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x11C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x11C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x11C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x11C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x120 "DOC0EXPD7240,"
hexmask.long.word 0x120 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x120 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x120 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x120 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x120 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x120 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x120 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x120 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x120 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x124 "DOC0EXPD7241,"
hexmask.long.word 0x124 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x124 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x124 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x124 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x124 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x124 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x124 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x124 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x124 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x128 "DOC0EXPD7242,"
hexmask.long.word 0x128 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x128 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x128 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x128 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x128 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x128 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x128 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x128 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x128 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x12C "DOC0EXPD7243,"
hexmask.long.word 0x12C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x12C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x12C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x12C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x12C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x12C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x12C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x12C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x12C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x130 "DOC0EXPD7244,"
hexmask.long.word 0x130 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x130 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x130 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x130 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x130 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x130 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x130 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x130 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x130 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x134 "DOC0EXPD7245,"
hexmask.long.word 0x134 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x134 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x134 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x134 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x134 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x134 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x134 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x134 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x134 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x138 "DOC0EXPD7246,"
hexmask.long.word 0x138 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x138 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x138 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x138 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x138 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x138 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x138 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x138 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x138 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x13C "DOC0EXPD7247,"
hexmask.long.word 0x13C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x13C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x13C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x13C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x13C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x13C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x13C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x13C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x13C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x140 "DOC0EXPD7248,"
hexmask.long.word 0x140 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x140 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x140 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x140 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x140 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x140 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x140 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x140 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x140 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x144 "DOC0EXPD7249,"
hexmask.long.word 0x144 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x144 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x144 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x144 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x144 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x144 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x144 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x144 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x144 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x148 "DOC0EXPD7250,"
hexmask.long.word 0x148 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x148 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x148 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x148 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x148 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x148 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x148 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x148 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x148 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x14C "DOC0EXPD7251,"
hexmask.long.word 0x14C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x14C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x14C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x14C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x14C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x14C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x14C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x14C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x150 "DOC0EXPD7252,"
hexmask.long.word 0x150 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x150 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x150 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x150 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x150 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x150 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x150 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x150 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x150 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x154 "DOC0EXPD7253,"
hexmask.long.word 0x154 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x154 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x154 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x154 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x154 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x154 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x154 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x154 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x154 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x158 "DOC0EXPD7254,"
hexmask.long.word 0x158 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x158 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x158 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x158 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x158 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x158 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x158 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x158 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x158 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x15C "DOC0EXPD7255,"
hexmask.long.word 0x15C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x15C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x15C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x15C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x15C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x15C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x15C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x15C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x15C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x160 "DOC0EXPD7256,"
hexmask.long.word 0x160 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x160 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x160 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x160 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x160 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x160 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x160 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x160 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x160 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x164 "DOC0EXPD7257,"
hexmask.long.word 0x164 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x164 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x164 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x164 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x164 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x164 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x164 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x164 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x164 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x168 "DOC0EXPD7258,"
hexmask.long.word 0x168 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x168 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x168 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x168 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x168 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x168 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x168 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x168 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x168 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x16C "DOC0EXPD7259,"
hexmask.long.word 0x16C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x16C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x16C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x16C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x16C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x16C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x16C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x16C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x16C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x170 "DOC0EXPD7260,"
hexmask.long.word 0x170 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x170 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x170 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x170 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x170 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x170 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x170 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x170 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x170 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x174 "DOC0EXPD7261,"
hexmask.long.word 0x174 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x174 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x174 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x174 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x174 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x174 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x174 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x174 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x174 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x178 "DOC0EXPD7262,"
hexmask.long.word 0x178 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x178 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x178 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x178 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x178 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x178 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x178 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x178 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x178 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x17C "DOC0EXPD7263,"
hexmask.long.word 0x17C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x17C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x17C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x17C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x17C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x17C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x17C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x17C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x17C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x180 "DOC0EXPD7264,"
hexmask.long.word 0x180 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x180 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x180 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x180 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x180 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x180 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x180 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x180 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x180 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x184 "DOC0EXPD7265,"
hexmask.long.word 0x184 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x184 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x184 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x184 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x184 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x184 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x184 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x184 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x184 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x188 "DOC0EXPD7266,"
hexmask.long.word 0x188 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x188 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x188 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x188 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x188 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x188 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x188 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x188 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x188 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x18C "DOC0EXPD7267,"
hexmask.long.word 0x18C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x18C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x18C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x18C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x18C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x18C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x18C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x18C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x18C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x190 "DOC0EXPD7268,"
hexmask.long.word 0x190 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x190 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x190 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x190 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x190 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x190 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x190 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x190 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x190 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x194 "DOC0EXPD7269,"
hexmask.long.word 0x194 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x194 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x194 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x194 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x194 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x194 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x194 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x194 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x194 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x198 "DOC0EXPD7270,"
hexmask.long.word 0x198 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x198 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x198 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x198 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x198 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x198 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x198 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x198 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x198 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x19C "DOC0EXPD7271,"
hexmask.long.word 0x19C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x19C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x19C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x19C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x19C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x19C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x19C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x19C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x19C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A0 "DOC0EXPD7272,"
hexmask.long.word 0x1A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A4 "DOC0EXPD7273,"
hexmask.long.word 0x1A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1A8 "DOC0EXPD7274,"
hexmask.long.word 0x1A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1AC "DOC0EXPD7275,"
hexmask.long.word 0x1AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B0 "DOC0EXPD7276,"
hexmask.long.word 0x1B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B4 "DOC0EXPD7277,"
hexmask.long.word 0x1B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1B8 "DOC0EXPD7278,"
hexmask.long.word 0x1B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1BC "DOC0EXPD7279,"
hexmask.long.word 0x1BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C0 "DOC0EXPD7280,"
hexmask.long.word 0x1C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C4 "DOC0EXPD7281,"
hexmask.long.word 0x1C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1C8 "DOC0EXPD7282,"
hexmask.long.word 0x1C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1CC "DOC0EXPD7283,"
hexmask.long.word 0x1CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D0 "DOC0EXPD7284,"
hexmask.long.word 0x1D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D4 "DOC0EXPD7285,"
hexmask.long.word 0x1D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1D8 "DOC0EXPD7286,"
hexmask.long.word 0x1D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1DC "DOC0EXPD7287,"
hexmask.long.word 0x1DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E0 "DOC0EXPD7288,"
hexmask.long.word 0x1E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E4 "DOC0EXPD7289,"
hexmask.long.word 0x1E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1E8 "DOC0EXPD7290,"
hexmask.long.word 0x1E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1EC "DOC0EXPD7291,"
hexmask.long.word 0x1EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F0 "DOC0EXPD7292,"
hexmask.long.word 0x1F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F4 "DOC0EXPD7293,"
hexmask.long.word 0x1F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1F8 "DOC0EXPD7294,"
hexmask.long.word 0x1F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x1FC "DOC0EXPD7295,"
hexmask.long.word 0x1FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x1FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x1FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x1FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x1FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x1FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x1FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x1FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x1FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x200 "DOC0EXPD7296,"
hexmask.long.word 0x200 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x200 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x200 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x200 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x200 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x200 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x200 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x200 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x200 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x204 "DOC0EXPD7297,"
hexmask.long.word 0x204 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x204 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x204 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x204 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x204 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x204 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x204 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x204 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x204 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x208 "DOC0EXPD7298,"
hexmask.long.word 0x208 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x208 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x208 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x208 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x208 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x208 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x208 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x208 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x208 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x20C "DOC0EXPD7299,"
hexmask.long.word 0x20C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x20C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x20C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x20C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x20C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x20C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x20C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x20C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x20C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x210 "DOC0EXPD7300,"
hexmask.long.word 0x210 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x210 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x210 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x210 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x210 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x210 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x210 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x210 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x210 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x214 "DOC0EXPD7301,"
hexmask.long.word 0x214 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x214 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x214 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x214 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x214 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x214 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x214 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x214 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x214 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x218 "DOC0EXPD7302,"
hexmask.long.word 0x218 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x218 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x218 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x218 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x218 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x218 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x218 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x218 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x218 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x21C "DOC0EXPD7303,"
hexmask.long.word 0x21C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x21C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x21C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x21C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x21C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x21C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x21C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x21C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x21C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x220 "DOC0EXPD7304,"
hexmask.long.word 0x220 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x220 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x220 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x220 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x220 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x220 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x220 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x220 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x220 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x224 "DOC0EXPD7305,"
hexmask.long.word 0x224 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x224 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x224 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x224 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x224 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x224 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x224 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x224 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x224 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x228 "DOC0EXPD7306,"
hexmask.long.word 0x228 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x228 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x228 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x228 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x228 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x228 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x228 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x228 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x228 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x22C "DOC0EXPD7307,"
hexmask.long.word 0x22C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x22C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x22C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x22C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x22C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x22C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x22C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x22C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x22C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x230 "DOC0EXPD7308,"
hexmask.long.word 0x230 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x230 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x230 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x230 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x230 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x230 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x230 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x230 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x230 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x234 "DOC0EXPD7309,"
hexmask.long.word 0x234 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x234 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x234 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x234 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x234 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x234 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x234 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x234 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x234 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x238 "DOC0EXPD7310,"
hexmask.long.word 0x238 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x238 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x238 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x238 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x238 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x238 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x238 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x238 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x238 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x23C "DOC0EXPD7311,"
hexmask.long.word 0x23C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x23C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x23C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x23C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x23C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x23C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x23C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x23C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x23C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x240 "DOC0EXPD7312,"
hexmask.long.word 0x240 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x240 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x240 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x240 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x240 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x240 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x240 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x240 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x240 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x244 "DOC0EXPD7313,"
hexmask.long.word 0x244 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x244 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x244 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x244 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x244 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x244 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x244 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x244 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x244 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x248 "DOC0EXPD7314,"
hexmask.long.word 0x248 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x248 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x248 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x248 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x248 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x248 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x248 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x248 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x248 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x24C "DOC0EXPD7315,"
hexmask.long.word 0x24C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x24C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x24C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x24C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x24C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x24C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x24C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x24C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x24C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x250 "DOC0EXPD7316,"
hexmask.long.word 0x250 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x250 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x250 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x250 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x250 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x250 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x250 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x250 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x250 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x254 "DOC0EXPD7317,"
hexmask.long.word 0x254 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x254 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x254 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x254 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x254 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x254 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x254 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x254 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x254 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x258 "DOC0EXPD7318,"
hexmask.long.word 0x258 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x258 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x258 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x258 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x258 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x258 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x258 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x258 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x258 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x25C "DOC0EXPD7319,"
hexmask.long.word 0x25C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x25C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x25C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x25C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x25C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x25C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x25C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x25C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x25C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x260 "DOC0EXPD7320,"
hexmask.long.word 0x260 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x260 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x260 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x260 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x260 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x260 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x260 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x260 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x260 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x264 "DOC0EXPD7321,"
hexmask.long.word 0x264 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x264 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x264 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x264 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x264 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x264 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x264 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x264 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x264 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x268 "DOC0EXPD7322,"
hexmask.long.word 0x268 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x268 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x268 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x268 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x268 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x268 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x268 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x268 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x268 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x26C "DOC0EXPD7323,"
hexmask.long.word 0x26C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x26C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x26C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x26C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x26C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x26C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x26C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x26C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x26C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x270 "DOC0EXPD7324,"
hexmask.long.word 0x270 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x270 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x270 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x270 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x270 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x270 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x270 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x270 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x270 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x274 "DOC0EXPD7325,"
hexmask.long.word 0x274 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x274 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x274 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x274 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x274 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x274 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x274 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x274 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x274 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x278 "DOC0EXPD7326,"
hexmask.long.word 0x278 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x278 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x278 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x278 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x278 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x278 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x278 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x278 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x278 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x27C "DOC0EXPD7327,"
hexmask.long.word 0x27C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x27C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x27C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x27C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x27C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x27C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x27C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x27C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x27C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x280 "DOC0EXPD7328,"
hexmask.long.word 0x280 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x280 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x280 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x280 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x280 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x280 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x280 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x280 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x280 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x284 "DOC0EXPD7329,"
hexmask.long.word 0x284 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x284 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x284 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x284 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x284 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x284 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x284 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x284 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x284 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x288 "DOC0EXPD7330,"
hexmask.long.word 0x288 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x288 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x288 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x288 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x288 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x288 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x288 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x288 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x288 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x28C "DOC0EXPD7331,"
hexmask.long.word 0x28C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x28C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x28C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x28C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x28C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x28C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x28C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x28C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x28C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x290 "DOC0EXPD7332,"
hexmask.long.word 0x290 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x290 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x290 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x290 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x290 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x290 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x290 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x290 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x290 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x294 "DOC0EXPD7333,"
hexmask.long.word 0x294 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x294 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x294 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x294 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x294 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x294 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x294 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x294 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x294 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x298 "DOC0EXPD7334,"
hexmask.long.word 0x298 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x298 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x298 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x298 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x298 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x298 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x298 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x298 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x298 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x29C "DOC0EXPD7335,"
hexmask.long.word 0x29C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x29C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x29C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x29C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x29C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x29C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x29C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x29C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x29C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A0 "DOC0EXPD7336,"
hexmask.long.word 0x2A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A4 "DOC0EXPD7337,"
hexmask.long.word 0x2A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2A8 "DOC0EXPD7338,"
hexmask.long.word 0x2A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2AC "DOC0EXPD7339,"
hexmask.long.word 0x2AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B0 "DOC0EXPD7340,"
hexmask.long.word 0x2B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B4 "DOC0EXPD7341,"
hexmask.long.word 0x2B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2B8 "DOC0EXPD7342,"
hexmask.long.word 0x2B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2BC "DOC0EXPD7343,"
hexmask.long.word 0x2BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C0 "DOC0EXPD7344,"
hexmask.long.word 0x2C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C4 "DOC0EXPD7345,"
hexmask.long.word 0x2C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2C8 "DOC0EXPD7346,"
hexmask.long.word 0x2C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2CC "DOC0EXPD7347,"
hexmask.long.word 0x2CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D0 "DOC0EXPD7348,"
hexmask.long.word 0x2D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D4 "DOC0EXPD7349,"
hexmask.long.word 0x2D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2D8 "DOC0EXPD7350,"
hexmask.long.word 0x2D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2DC "DOC0EXPD7351,"
hexmask.long.word 0x2DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E0 "DOC0EXPD7352,"
hexmask.long.word 0x2E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E4 "DOC0EXPD7353,"
hexmask.long.word 0x2E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2E8 "DOC0EXPD7354,"
hexmask.long.word 0x2E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2EC "DOC0EXPD7355,"
hexmask.long.word 0x2EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F0 "DOC0EXPD7356,"
hexmask.long.word 0x2F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F4 "DOC0EXPD7357,"
hexmask.long.word 0x2F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2F8 "DOC0EXPD7358,"
hexmask.long.word 0x2F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x2FC "DOC0EXPD7359,"
hexmask.long.word 0x2FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x2FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x2FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x2FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x2FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x2FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x2FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x2FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x2FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x300 "DOC0EXPD7360,"
hexmask.long.word 0x300 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x300 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x300 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x300 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x300 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x300 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x300 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x300 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x300 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x304 "DOC0EXPD7361,"
hexmask.long.word 0x304 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x304 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x304 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x304 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x304 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x304 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x304 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x304 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x304 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x308 "DOC0EXPD7362,"
hexmask.long.word 0x308 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x308 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x308 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x308 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x308 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x308 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x308 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x308 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x308 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x30C "DOC0EXPD7363,"
hexmask.long.word 0x30C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x30C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x30C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x30C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x30C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x30C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x30C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x30C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x30C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x310 "DOC0EXPD7364,"
hexmask.long.word 0x310 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x310 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x310 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x310 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x310 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x310 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x310 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x310 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x310 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x314 "DOC0EXPD7365,"
hexmask.long.word 0x314 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x314 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x314 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x314 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x314 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x314 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x314 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x314 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x314 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x318 "DOC0EXPD7366,"
hexmask.long.word 0x318 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x318 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x318 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x318 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x318 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x318 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x318 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x318 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x318 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x31C "DOC0EXPD7367,"
hexmask.long.word 0x31C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x31C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x31C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x31C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x31C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x31C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x31C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x31C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x31C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x320 "DOC0EXPD7368,"
hexmask.long.word 0x320 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x320 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x320 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x320 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x320 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x320 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x320 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x320 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x320 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x324 "DOC0EXPD7369,"
hexmask.long.word 0x324 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x324 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x324 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x324 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x324 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x324 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x324 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x324 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x324 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x328 "DOC0EXPD7370,"
hexmask.long.word 0x328 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x328 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x328 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x328 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x328 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x328 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x328 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x328 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x328 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x32C "DOC0EXPD7371,"
hexmask.long.word 0x32C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x32C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x32C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x32C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x32C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x32C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x32C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x32C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x32C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x330 "DOC0EXPD7372,"
hexmask.long.word 0x330 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x330 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x330 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x330 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x330 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x330 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x330 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x330 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x330 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x334 "DOC0EXPD7373,"
hexmask.long.word 0x334 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x334 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x334 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x334 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x334 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x334 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x334 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x334 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x334 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x338 "DOC0EXPD7374,"
hexmask.long.word 0x338 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x338 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x338 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x338 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x338 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x338 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x338 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x338 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x338 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x33C "DOC0EXPD7375,"
hexmask.long.word 0x33C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x33C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x33C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x33C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x33C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x33C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x33C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x33C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x33C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x340 "DOC0EXPD7376,"
hexmask.long.word 0x340 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x340 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x340 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x340 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x340 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x340 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x340 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x340 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x340 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x344 "DOC0EXPD7377,"
hexmask.long.word 0x344 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x344 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x344 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x344 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x344 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x344 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x344 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x344 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x344 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x348 "DOC0EXPD7378,"
hexmask.long.word 0x348 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x348 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x348 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x348 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x348 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x348 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x348 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x348 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x348 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x34C "DOC0EXPD7379,"
hexmask.long.word 0x34C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x34C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x34C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x34C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x34C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x34C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x34C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x34C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x34C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x350 "DOC0EXPD7380,"
hexmask.long.word 0x350 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x350 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x350 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x350 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x350 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x350 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x350 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x350 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x350 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x354 "DOC0EXPD7381,"
hexmask.long.word 0x354 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x354 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x354 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x354 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x354 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x354 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x354 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x354 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x354 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x358 "DOC0EXPD7382,"
hexmask.long.word 0x358 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x358 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x358 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x358 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x358 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x358 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x358 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x358 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x358 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x35C "DOC0EXPD7383,"
hexmask.long.word 0x35C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x35C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x35C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x35C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x35C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x35C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x35C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x35C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x35C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x360 "DOC0EXPD7384,"
hexmask.long.word 0x360 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x360 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x360 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x360 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x360 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x360 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x360 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x360 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x360 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x364 "DOC0EXPD7385,"
hexmask.long.word 0x364 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x364 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x364 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x364 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x364 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x364 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x364 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x364 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x364 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x368 "DOC0EXPD7386,"
hexmask.long.word 0x368 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x368 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x368 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x368 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x368 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x368 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x368 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x368 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x368 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x36C "DOC0EXPD7387,"
hexmask.long.word 0x36C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x36C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x36C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x36C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x36C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x36C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x36C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x36C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x36C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x370 "DOC0EXPD7388,"
hexmask.long.word 0x370 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x370 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x370 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x370 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x370 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x370 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x370 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x370 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x370 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x374 "DOC0EXPD7389,"
hexmask.long.word 0x374 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x374 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x374 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x374 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x374 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x374 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x374 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x374 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x374 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x378 "DOC0EXPD7390,"
hexmask.long.word 0x378 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x378 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x378 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x378 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x378 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x378 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x378 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x378 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x378 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x37C "DOC0EXPD7391,"
hexmask.long.word 0x37C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x37C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x37C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x37C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x37C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x37C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x37C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x37C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x37C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x380 "DOC0EXPD7392,"
hexmask.long.word 0x380 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x380 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x380 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x380 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x380 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x380 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x380 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x380 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x380 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x384 "DOC0EXPD7393,"
hexmask.long.word 0x384 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x384 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x384 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x384 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x384 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x384 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x384 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x384 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x384 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x388 "DOC0EXPD7394,"
hexmask.long.word 0x388 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x388 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x388 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x388 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x388 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x388 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x388 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x388 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x388 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x38C "DOC0EXPD7395,"
hexmask.long.word 0x38C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x38C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x38C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x38C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x38C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x38C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x38C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x38C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x38C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x390 "DOC0EXPD7396,"
hexmask.long.word 0x390 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x390 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x390 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x390 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x390 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x390 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x390 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x390 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x390 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x394 "DOC0EXPD7397,"
hexmask.long.word 0x394 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x394 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x394 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x394 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x394 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x394 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x394 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x394 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x394 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x398 "DOC0EXPD7398,"
hexmask.long.word 0x398 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x398 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x398 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x398 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x398 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x398 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x398 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x398 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x398 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x39C "DOC0EXPD7399,"
hexmask.long.word 0x39C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x39C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x39C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x39C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x39C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x39C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x39C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x39C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x39C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A0 "DOC0EXPD7400,"
hexmask.long.word 0x3A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A4 "DOC0EXPD7401,"
hexmask.long.word 0x3A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3A8 "DOC0EXPD7402,"
hexmask.long.word 0x3A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3AC "DOC0EXPD7403,"
hexmask.long.word 0x3AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B0 "DOC0EXPD7404,"
hexmask.long.word 0x3B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B4 "DOC0EXPD7405,"
hexmask.long.word 0x3B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3B8 "DOC0EXPD7406,"
hexmask.long.word 0x3B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3BC "DOC0EXPD7407,"
hexmask.long.word 0x3BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C0 "DOC0EXPD7408,"
hexmask.long.word 0x3C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C4 "DOC0EXPD7409,"
hexmask.long.word 0x3C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3C8 "DOC0EXPD7410,"
hexmask.long.word 0x3C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3CC "DOC0EXPD7411,"
hexmask.long.word 0x3CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D0 "DOC0EXPD7412,"
hexmask.long.word 0x3D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D4 "DOC0EXPD7413,"
hexmask.long.word 0x3D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3D8 "DOC0EXPD7414,"
hexmask.long.word 0x3D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3DC "DOC0EXPD7415,"
hexmask.long.word 0x3DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E0 "DOC0EXPD7416,"
hexmask.long.word 0x3E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E4 "DOC0EXPD7417,"
hexmask.long.word 0x3E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3E8 "DOC0EXPD7418,"
hexmask.long.word 0x3E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3EC "DOC0EXPD7419,"
hexmask.long.word 0x3EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F0 "DOC0EXPD7420,"
hexmask.long.word 0x3F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F4 "DOC0EXPD7421,"
hexmask.long.word 0x3F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3F8 "DOC0EXPD7422,"
hexmask.long.word 0x3F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x3FC "DOC0EXPD7423,"
hexmask.long.word 0x3FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x3FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x3FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x3FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x3FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x3FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x3FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x3FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x3FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x400 "DOC0EXPD7424,"
hexmask.long.word 0x400 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x400 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x400 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x400 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x400 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x400 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x400 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x400 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x400 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x404 "DOC0EXPD7425,"
hexmask.long.word 0x404 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x404 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x404 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x404 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x404 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x404 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x404 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x404 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x404 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x408 "DOC0EXPD7426,"
hexmask.long.word 0x408 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x408 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x408 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x408 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x408 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x408 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x408 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x408 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x408 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x40C "DOC0EXPD7427,"
hexmask.long.word 0x40C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x40C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x40C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x40C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x40C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x40C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x40C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x40C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x40C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x410 "DOC0EXPD7428,"
hexmask.long.word 0x410 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x410 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x410 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x410 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x410 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x410 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x410 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x410 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x410 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x414 "DOC0EXPD7429,"
hexmask.long.word 0x414 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x414 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x414 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x414 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x414 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x414 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x414 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x414 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x414 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x418 "DOC0EXPD7430,"
hexmask.long.word 0x418 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x418 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x418 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x418 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x418 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x418 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x418 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x418 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x418 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x41C "DOC0EXPD7431,"
hexmask.long.word 0x41C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x41C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x41C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x41C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x41C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x41C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x41C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x41C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x41C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x420 "DOC0EXPD7432,"
hexmask.long.word 0x420 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x420 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x420 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x420 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x420 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x420 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x420 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x420 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x420 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x424 "DOC0EXPD7433,"
hexmask.long.word 0x424 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x424 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x424 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x424 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x424 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x424 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x424 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x424 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x424 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x428 "DOC0EXPD7434,"
hexmask.long.word 0x428 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x428 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x428 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x428 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x428 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x428 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x428 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x428 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x428 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x42C "DOC0EXPD7435,"
hexmask.long.word 0x42C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x42C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x42C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x42C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x42C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x42C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x42C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x42C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x42C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x430 "DOC0EXPD7436,"
hexmask.long.word 0x430 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x430 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x430 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x430 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x430 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x430 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x430 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x430 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x430 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x434 "DOC0EXPD7437,"
hexmask.long.word 0x434 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x434 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x434 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x434 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x434 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x434 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x434 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x434 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x434 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x438 "DOC0EXPD7438,"
hexmask.long.word 0x438 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x438 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x438 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x438 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x438 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x438 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x438 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x438 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x438 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x43C "DOC0EXPD7439,"
hexmask.long.word 0x43C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x43C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x43C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x43C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x43C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x43C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x43C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x43C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x43C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x440 "DOC0EXPD7440,"
hexmask.long.word 0x440 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x440 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x440 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x440 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x440 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x440 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x440 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x440 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x440 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x444 "DOC0EXPD7441,"
hexmask.long.word 0x444 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x444 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x444 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x444 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x444 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x444 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x444 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x444 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x444 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x448 "DOC0EXPD7442,"
hexmask.long.word 0x448 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x448 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x448 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x448 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x448 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x448 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x448 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x448 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x448 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x44C "DOC0EXPD7443,"
hexmask.long.word 0x44C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x44C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x44C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x44C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x44C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x44C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x44C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x44C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x44C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x450 "DOC0EXPD7444,"
hexmask.long.word 0x450 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x450 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x450 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x450 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x450 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x450 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x450 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x450 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x450 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x454 "DOC0EXPD7445,"
hexmask.long.word 0x454 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x454 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x454 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x454 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x454 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x454 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x454 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x454 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x454 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x458 "DOC0EXPD7446,"
hexmask.long.word 0x458 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x458 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x458 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x458 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x458 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x458 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x458 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x458 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x458 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x45C "DOC0EXPD7447,"
hexmask.long.word 0x45C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x45C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x45C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x45C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x45C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x45C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x45C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x45C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x45C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x460 "DOC0EXPD7448,"
hexmask.long.word 0x460 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x460 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x460 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x460 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x460 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x460 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x460 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x460 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x460 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x464 "DOC0EXPD7449,"
hexmask.long.word 0x464 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x464 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x464 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x464 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x464 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x464 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x464 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x464 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x464 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x468 "DOC0EXPD7450,"
hexmask.long.word 0x468 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x468 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x468 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x468 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x468 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x468 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x468 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x468 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x468 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x46C "DOC0EXPD7451,"
hexmask.long.word 0x46C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x46C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x46C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x46C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x46C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x46C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x46C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x46C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x46C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x470 "DOC0EXPD7452,"
hexmask.long.word 0x470 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x470 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x470 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x470 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x470 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x470 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x470 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x470 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x470 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x474 "DOC0EXPD7453,"
hexmask.long.word 0x474 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x474 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x474 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x474 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x474 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x474 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x474 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x474 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x474 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x478 "DOC0EXPD7454,"
hexmask.long.word 0x478 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x478 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x478 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x478 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x478 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x478 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x478 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x478 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x478 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x47C "DOC0EXPD7455,"
hexmask.long.word 0x47C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x47C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x47C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x47C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x47C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x47C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x47C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x47C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x47C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x480 "DOC0EXPD7456,"
hexmask.long.word 0x480 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x480 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x480 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x480 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x480 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x480 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x480 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x480 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x480 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x484 "DOC0EXPD7457,"
hexmask.long.word 0x484 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x484 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x484 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x484 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x484 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x484 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x484 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x484 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x484 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x488 "DOC0EXPD7458,"
hexmask.long.word 0x488 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x488 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x488 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x488 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x488 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x488 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x488 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x488 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x488 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x48C "DOC0EXPD7459,"
hexmask.long.word 0x48C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x48C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x48C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x48C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x48C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x48C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x48C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x48C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x48C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x490 "DOC0EXPD7460,"
hexmask.long.word 0x490 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x490 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x490 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x490 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x490 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x490 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x490 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x490 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x490 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x494 "DOC0EXPD7461,"
hexmask.long.word 0x494 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x494 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x494 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x494 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x494 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x494 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x494 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x494 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x494 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x498 "DOC0EXPD7462,"
hexmask.long.word 0x498 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x498 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x498 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x498 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x498 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x498 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x498 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x498 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x498 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x49C "DOC0EXPD7463,"
hexmask.long.word 0x49C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x49C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x49C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x49C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x49C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x49C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x49C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x49C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x49C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A0 "DOC0EXPD7464,"
hexmask.long.word 0x4A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A4 "DOC0EXPD7465,"
hexmask.long.word 0x4A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4A8 "DOC0EXPD7466,"
hexmask.long.word 0x4A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4AC "DOC0EXPD7467,"
hexmask.long.word 0x4AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B0 "DOC0EXPD7468,"
hexmask.long.word 0x4B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B4 "DOC0EXPD7469,"
hexmask.long.word 0x4B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4B8 "DOC0EXPD7470,"
hexmask.long.word 0x4B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4BC "DOC0EXPD7471,"
hexmask.long.word 0x4BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C0 "DOC0EXPD7472,"
hexmask.long.word 0x4C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C4 "DOC0EXPD7473,"
hexmask.long.word 0x4C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4C8 "DOC0EXPD7474,"
hexmask.long.word 0x4C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4CC "DOC0EXPD7475,"
hexmask.long.word 0x4CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D0 "DOC0EXPD7476,"
hexmask.long.word 0x4D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D4 "DOC0EXPD7477,"
hexmask.long.word 0x4D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4D8 "DOC0EXPD7478,"
hexmask.long.word 0x4D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4DC "DOC0EXPD7479,"
hexmask.long.word 0x4DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E0 "DOC0EXPD7480,"
hexmask.long.word 0x4E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E4 "DOC0EXPD7481,"
hexmask.long.word 0x4E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4E8 "DOC0EXPD7482,"
hexmask.long.word 0x4E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4EC "DOC0EXPD7483,"
hexmask.long.word 0x4EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F0 "DOC0EXPD7484,"
hexmask.long.word 0x4F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F4 "DOC0EXPD7485,"
hexmask.long.word 0x4F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4F8 "DOC0EXPD7486,"
hexmask.long.word 0x4F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x4FC "DOC0EXPD7487,"
hexmask.long.word 0x4FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x4FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x4FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x4FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x4FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x4FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x4FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x4FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x500 "DOC0EXPD7488,"
hexmask.long.word 0x500 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x500 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x500 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x500 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x500 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x500 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x500 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x500 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x500 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x504 "DOC0EXPD7489,"
hexmask.long.word 0x504 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x504 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x504 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x504 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x504 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x504 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x504 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x504 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x504 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x508 "DOC0EXPD7490,"
hexmask.long.word 0x508 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x508 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x508 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x508 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x508 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x508 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x508 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x508 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x508 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x50C "DOC0EXPD7491,"
hexmask.long.word 0x50C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x50C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x50C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x50C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x50C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x50C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x50C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x50C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x50C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x510 "DOC0EXPD7492,"
hexmask.long.word 0x510 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x510 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x510 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x510 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x510 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x510 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x510 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x510 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x510 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x514 "DOC0EXPD7493,"
hexmask.long.word 0x514 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x514 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x514 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x514 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x514 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x514 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x514 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x514 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x514 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x518 "DOC0EXPD7494,"
hexmask.long.word 0x518 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x518 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x518 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x518 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x518 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x518 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x518 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x518 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x518 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x51C "DOC0EXPD7495,"
hexmask.long.word 0x51C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x51C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x51C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x51C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x51C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x51C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x51C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x51C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x51C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x520 "DOC0EXPD7496,"
hexmask.long.word 0x520 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x520 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x520 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x520 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x520 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x520 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x520 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x520 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x520 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x524 "DOC0EXPD7497,"
hexmask.long.word 0x524 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x524 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x524 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x524 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x524 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x524 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x524 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x524 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x524 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x528 "DOC0EXPD7498,"
hexmask.long.word 0x528 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x528 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x528 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x528 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x528 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x528 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x528 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x528 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x528 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x52C "DOC0EXPD7499,"
hexmask.long.word 0x52C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x52C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x52C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x52C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x52C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x52C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x52C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x52C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x52C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x530 "DOC0EXPD7500,"
hexmask.long.word 0x530 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x530 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x530 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x530 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x530 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x530 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x530 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x530 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x530 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x534 "DOC0EXPD7501,"
hexmask.long.word 0x534 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x534 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x534 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x534 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x534 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x534 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x534 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x534 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x534 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x538 "DOC0EXPD7502,"
hexmask.long.word 0x538 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x538 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x538 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x538 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x538 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x538 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x538 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x538 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x538 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x53C "DOC0EXPD7503,"
hexmask.long.word 0x53C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x53C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x53C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x53C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x53C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x53C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x53C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x53C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x53C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x540 "DOC0EXPD7504,"
hexmask.long.word 0x540 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x540 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x540 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x540 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x540 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x540 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x540 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x540 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x540 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x544 "DOC0EXPD7505,"
hexmask.long.word 0x544 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x544 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x544 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x544 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x544 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x544 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x544 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x544 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x544 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x548 "DOC0EXPD7506,"
hexmask.long.word 0x548 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x548 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x548 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x548 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x548 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x548 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x548 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x548 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x548 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x54C "DOC0EXPD7507,"
hexmask.long.word 0x54C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x54C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x54C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x54C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x54C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x54C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x54C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x54C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x54C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x550 "DOC0EXPD7508,"
hexmask.long.word 0x550 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x550 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x550 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x550 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x550 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x550 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x550 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x550 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x550 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x554 "DOC0EXPD7509,"
hexmask.long.word 0x554 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x554 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x554 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x554 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x554 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x554 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x554 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x554 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x554 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x558 "DOC0EXPD7510,"
hexmask.long.word 0x558 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x558 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x558 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x558 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x558 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x558 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x558 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x558 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x558 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x55C "DOC0EXPD7511,"
hexmask.long.word 0x55C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x55C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x55C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x55C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x55C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x55C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x55C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x55C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x55C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x560 "DOC0EXPD7512,"
hexmask.long.word 0x560 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x560 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x560 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x560 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x560 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x560 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x560 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x560 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x560 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x564 "DOC0EXPD7513,"
hexmask.long.word 0x564 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x564 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x564 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x564 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x564 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x564 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x564 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x564 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x564 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x568 "DOC0EXPD7514,"
hexmask.long.word 0x568 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x568 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x568 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x568 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x568 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x568 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x568 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x568 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x568 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x56C "DOC0EXPD7515,"
hexmask.long.word 0x56C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x56C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x56C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x56C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x56C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x56C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x56C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x56C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x56C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x570 "DOC0EXPD7516,"
hexmask.long.word 0x570 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x570 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x570 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x570 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x570 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x570 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x570 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x570 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x570 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x574 "DOC0EXPD7517,"
hexmask.long.word 0x574 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x574 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x574 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x574 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x574 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x574 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x574 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x574 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x574 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x578 "DOC0EXPD7518,"
hexmask.long.word 0x578 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x578 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x578 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x578 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x578 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x578 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x578 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x578 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x578 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x57C "DOC0EXPD7519,"
hexmask.long.word 0x57C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x57C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x57C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x57C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x57C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x57C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x57C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x57C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x57C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x580 "DOC0EXPD7520,"
hexmask.long.word 0x580 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x580 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x580 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x580 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x580 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x580 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x580 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x580 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x580 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x584 "DOC0EXPD7521,"
hexmask.long.word 0x584 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x584 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x584 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x584 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x584 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x584 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x584 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x584 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x584 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x588 "DOC0EXPD7522,"
hexmask.long.word 0x588 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x588 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x588 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x588 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x588 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x588 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x588 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x588 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x588 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x58C "DOC0EXPD7523,"
hexmask.long.word 0x58C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x58C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x58C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x58C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x58C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x58C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x58C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x58C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x58C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x590 "DOC0EXPD7524,"
hexmask.long.word 0x590 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x590 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x590 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x590 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x590 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x590 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x590 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x590 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x590 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x594 "DOC0EXPD7525,"
hexmask.long.word 0x594 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x594 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x594 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x594 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x594 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x594 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x594 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x594 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x594 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x598 "DOC0EXPD7526,"
hexmask.long.word 0x598 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x598 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x598 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x598 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x598 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x598 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x598 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x598 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x598 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x59C "DOC0EXPD7527,"
hexmask.long.word 0x59C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x59C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x59C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x59C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x59C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x59C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x59C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x59C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x59C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A0 "DOC0EXPD7528,"
hexmask.long.word 0x5A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A4 "DOC0EXPD7529,"
hexmask.long.word 0x5A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5A8 "DOC0EXPD7530,"
hexmask.long.word 0x5A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5AC "DOC0EXPD7531,"
hexmask.long.word 0x5AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B0 "DOC0EXPD7532,"
hexmask.long.word 0x5B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B4 "DOC0EXPD7533,"
hexmask.long.word 0x5B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5B8 "DOC0EXPD7534,"
hexmask.long.word 0x5B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5BC "DOC0EXPD7535,"
hexmask.long.word 0x5BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C0 "DOC0EXPD7536,"
hexmask.long.word 0x5C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C4 "DOC0EXPD7537,"
hexmask.long.word 0x5C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5C8 "DOC0EXPD7538,"
hexmask.long.word 0x5C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5CC "DOC0EXPD7539,"
hexmask.long.word 0x5CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D0 "DOC0EXPD7540,"
hexmask.long.word 0x5D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D4 "DOC0EXPD7541,"
hexmask.long.word 0x5D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5D8 "DOC0EXPD7542,"
hexmask.long.word 0x5D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5DC "DOC0EXPD7543,"
hexmask.long.word 0x5DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E0 "DOC0EXPD7544,"
hexmask.long.word 0x5E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E4 "DOC0EXPD7545,"
hexmask.long.word 0x5E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5E8 "DOC0EXPD7546,"
hexmask.long.word 0x5E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5EC "DOC0EXPD7547,"
hexmask.long.word 0x5EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F0 "DOC0EXPD7548,"
hexmask.long.word 0x5F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F4 "DOC0EXPD7549,"
hexmask.long.word 0x5F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5F8 "DOC0EXPD7550,"
hexmask.long.word 0x5F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x5FC "DOC0EXPD7551,"
hexmask.long.word 0x5FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x5FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x5FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x5FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x5FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x5FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x5FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x5FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x5FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x600 "DOC0EXPD7552,"
hexmask.long.word 0x600 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x600 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x600 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x600 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x600 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x600 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x600 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x600 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x600 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x604 "DOC0EXPD7553,"
hexmask.long.word 0x604 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x604 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x604 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x604 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x604 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x604 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x604 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x604 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x604 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x608 "DOC0EXPD7554,"
hexmask.long.word 0x608 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x608 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x608 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x608 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x608 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x608 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x608 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x608 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x608 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x60C "DOC0EXPD7555,"
hexmask.long.word 0x60C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x60C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x60C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x60C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x60C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x60C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x60C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x60C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x60C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x610 "DOC0EXPD7556,"
hexmask.long.word 0x610 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x610 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x610 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x610 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x610 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x610 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x610 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x610 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x610 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x614 "DOC0EXPD7557,"
hexmask.long.word 0x614 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x614 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x614 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x614 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x614 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x614 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x614 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x614 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x614 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x618 "DOC0EXPD7558,"
hexmask.long.word 0x618 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x618 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x618 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x618 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x618 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x618 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x618 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x618 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x618 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x61C "DOC0EXPD7559,"
hexmask.long.word 0x61C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x61C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x61C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x61C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x61C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x61C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x61C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x61C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x61C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x620 "DOC0EXPD7560,"
hexmask.long.word 0x620 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x620 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x620 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x620 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x620 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x620 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x620 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x620 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x620 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x624 "DOC0EXPD7561,"
hexmask.long.word 0x624 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x624 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x624 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x624 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x624 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x624 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x624 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x624 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x624 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x628 "DOC0EXPD7562,"
hexmask.long.word 0x628 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x628 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x628 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x628 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x628 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x628 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x628 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x628 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x628 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x62C "DOC0EXPD7563,"
hexmask.long.word 0x62C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x62C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x62C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x62C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x62C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x62C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x62C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x62C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x62C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x630 "DOC0EXPD7564,"
hexmask.long.word 0x630 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x630 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x630 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x630 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x630 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x630 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x630 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x630 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x630 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x634 "DOC0EXPD7565,"
hexmask.long.word 0x634 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x634 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x634 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x634 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x634 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x634 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x634 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x634 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x634 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x638 "DOC0EXPD7566,"
hexmask.long.word 0x638 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x638 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x638 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x638 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x638 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x638 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x638 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x638 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x638 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x63C "DOC0EXPD7567,"
hexmask.long.word 0x63C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x63C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x63C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x63C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x63C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x63C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x63C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x63C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x63C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x640 "DOC0EXPD7568,"
hexmask.long.word 0x640 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x640 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x640 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x640 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x640 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x640 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x640 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x640 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x640 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x644 "DOC0EXPD7569,"
hexmask.long.word 0x644 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x644 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x644 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x644 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x644 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x644 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x644 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x644 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x644 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x648 "DOC0EXPD7570,"
hexmask.long.word 0x648 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x648 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x648 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x648 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x648 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x648 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x648 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x648 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x648 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x64C "DOC0EXPD7571,"
hexmask.long.word 0x64C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x64C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x64C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x64C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x64C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x64C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x64C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x64C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x64C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x650 "DOC0EXPD7572,"
hexmask.long.word 0x650 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x650 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x650 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x650 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x650 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x650 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x650 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x650 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x650 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x654 "DOC0EXPD7573,"
hexmask.long.word 0x654 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x654 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x654 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x654 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x654 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x654 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x654 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x654 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x654 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x658 "DOC0EXPD7574,"
hexmask.long.word 0x658 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x658 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x658 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x658 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x658 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x658 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x658 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x658 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x658 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x65C "DOC0EXPD7575,"
hexmask.long.word 0x65C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x65C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x65C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x65C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x65C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x65C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x65C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x65C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x65C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x660 "DOC0EXPD7576,"
hexmask.long.word 0x660 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x660 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x660 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x660 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x660 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x660 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x660 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x660 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x660 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x664 "DOC0EXPD7577,"
hexmask.long.word 0x664 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x664 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x664 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x664 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x664 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x664 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x664 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x664 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x664 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x668 "DOC0EXPD7578,"
hexmask.long.word 0x668 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x668 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x668 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x668 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x668 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x668 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x668 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x668 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x668 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x66C "DOC0EXPD7579,"
hexmask.long.word 0x66C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x66C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x66C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x66C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x66C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x66C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x66C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x66C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x66C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x670 "DOC0EXPD7580,"
hexmask.long.word 0x670 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x670 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x670 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x670 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x670 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x670 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x670 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x670 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x670 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x674 "DOC0EXPD7581,"
hexmask.long.word 0x674 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x674 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x674 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x674 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x674 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x674 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x674 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x674 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x674 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x678 "DOC0EXPD7582,"
hexmask.long.word 0x678 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x678 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x678 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x678 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x678 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x678 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x678 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x678 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x678 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x67C "DOC0EXPD7583,"
hexmask.long.word 0x67C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x67C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x67C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x67C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x67C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x67C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x67C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x67C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x67C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x680 "DOC0EXPD7584,"
hexmask.long.word 0x680 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x680 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x680 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x680 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x680 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x680 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x680 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x680 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x680 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x684 "DOC0EXPD7585,"
hexmask.long.word 0x684 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x684 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x684 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x684 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x684 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x684 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x684 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x684 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x684 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x688 "DOC0EXPD7586,"
hexmask.long.word 0x688 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x688 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x688 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x688 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x688 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x688 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x688 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x688 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x688 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x68C "DOC0EXPD7587,"
hexmask.long.word 0x68C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x68C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x68C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x68C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x68C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x68C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x68C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x68C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x68C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x690 "DOC0EXPD7588,"
hexmask.long.word 0x690 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x690 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x690 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x690 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x690 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x690 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x690 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x690 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x690 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x694 "DOC0EXPD7589,"
hexmask.long.word 0x694 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x694 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x694 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x694 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x694 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x694 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x694 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x694 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x694 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x698 "DOC0EXPD7590,"
hexmask.long.word 0x698 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x698 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x698 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x698 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x698 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x698 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x698 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x698 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x698 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x69C "DOC0EXPD7591,"
hexmask.long.word 0x69C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x69C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x69C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x69C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x69C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x69C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x69C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x69C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x69C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A0 "DOC0EXPD7592,"
hexmask.long.word 0x6A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A4 "DOC0EXPD7593,"
hexmask.long.word 0x6A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6A8 "DOC0EXPD7594,"
hexmask.long.word 0x6A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6AC "DOC0EXPD7595,"
hexmask.long.word 0x6AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B0 "DOC0EXPD7596,"
hexmask.long.word 0x6B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B4 "DOC0EXPD7597,"
hexmask.long.word 0x6B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6B8 "DOC0EXPD7598,"
hexmask.long.word 0x6B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6BC "DOC0EXPD7599,"
hexmask.long.word 0x6BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C0 "DOC0EXPD7600,"
hexmask.long.word 0x6C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C4 "DOC0EXPD7601,"
hexmask.long.word 0x6C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6C8 "DOC0EXPD7602,"
hexmask.long.word 0x6C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6CC "DOC0EXPD7603,"
hexmask.long.word 0x6CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D0 "DOC0EXPD7604,"
hexmask.long.word 0x6D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D4 "DOC0EXPD7605,"
hexmask.long.word 0x6D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6D8 "DOC0EXPD7606,"
hexmask.long.word 0x6D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6DC "DOC0EXPD7607,"
hexmask.long.word 0x6DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E0 "DOC0EXPD7608,"
hexmask.long.word 0x6E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E4 "DOC0EXPD7609,"
hexmask.long.word 0x6E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6E8 "DOC0EXPD7610,"
hexmask.long.word 0x6E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6EC "DOC0EXPD7611,"
hexmask.long.word 0x6EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F0 "DOC0EXPD7612,"
hexmask.long.word 0x6F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F4 "DOC0EXPD7613,"
hexmask.long.word 0x6F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6F8 "DOC0EXPD7614,"
hexmask.long.word 0x6F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x6FC "DOC0EXPD7615,"
hexmask.long.word 0x6FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x6FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x6FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x6FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x6FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x6FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x6FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x6FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x6FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x700 "DOC0EXPD7616,"
hexmask.long.word 0x700 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x700 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x700 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x700 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x700 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x700 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x700 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x700 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x700 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x704 "DOC0EXPD7617,"
hexmask.long.word 0x704 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x704 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x704 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x704 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x704 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x704 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x704 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x704 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x704 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x708 "DOC0EXPD7618,"
hexmask.long.word 0x708 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x708 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x708 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x708 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x708 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x708 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x708 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x708 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x708 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x70C "DOC0EXPD7619,"
hexmask.long.word 0x70C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x70C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x70C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x70C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x70C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x70C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x70C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x70C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x70C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x710 "DOC0EXPD7620,"
hexmask.long.word 0x710 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x710 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x710 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x710 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x710 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x710 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x710 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x710 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x710 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x714 "DOC0EXPD7621,"
hexmask.long.word 0x714 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x714 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x714 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x714 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x714 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x714 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x714 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x714 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x714 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x718 "DOC0EXPD7622,"
hexmask.long.word 0x718 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x718 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x718 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x718 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x718 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x718 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x718 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x718 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x718 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x71C "DOC0EXPD7623,"
hexmask.long.word 0x71C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x71C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x71C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x71C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x71C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x71C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x71C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x71C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x71C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x720 "DOC0EXPD7624,"
hexmask.long.word 0x720 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x720 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x720 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x720 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x720 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x720 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x720 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x720 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x720 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x724 "DOC0EXPD7625,"
hexmask.long.word 0x724 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x724 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x724 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x724 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x724 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x724 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x724 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x724 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x724 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x728 "DOC0EXPD7626,"
hexmask.long.word 0x728 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x728 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x728 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x728 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x728 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x728 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x728 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x728 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x728 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x72C "DOC0EXPD7627,"
hexmask.long.word 0x72C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x72C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x72C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x72C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x72C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x72C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x72C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x72C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x72C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x730 "DOC0EXPD7628,"
hexmask.long.word 0x730 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x730 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x730 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x730 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x730 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x730 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x730 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x730 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x730 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x734 "DOC0EXPD7629,"
hexmask.long.word 0x734 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x734 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x734 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x734 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x734 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x734 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x734 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x734 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x734 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x738 "DOC0EXPD7630,"
hexmask.long.word 0x738 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x738 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x738 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x738 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x738 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x738 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x738 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x738 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x738 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x73C "DOC0EXPD7631,"
hexmask.long.word 0x73C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x73C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x73C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x73C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x73C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x73C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x73C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x73C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x73C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x740 "DOC0EXPD7632,"
hexmask.long.word 0x740 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x740 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x740 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x740 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x740 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x740 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x740 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x740 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x740 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x744 "DOC0EXPD7633,"
hexmask.long.word 0x744 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x744 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x744 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x744 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x744 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x744 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x744 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x744 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x744 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x748 "DOC0EXPD7634,"
hexmask.long.word 0x748 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x748 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x748 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x748 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x748 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x748 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x748 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x748 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x748 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x74C "DOC0EXPD7635,"
hexmask.long.word 0x74C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x74C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x74C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x74C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x74C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x74C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x74C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x74C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x74C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x750 "DOC0EXPD7636,"
hexmask.long.word 0x750 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x750 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x750 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x750 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x750 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x750 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x750 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x750 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x750 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x754 "DOC0EXPD7637,"
hexmask.long.word 0x754 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x754 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x754 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x754 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x754 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x754 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x754 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x754 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x754 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x758 "DOC0EXPD7638,"
hexmask.long.word 0x758 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x758 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x758 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x758 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x758 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x758 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x758 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x758 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x758 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x75C "DOC0EXPD7639,"
hexmask.long.word 0x75C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x75C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x75C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x75C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x75C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x75C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x75C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x75C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x75C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x760 "DOC0EXPD7640,"
hexmask.long.word 0x760 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x760 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x760 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x760 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x760 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x760 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x760 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x760 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x760 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x764 "DOC0EXPD7641,"
hexmask.long.word 0x764 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x764 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x764 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x764 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x764 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x764 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x764 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x764 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x764 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x768 "DOC0EXPD7642,"
hexmask.long.word 0x768 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x768 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x768 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x768 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x768 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x768 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x768 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x768 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x768 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x76C "DOC0EXPD7643,"
hexmask.long.word 0x76C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x76C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x76C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x76C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x76C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x76C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x76C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x76C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x76C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x770 "DOC0EXPD7644,"
hexmask.long.word 0x770 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x770 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x770 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x770 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x770 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x770 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x770 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x770 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x770 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x774 "DOC0EXPD7645,"
hexmask.long.word 0x774 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x774 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x774 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x774 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x774 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x774 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x774 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x774 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x774 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x778 "DOC0EXPD7646,"
hexmask.long.word 0x778 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x778 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x778 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x778 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x778 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x778 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x778 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x778 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x778 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x77C "DOC0EXPD7647,"
hexmask.long.word 0x77C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x77C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x77C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x77C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x77C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x77C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x77C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x77C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x77C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x780 "DOC0EXPD7648,"
hexmask.long.word 0x780 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x780 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x780 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x780 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x780 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x780 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x780 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x780 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x780 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x784 "DOC0EXPD7649,"
hexmask.long.word 0x784 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x784 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x784 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x784 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x784 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x784 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x784 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x784 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x784 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x788 "DOC0EXPD7650,"
hexmask.long.word 0x788 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x788 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x788 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x788 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x788 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x788 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x788 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x788 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x788 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x78C "DOC0EXPD7651,"
hexmask.long.word 0x78C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x78C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x78C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x78C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x78C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x78C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x78C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x78C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x78C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x790 "DOC0EXPD7652,"
hexmask.long.word 0x790 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x790 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x790 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x790 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x790 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x790 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x790 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x790 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x790 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x794 "DOC0EXPD7653,"
hexmask.long.word 0x794 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x794 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x794 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x794 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x794 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x794 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x794 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x794 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x794 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x798 "DOC0EXPD7654,"
hexmask.long.word 0x798 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x798 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x798 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x798 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x798 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x798 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x798 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x798 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x798 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x79C "DOC0EXPD7655,"
hexmask.long.word 0x79C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x79C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x79C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x79C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x79C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x79C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x79C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x79C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x79C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A0 "DOC0EXPD7656,"
hexmask.long.word 0x7A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A4 "DOC0EXPD7657,"
hexmask.long.word 0x7A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7A8 "DOC0EXPD7658,"
hexmask.long.word 0x7A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7AC "DOC0EXPD7659,"
hexmask.long.word 0x7AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B0 "DOC0EXPD7660,"
hexmask.long.word 0x7B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B4 "DOC0EXPD7661,"
hexmask.long.word 0x7B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7B8 "DOC0EXPD7662,"
hexmask.long.word 0x7B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7BC "DOC0EXPD7663,"
hexmask.long.word 0x7BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C0 "DOC0EXPD7664,"
hexmask.long.word 0x7C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C4 "DOC0EXPD7665,"
hexmask.long.word 0x7C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7C8 "DOC0EXPD7666,"
hexmask.long.word 0x7C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7CC "DOC0EXPD7667,"
hexmask.long.word 0x7CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D0 "DOC0EXPD7668,"
hexmask.long.word 0x7D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D4 "DOC0EXPD7669,"
hexmask.long.word 0x7D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7D8 "DOC0EXPD7670,"
hexmask.long.word 0x7D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7DC "DOC0EXPD7671,"
hexmask.long.word 0x7DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E0 "DOC0EXPD7672,"
hexmask.long.word 0x7E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E4 "DOC0EXPD7673,"
hexmask.long.word 0x7E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7E8 "DOC0EXPD7674,"
hexmask.long.word 0x7E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7EC "DOC0EXPD7675,"
hexmask.long.word 0x7EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F0 "DOC0EXPD7676,"
hexmask.long.word 0x7F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F4 "DOC0EXPD7677,"
hexmask.long.word 0x7F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7F8 "DOC0EXPD7678,"
hexmask.long.word 0x7F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x7FC "DOC0EXPD7679,"
hexmask.long.word 0x7FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x7FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x7FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x7FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x7FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x7FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x7FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x7FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x7FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x800 "DOC0EXPD7680,"
hexmask.long.word 0x800 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x800 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x800 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x800 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x800 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x800 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x800 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x800 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x800 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x804 "DOC0EXPD7681,"
hexmask.long.word 0x804 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x804 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x804 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x804 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x804 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x804 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x804 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x804 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x804 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x808 "DOC0EXPD7682,"
hexmask.long.word 0x808 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x808 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x808 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x808 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x808 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x808 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x808 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x808 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x808 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x80C "DOC0EXPD7683,"
hexmask.long.word 0x80C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x80C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x80C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x80C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x80C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x80C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x80C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x80C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x80C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x810 "DOC0EXPD7684,"
hexmask.long.word 0x810 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x810 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x810 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x810 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x810 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x810 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x810 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x810 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x810 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x814 "DOC0EXPD7685,"
hexmask.long.word 0x814 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x814 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x814 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x814 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x814 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x814 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x814 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x814 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x814 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x818 "DOC0EXPD7686,"
hexmask.long.word 0x818 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x818 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x818 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x818 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x818 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x818 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x818 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x818 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x818 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x81C "DOC0EXPD7687,"
hexmask.long.word 0x81C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x81C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x81C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x81C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x81C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x81C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x81C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x81C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x81C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x820 "DOC0EXPD7688,"
hexmask.long.word 0x820 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x820 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x820 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x820 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x820 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x820 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x820 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x820 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x820 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x824 "DOC0EXPD7689,"
hexmask.long.word 0x824 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x824 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x824 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x824 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x824 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x824 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x824 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x824 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x824 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x828 "DOC0EXPD7690,"
hexmask.long.word 0x828 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x828 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x828 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x828 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x828 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x828 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x828 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x828 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x828 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x82C "DOC0EXPD7691,"
hexmask.long.word 0x82C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x82C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x82C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x82C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x82C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x82C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x82C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x82C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x82C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x830 "DOC0EXPD7692,"
hexmask.long.word 0x830 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x830 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x830 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x830 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x830 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x830 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x830 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x830 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x830 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x834 "DOC0EXPD7693,"
hexmask.long.word 0x834 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x834 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x834 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x834 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x834 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x834 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x834 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x834 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x834 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x838 "DOC0EXPD7694,"
hexmask.long.word 0x838 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x838 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x838 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x838 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x838 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x838 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x838 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x838 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x838 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x83C "DOC0EXPD7695,"
hexmask.long.word 0x83C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x83C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x83C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x83C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x83C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x83C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x83C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x83C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x83C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x840 "DOC0EXPD7696,"
hexmask.long.word 0x840 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x840 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x840 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x840 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x840 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x840 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x840 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x840 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x840 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x844 "DOC0EXPD7697,"
hexmask.long.word 0x844 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x844 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x844 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x844 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x844 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x844 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x844 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x844 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x844 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x848 "DOC0EXPD7698,"
hexmask.long.word 0x848 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x848 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x848 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x848 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x848 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x848 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x848 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x848 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x848 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x84C "DOC0EXPD7699,"
hexmask.long.word 0x84C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x84C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x84C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x84C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x84C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x84C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x84C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x84C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x84C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x850 "DOC0EXPD7700,"
hexmask.long.word 0x850 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x850 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x850 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x850 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x850 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x850 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x850 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x850 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x850 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x854 "DOC0EXPD7701,"
hexmask.long.word 0x854 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x854 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x854 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x854 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x854 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x854 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x854 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x854 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x854 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x858 "DOC0EXPD7702,"
hexmask.long.word 0x858 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x858 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x858 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x858 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x858 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x858 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x858 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x858 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x858 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x85C "DOC0EXPD7703,"
hexmask.long.word 0x85C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x85C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x85C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x85C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x85C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x85C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x85C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x85C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x85C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x860 "DOC0EXPD7704,"
hexmask.long.word 0x860 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x860 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x860 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x860 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x860 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x860 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x860 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x860 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x860 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x864 "DOC0EXPD7705,"
hexmask.long.word 0x864 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x864 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x864 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x864 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x864 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x864 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x864 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x864 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x864 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x868 "DOC0EXPD7706,"
hexmask.long.word 0x868 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x868 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x868 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x868 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x868 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x868 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x868 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x868 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x868 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x86C "DOC0EXPD7707,"
hexmask.long.word 0x86C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x86C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x86C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x86C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x86C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x86C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x86C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x86C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x86C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x870 "DOC0EXPD7708,"
hexmask.long.word 0x870 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x870 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x870 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x870 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x870 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x870 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x870 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x870 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x870 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x874 "DOC0EXPD7709,"
hexmask.long.word 0x874 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x874 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x874 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x874 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x874 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x874 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x874 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x874 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x874 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x878 "DOC0EXPD7710,"
hexmask.long.word 0x878 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x878 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x878 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x878 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x878 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x878 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x878 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x878 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x878 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x87C "DOC0EXPD7711,"
hexmask.long.word 0x87C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x87C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x87C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x87C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x87C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x87C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x87C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x87C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x87C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x880 "DOC0EXPD7712,"
hexmask.long.word 0x880 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x880 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x880 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x880 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x880 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x880 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x880 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x880 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x880 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x884 "DOC0EXPD7713,"
hexmask.long.word 0x884 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x884 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x884 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x884 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x884 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x884 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x884 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x884 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x884 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x888 "DOC0EXPD7714,"
hexmask.long.word 0x888 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x888 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x888 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x888 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x888 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x888 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x888 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x888 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x888 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x88C "DOC0EXPD7715,"
hexmask.long.word 0x88C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x88C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x88C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x88C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x88C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x88C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x88C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x88C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x88C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x890 "DOC0EXPD7716,"
hexmask.long.word 0x890 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x890 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x890 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x890 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x890 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x890 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x890 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x890 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x890 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x894 "DOC0EXPD7717,"
hexmask.long.word 0x894 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x894 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x894 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x894 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x894 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x894 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x894 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x894 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x894 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x898 "DOC0EXPD7718,"
hexmask.long.word 0x898 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x898 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x898 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x898 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x898 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x898 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x898 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x898 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x898 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x89C "DOC0EXPD7719,"
hexmask.long.word 0x89C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x89C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x89C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x89C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x89C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x89C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x89C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x89C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x89C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A0 "DOC0EXPD7720,"
hexmask.long.word 0x8A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A4 "DOC0EXPD7721,"
hexmask.long.word 0x8A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8A8 "DOC0EXPD7722,"
hexmask.long.word 0x8A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8AC "DOC0EXPD7723,"
hexmask.long.word 0x8AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B0 "DOC0EXPD7724,"
hexmask.long.word 0x8B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B4 "DOC0EXPD7725,"
hexmask.long.word 0x8B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8B8 "DOC0EXPD7726,"
hexmask.long.word 0x8B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8BC "DOC0EXPD7727,"
hexmask.long.word 0x8BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C0 "DOC0EXPD7728,"
hexmask.long.word 0x8C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C4 "DOC0EXPD7729,"
hexmask.long.word 0x8C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8C8 "DOC0EXPD7730,"
hexmask.long.word 0x8C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8CC "DOC0EXPD7731,"
hexmask.long.word 0x8CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D0 "DOC0EXPD7732,"
hexmask.long.word 0x8D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D4 "DOC0EXPD7733,"
hexmask.long.word 0x8D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8D8 "DOC0EXPD7734,"
hexmask.long.word 0x8D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8DC "DOC0EXPD7735,"
hexmask.long.word 0x8DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E0 "DOC0EXPD7736,"
hexmask.long.word 0x8E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E4 "DOC0EXPD7737,"
hexmask.long.word 0x8E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8E8 "DOC0EXPD7738,"
hexmask.long.word 0x8E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8EC "DOC0EXPD7739,"
hexmask.long.word 0x8EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F0 "DOC0EXPD7740,"
hexmask.long.word 0x8F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F4 "DOC0EXPD7741,"
hexmask.long.word 0x8F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8F8 "DOC0EXPD7742,"
hexmask.long.word 0x8F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x8FC "DOC0EXPD7743,"
hexmask.long.word 0x8FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x8FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x8FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x8FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x8FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x8FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x8FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x8FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x900 "DOC0EXPD7744,"
hexmask.long.word 0x900 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x900 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x900 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x900 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x900 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x900 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x900 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x900 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x900 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x904 "DOC0EXPD7745,"
hexmask.long.word 0x904 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x904 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x904 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x904 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x904 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x904 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x904 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x904 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x904 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x908 "DOC0EXPD7746,"
hexmask.long.word 0x908 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x908 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x908 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x908 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x908 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x908 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x908 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x908 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x908 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x90C "DOC0EXPD7747,"
hexmask.long.word 0x90C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x90C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x90C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x90C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x90C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x90C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x90C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x90C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x90C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x910 "DOC0EXPD7748,"
hexmask.long.word 0x910 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x910 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x910 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x910 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x910 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x910 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x910 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x910 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x910 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x914 "DOC0EXPD7749,"
hexmask.long.word 0x914 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x914 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x914 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x914 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x914 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x914 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x914 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x914 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x914 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x918 "DOC0EXPD7750,"
hexmask.long.word 0x918 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x918 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x918 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x918 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x918 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x918 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x918 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x918 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x918 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x91C "DOC0EXPD7751,"
hexmask.long.word 0x91C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x91C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x91C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x91C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x91C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x91C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x91C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x91C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x91C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x920 "DOC0EXPD7752,"
hexmask.long.word 0x920 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x920 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x920 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x920 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x920 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x920 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x920 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x920 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x920 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x924 "DOC0EXPD7753,"
hexmask.long.word 0x924 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x924 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x924 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x924 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x924 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x924 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x924 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x924 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x924 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x928 "DOC0EXPD7754,"
hexmask.long.word 0x928 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x928 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x928 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x928 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x928 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x928 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x928 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x928 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x928 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x92C "DOC0EXPD7755,"
hexmask.long.word 0x92C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x92C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x92C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x92C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x92C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x92C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x92C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x92C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x92C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x930 "DOC0EXPD7756,"
hexmask.long.word 0x930 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x930 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x930 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x930 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x930 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x930 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x930 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x930 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x930 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x934 "DOC0EXPD7757,"
hexmask.long.word 0x934 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x934 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x934 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x934 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x934 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x934 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x934 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x934 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x934 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x938 "DOC0EXPD7758,"
hexmask.long.word 0x938 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x938 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x938 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x938 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x938 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x938 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x938 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x938 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x938 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x93C "DOC0EXPD7759,"
hexmask.long.word 0x93C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x93C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x93C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x93C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x93C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x93C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x93C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x93C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x93C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x940 "DOC0EXPD7760,"
hexmask.long.word 0x940 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x940 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x940 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x940 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x940 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x940 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x940 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x940 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x940 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x944 "DOC0EXPD7761,"
hexmask.long.word 0x944 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x944 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x944 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x944 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x944 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x944 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x944 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x944 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x944 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x948 "DOC0EXPD7762,"
hexmask.long.word 0x948 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x948 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x948 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x948 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x948 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x948 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x948 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x948 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x948 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x94C "DOC0EXPD7763,"
hexmask.long.word 0x94C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x94C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x94C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x94C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x94C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x94C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x94C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x94C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x94C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x950 "DOC0EXPD7764,"
hexmask.long.word 0x950 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x950 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x950 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x950 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x950 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x950 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x950 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x950 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x950 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x954 "DOC0EXPD7765,"
hexmask.long.word 0x954 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x954 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x954 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x954 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x954 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x954 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x954 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x954 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x954 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x958 "DOC0EXPD7766,"
hexmask.long.word 0x958 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x958 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x958 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x958 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x958 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x958 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x958 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x958 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x958 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x95C "DOC0EXPD7767,"
hexmask.long.word 0x95C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x95C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x95C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x95C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x95C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x95C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x95C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x95C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x95C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x960 "DOC0EXPD7768,"
hexmask.long.word 0x960 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x960 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x960 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x960 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x960 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x960 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x960 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x960 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x960 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x964 "DOC0EXPD7769,"
hexmask.long.word 0x964 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x964 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x964 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x964 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x964 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x964 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x964 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x964 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x964 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x968 "DOC0EXPD7770,"
hexmask.long.word 0x968 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x968 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x968 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x968 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x968 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x968 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x968 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x968 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x968 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x96C "DOC0EXPD7771,"
hexmask.long.word 0x96C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x96C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x96C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x96C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x96C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x96C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x96C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x96C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x96C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x970 "DOC0EXPD7772,"
hexmask.long.word 0x970 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x970 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x970 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x970 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x970 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x970 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x970 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x970 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x970 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x974 "DOC0EXPD7773,"
hexmask.long.word 0x974 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x974 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x974 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x974 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x974 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x974 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x974 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x974 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x974 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x978 "DOC0EXPD7774,"
hexmask.long.word 0x978 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x978 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x978 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x978 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x978 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x978 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x978 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x978 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x978 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x97C "DOC0EXPD7775,"
hexmask.long.word 0x97C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x97C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x97C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x97C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x97C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x97C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x97C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x97C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x97C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x980 "DOC0EXPD7776,"
hexmask.long.word 0x980 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x980 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x980 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x980 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x980 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x980 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x980 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x980 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x980 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x984 "DOC0EXPD7777,"
hexmask.long.word 0x984 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x984 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x984 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x984 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x984 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x984 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x984 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x984 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x984 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x988 "DOC0EXPD7778,"
hexmask.long.word 0x988 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x988 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x988 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x988 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x988 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x988 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x988 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x988 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x988 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x98C "DOC0EXPD7779,"
hexmask.long.word 0x98C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x98C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x98C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x98C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x98C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x98C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x98C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x98C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x98C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x990 "DOC0EXPD7780,"
hexmask.long.word 0x990 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x990 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x990 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x990 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x990 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x990 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x990 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x990 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x990 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x994 "DOC0EXPD7781,"
hexmask.long.word 0x994 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x994 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x994 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x994 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x994 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x994 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x994 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x994 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x994 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x998 "DOC0EXPD7782,"
hexmask.long.word 0x998 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x998 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x998 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x998 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x998 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x998 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x998 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x998 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x998 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x99C "DOC0EXPD7783,"
hexmask.long.word 0x99C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x99C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x99C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x99C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x99C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x99C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x99C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x99C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x99C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A0 "DOC0EXPD7784,"
hexmask.long.word 0x9A0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A4 "DOC0EXPD7785,"
hexmask.long.word 0x9A4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9A8 "DOC0EXPD7786,"
hexmask.long.word 0x9A8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9A8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9A8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9A8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9A8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9A8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9A8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9A8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9A8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9AC "DOC0EXPD7787,"
hexmask.long.word 0x9AC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9AC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9AC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9AC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9AC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9AC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9AC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9AC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9AC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B0 "DOC0EXPD7788,"
hexmask.long.word 0x9B0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B4 "DOC0EXPD7789,"
hexmask.long.word 0x9B4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9B8 "DOC0EXPD7790,"
hexmask.long.word 0x9B8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9B8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9B8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9B8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9B8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9B8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9B8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9B8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9B8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9BC "DOC0EXPD7791,"
hexmask.long.word 0x9BC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9BC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9BC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9BC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9BC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9BC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9BC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9BC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9BC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C0 "DOC0EXPD7792,"
hexmask.long.word 0x9C0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C4 "DOC0EXPD7793,"
hexmask.long.word 0x9C4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9C8 "DOC0EXPD7794,"
hexmask.long.word 0x9C8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9C8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9C8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9C8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9C8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9C8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9C8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9C8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9C8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9CC "DOC0EXPD7795,"
hexmask.long.word 0x9CC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9CC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9CC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9CC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9CC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9CC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9CC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9CC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9CC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D0 "DOC0EXPD7796,"
hexmask.long.word 0x9D0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D4 "DOC0EXPD7797,"
hexmask.long.word 0x9D4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9D8 "DOC0EXPD7798,"
hexmask.long.word 0x9D8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9D8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9D8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9D8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9D8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9D8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9D8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9D8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9D8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9DC "DOC0EXPD7799,"
hexmask.long.word 0x9DC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9DC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9DC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9DC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9DC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9DC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9DC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9DC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9DC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E0 "DOC0EXPD7800,"
hexmask.long.word 0x9E0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E4 "DOC0EXPD7801,"
hexmask.long.word 0x9E4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9E8 "DOC0EXPD7802,"
hexmask.long.word 0x9E8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9E8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9E8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9E8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9E8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9E8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9E8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9E8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9E8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9EC "DOC0EXPD7803,"
hexmask.long.word 0x9EC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9EC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9EC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9EC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9EC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9EC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9EC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9EC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9EC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F0 "DOC0EXPD7804,"
hexmask.long.word 0x9F0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F4 "DOC0EXPD7805,"
hexmask.long.word 0x9F4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9F8 "DOC0EXPD7806,"
hexmask.long.word 0x9F8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9F8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9F8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9F8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9F8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9F8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9F8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9F8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9F8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0x9FC "DOC0EXPD7807,"
hexmask.long.word 0x9FC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x9FC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0x9FC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0x9FC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0x9FC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0x9FC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0x9FC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0x9FC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0x9FC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA00 "DOC0EXPD7808,"
hexmask.long.word 0xA00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA04 "DOC0EXPD7809,"
hexmask.long.word 0xA04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA08 "DOC0EXPD7810,"
hexmask.long.word 0xA08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA0C "DOC0EXPD7811,"
hexmask.long.word 0xA0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA10 "DOC0EXPD7812,"
hexmask.long.word 0xA10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA14 "DOC0EXPD7813,"
hexmask.long.word 0xA14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA18 "DOC0EXPD7814,"
hexmask.long.word 0xA18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA1C "DOC0EXPD7815,"
hexmask.long.word 0xA1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA20 "DOC0EXPD7816,"
hexmask.long.word 0xA20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA24 "DOC0EXPD7817,"
hexmask.long.word 0xA24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA28 "DOC0EXPD7818,"
hexmask.long.word 0xA28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA2C "DOC0EXPD7819,"
hexmask.long.word 0xA2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA30 "DOC0EXPD7820,"
hexmask.long.word 0xA30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA34 "DOC0EXPD7821,"
hexmask.long.word 0xA34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA38 "DOC0EXPD7822,"
hexmask.long.word 0xA38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA3C "DOC0EXPD7823,"
hexmask.long.word 0xA3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA40 "DOC0EXPD7824,"
hexmask.long.word 0xA40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA44 "DOC0EXPD7825,"
hexmask.long.word 0xA44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA48 "DOC0EXPD7826,"
hexmask.long.word 0xA48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA4C "DOC0EXPD7827,"
hexmask.long.word 0xA4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA50 "DOC0EXPD7828,"
hexmask.long.word 0xA50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA54 "DOC0EXPD7829,"
hexmask.long.word 0xA54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA58 "DOC0EXPD7830,"
hexmask.long.word 0xA58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA5C "DOC0EXPD7831,"
hexmask.long.word 0xA5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA60 "DOC0EXPD7832,"
hexmask.long.word 0xA60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA64 "DOC0EXPD7833,"
hexmask.long.word 0xA64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA68 "DOC0EXPD7834,"
hexmask.long.word 0xA68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA6C "DOC0EXPD7835,"
hexmask.long.word 0xA6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA70 "DOC0EXPD7836,"
hexmask.long.word 0xA70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA74 "DOC0EXPD7837,"
hexmask.long.word 0xA74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA78 "DOC0EXPD7838,"
hexmask.long.word 0xA78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA7C "DOC0EXPD7839,"
hexmask.long.word 0xA7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA80 "DOC0EXPD7840,"
hexmask.long.word 0xA80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA84 "DOC0EXPD7841,"
hexmask.long.word 0xA84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA88 "DOC0EXPD7842,"
hexmask.long.word 0xA88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA8C "DOC0EXPD7843,"
hexmask.long.word 0xA8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA90 "DOC0EXPD7844,"
hexmask.long.word 0xA90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA94 "DOC0EXPD7845,"
hexmask.long.word 0xA94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA98 "DOC0EXPD7846,"
hexmask.long.word 0xA98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xA9C "DOC0EXPD7847,"
hexmask.long.word 0xA9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xA9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xA9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xA9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xA9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xA9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xA9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xA9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xA9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA0 "DOC0EXPD7848,"
hexmask.long.word 0xAA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA4 "DOC0EXPD7849,"
hexmask.long.word 0xAA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAA8 "DOC0EXPD7850,"
hexmask.long.word 0xAA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAAC "DOC0EXPD7851,"
hexmask.long.word 0xAAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB0 "DOC0EXPD7852,"
hexmask.long.word 0xAB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB4 "DOC0EXPD7853,"
hexmask.long.word 0xAB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAB8 "DOC0EXPD7854,"
hexmask.long.word 0xAB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xABC "DOC0EXPD7855,"
hexmask.long.word 0xABC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xABC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xABC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xABC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xABC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xABC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xABC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xABC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xABC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC0 "DOC0EXPD7856,"
hexmask.long.word 0xAC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC4 "DOC0EXPD7857,"
hexmask.long.word 0xAC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAC8 "DOC0EXPD7858,"
hexmask.long.word 0xAC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xACC "DOC0EXPD7859,"
hexmask.long.word 0xACC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xACC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xACC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xACC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xACC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xACC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xACC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xACC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xACC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD0 "DOC0EXPD7860,"
hexmask.long.word 0xAD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD4 "DOC0EXPD7861,"
hexmask.long.word 0xAD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAD8 "DOC0EXPD7862,"
hexmask.long.word 0xAD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xADC "DOC0EXPD7863,"
hexmask.long.word 0xADC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xADC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xADC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xADC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xADC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xADC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xADC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xADC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xADC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE0 "DOC0EXPD7864,"
hexmask.long.word 0xAE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE4 "DOC0EXPD7865,"
hexmask.long.word 0xAE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAE8 "DOC0EXPD7866,"
hexmask.long.word 0xAE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAEC "DOC0EXPD7867,"
hexmask.long.word 0xAEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF0 "DOC0EXPD7868,"
hexmask.long.word 0xAF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF4 "DOC0EXPD7869,"
hexmask.long.word 0xAF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAF8 "DOC0EXPD7870,"
hexmask.long.word 0xAF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xAFC "DOC0EXPD7871,"
hexmask.long.word 0xAFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xAFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xAFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xAFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xAFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xAFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xAFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xAFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xAFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB00 "DOC0EXPD7872,"
hexmask.long.word 0xB00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB04 "DOC0EXPD7873,"
hexmask.long.word 0xB04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB08 "DOC0EXPD7874,"
hexmask.long.word 0xB08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB0C "DOC0EXPD7875,"
hexmask.long.word 0xB0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB10 "DOC0EXPD7876,"
hexmask.long.word 0xB10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB14 "DOC0EXPD7877,"
hexmask.long.word 0xB14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB18 "DOC0EXPD7878,"
hexmask.long.word 0xB18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB1C "DOC0EXPD7879,"
hexmask.long.word 0xB1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB20 "DOC0EXPD7880,"
hexmask.long.word 0xB20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB24 "DOC0EXPD7881,"
hexmask.long.word 0xB24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB28 "DOC0EXPD7882,"
hexmask.long.word 0xB28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB2C "DOC0EXPD7883,"
hexmask.long.word 0xB2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB30 "DOC0EXPD7884,"
hexmask.long.word 0xB30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB34 "DOC0EXPD7885,"
hexmask.long.word 0xB34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB38 "DOC0EXPD7886,"
hexmask.long.word 0xB38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB3C "DOC0EXPD7887,"
hexmask.long.word 0xB3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB40 "DOC0EXPD7888,"
hexmask.long.word 0xB40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB44 "DOC0EXPD7889,"
hexmask.long.word 0xB44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB48 "DOC0EXPD7890,"
hexmask.long.word 0xB48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB4C "DOC0EXPD7891,"
hexmask.long.word 0xB4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB50 "DOC0EXPD7892,"
hexmask.long.word 0xB50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB54 "DOC0EXPD7893,"
hexmask.long.word 0xB54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB58 "DOC0EXPD7894,"
hexmask.long.word 0xB58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB5C "DOC0EXPD7895,"
hexmask.long.word 0xB5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB60 "DOC0EXPD7896,"
hexmask.long.word 0xB60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB64 "DOC0EXPD7897,"
hexmask.long.word 0xB64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB68 "DOC0EXPD7898,"
hexmask.long.word 0xB68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB6C "DOC0EXPD7899,"
hexmask.long.word 0xB6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB70 "DOC0EXPD7900,"
hexmask.long.word 0xB70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB74 "DOC0EXPD7901,"
hexmask.long.word 0xB74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB78 "DOC0EXPD7902,"
hexmask.long.word 0xB78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB7C "DOC0EXPD7903,"
hexmask.long.word 0xB7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB80 "DOC0EXPD7904,"
hexmask.long.word 0xB80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB84 "DOC0EXPD7905,"
hexmask.long.word 0xB84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB88 "DOC0EXPD7906,"
hexmask.long.word 0xB88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB8C "DOC0EXPD7907,"
hexmask.long.word 0xB8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB90 "DOC0EXPD7908,"
hexmask.long.word 0xB90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB94 "DOC0EXPD7909,"
hexmask.long.word 0xB94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB98 "DOC0EXPD7910,"
hexmask.long.word 0xB98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xB9C "DOC0EXPD7911,"
hexmask.long.word 0xB9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xB9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xB9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xB9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xB9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xB9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xB9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xB9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xB9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA0 "DOC0EXPD7912,"
hexmask.long.word 0xBA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA4 "DOC0EXPD7913,"
hexmask.long.word 0xBA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBA8 "DOC0EXPD7914,"
hexmask.long.word 0xBA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBAC "DOC0EXPD7915,"
hexmask.long.word 0xBAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB0 "DOC0EXPD7916,"
hexmask.long.word 0xBB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB4 "DOC0EXPD7917,"
hexmask.long.word 0xBB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBB8 "DOC0EXPD7918,"
hexmask.long.word 0xBB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBBC "DOC0EXPD7919,"
hexmask.long.word 0xBBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC0 "DOC0EXPD7920,"
hexmask.long.word 0xBC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC4 "DOC0EXPD7921,"
hexmask.long.word 0xBC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBC8 "DOC0EXPD7922,"
hexmask.long.word 0xBC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBCC "DOC0EXPD7923,"
hexmask.long.word 0xBCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD0 "DOC0EXPD7924,"
hexmask.long.word 0xBD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD4 "DOC0EXPD7925,"
hexmask.long.word 0xBD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBD8 "DOC0EXPD7926,"
hexmask.long.word 0xBD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBDC "DOC0EXPD7927,"
hexmask.long.word 0xBDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE0 "DOC0EXPD7928,"
hexmask.long.word 0xBE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE4 "DOC0EXPD7929,"
hexmask.long.word 0xBE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBE8 "DOC0EXPD7930,"
hexmask.long.word 0xBE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBEC "DOC0EXPD7931,"
hexmask.long.word 0xBEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF0 "DOC0EXPD7932,"
hexmask.long.word 0xBF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF4 "DOC0EXPD7933,"
hexmask.long.word 0xBF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBF8 "DOC0EXPD7934,"
hexmask.long.word 0xBF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xBFC "DOC0EXPD7935,"
hexmask.long.word 0xBFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xBFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xBFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xBFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xBFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xBFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xBFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xBFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xBFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC00 "DOC0EXPD7936,"
hexmask.long.word 0xC00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC04 "DOC0EXPD7937,"
hexmask.long.word 0xC04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC08 "DOC0EXPD7938,"
hexmask.long.word 0xC08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC0C "DOC0EXPD7939,"
hexmask.long.word 0xC0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC10 "DOC0EXPD7940,"
hexmask.long.word 0xC10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC14 "DOC0EXPD7941,"
hexmask.long.word 0xC14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC18 "DOC0EXPD7942,"
hexmask.long.word 0xC18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC1C "DOC0EXPD7943,"
hexmask.long.word 0xC1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC20 "DOC0EXPD7944,"
hexmask.long.word 0xC20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC24 "DOC0EXPD7945,"
hexmask.long.word 0xC24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC28 "DOC0EXPD7946,"
hexmask.long.word 0xC28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC2C "DOC0EXPD7947,"
hexmask.long.word 0xC2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC30 "DOC0EXPD7948,"
hexmask.long.word 0xC30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC34 "DOC0EXPD7949,"
hexmask.long.word 0xC34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC38 "DOC0EXPD7950,"
hexmask.long.word 0xC38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC3C "DOC0EXPD7951,"
hexmask.long.word 0xC3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC40 "DOC0EXPD7952,"
hexmask.long.word 0xC40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC44 "DOC0EXPD7953,"
hexmask.long.word 0xC44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC48 "DOC0EXPD7954,"
hexmask.long.word 0xC48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC4C "DOC0EXPD7955,"
hexmask.long.word 0xC4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC50 "DOC0EXPD7956,"
hexmask.long.word 0xC50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC54 "DOC0EXPD7957,"
hexmask.long.word 0xC54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC58 "DOC0EXPD7958,"
hexmask.long.word 0xC58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC5C "DOC0EXPD7959,"
hexmask.long.word 0xC5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC60 "DOC0EXPD7960,"
hexmask.long.word 0xC60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC64 "DOC0EXPD7961,"
hexmask.long.word 0xC64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC68 "DOC0EXPD7962,"
hexmask.long.word 0xC68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC6C "DOC0EXPD7963,"
hexmask.long.word 0xC6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC70 "DOC0EXPD7964,"
hexmask.long.word 0xC70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC74 "DOC0EXPD7965,"
hexmask.long.word 0xC74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC78 "DOC0EXPD7966,"
hexmask.long.word 0xC78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC7C "DOC0EXPD7967,"
hexmask.long.word 0xC7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC80 "DOC0EXPD7968,"
hexmask.long.word 0xC80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC84 "DOC0EXPD7969,"
hexmask.long.word 0xC84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC88 "DOC0EXPD7970,"
hexmask.long.word 0xC88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC8C "DOC0EXPD7971,"
hexmask.long.word 0xC8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC90 "DOC0EXPD7972,"
hexmask.long.word 0xC90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC94 "DOC0EXPD7973,"
hexmask.long.word 0xC94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC98 "DOC0EXPD7974,"
hexmask.long.word 0xC98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xC9C "DOC0EXPD7975,"
hexmask.long.word 0xC9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xC9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xC9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xC9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xC9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xC9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xC9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xC9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xC9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA0 "DOC0EXPD7976,"
hexmask.long.word 0xCA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA4 "DOC0EXPD7977,"
hexmask.long.word 0xCA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCA8 "DOC0EXPD7978,"
hexmask.long.word 0xCA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCAC "DOC0EXPD7979,"
hexmask.long.word 0xCAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB0 "DOC0EXPD7980,"
hexmask.long.word 0xCB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB4 "DOC0EXPD7981,"
hexmask.long.word 0xCB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCB8 "DOC0EXPD7982,"
hexmask.long.word 0xCB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCBC "DOC0EXPD7983,"
hexmask.long.word 0xCBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC0 "DOC0EXPD7984,"
hexmask.long.word 0xCC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC4 "DOC0EXPD7985,"
hexmask.long.word 0xCC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCC8 "DOC0EXPD7986,"
hexmask.long.word 0xCC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCCC "DOC0EXPD7987,"
hexmask.long.word 0xCCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD0 "DOC0EXPD7988,"
hexmask.long.word 0xCD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD4 "DOC0EXPD7989,"
hexmask.long.word 0xCD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCD8 "DOC0EXPD7990,"
hexmask.long.word 0xCD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCDC "DOC0EXPD7991,"
hexmask.long.word 0xCDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE0 "DOC0EXPD7992,"
hexmask.long.word 0xCE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE4 "DOC0EXPD7993,"
hexmask.long.word 0xCE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCE8 "DOC0EXPD7994,"
hexmask.long.word 0xCE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCEC "DOC0EXPD7995,"
hexmask.long.word 0xCEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF0 "DOC0EXPD7996,"
hexmask.long.word 0xCF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF4 "DOC0EXPD7997,"
hexmask.long.word 0xCF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCF8 "DOC0EXPD7998,"
hexmask.long.word 0xCF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xCFC "DOC0EXPD7999,"
hexmask.long.word 0xCFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xCFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xCFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xCFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xCFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xCFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xCFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xCFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xCFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD00 "DOC0EXPD8000,"
hexmask.long.word 0xD00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD04 "DOC0EXPD8001,"
hexmask.long.word 0xD04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD08 "DOC0EXPD8002,"
hexmask.long.word 0xD08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD0C "DOC0EXPD8003,"
hexmask.long.word 0xD0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD10 "DOC0EXPD8004,"
hexmask.long.word 0xD10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD14 "DOC0EXPD8005,"
hexmask.long.word 0xD14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD18 "DOC0EXPD8006,"
hexmask.long.word 0xD18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD1C "DOC0EXPD8007,"
hexmask.long.word 0xD1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD20 "DOC0EXPD8008,"
hexmask.long.word 0xD20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD24 "DOC0EXPD8009,"
hexmask.long.word 0xD24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD28 "DOC0EXPD8010,"
hexmask.long.word 0xD28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD2C "DOC0EXPD8011,"
hexmask.long.word 0xD2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD30 "DOC0EXPD8012,"
hexmask.long.word 0xD30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD34 "DOC0EXPD8013,"
hexmask.long.word 0xD34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD38 "DOC0EXPD8014,"
hexmask.long.word 0xD38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD3C "DOC0EXPD8015,"
hexmask.long.word 0xD3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD40 "DOC0EXPD8016,"
hexmask.long.word 0xD40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD44 "DOC0EXPD8017,"
hexmask.long.word 0xD44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD48 "DOC0EXPD8018,"
hexmask.long.word 0xD48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD4C "DOC0EXPD8019,"
hexmask.long.word 0xD4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD50 "DOC0EXPD8020,"
hexmask.long.word 0xD50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD54 "DOC0EXPD8021,"
hexmask.long.word 0xD54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD58 "DOC0EXPD8022,"
hexmask.long.word 0xD58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD5C "DOC0EXPD8023,"
hexmask.long.word 0xD5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD60 "DOC0EXPD8024,"
hexmask.long.word 0xD60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD64 "DOC0EXPD8025,"
hexmask.long.word 0xD64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD68 "DOC0EXPD8026,"
hexmask.long.word 0xD68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD6C "DOC0EXPD8027,"
hexmask.long.word 0xD6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD70 "DOC0EXPD8028,"
hexmask.long.word 0xD70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD74 "DOC0EXPD8029,"
hexmask.long.word 0xD74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD78 "DOC0EXPD8030,"
hexmask.long.word 0xD78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD7C "DOC0EXPD8031,"
hexmask.long.word 0xD7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD80 "DOC0EXPD8032,"
hexmask.long.word 0xD80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD84 "DOC0EXPD8033,"
hexmask.long.word 0xD84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD88 "DOC0EXPD8034,"
hexmask.long.word 0xD88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD8C "DOC0EXPD8035,"
hexmask.long.word 0xD8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD90 "DOC0EXPD8036,"
hexmask.long.word 0xD90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD94 "DOC0EXPD8037,"
hexmask.long.word 0xD94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD98 "DOC0EXPD8038,"
hexmask.long.word 0xD98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xD9C "DOC0EXPD8039,"
hexmask.long.word 0xD9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xD9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xD9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xD9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xD9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xD9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xD9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xD9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xD9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA0 "DOC0EXPD8040,"
hexmask.long.word 0xDA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA4 "DOC0EXPD8041,"
hexmask.long.word 0xDA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDA8 "DOC0EXPD8042,"
hexmask.long.word 0xDA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDAC "DOC0EXPD8043,"
hexmask.long.word 0xDAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB0 "DOC0EXPD8044,"
hexmask.long.word 0xDB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB4 "DOC0EXPD8045,"
hexmask.long.word 0xDB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDB8 "DOC0EXPD8046,"
hexmask.long.word 0xDB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDBC "DOC0EXPD8047,"
hexmask.long.word 0xDBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC0 "DOC0EXPD8048,"
hexmask.long.word 0xDC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC4 "DOC0EXPD8049,"
hexmask.long.word 0xDC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDC8 "DOC0EXPD8050,"
hexmask.long.word 0xDC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDCC "DOC0EXPD8051,"
hexmask.long.word 0xDCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD0 "DOC0EXPD8052,"
hexmask.long.word 0xDD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD4 "DOC0EXPD8053,"
hexmask.long.word 0xDD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDD8 "DOC0EXPD8054,"
hexmask.long.word 0xDD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDDC "DOC0EXPD8055,"
hexmask.long.word 0xDDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE0 "DOC0EXPD8056,"
hexmask.long.word 0xDE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE4 "DOC0EXPD8057,"
hexmask.long.word 0xDE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDE8 "DOC0EXPD8058,"
hexmask.long.word 0xDE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDEC "DOC0EXPD8059,"
hexmask.long.word 0xDEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF0 "DOC0EXPD8060,"
hexmask.long.word 0xDF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF4 "DOC0EXPD8061,"
hexmask.long.word 0xDF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDF8 "DOC0EXPD8062,"
hexmask.long.word 0xDF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xDFC "DOC0EXPD8063,"
hexmask.long.word 0xDFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xDFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xDFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xDFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xDFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xDFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xDFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xDFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xDFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE00 "DOC0EXPD8064,"
hexmask.long.word 0xE00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE04 "DOC0EXPD8065,"
hexmask.long.word 0xE04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE08 "DOC0EXPD8066,"
hexmask.long.word 0xE08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE0C "DOC0EXPD8067,"
hexmask.long.word 0xE0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE10 "DOC0EXPD8068,"
hexmask.long.word 0xE10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE14 "DOC0EXPD8069,"
hexmask.long.word 0xE14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE18 "DOC0EXPD8070,"
hexmask.long.word 0xE18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE1C "DOC0EXPD8071,"
hexmask.long.word 0xE1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE20 "DOC0EXPD8072,"
hexmask.long.word 0xE20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE24 "DOC0EXPD8073,"
hexmask.long.word 0xE24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE28 "DOC0EXPD8074,"
hexmask.long.word 0xE28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE2C "DOC0EXPD8075,"
hexmask.long.word 0xE2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE30 "DOC0EXPD8076,"
hexmask.long.word 0xE30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE34 "DOC0EXPD8077,"
hexmask.long.word 0xE34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE38 "DOC0EXPD8078,"
hexmask.long.word 0xE38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE3C "DOC0EXPD8079,"
hexmask.long.word 0xE3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE40 "DOC0EXPD8080,"
hexmask.long.word 0xE40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE44 "DOC0EXPD8081,"
hexmask.long.word 0xE44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE48 "DOC0EXPD8082,"
hexmask.long.word 0xE48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE4C "DOC0EXPD8083,"
hexmask.long.word 0xE4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE50 "DOC0EXPD8084,"
hexmask.long.word 0xE50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE54 "DOC0EXPD8085,"
hexmask.long.word 0xE54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE58 "DOC0EXPD8086,"
hexmask.long.word 0xE58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE5C "DOC0EXPD8087,"
hexmask.long.word 0xE5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE60 "DOC0EXPD8088,"
hexmask.long.word 0xE60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE64 "DOC0EXPD8089,"
hexmask.long.word 0xE64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE68 "DOC0EXPD8090,"
hexmask.long.word 0xE68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE6C "DOC0EXPD8091,"
hexmask.long.word 0xE6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE70 "DOC0EXPD8092,"
hexmask.long.word 0xE70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE74 "DOC0EXPD8093,"
hexmask.long.word 0xE74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE78 "DOC0EXPD8094,"
hexmask.long.word 0xE78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE7C "DOC0EXPD8095,"
hexmask.long.word 0xE7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE80 "DOC0EXPD8096,"
hexmask.long.word 0xE80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE84 "DOC0EXPD8097,"
hexmask.long.word 0xE84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE88 "DOC0EXPD8098,"
hexmask.long.word 0xE88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE8C "DOC0EXPD8099,"
hexmask.long.word 0xE8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE90 "DOC0EXPD8100,"
hexmask.long.word 0xE90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE94 "DOC0EXPD8101,"
hexmask.long.word 0xE94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE98 "DOC0EXPD8102,"
hexmask.long.word 0xE98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xE9C "DOC0EXPD8103,"
hexmask.long.word 0xE9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xE9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xE9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xE9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xE9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xE9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xE9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xE9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xE9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA0 "DOC0EXPD8104,"
hexmask.long.word 0xEA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA4 "DOC0EXPD8105,"
hexmask.long.word 0xEA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEA8 "DOC0EXPD8106,"
hexmask.long.word 0xEA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEAC "DOC0EXPD8107,"
hexmask.long.word 0xEAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB0 "DOC0EXPD8108,"
hexmask.long.word 0xEB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB4 "DOC0EXPD8109,"
hexmask.long.word 0xEB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEB8 "DOC0EXPD8110,"
hexmask.long.word 0xEB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEBC "DOC0EXPD8111,"
hexmask.long.word 0xEBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC0 "DOC0EXPD8112,"
hexmask.long.word 0xEC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC4 "DOC0EXPD8113,"
hexmask.long.word 0xEC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEC8 "DOC0EXPD8114,"
hexmask.long.word 0xEC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xECC "DOC0EXPD8115,"
hexmask.long.word 0xECC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xECC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xECC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xECC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xECC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xECC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xECC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xECC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xECC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED0 "DOC0EXPD8116,"
hexmask.long.word 0xED0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED4 "DOC0EXPD8117,"
hexmask.long.word 0xED4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xED8 "DOC0EXPD8118,"
hexmask.long.word 0xED8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xED8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xED8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xED8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xED8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xED8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xED8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xED8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xED8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEDC "DOC0EXPD8119,"
hexmask.long.word 0xEDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE0 "DOC0EXPD8120,"
hexmask.long.word 0xEE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE4 "DOC0EXPD8121,"
hexmask.long.word 0xEE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEE8 "DOC0EXPD8122,"
hexmask.long.word 0xEE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEEC "DOC0EXPD8123,"
hexmask.long.word 0xEEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF0 "DOC0EXPD8124,"
hexmask.long.word 0xEF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF4 "DOC0EXPD8125,"
hexmask.long.word 0xEF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEF8 "DOC0EXPD8126,"
hexmask.long.word 0xEF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xEFC "DOC0EXPD8127,"
hexmask.long.word 0xEFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xEFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xEFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xEFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xEFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xEFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xEFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xEFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xEFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF00 "DOC0EXPD8128,"
hexmask.long.word 0xF00 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF00 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF00 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF00 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF00 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF00 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF00 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF00 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF00 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF04 "DOC0EXPD8129,"
hexmask.long.word 0xF04 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF04 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF04 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF04 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF04 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF04 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF04 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF04 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF04 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF08 "DOC0EXPD8130,"
hexmask.long.word 0xF08 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF08 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF08 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF08 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF08 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF08 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF08 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF08 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF08 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF0C "DOC0EXPD8131,"
hexmask.long.word 0xF0C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF0C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF0C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF0C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF0C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF0C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF0C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF0C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF0C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF10 "DOC0EXPD8132,"
hexmask.long.word 0xF10 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF10 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF10 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF10 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF10 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF10 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF10 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF10 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF10 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF14 "DOC0EXPD8133,"
hexmask.long.word 0xF14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF14 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF14 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF14 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF14 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF14 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF14 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF14 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF14 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF18 "DOC0EXPD8134,"
hexmask.long.word 0xF18 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF18 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF18 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF18 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF18 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF18 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF18 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF18 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF18 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF1C "DOC0EXPD8135,"
hexmask.long.word 0xF1C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF1C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF1C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF1C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF1C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF1C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF1C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF1C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF1C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF20 "DOC0EXPD8136,"
hexmask.long.word 0xF20 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF20 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF20 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF20 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF20 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF20 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF20 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF20 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF20 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF24 "DOC0EXPD8137,"
hexmask.long.word 0xF24 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF24 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF24 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF24 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF24 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF24 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF24 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF24 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF24 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF28 "DOC0EXPD8138,"
hexmask.long.word 0xF28 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF28 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF28 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF28 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF28 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF28 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF28 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF28 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF28 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF2C "DOC0EXPD8139,"
hexmask.long.word 0xF2C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF2C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF2C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF2C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF2C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF2C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF2C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF2C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF2C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF30 "DOC0EXPD8140,"
hexmask.long.word 0xF30 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF30 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF30 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF30 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF30 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF30 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF30 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF30 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF30 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF34 "DOC0EXPD8141,"
hexmask.long.word 0xF34 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF34 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF34 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF34 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF34 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF34 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF34 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF34 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF34 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF38 "DOC0EXPD8142,"
hexmask.long.word 0xF38 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF38 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF38 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF38 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF38 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF38 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF38 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF38 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF38 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF3C "DOC0EXPD8143,"
hexmask.long.word 0xF3C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF3C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF3C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF3C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF3C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF3C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF3C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF3C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF3C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF40 "DOC0EXPD8144,"
hexmask.long.word 0xF40 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF40 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF40 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF40 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF40 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF40 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF40 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF40 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF40 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF44 "DOC0EXPD8145,"
hexmask.long.word 0xF44 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF44 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF44 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF44 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF44 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF44 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF44 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF44 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF44 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF48 "DOC0EXPD8146,"
hexmask.long.word 0xF48 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF48 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF48 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF48 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF48 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF48 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF48 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF48 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF48 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF4C "DOC0EXPD8147,"
hexmask.long.word 0xF4C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF4C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF4C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF4C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF4C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF4C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF4C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF4C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF4C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF50 "DOC0EXPD8148,"
hexmask.long.word 0xF50 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF50 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF50 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF50 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF50 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF50 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF50 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF50 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF50 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF54 "DOC0EXPD8149,"
hexmask.long.word 0xF54 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF54 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF54 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF54 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF54 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF54 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF54 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF54 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF54 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF58 "DOC0EXPD8150,"
hexmask.long.word 0xF58 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF58 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF58 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF58 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF58 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF58 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF58 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF58 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF58 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF5C "DOC0EXPD8151,"
hexmask.long.word 0xF5C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF5C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF5C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF5C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF5C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF5C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF5C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF5C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF5C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF60 "DOC0EXPD8152,"
hexmask.long.word 0xF60 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF60 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF60 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF60 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF60 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF60 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF60 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF60 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF60 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF64 "DOC0EXPD8153,"
hexmask.long.word 0xF64 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF64 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF64 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF64 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF64 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF64 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF64 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF64 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF64 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF68 "DOC0EXPD8154,"
hexmask.long.word 0xF68 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF68 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF68 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF68 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF68 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF68 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF68 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF68 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF68 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF6C "DOC0EXPD8155,"
hexmask.long.word 0xF6C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF6C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF6C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF6C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF6C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF6C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF6C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF6C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF6C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF70 "DOC0EXPD8156,"
hexmask.long.word 0xF70 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF70 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF70 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF70 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF70 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF70 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF70 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF70 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF70 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF74 "DOC0EXPD8157,"
hexmask.long.word 0xF74 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF74 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF74 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF74 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF74 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF74 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF74 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF74 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF74 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF78 "DOC0EXPD8158,"
hexmask.long.word 0xF78 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF78 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF78 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF78 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF78 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF78 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF78 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF78 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF78 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF7C "DOC0EXPD8159,"
hexmask.long.word 0xF7C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF7C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF7C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF7C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF7C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF7C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF7C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF7C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF7C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF80 "DOC0EXPD8160,"
hexmask.long.word 0xF80 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF80 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF80 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF80 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF80 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF80 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF80 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF80 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF80 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF84 "DOC0EXPD8161,"
hexmask.long.word 0xF84 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF84 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF84 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF84 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF84 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF84 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF84 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF84 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF84 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF88 "DOC0EXPD8162,"
hexmask.long.word 0xF88 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF88 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF88 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF88 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF88 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF88 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF88 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF88 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF88 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF8C "DOC0EXPD8163,"
hexmask.long.word 0xF8C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF8C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF8C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF8C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF8C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF8C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF8C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF8C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF8C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF90 "DOC0EXPD8164,"
hexmask.long.word 0xF90 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF90 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF90 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF90 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF90 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF90 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF90 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF90 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF90 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF94 "DOC0EXPD8165,"
hexmask.long.word 0xF94 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF94 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF94 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF94 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF94 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF94 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF94 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF94 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF94 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF98 "DOC0EXPD8166,"
hexmask.long.word 0xF98 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF98 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF98 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF98 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF98 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF98 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF98 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF98 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF98 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xF9C "DOC0EXPD8167,"
hexmask.long.word 0xF9C 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xF9C 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xF9C 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xF9C 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xF9C 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xF9C 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xF9C 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xF9C 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xF9C 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA0 "DOC0EXPD8168,"
hexmask.long.word 0xFA0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA4 "DOC0EXPD8169,"
hexmask.long.word 0xFA4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFA8 "DOC0EXPD8170,"
hexmask.long.word 0xFA8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFA8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFA8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFA8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFA8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFA8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFA8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFA8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFA8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFAC "DOC0EXPD8171,"
hexmask.long.word 0xFAC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFAC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFAC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFAC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFAC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFAC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFAC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFAC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFAC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB0 "DOC0EXPD8172,"
hexmask.long.word 0xFB0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB4 "DOC0EXPD8173,"
hexmask.long.word 0xFB4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFB8 "DOC0EXPD8174,"
hexmask.long.word 0xFB8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFB8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFB8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFB8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFB8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFB8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFB8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFB8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFB8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFBC "DOC0EXPD8175,"
hexmask.long.word 0xFBC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFBC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFBC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFBC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFBC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFBC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFBC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFBC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFBC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC0 "DOC0EXPD8176,"
hexmask.long.word 0xFC0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC4 "DOC0EXPD8177,"
hexmask.long.word 0xFC4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFC8 "DOC0EXPD8178,"
hexmask.long.word 0xFC8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFC8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFC8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFC8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFC8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFC8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFC8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFC8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFC8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFCC "DOC0EXPD8179,"
hexmask.long.word 0xFCC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFCC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFCC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFCC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFCC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFCC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFCC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFCC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFCC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD0 "DOC0EXPD8180,"
hexmask.long.word 0xFD0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD4 "DOC0EXPD8181,"
hexmask.long.word 0xFD4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFD8 "DOC0EXPD8182,"
hexmask.long.word 0xFD8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFD8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFD8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFD8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFD8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFD8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFD8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFD8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFD8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFDC "DOC0EXPD8183,"
hexmask.long.word 0xFDC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFDC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFDC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFDC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFDC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFDC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFDC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFDC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFDC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE0 "DOC0EXPD8184,"
hexmask.long.word 0xFE0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE4 "DOC0EXPD8185,"
hexmask.long.word 0xFE4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFE8 "DOC0EXPD8186,"
hexmask.long.word 0xFE8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFE8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFE8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFE8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFE8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFE8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFE8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFE8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFE8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFEC "DOC0EXPD8187,"
hexmask.long.word 0xFEC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFEC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFEC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFEC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFEC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFEC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFEC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFEC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFEC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF0 "DOC0EXPD8188,"
hexmask.long.word 0xFF0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF0 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF0 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF0 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF0 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF0 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF0 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF0 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF0 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF4 "DOC0EXPD8189,"
hexmask.long.word 0xFF4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF4 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF4 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF4 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF4 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF4 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF4 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF4 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF4 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFF8 "DOC0EXPD8190,"
hexmask.long.word 0xFF8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFF8 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFF8 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFF8 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFF8 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFF8 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFF8 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFF8 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFF8 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
line.long 0xFFC "DOC0EXPD8191,"
hexmask.long.word 0xFFC 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0xFFC 14.--15. "l0,CLUT2 index of pixel x" "0,1,2,3"
newline
bitfld.long 0xFFC 12.--13. "l1,CLUT2 index of pixel x+1" "0,1,2,3"
bitfld.long 0xFFC 10.--11. "l2,CLUT2 index of pixel x+2" "0,1,2,3"
newline
bitfld.long 0xFFC 8.--9. "l3,CLUT2 index of pixel x+3" "0,1,2,3"
bitfld.long 0xFFC 6.--7. "l4,CLUT2 index of pixel x+4" "0,1,2,3"
newline
bitfld.long 0xFFC 4.--5. "l5,CLUT2 index of pixel x+5" "0,1,2,3"
bitfld.long 0xFFC 2.--3. "l6,CLUT2 index of pixel x+6" "0,1,2,3"
newline
bitfld.long 0xFFC 0.--1. "l7,CLUT2 index of pixel x+7" "0,1,2,3"
tree.end
tree "DSI_CSI2_TX (MIPI Alliance Specification for Display Serial Interface/Camera Serial Interface 2)"
base ad:0xFED80000
rgroup.long 0x0++0x3
line.long 0x0 "DSI0_ISR,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x0 17.--27. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "SCAL,(for 2.5G)" "0,1"
bitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
newline
bitfld.long 0x0 14. "PPIDL,When this value is double_quotation1double_quotation  an interrupt overall of D-PHY PPI Data Lane exists." "0,1"
bitfld.long 0x0 13. "PPIDL0,When this value is double_quotation1double_quotation  an interrupt of D-PHY PPI Data Lane0 exists." "0,1"
newline
bitfld.long 0x0 12. "PPICL,When this value is double_quotation1double_quotation  an interrupt of D-PHY PPI Clock Lane exists." "0,1"
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 8. "TO,When this value is double_quotation1double_quotation  an interrupt of Timeout exists." "0,1"
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "TA,When this value is double_quotation1double_quotation  an interrupt of Turn-Around exists." "0,1"
bitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 2. "RXP,When this value is double_quotation1double_quotation  an interrupt of Rx Packet exists." "0,1"
bitfld.long 0x0 1. "TXVM,When this value is double_quotation1double_quotation  an interrupt of Tx Video mode exists." "0,1"
newline
bitfld.long 0x0 0. "TXCM,When this value is double_quotation1double_quotation  an interrupt of Tx Command Transfer mode exists." "0,1"
rgroup.long 0x10++0x3
line.long 0x0 "DSI0_LINKSR,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "LPBUSY,When this value is double_quotation1double_quotation  LP is running." "0,1"
newline
bitfld.long 0x0 0. "HSBUSY,When this value is double_quotation1double_quotation  HS is running." "0,1"
group.long 0x100++0x3
line.long 0x0 "DSI0_TXSETR,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x0 24.--27. 1. "SET1,Prohibit to change. Keep the Initial Value."
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
hexmask.long.byte 0x0 16.--19. 1. "SET2,Prohibit to change. Keep the Initial Value."
newline
rbitfld.long 0x0 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 12. "EOTPEN,Enable HS Tx EoTp" "0: Disable Tx EoTp,1: Enable Tx EoTp"
newline
hexmask.long.word 0x0 2.--11. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "LANECNT,Set Lane count." "0,1,2,3"
group.long 0x110++0x3
line.long 0x0 "DSI0_TXCMSETR,"
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "SPDTYP,Set the speed type in Command Transfer mode." "0: High Speed,1: Low Power"
newline
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "LPPDACC,Set the method to access to Tx long Packet payload data." "0: Register access,1: AXI access"
group.long 0x120++0x3
line.long 0x0 "DSI0_TXCMCR,It is prohibited to set '1' at the same time to TXCMCR.BTAREQ and TXCMCR.TXREQ."
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved"
bitfld.long 0x0 2. "BTATYP,Tx Request of Command Transfer mode with Bus Turn-Around (BTA)." "0: Tx Request is Read Command when BTAREQ=1,1: Tx Request is Non-Read Command when BTAREQ=1"
newline
bitfld.long 0x0 1. "BTAREQ,Tx Request of Command Transfer mode with Bus Turn-Around." "0: No meaning,1: Tx Request of Command Transfer mode with Bus.."
bitfld.long 0x0 0. "TXREQ,Tx Request of Command Transfer mode without Bus Turn-Around." "0: No meaning,1: Tx Request of Command Transfer mode without Bus.."
rgroup.long 0x130++0x3
line.long 0x0 "DSI0_TXCMSR,"
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
bitfld.long 0x0 18. "CLSNERR,When this value is double_quotation1double_quotation  Tx Error of HS Command Transfer Packet is occurred by the abnormal transmission." "0,1"
newline
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "AXIERR,When this value is double_quotation1double_quotation  Tx Error of HS Command Transfer Packet is occurred by the Error of AXI Read." "0,1"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "TXREQEND,When this value is double_quotation1double_quotation  completion of the request for HS Command Transfer Packet is detected." "0,1"
group.long 0x134++0x7
line.long 0x0 "DSI0_TXCMSCR,can read only 0"
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
bitfld.long 0x0 18. "CLSNERR,Set to double_quotation1double_quotation to clear the TXCMSR.CLSNERR." "0: No meaning,1: Clear TXCMSR"
newline
rbitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "AXIERR,Set to double_quotation1double_quotation to clear the TXCMSR.AXIERR." "0: No meaning,1: Clear TXCMSR"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "TXREQEND,Set to double_quotation1double_quotation to clear the TXCMSR.TXREQEND." "0: No meaning,1: Clear TXCMSR"
line.long 0x4 "DSI0_TXCMIER,"
hexmask.long.word 0x4 19.--31. 1. "Reserved_19,Reserved"
bitfld.long 0x4 18. "CLSNERR,Interrupt enable for TXCMSR.CLSNERR" "0: Disable interrupt of dsi_int_txcm when TXCMSR,1: Enable interrupt of dsi_int_txcm when TXCMSR"
newline
rbitfld.long 0x4 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x4 16. "AXIERR,Interrupt enable for TXCMSR.AXIERR" "0: Disable interrupt of dsi_int_txcm when TXCMSR,1: Enable interrupt of dsi_int_txcm when TXCMSR"
newline
hexmask.long.word 0x4 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "TXREQEND,Interrupt enable for TXCMSR.TXREQEND" "0: Disable interrupt of dsi_int_txcm when TXCMSR,1: Enable interrupt of dsi_int_txcm when TXCMSR"
group.long 0x140++0x3
line.long 0x0 "DSI0_TXCMADDRSET0R,"
hexmask.long 0x0 3.--31. 1. "ADDRL,Set the Start Address for Payload Data of Tx Long Packet."
rbitfld.long 0x0 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
group.long 0x150++0x3
line.long 0x0 "DSI0_TXCMPHDR,and#12539;The maximum size for Command Transfer mode Long Packet by using Register is 16 Byte. (TXCMSET0R.LPPDACC=0 and TXCMPHDR.FMT=1)"
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
bitfld.long 0x0 24. "FMT,Packet format of Tx Packet Header." "0: Short Packet,1: Long Packet"
newline
bitfld.long 0x0 22.--23. "VC,Identifier of virtual channel of Tx Packet Header. This value is limited to 3 from 0." "0,1,2,3"
hexmask.long.byte 0x0 16.--21. 1. "DT,Data type of Tx Packet Header."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA1,Data1 of Tx Packet Header.*1"
hexmask.long.byte 0x0 0.--7. 1. "DATA0,Data0 of Tx Packet Header. *1"
group.long 0x160++0xF
line.long 0x0 "DSI0_TXCMPPD0R,"
hexmask.long 0x0 0.--31. 1. "DATA,Payload Data0 for Tx Long Packet."
line.long 0x4 "DSI0_TXCMPPD1R,"
hexmask.long 0x4 0.--31. 1. "DATA,Payload Data1 for Tx Long Packet."
line.long 0x8 "DSI0_TXCMPPD2R,"
hexmask.long 0x8 0.--31. 1. "DATA,Payload Data2 for Tx Long Packet."
line.long 0xC "DSI0_TXCMPPD3R,"
hexmask.long 0xC 0.--31. 1. "DATA,Payload Data3 for Tx Long Packet."
group.long 0x180++0x7
line.long 0x0 "DSI0_TXVMSETR,There is sufficient time to transition from HS to LP mode and back again. a timed interval in LP mode may substitute for a Blanking Packet. thus saving power."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "SYNSEQ,Sequence of Tx Video mode." "0: Sync Pulse mode,1: Sync Event mode"
newline
bitfld.long 0x0 15. "VSTPM,Set to B'1" "0,1"
hexmask.long.byte 0x0 11.--14. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x0 8.--10. "PIXWDTH,Prohibits to change from Initial Value" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "VSEN,(for 2.5G)" "0: Disable,1: Enable"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 2. "HFPBPEN,Enable transmission of Blanking Packet during the HFP interval. *1" "0: Disable,1: Enable"
bitfld.long 0x0 1. "HBPBPEN,Enable transmission of Blanking Packet during the HBP interval. *1" "0: Disable,1: Enable"
newline
bitfld.long 0x0 0. "HSABPEN,Enable transmission of Blanking Packet during the HSA interval. *1" "0: Disable,1: Enable"
line.long 0x4 "DSI0_TXVMSET2R,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "FNUM,Maximum value of the Frame Number field both of Frame Start Packet and Frame End Packet."
group.long 0x190++0x3
line.long 0x0 "DSI0_TXVMCR,This FIFO is a translator of Tx Video Data to hsclk (byteclock) domain from vclk (dotclock) domain."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "VFCLR,Clear FIFO *1 for Tx Video mode." "0,1"
newline
hexmask.long.word 0x0 1.--11. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "EN,When write double_quotation1double_quotation  enable Video mode Tx. This field should write double_quotation1double_quotation before starting Video Input." "0,1"
rgroup.long 0x1A0++0x3
line.long 0x0 "DSI0_TXVMSR,"
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 29. "VBPDET,double_quotation1double_quotation is set when the start of the VBP period (0rarr1 when VSYNC is high polarity and 1rarr0 for Low polarity) is detected." "0,1"
newline
bitfld.long 0x0 28. "VSADET,double_quotation1double_quotation is set when the start of the VSA period (0rarr1 when VSYNC is high polarity and 1rarr0 for Low polarity) is detected." "0,1"
bitfld.long 0x0 25.--27. "Reserved_25,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 24. "VFERR,When this value is double_quotation1double_quotation  Overrun or Underrun of Tx Video mode FIFO is occurred." "0,1"
bitfld.long 0x0 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "PDIS,When this value is double_quotation1double_quotation  the Tx Packet is discarded in Video mode." "0,1"
bitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 17. "STP,When this value is double_quotation1double_quotation  the End of Tx is detected in Video mode." "0,1"
bitfld.long 0x0 16. "STR,When this value is double_quotation1double_quotation  the Start of Tx is detected in Video mode." "0,1"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 12. "VFRDY,Status of Tx Video FIFO." "0: Not ready,1: Ready for use"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "ACT,Status of Video mode Tx" "0: stopped,1: running"
newline
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "RDY,Status of Video mode Tx ready" "0: Not ready of Tx Video mode,1: Ready for use of Tx Video mode"
group.long 0x1A4++0x7
line.long 0x0 "DSI0_TXVMSCR,can read only 0"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 29. "VBPDET,Set to double_quotation1double_quotation to clear the TXVMSR.VBPDET." "0: No meaning,1: Clear TXVMSR"
newline
bitfld.long 0x0 28. "VSADET,Set to double_quotation1double_quotation to clear the TXVMSR.VSADET." "0: No meaning,1: Clear TXVMSR"
rbitfld.long 0x0 25.--27. "Reserved_25,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 24. "VFERR,Set to double_quotation1double_quotation to clear the TXVMSR.VFERR." "0: No meaning,1: Clear TXVMSR"
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "PDIS,Set to double_quotation1double_quotation to clear the TXVMSR.PDIS." "0: No meaning,1: Clear TXVMSR"
rbitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 17. "STP,Set to double_quotation1double_quotation after detection of the End of Tx in Video mode to detect the next one." "0: No meaning,1: Clear TXVMSR"
bitfld.long 0x0 16. "STR,Set to double_quotation1double_quotation after detection of the Start of Tx in Video mode to detect the next one." "0: No meaning,1: Clear TXVMSR"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
line.long 0x4 "DSI0_TXVMIER,"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x4 29. "VBPDET,Interrupt enable for TXVMSR.VBPDET" "0: Disable interrupt of dsi_int_txvm when TXVMSR,1: Enable interrupt of dsi_int_txvm when TXVMSR"
newline
bitfld.long 0x4 28. "VSADET,Interrupt enable for TXVMSR.VFERR" "0: Disable interrupt of dsi_int_txvm when TXVMSR,1: Enable interrupt of dsi_int_txvm when TXVMSR"
rbitfld.long 0x4 25.--27. "Reserved_25,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 24. "VFERR,Interrupt enable for TXVMSR.VFERR" "0: Disable interrupt of dsi_int_txvm when TXVMSR,1: Enable interrupt of dsi_int_txvm when TXVMSR"
rbitfld.long 0x4 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 20. "PDIS,Interrupt enable for TXVMSR.PDIS" "0: Disable interrupt of dsi_int_txvm when TXVMSR,1: Enable interrupt of dsi_int_txvm when TXVMSR"
rbitfld.long 0x4 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 17. "STP,Interrupt enable for detection of End of Tx in Video mode." "0: Disable interrupt of dsi_int_txvm when TXVMSR,1: Enable interrupt of dsi_int_txvm when TXVMSR"
bitfld.long 0x4 16. "STR,Interrupt enable for detection of Start of Tx in Video mode." "0: Disable interrupt of dsi_int_txvm when TXVMSR,1: Enable interrupt of dsi_int_txvm when TXVMSR"
newline
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
group.long 0x1C0++0x3
line.long 0x0 "DSI0_TXVMPSPHSETR,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
bitfld.long 0x0 22.--23. "VC,Identifier for virtual channel of Tx Video Mode Pixel Stream Packet Header." "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--21. 1. "DT,Data Type of Tx Video Mode Pixel Stream Packet Header. It can be set following values."
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
group.long 0x1D0++0x13
line.long 0x0 "DSI0_TXVMVPRMSET0R,Use this value for Loosely Packed Pixel Stream. 18bit RGB. Compressed 24bit."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "HSPOL,Set polarity of HSYNC signal." "0: High Active,1: Low Active"
newline
bitfld.long 0x0 16. "VSPOL,Set polarity of VSYNC signal." "0: High Active,1: Low Active"
hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 4.--5. "CSPC,Set color space of input video pixel." "0: RGB,1: YCbCr,2: Byte-based,3: Reserved"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 0.--2. "BPP,Set VideoColorDepth of input video pixel." "0: 16bpp,1: 18bpp,2: 24bpp*1,?,?,?,?,?"
line.long 0x4 "DSI0_TXVMVPRMSET1R,"
rbitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
hexmask.long.word 0x4 16.--30. 1. "VACTIVE,Set Line count of VACTIVE (Vertical Active lines)"
newline
bitfld.long 0x4 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x4 14. "VSAVW,Allows the number of lines in a VSA period to vary." "0,1"
newline
rbitfld.long 0x4 12.--13. "Reserved_12,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--11. 1. "VSA,Set Line count of VSA (Vertical Sync Active)"
line.long 0x8 "DSI0_TXVMVPRMSET2R,"
bitfld.long 0x8 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x8 30. "VFPVW,Allows the number of lines in a VFP period to vary." "0,1"
newline
rbitfld.long 0x8 29. "Reserved_29,Reserved" "0,1"
hexmask.long.word 0x8 16.--28. 1. "VFP,Set Line count of VFP (Vertical Front Porch)"
newline
bitfld.long 0x8 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x8 14. "VBPVW,Allows the number of lines in a VBP period to vary." "0,1"
newline
rbitfld.long 0x8 13. "Reserved_13,Reserved" "0,1"
hexmask.long.word 0x8 0.--12. 1. "VBP,Set Line count of VBP (Vertical Back Porch)"
line.long 0xC "DSI0_TXVMVPRMSET3R,"
rbitfld.long 0xC 31. "Reserved_31,Reserved" "0,1"
hexmask.long.word 0xC 16.--30. 1. "HACTIVE,Set pixel count of HACTIVE (Horizontal Active pixels)"
newline
hexmask.long.byte 0xC 12.--15. 1. "HSBYTE,In use case of compressed data  Set following value."
hexmask.long.word 0xC 0.--11. 1. "HSA,Set pixel count of HSA (Horizontal Sync Active)"
line.long 0x10 "DSI0_TXVMVPRMSET4R,"
rbitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x10 16.--28. 1. "HFP,Set pixel count of HFP (Horizontal Front Porch)"
newline
rbitfld.long 0x10 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x10 0.--12. 1. "HBP,Set pixel count of HBP (Horizontal Back Porch)"
group.long 0x200++0x3
line.long 0x0 "DSI0_RXSETR,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x0 24.--27. 1. "CRCEN,Enable for Received CRC check for virtual channel"
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
hexmask.long.byte 0x0 16.--19. 1. "ECCEN,Enable Received ECC check for virtual channel"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
group.long 0x210++0x3
line.long 0x0 "DSI0_RXPSETR,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "LPPDACC,Set access method for Received Long packet payload data." "0: Register access mode,1: AXI access mode"
rgroup.long 0x220++0x3
line.long 0x0 "DSI0_RXPSR,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 28. "ECCERR1B,When this value is double_quotation1double_quotation  the Rx ECC Error (1bit) is detected." "0,1"
newline
bitfld.long 0x0 26.--27. "Reserved_26,Reserved" "0,1,2,3"
bitfld.long 0x0 25. "UEXTRGERR,When this value is double_quotation1double_quotation  the Rx Unexpected Trigger is detected." "0,1"
newline
bitfld.long 0x0 24. "RESPTOERR,When this value is double_quotation1double_quotation  the Rx Timeout is detected after changing to Rx mode along with Bus Turn-Around and within the time specified by RESPTOSETR.RESPTOVL." "0,1"
bitfld.long 0x0 23. "OVRERR,When this value is double_quotation1double_quotation  the Buffer Overrun Error is detected at Rx Long Packet." "0,1"
newline
bitfld.long 0x0 22. "AXIERR,When this value is double_quotation1double_quotation  the Response except for OKAY is received at AXI write." "0,1"
bitfld.long 0x0 21. "CRCERR,When this value is double_quotation1double_quotation  the Rx CRC Error is detected." "0,1"
newline
bitfld.long 0x0 20. "WCERR,When this value is double_quotation1double_quotation  the Word Count Error of Rx Packet length below word count is detected." "0,1"
bitfld.long 0x0 19. "UEXDTERR,When this value is double_quotation1double_quotation  the unexpected Packet Type is received." "0,1"
newline
bitfld.long 0x0 18. "UEXPKTERR,When this value is double_quotation1double_quotation  the unexpected Packet is received." "0,1"
bitfld.long 0x0 17. "ECCERR,When this value is double_quotation1double_quotation  the Rx ECC Error (over 1bit) is detected." "0,1"
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bitfld.long 0x0 16. "MLFERR,When this value is double_quotation1double_quotation  the Rx Packet under 4bit length is received." "0,1"
bitfld.long 0x0 15. "Reserved,This bit is always read as 0. The write value should always be 0." "0,1"
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bitfld.long 0x0 14. "RCVACK,When this value is double_quotation1double_quotation  the ACK trigger is received." "0,1"
bitfld.long 0x0 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 10. "RCVEOT,When this value is double_quotation1double_quotation  the EoTp Packet is received." "0,1"
bitfld.long 0x0 9. "RCVAKE,When this value is double_quotation1double_quotation  the Acknowledge and Error Report Packet is received." "0,1"
newline
bitfld.long 0x0 8. "RCVRESP,When this value is double_quotation1double_quotation  the packet except for Acknowledge and Error Report Packet is received." "0,1"
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "BTAREQEND,When this value is double_quotation1double_quotation  the completion of Transmission request include Rx by TXCMCR.BTAREQ Packet is detected." "0,1"
group.long 0x224++0x7
line.long 0x0 "DSI0_RXPSCR,can read only 0"
rbitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 28. "ECCERR1B,Set to double_quotation1double_quotation to clear the RXPSR.ECCERR1B." "0: No meaning,1: Clear RXPSR"
newline
rbitfld.long 0x0 26.--27. "Reserved_26,Reserved" "0,1,2,3"
bitfld.long 0x0 25. "UEXTRGERR,Set to double_quotation1double_quotation to clear the RXPSR.UEXTRGERR." "0: No meaning,1: Clear RXPSR"
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bitfld.long 0x0 24. "RESPTOERR,Set to double_quotation1double_quotation to clear the RXPSR.RESPTOERR." "0: No meaning,1: Clear RXPSR"
bitfld.long 0x0 23. "OVRERR,Set to double_quotation1double_quotation to clear the RXPSR.OVRERR." "0: No meaning,1: Clear RXPSR"
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bitfld.long 0x0 22. "AXIERR,Set to double_quotation1double_quotation to clear the RXPSR.AXIERR." "0: No meaning,1: Clear RXPSR"
bitfld.long 0x0 21. "CRCERR,Set to double_quotation1double_quotation to clear the RXPSR.CRCERR." "0: No meaning,1: Clear RXPSR"
newline
bitfld.long 0x0 20. "WCERR,Set to double_quotation1double_quotation to clear the RXPSR.WCERR." "0: No meaning,1: Clear RXPSR"
bitfld.long 0x0 19. "UEXDTERR,Set to double_quotation1double_quotation to clear the RXPSR.UEXDTERR." "0: No meaning,1: Clear RXPSR"
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bitfld.long 0x0 18. "UEXPKTERR,Set to double_quotation1double_quotation to clear the RXPSR.UEXPKTERR." "0: No meaning,1: Clear RXPSR"
bitfld.long 0x0 17. "ECCERR,Set to double_quotation1double_quotation to clear the RXPSR.ECCERR." "0: No meaning,1: Clear RXPSR"
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bitfld.long 0x0 16. "MLFERR,Set to double_quotation1double_quotation to clear the RXPSR.MLFERR." "0: No meaning,1: Clear RXPSR"
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
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bitfld.long 0x0 14. "RCVACK,Set to double_quotation1double_quotation to clear the RXPSR.RCVACK." "0: No meaning,1: Clear RXPSR"
rbitfld.long 0x0 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 10. "RCVEOT,Set to double_quotation1double_quotation to clear the RXPSR.RCVEOT." "0: No meaning,1: Clear RXPSR"
bitfld.long 0x0 9. "RCVAKE,Set to double_quotation1double_quotation to clear the RXPSR.RCVAKE." "0: No meaning,1: Clear RXPSR"
newline
bitfld.long 0x0 8. "RCVRESP,Set to double_quotation1double_quotation to clear the RXPSR.RCVRESP." "0: No meaning,1: Clear RXPSR"
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "BTAREQEND,Set to double_quotation1double_quotation to clear the RXPSR.BTAREQEND." "0: No meaning,1: Clear RXPSR"
line.long 0x4 "DSI0_RXPIER,"
rbitfld.long 0x4 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 28. "ECCERR1B,Interrupt enable for RXPSR.ECCERR1B" "0: Disable interrupt of dsi_int_rxp when RXPSR,1: Enable interrupt of dsi_int_rxp when RXPSR"
newline
rbitfld.long 0x4 26.--27. "Reserved_26,Reserved" "0,1,2,3"
bitfld.long 0x4 25. "UEXTRGERR,Interrupt enable for RXPSR.UEXTRGERR" "0: Disable interrupt of dsi_int_rxp when RXPSR,1: Enable interrupt of dsi_int_rxp when RXPSR"
newline
bitfld.long 0x4 24. "RESPTOERR,Interrupt enable for RXPSR.RESPTOERR" "0: Disable interrupt of dsi_int_rxp when RXPSR,1: Enable interrupt of dsi_int_rxp when RXPSR"
bitfld.long 0x4 23. "OVRERR,Interrupt enable for RXPSR.OVRERR" "0: Disable interrupt of dsi_int_rxp when RXPSR,1: Enable interrupt of dsi_int_rxp when RXPSR"
newline
bitfld.long 0x4 22. "AXIERR,Interrupt enable for RXPSR.AXIERR" "0: Disable interrupt of dsi_int_rxp when RXPSR,1: Enable interrupt of dsi_int_rxp when RXPSR"
bitfld.long 0x4 21. "CRCERR,Interrupt enable for RXPSR.CRCERR" "0: Disable interrupt of dsi_int_rxp when RXPSR,1: Enable interrupt of dsi_int_rxp when RXPSR"
newline
bitfld.long 0x4 20. "WCERR,Interrupt enable for RXPSR.WCERR" "0: Disable interrupt of dsi_int_rxp when RXPSR,1: Enable interrupt of dsi_int_rxp when RXPSR"
bitfld.long 0x4 19. "UEXDTERR,Interrupt enable for RXPSR.UEXDTERR" "0: Disable interrupt of dsi_int_rxp when RXPSR,1: Enable interrupt of dsi_int_rxp when RXPSR"
newline
bitfld.long 0x4 18. "UEXPKTERR,Interrupt enable for RXPSR.UEXPKTERR" "0: Disable interrupt of dsi_int_rxp when RXPSR,1: Enable interrupt of dsi_int_rxp when RXPSR"
bitfld.long 0x4 17. "ECCERR,Interrupt enable for RXPSR.ECCERR" "0: Disable interrupt of dsi_int_rxp when RXPSR,1: Enable interrupt of dsi_int_rxp when RXPSR"
newline
bitfld.long 0x4 16. "MLFERR,Interrupt enable for RXPSR.MLFERR" "0: Disable interrupt of dsi_int_rxp when RXPSR,1: Enable interrupt of dsi_int_rxp when RXPSR"
rbitfld.long 0x4 15. "Reserved_15,Reserved" "0,1"
newline
bitfld.long 0x4 14. "RCVACK,Interrupt enable for RXPSR.RCVACK" "0: Disable interrupt of dsi_int_rxp when RXPSR,1: Enable interrupt of dsi_int_rxp when RXPSR"
rbitfld.long 0x4 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 10. "RCVEOT,Interrupt enable for RXPSR.RCVEOT" "0: Disable interrupt of dsi_int_rxp when RXPSR,1: Enable interrupt of dsi_int_rxp when RXPSR"
bitfld.long 0x4 9. "RCVAKE,Interrupt enable for RXPSR.RCVAKE" "0: Disable interrupt of dsi_int_rxp when RXPSR,1: Enable interrupt of dsi_int_rxp when RXPSR"
newline
bitfld.long 0x4 8. "RCVRESP,Interrupt enable for RXPSR.RCVRESP" "0: Disable interrupt of dsi_int_rxp when RXPSR,1: Enable interrupt of dsi_int_rxp when RXPSR"
hexmask.long.byte 0x4 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "BTAREQEND,Interrupt enable for RXPSR.BTAREQEND" "0: Disable interrupt of dsi_int_rxp when RXPSR,1: Enable interrupt of dsi_int_rxp when RXPSR"
group.long 0x230++0x3
line.long 0x0 "DSI0_RXPADDRSET0R,"
hexmask.long 0x0 3.--31. 1. "ADDRL,Set start address for Payload data of Rx Long Packet."
rbitfld.long 0x0 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
group.long 0x238++0x3
line.long 0x0 "DSI0_RXPSIZESETR,"
hexmask.long 0x0 7.--31. 1. "Reserved_7,Reserved"
hexmask.long.byte 0x0 3.--6. 1. "SIZE,Set memory size of AXI by Byte Unit used for payload data of Rx Long Packet."
newline
rbitfld.long 0x0 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
rgroup.long 0x240++0x3
line.long 0x0 "DSI0_RXPHDR,"
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
bitfld.long 0x0 24. "FMT,Packet format of Rx Packet Header." "0: Short Packet,1: Long Packet"
newline
bitfld.long 0x0 22.--23. "VC,Identifier of virtual channel of Rx Packet Header. This value is limited to 3 from 0." "0,1,2,3"
hexmask.long.byte 0x0 16.--21. 1. "DT,Data type of Rx Packet Header."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA1,Data1 of Rx Packet Header."
hexmask.long.byte 0x0 0.--7. 1. "DATA0,Data0 of Rx Packet Header."
rgroup.long 0x250++0xF
line.long 0x0 "DSI0_RXPPD0R,"
hexmask.long 0x0 0.--31. 1. "DATA,Payload Data0 for Rx Long Packet."
line.long 0x4 "DSI0_RXPPD1R,"
hexmask.long 0x4 0.--31. 1. "DATA,Payload Data1 for Rx Long Packet."
line.long 0x8 "DSI0_RXPPD2R,"
hexmask.long 0x8 0.--31. 1. "DATA,Payload Data2 for Rx Long Packet."
line.long 0xC "DSI0_RXPPD3R,"
hexmask.long 0xC 0.--31. 1. "DATA,Payload Data3 for Rx Long Packet."
rgroup.long 0x300++0x3
line.long 0x0 "DSI0_AKEPR,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
bitfld.long 0x0 22.--23. "VC,Identifier of virtual channel of Rx Acknowledge and Error Report Packet. This value is limited to 3 from 0." "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--21. 1. "DT,Data type of Rx Acknowledge and Error Report Packet."
hexmask.long.word 0x0 0.--15. 1. "ERRRPT,Error report of Rx Acknowledge and Error Report Packet."
group.long 0x400++0x3
line.long 0x0 "DSI0_RXRESPTOSETR,"
hexmask.long 0x0 0.--31. 1. "RESPTOVL,Set Timeout value to measure the interval between Start of Rx mode and Start of Packet or Trigger Receive along with Bus Turn-Around with TXCMCR.BTAREQ."
group.long 0x500++0x3
line.long 0x0 "DSI0_TACR,can read only 0"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "TRNREQ,Bus Turn-Around request to Rx from Tx." "0,1"
rgroup.long 0x510++0x3
line.long 0x0 "DSI0_TASR,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 28. "ECCERR1B,When this value is double_quotation1double_quotation  the Rx ECC Error (1bit) is detected." "0,1"
newline
hexmask.long.byte 0x0 20.--27. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "UEXDTERR,When this value is double_quotation1double_quotation  the Packet with unexpected Data Type is received." "0,1"
newline
bitfld.long 0x0 18. "UEXPKTERR,When this value is double_quotation1double_quotation  the unexpected Packet is received." "0,1"
bitfld.long 0x0 17. "ECCERR,When this value is double_quotation1double_quotation  the Rx ECC Error (over 1bit) is detected." "0,1"
newline
bitfld.long 0x0 16. "MLFERR,When this value is double_quotation1double_quotation  the Packet with under 4 byte length is received." "0,1"
bitfld.long 0x0 15. "Reserved,This bit is always read as 0. The write value should always be 0." "0,1"
newline
bitfld.long 0x0 14. "RCVACK,When this value is double_quotation1double_quotation  the ACK trigger is received." "0,1"
bitfld.long 0x0 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 10. "RCVEOT,When this value is double_quotation1double_quotation  the EoTp Packet is detected." "0,1"
bitfld.long 0x0 9. "RCVAKE,When this value is double_quotation1double_quotation  the Acknowledge and Error Report Packet is detected." "0,1"
newline
hexmask.long.byte 0x0 1.--8. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "TRNREQEND,When this value is double_quotation1double_quotation  the completion of Turn-Around by TACR.TRNREQ and the confirmation of the Direction as double_quotation1double_quotation (Rx) are detected." "0,1"
group.long 0x514++0x7
line.long 0x0 "DSI0_TASCR,can read only 0"
rbitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 28. "ECCERR1B,Set to double_quotation1double_quotation to clear the TASR.ECCERR1B." "0: No meaning,1: Clear TASR"
newline
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x0 19. "UEXDTERR,Set to double_quotation1double_quotation to clear the TASR.UEXDTERR." "0: No meaning,1: Clear TASR"
bitfld.long 0x0 18. "UEXPKTERR,Set to double_quotation1double_quotation to clear the TASR.UEXPKTERR." "0: No meaning,1: Clear TASR"
newline
bitfld.long 0x0 17. "ECCERR,Set to double_quotation1double_quotation to clear the TASR.ECCERR." "0: No meaning,1: Clear TASR"
bitfld.long 0x0 16. "MLFERR,Set to double_quotation1double_quotation to clear the TASR.MLFERR." "0: No meaning,1: Clear TASR"
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 14. "RCVACK,Set to double_quotation1double_quotation to clear the TASR.RCVACK." "0: No meaning,1: Clear TASR"
newline
rbitfld.long 0x0 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 10. "RCVEOT,Set to double_quotation1double_quotation to clear the TASR.RCVEOT." "0: No meaning,1: Clear TASR"
newline
bitfld.long 0x0 9. "RCVAKE,Set to double_quotation1double_quotation to clear the TASR.RCVAKE." "0: No meaning,1: Clear TASR"
hexmask.long.byte 0x0 1.--8. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "TRNREQEND,Set to double_quotation1double_quotation to clear the TASR.TRNREQEND." "0: No meaning,1: Clear TASR"
line.long 0x4 "DSI0_TAIER,"
rbitfld.long 0x4 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 28. "ECCERR1B,Interrupt enable for TASR.ECCERR1B" "0: Disable interrupt of dsi_int_ta when TASR,1: Enable interrupt of dsi_int_ta when TASR"
newline
hexmask.long.byte 0x4 24.--27. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x4 19. "UEXDTERR,Interrupt enable for TASR.UEXDTERR" "0: Disable interrupt of dsi_int_ta when TASR,1: Enable interrupt of dsi_int_ta when TASR"
bitfld.long 0x4 18. "UEXPKTERR,Interrupt enable for TASR.UEXPKTERR" "0: Disable interrupt of dsi_int_ta when TASR,1: Enable interrupt of dsi_int_ta when TASR"
newline
bitfld.long 0x4 17. "ECCERR,Interrupt enable for TASR.ECCERR" "0: Disable interrupt of dsi_int_ta when TASR,1: Enable interrupt of dsi_int_ta when TASR"
bitfld.long 0x4 16. "MLFERR,Interrupt enable for TASR.MLFERR" "0: Disable interrupt of dsi_int_ta when TASR,1: Enable interrupt of dsi_int_ta when TASR"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x4 14. "RCVACK,Interrupt enable for TASR.RCVACK" "0: Disable interrupt of dsi_int_ta when TASR,1: Enable interrupt of dsi_int_ta when TASR"
newline
rbitfld.long 0x4 11.--13. "Reserved_11,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 10. "RCVEOT,Interrupt enable for TASR.RCVEOT" "0: Disable interrupt of dsi_int_ta when TASR,1: Enable interrupt of dsi_int_ta when TASR"
newline
bitfld.long 0x4 9. "RCVAKE,Interrupt enable for TASR.RCVAKE" "0: Disable interrupt of dsi_int_ta when TASR,1: Enable interrupt of dsi_int_ta when TASR"
hexmask.long.byte 0x4 1.--8. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "TRNREQEND,Interrupt enable for TASR.TRNREQEND" "0: Disable interrupt of dsi_int_ta when TASR,1: Enable interrupt of dsi_int_ta when TASR"
group.long 0x600++0xB
line.long 0x0 "DSI0_TOSET0R,"
hexmask.long 0x0 0.--31. 1. "HTXTOVL,Set Host Tx Timeout value (HTX_TO)."
line.long 0x4 "DSI0_TOSET1R,"
hexmask.long 0x4 0.--31. 1. "LRXHTOVL,Set Host LP Rx Timeout value (LRX_H_TO)."
line.long 0x8 "DSI0_TOSET2R,"
hexmask.long 0x8 0.--31. 1. "TATOVL,Set Turn-Around Timeout value (TA_TO)."
rgroup.long 0x610++0x3
line.long 0x0 "DSI0_TOSR,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved"
bitfld.long 0x0 2. "TATO,When this value is double_quotation1double_quotation  the Turn-Around Timeout (TA_TO) is detected." "0,1"
newline
bitfld.long 0x0 1. "LRXHTO,When this value is double_quotation1double_quotation  the Host LP Rx Timeout (LRX_H_TO) is detected." "0,1"
bitfld.long 0x0 0. "HTXTO,When this value is double_quotation1double_quotation  the Host HS Tx Timeout (HTX_TO) is detected." "0,1"
group.long 0x614++0x7
line.long 0x0 "DSI0_TOSCR,can read only 0"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved"
bitfld.long 0x0 2. "TATO,Set to double_quotation1double_quotation after detection of the Turn-Around Timeout (TA_TO) to detect the next one." "0: No meaning,1: Clear TOSR"
newline
bitfld.long 0x0 1. "LRXHTO,Set to double_quotation1double_quotation after detection of the Host LP Rx Timeout (LRX_H_TO) to detect the next one." "0: No meaning,1: Clear TOSR"
bitfld.long 0x0 0. "HTXTO,Set to double_quotation1double_quotation after detection of the Host HS Tx Timeout (HTX_TO) to detect the next one." "0: No meaning,1: Clear TOSR"
line.long 0x4 "DSI0_TOIER,"
hexmask.long 0x4 3.--31. 1. "Reserved_3,Reserved"
bitfld.long 0x4 2. "TATO,Interrupt enable for Turn-Around Timeout (TA_TO)." "0: Disable interrupt of dsi_int_to when TOSR,1: Enable interrupt of dsi_int_to when TOSR"
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bitfld.long 0x4 1. "LRXHTO,Interrupt enable for Host LP Rx Timeout (LRX_H_TO)." "0: Disable interrupt of dsi_int_to when TOSR,1: Enable interrupt of dsi_int_to when TOSR"
bitfld.long 0x4 0. "HTXTO,Interrupt enable for Host HS Tx Timeout (HTX_TO)." "0: Disable interrupt of dsi_int_to when TOSR,1: Enable interrupt of dsi_int_to when TOSR"
group.long 0x700++0x3
line.long 0x0 "DSI0_PPISETR,"
hexmask.long.byte 0x0 27.--31. 1. "Reserved_27,Reserved"
bitfld.long 0x0 24.--26. "ULPSWKUP,Set Twake-up period of ULPS." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 17.--23. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "DL0TRNDIS,Turn-Around is disabled by PPI Data Lane0 TurnDisable." "0,1"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "CLEN,Clock Lane is enabled by PPI Clock Lane Enable." "0,1"
newline
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "DLEN,Data Lane is enabled by each PPI Data Lane Enable."
group.long 0x710++0x3
line.long 0x0 "DSI0_PPICLCR,can read only 0"
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "TXREQHS,Start HS Clock on Clock Lane by PPI Clock Lane TxRequestHS." "0: No HS transmission,1: Request for HS transmission"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "TXULPSEXT,When write double_quotation1double_quotation  request to exit from Ultra-low Power State (ULPS) by PPI Clock Lane TxUlpsExit." "0,1"
newline
bitfld.long 0x0 0. "TXULPSCLK,When write double_quotation1double_quotation  request to transition to Ultra-low Power State (ULPS) by PPI Clock Lane TxUlpsClk." "0,1"
rgroup.long 0x720++0x3
line.long 0x0 "DSI0_PPICLSR,This Initial Value is depend on ppi_cl_stopstate."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
bitfld.long 0x0 27. "HSTOLP,When this value is double_quotation1double_quotation  the transition to LP from HS is occurred." "0,1"
newline
bitfld.long 0x0 26. "TOHS,When this value is double_quotation1double_quotation  the transition to HS is occurred." "0,1"
bitfld.long 0x0 25. "FROMULPS,When this value is double_quotation1double_quotation  the Exit from ULSP is detected." "0,1"
newline
bitfld.long 0x0 24. "TOULPS,When this value is double_quotation1double_quotation  the Enter to ULSP is detected." "0,1"
hexmask.long.tbyte 0x0 2.--23. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "ULPSACTN,Status of UlpsActiveNot on PPI Clock Lane." "0,1"
bitfld.long 0x0 0. "STPST,Status of Stopstate on PPI Clock Lane." "0,1"
group.long 0x724++0x7
line.long 0x0 "DSI0_PPICLSCR,can read only 0"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
bitfld.long 0x0 27. "HSTOLP,Set to double_quotation1double_quotation to clear PPICLSR.HSTOLP." "0: No meaning,1: Clear PPICLSR"
newline
bitfld.long 0x0 26. "TOHS,Set to double_quotation1double_quotation to clear PPICLSR.TOHS." "0: No meaning,1: Clear PPICLSR"
bitfld.long 0x0 25. "FROMULPS,Set to double_quotation1double_quotation to clear PPICLSR.FROMULPS." "0: No meaning,1: Clear PPICLSR"
newline
bitfld.long 0x0 24. "TOULPS,Set to double_quotation1double_quotation to clear PPICLSR.TOULPS." "0: No meaning,1: Clear PPICLSR"
hexmask.long.tbyte 0x0 0.--23. 1. "Reserved_0,Reserved"
line.long 0x4 "DSI0_PPICLIER,"
hexmask.long.byte 0x4 28.--31. 1. "Reserved_28,Reserved"
bitfld.long 0x4 27. "HSTOLP,Interrupt enable for the transition to LP from HS." "0: Disable interrupt of dsi_int_ppicl when PPICLSR,1: Enable interrupt of dsi_int_ppicl when PPICLSR"
newline
bitfld.long 0x4 26. "TOHS,Interrupt enable for the transition to HS." "0: Disable interrupt of dsi_int_ppicl when PPICLSR,1: Enable interrupt of dsi_int_ppicl when PPICLSR"
bitfld.long 0x4 25. "FROMULPS,Interrupt enable for the transition from ULPS." "0: Disable interrupt of dsi_int_ppicl when PPICLSR,1: Enable interrupt of dsi_int_ppicl when PPICLSR"
newline
bitfld.long 0x4 24. "TOULPS,Interrupt enable for the transition to ULPS." "0: Disable interrupt of dsi_int_ppicl when PPICLSR,1: Enable interrupt of dsi_int_ppicl when PPICLSR"
hexmask.long.tbyte 0x4 0.--23. 1. "Reserved_0,Reserved"
group.long 0x730++0x3
line.long 0x0 "DSI0_PPIDL0CR,can read only 0"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "TXTRGESC,Set to double_quotation1double_quotation to request the Each TxTriggerEsc on PPI Data Lane0."
rgroup.long 0x740++0x3
line.long 0x0 "DSI0_PPIDL0SR,This Initial Value is depend on ppi_dl0_stopstate."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "ERRCLP1,When this value is double_quotation1double_quotation  the Contention Error of LP1 (ErrContentionLP1) is detected on PPI Data Lane0." "0,1"
newline
bitfld.long 0x0 19. "ERRCLP0,When this value is double_quotation1double_quotation  the Contention Error of LP0 (ErrContentionLP0) is detected on PPI Data Lane0." "0,1"
bitfld.long 0x0 18. "ERRCTRL,When this value is double_quotation1double_quotation  the Control Error (ErrControl) is detected on PPI Data Lane0." "0,1"
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bitfld.long 0x0 17. "ERRSYNESC,When this value is double_quotation1double_quotation  the Sync Error of LPDT (ErrSyncEsc) is detected on PPI Data Lane0." "0,1"
bitfld.long 0x0 16. "ERRESC,When this value is double_quotation1double_quotation  the Escape mode Entry Error (ErrEsc) is detected on PPI Data Lane0." "0,1"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
bitfld.long 0x0 10. "DIR,Direction (Tx or Rx) of PPI Data Lane0" "0,1"
newline
bitfld.long 0x0 9. "TX2RX,When this value is double_quotation1double_quotation  the the transition of Direction from 0 (Tx) to 1(Rx) is detected on PPI Data Lane0." "0,1"
bitfld.long 0x0 8. "RX2TX,When this value is double_quotation1double_quotation  the the transition of Direction from 1(Rx) to 0 (Tx) is detected on PPI Data Lane0." "0,1"
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bitfld.long 0x0 7. "ULPSACTN,Status of UlpsActiveNot on PPI Data Lane0." "0,1"
bitfld.long 0x0 6. "STPST,Status of Stopstate on Data Lane0." "0,1"
newline
bitfld.long 0x0 5. "RXULPSESC,Status of RxULPSEsc on PPI Data Lane0." "0,1"
bitfld.long 0x0 4. "RXLPDTESC,Status of RxLpdtEsc on Data Lane0." "0,1"
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hexmask.long.byte 0x0 0.--3. 1. "RXTRGESC,When this value is double_quotation1double_quotation  the Event of Escape mode Rx Trigger is detected on PPI Data Lane0."
group.long 0x744++0x7
line.long 0x0 "DSI0_PPIDL0SCR,can read only 0"
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "ERRCLP1,Set to double_quotation1double_quotation to clear PPIDL0SR.ERRCLP1." "0: No meaning,1: Clear PPIDL0SR"
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bitfld.long 0x0 19. "ERRCLP0,Set to double_quotation1double_quotation to clear PPIDL0SR.ERRCLP0." "0: No meaning,1: Clear PPIDL0SR"
bitfld.long 0x0 18. "ERRCTRL,Set to double_quotation1double_quotation to clear PPIDL0SR.ERRCTRL." "0: No meaning,1: Clear PPIDL0SR"
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bitfld.long 0x0 17. "ERRSYNESC,Set to double_quotation1double_quotation to clear PPIDL0SR.ERRSYNESC." "0: No meaning,1: Clear PPIDL0SR"
bitfld.long 0x0 16. "ERRESC,Set to double_quotation1double_quotation to clear PPIDL0SR.ERRESC." "0: No meaning,1: Clear PPIDL0SR"
newline
hexmask.long.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "TX2RX,Set to double_quotation1double_quotation to clear PPIDL0SR.TX2RX." "0: No meaning,1: Clear PPIDL0SR"
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bitfld.long 0x0 8. "RX2TX,Set to double_quotation1double_quotation to clear PPIDL0SR.RX2TX." "0: No meaning,1: Clear PPIDL0SR"
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved"
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hexmask.long.byte 0x0 0.--3. 1. "RXTRGESC,Set to double_quotation1double_quotation to clear PPIDL0SR.RXTRGESC[3:0] for each bit."
line.long 0x4 "DSI0_PPIDL0IER,"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "ERRCLP1,Interrupt enable for the Contention Error of LP1 on PPI Data Lane0 (ErrContentionLP1)" "0: Disable interrupt of dsi_int_ppidl0 when PPIDL0SR,1: Enable interrupt of dsi_int_ppidl0 when PPIDL0SR"
newline
bitfld.long 0x4 19. "ERRCLP0,Interrupt enable for the Contention Error of LP0 on PPI Data Lane0 (ErrContentionLP0)" "0: Disable interrupt of dsi_int_ppidl0 when PPIDL0SR,1: Enable interrupt of dsi_int_ppidl0 when PPIDL0SR"
bitfld.long 0x4 18. "ERRCTRL,Interrupt enable for the Control Error on PPI Data Lane0 (ErrControl)" "0: Disable interrupt of dsi_int_ppidl0 when PPIDL0SR,1: Enable interrupt of dsi_int_ppidl0 when PPIDL0SR"
newline
bitfld.long 0x4 17. "ERRSYNESC,Interrupt enable for the LPDT Sync Error on PPI Data Lane0 (ErrSyncEsc)" "0: Disable interrupt of dsi_int_ppidl0 when PPIDL0SR,1: Enable interrupt of dsi_int_ppidl0 when PPIDL0SR"
bitfld.long 0x4 16. "ERRESC,Interrupt enable for the Escape mode Error on PPI Data Lane0 (ErrEsc)" "0: Disable interrupt of dsi_int_ppidl0 when PPIDL0,1: Enable interrupt of dsi_int_ppidl0 when PPIDL0"
newline
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
bitfld.long 0x4 9. "TX2RX,Interrupt enable for PPIDL0SR.TX2RX" "0: Disable interrupt of dsi_int_ppidl0 when PPIDL0SR,1: Enable interrupt of dsi_int_ppidl0 when PPIDL0SR"
newline
bitfld.long 0x4 8. "RX2TX,Interrupt enable for PPIDL0SR.RX2TX" "0: Disable interrupt of dsi_int_ppidl0 when PPIDL0SR,1: Enable interrupt of dsi_int_ppidl0 when PPIDL0SR"
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "RXTRGESC,Interrupt enable for Escape mode Rx Trigger Event on PPI Data Lane0"
group.long 0x750++0x3
line.long 0x0 "DSI0_PPIDLCR,can read only 0"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "TXULPSEXT,Set to double_quotation1double_quotation to request the UPLS Exit by TxUlpsExit on all PPI Data Lane." "0: No meaning,1: Request the Exit from UPLS"
newline
bitfld.long 0x0 0. "TXULPSESC,Set to double_quotation1double_quotation to request the transition to ULPS by TxUlpsEsc on all PPI Data Lane." "0: No meaning,1: Request the transition to ULPS"
rgroup.long 0x760++0x3
line.long 0x0 "DSI0_PPIDLSR,This Initial Value is depend on the value of ppi_dl0_stopstate. ppi_dl1_stopstate. ppi_dl2_stopstate and ppi_dl3_stopstate in Input Signal."
hexmask.long.byte 0x0 26.--31. 1. "Reserved_26,Reserved"
bitfld.long 0x0 25. "FROMULPS,When this value is double_quotation1double_quotation  the transition to StopState from ULPS by ULPS Exit Request is detected on all PPI Data Lane enabled by PPISETR.DLEN." "0,1"
newline
bitfld.long 0x0 24. "TOULPS,When this value is double_quotation1double_quotation  the transition to ULPS by PPIDLCR.TXULPSESC is detected on all PPI Data Lane enabled by PPISETR.DLEN." "0,1"
hexmask.long.word 0x0 8.--23. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "ULPSACTN,Status of UlpsActiveNot on PPI Data Lane."
hexmask.long.byte 0x0 0.--3. 1. "STPST,Status of Stopstate on PPI Data Lane."
group.long 0x764++0x7
line.long 0x0 "DSI0_PPIDLSCR,can read only 0"
hexmask.long.byte 0x0 26.--31. 1. "Reserved_26,Reserved"
bitfld.long 0x0 25. "FROMULPS,Set to double_quotation1double_quotation to clear PPIDLSR.FROMULPS." "0: No meaning,1: Clear PPIDLSR"
newline
bitfld.long 0x0 24. "TOULPS,Set to double_quotation1double_quotation to clear PPIDLSR.TOULPS." "0: No meaning,1: Clear PPIDLSR"
hexmask.long.tbyte 0x0 0.--23. 1. "Reserved_0,Reserved"
line.long 0x4 "DSI0_PPIDLIER,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved"
bitfld.long 0x4 25. "FROMULPS,Interrupt enable for the transition from ULPS on all PPI Data Lane" "0: Disable interrupt of dsi_int_ppidl when PPIDLSR,1: Enable interrupt of dsi_int_ppidl when PPIDLSR"
newline
bitfld.long 0x4 24. "TOULPS,Interrupt enable for the transition to ULPS on all PPI Data Lane" "0: Disable interrupt of dsi_int_ppidl when PPIDLSR,1: Enable interrupt of dsi_int_ppidl when PPIDLSR"
hexmask.long.tbyte 0x4 0.--23. 1. "Reserved_0,Reserved"
group.long 0x900++0x3
line.long 0x0 "DSI0_SCALCR,can read only 0"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CALTYP,Choice of effective value for the period of TxSkewCalHS." "0: SCALPSR is effective when CALREQ=1,1: SCALPS1R is effective when CALREQ=1"
newline
bitfld.long 0x0 0. "CALREQ,Enable TxSkewCalHS on all Data Lane." "0: No meaning,1: Enable TxSkewCalHS with period based on the.."
rgroup.long 0x910++0x3
line.long 0x0 "DSI0_SCALSR,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CALREQEND,When this value is double_quotation1double_quotation  the Completion of Skew Calibration by SCALCR.CALREQ is detected or the Completion of Skew Calibration by TXVMSET(F(i))R.VSEN=1 is detecteded." "0,1"
group.long 0x914++0x7
line.long 0x0 "DSI0_SCALSCR,can read only 0"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CALREQEND,Set to double_quotation1double_quotation to clear SCALSR.CALREQEND." "0: No meaning,1: Clear SCALSR"
line.long 0x4 "DSI0_SCALIER,"
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "CALREQEND,Interrupt enable for SCALSR.CALREQEND" "0: Disable interrupt of dsi_int_scal when SCALSR,1: Enable interrupt of dsi_int_scal when SCALSR"
group.long 0x920++0x7
line.long 0x0 "DSI0_SCALPSR,"
hexmask.long 0x0 0.--31. 1. "PTNSZ,Period for transmission of Skew Calibration Pattern on Skew Calibration. (Unit: hsclk) Asserts TxSkewCalHS for the duration of (field value +1) cycle period."
line.long 0x4 "DSI0_SCALPS1R,"
hexmask.long 0x4 0.--31. 1. "PTNSZ,Period for transmission of Skew Calibration Pattern on Skew Calibration. (Unit: hsclk) Asserts TxSkewCalHS for the duration of (field value +1) cycle period."
group.long 0xA00++0x3
line.long 0x0 "DSI0_IPSETR,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CSI2M,Tx mode configuration for this Transmitter" "0: DSI mode,1: CSI-2 mode"
group.long 0xA80++0x3
line.long 0x0 "DSI0_TXVMFTCR,"
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
rbitfld.long 0x0 16.--17. "FTCUR,Indicates the type of outbound frame you are currently sending while in video mode." "0,1,2,3"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "FTNXT,During video mode operation  set the frame type to send to the next frame." "0,1,2,3"
group.long 0xAA0++0x63
line.long 0x0 "DSI0_TXVMSETF1R,"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "VSEN,Refer to 67.2.2.18" "0,1"
newline
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved"
line.long 0x4 "DSI0_TXVMSET2F1R,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "FNUM,Refer to 67.2.2.19"
line.long 0x8 "DSI0_TXVMPSPHSETF1R,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved."
bitfld.long 0x8 22.--23. "VC,Refer to 67.2.2.24" "0,1,2,3"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT,Refer to 67.2.2.24"
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved."
line.long 0xC "DSI0_TXVMVPRMSET0F1R,"
hexmask.long 0xC 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0xC 4.--5. "CSPC,Refer to 67.2.2.25" "0,1,2,3"
newline
hexmask.long.byte 0xC 0.--3. 1. "Reserved_0,Reserved."
line.long 0x10 "DSI0_TXVMVPRMSET1F1R,"
rbitfld.long 0x10 31. "Reserved_31,Reserved." "0,1"
hexmask.long.word 0x10 16.--30. 1. "VACTIVE,Refer to 67.2.2.26"
newline
bitfld.long 0x10 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x10 14. "VSAVW,Allows the number of lines in a VSA period to vary." "0,1"
newline
rbitfld.long 0x10 12.--13. "Reserved_12,Reserved" "0,1,2,3"
hexmask.long.word 0x10 0.--11. 1. "VSA,Refer to 67.2.2.26"
line.long 0x14 "DSI0_TXVMVPRMSET2F1R,"
bitfld.long 0x14 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x14 30. "VFPVW,Allows the number of lines in a VFP period to vary." "0,1"
newline
rbitfld.long 0x14 29. "Reserved_29,Reserved" "0,1"
hexmask.long.word 0x14 16.--28. 1. "VFP,Refer to 67.2.2.27"
newline
bitfld.long 0x14 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x14 14. "VBPVW,Allows the number of lines in a VBP period to vary." "0,1"
newline
rbitfld.long 0x14 13. "Reserved_13,Reserved" "0,1"
hexmask.long.word 0x14 0.--12. 1. "VBP,Refer to 67.2.2.27"
line.long 0x18 "DSI0_TXVMVPRMSET3F1R,"
rbitfld.long 0x18 31. "Reserved_31,Reserved." "0,1"
hexmask.long.word 0x18 16.--30. 1. "HACTIVE,Refer to 67.2.2.28"
newline
hexmask.long.byte 0x18 12.--15. 1. "HSBYTE,Refer to 67.2.2.28"
hexmask.long.word 0x18 0.--11. 1. "HSA,Refer to 67.2.2.28"
line.long 0x1C "DSI0_TXVMVPRMSET4F1R,"
rbitfld.long 0x1C 29.--31. "Reserved_29,Reserved." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x1C 16.--28. 1. "HFP,Refer to 67.2.2.29"
newline
rbitfld.long 0x1C 13.--15. "Reserved_13,Reserved." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x1C 0.--12. 1. "HBP,Refer to 67.2.2.29"
line.long 0x20 "DSI0_TXVMSETF2R,"
hexmask.long 0x20 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x20 4. "VSEN,Refer to 67.2.2.18" "0,1"
newline
hexmask.long.byte 0x20 0.--3. 1. "Reserved_0,Reserved"
line.long 0x24 "DSI0_TXVMSET2F2R,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x24 0.--15. 1. "FNUM,Refer to 67.2.2.19"
line.long 0x28 "DSI0_TXVMPSPHSETF2R,"
hexmask.long.byte 0x28 24.--31. 1. "Reserved_24,Reserved."
bitfld.long 0x28 22.--23. "VC,Refer to 67.2.2.24" "0,1,2,3"
newline
hexmask.long.byte 0x28 16.--21. 1. "DT,Refer to 67.2.2.24"
hexmask.long.word 0x28 0.--15. 1. "Reserved_0,Reserved."
line.long 0x2C "DSI0_TXVMVPRMSET0F2R,"
hexmask.long 0x2C 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x2C 4.--5. "CSPC,Refer to 67.2.2.25" "0,1,2,3"
newline
hexmask.long.byte 0x2C 0.--3. 1. "Reserved_0,Reserved."
line.long 0x30 "DSI0_TXVMVPRMSET1F2R,"
rbitfld.long 0x30 31. "Reserved_31,Reserved." "0,1"
hexmask.long.word 0x30 16.--30. 1. "VACTIVE,Refer to 67.2.2.26"
newline
bitfld.long 0x30 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x30 14. "VSAVW,Allows the number of lines in a VSA period to vary." "0,1"
newline
rbitfld.long 0x30 12.--13. "Reserved_12,Reserved" "0,1,2,3"
hexmask.long.word 0x30 0.--11. 1. "VSA,Refer to 67.2.2.26"
line.long 0x34 "DSI0_TXVMVPRMSET2F2R,"
bitfld.long 0x34 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x34 30. "VFPVW,Allows the number of lines in a VFP period to vary." "0,1"
newline
rbitfld.long 0x34 29. "Reserved_29,Reserved" "0,1"
hexmask.long.word 0x34 16.--28. 1. "VFP,Refer to 67.2.2.27"
newline
bitfld.long 0x34 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x34 14. "VBPVW,Allows the number of lines in a VBP period to vary." "0,1"
newline
rbitfld.long 0x34 13. "Reserved_13,Reserved" "0,1"
hexmask.long.word 0x34 0.--12. 1. "VBP,Refer to 67.2.2.27"
line.long 0x38 "DSI0_TXVMVPRMSET3F2R,"
rbitfld.long 0x38 31. "Reserved_31,Reserved." "0,1"
hexmask.long.word 0x38 16.--30. 1. "HACTIVE,Refer to 67.2.2.28"
newline
hexmask.long.byte 0x38 12.--15. 1. "HSBYTE,Refer to 67.2.2.28"
hexmask.long.word 0x38 0.--11. 1. "HSA,Refer to 67.2.2.28"
line.long 0x3C "DSI0_TXVMVPRMSET4F2R,"
rbitfld.long 0x3C 29.--31. "Reserved_29,Reserved." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x3C 16.--28. 1. "HFP,Refer to 67.2.2.29"
newline
rbitfld.long 0x3C 13.--15. "Reserved_13,Reserved." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x3C 0.--12. 1. "HBP,Refer to 67.2.2.29"
line.long 0x40 "DSI0_TXVMSETF3R,"
hexmask.long 0x40 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x40 4. "VSEN,Refer to 67.2.2.18" "0,1"
newline
hexmask.long.byte 0x40 0.--3. 1. "Reserved_0,Reserved"
line.long 0x44 "DSI0_TXVMSET2F3R,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x44 0.--15. 1. "FNUM,Refer to 67.2.2.19"
line.long 0x48 "DSI0_TXVMPSPHSETF3R,"
hexmask.long.byte 0x48 24.--31. 1. "Reserved_24,Reserved."
bitfld.long 0x48 22.--23. "VC,Refer to 67.2.2.24" "0,1,2,3"
newline
hexmask.long.byte 0x48 16.--21. 1. "DT,Refer to 67.2.2.24"
hexmask.long.word 0x48 0.--15. 1. "Reserved_0,Reserved."
line.long 0x4C "DSI0_TXVMVPRMSET0F3R,"
hexmask.long 0x4C 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x4C 4.--5. "CSPC,Refer to 67.2.2.25" "0,1,2,3"
newline
hexmask.long.byte 0x4C 0.--3. 1. "Reserved_0,Reserved."
line.long 0x50 "DSI0_TXVMVPRMSET1F3R,"
rbitfld.long 0x50 31. "Reserved_31,Reserved." "0,1"
hexmask.long.word 0x50 16.--30. 1. "VACTIVE,Refer to 67.2.2.26"
newline
bitfld.long 0x50 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x50 14. "VSAVW,Allows the number of lines in a VSA period to vary." "0,1"
newline
rbitfld.long 0x50 12.--13. "Reserved_12,Reserved" "0,1,2,3"
hexmask.long.word 0x50 0.--11. 1. "VSA,Refer to 67.2.2.26"
line.long 0x54 "DSI0_TXVMVPRMSET2F3R,"
bitfld.long 0x54 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x54 30. "VFPVW,Allows the number of lines in a VFP period to vary." "0,1"
newline
rbitfld.long 0x54 29. "Reserved_29,Reserved" "0,1"
hexmask.long.word 0x54 16.--28. 1. "VFP,Refer to 67.2.2.27"
newline
bitfld.long 0x54 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x54 14. "VBPVW,Allows the number of lines in a VBP period to vary." "0,1"
newline
rbitfld.long 0x54 13. "Reserved_13,Reserved" "0,1"
hexmask.long.word 0x54 0.--12. 1. "VBP,Refer to 67.2.2.27"
line.long 0x58 "DSI0_TXVMVPRMSET3F3R,"
rbitfld.long 0x58 31. "Reserved_31,Reserved." "0,1"
hexmask.long.word 0x58 16.--30. 1. "HACTIVE,Refer to 67.2.2.28"
newline
hexmask.long.byte 0x58 12.--15. 1. "HSBYTE,Refer to 67.2.2.28"
hexmask.long.word 0x58 0.--11. 1. "HSA,Refer to 67.2.2.28"
line.long 0x5C "DSI0_TXVMVPRMSET4F3R,"
rbitfld.long 0x5C 29.--31. "Reserved_29,Reserved." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x5C 16.--28. 1. "HFP,Refer to 67.2.2.29"
newline
rbitfld.long 0x5C 13.--15. "Reserved_13,Reserved." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x5C 0.--12. 1. "HBP,Refer to 67.2.2.29"
line.long 0x60 "DSI0_FDSETR,"
hexmask.long.byte 0x60 26.--31. 1. "Reserved_26,Reserved."
bitfld.long 0x60 24.--25. "VFCENF3,Enable Tx Frame CRC at every Frame in Video mode for FrameType3 (TXVMFTCR.FTNXT=H'3)" "0: Disable,1: Enable,?,?"
newline
hexmask.long.byte 0x60 18.--23. 1. "Reserved_18,Reserved."
bitfld.long 0x60 16.--17. "VFCENF2,Enable Tx Frame CRC at every Frame in Video mode for FrameType2 (TXVMFTCR.FTNXT=H'2)" "0: Disable,1: Enable,?,?"
newline
hexmask.long.byte 0x60 10.--15. 1. "Reserved_10,Reserved."
bitfld.long 0x60 8.--9. "VFCENF1,Enable Tx Frame CRC at every Frame in Video mode for FrameType1 (TXVMFTCR.FTNXT=H'1)" "0: Disable,1: Enable,?,?"
newline
hexmask.long.byte 0x60 2.--7. 1. "Reserved_2,Reserved."
bitfld.long 0x60 0.--1. "VFCEN,Enable Tx Frame CRC at every Frame in Video mode for FrameType0 (TXVMFTCR.FTNXT=H'0)" "0: Disable,1: Enable,?,?"
group.long 0xB10++0x3
line.long 0x0 "DSI0_FDCR,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x0 1. "DTTEN,Enable Tx Video Packet Inspection Timer" "0: Disable,1: Enable"
newline
bitfld.long 0x0 0. "PPITEN,Enable Tx PPI Inspection Timer" "0: Disable,1: Enable"
rgroup.long 0xB20++0x3
line.long 0x0 "DSI0_FDSR,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved."
bitfld.long 0x0 16. "VINERR,When this value is double_quotation1double_quotation  unexpected Video signal input is detected." "0,1"
newline
hexmask.long.byte 0x0 10.--15. 1. "Reserved_10,Reserved."
bitfld.long 0x0 9. "DTTACT,Status of the Timer for Tx Packet Inspection at the internal of this module" "0: Timer is disabled,1: Timer is Enabled"
newline
bitfld.long 0x0 8. "PPITACT,Status of the Timer for Tx Packet Inspection at the PPI end" "0: Timer is disabled,1: Timer is Enabled"
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved."
newline
bitfld.long 0x0 1. "DTTO,When this value is double_quotation1double_quotation  the transmission is not executed within the period specified by FDDTTMSETR register." "0,1"
bitfld.long 0x0 0. "PPITO,When this value is double_quotation1double_quotation  the Tx PPI is not executed within the period specified by FDDTTMSETR register." "0,1"
group.long 0xB24++0x7
line.long 0x0 "DSI0_FDSCR,can read only 0"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "VINERR,Set to double_quotation1double_quotation to clear the FDSR.VINERR." "0: No meaning,1: Clear FDSR"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "DTTO,Set to double_quotation1double_quotation to clear the FDSR.DTTO." "0: No meaning,1: Clear FDSR"
newline
bitfld.long 0x0 0. "PPITO,Set to double_quotation1double_quotation to clear the FDSR.PPITO." "0: No meaning,1: Clear FDSR"
line.long 0x4 "DSI0_FDIER,"
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x4 16. "VINERR,Interrupt enable for FDSR.VINERR" "0: Disable interrupt of dsi_int_fd when FDSR,1: Enable interrupt of dsi_int_fd when FDSR"
newline
hexmask.long.word 0x4 2.--15. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "DTTO,Interrupt enable for FDSR.DTTO" "0: Disable interrupt of dsi_int_fd when FDSR,1: Enable interrupt of dsi_int_fd when FDSR"
newline
bitfld.long 0x4 0. "PPITO,Interrupt enable for FDSR.PPITO" "0: Disable interrupt of dsi_int_fd when FDSR,1: Enable interrupt of dsi_int_fd when FDSR"
group.long 0xB30++0x3
line.long 0x0 "DSI0_FDPPITMSETR,"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 28.--29. "PPITCSCL,Multiplier for Tx PPI Inspection timer" "0: multiplied by 1,1: multiplied by 1024,2: multiplied by 1048576,?"
newline
rbitfld.long 0x0 26.--27. "Reserved_26,Reserved" "0,1,2,3"
hexmask.long.word 0x0 16.--25. 1. "PPITCVL,Cycle count value for Tx PPI Inspection timer"
newline
bitfld.long 0x0 15. "SPDTYP,Transfer speed of the Packet" "0: High Speed,1: Low Power"
rbitfld.long 0x0 14. "Reserved_14,Reserved" "0,1"
newline
bitfld.long 0x0 12.--13. "PPITOSCL,Multiplier for Timeout period of Tx PPI Inspection timer" "0: multiplied by 1,1: multiplied by 1024,2: multiplied by 1048576,?"
rbitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--9. 1. "PPITOVL,Timeout count for Tx PPI Inspection timer"
group.long 0xB40++0xB
line.long 0x0 "DSI0_FDDTTMSETR,hs2clk: hsclk(byteclock)*1/2 (internal clock of Link)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "SPDTYP,Transfer speed of the Packet" "0: High Speed,1: Low Power"
newline
rbitfld.long 0x0 14. "Reserved_14,Reserved" "0,1"
bitfld.long 0x0 12.--13. "DTTOSCL,Multiplier for Timeout period of Tx Packet Inspection timer" "0: multiplied by 1,1: multiplied by 1024,2: multiplied by 1048576,?"
newline
rbitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
hexmask.long.word 0x0 0.--9. 1. "DTTOVL,Timeout count for Tx Packet Inspection timer."
line.long 0x4 "DSI0_FDDTEN0R,"
hexmask.long 0x4 0.--31. 1. "DTENL,Configuration for Data Type of Tx Packet Inspection timer. (to H'1F from H'00)"
line.long 0x8 "DSI0_FDDTEN1R,"
hexmask.long 0x8 0.--31. 1. "DTENH,Configuration for Data Type of Tx Packet Inspection timer. (to H'3F from H'20)"
group.long 0x1000++0x7
line.long 0x0 "DSI0_LPCLKSET,DSIphy should be 800MHz."
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "CKEN,Enable for lpclk output" "0: STOP,1: Enable"
newline
hexmask.long.byte 0x0 0.--7. 1. "LPCLKDIV,Divider configuration for frequency of lpclk=T LPX (H)."
line.long 0x4 "DSI0_CFGCLKSET,DSIphy should be 800MHz."
hexmask.long.tbyte 0x4 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x4 8. "CKEN,Enable for cfgclk output" "0: STOP,1: Enable"
newline
rbitfld.long 0x4 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 0.--5. 1. "CFGCLKDIV,Divider configuration for frequency of cfgclk of PHY."
group.long 0x100C++0xB
line.long 0x0 "DSI0_VCLKSET,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "CKEN,Clock output enable to Dotclk Generator from PLL" "0: Disable,1: Enable"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "COLOR,Set color space." "0: RGB,1: YCbCr"
newline
rbitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
bitfld.long 0x0 4.--6. "DIV,Divider configuration for generating vclk (dotclk ) in Dotclock Generator." "0: Divided by 2,1: Divided by 4,2: Divided by 8,3: Divided by 16,4: Divided by 32,5: Divided by 64,?,?"
newline
bitfld.long 0x0 2.--3. "BPP,ColorDepth for generating vclk ( dotclk ) in Dotclock Generator." "0: RGB 16Bit,1: RGB 18Bit /RGB 666,2: RGB 18Bit Loosely,3: RGB 24Bit/RGB 888"
bitfld.long 0x0 0.--1. "LANE,Tx Lane configuration for generating vclk ( dotclk ) in Dotclock Generator." "0,1,2,3"
line.long 0x4 "DSI0_VCLKEN,"
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "CKEN,Output enable for vclk(dotclk )" "0,1"
line.long 0x8 "DSI0_PHYSETUP,"
hexmask.long.word 0x8 23.--31. 1. "Reserved_23,Reserved"
hexmask.long.byte 0x8 16.--22. 1. "hsfreqrange,High-speed Frequency Range Selection."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 8.--13. 1. "SET,To change from Initial Value is prohibited."
newline
hexmask.long.byte 0x8 2.--7. 1. "Reserved_2,Reserved"
bitfld.long 0x8 1. "shutdownz,This line is used to place the PHY in shutdown. All analog blocks are" "0,1"
newline
bitfld.long 0x8 0. "rstz,This line is used to place the digital section of the PHY in reset state." "0,1"
group.long 0x101C++0xB
line.long 0x0 "DSI0_CLOCKSET1,mdash"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 29. "wakeuppll,B'0: disable PLL" "0: disable PLL,1: enable PLL"
newline
hexmask.long.word 0x0 18.--28. 1. "Reserved_18,Reserved"
rbitfld.long 0x0 17. "lock,Lock state of PLL" "0: PLL is not locked,1: PLL is locked"
newline
hexmask.long.byte 0x0 10.--16. 1. "Reserved_10,Reserved"
bitfld.long 0x0 8.--9. "clksel,This value should be Initial Value. To change from Initial Value is prohibited." "?,1: Clock generation,?,?"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "shadow_clear,This register is used for clearing of the PLL parameters." "0,1"
newline
bitfld.long 0x0 0. "updatepll,This register is used for configuring of the PLL parameters." "0,1"
line.long 0x4 "DSI0_CLOCKSET2,Refer to Section67.3.4 Clock configuration for detail."
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved"
hexmask.long.word 0x4 16.--25. 1. "m,m as parameter for clock control *1"
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 8.--13. 1. "vco_cntrl,vco_cntrl as parameter for clock control *1"
newline
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "n,n as parameter for clock control *1"
line.long 0x8 "DSI0_CLOCKSET3,Refer to Section3.4 Clock configuration for detail."
rbitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "prop_cntrl,prop_cntrl as parameter for clock control *1"
newline
rbitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "int_cntrl,int_cntrl as parameter for clock control *1"
newline
rbitfld.long 0x8 15. "Reserved_15,Reserved" "0,1"
hexmask.long.byte 0x8 8.--14. 1. "cpbias_cntrl,ChargePump bias control  as parameter for clock control *1"
newline
hexmask.long.byte 0x8 2.--7. 1. "Reserved_2,Reserved"
bitfld.long 0x8 0.--1. "gmp_cntrl,gmp_cntrl as parameter for clock control *1" "0,1,2,3"
group.long 0x1034++0x3
line.long 0x0 "DSI0_PHTW,"
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
bitfld.long 0x0 24. "DWEN,The write access should be permitted for the case of Section 67.3.5 Startup Sequence. Others are prohibited." "0: Disable,1: Enable"
newline
hexmask.long.byte 0x0 16.--23. 1. "TESTDIN_DATA,TESTDIN_DATA Bit Set Values."
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "CWEN,TESTDIN_CODE enable" "0: Disable,1: Enable"
hexmask.long.byte 0x0 0.--7. 1. "TESTDIN_CODE,TESTDIN_CODE Bit Set Values."
rgroup.long 0x1038++0x3
line.long 0x0 "DSI0_PHTR,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 16.--23. 1. "TESTDOUT,Those bits are TESTDIN_DATA loopback value from PHY. (*1)"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
group.long 0x103C++0x3
line.long 0x0 "DSI0_PHTC,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "TESTCLR,This bit sets TESTCLR of the PHY." "0,1"
group.long 0x1100++0x3
line.long 0x0 "DSI0_FDCR2,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "EDCERRIN,Error injection to EDC Check function.B'0: NormalB'1: Error injection" "0: NormalB'1: Error injection,?"
newline
bitfld.long 0x0 0. "EDCEN,Enable EDC Check" "0: Disable,1: Enable"
rgroup.long 0x1104++0x3
line.long 0x0 "DSI0_FDSR2,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "EDCERR,When this value is double_quotation1double_quotation  EDC Error is detected." "0,1"
group.long 0x1108++0x7
line.long 0x0 "DSI0_FDSCR2,can read only 0"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "EDCERR,Set to double_quotation1double_quotation to clear the FDSR2.EDCERR." "0: No meaning,1: Clear FDSR2"
line.long 0x4 "DSI0_FDIER2,"
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "EDCERR,Interrupt enable for FDSR2.EDCERR" "0: Disable interrupt of dsi_int_fd when FDSR2,1: Enable interrupt of dsi_int_fd when FDSR2"
tree.end
tree "DU (Display Unit)"
base ad:0xFEB00000
group.long 0x0++0x7
line.long 0x0 "DSYSR,Address: DU: H'FEB0 0000"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "IUPD,Internal Updating Disable" "0: Internal register updating occurs for each..,1: If this bit is set to 1"
newline
hexmask.long.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "DRES,Display Reset" "0,1"
newline
bitfld.long 0x0 8. "DEN,Display Enable" "0: Vertical blanking flag,1: Display synchronous operation starts"
bitfld.long 0x0 6.--7. "TVM,TV Synchronized Mode" "0: Master Mode,?,?,?"
newline
bitfld.long 0x0 4.--5. "SCM,Scan Mode" "0: Non-interlaced mode,?,?,?"
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved"
line.long 0x4 "DSMR,Address: DU: H'FEB0 0004"
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved"
bitfld.long 0x4 25.--26. "DIPM,DISP Pin Mode" "0: The DISP signal is output to the DSI/CSI-2-TX-IF,1: Setting prohibited,?,?"
newline
bitfld.long 0x4 24. "HSPM,HSYNC Pin Mode" "0: Setting prohibited,1: The HSYNC signal is output to the DSI/CSI-2-TX-IF"
hexmask.long.byte 0x4 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x4 18. "VSL,VSYNC Polarity Select" "0: The VSYNC signal becomes active low,1: The polarity of VSYNC is inverted"
bitfld.long 0x4 17. "HSL,HSYNC Polarity Select" "0: The HSYNC signal becomes active low,1: The polarity of the HSYNC signal is inverted"
newline
hexmask.long.tbyte 0x4 0.--16. 1. "Reserved_0,Reserved"
rgroup.long 0x8++0x3
line.long 0x0 "DSSR,Address: DU: H'FEB0 0008"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "VBK,Vertical Blanking Flag" "0: Indicates the period from the time when the VBK..,1: Indicates the period"
newline
bitfld.long 0x0 10. "Reserved_10,Reserved" "0,1"
bitfld.long 0x0 9. "RINT,Raster Interrupt Flag" "0: Indicates the period from the time when the RINT..,1: Indicates the period from the time when the.."
newline
bitfld.long 0x0 8. "HBK,Horizontal Blanking Flag" "0: Indicates the period from the time when the HBK..,1: Indicates the period from the start of the first.."
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
group.long 0xC++0x7
line.long 0x0 "DSRCR,Address: DU: H'FEB0 000C"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "VBCL,Vertical Blanking Flag Clear" "0: Does not change the VBK flag in DSSR,1: Clears the VBK flag in DSSR"
newline
rbitfld.long 0x0 10. "Reserved_10,Reserved" "0,1"
bitfld.long 0x0 9. "RICL,Raster Interrupt flag clear" "0: Does not change the RINT flag in DSSR,1: Clears the RINT flag in DSSR"
newline
bitfld.long 0x0 8. "HBCL,HBK flag clear" "0: Does not change the HBK flag in DSSR,1: Clears the HBK flag in DSSR"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
line.long 0x4 "DIER,Address: DU: H'FEB0 0010"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x4 11. "VBE,Vertical Blanking Flag Interrupt Enable" "0: Disables the VBK flag interrupt of DSSR,1: Enables the VBK flag interrupt of DSSR"
newline
rbitfld.long 0x4 10. "Reserved_10,Reserved" "0,1"
bitfld.long 0x4 9. "RIE,Raster Interrupt Flag Interrupt Enable" "0: Disables the RINT flag interrupt of DSSR,1: Enables the RINT flag interrupt of DSSR"
newline
bitfld.long 0x4 8. "HBE,HBK Flag Interrupt Enable" "0: Disables the HBK flag interrupt of DSSR,1: Enables the HBK flag interrupt of DSSR"
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
group.long 0x18++0x3
line.long 0x0 "DPPR,Address: DU: H'FEB0 0018"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved."
bitfld.long 0x0 3. "DPE1,Display Plane Priority 1 Enable" "0,1"
newline
bitfld.long 0x0 0.--2. "DPS1,Display Plane Priority 1 Select" "0,1,2,3,4,5,6,7"
group.long 0x20++0x3
line.long 0x0 "DEFR,Address: DU: H'FEB0 0020"
hexmask.long.word 0x0 16.--31. 1. "CODE,DEFR Enabling Code (register available code)"
hexmask.long.byte 0x0 10.--15. 1. "Reserved_10,Reserved."
newline
bitfld.long 0x0 8.--9. "DODF,Display Output Data Format." "0: Sets the DU display output to RGB data format,1: Setting prohibited,?,?"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved." "0,1,2,3"
newline
bitfld.long 0x0 5. "EXUP,External Updating Mode" "0: Internally updates the internal update function..,1: Externally updates the internal update function.."
bitfld.long 0x0 4. "VCUP,Vertical Cycle Register Update Timing Select" "0: The internal updating is based on the falling..,1: The internal updating is based on the rising VSYNC"
newline
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved"
group.long 0x40++0x1F
line.long 0x0 "HDSR,Address: DU: H'FEB0 0040"
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
hexmask.long.word 0x0 0.--9. 1. "HDS,Horizontal Display Start"
line.long 0x4 "HDER,Address: DU: H'FEB0 0044"
hexmask.long.tbyte 0x4 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x4 0.--12. 1. "HDE,Horizontal Display End"
line.long 0x8 "VDSR,Address: DU: H'FEB0 0048"
hexmask.long.tbyte 0x8 9.--31. 1. "Reserved_9,Reserved"
hexmask.long.word 0x8 0.--8. 1. "VDS,Vertical Display Start"
line.long 0xC "VDER,Address: DU: H'FEB0 004C"
hexmask.long.tbyte 0xC 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0xC 0.--12. 1. "VDE,Vertical Display End"
line.long 0x10 "HCR,Address: DU: H'FEB0 0050"
hexmask.long.tbyte 0x10 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x10 0.--12. 1. "HC,Horizontal Cycle"
line.long 0x14 "HSWR,Address: DU: H'FEB0 0054"
hexmask.long.tbyte 0x14 9.--31. 1. "Reserved_9,Reserved"
hexmask.long.word 0x14 0.--8. 1. "HSW,Horizontal Sync Width"
line.long 0x18 "VCR,Address: DU: H'FEB0 0058"
hexmask.long.tbyte 0x18 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x18 0.--12. 1. "VC,Vertical Cycle"
line.long 0x1C "VSPR,Address: DU: H'FEB0 005C"
hexmask.long.tbyte 0x1C 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x1C 0.--12. 1. "VSP,Vertical Sync Point"
group.long 0x78++0x7
line.long 0x0 "DESR,Address: DU: H'FEB0 0078"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x0 0.--12. 1. "DES,DE Signal Start"
line.long 0x4 "DEWR,Address: DU: H'FEB0 007C"
hexmask.long.tbyte 0x4 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x4 0.--12. 1. "DEW,DE Signal Width"
group.long 0x90++0x3
line.long 0x0 "DOOR,Address: DU: H'FEB0 0090"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 18.--23. 1. "DOR,Display Off Mode Output Red"
newline
rbitfld.long 0x0 16.--17. "Reserved_16,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 10.--15. 1. "DOG,Display Off Mode Output Green"
newline
rbitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 2.--7. 1. "DOB,Display Off Mode Output Blue"
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0x98++0x7
line.long 0x0 "BPOR,Address: DU: H'FEB0 0098"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 18.--23. 1. "BPOR,Background Plane Output Red"
newline
rbitfld.long 0x0 16.--17. "Reserved_16,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 10.--15. 1. "BPOG,Background Plane Output Green"
newline
rbitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 2.--7. 1. "BPOB,Background Plane Output Blue"
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "RINTOFSR,Address: DU: H'FEB0 009C"
hexmask.long.tbyte 0x4 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x4 0.--12. 1. "RINTOFS,Raster Interrupt Offset"
group.long 0xE0++0x3
line.long 0x0 "DEF5R,Address: DU: H'FEB0 00E0"
hexmask.long.byte 0x0 24.--31. 1. "CODE,DEF5R Enabling Code (register available code)"
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "DEFE5,Display Unit Extensional Function Enable 5" "0: Extensional functions are disabled,1: Extensional functions are enabled"
group.long 0x100++0x3
line.long 0x0 "PMR,Address: DU: H'FEB0 0100"
hexmask.long.tbyte 0x0 15.--31. 1. "Reserved_15,Reserved"
bitfld.long 0x0 12.--14. "PSPIM,Plane Super Impose Mode" "0: Setting prohibited,1: Setting prohibited,?,?,?,?,?,?"
newline
hexmask.long.word 0x0 2.--11. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "PDDF,Plane Display Data Format" "0: Setting prohibited,1: 16-bit/pixel,?,?"
group.long 0x110++0xF
line.long 0x0 "PDSXR,Address: DU: H'FEB0 0110"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x0 0.--12. 1. "PDSX,Plane Display Size X"
line.long 0x4 "PDSYR,Address: DU: H'FEB0 0114"
hexmask.long.tbyte 0x4 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x4 0.--12. 1. "PDSY,Plane Display Size Y"
line.long 0x8 "PDPXR,Address: DU: H'FEB0 0118"
hexmask.long.tbyte 0x8 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x8 0.--12. 1. "PDPX,Plane Display Position X"
line.long 0xC "PDPYR,Address: DU: H'FEB0 011C"
hexmask.long.tbyte 0xC 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0xC 0.--12. 1. "PDPY,Plane Display Position Y"
group.long 0x190++0x3
line.long 0x0 "PDDC4R,Address: DU: H'FEB0 0190"
hexmask.long.word 0x0 16.--31. 1. "CODE,PDDC4R Enabling Code (register available code)"
hexmask.long.word 0x0 3.--15. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 0.--2. "PEDF,Plane Extensional Data Format" "0: The data format will be determined by the PDDF..,1: Setting prohibited,?,?,?,?,?,?"
group.long 0x11000++0x3
line.long 0x0 "DORCR,Address: DU: H'FEB1 1000"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "DPRS,Display Priority Register Select" "0: The order of priority for the planes is set in..,1: The order of priority for the planes is set in.."
group.long 0x11020++0x3
line.long 0x0 "DSPR,Address: DU: H'FEB1 1020"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "SS1,Display Superimposition Priority 1 Select"
rgroup.long 0x20008++0x3
line.long 0x0 "DD1SSR,Address: DU: H'FEB2 0008"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "VBK,Vertical Blanking Flag" "0: Indicates the period from the time when the VBK..,1: Indicates the period"
newline
bitfld.long 0x0 10. "Reserved_10,Reserved" "0,1"
bitfld.long 0x0 9. "RINT,Raster Interrupt Flag" "0: Indicates the period from the time when the RINT..,1: Indicates the period from the time when the.."
newline
bitfld.long 0x0 8. "HBK,Horizontal Blanking Flag" "0: Indicates the period from the time when the HBK..,1: Indicates the period from the start of the first.."
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
group.long 0x2000C++0x7
line.long 0x0 "DD1SRCR,Address: DU: H'FEB2 000C"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "VBCL,Vertical Blanking Flag Clear" "0: Does not change the VBK flag in DSSR,1: Clears the VBK flag in DSSR"
newline
rbitfld.long 0x0 10. "Reserved_10,Reserved" "0,1"
bitfld.long 0x0 9. "RICL,Raster Interrupt flag clear" "0: Does not change the RINT flag in DSSR,1: Clears the RINT flag in DSSR"
newline
bitfld.long 0x0 8. "HBCL,HBK flag clear" "0: Does not change the HBK flag in DSSR,1: Clears the HBK flag in DSSR"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
line.long 0x4 "DD1IER,Address: DU: H'FEB2 0010"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x4 11. "VBE,Vertical Blanking Flag Interrupt Enable" "0: Disables the VBK flag interrupt of DSSR,1: Enables the VBK flag interrupt of DSSR"
newline
rbitfld.long 0x4 10. "Reserved_10,Reserved" "0,1"
bitfld.long 0x4 9. "RIE,Raster Interrupt Flag Interrupt Enable" "0: Disables the RINT flag interrupt of DSSR,1: Enables the RINT flag interrupt of DSSR"
newline
bitfld.long 0x4 8. "HBE,HBK Flag Interrupt Enable" "0: Disables the HBK flag interrupt of DSSR,1: Enables the HBK flag interrupt of DSSR"
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
group.long 0x20028++0x3
line.long 0x0 "DIDSR,Address: DU: H'FEB2 0028"
hexmask.long.word 0x0 16.--31. 1. "CODE,DIDSR Enabling Code (register available code)"
hexmask.long.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x0 9. "LDCS,DU DSI/CSI-2-TX-IF Dot Clock Select" "0: Setting prohibited,1: The DU0 input dot clock source is the.."
hexmask.long.word 0x0 0.--8. 1. "Reserved_0,Reserved"
group.long 0x20038++0x3
line.long 0x0 "DEF10R,Address: DU: H'FEB2 0038"
hexmask.long.word 0x0 16.--31. 1. "CODE,DEF10R Enabling Code (register available code)"
hexmask.long.byte 0x0 12.--15. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x0 11. "YCDF,YC data format" "0: Setting prohibited,1: YCbCr422"
bitfld.long 0x0 10. "VSPF,VSPD data format" "0: The VSPD data format is RGB,1: The VSPD data format is YC"
newline
rbitfld.long 0x0 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x0 8. "DOCF,DOC data format" "0: The DOC data format is RGB,1: The DOC data format is YC"
newline
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "DEFE10,Display Unit Extensional Function Enable 10" "0: Extensional functions are disabled,1: Extensional functions are enabled"
tree.end
tree "ECM (Error Control Module)"
base ad:0xE6250000
group.long 0x0++0xAB
line.long 0x0 "ECMERRCTLR0,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x0 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x4 "ECMERRCTLR1,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x4 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x8 "ECMERRCTLR2,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x8 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0xC "ECMERRCTLR3,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0xC 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x10 "ECMERRCTLR4,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x10 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x14 "ECMERRCTLR5,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x14 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x18 "ECMERRCTLR6,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x18 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x1C "ECMERRCTLR7,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x1C 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x20 "ECMERRCTLR8,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x20 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x24 "ECMERRCTLR9,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x24 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x28 "ECMERRCTLR10,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x28 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x2C "ECMERRCTLR11,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x2C 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x30 "ECMERRCTLR12,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x30 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x34 "ECMERRCTLR13,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x34 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x38 "ECMERRCTLR14,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x38 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x3C "ECMERRCTLR15,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x3C 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x40 "ECMERRCTLR16,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x40 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x44 "ECMERRCTLR17,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x44 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x48 "ECMERRCTLR18,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x48 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x4C "ECMERRCTLR19,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x4C 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x50 "ECMERRCTLR20,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x50 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x54 "ECMERRCTLR21,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x54 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x58 "ECMERRCTLR22,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x58 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x5C "ECMERRCTLR23,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x5C 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x60 "ECMERRCTLR24,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x60 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x64 "ECMERRCTLR25,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x64 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x68 "ECMERRCTLR26,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x68 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x6C "ECMERRCTLR27,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x6C 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x70 "ECMERRCTLR28,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x70 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x74 "ECMERRCTLR29,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x74 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x78 "ECMERRCTLR30,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x78 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x7C "ECMERRCTLR31,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x7C 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x80 "ECMERRCTLR32,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x80 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x84 "ECMERRCTLR33,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x84 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x88 "ECMERRCTLR34,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x88 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x8C "ECMERRCTLR35,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x8C 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x90 "ECMERRCTLR36,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x90 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x94 "ECMERRCTLR37,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x94 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x98 "ECMERRCTLR38,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x98 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0x9C "ECMERRCTLR39,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x9C 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0xA0 "ECMERRCTLR40,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0xA0 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0xA4 "ECMERRCTLR41,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0xA4 0.--31. 1. "Enable_31_0,Error detection enable."
line.long 0xA8 "ECMERRCTLR42,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0xA8 0.--31. 1. "Enable_31_0,Error detection enable."
group.long 0x100++0xAB
line.long 0x0 "ECMERRSTSR0,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x0 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x4 "ECMERRSTSR1,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x4 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x8 "ECMERRSTSR2,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x8 0.--31. 1. "Status_31_0,Error detection status."
line.long 0xC "ECMERRSTSR3,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0xC 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x10 "ECMERRSTSR4,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x10 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x14 "ECMERRSTSR5,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x14 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x18 "ECMERRSTSR6,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x18 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x1C "ECMERRSTSR7,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x1C 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x20 "ECMERRSTSR8,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x20 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x24 "ECMERRSTSR9,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x24 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x28 "ECMERRSTSR10,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x28 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x2C "ECMERRSTSR11,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x2C 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x30 "ECMERRSTSR12,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x30 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x34 "ECMERRSTSR13,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x34 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x38 "ECMERRSTSR14,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x38 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x3C "ECMERRSTSR15,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x3C 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x40 "ECMERRSTSR16,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x40 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x44 "ECMERRSTSR17,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x44 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x48 "ECMERRSTSR18,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x48 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x4C "ECMERRSTSR19,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x4C 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x50 "ECMERRSTSR20,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x50 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x54 "ECMERRSTSR21,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x54 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x58 "ECMERRSTSR22,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x58 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x5C "ECMERRSTSR23,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x5C 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x60 "ECMERRSTSR24,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x60 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x64 "ECMERRSTSR25,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x64 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x68 "ECMERRSTSR26,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x68 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x6C "ECMERRSTSR27,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x6C 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x70 "ECMERRSTSR28,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x70 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x74 "ECMERRSTSR29,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x74 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x78 "ECMERRSTSR30,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x78 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x7C "ECMERRSTSR31,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x7C 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x80 "ECMERRSTSR32,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x80 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x84 "ECMERRSTSR33,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x84 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x88 "ECMERRSTSR34,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x88 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x8C "ECMERRSTSR35,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x8C 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x90 "ECMERRSTSR36,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x90 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x94 "ECMERRSTSR37,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x94 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x98 "ECMERRSTSR38,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x98 0.--31. 1. "Status_31_0,Error detection status."
line.long 0x9C "ECMERRSTSR39,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0x9C 0.--31. 1. "Status_31_0,Error detection status."
line.long 0xA0 "ECMERRSTSR40,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0xA0 0.--31. 1. "Status_31_0,Error detection status."
line.long 0xA4 "ECMERRSTSR41,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0xA4 0.--31. 1. "Status_31_0,Error detection status."
line.long 0xA8 "ECMERRSTSR42,This register is used to enable error checking function. Each bit is assigned for one input error signal."
hexmask.long 0xA8 0.--31. 1. "Status_31_0,Error detection status."
group.long 0x200++0xAB
line.long 0x0 "ECMERRTGTR0,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x0 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x4 "ECMERRTGTR1,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x4 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x8 "ECMERRTGTR2,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x8 0.--31. 1. "Target_31_0,Error detection target."
line.long 0xC "ECMERRTGTR3,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0xC 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x10 "ECMERRTGTR4,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x10 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x14 "ECMERRTGTR5,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x14 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x18 "ECMERRTGTR6,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x18 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x1C "ECMERRTGTR7,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x1C 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x20 "ECMERRTGTR8,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x20 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x24 "ECMERRTGTR9,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x24 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x28 "ECMERRTGTR10,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x28 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x2C "ECMERRTGTR11,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x2C 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x30 "ECMERRTGTR12,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x30 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x34 "ECMERRTGTR13,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x34 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x38 "ECMERRTGTR14,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x38 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x3C "ECMERRTGTR15,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x3C 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x40 "ECMERRTGTR16,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x40 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x44 "ECMERRTGTR17,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x44 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x48 "ECMERRTGTR18,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x48 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x4C "ECMERRTGTR19,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x4C 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x50 "ECMERRTGTR20,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x50 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x54 "ECMERRTGTR21,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x54 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x58 "ECMERRTGTR22,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x58 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x5C "ECMERRTGTR23,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x5C 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x60 "ECMERRTGTR24,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x60 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x64 "ECMERRTGTR25,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x64 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x68 "ECMERRTGTR26,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x68 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x6C "ECMERRTGTR27,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x6C 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x70 "ECMERRTGTR28,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x70 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x74 "ECMERRTGTR29,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x74 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x78 "ECMERRTGTR30,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x78 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x7C "ECMERRTGTR31,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x7C 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x80 "ECMERRTGTR32,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x80 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x84 "ECMERRTGTR33,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x84 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x88 "ECMERRTGTR34,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x88 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x8C "ECMERRTGTR35,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x8C 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x90 "ECMERRTGTR36,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x90 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x94 "ECMERRTGTR37,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x94 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x98 "ECMERRTGTR38,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x98 0.--31. 1. "Target_31_0,Error detection target."
line.long 0x9C "ECMERRTGTR39,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0x9C 0.--31. 1. "Target_31_0,Error detection target."
line.long 0xA0 "ECMERRTGTR40,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0xA0 0.--31. 1. "Target_31_0,Error detection target."
line.long 0xA4 "ECMERRTGTR41,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0xA4 0.--31. 1. "Target_31_0,Error detection target."
line.long 0xA8 "ECMERRTGTR42,This register is used to choose the destination of interrupt signal which is output when error status register is set to 1single_quotationb1. ECMERRTGTR5 and 6 are used for security related errors. Each bit is assigned for one input error.."
hexmask.long 0xA8 0.--31. 1. "Target_31_0,Error detection target."
rgroup.long 0x400++0x3
line.long 0x0 "ECMERRCNTR0,"
hexmask.long 0x0 0.--31. 1. "Reserved,Reserved."
group.long 0x404++0x3
line.long 0x0 "ECMERRCNTR1,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x0 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x0 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x0 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x0 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
rgroup.long 0x408++0x3
line.long 0x0 "ECMERRCNTR2,"
hexmask.long 0x0 0.--31. 1. "Reserved,Reserved."
group.long 0x40C++0x4F
line.long 0x0 "ECMERRCNTR3,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x0 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x0 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x0 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x0 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x4 "ECMERRCNTR4,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x4 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x4 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x4 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x4 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x8 "ECMERRCNTR5,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x8 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x8 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x8 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x8 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x8 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x8 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x8 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x8 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0xC "ECMERRCNTR6,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0xC 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0xC 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0xC 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0xC 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0xC 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0xC 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0xC 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0xC 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x10 "ECMERRCNTR7,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x10 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x10 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x10 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x10 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x10 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x10 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x10 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x10 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x14 "ECMERRCNTR8,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x14 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x14 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x14 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x14 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x14 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x14 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x14 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x14 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x18 "ECMERRCNTR9,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x18 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x18 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x18 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x18 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x18 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x18 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x18 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x18 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x1C "ECMERRCNTR10,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x1C 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x1C 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x1C 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x1C 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x1C 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x1C 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x1C 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x1C 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x20 "ECMERRCNTR11,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x20 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x20 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x20 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x20 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x20 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x20 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x20 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x20 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x24 "ECMERRCNTR12,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x24 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x24 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x24 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x24 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x24 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x24 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x24 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x24 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x28 "ECMERRCNTR13,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x28 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x28 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x28 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x28 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x28 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x28 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x28 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x28 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x2C "ECMERRCNTR14,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x2C 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x2C 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x2C 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x2C 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x2C 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x2C 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x2C 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x2C 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x30 "ECMERRCNTR15,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x30 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x30 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x30 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x30 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x30 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x30 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x30 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x30 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x34 "ECMERRCNTR16,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x34 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x34 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x34 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x34 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x34 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x34 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x34 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x34 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x38 "ECMERRCNTR17,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x38 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x38 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x38 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x38 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x38 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x38 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x38 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x38 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x3C "ECMERRCNTR18,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x3C 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x3C 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x3C 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x3C 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x3C 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x3C 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x3C 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x3C 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x40 "ECMERRCNTR19,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x40 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x40 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x40 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x40 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x40 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x40 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x40 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x40 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x44 "ECMERRCNTR20,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x44 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x44 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x44 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x44 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x44 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x44 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x44 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x44 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x48 "ECMERRCNTR21,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x48 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x48 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x48 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x48 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x48 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x48 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x48 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x48 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x4C "ECMERRCNTR22,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x4C 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4C 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x4C 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4C 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x4C 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4C 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x4C 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4C 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
rgroup.long 0x45C++0x7
line.long 0x0 "ECMERRCNTR23,"
hexmask.long 0x0 0.--31. 1. "Reserved,Reserved."
line.long 0x4 "ECMERRCNTR24,"
hexmask.long 0x4 0.--31. 1. "Reserved,Reserved."
group.long 0x464++0x7
line.long 0x0 "ECMERRCNTR25,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x0 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x0 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x0 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x0 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x4 "ECMERRCNTR26,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x4 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x4 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x4 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x4 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
rgroup.long 0x46C++0x3
line.long 0x0 "ECMERRCNTR27,"
hexmask.long 0x0 0.--31. 1. "Reserved,Reserved."
group.long 0x470++0x33
line.long 0x0 "ECMERRCNTR28,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x0 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x0 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x0 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x0 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x4 "ECMERRCNTR29,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x4 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x4 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x4 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x4 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x8 "ECMERRCNTR30,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x8 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x8 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x8 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x8 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x8 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x8 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x8 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x8 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0xC "ECMERRCNTR31,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0xC 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0xC 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0xC 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0xC 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0xC 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0xC 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0xC 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0xC 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x10 "ECMERRCNTR32,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x10 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x10 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x10 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x10 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x10 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x10 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x10 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x10 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x14 "ECMERRCNTR33,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x14 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x14 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x14 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x14 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
newline
rbitfld.long 0x14 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x14 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
newline
rbitfld.long 0x14 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x14 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x18 "ECMERRCNTR34,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x18 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x18 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
newline
rbitfld.long 0x18 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x18 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
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rbitfld.long 0x18 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x18 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
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rbitfld.long 0x18 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x18 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x1C "ECMERRCNTR35,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x1C 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x1C 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
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rbitfld.long 0x1C 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x1C 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
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rbitfld.long 0x1C 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x1C 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
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rbitfld.long 0x1C 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x1C 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x20 "ECMERRCNTR36,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x20 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x20 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
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rbitfld.long 0x20 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x20 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
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rbitfld.long 0x20 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x20 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
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rbitfld.long 0x20 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x20 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x24 "ECMERRCNTR37,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x24 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x24 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
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rbitfld.long 0x24 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x24 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
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rbitfld.long 0x24 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x24 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
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rbitfld.long 0x24 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x24 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x28 "ECMERRCNTR38,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x28 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x28 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
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rbitfld.long 0x28 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x28 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
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rbitfld.long 0x28 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x28 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
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rbitfld.long 0x28 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x28 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x2C "ECMERRCNTR39,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x2C 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x2C 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
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rbitfld.long 0x2C 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x2C 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
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rbitfld.long 0x2C 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x2C 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
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rbitfld.long 0x2C 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x2C 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
line.long 0x30 "ECMERRCNTR40,This register is used to enable counting the number of errors when 1-bit or multi-bit error of RAM ECC happened at the corresponding modules"
rbitfld.long 0x30 29.--31. "Reserved0,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x30 24.--28. 1. "MECN_1bit,Maximum Error Count Number(1-bit)"
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rbitfld.long 0x30 21.--23. "Reserved1,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x30 16.--20. 1. "CECN_1bit,Current Error Count Number(1-bit)"
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rbitfld.long 0x30 13.--15. "Reserved2,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x30 8.--12. 1. "MECN_mbit,Maximum Error Count Number(multi-bit)"
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rbitfld.long 0x30 5.--7. "Reserved3,Reserved." "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x30 0.--4. 1. "CECN_mbit,Current Error Count Number(multi-bit)"
group.long 0x700++0xAB
line.long 0x0 "ECMPSSTATCTLRA0,This register decides the group of the port safe state to each error signal."
bitfld.long 0x0 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x0 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x0 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x0 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x0 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x0 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x0 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x0 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x0 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x0 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x0 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x0 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x0 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x0 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x0 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x0 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x4 "ECMPSSTATCTLRA1,This register decides the group of the port safe state to each error signal."
bitfld.long 0x4 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x4 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x4 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x4 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x4 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x4 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x4 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x4 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x4 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x4 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x4 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x4 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x4 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x4 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x4 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x4 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x8 "ECMPSSTATCTLRA2,This register decides the group of the port safe state to each error signal."
bitfld.long 0x8 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x8 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x8 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x8 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x8 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x8 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x8 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x8 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x8 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x8 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x8 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x8 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x8 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x8 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x8 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0x8 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0xC "ECMPSSTATCTLRA3,This register decides the group of the port safe state to each error signal."
bitfld.long 0xC 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0xC 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0xC 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0xC 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0xC 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0xC 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0xC 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0xC 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
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bitfld.long 0xC 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x10 "ECMPSSTATCTLRA4,This register decides the group of the port safe state to each error signal."
bitfld.long 0x10 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x14 "ECMPSSTATCTLRA5,This register decides the group of the port safe state to each error signal."
bitfld.long 0x14 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x18 "ECMPSSTATCTLRA6,This register decides the group of the port safe state to each error signal."
bitfld.long 0x18 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x1C "ECMPSSTATCTLRA7,This register decides the group of the port safe state to each error signal."
bitfld.long 0x1C 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x20 "ECMPSSTATCTLRA8,This register decides the group of the port safe state to each error signal."
bitfld.long 0x20 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x24 "ECMPSSTATCTLRA9,This register decides the group of the port safe state to each error signal."
bitfld.long 0x24 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x28 "ECMPSSTATCTLRA10,This register decides the group of the port safe state to each error signal."
bitfld.long 0x28 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x2C "ECMPSSTATCTLRA11,This register decides the group of the port safe state to each error signal."
bitfld.long 0x2C 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x30 "ECMPSSTATCTLRA12,This register decides the group of the port safe state to each error signal."
bitfld.long 0x30 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x34 "ECMPSSTATCTLRA13,This register decides the group of the port safe state to each error signal."
bitfld.long 0x34 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x38 "ECMPSSTATCTLRA14,This register decides the group of the port safe state to each error signal."
bitfld.long 0x38 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x3C "ECMPSSTATCTLRA15,This register decides the group of the port safe state to each error signal."
bitfld.long 0x3C 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x40 "ECMPSSTATCTLRA16,This register decides the group of the port safe state to each error signal."
bitfld.long 0x40 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x44 "ECMPSSTATCTLRA17,This register decides the group of the port safe state to each error signal."
bitfld.long 0x44 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x48 "ECMPSSTATCTLRA18,This register decides the group of the port safe state to each error signal."
bitfld.long 0x48 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x4C "ECMPSSTATCTLRA19,This register decides the group of the port safe state to each error signal."
bitfld.long 0x4C 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x50 "ECMPSSTATCTLRA20,This register decides the group of the port safe state to each error signal."
bitfld.long 0x50 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x54 "ECMPSSTATCTLRA21,This register decides the group of the port safe state to each error signal."
bitfld.long 0x54 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x58 "ECMPSSTATCTLRA22,This register decides the group of the port safe state to each error signal."
bitfld.long 0x58 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x5C "ECMPSSTATCTLRA23,This register decides the group of the port safe state to each error signal."
bitfld.long 0x5C 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x60 "ECMPSSTATCTLRA24,This register decides the group of the port safe state to each error signal."
bitfld.long 0x60 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x64 "ECMPSSTATCTLRA25,This register decides the group of the port safe state to each error signal."
bitfld.long 0x64 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x68 "ECMPSSTATCTLRA26,This register decides the group of the port safe state to each error signal."
bitfld.long 0x68 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x6C "ECMPSSTATCTLRA27,This register decides the group of the port safe state to each error signal."
bitfld.long 0x6C 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x70 "ECMPSSTATCTLRA28,This register decides the group of the port safe state to each error signal."
bitfld.long 0x70 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x74 "ECMPSSTATCTLRA29,This register decides the group of the port safe state to each error signal."
bitfld.long 0x74 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x78 "ECMPSSTATCTLRA30,This register decides the group of the port safe state to each error signal."
bitfld.long 0x78 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x7C "ECMPSSTATCTLRA31,This register decides the group of the port safe state to each error signal."
bitfld.long 0x7C 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x80 "ECMPSSTATCTLRA32,This register decides the group of the port safe state to each error signal."
bitfld.long 0x80 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x84 "ECMPSSTATCTLRA33,This register decides the group of the port safe state to each error signal."
bitfld.long 0x84 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x88 "ECMPSSTATCTLRA34,This register decides the group of the port safe state to each error signal."
bitfld.long 0x88 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x8C "ECMPSSTATCTLRA35,This register decides the group of the port safe state to each error signal."
bitfld.long 0x8C 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x90 "ECMPSSTATCTLRA36,This register decides the group of the port safe state to each error signal."
bitfld.long 0x90 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x94 "ECMPSSTATCTLRA37,This register decides the group of the port safe state to each error signal."
bitfld.long 0x94 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x98 "ECMPSSTATCTLRA38,This register decides the group of the port safe state to each error signal."
bitfld.long 0x98 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x9C "ECMPSSTATCTLRA39,This register decides the group of the port safe state to each error signal."
bitfld.long 0x9C 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0xA0 "ECMPSSTATCTLRA40,This register decides the group of the port safe state to each error signal."
bitfld.long 0xA0 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0xA4 "ECMPSSTATCTLRA41,This register decides the group of the port safe state to each error signal."
bitfld.long 0xA4 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0xA8 "ECMPSSTATCTLRA42,This register decides the group of the port safe state to each error signal."
bitfld.long 0xA8 30.--31. "PSSG15_1_0,Post safe state group of error factor 15 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 28.--29. "PSSG14_1_0,Post safe state group of error factor 14 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 26.--27. "PSSG13_1_0,Post safe state group of error factor 13 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 24.--25. "PSSG12_1_0,Post safe state group of error factor 12 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 22.--23. "PSSG11_1_0,Post safe state group of error factor 11 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 20.--21. "PSSG10_1_0,Post safe state group of error factor 10 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 18.--19. "PSSG9_1_0,Post safe state group of error factor 9 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 16.--17. "PSSG8_1_0,Post safe state group of error factor 8 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 14.--15. "PSSG7_1_0,Post safe state group of error factor 7 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 12.--13. "PSSG6_1_0,Post safe state group of error factor 6 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 10.--11. "PSSG5_1_0,Post safe state group of error factor 5 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 8.--9. "PSSG4_1_0,Post safe state group of error factor 4 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 6.--7. "PSSG3_1_0,Post safe state group of error factor 3 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 4.--5. "PSSG2_1_0,Post safe state group of error factor 2 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 2.--3. "PSSG1_1_0,Post safe state group of error factor 1 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 0.--1. "PSSG0_1_0,Post safe state group of error factor 0 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
group.long 0x800++0xAB
line.long 0x0 "ECMPSSTATCTLRB0,This register decides the group of the port safe state to each error signal."
bitfld.long 0x0 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x0 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x0 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x0 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x0 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x0 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x0 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x0 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x0 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x0 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x0 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x0 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x0 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x0 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x0 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x0 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x4 "ECMPSSTATCTLRB1,This register decides the group of the port safe state to each error signal."
bitfld.long 0x4 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x8 "ECMPSSTATCTLRB2,This register decides the group of the port safe state to each error signal."
bitfld.long 0x8 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0xC "ECMPSSTATCTLRB3,This register decides the group of the port safe state to each error signal."
bitfld.long 0xC 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xC 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x10 "ECMPSSTATCTLRB4,This register decides the group of the port safe state to each error signal."
bitfld.long 0x10 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x10 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x14 "ECMPSSTATCTLRB5,This register decides the group of the port safe state to each error signal."
bitfld.long 0x14 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x14 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x18 "ECMPSSTATCTLRB6,This register decides the group of the port safe state to each error signal."
bitfld.long 0x18 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x18 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x1C "ECMPSSTATCTLRB7,This register decides the group of the port safe state to each error signal."
bitfld.long 0x1C 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x1C 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x20 "ECMPSSTATCTLRB8,This register decides the group of the port safe state to each error signal."
bitfld.long 0x20 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x20 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x24 "ECMPSSTATCTLRB9,This register decides the group of the port safe state to each error signal."
bitfld.long 0x24 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x24 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x28 "ECMPSSTATCTLRB10,This register decides the group of the port safe state to each error signal."
bitfld.long 0x28 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x28 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x2C "ECMPSSTATCTLRB11,This register decides the group of the port safe state to each error signal."
bitfld.long 0x2C 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x2C 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x30 "ECMPSSTATCTLRB12,This register decides the group of the port safe state to each error signal."
bitfld.long 0x30 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x30 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x34 "ECMPSSTATCTLRB13,This register decides the group of the port safe state to each error signal."
bitfld.long 0x34 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x34 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x38 "ECMPSSTATCTLRB14,This register decides the group of the port safe state to each error signal."
bitfld.long 0x38 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x38 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x3C "ECMPSSTATCTLRB15,This register decides the group of the port safe state to each error signal."
bitfld.long 0x3C 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x3C 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x40 "ECMPSSTATCTLRB16,This register decides the group of the port safe state to each error signal."
bitfld.long 0x40 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x40 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x44 "ECMPSSTATCTLRB17,This register decides the group of the port safe state to each error signal."
bitfld.long 0x44 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x44 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x48 "ECMPSSTATCTLRB18,This register decides the group of the port safe state to each error signal."
bitfld.long 0x48 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x48 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x4C "ECMPSSTATCTLRB19,This register decides the group of the port safe state to each error signal."
bitfld.long 0x4C 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x4C 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x50 "ECMPSSTATCTLRB20,This register decides the group of the port safe state to each error signal."
bitfld.long 0x50 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x50 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x54 "ECMPSSTATCTLRB21,This register decides the group of the port safe state to each error signal."
bitfld.long 0x54 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x54 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x58 "ECMPSSTATCTLRB22,This register decides the group of the port safe state to each error signal."
bitfld.long 0x58 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x58 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x5C "ECMPSSTATCTLRB23,This register decides the group of the port safe state to each error signal."
bitfld.long 0x5C 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x5C 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x60 "ECMPSSTATCTLRB24,This register decides the group of the port safe state to each error signal."
bitfld.long 0x60 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x60 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x64 "ECMPSSTATCTLRB25,This register decides the group of the port safe state to each error signal."
bitfld.long 0x64 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x64 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x68 "ECMPSSTATCTLRB26,This register decides the group of the port safe state to each error signal."
bitfld.long 0x68 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x68 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x6C "ECMPSSTATCTLRB27,This register decides the group of the port safe state to each error signal."
bitfld.long 0x6C 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x6C 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x70 "ECMPSSTATCTLRB28,This register decides the group of the port safe state to each error signal."
bitfld.long 0x70 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x70 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x74 "ECMPSSTATCTLRB29,This register decides the group of the port safe state to each error signal."
bitfld.long 0x74 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x74 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x78 "ECMPSSTATCTLRB30,This register decides the group of the port safe state to each error signal."
bitfld.long 0x78 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x78 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x7C "ECMPSSTATCTLRB31,This register decides the group of the port safe state to each error signal."
bitfld.long 0x7C 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x7C 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x80 "ECMPSSTATCTLRB32,This register decides the group of the port safe state to each error signal."
bitfld.long 0x80 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x80 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x84 "ECMPSSTATCTLRB33,This register decides the group of the port safe state to each error signal."
bitfld.long 0x84 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x84 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x88 "ECMPSSTATCTLRB34,This register decides the group of the port safe state to each error signal."
bitfld.long 0x88 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x88 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x8C "ECMPSSTATCTLRB35,This register decides the group of the port safe state to each error signal."
bitfld.long 0x8C 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x8C 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x90 "ECMPSSTATCTLRB36,This register decides the group of the port safe state to each error signal."
bitfld.long 0x90 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x90 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x94 "ECMPSSTATCTLRB37,This register decides the group of the port safe state to each error signal."
bitfld.long 0x94 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x94 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x98 "ECMPSSTATCTLRB38,This register decides the group of the port safe state to each error signal."
bitfld.long 0x98 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x98 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0x9C "ECMPSSTATCTLRB39,This register decides the group of the port safe state to each error signal."
bitfld.long 0x9C 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0x9C 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0xA0 "ECMPSSTATCTLRB40,This register decides the group of the port safe state to each error signal."
bitfld.long 0xA0 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA0 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0xA4 "ECMPSSTATCTLRB41,This register decides the group of the port safe state to each error signal."
bitfld.long 0xA4 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA4 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
line.long 0xA8 "ECMPSSTATCTLRB42,This register decides the group of the port safe state to each error signal."
bitfld.long 0xA8 30.--31. "PSSG31_1_0,Post safe state group of error factor 31 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 28.--29. "PSSG30_1_0,Post safe state group of error factor 30 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 26.--27. "PSSG29_1_0,Post safe state group of error factor 29 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 24.--25. "PSSG28_1_0,Post safe state group of error factor 28 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 22.--23. "PSSG27_1_0,Post safe state group of error factor 27 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 20.--21. "PSSG26_1_0,Post safe state group of error factor 26 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 18.--19. "PSSG25_1_0,Post safe state group of error factor 25 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 16.--17. "PSSG24_1_0,Post safe state group of error factor 24 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 14.--15. "PSSG23_1_0,Post safe state group of error factor 23 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 12.--13. "PSSG22_1_0,Post safe state group of error factor 22 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 10.--11. "PSSG21_1_0,Post safe state group of error factor 21 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 8.--9. "PSSG20_1_0,Post safe state group of error factor 20 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 6.--7. "PSSG19_1_0,Post safe state group of error factor 19 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 4.--5. "PSSG18_1_0,Post safe state group of error factor 18 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 2.--3. "PSSG17_1_0,Post safe state group of error factor 17 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
newline
bitfld.long 0xA8 0.--1. "PSSG16_1_0,Post safe state group of error factor 16 of ECMERRCTRLn" "0: port safe state group0,1: port safe state group1,2: port safe state group2,3: port safe state group3"
group.long 0x900++0x3
line.long 0x0 "ECMPSSTATCTLRM,"
hexmask.long 0x0 1.--31. 1. "Reserved,Reserved."
newline
bitfld.long 0x0 0. "EOR,Error output control enable" "0: keep initial value of the error output status..,1: error output enable"
group.long 0x928++0x3
line.long 0x0 "ECMGEIIDR,"
hexmask.long 0x0 3.--31. 1. "Reserved,Reserved."
newline
bitfld.long 0x0 0.--2. "SGE_ID,Software Error Interrupt ID." "0,1,2,3,4,5,6,7"
wgroup.long 0x940++0x7
line.long 0x0 "SAFCLERRENR,"
hexmask.long 0x0 0.--31. 1. "CLR_31_0,Enable Error Insertion Set."
line.long 0x4 "SAFSTERRENR,"
hexmask.long 0x4 0.--31. 1. "SET_31_0,B'1: Set Error Insertion."
group.long 0x948++0x3
line.long 0x0 "SAFCTLR,SAFCTLR is used to enable debug function."
bitfld.long 0x0 31. "DBGEN,Error Insertion Enable Status" "0: Disable debug function,1: Enable debug function"
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hexmask.long 0x0 6.--30. 1. "Reserved,Reserved."
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hexmask.long.byte 0x0 0.--5. 1. "REGSEL_5_0,Select Error status register which ECM update error status."
rgroup.long 0x94C++0x3
line.long 0x0 "SAFSTSR,"
hexmask.long 0x0 0.--31. 1. "STS_31_0,Error Insertion Enable Status."
group.long 0x95C++0x7
line.long 0x0 "ECMEDCERRSIDPADDR,Error SID register for PADDR"
bitfld.long 0x0 31. "CLR,Clear for SRC_ID captured at EDC library" "0: No effect,1: Clear SRC ID"
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hexmask.long.tbyte 0x0 8.--30. 1. "Reserved,Reserved"
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hexmask.long.byte 0x0 0.--7. 1. "SRC_ID,SRC_ID after EDC error detection"
line.long 0x4 "ECMEDCERRSIDPWDATAR,Error SID register for PWDATA"
bitfld.long 0x4 31. "CLR,Clear for SRC_ID captured at EDC library" "0: No effect,1: Clear SRC ID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved,Reserved."
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hexmask.long.byte 0x4 0.--7. 1. "SRC_ID,SRC_ID after EDC error detection"
rgroup.long 0x984++0x7
line.long 0x0 "ECMDCLSERMON00R,"
hexmask.long 0x0 0.--31. 1. "DCLS_DUPERR_31_0,DCLS duplication Error"
line.long 0x4 "ECMDCLSERMON01R,"
hexmask.long.tbyte 0x4 9.--31. 1. "DCLS_DUPERR_31_25,DCLS duplication Error"
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hexmask.long.word 0x4 0.--8. 1. "Reserved,Reserved."
group.long 0xA00++0x7
line.long 0x0 "ECMWPCNTR,This register is used to control write protection for all registers in ECM"
hexmask.long.word 0x0 16.--31. 1. "CodeValue_15_0,Code Value(H'ACCE)"
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hexmask.long.word 0x0 1.--15. 1. "Reserved,Reserved."
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bitfld.long 0x0 0. "WPD,Write Protection Disable" "0: Enable write protection,1: Disable write protection"
line.long 0x4 "ECMWACNTR,This register is used when write access for the target register is executed. Unless the target register address is written in this register. the contents of the target register cannot not be updated."
hexmask.long.word 0x4 16.--31. 1. "CodeValue_15_0,Code Value(H'ACCE)"
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hexmask.long.word 0x4 0.--15. 1. "RegisterAddress_15_0,Lower 16-bits of the target register address"
group.long 0xA10++0x7
line.long 0x0 "ECMEXTRQHLDCNTR,"
bitfld.long 0x0 31. "EN,Counter Enable" "0,1"
newline
hexmask.long.tbyte 0x0 11.--30. 1. "Reserved,Reserved."
newline
hexmask.long.word 0x0 0.--10. 1. "CountValue,Timer count value"
line.long 0x4 "ECMEXTRQMSKCNTR,This register is used for the mask timer control for external error request."
bitfld.long 0x4 31. "EN,Counter Enable" "0: Disable Counter,1: Enable Counter"
newline
hexmask.long.tbyte 0x4 11.--30. 1. "Reserved,Reserved."
newline
hexmask.long.word 0x4 0.--10. 1. "CountValue,Timer Count Value"
rgroup.long 0xA18++0x3
line.long 0x0 "ECMEXTRQSTSR,This register indicates the status of external error request"
hexmask.long 0x0 1.--31. 1. "Reserved,Reserved."
newline
bitfld.long 0x0 0. "STS,External Error Request status." "0: error status is not notified to the external..,1: error status is notified to the external system"
rgroup.long 0xA28++0x3
line.long 0x0 "ECMERRSTSINR,"
hexmask.long 0x0 1.--31. 1. "Reserved,Reserved."
newline
bitfld.long 0x0 0. "ERROROUT_N,Refer ERROROUT# pin status" "0,1"
group.long 0xA2C++0xB
line.long 0x0 "ECMERROUTCTLR,ERROROUT is low level start"
hexmask.long.word 0x0 16.--31. 1. "CodeValue_15_0,Code Value(H'ACCE)"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved,Reserved."
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bitfld.long 0x0 0. "ERROUT,Error output control enable" "0: Output the value of error status to ERROROUT#,1: Keep initial value of the error output control.."
line.long 0x4 "ECMDYNCTRLR,"
hexmask.long 0x4 1.--31. 1. "Reserved,Reserved."
newline
bitfld.long 0x4 0. "DYNEN,Dynamic Enable bit" "0: default,1: enable dynamic mode"
line.long 0x8 "ECMDYNFREQSELR,"
hexmask.long 0x8 4.--31. 1. "Reserved,Reserved."
newline
hexmask.long.byte 0x8 0.--3. 1. "FRQSL,Frequency select bit for ERROROUT# in dynamic mode"
tree.end
tree "ETHERNET"
base ad:0x0
tree "EtherAVB-IF"
tree "EtherAVB_IF_0"
base ad:0xE6800000
group.long 0x0++0xB
line.long 0x0 "CCC0,The CCC register specifies the operating mode of the AVB-DMAC."
hexmask.long.byte 0x0 26.--31. 1. "Reserved_26,Reserved"
bitfld.long 0x0 25. "FCE,Flow Control Enable" "0: Flow control disabled1: Flow control enabled,?"
newline
bitfld.long 0x0 24. "LBME,Loopback Mode Enable" "0: Normal operation,1: Loopback mode is enabled"
bitfld.long 0x0 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "Reserved_20,Reserved" "0,1"
bitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 16.--17. "CSEL_1_0,gPTP Clock Select" "0: gPTP is disabled,1: High-speed peripheral bus clock,?,?"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "DTSR,Data Transmission Suspend Request" "0: Normal operation,1: Requests suspension"
bitfld.long 0x0 7. "GAC,Gptp Active in Config" "0: Normal operation1: gPTP support active in CONFIG..,?"
newline
hexmask.long.byte 0x0 2.--6. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "OPC_1_0,Operating Mode Configuration" "0: Reset mode,1: Configuration mode,?,?"
line.long 0x4 "DBAT0,The DBAT register specifies the base address of the descriptor table in the URAM. For the structure of this table. see section 50.3.3 Descriptors. Writing to this bit is only possible when the current operating mode is configuration mode."
hexmask.long 0x4 0.--31. 1. "TA_31_0,Descriptor Base Table Address"
line.long 0x8 "DLR0,The DLR register is used to issue a request to load the values from the current descriptor address register q (CDARq) for each queue to the descriptor base address table register (DBAT)."
hexmask.long.word 0x8 22.--31. 1. "Reserved_22,Reserved"
bitfld.long 0x8 21. "LBA21,Base Address Load Request (Rx17: Stream 15)" "0: No load request is issued,1: When written: A request for loading the.."
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bitfld.long 0x8 20. "LBA20,Base Address Load Request (Rx16: Stream 14)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 19. "LBA19,Base Address Load Request (Rx15: Stream 13)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 18. "LBA18,Base Address Load Request (Rx14: Stream 12)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 17. "LBA17,Base Address Load Request (Rx13: Stream 11)" "0: No load request is issued,1: When written: A request for loading the.."
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bitfld.long 0x8 16. "LBA16,Base Address Load Request (Rx12: Stream 10)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 15. "LBA15,Base Address Load Request (Rx11: Stream 9)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 14. "LBA14,Base Address Load Request (Rx10: Stream 8)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 13. "LBA13,Base Address Load Request (Rx9: Stream 7)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 12. "LBA12,Base Address Load Request (Rx8: Stream 6)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 11. "LBA11,Base Address Load Request (Rx7: Stream 5)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 10. "LBA10,Base Address Load Request (Rx6: Stream 4)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 9. "LBA9,Base Address Load Request (Rx5: Stream 3)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 8. "LBA8,Base Address Load Request (Rx4: Stream 2)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 7. "LBA7,Base Address Load Request (Rx3: Stream 1)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 6. "LBA6,Base Address Load Request (Rx2: Stream 0)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 5. "LBA5,Base Address Load Request (Rx1: Network Control)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 4. "LBA4,Base Address Load Request (Rx0: Best Effort)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 3. "LBA3,Base Address Load Request (Tx3: Stream Class A)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 2. "LBA2,Base Address Load Request (Tx2: Stream Class B)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 1. "LBA1,Base Address Load Request (Tx1: Network Control)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 0. "LBA0,Base Address Load Request (Tx0: Best Effort)" "0: No load request is issued,1: When written: A request for loading the.."
rgroup.long 0xC++0x5B
line.long 0x0 "CSR0,The CSR register is used to indicate the operating mode in which the AVB-DMAC is running and the individual communications states."
hexmask.long.word 0x0 22.--31. 1. "Reserved_22,Reserved"
bitfld.long 0x0 21. "TDUO,Transmission Descriptor Update On-going" "0: No pending descriptor update1: Pending..,?"
newline
bitfld.long 0x0 20. "RPO,Receive Process Status" "0: Normal operation,1: Reception is in progress"
bitfld.long 0x0 19. "TPO3,Transmit Process Status 3 (Stream Class A)" "0: Normal operation,1: Transmission is in progress"
newline
bitfld.long 0x0 18. "TPO2,Transmit Process Status 2 (Stream Class B)" "0: Normal operation,1: Transmission is in progress"
bitfld.long 0x0 17. "TPO1,Transmit Process Status 1 (Network Control)" "0: Normal operation,1: Transmission is in progress"
newline
bitfld.long 0x0 16. "TPO0,Transmit Process Status 0 (Best Effort)" "0: Normal operation,1: Transmission is in progress"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "DTS,Data Transmission Suspended Status" "0: Normal operation,1: Transmission is in progress"
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "OPS_3_0,Operating Mode Status"
line.long 0x4 "CDAR0_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x4 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x8 "CDAR1_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x8 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0xC "CDAR2_0,The CDARq register indicates the current descriptor address."
hexmask.long 0xC 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x10 "CDAR3_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x10 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x14 "CDAR4_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x14 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x18 "CDAR5_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x18 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x1C "CDAR6_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x1C 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x20 "CDAR7_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x20 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x24 "CDAR8_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x24 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x28 "CDAR9_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x28 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x2C "CDAR10_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x2C 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x30 "CDAR11_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x30 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x34 "CDAR12_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x34 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x38 "CDAR13_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x38 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x3C "CDAR14_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x3C 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x40 "CDAR15_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x40 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x44 "CDAR16_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x44 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x48 "CDAR17_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x48 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x4C "CDAR18_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x4C 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x50 "CDAR19_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x50 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x54 "CDAR20_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x54 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x58 "CDAR21_0,The CDARq register indicates the current descriptor address."
hexmask.long 0x58 0.--31. 1. "CDA_31_0,Current Descriptor Address"
rgroup.long 0x88++0x3
line.long 0x0 "ESR0,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "EIL,Error Information Lost" "0: No loss of error information,1: Lost of error information detected"
newline
hexmask.long.byte 0x0 8.--11. 1. "ET_3_0,Error Type"
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--4. 1. "EQN_4_0,Error Queue Number"
group.long 0x8C++0x1B
line.long 0x0 "APSR0,Writing to this bit is only possible when the current operating mode is configuration mode."
bitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Reserved_30,Reserved" "0,1"
newline
bitfld.long 0x0 29. "GPTPCLOCK,Selec clock source for GPTP synchronization" "0: Origina clock source,1: SH'0D4_HSC"
bitfld.long 0x0 28. "Reserved_28,Reserved" "0,1"
newline
bitfld.long 0x0 27. "Reserved_27,Reserved" "0,1"
bitfld.long 0x0 26. "Reserved_26,Reserved" "0,1"
newline
bitfld.long 0x0 25. "GPTPTIMERSOURCE,Select gptp_timer[77:0] source for GPTP synchronization" "0: Origina gptp_timer source,1: gptp_timer from TSN-GPTP"
bitfld.long 0x0 24. "Reserved_24,Reserved" "0,1"
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
hexmask.long.byte 0x0 16.--19. 1. "ERREN_3_0,Dummy Error Setting"
newline
bitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 14. "TDM,Tx clock internal Delay Mode" "0: normal mode,1: delayed mode"
newline
bitfld.long 0x0 13. "RDM,Rx clock internal Delay Mode" "0: normal mode,1: delayed mode"
bitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
newline
hexmask.long.byte 0x0 5.--11. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "CMSW,select width of internal compare match signal" "0: 1clock period pulse,1: 4clock period pulse"
newline
bitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.long 0x0 2. "ERRMOD,Error injection mode" "0: ERREN[3:0] invalid,1: ERREN[3:0] valid"
newline
bitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "RCR0,The RCR register is used to make settings related to reception for the AVB-DMAC."
bitfld.long 0x4 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 16.--28. 1. "RFCL_12_0,Receive FIFO Caution Level"
newline
hexmask.long.byte 0x4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x4 6. "Reserved_6,Reserved" "0,1"
bitfld.long 0x4 5. "ETS2,Time Stamp Enable (Stream)" "0: Time stamping is disabled,1: Time stamping is enabled"
newline
bitfld.long 0x4 4. "ETS0,Time Stamp Enable (Best Effort)" "0: Time stamping is disabled,1: Time stamping is enabled"
bitfld.long 0x4 2.--3. "ESF_1_0,Stream Filtering Select" "0: Filtering is disabled,1: The filter for both AVB stream frames and..,?,?"
newline
bitfld.long 0x4 1. "ENCF,Network Control Filtering Enable" "0: Network control is disabled,1: Network control is enabled"
bitfld.long 0x4 0. "EFFS,Error Frame Enable" "0: Error frames are disabled,1: Error frames are enabled"
line.long 0x8 "RQC0_0,The RQC0 register is used to set up reception queues 0 to 3."
bitfld.long 0x8 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x8 30. "PIA3,Packed Incremental data Area (Receive Queue 3+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x8 28.--29. "UFCC3_1_0,Unread Frame Counter Configuration (Receive Queue 3+iand#65396;4)" "0,1,2,3"
bitfld.long 0x8 26.--27. "TSEL3,Truncation SELection (Receive Queue 3+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x8 24.--25. "RSM3_1_0,Receive Synchronous Mode (Receive Queue 3+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x8 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x8 22. "PIA2,Packed Incremental data Area (Receive Queue 2+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x8 20.--21. "UFCC2_1_0,Unread Frame Counter Configuration (Receive Queue 2+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x8 18.--19. "TSEL2,Truncation SELection (Receive Queue 2+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x8 16.--17. "RSM2_1_0,Receive Synchronous Mode (Receive Queue 2+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
newline
bitfld.long 0x8 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x8 14. "PIA1,Packed Incremental data Area (Receive Queue 1+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x8 12.--13. "UFCC1_1_0,Unread Frame Counter Configuration (Receive Queue 1+iand#65396;4)" "0,1,2,3"
bitfld.long 0x8 10.--11. "TSEL1,Truncation SELection (Receive Queue 1+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x8 8.--9. "RSM1_1_0,Receive Synchronous Mode (Receive Queue 1+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x8 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x8 6. "PIA0,Packed Incremental data Area (Receive Queue 0+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x8 4.--5. "UFCC0_1_0,Unread Frame Counter Configuration (Receive Queue 0+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x8 2.--3. "TSEL0,Truncation SELection (Receive Queue 0+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x8 0.--1. "RSM0_1_0,Receive Synchronous Mode (Receive Queue 0+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
line.long 0xC "RQC1_0,The RQC0 register is used to set up reception queues 0 to 3."
bitfld.long 0xC 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0xC 30. "PIA3,Packed Incremental data Area (Receive Queue 3+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0xC 28.--29. "UFCC3_1_0,Unread Frame Counter Configuration (Receive Queue 3+iand#65396;4)" "0,1,2,3"
bitfld.long 0xC 26.--27. "TSEL3,Truncation SELection (Receive Queue 3+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0xC 24.--25. "RSM3_1_0,Receive Synchronous Mode (Receive Queue 3+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0xC 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0xC 22. "PIA2,Packed Incremental data Area (Receive Queue 2+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0xC 20.--21. "UFCC2_1_0,Unread Frame Counter Configuration (Receive Queue 2+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0xC 18.--19. "TSEL2,Truncation SELection (Receive Queue 2+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0xC 16.--17. "RSM2_1_0,Receive Synchronous Mode (Receive Queue 2+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
newline
bitfld.long 0xC 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0xC 14. "PIA1,Packed Incremental data Area (Receive Queue 1+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0xC 12.--13. "UFCC1_1_0,Unread Frame Counter Configuration (Receive Queue 1+iand#65396;4)" "0,1,2,3"
bitfld.long 0xC 10.--11. "TSEL1,Truncation SELection (Receive Queue 1+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0xC 8.--9. "RSM1_1_0,Receive Synchronous Mode (Receive Queue 1+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0xC 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0xC 6. "PIA0,Packed Incremental data Area (Receive Queue 0+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0xC 4.--5. "UFCC0_1_0,Unread Frame Counter Configuration (Receive Queue 0+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0xC 2.--3. "TSEL0,Truncation SELection (Receive Queue 0+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0xC 0.--1. "RSM0_1_0,Receive Synchronous Mode (Receive Queue 0+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
line.long 0x10 "RQC2_0,The RQC0 register is used to set up reception queues 0 to 3."
bitfld.long 0x10 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x10 30. "PIA3,Packed Incremental data Area (Receive Queue 3+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x10 28.--29. "UFCC3_1_0,Unread Frame Counter Configuration (Receive Queue 3+iand#65396;4)" "0,1,2,3"
bitfld.long 0x10 26.--27. "TSEL3,Truncation SELection (Receive Queue 3+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x10 24.--25. "RSM3_1_0,Receive Synchronous Mode (Receive Queue 3+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x10 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x10 22. "PIA2,Packed Incremental data Area (Receive Queue 2+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x10 20.--21. "UFCC2_1_0,Unread Frame Counter Configuration (Receive Queue 2+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x10 18.--19. "TSEL2,Truncation SELection (Receive Queue 2+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x10 16.--17. "RSM2_1_0,Receive Synchronous Mode (Receive Queue 2+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
newline
bitfld.long 0x10 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x10 14. "PIA1,Packed Incremental data Area (Receive Queue 1+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x10 12.--13. "UFCC1_1_0,Unread Frame Counter Configuration (Receive Queue 1+iand#65396;4)" "0,1,2,3"
bitfld.long 0x10 10.--11. "TSEL1,Truncation SELection (Receive Queue 1+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x10 8.--9. "RSM1_1_0,Receive Synchronous Mode (Receive Queue 1+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x10 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x10 6. "PIA0,Packed Incremental data Area (Receive Queue 0+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x10 4.--5. "UFCC0_1_0,Unread Frame Counter Configuration (Receive Queue 0+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x10 2.--3. "TSEL0,Truncation SELection (Receive Queue 0+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x10 0.--1. "RSM0_1_0,Receive Synchronous Mode (Receive Queue 0+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
line.long 0x14 "RQC3_0,The RQC0 register is used to set up reception queues 0 to 3."
bitfld.long 0x14 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x14 30. "PIA3,Packed Incremental data Area (Receive Queue 3+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x14 28.--29. "UFCC3_1_0,Unread Frame Counter Configuration (Receive Queue 3+iand#65396;4)" "0,1,2,3"
bitfld.long 0x14 26.--27. "TSEL3,Truncation SELection (Receive Queue 3+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x14 24.--25. "RSM3_1_0,Receive Synchronous Mode (Receive Queue 3+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x14 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x14 22. "PIA2,Packed Incremental data Area (Receive Queue 2+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x14 20.--21. "UFCC2_1_0,Unread Frame Counter Configuration (Receive Queue 2+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x14 18.--19. "TSEL2,Truncation SELection (Receive Queue 2+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x14 16.--17. "RSM2_1_0,Receive Synchronous Mode (Receive Queue 2+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
newline
bitfld.long 0x14 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x14 14. "PIA1,Packed Incremental data Area (Receive Queue 1+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x14 12.--13. "UFCC1_1_0,Unread Frame Counter Configuration (Receive Queue 1+iand#65396;4)" "0,1,2,3"
bitfld.long 0x14 10.--11. "TSEL1,Truncation SELection (Receive Queue 1+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x14 8.--9. "RSM1_1_0,Receive Synchronous Mode (Receive Queue 1+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x14 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x14 6. "PIA0,Packed Incremental data Area (Receive Queue 0+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x14 4.--5. "UFCC0_1_0,Unread Frame Counter Configuration (Receive Queue 0+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x14 2.--3. "TSEL0,Truncation SELection (Receive Queue 0+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x14 0.--1. "RSM0_1_0,Receive Synchronous Mode (Receive Queue 0+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
line.long 0x18 "RQC4_0,The RQC0 register is used to set up reception queues 0 to 3."
bitfld.long 0x18 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x18 30. "PIA3,Packed Incremental data Area (Receive Queue 3+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x18 28.--29. "UFCC3_1_0,Unread Frame Counter Configuration (Receive Queue 3+iand#65396;4)" "0,1,2,3"
bitfld.long 0x18 26.--27. "TSEL3,Truncation SELection (Receive Queue 3+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x18 24.--25. "RSM3_1_0,Receive Synchronous Mode (Receive Queue 3+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x18 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x18 22. "PIA2,Packed Incremental data Area (Receive Queue 2+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x18 20.--21. "UFCC2_1_0,Unread Frame Counter Configuration (Receive Queue 2+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x18 18.--19. "TSEL2,Truncation SELection (Receive Queue 2+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x18 16.--17. "RSM2_1_0,Receive Synchronous Mode (Receive Queue 2+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
newline
bitfld.long 0x18 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x18 14. "PIA1,Packed Incremental data Area (Receive Queue 1+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x18 12.--13. "UFCC1_1_0,Unread Frame Counter Configuration (Receive Queue 1+iand#65396;4)" "0,1,2,3"
bitfld.long 0x18 10.--11. "TSEL1,Truncation SELection (Receive Queue 1+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x18 8.--9. "RSM1_1_0,Receive Synchronous Mode (Receive Queue 1+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x18 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x18 6. "PIA0,Packed Incremental data Area (Receive Queue 0+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x18 4.--5. "UFCC0_1_0,Unread Frame Counter Configuration (Receive Queue 0+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x18 2.--3. "TSEL0,Truncation SELection (Receive Queue 0+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x18 0.--1. "RSM0_1_0,Receive Synchronous Mode (Receive Queue 0+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
group.long 0xB0++0x7
line.long 0x0 "RPC0,The RPC register is used to set padding for received frames."
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 16.--23. 1. "DCNT_7_0,Stored Data Counter"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
bitfld.long 0x0 8.--10. "PCNT_2_0,Stored Padding Counter" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
line.long 0x4 "RTC0,The RTC register is used to set Maximum Number of bytes stored per received frame."
hexmask.long.byte 0x4 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x4 16.--27. 1. "MFL1_11_0,Maximum Frame Length 1"
newline
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.word 0x4 0.--11. 1. "MFL0_11_0,Maximum Frame Length 0"
group.long 0xBC++0x7
line.long 0x0 "UFCW0,The UFCW register sets the warning levels for the number of unread frames."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 24.--29. 1. "WL3_5_0,Warning Level 3"
newline
bitfld.long 0x0 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 16.--21. 1. "WL2_5_0,Warning Level 2"
newline
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 8.--13. 1. "WL1_5_0,Warning Level 1"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 0.--5. 1. "WL0_5_0,Warning Level 0"
line.long 0x4 "UFCS0,The UFCS register sets the stop levels for unread frames."
bitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 24.--29. 1. "SL3_5_0,Stop Level 3"
newline
bitfld.long 0x4 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 16.--21. 1. "SL2_5_0,Stop Level 2"
newline
bitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 8.--13. 1. "SL1_5_0,Stop Level 1"
newline
bitfld.long 0x4 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 0.--5. 1. "SL0_5_0,Stop Level 0"
rgroup.long 0xC4++0x13
line.long 0x0 "UFCV0_0,The UFCV0 register indicates the number of unread frames in reception queues 0 to 3."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 24.--29. 1. "CV3_5_0,Unread Frame Count 3+4and#65396;i"
newline
bitfld.long 0x0 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 16.--21. 1. "CV2_5_0,Unread Frame Count 2+4and#65396;i"
newline
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 8.--13. 1. "CV1_5_0,Unread Frame Count 1+4and#65396;i"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 0.--5. 1. "CV0_5_0,Unread Frame Count 0+4and#65396;i"
line.long 0x4 "UFCV1_0,The UFCV0 register indicates the number of unread frames in reception queues 0 to 3."
bitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 24.--29. 1. "CV3_5_0,Unread Frame Count 3+4and#65396;i"
newline
bitfld.long 0x4 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 16.--21. 1. "CV2_5_0,Unread Frame Count 2+4and#65396;i"
newline
bitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 8.--13. 1. "CV1_5_0,Unread Frame Count 1+4and#65396;i"
newline
bitfld.long 0x4 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 0.--5. 1. "CV0_5_0,Unread Frame Count 0+4and#65396;i"
line.long 0x8 "UFCV2_0,The UFCV0 register indicates the number of unread frames in reception queues 0 to 3."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "CV3_5_0,Unread Frame Count 3+4and#65396;i"
newline
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "CV2_5_0,Unread Frame Count 2+4and#65396;i"
newline
bitfld.long 0x8 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 8.--13. 1. "CV1_5_0,Unread Frame Count 1+4and#65396;i"
newline
bitfld.long 0x8 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 0.--5. 1. "CV0_5_0,Unread Frame Count 0+4and#65396;i"
line.long 0xC "UFCV3_0,The UFCV0 register indicates the number of unread frames in reception queues 0 to 3."
bitfld.long 0xC 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 24.--29. 1. "CV3_5_0,Unread Frame Count 3+4and#65396;i"
newline
bitfld.long 0xC 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 16.--21. 1. "CV2_5_0,Unread Frame Count 2+4and#65396;i"
newline
bitfld.long 0xC 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 8.--13. 1. "CV1_5_0,Unread Frame Count 1+4and#65396;i"
newline
bitfld.long 0xC 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 0.--5. 1. "CV0_5_0,Unread Frame Count 0+4and#65396;i"
line.long 0x10 "UFCV4_0,The UFCV0 register indicates the number of unread frames in reception queues 0 to 3."
bitfld.long 0x10 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 24.--29. 1. "CV3_5_0,Unread Frame Count 3+4and#65396;i"
newline
bitfld.long 0x10 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 16.--21. 1. "CV2_5_0,Unread Frame Count 2+4and#65396;i"
newline
bitfld.long 0x10 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 8.--13. 1. "CV1_5_0,Unread Frame Count 1+4and#65396;i"
newline
bitfld.long 0x10 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 0.--5. 1. "CV0_5_0,Unread Frame Count 0+4and#65396;i"
group.long 0xE0++0x13
line.long 0x0 "UFCD0_0,The UFCD0 register is used to decrement unread counters in reception queues 0 to 3."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 24.--29. 1. "DV3_5_0,Unread Frame Decrement Value 3+4and#65396;i"
newline
bitfld.long 0x0 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 16.--21. 1. "DV2_5_0,Unread Frame Decrement Value 2+4and#65396;i"
newline
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 8.--13. 1. "DV1_5_0,Unread Frame Decrement Value 1+4and#65396;i"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 0.--5. 1. "DV0_5_0,Unread Frame Decrement Value 0+4and#65396;i"
line.long 0x4 "UFCD1_0,The UFCD0 register is used to decrement unread counters in reception queues 0 to 3."
bitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 24.--29. 1. "DV3_5_0,Unread Frame Decrement Value 3+4and#65396;i"
newline
bitfld.long 0x4 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 16.--21. 1. "DV2_5_0,Unread Frame Decrement Value 2+4and#65396;i"
newline
bitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 8.--13. 1. "DV1_5_0,Unread Frame Decrement Value 1+4and#65396;i"
newline
bitfld.long 0x4 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 0.--5. 1. "DV0_5_0,Unread Frame Decrement Value 0+4and#65396;i"
line.long 0x8 "UFCD2_0,The UFCD0 register is used to decrement unread counters in reception queues 0 to 3."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "DV3_5_0,Unread Frame Decrement Value 3+4and#65396;i"
newline
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "DV2_5_0,Unread Frame Decrement Value 2+4and#65396;i"
newline
bitfld.long 0x8 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 8.--13. 1. "DV1_5_0,Unread Frame Decrement Value 1+4and#65396;i"
newline
bitfld.long 0x8 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 0.--5. 1. "DV0_5_0,Unread Frame Decrement Value 0+4and#65396;i"
line.long 0xC "UFCD3_0,The UFCD0 register is used to decrement unread counters in reception queues 0 to 3."
bitfld.long 0xC 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 24.--29. 1. "DV3_5_0,Unread Frame Decrement Value 3+4and#65396;i"
newline
bitfld.long 0xC 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 16.--21. 1. "DV2_5_0,Unread Frame Decrement Value 2+4and#65396;i"
newline
bitfld.long 0xC 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 8.--13. 1. "DV1_5_0,Unread Frame Decrement Value 1+4and#65396;i"
newline
bitfld.long 0xC 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 0.--5. 1. "DV0_5_0,Unread Frame Decrement Value 0+4and#65396;i"
line.long 0x10 "UFCD4_0,The UFCD0 register is used to decrement unread counters in reception queues 0 to 3."
bitfld.long 0x10 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 24.--29. 1. "DV3_5_0,Unread Frame Decrement Value 3+4and#65396;i"
newline
bitfld.long 0x10 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 16.--21. 1. "DV2_5_0,Unread Frame Decrement Value 2+4and#65396;i"
newline
bitfld.long 0x10 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 8.--13. 1. "DV1_5_0,Unread Frame Decrement Value 1+4and#65396;i"
newline
bitfld.long 0x10 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 0.--5. 1. "DV0_5_0,Unread Frame Decrement Value 0+4and#65396;i"
group.long 0xFC++0x83
line.long 0x0 "SFO0,The SFO register sets an offset into frames for use by the separation filter."
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x0 0.--5. 1. "FBP_5_0,First Byte Position"
line.long 0x4 "SFP0_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x4 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x8 "SFP1_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x8 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0xC "SFP2_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0xC 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x10 "SFP3_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x10 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x14 "SFP4_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x14 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x18 "SFP5_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x18 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x1C "SFP6_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x1C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x20 "SFP7_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x20 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x24 "SFP8_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x24 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x28 "SFP9_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x28 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x2C "SFP10_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x2C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x30 "SFP11_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x30 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x34 "SFP12_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x34 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x38 "SFP13_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x38 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x3C "SFP14_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x3C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x40 "SFP15_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x40 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x44 "SFP16_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x44 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x48 "SFP17_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x48 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x4C "SFP18_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x4C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x50 "SFP19_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x50 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x54 "SFP20_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x54 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x58 "SFP21_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x58 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x5C "SFP22_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x5C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x60 "SFP23_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x60 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x64 "SFP24_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x64 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x68 "SFP25_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x68 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x6C "SFP26_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x6C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x70 "SFP27_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x70 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x74 "SFP28_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x74 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x78 "SFP29_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x78 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x7C "SFP30_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x7C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x80 "SFP31_0,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x80 0.--31. 1. "FP_31_0,Separation Filter Pattern"
group.long 0x1B8++0x17
line.long 0x0 "SFV0_0,These bits define the 64 bit value to be loaded for separation filtering."
hexmask.long 0x0 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x4 "SFV1_0,These bits define the 64 bit value to be loaded for separation filtering."
hexmask.long 0x4 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x8 "SFM0_0,A pair of SFMi registers sets the mask value for the separation filter used by the corresponding reception queue 2 to 17 (stream 0 to 15)."
hexmask.long 0x8 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0xC "SFM1_0,A pair of SFMi registers sets the mask value for the separation filter used by the corresponding reception queue 2 to 17 (stream 0 to 15)."
hexmask.long 0xC 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x10 "SFL0,The SFL register is used to separation filter load."
hexmask.long 0x10 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x10 0.--4. 1. "LC_4_0,Load Command"
line.long 0x14 "PCRC0,The PCRC register is used to set the number of the first data byte in received frame to check a potential payload CRC."
hexmask.long.tbyte 0x14 10.--31. 1. "Reserved_10,Reserved"
hexmask.long.word 0x14 0.--9. 1. "CAS_9_0,-"
rgroup.long 0x200++0x47
line.long 0x0 "CIAR0_0,The CIARr register is used to check queue address."
hexmask.long 0x0 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x4 "CIAR1_0,The CIARr register is used to check queue address."
hexmask.long 0x4 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x8 "CIAR2_0,The CIARr register is used to check queue address."
hexmask.long 0x8 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0xC "CIAR3_0,The CIARr register is used to check queue address."
hexmask.long 0xC 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x10 "CIAR4_0,The CIARr register is used to check queue address."
hexmask.long 0x10 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x14 "CIAR5_0,The CIARr register is used to check queue address."
hexmask.long 0x14 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x18 "CIAR6_0,The CIARr register is used to check queue address."
hexmask.long 0x18 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x1C "CIAR7_0,The CIARr register is used to check queue address."
hexmask.long 0x1C 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x20 "CIAR8_0,The CIARr register is used to check queue address."
hexmask.long 0x20 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x24 "CIAR9_0,The CIARr register is used to check queue address."
hexmask.long 0x24 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x28 "CIAR10_0,The CIARr register is used to check queue address."
hexmask.long 0x28 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x2C "CIAR11_0,The CIARr register is used to check queue address."
hexmask.long 0x2C 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x30 "CIAR12_0,The CIARr register is used to check queue address."
hexmask.long 0x30 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x34 "CIAR13_0,The CIARr register is used to check queue address."
hexmask.long 0x34 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x38 "CIAR14_0,The CIARr register is used to check queue address."
hexmask.long 0x38 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x3C "CIAR15_0,The CIARr register is used to check queue address."
hexmask.long 0x3C 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x40 "CIAR16_0,The CIARr register is used to check queue address."
hexmask.long 0x40 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x44 "CIAR17_0,The CIARr register is used to check queue address."
hexmask.long 0x44 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
rgroup.long 0x280++0x47
line.long 0x0 "LIAR0_0,The LIARr register is used to check queue address."
hexmask.long 0x0 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x4 "LIAR1_0,The LIARr register is used to check queue address."
hexmask.long 0x4 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x8 "LIAR2_0,The LIARr register is used to check queue address."
hexmask.long 0x8 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0xC "LIAR3_0,The LIARr register is used to check queue address."
hexmask.long 0xC 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x10 "LIAR4_0,The LIARr register is used to check queue address."
hexmask.long 0x10 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x14 "LIAR5_0,The LIARr register is used to check queue address."
hexmask.long 0x14 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x18 "LIAR6_0,The LIARr register is used to check queue address."
hexmask.long 0x18 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x1C "LIAR7_0,The LIARr register is used to check queue address."
hexmask.long 0x1C 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x20 "LIAR8_0,The LIARr register is used to check queue address."
hexmask.long 0x20 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x24 "LIAR9_0,The LIARr register is used to check queue address."
hexmask.long 0x24 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x28 "LIAR10_0,The LIARr register is used to check queue address."
hexmask.long 0x28 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x2C "LIAR11_0,The LIARr register is used to check queue address."
hexmask.long 0x2C 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x30 "LIAR12_0,The LIARr register is used to check queue address."
hexmask.long 0x30 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x34 "LIAR13_0,The LIARr register is used to check queue address."
hexmask.long 0x34 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x38 "LIAR14_0,The LIARr register is used to check queue address."
hexmask.long 0x38 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x3C "LIAR15_0,The LIARr register is used to check queue address."
hexmask.long 0x3C 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x40 "LIAR16_0,The LIARr register is used to check queue address."
hexmask.long 0x40 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x44 "LIAR17_0,The LIARr register is used to check queue address."
hexmask.long 0x44 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
group.long 0x300++0x7
line.long 0x0 "TGC0,The TGC register is used to make settings related to transmission for the AVB-DMAC."
hexmask.long.word 0x0 22.--31. 1. "Reserved_22,Reserved"
bitfld.long 0x0 20.--21. "TBD3_1_0,Transmit FIFO Size (Stream Class A)" "0,1,2,3"
newline
bitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x0 16.--17. "TBD2_1_0,Transmit FIFO Size (Stream Class B)" "0,1,2,3"
newline
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 12.--13. "TBD1_1_0,Transmit FIFO Size (Network Control)" "0,1,2,3"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
bitfld.long 0x0 8.--9. "TBD0_1_0,Transmit FIFO Size (Best Effort)" "0,1,2,3"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
bitfld.long 0x0 5. "TQP,Transmission Queues Priority" "0: Default priority: Q3,1: Alternate priority: Q1"
newline
bitfld.long 0x0 4. "ECBS,Enable Credit Based Shaping" "0: CBS globally disabled,1: CBS enabled based on queue specific configuration"
bitfld.long 0x0 3. "TSM3,Transmit Synchronous Mode (Stream Class A)" "0: With write-back,1: Setting prohibited"
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bitfld.long 0x0 2. "TSM2,Transmit Synchronous Mode (Stream Class B)" "0: With write-back,1: Setting prohibited"
bitfld.long 0x0 1. "TSM1,Transmit Synchronous Mode (Network Control)" "0: With write-back,1: Setting prohibited"
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bitfld.long 0x0 0. "TSM0,Transmit Synchronous Mode (Best Effort)" "0: With write-back,1: Setting prohibited"
line.long 0x4 "TCCR0,The TCCR register controls transmission by the AVB-DMAC and is used to make related settings."
hexmask.long.word 0x4 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x4 17. "MFR,E-MAC status FIFO Release" "0: No request to E-MAC status FIFO,1: Release oldest entry of E-MAC status FIFO"
newline
bitfld.long 0x4 16. "MFEN,E-MAC status FIFO ENable" "0: Disabled,1: Enabled"
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x4 9. "TFR,Time Stamp FIFO Release" "0: (Not operating,1: Releases the oldest entry in the time-stamp FIFO"
bitfld.long 0x4 8. "TFEN,Time Stamp FIFO Enable" "0: Recording of transmission time stamps in the..,1: Recording of transmission time stamps in the.."
newline
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
bitfld.long 0x4 3. "TSRQ3,Transmit Start Request (Queue 3 (Stream Class A))" "0: Transmission queue is empty or stopped,1: When written: A transmission start request is.."
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bitfld.long 0x4 2. "TSRQ2,Transmit Start Request (Queue 2 (Stream Class B))" "0: Transmission queue is empty or stopped,1: When written: A transmission start request is.."
bitfld.long 0x4 1. "TSRQ1,Transmit Start Request (Queue 1 (Network Control))" "0: Transmission queue is empty or stopped,1: When written: A transmission start request is.."
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bitfld.long 0x4 0. "TSRQ0,Transmit Start Request (Queue 0 (Best Effort))" "0: Transmission queue is empty or stopped,1: When written: A transmission start request is.."
rgroup.long 0x308++0x3
line.long 0x0 "TSR0,The TSR register indicates the state of transmission by the AVB-DMAC."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x0 16.--20. 1. "MFFL_4_0,Number of entries stored in the E-MAC status FIFO"
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hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
bitfld.long 0x0 8.--10. "TFFL_2_0,Time Stamp FIFO Count" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved"
bitfld.long 0x0 2.--3. "CCS1_1_0,CBS Counter Status 1 (Class A)" "0: The current credit value is within the limit,1: The current credit value is less than or equal..,?,?"
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bitfld.long 0x0 0.--1. "CCS0_1_0,CBS Counter Status 0 (Class B)" "0: The current credit value is within the limit,1: The current credit value is less than or equal..,?,?"
group.long 0x30C++0x3
line.long 0x0 "MFA0,The MFA register indicates the state of MAC."
hexmask.long.byte 0x0 26.--31. 1. "Reserved_26,Reserved"
hexmask.long.word 0x0 16.--25. 1. "MST_9_0,Tag number from descriptor identifying the frame E-MAC status relation"
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hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "MSV_3_0,E-MAC Status Value"
rgroup.long 0x310++0xF
line.long 0x0 "TFA00,TFA0 indicates the nano seconds portion of the timestamp value."
hexmask.long 0x0 0.--31. 1. "TSV_31_0,Time Stamp Value"
line.long 0x4 "TFA10,The TFA1 register indicates the lower seconds portion of the timestamp value."
hexmask.long 0x4 0.--31. 1. "TSV_63_32,Time Stamp Value"
line.long 0x8 "TFA20,The TFA2 register indicates the timestamp tag and the higher seconds portion of the timestamp value."
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved"
hexmask.long.word 0x8 16.--25. 1. "TST_9_0,Time Stamp Tag"
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hexmask.long.word 0x8 0.--15. 1. "TSV_79_64,Time Stamp Value"
line.long 0xC "VRR0,"
hexmask.long 0xC 0.--31. 1. "VC_31_0,Version Code"
group.long 0x320++0x1F
line.long 0x0 "CIVR0_0,The CIVR0 register sets the increment in the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x0 0.--31. 1. "CIV_31_0,CBS Increment Value"
line.long 0x4 "CIVR1_0,The CIVR0 register sets the increment in the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x4 0.--31. 1. "CIV_31_0,CBS Increment Value"
line.long 0x8 "CDVR0_0,The CDVR0 register sets the decrement in the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x8 0.--31. 1. "CDV_31_0,CBS Decrement Value"
line.long 0xC "CDVR1_0,The CDVR0 register sets the decrement in the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0xC 0.--31. 1. "CDV_31_0,CBS Decrement Value"
line.long 0x10 "CUL0_0,The CUL0 register sets the upper limit for credit values calculated by using the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x10 0.--31. 1. "ULV_31_0,CBS Upper Limit"
line.long 0x14 "CUL1_0,The CUL0 register sets the upper limit for credit values calculated by using the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x14 0.--31. 1. "ULV_31_0,CBS Upper Limit"
line.long 0x18 "CLL0_0,The CUL0 register sets the lower limit for credit values calculated by using the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x18 0.--31. 1. "LLV_31_0,CBS Lower Limit"
line.long 0x1C "CLL1_0,The CUL0 register sets the lower limit for credit values calculated by using the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x1C 0.--31. 1. "LLV_31_0,CBS Lower Limit"
group.long 0x350++0x2F
line.long 0x0 "DIC0,The DIC register is used to control descriptor interrupts 1 to 15."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "DPE15,Descriptor Interrupt Enable 15" "0: Disabled,1: Enabled"
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bitfld.long 0x0 14. "DPE14,Descriptor Interrupt Enable 14" "0: Disabled,1: Enabled"
bitfld.long 0x0 13. "DPE13,Descriptor Interrupt Enable 13" "0: Disabled,1: Enabled"
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bitfld.long 0x0 12. "DPE12,Descriptor Interrupt Enable 12" "0: Disabled,1: Enabled"
bitfld.long 0x0 11. "DPE11,Descriptor Interrupt Enable 11" "0: Disabled,1: Enabled"
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bitfld.long 0x0 10. "DPE10,Descriptor Interrupt Enable 10" "0: Disabled,1: Enabled"
bitfld.long 0x0 9. "DPE9,Descriptor Interrupt Enable 9" "0: Disabled,1: Enabled"
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bitfld.long 0x0 8. "DPE8,Descriptor Interrupt Enable 8" "0: Disabled,1: Enabled"
bitfld.long 0x0 7. "DPE7,Descriptor Interrupt Enable 7" "0: Disabled,1: Enabled"
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bitfld.long 0x0 6. "DPE6,Descriptor Interrupt Enable 6" "0: Disabled,1: Enabled"
bitfld.long 0x0 5. "DPE5,Descriptor Interrupt Enable 5" "0: Disabled,1: Enabled"
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bitfld.long 0x0 4. "DPE4,Descriptor Interrupt Enable 4" "0: Disabled,1: Enabled"
bitfld.long 0x0 3. "DPE3,Descriptor Interrupt Enable 3" "0: Disabled,1: Enabled"
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bitfld.long 0x0 2. "DPE2,Descriptor Interrupt Enable 2" "0: Disabled,1: Enabled"
bitfld.long 0x0 1. "DPE1,Descriptor Interrupt Enable 1" "0: Disabled,1: Enabled"
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bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "DIS0,The DIS register indicates the state of descriptor interrupts."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4 15. "DPF15,Descriptor Interrupt Status15" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x4 14. "DPF14,Descriptor Interrupt Status14" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 13. "DPF13,Descriptor Interrupt Status13" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x4 12. "DPF12,Descriptor Interrupt Status12" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 11. "DPF11,Descriptor Interrupt Status11" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x4 10. "DPF10,Descriptor Interrupt Status10" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 9. "DPF9,Descriptor Interrupt Status9" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x4 8. "DPF8,Descriptor Interrupt Status8" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 7. "DPF7,Descriptor Interrupt Status7" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x4 6. "DPF6,Descriptor Interrupt Status6" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 5. "DPF5,Descriptor Interrupt Status5" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x4 4. "DPF4,Descriptor Interrupt Status4" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 3. "DPF3,Descriptor Interrupt Status3" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x4 2. "DPF2,Descriptor Interrupt Status2" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 1. "DPF1,Descriptor Interrupt Status1" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "EIC0,The EIC register controls the AVB-DMAC-related error interrupts."
hexmask.long.tbyte 0x8 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x8 10. "TBFE,Tx-Buffer Full interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x8 9. "MFFE,MAC status FIFO Full interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x8 8. "TFFE,Time Stamp FIFO Full-Error Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x8 7. "CULE1,CBS Upper Limit Error Interrupt Enable (Class A)" "0: Disabled,1: Enabled"
bitfld.long 0x8 6. "CULE0,CBS Upper Limit Error Interrupt Enable (Class B)" "0: Disabled,1: Enabled"
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bitfld.long 0x8 5. "CLLE1,CBS Lower Limit Error Interrupt Enable (Class A)" "0: Disabled,1: Enabled"
bitfld.long 0x8 4. "CLLE0,CBS Lower Limit Error Interrupt Enable (Class B)" "0: Disabled,1: Enabled"
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bitfld.long 0x8 3. "SEE,Separation Error Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x8 2. "QEE,Queue Error Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x8 1. "MTEE,E-MAC Transmission Error Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x8 0. "MREE,E-MAC Reception Error Interrupt Enable" "0: Disabled,1: Enabled"
line.long 0xC "EIS0,The EIS register indicates the states of AVB-DMAC-related error interrupts."
hexmask.long.word 0xC 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0xC 16. "QFS,Queue Full Error Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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hexmask.long.byte 0xC 11.--15. 1. "Reserved_11,Reserved"
bitfld.long 0xC 10. "TBFF,Tx-Buffer Full Flag" "0: No interrupt pending,1: Tx-Buffer full condition detected"
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bitfld.long 0xC 9. "MFFF,E-MAC status FIFO Full Flag" "0: No interrupt pending,1: E-MAC status FIFO full"
bitfld.long 0xC 8. "TFFF,Time Stamp FIFO Full Error Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0xC 7. "CULF1,CBS Upper Limit Error Interrupt Status (Class A)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0xC 6. "CULF0,CBS Upper Limit Error Interrupt Status (Class B)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0xC 5. "CLLF1,CBS Lower Limit Error Interrupt Status (Class A)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0xC 4. "CLLF0,CBS Lower Limit Error Interrupt Status (Class B)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0xC 3. "SEF,Separation Error Flag" "0: No interrupt pending,1: AVB stream data frame has discarded"
bitfld.long 0xC 2. "QEF,Queue Error Flag" "0: No interrupt pending,1: Interrupt pending"
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bitfld.long 0xC 1. "MTEF,E-MAC Transmission Error Flag" "0: No interrupt pending,1: E-MAC has reported an error during transmission"
bitfld.long 0xC 0. "MREF,E-MAC Reception Error Flag" "0: No interrupt pending,1: E-MAC has reported an error during reception"
line.long 0x10 "RIC00,The RIC0 register controls the AVB-DMAC receive interrupts."
hexmask.long.word 0x10 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x10 17. "FRE17,Receive Frame Enable 17 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 16. "FRE16,Receive Frame Enable 16 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 15. "FRE15,Receive Frame Enable 15 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 14. "FRE14,Receive Frame Enable 14 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 13. "FRE13,Receive Frame Enable 13 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 12. "FRE12,Receive Frame Enable 12 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 11. "FRE11,Receive Frame Enable 11 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 10. "FRE10,Receive Frame Enable 10 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 9. "FRE9,Receive Frame Enable 9 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 8. "FRE8,Receive Frame Enable 8 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 7. "FRE7,Receive Frame Enable 7 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 6. "FRE6,Receive Frame Enable 6 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 5. "FRE5,Receive Frame Enable 5 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 4. "FRE4,Receive Frame Enable 4 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 3. "FRE3,Receive Frame Enable 3 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 2. "FRE2,Receive Frame Enable 2 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 1. "FRE1,Receive Frame Enable 1 (Network Control)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 0. "FRE0,Receive Frame Enable 0 (Best Effort)" "0: Disabled,1: Enabled"
line.long 0x14 "RIS00,The RIS0 register indicates the states of the AVB-DMAC receive interrupts."
hexmask.long.word 0x14 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x14 17. "FRF17,Receive Frame Interrupt Status 17 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 16. "FRF16,Receive Frame Interrupt Status 16 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 15. "FRF15,Receive Frame Interrupt Status 15 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 14. "FRF14,Receive Frame Interrupt Status 14 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 13. "FRF13,Receive Frame Interrupt Status 13 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 12. "FRF12,Receive Frame Interrupt Status 12 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 11. "FRF11,Receive Frame Interrupt Status 11 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 10. "FRF10,Receive Frame Interrupt Status 10 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 9. "FRF9,Receive Frame Interrupt Status 9 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 8. "FRF8,Receive Frame Interrupt Status 8 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 7. "FRF7,Receive Frame Interrupt Status 7 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 6. "FRF6,Receive Frame Interrupt Status 6 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 5. "FRF5,Receive Frame Interrupt Status 5 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 4. "FRF4,Receive Frame Interrupt Status 4 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 3. "FRF3,Receive Frame Interrupt Status 3 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 2. "FRF2,Receive Frame Interrupt Status 2 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 1. "FRF1,Receive Frame Interrupt Status 1 (Network Control)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 0. "FRF0,Receive Frame Interrupt Status 0 (Best Effort)" "0: The interrupt is not pending,1: The interrupt is pending"
line.long 0x18 "RIC10,The RIC1 register controls the AVB-DMAC receive interrupts."
bitfld.long 0x18 31. "RFWE,Receive FIFO Warning Interrupt Enable" "0: Disabled,1: Enabled"
hexmask.long.word 0x18 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x18 17. "RWE17,Reception Warning interrupt Enable 17" "0: Disabled,1: Enabled"
bitfld.long 0x18 16. "RWE16,Reception Warning interrupt Enable 16" "0: Disabled,1: Enabled"
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bitfld.long 0x18 15. "RWE15,Reception Warning interrupt Enable 15" "0: Disabled,1: Enabled"
bitfld.long 0x18 14. "RWE14,Reception Warning interrupt Enable 14" "0: Disabled,1: Enabled"
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bitfld.long 0x18 13. "RWE13,Reception Warning interrupt Enable 13" "0: Disabled,1: Enabled"
bitfld.long 0x18 12. "RWE12,Reception Warning interrupt Enable 12" "0: Disabled,1: Enabled"
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bitfld.long 0x18 11. "RWE11,Reception Warning interrupt Enable 11" "0: Disabled,1: Enabled"
bitfld.long 0x18 10. "RWE10,Reception Warning interrupt Enable 10" "0: Disabled,1: Enabled"
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bitfld.long 0x18 9. "RWE9,Reception Warning interrupt Enable 9" "0: Disabled,1: Enabled"
bitfld.long 0x18 8. "RWE8,Reception Warning interrupt Enable 8" "0: Disabled,1: Enabled"
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bitfld.long 0x18 7. "RWE7,Reception Warning interrupt Enable 7" "0: Disabled,1: Enabled"
bitfld.long 0x18 6. "RWE6,Reception Warning interrupt Enable 6" "0: Disabled,1: Enabled"
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bitfld.long 0x18 5. "RWE5,Reception Warning interrupt Enable 5" "0: Disabled,1: Enabled"
bitfld.long 0x18 4. "RWE4,Reception Warning interrupt Enable 4" "0: Disabled,1: Enabled"
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bitfld.long 0x18 3. "RWE3,Reception Warning interrupt Enable 3" "0: Disabled,1: Enabled"
bitfld.long 0x18 2. "RWE2,Reception Warning interrupt Enable 2" "0: Disabled,1: Enabled"
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bitfld.long 0x18 1. "RWE1,Reception Warning interrupt Enable 1" "0: Disabled,1: Enabled"
bitfld.long 0x18 0. "RWE0,Reception Warning interrupt Enable 0" "0: Disabled,1: Enabled"
line.long 0x1C "RIS10,The RIS1 register indicates the states of the AVB-DMAC receive interrupts."
bitfld.long 0x1C 31. "RFWF,Receive FIFO Warning Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
hexmask.long.word 0x1C 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x1C 17. "RWF17,Reception Warning Flag 17" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 16. "RWF16,Reception Warning Flag 16" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 15. "RWF15,Reception Warning Flag 15" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 14. "RWF14,Reception Warning Flag 14" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 13. "RWF13,Reception Warning Flag 13" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 12. "RWF12,Reception Warning Flag 12" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 11. "RWF11,Reception Warning Flag 11" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 10. "RWF10,Reception Warning Flag 10" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 9. "RWF9,Reception Warning Flag 9" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 8. "RWF8,Reception Warning Flag 8" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 7. "RWF7,Reception Warning Flag 7" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 6. "RWF6,Reception Warning Flag 6" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 5. "RWF5,Reception Warning Flag 5" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 4. "RWF4,Reception Warning Flag 4" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 3. "RWF3,Reception Warning Flag 3" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 2. "RWF2,Reception Warning Flag 2" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 1. "RWF1,Reception Warning Flag 1" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 0. "RWF0,Reception Warning Flag 0" "0: No interrupt pending,1: Unread frame counter warning level reached"
line.long 0x20 "RIC20,The RIC2 register controls the AVB-DMAC receive interrupts."
bitfld.long 0x20 31. "RFFE,Receive FIFO Full Interrupt Enable" "0: Disabled,1: Enabled"
hexmask.long.word 0x20 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x20 17. "QFE17,Receive Queue 17 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 16. "QFE16,Receive Queue 16 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 15. "QFE15,Receive Queue 15 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 14. "QFE14,Receive Queue 14 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 13. "QFE13,Receive Queue 13 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 12. "QFE12,Receive Queue 12 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 11. "QFE11,Receive Queue 11 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 10. "QFE10,Receive Queue 10 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 9. "QFE9,Receive Queue 9 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 8. "QFE8,Receive Queue 8 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 7. "QFE7,Receive Queue 7 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 6. "QFE6,Receive Queue 6 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 5. "QFE5,Receive Queue 5 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 4. "QFE4,Receive Queue 4 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 3. "QFE3,Receive Queue 3 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 2. "QFE2,Receive Queue 2 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 1. "QFE1,Receive Queue 1 (Network Control) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 0. "QFE0,Receive Queue 0 (Best Effort) Full Interrupt Enable" "0: Disabled,1: Enabled"
line.long 0x24 "RIS20,The RIS2 register indicates the states of the AVB-DMAC receive interrupts."
bitfld.long 0x24 31. "RFFF,Receive FIFO Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
hexmask.long.word 0x24 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x24 17. "QFF17,Receive Queue 17 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 16. "QFF16,Receive Queue 16 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x24 15. "QFF15,Receive Queue 15 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 14. "QFF14,Receive Queue 14 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x24 13. "QFF13,Receive Queue 13 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 12. "QFF12,Receive Queue 12 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x24 11. "QFF11,Receive Queue 11 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 10. "QFF10,Receive Queue 10 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x24 9. "QFF9,Receive Queue 9 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 8. "QFF8,Receive Queue 8 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x24 7. "QFF7,Receive Queue 7 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 6. "QFF6,Receive Queue 6 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x24 5. "QFF5,Receive Queue 5 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 4. "QFF4,Receive Queue 4 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x24 3. "QFF3,Receive Queue 3 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 2. "QFF2,Receive Queue 2 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x24 1. "QFF1,Receive Queue 1 (Network Control) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 0. "QFF0,Receive Queue 0 (Best Effort) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
line.long 0x28 "TIC0,The TIC register controls the AVB-DMAC transmit interrupts."
hexmask.long.word 0x28 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x28 19. "TDPE3,Transmit Descriptor Processed interrupt Enable 3" "0: Disabled,1: Enabled"
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bitfld.long 0x28 18. "TDPE2,Transmit Descriptor Processed interrupt Enable 2" "0: Disabled,1: Enabled"
bitfld.long 0x28 17. "TDPE1,Transmit Descriptor Processed interrupt Enable 1" "0: Disabled,1: Enabled"
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bitfld.long 0x28 16. "TDPE0,Transmit Descriptor Processed interrupt Enable 0" "0: Disabled,1: Enabled"
hexmask.long.byte 0x28 12.--15. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x28 11. "MFWE,MAC status FIFO Warning interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x28 10. "MFUE,MAC status FIFO Updated interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x28 9. "TFWE,Time Stamp FIFO Warning Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x28 8. "TFUE,Time Stamp FIFO Update Interrupt Enable" "0: Disabled,1: Enabled"
newline
hexmask.long.byte 0x28 4.--7. 1. "Reserved_4,Reserved"
bitfld.long 0x28 3. "FTE3,Frame Transmitted interrupt Enable 3" "0: Disabled,1: Enabled"
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bitfld.long 0x28 2. "FTE2,Frame Transmitted interrupt Enable 2" "0: Disabled,1: Enabled"
bitfld.long 0x28 1. "FTE1,Frame Transmitted interrupt Enable 1" "0: Disabled,1: Enabled"
newline
bitfld.long 0x28 0. "FTE0,Frame Transmitted interrupt Enable 0" "0: Disabled,1: Enabled"
line.long 0x2C "TIS0,The TIS register indicates the states of the AVB-DMAC transmit interrupts."
hexmask.long.word 0x2C 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x2C 19. "TDPF3,Transmit Descriptor Processed Flag 3" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x2C 18. "TDPF2,Transmit Descriptor Processed Flag 2" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x2C 17. "TDPF1,Transmit Descriptor Processed Flag 1" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x2C 16. "TDPF0,Transmit Descriptor Processed Flag 0" "0: No interrupt pending,1: Descriptor interrupt pending"
hexmask.long.byte 0x2C 12.--15. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x2C 11. "MFWF,E-MAC status FIFO Warning Flag" "0: No interrupt pending,1: Tx Status FIFO warning level has been reached"
bitfld.long 0x2C 10. "MFUF,E-MAC status FIFO Updated Flag" "0: No interrupt pending,1: Tx Status FIFO has been updated"
newline
bitfld.long 0x2C 9. "TFWF,Time Stamp FIFO Warning Interrupt Status" "0: The interrupt is not pending,1: The time-stamp FIFO has reached the warning level"
bitfld.long 0x2C 8. "TFUF,Time Stamp FIFO Update Interrupt Status" "0: The interrupt is not pending,1: The time-stamp FIFO has been updated"
newline
hexmask.long.byte 0x2C 4.--7. 1. "Reserved_4,Reserved"
bitfld.long 0x2C 3. "FTF3,Frame Transmitted Flag 3" "0: No interrupt pending,1: Frame transmitted by E-MAC"
newline
bitfld.long 0x2C 2. "FTF2,Frame Transmitted Flag 2" "0: No interrupt pending,1: Frame transmitted by E-MAC"
bitfld.long 0x2C 1. "FTF1,Frame Transmitted Flag 1" "0: No interrupt pending,1: Frame transmitted by E-MAC"
newline
bitfld.long 0x2C 0. "FTF0,Frame Transmitted Flag 0" "0: No interrupt pending,1: Frame transmitted by E-MAC"
rgroup.long 0x380++0x3
line.long 0x0 "ISS0,The ISS register gives a summary of the states of AVB-DMAC-related interrupts."
bitfld.long 0x0 31. "DPM15,Descriptor Interrupt 15 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 30. "DPM14,Descriptor Interrupt 14 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x0 29. "DPM13,Descriptor Interrupt 13 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 28. "DPM12,Descriptor Interrupt 12 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x0 27. "DPM11,Descriptor Interrupt 11 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 26. "DPM10,Descriptor Interrupt 10 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x0 25. "DPM9,Descriptor Interrupt 9 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 24. "DPM8,Descriptor Interrupt 8 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x0 23. "DPM7,Descriptor Interrupt 7 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 22. "DPM6,Descriptor Interrupt 6 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x0 21. "DPM5,Descriptor Interrupt 5 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 20. "DPM4,Descriptor Interrupt 4 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x0 19. "DPM3,Descriptor Interrupt 3 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 18. "DPM2,Descriptor Interrupt 2 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x0 17. "DPM1,Descriptor Interrupt 1 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 14.--16. "Reserved_14,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 13. "CGIM,gPTP Interrupt Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 12. "RFWM,Receive FIFO Warning Interrupt Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x0 11. "MFWM,E-MAC status FIFO Warning Mirror" "0: No interrupt pending,1: E-MAC status FIFO warning interrupt pending"
bitfld.long 0x0 10. "MFUM,E-MAC status FIFO Updated Mirror" "0: No interrupt pending,1: E-MAC status FIFO updated interrupt pending"
newline
bitfld.long 0x0 9. "TFWM,Time Stamp FIFO Warning Interrupt Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 8. "TFUM,Time Stamp FIFO Update Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x0 7. "MM,E-MAC Interrupt Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 6. "EM,Error Interrupt Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x0 3.--5. "Reserved_3,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 2. "FTM,Frame Transmitted Mirror" "0: No interrupt pending,1: Frame transmitted interrupt pending"
newline
bitfld.long 0x0 1. "RWM,Reception Warning Mirror" "0: No interrupt pending,1: Frame transmitted interrupt pending"
bitfld.long 0x0 0. "FRM,Frame Received Mirror" "0: No interrupt pending,1: Frame received interrupt pending"
group.long 0x384++0xB
line.long 0x0 "CIE0,The CIE register is used to control the Common Interrupt."
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "RFFL,Rx-FIFO Full interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x0 18. "RFWL,Rx-FIFO Warning interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 17. "CL0M,Common Line 0 Mode" "0: Use common interrupt line 0,1: Use queue specific interrupt line 0"
newline
bitfld.long 0x0 16. "RQFM,Reception Queue Full Mode" "0: Use for error interrupt line,1: Use for queue specific interrupt line"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "CTIE,Common Transmit Interrupt Enable" "0: Disabled,1: Enabled"
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "CRIE,Common Receive Interrupt enable" "0: Disabled,1: Enabled"
line.long 0x4 "RIC30,The RIC3 register controls the AVB-DMAC receive descriptor interrupts."
hexmask.long.word 0x4 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x4 17. "RDPE17,Receive Descriptor Processed interrupt Enable 17" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 16. "RDPE16,Receive Descriptor Processed interrupt Enable 16" "0: Disabled,1: Enabled"
bitfld.long 0x4 15. "RDPE15,Receive Descriptor Processed interrupt Enable 15" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 14. "RDPE14,Receive Descriptor Processed interrupt Enable 14" "0: Disabled,1: Enabled"
bitfld.long 0x4 13. "RDPE13,Receive Descriptor Processed interrupt Enable 13" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 12. "RDPE12,Receive Descriptor Processed interrupt Enable 12" "0: Disabled,1: Enabled"
bitfld.long 0x4 11. "RDPE11,Receive Descriptor Processed interrupt Enable 11" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 10. "RDPE10,Receive Descriptor Processed interrupt Enable 10" "0: Disabled,1: Enabled"
bitfld.long 0x4 9. "RDPE9,Receive Descriptor Processed interrupt Enable 9" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 8. "RDPE8,Receive Descriptor Processed interrupt Enable 8" "0: Disabled,1: Enabled"
bitfld.long 0x4 7. "RDPE7,Receive Descriptor Processed interrupt Enable 7" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 6. "RDPE6,Receive Descriptor Processed interrupt Enable 6" "0,1"
bitfld.long 0x4 5. "RDPE5,Receive Descriptor Processed interrupt Enable 5" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 4. "RDPE4,Receive Descriptor Processed interrupt Enable 4" "0: Disabled,1: Enabled"
bitfld.long 0x4 3. "RDPE3,Receive Descriptor Processed interrupt Enable 3" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 2. "RDPE2,Receive Descriptor Processed interrupt Enable 2" "0: Disabled,1: Enabled"
bitfld.long 0x4 1. "RDPE1,Receive Descriptor Processed interrupt Enable 1" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 0. "RDPE0,Receive Descriptor Processed interrupt Enable 0" "0: Disabled,1: Enabled"
line.long 0x8 "RIS30,The RIS3 register indicates the states of the AVB-DMAC receive descriptor interrupts."
hexmask.long.word 0x8 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x8 17. "RDPF17,Receive Descriptor Processed Flag 17" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 16. "RDPF16,Receive Descriptor Processed Flag 16" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 15. "RDPF15,Receive Descriptor Processed Flag 15" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 14. "RDPF14,Receive Descriptor Processed Flag 14" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 13. "RDPF13,Receive Descriptor Processed Flag 13" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 12. "RDPF12,Receive Descriptor Processed Flag 12" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 11. "RDPF11,Receive Descriptor Processed Flag 11" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 10. "RDPF10,Receive Descriptor Processed Flag 10" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 9. "RDPF9,Receive Descriptor Processed Flag 9" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 8. "RDPF8,Receive Descriptor Processed Flag 8" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 7. "RDPF7,Receive Descriptor Processed Flag 7" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 6. "RDPF6,Receive Descriptor Processed Flag 6" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 5. "RDPF5,Receive Descriptor Processed Flag 5" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 4. "RDPF4,Receive Descriptor Processed Flag 4" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 3. "RDPF3,Receive Descriptor Processed Flag 3" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 2. "RDPF2,Receive Descriptor Processed Flag 2" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 1. "RDPF1,Receive Descriptor Processed Flag 1" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 0. "RDPF0,Receive Descriptor Processed Flag 0" "0: No interrupt pending,1: Descriptor interrupt pending"
group.long 0x440++0xB
line.long 0x0 "DIL0,The DIL register is used to control the Descriptor Interrupt line."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "DPL15,Descriptor Processed interrupt Line select 15" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x0 14. "DPL14,Descriptor Processed interrupt Line select 14" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 13. "DPL13,Descriptor Processed interrupt Line select 13" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x0 12. "DPL12,Descriptor Processed interrupt Line select 12" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 11. "DPL11,Descriptor Processed interrupt Line select 11" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x0 10. "DPL10,Descriptor Processed interrupt Line select 10" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 9. "DPL9,Descriptor Processed interrupt Line select 9" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x0 8. "DPL8,Descriptor Processed interrupt Line select 8" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 7. "DPL7,Descriptor Processed interrupt Line select 7" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x0 6. "DPL6,Descriptor Processed interrupt Line select 6" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 5. "DPL5,Descriptor Processed interrupt Line select 5" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x0 4. "DPL4,Descriptor Processed interrupt Line select 4" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 3. "DPL3,Descriptor Processed interrupt Line select 3" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x0 2. "DPL2,Descriptor Processed interrupt Line select 2" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "EIL0,The EIL register is used to control the Error Interrupt line."
hexmask.long.tbyte 0x4 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x4 10. "TBFL,Tx-Buffer Full interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x4 9. "MFFL,E-MAC status FIFO Full interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x4 8. "TFFL,Timestamp FIFO Full interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x4 7. "CULL1,CBS Upper Limit reached interrupt Line select 1" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x4 6. "CULL0,CBS Upper Limit reached interrupt Line select 0" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x4 5. "CLLL1,CBS Lower Limit reached interrupt Line select 1" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x4 4. "CLLL0,CBS Lower Limit reached interrupt Line select 0" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x4 3. "SEL,Separation Error interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x4 2. "QEL,Queue Error interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x4 1. "MTEL,E-MAC Transmission Error interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x4 0. "MREL,E-MAC Reception Error interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
line.long 0x8 "TIL0,The TIL register is used to control the Transmission Interrupt line."
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x8 11. "MFWL,E-MAC status FIFO Warning interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x8 10. "MFUL,E-MAC status FIFO Updated interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x8 9. "TFWL,Timestamp FIFO Warning interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x8 8. "TFUL,Timestamp FIFO Updated interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
hexmask.long.byte 0x8 0.--7. 1. "Reserved_0,Reserved"
group.long 0x450++0x2F
line.long 0x0 "DIE0,The DIE register is used to control the Descriptor Interrupt."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "DPS15,Descriptor Processed interrupt Set 15" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x0 14. "DPS14,Descriptor Processed interrupt Set 14" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 13. "DPS13,Descriptor Processed interrupt Set 13" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x0 12. "DPS12,Descriptor Processed interrupt Set 12" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 11. "DPS11,Descriptor Processed interrupt Set 11" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x0 10. "DPS10,Descriptor Processed interrupt Set 10" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 9. "DPS9,Descriptor Processed interrupt Set 9" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x0 8. "DPS8,Descriptor Processed interrupt Set 8" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 7. "DPS7,Descriptor Processed interrupt Set 7" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x0 6. "DPS6,Descriptor Processed interrupt Set 6" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 5. "DPS5,Descriptor Processed interrupt Set 5" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x0 4. "DPS4,Descriptor Processed interrupt Set 4" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 3. "DPS3,Descriptor Processed interrupt Set 3" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x0 2. "DPS2,Descriptor Processed interrupt Set 2" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 1. "DPS1,Descriptor Processed interrupt Set 1" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "DID0,The DID register is used to control the Descriptor Interrupt."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4 15. "DPD15,Descriptor Processed interrupt Disable 15" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x4 14. "DPD14,Descriptor Processed interrupt Disable 14" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 13. "DPD13,Descriptor Processed interrupt Disable 13" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x4 12. "DPD12,Descriptor Processed interrupt Disable 12" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 11. "DPD11,Descriptor Processed interrupt Disable 11" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x4 10. "DPD10,Descriptor Processed interrupt Disable 10" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 9. "DPD9,Descriptor Processed interrupt Disable 9" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x4 8. "DPD8,Descriptor Processed interrupt Disable 8" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 7. "DPD7,Descriptor Processed interrupt Disable 7" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x4 6. "DPD6,Descriptor Processed interrupt Disable 6" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 5. "DPD5,Descriptor Processed interrupt Disable 5" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x4 4. "DPD4,Descriptor Processed interrupt Disable 4" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 3. "DPD3,Descriptor Processed interrupt Disable 3" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x4 2. "DPD2,Descriptor Processed interrupt Disable 2" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 1. "DPD1,Descriptor Processed interrupt Disable 1" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "EIE0,The EIE register is used to control the Error Interrupt."
hexmask.long.tbyte 0x8 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x8 10. "TBFS,Tx-Buffer Full interrupt Set" "0: No change of EIC,1: Set EIC"
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bitfld.long 0x8 9. "MFFS,E-MAC status FIFO Full interrupt Set" "0: No change of EIC,1: Set EIC"
bitfld.long 0x8 8. "TFFS,Timestamp FIFO Full interrupt Set" "0: No change of EIC,1: Set EIC"
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bitfld.long 0x8 7. "CULS1,CBS Upper Limit reached interrupt Set 1" "0: No change of EIC,1: Set EIC"
bitfld.long 0x8 6. "CULS0,CBS Upper Limit reached interrupt Set 0" "0: No change of EIC,1: Set EIC"
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bitfld.long 0x8 5. "CLLS1,CBS Lower Limit reached interrupt Set 1" "0: No change of EIC,1: Set EIC"
bitfld.long 0x8 4. "CLLS0,CBS Lower Limit reached interrupt Set 0" "0: No change of EIC,1: Set EIC"
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bitfld.long 0x8 3. "SES,Separation Error interrupt Set" "0: No change of EIC,1: Set EIC"
bitfld.long 0x8 2. "QES,Queue Error interrupt Set" "0: No change of EIC,1: Set EIC"
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bitfld.long 0x8 1. "MTES,E-MAC Transmission Error interrupt Set" "0: No change of EIC,1: Set EIC"
bitfld.long 0x8 0. "MRES,E-MAC Reception Error interrupt Set" "0: No change of EIC,1: Set EIC"
line.long 0xC "EID0,The EID register is used to control the Error Interrupt."
hexmask.long.tbyte 0xC 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0xC 10. "TBFD,Tx-Buffer Full interrupt Disable" "0: No change of EIC,1: Set EIC"
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bitfld.long 0xC 9. "MFFD,E-MAC status FIFO Full interrupt Disable" "0: No change of EIC,1: Set EIC"
bitfld.long 0xC 8. "TFFD,Timestamp FIFO Full interrupt Disable" "0: No change of EIC,1: Set EIC"
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bitfld.long 0xC 7. "CULD1,CBS Upper Limit reached interrupt Disable 1" "0: No change of EIC,1: Set EIC"
bitfld.long 0xC 6. "CULD0,CBS Upper Limit reached interrupt Disable 0" "0: No change of EIC,1: Set EIC"
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bitfld.long 0xC 5. "CLLD1,CBS Lower Limit reached interrupt Disable 1" "0: No change of EIC,1: Set EIC"
bitfld.long 0xC 4. "CLLD0,CBS Lower Limit reached interrupt Disable 0" "0: No change of EIC,1: Set EIC"
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bitfld.long 0xC 3. "SED,Separation Error interrupt Disable" "0: No change of EIC,1: Set EIC"
bitfld.long 0xC 2. "QED,Queue Error interrupt Disable" "0: No change of EIC,1: Set EIC"
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bitfld.long 0xC 1. "MTED,E-MAC Transmission Error interrupt Disable" "0: No change of EIC,1: Set EIC"
bitfld.long 0xC 0. "MRED,E-MAC Reception Error interrupt Disable" "0: No change of EIC,1: Set EIC"
line.long 0x10 "RIE00,The RIE0 register is used to control the Reception Interrupt."
hexmask.long.word 0x10 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x10 17. "FRS17,Frame Received interrupt Set 17" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x10 16. "FRS16,Frame Received interrupt Set 16" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 15. "FRS15,Frame Received interrupt Set 15" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x10 14. "FRS14,Frame Received interrupt Set 14" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 13. "FRS13,Frame Received interrupt Set 13" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x10 12. "FRS12,Frame Received interrupt Set 12" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 11. "FRS11,Frame Received interrupt Set 11" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x10 10. "FRS10,Frame Received interrupt Set 10" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 9. "FRS9,Frame Received interrupt Set 9" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x10 8. "FRS8,Frame Received interrupt Set 8" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 7. "FRS7,Frame Received interrupt Set 7" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x10 6. "FRS6,Frame Received interrupt Set 6" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 5. "FRS5,Frame Received interrupt Set 5" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x10 4. "FRS4,Frame Received interrupt Set 4" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 3. "FRS3,Frame Received interrupt Set 3" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x10 2. "FRS2,Frame Received interrupt Set 2" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 1. "FRS1,Frame Received interrupt Set 1" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x10 0. "FRS0,Frame Received interrupt Set 0" "0: No change of RIC0,1: Set RIC0"
line.long 0x14 "RID00,The RID0 register is used to control the Reception Interrupt."
hexmask.long.word 0x14 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x14 17. "FRD17,Frame Received interrupt Disable 17" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x14 16. "FRD16,Frame Received interrupt Disable 16" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 15. "FRD15,Frame Received interrupt Disable 15" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x14 14. "FRD14,Frame Received interrupt Disable 14" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 13. "FRD13,Frame Received interrupt Disable 13" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x14 12. "FRD12,Frame Received interrupt Disable 12" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 11. "FRD11,Frame Received interrupt Disable 11" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x14 10. "FRD10,Frame Received interrupt Disable 10" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 9. "FRD9,Frame Received interrupt Disable 9" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x14 8. "FRD8,Frame Received interrupt Disable 8" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 7. "FRD7,Frame Received interrupt Disable 7" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x14 6. "FRD6,Frame Received interrupt Disable 6" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 5. "FRD5,Frame Received interrupt Disable 5" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x14 4. "FRD4,Frame Received interrupt Disable 4" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 3. "FRD3,Frame Received interrupt Disable 3" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x14 2. "FRD2,Frame Received interrupt Disable 2" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 1. "FRD1,Frame Received interrupt Disable 1" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x14 0. "FRD0,Frame Received interrupt Disable 0" "0: No change of RIC0,1: Set RIC0"
line.long 0x18 "RIE10,The RIE1 register is used to control the Reception Interrupt."
bitfld.long 0x18 31. "RFWS,Rx-FIFO Warning interrupt Set" "0: No change of RIC1,1: Set RIC1"
hexmask.long.word 0x18 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x18 17. "RWS17,Reception Warning interrupt Set 17" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 16. "RWS16,Reception Warning interrupt Set 16" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 15. "RWS15,Reception Warning interrupt Set 15" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 14. "RWS14,Reception Warning interrupt Set 14" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 13. "RWS13,Reception Warning interrupt Set 13" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 12. "RWS12,Reception Warning interrupt Set 12" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 11. "RWS11,Reception Warning interrupt Set 11" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 10. "RWS10,Reception Warning interrupt Set 10" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 9. "RWS9,Reception Warning interrupt Set 9" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 8. "RWS8,Reception Warning interrupt Set 8" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 7. "RWS7,Reception Warning interrupt Set 7" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 6. "RWS6,Reception Warning interrupt Set 6" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 5. "RWS5,Reception Warning interrupt Set 5" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 4. "RWS4,Reception Warning interrupt Set 4" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 3. "RWS3,Reception Warning interrupt Set 3" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 2. "RWS2,Reception Warning interrupt Set 2" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 1. "RWS1,Reception Warning interrupt Set 1" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 0. "RWS0,Reception Warning interrupt Set 0" "0: No change of RIC1,1: Set RIC1"
line.long 0x1C "RID10,The RID1 register is used to control the Reception Interrupt."
bitfld.long 0x1C 31. "RFWD,Rx-FIFO Warning interrupt Disable" "0: No change of RIC1,1: Set RIC1"
hexmask.long.word 0x1C 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x1C 17. "RWD17,Reception Warning interrupt Disable 17" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 16. "RWD16,Reception Warning interrupt Disable 16" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 15. "RWD15,Reception Warning interrupt Disable 15" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 14. "RWD14,Reception Warning interrupt Disable 14" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 13. "RWD13,Reception Warning interrupt Disable 13" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 12. "RWD12,Reception Warning interrupt Disable 12" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 11. "RWD11,Reception Warning interrupt Disable 11" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 10. "RWD10,Reception Warning interrupt Disable 10" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 9. "RWD9,Reception Warning interrupt Disable 9" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 8. "RWD8,Reception Warning interrupt Disable 8" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 7. "RWD7,Reception Warning interrupt Disable 7" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 6. "RWD6,Reception Warning interrupt Disable 6" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 5. "RWD5,Reception Warning interrupt Disable 5" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 4. "RWD4,Reception Warning interrupt Disable 4" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 3. "RWD3,Reception Warning interrupt Disable 3" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 2. "RWD2,Reception Warning interrupt Disable 2" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 1. "RWD1,Reception Warning interrupt Disable 1" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 0. "RWD0,Reception Warning interrupt Disable 0" "0: No change of RIC1,1: Set RIC1"
line.long 0x20 "RIE20,The RIE2 register is used to control the Reception Interrupt."
bitfld.long 0x20 31. "RFFS,Rx-FIFO Full interrupt Set" "0: No change of RIC2,1: Set RIC2"
hexmask.long.word 0x20 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x20 17. "QFS17,Queue Full interrupt Set 17" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 16. "QFS16,Queue Full interrupt Set 16" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 15. "QFS15,Queue Full interrupt Set 15" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 14. "QFS14,Queue Full interrupt Set 14" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 13. "QFS13,Queue Full interrupt Set 13" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 12. "QFS12,Queue Full interrupt Set 12" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 11. "QFS11,Queue Full interrupt Set 11" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 10. "QFS10,Queue Full interrupt Set 10" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 9. "QFS9,Queue Full interrupt Set 9" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 8. "QFS8,Queue Full interrupt Set 8" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 7. "QFS7,Queue Full interrupt Set 7" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 6. "QFS6,Queue Full interrupt Set 6" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 5. "QFS5,Queue Full interrupt Set 5" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 4. "QFS4,Queue Full interrupt Set 4" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 3. "QFS3,Queue Full interrupt Set 3" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 2. "QFS2,Queue Full interrupt Set 2" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 1. "QFS1,Queue Full interrupt Set 1" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 0. "QFS0,Queue Full interrupt Set 0" "0: No change of RIC2,1: Set RIC2"
line.long 0x24 "RID20,The RID2 register is used to control the Reception Interrupt."
bitfld.long 0x24 31. "RFFD,Rx-FIFO Full interrupt Disable" "0: No change of RIC2,1: Set RIC2"
hexmask.long.word 0x24 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x24 17. "QFD17,Queue Full interrupt Disable 17" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 16. "QFD16,Queue Full interrupt Disable 16" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 15. "QFD15,Queue Full interrupt Disable 15" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 14. "QFD14,Queue Full interrupt Disable 14" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 13. "QFD13,Queue Full interrupt Disable 13" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 12. "QFD12,Queue Full interrupt Disable 12" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 11. "QFD11,Queue Full interrupt Disable 11" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 10. "QFD10,Queue Full interrupt Disable 10" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 9. "QFD9,Queue Full interrupt Disable 9" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 8. "QFD8,Queue Full interrupt Disable 8" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 7. "QFD7,Queue Full interrupt Disable 7" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 6. "QFD6,Queue Full interrupt Disable 6" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 5. "QFD5,Queue Full interrupt Disable 5" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 4. "QFD4,Queue Full interrupt Disable 4" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 3. "QFD3,Queue Full interrupt Disable 3" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 2. "QFD2,Queue Full interrupt Disable 2" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 1. "QFD1,Queue Full interrupt Disable 1" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 0. "QFD0,Queue Full interrupt Disable 0" "0: No change of RIC2,1: Set RIC2"
line.long 0x28 "TIE0,The TIE register is used to control the Transmission Interrupt."
hexmask.long.word 0x28 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x28 19. "TDPS3,Transmit Descriptor Processed interrupt Set 3" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x28 18. "TDPS2,Transmit Descriptor Processed interrupt Set 2" "0: No change of TIC,1: Set TIC"
bitfld.long 0x28 17. "TDPS1,Transmit Descriptor Processed interrupt Set 1" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x28 16. "TDPS0,Transmit Descriptor Processed interrupt Set 0" "0: No change of TIC,1: Set TIC"
hexmask.long.byte 0x28 12.--15. 1. "Reserved_12,Reserved"
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bitfld.long 0x28 11. "MFWS,E-MAC status FIFO Warning interrupt Set" "0: No change of TIC,1: Set TIC"
bitfld.long 0x28 10. "MFUS,E-MAC status FIFO Updated interrupt Set" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x28 9. "TFWS,Timestamp FIFO Warning interrupt Set" "0: No change of TIC,1: Set TIC"
bitfld.long 0x28 8. "TFUS,Timestamp FIFO Updated interrupt Set" "0: No change of TIC,1: Set TIC"
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hexmask.long.byte 0x28 4.--7. 1. "Reserved_4,Reserved"
bitfld.long 0x28 3. "FTS3,Frame Transmitted interrupt Set 3" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x28 2. "FTS2,Frame Transmitted interrupt Set 2" "0: No change of TIC,1: Set TIC"
bitfld.long 0x28 1. "FTS1,Frame Transmitted interrupt Set 1" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x28 0. "FTS0,Frame Transmitted interrupt Set 0" "0: No change of TIC,1: Set TIC"
line.long 0x2C "TID0,The TID register is used to control the Transmission Interrupt."
hexmask.long.word 0x2C 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x2C 19. "TDPD3,Transmit Descriptor Processed interrupt Disable 3" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x2C 18. "TDPD2,Transmit Descriptor Processed interrupt Disable 2" "0: No change of TIC,1: Set TIC"
bitfld.long 0x2C 17. "TDPD1,Transmit Descriptor Processed interrupt Disable 1" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x2C 16. "TDPD0,Transmit Descriptor Processed interrupt Disable 0" "0: No change of TIC,1: Set TIC"
hexmask.long.byte 0x2C 12.--15. 1. "Reserved_12,Reserved"
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bitfld.long 0x2C 11. "MFWD,E-MAC status FIFO Warning interrupt Disable" "0: No change of TIC,1: Set TIC"
bitfld.long 0x2C 10. "MFUD,E-MAC status FIFO Updated interrupt Disable" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x2C 9. "TFWD,Timestamp FIFO Warning interrupt Disable" "0: No change of TIC,1: Set TIC"
bitfld.long 0x2C 8. "TFUD,Timestamp FIFO Updated interrupt Disable" "0: No change of TIC,1: Set TIC"
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hexmask.long.byte 0x2C 4.--7. 1. "Reserved_4,Reserved"
bitfld.long 0x2C 3. "FTD3,Frame Transmitted interrupt Disable 3" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x2C 2. "FTD2,Frame Transmitted interrupt Disable 2" "0: No change of TIC,1: Set TIC"
bitfld.long 0x2C 1. "FTD1,Frame Transmitted interrupt Disable 1" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x2C 0. "FTD0,Frame Transmitted interrupt Disable 0" "0: No change of TIC,1: Set TIC"
group.long 0x488++0x7
line.long 0x0 "RIE30,The RIE3 register is used to control the Reception Interrupt."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "RDPS17,Receive Descriptor Processed interrupt Set 17" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x0 16. "RDPS16,Receive Descriptor Processed interrupt Set 16" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 15. "RDPS15,Receive Descriptor Processed interrupt Set 15" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x0 14. "RDPS14,Receive Descriptor Processed interrupt Set 14" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 13. "RDPS13,Receive Descriptor Processed interrupt Set 13" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x0 12. "RDPS12,Receive Descriptor Processed interrupt Set 12" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 11. "RDPS11,Receive Descriptor Processed interrupt Set 11" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x0 10. "RDPS10,Receive Descriptor Processed interrupt Set 10" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 9. "RDPS9,Receive Descriptor Processed interrupt Set 9" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x0 8. "RDPS8,Receive Descriptor Processed interrupt Set 8" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 7. "RDPS7,Receive Descriptor Processed interrupt Set 7" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x0 6. "RDPS6,Receive Descriptor Processed interrupt Set 6" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 5. "RDPS5,Receive Descriptor Processed interrupt Set 5" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x0 4. "RDPS4,Receive Descriptor Processed interrupt Set 4" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 3. "RDPS3,Receive Descriptor Processed interrupt Set 3" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x0 2. "RDPS2,Receive Descriptor Processed interrupt Set 2" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 1. "RDPS1,Receive Descriptor Processed interrupt Set 1" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x0 0. "RDPS0,Receive Descriptor Processed interrupt Set 0" "0: No change of RIC3,1: Set RIC3"
line.long 0x4 "RID30,The RID3 register is used to control the Reception Interrupt."
hexmask.long.word 0x4 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x4 17. "RDPD17,Receive Descriptor Processed interrupt Disable 17" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x4 16. "RDPD16,Receive Descriptor Processed interrupt Disable 16" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 15. "RDPD15,Receive Descriptor Processed interrupt Disable 15" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x4 14. "RDPD14,Receive Descriptor Processed interrupt Disable 14" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 13. "RDPD13,Receive Descriptor Processed interrupt Disable 13" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x4 12. "RDPD12,Receive Descriptor Processed interrupt Disable 12" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 11. "RDPD11,Receive Descriptor Processed interrupt Disable 11" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x4 10. "RDPD10,Receive Descriptor Processed interrupt Disable 10" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 9. "RDPD9,Receive Descriptor Processed interrupt Disable 9" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x4 8. "RDPD8,Receive Descriptor Processed interrupt Disable 8" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 7. "RDPD7,Receive Descriptor Processed interrupt Disable 7" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x4 6. "RDPD6,Receive Descriptor Processed interrupt Disable 6" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 5. "RDPD5,Receive Descriptor Processed interrupt Disable 5" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x4 4. "RDPD4,Receive Descriptor Processed interrupt Disable 4" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 3. "RDPD3,Receive Descriptor Processed interrupt Disable 3" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x4 2. "RDPD2,Receive Descriptor Processed interrupt Disable 2" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 1. "RDPD1,Receive Descriptor Processed interrupt Disable 1" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x4 0. "RDPD0,Receive Descriptor Processed interrupt Disable 0" "0: No change of RIC3,1: Set RIC3"
group.long 0x500++0x3
line.long 0x0 "ECMR0,"
bitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 27. "Reserved_27,Reserved" "0,1"
bitfld.long 0x0 26. "TRCCM,Counter Clear Mode" "0: Writing to a counter register leads to the..,1: Reading from a counter register leads to the.."
newline
bitfld.long 0x0 25. "Reserved_25,Reserved" "0,1"
bitfld.long 0x0 24. "Reserved_24,Reserved" "0,1"
newline
bitfld.long 0x0 23. "RCSC,Checksum Calculation" "0: Checksums are not automatically calculated,1: Checksums are automatically calculated"
bitfld.long 0x0 22. "Reserved_22,Reserved" "0,1"
newline
bitfld.long 0x0 21. "DPAD,Data Padding" "0: Padding to make up 60 bytes is inserted in data..,1: Padding is not inserted in data for transmission.."
bitfld.long 0x0 20. "RZPF,PAUSE Frame Reception with Time = 0" "0: Reception of PAUSE frames with the TIME..,1: Reception of PAUSE frames with the TIME.."
newline
bitfld.long 0x0 19. "TZPF,Transmit Zero PAUSE Frame(ECMR.DM=1)" "0: Not transmit the PAUSE frame of TIME parameter..,1: Transmit the PAUSE frame of TIME parameter value 0"
bitfld.long 0x0 18. "PFR,PAUSE Frame Receive Mode" "0: PAUSE frames are not transferred to the AVB-DMAC,1: PAUSE frames are transferred to the AVB-DMAC"
newline
bitfld.long 0x0 17. "RXF,Operating Mode for Flow Control in Reception" "0: Detection of PAUSE frames is disabled,1: Flow control for the receiving port is enabled"
bitfld.long 0x0 16. "TXF,Transmit Flow control mode" "0: Flow control for the transmitting port is disabled,1: Flow control for the transmitting port is enabled"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
bitfld.long 0x0 9. "MPDE,Magic PacketTM Detection Enable" "0: Magic PacketTM detection is not enabled,1: Magic PacketTM detection is enabled"
newline
bitfld.long 0x0 7.--8. "Reserved_7,Reserved" "0,1,2,3"
bitfld.long 0x0 6. "RE,Reception Enable" "0: Reception is disabled,1: Reception is enabled"
newline
bitfld.long 0x0 5. "TE,Transmission Enable" "0: Transmission is disabled,1: Transmission is enabled"
bitfld.long 0x0 3.--4. "Reserved_3,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
bitfld.long 0x0 1. "DM,Duplex Mode" "0: Value after reset,1: Full-duplex operation"
newline
bitfld.long 0x0 0. "PRM,Promiscuous Mode" "0: Normal operation,1: Promiscuous mode operation"
group.long 0x508++0x3
line.long 0x0 "RFLR0,The RFLR register specifies the maximum length (in bytes) of frames that can be received by this LSI. Settings in this register must not be changed while reception is enabled (while the RE bit in the E-MAC mode register (EMCR) is 1)."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0x0 0.--17. 1. "RFL_17_0,Receive Frame Length"
group.long 0x510++0x3
line.long 0x0 "ECSR0,The ECSR register indicates the state of the E-MAC. The CPU can be notified of the state. For bits associated with interrupts. the interrupt can be enabled or disabled by the corresponding bit in the E-MAC Interrupt Permission Register (ECSIPR).."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "PFRI,PAUSE Frame Retry Interrupt" "0: Read the PFTTCR register to clear the PFTTCR..,1: Write to this bit 1"
newline
bitfld.long 0x0 3. "PHYI,PHY interrupt terminal state bit" "0: PHY interrupt terminal,1: PHY interrupt terminal"
bitfld.long 0x0 2. "LCHNG,Link signal change bit" "0: The change of Link status signal,1: The change of Link status signal"
newline
bitfld.long 0x0 1. "MPD,Magic PacketTM Detection" "0: A Magic PacketTM has not been detected,1: A Magic PacketTM has been detected"
bitfld.long 0x0 0. "ICD,Illegal Carrier Detection" "0: PHY-LSI has not detected an illegal carrier on..,1: PHY-LSI has detected an illegal carrier on the.."
group.long 0x518++0x3
line.long 0x0 "ECSIPR0,The ECSIPR register enables or disables the states indicated by the ECSR register as interrupt sources. Each effective bit disables or enables interrupts corresponding to the bits in ECSR."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "PFRIM,PAUSE Frame Retry Interrupt Mask" "0: Interrupts on setting of the PFRI bit is disabled,1: Interrupts on setting of the PFRI bit is enabled"
newline
bitfld.long 0x0 3. "PHYIM,PHY Interrupt Mask" "0: Interrupts on setting of the PHYI bit is disabled,1: Interrupts on setting of the PHYI bit is enabled"
bitfld.long 0x0 2. "LINKIM,LINK Interrupt Mask" "0: Interrupts on setting of the LCHNG bit is disabled,1: Interrupts on setting of the LCHNG bit is enabled"
newline
bitfld.long 0x0 1. "MPDIP,Magic PacketTM Detect Interrupt Enable" "0: Interrupts on setting of the MPD bit is disabled,1: Interrupts on setting of the MPD bit is enabled"
bitfld.long 0x0 0. "ICDIP,Illegal Carrier Detect Interrupt Enable" "0: Interrupts on setting of the ICD bit is disabled,1: Interrupt on setting of the ICD bit is enabled"
group.long 0x520++0x3
line.long 0x0 "PIR0,The PIR register provides a means of access to the PHY-LSI internal registers via the MII."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0x0 3. "MDI,MII Management Data-In" "0,1"
newline
bitfld.long 0x0 2. "MDO,MII Management Data-Out" "0,1"
bitfld.long 0x0 1. "MMD,MII Management Mode" "0: Read direction is specified,1: Write direction is specified"
newline
bitfld.long 0x0 0. "MDC,MII Management Data Clock" "0,1"
rgroup.long 0x528++0x3
line.long 0x0 "PSR0,The PSR register is a read-only register that can read interface signals from the PHY-LSI."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "LMON,Link Status Pin State" "0: The link status signal,1: The link status signal"
group.long 0x52C++0x3
line.long 0x0 "PIPR0,The PIPR register is used to set the active sense of the AVB_PHY-INT pin."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PHYIP,PHY Interrupt Input Pin Polarity" "0: PHY interrupt pin,1: PHY interrupt pin"
group.long 0x554++0x7
line.long 0x0 "APR0,The APR register is used to set the value for the TIME parameter of auto generated PAUSE frames."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "APFTP_15_0,Auto Pause Frame Time Parameter"
line.long 0x4 "MPR0,The MPR register is used to set the value for the TIME parameter of manually generated PAUSE frames. When a PAUSE frame is manually transmitted. the value set in this register is used as its TIME parameter."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "MP_15_0,Manual PAUSE"
rgroup.long 0x55C++0x7
line.long 0x0 "PFTCR0,The PFTCR register is a counter that indicates the number of times PAUSE frames have been transmitted."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "PFTXC_15_0,PAUSE Frame Transmit Counter"
line.long 0x4 "PFRCR0,The RFRCR register is a counter that indicates the number of times PAUSE frames have been received."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "PFRXC_15_0,PAUSE Frame Receive Counter"
group.long 0x564++0x7
line.long 0x0 "TPAUSER0,The TPAUSER register is used to set the value for upper limit number of auto generated PAUSE frames."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "PFRTULMT_15_0,Pause Frame Retry Upper LiMiT"
line.long 0x4 "PFTTCR0,The PFTTCR register is a counter that indicates the number of times auto PAUSE frames have been transmit."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "PFRTC_15_0,Pause Frame Retry Counter"
group.long 0x5B0++0x3
line.long 0x0 "GECMR0,The GECMR register specifies the operating mode for the E-MAC."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "SPEED,Transfer Speed Setting" "0: Transfer is at 100 Mbps,1: Transfer is at 1000 Mbps"
group.long 0x5C0++0x3
line.long 0x0 "MAHR0,The MAHR register specifies the 32 higher-order bits of the 48-bit E-MAC address. The settings in this register are normally made in the initialization process after a reset."
hexmask.long 0x0 0.--31. 1. "MA_47_16,E-MAC Address Bits 47 to 16"
group.long 0x5C8++0x3
line.long 0x0 "MALR0,The MALR register specifies the 16 lower-order bits of the 48-bit E-MAC address. The settings in this register are normally made in the initialization process after a reset."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "MA_15_0,E-MAC Address Bits 15 to 0"
group.long 0x700++0x3
line.long 0x0 "TROCR0,The TROCR register is a counter that indicates the number of times frames with time-out were transmit. Counting up stops when the value in this register reaches H'0000 FFFF."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "FTTOC_15_0,Frame transmit time-out counter"
group.long 0x740++0x3
line.long 0x0 "CEFCR0,The CEFCR register is a counter that indicates the number of times frames with CRC errors were received. Counting up stops when the value in this register reaches H'0000 FFFF."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "CEFC_15_0,CRC Error Frame Counter"
group.long 0x748++0x3
line.long 0x0 "FRECR0,The FRECR register is a counter that indicates the number of frames for which receive errors were generated by input on the RX_ER from the PHY-LSI. Counting up stops when the value in this register reaches H'0000and#65533;FFFF."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "FREC_15_0,Frame Receive Error Counter"
group.long 0x750++0x3
line.long 0x0 "TSFRCR0,The TSFRCR register is a counter that indicates the number of received frames that were fewer than 64 bytes in length. Counting stops when the value in this register reaches H'0000and#65533;FFFF."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "TSFRC_15_0,Too-Short Frame Receive Counter"
group.long 0x758++0x3
line.long 0x0 "TLFRCR0,The TLFRCR register is a counter that indicates the number of received frames that were longer than the value specified in the receive frame length register (RFLR). Counting up stops when the value in the TLFRCR register reaches.."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "TLFC_15_0,Too-Long Frame Receive Counter"
group.long 0x760++0x3
line.long 0x0 "RFCR0,The RFCR register is a counter that indicates the number of received frames containing double_quotationresidual bitsdouble_quotation (trailing bits not making up an 8-bit unit). Counting up stops when the value in this register reaches.."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RFC_15_0,Residual-Bit Frame Receive Counter"
group.long 0x778++0x3
line.long 0x0 "MAFCR0,The MAFCR register is a counter that indicates the number of received frames for which a multicast address was specified. Counting up stops when the value in this register reaches H'0000and#65533;FFFF."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "MAFC_15_0,Multicast Address Frame Counter"
group.long 0x800++0x3
line.long 0x0 "CSR00,"
hexmask.long 0x0 0.--31. 1. "Reserved_0,Reserved"
group.long 0x808++0x3
line.long 0x0 "CSR20,"
hexmask.long 0x0 0.--31. 1. "Reserved_0,Reserved"
group.long 0x824++0xB
line.long 0x0 "CSR300,"
hexmask.long 0x0 0.--31. 1. "Reserved_0,Reserved"
line.long 0x4 "CSR310,"
hexmask.long 0x4 0.--31. 1. "Reserved_0,Reserved"
line.long 0x8 "CSR320,"
hexmask.long 0x8 0.--31. 1. "Reserved_0,Reserved"
group.long 0xA00++0x3
line.long 0x0 "USMR0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0x0 3. "EI6F,Enable UDP/IPv6 Filtering" "0: UDP/IPv6 Filtering disabled,1: UDP/IPv6 Filtering enabled"
newline
bitfld.long 0x0 2. "EI4F,Enable UDP/IPv4 Filtering" "0: UDP/IPv4 Filtering disabled,1: UDP/IPv4 Filtering enabled"
bitfld.long 0x0 1. "EMOM,Enable Manual Offset Mode" "0: Manual Offset Mode disabled,1: Manual Offset Mode enabled"
newline
bitfld.long 0x0 0. "EEOM,Enable Extended Offset Mode" "0: Extended Offset Mode disabled,1: Extended Offset Mode enabled"
group.long 0xAE8++0x57
line.long 0x0 "SFO20,"
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "FBP2_10_0,First Byte Position2"
line.long 0x4 "I4SFO0,"
hexmask.long.tbyte 0x4 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0x4 0.--10. 1. "FBP_10_0,First Byte Position"
line.long 0x8 "I4DFO0,"
hexmask.long.tbyte 0x8 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0x8 0.--10. 1. "FBP_10_0,First Byte Position"
line.long 0xC "I6SFO0,"
hexmask.long.tbyte 0xC 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0xC 0.--10. 1. "FBP_10_0,First Byte Position"
line.long 0x10 "I6DFO0,"
hexmask.long.tbyte 0x10 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0x10 0.--10. 1. "FBP_10_0,First Byte Position"
line.long 0x14 "UPFO0,"
hexmask.long.tbyte 0x14 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0x14 0.--10. 1. "FBP_10_0,First Byte Position"
line.long 0x18 "I4SFPR0_0,"
hexmask.long 0x18 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x1C "I4SFPR1_0,"
hexmask.long 0x1C 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x20 "I4SFPR2_0,"
hexmask.long 0x20 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x24 "I4SFPR3_0,"
hexmask.long 0x24 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x28 "I4SFPR4_0,"
hexmask.long 0x28 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x2C "I4SFPR5_0,"
hexmask.long 0x2C 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x30 "I4SFPR6_0,"
hexmask.long 0x30 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x34 "I4SFPR7_0,"
hexmask.long 0x34 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x38 "I4SFPR8_0,"
hexmask.long 0x38 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x3C "I4SFPR9_0,"
hexmask.long 0x3C 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x40 "I4SFPR10_0,"
hexmask.long 0x40 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x44 "I4SFPR11_0,"
hexmask.long 0x44 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x48 "I4SFPR12_0,"
hexmask.long 0x48 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x4C "I4SFPR13_0,"
hexmask.long 0x4C 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x50 "I4SFPR14_0,"
hexmask.long 0x50 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x54 "I4SFPR15_0,"
hexmask.long 0x54 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
group.long 0xC00++0x3F
line.long 0x0 "I4DFPR0_0,"
hexmask.long 0x0 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x4 "I4DFPR1_0,"
hexmask.long 0x4 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x8 "I4DFPR2_0,"
hexmask.long 0x8 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0xC "I4DFPR3_0,"
hexmask.long 0xC 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x10 "I4DFPR4_0,"
hexmask.long 0x10 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x14 "I4DFPR5_0,"
hexmask.long 0x14 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x18 "I4DFPR6_0,"
hexmask.long 0x18 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x1C "I4DFPR7_0,"
hexmask.long 0x1C 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x20 "I4DFPR8_0,"
hexmask.long 0x20 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x24 "I4DFPR9_0,"
hexmask.long 0x24 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x28 "I4DFPR10_0,"
hexmask.long 0x28 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x2C "I4DFPR11_0,"
hexmask.long 0x2C 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x30 "I4DFPR12_0,"
hexmask.long 0x30 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x34 "I4DFPR13_0,"
hexmask.long 0x34 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x38 "I4DFPR14_0,"
hexmask.long 0x38 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x3C "I4DFPR15_0,"
hexmask.long 0x3C 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
group.long 0xD00++0x243
line.long 0x0 "I6SFPR0_0,"
hexmask.long 0x0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x4 "I6SFPR1_0,"
hexmask.long 0x4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x8 "I6SFPR2_0,"
hexmask.long 0x8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xC "I6SFPR3_0,"
hexmask.long 0xC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x10 "I6SFPR4_0,"
hexmask.long 0x10 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x14 "I6SFPR5_0,"
hexmask.long 0x14 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x18 "I6SFPR6_0,"
hexmask.long 0x18 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x1C "I6SFPR7_0,"
hexmask.long 0x1C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x20 "I6SFPR8_0,"
hexmask.long 0x20 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x24 "I6SFPR9_0,"
hexmask.long 0x24 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x28 "I6SFPR10_0,"
hexmask.long 0x28 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x2C "I6SFPR11_0,"
hexmask.long 0x2C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x30 "I6SFPR12_0,"
hexmask.long 0x30 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x34 "I6SFPR13_0,"
hexmask.long 0x34 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x38 "I6SFPR14_0,"
hexmask.long 0x38 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x3C "I6SFPR15_0,"
hexmask.long 0x3C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x40 "I6SFPR16_0,"
hexmask.long 0x40 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x44 "I6SFPR17_0,"
hexmask.long 0x44 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x48 "I6SFPR18_0,"
hexmask.long 0x48 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x4C "I6SFPR19_0,"
hexmask.long 0x4C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x50 "I6SFPR20_0,"
hexmask.long 0x50 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x54 "I6SFPR21_0,"
hexmask.long 0x54 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x58 "I6SFPR22_0,"
hexmask.long 0x58 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x5C "I6SFPR23_0,"
hexmask.long 0x5C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x60 "I6SFPR24_0,"
hexmask.long 0x60 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x64 "I6SFPR25_0,"
hexmask.long 0x64 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x68 "I6SFPR26_0,"
hexmask.long 0x68 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x6C "I6SFPR27_0,"
hexmask.long 0x6C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x70 "I6SFPR28_0,"
hexmask.long 0x70 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x74 "I6SFPR29_0,"
hexmask.long 0x74 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x78 "I6SFPR30_0,"
hexmask.long 0x78 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x7C "I6SFPR31_0,"
hexmask.long 0x7C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x80 "I6SFPR32_0,"
hexmask.long 0x80 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x84 "I6SFPR33_0,"
hexmask.long 0x84 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x88 "I6SFPR34_0,"
hexmask.long 0x88 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x8C "I6SFPR35_0,"
hexmask.long 0x8C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x90 "I6SFPR36_0,"
hexmask.long 0x90 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x94 "I6SFPR37_0,"
hexmask.long 0x94 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x98 "I6SFPR38_0,"
hexmask.long 0x98 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x9C "I6SFPR39_0,"
hexmask.long 0x9C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xA0 "I6SFPR40_0,"
hexmask.long 0xA0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xA4 "I6SFPR41_0,"
hexmask.long 0xA4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xA8 "I6SFPR42_0,"
hexmask.long 0xA8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xAC "I6SFPR43_0,"
hexmask.long 0xAC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xB0 "I6SFPR44_0,"
hexmask.long 0xB0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xB4 "I6SFPR45_0,"
hexmask.long 0xB4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xB8 "I6SFPR46_0,"
hexmask.long 0xB8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xBC "I6SFPR47_0,"
hexmask.long 0xBC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xC0 "I6SFPR48_0,"
hexmask.long 0xC0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xC4 "I6SFPR49_0,"
hexmask.long 0xC4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xC8 "I6SFPR50_0,"
hexmask.long 0xC8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xCC "I6SFPR51_0,"
hexmask.long 0xCC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xD0 "I6SFPR52_0,"
hexmask.long 0xD0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xD4 "I6SFPR53_0,"
hexmask.long 0xD4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xD8 "I6SFPR54_0,"
hexmask.long 0xD8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xDC "I6SFPR55_0,"
hexmask.long 0xDC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xE0 "I6SFPR56_0,"
hexmask.long 0xE0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xE4 "I6SFPR57_0,"
hexmask.long 0xE4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xE8 "I6SFPR58_0,"
hexmask.long 0xE8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xEC "I6SFPR59_0,"
hexmask.long 0xEC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xF0 "I6SFPR60_0,"
hexmask.long 0xF0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xF4 "I6SFPR61_0,"
hexmask.long 0xF4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xF8 "I6SFPR62_0,"
hexmask.long 0xF8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xFC "I6SFPR63_0,"
hexmask.long 0xFC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x100 "I6DFPR0_0,"
hexmask.long 0x100 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x104 "I6DFPR1_0,"
hexmask.long 0x104 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x108 "I6DFPR2_0,"
hexmask.long 0x108 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x10C "I6DFPR3_0,"
hexmask.long 0x10C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x110 "I6DFPR4_0,"
hexmask.long 0x110 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x114 "I6DFPR5_0,"
hexmask.long 0x114 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x118 "I6DFPR6_0,"
hexmask.long 0x118 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x11C "I6DFPR7_0,"
hexmask.long 0x11C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x120 "I6DFPR8_0,"
hexmask.long 0x120 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x124 "I6DFPR9_0,"
hexmask.long 0x124 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x128 "I6DFPR10_0,"
hexmask.long 0x128 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x12C "I6DFPR11_0,"
hexmask.long 0x12C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x130 "I6DFPR12_0,"
hexmask.long 0x130 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x134 "I6DFPR13_0,"
hexmask.long 0x134 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x138 "I6DFPR14_0,"
hexmask.long 0x138 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x13C "I6DFPR15_0,"
hexmask.long 0x13C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x140 "I6DFPR16_0,"
hexmask.long 0x140 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x144 "I6DFPR17_0,"
hexmask.long 0x144 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x148 "I6DFPR18_0,"
hexmask.long 0x148 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x14C "I6DFPR19_0,"
hexmask.long 0x14C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x150 "I6DFPR20_0,"
hexmask.long 0x150 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x154 "I6DFPR21_0,"
hexmask.long 0x154 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x158 "I6DFPR22_0,"
hexmask.long 0x158 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x15C "I6DFPR23_0,"
hexmask.long 0x15C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x160 "I6DFPR24_0,"
hexmask.long 0x160 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x164 "I6DFPR25_0,"
hexmask.long 0x164 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x168 "I6DFPR26_0,"
hexmask.long 0x168 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x16C "I6DFPR27_0,"
hexmask.long 0x16C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x170 "I6DFPR28_0,"
hexmask.long 0x170 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x174 "I6DFPR29_0,"
hexmask.long 0x174 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x178 "I6DFPR30_0,"
hexmask.long 0x178 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x17C "I6DFPR31_0,"
hexmask.long 0x17C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x180 "I6DFPR32_0,"
hexmask.long 0x180 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x184 "I6DFPR33_0,"
hexmask.long 0x184 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x188 "I6DFPR34_0,"
hexmask.long 0x188 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x18C "I6DFPR35_0,"
hexmask.long 0x18C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x190 "I6DFPR36_0,"
hexmask.long 0x190 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x194 "I6DFPR37_0,"
hexmask.long 0x194 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x198 "I6DFPR38_0,"
hexmask.long 0x198 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x19C "I6DFPR39_0,"
hexmask.long 0x19C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1A0 "I6DFPR40_0,"
hexmask.long 0x1A0 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1A4 "I6DFPR41_0,"
hexmask.long 0x1A4 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1A8 "I6DFPR42_0,"
hexmask.long 0x1A8 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1AC "I6DFPR43_0,"
hexmask.long 0x1AC 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1B0 "I6DFPR44_0,"
hexmask.long 0x1B0 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1B4 "I6DFPR45_0,"
hexmask.long 0x1B4 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1B8 "I6DFPR46_0,"
hexmask.long 0x1B8 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1BC "I6DFPR47_0,"
hexmask.long 0x1BC 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1C0 "I6DFPR48_0,"
hexmask.long 0x1C0 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1C4 "I6DFPR49_0,"
hexmask.long 0x1C4 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1C8 "I6DFPR50_0,"
hexmask.long 0x1C8 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1CC "I6DFPR51_0,"
hexmask.long 0x1CC 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1D0 "I6DFPR52_0,"
hexmask.long 0x1D0 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1D4 "I6DFPR53_0,"
hexmask.long 0x1D4 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1D8 "I6DFPR54_0,"
hexmask.long 0x1D8 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1DC "I6DFPR55_0,"
hexmask.long 0x1DC 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1E0 "I6DFPR56_0,"
hexmask.long 0x1E0 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1E4 "I6DFPR57_0,"
hexmask.long 0x1E4 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1E8 "I6DFPR58_0,"
hexmask.long 0x1E8 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1EC "I6DFPR59_0,"
hexmask.long 0x1EC 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1F0 "I6DFPR60_0,"
hexmask.long 0x1F0 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1F4 "I6DFPR61_0,"
hexmask.long 0x1F4 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1F8 "I6DFPR62_0,"
hexmask.long 0x1F8 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1FC "I6DFPR63_0,"
hexmask.long 0x1FC 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x200 "UPFPR0_0,"
hexmask.long.word 0x200 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x200 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x204 "UPFPR1_0,"
hexmask.long.word 0x204 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x204 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x208 "UPFPR2_0,"
hexmask.long.word 0x208 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x208 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x20C "UPFPR3_0,"
hexmask.long.word 0x20C 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x20C 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x210 "UPFPR4_0,"
hexmask.long.word 0x210 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x210 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x214 "UPFPR5_0,"
hexmask.long.word 0x214 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x214 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x218 "UPFPR6_0,"
hexmask.long.word 0x218 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x218 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x21C "UPFPR7_0,"
hexmask.long.word 0x21C 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x21C 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x220 "UPFPR8_0,"
hexmask.long.word 0x220 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x220 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x224 "UPFPR9_0,"
hexmask.long.word 0x224 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x224 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x228 "UPFPR10_0,"
hexmask.long.word 0x228 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x228 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x22C "UPFPR11_0,"
hexmask.long.word 0x22C 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x22C 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x230 "UPFPR12_0,"
hexmask.long.word 0x230 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x230 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x234 "UPFPR13_0,"
hexmask.long.word 0x234 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x234 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x238 "UPFPR14_0,"
hexmask.long.word 0x238 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x238 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x23C "UPFPR15_0,"
hexmask.long.word 0x23C 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x23C 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x240 "SFV20,"
hexmask.long 0x240 0.--31. 1. "LV_31_0,Separation Filter Value"
group.long 0xF48++0x2B
line.long 0x0 "I4SFVR0,"
hexmask.long 0x0 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x4 "I4DFVR0,"
hexmask.long 0x4 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x8 "I6SFVR0_0,"
hexmask.long 0x8 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0xC "I6SFVR1_0,"
hexmask.long 0xC 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x10 "I6SFVR2_0,"
hexmask.long 0x10 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x14 "I6SFVR3_0,"
hexmask.long 0x14 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x18 "I6DFVR0_0,"
hexmask.long 0x18 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x1C "I6DFVR1_0,"
hexmask.long 0x1C 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x20 "I6DFVR2_0,"
hexmask.long 0x20 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x24 "I6DFVR3_0,"
hexmask.long 0x24 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x28 "UPFVR0,"
hexmask.long 0x28 0.--31. 1. "LV_31_0,Separation Filter Value"
group.long 0xF7C++0x43
line.long 0x0 "I4SFMR0,"
hexmask.long 0x0 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x4 "I4DFMR0,"
hexmask.long 0x4 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x8 "I6SFMR0_0,"
hexmask.long 0x8 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0xC "I6SFMR1_0,"
hexmask.long 0xC 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x10 "I6SFMR2_0,"
hexmask.long 0x10 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x14 "I6SFMR3_0,"
hexmask.long 0x14 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x18 "I6DFMR0_0,"
hexmask.long 0x18 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x1C "I6DFMR1_0,"
hexmask.long 0x1C 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x20 "I6DFMR2_0,"
hexmask.long 0x20 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x24 "I6DFMR3_0,"
hexmask.long 0x24 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x28 "UPFMR0,"
hexmask.long 0x28 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x2C "SFL20,"
hexmask.long 0x2C 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x2C 0.--4. 1. "LC_4_0,Load Command"
line.long 0x30 "I4SFLR0,"
hexmask.long 0x30 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x30 0.--4. 1. "LC_4_0,Load Command"
line.long 0x34 "I4DFLR0,"
hexmask.long 0x34 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x34 0.--4. 1. "LC_4_0,Load Command"
line.long 0x38 "I6SFLR0,"
hexmask.long 0x38 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x38 0.--4. 1. "LC_4_0,Load Command"
line.long 0x3C "I6DFLR0,"
hexmask.long 0x3C 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x3C 0.--4. 1. "LC_4_0,Load Command"
line.long 0x40 "UPFLR0,"
hexmask.long 0x40 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x40 0.--4. 1. "LC_4_0,Load Command"
tree.end
tree "EtherAVB_IF_1"
base ad:0xE6810000
group.long 0x0++0xB
line.long 0x0 "CCC1,The CCC register specifies the operating mode of the AVB-DMAC."
hexmask.long.byte 0x0 26.--31. 1. "Reserved_26,Reserved"
bitfld.long 0x0 25. "FCE,Flow Control Enable" "0: Flow control disabled1: Flow control enabled,?"
newline
bitfld.long 0x0 24. "LBME,Loopback Mode Enable" "0: Normal operation,1: Loopback mode is enabled"
bitfld.long 0x0 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "Reserved_20,Reserved" "0,1"
bitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 16.--17. "CSEL_1_0,gPTP Clock Select" "0: gPTP is disabled,1: High-speed peripheral bus clock,?,?"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "DTSR,Data Transmission Suspend Request" "0: Normal operation,1: Requests suspension"
bitfld.long 0x0 7. "GAC,Gptp Active in Config" "0: Normal operation1: gPTP support active in CONFIG..,?"
newline
hexmask.long.byte 0x0 2.--6. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "OPC_1_0,Operating Mode Configuration" "0: Reset mode,1: Configuration mode,?,?"
line.long 0x4 "DBAT1,The DBAT register specifies the base address of the descriptor table in the URAM. For the structure of this table. see section 50.3.3 Descriptors. Writing to this bit is only possible when the current operating mode is configuration mode."
hexmask.long 0x4 0.--31. 1. "TA_31_0,Descriptor Base Table Address"
line.long 0x8 "DLR1,The DLR register is used to issue a request to load the values from the current descriptor address register q (CDARq) for each queue to the descriptor base address table register (DBAT)."
hexmask.long.word 0x8 22.--31. 1. "Reserved_22,Reserved"
bitfld.long 0x8 21. "LBA21,Base Address Load Request (Rx17: Stream 15)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 20. "LBA20,Base Address Load Request (Rx16: Stream 14)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 19. "LBA19,Base Address Load Request (Rx15: Stream 13)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 18. "LBA18,Base Address Load Request (Rx14: Stream 12)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 17. "LBA17,Base Address Load Request (Rx13: Stream 11)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 16. "LBA16,Base Address Load Request (Rx12: Stream 10)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 15. "LBA15,Base Address Load Request (Rx11: Stream 9)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 14. "LBA14,Base Address Load Request (Rx10: Stream 8)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 13. "LBA13,Base Address Load Request (Rx9: Stream 7)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 12. "LBA12,Base Address Load Request (Rx8: Stream 6)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 11. "LBA11,Base Address Load Request (Rx7: Stream 5)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 10. "LBA10,Base Address Load Request (Rx6: Stream 4)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 9. "LBA9,Base Address Load Request (Rx5: Stream 3)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 8. "LBA8,Base Address Load Request (Rx4: Stream 2)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 7. "LBA7,Base Address Load Request (Rx3: Stream 1)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 6. "LBA6,Base Address Load Request (Rx2: Stream 0)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 5. "LBA5,Base Address Load Request (Rx1: Network Control)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 4. "LBA4,Base Address Load Request (Rx0: Best Effort)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 3. "LBA3,Base Address Load Request (Tx3: Stream Class A)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 2. "LBA2,Base Address Load Request (Tx2: Stream Class B)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 1. "LBA1,Base Address Load Request (Tx1: Network Control)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 0. "LBA0,Base Address Load Request (Tx0: Best Effort)" "0: No load request is issued,1: When written: A request for loading the.."
rgroup.long 0xC++0x5B
line.long 0x0 "CSR1,The CSR register is used to indicate the operating mode in which the AVB-DMAC is running and the individual communications states."
hexmask.long.word 0x0 22.--31. 1. "Reserved_22,Reserved"
bitfld.long 0x0 21. "TDUO,Transmission Descriptor Update On-going" "0: No pending descriptor update1: Pending..,?"
newline
bitfld.long 0x0 20. "RPO,Receive Process Status" "0: Normal operation,1: Reception is in progress"
bitfld.long 0x0 19. "TPO3,Transmit Process Status 3 (Stream Class A)" "0: Normal operation,1: Transmission is in progress"
newline
bitfld.long 0x0 18. "TPO2,Transmit Process Status 2 (Stream Class B)" "0: Normal operation,1: Transmission is in progress"
bitfld.long 0x0 17. "TPO1,Transmit Process Status 1 (Network Control)" "0: Normal operation,1: Transmission is in progress"
newline
bitfld.long 0x0 16. "TPO0,Transmit Process Status 0 (Best Effort)" "0: Normal operation,1: Transmission is in progress"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "DTS,Data Transmission Suspended Status" "0: Normal operation,1: Transmission is in progress"
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "OPS_3_0,Operating Mode Status"
line.long 0x4 "CDAR0_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x4 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x8 "CDAR1_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x8 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0xC "CDAR2_1,The CDARq register indicates the current descriptor address."
hexmask.long 0xC 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x10 "CDAR3_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x10 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x14 "CDAR4_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x14 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x18 "CDAR5_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x18 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x1C "CDAR6_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x1C 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x20 "CDAR7_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x20 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x24 "CDAR8_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x24 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x28 "CDAR9_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x28 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x2C "CDAR10_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x2C 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x30 "CDAR11_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x30 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x34 "CDAR12_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x34 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x38 "CDAR13_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x38 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x3C "CDAR14_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x3C 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x40 "CDAR15_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x40 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x44 "CDAR16_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x44 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x48 "CDAR17_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x48 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x4C "CDAR18_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x4C 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x50 "CDAR19_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x50 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x54 "CDAR20_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x54 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x58 "CDAR21_1,The CDARq register indicates the current descriptor address."
hexmask.long 0x58 0.--31. 1. "CDA_31_0,Current Descriptor Address"
rgroup.long 0x88++0x3
line.long 0x0 "ESR1,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "EIL,Error Information Lost" "0: No loss of error information,1: Lost of error information detected"
newline
hexmask.long.byte 0x0 8.--11. 1. "ET_3_0,Error Type"
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--4. 1. "EQN_4_0,Error Queue Number"
group.long 0x8C++0x1B
line.long 0x0 "APSR1,Writing to this bit is only possible when the current operating mode is configuration mode."
bitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Reserved_30,Reserved" "0,1"
newline
bitfld.long 0x0 29. "GPTPCLOCK,Selec clock source for GPTP synchronization" "0: Origina clock source,1: SH'0D4_HSC"
bitfld.long 0x0 28. "Reserved_28,Reserved" "0,1"
newline
bitfld.long 0x0 27. "Reserved_27,Reserved" "0,1"
bitfld.long 0x0 26. "Reserved_26,Reserved" "0,1"
newline
bitfld.long 0x0 25. "GPTPTIMERSOURCE,Select gptp_timer[77:0] source for GPTP synchronization" "0: Origina gptp_timer source,1: gptp_timer from TSN-GPTP"
bitfld.long 0x0 24. "Reserved_24,Reserved" "0,1"
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
hexmask.long.byte 0x0 16.--19. 1. "ERREN_3_0,Dummy Error Setting"
newline
bitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 14. "TDM,Tx clock internal Delay Mode" "0: normal mode,1: delayed mode"
newline
bitfld.long 0x0 13. "RDM,Rx clock internal Delay Mode" "0: normal mode,1: delayed mode"
bitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
newline
hexmask.long.byte 0x0 5.--11. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "CMSW,select width of internal compare match signal" "0: 1clock period pulse,1: 4clock period pulse"
newline
bitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.long 0x0 2. "ERRMOD,Error injection mode" "0: ERREN[3:0] invalid,1: ERREN[3:0] valid"
newline
bitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "RCR1,The RCR register is used to make settings related to reception for the AVB-DMAC."
bitfld.long 0x4 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 16.--28. 1. "RFCL_12_0,Receive FIFO Caution Level"
newline
hexmask.long.byte 0x4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x4 6. "Reserved_6,Reserved" "0,1"
bitfld.long 0x4 5. "ETS2,Time Stamp Enable (Stream)" "0: Time stamping is disabled,1: Time stamping is enabled"
newline
bitfld.long 0x4 4. "ETS0,Time Stamp Enable (Best Effort)" "0: Time stamping is disabled,1: Time stamping is enabled"
bitfld.long 0x4 2.--3. "ESF_1_0,Stream Filtering Select" "0: Filtering is disabled,1: The filter for both AVB stream frames and..,?,?"
newline
bitfld.long 0x4 1. "ENCF,Network Control Filtering Enable" "0: Network control is disabled,1: Network control is enabled"
bitfld.long 0x4 0. "EFFS,Error Frame Enable" "0: Error frames are disabled,1: Error frames are enabled"
line.long 0x8 "RQC0_1,The RQC0 register is used to set up reception queues 0 to 3."
bitfld.long 0x8 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x8 30. "PIA3,Packed Incremental data Area (Receive Queue 3+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x8 28.--29. "UFCC3_1_0,Unread Frame Counter Configuration (Receive Queue 3+iand#65396;4)" "0,1,2,3"
bitfld.long 0x8 26.--27. "TSEL3,Truncation SELection (Receive Queue 3+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x8 24.--25. "RSM3_1_0,Receive Synchronous Mode (Receive Queue 3+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x8 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x8 22. "PIA2,Packed Incremental data Area (Receive Queue 2+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x8 20.--21. "UFCC2_1_0,Unread Frame Counter Configuration (Receive Queue 2+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x8 18.--19. "TSEL2,Truncation SELection (Receive Queue 2+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x8 16.--17. "RSM2_1_0,Receive Synchronous Mode (Receive Queue 2+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
newline
bitfld.long 0x8 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x8 14. "PIA1,Packed Incremental data Area (Receive Queue 1+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x8 12.--13. "UFCC1_1_0,Unread Frame Counter Configuration (Receive Queue 1+iand#65396;4)" "0,1,2,3"
bitfld.long 0x8 10.--11. "TSEL1,Truncation SELection (Receive Queue 1+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x8 8.--9. "RSM1_1_0,Receive Synchronous Mode (Receive Queue 1+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x8 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x8 6. "PIA0,Packed Incremental data Area (Receive Queue 0+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x8 4.--5. "UFCC0_1_0,Unread Frame Counter Configuration (Receive Queue 0+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x8 2.--3. "TSEL0,Truncation SELection (Receive Queue 0+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x8 0.--1. "RSM0_1_0,Receive Synchronous Mode (Receive Queue 0+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
line.long 0xC "RQC1_1,The RQC0 register is used to set up reception queues 0 to 3."
bitfld.long 0xC 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0xC 30. "PIA3,Packed Incremental data Area (Receive Queue 3+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0xC 28.--29. "UFCC3_1_0,Unread Frame Counter Configuration (Receive Queue 3+iand#65396;4)" "0,1,2,3"
bitfld.long 0xC 26.--27. "TSEL3,Truncation SELection (Receive Queue 3+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0xC 24.--25. "RSM3_1_0,Receive Synchronous Mode (Receive Queue 3+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0xC 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0xC 22. "PIA2,Packed Incremental data Area (Receive Queue 2+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0xC 20.--21. "UFCC2_1_0,Unread Frame Counter Configuration (Receive Queue 2+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0xC 18.--19. "TSEL2,Truncation SELection (Receive Queue 2+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0xC 16.--17. "RSM2_1_0,Receive Synchronous Mode (Receive Queue 2+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
newline
bitfld.long 0xC 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0xC 14. "PIA1,Packed Incremental data Area (Receive Queue 1+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0xC 12.--13. "UFCC1_1_0,Unread Frame Counter Configuration (Receive Queue 1+iand#65396;4)" "0,1,2,3"
bitfld.long 0xC 10.--11. "TSEL1,Truncation SELection (Receive Queue 1+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0xC 8.--9. "RSM1_1_0,Receive Synchronous Mode (Receive Queue 1+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0xC 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0xC 6. "PIA0,Packed Incremental data Area (Receive Queue 0+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0xC 4.--5. "UFCC0_1_0,Unread Frame Counter Configuration (Receive Queue 0+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0xC 2.--3. "TSEL0,Truncation SELection (Receive Queue 0+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0xC 0.--1. "RSM0_1_0,Receive Synchronous Mode (Receive Queue 0+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
line.long 0x10 "RQC2_1,The RQC0 register is used to set up reception queues 0 to 3."
bitfld.long 0x10 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x10 30. "PIA3,Packed Incremental data Area (Receive Queue 3+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x10 28.--29. "UFCC3_1_0,Unread Frame Counter Configuration (Receive Queue 3+iand#65396;4)" "0,1,2,3"
bitfld.long 0x10 26.--27. "TSEL3,Truncation SELection (Receive Queue 3+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x10 24.--25. "RSM3_1_0,Receive Synchronous Mode (Receive Queue 3+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x10 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x10 22. "PIA2,Packed Incremental data Area (Receive Queue 2+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x10 20.--21. "UFCC2_1_0,Unread Frame Counter Configuration (Receive Queue 2+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x10 18.--19. "TSEL2,Truncation SELection (Receive Queue 2+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x10 16.--17. "RSM2_1_0,Receive Synchronous Mode (Receive Queue 2+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
newline
bitfld.long 0x10 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x10 14. "PIA1,Packed Incremental data Area (Receive Queue 1+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x10 12.--13. "UFCC1_1_0,Unread Frame Counter Configuration (Receive Queue 1+iand#65396;4)" "0,1,2,3"
bitfld.long 0x10 10.--11. "TSEL1,Truncation SELection (Receive Queue 1+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x10 8.--9. "RSM1_1_0,Receive Synchronous Mode (Receive Queue 1+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x10 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x10 6. "PIA0,Packed Incremental data Area (Receive Queue 0+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x10 4.--5. "UFCC0_1_0,Unread Frame Counter Configuration (Receive Queue 0+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x10 2.--3. "TSEL0,Truncation SELection (Receive Queue 0+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x10 0.--1. "RSM0_1_0,Receive Synchronous Mode (Receive Queue 0+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
line.long 0x14 "RQC3_1,The RQC0 register is used to set up reception queues 0 to 3."
bitfld.long 0x14 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x14 30. "PIA3,Packed Incremental data Area (Receive Queue 3+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x14 28.--29. "UFCC3_1_0,Unread Frame Counter Configuration (Receive Queue 3+iand#65396;4)" "0,1,2,3"
bitfld.long 0x14 26.--27. "TSEL3,Truncation SELection (Receive Queue 3+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x14 24.--25. "RSM3_1_0,Receive Synchronous Mode (Receive Queue 3+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x14 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x14 22. "PIA2,Packed Incremental data Area (Receive Queue 2+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x14 20.--21. "UFCC2_1_0,Unread Frame Counter Configuration (Receive Queue 2+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x14 18.--19. "TSEL2,Truncation SELection (Receive Queue 2+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x14 16.--17. "RSM2_1_0,Receive Synchronous Mode (Receive Queue 2+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
newline
bitfld.long 0x14 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x14 14. "PIA1,Packed Incremental data Area (Receive Queue 1+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x14 12.--13. "UFCC1_1_0,Unread Frame Counter Configuration (Receive Queue 1+iand#65396;4)" "0,1,2,3"
bitfld.long 0x14 10.--11. "TSEL1,Truncation SELection (Receive Queue 1+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x14 8.--9. "RSM1_1_0,Receive Synchronous Mode (Receive Queue 1+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x14 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x14 6. "PIA0,Packed Incremental data Area (Receive Queue 0+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x14 4.--5. "UFCC0_1_0,Unread Frame Counter Configuration (Receive Queue 0+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x14 2.--3. "TSEL0,Truncation SELection (Receive Queue 0+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x14 0.--1. "RSM0_1_0,Receive Synchronous Mode (Receive Queue 0+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
line.long 0x18 "RQC4_1,The RQC0 register is used to set up reception queues 0 to 3."
bitfld.long 0x18 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x18 30. "PIA3,Packed Incremental data Area (Receive Queue 3+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x18 28.--29. "UFCC3_1_0,Unread Frame Counter Configuration (Receive Queue 3+iand#65396;4)" "0,1,2,3"
bitfld.long 0x18 26.--27. "TSEL3,Truncation SELection (Receive Queue 3+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x18 24.--25. "RSM3_1_0,Receive Synchronous Mode (Receive Queue 3+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x18 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x18 22. "PIA2,Packed Incremental data Area (Receive Queue 2+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x18 20.--21. "UFCC2_1_0,Unread Frame Counter Configuration (Receive Queue 2+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x18 18.--19. "TSEL2,Truncation SELection (Receive Queue 2+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x18 16.--17. "RSM2_1_0,Receive Synchronous Mode (Receive Queue 2+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
newline
bitfld.long 0x18 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x18 14. "PIA1,Packed Incremental data Area (Receive Queue 1+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x18 12.--13. "UFCC1_1_0,Unread Frame Counter Configuration (Receive Queue 1+iand#65396;4)" "0,1,2,3"
bitfld.long 0x18 10.--11. "TSEL1,Truncation SELection (Receive Queue 1+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x18 8.--9. "RSM1_1_0,Receive Synchronous Mode (Receive Queue 1+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x18 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x18 6. "PIA0,Packed Incremental data Area (Receive Queue 0+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x18 4.--5. "UFCC0_1_0,Unread Frame Counter Configuration (Receive Queue 0+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x18 2.--3. "TSEL0,Truncation SELection (Receive Queue 0+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x18 0.--1. "RSM0_1_0,Receive Synchronous Mode (Receive Queue 0+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
group.long 0xB0++0x7
line.long 0x0 "RPC1,The RPC register is used to set padding for received frames."
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 16.--23. 1. "DCNT_7_0,Stored Data Counter"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
bitfld.long 0x0 8.--10. "PCNT_2_0,Stored Padding Counter" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
line.long 0x4 "RTC1,The RTC register is used to set Maximum Number of bytes stored per received frame."
hexmask.long.byte 0x4 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x4 16.--27. 1. "MFL1_11_0,Maximum Frame Length 1"
newline
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.word 0x4 0.--11. 1. "MFL0_11_0,Maximum Frame Length 0"
group.long 0xBC++0x7
line.long 0x0 "UFCW1,The UFCW register sets the warning levels for the number of unread frames."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 24.--29. 1. "WL3_5_0,Warning Level 3"
newline
bitfld.long 0x0 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 16.--21. 1. "WL2_5_0,Warning Level 2"
newline
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 8.--13. 1. "WL1_5_0,Warning Level 1"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 0.--5. 1. "WL0_5_0,Warning Level 0"
line.long 0x4 "UFCS1,The UFCS register sets the stop levels for unread frames."
bitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 24.--29. 1. "SL3_5_0,Stop Level 3"
newline
bitfld.long 0x4 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 16.--21. 1. "SL2_5_0,Stop Level 2"
newline
bitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 8.--13. 1. "SL1_5_0,Stop Level 1"
newline
bitfld.long 0x4 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 0.--5. 1. "SL0_5_0,Stop Level 0"
rgroup.long 0xC4++0x13
line.long 0x0 "UFCV0_1,The UFCV0 register indicates the number of unread frames in reception queues 0 to 3."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 24.--29. 1. "CV3_5_0,Unread Frame Count 3+4and#65396;i"
newline
bitfld.long 0x0 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 16.--21. 1. "CV2_5_0,Unread Frame Count 2+4and#65396;i"
newline
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 8.--13. 1. "CV1_5_0,Unread Frame Count 1+4and#65396;i"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 0.--5. 1. "CV0_5_0,Unread Frame Count 0+4and#65396;i"
line.long 0x4 "UFCV1_1,The UFCV0 register indicates the number of unread frames in reception queues 0 to 3."
bitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 24.--29. 1. "CV3_5_0,Unread Frame Count 3+4and#65396;i"
newline
bitfld.long 0x4 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 16.--21. 1. "CV2_5_0,Unread Frame Count 2+4and#65396;i"
newline
bitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 8.--13. 1. "CV1_5_0,Unread Frame Count 1+4and#65396;i"
newline
bitfld.long 0x4 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 0.--5. 1. "CV0_5_0,Unread Frame Count 0+4and#65396;i"
line.long 0x8 "UFCV2_1,The UFCV0 register indicates the number of unread frames in reception queues 0 to 3."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "CV3_5_0,Unread Frame Count 3+4and#65396;i"
newline
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "CV2_5_0,Unread Frame Count 2+4and#65396;i"
newline
bitfld.long 0x8 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 8.--13. 1. "CV1_5_0,Unread Frame Count 1+4and#65396;i"
newline
bitfld.long 0x8 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 0.--5. 1. "CV0_5_0,Unread Frame Count 0+4and#65396;i"
line.long 0xC "UFCV3_1,The UFCV0 register indicates the number of unread frames in reception queues 0 to 3."
bitfld.long 0xC 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 24.--29. 1. "CV3_5_0,Unread Frame Count 3+4and#65396;i"
newline
bitfld.long 0xC 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 16.--21. 1. "CV2_5_0,Unread Frame Count 2+4and#65396;i"
newline
bitfld.long 0xC 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 8.--13. 1. "CV1_5_0,Unread Frame Count 1+4and#65396;i"
newline
bitfld.long 0xC 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 0.--5. 1. "CV0_5_0,Unread Frame Count 0+4and#65396;i"
line.long 0x10 "UFCV4_1,The UFCV0 register indicates the number of unread frames in reception queues 0 to 3."
bitfld.long 0x10 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 24.--29. 1. "CV3_5_0,Unread Frame Count 3+4and#65396;i"
newline
bitfld.long 0x10 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 16.--21. 1. "CV2_5_0,Unread Frame Count 2+4and#65396;i"
newline
bitfld.long 0x10 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 8.--13. 1. "CV1_5_0,Unread Frame Count 1+4and#65396;i"
newline
bitfld.long 0x10 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 0.--5. 1. "CV0_5_0,Unread Frame Count 0+4and#65396;i"
group.long 0xE0++0x13
line.long 0x0 "UFCD0_1,The UFCD0 register is used to decrement unread counters in reception queues 0 to 3."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 24.--29. 1. "DV3_5_0,Unread Frame Decrement Value 3+4and#65396;i"
newline
bitfld.long 0x0 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 16.--21. 1. "DV2_5_0,Unread Frame Decrement Value 2+4and#65396;i"
newline
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 8.--13. 1. "DV1_5_0,Unread Frame Decrement Value 1+4and#65396;i"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 0.--5. 1. "DV0_5_0,Unread Frame Decrement Value 0+4and#65396;i"
line.long 0x4 "UFCD1_1,The UFCD0 register is used to decrement unread counters in reception queues 0 to 3."
bitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 24.--29. 1. "DV3_5_0,Unread Frame Decrement Value 3+4and#65396;i"
newline
bitfld.long 0x4 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 16.--21. 1. "DV2_5_0,Unread Frame Decrement Value 2+4and#65396;i"
newline
bitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 8.--13. 1. "DV1_5_0,Unread Frame Decrement Value 1+4and#65396;i"
newline
bitfld.long 0x4 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 0.--5. 1. "DV0_5_0,Unread Frame Decrement Value 0+4and#65396;i"
line.long 0x8 "UFCD2_1,The UFCD0 register is used to decrement unread counters in reception queues 0 to 3."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "DV3_5_0,Unread Frame Decrement Value 3+4and#65396;i"
newline
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "DV2_5_0,Unread Frame Decrement Value 2+4and#65396;i"
newline
bitfld.long 0x8 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 8.--13. 1. "DV1_5_0,Unread Frame Decrement Value 1+4and#65396;i"
newline
bitfld.long 0x8 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 0.--5. 1. "DV0_5_0,Unread Frame Decrement Value 0+4and#65396;i"
line.long 0xC "UFCD3_1,The UFCD0 register is used to decrement unread counters in reception queues 0 to 3."
bitfld.long 0xC 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 24.--29. 1. "DV3_5_0,Unread Frame Decrement Value 3+4and#65396;i"
newline
bitfld.long 0xC 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 16.--21. 1. "DV2_5_0,Unread Frame Decrement Value 2+4and#65396;i"
newline
bitfld.long 0xC 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 8.--13. 1. "DV1_5_0,Unread Frame Decrement Value 1+4and#65396;i"
newline
bitfld.long 0xC 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 0.--5. 1. "DV0_5_0,Unread Frame Decrement Value 0+4and#65396;i"
line.long 0x10 "UFCD4_1,The UFCD0 register is used to decrement unread counters in reception queues 0 to 3."
bitfld.long 0x10 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 24.--29. 1. "DV3_5_0,Unread Frame Decrement Value 3+4and#65396;i"
newline
bitfld.long 0x10 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 16.--21. 1. "DV2_5_0,Unread Frame Decrement Value 2+4and#65396;i"
newline
bitfld.long 0x10 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 8.--13. 1. "DV1_5_0,Unread Frame Decrement Value 1+4and#65396;i"
newline
bitfld.long 0x10 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 0.--5. 1. "DV0_5_0,Unread Frame Decrement Value 0+4and#65396;i"
group.long 0xFC++0x83
line.long 0x0 "SFO1,The SFO register sets an offset into frames for use by the separation filter."
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x0 0.--5. 1. "FBP_5_0,First Byte Position"
line.long 0x4 "SFP0_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x4 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x8 "SFP1_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x8 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0xC "SFP2_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0xC 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x10 "SFP3_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x10 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x14 "SFP4_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x14 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x18 "SFP5_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x18 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x1C "SFP6_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x1C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x20 "SFP7_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x20 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x24 "SFP8_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x24 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x28 "SFP9_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x28 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x2C "SFP10_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x2C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x30 "SFP11_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x30 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x34 "SFP12_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x34 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x38 "SFP13_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x38 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x3C "SFP14_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x3C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x40 "SFP15_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x40 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x44 "SFP16_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x44 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x48 "SFP17_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x48 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x4C "SFP18_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x4C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x50 "SFP19_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x50 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x54 "SFP20_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x54 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x58 "SFP21_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x58 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x5C "SFP22_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x5C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x60 "SFP23_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x60 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x64 "SFP24_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x64 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x68 "SFP25_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x68 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x6C "SFP26_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x6C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x70 "SFP27_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x70 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x74 "SFP28_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x74 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x78 "SFP29_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x78 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x7C "SFP30_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x7C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x80 "SFP31_1,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x80 0.--31. 1. "FP_31_0,Separation Filter Pattern"
group.long 0x1B8++0x17
line.long 0x0 "SFV0_1,These bits define the 64 bit value to be loaded for separation filtering."
hexmask.long 0x0 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x4 "SFV1_1,These bits define the 64 bit value to be loaded for separation filtering."
hexmask.long 0x4 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x8 "SFM0_1,A pair of SFMi registers sets the mask value for the separation filter used by the corresponding reception queue 2 to 17 (stream 0 to 15)."
hexmask.long 0x8 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0xC "SFM1_1,A pair of SFMi registers sets the mask value for the separation filter used by the corresponding reception queue 2 to 17 (stream 0 to 15)."
hexmask.long 0xC 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x10 "SFL1,The SFL register is used to separation filter load."
hexmask.long 0x10 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x10 0.--4. 1. "LC_4_0,Load Command"
line.long 0x14 "PCRC1,The PCRC register is used to set the number of the first data byte in received frame to check a potential payload CRC."
hexmask.long.tbyte 0x14 10.--31. 1. "Reserved_10,Reserved"
hexmask.long.word 0x14 0.--9. 1. "CAS_9_0,-"
rgroup.long 0x200++0x47
line.long 0x0 "CIAR0_1,The CIARr register is used to check queue address."
hexmask.long 0x0 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x4 "CIAR1_1,The CIARr register is used to check queue address."
hexmask.long 0x4 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x8 "CIAR2_1,The CIARr register is used to check queue address."
hexmask.long 0x8 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0xC "CIAR3_1,The CIARr register is used to check queue address."
hexmask.long 0xC 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x10 "CIAR4_1,The CIARr register is used to check queue address."
hexmask.long 0x10 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x14 "CIAR5_1,The CIARr register is used to check queue address."
hexmask.long 0x14 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x18 "CIAR6_1,The CIARr register is used to check queue address."
hexmask.long 0x18 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x1C "CIAR7_1,The CIARr register is used to check queue address."
hexmask.long 0x1C 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x20 "CIAR8_1,The CIARr register is used to check queue address."
hexmask.long 0x20 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x24 "CIAR9_1,The CIARr register is used to check queue address."
hexmask.long 0x24 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x28 "CIAR10_1,The CIARr register is used to check queue address."
hexmask.long 0x28 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x2C "CIAR11_1,The CIARr register is used to check queue address."
hexmask.long 0x2C 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x30 "CIAR12_1,The CIARr register is used to check queue address."
hexmask.long 0x30 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x34 "CIAR13_1,The CIARr register is used to check queue address."
hexmask.long 0x34 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x38 "CIAR14_1,The CIARr register is used to check queue address."
hexmask.long 0x38 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x3C "CIAR15_1,The CIARr register is used to check queue address."
hexmask.long 0x3C 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x40 "CIAR16_1,The CIARr register is used to check queue address."
hexmask.long 0x40 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x44 "CIAR17_1,The CIARr register is used to check queue address."
hexmask.long 0x44 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
rgroup.long 0x280++0x47
line.long 0x0 "LIAR0_1,The LIARr register is used to check queue address."
hexmask.long 0x0 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x4 "LIAR1_1,The LIARr register is used to check queue address."
hexmask.long 0x4 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x8 "LIAR2_1,The LIARr register is used to check queue address."
hexmask.long 0x8 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0xC "LIAR3_1,The LIARr register is used to check queue address."
hexmask.long 0xC 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x10 "LIAR4_1,The LIARr register is used to check queue address."
hexmask.long 0x10 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x14 "LIAR5_1,The LIARr register is used to check queue address."
hexmask.long 0x14 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x18 "LIAR6_1,The LIARr register is used to check queue address."
hexmask.long 0x18 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x1C "LIAR7_1,The LIARr register is used to check queue address."
hexmask.long 0x1C 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x20 "LIAR8_1,The LIARr register is used to check queue address."
hexmask.long 0x20 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x24 "LIAR9_1,The LIARr register is used to check queue address."
hexmask.long 0x24 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x28 "LIAR10_1,The LIARr register is used to check queue address."
hexmask.long 0x28 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x2C "LIAR11_1,The LIARr register is used to check queue address."
hexmask.long 0x2C 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x30 "LIAR12_1,The LIARr register is used to check queue address."
hexmask.long 0x30 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x34 "LIAR13_1,The LIARr register is used to check queue address."
hexmask.long 0x34 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x38 "LIAR14_1,The LIARr register is used to check queue address."
hexmask.long 0x38 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x3C "LIAR15_1,The LIARr register is used to check queue address."
hexmask.long 0x3C 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x40 "LIAR16_1,The LIARr register is used to check queue address."
hexmask.long 0x40 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x44 "LIAR17_1,The LIARr register is used to check queue address."
hexmask.long 0x44 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
group.long 0x300++0x7
line.long 0x0 "TGC1,The TGC register is used to make settings related to transmission for the AVB-DMAC."
hexmask.long.word 0x0 22.--31. 1. "Reserved_22,Reserved"
bitfld.long 0x0 20.--21. "TBD3_1_0,Transmit FIFO Size (Stream Class A)" "0,1,2,3"
newline
bitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x0 16.--17. "TBD2_1_0,Transmit FIFO Size (Stream Class B)" "0,1,2,3"
newline
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 12.--13. "TBD1_1_0,Transmit FIFO Size (Network Control)" "0,1,2,3"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
bitfld.long 0x0 8.--9. "TBD0_1_0,Transmit FIFO Size (Best Effort)" "0,1,2,3"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
bitfld.long 0x0 5. "TQP,Transmission Queues Priority" "0: Default priority: Q3,1: Alternate priority: Q1"
newline
bitfld.long 0x0 4. "ECBS,Enable Credit Based Shaping" "0: CBS globally disabled,1: CBS enabled based on queue specific configuration"
bitfld.long 0x0 3. "TSM3,Transmit Synchronous Mode (Stream Class A)" "0: With write-back,1: Setting prohibited"
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bitfld.long 0x0 2. "TSM2,Transmit Synchronous Mode (Stream Class B)" "0: With write-back,1: Setting prohibited"
bitfld.long 0x0 1. "TSM1,Transmit Synchronous Mode (Network Control)" "0: With write-back,1: Setting prohibited"
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bitfld.long 0x0 0. "TSM0,Transmit Synchronous Mode (Best Effort)" "0: With write-back,1: Setting prohibited"
line.long 0x4 "TCCR1,The TCCR register controls transmission by the AVB-DMAC and is used to make related settings."
hexmask.long.word 0x4 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x4 17. "MFR,E-MAC status FIFO Release" "0: No request to E-MAC status FIFO,1: Release oldest entry of E-MAC status FIFO"
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bitfld.long 0x4 16. "MFEN,E-MAC status FIFO ENable" "0: Disabled,1: Enabled"
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x4 9. "TFR,Time Stamp FIFO Release" "0: (Not operating,1: Releases the oldest entry in the time-stamp FIFO"
bitfld.long 0x4 8. "TFEN,Time Stamp FIFO Enable" "0: Recording of transmission time stamps in the..,1: Recording of transmission time stamps in the.."
newline
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
bitfld.long 0x4 3. "TSRQ3,Transmit Start Request (Queue 3 (Stream Class A))" "0: Transmission queue is empty or stopped,1: When written: A transmission start request is.."
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bitfld.long 0x4 2. "TSRQ2,Transmit Start Request (Queue 2 (Stream Class B))" "0: Transmission queue is empty or stopped,1: When written: A transmission start request is.."
bitfld.long 0x4 1. "TSRQ1,Transmit Start Request (Queue 1 (Network Control))" "0: Transmission queue is empty or stopped,1: When written: A transmission start request is.."
newline
bitfld.long 0x4 0. "TSRQ0,Transmit Start Request (Queue 0 (Best Effort))" "0: Transmission queue is empty or stopped,1: When written: A transmission start request is.."
rgroup.long 0x308++0x3
line.long 0x0 "TSR1,The TSR register indicates the state of transmission by the AVB-DMAC."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x0 16.--20. 1. "MFFL_4_0,Number of entries stored in the E-MAC status FIFO"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
bitfld.long 0x0 8.--10. "TFFL_2_0,Time Stamp FIFO Count" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved"
bitfld.long 0x0 2.--3. "CCS1_1_0,CBS Counter Status 1 (Class A)" "0: The current credit value is within the limit,1: The current credit value is less than or equal..,?,?"
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bitfld.long 0x0 0.--1. "CCS0_1_0,CBS Counter Status 0 (Class B)" "0: The current credit value is within the limit,1: The current credit value is less than or equal..,?,?"
group.long 0x30C++0x3
line.long 0x0 "MFA1,The MFA register indicates the state of MAC."
hexmask.long.byte 0x0 26.--31. 1. "Reserved_26,Reserved"
hexmask.long.word 0x0 16.--25. 1. "MST_9_0,Tag number from descriptor identifying the frame E-MAC status relation"
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hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "MSV_3_0,E-MAC Status Value"
rgroup.long 0x310++0xF
line.long 0x0 "TFA01,TFA0 indicates the nano seconds portion of the timestamp value."
hexmask.long 0x0 0.--31. 1. "TSV_31_0,Time Stamp Value"
line.long 0x4 "TFA11,The TFA1 register indicates the lower seconds portion of the timestamp value."
hexmask.long 0x4 0.--31. 1. "TSV_63_32,Time Stamp Value"
line.long 0x8 "TFA21,The TFA2 register indicates the timestamp tag and the higher seconds portion of the timestamp value."
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved"
hexmask.long.word 0x8 16.--25. 1. "TST_9_0,Time Stamp Tag"
newline
hexmask.long.word 0x8 0.--15. 1. "TSV_79_64,Time Stamp Value"
line.long 0xC "VRR1,"
hexmask.long 0xC 0.--31. 1. "VC_31_0,Version Code"
group.long 0x320++0x1F
line.long 0x0 "CIVR0_1,The CIVR0 register sets the increment in the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x0 0.--31. 1. "CIV_31_0,CBS Increment Value"
line.long 0x4 "CIVR1_1,The CIVR0 register sets the increment in the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x4 0.--31. 1. "CIV_31_0,CBS Increment Value"
line.long 0x8 "CDVR0_1,The CDVR0 register sets the decrement in the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x8 0.--31. 1. "CDV_31_0,CBS Decrement Value"
line.long 0xC "CDVR1_1,The CDVR0 register sets the decrement in the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0xC 0.--31. 1. "CDV_31_0,CBS Decrement Value"
line.long 0x10 "CUL0_1,The CUL0 register sets the upper limit for credit values calculated by using the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x10 0.--31. 1. "ULV_31_0,CBS Upper Limit"
line.long 0x14 "CUL1_1,The CUL0 register sets the upper limit for credit values calculated by using the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x14 0.--31. 1. "ULV_31_0,CBS Upper Limit"
line.long 0x18 "CLL0_1,The CUL0 register sets the lower limit for credit values calculated by using the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x18 0.--31. 1. "LLV_31_0,CBS Lower Limit"
line.long 0x1C "CLL1_1,The CUL0 register sets the lower limit for credit values calculated by using the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x1C 0.--31. 1. "LLV_31_0,CBS Lower Limit"
group.long 0x350++0x2F
line.long 0x0 "DIC1,The DIC register is used to control descriptor interrupts 1 to 15."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "DPE15,Descriptor Interrupt Enable 15" "0: Disabled,1: Enabled"
newline
bitfld.long 0x0 14. "DPE14,Descriptor Interrupt Enable 14" "0: Disabled,1: Enabled"
bitfld.long 0x0 13. "DPE13,Descriptor Interrupt Enable 13" "0: Disabled,1: Enabled"
newline
bitfld.long 0x0 12. "DPE12,Descriptor Interrupt Enable 12" "0: Disabled,1: Enabled"
bitfld.long 0x0 11. "DPE11,Descriptor Interrupt Enable 11" "0: Disabled,1: Enabled"
newline
bitfld.long 0x0 10. "DPE10,Descriptor Interrupt Enable 10" "0: Disabled,1: Enabled"
bitfld.long 0x0 9. "DPE9,Descriptor Interrupt Enable 9" "0: Disabled,1: Enabled"
newline
bitfld.long 0x0 8. "DPE8,Descriptor Interrupt Enable 8" "0: Disabled,1: Enabled"
bitfld.long 0x0 7. "DPE7,Descriptor Interrupt Enable 7" "0: Disabled,1: Enabled"
newline
bitfld.long 0x0 6. "DPE6,Descriptor Interrupt Enable 6" "0: Disabled,1: Enabled"
bitfld.long 0x0 5. "DPE5,Descriptor Interrupt Enable 5" "0: Disabled,1: Enabled"
newline
bitfld.long 0x0 4. "DPE4,Descriptor Interrupt Enable 4" "0: Disabled,1: Enabled"
bitfld.long 0x0 3. "DPE3,Descriptor Interrupt Enable 3" "0: Disabled,1: Enabled"
newline
bitfld.long 0x0 2. "DPE2,Descriptor Interrupt Enable 2" "0: Disabled,1: Enabled"
bitfld.long 0x0 1. "DPE1,Descriptor Interrupt Enable 1" "0: Disabled,1: Enabled"
newline
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "DIS1,The DIS register indicates the state of descriptor interrupts."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4 15. "DPF15,Descriptor Interrupt Status15" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x4 14. "DPF14,Descriptor Interrupt Status14" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 13. "DPF13,Descriptor Interrupt Status13" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x4 12. "DPF12,Descriptor Interrupt Status12" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 11. "DPF11,Descriptor Interrupt Status11" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x4 10. "DPF10,Descriptor Interrupt Status10" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 9. "DPF9,Descriptor Interrupt Status9" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x4 8. "DPF8,Descriptor Interrupt Status8" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 7. "DPF7,Descriptor Interrupt Status7" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x4 6. "DPF6,Descriptor Interrupt Status6" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 5. "DPF5,Descriptor Interrupt Status5" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x4 4. "DPF4,Descriptor Interrupt Status4" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 3. "DPF3,Descriptor Interrupt Status3" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x4 2. "DPF2,Descriptor Interrupt Status2" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 1. "DPF1,Descriptor Interrupt Status1" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "EIC1,The EIC register controls the AVB-DMAC-related error interrupts."
hexmask.long.tbyte 0x8 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x8 10. "TBFE,Tx-Buffer Full interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 9. "MFFE,MAC status FIFO Full interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x8 8. "TFFE,Time Stamp FIFO Full-Error Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x8 7. "CULE1,CBS Upper Limit Error Interrupt Enable (Class A)" "0: Disabled,1: Enabled"
bitfld.long 0x8 6. "CULE0,CBS Upper Limit Error Interrupt Enable (Class B)" "0: Disabled,1: Enabled"
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bitfld.long 0x8 5. "CLLE1,CBS Lower Limit Error Interrupt Enable (Class A)" "0: Disabled,1: Enabled"
bitfld.long 0x8 4. "CLLE0,CBS Lower Limit Error Interrupt Enable (Class B)" "0: Disabled,1: Enabled"
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bitfld.long 0x8 3. "SEE,Separation Error Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x8 2. "QEE,Queue Error Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x8 1. "MTEE,E-MAC Transmission Error Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x8 0. "MREE,E-MAC Reception Error Interrupt Enable" "0: Disabled,1: Enabled"
line.long 0xC "EIS1,The EIS register indicates the states of AVB-DMAC-related error interrupts."
hexmask.long.word 0xC 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0xC 16. "QFS,Queue Full Error Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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hexmask.long.byte 0xC 11.--15. 1. "Reserved_11,Reserved"
bitfld.long 0xC 10. "TBFF,Tx-Buffer Full Flag" "0: No interrupt pending,1: Tx-Buffer full condition detected"
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bitfld.long 0xC 9. "MFFF,E-MAC status FIFO Full Flag" "0: No interrupt pending,1: E-MAC status FIFO full"
bitfld.long 0xC 8. "TFFF,Time Stamp FIFO Full Error Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0xC 7. "CULF1,CBS Upper Limit Error Interrupt Status (Class A)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0xC 6. "CULF0,CBS Upper Limit Error Interrupt Status (Class B)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0xC 5. "CLLF1,CBS Lower Limit Error Interrupt Status (Class A)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0xC 4. "CLLF0,CBS Lower Limit Error Interrupt Status (Class B)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0xC 3. "SEF,Separation Error Flag" "0: No interrupt pending,1: AVB stream data frame has discarded"
bitfld.long 0xC 2. "QEF,Queue Error Flag" "0: No interrupt pending,1: Interrupt pending"
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bitfld.long 0xC 1. "MTEF,E-MAC Transmission Error Flag" "0: No interrupt pending,1: E-MAC has reported an error during transmission"
bitfld.long 0xC 0. "MREF,E-MAC Reception Error Flag" "0: No interrupt pending,1: E-MAC has reported an error during reception"
line.long 0x10 "RIC01,The RIC0 register controls the AVB-DMAC receive interrupts."
hexmask.long.word 0x10 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x10 17. "FRE17,Receive Frame Enable 17 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 16. "FRE16,Receive Frame Enable 16 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 15. "FRE15,Receive Frame Enable 15 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 14. "FRE14,Receive Frame Enable 14 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 13. "FRE13,Receive Frame Enable 13 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 12. "FRE12,Receive Frame Enable 12 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 11. "FRE11,Receive Frame Enable 11 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 10. "FRE10,Receive Frame Enable 10 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 9. "FRE9,Receive Frame Enable 9 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 8. "FRE8,Receive Frame Enable 8 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 7. "FRE7,Receive Frame Enable 7 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 6. "FRE6,Receive Frame Enable 6 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 5. "FRE5,Receive Frame Enable 5 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 4. "FRE4,Receive Frame Enable 4 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 3. "FRE3,Receive Frame Enable 3 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 2. "FRE2,Receive Frame Enable 2 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 1. "FRE1,Receive Frame Enable 1 (Network Control)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 0. "FRE0,Receive Frame Enable 0 (Best Effort)" "0: Disabled,1: Enabled"
line.long 0x14 "RIS01,The RIS0 register indicates the states of the AVB-DMAC receive interrupts."
hexmask.long.word 0x14 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x14 17. "FRF17,Receive Frame Interrupt Status 17 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 16. "FRF16,Receive Frame Interrupt Status 16 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 15. "FRF15,Receive Frame Interrupt Status 15 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 14. "FRF14,Receive Frame Interrupt Status 14 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 13. "FRF13,Receive Frame Interrupt Status 13 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 12. "FRF12,Receive Frame Interrupt Status 12 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 11. "FRF11,Receive Frame Interrupt Status 11 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 10. "FRF10,Receive Frame Interrupt Status 10 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 9. "FRF9,Receive Frame Interrupt Status 9 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 8. "FRF8,Receive Frame Interrupt Status 8 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 7. "FRF7,Receive Frame Interrupt Status 7 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 6. "FRF6,Receive Frame Interrupt Status 6 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 5. "FRF5,Receive Frame Interrupt Status 5 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 4. "FRF4,Receive Frame Interrupt Status 4 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 3. "FRF3,Receive Frame Interrupt Status 3 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 2. "FRF2,Receive Frame Interrupt Status 2 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 1. "FRF1,Receive Frame Interrupt Status 1 (Network Control)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 0. "FRF0,Receive Frame Interrupt Status 0 (Best Effort)" "0: The interrupt is not pending,1: The interrupt is pending"
line.long 0x18 "RIC11,The RIC1 register controls the AVB-DMAC receive interrupts."
bitfld.long 0x18 31. "RFWE,Receive FIFO Warning Interrupt Enable" "0: Disabled,1: Enabled"
hexmask.long.word 0x18 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x18 17. "RWE17,Reception Warning interrupt Enable 17" "0: Disabled,1: Enabled"
bitfld.long 0x18 16. "RWE16,Reception Warning interrupt Enable 16" "0: Disabled,1: Enabled"
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bitfld.long 0x18 15. "RWE15,Reception Warning interrupt Enable 15" "0: Disabled,1: Enabled"
bitfld.long 0x18 14. "RWE14,Reception Warning interrupt Enable 14" "0: Disabled,1: Enabled"
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bitfld.long 0x18 13. "RWE13,Reception Warning interrupt Enable 13" "0: Disabled,1: Enabled"
bitfld.long 0x18 12. "RWE12,Reception Warning interrupt Enable 12" "0: Disabled,1: Enabled"
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bitfld.long 0x18 11. "RWE11,Reception Warning interrupt Enable 11" "0: Disabled,1: Enabled"
bitfld.long 0x18 10. "RWE10,Reception Warning interrupt Enable 10" "0: Disabled,1: Enabled"
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bitfld.long 0x18 9. "RWE9,Reception Warning interrupt Enable 9" "0: Disabled,1: Enabled"
bitfld.long 0x18 8. "RWE8,Reception Warning interrupt Enable 8" "0: Disabled,1: Enabled"
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bitfld.long 0x18 7. "RWE7,Reception Warning interrupt Enable 7" "0: Disabled,1: Enabled"
bitfld.long 0x18 6. "RWE6,Reception Warning interrupt Enable 6" "0: Disabled,1: Enabled"
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bitfld.long 0x18 5. "RWE5,Reception Warning interrupt Enable 5" "0: Disabled,1: Enabled"
bitfld.long 0x18 4. "RWE4,Reception Warning interrupt Enable 4" "0: Disabled,1: Enabled"
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bitfld.long 0x18 3. "RWE3,Reception Warning interrupt Enable 3" "0: Disabled,1: Enabled"
bitfld.long 0x18 2. "RWE2,Reception Warning interrupt Enable 2" "0: Disabled,1: Enabled"
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bitfld.long 0x18 1. "RWE1,Reception Warning interrupt Enable 1" "0: Disabled,1: Enabled"
bitfld.long 0x18 0. "RWE0,Reception Warning interrupt Enable 0" "0: Disabled,1: Enabled"
line.long 0x1C "RIS11,The RIS1 register indicates the states of the AVB-DMAC receive interrupts."
bitfld.long 0x1C 31. "RFWF,Receive FIFO Warning Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
hexmask.long.word 0x1C 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x1C 17. "RWF17,Reception Warning Flag 17" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 16. "RWF16,Reception Warning Flag 16" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 15. "RWF15,Reception Warning Flag 15" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 14. "RWF14,Reception Warning Flag 14" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 13. "RWF13,Reception Warning Flag 13" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 12. "RWF12,Reception Warning Flag 12" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 11. "RWF11,Reception Warning Flag 11" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 10. "RWF10,Reception Warning Flag 10" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 9. "RWF9,Reception Warning Flag 9" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 8. "RWF8,Reception Warning Flag 8" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 7. "RWF7,Reception Warning Flag 7" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 6. "RWF6,Reception Warning Flag 6" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 5. "RWF5,Reception Warning Flag 5" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 4. "RWF4,Reception Warning Flag 4" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 3. "RWF3,Reception Warning Flag 3" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 2. "RWF2,Reception Warning Flag 2" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 1. "RWF1,Reception Warning Flag 1" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 0. "RWF0,Reception Warning Flag 0" "0: No interrupt pending,1: Unread frame counter warning level reached"
line.long 0x20 "RIC21,The RIC2 register controls the AVB-DMAC receive interrupts."
bitfld.long 0x20 31. "RFFE,Receive FIFO Full Interrupt Enable" "0: Disabled,1: Enabled"
hexmask.long.word 0x20 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x20 17. "QFE17,Receive Queue 17 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 16. "QFE16,Receive Queue 16 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 15. "QFE15,Receive Queue 15 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 14. "QFE14,Receive Queue 14 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 13. "QFE13,Receive Queue 13 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 12. "QFE12,Receive Queue 12 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 11. "QFE11,Receive Queue 11 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 10. "QFE10,Receive Queue 10 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 9. "QFE9,Receive Queue 9 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 8. "QFE8,Receive Queue 8 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 7. "QFE7,Receive Queue 7 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 6. "QFE6,Receive Queue 6 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 5. "QFE5,Receive Queue 5 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 4. "QFE4,Receive Queue 4 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 3. "QFE3,Receive Queue 3 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 2. "QFE2,Receive Queue 2 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 1. "QFE1,Receive Queue 1 (Network Control) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 0. "QFE0,Receive Queue 0 (Best Effort) Full Interrupt Enable" "0: Disabled,1: Enabled"
line.long 0x24 "RIS21,The RIS2 register indicates the states of the AVB-DMAC receive interrupts."
bitfld.long 0x24 31. "RFFF,Receive FIFO Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
hexmask.long.word 0x24 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x24 17. "QFF17,Receive Queue 17 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 16. "QFF16,Receive Queue 16 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x24 15. "QFF15,Receive Queue 15 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 14. "QFF14,Receive Queue 14 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x24 13. "QFF13,Receive Queue 13 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 12. "QFF12,Receive Queue 12 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x24 11. "QFF11,Receive Queue 11 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 10. "QFF10,Receive Queue 10 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x24 9. "QFF9,Receive Queue 9 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 8. "QFF8,Receive Queue 8 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x24 7. "QFF7,Receive Queue 7 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 6. "QFF6,Receive Queue 6 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x24 5. "QFF5,Receive Queue 5 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 4. "QFF4,Receive Queue 4 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x24 3. "QFF3,Receive Queue 3 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 2. "QFF2,Receive Queue 2 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x24 1. "QFF1,Receive Queue 1 (Network Control) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 0. "QFF0,Receive Queue 0 (Best Effort) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
line.long 0x28 "TIC1,The TIC register controls the AVB-DMAC transmit interrupts."
hexmask.long.word 0x28 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x28 19. "TDPE3,Transmit Descriptor Processed interrupt Enable 3" "0: Disabled,1: Enabled"
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bitfld.long 0x28 18. "TDPE2,Transmit Descriptor Processed interrupt Enable 2" "0: Disabled,1: Enabled"
bitfld.long 0x28 17. "TDPE1,Transmit Descriptor Processed interrupt Enable 1" "0: Disabled,1: Enabled"
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bitfld.long 0x28 16. "TDPE0,Transmit Descriptor Processed interrupt Enable 0" "0: Disabled,1: Enabled"
hexmask.long.byte 0x28 12.--15. 1. "Reserved_12,Reserved"
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bitfld.long 0x28 11. "MFWE,MAC status FIFO Warning interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x28 10. "MFUE,MAC status FIFO Updated interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x28 9. "TFWE,Time Stamp FIFO Warning Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x28 8. "TFUE,Time Stamp FIFO Update Interrupt Enable" "0: Disabled,1: Enabled"
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hexmask.long.byte 0x28 4.--7. 1. "Reserved_4,Reserved"
bitfld.long 0x28 3. "FTE3,Frame Transmitted interrupt Enable 3" "0: Disabled,1: Enabled"
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bitfld.long 0x28 2. "FTE2,Frame Transmitted interrupt Enable 2" "0: Disabled,1: Enabled"
bitfld.long 0x28 1. "FTE1,Frame Transmitted interrupt Enable 1" "0: Disabled,1: Enabled"
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bitfld.long 0x28 0. "FTE0,Frame Transmitted interrupt Enable 0" "0: Disabled,1: Enabled"
line.long 0x2C "TIS1,The TIS register indicates the states of the AVB-DMAC transmit interrupts."
hexmask.long.word 0x2C 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x2C 19. "TDPF3,Transmit Descriptor Processed Flag 3" "0: No interrupt pending,1: Descriptor interrupt pending"
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bitfld.long 0x2C 18. "TDPF2,Transmit Descriptor Processed Flag 2" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x2C 17. "TDPF1,Transmit Descriptor Processed Flag 1" "0: No interrupt pending,1: Descriptor interrupt pending"
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bitfld.long 0x2C 16. "TDPF0,Transmit Descriptor Processed Flag 0" "0: No interrupt pending,1: Descriptor interrupt pending"
hexmask.long.byte 0x2C 12.--15. 1. "Reserved_12,Reserved"
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bitfld.long 0x2C 11. "MFWF,E-MAC status FIFO Warning Flag" "0: No interrupt pending,1: Tx Status FIFO warning level has been reached"
bitfld.long 0x2C 10. "MFUF,E-MAC status FIFO Updated Flag" "0: No interrupt pending,1: Tx Status FIFO has been updated"
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bitfld.long 0x2C 9. "TFWF,Time Stamp FIFO Warning Interrupt Status" "0: The interrupt is not pending,1: The time-stamp FIFO has reached the warning level"
bitfld.long 0x2C 8. "TFUF,Time Stamp FIFO Update Interrupt Status" "0: The interrupt is not pending,1: The time-stamp FIFO has been updated"
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hexmask.long.byte 0x2C 4.--7. 1. "Reserved_4,Reserved"
bitfld.long 0x2C 3. "FTF3,Frame Transmitted Flag 3" "0: No interrupt pending,1: Frame transmitted by E-MAC"
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bitfld.long 0x2C 2. "FTF2,Frame Transmitted Flag 2" "0: No interrupt pending,1: Frame transmitted by E-MAC"
bitfld.long 0x2C 1. "FTF1,Frame Transmitted Flag 1" "0: No interrupt pending,1: Frame transmitted by E-MAC"
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bitfld.long 0x2C 0. "FTF0,Frame Transmitted Flag 0" "0: No interrupt pending,1: Frame transmitted by E-MAC"
rgroup.long 0x380++0x3
line.long 0x0 "ISS1,The ISS register gives a summary of the states of AVB-DMAC-related interrupts."
bitfld.long 0x0 31. "DPM15,Descriptor Interrupt 15 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 30. "DPM14,Descriptor Interrupt 14 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x0 29. "DPM13,Descriptor Interrupt 13 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 28. "DPM12,Descriptor Interrupt 12 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x0 27. "DPM11,Descriptor Interrupt 11 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 26. "DPM10,Descriptor Interrupt 10 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x0 25. "DPM9,Descriptor Interrupt 9 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 24. "DPM8,Descriptor Interrupt 8 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x0 23. "DPM7,Descriptor Interrupt 7 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 22. "DPM6,Descriptor Interrupt 6 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x0 21. "DPM5,Descriptor Interrupt 5 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 20. "DPM4,Descriptor Interrupt 4 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x0 19. "DPM3,Descriptor Interrupt 3 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 18. "DPM2,Descriptor Interrupt 2 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x0 17. "DPM1,Descriptor Interrupt 1 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 14.--16. "Reserved_14,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 13. "CGIM,gPTP Interrupt Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 12. "RFWM,Receive FIFO Warning Interrupt Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x0 11. "MFWM,E-MAC status FIFO Warning Mirror" "0: No interrupt pending,1: E-MAC status FIFO warning interrupt pending"
bitfld.long 0x0 10. "MFUM,E-MAC status FIFO Updated Mirror" "0: No interrupt pending,1: E-MAC status FIFO updated interrupt pending"
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bitfld.long 0x0 9. "TFWM,Time Stamp FIFO Warning Interrupt Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 8. "TFUM,Time Stamp FIFO Update Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x0 7. "MM,E-MAC Interrupt Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 6. "EM,Error Interrupt Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x0 3.--5. "Reserved_3,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 2. "FTM,Frame Transmitted Mirror" "0: No interrupt pending,1: Frame transmitted interrupt pending"
newline
bitfld.long 0x0 1. "RWM,Reception Warning Mirror" "0: No interrupt pending,1: Frame transmitted interrupt pending"
bitfld.long 0x0 0. "FRM,Frame Received Mirror" "0: No interrupt pending,1: Frame received interrupt pending"
group.long 0x384++0xB
line.long 0x0 "CIE1,The CIE register is used to control the Common Interrupt."
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "RFFL,Rx-FIFO Full interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x0 18. "RFWL,Rx-FIFO Warning interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 17. "CL0M,Common Line 0 Mode" "0: Use common interrupt line 0,1: Use queue specific interrupt line 0"
newline
bitfld.long 0x0 16. "RQFM,Reception Queue Full Mode" "0: Use for error interrupt line,1: Use for queue specific interrupt line"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "CTIE,Common Transmit Interrupt Enable" "0: Disabled,1: Enabled"
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "CRIE,Common Receive Interrupt enable" "0: Disabled,1: Enabled"
line.long 0x4 "RIC31,The RIC3 register controls the AVB-DMAC receive descriptor interrupts."
hexmask.long.word 0x4 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x4 17. "RDPE17,Receive Descriptor Processed interrupt Enable 17" "0: Disabled,1: Enabled"
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bitfld.long 0x4 16. "RDPE16,Receive Descriptor Processed interrupt Enable 16" "0: Disabled,1: Enabled"
bitfld.long 0x4 15. "RDPE15,Receive Descriptor Processed interrupt Enable 15" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 14. "RDPE14,Receive Descriptor Processed interrupt Enable 14" "0: Disabled,1: Enabled"
bitfld.long 0x4 13. "RDPE13,Receive Descriptor Processed interrupt Enable 13" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 12. "RDPE12,Receive Descriptor Processed interrupt Enable 12" "0: Disabled,1: Enabled"
bitfld.long 0x4 11. "RDPE11,Receive Descriptor Processed interrupt Enable 11" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 10. "RDPE10,Receive Descriptor Processed interrupt Enable 10" "0: Disabled,1: Enabled"
bitfld.long 0x4 9. "RDPE9,Receive Descriptor Processed interrupt Enable 9" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 8. "RDPE8,Receive Descriptor Processed interrupt Enable 8" "0: Disabled,1: Enabled"
bitfld.long 0x4 7. "RDPE7,Receive Descriptor Processed interrupt Enable 7" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 6. "RDPE6,Receive Descriptor Processed interrupt Enable 6" "0,1"
bitfld.long 0x4 5. "RDPE5,Receive Descriptor Processed interrupt Enable 5" "0: Disabled,1: Enabled"
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bitfld.long 0x4 4. "RDPE4,Receive Descriptor Processed interrupt Enable 4" "0: Disabled,1: Enabled"
bitfld.long 0x4 3. "RDPE3,Receive Descriptor Processed interrupt Enable 3" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 2. "RDPE2,Receive Descriptor Processed interrupt Enable 2" "0: Disabled,1: Enabled"
bitfld.long 0x4 1. "RDPE1,Receive Descriptor Processed interrupt Enable 1" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 0. "RDPE0,Receive Descriptor Processed interrupt Enable 0" "0: Disabled,1: Enabled"
line.long 0x8 "RIS31,The RIS3 register indicates the states of the AVB-DMAC receive descriptor interrupts."
hexmask.long.word 0x8 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x8 17. "RDPF17,Receive Descriptor Processed Flag 17" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 16. "RDPF16,Receive Descriptor Processed Flag 16" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 15. "RDPF15,Receive Descriptor Processed Flag 15" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 14. "RDPF14,Receive Descriptor Processed Flag 14" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 13. "RDPF13,Receive Descriptor Processed Flag 13" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 12. "RDPF12,Receive Descriptor Processed Flag 12" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 11. "RDPF11,Receive Descriptor Processed Flag 11" "0: No interrupt pending,1: Descriptor interrupt pending"
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bitfld.long 0x8 10. "RDPF10,Receive Descriptor Processed Flag 10" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 9. "RDPF9,Receive Descriptor Processed Flag 9" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 8. "RDPF8,Receive Descriptor Processed Flag 8" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 7. "RDPF7,Receive Descriptor Processed Flag 7" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 6. "RDPF6,Receive Descriptor Processed Flag 6" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 5. "RDPF5,Receive Descriptor Processed Flag 5" "0: No interrupt pending,1: Descriptor interrupt pending"
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bitfld.long 0x8 4. "RDPF4,Receive Descriptor Processed Flag 4" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 3. "RDPF3,Receive Descriptor Processed Flag 3" "0: No interrupt pending,1: Descriptor interrupt pending"
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bitfld.long 0x8 2. "RDPF2,Receive Descriptor Processed Flag 2" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 1. "RDPF1,Receive Descriptor Processed Flag 1" "0: No interrupt pending,1: Descriptor interrupt pending"
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bitfld.long 0x8 0. "RDPF0,Receive Descriptor Processed Flag 0" "0: No interrupt pending,1: Descriptor interrupt pending"
group.long 0x440++0xB
line.long 0x0 "DIL1,The DIL register is used to control the Descriptor Interrupt line."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "DPL15,Descriptor Processed interrupt Line select 15" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x0 14. "DPL14,Descriptor Processed interrupt Line select 14" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 13. "DPL13,Descriptor Processed interrupt Line select 13" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x0 12. "DPL12,Descriptor Processed interrupt Line select 12" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 11. "DPL11,Descriptor Processed interrupt Line select 11" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x0 10. "DPL10,Descriptor Processed interrupt Line select 10" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 9. "DPL9,Descriptor Processed interrupt Line select 9" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x0 8. "DPL8,Descriptor Processed interrupt Line select 8" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 7. "DPL7,Descriptor Processed interrupt Line select 7" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x0 6. "DPL6,Descriptor Processed interrupt Line select 6" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 5. "DPL5,Descriptor Processed interrupt Line select 5" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x0 4. "DPL4,Descriptor Processed interrupt Line select 4" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 3. "DPL3,Descriptor Processed interrupt Line select 3" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x0 2. "DPL2,Descriptor Processed interrupt Line select 2" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "EIL1,The EIL register is used to control the Error Interrupt line."
hexmask.long.tbyte 0x4 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x4 10. "TBFL,Tx-Buffer Full interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x4 9. "MFFL,E-MAC status FIFO Full interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x4 8. "TFFL,Timestamp FIFO Full interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x4 7. "CULL1,CBS Upper Limit reached interrupt Line select 1" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x4 6. "CULL0,CBS Upper Limit reached interrupt Line select 0" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x4 5. "CLLL1,CBS Lower Limit reached interrupt Line select 1" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x4 4. "CLLL0,CBS Lower Limit reached interrupt Line select 0" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x4 3. "SEL,Separation Error interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x4 2. "QEL,Queue Error interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x4 1. "MTEL,E-MAC Transmission Error interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x4 0. "MREL,E-MAC Reception Error interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
line.long 0x8 "TIL1,The TIL register is used to control the Transmission Interrupt line."
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x8 11. "MFWL,E-MAC status FIFO Warning interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x8 10. "MFUL,E-MAC status FIFO Updated interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x8 9. "TFWL,Timestamp FIFO Warning interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x8 8. "TFUL,Timestamp FIFO Updated interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
hexmask.long.byte 0x8 0.--7. 1. "Reserved_0,Reserved"
group.long 0x450++0x2F
line.long 0x0 "DIE1,The DIE register is used to control the Descriptor Interrupt."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "DPS15,Descriptor Processed interrupt Set 15" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x0 14. "DPS14,Descriptor Processed interrupt Set 14" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 13. "DPS13,Descriptor Processed interrupt Set 13" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x0 12. "DPS12,Descriptor Processed interrupt Set 12" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 11. "DPS11,Descriptor Processed interrupt Set 11" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x0 10. "DPS10,Descriptor Processed interrupt Set 10" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 9. "DPS9,Descriptor Processed interrupt Set 9" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x0 8. "DPS8,Descriptor Processed interrupt Set 8" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 7. "DPS7,Descriptor Processed interrupt Set 7" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x0 6. "DPS6,Descriptor Processed interrupt Set 6" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 5. "DPS5,Descriptor Processed interrupt Set 5" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x0 4. "DPS4,Descriptor Processed interrupt Set 4" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 3. "DPS3,Descriptor Processed interrupt Set 3" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x0 2. "DPS2,Descriptor Processed interrupt Set 2" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 1. "DPS1,Descriptor Processed interrupt Set 1" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "DID1,The DID register is used to control the Descriptor Interrupt."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4 15. "DPD15,Descriptor Processed interrupt Disable 15" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x4 14. "DPD14,Descriptor Processed interrupt Disable 14" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 13. "DPD13,Descriptor Processed interrupt Disable 13" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x4 12. "DPD12,Descriptor Processed interrupt Disable 12" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 11. "DPD11,Descriptor Processed interrupt Disable 11" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x4 10. "DPD10,Descriptor Processed interrupt Disable 10" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 9. "DPD9,Descriptor Processed interrupt Disable 9" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x4 8. "DPD8,Descriptor Processed interrupt Disable 8" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 7. "DPD7,Descriptor Processed interrupt Disable 7" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x4 6. "DPD6,Descriptor Processed interrupt Disable 6" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 5. "DPD5,Descriptor Processed interrupt Disable 5" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x4 4. "DPD4,Descriptor Processed interrupt Disable 4" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 3. "DPD3,Descriptor Processed interrupt Disable 3" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x4 2. "DPD2,Descriptor Processed interrupt Disable 2" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 1. "DPD1,Descriptor Processed interrupt Disable 1" "0: No change of DIC,1: Set DIC"
newline
bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "EIE1,The EIE register is used to control the Error Interrupt."
hexmask.long.tbyte 0x8 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x8 10. "TBFS,Tx-Buffer Full interrupt Set" "0: No change of EIC,1: Set EIC"
newline
bitfld.long 0x8 9. "MFFS,E-MAC status FIFO Full interrupt Set" "0: No change of EIC,1: Set EIC"
bitfld.long 0x8 8. "TFFS,Timestamp FIFO Full interrupt Set" "0: No change of EIC,1: Set EIC"
newline
bitfld.long 0x8 7. "CULS1,CBS Upper Limit reached interrupt Set 1" "0: No change of EIC,1: Set EIC"
bitfld.long 0x8 6. "CULS0,CBS Upper Limit reached interrupt Set 0" "0: No change of EIC,1: Set EIC"
newline
bitfld.long 0x8 5. "CLLS1,CBS Lower Limit reached interrupt Set 1" "0: No change of EIC,1: Set EIC"
bitfld.long 0x8 4. "CLLS0,CBS Lower Limit reached interrupt Set 0" "0: No change of EIC,1: Set EIC"
newline
bitfld.long 0x8 3. "SES,Separation Error interrupt Set" "0: No change of EIC,1: Set EIC"
bitfld.long 0x8 2. "QES,Queue Error interrupt Set" "0: No change of EIC,1: Set EIC"
newline
bitfld.long 0x8 1. "MTES,E-MAC Transmission Error interrupt Set" "0: No change of EIC,1: Set EIC"
bitfld.long 0x8 0. "MRES,E-MAC Reception Error interrupt Set" "0: No change of EIC,1: Set EIC"
line.long 0xC "EID1,The EID register is used to control the Error Interrupt."
hexmask.long.tbyte 0xC 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0xC 10. "TBFD,Tx-Buffer Full interrupt Disable" "0: No change of EIC,1: Set EIC"
newline
bitfld.long 0xC 9. "MFFD,E-MAC status FIFO Full interrupt Disable" "0: No change of EIC,1: Set EIC"
bitfld.long 0xC 8. "TFFD,Timestamp FIFO Full interrupt Disable" "0: No change of EIC,1: Set EIC"
newline
bitfld.long 0xC 7. "CULD1,CBS Upper Limit reached interrupt Disable 1" "0: No change of EIC,1: Set EIC"
bitfld.long 0xC 6. "CULD0,CBS Upper Limit reached interrupt Disable 0" "0: No change of EIC,1: Set EIC"
newline
bitfld.long 0xC 5. "CLLD1,CBS Lower Limit reached interrupt Disable 1" "0: No change of EIC,1: Set EIC"
bitfld.long 0xC 4. "CLLD0,CBS Lower Limit reached interrupt Disable 0" "0: No change of EIC,1: Set EIC"
newline
bitfld.long 0xC 3. "SED,Separation Error interrupt Disable" "0: No change of EIC,1: Set EIC"
bitfld.long 0xC 2. "QED,Queue Error interrupt Disable" "0: No change of EIC,1: Set EIC"
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bitfld.long 0xC 1. "MTED,E-MAC Transmission Error interrupt Disable" "0: No change of EIC,1: Set EIC"
bitfld.long 0xC 0. "MRED,E-MAC Reception Error interrupt Disable" "0: No change of EIC,1: Set EIC"
line.long 0x10 "RIE01,The RIE0 register is used to control the Reception Interrupt."
hexmask.long.word 0x10 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x10 17. "FRS17,Frame Received interrupt Set 17" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x10 16. "FRS16,Frame Received interrupt Set 16" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 15. "FRS15,Frame Received interrupt Set 15" "0: No change of RIC0,1: Set RIC0"
newline
bitfld.long 0x10 14. "FRS14,Frame Received interrupt Set 14" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 13. "FRS13,Frame Received interrupt Set 13" "0: No change of RIC0,1: Set RIC0"
newline
bitfld.long 0x10 12. "FRS12,Frame Received interrupt Set 12" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 11. "FRS11,Frame Received interrupt Set 11" "0: No change of RIC0,1: Set RIC0"
newline
bitfld.long 0x10 10. "FRS10,Frame Received interrupt Set 10" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 9. "FRS9,Frame Received interrupt Set 9" "0: No change of RIC0,1: Set RIC0"
newline
bitfld.long 0x10 8. "FRS8,Frame Received interrupt Set 8" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 7. "FRS7,Frame Received interrupt Set 7" "0: No change of RIC0,1: Set RIC0"
newline
bitfld.long 0x10 6. "FRS6,Frame Received interrupt Set 6" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 5. "FRS5,Frame Received interrupt Set 5" "0: No change of RIC0,1: Set RIC0"
newline
bitfld.long 0x10 4. "FRS4,Frame Received interrupt Set 4" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 3. "FRS3,Frame Received interrupt Set 3" "0: No change of RIC0,1: Set RIC0"
newline
bitfld.long 0x10 2. "FRS2,Frame Received interrupt Set 2" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 1. "FRS1,Frame Received interrupt Set 1" "0: No change of RIC0,1: Set RIC0"
newline
bitfld.long 0x10 0. "FRS0,Frame Received interrupt Set 0" "0: No change of RIC0,1: Set RIC0"
line.long 0x14 "RID01,The RID0 register is used to control the Reception Interrupt."
hexmask.long.word 0x14 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x14 17. "FRD17,Frame Received interrupt Disable 17" "0: No change of RIC0,1: Set RIC0"
newline
bitfld.long 0x14 16. "FRD16,Frame Received interrupt Disable 16" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 15. "FRD15,Frame Received interrupt Disable 15" "0: No change of RIC0,1: Set RIC0"
newline
bitfld.long 0x14 14. "FRD14,Frame Received interrupt Disable 14" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 13. "FRD13,Frame Received interrupt Disable 13" "0: No change of RIC0,1: Set RIC0"
newline
bitfld.long 0x14 12. "FRD12,Frame Received interrupt Disable 12" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 11. "FRD11,Frame Received interrupt Disable 11" "0: No change of RIC0,1: Set RIC0"
newline
bitfld.long 0x14 10. "FRD10,Frame Received interrupt Disable 10" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 9. "FRD9,Frame Received interrupt Disable 9" "0: No change of RIC0,1: Set RIC0"
newline
bitfld.long 0x14 8. "FRD8,Frame Received interrupt Disable 8" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 7. "FRD7,Frame Received interrupt Disable 7" "0: No change of RIC0,1: Set RIC0"
newline
bitfld.long 0x14 6. "FRD6,Frame Received interrupt Disable 6" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 5. "FRD5,Frame Received interrupt Disable 5" "0: No change of RIC0,1: Set RIC0"
newline
bitfld.long 0x14 4. "FRD4,Frame Received interrupt Disable 4" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 3. "FRD3,Frame Received interrupt Disable 3" "0: No change of RIC0,1: Set RIC0"
newline
bitfld.long 0x14 2. "FRD2,Frame Received interrupt Disable 2" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 1. "FRD1,Frame Received interrupt Disable 1" "0: No change of RIC0,1: Set RIC0"
newline
bitfld.long 0x14 0. "FRD0,Frame Received interrupt Disable 0" "0: No change of RIC0,1: Set RIC0"
line.long 0x18 "RIE11,The RIE1 register is used to control the Reception Interrupt."
bitfld.long 0x18 31. "RFWS,Rx-FIFO Warning interrupt Set" "0: No change of RIC1,1: Set RIC1"
hexmask.long.word 0x18 18.--30. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x18 17. "RWS17,Reception Warning interrupt Set 17" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 16. "RWS16,Reception Warning interrupt Set 16" "0: No change of RIC1,1: Set RIC1"
newline
bitfld.long 0x18 15. "RWS15,Reception Warning interrupt Set 15" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 14. "RWS14,Reception Warning interrupt Set 14" "0: No change of RIC1,1: Set RIC1"
newline
bitfld.long 0x18 13. "RWS13,Reception Warning interrupt Set 13" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 12. "RWS12,Reception Warning interrupt Set 12" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 11. "RWS11,Reception Warning interrupt Set 11" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 10. "RWS10,Reception Warning interrupt Set 10" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 9. "RWS9,Reception Warning interrupt Set 9" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 8. "RWS8,Reception Warning interrupt Set 8" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 7. "RWS7,Reception Warning interrupt Set 7" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 6. "RWS6,Reception Warning interrupt Set 6" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 5. "RWS5,Reception Warning interrupt Set 5" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 4. "RWS4,Reception Warning interrupt Set 4" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 3. "RWS3,Reception Warning interrupt Set 3" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 2. "RWS2,Reception Warning interrupt Set 2" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 1. "RWS1,Reception Warning interrupt Set 1" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 0. "RWS0,Reception Warning interrupt Set 0" "0: No change of RIC1,1: Set RIC1"
line.long 0x1C "RID11,The RID1 register is used to control the Reception Interrupt."
bitfld.long 0x1C 31. "RFWD,Rx-FIFO Warning interrupt Disable" "0: No change of RIC1,1: Set RIC1"
hexmask.long.word 0x1C 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x1C 17. "RWD17,Reception Warning interrupt Disable 17" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 16. "RWD16,Reception Warning interrupt Disable 16" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 15. "RWD15,Reception Warning interrupt Disable 15" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 14. "RWD14,Reception Warning interrupt Disable 14" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 13. "RWD13,Reception Warning interrupt Disable 13" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 12. "RWD12,Reception Warning interrupt Disable 12" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 11. "RWD11,Reception Warning interrupt Disable 11" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 10. "RWD10,Reception Warning interrupt Disable 10" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 9. "RWD9,Reception Warning interrupt Disable 9" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 8. "RWD8,Reception Warning interrupt Disable 8" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 7. "RWD7,Reception Warning interrupt Disable 7" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 6. "RWD6,Reception Warning interrupt Disable 6" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 5. "RWD5,Reception Warning interrupt Disable 5" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 4. "RWD4,Reception Warning interrupt Disable 4" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 3. "RWD3,Reception Warning interrupt Disable 3" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 2. "RWD2,Reception Warning interrupt Disable 2" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 1. "RWD1,Reception Warning interrupt Disable 1" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 0. "RWD0,Reception Warning interrupt Disable 0" "0: No change of RIC1,1: Set RIC1"
line.long 0x20 "RIE21,The RIE2 register is used to control the Reception Interrupt."
bitfld.long 0x20 31. "RFFS,Rx-FIFO Full interrupt Set" "0: No change of RIC2,1: Set RIC2"
hexmask.long.word 0x20 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x20 17. "QFS17,Queue Full interrupt Set 17" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 16. "QFS16,Queue Full interrupt Set 16" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 15. "QFS15,Queue Full interrupt Set 15" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 14. "QFS14,Queue Full interrupt Set 14" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 13. "QFS13,Queue Full interrupt Set 13" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 12. "QFS12,Queue Full interrupt Set 12" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 11. "QFS11,Queue Full interrupt Set 11" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 10. "QFS10,Queue Full interrupt Set 10" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 9. "QFS9,Queue Full interrupt Set 9" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 8. "QFS8,Queue Full interrupt Set 8" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 7. "QFS7,Queue Full interrupt Set 7" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 6. "QFS6,Queue Full interrupt Set 6" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 5. "QFS5,Queue Full interrupt Set 5" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 4. "QFS4,Queue Full interrupt Set 4" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 3. "QFS3,Queue Full interrupt Set 3" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 2. "QFS2,Queue Full interrupt Set 2" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 1. "QFS1,Queue Full interrupt Set 1" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 0. "QFS0,Queue Full interrupt Set 0" "0: No change of RIC2,1: Set RIC2"
line.long 0x24 "RID21,The RID2 register is used to control the Reception Interrupt."
bitfld.long 0x24 31. "RFFD,Rx-FIFO Full interrupt Disable" "0: No change of RIC2,1: Set RIC2"
hexmask.long.word 0x24 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x24 17. "QFD17,Queue Full interrupt Disable 17" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 16. "QFD16,Queue Full interrupt Disable 16" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 15. "QFD15,Queue Full interrupt Disable 15" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 14. "QFD14,Queue Full interrupt Disable 14" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 13. "QFD13,Queue Full interrupt Disable 13" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 12. "QFD12,Queue Full interrupt Disable 12" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 11. "QFD11,Queue Full interrupt Disable 11" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 10. "QFD10,Queue Full interrupt Disable 10" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 9. "QFD9,Queue Full interrupt Disable 9" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 8. "QFD8,Queue Full interrupt Disable 8" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 7. "QFD7,Queue Full interrupt Disable 7" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 6. "QFD6,Queue Full interrupt Disable 6" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 5. "QFD5,Queue Full interrupt Disable 5" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 4. "QFD4,Queue Full interrupt Disable 4" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 3. "QFD3,Queue Full interrupt Disable 3" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 2. "QFD2,Queue Full interrupt Disable 2" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 1. "QFD1,Queue Full interrupt Disable 1" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 0. "QFD0,Queue Full interrupt Disable 0" "0: No change of RIC2,1: Set RIC2"
line.long 0x28 "TIE1,The TIE register is used to control the Transmission Interrupt."
hexmask.long.word 0x28 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x28 19. "TDPS3,Transmit Descriptor Processed interrupt Set 3" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x28 18. "TDPS2,Transmit Descriptor Processed interrupt Set 2" "0: No change of TIC,1: Set TIC"
bitfld.long 0x28 17. "TDPS1,Transmit Descriptor Processed interrupt Set 1" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x28 16. "TDPS0,Transmit Descriptor Processed interrupt Set 0" "0: No change of TIC,1: Set TIC"
hexmask.long.byte 0x28 12.--15. 1. "Reserved_12,Reserved"
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bitfld.long 0x28 11. "MFWS,E-MAC status FIFO Warning interrupt Set" "0: No change of TIC,1: Set TIC"
bitfld.long 0x28 10. "MFUS,E-MAC status FIFO Updated interrupt Set" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x28 9. "TFWS,Timestamp FIFO Warning interrupt Set" "0: No change of TIC,1: Set TIC"
bitfld.long 0x28 8. "TFUS,Timestamp FIFO Updated interrupt Set" "0: No change of TIC,1: Set TIC"
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hexmask.long.byte 0x28 4.--7. 1. "Reserved_4,Reserved"
bitfld.long 0x28 3. "FTS3,Frame Transmitted interrupt Set 3" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x28 2. "FTS2,Frame Transmitted interrupt Set 2" "0: No change of TIC,1: Set TIC"
bitfld.long 0x28 1. "FTS1,Frame Transmitted interrupt Set 1" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x28 0. "FTS0,Frame Transmitted interrupt Set 0" "0: No change of TIC,1: Set TIC"
line.long 0x2C "TID1,The TID register is used to control the Transmission Interrupt."
hexmask.long.word 0x2C 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x2C 19. "TDPD3,Transmit Descriptor Processed interrupt Disable 3" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x2C 18. "TDPD2,Transmit Descriptor Processed interrupt Disable 2" "0: No change of TIC,1: Set TIC"
bitfld.long 0x2C 17. "TDPD1,Transmit Descriptor Processed interrupt Disable 1" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x2C 16. "TDPD0,Transmit Descriptor Processed interrupt Disable 0" "0: No change of TIC,1: Set TIC"
hexmask.long.byte 0x2C 12.--15. 1. "Reserved_12,Reserved"
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bitfld.long 0x2C 11. "MFWD,E-MAC status FIFO Warning interrupt Disable" "0: No change of TIC,1: Set TIC"
bitfld.long 0x2C 10. "MFUD,E-MAC status FIFO Updated interrupt Disable" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x2C 9. "TFWD,Timestamp FIFO Warning interrupt Disable" "0: No change of TIC,1: Set TIC"
bitfld.long 0x2C 8. "TFUD,Timestamp FIFO Updated interrupt Disable" "0: No change of TIC,1: Set TIC"
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hexmask.long.byte 0x2C 4.--7. 1. "Reserved_4,Reserved"
bitfld.long 0x2C 3. "FTD3,Frame Transmitted interrupt Disable 3" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x2C 2. "FTD2,Frame Transmitted interrupt Disable 2" "0: No change of TIC,1: Set TIC"
bitfld.long 0x2C 1. "FTD1,Frame Transmitted interrupt Disable 1" "0: No change of TIC,1: Set TIC"
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bitfld.long 0x2C 0. "FTD0,Frame Transmitted interrupt Disable 0" "0: No change of TIC,1: Set TIC"
group.long 0x488++0x7
line.long 0x0 "RIE31,The RIE3 register is used to control the Reception Interrupt."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "RDPS17,Receive Descriptor Processed interrupt Set 17" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x0 16. "RDPS16,Receive Descriptor Processed interrupt Set 16" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 15. "RDPS15,Receive Descriptor Processed interrupt Set 15" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x0 14. "RDPS14,Receive Descriptor Processed interrupt Set 14" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 13. "RDPS13,Receive Descriptor Processed interrupt Set 13" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x0 12. "RDPS12,Receive Descriptor Processed interrupt Set 12" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 11. "RDPS11,Receive Descriptor Processed interrupt Set 11" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x0 10. "RDPS10,Receive Descriptor Processed interrupt Set 10" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 9. "RDPS9,Receive Descriptor Processed interrupt Set 9" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x0 8. "RDPS8,Receive Descriptor Processed interrupt Set 8" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 7. "RDPS7,Receive Descriptor Processed interrupt Set 7" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x0 6. "RDPS6,Receive Descriptor Processed interrupt Set 6" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 5. "RDPS5,Receive Descriptor Processed interrupt Set 5" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x0 4. "RDPS4,Receive Descriptor Processed interrupt Set 4" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 3. "RDPS3,Receive Descriptor Processed interrupt Set 3" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x0 2. "RDPS2,Receive Descriptor Processed interrupt Set 2" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 1. "RDPS1,Receive Descriptor Processed interrupt Set 1" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x0 0. "RDPS0,Receive Descriptor Processed interrupt Set 0" "0: No change of RIC3,1: Set RIC3"
line.long 0x4 "RID31,The RID3 register is used to control the Reception Interrupt."
hexmask.long.word 0x4 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x4 17. "RDPD17,Receive Descriptor Processed interrupt Disable 17" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x4 16. "RDPD16,Receive Descriptor Processed interrupt Disable 16" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 15. "RDPD15,Receive Descriptor Processed interrupt Disable 15" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x4 14. "RDPD14,Receive Descriptor Processed interrupt Disable 14" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 13. "RDPD13,Receive Descriptor Processed interrupt Disable 13" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x4 12. "RDPD12,Receive Descriptor Processed interrupt Disable 12" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 11. "RDPD11,Receive Descriptor Processed interrupt Disable 11" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x4 10. "RDPD10,Receive Descriptor Processed interrupt Disable 10" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 9. "RDPD9,Receive Descriptor Processed interrupt Disable 9" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x4 8. "RDPD8,Receive Descriptor Processed interrupt Disable 8" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 7. "RDPD7,Receive Descriptor Processed interrupt Disable 7" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x4 6. "RDPD6,Receive Descriptor Processed interrupt Disable 6" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 5. "RDPD5,Receive Descriptor Processed interrupt Disable 5" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x4 4. "RDPD4,Receive Descriptor Processed interrupt Disable 4" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 3. "RDPD3,Receive Descriptor Processed interrupt Disable 3" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x4 2. "RDPD2,Receive Descriptor Processed interrupt Disable 2" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 1. "RDPD1,Receive Descriptor Processed interrupt Disable 1" "0: No change of RIC3,1: Set RIC3"
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bitfld.long 0x4 0. "RDPD0,Receive Descriptor Processed interrupt Disable 0" "0: No change of RIC3,1: Set RIC3"
group.long 0x500++0x3
line.long 0x0 "ECMR1,"
bitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 27. "Reserved_27,Reserved" "0,1"
bitfld.long 0x0 26. "TRCCM,Counter Clear Mode" "0: Writing to a counter register leads to the..,1: Reading from a counter register leads to the.."
newline
bitfld.long 0x0 25. "Reserved_25,Reserved" "0,1"
bitfld.long 0x0 24. "Reserved_24,Reserved" "0,1"
newline
bitfld.long 0x0 23. "RCSC,Checksum Calculation" "0: Checksums are not automatically calculated,1: Checksums are automatically calculated"
bitfld.long 0x0 22. "Reserved_22,Reserved" "0,1"
newline
bitfld.long 0x0 21. "DPAD,Data Padding" "0: Padding to make up 60 bytes is inserted in data..,1: Padding is not inserted in data for transmission.."
bitfld.long 0x0 20. "RZPF,PAUSE Frame Reception with Time = 0" "0: Reception of PAUSE frames with the TIME..,1: Reception of PAUSE frames with the TIME.."
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bitfld.long 0x0 19. "TZPF,Transmit Zero PAUSE Frame(ECMR.DM=1)" "0: Not transmit the PAUSE frame of TIME parameter..,1: Transmit the PAUSE frame of TIME parameter value 0"
bitfld.long 0x0 18. "PFR,PAUSE Frame Receive Mode" "0: PAUSE frames are not transferred to the AVB-DMAC,1: PAUSE frames are transferred to the AVB-DMAC"
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bitfld.long 0x0 17. "RXF,Operating Mode for Flow Control in Reception" "0: Detection of PAUSE frames is disabled,1: Flow control for the receiving port is enabled"
bitfld.long 0x0 16. "TXF,Transmit Flow control mode" "0: Flow control for the transmitting port is disabled,1: Flow control for the transmitting port is enabled"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
bitfld.long 0x0 9. "MPDE,Magic PacketTM Detection Enable" "0: Magic PacketTM detection is not enabled,1: Magic PacketTM detection is enabled"
newline
bitfld.long 0x0 7.--8. "Reserved_7,Reserved" "0,1,2,3"
bitfld.long 0x0 6. "RE,Reception Enable" "0: Reception is disabled,1: Reception is enabled"
newline
bitfld.long 0x0 5. "TE,Transmission Enable" "0: Transmission is disabled,1: Transmission is enabled"
bitfld.long 0x0 3.--4. "Reserved_3,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
bitfld.long 0x0 1. "DM,Duplex Mode" "0: Value after reset,1: Full-duplex operation"
newline
bitfld.long 0x0 0. "PRM,Promiscuous Mode" "0: Normal operation,1: Promiscuous mode operation"
group.long 0x508++0x3
line.long 0x0 "RFLR1,The RFLR register specifies the maximum length (in bytes) of frames that can be received by this LSI. Settings in this register must not be changed while reception is enabled (while the RE bit in the E-MAC mode register (EMCR) is 1)."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0x0 0.--17. 1. "RFL_17_0,Receive Frame Length"
group.long 0x510++0x3
line.long 0x0 "ECSR1,The ECSR register indicates the state of the E-MAC. The CPU can be notified of the state. For bits associated with interrupts. the interrupt can be enabled or disabled by the corresponding bit in the E-MAC Interrupt Permission Register (ECSIPR).."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "PFRI,PAUSE Frame Retry Interrupt" "0: Read the PFTTCR register to clear the PFTTCR..,1: Write to this bit 1"
newline
bitfld.long 0x0 3. "PHYI,PHY interrupt terminal state bit" "0: PHY interrupt terminal,1: PHY interrupt terminal"
bitfld.long 0x0 2. "LCHNG,Link signal change bit" "0: The change of Link status signal,1: The change of Link status signal"
newline
bitfld.long 0x0 1. "MPD,Magic PacketTM Detection" "0: A Magic PacketTM has not been detected,1: A Magic PacketTM has been detected"
bitfld.long 0x0 0. "ICD,Illegal Carrier Detection" "0: PHY-LSI has not detected an illegal carrier on..,1: PHY-LSI has detected an illegal carrier on the.."
group.long 0x518++0x3
line.long 0x0 "ECSIPR1,The ECSIPR register enables or disables the states indicated by the ECSR register as interrupt sources. Each effective bit disables or enables interrupts corresponding to the bits in ECSR."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "PFRIM,PAUSE Frame Retry Interrupt Mask" "0: Interrupts on setting of the PFRI bit is disabled,1: Interrupts on setting of the PFRI bit is enabled"
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bitfld.long 0x0 3. "PHYIM,PHY Interrupt Mask" "0: Interrupts on setting of the PHYI bit is disabled,1: Interrupts on setting of the PHYI bit is enabled"
bitfld.long 0x0 2. "LINKIM,LINK Interrupt Mask" "0: Interrupts on setting of the LCHNG bit is disabled,1: Interrupts on setting of the LCHNG bit is enabled"
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bitfld.long 0x0 1. "MPDIP,Magic PacketTM Detect Interrupt Enable" "0: Interrupts on setting of the MPD bit is disabled,1: Interrupts on setting of the MPD bit is enabled"
bitfld.long 0x0 0. "ICDIP,Illegal Carrier Detect Interrupt Enable" "0: Interrupts on setting of the ICD bit is disabled,1: Interrupt on setting of the ICD bit is enabled"
group.long 0x520++0x3
line.long 0x0 "PIR1,The PIR register provides a means of access to the PHY-LSI internal registers via the MII."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0x0 3. "MDI,MII Management Data-In" "0,1"
newline
bitfld.long 0x0 2. "MDO,MII Management Data-Out" "0,1"
bitfld.long 0x0 1. "MMD,MII Management Mode" "0: Read direction is specified,1: Write direction is specified"
newline
bitfld.long 0x0 0. "MDC,MII Management Data Clock" "0,1"
rgroup.long 0x528++0x3
line.long 0x0 "PSR1,The PSR register is a read-only register that can read interface signals from the PHY-LSI."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "LMON,Link Status Pin State" "0: The link status signal,1: The link status signal"
group.long 0x52C++0x3
line.long 0x0 "PIPR1,The PIPR register is used to set the active sense of the AVB_PHY-INT pin."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PHYIP,PHY Interrupt Input Pin Polarity" "0: PHY interrupt pin,1: PHY interrupt pin"
group.long 0x554++0x7
line.long 0x0 "APR1,The APR register is used to set the value for the TIME parameter of auto generated PAUSE frames."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "APFTP_15_0,Auto Pause Frame Time Parameter"
line.long 0x4 "MPR1,The MPR register is used to set the value for the TIME parameter of manually generated PAUSE frames. When a PAUSE frame is manually transmitted. the value set in this register is used as its TIME parameter."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "MP_15_0,Manual PAUSE"
rgroup.long 0x55C++0x7
line.long 0x0 "PFTCR1,The PFTCR register is a counter that indicates the number of times PAUSE frames have been transmitted."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "PFTXC_15_0,PAUSE Frame Transmit Counter"
line.long 0x4 "PFRCR1,The RFRCR register is a counter that indicates the number of times PAUSE frames have been received."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "PFRXC_15_0,PAUSE Frame Receive Counter"
group.long 0x564++0x7
line.long 0x0 "TPAUSER1,The TPAUSER register is used to set the value for upper limit number of auto generated PAUSE frames."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "PFRTULMT_15_0,Pause Frame Retry Upper LiMiT"
line.long 0x4 "PFTTCR1,The PFTTCR register is a counter that indicates the number of times auto PAUSE frames have been transmit."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "PFRTC_15_0,Pause Frame Retry Counter"
group.long 0x5B0++0x3
line.long 0x0 "GECMR1,The GECMR register specifies the operating mode for the E-MAC."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "SPEED,Transfer Speed Setting" "0: Transfer is at 100 Mbps,1: Transfer is at 1000 Mbps"
group.long 0x5C0++0x3
line.long 0x0 "MAHR1,The MAHR register specifies the 32 higher-order bits of the 48-bit E-MAC address. The settings in this register are normally made in the initialization process after a reset."
hexmask.long 0x0 0.--31. 1. "MA_47_16,E-MAC Address Bits 47 to 16"
group.long 0x5C8++0x3
line.long 0x0 "MALR1,The MALR register specifies the 16 lower-order bits of the 48-bit E-MAC address. The settings in this register are normally made in the initialization process after a reset."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "MA_15_0,E-MAC Address Bits 15 to 0"
group.long 0x700++0x3
line.long 0x0 "TROCR1,The TROCR register is a counter that indicates the number of times frames with time-out were transmit. Counting up stops when the value in this register reaches H'0000 FFFF."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "FTTOC_15_0,Frame transmit time-out counter"
group.long 0x740++0x3
line.long 0x0 "CEFCR1,The CEFCR register is a counter that indicates the number of times frames with CRC errors were received. Counting up stops when the value in this register reaches H'0000 FFFF."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "CEFC_15_0,CRC Error Frame Counter"
group.long 0x748++0x3
line.long 0x0 "FRECR1,The FRECR register is a counter that indicates the number of frames for which receive errors were generated by input on the RX_ER from the PHY-LSI. Counting up stops when the value in this register reaches H'0000and#65533;FFFF."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "FREC_15_0,Frame Receive Error Counter"
group.long 0x750++0x3
line.long 0x0 "TSFRCR1,The TSFRCR register is a counter that indicates the number of received frames that were fewer than 64 bytes in length. Counting stops when the value in this register reaches H'0000and#65533;FFFF."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "TSFRC_15_0,Too-Short Frame Receive Counter"
group.long 0x758++0x3
line.long 0x0 "TLFRCR1,The TLFRCR register is a counter that indicates the number of received frames that were longer than the value specified in the receive frame length register (RFLR). Counting up stops when the value in the TLFRCR register reaches.."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "TLFC_15_0,Too-Long Frame Receive Counter"
group.long 0x760++0x3
line.long 0x0 "RFCR1,The RFCR register is a counter that indicates the number of received frames containing double_quotationresidual bitsdouble_quotation (trailing bits not making up an 8-bit unit). Counting up stops when the value in this register reaches.."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RFC_15_0,Residual-Bit Frame Receive Counter"
group.long 0x778++0x3
line.long 0x0 "MAFCR1,The MAFCR register is a counter that indicates the number of received frames for which a multicast address was specified. Counting up stops when the value in this register reaches H'0000and#65533;FFFF."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "MAFC_15_0,Multicast Address Frame Counter"
group.long 0x800++0x3
line.long 0x0 "CSR01,"
hexmask.long 0x0 0.--31. 1. "Reserved_0,Reserved"
group.long 0x808++0x3
line.long 0x0 "CSR21,"
hexmask.long 0x0 0.--31. 1. "Reserved_0,Reserved"
group.long 0x824++0xB
line.long 0x0 "CSR301,"
hexmask.long 0x0 0.--31. 1. "Reserved_0,Reserved"
line.long 0x4 "CSR311,"
hexmask.long 0x4 0.--31. 1. "Reserved_0,Reserved"
line.long 0x8 "CSR321,"
hexmask.long 0x8 0.--31. 1. "Reserved_0,Reserved"
group.long 0xA00++0x3
line.long 0x0 "USMR1,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0x0 3. "EI6F,Enable UDP/IPv6 Filtering" "0: UDP/IPv6 Filtering disabled,1: UDP/IPv6 Filtering enabled"
newline
bitfld.long 0x0 2. "EI4F,Enable UDP/IPv4 Filtering" "0: UDP/IPv4 Filtering disabled,1: UDP/IPv4 Filtering enabled"
bitfld.long 0x0 1. "EMOM,Enable Manual Offset Mode" "0: Manual Offset Mode disabled,1: Manual Offset Mode enabled"
newline
bitfld.long 0x0 0. "EEOM,Enable Extended Offset Mode" "0: Extended Offset Mode disabled,1: Extended Offset Mode enabled"
group.long 0xAE8++0x57
line.long 0x0 "SFO21,"
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "FBP2_10_0,First Byte Position2"
line.long 0x4 "I4SFO1,"
hexmask.long.tbyte 0x4 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0x4 0.--10. 1. "FBP_10_0,First Byte Position"
line.long 0x8 "I4DFO1,"
hexmask.long.tbyte 0x8 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0x8 0.--10. 1. "FBP_10_0,First Byte Position"
line.long 0xC "I6SFO1,"
hexmask.long.tbyte 0xC 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0xC 0.--10. 1. "FBP_10_0,First Byte Position"
line.long 0x10 "I6DFO1,"
hexmask.long.tbyte 0x10 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0x10 0.--10. 1. "FBP_10_0,First Byte Position"
line.long 0x14 "UPFO1,"
hexmask.long.tbyte 0x14 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0x14 0.--10. 1. "FBP_10_0,First Byte Position"
line.long 0x18 "I4SFPR0_1,"
hexmask.long 0x18 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x1C "I4SFPR1_1,"
hexmask.long 0x1C 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x20 "I4SFPR2_1,"
hexmask.long 0x20 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x24 "I4SFPR3_1,"
hexmask.long 0x24 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x28 "I4SFPR4_1,"
hexmask.long 0x28 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x2C "I4SFPR5_1,"
hexmask.long 0x2C 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x30 "I4SFPR6_1,"
hexmask.long 0x30 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x34 "I4SFPR7_1,"
hexmask.long 0x34 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x38 "I4SFPR8_1,"
hexmask.long 0x38 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x3C "I4SFPR9_1,"
hexmask.long 0x3C 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x40 "I4SFPR10_1,"
hexmask.long 0x40 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x44 "I4SFPR11_1,"
hexmask.long 0x44 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x48 "I4SFPR12_1,"
hexmask.long 0x48 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x4C "I4SFPR13_1,"
hexmask.long 0x4C 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x50 "I4SFPR14_1,"
hexmask.long 0x50 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x54 "I4SFPR15_1,"
hexmask.long 0x54 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
group.long 0xC00++0x3F
line.long 0x0 "I4DFPR0_1,"
hexmask.long 0x0 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x4 "I4DFPR1_1,"
hexmask.long 0x4 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x8 "I4DFPR2_1,"
hexmask.long 0x8 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0xC "I4DFPR3_1,"
hexmask.long 0xC 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x10 "I4DFPR4_1,"
hexmask.long 0x10 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x14 "I4DFPR5_1,"
hexmask.long 0x14 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x18 "I4DFPR6_1,"
hexmask.long 0x18 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x1C "I4DFPR7_1,"
hexmask.long 0x1C 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x20 "I4DFPR8_1,"
hexmask.long 0x20 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x24 "I4DFPR9_1,"
hexmask.long 0x24 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x28 "I4DFPR10_1,"
hexmask.long 0x28 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x2C "I4DFPR11_1,"
hexmask.long 0x2C 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x30 "I4DFPR12_1,"
hexmask.long 0x30 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x34 "I4DFPR13_1,"
hexmask.long 0x34 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x38 "I4DFPR14_1,"
hexmask.long 0x38 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x3C "I4DFPR15_1,"
hexmask.long 0x3C 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
group.long 0xD00++0x243
line.long 0x0 "I6SFPR0_1,"
hexmask.long 0x0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x4 "I6SFPR1_1,"
hexmask.long 0x4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x8 "I6SFPR2_1,"
hexmask.long 0x8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xC "I6SFPR3_1,"
hexmask.long 0xC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x10 "I6SFPR4_1,"
hexmask.long 0x10 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x14 "I6SFPR5_1,"
hexmask.long 0x14 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x18 "I6SFPR6_1,"
hexmask.long 0x18 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x1C "I6SFPR7_1,"
hexmask.long 0x1C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x20 "I6SFPR8_1,"
hexmask.long 0x20 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x24 "I6SFPR9_1,"
hexmask.long 0x24 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x28 "I6SFPR10_1,"
hexmask.long 0x28 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x2C "I6SFPR11_1,"
hexmask.long 0x2C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x30 "I6SFPR12_1,"
hexmask.long 0x30 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x34 "I6SFPR13_1,"
hexmask.long 0x34 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x38 "I6SFPR14_1,"
hexmask.long 0x38 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x3C "I6SFPR15_1,"
hexmask.long 0x3C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x40 "I6SFPR16_1,"
hexmask.long 0x40 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x44 "I6SFPR17_1,"
hexmask.long 0x44 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x48 "I6SFPR18_1,"
hexmask.long 0x48 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x4C "I6SFPR19_1,"
hexmask.long 0x4C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x50 "I6SFPR20_1,"
hexmask.long 0x50 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x54 "I6SFPR21_1,"
hexmask.long 0x54 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x58 "I6SFPR22_1,"
hexmask.long 0x58 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x5C "I6SFPR23_1,"
hexmask.long 0x5C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x60 "I6SFPR24_1,"
hexmask.long 0x60 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x64 "I6SFPR25_1,"
hexmask.long 0x64 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x68 "I6SFPR26_1,"
hexmask.long 0x68 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x6C "I6SFPR27_1,"
hexmask.long 0x6C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x70 "I6SFPR28_1,"
hexmask.long 0x70 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x74 "I6SFPR29_1,"
hexmask.long 0x74 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x78 "I6SFPR30_1,"
hexmask.long 0x78 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x7C "I6SFPR31_1,"
hexmask.long 0x7C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x80 "I6SFPR32_1,"
hexmask.long 0x80 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x84 "I6SFPR33_1,"
hexmask.long 0x84 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x88 "I6SFPR34_1,"
hexmask.long 0x88 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x8C "I6SFPR35_1,"
hexmask.long 0x8C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x90 "I6SFPR36_1,"
hexmask.long 0x90 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x94 "I6SFPR37_1,"
hexmask.long 0x94 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x98 "I6SFPR38_1,"
hexmask.long 0x98 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x9C "I6SFPR39_1,"
hexmask.long 0x9C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xA0 "I6SFPR40_1,"
hexmask.long 0xA0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xA4 "I6SFPR41_1,"
hexmask.long 0xA4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xA8 "I6SFPR42_1,"
hexmask.long 0xA8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xAC "I6SFPR43_1,"
hexmask.long 0xAC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xB0 "I6SFPR44_1,"
hexmask.long 0xB0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xB4 "I6SFPR45_1,"
hexmask.long 0xB4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xB8 "I6SFPR46_1,"
hexmask.long 0xB8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xBC "I6SFPR47_1,"
hexmask.long 0xBC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xC0 "I6SFPR48_1,"
hexmask.long 0xC0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xC4 "I6SFPR49_1,"
hexmask.long 0xC4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xC8 "I6SFPR50_1,"
hexmask.long 0xC8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xCC "I6SFPR51_1,"
hexmask.long 0xCC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xD0 "I6SFPR52_1,"
hexmask.long 0xD0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xD4 "I6SFPR53_1,"
hexmask.long 0xD4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xD8 "I6SFPR54_1,"
hexmask.long 0xD8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xDC "I6SFPR55_1,"
hexmask.long 0xDC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xE0 "I6SFPR56_1,"
hexmask.long 0xE0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xE4 "I6SFPR57_1,"
hexmask.long 0xE4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xE8 "I6SFPR58_1,"
hexmask.long 0xE8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xEC "I6SFPR59_1,"
hexmask.long 0xEC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xF0 "I6SFPR60_1,"
hexmask.long 0xF0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xF4 "I6SFPR61_1,"
hexmask.long 0xF4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xF8 "I6SFPR62_1,"
hexmask.long 0xF8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xFC "I6SFPR63_1,"
hexmask.long 0xFC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x100 "I6DFPR0_1,"
hexmask.long 0x100 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x104 "I6DFPR1_1,"
hexmask.long 0x104 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x108 "I6DFPR2_1,"
hexmask.long 0x108 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x10C "I6DFPR3_1,"
hexmask.long 0x10C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x110 "I6DFPR4_1,"
hexmask.long 0x110 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x114 "I6DFPR5_1,"
hexmask.long 0x114 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x118 "I6DFPR6_1,"
hexmask.long 0x118 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x11C "I6DFPR7_1,"
hexmask.long 0x11C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x120 "I6DFPR8_1,"
hexmask.long 0x120 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x124 "I6DFPR9_1,"
hexmask.long 0x124 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x128 "I6DFPR10_1,"
hexmask.long 0x128 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x12C "I6DFPR11_1,"
hexmask.long 0x12C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x130 "I6DFPR12_1,"
hexmask.long 0x130 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x134 "I6DFPR13_1,"
hexmask.long 0x134 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x138 "I6DFPR14_1,"
hexmask.long 0x138 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x13C "I6DFPR15_1,"
hexmask.long 0x13C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x140 "I6DFPR16_1,"
hexmask.long 0x140 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x144 "I6DFPR17_1,"
hexmask.long 0x144 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x148 "I6DFPR18_1,"
hexmask.long 0x148 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x14C "I6DFPR19_1,"
hexmask.long 0x14C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x150 "I6DFPR20_1,"
hexmask.long 0x150 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x154 "I6DFPR21_1,"
hexmask.long 0x154 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x158 "I6DFPR22_1,"
hexmask.long 0x158 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x15C "I6DFPR23_1,"
hexmask.long 0x15C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x160 "I6DFPR24_1,"
hexmask.long 0x160 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x164 "I6DFPR25_1,"
hexmask.long 0x164 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x168 "I6DFPR26_1,"
hexmask.long 0x168 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x16C "I6DFPR27_1,"
hexmask.long 0x16C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x170 "I6DFPR28_1,"
hexmask.long 0x170 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x174 "I6DFPR29_1,"
hexmask.long 0x174 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x178 "I6DFPR30_1,"
hexmask.long 0x178 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x17C "I6DFPR31_1,"
hexmask.long 0x17C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x180 "I6DFPR32_1,"
hexmask.long 0x180 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x184 "I6DFPR33_1,"
hexmask.long 0x184 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x188 "I6DFPR34_1,"
hexmask.long 0x188 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x18C "I6DFPR35_1,"
hexmask.long 0x18C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x190 "I6DFPR36_1,"
hexmask.long 0x190 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x194 "I6DFPR37_1,"
hexmask.long 0x194 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x198 "I6DFPR38_1,"
hexmask.long 0x198 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x19C "I6DFPR39_1,"
hexmask.long 0x19C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1A0 "I6DFPR40_1,"
hexmask.long 0x1A0 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1A4 "I6DFPR41_1,"
hexmask.long 0x1A4 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1A8 "I6DFPR42_1,"
hexmask.long 0x1A8 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1AC "I6DFPR43_1,"
hexmask.long 0x1AC 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1B0 "I6DFPR44_1,"
hexmask.long 0x1B0 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1B4 "I6DFPR45_1,"
hexmask.long 0x1B4 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1B8 "I6DFPR46_1,"
hexmask.long 0x1B8 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1BC "I6DFPR47_1,"
hexmask.long 0x1BC 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1C0 "I6DFPR48_1,"
hexmask.long 0x1C0 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1C4 "I6DFPR49_1,"
hexmask.long 0x1C4 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1C8 "I6DFPR50_1,"
hexmask.long 0x1C8 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1CC "I6DFPR51_1,"
hexmask.long 0x1CC 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1D0 "I6DFPR52_1,"
hexmask.long 0x1D0 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1D4 "I6DFPR53_1,"
hexmask.long 0x1D4 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1D8 "I6DFPR54_1,"
hexmask.long 0x1D8 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1DC "I6DFPR55_1,"
hexmask.long 0x1DC 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1E0 "I6DFPR56_1,"
hexmask.long 0x1E0 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1E4 "I6DFPR57_1,"
hexmask.long 0x1E4 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1E8 "I6DFPR58_1,"
hexmask.long 0x1E8 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1EC "I6DFPR59_1,"
hexmask.long 0x1EC 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1F0 "I6DFPR60_1,"
hexmask.long 0x1F0 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1F4 "I6DFPR61_1,"
hexmask.long 0x1F4 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1F8 "I6DFPR62_1,"
hexmask.long 0x1F8 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1FC "I6DFPR63_1,"
hexmask.long 0x1FC 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x200 "UPFPR0_1,"
hexmask.long.word 0x200 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x200 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x204 "UPFPR1_1,"
hexmask.long.word 0x204 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x204 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x208 "UPFPR2_1,"
hexmask.long.word 0x208 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x208 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x20C "UPFPR3_1,"
hexmask.long.word 0x20C 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x20C 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x210 "UPFPR4_1,"
hexmask.long.word 0x210 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x210 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x214 "UPFPR5_1,"
hexmask.long.word 0x214 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x214 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x218 "UPFPR6_1,"
hexmask.long.word 0x218 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x218 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x21C "UPFPR7_1,"
hexmask.long.word 0x21C 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x21C 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x220 "UPFPR8_1,"
hexmask.long.word 0x220 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x220 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x224 "UPFPR9_1,"
hexmask.long.word 0x224 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x224 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x228 "UPFPR10_1,"
hexmask.long.word 0x228 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x228 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x22C "UPFPR11_1,"
hexmask.long.word 0x22C 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x22C 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x230 "UPFPR12_1,"
hexmask.long.word 0x230 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x230 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x234 "UPFPR13_1,"
hexmask.long.word 0x234 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x234 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x238 "UPFPR14_1,"
hexmask.long.word 0x238 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x238 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x23C "UPFPR15_1,"
hexmask.long.word 0x23C 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x23C 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x240 "SFV21,"
hexmask.long 0x240 0.--31. 1. "LV_31_0,Separation Filter Value"
group.long 0xF48++0x2B
line.long 0x0 "I4SFVR1,"
hexmask.long 0x0 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x4 "I4DFVR1,"
hexmask.long 0x4 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x8 "I6SFVR0_1,"
hexmask.long 0x8 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0xC "I6SFVR1_1,"
hexmask.long 0xC 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x10 "I6SFVR2_1,"
hexmask.long 0x10 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x14 "I6SFVR3_1,"
hexmask.long 0x14 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x18 "I6DFVR0_1,"
hexmask.long 0x18 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x1C "I6DFVR1_1,"
hexmask.long 0x1C 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x20 "I6DFVR2_1,"
hexmask.long 0x20 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x24 "I6DFVR3_1,"
hexmask.long 0x24 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x28 "UPFVR1,"
hexmask.long 0x28 0.--31. 1. "LV_31_0,Separation Filter Value"
group.long 0xF7C++0x43
line.long 0x0 "I4SFMR1,"
hexmask.long 0x0 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x4 "I4DFMR1,"
hexmask.long 0x4 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x8 "I6SFMR0_1,"
hexmask.long 0x8 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0xC "I6SFMR1_1,"
hexmask.long 0xC 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x10 "I6SFMR2_1,"
hexmask.long 0x10 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x14 "I6SFMR3_1,"
hexmask.long 0x14 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x18 "I6DFMR0_1,"
hexmask.long 0x18 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x1C "I6DFMR1_1,"
hexmask.long 0x1C 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x20 "I6DFMR2_1,"
hexmask.long 0x20 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x24 "I6DFMR3_1,"
hexmask.long 0x24 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x28 "UPFMR1,"
hexmask.long 0x28 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x2C "SFL21,"
hexmask.long 0x2C 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x2C 0.--4. 1. "LC_4_0,Load Command"
line.long 0x30 "I4SFLR1,"
hexmask.long 0x30 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x30 0.--4. 1. "LC_4_0,Load Command"
line.long 0x34 "I4DFLR1,"
hexmask.long 0x34 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x34 0.--4. 1. "LC_4_0,Load Command"
line.long 0x38 "I6SFLR1,"
hexmask.long 0x38 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x38 0.--4. 1. "LC_4_0,Load Command"
line.long 0x3C "I6DFLR1,"
hexmask.long 0x3C 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x3C 0.--4. 1. "LC_4_0,Load Command"
line.long 0x40 "UPFLR1,"
hexmask.long 0x40 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x40 0.--4. 1. "LC_4_0,Load Command"
tree.end
tree "EtherAVB_IF_2"
base ad:0xE6820000
group.long 0x0++0xB
line.long 0x0 "CCC2,The CCC register specifies the operating mode of the AVB-DMAC."
hexmask.long.byte 0x0 26.--31. 1. "Reserved_26,Reserved"
bitfld.long 0x0 25. "FCE,Flow Control Enable" "0: Flow control disabled1: Flow control enabled,?"
newline
bitfld.long 0x0 24. "LBME,Loopback Mode Enable" "0: Normal operation,1: Loopback mode is enabled"
bitfld.long 0x0 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 20. "Reserved_20,Reserved" "0,1"
bitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 16.--17. "CSEL_1_0,gPTP Clock Select" "0: gPTP is disabled,1: High-speed peripheral bus clock,?,?"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "DTSR,Data Transmission Suspend Request" "0: Normal operation,1: Requests suspension"
bitfld.long 0x0 7. "GAC,Gptp Active in Config" "0: Normal operation1: gPTP support active in CONFIG..,?"
newline
hexmask.long.byte 0x0 2.--6. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "OPC_1_0,Operating Mode Configuration" "0: Reset mode,1: Configuration mode,?,?"
line.long 0x4 "DBAT2,The DBAT register specifies the base address of the descriptor table in the URAM. For the structure of this table. see section 50.3.3 Descriptors. Writing to this bit is only possible when the current operating mode is configuration mode."
hexmask.long 0x4 0.--31. 1. "TA_31_0,Descriptor Base Table Address"
line.long 0x8 "DLR2,The DLR register is used to issue a request to load the values from the current descriptor address register q (CDARq) for each queue to the descriptor base address table register (DBAT)."
hexmask.long.word 0x8 22.--31. 1. "Reserved_22,Reserved"
bitfld.long 0x8 21. "LBA21,Base Address Load Request (Rx17: Stream 15)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 20. "LBA20,Base Address Load Request (Rx16: Stream 14)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 19. "LBA19,Base Address Load Request (Rx15: Stream 13)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 18. "LBA18,Base Address Load Request (Rx14: Stream 12)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 17. "LBA17,Base Address Load Request (Rx13: Stream 11)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 16. "LBA16,Base Address Load Request (Rx12: Stream 10)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 15. "LBA15,Base Address Load Request (Rx11: Stream 9)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 14. "LBA14,Base Address Load Request (Rx10: Stream 8)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 13. "LBA13,Base Address Load Request (Rx9: Stream 7)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 12. "LBA12,Base Address Load Request (Rx8: Stream 6)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 11. "LBA11,Base Address Load Request (Rx7: Stream 5)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 10. "LBA10,Base Address Load Request (Rx6: Stream 4)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 9. "LBA9,Base Address Load Request (Rx5: Stream 3)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 8. "LBA8,Base Address Load Request (Rx4: Stream 2)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 7. "LBA7,Base Address Load Request (Rx3: Stream 1)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 6. "LBA6,Base Address Load Request (Rx2: Stream 0)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 5. "LBA5,Base Address Load Request (Rx1: Network Control)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 4. "LBA4,Base Address Load Request (Rx0: Best Effort)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 3. "LBA3,Base Address Load Request (Tx3: Stream Class A)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 2. "LBA2,Base Address Load Request (Tx2: Stream Class B)" "0: No load request is issued,1: When written: A request for loading the.."
bitfld.long 0x8 1. "LBA1,Base Address Load Request (Tx1: Network Control)" "0: No load request is issued,1: When written: A request for loading the.."
newline
bitfld.long 0x8 0. "LBA0,Base Address Load Request (Tx0: Best Effort)" "0: No load request is issued,1: When written: A request for loading the.."
rgroup.long 0xC++0x5B
line.long 0x0 "CSR2,The CSR register is used to indicate the operating mode in which the AVB-DMAC is running and the individual communications states."
hexmask.long.word 0x0 22.--31. 1. "Reserved_22,Reserved"
bitfld.long 0x0 21. "TDUO,Transmission Descriptor Update On-going" "0: No pending descriptor update1: Pending..,?"
newline
bitfld.long 0x0 20. "RPO,Receive Process Status" "0: Normal operation,1: Reception is in progress"
bitfld.long 0x0 19. "TPO3,Transmit Process Status 3 (Stream Class A)" "0: Normal operation,1: Transmission is in progress"
newline
bitfld.long 0x0 18. "TPO2,Transmit Process Status 2 (Stream Class B)" "0: Normal operation,1: Transmission is in progress"
bitfld.long 0x0 17. "TPO1,Transmit Process Status 1 (Network Control)" "0: Normal operation,1: Transmission is in progress"
newline
bitfld.long 0x0 16. "TPO0,Transmit Process Status 0 (Best Effort)" "0: Normal operation,1: Transmission is in progress"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "DTS,Data Transmission Suspended Status" "0: Normal operation,1: Transmission is in progress"
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "OPS_3_0,Operating Mode Status"
line.long 0x4 "CDAR0_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x4 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x8 "CDAR1_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x8 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0xC "CDAR2_2,The CDARq register indicates the current descriptor address."
hexmask.long 0xC 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x10 "CDAR3_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x10 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x14 "CDAR4_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x14 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x18 "CDAR5_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x18 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x1C "CDAR6_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x1C 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x20 "CDAR7_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x20 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x24 "CDAR8_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x24 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x28 "CDAR9_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x28 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x2C "CDAR10_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x2C 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x30 "CDAR11_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x30 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x34 "CDAR12_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x34 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x38 "CDAR13_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x38 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x3C "CDAR14_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x3C 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x40 "CDAR15_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x40 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x44 "CDAR16_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x44 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x48 "CDAR17_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x48 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x4C "CDAR18_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x4C 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x50 "CDAR19_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x50 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x54 "CDAR20_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x54 0.--31. 1. "CDA_31_0,Current Descriptor Address"
line.long 0x58 "CDAR21_2,The CDARq register indicates the current descriptor address."
hexmask.long 0x58 0.--31. 1. "CDA_31_0,Current Descriptor Address"
rgroup.long 0x88++0x3
line.long 0x0 "ESR2,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "EIL,Error Information Lost" "0: No loss of error information,1: Lost of error information detected"
newline
hexmask.long.byte 0x0 8.--11. 1. "ET_3_0,Error Type"
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--4. 1. "EQN_4_0,Error Queue Number"
group.long 0x8C++0x1B
line.long 0x0 "APSR2,Writing to this bit is only possible when the current operating mode is configuration mode."
bitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Reserved_30,Reserved" "0,1"
newline
bitfld.long 0x0 29. "GPTPCLOCK,Selec clock source for GPTP synchronization" "0: Origina clock source,1: SH'0D4_HSC"
bitfld.long 0x0 28. "Reserved_28,Reserved" "0,1"
newline
bitfld.long 0x0 27. "Reserved_27,Reserved" "0,1"
bitfld.long 0x0 26. "Reserved_26,Reserved" "0,1"
newline
bitfld.long 0x0 25. "GPTPTIMERSOURCE,Select gptp_timer[77:0] source for GPTP synchronization" "0: Origina gptp_timer source,1: gptp_timer from TSN-GPTP"
bitfld.long 0x0 24. "Reserved_24,Reserved" "0,1"
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
hexmask.long.byte 0x0 16.--19. 1. "ERREN_3_0,Dummy Error Setting"
newline
bitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 14. "TDM,Tx clock internal Delay Mode" "0: normal mode,1: delayed mode"
newline
bitfld.long 0x0 13. "RDM,Rx clock internal Delay Mode" "0: normal mode,1: delayed mode"
bitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
newline
hexmask.long.byte 0x0 5.--11. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "CMSW,select width of internal compare match signal" "0: 1clock period pulse,1: 4clock period pulse"
newline
bitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.long 0x0 2. "ERRMOD,Error injection mode" "0: ERREN[3:0] invalid,1: ERREN[3:0] valid"
newline
bitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "RCR2,The RCR register is used to make settings related to reception for the AVB-DMAC."
bitfld.long 0x4 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 16.--28. 1. "RFCL_12_0,Receive FIFO Caution Level"
newline
hexmask.long.byte 0x4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x4 6. "Reserved_6,Reserved" "0,1"
bitfld.long 0x4 5. "ETS2,Time Stamp Enable (Stream)" "0: Time stamping is disabled,1: Time stamping is enabled"
newline
bitfld.long 0x4 4. "ETS0,Time Stamp Enable (Best Effort)" "0: Time stamping is disabled,1: Time stamping is enabled"
bitfld.long 0x4 2.--3. "ESF_1_0,Stream Filtering Select" "0: Filtering is disabled,1: The filter for both AVB stream frames and..,?,?"
newline
bitfld.long 0x4 1. "ENCF,Network Control Filtering Enable" "0: Network control is disabled,1: Network control is enabled"
bitfld.long 0x4 0. "EFFS,Error Frame Enable" "0: Error frames are disabled,1: Error frames are enabled"
line.long 0x8 "RQC0_2,The RQC0 register is used to set up reception queues 0 to 3."
bitfld.long 0x8 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x8 30. "PIA3,Packed Incremental data Area (Receive Queue 3+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x8 28.--29. "UFCC3_1_0,Unread Frame Counter Configuration (Receive Queue 3+iand#65396;4)" "0,1,2,3"
bitfld.long 0x8 26.--27. "TSEL3,Truncation SELection (Receive Queue 3+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x8 24.--25. "RSM3_1_0,Receive Synchronous Mode (Receive Queue 3+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x8 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x8 22. "PIA2,Packed Incremental data Area (Receive Queue 2+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x8 20.--21. "UFCC2_1_0,Unread Frame Counter Configuration (Receive Queue 2+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x8 18.--19. "TSEL2,Truncation SELection (Receive Queue 2+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x8 16.--17. "RSM2_1_0,Receive Synchronous Mode (Receive Queue 2+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
newline
bitfld.long 0x8 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x8 14. "PIA1,Packed Incremental data Area (Receive Queue 1+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x8 12.--13. "UFCC1_1_0,Unread Frame Counter Configuration (Receive Queue 1+iand#65396;4)" "0,1,2,3"
bitfld.long 0x8 10.--11. "TSEL1,Truncation SELection (Receive Queue 1+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x8 8.--9. "RSM1_1_0,Receive Synchronous Mode (Receive Queue 1+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x8 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x8 6. "PIA0,Packed Incremental data Area (Receive Queue 0+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x8 4.--5. "UFCC0_1_0,Unread Frame Counter Configuration (Receive Queue 0+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x8 2.--3. "TSEL0,Truncation SELection (Receive Queue 0+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x8 0.--1. "RSM0_1_0,Receive Synchronous Mode (Receive Queue 0+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
line.long 0xC "RQC1_2,The RQC0 register is used to set up reception queues 0 to 3."
bitfld.long 0xC 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0xC 30. "PIA3,Packed Incremental data Area (Receive Queue 3+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0xC 28.--29. "UFCC3_1_0,Unread Frame Counter Configuration (Receive Queue 3+iand#65396;4)" "0,1,2,3"
bitfld.long 0xC 26.--27. "TSEL3,Truncation SELection (Receive Queue 3+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0xC 24.--25. "RSM3_1_0,Receive Synchronous Mode (Receive Queue 3+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0xC 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0xC 22. "PIA2,Packed Incremental data Area (Receive Queue 2+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0xC 20.--21. "UFCC2_1_0,Unread Frame Counter Configuration (Receive Queue 2+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0xC 18.--19. "TSEL2,Truncation SELection (Receive Queue 2+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0xC 16.--17. "RSM2_1_0,Receive Synchronous Mode (Receive Queue 2+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
newline
bitfld.long 0xC 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0xC 14. "PIA1,Packed Incremental data Area (Receive Queue 1+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0xC 12.--13. "UFCC1_1_0,Unread Frame Counter Configuration (Receive Queue 1+iand#65396;4)" "0,1,2,3"
bitfld.long 0xC 10.--11. "TSEL1,Truncation SELection (Receive Queue 1+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0xC 8.--9. "RSM1_1_0,Receive Synchronous Mode (Receive Queue 1+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0xC 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0xC 6. "PIA0,Packed Incremental data Area (Receive Queue 0+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0xC 4.--5. "UFCC0_1_0,Unread Frame Counter Configuration (Receive Queue 0+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0xC 2.--3. "TSEL0,Truncation SELection (Receive Queue 0+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0xC 0.--1. "RSM0_1_0,Receive Synchronous Mode (Receive Queue 0+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
line.long 0x10 "RQC2_2,The RQC0 register is used to set up reception queues 0 to 3."
bitfld.long 0x10 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x10 30. "PIA3,Packed Incremental data Area (Receive Queue 3+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x10 28.--29. "UFCC3_1_0,Unread Frame Counter Configuration (Receive Queue 3+iand#65396;4)" "0,1,2,3"
bitfld.long 0x10 26.--27. "TSEL3,Truncation SELection (Receive Queue 3+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x10 24.--25. "RSM3_1_0,Receive Synchronous Mode (Receive Queue 3+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x10 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x10 22. "PIA2,Packed Incremental data Area (Receive Queue 2+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x10 20.--21. "UFCC2_1_0,Unread Frame Counter Configuration (Receive Queue 2+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x10 18.--19. "TSEL2,Truncation SELection (Receive Queue 2+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x10 16.--17. "RSM2_1_0,Receive Synchronous Mode (Receive Queue 2+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
newline
bitfld.long 0x10 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x10 14. "PIA1,Packed Incremental data Area (Receive Queue 1+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x10 12.--13. "UFCC1_1_0,Unread Frame Counter Configuration (Receive Queue 1+iand#65396;4)" "0,1,2,3"
bitfld.long 0x10 10.--11. "TSEL1,Truncation SELection (Receive Queue 1+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x10 8.--9. "RSM1_1_0,Receive Synchronous Mode (Receive Queue 1+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x10 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x10 6. "PIA0,Packed Incremental data Area (Receive Queue 0+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x10 4.--5. "UFCC0_1_0,Unread Frame Counter Configuration (Receive Queue 0+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x10 2.--3. "TSEL0,Truncation SELection (Receive Queue 0+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x10 0.--1. "RSM0_1_0,Receive Synchronous Mode (Receive Queue 0+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
line.long 0x14 "RQC3_2,The RQC0 register is used to set up reception queues 0 to 3."
bitfld.long 0x14 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x14 30. "PIA3,Packed Incremental data Area (Receive Queue 3+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x14 28.--29. "UFCC3_1_0,Unread Frame Counter Configuration (Receive Queue 3+iand#65396;4)" "0,1,2,3"
bitfld.long 0x14 26.--27. "TSEL3,Truncation SELection (Receive Queue 3+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x14 24.--25. "RSM3_1_0,Receive Synchronous Mode (Receive Queue 3+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x14 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x14 22. "PIA2,Packed Incremental data Area (Receive Queue 2+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x14 20.--21. "UFCC2_1_0,Unread Frame Counter Configuration (Receive Queue 2+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x14 18.--19. "TSEL2,Truncation SELection (Receive Queue 2+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x14 16.--17. "RSM2_1_0,Receive Synchronous Mode (Receive Queue 2+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
newline
bitfld.long 0x14 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x14 14. "PIA1,Packed Incremental data Area (Receive Queue 1+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x14 12.--13. "UFCC1_1_0,Unread Frame Counter Configuration (Receive Queue 1+iand#65396;4)" "0,1,2,3"
bitfld.long 0x14 10.--11. "TSEL1,Truncation SELection (Receive Queue 1+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x14 8.--9. "RSM1_1_0,Receive Synchronous Mode (Receive Queue 1+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x14 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x14 6. "PIA0,Packed Incremental data Area (Receive Queue 0+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x14 4.--5. "UFCC0_1_0,Unread Frame Counter Configuration (Receive Queue 0+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x14 2.--3. "TSEL0,Truncation SELection (Receive Queue 0+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x14 0.--1. "RSM0_1_0,Receive Synchronous Mode (Receive Queue 0+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
line.long 0x18 "RQC4_2,The RQC0 register is used to set up reception queues 0 to 3."
bitfld.long 0x18 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x18 30. "PIA3,Packed Incremental data Area (Receive Queue 3+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x18 28.--29. "UFCC3_1_0,Unread Frame Counter Configuration (Receive Queue 3+iand#65396;4)" "0,1,2,3"
bitfld.long 0x18 26.--27. "TSEL3,Truncation SELection (Receive Queue 3+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x18 24.--25. "RSM3_1_0,Receive Synchronous Mode (Receive Queue 3+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x18 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x18 22. "PIA2,Packed Incremental data Area (Receive Queue 2+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x18 20.--21. "UFCC2_1_0,Unread Frame Counter Configuration (Receive Queue 2+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x18 18.--19. "TSEL2,Truncation SELection (Receive Queue 2+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x18 16.--17. "RSM2_1_0,Receive Synchronous Mode (Receive Queue 2+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
newline
bitfld.long 0x18 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x18 14. "PIA1,Packed Incremental data Area (Receive Queue 1+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
newline
bitfld.long 0x18 12.--13. "UFCC1_1_0,Unread Frame Counter Configuration (Receive Queue 1+iand#65396;4)" "0,1,2,3"
bitfld.long 0x18 10.--11. "TSEL1,Truncation SELection (Receive Queue 1+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
newline
bitfld.long 0x18 8.--9. "RSM1_1_0,Receive Synchronous Mode (Receive Queue 1+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
bitfld.long 0x18 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x18 6. "PIA0,Packed Incremental data Area (Receive Queue 0+iand#65396;4)" "0: Frame data starts always 32 bit aligned,1: No gaps between frame data in incremental data.."
bitfld.long 0x18 4.--5. "UFCC0_1_0,Unread Frame Counter Configuration (Receive Queue 0+iand#65396;4)" "0,1,2,3"
newline
bitfld.long 0x18 2.--3. "TSEL0,Truncation SELection (Receive Queue 0+iand#65396;4)" "0: Maximum frame length defined by RTC0,1: Maximum frame length defined by RTC0,?,?"
bitfld.long 0x18 0.--1. "RSM0_1_0,Receive Synchronous Mode (Receive Queue 0+iand#65396;4)" "0: Mode with write-back,1: Keep DT mode,?,?"
group.long 0xB0++0x7
line.long 0x0 "RPC2,The RPC register is used to set padding for received frames."
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 16.--23. 1. "DCNT_7_0,Stored Data Counter"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
bitfld.long 0x0 8.--10. "PCNT_2_0,Stored Padding Counter" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
line.long 0x4 "RTC2,The RTC register is used to set Maximum Number of bytes stored per received frame."
hexmask.long.byte 0x4 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x4 16.--27. 1. "MFL1_11_0,Maximum Frame Length 1"
newline
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.word 0x4 0.--11. 1. "MFL0_11_0,Maximum Frame Length 0"
group.long 0xBC++0x7
line.long 0x0 "UFCW2,The UFCW register sets the warning levels for the number of unread frames."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 24.--29. 1. "WL3_5_0,Warning Level 3"
newline
bitfld.long 0x0 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 16.--21. 1. "WL2_5_0,Warning Level 2"
newline
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 8.--13. 1. "WL1_5_0,Warning Level 1"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 0.--5. 1. "WL0_5_0,Warning Level 0"
line.long 0x4 "UFCS2,The UFCS register sets the stop levels for unread frames."
bitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 24.--29. 1. "SL3_5_0,Stop Level 3"
newline
bitfld.long 0x4 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 16.--21. 1. "SL2_5_0,Stop Level 2"
newline
bitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 8.--13. 1. "SL1_5_0,Stop Level 1"
newline
bitfld.long 0x4 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 0.--5. 1. "SL0_5_0,Stop Level 0"
rgroup.long 0xC4++0x13
line.long 0x0 "UFCV0_2,The UFCV0 register indicates the number of unread frames in reception queues 0 to 3."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 24.--29. 1. "CV3_5_0,Unread Frame Count 3+4and#65396;i"
newline
bitfld.long 0x0 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 16.--21. 1. "CV2_5_0,Unread Frame Count 2+4and#65396;i"
newline
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 8.--13. 1. "CV1_5_0,Unread Frame Count 1+4and#65396;i"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 0.--5. 1. "CV0_5_0,Unread Frame Count 0+4and#65396;i"
line.long 0x4 "UFCV1_2,The UFCV0 register indicates the number of unread frames in reception queues 0 to 3."
bitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 24.--29. 1. "CV3_5_0,Unread Frame Count 3+4and#65396;i"
newline
bitfld.long 0x4 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 16.--21. 1. "CV2_5_0,Unread Frame Count 2+4and#65396;i"
newline
bitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 8.--13. 1. "CV1_5_0,Unread Frame Count 1+4and#65396;i"
newline
bitfld.long 0x4 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 0.--5. 1. "CV0_5_0,Unread Frame Count 0+4and#65396;i"
line.long 0x8 "UFCV2_2,The UFCV0 register indicates the number of unread frames in reception queues 0 to 3."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "CV3_5_0,Unread Frame Count 3+4and#65396;i"
newline
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "CV2_5_0,Unread Frame Count 2+4and#65396;i"
newline
bitfld.long 0x8 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 8.--13. 1. "CV1_5_0,Unread Frame Count 1+4and#65396;i"
newline
bitfld.long 0x8 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 0.--5. 1. "CV0_5_0,Unread Frame Count 0+4and#65396;i"
line.long 0xC "UFCV3_2,The UFCV0 register indicates the number of unread frames in reception queues 0 to 3."
bitfld.long 0xC 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 24.--29. 1. "CV3_5_0,Unread Frame Count 3+4and#65396;i"
newline
bitfld.long 0xC 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 16.--21. 1. "CV2_5_0,Unread Frame Count 2+4and#65396;i"
newline
bitfld.long 0xC 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 8.--13. 1. "CV1_5_0,Unread Frame Count 1+4and#65396;i"
newline
bitfld.long 0xC 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 0.--5. 1. "CV0_5_0,Unread Frame Count 0+4and#65396;i"
line.long 0x10 "UFCV4_2,The UFCV0 register indicates the number of unread frames in reception queues 0 to 3."
bitfld.long 0x10 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 24.--29. 1. "CV3_5_0,Unread Frame Count 3+4and#65396;i"
newline
bitfld.long 0x10 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 16.--21. 1. "CV2_5_0,Unread Frame Count 2+4and#65396;i"
newline
bitfld.long 0x10 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 8.--13. 1. "CV1_5_0,Unread Frame Count 1+4and#65396;i"
newline
bitfld.long 0x10 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 0.--5. 1. "CV0_5_0,Unread Frame Count 0+4and#65396;i"
group.long 0xE0++0x13
line.long 0x0 "UFCD0_2,The UFCD0 register is used to decrement unread counters in reception queues 0 to 3."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 24.--29. 1. "DV3_5_0,Unread Frame Decrement Value 3+4and#65396;i"
newline
bitfld.long 0x0 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 16.--21. 1. "DV2_5_0,Unread Frame Decrement Value 2+4and#65396;i"
newline
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 8.--13. 1. "DV1_5_0,Unread Frame Decrement Value 1+4and#65396;i"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 0.--5. 1. "DV0_5_0,Unread Frame Decrement Value 0+4and#65396;i"
line.long 0x4 "UFCD1_2,The UFCD0 register is used to decrement unread counters in reception queues 0 to 3."
bitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 24.--29. 1. "DV3_5_0,Unread Frame Decrement Value 3+4and#65396;i"
newline
bitfld.long 0x4 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 16.--21. 1. "DV2_5_0,Unread Frame Decrement Value 2+4and#65396;i"
newline
bitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 8.--13. 1. "DV1_5_0,Unread Frame Decrement Value 1+4and#65396;i"
newline
bitfld.long 0x4 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 0.--5. 1. "DV0_5_0,Unread Frame Decrement Value 0+4and#65396;i"
line.long 0x8 "UFCD2_2,The UFCD0 register is used to decrement unread counters in reception queues 0 to 3."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "DV3_5_0,Unread Frame Decrement Value 3+4and#65396;i"
newline
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "DV2_5_0,Unread Frame Decrement Value 2+4and#65396;i"
newline
bitfld.long 0x8 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 8.--13. 1. "DV1_5_0,Unread Frame Decrement Value 1+4and#65396;i"
newline
bitfld.long 0x8 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 0.--5. 1. "DV0_5_0,Unread Frame Decrement Value 0+4and#65396;i"
line.long 0xC "UFCD3_2,The UFCD0 register is used to decrement unread counters in reception queues 0 to 3."
bitfld.long 0xC 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 24.--29. 1. "DV3_5_0,Unread Frame Decrement Value 3+4and#65396;i"
newline
bitfld.long 0xC 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 16.--21. 1. "DV2_5_0,Unread Frame Decrement Value 2+4and#65396;i"
newline
bitfld.long 0xC 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 8.--13. 1. "DV1_5_0,Unread Frame Decrement Value 1+4and#65396;i"
newline
bitfld.long 0xC 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 0.--5. 1. "DV0_5_0,Unread Frame Decrement Value 0+4and#65396;i"
line.long 0x10 "UFCD4_2,The UFCD0 register is used to decrement unread counters in reception queues 0 to 3."
bitfld.long 0x10 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 24.--29. 1. "DV3_5_0,Unread Frame Decrement Value 3+4and#65396;i"
newline
bitfld.long 0x10 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 16.--21. 1. "DV2_5_0,Unread Frame Decrement Value 2+4and#65396;i"
newline
bitfld.long 0x10 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 8.--13. 1. "DV1_5_0,Unread Frame Decrement Value 1+4and#65396;i"
newline
bitfld.long 0x10 6.--7. "Reserved_6,Reserved" "0,1,2,3"
hexmask.long.byte 0x10 0.--5. 1. "DV0_5_0,Unread Frame Decrement Value 0+4and#65396;i"
group.long 0xFC++0x83
line.long 0x0 "SFO2,The SFO register sets an offset into frames for use by the separation filter."
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x0 0.--5. 1. "FBP_5_0,First Byte Position"
line.long 0x4 "SFP0_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x4 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x8 "SFP1_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x8 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0xC "SFP2_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0xC 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x10 "SFP3_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x10 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x14 "SFP4_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x14 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x18 "SFP5_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x18 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x1C "SFP6_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x1C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x20 "SFP7_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x20 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x24 "SFP8_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x24 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x28 "SFP9_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x28 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x2C "SFP10_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x2C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x30 "SFP11_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x30 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x34 "SFP12_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x34 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x38 "SFP13_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x38 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x3C "SFP14_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x3C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x40 "SFP15_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x40 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x44 "SFP16_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x44 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x48 "SFP17_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x48 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x4C "SFP18_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x4C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x50 "SFP19_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x50 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x54 "SFP20_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x54 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x58 "SFP21_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x58 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x5C "SFP22_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x5C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x60 "SFP23_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x60 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x64 "SFP24_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x64 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x68 "SFP25_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x68 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x6C "SFP26_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x6C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x70 "SFP27_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x70 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x74 "SFP28_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x74 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x78 "SFP29_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x78 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x7C "SFP30_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x7C 0.--31. 1. "FP_31_0,Separation Filter Pattern"
line.long 0x80 "SFP31_2,A pair of SFPi registers set the pattern for the separation filters to be used by the corresponding reception queues 2 to 17 (for streams 0 to 15)."
hexmask.long 0x80 0.--31. 1. "FP_31_0,Separation Filter Pattern"
group.long 0x1B8++0x17
line.long 0x0 "SFV0_2,These bits define the 64 bit value to be loaded for separation filtering."
hexmask.long 0x0 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x4 "SFV1_2,These bits define the 64 bit value to be loaded for separation filtering."
hexmask.long 0x4 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x8 "SFM0_2,A pair of SFMi registers sets the mask value for the separation filter used by the corresponding reception queue 2 to 17 (stream 0 to 15)."
hexmask.long 0x8 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0xC "SFM1_2,A pair of SFMi registers sets the mask value for the separation filter used by the corresponding reception queue 2 to 17 (stream 0 to 15)."
hexmask.long 0xC 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x10 "SFL2,The SFL register is used to separation filter load."
hexmask.long 0x10 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x10 0.--4. 1. "LC_4_0,Load Command"
line.long 0x14 "PCRC2,The PCRC register is used to set the number of the first data byte in received frame to check a potential payload CRC."
hexmask.long.tbyte 0x14 10.--31. 1. "Reserved_10,Reserved"
hexmask.long.word 0x14 0.--9. 1. "CAS_9_0,-"
rgroup.long 0x200++0x47
line.long 0x0 "CIAR0_2,The CIARr register is used to check queue address."
hexmask.long 0x0 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x4 "CIAR1_2,The CIARr register is used to check queue address."
hexmask.long 0x4 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x8 "CIAR2_2,The CIARr register is used to check queue address."
hexmask.long 0x8 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0xC "CIAR3_2,The CIARr register is used to check queue address."
hexmask.long 0xC 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x10 "CIAR4_2,The CIARr register is used to check queue address."
hexmask.long 0x10 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x14 "CIAR5_2,The CIARr register is used to check queue address."
hexmask.long 0x14 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x18 "CIAR6_2,The CIARr register is used to check queue address."
hexmask.long 0x18 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x1C "CIAR7_2,The CIARr register is used to check queue address."
hexmask.long 0x1C 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x20 "CIAR8_2,The CIARr register is used to check queue address."
hexmask.long 0x20 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x24 "CIAR9_2,The CIARr register is used to check queue address."
hexmask.long 0x24 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x28 "CIAR10_2,The CIARr register is used to check queue address."
hexmask.long 0x28 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x2C "CIAR11_2,The CIARr register is used to check queue address."
hexmask.long 0x2C 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x30 "CIAR12_2,The CIARr register is used to check queue address."
hexmask.long 0x30 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x34 "CIAR13_2,The CIARr register is used to check queue address."
hexmask.long 0x34 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x38 "CIAR14_2,The CIARr register is used to check queue address."
hexmask.long 0x38 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x3C "CIAR15_2,The CIARr register is used to check queue address."
hexmask.long 0x3C 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x40 "CIAR16_2,The CIARr register is used to check queue address."
hexmask.long 0x40 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
line.long 0x44 "CIAR17_2,The CIARr register is used to check queue address."
hexmask.long 0x44 0.--31. 1. "CIA_31_0,Current incremental address used by receive queue"
rgroup.long 0x280++0x47
line.long 0x0 "LIAR0_2,The LIARr register is used to check queue address."
hexmask.long 0x0 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x4 "LIAR1_2,The LIARr register is used to check queue address."
hexmask.long 0x4 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x8 "LIAR2_2,The LIARr register is used to check queue address."
hexmask.long 0x8 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0xC "LIAR3_2,The LIARr register is used to check queue address."
hexmask.long 0xC 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x10 "LIAR4_2,The LIARr register is used to check queue address."
hexmask.long 0x10 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x14 "LIAR5_2,The LIARr register is used to check queue address."
hexmask.long 0x14 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x18 "LIAR6_2,The LIARr register is used to check queue address."
hexmask.long 0x18 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x1C "LIAR7_2,The LIARr register is used to check queue address."
hexmask.long 0x1C 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x20 "LIAR8_2,The LIARr register is used to check queue address."
hexmask.long 0x20 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x24 "LIAR9_2,The LIARr register is used to check queue address."
hexmask.long 0x24 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x28 "LIAR10_2,The LIARr register is used to check queue address."
hexmask.long 0x28 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x2C "LIAR11_2,The LIARr register is used to check queue address."
hexmask.long 0x2C 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x30 "LIAR12_2,The LIARr register is used to check queue address."
hexmask.long 0x30 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x34 "LIAR13_2,The LIARr register is used to check queue address."
hexmask.long 0x34 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x38 "LIAR14_2,The LIARr register is used to check queue address."
hexmask.long 0x38 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x3C "LIAR15_2,The LIARr register is used to check queue address."
hexmask.long 0x3C 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x40 "LIAR16_2,The LIARr register is used to check queue address."
hexmask.long 0x40 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
line.long 0x44 "LIAR17_2,The LIARr register is used to check queue address."
hexmask.long 0x44 0.--31. 1. "LIA_31_0,Last incremental address used by receive queue"
group.long 0x300++0x7
line.long 0x0 "TGC2,The TGC register is used to make settings related to transmission for the AVB-DMAC."
hexmask.long.word 0x0 22.--31. 1. "Reserved_22,Reserved"
bitfld.long 0x0 20.--21. "TBD3_1_0,Transmit FIFO Size (Stream Class A)" "0,1,2,3"
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bitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x0 16.--17. "TBD2_1_0,Transmit FIFO Size (Stream Class B)" "0,1,2,3"
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bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 12.--13. "TBD1_1_0,Transmit FIFO Size (Network Control)" "0,1,2,3"
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bitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
bitfld.long 0x0 8.--9. "TBD0_1_0,Transmit FIFO Size (Best Effort)" "0,1,2,3"
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bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
bitfld.long 0x0 5. "TQP,Transmission Queues Priority" "0: Default priority: Q3,1: Alternate priority: Q1"
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bitfld.long 0x0 4. "ECBS,Enable Credit Based Shaping" "0: CBS globally disabled,1: CBS enabled based on queue specific configuration"
bitfld.long 0x0 3. "TSM3,Transmit Synchronous Mode (Stream Class A)" "0: With write-back,1: Setting prohibited"
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bitfld.long 0x0 2. "TSM2,Transmit Synchronous Mode (Stream Class B)" "0: With write-back,1: Setting prohibited"
bitfld.long 0x0 1. "TSM1,Transmit Synchronous Mode (Network Control)" "0: With write-back,1: Setting prohibited"
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bitfld.long 0x0 0. "TSM0,Transmit Synchronous Mode (Best Effort)" "0: With write-back,1: Setting prohibited"
line.long 0x4 "TCCR2,The TCCR register controls transmission by the AVB-DMAC and is used to make related settings."
hexmask.long.word 0x4 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x4 17. "MFR,E-MAC status FIFO Release" "0: No request to E-MAC status FIFO,1: Release oldest entry of E-MAC status FIFO"
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bitfld.long 0x4 16. "MFEN,E-MAC status FIFO ENable" "0: Disabled,1: Enabled"
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
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bitfld.long 0x4 9. "TFR,Time Stamp FIFO Release" "0: (Not operating,1: Releases the oldest entry in the time-stamp FIFO"
bitfld.long 0x4 8. "TFEN,Time Stamp FIFO Enable" "0: Recording of transmission time stamps in the..,1: Recording of transmission time stamps in the.."
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hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
bitfld.long 0x4 3. "TSRQ3,Transmit Start Request (Queue 3 (Stream Class A))" "0: Transmission queue is empty or stopped,1: When written: A transmission start request is.."
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bitfld.long 0x4 2. "TSRQ2,Transmit Start Request (Queue 2 (Stream Class B))" "0: Transmission queue is empty or stopped,1: When written: A transmission start request is.."
bitfld.long 0x4 1. "TSRQ1,Transmit Start Request (Queue 1 (Network Control))" "0: Transmission queue is empty or stopped,1: When written: A transmission start request is.."
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bitfld.long 0x4 0. "TSRQ0,Transmit Start Request (Queue 0 (Best Effort))" "0: Transmission queue is empty or stopped,1: When written: A transmission start request is.."
rgroup.long 0x308++0x3
line.long 0x0 "TSR2,The TSR register indicates the state of transmission by the AVB-DMAC."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x0 16.--20. 1. "MFFL_4_0,Number of entries stored in the E-MAC status FIFO"
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hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
bitfld.long 0x0 8.--10. "TFFL_2_0,Time Stamp FIFO Count" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved"
bitfld.long 0x0 2.--3. "CCS1_1_0,CBS Counter Status 1 (Class A)" "0: The current credit value is within the limit,1: The current credit value is less than or equal..,?,?"
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bitfld.long 0x0 0.--1. "CCS0_1_0,CBS Counter Status 0 (Class B)" "0: The current credit value is within the limit,1: The current credit value is less than or equal..,?,?"
group.long 0x30C++0x3
line.long 0x0 "MFA2,The MFA register indicates the state of MAC."
hexmask.long.byte 0x0 26.--31. 1. "Reserved_26,Reserved"
hexmask.long.word 0x0 16.--25. 1. "MST_9_0,Tag number from descriptor identifying the frame E-MAC status relation"
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hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "MSV_3_0,E-MAC Status Value"
rgroup.long 0x310++0xF
line.long 0x0 "TFA02,TFA0 indicates the nano seconds portion of the timestamp value."
hexmask.long 0x0 0.--31. 1. "TSV_31_0,Time Stamp Value"
line.long 0x4 "TFA12,The TFA1 register indicates the lower seconds portion of the timestamp value."
hexmask.long 0x4 0.--31. 1. "TSV_63_32,Time Stamp Value"
line.long 0x8 "TFA22,The TFA2 register indicates the timestamp tag and the higher seconds portion of the timestamp value."
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved"
hexmask.long.word 0x8 16.--25. 1. "TST_9_0,Time Stamp Tag"
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hexmask.long.word 0x8 0.--15. 1. "TSV_79_64,Time Stamp Value"
line.long 0xC "VRR2,"
hexmask.long 0xC 0.--31. 1. "VC_31_0,Version Code"
group.long 0x320++0x1F
line.long 0x0 "CIVR0_2,The CIVR0 register sets the increment in the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x0 0.--31. 1. "CIV_31_0,CBS Increment Value"
line.long 0x4 "CIVR1_2,The CIVR0 register sets the increment in the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x4 0.--31. 1. "CIV_31_0,CBS Increment Value"
line.long 0x8 "CDVR0_2,The CDVR0 register sets the decrement in the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x8 0.--31. 1. "CDV_31_0,CBS Decrement Value"
line.long 0xC "CDVR1_2,The CDVR0 register sets the decrement in the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0xC 0.--31. 1. "CDV_31_0,CBS Decrement Value"
line.long 0x10 "CUL0_2,The CUL0 register sets the upper limit for credit values calculated by using the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x10 0.--31. 1. "ULV_31_0,CBS Upper Limit"
line.long 0x14 "CUL1_2,The CUL0 register sets the upper limit for credit values calculated by using the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x14 0.--31. 1. "ULV_31_0,CBS Upper Limit"
line.long 0x18 "CLL0_2,The CUL0 register sets the lower limit for credit values calculated by using the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x18 0.--31. 1. "LLV_31_0,CBS Lower Limit"
line.long 0x1C "CLL1_2,The CUL0 register sets the lower limit for credit values calculated by using the CBS algorithm for transmission queue 2 (for stream class B)."
hexmask.long 0x1C 0.--31. 1. "LLV_31_0,CBS Lower Limit"
group.long 0x350++0x2F
line.long 0x0 "DIC2,The DIC register is used to control descriptor interrupts 1 to 15."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "DPE15,Descriptor Interrupt Enable 15" "0: Disabled,1: Enabled"
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bitfld.long 0x0 14. "DPE14,Descriptor Interrupt Enable 14" "0: Disabled,1: Enabled"
bitfld.long 0x0 13. "DPE13,Descriptor Interrupt Enable 13" "0: Disabled,1: Enabled"
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bitfld.long 0x0 12. "DPE12,Descriptor Interrupt Enable 12" "0: Disabled,1: Enabled"
bitfld.long 0x0 11. "DPE11,Descriptor Interrupt Enable 11" "0: Disabled,1: Enabled"
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bitfld.long 0x0 10. "DPE10,Descriptor Interrupt Enable 10" "0: Disabled,1: Enabled"
bitfld.long 0x0 9. "DPE9,Descriptor Interrupt Enable 9" "0: Disabled,1: Enabled"
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bitfld.long 0x0 8. "DPE8,Descriptor Interrupt Enable 8" "0: Disabled,1: Enabled"
bitfld.long 0x0 7. "DPE7,Descriptor Interrupt Enable 7" "0: Disabled,1: Enabled"
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bitfld.long 0x0 6. "DPE6,Descriptor Interrupt Enable 6" "0: Disabled,1: Enabled"
bitfld.long 0x0 5. "DPE5,Descriptor Interrupt Enable 5" "0: Disabled,1: Enabled"
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bitfld.long 0x0 4. "DPE4,Descriptor Interrupt Enable 4" "0: Disabled,1: Enabled"
bitfld.long 0x0 3. "DPE3,Descriptor Interrupt Enable 3" "0: Disabled,1: Enabled"
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bitfld.long 0x0 2. "DPE2,Descriptor Interrupt Enable 2" "0: Disabled,1: Enabled"
bitfld.long 0x0 1. "DPE1,Descriptor Interrupt Enable 1" "0: Disabled,1: Enabled"
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bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "DIS2,The DIS register indicates the state of descriptor interrupts."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4 15. "DPF15,Descriptor Interrupt Status15" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x4 14. "DPF14,Descriptor Interrupt Status14" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 13. "DPF13,Descriptor Interrupt Status13" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x4 12. "DPF12,Descriptor Interrupt Status12" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 11. "DPF11,Descriptor Interrupt Status11" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x4 10. "DPF10,Descriptor Interrupt Status10" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 9. "DPF9,Descriptor Interrupt Status9" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x4 8. "DPF8,Descriptor Interrupt Status8" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 7. "DPF7,Descriptor Interrupt Status7" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x4 6. "DPF6,Descriptor Interrupt Status6" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 5. "DPF5,Descriptor Interrupt Status5" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x4 4. "DPF4,Descriptor Interrupt Status4" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 3. "DPF3,Descriptor Interrupt Status3" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x4 2. "DPF2,Descriptor Interrupt Status2" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x4 1. "DPF1,Descriptor Interrupt Status1" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "EIC2,The EIC register controls the AVB-DMAC-related error interrupts."
hexmask.long.tbyte 0x8 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x8 10. "TBFE,Tx-Buffer Full interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x8 9. "MFFE,MAC status FIFO Full interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x8 8. "TFFE,Time Stamp FIFO Full-Error Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x8 7. "CULE1,CBS Upper Limit Error Interrupt Enable (Class A)" "0: Disabled,1: Enabled"
bitfld.long 0x8 6. "CULE0,CBS Upper Limit Error Interrupt Enable (Class B)" "0: Disabled,1: Enabled"
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bitfld.long 0x8 5. "CLLE1,CBS Lower Limit Error Interrupt Enable (Class A)" "0: Disabled,1: Enabled"
bitfld.long 0x8 4. "CLLE0,CBS Lower Limit Error Interrupt Enable (Class B)" "0: Disabled,1: Enabled"
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bitfld.long 0x8 3. "SEE,Separation Error Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x8 2. "QEE,Queue Error Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x8 1. "MTEE,E-MAC Transmission Error Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x8 0. "MREE,E-MAC Reception Error Interrupt Enable" "0: Disabled,1: Enabled"
line.long 0xC "EIS2,The EIS register indicates the states of AVB-DMAC-related error interrupts."
hexmask.long.word 0xC 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0xC 16. "QFS,Queue Full Error Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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hexmask.long.byte 0xC 11.--15. 1. "Reserved_11,Reserved"
bitfld.long 0xC 10. "TBFF,Tx-Buffer Full Flag" "0: No interrupt pending,1: Tx-Buffer full condition detected"
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bitfld.long 0xC 9. "MFFF,E-MAC status FIFO Full Flag" "0: No interrupt pending,1: E-MAC status FIFO full"
bitfld.long 0xC 8. "TFFF,Time Stamp FIFO Full Error Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0xC 7. "CULF1,CBS Upper Limit Error Interrupt Status (Class A)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0xC 6. "CULF0,CBS Upper Limit Error Interrupt Status (Class B)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0xC 5. "CLLF1,CBS Lower Limit Error Interrupt Status (Class A)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0xC 4. "CLLF0,CBS Lower Limit Error Interrupt Status (Class B)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0xC 3. "SEF,Separation Error Flag" "0: No interrupt pending,1: AVB stream data frame has discarded"
bitfld.long 0xC 2. "QEF,Queue Error Flag" "0: No interrupt pending,1: Interrupt pending"
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bitfld.long 0xC 1. "MTEF,E-MAC Transmission Error Flag" "0: No interrupt pending,1: E-MAC has reported an error during transmission"
bitfld.long 0xC 0. "MREF,E-MAC Reception Error Flag" "0: No interrupt pending,1: E-MAC has reported an error during reception"
line.long 0x10 "RIC02,The RIC0 register controls the AVB-DMAC receive interrupts."
hexmask.long.word 0x10 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x10 17. "FRE17,Receive Frame Enable 17 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 16. "FRE16,Receive Frame Enable 16 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 15. "FRE15,Receive Frame Enable 15 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 14. "FRE14,Receive Frame Enable 14 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 13. "FRE13,Receive Frame Enable 13 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 12. "FRE12,Receive Frame Enable 12 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 11. "FRE11,Receive Frame Enable 11 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 10. "FRE10,Receive Frame Enable 10 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 9. "FRE9,Receive Frame Enable 9 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 8. "FRE8,Receive Frame Enable 8 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 7. "FRE7,Receive Frame Enable 7 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 6. "FRE6,Receive Frame Enable 6 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 5. "FRE5,Receive Frame Enable 5 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 4. "FRE4,Receive Frame Enable 4 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 3. "FRE3,Receive Frame Enable 3 (Stream)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 2. "FRE2,Receive Frame Enable 2 (Stream)" "0: Disabled,1: Enabled"
bitfld.long 0x10 1. "FRE1,Receive Frame Enable 1 (Network Control)" "0: Disabled,1: Enabled"
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bitfld.long 0x10 0. "FRE0,Receive Frame Enable 0 (Best Effort)" "0: Disabled,1: Enabled"
line.long 0x14 "RIS02,The RIS0 register indicates the states of the AVB-DMAC receive interrupts."
hexmask.long.word 0x14 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x14 17. "FRF17,Receive Frame Interrupt Status 17 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 16. "FRF16,Receive Frame Interrupt Status 16 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 15. "FRF15,Receive Frame Interrupt Status 15 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 14. "FRF14,Receive Frame Interrupt Status 14 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 13. "FRF13,Receive Frame Interrupt Status 13 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 12. "FRF12,Receive Frame Interrupt Status 12 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 11. "FRF11,Receive Frame Interrupt Status 11 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x14 10. "FRF10,Receive Frame Interrupt Status 10 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 9. "FRF9,Receive Frame Interrupt Status 9 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 8. "FRF8,Receive Frame Interrupt Status 8 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 7. "FRF7,Receive Frame Interrupt Status 7 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 6. "FRF6,Receive Frame Interrupt Status 6 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 5. "FRF5,Receive Frame Interrupt Status 5 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 4. "FRF4,Receive Frame Interrupt Status 4 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 3. "FRF3,Receive Frame Interrupt Status 3 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 2. "FRF2,Receive Frame Interrupt Status 2 (Stream)" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x14 1. "FRF1,Receive Frame Interrupt Status 1 (Network Control)" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x14 0. "FRF0,Receive Frame Interrupt Status 0 (Best Effort)" "0: The interrupt is not pending,1: The interrupt is pending"
line.long 0x18 "RIC12,The RIC1 register controls the AVB-DMAC receive interrupts."
bitfld.long 0x18 31. "RFWE,Receive FIFO Warning Interrupt Enable" "0: Disabled,1: Enabled"
hexmask.long.word 0x18 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x18 17. "RWE17,Reception Warning interrupt Enable 17" "0: Disabled,1: Enabled"
bitfld.long 0x18 16. "RWE16,Reception Warning interrupt Enable 16" "0: Disabled,1: Enabled"
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bitfld.long 0x18 15. "RWE15,Reception Warning interrupt Enable 15" "0: Disabled,1: Enabled"
bitfld.long 0x18 14. "RWE14,Reception Warning interrupt Enable 14" "0: Disabled,1: Enabled"
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bitfld.long 0x18 13. "RWE13,Reception Warning interrupt Enable 13" "0: Disabled,1: Enabled"
bitfld.long 0x18 12. "RWE12,Reception Warning interrupt Enable 12" "0: Disabled,1: Enabled"
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bitfld.long 0x18 11. "RWE11,Reception Warning interrupt Enable 11" "0: Disabled,1: Enabled"
bitfld.long 0x18 10. "RWE10,Reception Warning interrupt Enable 10" "0: Disabled,1: Enabled"
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bitfld.long 0x18 9. "RWE9,Reception Warning interrupt Enable 9" "0: Disabled,1: Enabled"
bitfld.long 0x18 8. "RWE8,Reception Warning interrupt Enable 8" "0: Disabled,1: Enabled"
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bitfld.long 0x18 7. "RWE7,Reception Warning interrupt Enable 7" "0: Disabled,1: Enabled"
bitfld.long 0x18 6. "RWE6,Reception Warning interrupt Enable 6" "0: Disabled,1: Enabled"
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bitfld.long 0x18 5. "RWE5,Reception Warning interrupt Enable 5" "0: Disabled,1: Enabled"
bitfld.long 0x18 4. "RWE4,Reception Warning interrupt Enable 4" "0: Disabled,1: Enabled"
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bitfld.long 0x18 3. "RWE3,Reception Warning interrupt Enable 3" "0: Disabled,1: Enabled"
bitfld.long 0x18 2. "RWE2,Reception Warning interrupt Enable 2" "0: Disabled,1: Enabled"
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bitfld.long 0x18 1. "RWE1,Reception Warning interrupt Enable 1" "0: Disabled,1: Enabled"
bitfld.long 0x18 0. "RWE0,Reception Warning interrupt Enable 0" "0: Disabled,1: Enabled"
line.long 0x1C "RIS12,The RIS1 register indicates the states of the AVB-DMAC receive interrupts."
bitfld.long 0x1C 31. "RFWF,Receive FIFO Warning Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
hexmask.long.word 0x1C 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x1C 17. "RWF17,Reception Warning Flag 17" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 16. "RWF16,Reception Warning Flag 16" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 15. "RWF15,Reception Warning Flag 15" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 14. "RWF14,Reception Warning Flag 14" "0: No interrupt pending,1: Unread frame counter warning level reached"
newline
bitfld.long 0x1C 13. "RWF13,Reception Warning Flag 13" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 12. "RWF12,Reception Warning Flag 12" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 11. "RWF11,Reception Warning Flag 11" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 10. "RWF10,Reception Warning Flag 10" "0: No interrupt pending,1: Unread frame counter warning level reached"
newline
bitfld.long 0x1C 9. "RWF9,Reception Warning Flag 9" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 8. "RWF8,Reception Warning Flag 8" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 7. "RWF7,Reception Warning Flag 7" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 6. "RWF6,Reception Warning Flag 6" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 5. "RWF5,Reception Warning Flag 5" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 4. "RWF4,Reception Warning Flag 4" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 3. "RWF3,Reception Warning Flag 3" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 2. "RWF2,Reception Warning Flag 2" "0: No interrupt pending,1: Unread frame counter warning level reached"
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bitfld.long 0x1C 1. "RWF1,Reception Warning Flag 1" "0: No interrupt pending,1: Unread frame counter warning level reached"
bitfld.long 0x1C 0. "RWF0,Reception Warning Flag 0" "0: No interrupt pending,1: Unread frame counter warning level reached"
line.long 0x20 "RIC22,The RIC2 register controls the AVB-DMAC receive interrupts."
bitfld.long 0x20 31. "RFFE,Receive FIFO Full Interrupt Enable" "0: Disabled,1: Enabled"
hexmask.long.word 0x20 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x20 17. "QFE17,Receive Queue 17 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 16. "QFE16,Receive Queue 16 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x20 15. "QFE15,Receive Queue 15 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 14. "QFE14,Receive Queue 14 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 13. "QFE13,Receive Queue 13 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 12. "QFE12,Receive Queue 12 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 11. "QFE11,Receive Queue 11 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 10. "QFE10,Receive Queue 10 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 9. "QFE9,Receive Queue 9 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 8. "QFE8,Receive Queue 8 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 7. "QFE7,Receive Queue 7 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 6. "QFE6,Receive Queue 6 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 5. "QFE5,Receive Queue 5 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 4. "QFE4,Receive Queue 4 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 3. "QFE3,Receive Queue 3 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 2. "QFE2,Receive Queue 2 (Stream) Full Interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x20 1. "QFE1,Receive Queue 1 (Network Control) Full Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x20 0. "QFE0,Receive Queue 0 (Best Effort) Full Interrupt Enable" "0: Disabled,1: Enabled"
line.long 0x24 "RIS22,The RIS2 register indicates the states of the AVB-DMAC receive interrupts."
bitfld.long 0x24 31. "RFFF,Receive FIFO Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
hexmask.long.word 0x24 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x24 17. "QFF17,Receive Queue 17 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 16. "QFF16,Receive Queue 16 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x24 15. "QFF15,Receive Queue 15 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 14. "QFF14,Receive Queue 14 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x24 13. "QFF13,Receive Queue 13 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 12. "QFF12,Receive Queue 12 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x24 11. "QFF11,Receive Queue 11 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 10. "QFF10,Receive Queue 10 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x24 9. "QFF9,Receive Queue 9 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 8. "QFF8,Receive Queue 8 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x24 7. "QFF7,Receive Queue 7 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 6. "QFF6,Receive Queue 6 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x24 5. "QFF5,Receive Queue 5 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 4. "QFF4,Receive Queue 4 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x24 3. "QFF3,Receive Queue 3 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 2. "QFF2,Receive Queue 2 (Stream) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x24 1. "QFF1,Receive Queue 1 (Network Control) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x24 0. "QFF0,Receive Queue 0 (Best Effort) Full Interrupt Status" "0: The interrupt is not pending,1: The interrupt is pending"
line.long 0x28 "TIC2,The TIC register controls the AVB-DMAC transmit interrupts."
hexmask.long.word 0x28 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x28 19. "TDPE3,Transmit Descriptor Processed interrupt Enable 3" "0: Disabled,1: Enabled"
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bitfld.long 0x28 18. "TDPE2,Transmit Descriptor Processed interrupt Enable 2" "0: Disabled,1: Enabled"
bitfld.long 0x28 17. "TDPE1,Transmit Descriptor Processed interrupt Enable 1" "0: Disabled,1: Enabled"
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bitfld.long 0x28 16. "TDPE0,Transmit Descriptor Processed interrupt Enable 0" "0: Disabled,1: Enabled"
hexmask.long.byte 0x28 12.--15. 1. "Reserved_12,Reserved"
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bitfld.long 0x28 11. "MFWE,MAC status FIFO Warning interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x28 10. "MFUE,MAC status FIFO Updated interrupt Enable" "0: Disabled,1: Enabled"
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bitfld.long 0x28 9. "TFWE,Time Stamp FIFO Warning Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.long 0x28 8. "TFUE,Time Stamp FIFO Update Interrupt Enable" "0: Disabled,1: Enabled"
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hexmask.long.byte 0x28 4.--7. 1. "Reserved_4,Reserved"
bitfld.long 0x28 3. "FTE3,Frame Transmitted interrupt Enable 3" "0: Disabled,1: Enabled"
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bitfld.long 0x28 2. "FTE2,Frame Transmitted interrupt Enable 2" "0: Disabled,1: Enabled"
bitfld.long 0x28 1. "FTE1,Frame Transmitted interrupt Enable 1" "0: Disabled,1: Enabled"
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bitfld.long 0x28 0. "FTE0,Frame Transmitted interrupt Enable 0" "0: Disabled,1: Enabled"
line.long 0x2C "TIS2,The TIS register indicates the states of the AVB-DMAC transmit interrupts."
hexmask.long.word 0x2C 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x2C 19. "TDPF3,Transmit Descriptor Processed Flag 3" "0: No interrupt pending,1: Descriptor interrupt pending"
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bitfld.long 0x2C 18. "TDPF2,Transmit Descriptor Processed Flag 2" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x2C 17. "TDPF1,Transmit Descriptor Processed Flag 1" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x2C 16. "TDPF0,Transmit Descriptor Processed Flag 0" "0: No interrupt pending,1: Descriptor interrupt pending"
hexmask.long.byte 0x2C 12.--15. 1. "Reserved_12,Reserved"
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bitfld.long 0x2C 11. "MFWF,E-MAC status FIFO Warning Flag" "0: No interrupt pending,1: Tx Status FIFO warning level has been reached"
bitfld.long 0x2C 10. "MFUF,E-MAC status FIFO Updated Flag" "0: No interrupt pending,1: Tx Status FIFO has been updated"
newline
bitfld.long 0x2C 9. "TFWF,Time Stamp FIFO Warning Interrupt Status" "0: The interrupt is not pending,1: The time-stamp FIFO has reached the warning level"
bitfld.long 0x2C 8. "TFUF,Time Stamp FIFO Update Interrupt Status" "0: The interrupt is not pending,1: The time-stamp FIFO has been updated"
newline
hexmask.long.byte 0x2C 4.--7. 1. "Reserved_4,Reserved"
bitfld.long 0x2C 3. "FTF3,Frame Transmitted Flag 3" "0: No interrupt pending,1: Frame transmitted by E-MAC"
newline
bitfld.long 0x2C 2. "FTF2,Frame Transmitted Flag 2" "0: No interrupt pending,1: Frame transmitted by E-MAC"
bitfld.long 0x2C 1. "FTF1,Frame Transmitted Flag 1" "0: No interrupt pending,1: Frame transmitted by E-MAC"
newline
bitfld.long 0x2C 0. "FTF0,Frame Transmitted Flag 0" "0: No interrupt pending,1: Frame transmitted by E-MAC"
rgroup.long 0x380++0x3
line.long 0x0 "ISS2,The ISS register gives a summary of the states of AVB-DMAC-related interrupts."
bitfld.long 0x0 31. "DPM15,Descriptor Interrupt 15 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 30. "DPM14,Descriptor Interrupt 14 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x0 29. "DPM13,Descriptor Interrupt 13 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 28. "DPM12,Descriptor Interrupt 12 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x0 27. "DPM11,Descriptor Interrupt 11 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 26. "DPM10,Descriptor Interrupt 10 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x0 25. "DPM9,Descriptor Interrupt 9 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 24. "DPM8,Descriptor Interrupt 8 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x0 23. "DPM7,Descriptor Interrupt 7 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 22. "DPM6,Descriptor Interrupt 6 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x0 21. "DPM5,Descriptor Interrupt 5 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 20. "DPM4,Descriptor Interrupt 4 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x0 19. "DPM3,Descriptor Interrupt 3 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 18. "DPM2,Descriptor Interrupt 2 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x0 17. "DPM1,Descriptor Interrupt 1 Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 14.--16. "Reserved_14,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 13. "CGIM,gPTP Interrupt Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 12. "RFWM,Receive FIFO Warning Interrupt Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
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bitfld.long 0x0 11. "MFWM,E-MAC status FIFO Warning Mirror" "0: No interrupt pending,1: E-MAC status FIFO warning interrupt pending"
bitfld.long 0x0 10. "MFUM,E-MAC status FIFO Updated Mirror" "0: No interrupt pending,1: E-MAC status FIFO updated interrupt pending"
newline
bitfld.long 0x0 9. "TFWM,Time Stamp FIFO Warning Interrupt Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 8. "TFUM,Time Stamp FIFO Update Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x0 7. "MM,E-MAC Interrupt Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
bitfld.long 0x0 6. "EM,Error Interrupt Mirror" "0: The interrupt is not pending,1: The interrupt is pending"
newline
bitfld.long 0x0 3.--5. "Reserved_3,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 2. "FTM,Frame Transmitted Mirror" "0: No interrupt pending,1: Frame transmitted interrupt pending"
newline
bitfld.long 0x0 1. "RWM,Reception Warning Mirror" "0: No interrupt pending,1: Frame transmitted interrupt pending"
bitfld.long 0x0 0. "FRM,Frame Received Mirror" "0: No interrupt pending,1: Frame received interrupt pending"
group.long 0x384++0xB
line.long 0x0 "CIE2,The CIE register is used to control the Common Interrupt."
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "RFFL,Rx-FIFO Full interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x0 18. "RFWL,Rx-FIFO Warning interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 17. "CL0M,Common Line 0 Mode" "0: Use common interrupt line 0,1: Use queue specific interrupt line 0"
newline
bitfld.long 0x0 16. "RQFM,Reception Queue Full Mode" "0: Use for error interrupt line,1: Use for queue specific interrupt line"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "CTIE,Common Transmit Interrupt Enable" "0: Disabled,1: Enabled"
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "CRIE,Common Receive Interrupt enable" "0: Disabled,1: Enabled"
line.long 0x4 "RIC32,The RIC3 register controls the AVB-DMAC receive descriptor interrupts."
hexmask.long.word 0x4 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x4 17. "RDPE17,Receive Descriptor Processed interrupt Enable 17" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 16. "RDPE16,Receive Descriptor Processed interrupt Enable 16" "0: Disabled,1: Enabled"
bitfld.long 0x4 15. "RDPE15,Receive Descriptor Processed interrupt Enable 15" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 14. "RDPE14,Receive Descriptor Processed interrupt Enable 14" "0: Disabled,1: Enabled"
bitfld.long 0x4 13. "RDPE13,Receive Descriptor Processed interrupt Enable 13" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 12. "RDPE12,Receive Descriptor Processed interrupt Enable 12" "0: Disabled,1: Enabled"
bitfld.long 0x4 11. "RDPE11,Receive Descriptor Processed interrupt Enable 11" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 10. "RDPE10,Receive Descriptor Processed interrupt Enable 10" "0: Disabled,1: Enabled"
bitfld.long 0x4 9. "RDPE9,Receive Descriptor Processed interrupt Enable 9" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 8. "RDPE8,Receive Descriptor Processed interrupt Enable 8" "0: Disabled,1: Enabled"
bitfld.long 0x4 7. "RDPE7,Receive Descriptor Processed interrupt Enable 7" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 6. "RDPE6,Receive Descriptor Processed interrupt Enable 6" "0,1"
bitfld.long 0x4 5. "RDPE5,Receive Descriptor Processed interrupt Enable 5" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 4. "RDPE4,Receive Descriptor Processed interrupt Enable 4" "0: Disabled,1: Enabled"
bitfld.long 0x4 3. "RDPE3,Receive Descriptor Processed interrupt Enable 3" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 2. "RDPE2,Receive Descriptor Processed interrupt Enable 2" "0: Disabled,1: Enabled"
bitfld.long 0x4 1. "RDPE1,Receive Descriptor Processed interrupt Enable 1" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 0. "RDPE0,Receive Descriptor Processed interrupt Enable 0" "0: Disabled,1: Enabled"
line.long 0x8 "RIS32,The RIS3 register indicates the states of the AVB-DMAC receive descriptor interrupts."
hexmask.long.word 0x8 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x8 17. "RDPF17,Receive Descriptor Processed Flag 17" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 16. "RDPF16,Receive Descriptor Processed Flag 16" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 15. "RDPF15,Receive Descriptor Processed Flag 15" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 14. "RDPF14,Receive Descriptor Processed Flag 14" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 13. "RDPF13,Receive Descriptor Processed Flag 13" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 12. "RDPF12,Receive Descriptor Processed Flag 12" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 11. "RDPF11,Receive Descriptor Processed Flag 11" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 10. "RDPF10,Receive Descriptor Processed Flag 10" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 9. "RDPF9,Receive Descriptor Processed Flag 9" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 8. "RDPF8,Receive Descriptor Processed Flag 8" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 7. "RDPF7,Receive Descriptor Processed Flag 7" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 6. "RDPF6,Receive Descriptor Processed Flag 6" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 5. "RDPF5,Receive Descriptor Processed Flag 5" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 4. "RDPF4,Receive Descriptor Processed Flag 4" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 3. "RDPF3,Receive Descriptor Processed Flag 3" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 2. "RDPF2,Receive Descriptor Processed Flag 2" "0: No interrupt pending,1: Descriptor interrupt pending"
bitfld.long 0x8 1. "RDPF1,Receive Descriptor Processed Flag 1" "0: No interrupt pending,1: Descriptor interrupt pending"
newline
bitfld.long 0x8 0. "RDPF0,Receive Descriptor Processed Flag 0" "0: No interrupt pending,1: Descriptor interrupt pending"
group.long 0x440++0xB
line.long 0x0 "DIL2,The DIL register is used to control the Descriptor Interrupt line."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "DPL15,Descriptor Processed interrupt Line select 15" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x0 14. "DPL14,Descriptor Processed interrupt Line select 14" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 13. "DPL13,Descriptor Processed interrupt Line select 13" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x0 12. "DPL12,Descriptor Processed interrupt Line select 12" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 11. "DPL11,Descriptor Processed interrupt Line select 11" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x0 10. "DPL10,Descriptor Processed interrupt Line select 10" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 9. "DPL9,Descriptor Processed interrupt Line select 9" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x0 8. "DPL8,Descriptor Processed interrupt Line select 8" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 7. "DPL7,Descriptor Processed interrupt Line select 7" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x0 6. "DPL6,Descriptor Processed interrupt Line select 6" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 5. "DPL5,Descriptor Processed interrupt Line select 5" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x0 4. "DPL4,Descriptor Processed interrupt Line select 4" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 3. "DPL3,Descriptor Processed interrupt Line select 3" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
newline
bitfld.long 0x0 2. "DPL2,Descriptor Processed interrupt Line select 2" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "EIL2,The EIL register is used to control the Error Interrupt line."
hexmask.long.tbyte 0x4 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x4 10. "TBFL,Tx-Buffer Full interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x4 9. "MFFL,E-MAC status FIFO Full interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x4 8. "TFFL,Timestamp FIFO Full interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x4 7. "CULL1,CBS Upper Limit reached interrupt Line select 1" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x4 6. "CULL0,CBS Upper Limit reached interrupt Line select 0" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x4 5. "CLLL1,CBS Lower Limit reached interrupt Line select 1" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x4 4. "CLLL0,CBS Lower Limit reached interrupt Line select 0" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x4 3. "SEL,Separation Error interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x4 2. "QEL,Queue Error interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x4 1. "MTEL,E-MAC Transmission Error interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x4 0. "MREL,E-MAC Reception Error interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
line.long 0x8 "TIL2,The TIL register is used to control the Transmission Interrupt line."
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x8 11. "MFWL,E-MAC status FIFO Warning interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x8 10. "MFUL,E-MAC status FIFO Updated interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
bitfld.long 0x8 9. "TFWL,Timestamp FIFO Warning interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
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bitfld.long 0x8 8. "TFUL,Timestamp FIFO Updated interrupt Line select" "0: Interrupt line A used for this notification,1: Interrupt line B used for this notification"
hexmask.long.byte 0x8 0.--7. 1. "Reserved_0,Reserved"
group.long 0x450++0x2F
line.long 0x0 "DIE2,The DIE register is used to control the Descriptor Interrupt."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "DPS15,Descriptor Processed interrupt Set 15" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x0 14. "DPS14,Descriptor Processed interrupt Set 14" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 13. "DPS13,Descriptor Processed interrupt Set 13" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x0 12. "DPS12,Descriptor Processed interrupt Set 12" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 11. "DPS11,Descriptor Processed interrupt Set 11" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x0 10. "DPS10,Descriptor Processed interrupt Set 10" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 9. "DPS9,Descriptor Processed interrupt Set 9" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x0 8. "DPS8,Descriptor Processed interrupt Set 8" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 7. "DPS7,Descriptor Processed interrupt Set 7" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x0 6. "DPS6,Descriptor Processed interrupt Set 6" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 5. "DPS5,Descriptor Processed interrupt Set 5" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x0 4. "DPS4,Descriptor Processed interrupt Set 4" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 3. "DPS3,Descriptor Processed interrupt Set 3" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x0 2. "DPS2,Descriptor Processed interrupt Set 2" "0: No change of DIC,1: Set DIC"
bitfld.long 0x0 1. "DPS1,Descriptor Processed interrupt Set 1" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "DID2,The DID register is used to control the Descriptor Interrupt."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4 15. "DPD15,Descriptor Processed interrupt Disable 15" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x4 14. "DPD14,Descriptor Processed interrupt Disable 14" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 13. "DPD13,Descriptor Processed interrupt Disable 13" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x4 12. "DPD12,Descriptor Processed interrupt Disable 12" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 11. "DPD11,Descriptor Processed interrupt Disable 11" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x4 10. "DPD10,Descriptor Processed interrupt Disable 10" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 9. "DPD9,Descriptor Processed interrupt Disable 9" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x4 8. "DPD8,Descriptor Processed interrupt Disable 8" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 7. "DPD7,Descriptor Processed interrupt Disable 7" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x4 6. "DPD6,Descriptor Processed interrupt Disable 6" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 5. "DPD5,Descriptor Processed interrupt Disable 5" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x4 4. "DPD4,Descriptor Processed interrupt Disable 4" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 3. "DPD3,Descriptor Processed interrupt Disable 3" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x4 2. "DPD2,Descriptor Processed interrupt Disable 2" "0: No change of DIC,1: Set DIC"
bitfld.long 0x4 1. "DPD1,Descriptor Processed interrupt Disable 1" "0: No change of DIC,1: Set DIC"
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bitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "EIE2,The EIE register is used to control the Error Interrupt."
hexmask.long.tbyte 0x8 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x8 10. "TBFS,Tx-Buffer Full interrupt Set" "0: No change of EIC,1: Set EIC"
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bitfld.long 0x8 9. "MFFS,E-MAC status FIFO Full interrupt Set" "0: No change of EIC,1: Set EIC"
bitfld.long 0x8 8. "TFFS,Timestamp FIFO Full interrupt Set" "0: No change of EIC,1: Set EIC"
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bitfld.long 0x8 7. "CULS1,CBS Upper Limit reached interrupt Set 1" "0: No change of EIC,1: Set EIC"
bitfld.long 0x8 6. "CULS0,CBS Upper Limit reached interrupt Set 0" "0: No change of EIC,1: Set EIC"
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bitfld.long 0x8 5. "CLLS1,CBS Lower Limit reached interrupt Set 1" "0: No change of EIC,1: Set EIC"
bitfld.long 0x8 4. "CLLS0,CBS Lower Limit reached interrupt Set 0" "0: No change of EIC,1: Set EIC"
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bitfld.long 0x8 3. "SES,Separation Error interrupt Set" "0: No change of EIC,1: Set EIC"
bitfld.long 0x8 2. "QES,Queue Error interrupt Set" "0: No change of EIC,1: Set EIC"
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bitfld.long 0x8 1. "MTES,E-MAC Transmission Error interrupt Set" "0: No change of EIC,1: Set EIC"
bitfld.long 0x8 0. "MRES,E-MAC Reception Error interrupt Set" "0: No change of EIC,1: Set EIC"
line.long 0xC "EID2,The EID register is used to control the Error Interrupt."
hexmask.long.tbyte 0xC 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0xC 10. "TBFD,Tx-Buffer Full interrupt Disable" "0: No change of EIC,1: Set EIC"
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bitfld.long 0xC 9. "MFFD,E-MAC status FIFO Full interrupt Disable" "0: No change of EIC,1: Set EIC"
bitfld.long 0xC 8. "TFFD,Timestamp FIFO Full interrupt Disable" "0: No change of EIC,1: Set EIC"
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bitfld.long 0xC 7. "CULD1,CBS Upper Limit reached interrupt Disable 1" "0: No change of EIC,1: Set EIC"
bitfld.long 0xC 6. "CULD0,CBS Upper Limit reached interrupt Disable 0" "0: No change of EIC,1: Set EIC"
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bitfld.long 0xC 5. "CLLD1,CBS Lower Limit reached interrupt Disable 1" "0: No change of EIC,1: Set EIC"
bitfld.long 0xC 4. "CLLD0,CBS Lower Limit reached interrupt Disable 0" "0: No change of EIC,1: Set EIC"
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bitfld.long 0xC 3. "SED,Separation Error interrupt Disable" "0: No change of EIC,1: Set EIC"
bitfld.long 0xC 2. "QED,Queue Error interrupt Disable" "0: No change of EIC,1: Set EIC"
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bitfld.long 0xC 1. "MTED,E-MAC Transmission Error interrupt Disable" "0: No change of EIC,1: Set EIC"
bitfld.long 0xC 0. "MRED,E-MAC Reception Error interrupt Disable" "0: No change of EIC,1: Set EIC"
line.long 0x10 "RIE02,The RIE0 register is used to control the Reception Interrupt."
hexmask.long.word 0x10 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x10 17. "FRS17,Frame Received interrupt Set 17" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x10 16. "FRS16,Frame Received interrupt Set 16" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 15. "FRS15,Frame Received interrupt Set 15" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x10 14. "FRS14,Frame Received interrupt Set 14" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 13. "FRS13,Frame Received interrupt Set 13" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x10 12. "FRS12,Frame Received interrupt Set 12" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 11. "FRS11,Frame Received interrupt Set 11" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x10 10. "FRS10,Frame Received interrupt Set 10" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 9. "FRS9,Frame Received interrupt Set 9" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x10 8. "FRS8,Frame Received interrupt Set 8" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 7. "FRS7,Frame Received interrupt Set 7" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x10 6. "FRS6,Frame Received interrupt Set 6" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 5. "FRS5,Frame Received interrupt Set 5" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x10 4. "FRS4,Frame Received interrupt Set 4" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 3. "FRS3,Frame Received interrupt Set 3" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x10 2. "FRS2,Frame Received interrupt Set 2" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x10 1. "FRS1,Frame Received interrupt Set 1" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x10 0. "FRS0,Frame Received interrupt Set 0" "0: No change of RIC0,1: Set RIC0"
line.long 0x14 "RID02,The RID0 register is used to control the Reception Interrupt."
hexmask.long.word 0x14 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x14 17. "FRD17,Frame Received interrupt Disable 17" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x14 16. "FRD16,Frame Received interrupt Disable 16" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 15. "FRD15,Frame Received interrupt Disable 15" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x14 14. "FRD14,Frame Received interrupt Disable 14" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 13. "FRD13,Frame Received interrupt Disable 13" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x14 12. "FRD12,Frame Received interrupt Disable 12" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 11. "FRD11,Frame Received interrupt Disable 11" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x14 10. "FRD10,Frame Received interrupt Disable 10" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 9. "FRD9,Frame Received interrupt Disable 9" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x14 8. "FRD8,Frame Received interrupt Disable 8" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 7. "FRD7,Frame Received interrupt Disable 7" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x14 6. "FRD6,Frame Received interrupt Disable 6" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 5. "FRD5,Frame Received interrupt Disable 5" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x14 4. "FRD4,Frame Received interrupt Disable 4" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 3. "FRD3,Frame Received interrupt Disable 3" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x14 2. "FRD2,Frame Received interrupt Disable 2" "0: No change of RIC0,1: Set RIC0"
bitfld.long 0x14 1. "FRD1,Frame Received interrupt Disable 1" "0: No change of RIC0,1: Set RIC0"
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bitfld.long 0x14 0. "FRD0,Frame Received interrupt Disable 0" "0: No change of RIC0,1: Set RIC0"
line.long 0x18 "RIE12,The RIE1 register is used to control the Reception Interrupt."
bitfld.long 0x18 31. "RFWS,Rx-FIFO Warning interrupt Set" "0: No change of RIC1,1: Set RIC1"
hexmask.long.word 0x18 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x18 17. "RWS17,Reception Warning interrupt Set 17" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 16. "RWS16,Reception Warning interrupt Set 16" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 15. "RWS15,Reception Warning interrupt Set 15" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 14. "RWS14,Reception Warning interrupt Set 14" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 13. "RWS13,Reception Warning interrupt Set 13" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 12. "RWS12,Reception Warning interrupt Set 12" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 11. "RWS11,Reception Warning interrupt Set 11" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 10. "RWS10,Reception Warning interrupt Set 10" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 9. "RWS9,Reception Warning interrupt Set 9" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 8. "RWS8,Reception Warning interrupt Set 8" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 7. "RWS7,Reception Warning interrupt Set 7" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 6. "RWS6,Reception Warning interrupt Set 6" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 5. "RWS5,Reception Warning interrupt Set 5" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 4. "RWS4,Reception Warning interrupt Set 4" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 3. "RWS3,Reception Warning interrupt Set 3" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 2. "RWS2,Reception Warning interrupt Set 2" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x18 1. "RWS1,Reception Warning interrupt Set 1" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x18 0. "RWS0,Reception Warning interrupt Set 0" "0: No change of RIC1,1: Set RIC1"
line.long 0x1C "RID12,The RID1 register is used to control the Reception Interrupt."
bitfld.long 0x1C 31. "RFWD,Rx-FIFO Warning interrupt Disable" "0: No change of RIC1,1: Set RIC1"
hexmask.long.word 0x1C 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x1C 17. "RWD17,Reception Warning interrupt Disable 17" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 16. "RWD16,Reception Warning interrupt Disable 16" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 15. "RWD15,Reception Warning interrupt Disable 15" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 14. "RWD14,Reception Warning interrupt Disable 14" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 13. "RWD13,Reception Warning interrupt Disable 13" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 12. "RWD12,Reception Warning interrupt Disable 12" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 11. "RWD11,Reception Warning interrupt Disable 11" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 10. "RWD10,Reception Warning interrupt Disable 10" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 9. "RWD9,Reception Warning interrupt Disable 9" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 8. "RWD8,Reception Warning interrupt Disable 8" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 7. "RWD7,Reception Warning interrupt Disable 7" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 6. "RWD6,Reception Warning interrupt Disable 6" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 5. "RWD5,Reception Warning interrupt Disable 5" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 4. "RWD4,Reception Warning interrupt Disable 4" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 3. "RWD3,Reception Warning interrupt Disable 3" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 2. "RWD2,Reception Warning interrupt Disable 2" "0: No change of RIC1,1: Set RIC1"
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bitfld.long 0x1C 1. "RWD1,Reception Warning interrupt Disable 1" "0: No change of RIC1,1: Set RIC1"
bitfld.long 0x1C 0. "RWD0,Reception Warning interrupt Disable 0" "0: No change of RIC1,1: Set RIC1"
line.long 0x20 "RIE22,The RIE2 register is used to control the Reception Interrupt."
bitfld.long 0x20 31. "RFFS,Rx-FIFO Full interrupt Set" "0: No change of RIC2,1: Set RIC2"
hexmask.long.word 0x20 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x20 17. "QFS17,Queue Full interrupt Set 17" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 16. "QFS16,Queue Full interrupt Set 16" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 15. "QFS15,Queue Full interrupt Set 15" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 14. "QFS14,Queue Full interrupt Set 14" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 13. "QFS13,Queue Full interrupt Set 13" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 12. "QFS12,Queue Full interrupt Set 12" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 11. "QFS11,Queue Full interrupt Set 11" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 10. "QFS10,Queue Full interrupt Set 10" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 9. "QFS9,Queue Full interrupt Set 9" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 8. "QFS8,Queue Full interrupt Set 8" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 7. "QFS7,Queue Full interrupt Set 7" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 6. "QFS6,Queue Full interrupt Set 6" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 5. "QFS5,Queue Full interrupt Set 5" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 4. "QFS4,Queue Full interrupt Set 4" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 3. "QFS3,Queue Full interrupt Set 3" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 2. "QFS2,Queue Full interrupt Set 2" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x20 1. "QFS1,Queue Full interrupt Set 1" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x20 0. "QFS0,Queue Full interrupt Set 0" "0: No change of RIC2,1: Set RIC2"
line.long 0x24 "RID22,The RID2 register is used to control the Reception Interrupt."
bitfld.long 0x24 31. "RFFD,Rx-FIFO Full interrupt Disable" "0: No change of RIC2,1: Set RIC2"
hexmask.long.word 0x24 18.--30. 1. "Reserved_18,Reserved"
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bitfld.long 0x24 17. "QFD17,Queue Full interrupt Disable 17" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 16. "QFD16,Queue Full interrupt Disable 16" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 15. "QFD15,Queue Full interrupt Disable 15" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 14. "QFD14,Queue Full interrupt Disable 14" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 13. "QFD13,Queue Full interrupt Disable 13" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 12. "QFD12,Queue Full interrupt Disable 12" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 11. "QFD11,Queue Full interrupt Disable 11" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 10. "QFD10,Queue Full interrupt Disable 10" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 9. "QFD9,Queue Full interrupt Disable 9" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 8. "QFD8,Queue Full interrupt Disable 8" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 7. "QFD7,Queue Full interrupt Disable 7" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 6. "QFD6,Queue Full interrupt Disable 6" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 5. "QFD5,Queue Full interrupt Disable 5" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 4. "QFD4,Queue Full interrupt Disable 4" "0: No change of RIC2,1: Set RIC2"
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bitfld.long 0x24 3. "QFD3,Queue Full interrupt Disable 3" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 2. "QFD2,Queue Full interrupt Disable 2" "0: No change of RIC2,1: Set RIC2"
newline
bitfld.long 0x24 1. "QFD1,Queue Full interrupt Disable 1" "0: No change of RIC2,1: Set RIC2"
bitfld.long 0x24 0. "QFD0,Queue Full interrupt Disable 0" "0: No change of RIC2,1: Set RIC2"
line.long 0x28 "TIE2,The TIE register is used to control the Transmission Interrupt."
hexmask.long.word 0x28 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x28 19. "TDPS3,Transmit Descriptor Processed interrupt Set 3" "0: No change of TIC,1: Set TIC"
newline
bitfld.long 0x28 18. "TDPS2,Transmit Descriptor Processed interrupt Set 2" "0: No change of TIC,1: Set TIC"
bitfld.long 0x28 17. "TDPS1,Transmit Descriptor Processed interrupt Set 1" "0: No change of TIC,1: Set TIC"
newline
bitfld.long 0x28 16. "TDPS0,Transmit Descriptor Processed interrupt Set 0" "0: No change of TIC,1: Set TIC"
hexmask.long.byte 0x28 12.--15. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x28 11. "MFWS,E-MAC status FIFO Warning interrupt Set" "0: No change of TIC,1: Set TIC"
bitfld.long 0x28 10. "MFUS,E-MAC status FIFO Updated interrupt Set" "0: No change of TIC,1: Set TIC"
newline
bitfld.long 0x28 9. "TFWS,Timestamp FIFO Warning interrupt Set" "0: No change of TIC,1: Set TIC"
bitfld.long 0x28 8. "TFUS,Timestamp FIFO Updated interrupt Set" "0: No change of TIC,1: Set TIC"
newline
hexmask.long.byte 0x28 4.--7. 1. "Reserved_4,Reserved"
bitfld.long 0x28 3. "FTS3,Frame Transmitted interrupt Set 3" "0: No change of TIC,1: Set TIC"
newline
bitfld.long 0x28 2. "FTS2,Frame Transmitted interrupt Set 2" "0: No change of TIC,1: Set TIC"
bitfld.long 0x28 1. "FTS1,Frame Transmitted interrupt Set 1" "0: No change of TIC,1: Set TIC"
newline
bitfld.long 0x28 0. "FTS0,Frame Transmitted interrupt Set 0" "0: No change of TIC,1: Set TIC"
line.long 0x2C "TID2,The TID register is used to control the Transmission Interrupt."
hexmask.long.word 0x2C 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x2C 19. "TDPD3,Transmit Descriptor Processed interrupt Disable 3" "0: No change of TIC,1: Set TIC"
newline
bitfld.long 0x2C 18. "TDPD2,Transmit Descriptor Processed interrupt Disable 2" "0: No change of TIC,1: Set TIC"
bitfld.long 0x2C 17. "TDPD1,Transmit Descriptor Processed interrupt Disable 1" "0: No change of TIC,1: Set TIC"
newline
bitfld.long 0x2C 16. "TDPD0,Transmit Descriptor Processed interrupt Disable 0" "0: No change of TIC,1: Set TIC"
hexmask.long.byte 0x2C 12.--15. 1. "Reserved_12,Reserved"
newline
bitfld.long 0x2C 11. "MFWD,E-MAC status FIFO Warning interrupt Disable" "0: No change of TIC,1: Set TIC"
bitfld.long 0x2C 10. "MFUD,E-MAC status FIFO Updated interrupt Disable" "0: No change of TIC,1: Set TIC"
newline
bitfld.long 0x2C 9. "TFWD,Timestamp FIFO Warning interrupt Disable" "0: No change of TIC,1: Set TIC"
bitfld.long 0x2C 8. "TFUD,Timestamp FIFO Updated interrupt Disable" "0: No change of TIC,1: Set TIC"
newline
hexmask.long.byte 0x2C 4.--7. 1. "Reserved_4,Reserved"
bitfld.long 0x2C 3. "FTD3,Frame Transmitted interrupt Disable 3" "0: No change of TIC,1: Set TIC"
newline
bitfld.long 0x2C 2. "FTD2,Frame Transmitted interrupt Disable 2" "0: No change of TIC,1: Set TIC"
bitfld.long 0x2C 1. "FTD1,Frame Transmitted interrupt Disable 1" "0: No change of TIC,1: Set TIC"
newline
bitfld.long 0x2C 0. "FTD0,Frame Transmitted interrupt Disable 0" "0: No change of TIC,1: Set TIC"
group.long 0x488++0x7
line.long 0x0 "RIE32,The RIE3 register is used to control the Reception Interrupt."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "RDPS17,Receive Descriptor Processed interrupt Set 17" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x0 16. "RDPS16,Receive Descriptor Processed interrupt Set 16" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 15. "RDPS15,Receive Descriptor Processed interrupt Set 15" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x0 14. "RDPS14,Receive Descriptor Processed interrupt Set 14" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 13. "RDPS13,Receive Descriptor Processed interrupt Set 13" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x0 12. "RDPS12,Receive Descriptor Processed interrupt Set 12" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 11. "RDPS11,Receive Descriptor Processed interrupt Set 11" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x0 10. "RDPS10,Receive Descriptor Processed interrupt Set 10" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 9. "RDPS9,Receive Descriptor Processed interrupt Set 9" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x0 8. "RDPS8,Receive Descriptor Processed interrupt Set 8" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 7. "RDPS7,Receive Descriptor Processed interrupt Set 7" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x0 6. "RDPS6,Receive Descriptor Processed interrupt Set 6" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 5. "RDPS5,Receive Descriptor Processed interrupt Set 5" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x0 4. "RDPS4,Receive Descriptor Processed interrupt Set 4" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 3. "RDPS3,Receive Descriptor Processed interrupt Set 3" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x0 2. "RDPS2,Receive Descriptor Processed interrupt Set 2" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x0 1. "RDPS1,Receive Descriptor Processed interrupt Set 1" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x0 0. "RDPS0,Receive Descriptor Processed interrupt Set 0" "0: No change of RIC3,1: Set RIC3"
line.long 0x4 "RID32,The RID3 register is used to control the Reception Interrupt."
hexmask.long.word 0x4 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x4 17. "RDPD17,Receive Descriptor Processed interrupt Disable 17" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x4 16. "RDPD16,Receive Descriptor Processed interrupt Disable 16" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 15. "RDPD15,Receive Descriptor Processed interrupt Disable 15" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x4 14. "RDPD14,Receive Descriptor Processed interrupt Disable 14" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 13. "RDPD13,Receive Descriptor Processed interrupt Disable 13" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x4 12. "RDPD12,Receive Descriptor Processed interrupt Disable 12" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 11. "RDPD11,Receive Descriptor Processed interrupt Disable 11" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x4 10. "RDPD10,Receive Descriptor Processed interrupt Disable 10" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 9. "RDPD9,Receive Descriptor Processed interrupt Disable 9" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x4 8. "RDPD8,Receive Descriptor Processed interrupt Disable 8" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 7. "RDPD7,Receive Descriptor Processed interrupt Disable 7" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x4 6. "RDPD6,Receive Descriptor Processed interrupt Disable 6" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 5. "RDPD5,Receive Descriptor Processed interrupt Disable 5" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x4 4. "RDPD4,Receive Descriptor Processed interrupt Disable 4" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 3. "RDPD3,Receive Descriptor Processed interrupt Disable 3" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x4 2. "RDPD2,Receive Descriptor Processed interrupt Disable 2" "0: No change of RIC3,1: Set RIC3"
bitfld.long 0x4 1. "RDPD1,Receive Descriptor Processed interrupt Disable 1" "0: No change of RIC3,1: Set RIC3"
newline
bitfld.long 0x4 0. "RDPD0,Receive Descriptor Processed interrupt Disable 0" "0: No change of RIC3,1: Set RIC3"
group.long 0x500++0x3
line.long 0x0 "ECMR2,"
bitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 27. "Reserved_27,Reserved" "0,1"
bitfld.long 0x0 26. "TRCCM,Counter Clear Mode" "0: Writing to a counter register leads to the..,1: Reading from a counter register leads to the.."
newline
bitfld.long 0x0 25. "Reserved_25,Reserved" "0,1"
bitfld.long 0x0 24. "Reserved_24,Reserved" "0,1"
newline
bitfld.long 0x0 23. "RCSC,Checksum Calculation" "0: Checksums are not automatically calculated,1: Checksums are automatically calculated"
bitfld.long 0x0 22. "Reserved_22,Reserved" "0,1"
newline
bitfld.long 0x0 21. "DPAD,Data Padding" "0: Padding to make up 60 bytes is inserted in data..,1: Padding is not inserted in data for transmission.."
bitfld.long 0x0 20. "RZPF,PAUSE Frame Reception with Time = 0" "0: Reception of PAUSE frames with the TIME..,1: Reception of PAUSE frames with the TIME.."
newline
bitfld.long 0x0 19. "TZPF,Transmit Zero PAUSE Frame(ECMR.DM=1)" "0: Not transmit the PAUSE frame of TIME parameter..,1: Transmit the PAUSE frame of TIME parameter value 0"
bitfld.long 0x0 18. "PFR,PAUSE Frame Receive Mode" "0: PAUSE frames are not transferred to the AVB-DMAC,1: PAUSE frames are transferred to the AVB-DMAC"
newline
bitfld.long 0x0 17. "RXF,Operating Mode for Flow Control in Reception" "0: Detection of PAUSE frames is disabled,1: Flow control for the receiving port is enabled"
bitfld.long 0x0 16. "TXF,Transmit Flow control mode" "0: Flow control for the transmitting port is disabled,1: Flow control for the transmitting port is enabled"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
newline
bitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
bitfld.long 0x0 9. "MPDE,Magic PacketTM Detection Enable" "0: Magic PacketTM detection is not enabled,1: Magic PacketTM detection is enabled"
newline
bitfld.long 0x0 7.--8. "Reserved_7,Reserved" "0,1,2,3"
bitfld.long 0x0 6. "RE,Reception Enable" "0: Reception is disabled,1: Reception is enabled"
newline
bitfld.long 0x0 5. "TE,Transmission Enable" "0: Transmission is disabled,1: Transmission is enabled"
bitfld.long 0x0 3.--4. "Reserved_3,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
bitfld.long 0x0 1. "DM,Duplex Mode" "0: Value after reset,1: Full-duplex operation"
newline
bitfld.long 0x0 0. "PRM,Promiscuous Mode" "0: Normal operation,1: Promiscuous mode operation"
group.long 0x508++0x3
line.long 0x0 "RFLR2,The RFLR register specifies the maximum length (in bytes) of frames that can be received by this LSI. Settings in this register must not be changed while reception is enabled (while the RE bit in the E-MAC mode register (EMCR) is 1)."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.tbyte 0x0 0.--17. 1. "RFL_17_0,Receive Frame Length"
group.long 0x510++0x3
line.long 0x0 "ECSR2,The ECSR register indicates the state of the E-MAC. The CPU can be notified of the state. For bits associated with interrupts. the interrupt can be enabled or disabled by the corresponding bit in the E-MAC Interrupt Permission Register (ECSIPR).."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "PFRI,PAUSE Frame Retry Interrupt" "0: Read the PFTTCR register to clear the PFTTCR..,1: Write to this bit 1"
newline
bitfld.long 0x0 3. "PHYI,PHY interrupt terminal state bit" "0: PHY interrupt terminal,1: PHY interrupt terminal"
bitfld.long 0x0 2. "LCHNG,Link signal change bit" "0: The change of Link status signal,1: The change of Link status signal"
newline
bitfld.long 0x0 1. "MPD,Magic PacketTM Detection" "0: A Magic PacketTM has not been detected,1: A Magic PacketTM has been detected"
bitfld.long 0x0 0. "ICD,Illegal Carrier Detection" "0: PHY-LSI has not detected an illegal carrier on..,1: PHY-LSI has detected an illegal carrier on the.."
group.long 0x518++0x3
line.long 0x0 "ECSIPR2,The ECSIPR register enables or disables the states indicated by the ECSR register as interrupt sources. Each effective bit disables or enables interrupts corresponding to the bits in ECSR."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "PFRIM,PAUSE Frame Retry Interrupt Mask" "0: Interrupts on setting of the PFRI bit is disabled,1: Interrupts on setting of the PFRI bit is enabled"
newline
bitfld.long 0x0 3. "PHYIM,PHY Interrupt Mask" "0: Interrupts on setting of the PHYI bit is disabled,1: Interrupts on setting of the PHYI bit is enabled"
bitfld.long 0x0 2. "LINKIM,LINK Interrupt Mask" "0: Interrupts on setting of the LCHNG bit is disabled,1: Interrupts on setting of the LCHNG bit is enabled"
newline
bitfld.long 0x0 1. "MPDIP,Magic PacketTM Detect Interrupt Enable" "0: Interrupts on setting of the MPD bit is disabled,1: Interrupts on setting of the MPD bit is enabled"
bitfld.long 0x0 0. "ICDIP,Illegal Carrier Detect Interrupt Enable" "0: Interrupts on setting of the ICD bit is disabled,1: Interrupt on setting of the ICD bit is enabled"
group.long 0x520++0x3
line.long 0x0 "PIR2,The PIR register provides a means of access to the PHY-LSI internal registers via the MII."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0x0 3. "MDI,MII Management Data-In" "0,1"
newline
bitfld.long 0x0 2. "MDO,MII Management Data-Out" "0,1"
bitfld.long 0x0 1. "MMD,MII Management Mode" "0: Read direction is specified,1: Write direction is specified"
newline
bitfld.long 0x0 0. "MDC,MII Management Data Clock" "0,1"
rgroup.long 0x528++0x3
line.long 0x0 "PSR2,The PSR register is a read-only register that can read interface signals from the PHY-LSI."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "LMON,Link Status Pin State" "0: The link status signal,1: The link status signal"
group.long 0x52C++0x3
line.long 0x0 "PIPR2,The PIPR register is used to set the active sense of the AVB_PHY-INT pin."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PHYIP,PHY Interrupt Input Pin Polarity" "0: PHY interrupt pin,1: PHY interrupt pin"
group.long 0x554++0x7
line.long 0x0 "APR2,The APR register is used to set the value for the TIME parameter of auto generated PAUSE frames."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "APFTP_15_0,Auto Pause Frame Time Parameter"
line.long 0x4 "MPR2,The MPR register is used to set the value for the TIME parameter of manually generated PAUSE frames. When a PAUSE frame is manually transmitted. the value set in this register is used as its TIME parameter."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "MP_15_0,Manual PAUSE"
rgroup.long 0x55C++0x7
line.long 0x0 "PFTCR2,The PFTCR register is a counter that indicates the number of times PAUSE frames have been transmitted."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "PFTXC_15_0,PAUSE Frame Transmit Counter"
line.long 0x4 "PFRCR2,The RFRCR register is a counter that indicates the number of times PAUSE frames have been received."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "PFRXC_15_0,PAUSE Frame Receive Counter"
group.long 0x564++0x7
line.long 0x0 "TPAUSER2,The TPAUSER register is used to set the value for upper limit number of auto generated PAUSE frames."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "PFRTULMT_15_0,Pause Frame Retry Upper LiMiT"
line.long 0x4 "PFTTCR2,The PFTTCR register is a counter that indicates the number of times auto PAUSE frames have been transmit."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "PFRTC_15_0,Pause Frame Retry Counter"
group.long 0x5B0++0x3
line.long 0x0 "GECMR2,The GECMR register specifies the operating mode for the E-MAC."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "SPEED,Transfer Speed Setting" "0: Transfer is at 100 Mbps,1: Transfer is at 1000 Mbps"
group.long 0x5C0++0x3
line.long 0x0 "MAHR2,The MAHR register specifies the 32 higher-order bits of the 48-bit E-MAC address. The settings in this register are normally made in the initialization process after a reset."
hexmask.long 0x0 0.--31. 1. "MA_47_16,E-MAC Address Bits 47 to 16"
group.long 0x5C8++0x3
line.long 0x0 "MALR2,The MALR register specifies the 16 lower-order bits of the 48-bit E-MAC address. The settings in this register are normally made in the initialization process after a reset."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "MA_15_0,E-MAC Address Bits 15 to 0"
group.long 0x700++0x3
line.long 0x0 "TROCR2,The TROCR register is a counter that indicates the number of times frames with time-out were transmit. Counting up stops when the value in this register reaches H'0000 FFFF."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "FTTOC_15_0,Frame transmit time-out counter"
group.long 0x740++0x3
line.long 0x0 "CEFCR2,The CEFCR register is a counter that indicates the number of times frames with CRC errors were received. Counting up stops when the value in this register reaches H'0000 FFFF."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "CEFC_15_0,CRC Error Frame Counter"
group.long 0x748++0x3
line.long 0x0 "FRECR2,The FRECR register is a counter that indicates the number of frames for which receive errors were generated by input on the RX_ER from the PHY-LSI. Counting up stops when the value in this register reaches H'0000and#65533;FFFF."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "FREC_15_0,Frame Receive Error Counter"
group.long 0x750++0x3
line.long 0x0 "TSFRCR2,The TSFRCR register is a counter that indicates the number of received frames that were fewer than 64 bytes in length. Counting stops when the value in this register reaches H'0000and#65533;FFFF."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "TSFRC_15_0,Too-Short Frame Receive Counter"
group.long 0x758++0x3
line.long 0x0 "TLFRCR2,The TLFRCR register is a counter that indicates the number of received frames that were longer than the value specified in the receive frame length register (RFLR). Counting up stops when the value in the TLFRCR register reaches.."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "TLFC_15_0,Too-Long Frame Receive Counter"
group.long 0x760++0x3
line.long 0x0 "RFCR2,The RFCR register is a counter that indicates the number of received frames containing double_quotationresidual bitsdouble_quotation (trailing bits not making up an 8-bit unit). Counting up stops when the value in this register reaches.."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RFC_15_0,Residual-Bit Frame Receive Counter"
group.long 0x778++0x3
line.long 0x0 "MAFCR2,The MAFCR register is a counter that indicates the number of received frames for which a multicast address was specified. Counting up stops when the value in this register reaches H'0000and#65533;FFFF."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "MAFC_15_0,Multicast Address Frame Counter"
group.long 0x800++0x3
line.long 0x0 "CSR02,"
hexmask.long 0x0 0.--31. 1. "Reserved_0,Reserved"
group.long 0x808++0x3
line.long 0x0 "CSR22,"
hexmask.long 0x0 0.--31. 1. "Reserved_0,Reserved"
group.long 0x824++0xB
line.long 0x0 "CSR302,"
hexmask.long 0x0 0.--31. 1. "Reserved_0,Reserved"
line.long 0x4 "CSR312,"
hexmask.long 0x4 0.--31. 1. "Reserved_0,Reserved"
line.long 0x8 "CSR322,"
hexmask.long 0x8 0.--31. 1. "Reserved_0,Reserved"
group.long 0xA00++0x3
line.long 0x0 "USMR2,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0x0 3. "EI6F,Enable UDP/IPv6 Filtering" "0: UDP/IPv6 Filtering disabled,1: UDP/IPv6 Filtering enabled"
newline
bitfld.long 0x0 2. "EI4F,Enable UDP/IPv4 Filtering" "0: UDP/IPv4 Filtering disabled,1: UDP/IPv4 Filtering enabled"
bitfld.long 0x0 1. "EMOM,Enable Manual Offset Mode" "0: Manual Offset Mode disabled,1: Manual Offset Mode enabled"
newline
bitfld.long 0x0 0. "EEOM,Enable Extended Offset Mode" "0: Extended Offset Mode disabled,1: Extended Offset Mode enabled"
group.long 0xAE8++0x57
line.long 0x0 "SFO22,"
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0x0 0.--10. 1. "FBP2_10_0,First Byte Position2"
line.long 0x4 "I4SFO2,"
hexmask.long.tbyte 0x4 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0x4 0.--10. 1. "FBP_10_0,First Byte Position"
line.long 0x8 "I4DFO2,"
hexmask.long.tbyte 0x8 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0x8 0.--10. 1. "FBP_10_0,First Byte Position"
line.long 0xC "I6SFO2,"
hexmask.long.tbyte 0xC 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0xC 0.--10. 1. "FBP_10_0,First Byte Position"
line.long 0x10 "I6DFO2,"
hexmask.long.tbyte 0x10 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0x10 0.--10. 1. "FBP_10_0,First Byte Position"
line.long 0x14 "UPFO2,"
hexmask.long.tbyte 0x14 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0x14 0.--10. 1. "FBP_10_0,First Byte Position"
line.long 0x18 "I4SFPR0_2,"
hexmask.long 0x18 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x1C "I4SFPR1_2,"
hexmask.long 0x1C 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x20 "I4SFPR2_2,"
hexmask.long 0x20 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x24 "I4SFPR3_2,"
hexmask.long 0x24 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x28 "I4SFPR4_2,"
hexmask.long 0x28 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x2C "I4SFPR5_2,"
hexmask.long 0x2C 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x30 "I4SFPR6_2,"
hexmask.long 0x30 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x34 "I4SFPR7_2,"
hexmask.long 0x34 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x38 "I4SFPR8_2,"
hexmask.long 0x38 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x3C "I4SFPR9_2,"
hexmask.long 0x3C 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x40 "I4SFPR10_2,"
hexmask.long 0x40 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x44 "I4SFPR11_2,"
hexmask.long 0x44 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x48 "I4SFPR12_2,"
hexmask.long 0x48 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x4C "I4SFPR13_2,"
hexmask.long 0x4C 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x50 "I4SFPR14_2,"
hexmask.long 0x50 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
line.long 0x54 "I4SFPR15_2,"
hexmask.long 0x54 0.--31. 1. "I4SFP_31_0,IP v4 Source Address Filter Pattern"
group.long 0xC00++0x3F
line.long 0x0 "I4DFPR0_2,"
hexmask.long 0x0 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x4 "I4DFPR1_2,"
hexmask.long 0x4 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x8 "I4DFPR2_2,"
hexmask.long 0x8 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0xC "I4DFPR3_2,"
hexmask.long 0xC 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x10 "I4DFPR4_2,"
hexmask.long 0x10 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x14 "I4DFPR5_2,"
hexmask.long 0x14 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x18 "I4DFPR6_2,"
hexmask.long 0x18 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x1C "I4DFPR7_2,"
hexmask.long 0x1C 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x20 "I4DFPR8_2,"
hexmask.long 0x20 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x24 "I4DFPR9_2,"
hexmask.long 0x24 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x28 "I4DFPR10_2,"
hexmask.long 0x28 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x2C "I4DFPR11_2,"
hexmask.long 0x2C 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x30 "I4DFPR12_2,"
hexmask.long 0x30 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x34 "I4DFPR13_2,"
hexmask.long 0x34 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x38 "I4DFPR14_2,"
hexmask.long 0x38 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
line.long 0x3C "I4DFPR15_2,"
hexmask.long 0x3C 0.--31. 1. "I4DFP_31_0,IP v4 Destination Address Filter Pattern"
group.long 0xD00++0x243
line.long 0x0 "I6SFPR0_2,"
hexmask.long 0x0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x4 "I6SFPR1_2,"
hexmask.long 0x4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x8 "I6SFPR2_2,"
hexmask.long 0x8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xC "I6SFPR3_2,"
hexmask.long 0xC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x10 "I6SFPR4_2,"
hexmask.long 0x10 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x14 "I6SFPR5_2,"
hexmask.long 0x14 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x18 "I6SFPR6_2,"
hexmask.long 0x18 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x1C "I6SFPR7_2,"
hexmask.long 0x1C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x20 "I6SFPR8_2,"
hexmask.long 0x20 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x24 "I6SFPR9_2,"
hexmask.long 0x24 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x28 "I6SFPR10_2,"
hexmask.long 0x28 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x2C "I6SFPR11_2,"
hexmask.long 0x2C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x30 "I6SFPR12_2,"
hexmask.long 0x30 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x34 "I6SFPR13_2,"
hexmask.long 0x34 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x38 "I6SFPR14_2,"
hexmask.long 0x38 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x3C "I6SFPR15_2,"
hexmask.long 0x3C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x40 "I6SFPR16_2,"
hexmask.long 0x40 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x44 "I6SFPR17_2,"
hexmask.long 0x44 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x48 "I6SFPR18_2,"
hexmask.long 0x48 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x4C "I6SFPR19_2,"
hexmask.long 0x4C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x50 "I6SFPR20_2,"
hexmask.long 0x50 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x54 "I6SFPR21_2,"
hexmask.long 0x54 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x58 "I6SFPR22_2,"
hexmask.long 0x58 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x5C "I6SFPR23_2,"
hexmask.long 0x5C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x60 "I6SFPR24_2,"
hexmask.long 0x60 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x64 "I6SFPR25_2,"
hexmask.long 0x64 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x68 "I6SFPR26_2,"
hexmask.long 0x68 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x6C "I6SFPR27_2,"
hexmask.long 0x6C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x70 "I6SFPR28_2,"
hexmask.long 0x70 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x74 "I6SFPR29_2,"
hexmask.long 0x74 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x78 "I6SFPR30_2,"
hexmask.long 0x78 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x7C "I6SFPR31_2,"
hexmask.long 0x7C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x80 "I6SFPR32_2,"
hexmask.long 0x80 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x84 "I6SFPR33_2,"
hexmask.long 0x84 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x88 "I6SFPR34_2,"
hexmask.long 0x88 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x8C "I6SFPR35_2,"
hexmask.long 0x8C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x90 "I6SFPR36_2,"
hexmask.long 0x90 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x94 "I6SFPR37_2,"
hexmask.long 0x94 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x98 "I6SFPR38_2,"
hexmask.long 0x98 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x9C "I6SFPR39_2,"
hexmask.long 0x9C 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xA0 "I6SFPR40_2,"
hexmask.long 0xA0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xA4 "I6SFPR41_2,"
hexmask.long 0xA4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xA8 "I6SFPR42_2,"
hexmask.long 0xA8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xAC "I6SFPR43_2,"
hexmask.long 0xAC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xB0 "I6SFPR44_2,"
hexmask.long 0xB0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xB4 "I6SFPR45_2,"
hexmask.long 0xB4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xB8 "I6SFPR46_2,"
hexmask.long 0xB8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xBC "I6SFPR47_2,"
hexmask.long 0xBC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xC0 "I6SFPR48_2,"
hexmask.long 0xC0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xC4 "I6SFPR49_2,"
hexmask.long 0xC4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xC8 "I6SFPR50_2,"
hexmask.long 0xC8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xCC "I6SFPR51_2,"
hexmask.long 0xCC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xD0 "I6SFPR52_2,"
hexmask.long 0xD0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xD4 "I6SFPR53_2,"
hexmask.long 0xD4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xD8 "I6SFPR54_2,"
hexmask.long 0xD8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xDC "I6SFPR55_2,"
hexmask.long 0xDC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xE0 "I6SFPR56_2,"
hexmask.long 0xE0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xE4 "I6SFPR57_2,"
hexmask.long 0xE4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xE8 "I6SFPR58_2,"
hexmask.long 0xE8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xEC "I6SFPR59_2,"
hexmask.long 0xEC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xF0 "I6SFPR60_2,"
hexmask.long 0xF0 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xF4 "I6SFPR61_2,"
hexmask.long 0xF4 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xF8 "I6SFPR62_2,"
hexmask.long 0xF8 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0xFC "I6SFPR63_2,"
hexmask.long 0xFC 0.--31. 1. "I6SFP_31_0,IPv6 Source Address Filter Pattern"
line.long 0x100 "I6DFPR0_2,"
hexmask.long 0x100 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x104 "I6DFPR1_2,"
hexmask.long 0x104 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x108 "I6DFPR2_2,"
hexmask.long 0x108 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x10C "I6DFPR3_2,"
hexmask.long 0x10C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x110 "I6DFPR4_2,"
hexmask.long 0x110 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x114 "I6DFPR5_2,"
hexmask.long 0x114 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x118 "I6DFPR6_2,"
hexmask.long 0x118 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x11C "I6DFPR7_2,"
hexmask.long 0x11C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x120 "I6DFPR8_2,"
hexmask.long 0x120 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x124 "I6DFPR9_2,"
hexmask.long 0x124 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x128 "I6DFPR10_2,"
hexmask.long 0x128 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x12C "I6DFPR11_2,"
hexmask.long 0x12C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x130 "I6DFPR12_2,"
hexmask.long 0x130 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x134 "I6DFPR13_2,"
hexmask.long 0x134 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x138 "I6DFPR14_2,"
hexmask.long 0x138 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x13C "I6DFPR15_2,"
hexmask.long 0x13C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x140 "I6DFPR16_2,"
hexmask.long 0x140 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x144 "I6DFPR17_2,"
hexmask.long 0x144 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x148 "I6DFPR18_2,"
hexmask.long 0x148 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x14C "I6DFPR19_2,"
hexmask.long 0x14C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x150 "I6DFPR20_2,"
hexmask.long 0x150 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x154 "I6DFPR21_2,"
hexmask.long 0x154 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x158 "I6DFPR22_2,"
hexmask.long 0x158 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x15C "I6DFPR23_2,"
hexmask.long 0x15C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x160 "I6DFPR24_2,"
hexmask.long 0x160 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x164 "I6DFPR25_2,"
hexmask.long 0x164 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x168 "I6DFPR26_2,"
hexmask.long 0x168 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x16C "I6DFPR27_2,"
hexmask.long 0x16C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x170 "I6DFPR28_2,"
hexmask.long 0x170 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x174 "I6DFPR29_2,"
hexmask.long 0x174 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x178 "I6DFPR30_2,"
hexmask.long 0x178 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x17C "I6DFPR31_2,"
hexmask.long 0x17C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x180 "I6DFPR32_2,"
hexmask.long 0x180 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x184 "I6DFPR33_2,"
hexmask.long 0x184 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x188 "I6DFPR34_2,"
hexmask.long 0x188 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x18C "I6DFPR35_2,"
hexmask.long 0x18C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x190 "I6DFPR36_2,"
hexmask.long 0x190 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x194 "I6DFPR37_2,"
hexmask.long 0x194 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x198 "I6DFPR38_2,"
hexmask.long 0x198 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x19C "I6DFPR39_2,"
hexmask.long 0x19C 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1A0 "I6DFPR40_2,"
hexmask.long 0x1A0 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1A4 "I6DFPR41_2,"
hexmask.long 0x1A4 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1A8 "I6DFPR42_2,"
hexmask.long 0x1A8 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1AC "I6DFPR43_2,"
hexmask.long 0x1AC 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1B0 "I6DFPR44_2,"
hexmask.long 0x1B0 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1B4 "I6DFPR45_2,"
hexmask.long 0x1B4 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1B8 "I6DFPR46_2,"
hexmask.long 0x1B8 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1BC "I6DFPR47_2,"
hexmask.long 0x1BC 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1C0 "I6DFPR48_2,"
hexmask.long 0x1C0 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1C4 "I6DFPR49_2,"
hexmask.long 0x1C4 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1C8 "I6DFPR50_2,"
hexmask.long 0x1C8 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1CC "I6DFPR51_2,"
hexmask.long 0x1CC 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1D0 "I6DFPR52_2,"
hexmask.long 0x1D0 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1D4 "I6DFPR53_2,"
hexmask.long 0x1D4 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1D8 "I6DFPR54_2,"
hexmask.long 0x1D8 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1DC "I6DFPR55_2,"
hexmask.long 0x1DC 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1E0 "I6DFPR56_2,"
hexmask.long 0x1E0 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1E4 "I6DFPR57_2,"
hexmask.long 0x1E4 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1E8 "I6DFPR58_2,"
hexmask.long 0x1E8 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1EC "I6DFPR59_2,"
hexmask.long 0x1EC 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1F0 "I6DFPR60_2,"
hexmask.long 0x1F0 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1F4 "I6DFPR61_2,"
hexmask.long 0x1F4 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1F8 "I6DFPR62_2,"
hexmask.long 0x1F8 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x1FC "I6DFPR63_2,"
hexmask.long 0x1FC 0.--31. 1. "I6DFP_31_0,IPv6 Destination Address Filter Pattern"
line.long 0x200 "UPFPR0_2,"
hexmask.long.word 0x200 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x200 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x204 "UPFPR1_2,"
hexmask.long.word 0x204 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x204 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x208 "UPFPR2_2,"
hexmask.long.word 0x208 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x208 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x20C "UPFPR3_2,"
hexmask.long.word 0x20C 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x20C 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x210 "UPFPR4_2,"
hexmask.long.word 0x210 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x210 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x214 "UPFPR5_2,"
hexmask.long.word 0x214 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x214 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x218 "UPFPR6_2,"
hexmask.long.word 0x218 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x218 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x21C "UPFPR7_2,"
hexmask.long.word 0x21C 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x21C 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x220 "UPFPR8_2,"
hexmask.long.word 0x220 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x220 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x224 "UPFPR9_2,"
hexmask.long.word 0x224 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x224 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x228 "UPFPR10_2,"
hexmask.long.word 0x228 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x228 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x22C "UPFPR11_2,"
hexmask.long.word 0x22C 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x22C 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x230 "UPFPR12_2,"
hexmask.long.word 0x230 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x230 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x234 "UPFPR13_2,"
hexmask.long.word 0x234 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x234 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x238 "UPFPR14_2,"
hexmask.long.word 0x238 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x238 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x23C "UPFPR15_2,"
hexmask.long.word 0x23C 16.--31. 1. "USPFP_15_0,UDP Source Port Number Filter Pattern"
hexmask.long.word 0x23C 0.--15. 1. "UDPFP_15_0,UDP Destination Port Number Filter Pattern"
line.long 0x240 "SFV22,"
hexmask.long 0x240 0.--31. 1. "LV_31_0,Separation Filter Value"
group.long 0xF48++0x2B
line.long 0x0 "I4SFVR2,"
hexmask.long 0x0 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x4 "I4DFVR2,"
hexmask.long 0x4 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x8 "I6SFVR0_2,"
hexmask.long 0x8 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0xC "I6SFVR1_2,"
hexmask.long 0xC 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x10 "I6SFVR2_2,"
hexmask.long 0x10 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x14 "I6SFVR3_2,"
hexmask.long 0x14 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x18 "I6DFVR0_2,"
hexmask.long 0x18 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x1C "I6DFVR1_2,"
hexmask.long 0x1C 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x20 "I6DFVR2_2,"
hexmask.long 0x20 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x24 "I6DFVR3_2,"
hexmask.long 0x24 0.--31. 1. "LV_31_0,Separation Filter Value"
line.long 0x28 "UPFVR2,"
hexmask.long 0x28 0.--31. 1. "LV_31_0,Separation Filter Value"
group.long 0xF7C++0x43
line.long 0x0 "I4SFMR2,"
hexmask.long 0x0 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x4 "I4DFMR2,"
hexmask.long 0x4 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x8 "I6SFMR0_2,"
hexmask.long 0x8 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0xC "I6SFMR1_2,"
hexmask.long 0xC 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x10 "I6SFMR2_2,"
hexmask.long 0x10 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x14 "I6SFMR3_2,"
hexmask.long 0x14 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x18 "I6DFMR0_2,"
hexmask.long 0x18 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x1C "I6DFMR1_2,"
hexmask.long 0x1C 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x20 "I6DFMR2_2,"
hexmask.long 0x20 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x24 "I6DFMR3_2,"
hexmask.long 0x24 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x28 "UPFMR2,"
hexmask.long 0x28 0.--31. 1. "CFM_31_0,Separation Filter Mask"
line.long 0x2C "SFL22,"
hexmask.long 0x2C 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x2C 0.--4. 1. "LC_4_0,Load Command"
line.long 0x30 "I4SFLR2,"
hexmask.long 0x30 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x30 0.--4. 1. "LC_4_0,Load Command"
line.long 0x34 "I4DFLR2,"
hexmask.long 0x34 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x34 0.--4. 1. "LC_4_0,Load Command"
line.long 0x38 "I6SFLR2,"
hexmask.long 0x38 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x38 0.--4. 1. "LC_4_0,Load Command"
line.long 0x3C "I6DFLR2,"
hexmask.long 0x3C 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x3C 0.--4. 1. "LC_4_0,Load Command"
line.long 0x40 "UPFLR2,"
hexmask.long 0x40 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x40 0.--4. 1. "LC_4_0,Load Command"
tree.end
tree.end
tree "gPTP"
base ad:0xE6449000
rgroup.long 0x0++0x3
line.long 0x0 "PTPIPV,gPTP IP Version"
hexmask.long 0x0 0.--31. 1. "IPV,IP Version."
group.long 0x10++0x7
line.long 0x0 "PTPTMEC,This register is used to enable gPTP timers."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved area"
bitfld.long 0x0 0.--1. "TE,Timer enable." "0: timer [q] disable,1: timer [q] disable,?,?"
line.long 0x4 "PTPTMDC,This register is used to disable gPTP timers. Writing 1single_quotationb1 to this register bit q will clear PTPTMEC.TE[q]."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved area"
bitfld.long 0x4 0.--1. "TD,Timer disable." "0,1,2,3"
group.long 0x20++0x3
line.long 0x0 "PTPTIVC0,"
hexmask.long 0x0 0.--31. 1. "TIV,Timer Increment Value."
group.long 0x30++0xB
line.long 0x0 "PTPTOVC00,This register is used to configure gPTP timer offset."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved area" "0,1,2,3"
hexmask.long 0x0 0.--29. 1. "TOVP0,Timer Offset Value Part 0 [t]"
line.long 0x4 "PTPTOVC10,This register is used to configure gPTP timer offset."
hexmask.long 0x4 0.--31. 1. "TOVP1,Timer Offset Value Part 1 [t]"
line.long 0x8 "PTPTOVC20,This register is used to configure gPTP timer offset."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved area"
hexmask.long.word 0x8 0.--15. 1. "TOVP2,Timer Offset Value Part 2[t]"
rgroup.long 0x40++0x7
line.long 0x0 "PTPAVTPTM00,This register is used to monitor the value of AVTP timer."
hexmask.long 0x0 0.--31. 1. "AVTPP0,AVTP timer value Part 0[t]"
line.long 0x4 "PTPAVTPTM10,This register is used to monitor the value of AVTP timer."
hexmask.long 0x4 0.--31. 1. "AVTPP1,AVTP timer value Part 1[t]"
rgroup.long 0x50++0xB
line.long 0x0 "PTPGPTPTM00,This register is used to monitor the value of GPTP timer."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved area" "0,1,2,3"
hexmask.long 0x0 0.--29. 1. "GPTPP0,gPTP timer value Part 0[t]"
line.long 0x4 "PTPGPTPTM10,This register is used to monitor the value of GPTP timer."
hexmask.long 0x4 0.--31. 1. "GPTPP1,gPTP timer value Part 1 [t]"
line.long 0x8 "PTPGPTPTM20,This register is used to monitor the value of GPTP timer."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved area"
hexmask.long.word 0x8 0.--15. 1. "GPTPP2,gPTP timer value Part 2[t]"
group.long 0x60++0x3
line.long 0x0 "PTPTIVC1,"
hexmask.long 0x0 0.--31. 1. "TIV,Timer Increment Value."
group.long 0x70++0xB
line.long 0x0 "PTPTOVC01,This register is used to configure gPTP timer offset."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved area" "0,1,2,3"
hexmask.long 0x0 0.--29. 1. "TOVP0,Timer Offset Value Part 0 [t]"
line.long 0x4 "PTPTOVC11,This register is used to configure gPTP timer offset."
hexmask.long 0x4 0.--31. 1. "TOVP1,Timer Offset Value Part 1 [t]"
line.long 0x8 "PTPTOVC21,This register is used to configure gPTP timer offset."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved area"
hexmask.long.word 0x8 0.--15. 1. "TOVP2,Timer Offset Value Part 2[t]"
rgroup.long 0x80++0x7
line.long 0x0 "PTPAVTPTM01,This register is used to monitor the value of AVTP timer."
hexmask.long 0x0 0.--31. 1. "AVTPP0,AVTP timer value Part 0[t]"
line.long 0x4 "PTPAVTPTM11,This register is used to monitor the value of AVTP timer."
hexmask.long 0x4 0.--31. 1. "AVTPP1,AVTP timer value Part 1[t]"
rgroup.long 0x90++0xB
line.long 0x0 "PTPGPTPTM01,This register is used to monitor the value of GPTP timer."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved area" "0,1,2,3"
hexmask.long 0x0 0.--29. 1. "GPTPP0,gPTP timer value Part 0[t]"
line.long 0x4 "PTPGPTPTM11,This register is used to monitor the value of GPTP timer."
hexmask.long 0x4 0.--31. 1. "GPTPP1,gPTP timer value Part 1 [t]"
line.long 0x8 "PTPGPTPTM21,This register is used to monitor the value of GPTP timer."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved area"
hexmask.long.word 0x8 0.--15. 1. "GPTPP2,gPTP timer value Part 2[t]"
group.long 0x200++0x3
line.long 0x0 "PTPMCCC0,Only 0 can be read"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved area"
bitfld.long 0x0 16. "MCCR,Media Clock Capture Request [m]" "0,1"
newline
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved area"
bitfld.long 0x0 3. "MCTNS,Media capture timer number select [m]" "0,1"
newline
bitfld.long 0x0 2. "MCTTS,Media capture timer type select [m]" "0: Timer value will be captured on gPTP timer,1: Timer values will be captures on AVTP timer"
bitfld.long 0x0 1. "MCNEE,Media capture negative edge enable [m]" "0: Timer value will not be captured on negative..,1: Timer value will be captured on negative edge of.."
newline
bitfld.long 0x0 0. "MCPEE,Media capture positive edge enable [m]" "0: Timer value will not be captured on positive..,1: Timer value will be captured on positive edge of.."
rgroup.long 0x204++0xB
line.long 0x0 "PTPMCCM00,"
hexmask.long 0x0 0.--31. 1. "MCCTVP0,Media Clock Captured Timer Value Part 0[m]"
line.long 0x4 "PTPMCCM10,"
hexmask.long 0x4 0.--31. 1. "MCCTVP1,Media Clock Captured Timer Value Part 1 [m]"
line.long 0x8 "PTPMCCM20,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved area"
bitfld.long 0x8 24.--25. "MCCN,Media Clock Capture Number [m]" "0,1,2,3"
newline
hexmask.long.byte 0x8 19.--23. 1. "Reserved_19,Reserved area"
bitfld.long 0x8 18. "MCSWC,Media Clock SoftWare Captured" "0,1"
newline
bitfld.long 0x8 17. "MCNEC,Media Clock Negative Edge Captured" "0,1"
bitfld.long 0x8 16. "MCPEC,Media Clock Positive Edge Captured" "0,1"
newline
hexmask.long.word 0x8 0.--15. 1. "MCCTVP2,Media Clock Captured Timer Value Part 2[m]"
group.long 0x210++0x3
line.long 0x0 "PTPMCCC1,Only 0 can be read"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved area"
bitfld.long 0x0 16. "MCCR,Media Clock Capture Request [m]" "0,1"
newline
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved area"
bitfld.long 0x0 3. "MCTNS,Media capture timer number select [m]" "0,1"
newline
bitfld.long 0x0 2. "MCTTS,Media capture timer type select [m]" "0: Timer value will be captured on gPTP timer,1: Timer values will be captures on AVTP timer"
bitfld.long 0x0 1. "MCNEE,Media capture negative edge enable [m]" "0: Timer value will not be captured on negative..,1: Timer value will be captured on negative edge of.."
newline
bitfld.long 0x0 0. "MCPEE,Media capture positive edge enable [m]" "0: Timer value will not be captured on positive..,1: Timer value will be captured on positive edge of.."
rgroup.long 0x214++0xB
line.long 0x0 "PTPMCCM01,"
hexmask.long 0x0 0.--31. 1. "MCCTVP0,Media Clock Captured Timer Value Part 0[m]"
line.long 0x4 "PTPMCCM11,"
hexmask.long 0x4 0.--31. 1. "MCCTVP1,Media Clock Captured Timer Value Part 1 [m]"
line.long 0x8 "PTPMCCM21,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved area"
bitfld.long 0x8 24.--25. "MCCN,Media Clock Capture Number [m]" "0,1,2,3"
newline
hexmask.long.byte 0x8 19.--23. 1. "Reserved_19,Reserved area"
bitfld.long 0x8 18. "MCSWC,Media Clock SoftWare Captured" "0,1"
newline
bitfld.long 0x8 17. "MCNEC,Media Clock Negative Edge Captured" "0,1"
bitfld.long 0x8 16. "MCPEC,Media Clock Positive Edge Captured" "0,1"
newline
hexmask.long.word 0x8 0.--15. 1. "MCCTVP2,Media Clock Captured Timer Value Part 2[m]"
group.long 0x300++0x1F
line.long 0x0 "PTPMCRC0,"
hexmask.long.word 0x0 16.--31. 1. "MRPL,Media Recovery Pulse Length"
hexmask.long.word 0x0 3.--15. 1. "Reserved_3,Reserved area"
newline
bitfld.long 0x0 2. "MRTNS,Media Recovery timer number select [m]" "0,1"
bitfld.long 0x0 1. "MRAMS,Media Recovery AVTP Mode select [m]" "0: 64bit-AVTP will be used for comparison,1: 32bit-AVTP will be used for comparison"
newline
bitfld.long 0x0 0. "MRTTS,Media Recovery timer type select [m]" "0: Timer value will be compared to gPTP timer,1: Timer values will be compared to AVTP timer"
line.long 0x4 "PTPMCRTC00,"
hexmask.long 0x4 0.--31. 1. "MRTVP0,Media Recovery Timer Value Part 0[m]"
line.long 0x8 "PTPMCRTC10,"
hexmask.long 0x8 0.--31. 1. "MRTVP1,Media Recovery Timer Value Part 1[m]"
line.long 0xC "PTPMCRTC20,Only 0 can be read"
bitfld.long 0xC 31. "MRBCR,Media Recovery Buffer Clear Request [m]" "0,1"
hexmask.long.word 0xC 21.--30. 1. "Reserved_21,Reserved area"
newline
rbitfld.long 0xC 18.--20. "MCRN,Media Clock Recovery Number [m]" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 16.--17. "MRTTS,Media Recovery Trigger Type [m]" "0: When timer match,1: When timer match,2: When timer match,3: When timer match"
newline
hexmask.long.word 0xC 0.--15. 1. "MRTVP2,Media Recovery Timer Value Part 2[m]"
line.long 0x10 "PTPMCRC1,"
hexmask.long.word 0x10 16.--31. 1. "MRPL,Media Recovery Pulse Length"
hexmask.long.word 0x10 3.--15. 1. "Reserved_3,Reserved area"
newline
bitfld.long 0x10 2. "MRTNS,Media Recovery timer number select [m]" "0,1"
bitfld.long 0x10 1. "MRAMS,Media Recovery AVTP Mode select [m]" "0: 64bit-AVTP will be used for comparison,1: 32bit-AVTP will be used for comparison"
newline
bitfld.long 0x10 0. "MRTTS,Media Recovery timer type select [m]" "0: Timer value will be compared to gPTP timer,1: Timer values will be compared to AVTP timer"
line.long 0x14 "PTPMCRTC01,"
hexmask.long 0x14 0.--31. 1. "MRTVP0,Media Recovery Timer Value Part 0[m]"
line.long 0x18 "PTPMCRTC11,"
hexmask.long 0x18 0.--31. 1. "MRTVP1,Media Recovery Timer Value Part 1[m]"
line.long 0x1C "PTPMCRTC21,Only 0 can be read"
bitfld.long 0x1C 31. "MRBCR,Media Recovery Buffer Clear Request [m]" "0,1"
hexmask.long.word 0x1C 21.--30. 1. "Reserved_21,Reserved area"
newline
rbitfld.long 0x1C 18.--20. "MCRN,Media Clock Recovery Number [m]" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 16.--17. "MRTTS,Media Recovery Trigger Type [m]" "0: When timer match,1: When timer match,2: When timer match,3: When timer match"
newline
hexmask.long.word 0x1C 0.--15. 1. "MRTVP2,Media Recovery Timer Value Part 2[m]"
group.long 0x400++0x7
line.long 0x0 "PTPMCPC0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved area"
bitfld.long 0x0 1. "MRS,Media Recovery Select [p]" "0,1"
newline
bitfld.long 0x0 0. "PE,Pin Enable [p]" "0: MEDIA_OUT[p] fixed to 0,1: MEDIA_OUT[p] output the comparison result of.."
line.long 0x4 "PTPMCPC1,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved area"
bitfld.long 0x4 1. "MRS,Media Recovery Select [p]" "0,1"
newline
bitfld.long 0x4 0. "PE,Pin Enable [p]" "0: MEDIA_OUT[p] fixed to 0,1: MEDIA_OUT[p] output the comparison result of.."
group.long 0x500++0x3F
line.long 0x0 "PTPCCC00,"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved area"
bitfld.long 0x0 4. "CCOPS,Cyclic Compare Output Pin Select" "0,1"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved area" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "CCTNS,Cyclic Compare timer number select [c]" "0,1"
line.long 0x4 "PTPCCC10,"
hexmask.long 0x4 0.--31. 1. "CCV,Cycle Compare Value [c]"
line.long 0x8 "PTPCCC01,"
hexmask.long 0x8 5.--31. 1. "Reserved_5,Reserved area"
bitfld.long 0x8 4. "CCOPS,Cyclic Compare Output Pin Select" "0,1"
newline
rbitfld.long 0x8 1.--3. "Reserved_1,Reserved area" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0. "CCTNS,Cyclic Compare timer number select [c]" "0,1"
line.long 0xC "PTPCCC11,"
hexmask.long 0xC 0.--31. 1. "CCV,Cycle Compare Value [c]"
line.long 0x10 "PTPCCC02,"
hexmask.long 0x10 5.--31. 1. "Reserved_5,Reserved area"
bitfld.long 0x10 4. "CCOPS,Cyclic Compare Output Pin Select" "0,1"
newline
rbitfld.long 0x10 1.--3. "Reserved_1,Reserved area" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 0. "CCTNS,Cyclic Compare timer number select [c]" "0,1"
line.long 0x14 "PTPCCC12,"
hexmask.long 0x14 0.--31. 1. "CCV,Cycle Compare Value [c]"
line.long 0x18 "PTPCCC03,"
hexmask.long 0x18 5.--31. 1. "Reserved_5,Reserved area"
bitfld.long 0x18 4. "CCOPS,Cyclic Compare Output Pin Select" "0,1"
newline
rbitfld.long 0x18 1.--3. "Reserved_1,Reserved area" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 0. "CCTNS,Cyclic Compare timer number select [c]" "0,1"
line.long 0x1C "PTPCCC13,"
hexmask.long 0x1C 0.--31. 1. "CCV,Cycle Compare Value [c]"
line.long 0x20 "PTPCCC04,"
hexmask.long 0x20 5.--31. 1. "Reserved_5,Reserved area"
bitfld.long 0x20 4. "CCOPS,Cyclic Compare Output Pin Select" "0,1"
newline
rbitfld.long 0x20 1.--3. "Reserved_1,Reserved area" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 0. "CCTNS,Cyclic Compare timer number select [c]" "0,1"
line.long 0x24 "PTPCCC14,"
hexmask.long 0x24 0.--31. 1. "CCV,Cycle Compare Value [c]"
line.long 0x28 "PTPCCC05,"
hexmask.long 0x28 5.--31. 1. "Reserved_5,Reserved area"
bitfld.long 0x28 4. "CCOPS,Cyclic Compare Output Pin Select" "0,1"
newline
rbitfld.long 0x28 1.--3. "Reserved_1,Reserved area" "0,1,2,3,4,5,6,7"
bitfld.long 0x28 0. "CCTNS,Cyclic Compare timer number select [c]" "0,1"
line.long 0x2C "PTPCCC15,"
hexmask.long 0x2C 0.--31. 1. "CCV,Cycle Compare Value [c]"
line.long 0x30 "PTPCCC06,"
hexmask.long 0x30 5.--31. 1. "Reserved_5,Reserved area"
bitfld.long 0x30 4. "CCOPS,Cyclic Compare Output Pin Select" "0,1"
newline
rbitfld.long 0x30 1.--3. "Reserved_1,Reserved area" "0,1,2,3,4,5,6,7"
bitfld.long 0x30 0. "CCTNS,Cyclic Compare timer number select [c]" "0,1"
line.long 0x34 "PTPCCC16,"
hexmask.long 0x34 0.--31. 1. "CCV,Cycle Compare Value [c]"
line.long 0x38 "PTPCCC07,"
hexmask.long 0x38 5.--31. 1. "Reserved_5,Reserved area"
bitfld.long 0x38 4. "CCOPS,Cyclic Compare Output Pin Select" "0,1"
newline
rbitfld.long 0x38 1.--3. "Reserved_1,Reserved area" "0,1,2,3,4,5,6,7"
bitfld.long 0x38 0. "CCTNS,Cyclic Compare timer number select [c]" "0,1"
line.long 0x3C "PTPCCC17,"
hexmask.long 0x3C 0.--31. 1. "CCV,Cycle Compare Value [c]"
group.long 0x700++0xB
line.long 0x0 "PTPIS0,"
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved area"
bitfld.long 0x0 16.--17. "MCCOES,Media Clock Capture Overflow Error Status [m]" "0,1,2,3"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved area"
bitfld.long 0x0 0.--1. "MCCS,Media Clock Capture Status [m]" "0,1,2,3"
line.long 0x4 "PTPIE0,"
hexmask.long.word 0x4 18.--31. 1. "Reserved_18,Reserved area"
bitfld.long 0x4 16.--17. "MCCOEE,Media Clock Capture Overflow Error Enable" "0: Interrupt [m] disabled,1: Interrupt [m] enabled,?,?"
newline
hexmask.long.word 0x4 2.--15. 1. "Reserved_2,Reserved area"
bitfld.long 0x4 0.--1. "MCCE,Media Clock Capture Enable" "0: Interrupt [m] disabled,1: Interrupt [m] enabled,?,?"
line.long 0x8 "PTPID0,Only 0 can be read"
hexmask.long.word 0x8 18.--31. 1. "Reserved_18,Reserved area"
bitfld.long 0x8 16.--17. "MCCOED,Media Clock Capture Overflow Error Disable" "0,1,2,3"
newline
hexmask.long.word 0x8 2.--15. 1. "Reserved_2,Reserved area"
bitfld.long 0x8 0.--1. "MCCD,Media Clock Capture Disable" "0,1,2,3"
group.long 0x710++0xB
line.long 0x0 "PTPIS1,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved area"
bitfld.long 0x0 0.--1. "MCRMS,Media Clock Recovery Match Status" "0,1,2,3"
line.long 0x4 "PTPIE1,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved area"
bitfld.long 0x4 0.--1. "MCRME,Media Clock Recovery Match Enable" "0: Interrupt m disabled,1: Interrupt m enabled,?,?"
line.long 0x8 "PTPID1,Only 0 can be read"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserved area"
bitfld.long 0x8 0.--1. "MCRMS,Media Clock Recovery Match Disable" "0,1,2,3"
group.long 0x780++0xB
line.long 0x0 "PTPSCR0,This register is set the authorize for secure or non-secure access to other registers"
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved area"
bitfld.long 0x0 16.--17. "MCRSL,Media Capture Register Security Level." "0,1,2,3"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved area"
bitfld.long 0x0 0.--1. "TRSL,Timer Register Security Level." "0,1,2,3"
line.long 0x4 "PTPSCR1,This register is set the authorize for secure or non-secure access to other registers"
hexmask.long.word 0x4 18.--31. 1. "Reserved_18,Reserved area"
bitfld.long 0x4 16.--17. "MRRRSL,Media Recovery Remapping Register Security Level." "0,1,2,3"
newline
hexmask.long.word 0x4 2.--15. 1. "Reserved_2,Reserved area"
bitfld.long 0x4 0.--1. "MRRSL,Media Recovery Register Security Level." "0,1,2,3"
line.long 0x8 "PTPSCR2,This register is set the authorize for secure or non-secure access to other registers"
hexmask.long.word 0x8 17.--31. 1. "Reserved_17,Reserved area"
bitfld.long 0x8 16. "VRSL,Version Register Security Level." "0: Version registers can only be accessed by the..,1: Version registers can be accessed by both APBs"
newline
hexmask.long.byte 0x8 8.--15. 1. "Reserved_8,Reserved area"
hexmask.long.byte 0x8 0.--7. 1. "CCRSL,Cycle Compare Register Security Level."
tree.end
base ad:0x0
tree "RGMII"
tree "RGMII_0"
base ad:0xE6801000
group.long 0x4++0x7
line.long 0x0 "TDCEN0,TDCEN is a 32-bit register that controls the enable/disable of the TDC circuit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "tdcen,TDC circuit enable bit" "0: TDC circuit disable,1: TDC circuit enable"
line.long 0x4 "OFFSET0,OFFSET is a 32-bit register to specify the Offset value for TDC circuit."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "offset,TDC offset delay value setting"
group.long 0x40++0x7
line.long 0x0 "DTCDEC_TX_MANUAL_MODE0,If Manual mode is selected. delay converter result is ignored."
bitfld.long 0x0 31. "tx_manual_sel_mode,TXC DTC tap selection mode" "0: Auto mode,1: Manual mode"
hexmask.long.tbyte 0x0 7.--30. 1. "Reserved_7,Reserved"
hexmask.long.byte 0x0 0.--6. 1. "tx_manual_tap_num,DTC offset delay value setting for TXC."
line.long 0x4 "DTCDEC_TX_CONFIG0,DTCDEC_TX_CONFIG is a 32-bit register to specify the calculation value for delay decoder circuit."
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x4 16.--20. 1. "tx_offset2,Delay decoder offset2 value"
hexmask.long.byte 0x4 8.--15. 1. "tx_mult,Delay decoder dividing value of TDC result"
hexmask.long.byte 0x4 0.--7. 1. "tx_offset1,Delay decoder offset1 value"
group.long 0x80++0x7
line.long 0x0 "DTCDEC_RX_MANUAL_MODE0,DTCDEC_RX_MANUAL_MODE is a 32-bit register to specify delay value of DTC for RXC manually."
bitfld.long 0x0 31. "rx_manual_sel_mode,RXC DTC tap selection mode" "0: Auto mode,1: Manual mode"
hexmask.long.tbyte 0x0 7.--30. 1. "Reserved_7,Reserved"
hexmask.long.byte 0x0 0.--6. 1. "rx_manual_tap_num,DTC offset delay value setting for RXC."
line.long 0x4 "DTCDEC_RX_CONFIG0,"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x4 16.--20. 1. "rx_offset2,Delay decoder offset2 value"
hexmask.long.byte 0x4 8.--15. 1. "rx_mult,Delay decoder dividing value of TDC result"
hexmask.long.byte 0x4 0.--7. 1. "rx_offset1,Delay decoder offset1 value"
group.long 0xA0++0x3
line.long 0x0 "DTDC0,DTDC is a 32-bit register to monitor the measurement result of TDC circuit."
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
hexmask.long.word 0x0 0.--8. 1. "dtdc,TDC measurement result of 1 period."
tree.end
tree "RGMII_1"
base ad:0xE6811000
group.long 0x4++0x7
line.long 0x0 "TDCEN1,TDCEN is a 32-bit register that controls the enable/disable of the TDC circuit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "tdcen,TDC circuit enable bit" "0: TDC circuit disable,1: TDC circuit enable"
line.long 0x4 "OFFSET1,OFFSET is a 32-bit register to specify the Offset value for TDC circuit."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "offset,TDC offset delay value setting"
group.long 0x40++0x7
line.long 0x0 "DTCDEC_TX_MANUAL_MODE1,If Manual mode is selected. delay converter result is ignored."
bitfld.long 0x0 31. "tx_manual_sel_mode,TXC DTC tap selection mode" "0: Auto mode,1: Manual mode"
hexmask.long.tbyte 0x0 7.--30. 1. "Reserved_7,Reserved"
hexmask.long.byte 0x0 0.--6. 1. "tx_manual_tap_num,DTC offset delay value setting for TXC."
line.long 0x4 "DTCDEC_TX_CONFIG1,DTCDEC_TX_CONFIG is a 32-bit register to specify the calculation value for delay decoder circuit."
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x4 16.--20. 1. "tx_offset2,Delay decoder offset2 value"
hexmask.long.byte 0x4 8.--15. 1. "tx_mult,Delay decoder dividing value of TDC result"
hexmask.long.byte 0x4 0.--7. 1. "tx_offset1,Delay decoder offset1 value"
group.long 0x80++0x7
line.long 0x0 "DTCDEC_RX_MANUAL_MODE1,DTCDEC_RX_MANUAL_MODE is a 32-bit register to specify delay value of DTC for RXC manually."
bitfld.long 0x0 31. "rx_manual_sel_mode,RXC DTC tap selection mode" "0: Auto mode,1: Manual mode"
hexmask.long.tbyte 0x0 7.--30. 1. "Reserved_7,Reserved"
hexmask.long.byte 0x0 0.--6. 1. "rx_manual_tap_num,DTC offset delay value setting for RXC."
line.long 0x4 "DTCDEC_RX_CONFIG1,"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x4 16.--20. 1. "rx_offset2,Delay decoder offset2 value"
hexmask.long.byte 0x4 8.--15. 1. "rx_mult,Delay decoder dividing value of TDC result"
hexmask.long.byte 0x4 0.--7. 1. "rx_offset1,Delay decoder offset1 value"
group.long 0xA0++0x3
line.long 0x0 "DTDC1,DTDC is a 32-bit register to monitor the measurement result of TDC circuit."
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
hexmask.long.word 0x0 0.--8. 1. "dtdc,TDC measurement result of 1 period."
tree.end
tree "RGMII_2"
base ad:0xE6821000
group.long 0x4++0x7
line.long 0x0 "TDCEN2,TDCEN is a 32-bit register that controls the enable/disable of the TDC circuit."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "tdcen,TDC circuit enable bit" "0: TDC circuit disable,1: TDC circuit enable"
line.long 0x4 "OFFSET2,OFFSET is a 32-bit register to specify the Offset value for TDC circuit."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "offset,TDC offset delay value setting"
group.long 0x40++0x7
line.long 0x0 "DTCDEC_TX_MANUAL_MODE2,If Manual mode is selected. delay converter result is ignored."
bitfld.long 0x0 31. "tx_manual_sel_mode,TXC DTC tap selection mode" "0: Auto mode,1: Manual mode"
hexmask.long.tbyte 0x0 7.--30. 1. "Reserved_7,Reserved"
hexmask.long.byte 0x0 0.--6. 1. "tx_manual_tap_num,DTC offset delay value setting for TXC."
line.long 0x4 "DTCDEC_TX_CONFIG2,DTCDEC_TX_CONFIG is a 32-bit register to specify the calculation value for delay decoder circuit."
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x4 16.--20. 1. "tx_offset2,Delay decoder offset2 value"
hexmask.long.byte 0x4 8.--15. 1. "tx_mult,Delay decoder dividing value of TDC result"
hexmask.long.byte 0x4 0.--7. 1. "tx_offset1,Delay decoder offset1 value"
group.long 0x80++0x7
line.long 0x0 "DTCDEC_RX_MANUAL_MODE2,DTCDEC_RX_MANUAL_MODE is a 32-bit register to specify delay value of DTC for RXC manually."
bitfld.long 0x0 31. "rx_manual_sel_mode,RXC DTC tap selection mode" "0: Auto mode,1: Manual mode"
hexmask.long.tbyte 0x0 7.--30. 1. "Reserved_7,Reserved"
hexmask.long.byte 0x0 0.--6. 1. "rx_manual_tap_num,DTC offset delay value setting for RXC."
line.long 0x4 "DTCDEC_RX_CONFIG2,"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x4 16.--20. 1. "rx_offset2,Delay decoder offset2 value"
hexmask.long.byte 0x4 8.--15. 1. "rx_mult,Delay decoder dividing value of TDC result"
hexmask.long.byte 0x4 0.--7. 1. "rx_offset1,Delay decoder offset1 value"
group.long 0xA0++0x3
line.long 0x0 "DTDC2,DTDC is a 32-bit register to monitor the measurement result of TDC circuit."
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
hexmask.long.word 0x0 0.--8. 1. "dtdc,TDC measurement result of 1 period."
tree.end
tree.end
tree.end
tree "FCP (Frame Compression Processor)"
base ad:0x0
tree "FCP_0"
base ad:0xFEA10000
rgroup.long 0x0++0x3
line.long 0x0 "FCP_VCR0,FCP_VCR is the version control register of the FCPV. The value read is fixed."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "CATEGORY,FCP use case category."
hexmask.long.byte 0x0 0.--7. 1. "REVISION,Version of LSI product"
group.long 0x10++0x3
line.long 0x0 "FCP_RST0,FCP_RST: FCP Reset Register"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "MODRST,FCPV MODule ReSeT" "0: NOP,1: Forcibly terminate the FCPV operation"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SOFTRST,FCPV SOFT ReSeT" "0: NOP,1: Terminates the FCPV operation"
rgroup.long 0x18++0x3
line.long 0x0 "FCP_STA0,FCP_STA indicates the FCPV status."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ACT,FCPV Active Flag" "0: Indicates the FCPV is not active,1: Indicates the FCPV is active"
tree.end
tree "FCP_1"
base ad:0xFEA11000
rgroup.long 0x0++0x3
line.long 0x0 "FCP_VCR1,FCP_VCR is the version control register of the FCPV. The value read is fixed."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "CATEGORY,FCP use case category."
hexmask.long.byte 0x0 0.--7. 1. "REVISION,Version of LSI product"
group.long 0x10++0x3
line.long 0x0 "FCP_RST1,FCP_RST: FCP Reset Register"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "MODRST,FCPV MODule ReSeT" "0: NOP,1: Forcibly terminate the FCPV operation"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SOFTRST,FCPV SOFT ReSeT" "0: NOP,1: Terminates the FCPV operation"
rgroup.long 0x18++0x3
line.long 0x0 "FCP_STA1,FCP_STA indicates the FCPV status."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ACT,FCPV Active Flag" "0: Indicates the FCPV is not active,1: Indicates the FCPV is active"
tree.end
tree "FCP_2"
base ad:0xFEDB0000
rgroup.long 0x0++0x3
line.long 0x0 "FCP_VCR2,FCP_VCR is the version control register of the FCPV. The value read is fixed."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "CATEGORY,FCP use case category."
hexmask.long.byte 0x0 0.--7. 1. "REVISION,Version of LSI product"
group.long 0x10++0x3
line.long 0x0 "FCP_RST2,FCP_RST: FCP Reset Register"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "MODRST,FCPV MODule ReSeT" "0: NOP,1: Forcibly terminate the FCPV operation"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SOFTRST,FCPV SOFT ReSeT" "0: NOP,1: Terminates the FCPV operation"
rgroup.long 0x18++0x3
line.long 0x0 "FCP_STA2,FCP_STA indicates the FCPV status."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ACT,FCPV Active Flag" "0: Indicates the FCPV is not active,1: Indicates the FCPV is active"
tree.end
tree "FCP_3"
base ad:0xFEDB8000
rgroup.long 0x0++0x3
line.long 0x0 "FCP_VCR3,FCP_VCR is the version control register of the FCPV. The value read is fixed."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "CATEGORY,FCP use case category."
hexmask.long.byte 0x0 0.--7. 1. "REVISION,Version of LSI product"
group.long 0x10++0x3
line.long 0x0 "FCP_RST3,FCP_RST: FCP Reset Register"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "MODRST,FCPV MODule ReSeT" "0: NOP,1: Forcibly terminate the FCPV operation"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "SOFTRST,FCPV SOFT ReSeT" "0: NOP,1: Terminates the FCPV operation"
rgroup.long 0x18++0x3
line.long 0x0 "FCP_STA3,FCP_STA indicates the FCPV status."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ACT,FCPV Active Flag" "0: Indicates the FCPV is not active,1: Indicates the FCPV is active"
tree.end
tree.end
tree "FCPR (Data Compression Processor)"
base ad:0x0
tree "FCPR_0"
base ad:0xE67A3000
rgroup.long 0xC++0x3
line.long 0x0 "FCPRC_VID,FCPRC_VID is identification information register of the FCPRC. The read value is fixed."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "VCID,Identification number (FCP)"
group.long 0x10++0x3
line.long 0x0 "FCPRC_RST,FCPRC_RST controls the FCPRC reset operation. For detailed information. refer to the section 63.3.9."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "FCPRSTF,FCPRC module forced reset." "0: NOP,1: Stop the FCPRC operation"
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved"
group.long 0x1C++0x3
line.long 0x0 "FCPRC_CLK_STOP,FCPRC_CLK_STOP controls the clock stop operation for the FCPRC lossless compression core (COMP)."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CCSTP,COMP Clock Supply Setting." "0: Clock supply begins at when the outstanding..,1: Always supplies the operation clock"
group.long 0x40++0x7
line.long 0x0 "FCPRC_CMP_STA0,FCPRC_CMP_STA0 indicates the FCPRC lossless compression status."
hexmask.long 0x0 0.--31. 1. "TWD,Total amount of write data to compression area in 64-byte unit."
line.long 0x4 "FCPRC_CMP_STA1,FCPRC_CMP_STA1 indicates the FCPRC lossless compression status."
hexmask.long 0x4 0.--31. 1. "TCD,Total amount of compressed data in 64-byte unit."
group.long 0x74++0x3
line.long 0x0 "FCPRC_EDC_STS,FCPRC_EDC_STS indicates the FCPRC error detection status."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CRCERR,CRC error status" "0: no error,1: error occurred"
bitfld.long 0x0 0. "RAMERR,RAM checksum error status" "0: no error,1: error occurred"
group.long 0x80++0x7
line.long 0x0 "FCPRC_BUSEDC_STS,FCPRC_BUSEDC_STS indicates the Bus EDC error detection status. For overview of bus safety mechanisms. refer section 18.5."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "WBSTERR,AXI W channel BstID error status" "0: no error,1: error occurred"
bitfld.long 0x0 8. "BTIDERR,AXI B channel TID error status" "0: no error,1: error occurred"
newline
hexmask.long.byte 0x0 3.--7. 1. "Reserved_3,Reserved"
bitfld.long 0x0 2. "BEDCERR,AXI B channel EDC error status" "0: no error,1: error occurred"
bitfld.long 0x0 1. "WEDCERR,AXI W channel EDC error status" "0: no error,1: error occurred"
newline
bitfld.long 0x0 0. "AWEDCERR,AXI AW channel EDC error status" "0: no error,1: error occurred"
line.long 0x4 "FCPRC_BUSEDC_SRC0,FCPRC_BUSEDC_SRC0 indicates the SrcID of error transaction. For overview of bus safety mechanisms. refer section 18.5."
hexmask.long.byte 0x4 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x4 16.--23. 1. "BSRCID,SrcID of error transaction at B channel"
hexmask.long.byte 0x4 8.--15. 1. "WSRCID,SrcID of error transaction at W channel"
newline
hexmask.long.byte 0x4 0.--7. 1. "AWSRCID,SrcID of error transaction at AW channel"
group.long 0x8C++0x3
line.long 0x0 "FCPRC_BUSEDC_CTL,FCPRC_BUSEDC_CTL controls the error injection mode for the Bus EDC module. For overview of bus safety mechanisms. refer section 18.5."
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved"
bitfld.long 0x0 2. "BERRINJ,Error Injection mode enable at B channel" "0,1"
bitfld.long 0x0 1. "WERRINJ,Error Injection mode enable at W channel" "0,1"
newline
bitfld.long 0x0 0. "AWERRINJ,Error Injection mode enable at AW channel" "0,1"
tree.end
tree "FCPR_1"
base ad:0xE7AB1000
rgroup.long 0xC++0x3
line.long 0x0 "FCPRM_VID,FCPRM_VID is identification information register of the FCPRM. The read value is fixed."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "VCID,Identification number (FCP)"
group.long 0x10++0x3
line.long 0x0 "FCPRM_RST,FCPRM_RST controls the FCPRM reset operation. For detailed information. refer to the section 63.3.9."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "FCPRSTF,FCPRM module forced reset." "0: NOP,1: Stop the FCPRM operation"
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved"
group.long 0x20++0x7
line.long 0x0 "FCPRM_BRST,FCPRM_BRST controls reset operation of the buffer of write data. For detailed information. refer to the section 63.3.6."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "BRSTID9,Reset the buffer of write data of ID9." "0: NOP,1: reset"
bitfld.long 0x0 8. "BRSTID8,Reset the buffer of write data of ID8." "0: NOP,1: reset"
bitfld.long 0x0 7. "BRSTID7,Reset the buffer of write data of ID7." "0: NOP,1: reset"
newline
bitfld.long 0x0 6. "BRSTID6,Reset the buffer of write data of ID6." "0: NOP,1: reset"
bitfld.long 0x0 5. "BRSTID5,Reset the buffer of write data of ID5." "0: NOP,1: reset"
bitfld.long 0x0 4. "BRSTID4,Reset the buffer of write data of ID4." "0: NOP,1: reset"
bitfld.long 0x0 3. "BRSTID3,Reset the buffer of write data of ID3." "0: NOP,1: reset"
newline
bitfld.long 0x0 2. "BRSTID2,Reset the buffer of write data of ID2." "0: NOP,1: reset"
bitfld.long 0x0 1. "BRSTID1,Reset the buffer of write data of ID1." "0: NOP,1: reset"
bitfld.long 0x0 0. "BRSTID0,Reset the buffer of write data of ID0." "0: NOP,1: reset"
line.long 0x4 "FCPRM_BFLS,FCPRM_BFLS controls flush operation for the buffer of write data. For detailed information. refer to the section 63.3.6."
hexmask.long.tbyte 0x4 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x4 9. "BFLSID9,Flush the buffer of write data." "0: not flush,1: flush"
bitfld.long 0x4 8. "BFLSID8,Flush the buffer of write data." "0: not flush,1: flush"
bitfld.long 0x4 7. "BFLSID7,Flush the buffer of write data." "0: not flush,1: flush"
newline
bitfld.long 0x4 6. "BFLSID6,Flush the buffer of write data." "0: not flush,1: flush"
bitfld.long 0x4 5. "BFLSID5,Flush the buffer of write data." "0: not flush,1: flush"
bitfld.long 0x4 4. "BFLSID4,Flush the buffer of write data." "0: not flush,1: flush"
bitfld.long 0x4 3. "BFLSID3,Flush the buffer of write data." "0: not flush,1: flush"
newline
bitfld.long 0x4 2. "BFLSID2,Flush the buffer of write data." "0: not flush,1: flush"
bitfld.long 0x4 1. "BFLSID1,Flush the buffer of write data." "0: not flush,1: flush"
bitfld.long 0x4 0. "BFLSID0,Flush the buffer of write data." "0: not flush,1: flush"
group.long 0x30++0x3
line.long 0x0 "FCPRM_MRG_CTRL,FCPRM_MRG_CTRL controls the FCPRM data merge operation."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "MRGEN,Data mearge enabled." "0: disabled,1: enabled"
group.long 0x74++0x3
line.long 0x0 "FCPRM_EDC_STS,FCPRM_EDC_STS indicates the FCPRM error detection status."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "RAMERR,RAM checksum error status" "0: no error,1: error occurred"
group.long 0x84++0x7
line.long 0x0 "FCPRM_MRG_STADR0,FCPRM_MRG_STADRn specifies the start address of merge enabled area n (n = 0 to 3)."
hexmask.long 0x0 0.--31. 1. "STADR,Start address of merge enabled area n (n = 0 to 3)"
line.long 0x4 "FCPRM_MRG_EDADR0,FCPRM_MRG_EDADRn specifies the end address of merge enabled area n (n = 0 to 3)."
hexmask.long 0x4 0.--31. 1. "EDADR,End address of merge enabled area n (n = 0 to 3)"
group.long 0x94++0x7
line.long 0x0 "FCPRM_MRG_STADR1,FCPRM_MRG_STADRn specifies the start address of merge enabled area n (n = 0 to 3)."
hexmask.long 0x0 0.--31. 1. "STADR,Start address of merge enabled area n (n = 0 to 3)"
line.long 0x4 "FCPRM_MRG_EDADR1,FCPRM_MRG_EDADRn specifies the end address of merge enabled area n (n = 0 to 3)."
hexmask.long 0x4 0.--31. 1. "EDADR,End address of merge enabled area n (n = 0 to 3)"
group.long 0xA4++0x7
line.long 0x0 "FCPRM_MRG_STADR2,FCPRM_MRG_STADRn specifies the start address of merge enabled area n (n = 0 to 3)."
hexmask.long 0x0 0.--31. 1. "STADR,Start address of merge enabled area n (n = 0 to 3)"
line.long 0x4 "FCPRM_MRG_EDADR2,FCPRM_MRG_EDADRn specifies the end address of merge enabled area n (n = 0 to 3)."
hexmask.long 0x4 0.--31. 1. "EDADR,End address of merge enabled area n (n = 0 to 3)"
group.long 0xB4++0x7
line.long 0x0 "FCPRM_MRG_STADR3,FCPRM_MRG_STADRn specifies the start address of merge enabled area n (n = 0 to 3)."
hexmask.long 0x0 0.--31. 1. "STADR,Start address of merge enabled area n (n = 0 to 3)"
line.long 0x4 "FCPRM_MRG_EDADR3,FCPRM_MRG_EDADRn specifies the end address of merge enabled area n (n = 0 to 3)."
hexmask.long 0x4 0.--31. 1. "EDADR,End address of merge enabled area n (n = 0 to 3)"
group.long 0xC0++0x27
line.long 0x0 "FCPRM_ID0,FCPRM_IDn specifies the FCPRM IDn setting (n = 0 to 9). These registers shall be set as shown in Table 63.9."
bitfld.long 0x0 31. "IDVALID,-" "0,1"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 16.--27. 1. "IDPAT,-"
hexmask.long.byte 0x0 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x0 0.--11. 1. "IDMASK,-"
line.long 0x4 "FCPRM_ID1,FCPRM_IDn specifies the FCPRM IDn setting (n = 0 to 9). These registers shall be set as shown in Table 63.9."
bitfld.long 0x4 31. "IDVALID,-" "0,1"
rbitfld.long 0x4 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 16.--27. 1. "IDPAT,-"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "IDMASK,-"
line.long 0x8 "FCPRM_ID2,FCPRM_IDn specifies the FCPRM IDn setting (n = 0 to 9). These registers shall be set as shown in Table 63.9."
bitfld.long 0x8 31. "IDVALID,-" "0,1"
rbitfld.long 0x8 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x8 16.--27. 1. "IDPAT,-"
hexmask.long.byte 0x8 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x8 0.--11. 1. "IDMASK,-"
line.long 0xC "FCPRM_ID3,FCPRM_IDn specifies the FCPRM IDn setting (n = 0 to 9). These registers shall be set as shown in Table 63.9."
bitfld.long 0xC 31. "IDVALID,-" "0,1"
rbitfld.long 0xC 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.word 0xC 16.--27. 1. "IDPAT,-"
hexmask.long.byte 0xC 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "IDMASK,-"
line.long 0x10 "FCPRM_ID4,FCPRM_IDn specifies the FCPRM IDn setting (n = 0 to 9). These registers shall be set as shown in Table 63.9."
bitfld.long 0x10 31. "IDVALID,-" "0,1"
rbitfld.long 0x10 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x10 16.--27. 1. "IDPAT,-"
hexmask.long.byte 0x10 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x10 0.--11. 1. "IDMASK,-"
line.long 0x14 "FCPRM_ID5,FCPRM_IDn specifies the FCPRM IDn setting (n = 0 to 9). These registers shall be set as shown in Table 63.9."
bitfld.long 0x14 31. "IDVALID,-" "0,1"
rbitfld.long 0x14 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x14 16.--27. 1. "IDPAT,-"
hexmask.long.byte 0x14 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x14 0.--11. 1. "IDMASK,-"
line.long 0x18 "FCPRM_ID6,FCPRM_IDn specifies the FCPRM IDn setting (n = 0 to 9). These registers shall be set as shown in Table 63.9."
bitfld.long 0x18 31. "IDVALID,-" "0,1"
rbitfld.long 0x18 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x18 16.--27. 1. "IDPAT,-"
hexmask.long.byte 0x18 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x18 0.--11. 1. "IDMASK,-"
line.long 0x1C "FCPRM_ID7,FCPRM_IDn specifies the FCPRM IDn setting (n = 0 to 9). These registers shall be set as shown in Table 63.9."
bitfld.long 0x1C 31. "IDVALID,-" "0,1"
rbitfld.long 0x1C 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x1C 16.--27. 1. "IDPAT,-"
hexmask.long.byte 0x1C 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x1C 0.--11. 1. "IDMASK,-"
line.long 0x20 "FCPRM_ID8,FCPRM_IDn specifies the FCPRM IDn setting (n = 0 to 9). These registers shall be set as shown in Table 63.9."
bitfld.long 0x20 31. "IDVALID,-" "0,1"
rbitfld.long 0x20 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x20 16.--27. 1. "IDPAT,-"
hexmask.long.byte 0x20 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x20 0.--11. 1. "IDMASK,-"
line.long 0x24 "FCPRM_ID9,FCPRM_IDn specifies the FCPRM IDn setting (n = 0 to 9). These registers shall be set as shown in Table 63.9."
bitfld.long 0x24 31. "IDVALID,-" "0,1"
rbitfld.long 0x24 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x24 16.--27. 1. "IDPAT,-"
hexmask.long.byte 0x24 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x24 0.--11. 1. "IDMASK,-"
tree.end
tree "FCPR_2"
base ad:0xE6785700
group.long 0x30++0x3
line.long 0x0 "FCPR_CMP_CTRL,FCPR_CMP_CTRL controls the FCPR lossless compression operation."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CMPEN,Lossless compression enabled." "0: disabled,1: enabled"
group.long 0x80++0xB
line.long 0x0 "FCPR_CMP_SPACE,FCPR_CMP_SPACE specifies the index of 4G-byte space for FCPR_CMP_STADR/FCPR_CMP_EDADR."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SPACE,Index of 4G-byte space for FCPR_CMP_STADR/FCPR_CMP_EDADR."
line.long 0x4 "FCPR_CMP_STADR,FCPR_CMP_STADR specifies the start address of compression enabled area."
hexmask.long 0x4 0.--31. 1. "STADR,Start address of compression enabled area"
line.long 0x8 "FCPR_CMP_EDADR,FCPR_CMP_EDADR specifies the end address of compression enabled area."
hexmask.long 0x8 0.--31. 1. "EDADR,End address of compression enabled area"
tree.end
tree.end
tree "HSSTP (High Speed Serial Trace Port)"
base ad:0xF8220000
group.long 0x540++0x7
line.long 0x0 "PCSR2,"
bitfld.long 0x0 29.--31. "Reserved0,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 28. "Reserved1,Reserved" "0,1"
hexmask.long.byte 0x0 24.--27. 1. "Reserved2,Reserved"
bitfld.long 0x0 22.--23. "Reserved3,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--21. 1. "CC_DURATION,The output period of Clock Compensation"
hexmask.long.word 0x0 0.--15. 1. "Reserved4,Reserved"
line.long 0x4 "TXFLR,"
hexmask.long.word 0x4 16.--31. 1. "Reserved,Reserved"
hexmask.long.word 0x4 0.--15. 1. "TX_FRAME_LENGTH,The frame length of Aurora frame"
group.long 0x550++0x3
line.long 0x0 "MCR,"
hexmask.long 0x0 6.--31. 1. "Reserved0,Reserved for future use."
bitfld.long 0x0 4.--5. "ECP_lane_select,Bsingle_quotation00: ECP is output from Lane0. (Set this value when CRC is embedded.)" "0,1,2,3"
bitfld.long 0x0 3. "CRC_octets,Bsingle_quotation0: (Set this value when CRC is embedded.)" "0,1"
bitfld.long 0x0 2. "CRC_EN,Bsingle_quotation0: CRC is not embedded in trace data frame." "0,1"
newline
bitfld.long 0x0 0.--1. "Reserved1,Reserved." "0,1,2,3"
group.long 0x558++0x3
line.long 0x0 "PLMR,"
hexmask.long 0x0 1.--31. 1. "Reserved,Reserved for future use."
bitfld.long 0x0 0. "LTS,[R-Car V4M]" "0,1"
group.long 0x5C0++0x3
line.long 0x0 "TSSR,"
hexmask.long 0x0 4.--31. 1. "Reserved,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "Trace_Source_Select,Trace source selection"
group.long 0x630++0x3
line.long 0x0 "APCR,"
rbitfld.long 0x0 29.--31. "Reserved0,Reserved for future use." "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 24.--28. 1. "Reserved1,Reserved for future use."
hexmask.long.byte 0x0 17.--23. 1. "Reserved2,Reserved for future use."
bitfld.long 0x0 16. "Reserved3,Reserved for future use." "0,1"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved4,Reserved for future use."
bitfld.long 0x0 8. "Reserved5,Reserved for future use." "0,1"
hexmask.long.byte 0x0 4.--7. 1. "Reserved6,Reserved for future use."
bitfld.long 0x0 3. "TISDREN,[R-Car V4M]" "0: Disabled,1: Enabled"
newline
rbitfld.long 0x0 0.--2. "Reserved7,Reserved for future use." "0,1,2,3,4,5,6,7"
rgroup.long 0x638++0x3
line.long 0x0 "APSR,"
hexmask.long 0x0 1.--31. 1. "Reserved,Reserved for future use."
bitfld.long 0x0 0. "COSPLOCK,PLL Lock Detect" "0: Unlocked,1: Locked"
tree.end
tree "I2C (I2C Bus Interface)"
base ad:0x0
tree "I2C_0"
base ad:0xE6500000
group.long 0x0++0x23
line.long 0x0 "ICSCR0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "SCSS,Slave Clock Stretch Select" "0: Clock Stretch is in front of Acknowledgement,1: Clock Stretch is next to Non Acknowledgement"
bitfld.long 0x0 3. "SDBS,Slave Data Buffer Select" "0: Setting prohibited,1: Single-buffer mode"
newline
bitfld.long 0x0 2. "SIE,Slave Interface Enable" "0,1"
bitfld.long 0x0 1. "GCAE,General Call Acknowledgement Enable" "0,1"
newline
bitfld.long 0x0 0. "FNA,Forced Non Acknowledgement" "0,1"
line.long 0x4 "ICMCR0,All 0. except bits 30. 29. 22. 21. 14 and 13. in which case. initial value is undefined."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x4 7. "MDBS,Master Data Buffer Select" "0: Setting prohibited,1: Single-buffer mode"
newline
bitfld.long 0x4 6. "FSCL,Forced SCL" "0,1"
bitfld.long 0x4 5. "FSDA,Forced SDA" "0,1"
newline
bitfld.long 0x4 4. "OBPC,Override Bus Pin Control" "0,1"
bitfld.long 0x4 3. "MIE,Master Interface Enable" "0,1"
newline
bitfld.long 0x4 2. "TSBE,Start Byte Transmission Enable" "0,1"
bitfld.long 0x4 1. "FSB,Forced Stop onto the Bus" "0,1"
newline
bitfld.long 0x4 0. "ESG,Enable Start Generation" "0,1"
line.long 0x8 "ICSSR0,Bits 0 to 4 among the status bits in the slave status register are cleared by writing 0 to the respective status bit positions. The individual bits are held 1 until 0 is written to (other than the GCAR and STM bits[n])."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x8 7. "Reserved_7,Reserved" "0,1"
newline
rbitfld.long 0x8 6. "GCAR,General Call Address Received" "0,1"
rbitfld.long 0x8 5. "STM,Slave Transmit Mode" "0,1"
newline
bitfld.long 0x8 4. "SSR,Slave Stop Received" "0,1"
bitfld.long 0x8 3. "SDE,Slave Data Empty" "0,1"
newline
bitfld.long 0x8 2. "SDT,Slave Data Transmitted" "0,1"
bitfld.long 0x8 1. "SDR,Slave Data Received" "0,1"
newline
bitfld.long 0x8 0. "SAR,Slave Address Received" "0,1"
line.long 0xC "ICMSR0,The status bits (bits 0 to 6[n]) in the master status register are cleared by writing 0 to the respective status bit positions. The individual status bits are held 1 until a reset by writing 0 to the appropriate bit position."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0xC 6. "MNR,Master NACK Received" "0,1"
bitfld.long 0xC 5. "MAL,Master Arbitration Lost" "0,1"
newline
bitfld.long 0xC 4. "MST,Master Stop Transmitted" "0,1"
bitfld.long 0xC 3. "MDE,Master Data Empty" "0,1"
newline
bitfld.long 0xC 2. "MDT,Master Data Transmitted" "0,1"
bitfld.long 0xC 1. "MDR,Master Data Received" "0,1"
newline
bitfld.long 0xC 0. "MAT,Master Address Transmitted" "0,1"
line.long 0x10 "ICSIER0,"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "SSRE,Slave Stop Received Interrupt Enable" "0: Disables the SSR interrupt,1: Enables the SSR interrupt"
bitfld.long 0x10 3. "SDEE,Slave Data Empty Interrupt Enable" "0: Disables the SDE interrupt,1: Enables the SDE interrupt"
newline
bitfld.long 0x10 2. "SDTE,Slave Data Transmitted Interrupt Enable" "0: Disables the SDT interrupt,1: Enables the SDT interrupt"
bitfld.long 0x10 1. "SDRE,Slave Data Received Interrupt Enable" "0: Disables the SDR interrupt,1: Enables the SDR interrupt"
newline
bitfld.long 0x10 0. "SARE,Slave Address Received Interrupt Enable" "0: Disables the SAR interrupt,1: Enables the SAR interrupt"
line.long 0x14 "ICMIER0,"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x14 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x14 6. "MNRE,Master NACK Received Interrupt Enable" "0: Disables the MNR interrupt,1: Enables the MNR interrupt"
bitfld.long 0x14 5. "MALE,Master Arbitration Lost Interrupt Enable" "0: Disables the MAL interrupt,1: Enables the MAL interrupt"
newline
bitfld.long 0x14 4. "MSTE,Master Stop Transmitted Interrupt Enable" "0: Disables the MST interrupt,1: Enables the MST interrupt"
bitfld.long 0x14 3. "MDEE,Master Data Empty Interrupt Enable" "0: Disables the MDE interrupt,1: Enables the MDE interrupt"
newline
bitfld.long 0x14 2. "MDTE,Master Data Transmitted Interrupt Enable" "0: Disables the MDT interrupt,1: Enables the MDT interrupt"
bitfld.long 0x14 1. "MDRE,Master Data Received Interrupt Enable" "0: Disables the MDR interrupt,1: Enables the MDR interrupt"
newline
bitfld.long 0x14 0. "MATE,Master Address Transmitted Interrupt Enable" "0: Disables the MAT interrupt,1: Enables the MAT interrupt"
line.long 0x18 "ICCCR0,"
hexmask.long.tbyte 0x18 9.--31. 1. "Reserved_9,Reserved"
hexmask.long.byte 0x18 3.--8. 1. "SCGD,SCL Clock Generation Divider"
newline
bitfld.long 0x18 0.--2. "CDF,Clock Division Factor" "?,1: I2C internal clock frequency calculation,?,?,?,?,?,?"
line.long 0x1C "ICSAR0,"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x1C 7. "Reserved_7,Reserved" "0,1"
newline
hexmask.long.byte 0x1C 0.--6. 1. "SADD0_6_0,Slave Address"
line.long 0x20 "ICMAR0,"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20 1.--7. 1. "SADD1_6_0,Slave Address"
newline
bitfld.long 0x20 0. "STM1,Slave Transfer Mode" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "ICRXD_ICTXD0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "RXD_TXD,Read Receive Data"
group.long 0x28++0x17
line.long 0x0 "ICCCR20,Equation 3: SCL Rate Computation (CDFD = 1. HLSE = 1. and SME = 1)"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "FMPE,FM+ Enable" "0: OD buffer is Standard / Fast mode,1: OD buffer is Fast mode+"
newline
hexmask.long.byte 0x0 3.--6. 1. "Reserved_3,Reserved"
bitfld.long 0x0 2. "CDFD,CDF Disable" "0,1"
newline
bitfld.long 0x0 1. "HLSE,HIGH/LOW Separate Control Enable" "0,1"
bitfld.long 0x0 0. "SME,SCL Mask Enable" "0,1"
line.long 0x4 "ICMPR0,"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "SMD,SCL Mask Division"
line.long 0x8 "ICHPR0,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "SCHD,SCL HIGH Clock Division"
line.long 0xC "ICLPR0,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "SCLD,SCL LOW Clock Division"
line.long 0x10 "ICFBSCR0,Note: The delay time of the 1st data bit between SDA and SCL was calculated as below Table 107.5:"
rbitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x10 24.--28. 1. "SRFBSC_4_0,Setting the delay time of the 1st data bit between SDA and SCL."
newline
rbitfld.long 0x10 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x10 16.--20. 1. "STFBSC_4_0,Setting the delay time of the 1st data bit between SDA and SCL."
newline
hexmask.long.word 0x10 5.--15. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x10 0.--4. 1. "FBSC_4_0,Setting the delay time of the 1st data bit between SDA and SCL"
line.long 0x14 "ICDMAER0,"
hexmask.long.byte 0x14 24.--31. 1. "MDMACTSZ,DMA Master Continuous mode Transfer Size"
hexmask.long.byte 0x14 16.--23. 1. "RMDMATSZ,DMA Master Continuous Received mode 1unit Transfer Size register."
newline
hexmask.long.byte 0x14 8.--15. 1. "TMDMATSZ,DMA Master Continuous Transmitted mode 1unit Transfer Size register."
bitfld.long 0x14 7. "TMDMACE,DMA Master Continuous Transmitted Enable" "0: Disables DMA Continuous Transmitted mode,1: Enables DMA Continuous Transmitted mode"
newline
bitfld.long 0x14 6. "RMDMACE,DMA Master Continuous Received Enable" "0: Disables DMA Continuous Received mode,1: Enables DMA Continuous Received mode"
rbitfld.long 0x14 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x14 3. "RSDMAE,DMA Slave Received Enable" "0: Disables DMA Slave Received Mode,1: Enables DMA Slave Received Mode"
bitfld.long 0x14 2. "TSDMAE,DMA Slave Transmitted Enable" "0: Disables DMA Slave Transmitted Mode,1: Enables DMA Slave Transmitted Mode"
newline
bitfld.long 0x14 1. "RMDMAE,DMA Master Received Enable" "0: Disables DMA Master Received Mode,1: Enables DMA Master Received Mode"
bitfld.long 0x14 0. "TMDMAE,DMA Master Transmitted Enable" "0: Disables DMA Master Transmitted Mode,1: Enables DMA Master Transmitted Mode"
tree.end
tree "I2C_1"
base ad:0xE6508000
group.long 0x0++0x23
line.long 0x0 "ICSCR1,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "SCSS,Slave Clock Stretch Select" "0: Clock Stretch is in front of Acknowledgement,1: Clock Stretch is next to Non Acknowledgement"
bitfld.long 0x0 3. "SDBS,Slave Data Buffer Select" "0: Setting prohibited,1: Single-buffer mode"
newline
bitfld.long 0x0 2. "SIE,Slave Interface Enable" "0,1"
bitfld.long 0x0 1. "GCAE,General Call Acknowledgement Enable" "0,1"
newline
bitfld.long 0x0 0. "FNA,Forced Non Acknowledgement" "0,1"
line.long 0x4 "ICMCR1,All 0. except bits 30. 29. 22. 21. 14 and 13. in which case. initial value is undefined."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x4 7. "MDBS,Master Data Buffer Select" "0: Setting prohibited,1: Single-buffer mode"
newline
bitfld.long 0x4 6. "FSCL,Forced SCL" "0,1"
bitfld.long 0x4 5. "FSDA,Forced SDA" "0,1"
newline
bitfld.long 0x4 4. "OBPC,Override Bus Pin Control" "0,1"
bitfld.long 0x4 3. "MIE,Master Interface Enable" "0,1"
newline
bitfld.long 0x4 2. "TSBE,Start Byte Transmission Enable" "0,1"
bitfld.long 0x4 1. "FSB,Forced Stop onto the Bus" "0,1"
newline
bitfld.long 0x4 0. "ESG,Enable Start Generation" "0,1"
line.long 0x8 "ICSSR1,Bits 0 to 4 among the status bits in the slave status register are cleared by writing 0 to the respective status bit positions. The individual bits are held 1 until 0 is written to (other than the GCAR and STM bits[n])."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x8 7. "Reserved_7,Reserved" "0,1"
newline
rbitfld.long 0x8 6. "GCAR,General Call Address Received" "0,1"
rbitfld.long 0x8 5. "STM,Slave Transmit Mode" "0,1"
newline
bitfld.long 0x8 4. "SSR,Slave Stop Received" "0,1"
bitfld.long 0x8 3. "SDE,Slave Data Empty" "0,1"
newline
bitfld.long 0x8 2. "SDT,Slave Data Transmitted" "0,1"
bitfld.long 0x8 1. "SDR,Slave Data Received" "0,1"
newline
bitfld.long 0x8 0. "SAR,Slave Address Received" "0,1"
line.long 0xC "ICMSR1,The status bits (bits 0 to 6[n]) in the master status register are cleared by writing 0 to the respective status bit positions. The individual status bits are held 1 until a reset by writing 0 to the appropriate bit position."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0xC 6. "MNR,Master NACK Received" "0,1"
bitfld.long 0xC 5. "MAL,Master Arbitration Lost" "0,1"
newline
bitfld.long 0xC 4. "MST,Master Stop Transmitted" "0,1"
bitfld.long 0xC 3. "MDE,Master Data Empty" "0,1"
newline
bitfld.long 0xC 2. "MDT,Master Data Transmitted" "0,1"
bitfld.long 0xC 1. "MDR,Master Data Received" "0,1"
newline
bitfld.long 0xC 0. "MAT,Master Address Transmitted" "0,1"
line.long 0x10 "ICSIER1,"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "SSRE,Slave Stop Received Interrupt Enable" "0: Disables the SSR interrupt,1: Enables the SSR interrupt"
bitfld.long 0x10 3. "SDEE,Slave Data Empty Interrupt Enable" "0: Disables the SDE interrupt,1: Enables the SDE interrupt"
newline
bitfld.long 0x10 2. "SDTE,Slave Data Transmitted Interrupt Enable" "0: Disables the SDT interrupt,1: Enables the SDT interrupt"
bitfld.long 0x10 1. "SDRE,Slave Data Received Interrupt Enable" "0: Disables the SDR interrupt,1: Enables the SDR interrupt"
newline
bitfld.long 0x10 0. "SARE,Slave Address Received Interrupt Enable" "0: Disables the SAR interrupt,1: Enables the SAR interrupt"
line.long 0x14 "ICMIER1,"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x14 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x14 6. "MNRE,Master NACK Received Interrupt Enable" "0: Disables the MNR interrupt,1: Enables the MNR interrupt"
bitfld.long 0x14 5. "MALE,Master Arbitration Lost Interrupt Enable" "0: Disables the MAL interrupt,1: Enables the MAL interrupt"
newline
bitfld.long 0x14 4. "MSTE,Master Stop Transmitted Interrupt Enable" "0: Disables the MST interrupt,1: Enables the MST interrupt"
bitfld.long 0x14 3. "MDEE,Master Data Empty Interrupt Enable" "0: Disables the MDE interrupt,1: Enables the MDE interrupt"
newline
bitfld.long 0x14 2. "MDTE,Master Data Transmitted Interrupt Enable" "0: Disables the MDT interrupt,1: Enables the MDT interrupt"
bitfld.long 0x14 1. "MDRE,Master Data Received Interrupt Enable" "0: Disables the MDR interrupt,1: Enables the MDR interrupt"
newline
bitfld.long 0x14 0. "MATE,Master Address Transmitted Interrupt Enable" "0: Disables the MAT interrupt,1: Enables the MAT interrupt"
line.long 0x18 "ICCCR1,"
hexmask.long.tbyte 0x18 9.--31. 1. "Reserved_9,Reserved"
hexmask.long.byte 0x18 3.--8. 1. "SCGD,SCL Clock Generation Divider"
newline
bitfld.long 0x18 0.--2. "CDF,Clock Division Factor" "?,1: I2C internal clock frequency calculation,?,?,?,?,?,?"
line.long 0x1C "ICSAR1,"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x1C 7. "Reserved_7,Reserved" "0,1"
newline
hexmask.long.byte 0x1C 0.--6. 1. "SADD0_6_0,Slave Address"
line.long 0x20 "ICMAR1,"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20 1.--7. 1. "SADD1_6_0,Slave Address"
newline
bitfld.long 0x20 0. "STM1,Slave Transfer Mode" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "ICRXD_ICTXD1,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "RXD_TXD,Read Receive Data"
group.long 0x28++0x17
line.long 0x0 "ICCCR21,Equation 3: SCL Rate Computation (CDFD = 1. HLSE = 1. and SME = 1)"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "FMPE,FM+ Enable" "0: OD buffer is Standard / Fast mode,1: OD buffer is Fast mode+"
newline
hexmask.long.byte 0x0 3.--6. 1. "Reserved_3,Reserved"
bitfld.long 0x0 2. "CDFD,CDF Disable" "0,1"
newline
bitfld.long 0x0 1. "HLSE,HIGH/LOW Separate Control Enable" "0,1"
bitfld.long 0x0 0. "SME,SCL Mask Enable" "0,1"
line.long 0x4 "ICMPR1,"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "SMD,SCL Mask Division"
line.long 0x8 "ICHPR1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "SCHD,SCL HIGH Clock Division"
line.long 0xC "ICLPR1,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "SCLD,SCL LOW Clock Division"
line.long 0x10 "ICFBSCR1,Note: The delay time of the 1st data bit between SDA and SCL was calculated as below Table 107.5:"
rbitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x10 24.--28. 1. "SRFBSC_4_0,Setting the delay time of the 1st data bit between SDA and SCL."
newline
rbitfld.long 0x10 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x10 16.--20. 1. "STFBSC_4_0,Setting the delay time of the 1st data bit between SDA and SCL."
newline
hexmask.long.word 0x10 5.--15. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x10 0.--4. 1. "FBSC_4_0,Setting the delay time of the 1st data bit between SDA and SCL"
line.long 0x14 "ICDMAER1,"
hexmask.long.byte 0x14 24.--31. 1. "MDMACTSZ,DMA Master Continuous mode Transfer Size"
hexmask.long.byte 0x14 16.--23. 1. "RMDMATSZ,DMA Master Continuous Received mode 1unit Transfer Size register."
newline
hexmask.long.byte 0x14 8.--15. 1. "TMDMATSZ,DMA Master Continuous Transmitted mode 1unit Transfer Size register."
bitfld.long 0x14 7. "TMDMACE,DMA Master Continuous Transmitted Enable" "0: Disables DMA Continuous Transmitted mode,1: Enables DMA Continuous Transmitted mode"
newline
bitfld.long 0x14 6. "RMDMACE,DMA Master Continuous Received Enable" "0: Disables DMA Continuous Received mode,1: Enables DMA Continuous Received mode"
rbitfld.long 0x14 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x14 3. "RSDMAE,DMA Slave Received Enable" "0: Disables DMA Slave Received Mode,1: Enables DMA Slave Received Mode"
bitfld.long 0x14 2. "TSDMAE,DMA Slave Transmitted Enable" "0: Disables DMA Slave Transmitted Mode,1: Enables DMA Slave Transmitted Mode"
newline
bitfld.long 0x14 1. "RMDMAE,DMA Master Received Enable" "0: Disables DMA Master Received Mode,1: Enables DMA Master Received Mode"
bitfld.long 0x14 0. "TMDMAE,DMA Master Transmitted Enable" "0: Disables DMA Master Transmitted Mode,1: Enables DMA Master Transmitted Mode"
tree.end
tree "I2C_2"
base ad:0xE6510000
group.long 0x0++0x23
line.long 0x0 "ICSCR2,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "SCSS,Slave Clock Stretch Select" "0: Clock Stretch is in front of Acknowledgement,1: Clock Stretch is next to Non Acknowledgement"
bitfld.long 0x0 3. "SDBS,Slave Data Buffer Select" "0: Setting prohibited,1: Single-buffer mode"
newline
bitfld.long 0x0 2. "SIE,Slave Interface Enable" "0,1"
bitfld.long 0x0 1. "GCAE,General Call Acknowledgement Enable" "0,1"
newline
bitfld.long 0x0 0. "FNA,Forced Non Acknowledgement" "0,1"
line.long 0x4 "ICMCR2,All 0. except bits 30. 29. 22. 21. 14 and 13. in which case. initial value is undefined."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x4 7. "MDBS,Master Data Buffer Select" "0: Setting prohibited,1: Single-buffer mode"
newline
bitfld.long 0x4 6. "FSCL,Forced SCL" "0,1"
bitfld.long 0x4 5. "FSDA,Forced SDA" "0,1"
newline
bitfld.long 0x4 4. "OBPC,Override Bus Pin Control" "0,1"
bitfld.long 0x4 3. "MIE,Master Interface Enable" "0,1"
newline
bitfld.long 0x4 2. "TSBE,Start Byte Transmission Enable" "0,1"
bitfld.long 0x4 1. "FSB,Forced Stop onto the Bus" "0,1"
newline
bitfld.long 0x4 0. "ESG,Enable Start Generation" "0,1"
line.long 0x8 "ICSSR2,Bits 0 to 4 among the status bits in the slave status register are cleared by writing 0 to the respective status bit positions. The individual bits are held 1 until 0 is written to (other than the GCAR and STM bits[n])."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x8 7. "Reserved_7,Reserved" "0,1"
newline
rbitfld.long 0x8 6. "GCAR,General Call Address Received" "0,1"
rbitfld.long 0x8 5. "STM,Slave Transmit Mode" "0,1"
newline
bitfld.long 0x8 4. "SSR,Slave Stop Received" "0,1"
bitfld.long 0x8 3. "SDE,Slave Data Empty" "0,1"
newline
bitfld.long 0x8 2. "SDT,Slave Data Transmitted" "0,1"
bitfld.long 0x8 1. "SDR,Slave Data Received" "0,1"
newline
bitfld.long 0x8 0. "SAR,Slave Address Received" "0,1"
line.long 0xC "ICMSR2,The status bits (bits 0 to 6[n]) in the master status register are cleared by writing 0 to the respective status bit positions. The individual status bits are held 1 until a reset by writing 0 to the appropriate bit position."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0xC 6. "MNR,Master NACK Received" "0,1"
bitfld.long 0xC 5. "MAL,Master Arbitration Lost" "0,1"
newline
bitfld.long 0xC 4. "MST,Master Stop Transmitted" "0,1"
bitfld.long 0xC 3. "MDE,Master Data Empty" "0,1"
newline
bitfld.long 0xC 2. "MDT,Master Data Transmitted" "0,1"
bitfld.long 0xC 1. "MDR,Master Data Received" "0,1"
newline
bitfld.long 0xC 0. "MAT,Master Address Transmitted" "0,1"
line.long 0x10 "ICSIER2,"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "SSRE,Slave Stop Received Interrupt Enable" "0: Disables the SSR interrupt,1: Enables the SSR interrupt"
bitfld.long 0x10 3. "SDEE,Slave Data Empty Interrupt Enable" "0: Disables the SDE interrupt,1: Enables the SDE interrupt"
newline
bitfld.long 0x10 2. "SDTE,Slave Data Transmitted Interrupt Enable" "0: Disables the SDT interrupt,1: Enables the SDT interrupt"
bitfld.long 0x10 1. "SDRE,Slave Data Received Interrupt Enable" "0: Disables the SDR interrupt,1: Enables the SDR interrupt"
newline
bitfld.long 0x10 0. "SARE,Slave Address Received Interrupt Enable" "0: Disables the SAR interrupt,1: Enables the SAR interrupt"
line.long 0x14 "ICMIER2,"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x14 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x14 6. "MNRE,Master NACK Received Interrupt Enable" "0: Disables the MNR interrupt,1: Enables the MNR interrupt"
bitfld.long 0x14 5. "MALE,Master Arbitration Lost Interrupt Enable" "0: Disables the MAL interrupt,1: Enables the MAL interrupt"
newline
bitfld.long 0x14 4. "MSTE,Master Stop Transmitted Interrupt Enable" "0: Disables the MST interrupt,1: Enables the MST interrupt"
bitfld.long 0x14 3. "MDEE,Master Data Empty Interrupt Enable" "0: Disables the MDE interrupt,1: Enables the MDE interrupt"
newline
bitfld.long 0x14 2. "MDTE,Master Data Transmitted Interrupt Enable" "0: Disables the MDT interrupt,1: Enables the MDT interrupt"
bitfld.long 0x14 1. "MDRE,Master Data Received Interrupt Enable" "0: Disables the MDR interrupt,1: Enables the MDR interrupt"
newline
bitfld.long 0x14 0. "MATE,Master Address Transmitted Interrupt Enable" "0: Disables the MAT interrupt,1: Enables the MAT interrupt"
line.long 0x18 "ICCCR2,"
hexmask.long.tbyte 0x18 9.--31. 1. "Reserved_9,Reserved"
hexmask.long.byte 0x18 3.--8. 1. "SCGD,SCL Clock Generation Divider"
newline
bitfld.long 0x18 0.--2. "CDF,Clock Division Factor" "?,1: I2C internal clock frequency calculation,?,?,?,?,?,?"
line.long 0x1C "ICSAR2,"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x1C 7. "Reserved_7,Reserved" "0,1"
newline
hexmask.long.byte 0x1C 0.--6. 1. "SADD0_6_0,Slave Address"
line.long 0x20 "ICMAR2,"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20 1.--7. 1. "SADD1_6_0,Slave Address"
newline
bitfld.long 0x20 0. "STM1,Slave Transfer Mode" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "ICRXD_ICTXD2,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "RXD_TXD,Read Receive Data"
group.long 0x28++0x17
line.long 0x0 "ICCCR22,Equation 3: SCL Rate Computation (CDFD = 1. HLSE = 1. and SME = 1)"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "FMPE,FM+ Enable" "0: OD buffer is Standard / Fast mode,1: OD buffer is Fast mode+"
newline
hexmask.long.byte 0x0 3.--6. 1. "Reserved_3,Reserved"
bitfld.long 0x0 2. "CDFD,CDF Disable" "0,1"
newline
bitfld.long 0x0 1. "HLSE,HIGH/LOW Separate Control Enable" "0,1"
bitfld.long 0x0 0. "SME,SCL Mask Enable" "0,1"
line.long 0x4 "ICMPR2,"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "SMD,SCL Mask Division"
line.long 0x8 "ICHPR2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "SCHD,SCL HIGH Clock Division"
line.long 0xC "ICLPR2,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "SCLD,SCL LOW Clock Division"
line.long 0x10 "ICFBSCR2,Note: The delay time of the 1st data bit between SDA and SCL was calculated as below Table 107.5:"
rbitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x10 24.--28. 1. "SRFBSC_4_0,Setting the delay time of the 1st data bit between SDA and SCL."
newline
rbitfld.long 0x10 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x10 16.--20. 1. "STFBSC_4_0,Setting the delay time of the 1st data bit between SDA and SCL."
newline
hexmask.long.word 0x10 5.--15. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x10 0.--4. 1. "FBSC_4_0,Setting the delay time of the 1st data bit between SDA and SCL"
line.long 0x14 "ICDMAER2,"
hexmask.long.byte 0x14 24.--31. 1. "MDMACTSZ,DMA Master Continuous mode Transfer Size"
hexmask.long.byte 0x14 16.--23. 1. "RMDMATSZ,DMA Master Continuous Received mode 1unit Transfer Size register."
newline
hexmask.long.byte 0x14 8.--15. 1. "TMDMATSZ,DMA Master Continuous Transmitted mode 1unit Transfer Size register."
bitfld.long 0x14 7. "TMDMACE,DMA Master Continuous Transmitted Enable" "0: Disables DMA Continuous Transmitted mode,1: Enables DMA Continuous Transmitted mode"
newline
bitfld.long 0x14 6. "RMDMACE,DMA Master Continuous Received Enable" "0: Disables DMA Continuous Received mode,1: Enables DMA Continuous Received mode"
rbitfld.long 0x14 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x14 3. "RSDMAE,DMA Slave Received Enable" "0: Disables DMA Slave Received Mode,1: Enables DMA Slave Received Mode"
bitfld.long 0x14 2. "TSDMAE,DMA Slave Transmitted Enable" "0: Disables DMA Slave Transmitted Mode,1: Enables DMA Slave Transmitted Mode"
newline
bitfld.long 0x14 1. "RMDMAE,DMA Master Received Enable" "0: Disables DMA Master Received Mode,1: Enables DMA Master Received Mode"
bitfld.long 0x14 0. "TMDMAE,DMA Master Transmitted Enable" "0: Disables DMA Master Transmitted Mode,1: Enables DMA Master Transmitted Mode"
tree.end
tree "I2C_3"
base ad:0xE66D0000
group.long 0x0++0x23
line.long 0x0 "ICSCR3,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "SCSS,Slave Clock Stretch Select" "0: Clock Stretch is in front of Acknowledgement,1: Clock Stretch is next to Non Acknowledgement"
bitfld.long 0x0 3. "SDBS,Slave Data Buffer Select" "0: Setting prohibited,1: Single-buffer mode"
newline
bitfld.long 0x0 2. "SIE,Slave Interface Enable" "0,1"
bitfld.long 0x0 1. "GCAE,General Call Acknowledgement Enable" "0,1"
newline
bitfld.long 0x0 0. "FNA,Forced Non Acknowledgement" "0,1"
line.long 0x4 "ICMCR3,All 0. except bits 30. 29. 22. 21. 14 and 13. in which case. initial value is undefined."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x4 7. "MDBS,Master Data Buffer Select" "0: Setting prohibited,1: Single-buffer mode"
newline
bitfld.long 0x4 6. "FSCL,Forced SCL" "0,1"
bitfld.long 0x4 5. "FSDA,Forced SDA" "0,1"
newline
bitfld.long 0x4 4. "OBPC,Override Bus Pin Control" "0,1"
bitfld.long 0x4 3. "MIE,Master Interface Enable" "0,1"
newline
bitfld.long 0x4 2. "TSBE,Start Byte Transmission Enable" "0,1"
bitfld.long 0x4 1. "FSB,Forced Stop onto the Bus" "0,1"
newline
bitfld.long 0x4 0. "ESG,Enable Start Generation" "0,1"
line.long 0x8 "ICSSR3,Bits 0 to 4 among the status bits in the slave status register are cleared by writing 0 to the respective status bit positions. The individual bits are held 1 until 0 is written to (other than the GCAR and STM bits[n])."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x8 7. "Reserved_7,Reserved" "0,1"
newline
rbitfld.long 0x8 6. "GCAR,General Call Address Received" "0,1"
rbitfld.long 0x8 5. "STM,Slave Transmit Mode" "0,1"
newline
bitfld.long 0x8 4. "SSR,Slave Stop Received" "0,1"
bitfld.long 0x8 3. "SDE,Slave Data Empty" "0,1"
newline
bitfld.long 0x8 2. "SDT,Slave Data Transmitted" "0,1"
bitfld.long 0x8 1. "SDR,Slave Data Received" "0,1"
newline
bitfld.long 0x8 0. "SAR,Slave Address Received" "0,1"
line.long 0xC "ICMSR3,The status bits (bits 0 to 6[n]) in the master status register are cleared by writing 0 to the respective status bit positions. The individual status bits are held 1 until a reset by writing 0 to the appropriate bit position."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0xC 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0xC 6. "MNR,Master NACK Received" "0,1"
bitfld.long 0xC 5. "MAL,Master Arbitration Lost" "0,1"
newline
bitfld.long 0xC 4. "MST,Master Stop Transmitted" "0,1"
bitfld.long 0xC 3. "MDE,Master Data Empty" "0,1"
newline
bitfld.long 0xC 2. "MDT,Master Data Transmitted" "0,1"
bitfld.long 0xC 1. "MDR,Master Data Received" "0,1"
newline
bitfld.long 0xC 0. "MAT,Master Address Transmitted" "0,1"
line.long 0x10 "ICSIER3,"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "SSRE,Slave Stop Received Interrupt Enable" "0: Disables the SSR interrupt,1: Enables the SSR interrupt"
bitfld.long 0x10 3. "SDEE,Slave Data Empty Interrupt Enable" "0: Disables the SDE interrupt,1: Enables the SDE interrupt"
newline
bitfld.long 0x10 2. "SDTE,Slave Data Transmitted Interrupt Enable" "0: Disables the SDT interrupt,1: Enables the SDT interrupt"
bitfld.long 0x10 1. "SDRE,Slave Data Received Interrupt Enable" "0: Disables the SDR interrupt,1: Enables the SDR interrupt"
newline
bitfld.long 0x10 0. "SARE,Slave Address Received Interrupt Enable" "0: Disables the SAR interrupt,1: Enables the SAR interrupt"
line.long 0x14 "ICMIER3,"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x14 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x14 6. "MNRE,Master NACK Received Interrupt Enable" "0: Disables the MNR interrupt,1: Enables the MNR interrupt"
bitfld.long 0x14 5. "MALE,Master Arbitration Lost Interrupt Enable" "0: Disables the MAL interrupt,1: Enables the MAL interrupt"
newline
bitfld.long 0x14 4. "MSTE,Master Stop Transmitted Interrupt Enable" "0: Disables the MST interrupt,1: Enables the MST interrupt"
bitfld.long 0x14 3. "MDEE,Master Data Empty Interrupt Enable" "0: Disables the MDE interrupt,1: Enables the MDE interrupt"
newline
bitfld.long 0x14 2. "MDTE,Master Data Transmitted Interrupt Enable" "0: Disables the MDT interrupt,1: Enables the MDT interrupt"
bitfld.long 0x14 1. "MDRE,Master Data Received Interrupt Enable" "0: Disables the MDR interrupt,1: Enables the MDR interrupt"
newline
bitfld.long 0x14 0. "MATE,Master Address Transmitted Interrupt Enable" "0: Disables the MAT interrupt,1: Enables the MAT interrupt"
line.long 0x18 "ICCCR3,"
hexmask.long.tbyte 0x18 9.--31. 1. "Reserved_9,Reserved"
hexmask.long.byte 0x18 3.--8. 1. "SCGD,SCL Clock Generation Divider"
newline
bitfld.long 0x18 0.--2. "CDF,Clock Division Factor" "?,1: I2C internal clock frequency calculation,?,?,?,?,?,?"
line.long 0x1C "ICSAR3,"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
rbitfld.long 0x1C 7. "Reserved_7,Reserved" "0,1"
newline
hexmask.long.byte 0x1C 0.--6. 1. "SADD0_6_0,Slave Address"
line.long 0x20 "ICMAR3,"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20 1.--7. 1. "SADD1_6_0,Slave Address"
newline
bitfld.long 0x20 0. "STM1,Slave Transfer Mode" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "ICRXD_ICTXD3,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "RXD_TXD,Read Receive Data"
group.long 0x28++0x17
line.long 0x0 "ICCCR23,Equation 3: SCL Rate Computation (CDFD = 1. HLSE = 1. and SME = 1)"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "FMPE,FM+ Enable" "0: OD buffer is Standard / Fast mode,1: OD buffer is Fast mode+"
newline
hexmask.long.byte 0x0 3.--6. 1. "Reserved_3,Reserved"
bitfld.long 0x0 2. "CDFD,CDF Disable" "0,1"
newline
bitfld.long 0x0 1. "HLSE,HIGH/LOW Separate Control Enable" "0,1"
bitfld.long 0x0 0. "SME,SCL Mask Enable" "0,1"
line.long 0x4 "ICMPR3,"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "SMD,SCL Mask Division"
line.long 0x8 "ICHPR3,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "SCHD,SCL HIGH Clock Division"
line.long 0xC "ICLPR3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "SCLD,SCL LOW Clock Division"
line.long 0x10 "ICFBSCR3,Note: The delay time of the 1st data bit between SDA and SCL was calculated as below Table 107.5:"
rbitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x10 24.--28. 1. "SRFBSC_4_0,Setting the delay time of the 1st data bit between SDA and SCL."
newline
rbitfld.long 0x10 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x10 16.--20. 1. "STFBSC_4_0,Setting the delay time of the 1st data bit between SDA and SCL."
newline
hexmask.long.word 0x10 5.--15. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x10 0.--4. 1. "FBSC_4_0,Setting the delay time of the 1st data bit between SDA and SCL"
line.long 0x14 "ICDMAER3,"
hexmask.long.byte 0x14 24.--31. 1. "MDMACTSZ,DMA Master Continuous mode Transfer Size"
hexmask.long.byte 0x14 16.--23. 1. "RMDMATSZ,DMA Master Continuous Received mode 1unit Transfer Size register."
newline
hexmask.long.byte 0x14 8.--15. 1. "TMDMATSZ,DMA Master Continuous Transmitted mode 1unit Transfer Size register."
bitfld.long 0x14 7. "TMDMACE,DMA Master Continuous Transmitted Enable" "0: Disables DMA Continuous Transmitted mode,1: Enables DMA Continuous Transmitted mode"
newline
bitfld.long 0x14 6. "RMDMACE,DMA Master Continuous Received Enable" "0: Disables DMA Continuous Received mode,1: Enables DMA Continuous Received mode"
rbitfld.long 0x14 4.--5. "Reserved_4,Reserved" "0,1,2,3"
newline
bitfld.long 0x14 3. "RSDMAE,DMA Slave Received Enable" "0: Disables DMA Slave Received Mode,1: Enables DMA Slave Received Mode"
bitfld.long 0x14 2. "TSDMAE,DMA Slave Transmitted Enable" "0: Disables DMA Slave Transmitted Mode,1: Enables DMA Slave Transmitted Mode"
newline
bitfld.long 0x14 1. "RMDMAE,DMA Master Received Enable" "0: Disables DMA Master Received Mode,1: Enables DMA Master Received Mode"
bitfld.long 0x14 0. "TMDMAE,DMA Master Transmitted Enable" "0: Disables DMA Master Transmitted Mode,1: Enables DMA Master Transmitted Mode"
tree.end
tree.end
tree "IMP_CNN (Convolutional Neural Network)"
base ad:0xFFAA0000
rgroup.long 0x0++0x3
line.long 0x0 "VCR0,"
hexmask.long 0x0 0.--31. 1. "Version0,These bits indicate the version of this module."
group.long 0x8++0x7
line.long 0x0 "SWRST,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "SWRST,Software reset" "0,1"
line.long 0x4 "MPRST,"
hexmask.long 0x4 7.--31. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x4 6. "MAX_MIN_8S,Specifies whether the MAX_MIN values MAX_MIN_* are reset to 8bit signed value." "0,1"
newline
rbitfld.long 0x4 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x4 4. "MAX_MIN_16S,Specifies whether the MAX_MIN values MAX_MIN_* are reset to 16bit signed value." "0,1"
newline
rbitfld.long 0x4 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 0. "GLOB_SUM_RESET,Global SUM register value reset" "0,1"
rgroup.long 0x10++0x3
line.long 0x0 "SR,"
hexmask.long.byte 0x0 24.--31. 1. "INTCODE,INT code"
newline
hexmask.long.byte 0x0 16.--23. 1. "TRAPCODE,TRAP code"
newline
bitfld.long 0x0 15. "DMAWTBUSY,Debug signal DMAWT busy" "0,1"
newline
bitfld.long 0x0 14. "CLBUSY,Debug signal CL busy" "0,1"
newline
bitfld.long 0x0 13. "DMAIBUSY,Debug signal DMAI busy" "0,1"
newline
bitfld.long 0x0 12. "DMA3DCBUSY,Debug signal DMA3DC busy" "0,1"
newline
bitfld.long 0x0 11. "DMAOBUSY,Debug signal DMAO busy" "0,1"
newline
bitfld.long 0x0 10. "ARIBUSY,Debug signal ARI busy" "0,1"
newline
bitfld.long 0x0 9. "SYNCS,SYNCS bit" "0,1"
newline
bitfld.long 0x0 6.--8. "Reserved_6,Reserved." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 5. "CLB,CL BREAK" "0: CL does not break,1: CL break"
newline
bitfld.long 0x0 4. "Reserved_4,Reserved." "0,1"
newline
bitfld.long 0x0 3. "Reserved_3,Reserved." "0,1"
newline
bitfld.long 0x0 2. "INT,INT instruction decode" "0,1"
newline
bitfld.long 0x0 1. "IER,Instruction decode error or GOSUB overflow/underflow." "0,1"
newline
bitfld.long 0x0 0. "TRA,TRAP" "0,1"
group.long 0x14++0x2F
line.long 0x0 "SRE,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "CLBE,CL break enable" "0: CLB bit in SR is not set to 1,1: CLB bit in SR is set to 1"
newline
rbitfld.long 0x0 4. "Reserved_4,Reserved" "0,1"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 2. "INTE,INT instruction decode enable" "0: INT bit in SR is not set to 1,1: INT bit in SR is set to 1"
newline
bitfld.long 0x0 1. "IERE,Instruction decode error enable" "0: IER bit in SR is not set to 1,1: IER bit in SR is set to 1"
newline
bitfld.long 0x0 0. "TRAE,TRAP enable" "0: TRA bit in SR is not set to 1,1: TRA bit in SR is set to 1"
line.long 0x4 "SRC,"
hexmask.long 0x4 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x4 5. "CLBC,CL break clear" "0,1"
newline
rbitfld.long 0x4 4. "Reserved_4,Reserved" "0,1"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x4 2. "INTC,INT instruction decode clear" "0,1"
newline
bitfld.long 0x4 1. "IERC,Instruction decode error clear" "0,1"
newline
bitfld.long 0x4 0. "TRAC,TRAP clear" "0,1"
line.long 0x8 "SRM,"
hexmask.long 0x8 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x8 5. "CLBM,CL break mask" "0: The generation of CLB interrupts is not masked,1: The generation of CLB interrupts is masked"
newline
rbitfld.long 0x8 4. "Reserved_4,Reserved" "0,1"
newline
rbitfld.long 0x8 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x8 2. "INTM,INT instruction decode mask" "0: The generation of INT interrupts is not masked,1: The generation of INT interrupts is masked"
newline
bitfld.long 0x8 1. "IERM,Instruction decode error mask" "0: The generation of IER interrupts is not masked,1: The generation of IER interrupts is masked"
newline
bitfld.long 0x8 0. "TRAM,TRAP mask" "0: The generation of TRA interrupts is not masked,1: The generation of TRA interrupts is masked"
line.long 0xC "INDEX0,"
hexmask.long 0xC 0.--31. 1. "INDEX,INDEX[o] value is used for index addressing. INDEX0 is only virtual register  which is not implemented  when reading  zero is read."
line.long 0x10 "INDEX1,"
hexmask.long 0x10 0.--31. 1. "INDEX,INDEX[o] value is used for index addressing. INDEX0 is only virtual register  which is not implemented  when reading  zero is read."
line.long 0x14 "INDEX2,"
hexmask.long 0x14 0.--31. 1. "INDEX,INDEX[o] value is used for index addressing. INDEX0 is only virtual register  which is not implemented  when reading  zero is read."
line.long 0x18 "INDEX3,"
hexmask.long 0x18 0.--31. 1. "INDEX,INDEX[o] value is used for index addressing. INDEX0 is only virtual register  which is not implemented  when reading  zero is read."
line.long 0x1C "INDEX4,"
hexmask.long 0x1C 0.--31. 1. "INDEX,INDEX[o] value is used for index addressing. INDEX0 is only virtual register  which is not implemented  when reading  zero is read."
line.long 0x20 "INDEX5,"
hexmask.long 0x20 0.--31. 1. "INDEX,INDEX[o] value is used for index addressing. INDEX0 is only virtual register  which is not implemented  when reading  zero is read."
line.long 0x24 "INDEX6,"
hexmask.long 0x24 0.--31. 1. "INDEX,INDEX[o] value is used for index addressing. INDEX0 is only virtual register  which is not implemented  when reading  zero is read."
line.long 0x28 "INDEX7,"
hexmask.long 0x28 0.--31. 1. "INDEX,INDEX[o] value is used for index addressing. INDEX0 is only virtual register  which is not implemented  when reading  zero is read."
line.long 0x2C "CL_AXI_PORT,"
hexmask.long 0x2C 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x2C 0.--1. "CL_AXI_PORT,Defines which AXI port is used for CL data transfer" "0: toggle,?,?,?"
rgroup.long 0x100++0x3
line.long 0x0 "CLPC,"
hexmask.long 0x0 0.--31. 1. "CLPC,CL program counter   lower 2 bits are 0"
group.long 0x104++0x7
line.long 0x0 "SACL,"
hexmask.long 0x0 0.--31. 1. "SACL,Start Address for Command List processing  32bit address"
line.long 0x4 "SCLP,"
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "SCLP,Start Command List Processing  next clock cycle automatically cleared" "0,1"
rgroup.long 0x10C++0x3
line.long 0x0 "CLEIR,"
hexmask.long 0x0 0.--31. 1. "CLEIR,Register holding currently in CL executed instruction"
group.long 0x110++0xF
line.long 0x0 "SLSP,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "SLSP_TAKEOVERALL,Values to take over in internal buffer" "0: : Take over all ARI related registers into..,1: Take over all ARI related registers into.."
newline
bitfld.long 0x0 0. "SLSP_START,Start Layer Set Processing  automatically cleared after process has started  scheduled as last instruction after setting up everything for the current run (DMA channels  CNN parameter and weights). Please make sure that at least 8 clock cycles.." "0,1"
line.long 0x4 "CLBRKADDRR,"
hexmask.long 0x4 0.--31. 1. "CLBRKADDRR,CL break address specification."
line.long 0x8 "CLCNDGSBR,"
hexmask.long 0x8 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x8 0. "CLCNDGSBR,Condition for conditional GOSUB instruction:" "0: GOSUB is not executed,1: GOSUB is executed"
line.long 0xC "V3U_COMP_MODE,"
hexmask.long 0xC 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0xC 0. "V3U_COMP_MODE,Set internal register addressing mode:" "0: with INDEX and 13bit address usage,1: Compatible to V3U without INDEX and 16bit.."
group.long 0x240++0x3
line.long 0x0 "DMAI_CONFIG,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "DMAI_CONFIG,DMAI_CONFIG for DMAI 0-15  for usage check user manual usage notes."
group.long 0x250++0x3
line.long 0x0 "DMAW_CONFIG,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "DMAW_CONFIG,DMAW_CONFIG for DMAW  for usage check user manual CLW instruction and usage notes." "0,1"
rgroup.long 0x800++0x7F
line.long 0x0 "GLOB_SUM0,"
hexmask.long 0x0 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x4 "GLOB_SUM1,"
hexmask.long 0x4 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x8 "GLOB_SUM2,"
hexmask.long 0x8 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0xC "GLOB_SUM3,"
hexmask.long 0xC 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x10 "GLOB_SUM4,"
hexmask.long 0x10 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x14 "GLOB_SUM5,"
hexmask.long 0x14 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x18 "GLOB_SUM6,"
hexmask.long 0x18 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x1C "GLOB_SUM7,"
hexmask.long 0x1C 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x20 "GLOB_SUM8,"
hexmask.long 0x20 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x24 "GLOB_SUM9,"
hexmask.long 0x24 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x28 "GLOB_SUM10,"
hexmask.long 0x28 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x2C "GLOB_SUM11,"
hexmask.long 0x2C 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x30 "GLOB_SUM12,"
hexmask.long 0x30 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x34 "GLOB_SUM13,"
hexmask.long 0x34 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x38 "GLOB_SUM14,"
hexmask.long 0x38 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x3C "GLOB_SUM15,"
hexmask.long 0x3C 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x40 "GLOB_SUM16,"
hexmask.long 0x40 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x44 "GLOB_SUM17,"
hexmask.long 0x44 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x48 "GLOB_SUM18,"
hexmask.long 0x48 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x4C "GLOB_SUM19,"
hexmask.long 0x4C 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x50 "GLOB_SUM20,"
hexmask.long 0x50 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x54 "GLOB_SUM21,"
hexmask.long 0x54 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x58 "GLOB_SUM22,"
hexmask.long 0x58 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x5C "GLOB_SUM23,"
hexmask.long 0x5C 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x60 "GLOB_SUM24,"
hexmask.long 0x60 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x64 "GLOB_SUM25,"
hexmask.long 0x64 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x68 "GLOB_SUM26,"
hexmask.long 0x68 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x6C "GLOB_SUM27,"
hexmask.long 0x6C 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x70 "GLOB_SUM28,"
hexmask.long 0x70 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x74 "GLOB_SUM29,"
hexmask.long 0x74 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x78 "GLOB_SUM30,"
hexmask.long 0x78 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
line.long 0x7C "GLOB_SUM31,"
hexmask.long 0x7C 0.--31. 1. "GLOB_SUM,Global sum of DMAO channel [m] (m=0-31). The values can be read by CPU and cleared by using GLOB_SUM_RESET bit of MPRST register."
group.long 0x880++0x5F
line.long 0x0 "MAX_MIN0,"
hexmask.long.word 0x0 16.--31. 1. "MAX,MAX of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 16 till bit 23) and channel 2[k]+1 (bit 24 till bit 31) (8bit)"
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hexmask.long.word 0x0 0.--15. 1. "MIN,MIN of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 0 till bit 7) and channel 2[k]+1 (bit 8 till bit 15) (8bit)"
line.long 0x4 "MAX_MIN1,"
hexmask.long.word 0x4 16.--31. 1. "MAX,MAX of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 16 till bit 23) and channel 2[k]+1 (bit 24 till bit 31) (8bit)"
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hexmask.long.word 0x4 0.--15. 1. "MIN,MIN of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 0 till bit 7) and channel 2[k]+1 (bit 8 till bit 15) (8bit)"
line.long 0x8 "MAX_MIN2,"
hexmask.long.word 0x8 16.--31. 1. "MAX,MAX of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 16 till bit 23) and channel 2[k]+1 (bit 24 till bit 31) (8bit)"
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hexmask.long.word 0x8 0.--15. 1. "MIN,MIN of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 0 till bit 7) and channel 2[k]+1 (bit 8 till bit 15) (8bit)"
line.long 0xC "MAX_MIN3,"
hexmask.long.word 0xC 16.--31. 1. "MAX,MAX of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 16 till bit 23) and channel 2[k]+1 (bit 24 till bit 31) (8bit)"
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hexmask.long.word 0xC 0.--15. 1. "MIN,MIN of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 0 till bit 7) and channel 2[k]+1 (bit 8 till bit 15) (8bit)"
line.long 0x10 "MAX_MIN4,"
hexmask.long.word 0x10 16.--31. 1. "MAX,MAX of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 16 till bit 23) and channel 2[k]+1 (bit 24 till bit 31) (8bit)"
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hexmask.long.word 0x10 0.--15. 1. "MIN,MIN of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 0 till bit 7) and channel 2[k]+1 (bit 8 till bit 15) (8bit)"
line.long 0x14 "MAX_MIN5,"
hexmask.long.word 0x14 16.--31. 1. "MAX,MAX of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 16 till bit 23) and channel 2[k]+1 (bit 24 till bit 31) (8bit)"
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hexmask.long.word 0x14 0.--15. 1. "MIN,MIN of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 0 till bit 7) and channel 2[k]+1 (bit 8 till bit 15) (8bit)"
line.long 0x18 "MAX_MIN6,"
hexmask.long.word 0x18 16.--31. 1. "MAX,MAX of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 16 till bit 23) and channel 2[k]+1 (bit 24 till bit 31) (8bit)"
newline
hexmask.long.word 0x18 0.--15. 1. "MIN,MIN of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 0 till bit 7) and channel 2[k]+1 (bit 8 till bit 15) (8bit)"
line.long 0x1C "MAX_MIN7,"
hexmask.long.word 0x1C 16.--31. 1. "MAX,MAX of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 16 till bit 23) and channel 2[k]+1 (bit 24 till bit 31) (8bit)"
newline
hexmask.long.word 0x1C 0.--15. 1. "MIN,MIN of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 0 till bit 7) and channel 2[k]+1 (bit 8 till bit 15) (8bit)"
line.long 0x20 "MAX_MIN8,"
hexmask.long.word 0x20 16.--31. 1. "MAX,MAX of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 16 till bit 23) and channel 2[k]+1 (bit 24 till bit 31) (8bit)"
newline
hexmask.long.word 0x20 0.--15. 1. "MIN,MIN of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 0 till bit 7) and channel 2[k]+1 (bit 8 till bit 15) (8bit)"
line.long 0x24 "MAX_MIN9,"
hexmask.long.word 0x24 16.--31. 1. "MAX,MAX of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 16 till bit 23) and channel 2[k]+1 (bit 24 till bit 31) (8bit)"
newline
hexmask.long.word 0x24 0.--15. 1. "MIN,MIN of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 0 till bit 7) and channel 2[k]+1 (bit 8 till bit 15) (8bit)"
line.long 0x28 "MAX_MIN10,"
hexmask.long.word 0x28 16.--31. 1. "MAX,MAX of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 16 till bit 23) and channel 2[k]+1 (bit 24 till bit 31) (8bit)"
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hexmask.long.word 0x28 0.--15. 1. "MIN,MIN of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 0 till bit 7) and channel 2[k]+1 (bit 8 till bit 15) (8bit)"
line.long 0x2C "MAX_MIN11,"
hexmask.long.word 0x2C 16.--31. 1. "MAX,MAX of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 16 till bit 23) and channel 2[k]+1 (bit 24 till bit 31) (8bit)"
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hexmask.long.word 0x2C 0.--15. 1. "MIN,MIN of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 0 till bit 7) and channel 2[k]+1 (bit 8 till bit 15) (8bit)"
line.long 0x30 "MAX_MIN12,"
hexmask.long.word 0x30 16.--31. 1. "MAX,MAX of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 16 till bit 23) and channel 2[k]+1 (bit 24 till bit 31) (8bit)"
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hexmask.long.word 0x30 0.--15. 1. "MIN,MIN of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 0 till bit 7) and channel 2[k]+1 (bit 8 till bit 15) (8bit)"
line.long 0x34 "MAX_MIN13,"
hexmask.long.word 0x34 16.--31. 1. "MAX,MAX of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 16 till bit 23) and channel 2[k]+1 (bit 24 till bit 31) (8bit)"
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hexmask.long.word 0x34 0.--15. 1. "MIN,MIN of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 0 till bit 7) and channel 2[k]+1 (bit 8 till bit 15) (8bit)"
line.long 0x38 "MAX_MIN14,"
hexmask.long.word 0x38 16.--31. 1. "MAX,MAX of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 16 till bit 23) and channel 2[k]+1 (bit 24 till bit 31) (8bit)"
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hexmask.long.word 0x38 0.--15. 1. "MIN,MIN of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 0 till bit 7) and channel 2[k]+1 (bit 8 till bit 15) (8bit)"
line.long 0x3C "MAX_MIN15,"
hexmask.long.word 0x3C 16.--31. 1. "MAX,MAX of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 16 till bit 23) and channel 2[k]+1 (bit 24 till bit 31) (8bit)"
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hexmask.long.word 0x3C 0.--15. 1. "MIN,MIN of DMAO channel [k] (16bit) or DMAO channel 2[k] (bit 0 till bit 7) and channel 2[k]+1 (bit 8 till bit 15) (8bit)"
line.long 0x40 "PERFCNT0CTRL,"
bitfld.long 0x40 31. "PERFCNTEN,Performance counter [p] enable" "0,1"
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bitfld.long 0x40 30. "PERFCNTOF,Performance counter [p] overflow" "0,1"
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hexmask.long.word 0x40 15.--29. 1. "Reserved_15,Reserved"
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bitfld.long 0x40 12.--14. "PERFCNTSTRSN,Performance counter [p] (p=0 to 3) stall reason." "0: All stalls,1: Stalls caused by wait as data sink for data from..,?,?,?,?,?,?"
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hexmask.long.byte 0x40 8.--11. 1. "PERFCNTFUNC,Function of performance counter p (p=0 to 3):"
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rbitfld.long 0x40 7. "Reserved_7,Reserved" "0,1"
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hexmask.long.byte 0x40 0.--6. 1. "PERFCNTNO,Selected unit number of performance counter p (p=0 to 3):"
line.long 0x44 "PERFCNT1CTRL,"
bitfld.long 0x44 31. "PERFCNTEN,Performance counter [p] enable" "0,1"
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bitfld.long 0x44 30. "PERFCNTOF,Performance counter [p] overflow" "0,1"
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hexmask.long.word 0x44 15.--29. 1. "Reserved_15,Reserved"
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bitfld.long 0x44 12.--14. "PERFCNTSTRSN,Performance counter [p] (p=0 to 3) stall reason." "0: All stalls,1: Stalls caused by wait as data sink for data from..,?,?,?,?,?,?"
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hexmask.long.byte 0x44 8.--11. 1. "PERFCNTFUNC,Function of performance counter p (p=0 to 3):"
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rbitfld.long 0x44 7. "Reserved_7,Reserved" "0,1"
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hexmask.long.byte 0x44 0.--6. 1. "PERFCNTNO,Selected unit number of performance counter p (p=0 to 3):"
line.long 0x48 "PERFCNT2CTRL,"
bitfld.long 0x48 31. "PERFCNTEN,Performance counter [p] enable" "0,1"
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bitfld.long 0x48 30. "PERFCNTOF,Performance counter [p] overflow" "0,1"
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hexmask.long.word 0x48 15.--29. 1. "Reserved_15,Reserved"
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bitfld.long 0x48 12.--14. "PERFCNTSTRSN,Performance counter [p] (p=0 to 3) stall reason." "0: All stalls,1: Stalls caused by wait as data sink for data from..,?,?,?,?,?,?"
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hexmask.long.byte 0x48 8.--11. 1. "PERFCNTFUNC,Function of performance counter p (p=0 to 3):"
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rbitfld.long 0x48 7. "Reserved_7,Reserved" "0,1"
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hexmask.long.byte 0x48 0.--6. 1. "PERFCNTNO,Selected unit number of performance counter p (p=0 to 3):"
line.long 0x4C "PERFCNT3CTRL,"
bitfld.long 0x4C 31. "PERFCNTEN,Performance counter [p] enable" "0,1"
newline
bitfld.long 0x4C 30. "PERFCNTOF,Performance counter [p] overflow" "0,1"
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hexmask.long.word 0x4C 15.--29. 1. "Reserved_15,Reserved"
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bitfld.long 0x4C 12.--14. "PERFCNTSTRSN,Performance counter [p] (p=0 to 3) stall reason." "0: All stalls,1: Stalls caused by wait as data sink for data from..,?,?,?,?,?,?"
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hexmask.long.byte 0x4C 8.--11. 1. "PERFCNTFUNC,Function of performance counter p (p=0 to 3):"
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rbitfld.long 0x4C 7. "Reserved_7,Reserved" "0,1"
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hexmask.long.byte 0x4C 0.--6. 1. "PERFCNTNO,Selected unit number of performance counter p (p=0 to 3):"
line.long 0x50 "PERFCNT0,"
hexmask.long 0x50 0.--31. 1. "PERFCNT,Performance counter p (p=0 to 3)."
line.long 0x54 "PERFCNT1,"
hexmask.long 0x54 0.--31. 1. "PERFCNT,Performance counter p (p=0 to 3)."
line.long 0x58 "PERFCNT2,"
hexmask.long 0x58 0.--31. 1. "PERFCNT,Performance counter p (p=0 to 3)."
line.long 0x5C "PERFCNT3,"
hexmask.long 0x5C 0.--31. 1. "PERFCNT,Performance counter p (p=0 to 3)."
group.long 0x900++0xF
line.long 0x0 "SYNCC_40_0_3,"
hexmask.long.byte 0x0 24.--31. 1. "SYNCC_3,Used for WUP  SLP when core number field is 4[p]+3 (p=0-3)"
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hexmask.long.byte 0x0 16.--23. 1. "SYNCC_2,Used for WUP  SLP when core number field is 4[p]+2 (p=0-3)"
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hexmask.long.byte 0x0 8.--15. 1. "SYNCC_1,Used for WUP  SLP when core number field is 4[p]+1 (p=0-3)"
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hexmask.long.byte 0x0 0.--7. 1. "SYNCC_0,Used for WUP  SLP when core number field is 4[p]+0 (p=0-3)"
line.long 0x4 "SYNCC_41_0_3,"
hexmask.long.byte 0x4 24.--31. 1. "SYNCC_3,Used for WUP  SLP when core number field is 4[p]+3 (p=0-3)"
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hexmask.long.byte 0x4 16.--23. 1. "SYNCC_2,Used for WUP  SLP when core number field is 4[p]+2 (p=0-3)"
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hexmask.long.byte 0x4 8.--15. 1. "SYNCC_1,Used for WUP  SLP when core number field is 4[p]+1 (p=0-3)"
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hexmask.long.byte 0x4 0.--7. 1. "SYNCC_0,Used for WUP  SLP when core number field is 4[p]+0 (p=0-3)"
line.long 0x8 "SYNCC_42_0_3,"
hexmask.long.byte 0x8 24.--31. 1. "SYNCC_3,Used for WUP  SLP when core number field is 4[p]+3 (p=0-3)"
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hexmask.long.byte 0x8 16.--23. 1. "SYNCC_2,Used for WUP  SLP when core number field is 4[p]+2 (p=0-3)"
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hexmask.long.byte 0x8 8.--15. 1. "SYNCC_1,Used for WUP  SLP when core number field is 4[p]+1 (p=0-3)"
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hexmask.long.byte 0x8 0.--7. 1. "SYNCC_0,Used for WUP  SLP when core number field is 4[p]+0 (p=0-3)"
line.long 0xC "SYNCC_43_0_3,"
hexmask.long.byte 0xC 24.--31. 1. "SYNCC_3,Used for WUP  SLP when core number field is 4[p]+3 (p=0-3)"
newline
hexmask.long.byte 0xC 16.--23. 1. "SYNCC_2,Used for WUP  SLP when core number field is 4[p]+2 (p=0-3)"
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hexmask.long.byte 0xC 8.--15. 1. "SYNCC_1,Used for WUP  SLP when core number field is 4[p]+1 (p=0-3)"
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hexmask.long.byte 0xC 0.--7. 1. "SYNCC_0,Used for WUP  SLP when core number field is 4[p]+0 (p=0-3)"
group.long 0x1000++0x1F
line.long 0x0 "ARICSR,"
bitfld.long 0x0 31. "MIXED_MODE_2,This bit is used together with ARICSR[25]." "0: no mixed mode processing,1: ELTWISE MULT"
newline
bitfld.long 0x0 30. "ARIFM_AFTER_ACTIVATION,ARI format used after activation functions (16bit ARIFM and 8bit ARIFM_AFTER_ACTIVATION is not supported)" "0: 8bit signed,1: 16bit signed"
newline
bitfld.long 0x0 28.--29. "DMAIFM,Stored format in SPMC0 memory for all DMAI channels  used by ARI" "0: 8bit signed,1: 8bit unsigned,?,?"
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bitfld.long 0x0 27. "CHANNEL_MAX_MIN,Enable the channel MAX/MIN generation" "0,1"
newline
bitfld.long 0x0 26. "M16_VAL_AFTER_ACT,Defines time point for mixed mode 16bit processing when the 16bit values are taken and passed to DMAO" "0: In case of mixed mode 16bit processing,1: In case of mixed mode 16bit processing"
newline
bitfld.long 0x0 25. "MIXED_MODE,This bit is used together with ARICSR[31]." "0: no mixed mode processing,1: ELTWISE MULT"
newline
bitfld.long 0x0 24. "CPOOL_UI,For Ranking and Labeling function  if CPOOL_INFO == 5 and ARIFM == 16bit  use this user information bit as upper bit of label information (bit 4)" "0,1"
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bitfld.long 0x0 23. "GLOB_SUM_MODE,Enable the global channel sum generation." "0,1"
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bitfld.long 0x0 21.--22. "DMA3DCFM,Stored format in SPMC1 memory for all 3DC channels  used by ARI" "0: 8bit signed,1: 16bit signed,?,?"
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bitfld.long 0x0 20. "BIAS_32bit,0: use lower 16bit signed BIAS sign extended to 32bit" "0: use lower 16bit signed BIAS sign extended to 32bit,1: use lower 16bit and upper 16bit BIAS fiekds for.."
newline
bitfld.long 0x0 18.--19. "INPUT_USAGE_3DC,Function dependent on {ARICSR[25]  ARICSR[31]} bit settings." "0,1,2,3"
newline
bitfld.long 0x0 17. "CONV_MODE,Convolution mode:" "0: not 1x5x5 convolution,1: 1x5x5 convolution"
newline
bitfld.long 0x0 16. "ARIFM,Format for all ARI channels" "0: 8bit signed,1: 16bit signed"
newline
bitfld.long 0x0 14.--15. "YPOOL,Y pooling: pool value = YPOOL+1 (for XY average pooling  X pooling has to be set same as Y pooling)" "0,1,2,3"
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bitfld.long 0x0 12.--13. "XPOOL,X pooling: pool value = XPOOL+1 (for XY average pooling  X pooling has to be set same as Y pooling)" "0,1,2,3"
newline
bitfld.long 0x0 10.--11. "XYPOOL_MODE,XY pooling mode:" "0: No XY pooling,1: XY MAX,?,?"
newline
bitfld.long 0x0 7.--9. "CPOOL_INFO,Bits used for label information in case of ranking/labeling mode:" "0: max value inside 1 group of 32 ARI channel,1: max value inside 2 groups of each 16 ARI channel,?,?,?,?,?,?"
newline
bitfld.long 0x0 5.--6. "CPOOL_MODE,Channel pooling mode:" "0: No channel pooling,1: Channel MAX,?,?"
newline
bitfld.long 0x0 4. "BIAS,Setting enable for BIAS add" "0,1"
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hexmask.long.byte 0x0 0.--3. 1. "ACT_FUNC,Activation function"
line.long 0x4 "ARIE,"
bitfld.long 0x4 31. "ARIE_8_15,ARI channel enable setting for odd half of 8bit ARI configuration  starting from right side (only odd bits are used)" "0,1"
newline
bitfld.long 0x4 30. "ARIE_16_15,ARI channel enable setting for 16bit ARI or even half of 8bit ARI configuration  starting from right side (only even bits are used)" "0,1"
newline
bitfld.long 0x4 29. "ARIE_8_14,ARI channel enable setting for odd half of 8bit ARI configuration  starting from right side (only odd bits are used)" "0,1"
newline
bitfld.long 0x4 28. "ARIE_16_14,ARI channel enable setting for 16bit ARI or even half of 8bit ARI configuration  starting from right side (only even bits are used)" "0,1"
newline
bitfld.long 0x4 27. "ARIE_8_13,ARI channel enable setting for odd half of 8bit ARI configuration  starting from right side (only odd bits are used)" "0,1"
newline
bitfld.long 0x4 26. "ARIE_16_13,ARI channel enable setting for 16bit ARI or even half of 8bit ARI configuration  starting from right side (only even bits are used)" "0,1"
newline
bitfld.long 0x4 25. "ARIE_8_12,ARI channel enable setting for odd half of 8bit ARI configuration  starting from right side (only odd bits are used)" "0,1"
newline
bitfld.long 0x4 24. "ARIE_16_12,ARI channel enable setting for 16bit ARI or even half of 8bit ARI configuration  starting from right side (only even bits are used)" "0,1"
newline
bitfld.long 0x4 23. "ARIE_8_11,ARI channel enable setting for odd half of 8bit ARI configuration  starting from right side (only odd bits are used)" "0,1"
newline
bitfld.long 0x4 22. "ARIE_16_11,ARI channel enable setting for 16bit ARI or even half of 8bit ARI configuration  starting from right side (only even bits are used)" "0,1"
newline
bitfld.long 0x4 21. "ARIE_8_10,ARI channel enable setting for odd half of 8bit ARI configuration  starting from right side (only odd bits are used)" "0,1"
newline
bitfld.long 0x4 20. "ARIE_16_10,ARI channel enable setting for 16bit ARI or even half of 8bit ARI configuration  starting from right side (only even bits are used)" "0,1"
newline
bitfld.long 0x4 19. "ARIE_8_9,ARI channel enable setting for odd half of 8bit ARI configuration  starting from right side (only odd bits are used)" "0,1"
newline
bitfld.long 0x4 18. "ARIE_16_9,ARI channel enable setting for 16bit ARI or even half of 8bit ARI configuration  starting from right side (only even bits are used)" "0,1"
newline
bitfld.long 0x4 17. "ARIE_8_8,ARI channel enable setting for odd half of 8bit ARI configuration  starting from right side (only odd bits are used)" "0,1"
newline
bitfld.long 0x4 16. "ARIE_16_8,ARI channel enable setting for 16bit ARI or even half of 8bit ARI configuration  starting from right side (only even bits are used)" "0,1"
newline
bitfld.long 0x4 15. "ARIE_8_7,ARI channel enable setting for odd half of 8bit ARI configuration  starting from right side (only odd bits are used)" "0,1"
newline
bitfld.long 0x4 14. "ARIE_16_7,ARI channel enable setting for 16bit ARI or even half of 8bit ARI configuration  starting from right side (only even bits are used)" "0,1"
newline
bitfld.long 0x4 13. "ARIE_8_6,ARI channel enable setting for odd half of 8bit ARI configuration  starting from right side (only odd bits are used)" "0,1"
newline
bitfld.long 0x4 12. "ARIE_16_6,ARI channel enable setting for 16bit ARI or even half of 8bit ARI configuration  starting from right side (only even bits are used)" "0,1"
newline
bitfld.long 0x4 11. "ARIE_8_5,ARI channel enable setting for odd half of 8bit ARI configuration  starting from right side (only odd bits are used)" "0,1"
newline
bitfld.long 0x4 10. "ARIE_16_5,ARI channel enable setting for 16bit ARI or even half of 8bit ARI configuration  starting from right side (only even bits are used)" "0,1"
newline
bitfld.long 0x4 9. "ARIE_8_4,ARI channel enable setting for odd half of 8bit ARI configuration  starting from right side (only odd bits are used)" "0,1"
newline
bitfld.long 0x4 8. "ARIE_16_4,ARI channel enable setting for 16bit ARI or even half of 8bit ARI configuration  starting from right side (only even bits are used)" "0,1"
newline
bitfld.long 0x4 7. "ARIE_8_3,ARI channel enable setting for odd half of 8bit ARI configuration  starting from right side (only odd bits are used)" "0,1"
newline
bitfld.long 0x4 6. "ARIE_16_3,ARI channel enable setting for 16bit ARI or even half of 8bit ARI configuration  starting from right side (only even bits are used)" "0,1"
newline
bitfld.long 0x4 5. "ARIE_8_2,ARI channel enable setting for odd half of 8bit ARI configuration  starting from right side (only odd bits are used)" "0,1"
newline
bitfld.long 0x4 4. "ARIE_16_2,ARI channel enable setting for 16bit ARI or even half of 8bit ARI configuration  starting from right side (only even bits are used)" "0,1"
newline
bitfld.long 0x4 3. "ARIE_8_1,ARI channel enable setting for odd half of 8bit ARI configuration  starting from right side (only odd bits are used)" "0,1"
newline
bitfld.long 0x4 2. "ARIE_16_1,ARI channel enable setting for 16bit ARI or even half of 8bit ARI configuration  starting from right side (only even bits are used)" "0,1"
newline
bitfld.long 0x4 1. "ARIE_8_0,ARI channel enable setting for odd half of 8bit ARI configuration  starting from right side (only odd bits are used)" "0,1"
newline
bitfld.long 0x4 0. "ARIE_16_0,ARI channel enable setting for 16bit ARI or even half of 8bit ARI configuration  starting from right side (only even bits are used)" "0,1"
line.long 0x8 "PADD_STRIDE_STARTPOS,"
bitfld.long 0x8 31. "PADDMODE,Padding mode" "0: constant padding,1: identity padding"
newline
bitfld.long 0x8 28.--30. "START_POS_Y,Start position in y direction for all input channels; pre-requirement for using this is to set in 2x3x3 convolution mode the north padding to 0" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x8 24.--27. 1. "START_POS_X,Start position in x direction for all input channels; pre-requirement for using this is to set in 2x3x3 convolution mode the west padding to 0"
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rbitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
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bitfld.long 0x8 20.--21. "DIL_CONV,Dilated convolution in x-direction  val = 0..3" "0,1,2,3"
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bitfld.long 0x8 18.--19. "STRY,Stride for all input channels in y-direction  VAL = 1..3" "0,1,2,3"
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bitfld.long 0x8 16.--17. "STRX,Stride for all input channels in x-direction  VAL = 1..3" "0,1,2,3"
newline
hexmask.long.byte 0x8 11.--15. 1. "PADDE,Padding on east side for all input channels (0..16)  when writing to this value  the individual padding register PADD00_01  PADD04_05  PADD08_09  PADD12_13 get also set"
newline
hexmask.long.byte 0x8 6.--10. 1. "PADDW,Padding on west side for all input channels (0..16)  when writing to this value  the individual padding register PADD00_01  PADD04_05  PADD08_09  PADD12_13 get also set"
newline
bitfld.long 0x8 3.--5. "PADDS,Padding on south side for all input channels (0..7)  when writing to this value  the individual padding register PADD00_01  PADD04_05  PADD08_09  PADD12_13 get also set" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x8 0.--2. "PADDN,Padding on north side for all input channels (0..7)  when writing to this value  the individual padding register PADD00_01  PADD04_05  PADD08_09  PADD12_13 get also set" "0,1,2,3,4,5,6,7"
line.long 0xC "ARI_LEN,"
hexmask.long.byte 0xC 28.--31. 1. "Reserved_28,Reserved"
newline
hexmask.long.word 0xC 16.--27. 1. "ARI_YLEN,ARI length in y direction (0 less_than y less_than= 2048"
newline
hexmask.long.byte 0xC 8.--15. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "ARI_XLEN,ARI length in x direction (0 less_than x less_than= 128)"
line.long 0x10 "SFTM_ZERO_POINT,"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x10 0.--7. 1. "SFTM_ZERO_POINT,Zero point signed value used for all ARI channels  value added after SFTM function when downshift to 8bit and used inside RELU/BRELU activation functions"
line.long 0x14 "ACTIVATION_MULT_POST_SFT,"
hexmask.long 0x14 5.--31. 1. "Reserved_5,Reserved"
newline
hexmask.long.byte 0x14 0.--4. 1. "ACTIVATION_MULT_POST_SFT,Arithmetic downshift after MULT operation for all channels."
line.long 0x18 "ACTIVATION_MULT_VAL,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x18 0.--15. 1. "ACTIVATION_MULT_VAL,Factor for MULT operation for all channels; unsigned 16bit value"
line.long 0x1C "SCALER_MULT_VAL,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x1C 0.--15. 1. "SCALER_MULT_VAL,16bit unsigned scaler multiplier value for all channels  virtual register  when writing to this register  the individual channel scaler multiplier values are getting updated. When reading from this address  0 is read."
wgroup.long 0x1020++0x3
line.long 0x0 "BIAS,"
hexmask.long.word 0x0 16.--31. 1. "BIAS_H,16bit signed bias upper value for all ARI channels  only virtual register  register is not implemented  when writing to this address  data is written to all individual channel BIAS_H entries. When reading from this address  0 is read."
newline
hexmask.long.word 0x0 0.--15. 1. "BIAS,16bit signed bias lower value for all ARI channels  only virtual register  register is not implemented  when writing to this address  data is written to all individual channel BIAS entries. When reading from this address  0 is read."
group.long 0x1024++0x7
line.long 0x0 "PADD_CONST_VAL,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "PADD_CONST_VAL,Padding value used for constant padding mode  value is used according to DMAI format signed/unsigned 8bit/16bit"
line.long 0x4 "ACTIVATION_OUTPUT_PARAM,"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.byte 0x4 16.--20. 1. "ACTIVATION_OUTPUT_SFT,Downshift after MULT operation for all channels"
newline
hexmask.long.word 0x4 0.--15. 1. "ACTIVATION_OUTPUT_MULT,Factor for MULT operation for all channels; unsigned 16bit value"
group.long 0x1100++0xF
line.long 0x0 "PADD_40_0_1,"
hexmask.long.byte 0x0 27.--31. 1. "PADD_1E,padding size on east side for channel 4[p]+1 (0..16)"
newline
hexmask.long.byte 0x0 22.--26. 1. "PADD_1W,padding size on west side for channel 4[p]+1 (0..16)"
newline
bitfld.long 0x0 19.--21. "PADD_1S,padding size on south side for channel 4[p]+1 (0..7)" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 16.--18. "PADD_1N,padding size on north side for channel 4[p]+1 (0..7)" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 11.--15. 1. "PADD_0E,padding size on east side for channel 4[p] (0..16)"
newline
hexmask.long.byte 0x0 6.--10. 1. "PADD_0W,padding size on west side for channel 4[p] (0..16)"
newline
bitfld.long 0x0 3.--5. "PADD_0S,padding size on south side for channel 4[p] (0..7)" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0.--2. "PADD_0N,padding size on north side for channel 4[p] (0..7)" "0,1,2,3,4,5,6,7"
line.long 0x4 "PADD_41_0_1,"
hexmask.long.byte 0x4 27.--31. 1. "PADD_1E,padding size on east side for channel 4[p]+1 (0..16)"
newline
hexmask.long.byte 0x4 22.--26. 1. "PADD_1W,padding size on west side for channel 4[p]+1 (0..16)"
newline
bitfld.long 0x4 19.--21. "PADD_1S,padding size on south side for channel 4[p]+1 (0..7)" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 16.--18. "PADD_1N,padding size on north side for channel 4[p]+1 (0..7)" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 11.--15. 1. "PADD_0E,padding size on east side for channel 4[p] (0..16)"
newline
hexmask.long.byte 0x4 6.--10. 1. "PADD_0W,padding size on west side for channel 4[p] (0..16)"
newline
bitfld.long 0x4 3.--5. "PADD_0S,padding size on south side for channel 4[p] (0..7)" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 0.--2. "PADD_0N,padding size on north side for channel 4[p] (0..7)" "0,1,2,3,4,5,6,7"
line.long 0x8 "PADD_42_0_1,"
hexmask.long.byte 0x8 27.--31. 1. "PADD_1E,padding size on east side for channel 4[p]+1 (0..16)"
newline
hexmask.long.byte 0x8 22.--26. 1. "PADD_1W,padding size on west side for channel 4[p]+1 (0..16)"
newline
bitfld.long 0x8 19.--21. "PADD_1S,padding size on south side for channel 4[p]+1 (0..7)" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x8 16.--18. "PADD_1N,padding size on north side for channel 4[p]+1 (0..7)" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x8 11.--15. 1. "PADD_0E,padding size on east side for channel 4[p] (0..16)"
newline
hexmask.long.byte 0x8 6.--10. 1. "PADD_0W,padding size on west side for channel 4[p] (0..16)"
newline
bitfld.long 0x8 3.--5. "PADD_0S,padding size on south side for channel 4[p] (0..7)" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x8 0.--2. "PADD_0N,padding size on north side for channel 4[p] (0..7)" "0,1,2,3,4,5,6,7"
line.long 0xC "PADD_43_0_1,"
hexmask.long.byte 0xC 27.--31. 1. "PADD_1E,padding size on east side for channel 4[p]+1 (0..16)"
newline
hexmask.long.byte 0xC 22.--26. 1. "PADD_1W,padding size on west side for channel 4[p]+1 (0..16)"
newline
bitfld.long 0xC 19.--21. "PADD_1S,padding size on south side for channel 4[p]+1 (0..7)" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 16.--18. "PADD_1N,padding size on north side for channel 4[p]+1 (0..7)" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0xC 11.--15. 1. "PADD_0E,padding size on east side for channel 4[p] (0..16)"
newline
hexmask.long.byte 0xC 6.--10. 1. "PADD_0W,padding size on west side for channel 4[p] (0..16)"
newline
bitfld.long 0xC 3.--5. "PADD_0S,padding size on south side for channel 4[p] (0..7)" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 0.--2. "PADD_0N,padding size on north side for channel 4[p] (0..7)" "0,1,2,3,4,5,6,7"
group.long 0x1138++0x7F
line.long 0x0 "BIAS_20_0_1,"
hexmask.long.word 0x0 16.--31. 1. "BIAS_1,Lower 16bit signed bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x0 0.--15. 1. "BIAS_0,Lower 16bit signed bias value for ARI channel 2[k]+0"
line.long 0x4 "BIAS_21_0_1,"
hexmask.long.word 0x4 16.--31. 1. "BIAS_1,Lower 16bit signed bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x4 0.--15. 1. "BIAS_0,Lower 16bit signed bias value for ARI channel 2[k]+0"
line.long 0x8 "BIAS_22_0_1,"
hexmask.long.word 0x8 16.--31. 1. "BIAS_1,Lower 16bit signed bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x8 0.--15. 1. "BIAS_0,Lower 16bit signed bias value for ARI channel 2[k]+0"
line.long 0xC "BIAS_23_0_1,"
hexmask.long.word 0xC 16.--31. 1. "BIAS_1,Lower 16bit signed bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0xC 0.--15. 1. "BIAS_0,Lower 16bit signed bias value for ARI channel 2[k]+0"
line.long 0x10 "BIAS_24_0_1,"
hexmask.long.word 0x10 16.--31. 1. "BIAS_1,Lower 16bit signed bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x10 0.--15. 1. "BIAS_0,Lower 16bit signed bias value for ARI channel 2[k]+0"
line.long 0x14 "BIAS_25_0_1,"
hexmask.long.word 0x14 16.--31. 1. "BIAS_1,Lower 16bit signed bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x14 0.--15. 1. "BIAS_0,Lower 16bit signed bias value for ARI channel 2[k]+0"
line.long 0x18 "BIAS_26_0_1,"
hexmask.long.word 0x18 16.--31. 1. "BIAS_1,Lower 16bit signed bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x18 0.--15. 1. "BIAS_0,Lower 16bit signed bias value for ARI channel 2[k]+0"
line.long 0x1C "BIAS_27_0_1,"
hexmask.long.word 0x1C 16.--31. 1. "BIAS_1,Lower 16bit signed bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x1C 0.--15. 1. "BIAS_0,Lower 16bit signed bias value for ARI channel 2[k]+0"
line.long 0x20 "BIAS_28_0_1,"
hexmask.long.word 0x20 16.--31. 1. "BIAS_1,Lower 16bit signed bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x20 0.--15. 1. "BIAS_0,Lower 16bit signed bias value for ARI channel 2[k]+0"
line.long 0x24 "BIAS_29_0_1,"
hexmask.long.word 0x24 16.--31. 1. "BIAS_1,Lower 16bit signed bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x24 0.--15. 1. "BIAS_0,Lower 16bit signed bias value for ARI channel 2[k]+0"
line.long 0x28 "BIAS_210_0_1,"
hexmask.long.word 0x28 16.--31. 1. "BIAS_1,Lower 16bit signed bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x28 0.--15. 1. "BIAS_0,Lower 16bit signed bias value for ARI channel 2[k]+0"
line.long 0x2C "BIAS_211_0_1,"
hexmask.long.word 0x2C 16.--31. 1. "BIAS_1,Lower 16bit signed bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x2C 0.--15. 1. "BIAS_0,Lower 16bit signed bias value for ARI channel 2[k]+0"
line.long 0x30 "BIAS_212_0_1,"
hexmask.long.word 0x30 16.--31. 1. "BIAS_1,Lower 16bit signed bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x30 0.--15. 1. "BIAS_0,Lower 16bit signed bias value for ARI channel 2[k]+0"
line.long 0x34 "BIAS_213_0_1,"
hexmask.long.word 0x34 16.--31. 1. "BIAS_1,Lower 16bit signed bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x34 0.--15. 1. "BIAS_0,Lower 16bit signed bias value for ARI channel 2[k]+0"
line.long 0x38 "BIAS_214_0_1,"
hexmask.long.word 0x38 16.--31. 1. "BIAS_1,Lower 16bit signed bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x38 0.--15. 1. "BIAS_0,Lower 16bit signed bias value for ARI channel 2[k]+0"
line.long 0x3C "BIAS_215_0_1,"
hexmask.long.word 0x3C 16.--31. 1. "BIAS_1,Lower 16bit signed bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x3C 0.--15. 1. "BIAS_0,Lower 16bit signed bias value for ARI channel 2[k]+0"
line.long 0x40 "BIAS_20_0_1_H,"
hexmask.long.word 0x40 16.--31. 1. "BIAS_1_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x40 0.--15. 1. "BIAS_0_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+0"
line.long 0x44 "BIAS_21_0_1_H,"
hexmask.long.word 0x44 16.--31. 1. "BIAS_1_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x44 0.--15. 1. "BIAS_0_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+0"
line.long 0x48 "BIAS_22_0_1_H,"
hexmask.long.word 0x48 16.--31. 1. "BIAS_1_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x48 0.--15. 1. "BIAS_0_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+0"
line.long 0x4C "BIAS_23_0_1_H,"
hexmask.long.word 0x4C 16.--31. 1. "BIAS_1_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x4C 0.--15. 1. "BIAS_0_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+0"
line.long 0x50 "BIAS_24_0_1_H,"
hexmask.long.word 0x50 16.--31. 1. "BIAS_1_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x50 0.--15. 1. "BIAS_0_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+0"
line.long 0x54 "BIAS_25_0_1_H,"
hexmask.long.word 0x54 16.--31. 1. "BIAS_1_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x54 0.--15. 1. "BIAS_0_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+0"
line.long 0x58 "BIAS_26_0_1_H,"
hexmask.long.word 0x58 16.--31. 1. "BIAS_1_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x58 0.--15. 1. "BIAS_0_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+0"
line.long 0x5C "BIAS_27_0_1_H,"
hexmask.long.word 0x5C 16.--31. 1. "BIAS_1_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x5C 0.--15. 1. "BIAS_0_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+0"
line.long 0x60 "BIAS_28_0_1_H,"
hexmask.long.word 0x60 16.--31. 1. "BIAS_1_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x60 0.--15. 1. "BIAS_0_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+0"
line.long 0x64 "BIAS_29_0_1_H,"
hexmask.long.word 0x64 16.--31. 1. "BIAS_1_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x64 0.--15. 1. "BIAS_0_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+0"
line.long 0x68 "BIAS_210_0_1_H,"
hexmask.long.word 0x68 16.--31. 1. "BIAS_1_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x68 0.--15. 1. "BIAS_0_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+0"
line.long 0x6C "BIAS_211_0_1_H,"
hexmask.long.word 0x6C 16.--31. 1. "BIAS_1_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x6C 0.--15. 1. "BIAS_0_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+0"
line.long 0x70 "BIAS_212_0_1_H,"
hexmask.long.word 0x70 16.--31. 1. "BIAS_1_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x70 0.--15. 1. "BIAS_0_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+0"
line.long 0x74 "BIAS_213_0_1_H,"
hexmask.long.word 0x74 16.--31. 1. "BIAS_1_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x74 0.--15. 1. "BIAS_0_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+0"
line.long 0x78 "BIAS_214_0_1_H,"
hexmask.long.word 0x78 16.--31. 1. "BIAS_1_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x78 0.--15. 1. "BIAS_0_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+0"
line.long 0x7C "BIAS_215_0_1_H,"
hexmask.long.word 0x7C 16.--31. 1. "BIAS_1_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x7C 0.--15. 1. "BIAS_0_H,Upper 16bit of signed 32bit bias value for ARI channel 2[k]+0"
group.long 0x11C0++0x3F
line.long 0x0 "SCALER_MULT_20_0_1,"
hexmask.long.word 0x0 16.--31. 1. "SCALER_MULT_1,16bit unsigned SCALER_MULT value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x0 0.--15. 1. "SCALER_MULT_0,16bit unsigned SCALER_MULT value for ARI channel 2[k]+0"
line.long 0x4 "SCALER_MULT_21_0_1,"
hexmask.long.word 0x4 16.--31. 1. "SCALER_MULT_1,16bit unsigned SCALER_MULT value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x4 0.--15. 1. "SCALER_MULT_0,16bit unsigned SCALER_MULT value for ARI channel 2[k]+0"
line.long 0x8 "SCALER_MULT_22_0_1,"
hexmask.long.word 0x8 16.--31. 1. "SCALER_MULT_1,16bit unsigned SCALER_MULT value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x8 0.--15. 1. "SCALER_MULT_0,16bit unsigned SCALER_MULT value for ARI channel 2[k]+0"
line.long 0xC "SCALER_MULT_23_0_1,"
hexmask.long.word 0xC 16.--31. 1. "SCALER_MULT_1,16bit unsigned SCALER_MULT value for ARI channel 2[k]+1"
newline
hexmask.long.word 0xC 0.--15. 1. "SCALER_MULT_0,16bit unsigned SCALER_MULT value for ARI channel 2[k]+0"
line.long 0x10 "SCALER_MULT_24_0_1,"
hexmask.long.word 0x10 16.--31. 1. "SCALER_MULT_1,16bit unsigned SCALER_MULT value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x10 0.--15. 1. "SCALER_MULT_0,16bit unsigned SCALER_MULT value for ARI channel 2[k]+0"
line.long 0x14 "SCALER_MULT_25_0_1,"
hexmask.long.word 0x14 16.--31. 1. "SCALER_MULT_1,16bit unsigned SCALER_MULT value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x14 0.--15. 1. "SCALER_MULT_0,16bit unsigned SCALER_MULT value for ARI channel 2[k]+0"
line.long 0x18 "SCALER_MULT_26_0_1,"
hexmask.long.word 0x18 16.--31. 1. "SCALER_MULT_1,16bit unsigned SCALER_MULT value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x18 0.--15. 1. "SCALER_MULT_0,16bit unsigned SCALER_MULT value for ARI channel 2[k]+0"
line.long 0x1C "SCALER_MULT_27_0_1,"
hexmask.long.word 0x1C 16.--31. 1. "SCALER_MULT_1,16bit unsigned SCALER_MULT value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x1C 0.--15. 1. "SCALER_MULT_0,16bit unsigned SCALER_MULT value for ARI channel 2[k]+0"
line.long 0x20 "SCALER_MULT_28_0_1,"
hexmask.long.word 0x20 16.--31. 1. "SCALER_MULT_1,16bit unsigned SCALER_MULT value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x20 0.--15. 1. "SCALER_MULT_0,16bit unsigned SCALER_MULT value for ARI channel 2[k]+0"
line.long 0x24 "SCALER_MULT_29_0_1,"
hexmask.long.word 0x24 16.--31. 1. "SCALER_MULT_1,16bit unsigned SCALER_MULT value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x24 0.--15. 1. "SCALER_MULT_0,16bit unsigned SCALER_MULT value for ARI channel 2[k]+0"
line.long 0x28 "SCALER_MULT_210_0_1,"
hexmask.long.word 0x28 16.--31. 1. "SCALER_MULT_1,16bit unsigned SCALER_MULT value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x28 0.--15. 1. "SCALER_MULT_0,16bit unsigned SCALER_MULT value for ARI channel 2[k]+0"
line.long 0x2C "SCALER_MULT_211_0_1,"
hexmask.long.word 0x2C 16.--31. 1. "SCALER_MULT_1,16bit unsigned SCALER_MULT value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x2C 0.--15. 1. "SCALER_MULT_0,16bit unsigned SCALER_MULT value for ARI channel 2[k]+0"
line.long 0x30 "SCALER_MULT_212_0_1,"
hexmask.long.word 0x30 16.--31. 1. "SCALER_MULT_1,16bit unsigned SCALER_MULT value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x30 0.--15. 1. "SCALER_MULT_0,16bit unsigned SCALER_MULT value for ARI channel 2[k]+0"
line.long 0x34 "SCALER_MULT_213_0_1,"
hexmask.long.word 0x34 16.--31. 1. "SCALER_MULT_1,16bit unsigned SCALER_MULT value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x34 0.--15. 1. "SCALER_MULT_0,16bit unsigned SCALER_MULT value for ARI channel 2[k]+0"
line.long 0x38 "SCALER_MULT_214_0_1,"
hexmask.long.word 0x38 16.--31. 1. "SCALER_MULT_1,16bit unsigned SCALER_MULT value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x38 0.--15. 1. "SCALER_MULT_0,16bit unsigned SCALER_MULT value for ARI channel 2[k]+0"
line.long 0x3C "SCALER_MULT_215_0_1,"
hexmask.long.word 0x3C 16.--31. 1. "SCALER_MULT_1,16bit unsigned SCALER_MULT value for ARI channel 2[k]+1"
newline
hexmask.long.word 0x3C 0.--15. 1. "SCALER_MULT_0,16bit unsigned SCALER_MULT value for ARI channel 2[k]+0"
group.long 0x2004++0x7
line.long 0x0 "SFTC,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
newline
hexmask.long.byte 0x0 0.--5. 1. "SFTC,Upshift of fractional position for all 3DC channel in the range [0..31]  unsigned  support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check  when writing to this address  all individual SFTCx registers are getting set .."
line.long 0x4 "SFTM,"
hexmask.long 0x4 6.--31. 1. "Reserved_6,Reserved"
newline
hexmask.long.byte 0x4 0.--5. 1. "SFTM,Downshift of fractional position for MAC output [0..47]  unsigned  when writing to this address  all individual SFTMx registers are getting set  only virtual register  which is not implemented; when reading  zero is read."
group.long 0x20D8++0x7
line.long 0x0 "ACTIVATION_ZERO_POINT,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "ACTIVATION_ZERO_POINT,8bit signed Zero Point used for 8bit activation functions"
line.long 0x4 "ARI_BND,"
hexmask.long.word 0x4 16.--31. 1. "ARI_LOWER_BND,ARI lower boundary  the range of upper and lower boundary based on the data type.; 16bit signed value"
newline
hexmask.long.word 0x4 0.--15. 1. "ARI_UPPER_BND,ARI upper boundary  the range of upper and lower boundary based on the data type.; 16bit unsigned value"
group.long 0x2500++0x3F
line.long 0x0 "SFTM_40_0_3,"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x0 24.--29. 1. "SFTM_3,Downshift of fractional position for MAC output channel 4[o]+3 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x0 22.--23. "Reserved_22,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--21. 1. "SFTM_2,Downshift of fractional position for MAC output channel 4[o]+2 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x0 8.--13. 1. "SFTM_1,Downshift of fractional position for MAC output channel 4[o]+1 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "SFTM_0,Downshift of fractional position for MAC output channel 4[o] [0..47]  unsigned  accessible by CL arithmetic"
line.long 0x4 "SFTM_41_0_3,"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x4 24.--29. 1. "SFTM_3,Downshift of fractional position for MAC output channel 4[o]+3 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x4 22.--23. "Reserved_22,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x4 16.--21. 1. "SFTM_2,Downshift of fractional position for MAC output channel 4[o]+2 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x4 8.--13. 1. "SFTM_1,Downshift of fractional position for MAC output channel 4[o]+1 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x4 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x4 0.--5. 1. "SFTM_0,Downshift of fractional position for MAC output channel 4[o] [0..47]  unsigned  accessible by CL arithmetic"
line.long 0x8 "SFTM_42_0_3,"
rbitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x8 24.--29. 1. "SFTM_3,Downshift of fractional position for MAC output channel 4[o]+3 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x8 16.--21. 1. "SFTM_2,Downshift of fractional position for MAC output channel 4[o]+2 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x8 8.--13. 1. "SFTM_1,Downshift of fractional position for MAC output channel 4[o]+1 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x8 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x8 0.--5. 1. "SFTM_0,Downshift of fractional position for MAC output channel 4[o] [0..47]  unsigned  accessible by CL arithmetic"
line.long 0xC "SFTM_43_0_3,"
rbitfld.long 0xC 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0xC 24.--29. 1. "SFTM_3,Downshift of fractional position for MAC output channel 4[o]+3 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0xC 22.--23. "Reserved_22,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0xC 16.--21. 1. "SFTM_2,Downshift of fractional position for MAC output channel 4[o]+2 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0xC 8.--13. 1. "SFTM_1,Downshift of fractional position for MAC output channel 4[o]+1 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0xC 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0xC 0.--5. 1. "SFTM_0,Downshift of fractional position for MAC output channel 4[o] [0..47]  unsigned  accessible by CL arithmetic"
line.long 0x10 "SFTM_44_0_3,"
rbitfld.long 0x10 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x10 24.--29. 1. "SFTM_3,Downshift of fractional position for MAC output channel 4[o]+3 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x10 22.--23. "Reserved_22,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x10 16.--21. 1. "SFTM_2,Downshift of fractional position for MAC output channel 4[o]+2 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x10 8.--13. 1. "SFTM_1,Downshift of fractional position for MAC output channel 4[o]+1 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x10 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x10 0.--5. 1. "SFTM_0,Downshift of fractional position for MAC output channel 4[o] [0..47]  unsigned  accessible by CL arithmetic"
line.long 0x14 "SFTM_45_0_3,"
rbitfld.long 0x14 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x14 24.--29. 1. "SFTM_3,Downshift of fractional position for MAC output channel 4[o]+3 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x14 22.--23. "Reserved_22,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x14 16.--21. 1. "SFTM_2,Downshift of fractional position for MAC output channel 4[o]+2 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x14 8.--13. 1. "SFTM_1,Downshift of fractional position for MAC output channel 4[o]+1 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x14 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x14 0.--5. 1. "SFTM_0,Downshift of fractional position for MAC output channel 4[o] [0..47]  unsigned  accessible by CL arithmetic"
line.long 0x18 "SFTM_46_0_3,"
rbitfld.long 0x18 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x18 24.--29. 1. "SFTM_3,Downshift of fractional position for MAC output channel 4[o]+3 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x18 22.--23. "Reserved_22,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x18 16.--21. 1. "SFTM_2,Downshift of fractional position for MAC output channel 4[o]+2 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x18 8.--13. 1. "SFTM_1,Downshift of fractional position for MAC output channel 4[o]+1 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x18 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x18 0.--5. 1. "SFTM_0,Downshift of fractional position for MAC output channel 4[o] [0..47]  unsigned  accessible by CL arithmetic"
line.long 0x1C "SFTM_47_0_3,"
rbitfld.long 0x1C 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x1C 24.--29. 1. "SFTM_3,Downshift of fractional position for MAC output channel 4[o]+3 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x1C 22.--23. "Reserved_22,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x1C 16.--21. 1. "SFTM_2,Downshift of fractional position for MAC output channel 4[o]+2 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x1C 8.--13. 1. "SFTM_1,Downshift of fractional position for MAC output channel 4[o]+1 [0..47]  unsigned  accessible by CL arithmetic"
newline
rbitfld.long 0x1C 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x1C 0.--5. 1. "SFTM_0,Downshift of fractional position for MAC output channel 4[o] [0..47]  unsigned  accessible by CL arithmetic"
line.long 0x20 "SFTC_40_0_3,"
rbitfld.long 0x20 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x20 24.--28. 1. "SFTC_3,Upshift of fractional position for 3DC channels 4[o]+3 in the range [0..31]  unsigned  support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x20 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x20 16.--20. 1. "SFTC_2,Upshift of fractional position for 3DC channels 4[o]+2 in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x20 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x20 8.--12. 1. "SFTC_1,Upshift of fractional position for 3DC channels 4[o]+1 in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x20 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x20 0.--4. 1. "SFTC_0,Upshift of fractional position for 3DC channels 4[o] in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
line.long 0x24 "SFTC_41_0_3,"
rbitfld.long 0x24 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x24 24.--28. 1. "SFTC_3,Upshift of fractional position for 3DC channels 4[o]+3 in the range [0..31]  unsigned  support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x24 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x24 16.--20. 1. "SFTC_2,Upshift of fractional position for 3DC channels 4[o]+2 in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x24 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x24 8.--12. 1. "SFTC_1,Upshift of fractional position for 3DC channels 4[o]+1 in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x24 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x24 0.--4. 1. "SFTC_0,Upshift of fractional position for 3DC channels 4[o] in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
line.long 0x28 "SFTC_42_0_3,"
rbitfld.long 0x28 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x28 24.--28. 1. "SFTC_3,Upshift of fractional position for 3DC channels 4[o]+3 in the range [0..31]  unsigned  support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x28 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x28 16.--20. 1. "SFTC_2,Upshift of fractional position for 3DC channels 4[o]+2 in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x28 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x28 8.--12. 1. "SFTC_1,Upshift of fractional position for 3DC channels 4[o]+1 in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x28 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x28 0.--4. 1. "SFTC_0,Upshift of fractional position for 3DC channels 4[o] in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
line.long 0x2C "SFTC_43_0_3,"
rbitfld.long 0x2C 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x2C 24.--28. 1. "SFTC_3,Upshift of fractional position for 3DC channels 4[o]+3 in the range [0..31]  unsigned  support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x2C 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x2C 16.--20. 1. "SFTC_2,Upshift of fractional position for 3DC channels 4[o]+2 in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x2C 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x2C 8.--12. 1. "SFTC_1,Upshift of fractional position for 3DC channels 4[o]+1 in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x2C 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x2C 0.--4. 1. "SFTC_0,Upshift of fractional position for 3DC channels 4[o] in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
line.long 0x30 "SFTC_44_0_3,"
rbitfld.long 0x30 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x30 24.--28. 1. "SFTC_3,Upshift of fractional position for 3DC channels 4[o]+3 in the range [0..31]  unsigned  support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x30 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x30 16.--20. 1. "SFTC_2,Upshift of fractional position for 3DC channels 4[o]+2 in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x30 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x30 8.--12. 1. "SFTC_1,Upshift of fractional position for 3DC channels 4[o]+1 in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x30 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x30 0.--4. 1. "SFTC_0,Upshift of fractional position for 3DC channels 4[o] in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
line.long 0x34 "SFTC_45_0_3,"
rbitfld.long 0x34 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x34 24.--28. 1. "SFTC_3,Upshift of fractional position for 3DC channels 4[o]+3 in the range [0..31]  unsigned  support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x34 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x34 16.--20. 1. "SFTC_2,Upshift of fractional position for 3DC channels 4[o]+2 in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x34 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x34 8.--12. 1. "SFTC_1,Upshift of fractional position for 3DC channels 4[o]+1 in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x34 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x34 0.--4. 1. "SFTC_0,Upshift of fractional position for 3DC channels 4[o] in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
line.long 0x38 "SFTC_46_0_3,"
rbitfld.long 0x38 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x38 24.--28. 1. "SFTC_3,Upshift of fractional position for 3DC channels 4[o]+3 in the range [0..31]  unsigned  support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x38 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x38 16.--20. 1. "SFTC_2,Upshift of fractional position for 3DC channels 4[o]+2 in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x38 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x38 8.--12. 1. "SFTC_1,Upshift of fractional position for 3DC channels 4[o]+1 in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x38 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x38 0.--4. 1. "SFTC_0,Upshift of fractional position for 3DC channels 4[o] in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
line.long 0x3C "SFTC_47_0_3,"
rbitfld.long 0x3C 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x3C 24.--28. 1. "SFTC_3,Upshift of fractional position for 3DC channels 4[o]+3 in the range [0..31]  unsigned  support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x3C 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x3C 16.--20. 1. "SFTC_2,Upshift of fractional position for 3DC channels 4[o]+2 in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x3C 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x3C 8.--12. 1. "SFTC_1,Upshift of fractional position for 3DC channels 4[o]+1 in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
newline
rbitfld.long 0x3C 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x3C 0.--4. 1. "SFTC_0,Upshift of fractional position for 3DC channels 4[o] in the range [0..31]  unsigned support of 32bit (8bit) and 41bit (16bit) for shifted output value  no overflow check"
group.long 0x3FE0++0x4B
line.long 0x0 "DMAIWPSA7,"
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x0 0.--20. 1. "DMAIWPSA7,DMAI SPMC0 start address in bytes for channels 224-255  must lie between wrap area 7 start and end address"
line.long 0x4 "DMAIWPA7,"
rbitfld.long 0x4 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 16.--28. 1. "DMAIWPA7_END,DMAI wrap area 7 end address (specified in multiple of 512 byte)"
newline
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "DMAIWPA7_START,DMAI wrap area 7 start address (specified in multiple of 512 byte)"
line.long 0x8 "DMAIWPSA6,"
hexmask.long.word 0x8 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x8 0.--20. 1. "DMAIWPSA6,DMAI SPMC0 start address in bytes for channels 192-223  must lie between wrap area 6 start and end address"
line.long 0xC "DMAIWPA6,"
rbitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0xC 16.--28. 1. "DMAIWPA6_END,DMAI wrap area 6 end address (specified in multiple of 512 byte)"
newline
hexmask.long.byte 0xC 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0xC 0.--11. 1. "DMAIWPA6_START,DMAI wrap area 6 start address (specified in multiple of 512 byte)"
line.long 0x10 "DMAIWPSA5,"
hexmask.long.word 0x10 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x10 0.--20. 1. "DMAIWPSA5,DMAI SPMC0 start address in bytes for channels 160-191  must lie between wrap area 5 start and end address"
line.long 0x14 "DMAIWPA5,"
rbitfld.long 0x14 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x14 16.--28. 1. "DMAIWPA5_END,DMAI wrap area 5 end address (specified in multiple of 512 byte)"
newline
hexmask.long.byte 0x14 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x14 0.--11. 1. "DMAIWPA5_START,DMAI wrap area 5 start address (specified in multiple of 512 byte)"
line.long 0x18 "DMAIWPSA4,"
hexmask.long.word 0x18 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x18 0.--20. 1. "DMAIWPSA4,DMAI SPMC0 start address in bytes for channels 128-159  must lie between wrap area 4 start and end address"
line.long 0x1C "DMAIWPA4,"
rbitfld.long 0x1C 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x1C 16.--28. 1. "DMAIWPA4_END,DMAI wrap area 4 end address (specified in multiple of 512 byte)"
newline
hexmask.long.byte 0x1C 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x1C 0.--11. 1. "DMAIWPA4_START,DMAI wrap area 4 start address (specified in multiple of 512 byte)"
line.long 0x20 "DMAIWPSA3,"
hexmask.long.word 0x20 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x20 0.--20. 1. "DMAIWPSA3,DMAI SPMC0 start address in bytes for channels 96-127  must lie between wrap area 3 start and end address"
line.long 0x24 "DMAIWPA3,"
rbitfld.long 0x24 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x24 16.--28. 1. "DMAIWPA3_END,DMAI wrap area 3 end address (specified in multiple of 512 byte)"
newline
hexmask.long.byte 0x24 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x24 0.--11. 1. "DMAIWPA3_START,DMAI wrap area 3 start address (specified in multiple of 512 byte)"
line.long 0x28 "DMAIWPSA2,"
hexmask.long.word 0x28 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x28 0.--20. 1. "DMAIWPSA2,DMAI SPMC0 start address in bytes for channels 64-95  must lie between wrap area 2 start and end address"
line.long 0x2C "DMAIWPA2,"
rbitfld.long 0x2C 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x2C 16.--28. 1. "DMAIWPA2_END,DMAI wrap area 2 end address (specified in multiple of 512 byte)"
newline
hexmask.long.byte 0x2C 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x2C 0.--11. 1. "DMAIWPA2_START,DMAI wrap area 2 start address (specified in multiple of 512 byte)"
line.long 0x30 "DMAIWPSA1,"
hexmask.long.word 0x30 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x30 0.--20. 1. "DMAIWPSA1,DMAI SPMC0 start address in bytes for channels 32-63  must lie between wrap area 1 start and end address"
line.long 0x34 "DMAIWPA1,"
rbitfld.long 0x34 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x34 16.--28. 1. "DMAIWPA1_END,DMAI wrap area 1 end address (specified in multiple of 512 byte)"
newline
hexmask.long.byte 0x34 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x34 0.--11. 1. "DMAIWPA1_START,DMAI wrap area 1 start address (specified in multiple of 512 byte)"
line.long 0x38 "DMAIWA,"
rbitfld.long 0x38 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x38 16.--28. 1. "DMAIWA_END,DMAI wrap area end address (specified in multiple of 512 byte)"
newline
hexmask.long.byte 0x38 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x38 0.--11. 1. "DMAIWA_START,DMAI wrap area start address (specified in multiple of 512 byte)"
line.long 0x3C "DMAICO,"
hexmask.long.word 0x3C 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x3C 0.--19. 1. "DMAICO,DMAI channel offset between 2 neighbored channels in pixel"
line.long 0x40 "DMAISA,"
hexmask.long.word 0x40 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x40 0.--20. 1. "DMAISA,DMAI SPMC0 start address in bytes  when writing to this value  the individual start address register DMAISA00-13 get also set"
line.long 0x44 "DMAIL,"
rbitfld.long 0x44 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
hexmask.long.word 0x44 16.--29. 1. "DMAILY,DMAI y length in rows for all DMAI channels"
newline
hexmask.long.byte 0x44 10.--15. 1. "Reserved_10,Reserved"
newline
hexmask.long.word 0x44 0.--9. 1. "DMAILX,DMAI x length in pixel for all DMAI channels"
line.long 0x48 "DMAIPARAM,"
bitfld.long 0x48 30.--31. "DMAIMM,Magnification mode:" "0: no magnification,1: skip,?,?"
newline
bitfld.long 0x48 27.--29. "DMAIRMV,Magnification: row repeat/skip amount for all DMAI channels for magnification function; allowed values are 0..4" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x48 24.--26. "DMAIPMV,Magnification: pixel repeat/skip amount for all DMAI channels for magnification function; allowed values are 0..4." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x48 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x48 16.--17. "DMAIFM,Stored format in SPMC0 for all DMAI channels" "0: 8bit signed,1: 8bit unsigned,?,?"
newline
hexmask.long.word 0x48 0.--15. 1. "DMAIST,DMAI stride for all channel in pixel"
wgroup.long 0x402C++0x3
line.long 0x0 "DMAIOA,"
hexmask.long 0x0 0.--31. 1. "DMAIOA,DMAI SPMC0 offset address for all input channels  when writing to this address  all start addresses (DMAISA and DMAISAx) are getting increased  no overflow handling of final start address  only virtual register  which is not implemented; when.."
group.long 0x4030++0x7
line.long 0x0 "DMAIE,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
bitfld.long 0x0 15. "DMAIE_8_7,DMAI channel enable setting for odd half of 8bit DMAI configuration  starting from right side (only odd bits are used)." "0,1"
newline
bitfld.long 0x0 14. "DMAIE_16_7,DMAI channel enable setting for 16bit DMAI or even half of 8bit DMAI configuration  starting from right side (only even bits are used)." "0,1"
newline
bitfld.long 0x0 13. "DMAIE_8_6,DMAI channel enable setting for odd half of 8bit DMAI configuration  starting from right side (only odd bits are used)." "0,1"
newline
bitfld.long 0x0 12. "DMAIE_16_6,DMAI channel enable setting for 16bit DMAI or even half of 8bit DMAI configuration  starting from right side (only even bits are used)." "0,1"
newline
bitfld.long 0x0 11. "DMAIE_8_5,DMAI channel enable setting for odd half of 8bit DMAI configuration  starting from right side (only odd bits are used)." "0,1"
newline
bitfld.long 0x0 10. "DMAIE_16_5,DMAI channel enable setting for 16bit DMAI or even half of 8bit DMAI configuration  starting from right side (only even bits are used)." "0,1"
newline
bitfld.long 0x0 9. "DMAIE_8_4,DMAI channel enable setting for odd half of 8bit DMAI configuration  starting from right side (only odd bits are used)." "0,1"
newline
bitfld.long 0x0 8. "DMAIE_16_4,DMAI channel enable setting for 16bit DMAI or even half of 8bit DMAI configuration  starting from right side (only even bits are used)." "0,1"
newline
bitfld.long 0x0 7. "DMAIE_8_3,DMAI channel enable setting for odd half of 8bit DMAI configuration  starting from right side (only odd bits are used)." "0,1"
newline
bitfld.long 0x0 6. "DMAIE_16_3,DMAI channel enable setting for 16bit DMAI or even half of 8bit DMAI configuration  starting from right side (only even bits are used)." "0,1"
newline
bitfld.long 0x0 5. "DMAIE_8_2,DMAI channel enable setting for odd half of 8bit DMAI configuration  starting from right side (only odd bits are used)." "0,1"
newline
bitfld.long 0x0 4. "DMAIE_16_2,DMAI channel enable setting for 16bit DMAI or even half of 8bit DMAI configuration  starting from right side (only even bits are used)." "0,1"
newline
bitfld.long 0x0 3. "DMAIE_8_1,DMAI channel enable setting for odd half of 8bit DMAI configuration  starting from right side (only odd bits are used)." "0,1"
newline
bitfld.long 0x0 2. "DMAIE_16_1,DMAI channel enable setting for 16bit DMAI or even half of 8bit DMAI configuration  starting from right side (only even bits are used)." "0,1"
newline
bitfld.long 0x0 1. "DMAIE_8_0,DMAI channel enable setting for odd half of 8bit DMAI configuration  starting from right side (only odd bits are used)." "0,1"
newline
bitfld.long 0x0 0. "DMAIE_16_0,DMAI channel enable setting for 16bit DMAI or even half of 8bit DMAI configuration  starting from right side (only even bits are used)." "0,1"
line.long 0x4 "DMAIS,"
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 13. "DMAIS_WRAP_MODE,Specifies wrap around mode for the case that wrap around is specified and 8x1x1 or 4x1x1 mode is used  otherwise  this bit has to be set to 0" "0: using DMAICO for address calculation,1: specifying start addresses and wrap around.."
newline
bitfld.long 0x4 12. "DMAIS_WRAP,Specifies whether wrap around boundaries are specified or not (only usable for packed mode)" "0: not specified,1: specified"
newline
bitfld.long 0x4 11. "DMAIS_8TO16BIT_CONV,Specifies 8bit to 16bit conversion function usage" "0: no conversion from 8bit DMAIFM to 16bit ARIFM,1: conversion from 8bit DMAIFM to 16bit ARIFM"
newline
bitfld.long 0x4 9.--10. "DMAIS_MODE,Specifies DMAI transfer mode" "0: planar,1: planar fast,?,?"
newline
hexmask.long.byte 0x4 5.--8. 1. "DMAIS_PART,Defines which part of the channels are read and where they are stored in line memory"
newline
hexmask.long.byte 0x4 1.--4. 1. "DMAIS_TYPE,Specification of DMAI type"
newline
bitfld.long 0x4 0. "DMAIS_START,Start DMAI transfer" "?,1: start"
group.long 0x4040++0x7
line.long 0x0 "DMAWWA,"
rbitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x0 16.--28. 1. "DMAWWA_END,DMAW wrap area end address (specified in multiple of 512 byte)"
newline
hexmask.long.byte 0x0 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x0 0.--11. 1. "DMAWWA_START,DMAW wrap area start address (specified in multiple of 512 byte)"
line.long 0x4 "DMAWSA,"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x4 0.--20. 1. "DMAWSA,DMAW SPMC0 start address in bytes"
wgroup.long 0x4048++0x3
line.long 0x0 "DMAWOA,"
hexmask.long 0x0 0.--31. 1. "DMAWOA,DMAW SPMC offset address for all input channels  when writing to this address  all start addresses are getting increased  no overflow handling of final start address  only virtual register  which is not implemented; when reading  zero is read."
group.long 0x404C++0x3
line.long 0x0 "DMAWS,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
newline
bitfld.long 0x0 12. "DMAWS_WRAP,Specifies whether wrap around boundaries are specified or not" "0: not specified,1: specified"
newline
hexmask.long.byte 0x0 6.--11. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "DMAWS_FM,Specifies the weight format" "0: signed 8bit,1: signed 16bit"
newline
hexmask.long.byte 0x0 1.--4. 1. "DMAWS_TYPE,Specification of weight type"
newline
bitfld.long 0x0 0. "DMAWS_START,Start weight transfer  default weight transfer is for 1x5x5 mode" "?,1: start"
group.long 0x4100++0x1F
line.long 0x0 "DMAISA_40_0,"
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x0 0.--20. 1. "DMAISA,DMAI SPMC0 start address  input channel 4p  pixel aligned"
line.long 0x4 "DMAISA_40_1,"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x4 0.--20. 1. "DMAISA,DMAI SPMC0 start address  input channel 4p+1  pixel aligned"
line.long 0x8 "DMAISA_41_0,"
hexmask.long.word 0x8 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x8 0.--20. 1. "DMAISA,DMAI SPMC0 start address  input channel 4p  pixel aligned"
line.long 0xC "DMAISA_41_1,"
hexmask.long.word 0xC 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0xC 0.--20. 1. "DMAISA,DMAI SPMC0 start address  input channel 4p+1  pixel aligned"
line.long 0x10 "DMAISA_42_0,"
hexmask.long.word 0x10 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x10 0.--20. 1. "DMAISA,DMAI SPMC0 start address  input channel 4p  pixel aligned"
line.long 0x14 "DMAISA_42_1,"
hexmask.long.word 0x14 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x14 0.--20. 1. "DMAISA,DMAI SPMC0 start address  input channel 4p+1  pixel aligned"
line.long 0x18 "DMAISA_43_0,"
hexmask.long.word 0x18 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x18 0.--20. 1. "DMAISA,DMAI SPMC0 start address  input channel 4p  pixel aligned"
line.long 0x1C "DMAISA_43_1,"
hexmask.long.word 0x1C 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x1C 0.--20. 1. "DMAISA,DMAI SPMC0 start address  input channel 4p+1  pixel aligned"
group.long 0x5000++0xB
line.long 0x0 "DMA3DCSA,"
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
newline
hexmask.long.word 0x0 9.--18. 1. "DMA3DCSA,DMA3DC SPMC1 start address in bytes  16 pixel aligned (s8  s16)  8pixel aligned (m16)  4 pixel aligned (m32)"
newline
hexmask.long.word 0x0 0.--8. 1. "Reserved_0,Reserved"
line.long 0x4 "DMA3DCL,"
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved"
newline
hexmask.long.word 0x4 16.--26. 1. "DMA3DCLY,Allowed value range for y:"
newline
hexmask.long.byte 0x4 8.--15. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "DMA3DCLX,DMA3DC length in SPMC specified in pixel for all DMA3DC channels"
line.long 0x8 "DMA3DCPARAM,"
hexmask.long.word 0x8 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x8 16.--17. "DMA3DCFM,Stored format in SPMC1 memory for all 3DC channels" "0: 8bit signed,1: 16bit signed,?,?"
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
hexmask.long.word 0x8 2.--13. 1. "DMA3DCST,DMA3DC stride set as multiple of 16 pixel (s8  s16)  multiple of 8pixel (m16)  multiple of 4 pixel (m32)"
newline
rbitfld.long 0x8 0.--1. "Reserved_0,Reserved" "0,1,2,3"
wgroup.long 0x500C++0x3
line.long 0x0 "DMA3DCOA,"
hexmask.long 0x0 0.--31. 1. "DMA3DCOA,DMA3DC SPMC1 offset address for all 3DC channel  when writing to this address  the corresponding start address is getting increased  no overflow handling of final start address  only virtual register  which is not implemented. If reading from.."
group.long 0x5010++0x7
line.long 0x0 "DMA3DCE,"
bitfld.long 0x0 31. "DMA3DCE_8_15,DMA3DC channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 30. "DMA3DCE_16_15,DMA3DC channel enable setting for 16bit DMA3DC or even half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 29. "DMA3DCE_8_14,DMA3DC channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 28. "DMA3DCE_16_14,DMA3DC channel enable setting for 16bit DMA3DC or even half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 27. "DMA3DCE_8_13,DMA3DC channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 26. "DMA3DCE_16_13,DMA3DC channel enable setting for 16bit DMA3DC or even half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 25. "DMA3DCE_8_12,DMA3DC channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 24. "DMA3DCE_16_12,DMA3DC channel enable setting for 16bit DMA3DC or even half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 23. "DMA3DCE_8_11,DMA3DC channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 22. "DMA3DCE_16_11,DMA3DC channel enable setting for 16bit DMA3DC or even half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 21. "DMA3DCE_8_10,DMA3DC channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 20. "DMA3DCE_16_10,DMA3DC channel enable setting for 16bit DMA3DC or even half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 19. "DMA3DCE_8_9,DMA3DC channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 18. "DMA3DCE_16_9,DMA3DC channel enable setting for 16bit DMA3DC or even half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 17. "DMA3DCE_8_8,DMA3DC channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 16. "DMA3DCE_16_8,DMA3DC channel enable setting for 16bit DMA3DC or even half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 15. "DMA3DCE_8_7,DMA3DC channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 14. "DMA3DCE_16_7,DMA3DC channel enable setting for 16bit DMA3DC or even half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 13. "DMA3DCE_8_6,DMA3DC channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 12. "DMA3DCE_16_6,DMA3DC channel enable setting for 16bit DMA3DC or even half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 11. "DMA3DCE_8_5,DMA3DC channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 10. "DMA3DCE_16_5,DMA3DC channel enable setting for 16bit DMA3DC or even half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 9. "DMA3DCE_8_4,DMA3DC channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 8. "DMA3DCE_16_4,DMA3DC channel enable setting for 16bit DMA3DC or even half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 7. "DMA3DCE_8_3,DMA3DC channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 6. "DMA3DCE_16_3,DMA3DC channel enable setting for 16bit DMA3DC or even half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 5. "DMA3DCE_8_2,DMA3DC channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 4. "DMA3DCE_16_2,DMA3DC channel enable setting for 16bit DMA3DC or even half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 3. "DMA3DCE_8_1,DMA3DC channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 2. "DMA3DCE_16_1,DMA3DC channel enable setting for 16bit DMA3DC or even half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 1. "DMA3DCE_8_0,DMA3DC channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 0. "DMA3DCE_16_0,DMA3DC channel enable setting for 16bit DMA3DC or even half of 8bit/ mixed 16bit/ mixed 32bit DMA3DC configuration  starting from right side" "0,1"
line.long 0x4 "DMA3DCS,"
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "DMA3DCS,Start DMA3DC transfer" "?,1: start"
group.long 0x6000++0x13
line.long 0x0 "DMAOWA,"
rbitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x0 16.--28. 1. "DMAOWA_END,DMAO wrap area end address (specified in multiple of 512 byte)"
newline
hexmask.long.byte 0x0 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x0 0.--11. 1. "DMAOWA_START,DMAO wrap area start address (specified in multiple of 512 byte)"
line.long 0x4 "DMAOCO,"
hexmask.long.word 0x4 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.word 0x4 4.--19. 1. "DMAOCO,DMAO channel offset between 2 neighbored channels in byte (used for planar fast type)."
newline
hexmask.long.byte 0x4 0.--3. 1. "Reserved_0,Reserved"
line.long 0x8 "DMAOSA,"
hexmask.long.word 0x8 21.--31. 1. "Reserved_21,Reserved"
newline
hexmask.long.tbyte 0x8 0.--20. 1. "DMAOSA,DMAO SPMC0/SPMC1 start address in bytes"
line.long 0xC "DMAOL,"
hexmask.long.byte 0xC 28.--31. 1. "Reserved_28,Reserved"
newline
hexmask.long.word 0xC 16.--27. 1. "DMAOLY,DMAO y length in pixel for all output channels"
newline
hexmask.long.byte 0xC 8.--15. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "DMAOLX,DMAO x length in pixel for all output channels"
line.long 0x10 "DMAOPARAM,"
hexmask.long.word 0x10 21.--31. 1. "Reserved_21,Reserved"
newline
bitfld.long 0x10 20. "ARIFM_AFTER_ACTIVATION,Format for all ARI channels after activation operation  used by DMAO" "0: ;Output lower 8bit from 16bit channel Output,1: ;Output Upper 8bit from 16bit channel Output"
newline
rbitfld.long 0x10 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.long 0x10 16.--17. "DMAOFM,Stored format in SPMC memory for all output channels" "0: 8bit signed,1: 16bit signed,?,?"
newline
hexmask.long.word 0x10 2.--15. 1. "DMAOST,DMAO stride for all channel in pixel"
newline
rbitfld.long 0x10 0.--1. "Reserved_0,Reserved" "0,1,2,3"
wgroup.long 0x6014++0x3
line.long 0x0 "DMAOOA,"
hexmask.long 0x0 0.--31. 1. "DMAOOA,DMAO SPMC0/SPMC1 memory offset address for all output channels  when writing to this address  the corresponding start address is getting increased  no overflow handling of final start address  only virtual register  which is not implemented. When.."
group.long 0x6018++0xB
line.long 0x0 "DMAOE,"
bitfld.long 0x0 31. "DMAOE_8_15,DMAO channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 30. "DMAOE_16_15,DMAO channel enable setting for 16bit ARI or even half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 29. "DMAOE_8_14,DMAO channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 28. "DMAOE_16_14,DMAO channel enable setting for 16bit ARI or even half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 27. "DMAOE_8_13,DMAO channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 26. "DMAOE_16_13,DMAO channel enable setting for 16bit ARI or even half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 25. "DMAOE_8_12,DMAO channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 24. "DMAOE_16_12,DMAO channel enable setting for 16bit ARI or even half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 23. "DMAOE_8_11,DMAO channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 22. "DMAOE_16_11,DMAO channel enable setting for 16bit ARI or even half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 21. "DMAOE_8_10,DMAO channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 20. "DMAOE_16_10,DMAO channel enable setting for 16bit ARI or even half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 19. "DMAOE_8_9,DMAO channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 18. "DMAOE_16_9,DMAO channel enable setting for 16bit ARI or even half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 17. "DMAOE_8_8,DMAO channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 16. "DMAOE_16_8,DMAO channel enable setting for 16bit ARI or even half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 15. "DMAOE_8_7,DMAO channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 14. "DMAOE_16_7,DMAO channel enable setting for 16bit ARI or even half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 13. "DMAOE_8_6,DMAO channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 12. "DMAOE_16_6,DMAO channel enable setting for 16bit ARI or even half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 11. "DMAOE_8_5,DMAO channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 10. "DMAOE_16_5,DMAO channel enable setting for 16bit ARI or even half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 9. "DMAOE_8_4,DMAO channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 8. "DMAOE_16_4,DMAO channel enable setting for 16bit ARI or even half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 7. "DMAOE_8_3,DMAO channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 6. "DMAOE_16_3,DMAO channel enable setting for 16bit ARI or even half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 5. "DMAOE_8_2,DMAO channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 4. "DMAOE_16_2,DMAO channel enable setting for 16bit ARI or even half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 3. "DMAOE_8_1,DMAO channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 2. "DMAOE_16_1,DMAO channel enable setting for 16bit ARI or even half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 1. "DMAOE_8_0,DMAO channel enable setting for odd half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
newline
bitfld.long 0x0 0. "DMAOE_16_0,DMAO channel enable setting for 16bit ARI or even half of 8bit/ mixed 16bit/ mixed 32bit ARI configuration  starting from right side" "0,1"
line.long 0x4 "DMAOS,"
rbitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
newline
hexmask.long.word 0x4 17.--30. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x4 16. "DMARDS,DMA dump register start  during running  DMAO should not run" "?,1: start"
newline
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x4 9. "DMAOS_WRAP,Specifies whether wrap around boundaries are specified or not (only usable for packed mode and SPMC0)" "0: not specified,1: specified"
newline
bitfld.long 0x4 8. "DMAOS_SPMC1,Specifies to which memory DMAO should write" "0: SPMC0,1: SPMC1"
newline
bitfld.long 0x4 7. "DMAOS_RMW,In case of writing less than a set of 8 aligned byte (8bit: 8 channel (0-7  8-15  16-23 or 24-31) by using write enables for packed mode or 8 aligned pixel for planar fast mode; 16bit: 4 channel (0-3  4-7  8-11 or 12-15) by using write enables.." "0: writing zero,1: not writing zero"
newline
bitfld.long 0x4 4.--6. "DMAOS_PART,Defines which channel part is written" "0: 32 channel,1: not used,?,?,?,?,?,?"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 1. "DMAOS_PLANAR,Specifies start of packed or planar fast data transfer mode" "0: packed,1: planar fast"
newline
bitfld.long 0x4 0. "DMAOS_START,Start DMAO transfer" "?,1: start"
line.long 0x8 "DMARDESA,"
hexmask.long.word 0x8 19.--31. 1. "Reserved_19,Reserved"
newline
hexmask.long.word 0x8 9.--18. 1. "DMARDESA,DMAO SPMC1 start address  used for register dump"
newline
hexmask.long.word 0x8 0.--8. 1. "Reserved_0,Reserved"
tree.end
tree "IMP_CVe (IMP-X7 CVengine)"
base ad:0x0
tree "IMP_CVe_0"
base ad:0xFFA40000
rgroup.long 0x0++0x3
line.long 0x0 "VCR00,"
hexmask.long 0x0 0.--31. 1. "Version0,These bits indicate the version of this module."
group.long 0x8++0x7
line.long 0x0 "RSTR0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "SWRST,Software Reset" "0: Release the software reset,1: Supply the software reset"
line.long 0x4 "CR0,"
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "PS,Processing Start" "0,1"
rgroup.long 0x10++0x7
line.long 0x0 "SR00,"
hexmask.long.byte 0x0 24.--31. 1. "INTCODE,INT interrupt code"
newline
hexmask.long.byte 0x0 16.--23. 1. "TRAPCODE,TRAP interrupt code"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
line.long 0x4 "SR10,"
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
newline
bitfld.long 0x4 14. "WUPCOVF,WUP Receive Counter overflow" "0,1"
newline
bitfld.long 0x4 13. "USINT,INT instruction interruption of thread." "0,1"
newline
bitfld.long 0x4 12. "USIER,Command error decode" "0: An illegal instruction has not been decoded,1: An illegal instruction has been decoded"
newline
bitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x4 10. "CLBRK,CL BREAK" "0: CL does not break,1: CL break"
newline
hexmask.long.byte 0x4 5.--9. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "SBO0ME,SBO0 memory size error" "0,1"
newline
bitfld.long 0x4 3. "PBCOVF,Performance Busy Counter Overflow" "0: A performance counter overflow has not been..,1: A performance counter overflow has been detected"
newline
bitfld.long 0x4 2. "INT,INT command decode" "0: An INT command has not been decoded,1: An INT command has been decoded"
newline
bitfld.long 0x4 1. "IER,Undefined command decode in CL or GOSUB over-/ underflow" "0: An unknown command has not been decoded,1: An unknown command has been decoded"
newline
bitfld.long 0x4 0. "TRAP,TRAP command decode" "0: A TRAP command has not been decoded,1: A TRAP command has been decoded"
group.long 0x18++0xB
line.long 0x0 "SCR10,"
hexmask.long.tbyte 0x0 15.--31. 1. "Reserved_15,Reserved"
newline
bitfld.long 0x0 14. "WUPCOVFCLR,By writing double_quotation1double_quotation to this bit  the WUPCOVF bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 13. "USINTCLR,By writing double_quotation1double_quotation to this bit  the USINT bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 12. "USIERCLR,By writing double_quotation1double_quotation to this bit  the USIER bit in SR1 register is cleared." "0,1"
newline
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "CLBRKCLR,By writing double_quotation1double_quotation to this bit  the CLBRK bit in SR1 register is cleared." "0,1"
newline
hexmask.long.byte 0x0 5.--9. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "SBO0MECLR,By writing double_quotation1double_quotation to this bit  the SBO0ME bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 3. "PBCOVFCLR,By writing double_quotation1double_quotation to this bit  the PBCOVF bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 2. "INTCLR,By writing double_quotation1double_quotation to this bit  the INT bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 1. "IERCLR,By writing double_quotation1double_quotation to this bit  the IER bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 0. "TRACLR,By writing double_quotation1double_quotation to this bit  the TRAP bit in SR1 register is cleared." "0,1"
line.long 0x4 "ICR10,"
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
newline
bitfld.long 0x4 14. "WUPCOVFENB,By writing double_quotation1double_quotation to this bit  the WUPCOVF bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 13. "USINTENB,By writing double_quotation1double_quotation to this bit  the USINT bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 12. "USIERENB,By writing double_quotation1double_quotation to this bit  the USIER bit in SR1 register can be set." "0,1"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x4 10. "CLBRKENB,By writing double_quotation1double_quotation to this bit  the CLBRK bit in SR1 register can be set." "0,1"
newline
hexmask.long.byte 0x4 5.--9. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "SBO0MEENB,By writing double_quotation1double_quotation to this bit  the SBO0ME bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 3. "PBCOVFENB,By writing double_quotation1double_quotation to this bit  the PBCOVF bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 2. "INTENB,By writing double_quotation1double_quotation to this bit  the INT bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 1. "IERENB,By writing double_quotation1double_quotation to this bit  the IER bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 0. "TRAENB,By writing double_quotation1double_quotation to this bit  the TRAP bit in SR1 register can be set." "0,1"
line.long 0x8 "IMR10,"
hexmask.long.tbyte 0x8 15.--31. 1. "Reserved_15,Reserved"
newline
bitfld.long 0x8 14. "WUPCOVFMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by WUPCOVF bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 13. "USINTMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by USINT bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 12. "USIERMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by USIER bit in SR1 register is masked." "0,1"
newline
rbitfld.long 0x8 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x8 10. "CLBRKMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by CLBRK bit in SR1 register is masked. This bit is always read as 0." "0,1"
newline
hexmask.long.byte 0x8 5.--9. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x8 4. "SBO0MEMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by SBO0ME bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 3. "PBCOVFMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by PBCOVF bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 2. "INTMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by INT bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 1. "IERMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by IER bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 0. "TRAMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by TRAP bit in SR1 register is masked." "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "SR20,"
hexmask.long 0x0 0.--31. 1. "SR2,INT command decode for thread"
wgroup.long 0x28++0x3
line.long 0x0 "SCR20,"
hexmask.long 0x0 0.--31. 1. "SCR2,By writing double_quotation1double_quotation to each bit  each bit in SR2 register is cleared."
group.long 0x2C++0x3
line.long 0x0 "ICR20,"
hexmask.long 0x0 0.--31. 1. "ICR2,By writing double_quotation1double_quotation to a bit of ICR2  an interrupt of the corresponding thread is setting the USINT bit of SR1 when USINTENB of ICR1 is set."
rgroup.long 0x34++0x3
line.long 0x0 "SR30,"
hexmask.long 0x0 0.--31. 1. "SR3,Indicates whether any illegal instruction has been decoded. To clear any bit of this register  software reset is needed."
group.long 0x40++0x3
line.long 0x0 "MCR00,"
bitfld.long 0x0 31. "testmode,CPU access to internal units." "0: Cannot access internal units,1: Can access internal units"
newline
hexmask.long 0x0 0.--30. 1. "area_sel,Access area selection for test mode"
group.long 0xF8++0x3
line.long 0x0 "MEMINITR0,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved."
newline
rbitfld.long 0x0 23. "lwm3_state,0: Local work memory in CORE3 is not initialized." "0: Local work memory in CORE3 is not initialized,1: Local work memory in CORE3 is initialized at.."
newline
rbitfld.long 0x0 22. "lwm2_state,0: Local work memory in CORE2 is not initialized." "0: Local work memory in CORE2 is not initialized,1: Local work memory in CORE2 is initialized at.."
newline
rbitfld.long 0x0 21. "lwm1_state,0: Local work memory in CORE1 is not initialized." "0: Local work memory in CORE1 is not initialized,1: Local work memory in CORE1 is initialized at.."
newline
rbitfld.long 0x0 20. "lwm0_state,0: Local work memory in CORE0 is not initialized." "0: Local work memory in CORE0 is not initialized,1: Local work memory in CORE0 is initialized at.."
newline
rbitfld.long 0x0 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x0 16. "gwm_state,0: Global work memory is not initialized." "0: Global work memory is not initialized,1: Global work memory is initialized at least once.."
newline
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved."
newline
bitfld.long 0x0 7. "lwm3_init,Read:" "0: Nothing occurs,1: Start initialization of Local Work Memory in CORE3"
newline
bitfld.long 0x0 6. "lwm2_init,Read:" "0: Nothing occurs,1: Start initialization of Local Work Memory in CORE2"
newline
bitfld.long 0x0 5. "lwm1_init,Read:" "0: Nothing occurs,1: Start initialization of Local Work Memory in CORE1"
newline
bitfld.long 0x0 4. "lwm0_init,Read:" "0: Nothing occurs,1: Start initialization of Local Work Memory in Core0"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "gwm_init,Read:" "0: Nothing occurs,1: Start initialization of Global Work Memory"
group.long 0x120++0x3
line.long 0x0 "SCMSKR0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "SCMSKR,Specify if each core in a cluster is used or not."
group.long 0x12C++0x3
line.long 0x0 "TGCR00,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 0.--2. "TGRSEL,To select which core to read the performance counter." "0: Read PFCTOTALR0 from Core 0,1: Read PFCTOTALR0 from Core 1,2: Read PFCTOTALR0 from Core 2,3: Read PFCTOTALR0 from Core 3,?,?,?,?"
rgroup.long 0x130++0x3
line.long 0x0 "SBOCNTR00,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long 0x0 0.--28. 1. "SBOCNTR0,It expresses double_quotationSBO0 Output Numberdouble_quotation (4byte unit)."
group.long 0x180++0x3
line.long 0x0 "DLSAR0,"
hexmask.long 0x0 2.--31. 1. "DLSAR,Descriptor List start address"
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Descriptor List start address" "0,1,2,3"
group.long 0x200++0x7
line.long 0x0 "CLPMINR0,"
hexmask.long.word 0x0 16.--31. 1. "XCLPMINR,X's clipping minimum area (-32768 - 32767)"
newline
hexmask.long.word 0x0 0.--15. 1. "YCLPMINR,Y's clipping minimum area (-32768 - 32767)"
line.long 0x4 "CLPMAXR0,"
hexmask.long.word 0x4 16.--31. 1. "XCLPMAXR,X's clipping maximum area (-32768 - 32767)"
newline
hexmask.long.word 0x4 0.--15. 1. "YCLPMAXR,Y's clipping maximum area (-32768 - 32767)"
group.long 0x280++0x7
line.long 0x0 "SPCR0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "BSYCNTENB,BuSY CouNTer ENaBle" "0: not counting busy cycles of CVengine cluster,1: count busy cycles of CVengine cluster"
line.long 0x4 "SPBSYCNTR0,"
hexmask.long 0x4 0.--31. 1. "SPBSYCNTR,While SPCR.BSYCNTENB is 1  this register counts cycles of"
group.long 0x28C++0x3
line.long 0x0 "SPBCTHRR0,"
hexmask.long 0x0 0.--31. 1. "SPBCTHRR,Shader Performance Busy Counter Threshold value."
group.long 0x2A0++0x7
line.long 0x0 "DCBYPA0MIN0,"
hexmask.long 0x0 0.--31. 1. "DCBYPA0MIN,This register holds memory address of the lower border of the D bypass memory area."
line.long 0x4 "DCBYPA0MAX0,"
hexmask.long 0x4 0.--31. 1. "DCBYPA0MAX,This register holds memory address of the higher border of the D bypass memory area."
group.long 0x2B0++0x7
line.long 0x0 "DCBYPAEN0,"
hexmask.long 0x0 0.--31. 1. "DCBYPAEN,Specify the thread to enable D bypassing. Refer to section U32.8.9 ."
line.long 0x4 "DCBYPACTL0,"
hexmask.long 0x4 0.--31. 1. "DCBYPACTL,Specify the thread to enable Core# and Thread# replacement to the upper 16 bits of writing data. Refer to section U32.8.9 ."
group.long 0x320++0xF
line.long 0x0 "VPCSAR0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "VPCSAR,Start address for master thread."
line.long 0x4 "VSINISAR0,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x4 0.--15. 1. "VSINISAR,SINI start address for master thread."
line.long 0x8 "PPCSAR0,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8 0.--15. 1. "PPCSAR,Start address for slave thread."
line.long 0xC "PSINISAR0,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0xC 0.--15. 1. "PSINISAR,SINI start address for slave thread."
group.long 0x340++0x7
line.long 0x0 "VIBAR0,"
hexmask.long 0x0 0.--31. 1. "VIBAR,These bits set the base address of ICache in the thread (master)"
line.long 0x4 "PIBAR0,"
hexmask.long 0x4 0.--31. 1. "PIBAR,These bits set the base address of ICache in thread (slave)."
group.long 0x360++0xB
line.long 0x0 "SBOBAR00,"
hexmask.long 0x0 0.--31. 1. "SBOBAR0,When this register is written  SBOCNTR0 must be cleared."
line.long 0x4 "SBOMMSR00,"
rbitfld.long 0x4 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long 0x4 0.--28. 1. "SBOMMSR0,This register must be set in 4-byte unit."
line.long 0x8 "SBOCR00,"
bitfld.long 0x8 31. "SBOCNTCLR,By writing double_quotation1double_quotation to this bit  SBOCNTR0 is cleared. The read value is always 0." "0,1"
newline
hexmask.long 0x8 3.--30. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x8 2. "SIGNEDEXT,By writing double_quotation1double_quotation to this bit  the SBO0 expands X and Y to 32-bit range as signed integer." "0,1"
newline
bitfld.long 0x8 1. "PCKMODE,When XYPCK is double_quotation1double_quotation  this bit decides the way of concatenation about the coordinates." "0: {x[15:0],1: {y[15:0]"
newline
bitfld.long 0x8 0. "XYPCK,By writing double_quotation1double_quotation to this bit  the SBO0 handles X(16-bit) and Y(16-bit) as a pair of data." "0,1"
group.long 0x3A0++0x13
line.long 0x0 "DMCR00,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 11. "SELOFSADR,0: DMEXTMEMOFSADDR is used as X Y coordinate" "0: DMEXTMEMOFSADDR is used as X,1: DMEXTMEMOFSADDR is used as the offset address in.."
newline
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "DIR,Specify the direction of DMA transfer." "0: GWM to the external memory,1: The external memory to GWM"
newline
rbitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x0 4.--6. "SELPLN,Specify the plane number (0-7) which determines the address and the stride to calculate a base address of the external memory." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 3. "SELWAIT,Specify the mode of SYNCS instruction of command list." "0: SYNCS exits when the DMAC transfer completes,1: SYNCS exits when the DMAC startup completes"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
rbitfld.long 0x0 1. "DMACST,This bit becomes double_quotation1double_quotation when DMAC is started and returns to double_quotation0double_quotation when DMAC transfer is finished." "0,1"
newline
bitfld.long 0x0 0. "DMACEX,By writing double_quotation1double_quotation to this bit  DMAC is started." "0,1"
line.long 0x4 "DMEXTMEMOFSADDR0,"
hexmask.long 0x4 0.--31. 1. "DMEXTMEMOFSADDR,SELOFSADR=0: bit31-16: X coordinate (signed) in bytes  bit15-0: Y coordinate (signed)."
line.long 0x8 "DMGWMBADDR0,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8 0.--15. 1. "DMGWMBADDR,Specify the start address for DMA transfer within GWM."
line.long 0xC "DMGWMSTRR0,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0xC 0.--15. 1. "DMGWMSTRR,These bits set the signed stride of GWM by byte unit."
line.long 0x10 "DMLNGR0,"
rbitfld.long 0x10 31. "Reserved_31,Reserved" "0,1"
newline
hexmask.long.word 0x10 16.--30. 1. "XLNG,A pixel width in the range of 1 to 16384."
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved" "0,1"
newline
hexmask.long.word 0x10 0.--14. 1. "YLNG,A pixel height in the range of 1 to 16384."
group.long 0x3F4++0x3
line.long 0x0 "CLBRKADDRR0,"
hexmask.long 0x0 0.--31. 1. "CLBRKADDRR,CL break address specification."
group.long 0x3FC++0x93
line.long 0x0 "CLCNDGSBR0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "CLCNDGSBR,Condition for conditional GOSUB instruction:" "0: GOSUB is not executed,1: GOSUB is executed"
line.long 0x4 "IMGBAR00,"
hexmask.long 0x4 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x8 "IMGSTR00,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0xC "IMGC0R00,"
hexmask.long.byte 0xC 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0xC 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0xC 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0xC 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0xC 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0xC 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0xC 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0xC 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x10 "IMGBAR01,"
hexmask.long 0x10 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x14 "IMGSTR01,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x14 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x18 "IMGC0R01,"
hexmask.long.byte 0x18 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x18 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x18 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x18 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x18 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x18 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x18 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x18 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x18 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x18 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x1C "IMGBAR02,"
hexmask.long 0x1C 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x20 "IMGSTR02,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x20 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x24 "IMGC0R02,"
hexmask.long.byte 0x24 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x24 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x24 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x24 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x24 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x24 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x24 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x24 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x24 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x24 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x28 "IMGBAR03,"
hexmask.long 0x28 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x2C "IMGSTR03,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x2C 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x30 "IMGC0R03,"
hexmask.long.byte 0x30 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x30 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x30 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x30 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x30 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x30 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x30 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x30 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x30 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x30 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x34 "IMGBAR04,"
hexmask.long 0x34 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x38 "IMGSTR04,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x38 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x3C "IMGC0R04,"
hexmask.long.byte 0x3C 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x3C 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x3C 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x3C 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x3C 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x3C 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x3C 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x3C 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x3C 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x3C 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x40 "IMGBAR05,"
hexmask.long 0x40 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x44 "IMGSTR05,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x44 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x48 "IMGC0R05,"
hexmask.long.byte 0x48 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x48 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x48 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x48 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x48 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x48 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x48 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x48 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x48 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x48 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x4C "IMGBAR06,"
hexmask.long 0x4C 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x50 "IMGSTR06,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x50 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x54 "IMGC0R06,"
hexmask.long.byte 0x54 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x54 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x54 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x54 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x54 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x54 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x54 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x54 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x54 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x54 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x58 "IMGBAR07,"
hexmask.long 0x58 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x5C "IMGSTR07,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x5C 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x60 "IMGC0R07,"
hexmask.long.byte 0x60 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x60 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x60 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x60 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x60 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x60 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x60 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x60 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x60 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x60 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x64 "IMGBAR08,"
hexmask.long 0x64 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x68 "IMGSTR08,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x68 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x6C "IMGC0R08,"
hexmask.long.byte 0x6C 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x6C 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x6C 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x6C 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x6C 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x6C 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x6C 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x6C 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x6C 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x6C 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x70 "IMGBAR09,"
hexmask.long 0x70 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x74 "IMGSTR09,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x74 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x78 "IMGC0R09,"
hexmask.long.byte 0x78 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x78 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x78 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x78 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x78 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x78 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x78 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x78 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x78 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x78 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x7C "IMGBAR010,"
hexmask.long 0x7C 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x80 "IMGSTR010,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x80 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x84 "IMGC0R010,"
hexmask.long.byte 0x84 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x84 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x84 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x84 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x84 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x84 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x84 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x84 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x84 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x84 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x88 "IMGBAR011,"
hexmask.long 0x88 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x8C "IMGSTR011,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8C 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x90 "IMGC0R011,"
hexmask.long.byte 0x90 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x90 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x90 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x90 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x90 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x90 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x90 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x90 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x90 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x90 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
group.long 0x4C0++0xF
line.long 0x0 "SYNCCR00,"
hexmask.long.byte 0x0 24.--31. 1. "SYNCC3,Specify the core corresponding to bit 3 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x0 16.--23. 1. "SYNCC2,Specify the core corresponding to bit 2 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x0 8.--15. 1. "SYNCC1,Specify the core corresponding to bit 1 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x0 0.--7. 1. "SYNCC0,Specify the core corresponding to bit 0 of CORE Number field of WUP and SLP commands."
line.long 0x4 "SYNCCR10,"
hexmask.long.byte 0x4 24.--31. 1. "SYNCC7,Specify the core corresponding to bit 7 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x4 16.--23. 1. "SYNCC6,Specify the core corresponding to bit 6 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x4 8.--15. 1. "SYNCC5,Specify the core corresponding to bit 5 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x4 0.--7. 1. "SYNCC4,Specify the core corresponding to bit 4 of CORE Number field of WUP and SLP commands."
line.long 0x8 "SYNCCR20,"
hexmask.long.byte 0x8 24.--31. 1. "SYNCC11,Specify the core corresponding to bit 11 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x8 16.--23. 1. "SYNCC10,Specify the core corresponding to bit 10 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x8 8.--15. 1. "SYNCC9,Specify the core corresponding to bit 9 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x8 0.--7. 1. "SYNCC8,Specify the core corresponding to bit 8 of CORE Number field of WUP and SLP commands."
line.long 0xC "SYNCCR30,"
hexmask.long.byte 0xC 24.--31. 1. "SYNCC15,Specify the core corresponding to bit 15 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0xC 16.--23. 1. "SYNCC14,Specify the core corresponding to bit 14 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0xC 8.--15. 1. "SYNCC13,Specify the core corresponding to bit 13 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0xC 0.--7. 1. "SYNCC12,Specify the core corresponding to bit 12 of CORE Number field of WUP and SLP commands."
group.long 0x708++0x3
line.long 0x0 "TGSEN10,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "SLVEN,Slave Thread Enable."
newline
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "MSTEN,Master Thread Enable."
group.long 0x740++0x7
line.long 0x0 "USPFCCTLR0,"
bitfld.long 0x0 31. "PFCENB,PerFormance Counter ENaBle" "0: Performance counter is disabled,1: Performance counter is enabled"
newline
bitfld.long 0x0 30. "PFCTOVF,PerFormance Counter Total register OVerFlow" "0: Performance Counter Total register did not..,1: Performance Counter Total register did overflow"
newline
hexmask.long.tbyte 0x0 11.--29. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x0 8.--10. "SELUSPFC,SELecting Unified Shader to use PerFormance Counter." "0: Select thread 0,1: Select thread 1,2: Select thread 2,3: Select thread 3,4: Select thread 4,5: Select thread 5,6: Select thread 6,7: Select thread 7"
newline
hexmask.long.byte 0x0 0.--7. 1. "PFCMOD,PerFormance Counter MODe"
line.long 0x4 "PFCTOTALR00,"
hexmask.long 0x4 0.--31. 1. "PFCTOTALR0,PerFormance Counter TOTAL Register0"
group.long 0x758++0x3
line.long 0x0 "USCTRL00,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "PFTCHEN,Pre-FeTCH ENable." "0: Disables pre fetch function of thread..,1: Enables pre fetch function of thread instruction.."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
group.long 0x780++0x13
line.long 0x0 "TGDMCR00,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "EXTSIZE,Specify the transaction size of external memory." "0: 32 bytes,1: 64 bytes,?,3: 128 bytes"
newline
bitfld.long 0x0 11. "SELOFSADR,0: TGDMEXTMEMOFSADDR is used as X Y coordinate." "0: TGDMEXTMEMOFSADDR is used as X,1: TGDMEXTMEMOFSADDR is used as offset address in.."
newline
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "DIR,Specify the direction of DMA transfer." "0: LWM to the external memory,1: The external memory to LWM"
newline
rbitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x0 4.--6. "SELPLN,Specify the plane number (0-7) which determines the address and the stride for calculating base address of the external memory." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 3. "SELWAIT,Specify the mode of WAITDMAC instruction." "0: WAITDMAC exits when the DMAC transfer completes,1: WAITDMAC exits when the DMAC startup completes"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
rbitfld.long 0x0 1. "DMACST,This bit becomes double_quotation1double_quotation when DMAC is started and becomes double_quotation0double_quotation when DMAC transfer is finished." "0,1"
newline
bitfld.long 0x0 0. "DMACEX,By writing double_quotation1double_quotation to this bit  DMAC is started." "0,1"
line.long 0x4 "TGDMEXTMEMOFSADDR0,"
hexmask.long 0x4 0.--31. 1. "TGDMEXTMEMOFSADDR,SELOFSADR=0: bit31-16: X coordinate (signed) in bytes  bit15-0: Y coordinate (signed)."
line.long 0x8 "TGDMLWMBADDR0,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8 0.--15. 1. "TGDMLWMBADDR,Specify the start address for DMA transfer within LWM."
line.long 0xC "TGDMLWMSTRR0,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0xC 0.--15. 1. "TGDMLWMSTRR,These bits set the signed stride of LWM by byte unit."
line.long 0x10 "TGLNGR0,"
rbitfld.long 0x10 31. "Reserved_31,Reserved" "0,1"
newline
hexmask.long.word 0x10 16.--30. 1. "XLNG,A width in the range of 1 to 16384 in byte unit."
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved" "0,1"
newline
hexmask.long.word 0x10 0.--14. 1. "YLNG,A height in the range of 1 to16384 in byte unit."
rgroup.long 0x7A0++0x3
line.long 0x0 "TGSBOCNTR00,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long 0x0 2.--28. 1. "TGSBOCNTR0,Number of 4byte write accesses to the SBO register for all 32 threads of a cluster."
newline
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0xC00++0xFF
line.long 0x0 "UNR00,"
hexmask.long 0x0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x4 "UNR01,"
hexmask.long 0x4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x8 "UNR02,"
hexmask.long 0x8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xC "UNR03,"
hexmask.long 0xC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x10 "UNR04,"
hexmask.long 0x10 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x14 "UNR05,"
hexmask.long 0x14 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x18 "UNR06,"
hexmask.long 0x18 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x1C "UNR07,"
hexmask.long 0x1C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x20 "UNR08,"
hexmask.long 0x20 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x24 "UNR09,"
hexmask.long 0x24 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x28 "UNR010,"
hexmask.long 0x28 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x2C "UNR011,"
hexmask.long 0x2C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x30 "UNR012,"
hexmask.long 0x30 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x34 "UNR013,"
hexmask.long 0x34 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x38 "UNR014,"
hexmask.long 0x38 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x3C "UNR015,"
hexmask.long 0x3C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x40 "UNR016,"
hexmask.long 0x40 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x44 "UNR017,"
hexmask.long 0x44 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x48 "UNR018,"
hexmask.long 0x48 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x4C "UNR019,"
hexmask.long 0x4C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x50 "UNR020,"
hexmask.long 0x50 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x54 "UNR021,"
hexmask.long 0x54 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x58 "UNR022,"
hexmask.long 0x58 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x5C "UNR023,"
hexmask.long 0x5C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x60 "UNR024,"
hexmask.long 0x60 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x64 "UNR025,"
hexmask.long 0x64 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x68 "UNR026,"
hexmask.long 0x68 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x6C "UNR027,"
hexmask.long 0x6C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x70 "UNR028,"
hexmask.long 0x70 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x74 "UNR029,"
hexmask.long 0x74 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x78 "UNR030,"
hexmask.long 0x78 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x7C "UNR031,"
hexmask.long 0x7C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x80 "UNR032,"
hexmask.long 0x80 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x84 "UNR033,"
hexmask.long 0x84 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x88 "UNR034,"
hexmask.long 0x88 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x8C "UNR035,"
hexmask.long 0x8C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x90 "UNR036,"
hexmask.long 0x90 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x94 "UNR037,"
hexmask.long 0x94 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x98 "UNR038,"
hexmask.long 0x98 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x9C "UNR039,"
hexmask.long 0x9C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xA0 "UNR040,"
hexmask.long 0xA0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xA4 "UNR041,"
hexmask.long 0xA4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xA8 "UNR042,"
hexmask.long 0xA8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xAC "UNR043,"
hexmask.long 0xAC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xB0 "UNR044,"
hexmask.long 0xB0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xB4 "UNR045,"
hexmask.long 0xB4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xB8 "UNR046,"
hexmask.long 0xB8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xBC "UNR047,"
hexmask.long 0xBC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xC0 "UNR048,"
hexmask.long 0xC0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xC4 "UNR049,"
hexmask.long 0xC4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xC8 "UNR050,"
hexmask.long 0xC8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xCC "UNR051,"
hexmask.long 0xCC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xD0 "UNR052,"
hexmask.long 0xD0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xD4 "UNR053,"
hexmask.long 0xD4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xD8 "UNR054,"
hexmask.long 0xD8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xDC "UNR055,"
hexmask.long 0xDC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xE0 "UNR056,"
hexmask.long 0xE0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xE4 "UNR057,"
hexmask.long 0xE4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xE8 "UNR058,"
hexmask.long 0xE8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xEC "UNR059,"
hexmask.long 0xEC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xF0 "UNR060,"
hexmask.long 0xF0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xF4 "UNR061,"
hexmask.long 0xF4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xF8 "UNR062,"
hexmask.long 0xF8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xFC "UNR063,"
hexmask.long 0xFC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
tree.end
tree "IMP_CVe_1"
base ad:0xFFA50000
rgroup.long 0x0++0x3
line.long 0x0 "VCR01,"
hexmask.long 0x0 0.--31. 1. "Version0,These bits indicate the version of this module."
group.long 0x8++0x7
line.long 0x0 "RSTR1,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "SWRST,Software Reset" "0: Release the software reset,1: Supply the software reset"
line.long 0x4 "CR1,"
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "PS,Processing Start" "0,1"
rgroup.long 0x10++0x7
line.long 0x0 "SR01,"
hexmask.long.byte 0x0 24.--31. 1. "INTCODE,INT interrupt code"
newline
hexmask.long.byte 0x0 16.--23. 1. "TRAPCODE,TRAP interrupt code"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
line.long 0x4 "SR11,"
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
newline
bitfld.long 0x4 14. "WUPCOVF,WUP Receive Counter overflow" "0,1"
newline
bitfld.long 0x4 13. "USINT,INT instruction interruption of thread." "0,1"
newline
bitfld.long 0x4 12. "USIER,Command error decode" "0: An illegal instruction has not been decoded,1: An illegal instruction has been decoded"
newline
bitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x4 10. "CLBRK,CL BREAK" "0: CL does not break,1: CL break"
newline
hexmask.long.byte 0x4 5.--9. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "SBO0ME,SBO0 memory size error" "0,1"
newline
bitfld.long 0x4 3. "PBCOVF,Performance Busy Counter Overflow" "0: A performance counter overflow has not been..,1: A performance counter overflow has been detected"
newline
bitfld.long 0x4 2. "INT,INT command decode" "0: An INT command has not been decoded,1: An INT command has been decoded"
newline
bitfld.long 0x4 1. "IER,Undefined command decode in CL or GOSUB over-/ underflow" "0: An unknown command has not been decoded,1: An unknown command has been decoded"
newline
bitfld.long 0x4 0. "TRAP,TRAP command decode" "0: A TRAP command has not been decoded,1: A TRAP command has been decoded"
group.long 0x18++0xB
line.long 0x0 "SCR11,"
hexmask.long.tbyte 0x0 15.--31. 1. "Reserved_15,Reserved"
newline
bitfld.long 0x0 14. "WUPCOVFCLR,By writing double_quotation1double_quotation to this bit  the WUPCOVF bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 13. "USINTCLR,By writing double_quotation1double_quotation to this bit  the USINT bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 12. "USIERCLR,By writing double_quotation1double_quotation to this bit  the USIER bit in SR1 register is cleared." "0,1"
newline
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "CLBRKCLR,By writing double_quotation1double_quotation to this bit  the CLBRK bit in SR1 register is cleared." "0,1"
newline
hexmask.long.byte 0x0 5.--9. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "SBO0MECLR,By writing double_quotation1double_quotation to this bit  the SBO0ME bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 3. "PBCOVFCLR,By writing double_quotation1double_quotation to this bit  the PBCOVF bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 2. "INTCLR,By writing double_quotation1double_quotation to this bit  the INT bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 1. "IERCLR,By writing double_quotation1double_quotation to this bit  the IER bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 0. "TRACLR,By writing double_quotation1double_quotation to this bit  the TRAP bit in SR1 register is cleared." "0,1"
line.long 0x4 "ICR11,"
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
newline
bitfld.long 0x4 14. "WUPCOVFENB,By writing double_quotation1double_quotation to this bit  the WUPCOVF bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 13. "USINTENB,By writing double_quotation1double_quotation to this bit  the USINT bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 12. "USIERENB,By writing double_quotation1double_quotation to this bit  the USIER bit in SR1 register can be set." "0,1"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x4 10. "CLBRKENB,By writing double_quotation1double_quotation to this bit  the CLBRK bit in SR1 register can be set." "0,1"
newline
hexmask.long.byte 0x4 5.--9. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "SBO0MEENB,By writing double_quotation1double_quotation to this bit  the SBO0ME bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 3. "PBCOVFENB,By writing double_quotation1double_quotation to this bit  the PBCOVF bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 2. "INTENB,By writing double_quotation1double_quotation to this bit  the INT bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 1. "IERENB,By writing double_quotation1double_quotation to this bit  the IER bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 0. "TRAENB,By writing double_quotation1double_quotation to this bit  the TRAP bit in SR1 register can be set." "0,1"
line.long 0x8 "IMR11,"
hexmask.long.tbyte 0x8 15.--31. 1. "Reserved_15,Reserved"
newline
bitfld.long 0x8 14. "WUPCOVFMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by WUPCOVF bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 13. "USINTMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by USINT bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 12. "USIERMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by USIER bit in SR1 register is masked." "0,1"
newline
rbitfld.long 0x8 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x8 10. "CLBRKMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by CLBRK bit in SR1 register is masked. This bit is always read as 0." "0,1"
newline
hexmask.long.byte 0x8 5.--9. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x8 4. "SBO0MEMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by SBO0ME bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 3. "PBCOVFMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by PBCOVF bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 2. "INTMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by INT bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 1. "IERMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by IER bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 0. "TRAMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by TRAP bit in SR1 register is masked." "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "SR21,"
hexmask.long 0x0 0.--31. 1. "SR2,INT command decode for thread"
wgroup.long 0x28++0x3
line.long 0x0 "SCR21,"
hexmask.long 0x0 0.--31. 1. "SCR2,By writing double_quotation1double_quotation to each bit  each bit in SR2 register is cleared."
group.long 0x2C++0x3
line.long 0x0 "ICR21,"
hexmask.long 0x0 0.--31. 1. "ICR2,By writing double_quotation1double_quotation to a bit of ICR2  an interrupt of the corresponding thread is setting the USINT bit of SR1 when USINTENB of ICR1 is set."
rgroup.long 0x34++0x3
line.long 0x0 "SR31,"
hexmask.long 0x0 0.--31. 1. "SR3,Indicates whether any illegal instruction has been decoded. To clear any bit of this register  software reset is needed."
group.long 0x40++0x3
line.long 0x0 "MCR01,"
bitfld.long 0x0 31. "testmode,CPU access to internal units." "0: Cannot access internal units,1: Can access internal units"
newline
hexmask.long 0x0 0.--30. 1. "area_sel,Access area selection for test mode"
group.long 0xF8++0x3
line.long 0x0 "MEMINITR1,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved."
newline
rbitfld.long 0x0 23. "lwm3_state,0: Local work memory in CORE3 is not initialized." "0: Local work memory in CORE3 is not initialized,1: Local work memory in CORE3 is initialized at.."
newline
rbitfld.long 0x0 22. "lwm2_state,0: Local work memory in CORE2 is not initialized." "0: Local work memory in CORE2 is not initialized,1: Local work memory in CORE2 is initialized at.."
newline
rbitfld.long 0x0 21. "lwm1_state,0: Local work memory in CORE1 is not initialized." "0: Local work memory in CORE1 is not initialized,1: Local work memory in CORE1 is initialized at.."
newline
rbitfld.long 0x0 20. "lwm0_state,0: Local work memory in CORE0 is not initialized." "0: Local work memory in CORE0 is not initialized,1: Local work memory in CORE0 is initialized at.."
newline
rbitfld.long 0x0 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x0 16. "gwm_state,0: Global work memory is not initialized." "0: Global work memory is not initialized,1: Global work memory is initialized at least once.."
newline
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved."
newline
bitfld.long 0x0 7. "lwm3_init,Read:" "0: Nothing occurs,1: Start initialization of Local Work Memory in CORE3"
newline
bitfld.long 0x0 6. "lwm2_init,Read:" "0: Nothing occurs,1: Start initialization of Local Work Memory in CORE2"
newline
bitfld.long 0x0 5. "lwm1_init,Read:" "0: Nothing occurs,1: Start initialization of Local Work Memory in CORE1"
newline
bitfld.long 0x0 4. "lwm0_init,Read:" "0: Nothing occurs,1: Start initialization of Local Work Memory in Core0"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "gwm_init,Read:" "0: Nothing occurs,1: Start initialization of Global Work Memory"
group.long 0x120++0x3
line.long 0x0 "SCMSKR1,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "SCMSKR,Specify if each core in a cluster is used or not."
group.long 0x12C++0x3
line.long 0x0 "TGCR01,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 0.--2. "TGRSEL,To select which core to read the performance counter." "0: Read PFCTOTALR0 from Core 0,1: Read PFCTOTALR0 from Core 1,2: Read PFCTOTALR0 from Core 2,3: Read PFCTOTALR0 from Core 3,?,?,?,?"
rgroup.long 0x130++0x3
line.long 0x0 "SBOCNTR01,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long 0x0 0.--28. 1. "SBOCNTR0,It expresses double_quotationSBO0 Output Numberdouble_quotation (4byte unit)."
group.long 0x180++0x3
line.long 0x0 "DLSAR1,"
hexmask.long 0x0 2.--31. 1. "DLSAR,Descriptor List start address"
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Descriptor List start address" "0,1,2,3"
group.long 0x200++0x7
line.long 0x0 "CLPMINR1,"
hexmask.long.word 0x0 16.--31. 1. "XCLPMINR,X's clipping minimum area (-32768 - 32767)"
newline
hexmask.long.word 0x0 0.--15. 1. "YCLPMINR,Y's clipping minimum area (-32768 - 32767)"
line.long 0x4 "CLPMAXR1,"
hexmask.long.word 0x4 16.--31. 1. "XCLPMAXR,X's clipping maximum area (-32768 - 32767)"
newline
hexmask.long.word 0x4 0.--15. 1. "YCLPMAXR,Y's clipping maximum area (-32768 - 32767)"
group.long 0x280++0x7
line.long 0x0 "SPCR1,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "BSYCNTENB,BuSY CouNTer ENaBle" "0: not counting busy cycles of CVengine cluster,1: count busy cycles of CVengine cluster"
line.long 0x4 "SPBSYCNTR1,"
hexmask.long 0x4 0.--31. 1. "SPBSYCNTR,While SPCR.BSYCNTENB is 1  this register counts cycles of"
group.long 0x28C++0x3
line.long 0x0 "SPBCTHRR1,"
hexmask.long 0x0 0.--31. 1. "SPBCTHRR,Shader Performance Busy Counter Threshold value."
group.long 0x2A0++0x7
line.long 0x0 "DCBYPA0MIN1,"
hexmask.long 0x0 0.--31. 1. "DCBYPA0MIN,This register holds memory address of the lower border of the D bypass memory area."
line.long 0x4 "DCBYPA0MAX1,"
hexmask.long 0x4 0.--31. 1. "DCBYPA0MAX,This register holds memory address of the higher border of the D bypass memory area."
group.long 0x2B0++0x7
line.long 0x0 "DCBYPAEN1,"
hexmask.long 0x0 0.--31. 1. "DCBYPAEN,Specify the thread to enable D bypassing. Refer to section U32.8.9 ."
line.long 0x4 "DCBYPACTL1,"
hexmask.long 0x4 0.--31. 1. "DCBYPACTL,Specify the thread to enable Core# and Thread# replacement to the upper 16 bits of writing data. Refer to section U32.8.9 ."
group.long 0x320++0xF
line.long 0x0 "VPCSAR1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "VPCSAR,Start address for master thread."
line.long 0x4 "VSINISAR1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x4 0.--15. 1. "VSINISAR,SINI start address for master thread."
line.long 0x8 "PPCSAR1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8 0.--15. 1. "PPCSAR,Start address for slave thread."
line.long 0xC "PSINISAR1,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0xC 0.--15. 1. "PSINISAR,SINI start address for slave thread."
group.long 0x340++0x7
line.long 0x0 "VIBAR1,"
hexmask.long 0x0 0.--31. 1. "VIBAR,These bits set the base address of ICache in the thread (master)"
line.long 0x4 "PIBAR1,"
hexmask.long 0x4 0.--31. 1. "PIBAR,These bits set the base address of ICache in thread (slave)."
group.long 0x360++0xB
line.long 0x0 "SBOBAR01,"
hexmask.long 0x0 0.--31. 1. "SBOBAR0,When this register is written  SBOCNTR0 must be cleared."
line.long 0x4 "SBOMMSR01,"
rbitfld.long 0x4 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long 0x4 0.--28. 1. "SBOMMSR0,This register must be set in 4-byte unit."
line.long 0x8 "SBOCR01,"
bitfld.long 0x8 31. "SBOCNTCLR,By writing double_quotation1double_quotation to this bit  SBOCNTR0 is cleared. The read value is always 0." "0,1"
newline
hexmask.long 0x8 3.--30. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x8 2. "SIGNEDEXT,By writing double_quotation1double_quotation to this bit  the SBO0 expands X and Y to 32-bit range as signed integer." "0,1"
newline
bitfld.long 0x8 1. "PCKMODE,When XYPCK is double_quotation1double_quotation  this bit decides the way of concatenation about the coordinates." "0: {x[15:0],1: {y[15:0]"
newline
bitfld.long 0x8 0. "XYPCK,By writing double_quotation1double_quotation to this bit  the SBO0 handles X(16-bit) and Y(16-bit) as a pair of data." "0,1"
group.long 0x3A0++0x13
line.long 0x0 "DMCR01,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 11. "SELOFSADR,0: DMEXTMEMOFSADDR is used as X Y coordinate" "0: DMEXTMEMOFSADDR is used as X,1: DMEXTMEMOFSADDR is used as the offset address in.."
newline
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "DIR,Specify the direction of DMA transfer." "0: GWM to the external memory,1: The external memory to GWM"
newline
rbitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x0 4.--6. "SELPLN,Specify the plane number (0-7) which determines the address and the stride to calculate a base address of the external memory." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 3. "SELWAIT,Specify the mode of SYNCS instruction of command list." "0: SYNCS exits when the DMAC transfer completes,1: SYNCS exits when the DMAC startup completes"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
rbitfld.long 0x0 1. "DMACST,This bit becomes double_quotation1double_quotation when DMAC is started and returns to double_quotation0double_quotation when DMAC transfer is finished." "0,1"
newline
bitfld.long 0x0 0. "DMACEX,By writing double_quotation1double_quotation to this bit  DMAC is started." "0,1"
line.long 0x4 "DMEXTMEMOFSADDR1,"
hexmask.long 0x4 0.--31. 1. "DMEXTMEMOFSADDR,SELOFSADR=0: bit31-16: X coordinate (signed) in bytes  bit15-0: Y coordinate (signed)."
line.long 0x8 "DMGWMBADDR1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8 0.--15. 1. "DMGWMBADDR,Specify the start address for DMA transfer within GWM."
line.long 0xC "DMGWMSTRR1,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0xC 0.--15. 1. "DMGWMSTRR,These bits set the signed stride of GWM by byte unit."
line.long 0x10 "DMLNGR1,"
rbitfld.long 0x10 31. "Reserved_31,Reserved" "0,1"
newline
hexmask.long.word 0x10 16.--30. 1. "XLNG,A pixel width in the range of 1 to 16384."
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved" "0,1"
newline
hexmask.long.word 0x10 0.--14. 1. "YLNG,A pixel height in the range of 1 to 16384."
group.long 0x3F4++0x3
line.long 0x0 "CLBRKADDRR1,"
hexmask.long 0x0 0.--31. 1. "CLBRKADDRR,CL break address specification."
group.long 0x3FC++0x93
line.long 0x0 "CLCNDGSBR1,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "CLCNDGSBR,Condition for conditional GOSUB instruction:" "0: GOSUB is not executed,1: GOSUB is executed"
line.long 0x4 "IMGBAR10,"
hexmask.long 0x4 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x8 "IMGSTR10,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0xC "IMGC0R10,"
hexmask.long.byte 0xC 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0xC 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0xC 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0xC 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0xC 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0xC 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0xC 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0xC 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x10 "IMGBAR11,"
hexmask.long 0x10 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x14 "IMGSTR11,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x14 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x18 "IMGC0R11,"
hexmask.long.byte 0x18 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x18 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x18 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x18 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x18 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x18 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x18 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x18 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x18 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x18 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x1C "IMGBAR12,"
hexmask.long 0x1C 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x20 "IMGSTR12,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x20 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x24 "IMGC0R12,"
hexmask.long.byte 0x24 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x24 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x24 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x24 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x24 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x24 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x24 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x24 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x24 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x24 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x28 "IMGBAR13,"
hexmask.long 0x28 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x2C "IMGSTR13,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x2C 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x30 "IMGC0R13,"
hexmask.long.byte 0x30 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x30 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x30 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x30 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x30 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x30 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x30 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x30 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x30 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x30 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x34 "IMGBAR14,"
hexmask.long 0x34 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x38 "IMGSTR14,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x38 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x3C "IMGC0R14,"
hexmask.long.byte 0x3C 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x3C 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x3C 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x3C 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x3C 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x3C 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x3C 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x3C 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x3C 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x3C 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x40 "IMGBAR15,"
hexmask.long 0x40 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x44 "IMGSTR15,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x44 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x48 "IMGC0R15,"
hexmask.long.byte 0x48 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x48 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x48 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x48 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x48 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x48 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x48 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x48 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x48 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x48 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x4C "IMGBAR16,"
hexmask.long 0x4C 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x50 "IMGSTR16,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x50 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x54 "IMGC0R16,"
hexmask.long.byte 0x54 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x54 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x54 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x54 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x54 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x54 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x54 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x54 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x54 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x54 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x58 "IMGBAR17,"
hexmask.long 0x58 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x5C "IMGSTR17,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x5C 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x60 "IMGC0R17,"
hexmask.long.byte 0x60 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x60 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x60 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x60 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x60 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x60 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x60 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x60 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x60 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x60 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x64 "IMGBAR18,"
hexmask.long 0x64 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x68 "IMGSTR18,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x68 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x6C "IMGC0R18,"
hexmask.long.byte 0x6C 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x6C 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x6C 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x6C 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x6C 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x6C 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x6C 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x6C 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x6C 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x6C 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x70 "IMGBAR19,"
hexmask.long 0x70 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x74 "IMGSTR19,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x74 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x78 "IMGC0R19,"
hexmask.long.byte 0x78 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x78 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x78 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x78 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x78 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x78 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x78 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x78 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x78 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x78 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x7C "IMGBAR110,"
hexmask.long 0x7C 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x80 "IMGSTR110,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x80 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x84 "IMGC0R110,"
hexmask.long.byte 0x84 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x84 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x84 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x84 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x84 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x84 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x84 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x84 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x84 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x84 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x88 "IMGBAR111,"
hexmask.long 0x88 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x8C "IMGSTR111,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8C 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x90 "IMGC0R111,"
hexmask.long.byte 0x90 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x90 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x90 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x90 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x90 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x90 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x90 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x90 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x90 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x90 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
group.long 0x4C0++0xF
line.long 0x0 "SYNCCR01,"
hexmask.long.byte 0x0 24.--31. 1. "SYNCC3,Specify the core corresponding to bit 3 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x0 16.--23. 1. "SYNCC2,Specify the core corresponding to bit 2 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x0 8.--15. 1. "SYNCC1,Specify the core corresponding to bit 1 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x0 0.--7. 1. "SYNCC0,Specify the core corresponding to bit 0 of CORE Number field of WUP and SLP commands."
line.long 0x4 "SYNCCR11,"
hexmask.long.byte 0x4 24.--31. 1. "SYNCC7,Specify the core corresponding to bit 7 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x4 16.--23. 1. "SYNCC6,Specify the core corresponding to bit 6 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x4 8.--15. 1. "SYNCC5,Specify the core corresponding to bit 5 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x4 0.--7. 1. "SYNCC4,Specify the core corresponding to bit 4 of CORE Number field of WUP and SLP commands."
line.long 0x8 "SYNCCR21,"
hexmask.long.byte 0x8 24.--31. 1. "SYNCC11,Specify the core corresponding to bit 11 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x8 16.--23. 1. "SYNCC10,Specify the core corresponding to bit 10 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x8 8.--15. 1. "SYNCC9,Specify the core corresponding to bit 9 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x8 0.--7. 1. "SYNCC8,Specify the core corresponding to bit 8 of CORE Number field of WUP and SLP commands."
line.long 0xC "SYNCCR31,"
hexmask.long.byte 0xC 24.--31. 1. "SYNCC15,Specify the core corresponding to bit 15 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0xC 16.--23. 1. "SYNCC14,Specify the core corresponding to bit 14 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0xC 8.--15. 1. "SYNCC13,Specify the core corresponding to bit 13 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0xC 0.--7. 1. "SYNCC12,Specify the core corresponding to bit 12 of CORE Number field of WUP and SLP commands."
group.long 0x708++0x3
line.long 0x0 "TGSEN11,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "SLVEN,Slave Thread Enable."
newline
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "MSTEN,Master Thread Enable."
group.long 0x740++0x7
line.long 0x0 "USPFCCTLR1,"
bitfld.long 0x0 31. "PFCENB,PerFormance Counter ENaBle" "0: Performance counter is disabled,1: Performance counter is enabled"
newline
bitfld.long 0x0 30. "PFCTOVF,PerFormance Counter Total register OVerFlow" "0: Performance Counter Total register did not..,1: Performance Counter Total register did overflow"
newline
hexmask.long.tbyte 0x0 11.--29. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x0 8.--10. "SELUSPFC,SELecting Unified Shader to use PerFormance Counter." "0: Select thread 0,1: Select thread 1,2: Select thread 2,3: Select thread 3,4: Select thread 4,5: Select thread 5,6: Select thread 6,7: Select thread 7"
newline
hexmask.long.byte 0x0 0.--7. 1. "PFCMOD,PerFormance Counter MODe"
line.long 0x4 "PFCTOTALR01,"
hexmask.long 0x4 0.--31. 1. "PFCTOTALR0,PerFormance Counter TOTAL Register0"
group.long 0x758++0x3
line.long 0x0 "USCTRL01,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "PFTCHEN,Pre-FeTCH ENable." "0: Disables pre fetch function of thread..,1: Enables pre fetch function of thread instruction.."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
group.long 0x780++0x13
line.long 0x0 "TGDMCR01,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "EXTSIZE,Specify the transaction size of external memory." "0: 32 bytes,1: 64 bytes,?,3: 128 bytes"
newline
bitfld.long 0x0 11. "SELOFSADR,0: TGDMEXTMEMOFSADDR is used as X Y coordinate." "0: TGDMEXTMEMOFSADDR is used as X,1: TGDMEXTMEMOFSADDR is used as offset address in.."
newline
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "DIR,Specify the direction of DMA transfer." "0: LWM to the external memory,1: The external memory to LWM"
newline
rbitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x0 4.--6. "SELPLN,Specify the plane number (0-7) which determines the address and the stride for calculating base address of the external memory." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 3. "SELWAIT,Specify the mode of WAITDMAC instruction." "0: WAITDMAC exits when the DMAC transfer completes,1: WAITDMAC exits when the DMAC startup completes"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
rbitfld.long 0x0 1. "DMACST,This bit becomes double_quotation1double_quotation when DMAC is started and becomes double_quotation0double_quotation when DMAC transfer is finished." "0,1"
newline
bitfld.long 0x0 0. "DMACEX,By writing double_quotation1double_quotation to this bit  DMAC is started." "0,1"
line.long 0x4 "TGDMEXTMEMOFSADDR1,"
hexmask.long 0x4 0.--31. 1. "TGDMEXTMEMOFSADDR,SELOFSADR=0: bit31-16: X coordinate (signed) in bytes  bit15-0: Y coordinate (signed)."
line.long 0x8 "TGDMLWMBADDR1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8 0.--15. 1. "TGDMLWMBADDR,Specify the start address for DMA transfer within LWM."
line.long 0xC "TGDMLWMSTRR1,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0xC 0.--15. 1. "TGDMLWMSTRR,These bits set the signed stride of LWM by byte unit."
line.long 0x10 "TGLNGR1,"
rbitfld.long 0x10 31. "Reserved_31,Reserved" "0,1"
newline
hexmask.long.word 0x10 16.--30. 1. "XLNG,A width in the range of 1 to 16384 in byte unit."
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved" "0,1"
newline
hexmask.long.word 0x10 0.--14. 1. "YLNG,A height in the range of 1 to16384 in byte unit."
rgroup.long 0x7A0++0x3
line.long 0x0 "TGSBOCNTR01,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long 0x0 2.--28. 1. "TGSBOCNTR0,Number of 4byte write accesses to the SBO register for all 32 threads of a cluster."
newline
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0xC00++0xFF
line.long 0x0 "UNR10,"
hexmask.long 0x0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x4 "UNR11,"
hexmask.long 0x4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x8 "UNR12,"
hexmask.long 0x8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xC "UNR13,"
hexmask.long 0xC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x10 "UNR14,"
hexmask.long 0x10 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x14 "UNR15,"
hexmask.long 0x14 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x18 "UNR16,"
hexmask.long 0x18 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x1C "UNR17,"
hexmask.long 0x1C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x20 "UNR18,"
hexmask.long 0x20 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x24 "UNR19,"
hexmask.long 0x24 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x28 "UNR110,"
hexmask.long 0x28 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x2C "UNR111,"
hexmask.long 0x2C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x30 "UNR112,"
hexmask.long 0x30 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x34 "UNR113,"
hexmask.long 0x34 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x38 "UNR114,"
hexmask.long 0x38 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x3C "UNR115,"
hexmask.long 0x3C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x40 "UNR116,"
hexmask.long 0x40 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x44 "UNR117,"
hexmask.long 0x44 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x48 "UNR118,"
hexmask.long 0x48 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x4C "UNR119,"
hexmask.long 0x4C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x50 "UNR120,"
hexmask.long 0x50 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x54 "UNR121,"
hexmask.long 0x54 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x58 "UNR122,"
hexmask.long 0x58 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x5C "UNR123,"
hexmask.long 0x5C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x60 "UNR124,"
hexmask.long 0x60 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x64 "UNR125,"
hexmask.long 0x64 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x68 "UNR126,"
hexmask.long 0x68 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x6C "UNR127,"
hexmask.long 0x6C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x70 "UNR128,"
hexmask.long 0x70 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x74 "UNR129,"
hexmask.long 0x74 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x78 "UNR130,"
hexmask.long 0x78 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x7C "UNR131,"
hexmask.long 0x7C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x80 "UNR132,"
hexmask.long 0x80 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x84 "UNR133,"
hexmask.long 0x84 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x88 "UNR134,"
hexmask.long 0x88 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x8C "UNR135,"
hexmask.long 0x8C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x90 "UNR136,"
hexmask.long 0x90 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x94 "UNR137,"
hexmask.long 0x94 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x98 "UNR138,"
hexmask.long 0x98 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x9C "UNR139,"
hexmask.long 0x9C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xA0 "UNR140,"
hexmask.long 0xA0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xA4 "UNR141,"
hexmask.long 0xA4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xA8 "UNR142,"
hexmask.long 0xA8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xAC "UNR143,"
hexmask.long 0xAC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xB0 "UNR144,"
hexmask.long 0xB0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xB4 "UNR145,"
hexmask.long 0xB4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xB8 "UNR146,"
hexmask.long 0xB8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xBC "UNR147,"
hexmask.long 0xBC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xC0 "UNR148,"
hexmask.long 0xC0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xC4 "UNR149,"
hexmask.long 0xC4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xC8 "UNR150,"
hexmask.long 0xC8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xCC "UNR151,"
hexmask.long 0xCC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xD0 "UNR152,"
hexmask.long 0xD0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xD4 "UNR153,"
hexmask.long 0xD4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xD8 "UNR154,"
hexmask.long 0xD8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xDC "UNR155,"
hexmask.long 0xDC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xE0 "UNR156,"
hexmask.long 0xE0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xE4 "UNR157,"
hexmask.long 0xE4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xE8 "UNR158,"
hexmask.long 0xE8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xEC "UNR159,"
hexmask.long 0xEC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xF0 "UNR160,"
hexmask.long 0xF0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xF4 "UNR161,"
hexmask.long 0xF4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xF8 "UNR162,"
hexmask.long 0xF8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xFC "UNR163,"
hexmask.long 0xFC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
tree.end
tree "IMP_CVe_2"
base ad:0xFFA60000
rgroup.long 0x0++0x3
line.long 0x0 "VCR02,"
hexmask.long 0x0 0.--31. 1. "Version0,These bits indicate the version of this module."
group.long 0x8++0x7
line.long 0x0 "RSTR2,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "SWRST,Software Reset" "0: Release the software reset,1: Supply the software reset"
line.long 0x4 "CR2,"
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "PS,Processing Start" "0,1"
rgroup.long 0x10++0x7
line.long 0x0 "SR02,"
hexmask.long.byte 0x0 24.--31. 1. "INTCODE,INT interrupt code"
newline
hexmask.long.byte 0x0 16.--23. 1. "TRAPCODE,TRAP interrupt code"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
line.long 0x4 "SR12,"
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
newline
bitfld.long 0x4 14. "WUPCOVF,WUP Receive Counter overflow" "0,1"
newline
bitfld.long 0x4 13. "USINT,INT instruction interruption of thread." "0,1"
newline
bitfld.long 0x4 12. "USIER,Command error decode" "0: An illegal instruction has not been decoded,1: An illegal instruction has been decoded"
newline
bitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x4 10. "CLBRK,CL BREAK" "0: CL does not break,1: CL break"
newline
hexmask.long.byte 0x4 5.--9. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "SBO0ME,SBO0 memory size error" "0,1"
newline
bitfld.long 0x4 3. "PBCOVF,Performance Busy Counter Overflow" "0: A performance counter overflow has not been..,1: A performance counter overflow has been detected"
newline
bitfld.long 0x4 2. "INT,INT command decode" "0: An INT command has not been decoded,1: An INT command has been decoded"
newline
bitfld.long 0x4 1. "IER,Undefined command decode in CL or GOSUB over-/ underflow" "0: An unknown command has not been decoded,1: An unknown command has been decoded"
newline
bitfld.long 0x4 0. "TRAP,TRAP command decode" "0: A TRAP command has not been decoded,1: A TRAP command has been decoded"
group.long 0x18++0xB
line.long 0x0 "SCR12,"
hexmask.long.tbyte 0x0 15.--31. 1. "Reserved_15,Reserved"
newline
bitfld.long 0x0 14. "WUPCOVFCLR,By writing double_quotation1double_quotation to this bit  the WUPCOVF bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 13. "USINTCLR,By writing double_quotation1double_quotation to this bit  the USINT bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 12. "USIERCLR,By writing double_quotation1double_quotation to this bit  the USIER bit in SR1 register is cleared." "0,1"
newline
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "CLBRKCLR,By writing double_quotation1double_quotation to this bit  the CLBRK bit in SR1 register is cleared." "0,1"
newline
hexmask.long.byte 0x0 5.--9. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "SBO0MECLR,By writing double_quotation1double_quotation to this bit  the SBO0ME bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 3. "PBCOVFCLR,By writing double_quotation1double_quotation to this bit  the PBCOVF bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 2. "INTCLR,By writing double_quotation1double_quotation to this bit  the INT bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 1. "IERCLR,By writing double_quotation1double_quotation to this bit  the IER bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 0. "TRACLR,By writing double_quotation1double_quotation to this bit  the TRAP bit in SR1 register is cleared." "0,1"
line.long 0x4 "ICR12,"
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
newline
bitfld.long 0x4 14. "WUPCOVFENB,By writing double_quotation1double_quotation to this bit  the WUPCOVF bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 13. "USINTENB,By writing double_quotation1double_quotation to this bit  the USINT bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 12. "USIERENB,By writing double_quotation1double_quotation to this bit  the USIER bit in SR1 register can be set." "0,1"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x4 10. "CLBRKENB,By writing double_quotation1double_quotation to this bit  the CLBRK bit in SR1 register can be set." "0,1"
newline
hexmask.long.byte 0x4 5.--9. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "SBO0MEENB,By writing double_quotation1double_quotation to this bit  the SBO0ME bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 3. "PBCOVFENB,By writing double_quotation1double_quotation to this bit  the PBCOVF bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 2. "INTENB,By writing double_quotation1double_quotation to this bit  the INT bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 1. "IERENB,By writing double_quotation1double_quotation to this bit  the IER bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 0. "TRAENB,By writing double_quotation1double_quotation to this bit  the TRAP bit in SR1 register can be set." "0,1"
line.long 0x8 "IMR12,"
hexmask.long.tbyte 0x8 15.--31. 1. "Reserved_15,Reserved"
newline
bitfld.long 0x8 14. "WUPCOVFMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by WUPCOVF bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 13. "USINTMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by USINT bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 12. "USIERMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by USIER bit in SR1 register is masked." "0,1"
newline
rbitfld.long 0x8 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x8 10. "CLBRKMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by CLBRK bit in SR1 register is masked. This bit is always read as 0." "0,1"
newline
hexmask.long.byte 0x8 5.--9. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x8 4. "SBO0MEMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by SBO0ME bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 3. "PBCOVFMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by PBCOVF bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 2. "INTMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by INT bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 1. "IERMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by IER bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 0. "TRAMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by TRAP bit in SR1 register is masked." "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "SR22,"
hexmask.long 0x0 0.--31. 1. "SR2,INT command decode for thread"
wgroup.long 0x28++0x3
line.long 0x0 "SCR22,"
hexmask.long 0x0 0.--31. 1. "SCR2,By writing double_quotation1double_quotation to each bit  each bit in SR2 register is cleared."
group.long 0x2C++0x3
line.long 0x0 "ICR22,"
hexmask.long 0x0 0.--31. 1. "ICR2,By writing double_quotation1double_quotation to a bit of ICR2  an interrupt of the corresponding thread is setting the USINT bit of SR1 when USINTENB of ICR1 is set."
rgroup.long 0x34++0x3
line.long 0x0 "SR32,"
hexmask.long 0x0 0.--31. 1. "SR3,Indicates whether any illegal instruction has been decoded. To clear any bit of this register  software reset is needed."
group.long 0x40++0x3
line.long 0x0 "MCR02,"
bitfld.long 0x0 31. "testmode,CPU access to internal units." "0: Cannot access internal units,1: Can access internal units"
newline
hexmask.long 0x0 0.--30. 1. "area_sel,Access area selection for test mode"
group.long 0xF8++0x3
line.long 0x0 "MEMINITR2,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved."
newline
rbitfld.long 0x0 23. "lwm3_state,0: Local work memory in CORE3 is not initialized." "0: Local work memory in CORE3 is not initialized,1: Local work memory in CORE3 is initialized at.."
newline
rbitfld.long 0x0 22. "lwm2_state,0: Local work memory in CORE2 is not initialized." "0: Local work memory in CORE2 is not initialized,1: Local work memory in CORE2 is initialized at.."
newline
rbitfld.long 0x0 21. "lwm1_state,0: Local work memory in CORE1 is not initialized." "0: Local work memory in CORE1 is not initialized,1: Local work memory in CORE1 is initialized at.."
newline
rbitfld.long 0x0 20. "lwm0_state,0: Local work memory in CORE0 is not initialized." "0: Local work memory in CORE0 is not initialized,1: Local work memory in CORE0 is initialized at.."
newline
rbitfld.long 0x0 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x0 16. "gwm_state,0: Global work memory is not initialized." "0: Global work memory is not initialized,1: Global work memory is initialized at least once.."
newline
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved."
newline
bitfld.long 0x0 7. "lwm3_init,Read:" "0: Nothing occurs,1: Start initialization of Local Work Memory in CORE3"
newline
bitfld.long 0x0 6. "lwm2_init,Read:" "0: Nothing occurs,1: Start initialization of Local Work Memory in CORE2"
newline
bitfld.long 0x0 5. "lwm1_init,Read:" "0: Nothing occurs,1: Start initialization of Local Work Memory in CORE1"
newline
bitfld.long 0x0 4. "lwm0_init,Read:" "0: Nothing occurs,1: Start initialization of Local Work Memory in Core0"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "gwm_init,Read:" "0: Nothing occurs,1: Start initialization of Global Work Memory"
group.long 0x120++0x3
line.long 0x0 "SCMSKR2,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "SCMSKR,Specify if each core in a cluster is used or not."
group.long 0x12C++0x3
line.long 0x0 "TGCR02,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 0.--2. "TGRSEL,To select which core to read the performance counter." "0: Read PFCTOTALR0 from Core 0,1: Read PFCTOTALR0 from Core 1,2: Read PFCTOTALR0 from Core 2,3: Read PFCTOTALR0 from Core 3,?,?,?,?"
rgroup.long 0x130++0x3
line.long 0x0 "SBOCNTR02,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long 0x0 0.--28. 1. "SBOCNTR0,It expresses double_quotationSBO0 Output Numberdouble_quotation (4byte unit)."
group.long 0x180++0x3
line.long 0x0 "DLSAR2,"
hexmask.long 0x0 2.--31. 1. "DLSAR,Descriptor List start address"
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Descriptor List start address" "0,1,2,3"
group.long 0x200++0x7
line.long 0x0 "CLPMINR2,"
hexmask.long.word 0x0 16.--31. 1. "XCLPMINR,X's clipping minimum area (-32768 - 32767)"
newline
hexmask.long.word 0x0 0.--15. 1. "YCLPMINR,Y's clipping minimum area (-32768 - 32767)"
line.long 0x4 "CLPMAXR2,"
hexmask.long.word 0x4 16.--31. 1. "XCLPMAXR,X's clipping maximum area (-32768 - 32767)"
newline
hexmask.long.word 0x4 0.--15. 1. "YCLPMAXR,Y's clipping maximum area (-32768 - 32767)"
group.long 0x280++0x7
line.long 0x0 "SPCR2,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "BSYCNTENB,BuSY CouNTer ENaBle" "0: not counting busy cycles of CVengine cluster,1: count busy cycles of CVengine cluster"
line.long 0x4 "SPBSYCNTR2,"
hexmask.long 0x4 0.--31. 1. "SPBSYCNTR,While SPCR.BSYCNTENB is 1  this register counts cycles of"
group.long 0x28C++0x3
line.long 0x0 "SPBCTHRR2,"
hexmask.long 0x0 0.--31. 1. "SPBCTHRR,Shader Performance Busy Counter Threshold value."
group.long 0x2A0++0x7
line.long 0x0 "DCBYPA0MIN2,"
hexmask.long 0x0 0.--31. 1. "DCBYPA0MIN,This register holds memory address of the lower border of the D bypass memory area."
line.long 0x4 "DCBYPA0MAX2,"
hexmask.long 0x4 0.--31. 1. "DCBYPA0MAX,This register holds memory address of the higher border of the D bypass memory area."
group.long 0x2B0++0x7
line.long 0x0 "DCBYPAEN2,"
hexmask.long 0x0 0.--31. 1. "DCBYPAEN,Specify the thread to enable D bypassing. Refer to section U32.8.9 ."
line.long 0x4 "DCBYPACTL2,"
hexmask.long 0x4 0.--31. 1. "DCBYPACTL,Specify the thread to enable Core# and Thread# replacement to the upper 16 bits of writing data. Refer to section U32.8.9 ."
group.long 0x320++0xF
line.long 0x0 "VPCSAR2,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "VPCSAR,Start address for master thread."
line.long 0x4 "VSINISAR2,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x4 0.--15. 1. "VSINISAR,SINI start address for master thread."
line.long 0x8 "PPCSAR2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8 0.--15. 1. "PPCSAR,Start address for slave thread."
line.long 0xC "PSINISAR2,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0xC 0.--15. 1. "PSINISAR,SINI start address for slave thread."
group.long 0x340++0x7
line.long 0x0 "VIBAR2,"
hexmask.long 0x0 0.--31. 1. "VIBAR,These bits set the base address of ICache in the thread (master)"
line.long 0x4 "PIBAR2,"
hexmask.long 0x4 0.--31. 1. "PIBAR,These bits set the base address of ICache in thread (slave)."
group.long 0x360++0xB
line.long 0x0 "SBOBAR02,"
hexmask.long 0x0 0.--31. 1. "SBOBAR0,When this register is written  SBOCNTR0 must be cleared."
line.long 0x4 "SBOMMSR02,"
rbitfld.long 0x4 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
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hexmask.long 0x4 0.--28. 1. "SBOMMSR0,This register must be set in 4-byte unit."
line.long 0x8 "SBOCR02,"
bitfld.long 0x8 31. "SBOCNTCLR,By writing double_quotation1double_quotation to this bit  SBOCNTR0 is cleared. The read value is always 0." "0,1"
newline
hexmask.long 0x8 3.--30. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x8 2. "SIGNEDEXT,By writing double_quotation1double_quotation to this bit  the SBO0 expands X and Y to 32-bit range as signed integer." "0,1"
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bitfld.long 0x8 1. "PCKMODE,When XYPCK is double_quotation1double_quotation  this bit decides the way of concatenation about the coordinates." "0: {x[15:0],1: {y[15:0]"
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bitfld.long 0x8 0. "XYPCK,By writing double_quotation1double_quotation to this bit  the SBO0 handles X(16-bit) and Y(16-bit) as a pair of data." "0,1"
group.long 0x3A0++0x13
line.long 0x0 "DMCR02,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 11. "SELOFSADR,0: DMEXTMEMOFSADDR is used as X Y coordinate" "0: DMEXTMEMOFSADDR is used as X,1: DMEXTMEMOFSADDR is used as the offset address in.."
newline
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "DIR,Specify the direction of DMA transfer." "0: GWM to the external memory,1: The external memory to GWM"
newline
rbitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x0 4.--6. "SELPLN,Specify the plane number (0-7) which determines the address and the stride to calculate a base address of the external memory." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 3. "SELWAIT,Specify the mode of SYNCS instruction of command list." "0: SYNCS exits when the DMAC transfer completes,1: SYNCS exits when the DMAC startup completes"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
rbitfld.long 0x0 1. "DMACST,This bit becomes double_quotation1double_quotation when DMAC is started and returns to double_quotation0double_quotation when DMAC transfer is finished." "0,1"
newline
bitfld.long 0x0 0. "DMACEX,By writing double_quotation1double_quotation to this bit  DMAC is started." "0,1"
line.long 0x4 "DMEXTMEMOFSADDR2,"
hexmask.long 0x4 0.--31. 1. "DMEXTMEMOFSADDR,SELOFSADR=0: bit31-16: X coordinate (signed) in bytes  bit15-0: Y coordinate (signed)."
line.long 0x8 "DMGWMBADDR2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8 0.--15. 1. "DMGWMBADDR,Specify the start address for DMA transfer within GWM."
line.long 0xC "DMGWMSTRR2,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0xC 0.--15. 1. "DMGWMSTRR,These bits set the signed stride of GWM by byte unit."
line.long 0x10 "DMLNGR2,"
rbitfld.long 0x10 31. "Reserved_31,Reserved" "0,1"
newline
hexmask.long.word 0x10 16.--30. 1. "XLNG,A pixel width in the range of 1 to 16384."
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved" "0,1"
newline
hexmask.long.word 0x10 0.--14. 1. "YLNG,A pixel height in the range of 1 to 16384."
group.long 0x3F4++0x3
line.long 0x0 "CLBRKADDRR2,"
hexmask.long 0x0 0.--31. 1. "CLBRKADDRR,CL break address specification."
group.long 0x3FC++0x93
line.long 0x0 "CLCNDGSBR2,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "CLCNDGSBR,Condition for conditional GOSUB instruction:" "0: GOSUB is not executed,1: GOSUB is executed"
line.long 0x4 "IMGBAR20,"
hexmask.long 0x4 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x8 "IMGSTR20,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0xC "IMGC0R20,"
hexmask.long.byte 0xC 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0xC 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0xC 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0xC 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
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hexmask.long.byte 0xC 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0xC 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
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rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0xC 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0xC 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x10 "IMGBAR21,"
hexmask.long 0x10 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x14 "IMGSTR21,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x14 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x18 "IMGC0R21,"
hexmask.long.byte 0x18 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x18 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x18 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x18 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x18 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x18 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
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rbitfld.long 0x18 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x18 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x18 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x18 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x1C "IMGBAR22,"
hexmask.long 0x1C 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x20 "IMGSTR22,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x20 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x24 "IMGC0R22,"
hexmask.long.byte 0x24 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x24 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x24 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x24 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x24 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x24 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x24 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x24 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x24 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x24 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x28 "IMGBAR23,"
hexmask.long 0x28 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x2C "IMGSTR23,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x2C 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x30 "IMGC0R23,"
hexmask.long.byte 0x30 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x30 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x30 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x30 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x30 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x30 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x30 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x30 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x30 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x30 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x34 "IMGBAR24,"
hexmask.long 0x34 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x38 "IMGSTR24,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x38 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x3C "IMGC0R24,"
hexmask.long.byte 0x3C 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x3C 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x3C 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x3C 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x3C 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x3C 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x3C 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x3C 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x3C 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x3C 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x40 "IMGBAR25,"
hexmask.long 0x40 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x44 "IMGSTR25,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x44 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x48 "IMGC0R25,"
hexmask.long.byte 0x48 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x48 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x48 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x48 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x48 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x48 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x48 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x48 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x48 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x48 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x4C "IMGBAR26,"
hexmask.long 0x4C 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x50 "IMGSTR26,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x50 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x54 "IMGC0R26,"
hexmask.long.byte 0x54 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x54 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x54 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x54 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x54 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x54 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x54 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x54 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x54 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x54 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x58 "IMGBAR27,"
hexmask.long 0x58 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x5C "IMGSTR27,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x5C 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x60 "IMGC0R27,"
hexmask.long.byte 0x60 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x60 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x60 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x60 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x60 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x60 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x60 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x60 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x60 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x60 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x64 "IMGBAR28,"
hexmask.long 0x64 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x68 "IMGSTR28,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x68 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x6C "IMGC0R28,"
hexmask.long.byte 0x6C 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x6C 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x6C 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x6C 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x6C 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x6C 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x6C 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x6C 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x6C 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x6C 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x70 "IMGBAR29,"
hexmask.long 0x70 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x74 "IMGSTR29,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x74 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x78 "IMGC0R29,"
hexmask.long.byte 0x78 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x78 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x78 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x78 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x78 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x78 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x78 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x78 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x78 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x78 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x7C "IMGBAR210,"
hexmask.long 0x7C 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x80 "IMGSTR210,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x80 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x84 "IMGC0R210,"
hexmask.long.byte 0x84 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x84 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x84 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x84 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x84 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x84 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x84 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x84 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x84 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x84 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x88 "IMGBAR211,"
hexmask.long 0x88 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x8C "IMGSTR211,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8C 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x90 "IMGC0R211,"
hexmask.long.byte 0x90 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x90 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x90 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x90 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x90 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x90 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x90 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x90 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x90 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x90 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
group.long 0x4C0++0xF
line.long 0x0 "SYNCCR02,"
hexmask.long.byte 0x0 24.--31. 1. "SYNCC3,Specify the core corresponding to bit 3 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x0 16.--23. 1. "SYNCC2,Specify the core corresponding to bit 2 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x0 8.--15. 1. "SYNCC1,Specify the core corresponding to bit 1 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x0 0.--7. 1. "SYNCC0,Specify the core corresponding to bit 0 of CORE Number field of WUP and SLP commands."
line.long 0x4 "SYNCCR12,"
hexmask.long.byte 0x4 24.--31. 1. "SYNCC7,Specify the core corresponding to bit 7 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x4 16.--23. 1. "SYNCC6,Specify the core corresponding to bit 6 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x4 8.--15. 1. "SYNCC5,Specify the core corresponding to bit 5 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x4 0.--7. 1. "SYNCC4,Specify the core corresponding to bit 4 of CORE Number field of WUP and SLP commands."
line.long 0x8 "SYNCCR22,"
hexmask.long.byte 0x8 24.--31. 1. "SYNCC11,Specify the core corresponding to bit 11 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x8 16.--23. 1. "SYNCC10,Specify the core corresponding to bit 10 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x8 8.--15. 1. "SYNCC9,Specify the core corresponding to bit 9 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x8 0.--7. 1. "SYNCC8,Specify the core corresponding to bit 8 of CORE Number field of WUP and SLP commands."
line.long 0xC "SYNCCR32,"
hexmask.long.byte 0xC 24.--31. 1. "SYNCC15,Specify the core corresponding to bit 15 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0xC 16.--23. 1. "SYNCC14,Specify the core corresponding to bit 14 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0xC 8.--15. 1. "SYNCC13,Specify the core corresponding to bit 13 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0xC 0.--7. 1. "SYNCC12,Specify the core corresponding to bit 12 of CORE Number field of WUP and SLP commands."
group.long 0x708++0x3
line.long 0x0 "TGSEN12,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "SLVEN,Slave Thread Enable."
newline
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "MSTEN,Master Thread Enable."
group.long 0x740++0x7
line.long 0x0 "USPFCCTLR2,"
bitfld.long 0x0 31. "PFCENB,PerFormance Counter ENaBle" "0: Performance counter is disabled,1: Performance counter is enabled"
newline
bitfld.long 0x0 30. "PFCTOVF,PerFormance Counter Total register OVerFlow" "0: Performance Counter Total register did not..,1: Performance Counter Total register did overflow"
newline
hexmask.long.tbyte 0x0 11.--29. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x0 8.--10. "SELUSPFC,SELecting Unified Shader to use PerFormance Counter." "0: Select thread 0,1: Select thread 1,2: Select thread 2,3: Select thread 3,4: Select thread 4,5: Select thread 5,6: Select thread 6,7: Select thread 7"
newline
hexmask.long.byte 0x0 0.--7. 1. "PFCMOD,PerFormance Counter MODe"
line.long 0x4 "PFCTOTALR02,"
hexmask.long 0x4 0.--31. 1. "PFCTOTALR0,PerFormance Counter TOTAL Register0"
group.long 0x758++0x3
line.long 0x0 "USCTRL02,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "PFTCHEN,Pre-FeTCH ENable." "0: Disables pre fetch function of thread..,1: Enables pre fetch function of thread instruction.."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
group.long 0x780++0x13
line.long 0x0 "TGDMCR02,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "EXTSIZE,Specify the transaction size of external memory." "0: 32 bytes,1: 64 bytes,?,3: 128 bytes"
newline
bitfld.long 0x0 11. "SELOFSADR,0: TGDMEXTMEMOFSADDR is used as X Y coordinate." "0: TGDMEXTMEMOFSADDR is used as X,1: TGDMEXTMEMOFSADDR is used as offset address in.."
newline
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "DIR,Specify the direction of DMA transfer." "0: LWM to the external memory,1: The external memory to LWM"
newline
rbitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x0 4.--6. "SELPLN,Specify the plane number (0-7) which determines the address and the stride for calculating base address of the external memory." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 3. "SELWAIT,Specify the mode of WAITDMAC instruction." "0: WAITDMAC exits when the DMAC transfer completes,1: WAITDMAC exits when the DMAC startup completes"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
rbitfld.long 0x0 1. "DMACST,This bit becomes double_quotation1double_quotation when DMAC is started and becomes double_quotation0double_quotation when DMAC transfer is finished." "0,1"
newline
bitfld.long 0x0 0. "DMACEX,By writing double_quotation1double_quotation to this bit  DMAC is started." "0,1"
line.long 0x4 "TGDMEXTMEMOFSADDR2,"
hexmask.long 0x4 0.--31. 1. "TGDMEXTMEMOFSADDR,SELOFSADR=0: bit31-16: X coordinate (signed) in bytes  bit15-0: Y coordinate (signed)."
line.long 0x8 "TGDMLWMBADDR2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8 0.--15. 1. "TGDMLWMBADDR,Specify the start address for DMA transfer within LWM."
line.long 0xC "TGDMLWMSTRR2,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0xC 0.--15. 1. "TGDMLWMSTRR,These bits set the signed stride of LWM by byte unit."
line.long 0x10 "TGLNGR2,"
rbitfld.long 0x10 31. "Reserved_31,Reserved" "0,1"
newline
hexmask.long.word 0x10 16.--30. 1. "XLNG,A width in the range of 1 to 16384 in byte unit."
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved" "0,1"
newline
hexmask.long.word 0x10 0.--14. 1. "YLNG,A height in the range of 1 to16384 in byte unit."
rgroup.long 0x7A0++0x3
line.long 0x0 "TGSBOCNTR02,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long 0x0 2.--28. 1. "TGSBOCNTR0,Number of 4byte write accesses to the SBO register for all 32 threads of a cluster."
newline
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0xC00++0xFF
line.long 0x0 "UNR20,"
hexmask.long 0x0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x4 "UNR21,"
hexmask.long 0x4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x8 "UNR22,"
hexmask.long 0x8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xC "UNR23,"
hexmask.long 0xC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x10 "UNR24,"
hexmask.long 0x10 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x14 "UNR25,"
hexmask.long 0x14 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x18 "UNR26,"
hexmask.long 0x18 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x1C "UNR27,"
hexmask.long 0x1C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x20 "UNR28,"
hexmask.long 0x20 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x24 "UNR29,"
hexmask.long 0x24 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x28 "UNR210,"
hexmask.long 0x28 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x2C "UNR211,"
hexmask.long 0x2C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x30 "UNR212,"
hexmask.long 0x30 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x34 "UNR213,"
hexmask.long 0x34 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x38 "UNR214,"
hexmask.long 0x38 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x3C "UNR215,"
hexmask.long 0x3C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x40 "UNR216,"
hexmask.long 0x40 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x44 "UNR217,"
hexmask.long 0x44 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x48 "UNR218,"
hexmask.long 0x48 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x4C "UNR219,"
hexmask.long 0x4C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x50 "UNR220,"
hexmask.long 0x50 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x54 "UNR221,"
hexmask.long 0x54 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x58 "UNR222,"
hexmask.long 0x58 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x5C "UNR223,"
hexmask.long 0x5C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x60 "UNR224,"
hexmask.long 0x60 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x64 "UNR225,"
hexmask.long 0x64 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x68 "UNR226,"
hexmask.long 0x68 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x6C "UNR227,"
hexmask.long 0x6C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x70 "UNR228,"
hexmask.long 0x70 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x74 "UNR229,"
hexmask.long 0x74 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x78 "UNR230,"
hexmask.long 0x78 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x7C "UNR231,"
hexmask.long 0x7C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x80 "UNR232,"
hexmask.long 0x80 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x84 "UNR233,"
hexmask.long 0x84 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x88 "UNR234,"
hexmask.long 0x88 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x8C "UNR235,"
hexmask.long 0x8C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x90 "UNR236,"
hexmask.long 0x90 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x94 "UNR237,"
hexmask.long 0x94 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x98 "UNR238,"
hexmask.long 0x98 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x9C "UNR239,"
hexmask.long 0x9C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xA0 "UNR240,"
hexmask.long 0xA0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xA4 "UNR241,"
hexmask.long 0xA4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xA8 "UNR242,"
hexmask.long 0xA8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xAC "UNR243,"
hexmask.long 0xAC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xB0 "UNR244,"
hexmask.long 0xB0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xB4 "UNR245,"
hexmask.long 0xB4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xB8 "UNR246,"
hexmask.long 0xB8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xBC "UNR247,"
hexmask.long 0xBC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xC0 "UNR248,"
hexmask.long 0xC0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xC4 "UNR249,"
hexmask.long 0xC4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xC8 "UNR250,"
hexmask.long 0xC8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xCC "UNR251,"
hexmask.long 0xCC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xD0 "UNR252,"
hexmask.long 0xD0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xD4 "UNR253,"
hexmask.long 0xD4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xD8 "UNR254,"
hexmask.long 0xD8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xDC "UNR255,"
hexmask.long 0xDC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xE0 "UNR256,"
hexmask.long 0xE0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xE4 "UNR257,"
hexmask.long 0xE4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xE8 "UNR258,"
hexmask.long 0xE8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xEC "UNR259,"
hexmask.long 0xEC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xF0 "UNR260,"
hexmask.long 0xF0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xF4 "UNR261,"
hexmask.long 0xF4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xF8 "UNR262,"
hexmask.long 0xF8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xFC "UNR263,"
hexmask.long 0xFC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
tree.end
tree "IMP_CVe_3"
base ad:0xFFA70000
rgroup.long 0x0++0x3
line.long 0x0 "VCR03,"
hexmask.long 0x0 0.--31. 1. "Version0,These bits indicate the version of this module."
group.long 0x8++0x7
line.long 0x0 "RSTR3,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "SWRST,Software Reset" "0: Release the software reset,1: Supply the software reset"
line.long 0x4 "CR3,"
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "PS,Processing Start" "0,1"
rgroup.long 0x10++0x7
line.long 0x0 "SR03,"
hexmask.long.byte 0x0 24.--31. 1. "INTCODE,INT interrupt code"
newline
hexmask.long.byte 0x0 16.--23. 1. "TRAPCODE,TRAP interrupt code"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
line.long 0x4 "SR13,"
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
newline
bitfld.long 0x4 14. "WUPCOVF,WUP Receive Counter overflow" "0,1"
newline
bitfld.long 0x4 13. "USINT,INT instruction interruption of thread." "0,1"
newline
bitfld.long 0x4 12. "USIER,Command error decode" "0: An illegal instruction has not been decoded,1: An illegal instruction has been decoded"
newline
bitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x4 10. "CLBRK,CL BREAK" "0: CL does not break,1: CL break"
newline
hexmask.long.byte 0x4 5.--9. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "SBO0ME,SBO0 memory size error" "0,1"
newline
bitfld.long 0x4 3. "PBCOVF,Performance Busy Counter Overflow" "0: A performance counter overflow has not been..,1: A performance counter overflow has been detected"
newline
bitfld.long 0x4 2. "INT,INT command decode" "0: An INT command has not been decoded,1: An INT command has been decoded"
newline
bitfld.long 0x4 1. "IER,Undefined command decode in CL or GOSUB over-/ underflow" "0: An unknown command has not been decoded,1: An unknown command has been decoded"
newline
bitfld.long 0x4 0. "TRAP,TRAP command decode" "0: A TRAP command has not been decoded,1: A TRAP command has been decoded"
group.long 0x18++0xB
line.long 0x0 "SCR13,"
hexmask.long.tbyte 0x0 15.--31. 1. "Reserved_15,Reserved"
newline
bitfld.long 0x0 14. "WUPCOVFCLR,By writing double_quotation1double_quotation to this bit  the WUPCOVF bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 13. "USINTCLR,By writing double_quotation1double_quotation to this bit  the USINT bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 12. "USIERCLR,By writing double_quotation1double_quotation to this bit  the USIER bit in SR1 register is cleared." "0,1"
newline
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "CLBRKCLR,By writing double_quotation1double_quotation to this bit  the CLBRK bit in SR1 register is cleared." "0,1"
newline
hexmask.long.byte 0x0 5.--9. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "SBO0MECLR,By writing double_quotation1double_quotation to this bit  the SBO0ME bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 3. "PBCOVFCLR,By writing double_quotation1double_quotation to this bit  the PBCOVF bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 2. "INTCLR,By writing double_quotation1double_quotation to this bit  the INT bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 1. "IERCLR,By writing double_quotation1double_quotation to this bit  the IER bit in SR1 register is cleared." "0,1"
newline
bitfld.long 0x0 0. "TRACLR,By writing double_quotation1double_quotation to this bit  the TRAP bit in SR1 register is cleared." "0,1"
line.long 0x4 "ICR13,"
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
newline
bitfld.long 0x4 14. "WUPCOVFENB,By writing double_quotation1double_quotation to this bit  the WUPCOVF bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 13. "USINTENB,By writing double_quotation1double_quotation to this bit  the USINT bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 12. "USIERENB,By writing double_quotation1double_quotation to this bit  the USIER bit in SR1 register can be set." "0,1"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x4 10. "CLBRKENB,By writing double_quotation1double_quotation to this bit  the CLBRK bit in SR1 register can be set." "0,1"
newline
hexmask.long.byte 0x4 5.--9. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x4 4. "SBO0MEENB,By writing double_quotation1double_quotation to this bit  the SBO0ME bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 3. "PBCOVFENB,By writing double_quotation1double_quotation to this bit  the PBCOVF bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 2. "INTENB,By writing double_quotation1double_quotation to this bit  the INT bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 1. "IERENB,By writing double_quotation1double_quotation to this bit  the IER bit in SR1 register can be set." "0,1"
newline
bitfld.long 0x4 0. "TRAENB,By writing double_quotation1double_quotation to this bit  the TRAP bit in SR1 register can be set." "0,1"
line.long 0x8 "IMR13,"
hexmask.long.tbyte 0x8 15.--31. 1. "Reserved_15,Reserved"
newline
bitfld.long 0x8 14. "WUPCOVFMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by WUPCOVF bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 13. "USINTMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by USINT bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 12. "USIERMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by USIER bit in SR1 register is masked." "0,1"
newline
rbitfld.long 0x8 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x8 10. "CLBRKMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by CLBRK bit in SR1 register is masked. This bit is always read as 0." "0,1"
newline
hexmask.long.byte 0x8 5.--9. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x8 4. "SBO0MEMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by SBO0ME bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 3. "PBCOVFMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by PBCOVF bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 2. "INTMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by INT bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 1. "IERMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by IER bit in SR1 register is masked." "0,1"
newline
bitfld.long 0x8 0. "TRAMSK,By writing double_quotation1double_quotation to this bit  the interrupt occurred by TRAP bit in SR1 register is masked." "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "SR23,"
hexmask.long 0x0 0.--31. 1. "SR2,INT command decode for thread"
wgroup.long 0x28++0x3
line.long 0x0 "SCR23,"
hexmask.long 0x0 0.--31. 1. "SCR2,By writing double_quotation1double_quotation to each bit  each bit in SR2 register is cleared."
group.long 0x2C++0x3
line.long 0x0 "ICR23,"
hexmask.long 0x0 0.--31. 1. "ICR2,By writing double_quotation1double_quotation to a bit of ICR2  an interrupt of the corresponding thread is setting the USINT bit of SR1 when USINTENB of ICR1 is set."
rgroup.long 0x34++0x3
line.long 0x0 "SR33,"
hexmask.long 0x0 0.--31. 1. "SR3,Indicates whether any illegal instruction has been decoded. To clear any bit of this register  software reset is needed."
group.long 0x40++0x3
line.long 0x0 "MCR03,"
bitfld.long 0x0 31. "testmode,CPU access to internal units." "0: Cannot access internal units,1: Can access internal units"
newline
hexmask.long 0x0 0.--30. 1. "area_sel,Access area selection for test mode"
group.long 0xF8++0x3
line.long 0x0 "MEMINITR3,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved."
newline
rbitfld.long 0x0 23. "lwm3_state,0: Local work memory in CORE3 is not initialized." "0: Local work memory in CORE3 is not initialized,1: Local work memory in CORE3 is initialized at.."
newline
rbitfld.long 0x0 22. "lwm2_state,0: Local work memory in CORE2 is not initialized." "0: Local work memory in CORE2 is not initialized,1: Local work memory in CORE2 is initialized at.."
newline
rbitfld.long 0x0 21. "lwm1_state,0: Local work memory in CORE1 is not initialized." "0: Local work memory in CORE1 is not initialized,1: Local work memory in CORE1 is initialized at.."
newline
rbitfld.long 0x0 20. "lwm0_state,0: Local work memory in CORE0 is not initialized." "0: Local work memory in CORE0 is not initialized,1: Local work memory in CORE0 is initialized at.."
newline
rbitfld.long 0x0 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x0 16. "gwm_state,0: Global work memory is not initialized." "0: Global work memory is not initialized,1: Global work memory is initialized at least once.."
newline
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved."
newline
bitfld.long 0x0 7. "lwm3_init,Read:" "0: Nothing occurs,1: Start initialization of Local Work Memory in CORE3"
newline
bitfld.long 0x0 6. "lwm2_init,Read:" "0: Nothing occurs,1: Start initialization of Local Work Memory in CORE2"
newline
bitfld.long 0x0 5. "lwm1_init,Read:" "0: Nothing occurs,1: Start initialization of Local Work Memory in CORE1"
newline
bitfld.long 0x0 4. "lwm0_init,Read:" "0: Nothing occurs,1: Start initialization of Local Work Memory in Core0"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "gwm_init,Read:" "0: Nothing occurs,1: Start initialization of Global Work Memory"
group.long 0x120++0x3
line.long 0x0 "SCMSKR3,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "SCMSKR,Specify if each core in a cluster is used or not."
group.long 0x12C++0x3
line.long 0x0 "TGCR03,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 0.--2. "TGRSEL,To select which core to read the performance counter." "0: Read PFCTOTALR0 from Core 0,1: Read PFCTOTALR0 from Core 1,2: Read PFCTOTALR0 from Core 2,3: Read PFCTOTALR0 from Core 3,?,?,?,?"
rgroup.long 0x130++0x3
line.long 0x0 "SBOCNTR03,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long 0x0 0.--28. 1. "SBOCNTR0,It expresses double_quotationSBO0 Output Numberdouble_quotation (4byte unit)."
group.long 0x180++0x3
line.long 0x0 "DLSAR3,"
hexmask.long 0x0 2.--31. 1. "DLSAR,Descriptor List start address"
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Descriptor List start address" "0,1,2,3"
group.long 0x200++0x7
line.long 0x0 "CLPMINR3,"
hexmask.long.word 0x0 16.--31. 1. "XCLPMINR,X's clipping minimum area (-32768 - 32767)"
newline
hexmask.long.word 0x0 0.--15. 1. "YCLPMINR,Y's clipping minimum area (-32768 - 32767)"
line.long 0x4 "CLPMAXR3,"
hexmask.long.word 0x4 16.--31. 1. "XCLPMAXR,X's clipping maximum area (-32768 - 32767)"
newline
hexmask.long.word 0x4 0.--15. 1. "YCLPMAXR,Y's clipping maximum area (-32768 - 32767)"
group.long 0x280++0x7
line.long 0x0 "SPCR3,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "BSYCNTENB,BuSY CouNTer ENaBle" "0: not counting busy cycles of CVengine cluster,1: count busy cycles of CVengine cluster"
line.long 0x4 "SPBSYCNTR3,"
hexmask.long 0x4 0.--31. 1. "SPBSYCNTR,While SPCR.BSYCNTENB is 1  this register counts cycles of"
group.long 0x28C++0x3
line.long 0x0 "SPBCTHRR3,"
hexmask.long 0x0 0.--31. 1. "SPBCTHRR,Shader Performance Busy Counter Threshold value."
group.long 0x2A0++0x7
line.long 0x0 "DCBYPA0MIN3,"
hexmask.long 0x0 0.--31. 1. "DCBYPA0MIN,This register holds memory address of the lower border of the D bypass memory area."
line.long 0x4 "DCBYPA0MAX3,"
hexmask.long 0x4 0.--31. 1. "DCBYPA0MAX,This register holds memory address of the higher border of the D bypass memory area."
group.long 0x2B0++0x7
line.long 0x0 "DCBYPAEN3,"
hexmask.long 0x0 0.--31. 1. "DCBYPAEN,Specify the thread to enable D bypassing. Refer to section U32.8.9 ."
line.long 0x4 "DCBYPACTL3,"
hexmask.long 0x4 0.--31. 1. "DCBYPACTL,Specify the thread to enable Core# and Thread# replacement to the upper 16 bits of writing data. Refer to section U32.8.9 ."
group.long 0x320++0xF
line.long 0x0 "VPCSAR3,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "VPCSAR,Start address for master thread."
line.long 0x4 "VSINISAR3,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x4 0.--15. 1. "VSINISAR,SINI start address for master thread."
line.long 0x8 "PPCSAR3,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8 0.--15. 1. "PPCSAR,Start address for slave thread."
line.long 0xC "PSINISAR3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0xC 0.--15. 1. "PSINISAR,SINI start address for slave thread."
group.long 0x340++0x7
line.long 0x0 "VIBAR3,"
hexmask.long 0x0 0.--31. 1. "VIBAR,These bits set the base address of ICache in the thread (master)"
line.long 0x4 "PIBAR3,"
hexmask.long 0x4 0.--31. 1. "PIBAR,These bits set the base address of ICache in thread (slave)."
group.long 0x360++0xB
line.long 0x0 "SBOBAR03,"
hexmask.long 0x0 0.--31. 1. "SBOBAR0,When this register is written  SBOCNTR0 must be cleared."
line.long 0x4 "SBOMMSR03,"
rbitfld.long 0x4 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long 0x4 0.--28. 1. "SBOMMSR0,This register must be set in 4-byte unit."
line.long 0x8 "SBOCR03,"
bitfld.long 0x8 31. "SBOCNTCLR,By writing double_quotation1double_quotation to this bit  SBOCNTR0 is cleared. The read value is always 0." "0,1"
newline
hexmask.long 0x8 3.--30. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x8 2. "SIGNEDEXT,By writing double_quotation1double_quotation to this bit  the SBO0 expands X and Y to 32-bit range as signed integer." "0,1"
newline
bitfld.long 0x8 1. "PCKMODE,When XYPCK is double_quotation1double_quotation  this bit decides the way of concatenation about the coordinates." "0: {x[15:0],1: {y[15:0]"
newline
bitfld.long 0x8 0. "XYPCK,By writing double_quotation1double_quotation to this bit  the SBO0 handles X(16-bit) and Y(16-bit) as a pair of data." "0,1"
group.long 0x3A0++0x13
line.long 0x0 "DMCR03,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 11. "SELOFSADR,0: DMEXTMEMOFSADDR is used as X Y coordinate" "0: DMEXTMEMOFSADDR is used as X,1: DMEXTMEMOFSADDR is used as the offset address in.."
newline
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "DIR,Specify the direction of DMA transfer." "0: GWM to the external memory,1: The external memory to GWM"
newline
rbitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x0 4.--6. "SELPLN,Specify the plane number (0-7) which determines the address and the stride to calculate a base address of the external memory." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 3. "SELWAIT,Specify the mode of SYNCS instruction of command list." "0: SYNCS exits when the DMAC transfer completes,1: SYNCS exits when the DMAC startup completes"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
rbitfld.long 0x0 1. "DMACST,This bit becomes double_quotation1double_quotation when DMAC is started and returns to double_quotation0double_quotation when DMAC transfer is finished." "0,1"
newline
bitfld.long 0x0 0. "DMACEX,By writing double_quotation1double_quotation to this bit  DMAC is started." "0,1"
line.long 0x4 "DMEXTMEMOFSADDR3,"
hexmask.long 0x4 0.--31. 1. "DMEXTMEMOFSADDR,SELOFSADR=0: bit31-16: X coordinate (signed) in bytes  bit15-0: Y coordinate (signed)."
line.long 0x8 "DMGWMBADDR3,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8 0.--15. 1. "DMGWMBADDR,Specify the start address for DMA transfer within GWM."
line.long 0xC "DMGWMSTRR3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0xC 0.--15. 1. "DMGWMSTRR,These bits set the signed stride of GWM by byte unit."
line.long 0x10 "DMLNGR3,"
rbitfld.long 0x10 31. "Reserved_31,Reserved" "0,1"
newline
hexmask.long.word 0x10 16.--30. 1. "XLNG,A pixel width in the range of 1 to 16384."
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved" "0,1"
newline
hexmask.long.word 0x10 0.--14. 1. "YLNG,A pixel height in the range of 1 to 16384."
group.long 0x3F4++0x3
line.long 0x0 "CLBRKADDRR3,"
hexmask.long 0x0 0.--31. 1. "CLBRKADDRR,CL break address specification."
group.long 0x3FC++0x93
line.long 0x0 "CLCNDGSBR3,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "CLCNDGSBR,Condition for conditional GOSUB instruction:" "0: GOSUB is not executed,1: GOSUB is executed"
line.long 0x4 "IMGBAR30,"
hexmask.long 0x4 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x8 "IMGSTR30,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0xC "IMGC0R30,"
hexmask.long.byte 0xC 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0xC 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0xC 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0xC 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0xC 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0xC 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0xC 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0xC 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x10 "IMGBAR31,"
hexmask.long 0x10 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x14 "IMGSTR31,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x14 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x18 "IMGC0R31,"
hexmask.long.byte 0x18 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x18 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x18 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x18 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x18 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x18 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x18 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x18 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x18 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x18 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x1C "IMGBAR32,"
hexmask.long 0x1C 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x20 "IMGSTR32,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x20 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x24 "IMGC0R32,"
hexmask.long.byte 0x24 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x24 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x24 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x24 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x24 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x24 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x24 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x24 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x24 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x24 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x28 "IMGBAR33,"
hexmask.long 0x28 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x2C "IMGSTR33,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x2C 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x30 "IMGC0R33,"
hexmask.long.byte 0x30 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x30 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x30 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x30 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x30 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x30 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x30 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x30 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x30 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x30 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x34 "IMGBAR34,"
hexmask.long 0x34 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x38 "IMGSTR34,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x38 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x3C "IMGC0R34,"
hexmask.long.byte 0x3C 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x3C 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x3C 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x3C 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x3C 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x3C 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x3C 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x3C 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x3C 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x3C 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x40 "IMGBAR35,"
hexmask.long 0x40 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x44 "IMGSTR35,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x44 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x48 "IMGC0R35,"
hexmask.long.byte 0x48 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x48 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x48 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x48 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x48 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x48 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x48 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x48 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x48 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x48 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x4C "IMGBAR36,"
hexmask.long 0x4C 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x50 "IMGSTR36,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x50 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x54 "IMGC0R36,"
hexmask.long.byte 0x54 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x54 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x54 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x54 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x54 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x54 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x54 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x54 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x54 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x54 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x58 "IMGBAR37,"
hexmask.long 0x58 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x5C "IMGSTR37,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x5C 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x60 "IMGC0R37,"
hexmask.long.byte 0x60 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x60 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x60 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x60 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x60 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x60 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x60 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x60 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x60 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x60 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x64 "IMGBAR38,"
hexmask.long 0x64 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x68 "IMGSTR38,"
hexmask.long.word 0x68 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x68 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x6C "IMGC0R38,"
hexmask.long.byte 0x6C 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x6C 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x6C 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x6C 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x6C 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x6C 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x6C 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x6C 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x6C 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x6C 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x70 "IMGBAR39,"
hexmask.long 0x70 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x74 "IMGSTR39,"
hexmask.long.word 0x74 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x74 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x78 "IMGC0R39,"
hexmask.long.byte 0x78 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x78 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x78 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x78 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x78 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x78 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x78 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x78 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x78 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x78 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x7C "IMGBAR310,"
hexmask.long 0x7C 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x80 "IMGSTR310,"
hexmask.long.word 0x80 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x80 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x84 "IMGC0R310,"
hexmask.long.byte 0x84 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x84 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x84 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x84 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x84 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x84 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x84 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x84 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x84 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x84 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
line.long 0x88 "IMGBAR311,"
hexmask.long 0x88 0.--31. 1. "IMGBAR,Alignment must be done depending on the Pixel Format (IMGC0Rn.PFORMAT)."
line.long 0x8C "IMGSTR311,"
hexmask.long.word 0x8C 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8C 0.--15. 1. "IMGSTR,IMGSTRn is a signed 16bit value."
line.long 0x90 "IMGC0R311,"
hexmask.long.byte 0x90 27.--31. 1. "Reserved_27,Reserved"
newline
bitfld.long 0x90 24.--26. "CLPMODE,Specify the Clipping Mode (Border Mode of OpenCV to set the extra padding to the image). Refer to section U32.8.7 ." "0: NORMAL,1: REPLICATE,2: REFLECT,3: REFLECT101,4: WRAP,5: CONSTANT,6: It is prohibited to write,7: It is prohibited to write"
newline
hexmask.long.byte 0x90 19.--23. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x90 16.--18. "PFORMAT2,Pixel format for thread (slave)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
newline
hexmask.long.byte 0x90 11.--15. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x90 8.--10. "RNDMODE_F2I,Float to Integer Format Conversion Round Mode" "0: IEEE 754 round to nearest,1: IEEE 754 round to zero,2: IEEE 754 round to positive infinity,3: IEEE 754 round to negative infinity,4: round to nearest up,5: round away from zero,6: Reserved,7: Reserved"
newline
rbitfld.long 0x90 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x90 4. "SATENBO,Saturation Enable (Output)" "0: Disable saturation function,1: Enable saturation function"
newline
rbitfld.long 0x90 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x90 0.--2. "PFORMAT,Pixel Format for thread (master)." "0: unsigned char,1: char,2: unsigned short,3: short,4: Reserved,5: int,6: Reserved,7: float"
group.long 0x4C0++0xF
line.long 0x0 "SYNCCR03,"
hexmask.long.byte 0x0 24.--31. 1. "SYNCC3,Specify the core corresponding to bit 3 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x0 16.--23. 1. "SYNCC2,Specify the core corresponding to bit 2 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x0 8.--15. 1. "SYNCC1,Specify the core corresponding to bit 1 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x0 0.--7. 1. "SYNCC0,Specify the core corresponding to bit 0 of CORE Number field of WUP and SLP commands."
line.long 0x4 "SYNCCR13,"
hexmask.long.byte 0x4 24.--31. 1. "SYNCC7,Specify the core corresponding to bit 7 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x4 16.--23. 1. "SYNCC6,Specify the core corresponding to bit 6 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x4 8.--15. 1. "SYNCC5,Specify the core corresponding to bit 5 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x4 0.--7. 1. "SYNCC4,Specify the core corresponding to bit 4 of CORE Number field of WUP and SLP commands."
line.long 0x8 "SYNCCR23,"
hexmask.long.byte 0x8 24.--31. 1. "SYNCC11,Specify the core corresponding to bit 11 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x8 16.--23. 1. "SYNCC10,Specify the core corresponding to bit 10 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x8 8.--15. 1. "SYNCC9,Specify the core corresponding to bit 9 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0x8 0.--7. 1. "SYNCC8,Specify the core corresponding to bit 8 of CORE Number field of WUP and SLP commands."
line.long 0xC "SYNCCR33,"
hexmask.long.byte 0xC 24.--31. 1. "SYNCC15,Specify the core corresponding to bit 15 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0xC 16.--23. 1. "SYNCC14,Specify the core corresponding to bit 14 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0xC 8.--15. 1. "SYNCC13,Specify the core corresponding to bit 13 of CORE Number field of WUP and SLP commands."
newline
hexmask.long.byte 0xC 0.--7. 1. "SYNCC12,Specify the core corresponding to bit 12 of CORE Number field of WUP and SLP commands."
group.long 0x708++0x3
line.long 0x0 "TGSEN13,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "SLVEN,Slave Thread Enable."
newline
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "MSTEN,Master Thread Enable."
group.long 0x740++0x7
line.long 0x0 "USPFCCTLR3,"
bitfld.long 0x0 31. "PFCENB,PerFormance Counter ENaBle" "0: Performance counter is disabled,1: Performance counter is enabled"
newline
bitfld.long 0x0 30. "PFCTOVF,PerFormance Counter Total register OVerFlow" "0: Performance Counter Total register did not..,1: Performance Counter Total register did overflow"
newline
hexmask.long.tbyte 0x0 11.--29. 1. "Reserved_11,Reserved"
newline
bitfld.long 0x0 8.--10. "SELUSPFC,SELecting Unified Shader to use PerFormance Counter." "0: Select thread 0,1: Select thread 1,2: Select thread 2,3: Select thread 3,4: Select thread 4,5: Select thread 5,6: Select thread 6,7: Select thread 7"
newline
hexmask.long.byte 0x0 0.--7. 1. "PFCMOD,PerFormance Counter MODe"
line.long 0x4 "PFCTOTALR03,"
hexmask.long 0x4 0.--31. 1. "PFCTOTALR0,PerFormance Counter TOTAL Register0"
group.long 0x758++0x3
line.long 0x0 "USCTRL03,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "PFTCHEN,Pre-FeTCH ENable." "0: Disables pre fetch function of thread..,1: Enables pre fetch function of thread instruction.."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
group.long 0x780++0x13
line.long 0x0 "TGDMCR03,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "EXTSIZE,Specify the transaction size of external memory." "0: 32 bytes,1: 64 bytes,?,3: 128 bytes"
newline
bitfld.long 0x0 11. "SELOFSADR,0: TGDMEXTMEMOFSADDR is used as X Y coordinate." "0: TGDMEXTMEMOFSADDR is used as X,1: TGDMEXTMEMOFSADDR is used as offset address in.."
newline
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "DIR,Specify the direction of DMA transfer." "0: LWM to the external memory,1: The external memory to LWM"
newline
rbitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x0 4.--6. "SELPLN,Specify the plane number (0-7) which determines the address and the stride for calculating base address of the external memory." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 3. "SELWAIT,Specify the mode of WAITDMAC instruction." "0: WAITDMAC exits when the DMAC transfer completes,1: WAITDMAC exits when the DMAC startup completes"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
rbitfld.long 0x0 1. "DMACST,This bit becomes double_quotation1double_quotation when DMAC is started and becomes double_quotation0double_quotation when DMAC transfer is finished." "0,1"
newline
bitfld.long 0x0 0. "DMACEX,By writing double_quotation1double_quotation to this bit  DMAC is started." "0,1"
line.long 0x4 "TGDMEXTMEMOFSADDR3,"
hexmask.long 0x4 0.--31. 1. "TGDMEXTMEMOFSADDR,SELOFSADR=0: bit31-16: X coordinate (signed) in bytes  bit15-0: Y coordinate (signed)."
line.long 0x8 "TGDMLWMBADDR3,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8 0.--15. 1. "TGDMLWMBADDR,Specify the start address for DMA transfer within LWM."
line.long 0xC "TGDMLWMSTRR3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0xC 0.--15. 1. "TGDMLWMSTRR,These bits set the signed stride of LWM by byte unit."
line.long 0x10 "TGLNGR3,"
rbitfld.long 0x10 31. "Reserved_31,Reserved" "0,1"
newline
hexmask.long.word 0x10 16.--30. 1. "XLNG,A width in the range of 1 to 16384 in byte unit."
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved" "0,1"
newline
hexmask.long.word 0x10 0.--14. 1. "YLNG,A height in the range of 1 to16384 in byte unit."
rgroup.long 0x7A0++0x3
line.long 0x0 "TGSBOCNTR03,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long 0x0 2.--28. 1. "TGSBOCNTR0,Number of 4byte write accesses to the SBO register for all 32 threads of a cluster."
newline
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0xC00++0xFF
line.long 0x0 "UNR30,"
hexmask.long 0x0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x4 "UNR31,"
hexmask.long 0x4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x8 "UNR32,"
hexmask.long 0x8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xC "UNR33,"
hexmask.long 0xC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x10 "UNR34,"
hexmask.long 0x10 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x14 "UNR35,"
hexmask.long 0x14 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x18 "UNR36,"
hexmask.long 0x18 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x1C "UNR37,"
hexmask.long 0x1C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x20 "UNR38,"
hexmask.long 0x20 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x24 "UNR39,"
hexmask.long 0x24 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x28 "UNR310,"
hexmask.long 0x28 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x2C "UNR311,"
hexmask.long 0x2C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x30 "UNR312,"
hexmask.long 0x30 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x34 "UNR313,"
hexmask.long 0x34 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x38 "UNR314,"
hexmask.long 0x38 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x3C "UNR315,"
hexmask.long 0x3C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x40 "UNR316,"
hexmask.long 0x40 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x44 "UNR317,"
hexmask.long 0x44 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x48 "UNR318,"
hexmask.long 0x48 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x4C "UNR319,"
hexmask.long 0x4C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x50 "UNR320,"
hexmask.long 0x50 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x54 "UNR321,"
hexmask.long 0x54 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x58 "UNR322,"
hexmask.long 0x58 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x5C "UNR323,"
hexmask.long 0x5C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x60 "UNR324,"
hexmask.long 0x60 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x64 "UNR325,"
hexmask.long 0x64 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x68 "UNR326,"
hexmask.long 0x68 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x6C "UNR327,"
hexmask.long 0x6C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x70 "UNR328,"
hexmask.long 0x70 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x74 "UNR329,"
hexmask.long 0x74 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x78 "UNR330,"
hexmask.long 0x78 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x7C "UNR331,"
hexmask.long 0x7C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x80 "UNR332,"
hexmask.long 0x80 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x84 "UNR333,"
hexmask.long 0x84 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x88 "UNR334,"
hexmask.long 0x88 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x8C "UNR335,"
hexmask.long 0x8C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x90 "UNR336,"
hexmask.long 0x90 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x94 "UNR337,"
hexmask.long 0x94 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x98 "UNR338,"
hexmask.long 0x98 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0x9C "UNR339,"
hexmask.long 0x9C 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xA0 "UNR340,"
hexmask.long 0xA0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xA4 "UNR341,"
hexmask.long 0xA4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xA8 "UNR342,"
hexmask.long 0xA8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xAC "UNR343,"
hexmask.long 0xAC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xB0 "UNR344,"
hexmask.long 0xB0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xB4 "UNR345,"
hexmask.long 0xB4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xB8 "UNR346,"
hexmask.long 0xB8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xBC "UNR347,"
hexmask.long 0xBC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xC0 "UNR348,"
hexmask.long 0xC0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xC4 "UNR349,"
hexmask.long 0xC4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xC8 "UNR350,"
hexmask.long 0xC8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xCC "UNR351,"
hexmask.long 0xCC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xD0 "UNR352,"
hexmask.long 0xD0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xD4 "UNR353,"
hexmask.long 0xD4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xD8 "UNR354,"
hexmask.long 0xD8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xDC "UNR355,"
hexmask.long 0xDC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xE0 "UNR356,"
hexmask.long 0xE0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xE4 "UNR357,"
hexmask.long 0xE4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xE8 "UNR358,"
hexmask.long 0xE8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xEC "UNR359,"
hexmask.long 0xEC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xF0 "UNR360,"
hexmask.long 0xF0 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xF4 "UNR361,"
hexmask.long 0xF4 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xF8 "UNR362,"
hexmask.long 0xF8 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
line.long 0xFC "UNR363,"
hexmask.long 0xFC 0.--31. 1. "UNR,Set contents of the n-th Uniform storage"
tree.end
tree.end
tree "IMP_DMAC"
base ad:0x0
tree "IMP_DMAC_0"
base ad:0xFFA80000
rgroup.long 0x0++0x3
line.long 0x0 "VCR0,The value to be read varies depending on the product."
hexmask.long 0x0 0.--31. 1. "Version0,These bits indicate the version of this module."
group.long 0x4++0x3
line.long 0x0 "SCTLR00,This is the register to control the reset (software). and the start of DMA."
bitfld.long 0x0 31. "SWRST,Software reset" "0: Cancels a software reset for this module,1: Applies a software reset to this module"
hexmask.long 0x0 1.--30. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "DMAEN,DMA transmission start bit" "0: DMA transmission has not been performed,1: DMA transmission is in progress"
rgroup.long 0x8++0x3
line.long 0x0 "SR00,This register displays every status generated by IMP DMAC."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 10. "CLBRK,CL break status." "0: CL does not break,1: CL break"
newline
bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "WUPOVF,WUP counter overflow" "0: WUP overflow has not been occured,1: WUP overflow has been occured"
newline
bitfld.long 0x0 6. "INT,INT instruction decoding" "0: INT instruction has not been decoded,1: INT instruction has been decoded"
bitfld.long 0x0 5. "IER,Illegal instruction decoding or GOSUB overflow/underflow." "0: Illegal instruction has not been decoded,1: Illegal instruction has been decoded"
newline
bitfld.long 0x0 4. "TRA,TRAP instruction decoding" "0: TRAP instruction has not been decoded,1: TRAP instruction has been decoded"
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "TEND,Transmission completion" "0: Transmission has not been started or it is in..,1: Transmission has ended"
group.long 0xC++0xF
line.long 0x0 "SCR0,This register clears every status displayed in SR0. Write 1 to clear. writing 0 is disabled."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 10. "CLBRKC,CL break status clear." "0,1"
newline
rbitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "WUPOVFC,WUPOVF bit clearing" "0,1"
newline
bitfld.long 0x0 6. "INTC,INT bit clearing" "0,1"
bitfld.long 0x0 5. "IERC,IER bit clearing" "0,1"
newline
bitfld.long 0x0 4. "TRAC,TRA bit clearing" "0,1"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "TENDC,TEND bit clearing" "0,1"
line.long 0x4 "SER0,This register is used to set whether to reflect status in each bit of SR0 register."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
newline
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x4 10. "CLBRKENB,CL break status/CL break enable." "0: CL break disable,1: CL break enable"
rbitfld.long 0x4 8.--9. "Reserved_8,Reserved" "0,1,2,3"
newline
bitfld.long 0x4 7. "WUPOVFE,WUPOVF bit set enable" "0: When WUP overflow is detected,1: When WUP overflow is detected"
bitfld.long 0x4 6. "INTE,INT bit set enable" "0: When the INT instruction is decoded,1: When the INT instruction is decoded"
newline
bitfld.long 0x4 5. "IERE,IER bit set enable" "0: When the illegal instruction is decoded,1: When the illegal instruction is decoded"
bitfld.long 0x4 4. "TRAE,TRA bit set enable" "0: When the TRAP instruction is decoded,1: When the TRAP instruction is decoded"
newline
rbitfld.long 0x4 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0. "TENDE,TEND bit set enable" "0: Even if DMA transmission ends,1: If DMA transmission ends"
line.long 0x8 "IMR0,This register is used to set whether to generate an interrupt or mask an interrupt according to occurrence of each status."
hexmask.long.word 0x8 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x8 16. "Reserved_16,The read value should always be 1." "0,1"
newline
hexmask.long.byte 0x8 12.--15. 1. "Reserved_12,Reserved"
rbitfld.long 0x8 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x8 10. "CLBRKM,Mask setting of interrupt by CLBRK status" "0: The generation of CLBRK interrupt is not masked,1: The generation of CLBRK interrupt is masked"
rbitfld.long 0x8 8.--9. "Reserved_8,Reserved" "0,1,2,3"
newline
bitfld.long 0x8 7. "WUPOVFM,Mask setting of interrupt by WUPOVF status" "0: The generation of WUPOVF interrupt is not masked,1: The generation of WUPOVF interrupt is masked"
bitfld.long 0x8 6. "INTM,Mask setting of interrupt by INT status" "0: The generation of INT interrupt is not masked,1: The generation of INT interrupt is masked"
newline
bitfld.long 0x8 5. "IERM,Mask setting of interrupt by IER status" "0: The generation of IER interrupt is not masked,1: The generation of IER interrupt is masked"
bitfld.long 0x8 4. "TRAM,Mask setting of interrupt by TRA status" "0: The generation of TRA interrupt is not masked,1: The generation of TRA interrupt is masked"
newline
rbitfld.long 0x8 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0. "TENDM,Mask setting of interrupt by TEND status" "0: The generation of TEND interrupt is not masked,1: The generation of TEND interrupt is masked"
line.long 0xC "SCTLR10,This is the register to control the start of CL."
bitfld.long 0xC 31. "CLE,IMP DMACsingle_quotations CL starting bit" "0: CL is not in progress,1: CL is in progress"
hexmask.long 0xC 0.--30. 1. "Reserved_0,Reserved"
group.long 0x20++0x3
line.long 0x0 "TSCR0,[IMP DMAC]"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 20.--23. 1. "SRC1_TSIZE,These bits define the transmission size of Source1."
newline
hexmask.long.byte 0x0 16.--19. 1. "SRC0_TSIZE,These bits define the transmission size of Source0."
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "DST0_TSIZE,These bits define the transmission size of Destination0."
group.long 0x28++0x3
line.long 0x0 "CLSAR0,This register is used to set the first address when fetching CL."
hexmask.long 0x0 0.--31. 1. "CLSAR,First address of CL"
rgroup.long 0x30++0x3
line.long 0x0 "SR10,This register displays the code value when IMP DMAC executes INT and TRAP instructions."
hexmask.long.byte 0x0 24.--31. 1. "INTCODE,INT interrupt code"
hexmask.long.byte 0x0 16.--23. 1. "TRAPCODE,TRAP interrupt code"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
group.long 0x38++0x3
line.long 0x0 "DSWPR0,This register is used to set the swap of data in Source0. Source1. Destination0."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 29. "S1SWP128BIT,Source1 128-bit swap setting" "0: It is not swapped,1: It is swapped"
newline
bitfld.long 0x0 28. "S1SWP64BIT,Source1 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 27. "S1SWP32BIT,Source1 32-bit swap setting" "0: It is not swapped,1: It is swapped"
newline
bitfld.long 0x0 26. "S1SWP16BIT,Source1 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 25. "S1SWP8BIT,Source1 8-bit swap setting" "0: It is not swapped,1: It is swapped"
newline
rbitfld.long 0x0 22.--24. "Reserved_22,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 21. "S0SWP128BIT,Source0 128-bit swap setting" "0: It is not swapped,1: It is swapped"
newline
bitfld.long 0x0 20. "S0SWP64BIT,Source0 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 19. "S0SWP32BIT,Source0 32-bit swap setting" "0: It is not swapped,1: It is swapped"
newline
bitfld.long 0x0 18. "S0SWP16BIT,Source0 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 17. "S0SWP8BIT,Source0 8-bit swap setting" "0: It is not swapped,1: It is swapped"
newline
hexmask.long.word 0x0 6.--16. 1. "Reserved_6,Reserved"
bitfld.long 0x0 5. "D0SWP128BIT,Destination0 128-bit swap setting" "0: It is not swapped,1: It is swapped"
newline
bitfld.long 0x0 4. "D0SWP64BIT,Destination0 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 3. "D0SWP32BIT,Destination0 32-bit swap setting" "0: It is not swapped,1: It is swapped"
newline
bitfld.long 0x0 2. "D0SWP16BIT,Destination0 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 1. "D0SWP8BIT,Destination0 8-bit swap setting" "0: It is not swapped,1: It is swapped"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x40++0x7
line.long 0x0 "S0SAR0,This register is used to set the start address of Source0 to read from external memory or internal memory."
hexmask.long 0x0 0.--31. 1. "S0SAR,Set the start address of Source0 in byte unit."
line.long 0x4 "S0STR0,This register is used to set the memory width of Source0 to read from external memory or internal memory."
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x4 0.--14. 1. "S0STR,These bits set the memory width of Source0 in byte unit. The setting range is 0~32767."
group.long 0x4C++0x7
line.long 0x0 "S0DATAR0,This is the data register of Source0."
hexmask.long 0x0 0.--31. 1. "S0DATAR,This is the data register of Source0."
line.long 0x4 "S0CR0,This register is used to control Source0."
bitfld.long 0x4 31. "S0REN,Source0 read enable" "0: Do not read data from external memory or..,1: Read data of Source0 from external memory or.."
hexmask.long.word 0x4 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x4 12.--15. 1. "S0TAMODE,Source0 tile addressing mode"
hexmask.long.byte 0x4 4.--11. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "S0PF,Source0 pixel format"
group.long 0x60++0x7
line.long 0x0 "S1SAR0,This register is used to set the start address of Source1 to read from external memory or internal memory."
hexmask.long 0x0 0.--31. 1. "S1SAR,Set the start address of Source1 in byte unit."
line.long 0x4 "S1STR0,This register is used to set the memory width of Source1 to read from external memory or internal memory."
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x4 0.--14. 1. "S1STR,These bits set the memory width of Source1 in byte unit. The setting range is 0~32767."
group.long 0x6C++0x7
line.long 0x0 "S1DATAR0,This is the data register of Source1."
hexmask.long 0x0 0.--31. 1. "S1DATAR,This is the data register of Source1."
line.long 0x4 "S1CR0,This register is used to control Source1."
bitfld.long 0x4 31. "S1REN,Source1 read enable" "0: Do not read data from external memory or..,1: Read data of Source1 from external memory or.."
hexmask.long 0x4 4.--30. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "S1PF,Source1 pixel format"
group.long 0x7C++0xB
line.long 0x0 "TCR00,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
bitfld.long 0x0 27. "WRM_EN,Enabling minimum interval control of write request issuance" "0,1"
newline
hexmask.long.word 0x0 16.--26. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "WRM_CYCLE,Setting minimum interval of write request issuance"
line.long 0x4 "D0SAR0,This register is used to set the start address of Destination0 to write to external memory or internal memory."
hexmask.long 0x4 0.--31. 1. "D0SAR,Set the start address of Destination0 in byte unit."
line.long 0x8 "D0STR0,This register is used to set the memory width of Destination0 to write to external memory or internal memory."
hexmask.long.tbyte 0x8 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x8 0.--14. 1. "D0STR,Memory width of Destination0 is set in byte unit. The setting range is 1~32767."
group.long 0x90++0x7
line.long 0x0 "D0CR0,This register is used to control Destination0."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 12.--15. 1. "D0TAMODE,Destination0 tile addressing mode"
newline
hexmask.long.byte 0x0 4.--11. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "D0PF,Destination0 pixel format"
line.long 0x4 "IMGSIZER0,This register is used to set the processing size (width and height) of Source and Destination. It is set in pixel unit."
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "IWIDTH,These bits specify the width of the processed image."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "IHEIGHT,These bits specify the height of the processed image."
group.long 0xA0++0x3
line.long 0x0 "FCR00,This register is used to control functions of IMP DMAC"
bitfld.long 0x0 31. "BITCNTEN,Bit count enable setting" "0: Do not operate bit count,1: Operate bit count"
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "LOP,Logical operation setting"
group.long 0xAC++0x3
line.long 0x0 "FCR10,[IMP DMAC]"
bitfld.long 0x0 31. "PXALIGN,Pixel alignment mode enable" "0: 64-byte or 128-byte alignment mode,1: Pixel alignment mode"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x0 13.--27. 1. "Reserved_13,Reserved"
hexmask.long.byte 0x0 8.--12. 1. "SHIFT,Setting of shift amount after LOP"
newline
hexmask.long.byte 0x0 4.--7. 1. "RNDMD,Setting rounding mode after shift"
bitfld.long 0x0 3. "SATEN,Saturation process enable" "0: Do not process saturation,1: Process saturation"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
bitfld.long 0x0 0.--1. "SATW,Saturation bit width selection" "?,1: Saturate to 10 bits,2: Saturate to 12 bits,3: Saturate to 14 bits"
rgroup.long 0xC8++0x7
line.long 0x0 "CLFAR0,This register is used to display the address of CL fetch destination."
hexmask.long 0x0 2.--31. 1. "CLFAR,These bits display bit31~bit2 of the address of CL fetch destination (during execution)."
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "CLEIR0,This register is used to display the instruction during CL execution."
hexmask.long 0x4 0.--31. 1. "CLEIR,These bits display the instruction during CL execution."
group.long 0xD0++0x3
line.long 0x0 "RAMTSTR0,This is safety related register. Do not set this register during DMAC operation."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved."
bitfld.long 0x0 15. "MEMINIT,DMAC Memory Initialize Bit" "0: Invalid,1: Initiate initialization"
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hexmask.long.word 0x0 0.--14. 1. "Reserved_0,Reserved."
group.long 0xDC++0x7
line.long 0x0 "DPCR0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "IFBSYCNTENB,IFID operation count enable" "0,1"
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bitfld.long 0x0 0. "DBSYCNTENB,Data transmission operation count enable" "0,1"
line.long 0x4 "DPBSYCNTR0,"
hexmask.long 0x4 0.--31. 1. "DPBSYCNTR,This register count cycles during operation"
group.long 0xE8++0xF
line.long 0x0 "SYNCCR00,This register specifies the module corresponding to bits 0 to 3 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x0 24.--31. 1. "SYNCC3,This register specifies the module corresponding to bit 3 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x0 16.--23. 1. "SYNCC2,This register specifies the module corresponding to bit 2 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x0 8.--15. 1. "SYNCC1,This register specifies the module corresponding to bit 1 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x0 0.--7. 1. "SYNCC0,This register specifies the module corresponding to bit 0 in the SYNCC enable field of WUP and SLP instructions."
line.long 0x4 "SYNCCR10,This register specifies the module corresponding to bits 4 to 7 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x4 24.--31. 1. "SYNCC7,This register specifies the module corresponding to bit 7 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x4 16.--23. 1. "SYNCC6,This register specifies the module corresponding to bit 6 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x4 8.--15. 1. "SYNCC5,This register specifies the module corresponding to bit 5 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x4 0.--7. 1. "SYNCC4,This register specifies the module corresponding to bit 4 in the SYNCC enable field of WUP and SLP instructions."
line.long 0x8 "SYNCCR20,This register specifies the module corresponding to bits 8 to 11 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x8 24.--31. 1. "SYNCC11,This register specifies the module corresponding to bit 11 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x8 16.--23. 1. "SYNCC10,This register specifies the module corresponding to bit 10 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x8 8.--15. 1. "SYNCC9,This register specifies the module corresponding to bit 9 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x8 0.--7. 1. "SYNCC8,This register specifies the module corresponding to bit 8 in the SYNCC enable field of WUP and SLP instructions."
line.long 0xC "SYNCCR30,This register specifies the module corresponding to bits 12 to 15 of the SYNCC enable field of WUP and SLP instruction. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0xC 24.--31. 1. "SYNCC15,This register specifies the module corresponding to bit 15 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0xC 16.--23. 1. "SYNCC14,This register specifies the module corresponding to bit 14 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0xC 8.--15. 1. "SYNCC13,This register specifies the module corresponding to bit 13 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0xC 0.--7. 1. "SYNCC12,This register specifies the module corresponding to bit 12 in the SYNCC enable field of WUP and SLP instructions."
group.long 0x260++0x1F
line.long 0x0 "INDEX00,"
hexmask.long 0x0 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x4 "INDEX10,"
hexmask.long 0x4 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x8 "INDEX20,"
hexmask.long 0x8 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0xC "INDEX30,"
hexmask.long 0xC 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x10 "INDEX40,"
hexmask.long 0x10 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x14 "INDEX50,"
hexmask.long 0x14 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x18 "INDEX60,"
hexmask.long 0x18 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x1C "INDEX70,"
hexmask.long 0x1C 0.--31. 1. "INDEXn,Index0 register is read only."
group.long 0x344++0x3
line.long 0x0 "TCR10,This controls the issue cycle of Src0.1 read request."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "S1RM_CYCLE,Setting minimum interval to issue the read request of Src1"
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hexmask.long.byte 0x0 0.--7. 1. "S0RM_CYCLE,Setting minimum interval to issue the read request of Src0"
wgroup.long 0x350++0xB
line.long 0x0 "S0SAR_OFS0,This register is used to set the offset to be added to the start address of Source0."
hexmask.long 0x0 0.--31. 1. "S0SAR_OFS,Set the offset value to be added to the start address of Source0 in byte unit."
line.long 0x4 "S1SAR_OFS0,This register is used to set the offset to be added to the start address of Source1."
hexmask.long 0x4 0.--31. 1. "S1SAR_OFS,Set the offset value to be added to the start address of Source1 in byte unit."
line.long 0x8 "D0SAR_OFS0,This register is used to set the offset to be added to the start address of Destination0."
hexmask.long 0x8 0.--31. 1. "D0SAR_OFS,Set the offset value to be added to the start address of Destination0 in byte unit."
group.long 0x3F4++0x3
line.long 0x0 "CLBRKADDRR0,This is the register to control the CL break."
hexmask.long 0x0 0.--31. 1. "CLBRKADDRR,CL break address. Specify the address(break point) of command list."
group.long 0x3FC++0x3
line.long 0x0 "CLCNDGSBR0,This is the register to control the GOSUB command."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLCNDGSBR,Condition for conditional GOSUB instruction:" "0: GOSUB is not executed,1: GOSUB is executed"
tree.end
tree "IMP_DMAC_1"
base ad:0xFFA81000
rgroup.long 0x0++0x3
line.long 0x0 "VCR1,The value to be read varies depending on the product."
hexmask.long 0x0 0.--31. 1. "Version0,These bits indicate the version of this module."
group.long 0x4++0x3
line.long 0x0 "SCTLR01,This is the register to control the reset (software). and the start of DMA."
bitfld.long 0x0 31. "SWRST,Software reset" "0: Cancels a software reset for this module,1: Applies a software reset to this module"
hexmask.long 0x0 1.--30. 1. "Reserved_1,Reserved"
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bitfld.long 0x0 0. "DMAEN,DMA transmission start bit" "0: DMA transmission has not been performed,1: DMA transmission is in progress"
rgroup.long 0x8++0x3
line.long 0x0 "SR01,This register displays every status generated by IMP DMAC."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 10. "CLBRK,CL break status." "0: CL does not break,1: CL break"
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bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "WUPOVF,WUP counter overflow" "0: WUP overflow has not been occured,1: WUP overflow has been occured"
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bitfld.long 0x0 6. "INT,INT instruction decoding" "0: INT instruction has not been decoded,1: INT instruction has been decoded"
bitfld.long 0x0 5. "IER,Illegal instruction decoding or GOSUB overflow/underflow." "0: Illegal instruction has not been decoded,1: Illegal instruction has been decoded"
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bitfld.long 0x0 4. "TRA,TRAP instruction decoding" "0: TRAP instruction has not been decoded,1: TRAP instruction has been decoded"
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0. "TEND,Transmission completion" "0: Transmission has not been started or it is in..,1: Transmission has ended"
group.long 0xC++0xF
line.long 0x0 "SCR1,This register clears every status displayed in SR0. Write 1 to clear. writing 0 is disabled."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 10. "CLBRKC,CL break status clear." "0,1"
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rbitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "WUPOVFC,WUPOVF bit clearing" "0,1"
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bitfld.long 0x0 6. "INTC,INT bit clearing" "0,1"
bitfld.long 0x0 5. "IERC,IER bit clearing" "0,1"
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bitfld.long 0x0 4. "TRAC,TRA bit clearing" "0,1"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0. "TENDC,TEND bit clearing" "0,1"
line.long 0x4 "SER1,This register is used to set whether to reflect status in each bit of SR0 register."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
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hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
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bitfld.long 0x4 10. "CLBRKENB,CL break status/CL break enable." "0: CL break disable,1: CL break enable"
rbitfld.long 0x4 8.--9. "Reserved_8,Reserved" "0,1,2,3"
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bitfld.long 0x4 7. "WUPOVFE,WUPOVF bit set enable" "0: When WUP overflow is detected,1: When WUP overflow is detected"
bitfld.long 0x4 6. "INTE,INT bit set enable" "0: When the INT instruction is decoded,1: When the INT instruction is decoded"
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bitfld.long 0x4 5. "IERE,IER bit set enable" "0: When the illegal instruction is decoded,1: When the illegal instruction is decoded"
bitfld.long 0x4 4. "TRAE,TRA bit set enable" "0: When the TRAP instruction is decoded,1: When the TRAP instruction is decoded"
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rbitfld.long 0x4 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0. "TENDE,TEND bit set enable" "0: Even if DMA transmission ends,1: If DMA transmission ends"
line.long 0x8 "IMR1,This register is used to set whether to generate an interrupt or mask an interrupt according to occurrence of each status."
hexmask.long.word 0x8 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x8 16. "Reserved_16,The read value should always be 1." "0,1"
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hexmask.long.byte 0x8 12.--15. 1. "Reserved_12,Reserved"
rbitfld.long 0x8 11. "Reserved_11,Reserved" "0,1"
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bitfld.long 0x8 10. "CLBRKM,Mask setting of interrupt by CLBRK status" "0: The generation of CLBRK interrupt is not masked,1: The generation of CLBRK interrupt is masked"
rbitfld.long 0x8 8.--9. "Reserved_8,Reserved" "0,1,2,3"
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bitfld.long 0x8 7. "WUPOVFM,Mask setting of interrupt by WUPOVF status" "0: The generation of WUPOVF interrupt is not masked,1: The generation of WUPOVF interrupt is masked"
bitfld.long 0x8 6. "INTM,Mask setting of interrupt by INT status" "0: The generation of INT interrupt is not masked,1: The generation of INT interrupt is masked"
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bitfld.long 0x8 5. "IERM,Mask setting of interrupt by IER status" "0: The generation of IER interrupt is not masked,1: The generation of IER interrupt is masked"
bitfld.long 0x8 4. "TRAM,Mask setting of interrupt by TRA status" "0: The generation of TRA interrupt is not masked,1: The generation of TRA interrupt is masked"
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rbitfld.long 0x8 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0. "TENDM,Mask setting of interrupt by TEND status" "0: The generation of TEND interrupt is not masked,1: The generation of TEND interrupt is masked"
line.long 0xC "SCTLR11,This is the register to control the start of CL."
bitfld.long 0xC 31. "CLE,IMP DMACsingle_quotations CL starting bit" "0: CL is not in progress,1: CL is in progress"
hexmask.long 0xC 0.--30. 1. "Reserved_0,Reserved"
group.long 0x20++0x3
line.long 0x0 "TSCR1,[IMP DMAC]"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 20.--23. 1. "SRC1_TSIZE,These bits define the transmission size of Source1."
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hexmask.long.byte 0x0 16.--19. 1. "SRC0_TSIZE,These bits define the transmission size of Source0."
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
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hexmask.long.byte 0x0 0.--3. 1. "DST0_TSIZE,These bits define the transmission size of Destination0."
group.long 0x28++0x3
line.long 0x0 "CLSAR1,This register is used to set the first address when fetching CL."
hexmask.long 0x0 0.--31. 1. "CLSAR,First address of CL"
rgroup.long 0x30++0x3
line.long 0x0 "SR11,This register displays the code value when IMP DMAC executes INT and TRAP instructions."
hexmask.long.byte 0x0 24.--31. 1. "INTCODE,INT interrupt code"
hexmask.long.byte 0x0 16.--23. 1. "TRAPCODE,TRAP interrupt code"
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hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
group.long 0x38++0x3
line.long 0x0 "DSWPR1,This register is used to set the swap of data in Source0. Source1. Destination0."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 29. "S1SWP128BIT,Source1 128-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 28. "S1SWP64BIT,Source1 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 27. "S1SWP32BIT,Source1 32-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 26. "S1SWP16BIT,Source1 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 25. "S1SWP8BIT,Source1 8-bit swap setting" "0: It is not swapped,1: It is swapped"
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rbitfld.long 0x0 22.--24. "Reserved_22,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 21. "S0SWP128BIT,Source0 128-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 20. "S0SWP64BIT,Source0 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 19. "S0SWP32BIT,Source0 32-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 18. "S0SWP16BIT,Source0 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 17. "S0SWP8BIT,Source0 8-bit swap setting" "0: It is not swapped,1: It is swapped"
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hexmask.long.word 0x0 6.--16. 1. "Reserved_6,Reserved"
bitfld.long 0x0 5. "D0SWP128BIT,Destination0 128-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 4. "D0SWP64BIT,Destination0 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 3. "D0SWP32BIT,Destination0 32-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 2. "D0SWP16BIT,Destination0 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 1. "D0SWP8BIT,Destination0 8-bit swap setting" "0: It is not swapped,1: It is swapped"
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rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x40++0x7
line.long 0x0 "S0SAR1,This register is used to set the start address of Source0 to read from external memory or internal memory."
hexmask.long 0x0 0.--31. 1. "S0SAR,Set the start address of Source0 in byte unit."
line.long 0x4 "S0STR1,This register is used to set the memory width of Source0 to read from external memory or internal memory."
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x4 0.--14. 1. "S0STR,These bits set the memory width of Source0 in byte unit. The setting range is 0~32767."
group.long 0x4C++0x7
line.long 0x0 "S0DATAR1,This is the data register of Source0."
hexmask.long 0x0 0.--31. 1. "S0DATAR,This is the data register of Source0."
line.long 0x4 "S0CR1,This register is used to control Source0."
bitfld.long 0x4 31. "S0REN,Source0 read enable" "0: Do not read data from external memory or..,1: Read data of Source0 from external memory or.."
hexmask.long.word 0x4 16.--30. 1. "Reserved_16,Reserved"
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hexmask.long.byte 0x4 12.--15. 1. "S0TAMODE,Source0 tile addressing mode"
hexmask.long.byte 0x4 4.--11. 1. "Reserved_4,Reserved"
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hexmask.long.byte 0x4 0.--3. 1. "S0PF,Source0 pixel format"
group.long 0x60++0x7
line.long 0x0 "S1SAR1,This register is used to set the start address of Source1 to read from external memory or internal memory."
hexmask.long 0x0 0.--31. 1. "S1SAR,Set the start address of Source1 in byte unit."
line.long 0x4 "S1STR1,This register is used to set the memory width of Source1 to read from external memory or internal memory."
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x4 0.--14. 1. "S1STR,These bits set the memory width of Source1 in byte unit. The setting range is 0~32767."
group.long 0x6C++0x7
line.long 0x0 "S1DATAR1,This is the data register of Source1."
hexmask.long 0x0 0.--31. 1. "S1DATAR,This is the data register of Source1."
line.long 0x4 "S1CR1,This register is used to control Source1."
bitfld.long 0x4 31. "S1REN,Source1 read enable" "0: Do not read data from external memory or..,1: Read data of Source1 from external memory or.."
hexmask.long 0x4 4.--30. 1. "Reserved_4,Reserved"
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hexmask.long.byte 0x4 0.--3. 1. "S1PF,Source1 pixel format"
group.long 0x7C++0xB
line.long 0x0 "TCR01,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
bitfld.long 0x0 27. "WRM_EN,Enabling minimum interval control of write request issuance" "0,1"
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hexmask.long.word 0x0 16.--26. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "WRM_CYCLE,Setting minimum interval of write request issuance"
line.long 0x4 "D0SAR1,This register is used to set the start address of Destination0 to write to external memory or internal memory."
hexmask.long 0x4 0.--31. 1. "D0SAR,Set the start address of Destination0 in byte unit."
line.long 0x8 "D0STR1,This register is used to set the memory width of Destination0 to write to external memory or internal memory."
hexmask.long.tbyte 0x8 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x8 0.--14. 1. "D0STR,Memory width of Destination0 is set in byte unit. The setting range is 1~32767."
group.long 0x90++0x7
line.long 0x0 "D0CR1,This register is used to control Destination0."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 12.--15. 1. "D0TAMODE,Destination0 tile addressing mode"
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hexmask.long.byte 0x0 4.--11. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "D0PF,Destination0 pixel format"
line.long 0x4 "IMGSIZER1,This register is used to set the processing size (width and height) of Source and Destination. It is set in pixel unit."
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "IWIDTH,These bits specify the width of the processed image."
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rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "IHEIGHT,These bits specify the height of the processed image."
group.long 0xA0++0x3
line.long 0x0 "FCR01,This register is used to control functions of IMP DMAC"
bitfld.long 0x0 31. "BITCNTEN,Bit count enable setting" "0: Do not operate bit count,1: Operate bit count"
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
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hexmask.long.byte 0x0 0.--7. 1. "LOP,Logical operation setting"
group.long 0xAC++0x3
line.long 0x0 "FCR11,[IMP DMAC]"
bitfld.long 0x0 31. "PXALIGN,Pixel alignment mode enable" "0: 64-byte or 128-byte alignment mode,1: Pixel alignment mode"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
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hexmask.long.word 0x0 13.--27. 1. "Reserved_13,Reserved"
hexmask.long.byte 0x0 8.--12. 1. "SHIFT,Setting of shift amount after LOP"
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hexmask.long.byte 0x0 4.--7. 1. "RNDMD,Setting rounding mode after shift"
bitfld.long 0x0 3. "SATEN,Saturation process enable" "0: Do not process saturation,1: Process saturation"
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rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
bitfld.long 0x0 0.--1. "SATW,Saturation bit width selection" "?,1: Saturate to 10 bits,2: Saturate to 12 bits,3: Saturate to 14 bits"
rgroup.long 0xC8++0x7
line.long 0x0 "CLFAR1,This register is used to display the address of CL fetch destination."
hexmask.long 0x0 2.--31. 1. "CLFAR,These bits display bit31~bit2 of the address of CL fetch destination (during execution)."
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "CLEIR1,This register is used to display the instruction during CL execution."
hexmask.long 0x4 0.--31. 1. "CLEIR,These bits display the instruction during CL execution."
group.long 0xD0++0x3
line.long 0x0 "RAMTSTR1,This is safety related register. Do not set this register during DMAC operation."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved."
bitfld.long 0x0 15. "MEMINIT,DMAC Memory Initialize Bit" "0: Invalid,1: Initiate initialization"
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hexmask.long.word 0x0 0.--14. 1. "Reserved_0,Reserved."
group.long 0xDC++0x7
line.long 0x0 "DPCR1,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "IFBSYCNTENB,IFID operation count enable" "0,1"
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bitfld.long 0x0 0. "DBSYCNTENB,Data transmission operation count enable" "0,1"
line.long 0x4 "DPBSYCNTR1,"
hexmask.long 0x4 0.--31. 1. "DPBSYCNTR,This register count cycles during operation"
group.long 0xE8++0xF
line.long 0x0 "SYNCCR01,This register specifies the module corresponding to bits 0 to 3 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x0 24.--31. 1. "SYNCC3,This register specifies the module corresponding to bit 3 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x0 16.--23. 1. "SYNCC2,This register specifies the module corresponding to bit 2 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x0 8.--15. 1. "SYNCC1,This register specifies the module corresponding to bit 1 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x0 0.--7. 1. "SYNCC0,This register specifies the module corresponding to bit 0 in the SYNCC enable field of WUP and SLP instructions."
line.long 0x4 "SYNCCR11,This register specifies the module corresponding to bits 4 to 7 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x4 24.--31. 1. "SYNCC7,This register specifies the module corresponding to bit 7 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x4 16.--23. 1. "SYNCC6,This register specifies the module corresponding to bit 6 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x4 8.--15. 1. "SYNCC5,This register specifies the module corresponding to bit 5 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x4 0.--7. 1. "SYNCC4,This register specifies the module corresponding to bit 4 in the SYNCC enable field of WUP and SLP instructions."
line.long 0x8 "SYNCCR21,This register specifies the module corresponding to bits 8 to 11 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x8 24.--31. 1. "SYNCC11,This register specifies the module corresponding to bit 11 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x8 16.--23. 1. "SYNCC10,This register specifies the module corresponding to bit 10 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x8 8.--15. 1. "SYNCC9,This register specifies the module corresponding to bit 9 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x8 0.--7. 1. "SYNCC8,This register specifies the module corresponding to bit 8 in the SYNCC enable field of WUP and SLP instructions."
line.long 0xC "SYNCCR31,This register specifies the module corresponding to bits 12 to 15 of the SYNCC enable field of WUP and SLP instruction. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0xC 24.--31. 1. "SYNCC15,This register specifies the module corresponding to bit 15 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0xC 16.--23. 1. "SYNCC14,This register specifies the module corresponding to bit 14 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0xC 8.--15. 1. "SYNCC13,This register specifies the module corresponding to bit 13 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0xC 0.--7. 1. "SYNCC12,This register specifies the module corresponding to bit 12 in the SYNCC enable field of WUP and SLP instructions."
group.long 0x260++0x1F
line.long 0x0 "INDEX01,"
hexmask.long 0x0 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x4 "INDEX11,"
hexmask.long 0x4 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x8 "INDEX21,"
hexmask.long 0x8 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0xC "INDEX31,"
hexmask.long 0xC 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x10 "INDEX41,"
hexmask.long 0x10 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x14 "INDEX51,"
hexmask.long 0x14 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x18 "INDEX61,"
hexmask.long 0x18 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x1C "INDEX71,"
hexmask.long 0x1C 0.--31. 1. "INDEXn,Index0 register is read only."
group.long 0x344++0x3
line.long 0x0 "TCR11,This controls the issue cycle of Src0.1 read request."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "S1RM_CYCLE,Setting minimum interval to issue the read request of Src1"
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hexmask.long.byte 0x0 0.--7. 1. "S0RM_CYCLE,Setting minimum interval to issue the read request of Src0"
wgroup.long 0x350++0xB
line.long 0x0 "S0SAR_OFS1,This register is used to set the offset to be added to the start address of Source0."
hexmask.long 0x0 0.--31. 1. "S0SAR_OFS,Set the offset value to be added to the start address of Source0 in byte unit."
line.long 0x4 "S1SAR_OFS1,This register is used to set the offset to be added to the start address of Source1."
hexmask.long 0x4 0.--31. 1. "S1SAR_OFS,Set the offset value to be added to the start address of Source1 in byte unit."
line.long 0x8 "D0SAR_OFS1,This register is used to set the offset to be added to the start address of Destination0."
hexmask.long 0x8 0.--31. 1. "D0SAR_OFS,Set the offset value to be added to the start address of Destination0 in byte unit."
group.long 0x3F4++0x3
line.long 0x0 "CLBRKADDRR1,This is the register to control the CL break."
hexmask.long 0x0 0.--31. 1. "CLBRKADDRR,CL break address. Specify the address(break point) of command list."
group.long 0x3FC++0x3
line.long 0x0 "CLCNDGSBR1,This is the register to control the GOSUB command."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLCNDGSBR,Condition for conditional GOSUB instruction:" "0: GOSUB is not executed,1: GOSUB is executed"
tree.end
tree "IMP_DMAC_2"
base ad:0xFFB80000
rgroup.long 0x0++0x3
line.long 0x0 "VCR2,The value to be read varies depending on the product."
hexmask.long 0x0 0.--31. 1. "Version0,These bits indicate the version of this module."
group.long 0x4++0x3
line.long 0x0 "SCTLR02,This is the register to control the reset (software). and the start of DMA."
bitfld.long 0x0 31. "SWRST,Software reset" "0: Cancels a software reset for this module,1: Applies a software reset to this module"
hexmask.long 0x0 1.--30. 1. "Reserved_1,Reserved"
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bitfld.long 0x0 0. "DMAEN,DMA transmission start bit" "0: DMA transmission has not been performed,1: DMA transmission is in progress"
rgroup.long 0x8++0x3
line.long 0x0 "SR02,This register displays every status generated by IMP DMAC."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 10. "CLBRK,CL break status." "0: CL does not break,1: CL break"
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bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "WUPOVF,WUP counter overflow" "0: WUP overflow has not been occured,1: WUP overflow has been occured"
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bitfld.long 0x0 6. "INT,INT instruction decoding" "0: INT instruction has not been decoded,1: INT instruction has been decoded"
bitfld.long 0x0 5. "IER,Illegal instruction decoding or GOSUB overflow/underflow." "0: Illegal instruction has not been decoded,1: Illegal instruction has been decoded"
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bitfld.long 0x0 4. "TRA,TRAP instruction decoding" "0: TRAP instruction has not been decoded,1: TRAP instruction has been decoded"
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0. "TEND,Transmission completion" "0: Transmission has not been started or it is in..,1: Transmission has ended"
group.long 0xC++0xF
line.long 0x0 "SCR2,This register clears every status displayed in SR0. Write 1 to clear. writing 0 is disabled."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 10. "CLBRKC,CL break status clear." "0,1"
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rbitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "WUPOVFC,WUPOVF bit clearing" "0,1"
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bitfld.long 0x0 6. "INTC,INT bit clearing" "0,1"
bitfld.long 0x0 5. "IERC,IER bit clearing" "0,1"
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bitfld.long 0x0 4. "TRAC,TRA bit clearing" "0,1"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0. "TENDC,TEND bit clearing" "0,1"
line.long 0x4 "SER2,This register is used to set whether to reflect status in each bit of SR0 register."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
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hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
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bitfld.long 0x4 10. "CLBRKENB,CL break status/CL break enable." "0: CL break disable,1: CL break enable"
rbitfld.long 0x4 8.--9. "Reserved_8,Reserved" "0,1,2,3"
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bitfld.long 0x4 7. "WUPOVFE,WUPOVF bit set enable" "0: When WUP overflow is detected,1: When WUP overflow is detected"
bitfld.long 0x4 6. "INTE,INT bit set enable" "0: When the INT instruction is decoded,1: When the INT instruction is decoded"
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bitfld.long 0x4 5. "IERE,IER bit set enable" "0: When the illegal instruction is decoded,1: When the illegal instruction is decoded"
bitfld.long 0x4 4. "TRAE,TRA bit set enable" "0: When the TRAP instruction is decoded,1: When the TRAP instruction is decoded"
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rbitfld.long 0x4 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0. "TENDE,TEND bit set enable" "0: Even if DMA transmission ends,1: If DMA transmission ends"
line.long 0x8 "IMR2,This register is used to set whether to generate an interrupt or mask an interrupt according to occurrence of each status."
hexmask.long.word 0x8 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x8 16. "Reserved_16,The read value should always be 1." "0,1"
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hexmask.long.byte 0x8 12.--15. 1. "Reserved_12,Reserved"
rbitfld.long 0x8 11. "Reserved_11,Reserved" "0,1"
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bitfld.long 0x8 10. "CLBRKM,Mask setting of interrupt by CLBRK status" "0: The generation of CLBRK interrupt is not masked,1: The generation of CLBRK interrupt is masked"
rbitfld.long 0x8 8.--9. "Reserved_8,Reserved" "0,1,2,3"
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bitfld.long 0x8 7. "WUPOVFM,Mask setting of interrupt by WUPOVF status" "0: The generation of WUPOVF interrupt is not masked,1: The generation of WUPOVF interrupt is masked"
bitfld.long 0x8 6. "INTM,Mask setting of interrupt by INT status" "0: The generation of INT interrupt is not masked,1: The generation of INT interrupt is masked"
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bitfld.long 0x8 5. "IERM,Mask setting of interrupt by IER status" "0: The generation of IER interrupt is not masked,1: The generation of IER interrupt is masked"
bitfld.long 0x8 4. "TRAM,Mask setting of interrupt by TRA status" "0: The generation of TRA interrupt is not masked,1: The generation of TRA interrupt is masked"
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rbitfld.long 0x8 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0. "TENDM,Mask setting of interrupt by TEND status" "0: The generation of TEND interrupt is not masked,1: The generation of TEND interrupt is masked"
line.long 0xC "SCTLR12,This is the register to control the start of CL."
bitfld.long 0xC 31. "CLE,IMP DMACsingle_quotations CL starting bit" "0: CL is not in progress,1: CL is in progress"
hexmask.long 0xC 0.--30. 1. "Reserved_0,Reserved"
group.long 0x20++0x3
line.long 0x0 "TSCR2,[IMP DMAC]"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 20.--23. 1. "SRC1_TSIZE,These bits define the transmission size of Source1."
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hexmask.long.byte 0x0 16.--19. 1. "SRC0_TSIZE,These bits define the transmission size of Source0."
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
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hexmask.long.byte 0x0 0.--3. 1. "DST0_TSIZE,These bits define the transmission size of Destination0."
group.long 0x28++0x3
line.long 0x0 "CLSAR2,This register is used to set the first address when fetching CL."
hexmask.long 0x0 0.--31. 1. "CLSAR,First address of CL"
rgroup.long 0x30++0x3
line.long 0x0 "SR12,This register displays the code value when IMP DMAC executes INT and TRAP instructions."
hexmask.long.byte 0x0 24.--31. 1. "INTCODE,INT interrupt code"
hexmask.long.byte 0x0 16.--23. 1. "TRAPCODE,TRAP interrupt code"
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hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
group.long 0x38++0x3
line.long 0x0 "DSWPR2,This register is used to set the swap of data in Source0. Source1. Destination0."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 29. "S1SWP128BIT,Source1 128-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 28. "S1SWP64BIT,Source1 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 27. "S1SWP32BIT,Source1 32-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 26. "S1SWP16BIT,Source1 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 25. "S1SWP8BIT,Source1 8-bit swap setting" "0: It is not swapped,1: It is swapped"
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rbitfld.long 0x0 22.--24. "Reserved_22,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 21. "S0SWP128BIT,Source0 128-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 20. "S0SWP64BIT,Source0 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 19. "S0SWP32BIT,Source0 32-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 18. "S0SWP16BIT,Source0 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 17. "S0SWP8BIT,Source0 8-bit swap setting" "0: It is not swapped,1: It is swapped"
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hexmask.long.word 0x0 6.--16. 1. "Reserved_6,Reserved"
bitfld.long 0x0 5. "D0SWP128BIT,Destination0 128-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 4. "D0SWP64BIT,Destination0 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 3. "D0SWP32BIT,Destination0 32-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 2. "D0SWP16BIT,Destination0 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 1. "D0SWP8BIT,Destination0 8-bit swap setting" "0: It is not swapped,1: It is swapped"
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rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x40++0x7
line.long 0x0 "S0SAR2,This register is used to set the start address of Source0 to read from external memory or internal memory."
hexmask.long 0x0 0.--31. 1. "S0SAR,Set the start address of Source0 in byte unit."
line.long 0x4 "S0STR2,This register is used to set the memory width of Source0 to read from external memory or internal memory."
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x4 0.--14. 1. "S0STR,These bits set the memory width of Source0 in byte unit. The setting range is 0~32767."
group.long 0x4C++0x7
line.long 0x0 "S0DATAR2,This is the data register of Source0."
hexmask.long 0x0 0.--31. 1. "S0DATAR,This is the data register of Source0."
line.long 0x4 "S0CR2,This register is used to control Source0."
bitfld.long 0x4 31. "S0REN,Source0 read enable" "0: Do not read data from external memory or..,1: Read data of Source0 from external memory or.."
hexmask.long.word 0x4 16.--30. 1. "Reserved_16,Reserved"
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hexmask.long.byte 0x4 12.--15. 1. "S0TAMODE,Source0 tile addressing mode"
hexmask.long.byte 0x4 4.--11. 1. "Reserved_4,Reserved"
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hexmask.long.byte 0x4 0.--3. 1. "S0PF,Source0 pixel format"
group.long 0x60++0x7
line.long 0x0 "S1SAR2,This register is used to set the start address of Source1 to read from external memory or internal memory."
hexmask.long 0x0 0.--31. 1. "S1SAR,Set the start address of Source1 in byte unit."
line.long 0x4 "S1STR2,This register is used to set the memory width of Source1 to read from external memory or internal memory."
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x4 0.--14. 1. "S1STR,These bits set the memory width of Source1 in byte unit. The setting range is 0~32767."
group.long 0x6C++0x7
line.long 0x0 "S1DATAR2,This is the data register of Source1."
hexmask.long 0x0 0.--31. 1. "S1DATAR,This is the data register of Source1."
line.long 0x4 "S1CR2,This register is used to control Source1."
bitfld.long 0x4 31. "S1REN,Source1 read enable" "0: Do not read data from external memory or..,1: Read data of Source1 from external memory or.."
hexmask.long 0x4 4.--30. 1. "Reserved_4,Reserved"
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hexmask.long.byte 0x4 0.--3. 1. "S1PF,Source1 pixel format"
group.long 0x7C++0xB
line.long 0x0 "TCR02,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
bitfld.long 0x0 27. "WRM_EN,Enabling minimum interval control of write request issuance" "0,1"
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hexmask.long.word 0x0 16.--26. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "WRM_CYCLE,Setting minimum interval of write request issuance"
line.long 0x4 "D0SAR2,This register is used to set the start address of Destination0 to write to external memory or internal memory."
hexmask.long 0x4 0.--31. 1. "D0SAR,Set the start address of Destination0 in byte unit."
line.long 0x8 "D0STR2,This register is used to set the memory width of Destination0 to write to external memory or internal memory."
hexmask.long.tbyte 0x8 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x8 0.--14. 1. "D0STR,Memory width of Destination0 is set in byte unit. The setting range is 1~32767."
group.long 0x90++0x7
line.long 0x0 "D0CR2,This register is used to control Destination0."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 12.--15. 1. "D0TAMODE,Destination0 tile addressing mode"
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hexmask.long.byte 0x0 4.--11. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "D0PF,Destination0 pixel format"
line.long 0x4 "IMGSIZER2,This register is used to set the processing size (width and height) of Source and Destination. It is set in pixel unit."
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "IWIDTH,These bits specify the width of the processed image."
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rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "IHEIGHT,These bits specify the height of the processed image."
group.long 0xA0++0x3
line.long 0x0 "FCR02,This register is used to control functions of IMP DMAC"
bitfld.long 0x0 31. "BITCNTEN,Bit count enable setting" "0: Do not operate bit count,1: Operate bit count"
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
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hexmask.long.byte 0x0 0.--7. 1. "LOP,Logical operation setting"
group.long 0xAC++0x3
line.long 0x0 "FCR12,[IMP DMAC]"
bitfld.long 0x0 31. "PXALIGN,Pixel alignment mode enable" "0: 64-byte or 128-byte alignment mode,1: Pixel alignment mode"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
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hexmask.long.word 0x0 13.--27. 1. "Reserved_13,Reserved"
hexmask.long.byte 0x0 8.--12. 1. "SHIFT,Setting of shift amount after LOP"
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hexmask.long.byte 0x0 4.--7. 1. "RNDMD,Setting rounding mode after shift"
bitfld.long 0x0 3. "SATEN,Saturation process enable" "0: Do not process saturation,1: Process saturation"
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rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
bitfld.long 0x0 0.--1. "SATW,Saturation bit width selection" "?,1: Saturate to 10 bits,2: Saturate to 12 bits,3: Saturate to 14 bits"
rgroup.long 0xC8++0x7
line.long 0x0 "CLFAR2,This register is used to display the address of CL fetch destination."
hexmask.long 0x0 2.--31. 1. "CLFAR,These bits display bit31~bit2 of the address of CL fetch destination (during execution)."
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "CLEIR2,This register is used to display the instruction during CL execution."
hexmask.long 0x4 0.--31. 1. "CLEIR,These bits display the instruction during CL execution."
group.long 0xD0++0x3
line.long 0x0 "RAMTSTR2,This is safety related register. Do not set this register during DMAC operation."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved."
bitfld.long 0x0 15. "MEMINIT,DMAC Memory Initialize Bit" "0: Invalid,1: Initiate initialization"
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hexmask.long.word 0x0 0.--14. 1. "Reserved_0,Reserved."
group.long 0xDC++0x7
line.long 0x0 "DPCR2,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "IFBSYCNTENB,IFID operation count enable" "0,1"
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bitfld.long 0x0 0. "DBSYCNTENB,Data transmission operation count enable" "0,1"
line.long 0x4 "DPBSYCNTR2,"
hexmask.long 0x4 0.--31. 1. "DPBSYCNTR,This register count cycles during operation"
group.long 0xE8++0xF
line.long 0x0 "SYNCCR02,This register specifies the module corresponding to bits 0 to 3 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x0 24.--31. 1. "SYNCC3,This register specifies the module corresponding to bit 3 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x0 16.--23. 1. "SYNCC2,This register specifies the module corresponding to bit 2 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x0 8.--15. 1. "SYNCC1,This register specifies the module corresponding to bit 1 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x0 0.--7. 1. "SYNCC0,This register specifies the module corresponding to bit 0 in the SYNCC enable field of WUP and SLP instructions."
line.long 0x4 "SYNCCR12,This register specifies the module corresponding to bits 4 to 7 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x4 24.--31. 1. "SYNCC7,This register specifies the module corresponding to bit 7 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x4 16.--23. 1. "SYNCC6,This register specifies the module corresponding to bit 6 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x4 8.--15. 1. "SYNCC5,This register specifies the module corresponding to bit 5 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x4 0.--7. 1. "SYNCC4,This register specifies the module corresponding to bit 4 in the SYNCC enable field of WUP and SLP instructions."
line.long 0x8 "SYNCCR22,This register specifies the module corresponding to bits 8 to 11 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x8 24.--31. 1. "SYNCC11,This register specifies the module corresponding to bit 11 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x8 16.--23. 1. "SYNCC10,This register specifies the module corresponding to bit 10 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x8 8.--15. 1. "SYNCC9,This register specifies the module corresponding to bit 9 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x8 0.--7. 1. "SYNCC8,This register specifies the module corresponding to bit 8 in the SYNCC enable field of WUP and SLP instructions."
line.long 0xC "SYNCCR32,This register specifies the module corresponding to bits 12 to 15 of the SYNCC enable field of WUP and SLP instruction. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0xC 24.--31. 1. "SYNCC15,This register specifies the module corresponding to bit 15 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0xC 16.--23. 1. "SYNCC14,This register specifies the module corresponding to bit 14 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0xC 8.--15. 1. "SYNCC13,This register specifies the module corresponding to bit 13 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0xC 0.--7. 1. "SYNCC12,This register specifies the module corresponding to bit 12 in the SYNCC enable field of WUP and SLP instructions."
group.long 0x260++0x1F
line.long 0x0 "INDEX02,"
hexmask.long 0x0 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x4 "INDEX12,"
hexmask.long 0x4 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x8 "INDEX22,"
hexmask.long 0x8 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0xC "INDEX32,"
hexmask.long 0xC 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x10 "INDEX42,"
hexmask.long 0x10 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x14 "INDEX52,"
hexmask.long 0x14 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x18 "INDEX62,"
hexmask.long 0x18 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x1C "INDEX72,"
hexmask.long 0x1C 0.--31. 1. "INDEXn,Index0 register is read only."
group.long 0x344++0x3
line.long 0x0 "TCR12,This controls the issue cycle of Src0.1 read request."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "S1RM_CYCLE,Setting minimum interval to issue the read request of Src1"
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hexmask.long.byte 0x0 0.--7. 1. "S0RM_CYCLE,Setting minimum interval to issue the read request of Src0"
wgroup.long 0x350++0xB
line.long 0x0 "S0SAR_OFS2,This register is used to set the offset to be added to the start address of Source0."
hexmask.long 0x0 0.--31. 1. "S0SAR_OFS,Set the offset value to be added to the start address of Source0 in byte unit."
line.long 0x4 "S1SAR_OFS2,This register is used to set the offset to be added to the start address of Source1."
hexmask.long 0x4 0.--31. 1. "S1SAR_OFS,Set the offset value to be added to the start address of Source1 in byte unit."
line.long 0x8 "D0SAR_OFS2,This register is used to set the offset to be added to the start address of Destination0."
hexmask.long 0x8 0.--31. 1. "D0SAR_OFS,Set the offset value to be added to the start address of Destination0 in byte unit."
group.long 0x3F4++0x3
line.long 0x0 "CLBRKADDRR2,This is the register to control the CL break."
hexmask.long 0x0 0.--31. 1. "CLBRKADDRR,CL break address. Specify the address(break point) of command list."
group.long 0x3FC++0x3
line.long 0x0 "CLCNDGSBR2,This is the register to control the GOSUB command."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLCNDGSBR,Condition for conditional GOSUB instruction:" "0: GOSUB is not executed,1: GOSUB is executed"
tree.end
tree "IMP_DMAC_3"
base ad:0xFFB81000
rgroup.long 0x0++0x3
line.long 0x0 "VCR3,The value to be read varies depending on the product."
hexmask.long 0x0 0.--31. 1. "Version0,These bits indicate the version of this module."
group.long 0x4++0x3
line.long 0x0 "SCTLR03,This is the register to control the reset (software). and the start of DMA."
bitfld.long 0x0 31. "SWRST,Software reset" "0: Cancels a software reset for this module,1: Applies a software reset to this module"
hexmask.long 0x0 1.--30. 1. "Reserved_1,Reserved"
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bitfld.long 0x0 0. "DMAEN,DMA transmission start bit" "0: DMA transmission has not been performed,1: DMA transmission is in progress"
rgroup.long 0x8++0x3
line.long 0x0 "SR03,This register displays every status generated by IMP DMAC."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 10. "CLBRK,CL break status." "0: CL does not break,1: CL break"
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bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "WUPOVF,WUP counter overflow" "0: WUP overflow has not been occured,1: WUP overflow has been occured"
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bitfld.long 0x0 6. "INT,INT instruction decoding" "0: INT instruction has not been decoded,1: INT instruction has been decoded"
bitfld.long 0x0 5. "IER,Illegal instruction decoding or GOSUB overflow/underflow." "0: Illegal instruction has not been decoded,1: Illegal instruction has been decoded"
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bitfld.long 0x0 4. "TRA,TRAP instruction decoding" "0: TRAP instruction has not been decoded,1: TRAP instruction has been decoded"
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0. "TEND,Transmission completion" "0: Transmission has not been started or it is in..,1: Transmission has ended"
group.long 0xC++0xF
line.long 0x0 "SCR3,This register clears every status displayed in SR0. Write 1 to clear. writing 0 is disabled."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 10. "CLBRKC,CL break status clear." "0,1"
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rbitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "WUPOVFC,WUPOVF bit clearing" "0,1"
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bitfld.long 0x0 6. "INTC,INT bit clearing" "0,1"
bitfld.long 0x0 5. "IERC,IER bit clearing" "0,1"
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bitfld.long 0x0 4. "TRAC,TRA bit clearing" "0,1"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0. "TENDC,TEND bit clearing" "0,1"
line.long 0x4 "SER3,This register is used to set whether to reflect status in each bit of SR0 register."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
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hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
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bitfld.long 0x4 10. "CLBRKENB,CL break status/CL break enable." "0: CL break disable,1: CL break enable"
rbitfld.long 0x4 8.--9. "Reserved_8,Reserved" "0,1,2,3"
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bitfld.long 0x4 7. "WUPOVFE,WUPOVF bit set enable" "0: When WUP overflow is detected,1: When WUP overflow is detected"
bitfld.long 0x4 6. "INTE,INT bit set enable" "0: When the INT instruction is decoded,1: When the INT instruction is decoded"
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bitfld.long 0x4 5. "IERE,IER bit set enable" "0: When the illegal instruction is decoded,1: When the illegal instruction is decoded"
bitfld.long 0x4 4. "TRAE,TRA bit set enable" "0: When the TRAP instruction is decoded,1: When the TRAP instruction is decoded"
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rbitfld.long 0x4 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0. "TENDE,TEND bit set enable" "0: Even if DMA transmission ends,1: If DMA transmission ends"
line.long 0x8 "IMR3,This register is used to set whether to generate an interrupt or mask an interrupt according to occurrence of each status."
hexmask.long.word 0x8 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x8 16. "Reserved_16,The read value should always be 1." "0,1"
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hexmask.long.byte 0x8 12.--15. 1. "Reserved_12,Reserved"
rbitfld.long 0x8 11. "Reserved_11,Reserved" "0,1"
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bitfld.long 0x8 10. "CLBRKM,Mask setting of interrupt by CLBRK status" "0: The generation of CLBRK interrupt is not masked,1: The generation of CLBRK interrupt is masked"
rbitfld.long 0x8 8.--9. "Reserved_8,Reserved" "0,1,2,3"
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bitfld.long 0x8 7. "WUPOVFM,Mask setting of interrupt by WUPOVF status" "0: The generation of WUPOVF interrupt is not masked,1: The generation of WUPOVF interrupt is masked"
bitfld.long 0x8 6. "INTM,Mask setting of interrupt by INT status" "0: The generation of INT interrupt is not masked,1: The generation of INT interrupt is masked"
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bitfld.long 0x8 5. "IERM,Mask setting of interrupt by IER status" "0: The generation of IER interrupt is not masked,1: The generation of IER interrupt is masked"
bitfld.long 0x8 4. "TRAM,Mask setting of interrupt by TRA status" "0: The generation of TRA interrupt is not masked,1: The generation of TRA interrupt is masked"
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rbitfld.long 0x8 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0. "TENDM,Mask setting of interrupt by TEND status" "0: The generation of TEND interrupt is not masked,1: The generation of TEND interrupt is masked"
line.long 0xC "SCTLR13,This is the register to control the start of CL."
bitfld.long 0xC 31. "CLE,IMP DMACsingle_quotations CL starting bit" "0: CL is not in progress,1: CL is in progress"
hexmask.long 0xC 0.--30. 1. "Reserved_0,Reserved"
group.long 0x20++0x3
line.long 0x0 "TSCR3,[IMP DMAC]"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 20.--23. 1. "SRC1_TSIZE,These bits define the transmission size of Source1."
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hexmask.long.byte 0x0 16.--19. 1. "SRC0_TSIZE,These bits define the transmission size of Source0."
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
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hexmask.long.byte 0x0 0.--3. 1. "DST0_TSIZE,These bits define the transmission size of Destination0."
group.long 0x28++0x3
line.long 0x0 "CLSAR3,This register is used to set the first address when fetching CL."
hexmask.long 0x0 0.--31. 1. "CLSAR,First address of CL"
rgroup.long 0x30++0x3
line.long 0x0 "SR13,This register displays the code value when IMP DMAC executes INT and TRAP instructions."
hexmask.long.byte 0x0 24.--31. 1. "INTCODE,INT interrupt code"
hexmask.long.byte 0x0 16.--23. 1. "TRAPCODE,TRAP interrupt code"
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hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
group.long 0x38++0x3
line.long 0x0 "DSWPR3,This register is used to set the swap of data in Source0. Source1. Destination0."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 29. "S1SWP128BIT,Source1 128-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 28. "S1SWP64BIT,Source1 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 27. "S1SWP32BIT,Source1 32-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 26. "S1SWP16BIT,Source1 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 25. "S1SWP8BIT,Source1 8-bit swap setting" "0: It is not swapped,1: It is swapped"
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rbitfld.long 0x0 22.--24. "Reserved_22,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 21. "S0SWP128BIT,Source0 128-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 20. "S0SWP64BIT,Source0 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 19. "S0SWP32BIT,Source0 32-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 18. "S0SWP16BIT,Source0 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 17. "S0SWP8BIT,Source0 8-bit swap setting" "0: It is not swapped,1: It is swapped"
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hexmask.long.word 0x0 6.--16. 1. "Reserved_6,Reserved"
bitfld.long 0x0 5. "D0SWP128BIT,Destination0 128-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 4. "D0SWP64BIT,Destination0 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 3. "D0SWP32BIT,Destination0 32-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 2. "D0SWP16BIT,Destination0 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 1. "D0SWP8BIT,Destination0 8-bit swap setting" "0: It is not swapped,1: It is swapped"
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rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x40++0x7
line.long 0x0 "S0SAR3,This register is used to set the start address of Source0 to read from external memory or internal memory."
hexmask.long 0x0 0.--31. 1. "S0SAR,Set the start address of Source0 in byte unit."
line.long 0x4 "S0STR3,This register is used to set the memory width of Source0 to read from external memory or internal memory."
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x4 0.--14. 1. "S0STR,These bits set the memory width of Source0 in byte unit. The setting range is 0~32767."
group.long 0x4C++0x7
line.long 0x0 "S0DATAR3,This is the data register of Source0."
hexmask.long 0x0 0.--31. 1. "S0DATAR,This is the data register of Source0."
line.long 0x4 "S0CR3,This register is used to control Source0."
bitfld.long 0x4 31. "S0REN,Source0 read enable" "0: Do not read data from external memory or..,1: Read data of Source0 from external memory or.."
hexmask.long.word 0x4 16.--30. 1. "Reserved_16,Reserved"
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hexmask.long.byte 0x4 12.--15. 1. "S0TAMODE,Source0 tile addressing mode"
hexmask.long.byte 0x4 4.--11. 1. "Reserved_4,Reserved"
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hexmask.long.byte 0x4 0.--3. 1. "S0PF,Source0 pixel format"
group.long 0x60++0x7
line.long 0x0 "S1SAR3,This register is used to set the start address of Source1 to read from external memory or internal memory."
hexmask.long 0x0 0.--31. 1. "S1SAR,Set the start address of Source1 in byte unit."
line.long 0x4 "S1STR3,This register is used to set the memory width of Source1 to read from external memory or internal memory."
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x4 0.--14. 1. "S1STR,These bits set the memory width of Source1 in byte unit. The setting range is 0~32767."
group.long 0x6C++0x7
line.long 0x0 "S1DATAR3,This is the data register of Source1."
hexmask.long 0x0 0.--31. 1. "S1DATAR,This is the data register of Source1."
line.long 0x4 "S1CR3,This register is used to control Source1."
bitfld.long 0x4 31. "S1REN,Source1 read enable" "0: Do not read data from external memory or..,1: Read data of Source1 from external memory or.."
hexmask.long 0x4 4.--30. 1. "Reserved_4,Reserved"
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hexmask.long.byte 0x4 0.--3. 1. "S1PF,Source1 pixel format"
group.long 0x7C++0xB
line.long 0x0 "TCR03,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
bitfld.long 0x0 27. "WRM_EN,Enabling minimum interval control of write request issuance" "0,1"
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hexmask.long.word 0x0 16.--26. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "WRM_CYCLE,Setting minimum interval of write request issuance"
line.long 0x4 "D0SAR3,This register is used to set the start address of Destination0 to write to external memory or internal memory."
hexmask.long 0x4 0.--31. 1. "D0SAR,Set the start address of Destination0 in byte unit."
line.long 0x8 "D0STR3,This register is used to set the memory width of Destination0 to write to external memory or internal memory."
hexmask.long.tbyte 0x8 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x8 0.--14. 1. "D0STR,Memory width of Destination0 is set in byte unit. The setting range is 1~32767."
group.long 0x90++0x7
line.long 0x0 "D0CR3,This register is used to control Destination0."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 12.--15. 1. "D0TAMODE,Destination0 tile addressing mode"
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hexmask.long.byte 0x0 4.--11. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "D0PF,Destination0 pixel format"
line.long 0x4 "IMGSIZER3,This register is used to set the processing size (width and height) of Source and Destination. It is set in pixel unit."
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "IWIDTH,These bits specify the width of the processed image."
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rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "IHEIGHT,These bits specify the height of the processed image."
group.long 0xA0++0x3
line.long 0x0 "FCR03,This register is used to control functions of IMP DMAC"
bitfld.long 0x0 31. "BITCNTEN,Bit count enable setting" "0: Do not operate bit count,1: Operate bit count"
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
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hexmask.long.byte 0x0 0.--7. 1. "LOP,Logical operation setting"
group.long 0xAC++0x3
line.long 0x0 "FCR13,[IMP DMAC]"
bitfld.long 0x0 31. "PXALIGN,Pixel alignment mode enable" "0: 64-byte or 128-byte alignment mode,1: Pixel alignment mode"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x0 13.--27. 1. "Reserved_13,Reserved"
hexmask.long.byte 0x0 8.--12. 1. "SHIFT,Setting of shift amount after LOP"
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hexmask.long.byte 0x0 4.--7. 1. "RNDMD,Setting rounding mode after shift"
bitfld.long 0x0 3. "SATEN,Saturation process enable" "0: Do not process saturation,1: Process saturation"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
bitfld.long 0x0 0.--1. "SATW,Saturation bit width selection" "?,1: Saturate to 10 bits,2: Saturate to 12 bits,3: Saturate to 14 bits"
rgroup.long 0xC8++0x7
line.long 0x0 "CLFAR3,This register is used to display the address of CL fetch destination."
hexmask.long 0x0 2.--31. 1. "CLFAR,These bits display bit31~bit2 of the address of CL fetch destination (during execution)."
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "CLEIR3,This register is used to display the instruction during CL execution."
hexmask.long 0x4 0.--31. 1. "CLEIR,These bits display the instruction during CL execution."
group.long 0xD0++0x3
line.long 0x0 "RAMTSTR3,This is safety related register. Do not set this register during DMAC operation."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved."
bitfld.long 0x0 15. "MEMINIT,DMAC Memory Initialize Bit" "0: Invalid,1: Initiate initialization"
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hexmask.long.word 0x0 0.--14. 1. "Reserved_0,Reserved."
group.long 0xDC++0x7
line.long 0x0 "DPCR3,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "IFBSYCNTENB,IFID operation count enable" "0,1"
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bitfld.long 0x0 0. "DBSYCNTENB,Data transmission operation count enable" "0,1"
line.long 0x4 "DPBSYCNTR3,"
hexmask.long 0x4 0.--31. 1. "DPBSYCNTR,This register count cycles during operation"
group.long 0xE8++0xF
line.long 0x0 "SYNCCR03,This register specifies the module corresponding to bits 0 to 3 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x0 24.--31. 1. "SYNCC3,This register specifies the module corresponding to bit 3 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x0 16.--23. 1. "SYNCC2,This register specifies the module corresponding to bit 2 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x0 8.--15. 1. "SYNCC1,This register specifies the module corresponding to bit 1 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x0 0.--7. 1. "SYNCC0,This register specifies the module corresponding to bit 0 in the SYNCC enable field of WUP and SLP instructions."
line.long 0x4 "SYNCCR13,This register specifies the module corresponding to bits 4 to 7 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x4 24.--31. 1. "SYNCC7,This register specifies the module corresponding to bit 7 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x4 16.--23. 1. "SYNCC6,This register specifies the module corresponding to bit 6 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x4 8.--15. 1. "SYNCC5,This register specifies the module corresponding to bit 5 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x4 0.--7. 1. "SYNCC4,This register specifies the module corresponding to bit 4 in the SYNCC enable field of WUP and SLP instructions."
line.long 0x8 "SYNCCR23,This register specifies the module corresponding to bits 8 to 11 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x8 24.--31. 1. "SYNCC11,This register specifies the module corresponding to bit 11 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x8 16.--23. 1. "SYNCC10,This register specifies the module corresponding to bit 10 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x8 8.--15. 1. "SYNCC9,This register specifies the module corresponding to bit 9 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x8 0.--7. 1. "SYNCC8,This register specifies the module corresponding to bit 8 in the SYNCC enable field of WUP and SLP instructions."
line.long 0xC "SYNCCR33,This register specifies the module corresponding to bits 12 to 15 of the SYNCC enable field of WUP and SLP instruction. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0xC 24.--31. 1. "SYNCC15,This register specifies the module corresponding to bit 15 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0xC 16.--23. 1. "SYNCC14,This register specifies the module corresponding to bit 14 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0xC 8.--15. 1. "SYNCC13,This register specifies the module corresponding to bit 13 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0xC 0.--7. 1. "SYNCC12,This register specifies the module corresponding to bit 12 in the SYNCC enable field of WUP and SLP instructions."
group.long 0x260++0x1F
line.long 0x0 "INDEX03,"
hexmask.long 0x0 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x4 "INDEX13,"
hexmask.long 0x4 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x8 "INDEX23,"
hexmask.long 0x8 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0xC "INDEX33,"
hexmask.long 0xC 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x10 "INDEX43,"
hexmask.long 0x10 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x14 "INDEX53,"
hexmask.long 0x14 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x18 "INDEX63,"
hexmask.long 0x18 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x1C "INDEX73,"
hexmask.long 0x1C 0.--31. 1. "INDEXn,Index0 register is read only."
group.long 0x344++0x3
line.long 0x0 "TCR13,This controls the issue cycle of Src0.1 read request."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "S1RM_CYCLE,Setting minimum interval to issue the read request of Src1"
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hexmask.long.byte 0x0 0.--7. 1. "S0RM_CYCLE,Setting minimum interval to issue the read request of Src0"
wgroup.long 0x350++0xB
line.long 0x0 "S0SAR_OFS3,This register is used to set the offset to be added to the start address of Source0."
hexmask.long 0x0 0.--31. 1. "S0SAR_OFS,Set the offset value to be added to the start address of Source0 in byte unit."
line.long 0x4 "S1SAR_OFS3,This register is used to set the offset to be added to the start address of Source1."
hexmask.long 0x4 0.--31. 1. "S1SAR_OFS,Set the offset value to be added to the start address of Source1 in byte unit."
line.long 0x8 "D0SAR_OFS3,This register is used to set the offset to be added to the start address of Destination0."
hexmask.long 0x8 0.--31. 1. "D0SAR_OFS,Set the offset value to be added to the start address of Destination0 in byte unit."
group.long 0x3F4++0x3
line.long 0x0 "CLBRKADDRR3,This is the register to control the CL break."
hexmask.long 0x0 0.--31. 1. "CLBRKADDRR,CL break address. Specify the address(break point) of command list."
group.long 0x3FC++0x3
line.long 0x0 "CLCNDGSBR3,This is the register to control the GOSUB command."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLCNDGSBR,Condition for conditional GOSUB instruction:" "0: GOSUB is not executed,1: GOSUB is executed"
tree.end
tree "IMP_DMAC_4"
base ad:0xFFA90000
rgroup.long 0x0++0x3
line.long 0x0 "VCR4,The value to be read varies depending on the product."
hexmask.long 0x0 0.--31. 1. "Version0,These bits indicate the version of this module."
group.long 0x4++0x3
line.long 0x0 "SCTLR04,This is the register to control the reset (software). and the start of DMA."
bitfld.long 0x0 31. "SWRST,Software reset" "0: Cancels a software reset for this module,1: Applies a software reset to this module"
hexmask.long 0x0 1.--30. 1. "Reserved_1,Reserved"
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bitfld.long 0x0 0. "DMAEN,DMA transmission start bit" "0: DMA transmission has not been performed,1: DMA transmission is in progress"
rgroup.long 0x8++0x3
line.long 0x0 "SR04,This register displays every status generated by IMP DMAC."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 10. "CLBRK,CL break status." "0: CL does not break,1: CL break"
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bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "WUPOVF,WUP counter overflow" "0: WUP overflow has not been occured,1: WUP overflow has been occured"
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bitfld.long 0x0 6. "INT,INT instruction decoding" "0: INT instruction has not been decoded,1: INT instruction has been decoded"
bitfld.long 0x0 5. "IER,Illegal instruction decoding or GOSUB overflow/underflow." "0: Illegal instruction has not been decoded,1: Illegal instruction has been decoded"
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bitfld.long 0x0 4. "TRA,TRAP instruction decoding" "0: TRAP instruction has not been decoded,1: TRAP instruction has been decoded"
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0. "TEND,Transmission completion" "0: Transmission has not been started or it is in..,1: Transmission has ended"
group.long 0xC++0xF
line.long 0x0 "SCR4,This register clears every status displayed in SR0. Write 1 to clear. writing 0 is disabled."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 10. "CLBRKC,CL break status clear." "0,1"
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rbitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "WUPOVFC,WUPOVF bit clearing" "0,1"
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bitfld.long 0x0 6. "INTC,INT bit clearing" "0,1"
bitfld.long 0x0 5. "IERC,IER bit clearing" "0,1"
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bitfld.long 0x0 4. "TRAC,TRA bit clearing" "0,1"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0. "TENDC,TEND bit clearing" "0,1"
line.long 0x4 "SER4,This register is used to set whether to reflect status in each bit of SR0 register."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
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hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
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bitfld.long 0x4 10. "CLBRKENB,CL break status/CL break enable." "0: CL break disable,1: CL break enable"
rbitfld.long 0x4 8.--9. "Reserved_8,Reserved" "0,1,2,3"
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bitfld.long 0x4 7. "WUPOVFE,WUPOVF bit set enable" "0: When WUP overflow is detected,1: When WUP overflow is detected"
bitfld.long 0x4 6. "INTE,INT bit set enable" "0: When the INT instruction is decoded,1: When the INT instruction is decoded"
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bitfld.long 0x4 5. "IERE,IER bit set enable" "0: When the illegal instruction is decoded,1: When the illegal instruction is decoded"
bitfld.long 0x4 4. "TRAE,TRA bit set enable" "0: When the TRAP instruction is decoded,1: When the TRAP instruction is decoded"
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rbitfld.long 0x4 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0. "TENDE,TEND bit set enable" "0: Even if DMA transmission ends,1: If DMA transmission ends"
line.long 0x8 "IMR4,This register is used to set whether to generate an interrupt or mask an interrupt according to occurrence of each status."
hexmask.long.word 0x8 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x8 16. "Reserved_16,The read value should always be 1." "0,1"
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hexmask.long.byte 0x8 12.--15. 1. "Reserved_12,Reserved"
rbitfld.long 0x8 11. "Reserved_11,Reserved" "0,1"
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bitfld.long 0x8 10. "CLBRKM,Mask setting of interrupt by CLBRK status" "0: The generation of CLBRK interrupt is not masked,1: The generation of CLBRK interrupt is masked"
rbitfld.long 0x8 8.--9. "Reserved_8,Reserved" "0,1,2,3"
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bitfld.long 0x8 7. "WUPOVFM,Mask setting of interrupt by WUPOVF status" "0: The generation of WUPOVF interrupt is not masked,1: The generation of WUPOVF interrupt is masked"
bitfld.long 0x8 6. "INTM,Mask setting of interrupt by INT status" "0: The generation of INT interrupt is not masked,1: The generation of INT interrupt is masked"
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bitfld.long 0x8 5. "IERM,Mask setting of interrupt by IER status" "0: The generation of IER interrupt is not masked,1: The generation of IER interrupt is masked"
bitfld.long 0x8 4. "TRAM,Mask setting of interrupt by TRA status" "0: The generation of TRA interrupt is not masked,1: The generation of TRA interrupt is masked"
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rbitfld.long 0x8 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0. "TENDM,Mask setting of interrupt by TEND status" "0: The generation of TEND interrupt is not masked,1: The generation of TEND interrupt is masked"
line.long 0xC "SCTLR14,This is the register to control the start of CL."
bitfld.long 0xC 31. "CLE,IMP DMACsingle_quotations CL starting bit" "0: CL is not in progress,1: CL is in progress"
hexmask.long 0xC 0.--30. 1. "Reserved_0,Reserved"
group.long 0x20++0x3
line.long 0x0 "TSCR4,[IMP DMAC]"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 20.--23. 1. "SRC1_TSIZE,These bits define the transmission size of Source1."
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hexmask.long.byte 0x0 16.--19. 1. "SRC0_TSIZE,These bits define the transmission size of Source0."
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
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hexmask.long.byte 0x0 0.--3. 1. "DST0_TSIZE,These bits define the transmission size of Destination0."
group.long 0x28++0x3
line.long 0x0 "CLSAR4,This register is used to set the first address when fetching CL."
hexmask.long 0x0 0.--31. 1. "CLSAR,First address of CL"
rgroup.long 0x30++0x3
line.long 0x0 "SR14,This register displays the code value when IMP DMAC executes INT and TRAP instructions."
hexmask.long.byte 0x0 24.--31. 1. "INTCODE,INT interrupt code"
hexmask.long.byte 0x0 16.--23. 1. "TRAPCODE,TRAP interrupt code"
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hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
group.long 0x38++0x3
line.long 0x0 "DSWPR4,This register is used to set the swap of data in Source0. Source1. Destination0."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 29. "S1SWP128BIT,Source1 128-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 28. "S1SWP64BIT,Source1 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 27. "S1SWP32BIT,Source1 32-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 26. "S1SWP16BIT,Source1 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 25. "S1SWP8BIT,Source1 8-bit swap setting" "0: It is not swapped,1: It is swapped"
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rbitfld.long 0x0 22.--24. "Reserved_22,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 21. "S0SWP128BIT,Source0 128-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 20. "S0SWP64BIT,Source0 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 19. "S0SWP32BIT,Source0 32-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 18. "S0SWP16BIT,Source0 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 17. "S0SWP8BIT,Source0 8-bit swap setting" "0: It is not swapped,1: It is swapped"
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hexmask.long.word 0x0 6.--16. 1. "Reserved_6,Reserved"
bitfld.long 0x0 5. "D0SWP128BIT,Destination0 128-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 4. "D0SWP64BIT,Destination0 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 3. "D0SWP32BIT,Destination0 32-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 2. "D0SWP16BIT,Destination0 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 1. "D0SWP8BIT,Destination0 8-bit swap setting" "0: It is not swapped,1: It is swapped"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x40++0x7
line.long 0x0 "S0SAR4,This register is used to set the start address of Source0 to read from external memory or internal memory."
hexmask.long 0x0 0.--31. 1. "S0SAR,Set the start address of Source0 in byte unit."
line.long 0x4 "S0STR4,This register is used to set the memory width of Source0 to read from external memory or internal memory."
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x4 0.--14. 1. "S0STR,These bits set the memory width of Source0 in byte unit. The setting range is 0~32767."
group.long 0x4C++0x7
line.long 0x0 "S0DATAR4,This is the data register of Source0."
hexmask.long 0x0 0.--31. 1. "S0DATAR,This is the data register of Source0."
line.long 0x4 "S0CR4,This register is used to control Source0."
bitfld.long 0x4 31. "S0REN,Source0 read enable" "0: Do not read data from external memory or..,1: Read data of Source0 from external memory or.."
hexmask.long.word 0x4 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x4 12.--15. 1. "S0TAMODE,Source0 tile addressing mode"
hexmask.long.byte 0x4 4.--11. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "S0PF,Source0 pixel format"
group.long 0x7C++0xB
line.long 0x0 "TCR04,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
bitfld.long 0x0 27. "WRM_EN,Enabling minimum interval control of write request issuance" "0,1"
newline
hexmask.long.word 0x0 16.--26. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "WRM_CYCLE,Setting minimum interval of write request issuance"
line.long 0x4 "D0SAR4,This register is used to set the start address of Destination0 to write to external memory or internal memory."
hexmask.long 0x4 0.--31. 1. "D0SAR,Set the start address of Destination0 in byte unit."
line.long 0x8 "D0STR4,This register is used to set the memory width of Destination0 to write to external memory or internal memory."
hexmask.long.tbyte 0x8 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x8 0.--14. 1. "D0STR,Memory width of Destination0 is set in byte unit. The setting range is 1~32767."
group.long 0x90++0x7
line.long 0x0 "D0CR4,This register is used to control Destination0."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 12.--15. 1. "D0TAMODE,Destination0 tile addressing mode"
newline
hexmask.long.byte 0x0 4.--11. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "D0PF,Destination0 pixel format"
line.long 0x4 "IMGSIZER4,This register is used to set the processing size (width and height) of Source and Destination. It is set in pixel unit."
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "IWIDTH,These bits specify the width of the processed image."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "IHEIGHT,These bits specify the height of the processed image."
group.long 0xA0++0x3
line.long 0x0 "FCR04,This register is used to control functions of IMP DMAC"
bitfld.long 0x0 31. "BITCNTEN,Bit count enable setting" "0: Do not operate bit count,1: Operate bit count"
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "LOP,Logical operation setting"
group.long 0xAC++0x3
line.long 0x0 "FCR14,[IMP DMAC]"
bitfld.long 0x0 31. "PXALIGN,Pixel alignment mode enable" "0: 64-byte or 128-byte alignment mode,1: Pixel alignment mode"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x0 13.--27. 1. "Reserved_13,Reserved"
hexmask.long.byte 0x0 8.--12. 1. "SHIFT,Setting of shift amount after LOP"
newline
hexmask.long.byte 0x0 4.--7. 1. "RNDMD,Setting rounding mode after shift"
bitfld.long 0x0 3. "SATEN,Saturation process enable" "0: Do not process saturation,1: Process saturation"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
bitfld.long 0x0 0.--1. "SATW,Saturation bit width selection" "?,1: Saturate to 10 bits,2: Saturate to 12 bits,3: Saturate to 14 bits"
rgroup.long 0xC8++0x7
line.long 0x0 "CLFAR4,This register is used to display the address of CL fetch destination."
hexmask.long 0x0 2.--31. 1. "CLFAR,These bits display bit31~bit2 of the address of CL fetch destination (during execution)."
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "CLEIR4,This register is used to display the instruction during CL execution."
hexmask.long 0x4 0.--31. 1. "CLEIR,These bits display the instruction during CL execution."
group.long 0xD0++0x3
line.long 0x0 "RAMTSTR4,This is safety related register. Do not set this register during DMAC operation."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved."
bitfld.long 0x0 15. "MEMINIT,DMAC Memory Initialize Bit" "0: Invalid,1: Initiate initialization"
newline
hexmask.long.word 0x0 0.--14. 1. "Reserved_0,Reserved."
group.long 0xDC++0x7
line.long 0x0 "DPCR4,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "IFBSYCNTENB,IFID operation count enable" "0,1"
newline
bitfld.long 0x0 0. "DBSYCNTENB,Data transmission operation count enable" "0,1"
line.long 0x4 "DPBSYCNTR4,"
hexmask.long 0x4 0.--31. 1. "DPBSYCNTR,This register count cycles during operation"
group.long 0xE8++0xF
line.long 0x0 "SYNCCR04,This register specifies the module corresponding to bits 0 to 3 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x0 24.--31. 1. "SYNCC3,This register specifies the module corresponding to bit 3 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x0 16.--23. 1. "SYNCC2,This register specifies the module corresponding to bit 2 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x0 8.--15. 1. "SYNCC1,This register specifies the module corresponding to bit 1 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x0 0.--7. 1. "SYNCC0,This register specifies the module corresponding to bit 0 in the SYNCC enable field of WUP and SLP instructions."
line.long 0x4 "SYNCCR14,This register specifies the module corresponding to bits 4 to 7 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x4 24.--31. 1. "SYNCC7,This register specifies the module corresponding to bit 7 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x4 16.--23. 1. "SYNCC6,This register specifies the module corresponding to bit 6 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x4 8.--15. 1. "SYNCC5,This register specifies the module corresponding to bit 5 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x4 0.--7. 1. "SYNCC4,This register specifies the module corresponding to bit 4 in the SYNCC enable field of WUP and SLP instructions."
line.long 0x8 "SYNCCR24,This register specifies the module corresponding to bits 8 to 11 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x8 24.--31. 1. "SYNCC11,This register specifies the module corresponding to bit 11 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x8 16.--23. 1. "SYNCC10,This register specifies the module corresponding to bit 10 in the SYNCC enable field of WUP and SLP instructions."
newline
hexmask.long.byte 0x8 8.--15. 1. "SYNCC9,This register specifies the module corresponding to bit 9 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x8 0.--7. 1. "SYNCC8,This register specifies the module corresponding to bit 8 in the SYNCC enable field of WUP and SLP instructions."
line.long 0xC "SYNCCR34,This register specifies the module corresponding to bits 12 to 15 of the SYNCC enable field of WUP and SLP instruction. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0xC 24.--31. 1. "SYNCC15,This register specifies the module corresponding to bit 15 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0xC 16.--23. 1. "SYNCC14,This register specifies the module corresponding to bit 14 in the SYNCC enable field of WUP and SLP instructions."
newline
hexmask.long.byte 0xC 8.--15. 1. "SYNCC13,This register specifies the module corresponding to bit 13 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0xC 0.--7. 1. "SYNCC12,This register specifies the module corresponding to bit 12 in the SYNCC enable field of WUP and SLP instructions."
group.long 0x260++0x1F
line.long 0x0 "INDEX04,"
hexmask.long 0x0 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x4 "INDEX14,"
hexmask.long 0x4 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x8 "INDEX24,"
hexmask.long 0x8 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0xC "INDEX34,"
hexmask.long 0xC 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x10 "INDEX44,"
hexmask.long 0x10 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x14 "INDEX54,"
hexmask.long 0x14 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x18 "INDEX64,"
hexmask.long 0x18 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x1C "INDEX74,"
hexmask.long 0x1C 0.--31. 1. "INDEXn,Index0 register is read only."
group.long 0x298++0x13
line.long 0x0 "WRAPER4,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "DST_WRAP_ENB,Dst address wraparound enable" "0: Not wraparound Dst address,1: Wraparound Dst address"
newline
bitfld.long 0x0 0. "SRC_WRAP_ENB,Src address wraparound enable" "0: Not wraparound Src address,1: Wraparound Src address"
line.long 0x4 "WRAPS_MIN4,"
hexmask.long 0x4 0.--31. 1. "WRAP_MIN_SRC,Minimum address of Src wraparound."
line.long 0x8 "WRAPS_MAX4,"
hexmask.long 0x8 0.--31. 1. "WRAP_MAX_SRC,Maximum address of Src wraparound."
line.long 0xC "WRAPD_MIN4,"
hexmask.long 0xC 0.--31. 1. "WRAP_MIN_DST,Minimum address of Dst wraparound."
line.long 0x10 "WRAPD_MAX4,"
hexmask.long 0x10 0.--31. 1. "WRAP_MAX_DST,Maximum address of Dst wraparound."
group.long 0x344++0x3
line.long 0x0 "TCR14,This controls the issue cycle of Src0.1 read request."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "S1RM_CYCLE,Setting minimum interval to issue the read request of Src1"
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hexmask.long.byte 0x0 0.--7. 1. "S0RM_CYCLE,Setting minimum interval to issue the read request of Src0"
wgroup.long 0x350++0xB
line.long 0x0 "S0SAR_OFS4,This register is used to set the offset to be added to the start address of Source0."
hexmask.long 0x0 0.--31. 1. "S0SAR_OFS,Set the offset value to be added to the start address of Source0 in byte unit."
line.long 0x4 "S1SAR_OFS4,This register is used to set the offset to be added to the start address of Source1."
hexmask.long 0x4 0.--31. 1. "S1SAR_OFS,Set the offset value to be added to the start address of Source1 in byte unit."
line.long 0x8 "D0SAR_OFS4,This register is used to set the offset to be added to the start address of Destination0."
hexmask.long 0x8 0.--31. 1. "D0SAR_OFS,Set the offset value to be added to the start address of Destination0 in byte unit."
group.long 0x3F4++0x3
line.long 0x0 "CLBRKADDRR4,This is the register to control the CL break."
hexmask.long 0x0 0.--31. 1. "CLBRKADDRR,CL break address. Specify the address(break point) of command list."
group.long 0x3FC++0x3
line.long 0x0 "CLCNDGSBR4,This is the register to control the GOSUB command."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLCNDGSBR,Condition for conditional GOSUB instruction:" "0: GOSUB is not executed,1: GOSUB is executed"
tree.end
tree "IMP_DMAC_5"
base ad:0xFFA91000
rgroup.long 0x0++0x3
line.long 0x0 "VCR5,The value to be read varies depending on the product."
hexmask.long 0x0 0.--31. 1. "Version0,These bits indicate the version of this module."
group.long 0x4++0x3
line.long 0x0 "SCTLR05,This is the register to control the reset (software). and the start of DMA."
bitfld.long 0x0 31. "SWRST,Software reset" "0: Cancels a software reset for this module,1: Applies a software reset to this module"
hexmask.long 0x0 1.--30. 1. "Reserved_1,Reserved"
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bitfld.long 0x0 0. "DMAEN,DMA transmission start bit" "0: DMA transmission has not been performed,1: DMA transmission is in progress"
rgroup.long 0x8++0x3
line.long 0x0 "SR05,This register displays every status generated by IMP DMAC."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 10. "CLBRK,CL break status." "0: CL does not break,1: CL break"
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bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "WUPOVF,WUP counter overflow" "0: WUP overflow has not been occured,1: WUP overflow has been occured"
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bitfld.long 0x0 6. "INT,INT instruction decoding" "0: INT instruction has not been decoded,1: INT instruction has been decoded"
bitfld.long 0x0 5. "IER,Illegal instruction decoding or GOSUB overflow/underflow." "0: Illegal instruction has not been decoded,1: Illegal instruction has been decoded"
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bitfld.long 0x0 4. "TRA,TRAP instruction decoding" "0: TRAP instruction has not been decoded,1: TRAP instruction has been decoded"
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0. "TEND,Transmission completion" "0: Transmission has not been started or it is in..,1: Transmission has ended"
group.long 0xC++0xF
line.long 0x0 "SCR5,This register clears every status displayed in SR0. Write 1 to clear. writing 0 is disabled."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 10. "CLBRKC,CL break status clear." "0,1"
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rbitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "WUPOVFC,WUPOVF bit clearing" "0,1"
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bitfld.long 0x0 6. "INTC,INT bit clearing" "0,1"
bitfld.long 0x0 5. "IERC,IER bit clearing" "0,1"
newline
bitfld.long 0x0 4. "TRAC,TRA bit clearing" "0,1"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "TENDC,TEND bit clearing" "0,1"
line.long 0x4 "SER5,This register is used to set whether to reflect status in each bit of SR0 register."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
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hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
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bitfld.long 0x4 10. "CLBRKENB,CL break status/CL break enable." "0: CL break disable,1: CL break enable"
rbitfld.long 0x4 8.--9. "Reserved_8,Reserved" "0,1,2,3"
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bitfld.long 0x4 7. "WUPOVFE,WUPOVF bit set enable" "0: When WUP overflow is detected,1: When WUP overflow is detected"
bitfld.long 0x4 6. "INTE,INT bit set enable" "0: When the INT instruction is decoded,1: When the INT instruction is decoded"
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bitfld.long 0x4 5. "IERE,IER bit set enable" "0: When the illegal instruction is decoded,1: When the illegal instruction is decoded"
bitfld.long 0x4 4. "TRAE,TRA bit set enable" "0: When the TRAP instruction is decoded,1: When the TRAP instruction is decoded"
newline
rbitfld.long 0x4 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0. "TENDE,TEND bit set enable" "0: Even if DMA transmission ends,1: If DMA transmission ends"
line.long 0x8 "IMR5,This register is used to set whether to generate an interrupt or mask an interrupt according to occurrence of each status."
hexmask.long.word 0x8 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x8 16. "Reserved_16,The read value should always be 1." "0,1"
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hexmask.long.byte 0x8 12.--15. 1. "Reserved_12,Reserved"
rbitfld.long 0x8 11. "Reserved_11,Reserved" "0,1"
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bitfld.long 0x8 10. "CLBRKM,Mask setting of interrupt by CLBRK status" "0: The generation of CLBRK interrupt is not masked,1: The generation of CLBRK interrupt is masked"
rbitfld.long 0x8 8.--9. "Reserved_8,Reserved" "0,1,2,3"
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bitfld.long 0x8 7. "WUPOVFM,Mask setting of interrupt by WUPOVF status" "0: The generation of WUPOVF interrupt is not masked,1: The generation of WUPOVF interrupt is masked"
bitfld.long 0x8 6. "INTM,Mask setting of interrupt by INT status" "0: The generation of INT interrupt is not masked,1: The generation of INT interrupt is masked"
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bitfld.long 0x8 5. "IERM,Mask setting of interrupt by IER status" "0: The generation of IER interrupt is not masked,1: The generation of IER interrupt is masked"
bitfld.long 0x8 4. "TRAM,Mask setting of interrupt by TRA status" "0: The generation of TRA interrupt is not masked,1: The generation of TRA interrupt is masked"
newline
rbitfld.long 0x8 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0. "TENDM,Mask setting of interrupt by TEND status" "0: The generation of TEND interrupt is not masked,1: The generation of TEND interrupt is masked"
line.long 0xC "SCTLR15,This is the register to control the start of CL."
bitfld.long 0xC 31. "CLE,IMP DMACsingle_quotations CL starting bit" "0: CL is not in progress,1: CL is in progress"
hexmask.long 0xC 0.--30. 1. "Reserved_0,Reserved"
group.long 0x20++0x3
line.long 0x0 "TSCR5,[IMP DMAC]"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 20.--23. 1. "SRC1_TSIZE,These bits define the transmission size of Source1."
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hexmask.long.byte 0x0 16.--19. 1. "SRC0_TSIZE,These bits define the transmission size of Source0."
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "DST0_TSIZE,These bits define the transmission size of Destination0."
group.long 0x28++0x3
line.long 0x0 "CLSAR5,This register is used to set the first address when fetching CL."
hexmask.long 0x0 0.--31. 1. "CLSAR,First address of CL"
rgroup.long 0x30++0x3
line.long 0x0 "SR15,This register displays the code value when IMP DMAC executes INT and TRAP instructions."
hexmask.long.byte 0x0 24.--31. 1. "INTCODE,INT interrupt code"
hexmask.long.byte 0x0 16.--23. 1. "TRAPCODE,TRAP interrupt code"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
group.long 0x38++0x3
line.long 0x0 "DSWPR5,This register is used to set the swap of data in Source0. Source1. Destination0."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 29. "S1SWP128BIT,Source1 128-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 28. "S1SWP64BIT,Source1 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 27. "S1SWP32BIT,Source1 32-bit swap setting" "0: It is not swapped,1: It is swapped"
newline
bitfld.long 0x0 26. "S1SWP16BIT,Source1 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 25. "S1SWP8BIT,Source1 8-bit swap setting" "0: It is not swapped,1: It is swapped"
newline
rbitfld.long 0x0 22.--24. "Reserved_22,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 21. "S0SWP128BIT,Source0 128-bit swap setting" "0: It is not swapped,1: It is swapped"
newline
bitfld.long 0x0 20. "S0SWP64BIT,Source0 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 19. "S0SWP32BIT,Source0 32-bit swap setting" "0: It is not swapped,1: It is swapped"
newline
bitfld.long 0x0 18. "S0SWP16BIT,Source0 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 17. "S0SWP8BIT,Source0 8-bit swap setting" "0: It is not swapped,1: It is swapped"
newline
hexmask.long.word 0x0 6.--16. 1. "Reserved_6,Reserved"
bitfld.long 0x0 5. "D0SWP128BIT,Destination0 128-bit swap setting" "0: It is not swapped,1: It is swapped"
newline
bitfld.long 0x0 4. "D0SWP64BIT,Destination0 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 3. "D0SWP32BIT,Destination0 32-bit swap setting" "0: It is not swapped,1: It is swapped"
newline
bitfld.long 0x0 2. "D0SWP16BIT,Destination0 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 1. "D0SWP8BIT,Destination0 8-bit swap setting" "0: It is not swapped,1: It is swapped"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x40++0x7
line.long 0x0 "S0SAR5,This register is used to set the start address of Source0 to read from external memory or internal memory."
hexmask.long 0x0 0.--31. 1. "S0SAR,Set the start address of Source0 in byte unit."
line.long 0x4 "S0STR5,This register is used to set the memory width of Source0 to read from external memory or internal memory."
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x4 0.--14. 1. "S0STR,These bits set the memory width of Source0 in byte unit. The setting range is 0~32767."
group.long 0x4C++0x7
line.long 0x0 "S0DATAR5,This is the data register of Source0."
hexmask.long 0x0 0.--31. 1. "S0DATAR,This is the data register of Source0."
line.long 0x4 "S0CR5,This register is used to control Source0."
bitfld.long 0x4 31. "S0REN,Source0 read enable" "0: Do not read data from external memory or..,1: Read data of Source0 from external memory or.."
hexmask.long.word 0x4 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x4 12.--15. 1. "S0TAMODE,Source0 tile addressing mode"
hexmask.long.byte 0x4 4.--11. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "S0PF,Source0 pixel format"
group.long 0x7C++0xB
line.long 0x0 "TCR05,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
bitfld.long 0x0 27. "WRM_EN,Enabling minimum interval control of write request issuance" "0,1"
newline
hexmask.long.word 0x0 16.--26. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "WRM_CYCLE,Setting minimum interval of write request issuance"
line.long 0x4 "D0SAR5,This register is used to set the start address of Destination0 to write to external memory or internal memory."
hexmask.long 0x4 0.--31. 1. "D0SAR,Set the start address of Destination0 in byte unit."
line.long 0x8 "D0STR5,This register is used to set the memory width of Destination0 to write to external memory or internal memory."
hexmask.long.tbyte 0x8 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x8 0.--14. 1. "D0STR,Memory width of Destination0 is set in byte unit. The setting range is 1~32767."
group.long 0x90++0x7
line.long 0x0 "D0CR5,This register is used to control Destination0."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 12.--15. 1. "D0TAMODE,Destination0 tile addressing mode"
newline
hexmask.long.byte 0x0 4.--11. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "D0PF,Destination0 pixel format"
line.long 0x4 "IMGSIZER5,This register is used to set the processing size (width and height) of Source and Destination. It is set in pixel unit."
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "IWIDTH,These bits specify the width of the processed image."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "IHEIGHT,These bits specify the height of the processed image."
group.long 0xA0++0x3
line.long 0x0 "FCR05,This register is used to control functions of IMP DMAC"
bitfld.long 0x0 31. "BITCNTEN,Bit count enable setting" "0: Do not operate bit count,1: Operate bit count"
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "LOP,Logical operation setting"
group.long 0xAC++0x3
line.long 0x0 "FCR15,[IMP DMAC]"
bitfld.long 0x0 31. "PXALIGN,Pixel alignment mode enable" "0: 64-byte or 128-byte alignment mode,1: Pixel alignment mode"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x0 13.--27. 1. "Reserved_13,Reserved"
hexmask.long.byte 0x0 8.--12. 1. "SHIFT,Setting of shift amount after LOP"
newline
hexmask.long.byte 0x0 4.--7. 1. "RNDMD,Setting rounding mode after shift"
bitfld.long 0x0 3. "SATEN,Saturation process enable" "0: Do not process saturation,1: Process saturation"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
bitfld.long 0x0 0.--1. "SATW,Saturation bit width selection" "?,1: Saturate to 10 bits,2: Saturate to 12 bits,3: Saturate to 14 bits"
rgroup.long 0xC8++0x7
line.long 0x0 "CLFAR5,This register is used to display the address of CL fetch destination."
hexmask.long 0x0 2.--31. 1. "CLFAR,These bits display bit31~bit2 of the address of CL fetch destination (during execution)."
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "CLEIR5,This register is used to display the instruction during CL execution."
hexmask.long 0x4 0.--31. 1. "CLEIR,These bits display the instruction during CL execution."
group.long 0xD0++0x3
line.long 0x0 "RAMTSTR5,This is safety related register. Do not set this register during DMAC operation."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved."
bitfld.long 0x0 15. "MEMINIT,DMAC Memory Initialize Bit" "0: Invalid,1: Initiate initialization"
newline
hexmask.long.word 0x0 0.--14. 1. "Reserved_0,Reserved."
group.long 0xDC++0x7
line.long 0x0 "DPCR5,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "IFBSYCNTENB,IFID operation count enable" "0,1"
newline
bitfld.long 0x0 0. "DBSYCNTENB,Data transmission operation count enable" "0,1"
line.long 0x4 "DPBSYCNTR5,"
hexmask.long 0x4 0.--31. 1. "DPBSYCNTR,This register count cycles during operation"
group.long 0xE8++0xF
line.long 0x0 "SYNCCR05,This register specifies the module corresponding to bits 0 to 3 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x0 24.--31. 1. "SYNCC3,This register specifies the module corresponding to bit 3 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x0 16.--23. 1. "SYNCC2,This register specifies the module corresponding to bit 2 in the SYNCC enable field of WUP and SLP instructions."
newline
hexmask.long.byte 0x0 8.--15. 1. "SYNCC1,This register specifies the module corresponding to bit 1 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x0 0.--7. 1. "SYNCC0,This register specifies the module corresponding to bit 0 in the SYNCC enable field of WUP and SLP instructions."
line.long 0x4 "SYNCCR15,This register specifies the module corresponding to bits 4 to 7 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x4 24.--31. 1. "SYNCC7,This register specifies the module corresponding to bit 7 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x4 16.--23. 1. "SYNCC6,This register specifies the module corresponding to bit 6 in the SYNCC enable field of WUP and SLP instructions."
newline
hexmask.long.byte 0x4 8.--15. 1. "SYNCC5,This register specifies the module corresponding to bit 5 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x4 0.--7. 1. "SYNCC4,This register specifies the module corresponding to bit 4 in the SYNCC enable field of WUP and SLP instructions."
line.long 0x8 "SYNCCR25,This register specifies the module corresponding to bits 8 to 11 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x8 24.--31. 1. "SYNCC11,This register specifies the module corresponding to bit 11 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x8 16.--23. 1. "SYNCC10,This register specifies the module corresponding to bit 10 in the SYNCC enable field of WUP and SLP instructions."
newline
hexmask.long.byte 0x8 8.--15. 1. "SYNCC9,This register specifies the module corresponding to bit 9 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x8 0.--7. 1. "SYNCC8,This register specifies the module corresponding to bit 8 in the SYNCC enable field of WUP and SLP instructions."
line.long 0xC "SYNCCR35,This register specifies the module corresponding to bits 12 to 15 of the SYNCC enable field of WUP and SLP instruction. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0xC 24.--31. 1. "SYNCC15,This register specifies the module corresponding to bit 15 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0xC 16.--23. 1. "SYNCC14,This register specifies the module corresponding to bit 14 in the SYNCC enable field of WUP and SLP instructions."
newline
hexmask.long.byte 0xC 8.--15. 1. "SYNCC13,This register specifies the module corresponding to bit 13 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0xC 0.--7. 1. "SYNCC12,This register specifies the module corresponding to bit 12 in the SYNCC enable field of WUP and SLP instructions."
group.long 0x260++0x1F
line.long 0x0 "INDEX05,"
hexmask.long 0x0 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x4 "INDEX15,"
hexmask.long 0x4 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x8 "INDEX25,"
hexmask.long 0x8 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0xC "INDEX35,"
hexmask.long 0xC 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x10 "INDEX45,"
hexmask.long 0x10 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x14 "INDEX55,"
hexmask.long 0x14 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x18 "INDEX65,"
hexmask.long 0x18 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x1C "INDEX75,"
hexmask.long 0x1C 0.--31. 1. "INDEXn,Index0 register is read only."
group.long 0x298++0x13
line.long 0x0 "WRAPER5,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "DST_WRAP_ENB,Dst address wraparound enable" "0: Not wraparound Dst address,1: Wraparound Dst address"
newline
bitfld.long 0x0 0. "SRC_WRAP_ENB,Src address wraparound enable" "0: Not wraparound Src address,1: Wraparound Src address"
line.long 0x4 "WRAPS_MIN5,"
hexmask.long 0x4 0.--31. 1. "WRAP_MIN_SRC,Minimum address of Src wraparound."
line.long 0x8 "WRAPS_MAX5,"
hexmask.long 0x8 0.--31. 1. "WRAP_MAX_SRC,Maximum address of Src wraparound."
line.long 0xC "WRAPD_MIN5,"
hexmask.long 0xC 0.--31. 1. "WRAP_MIN_DST,Minimum address of Dst wraparound."
line.long 0x10 "WRAPD_MAX5,"
hexmask.long 0x10 0.--31. 1. "WRAP_MAX_DST,Maximum address of Dst wraparound."
group.long 0x344++0x3
line.long 0x0 "TCR15,This controls the issue cycle of Src0.1 read request."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "S1RM_CYCLE,Setting minimum interval to issue the read request of Src1"
newline
hexmask.long.byte 0x0 0.--7. 1. "S0RM_CYCLE,Setting minimum interval to issue the read request of Src0"
wgroup.long 0x350++0xB
line.long 0x0 "S0SAR_OFS5,This register is used to set the offset to be added to the start address of Source0."
hexmask.long 0x0 0.--31. 1. "S0SAR_OFS,Set the offset value to be added to the start address of Source0 in byte unit."
line.long 0x4 "S1SAR_OFS5,This register is used to set the offset to be added to the start address of Source1."
hexmask.long 0x4 0.--31. 1. "S1SAR_OFS,Set the offset value to be added to the start address of Source1 in byte unit."
line.long 0x8 "D0SAR_OFS5,This register is used to set the offset to be added to the start address of Destination0."
hexmask.long 0x8 0.--31. 1. "D0SAR_OFS,Set the offset value to be added to the start address of Destination0 in byte unit."
group.long 0x3F4++0x3
line.long 0x0 "CLBRKADDRR5,This is the register to control the CL break."
hexmask.long 0x0 0.--31. 1. "CLBRKADDRR,CL break address. Specify the address(break point) of command list."
group.long 0x3FC++0x3
line.long 0x0 "CLCNDGSBR5,This is the register to control the GOSUB command."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLCNDGSBR,Condition for conditional GOSUB instruction:" "0: GOSUB is not executed,1: GOSUB is executed"
tree.end
tree "IMP_DMAC_6"
base ad:0xFFA94000
rgroup.long 0x0++0x3
line.long 0x0 "VCR6,The value to be read varies depending on the product."
hexmask.long 0x0 0.--31. 1. "Version0,These bits indicate the version of this module."
group.long 0x4++0x3
line.long 0x0 "SCTLR06,This is the register to control the reset (software). and the start of DMA."
bitfld.long 0x0 31. "SWRST,Software reset" "0: Cancels a software reset for this module,1: Applies a software reset to this module"
hexmask.long 0x0 1.--30. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "DMAEN,DMA transmission start bit" "0: DMA transmission has not been performed,1: DMA transmission is in progress"
rgroup.long 0x8++0x3
line.long 0x0 "SR06,This register displays every status generated by IMP DMAC."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 10. "CLBRK,CL break status." "0: CL does not break,1: CL break"
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bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "WUPOVF,WUP counter overflow" "0: WUP overflow has not been occured,1: WUP overflow has been occured"
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bitfld.long 0x0 6. "INT,INT instruction decoding" "0: INT instruction has not been decoded,1: INT instruction has been decoded"
bitfld.long 0x0 5. "IER,Illegal instruction decoding or GOSUB overflow/underflow." "0: Illegal instruction has not been decoded,1: Illegal instruction has been decoded"
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bitfld.long 0x0 4. "TRA,TRAP instruction decoding" "0: TRAP instruction has not been decoded,1: TRAP instruction has been decoded"
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0. "TEND,Transmission completion" "0: Transmission has not been started or it is in..,1: Transmission has ended"
group.long 0xC++0xF
line.long 0x0 "SCR6,This register clears every status displayed in SR0. Write 1 to clear. writing 0 is disabled."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 10. "CLBRKC,CL break status clear." "0,1"
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rbitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "WUPOVFC,WUPOVF bit clearing" "0,1"
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bitfld.long 0x0 6. "INTC,INT bit clearing" "0,1"
bitfld.long 0x0 5. "IERC,IER bit clearing" "0,1"
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bitfld.long 0x0 4. "TRAC,TRA bit clearing" "0,1"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0. "TENDC,TEND bit clearing" "0,1"
line.long 0x4 "SER6,This register is used to set whether to reflect status in each bit of SR0 register."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
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hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
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bitfld.long 0x4 10. "CLBRKENB,CL break status/CL break enable." "0: CL break disable,1: CL break enable"
rbitfld.long 0x4 8.--9. "Reserved_8,Reserved" "0,1,2,3"
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bitfld.long 0x4 7. "WUPOVFE,WUPOVF bit set enable" "0: When WUP overflow is detected,1: When WUP overflow is detected"
bitfld.long 0x4 6. "INTE,INT bit set enable" "0: When the INT instruction is decoded,1: When the INT instruction is decoded"
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bitfld.long 0x4 5. "IERE,IER bit set enable" "0: When the illegal instruction is decoded,1: When the illegal instruction is decoded"
bitfld.long 0x4 4. "TRAE,TRA bit set enable" "0: When the TRAP instruction is decoded,1: When the TRAP instruction is decoded"
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rbitfld.long 0x4 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0. "TENDE,TEND bit set enable" "0: Even if DMA transmission ends,1: If DMA transmission ends"
line.long 0x8 "IMR6,This register is used to set whether to generate an interrupt or mask an interrupt according to occurrence of each status."
hexmask.long.word 0x8 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x8 16. "Reserved_16,The read value should always be 1." "0,1"
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hexmask.long.byte 0x8 12.--15. 1. "Reserved_12,Reserved"
rbitfld.long 0x8 11. "Reserved_11,Reserved" "0,1"
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bitfld.long 0x8 10. "CLBRKM,Mask setting of interrupt by CLBRK status" "0: The generation of CLBRK interrupt is not masked,1: The generation of CLBRK interrupt is masked"
rbitfld.long 0x8 8.--9. "Reserved_8,Reserved" "0,1,2,3"
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bitfld.long 0x8 7. "WUPOVFM,Mask setting of interrupt by WUPOVF status" "0: The generation of WUPOVF interrupt is not masked,1: The generation of WUPOVF interrupt is masked"
bitfld.long 0x8 6. "INTM,Mask setting of interrupt by INT status" "0: The generation of INT interrupt is not masked,1: The generation of INT interrupt is masked"
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bitfld.long 0x8 5. "IERM,Mask setting of interrupt by IER status" "0: The generation of IER interrupt is not masked,1: The generation of IER interrupt is masked"
bitfld.long 0x8 4. "TRAM,Mask setting of interrupt by TRA status" "0: The generation of TRA interrupt is not masked,1: The generation of TRA interrupt is masked"
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rbitfld.long 0x8 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0. "TENDM,Mask setting of interrupt by TEND status" "0: The generation of TEND interrupt is not masked,1: The generation of TEND interrupt is masked"
line.long 0xC "SCTLR16,This is the register to control the start of CL."
bitfld.long 0xC 31. "CLE,IMP DMACsingle_quotations CL starting bit" "0: CL is not in progress,1: CL is in progress"
hexmask.long 0xC 0.--30. 1. "Reserved_0,Reserved"
group.long 0x20++0x3
line.long 0x0 "TSCR6,[IMP DMAC]"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 20.--23. 1. "SRC1_TSIZE,These bits define the transmission size of Source1."
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hexmask.long.byte 0x0 16.--19. 1. "SRC0_TSIZE,These bits define the transmission size of Source0."
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
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hexmask.long.byte 0x0 0.--3. 1. "DST0_TSIZE,These bits define the transmission size of Destination0."
group.long 0x28++0x3
line.long 0x0 "CLSAR6,This register is used to set the first address when fetching CL."
hexmask.long 0x0 0.--31. 1. "CLSAR,First address of CL"
rgroup.long 0x30++0x3
line.long 0x0 "SR16,This register displays the code value when IMP DMAC executes INT and TRAP instructions."
hexmask.long.byte 0x0 24.--31. 1. "INTCODE,INT interrupt code"
hexmask.long.byte 0x0 16.--23. 1. "TRAPCODE,TRAP interrupt code"
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hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
group.long 0x38++0x3
line.long 0x0 "DSWPR6,This register is used to set the swap of data in Source0. Source1. Destination0."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 29. "S1SWP128BIT,Source1 128-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 28. "S1SWP64BIT,Source1 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 27. "S1SWP32BIT,Source1 32-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 26. "S1SWP16BIT,Source1 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 25. "S1SWP8BIT,Source1 8-bit swap setting" "0: It is not swapped,1: It is swapped"
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rbitfld.long 0x0 22.--24. "Reserved_22,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 21. "S0SWP128BIT,Source0 128-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 20. "S0SWP64BIT,Source0 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 19. "S0SWP32BIT,Source0 32-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 18. "S0SWP16BIT,Source0 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 17. "S0SWP8BIT,Source0 8-bit swap setting" "0: It is not swapped,1: It is swapped"
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hexmask.long.word 0x0 6.--16. 1. "Reserved_6,Reserved"
bitfld.long 0x0 5. "D0SWP128BIT,Destination0 128-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 4. "D0SWP64BIT,Destination0 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 3. "D0SWP32BIT,Destination0 32-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 2. "D0SWP16BIT,Destination0 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 1. "D0SWP8BIT,Destination0 8-bit swap setting" "0: It is not swapped,1: It is swapped"
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rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x40++0x7
line.long 0x0 "S0SAR6,This register is used to set the start address of Source0 to read from external memory or internal memory."
hexmask.long 0x0 0.--31. 1. "S0SAR,Set the start address of Source0 in byte unit."
line.long 0x4 "S0STR6,This register is used to set the memory width of Source0 to read from external memory or internal memory."
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x4 0.--14. 1. "S0STR,These bits set the memory width of Source0 in byte unit. The setting range is 0~32767."
group.long 0x4C++0x7
line.long 0x0 "S0DATAR6,This is the data register of Source0."
hexmask.long 0x0 0.--31. 1. "S0DATAR,This is the data register of Source0."
line.long 0x4 "S0CR6,This register is used to control Source0."
bitfld.long 0x4 31. "S0REN,Source0 read enable" "0: Do not read data from external memory or..,1: Read data of Source0 from external memory or.."
hexmask.long.word 0x4 16.--30. 1. "Reserved_16,Reserved"
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hexmask.long.byte 0x4 12.--15. 1. "S0TAMODE,Source0 tile addressing mode"
hexmask.long.byte 0x4 4.--11. 1. "Reserved_4,Reserved"
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hexmask.long.byte 0x4 0.--3. 1. "S0PF,Source0 pixel format"
group.long 0x7C++0xB
line.long 0x0 "TCR06,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
bitfld.long 0x0 27. "WRM_EN,Enabling minimum interval control of write request issuance" "0,1"
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hexmask.long.word 0x0 16.--26. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "WRM_CYCLE,Setting minimum interval of write request issuance"
line.long 0x4 "D0SAR6,This register is used to set the start address of Destination0 to write to external memory or internal memory."
hexmask.long 0x4 0.--31. 1. "D0SAR,Set the start address of Destination0 in byte unit."
line.long 0x8 "D0STR6,This register is used to set the memory width of Destination0 to write to external memory or internal memory."
hexmask.long.tbyte 0x8 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x8 0.--14. 1. "D0STR,Memory width of Destination0 is set in byte unit. The setting range is 1~32767."
group.long 0x90++0x7
line.long 0x0 "D0CR6,This register is used to control Destination0."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 12.--15. 1. "D0TAMODE,Destination0 tile addressing mode"
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hexmask.long.byte 0x0 4.--11. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "D0PF,Destination0 pixel format"
line.long 0x4 "IMGSIZER6,This register is used to set the processing size (width and height) of Source and Destination. It is set in pixel unit."
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "IWIDTH,These bits specify the width of the processed image."
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rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "IHEIGHT,These bits specify the height of the processed image."
group.long 0xA0++0x3
line.long 0x0 "FCR06,This register is used to control functions of IMP DMAC"
bitfld.long 0x0 31. "BITCNTEN,Bit count enable setting" "0: Do not operate bit count,1: Operate bit count"
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
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hexmask.long.byte 0x0 0.--7. 1. "LOP,Logical operation setting"
group.long 0xAC++0x3
line.long 0x0 "FCR16,[IMP DMAC]"
bitfld.long 0x0 31. "PXALIGN,Pixel alignment mode enable" "0: 64-byte or 128-byte alignment mode,1: Pixel alignment mode"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x0 13.--27. 1. "Reserved_13,Reserved"
hexmask.long.byte 0x0 8.--12. 1. "SHIFT,Setting of shift amount after LOP"
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hexmask.long.byte 0x0 4.--7. 1. "RNDMD,Setting rounding mode after shift"
bitfld.long 0x0 3. "SATEN,Saturation process enable" "0: Do not process saturation,1: Process saturation"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
bitfld.long 0x0 0.--1. "SATW,Saturation bit width selection" "?,1: Saturate to 10 bits,2: Saturate to 12 bits,3: Saturate to 14 bits"
rgroup.long 0xC8++0x7
line.long 0x0 "CLFAR6,This register is used to display the address of CL fetch destination."
hexmask.long 0x0 2.--31. 1. "CLFAR,These bits display bit31~bit2 of the address of CL fetch destination (during execution)."
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "CLEIR6,This register is used to display the instruction during CL execution."
hexmask.long 0x4 0.--31. 1. "CLEIR,These bits display the instruction during CL execution."
group.long 0xD0++0x3
line.long 0x0 "RAMTSTR6,This is safety related register. Do not set this register during DMAC operation."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved."
bitfld.long 0x0 15. "MEMINIT,DMAC Memory Initialize Bit" "0: Invalid,1: Initiate initialization"
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hexmask.long.word 0x0 0.--14. 1. "Reserved_0,Reserved."
group.long 0xDC++0x7
line.long 0x0 "DPCR6,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "IFBSYCNTENB,IFID operation count enable" "0,1"
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bitfld.long 0x0 0. "DBSYCNTENB,Data transmission operation count enable" "0,1"
line.long 0x4 "DPBSYCNTR6,"
hexmask.long 0x4 0.--31. 1. "DPBSYCNTR,This register count cycles during operation"
group.long 0xE8++0xF
line.long 0x0 "SYNCCR06,This register specifies the module corresponding to bits 0 to 3 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x0 24.--31. 1. "SYNCC3,This register specifies the module corresponding to bit 3 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x0 16.--23. 1. "SYNCC2,This register specifies the module corresponding to bit 2 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x0 8.--15. 1. "SYNCC1,This register specifies the module corresponding to bit 1 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x0 0.--7. 1. "SYNCC0,This register specifies the module corresponding to bit 0 in the SYNCC enable field of WUP and SLP instructions."
line.long 0x4 "SYNCCR16,This register specifies the module corresponding to bits 4 to 7 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x4 24.--31. 1. "SYNCC7,This register specifies the module corresponding to bit 7 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x4 16.--23. 1. "SYNCC6,This register specifies the module corresponding to bit 6 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x4 8.--15. 1. "SYNCC5,This register specifies the module corresponding to bit 5 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x4 0.--7. 1. "SYNCC4,This register specifies the module corresponding to bit 4 in the SYNCC enable field of WUP and SLP instructions."
line.long 0x8 "SYNCCR26,This register specifies the module corresponding to bits 8 to 11 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x8 24.--31. 1. "SYNCC11,This register specifies the module corresponding to bit 11 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x8 16.--23. 1. "SYNCC10,This register specifies the module corresponding to bit 10 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x8 8.--15. 1. "SYNCC9,This register specifies the module corresponding to bit 9 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x8 0.--7. 1. "SYNCC8,This register specifies the module corresponding to bit 8 in the SYNCC enable field of WUP and SLP instructions."
line.long 0xC "SYNCCR36,This register specifies the module corresponding to bits 12 to 15 of the SYNCC enable field of WUP and SLP instruction. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0xC 24.--31. 1. "SYNCC15,This register specifies the module corresponding to bit 15 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0xC 16.--23. 1. "SYNCC14,This register specifies the module corresponding to bit 14 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0xC 8.--15. 1. "SYNCC13,This register specifies the module corresponding to bit 13 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0xC 0.--7. 1. "SYNCC12,This register specifies the module corresponding to bit 12 in the SYNCC enable field of WUP and SLP instructions."
group.long 0x260++0x1F
line.long 0x0 "INDEX06,"
hexmask.long 0x0 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x4 "INDEX16,"
hexmask.long 0x4 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x8 "INDEX26,"
hexmask.long 0x8 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0xC "INDEX36,"
hexmask.long 0xC 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x10 "INDEX46,"
hexmask.long 0x10 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x14 "INDEX56,"
hexmask.long 0x14 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x18 "INDEX66,"
hexmask.long 0x18 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x1C "INDEX76,"
hexmask.long 0x1C 0.--31. 1. "INDEXn,Index0 register is read only."
group.long 0x298++0x13
line.long 0x0 "WRAPER6,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "DST_WRAP_ENB,Dst address wraparound enable" "0: Not wraparound Dst address,1: Wraparound Dst address"
newline
bitfld.long 0x0 0. "SRC_WRAP_ENB,Src address wraparound enable" "0: Not wraparound Src address,1: Wraparound Src address"
line.long 0x4 "WRAPS_MIN6,"
hexmask.long 0x4 0.--31. 1. "WRAP_MIN_SRC,Minimum address of Src wraparound."
line.long 0x8 "WRAPS_MAX6,"
hexmask.long 0x8 0.--31. 1. "WRAP_MAX_SRC,Maximum address of Src wraparound."
line.long 0xC "WRAPD_MIN6,"
hexmask.long 0xC 0.--31. 1. "WRAP_MIN_DST,Minimum address of Dst wraparound."
line.long 0x10 "WRAPD_MAX6,"
hexmask.long 0x10 0.--31. 1. "WRAP_MAX_DST,Maximum address of Dst wraparound."
group.long 0x344++0x3
line.long 0x0 "TCR16,This controls the issue cycle of Src0.1 read request."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "S1RM_CYCLE,Setting minimum interval to issue the read request of Src1"
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hexmask.long.byte 0x0 0.--7. 1. "S0RM_CYCLE,Setting minimum interval to issue the read request of Src0"
wgroup.long 0x350++0xB
line.long 0x0 "S0SAR_OFS6,This register is used to set the offset to be added to the start address of Source0."
hexmask.long 0x0 0.--31. 1. "S0SAR_OFS,Set the offset value to be added to the start address of Source0 in byte unit."
line.long 0x4 "S1SAR_OFS6,This register is used to set the offset to be added to the start address of Source1."
hexmask.long 0x4 0.--31. 1. "S1SAR_OFS,Set the offset value to be added to the start address of Source1 in byte unit."
line.long 0x8 "D0SAR_OFS6,This register is used to set the offset to be added to the start address of Destination0."
hexmask.long 0x8 0.--31. 1. "D0SAR_OFS,Set the offset value to be added to the start address of Destination0 in byte unit."
group.long 0x3F4++0x3
line.long 0x0 "CLBRKADDRR6,This is the register to control the CL break."
hexmask.long 0x0 0.--31. 1. "CLBRKADDRR,CL break address. Specify the address(break point) of command list."
group.long 0x3FC++0x3
line.long 0x0 "CLCNDGSBR6,This is the register to control the GOSUB command."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLCNDGSBR,Condition for conditional GOSUB instruction:" "0: GOSUB is not executed,1: GOSUB is executed"
tree.end
tree "IMP_DMAC_7"
base ad:0xFFA95000
rgroup.long 0x0++0x3
line.long 0x0 "VCR7,The value to be read varies depending on the product."
hexmask.long 0x0 0.--31. 1. "Version0,These bits indicate the version of this module."
group.long 0x4++0x3
line.long 0x0 "SCTLR07,This is the register to control the reset (software). and the start of DMA."
bitfld.long 0x0 31. "SWRST,Software reset" "0: Cancels a software reset for this module,1: Applies a software reset to this module"
hexmask.long 0x0 1.--30. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "DMAEN,DMA transmission start bit" "0: DMA transmission has not been performed,1: DMA transmission is in progress"
rgroup.long 0x8++0x3
line.long 0x0 "SR07,This register displays every status generated by IMP DMAC."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 10. "CLBRK,CL break status." "0: CL does not break,1: CL break"
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bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "WUPOVF,WUP counter overflow" "0: WUP overflow has not been occured,1: WUP overflow has been occured"
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bitfld.long 0x0 6. "INT,INT instruction decoding" "0: INT instruction has not been decoded,1: INT instruction has been decoded"
bitfld.long 0x0 5. "IER,Illegal instruction decoding or GOSUB overflow/underflow." "0: Illegal instruction has not been decoded,1: Illegal instruction has been decoded"
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bitfld.long 0x0 4. "TRA,TRAP instruction decoding" "0: TRAP instruction has not been decoded,1: TRAP instruction has been decoded"
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "TEND,Transmission completion" "0: Transmission has not been started or it is in..,1: Transmission has ended"
group.long 0xC++0xF
line.long 0x0 "SCR7,This register clears every status displayed in SR0. Write 1 to clear. writing 0 is disabled."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 10. "CLBRKC,CL break status clear." "0,1"
newline
rbitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "WUPOVFC,WUPOVF bit clearing" "0,1"
newline
bitfld.long 0x0 6. "INTC,INT bit clearing" "0,1"
bitfld.long 0x0 5. "IERC,IER bit clearing" "0,1"
newline
bitfld.long 0x0 4. "TRAC,TRA bit clearing" "0,1"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "TENDC,TEND bit clearing" "0,1"
line.long 0x4 "SER7,This register is used to set whether to reflect status in each bit of SR0 register."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
newline
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
rbitfld.long 0x4 11. "Reserved_11,Reserved" "0,1"
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bitfld.long 0x4 10. "CLBRKENB,CL break status/CL break enable." "0: CL break disable,1: CL break enable"
rbitfld.long 0x4 8.--9. "Reserved_8,Reserved" "0,1,2,3"
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bitfld.long 0x4 7. "WUPOVFE,WUPOVF bit set enable" "0: When WUP overflow is detected,1: When WUP overflow is detected"
bitfld.long 0x4 6. "INTE,INT bit set enable" "0: When the INT instruction is decoded,1: When the INT instruction is decoded"
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bitfld.long 0x4 5. "IERE,IER bit set enable" "0: When the illegal instruction is decoded,1: When the illegal instruction is decoded"
bitfld.long 0x4 4. "TRAE,TRA bit set enable" "0: When the TRAP instruction is decoded,1: When the TRAP instruction is decoded"
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rbitfld.long 0x4 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0. "TENDE,TEND bit set enable" "0: Even if DMA transmission ends,1: If DMA transmission ends"
line.long 0x8 "IMR7,This register is used to set whether to generate an interrupt or mask an interrupt according to occurrence of each status."
hexmask.long.word 0x8 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x8 16. "Reserved_16,The read value should always be 1." "0,1"
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hexmask.long.byte 0x8 12.--15. 1. "Reserved_12,Reserved"
rbitfld.long 0x8 11. "Reserved_11,Reserved" "0,1"
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bitfld.long 0x8 10. "CLBRKM,Mask setting of interrupt by CLBRK status" "0: The generation of CLBRK interrupt is not masked,1: The generation of CLBRK interrupt is masked"
rbitfld.long 0x8 8.--9. "Reserved_8,Reserved" "0,1,2,3"
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bitfld.long 0x8 7. "WUPOVFM,Mask setting of interrupt by WUPOVF status" "0: The generation of WUPOVF interrupt is not masked,1: The generation of WUPOVF interrupt is masked"
bitfld.long 0x8 6. "INTM,Mask setting of interrupt by INT status" "0: The generation of INT interrupt is not masked,1: The generation of INT interrupt is masked"
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bitfld.long 0x8 5. "IERM,Mask setting of interrupt by IER status" "0: The generation of IER interrupt is not masked,1: The generation of IER interrupt is masked"
bitfld.long 0x8 4. "TRAM,Mask setting of interrupt by TRA status" "0: The generation of TRA interrupt is not masked,1: The generation of TRA interrupt is masked"
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rbitfld.long 0x8 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0. "TENDM,Mask setting of interrupt by TEND status" "0: The generation of TEND interrupt is not masked,1: The generation of TEND interrupt is masked"
line.long 0xC "SCTLR17,This is the register to control the start of CL."
bitfld.long 0xC 31. "CLE,IMP DMACsingle_quotations CL starting bit" "0: CL is not in progress,1: CL is in progress"
hexmask.long 0xC 0.--30. 1. "Reserved_0,Reserved"
group.long 0x20++0x3
line.long 0x0 "TSCR7,[IMP DMAC]"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 20.--23. 1. "SRC1_TSIZE,These bits define the transmission size of Source1."
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hexmask.long.byte 0x0 16.--19. 1. "SRC0_TSIZE,These bits define the transmission size of Source0."
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "DST0_TSIZE,These bits define the transmission size of Destination0."
group.long 0x28++0x3
line.long 0x0 "CLSAR7,This register is used to set the first address when fetching CL."
hexmask.long 0x0 0.--31. 1. "CLSAR,First address of CL"
rgroup.long 0x30++0x3
line.long 0x0 "SR17,This register displays the code value when IMP DMAC executes INT and TRAP instructions."
hexmask.long.byte 0x0 24.--31. 1. "INTCODE,INT interrupt code"
hexmask.long.byte 0x0 16.--23. 1. "TRAPCODE,TRAP interrupt code"
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hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
group.long 0x38++0x3
line.long 0x0 "DSWPR7,This register is used to set the swap of data in Source0. Source1. Destination0."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 29. "S1SWP128BIT,Source1 128-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 28. "S1SWP64BIT,Source1 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 27. "S1SWP32BIT,Source1 32-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 26. "S1SWP16BIT,Source1 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 25. "S1SWP8BIT,Source1 8-bit swap setting" "0: It is not swapped,1: It is swapped"
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rbitfld.long 0x0 22.--24. "Reserved_22,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 21. "S0SWP128BIT,Source0 128-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 20. "S0SWP64BIT,Source0 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 19. "S0SWP32BIT,Source0 32-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 18. "S0SWP16BIT,Source0 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 17. "S0SWP8BIT,Source0 8-bit swap setting" "0: It is not swapped,1: It is swapped"
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hexmask.long.word 0x0 6.--16. 1. "Reserved_6,Reserved"
bitfld.long 0x0 5. "D0SWP128BIT,Destination0 128-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 4. "D0SWP64BIT,Destination0 64-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 3. "D0SWP32BIT,Destination0 32-bit swap setting" "0: It is not swapped,1: It is swapped"
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bitfld.long 0x0 2. "D0SWP16BIT,Destination0 16-bit swap setting" "0: It is not swapped,1: It is swapped"
bitfld.long 0x0 1. "D0SWP8BIT,Destination0 8-bit swap setting" "0: It is not swapped,1: It is swapped"
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rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x40++0x7
line.long 0x0 "S0SAR7,This register is used to set the start address of Source0 to read from external memory or internal memory."
hexmask.long 0x0 0.--31. 1. "S0SAR,Set the start address of Source0 in byte unit."
line.long 0x4 "S0STR7,This register is used to set the memory width of Source0 to read from external memory or internal memory."
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x4 0.--14. 1. "S0STR,These bits set the memory width of Source0 in byte unit. The setting range is 0~32767."
group.long 0x4C++0x7
line.long 0x0 "S0DATAR7,This is the data register of Source0."
hexmask.long 0x0 0.--31. 1. "S0DATAR,This is the data register of Source0."
line.long 0x4 "S0CR7,This register is used to control Source0."
bitfld.long 0x4 31. "S0REN,Source0 read enable" "0: Do not read data from external memory or..,1: Read data of Source0 from external memory or.."
hexmask.long.word 0x4 16.--30. 1. "Reserved_16,Reserved"
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hexmask.long.byte 0x4 12.--15. 1. "S0TAMODE,Source0 tile addressing mode"
hexmask.long.byte 0x4 4.--11. 1. "Reserved_4,Reserved"
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hexmask.long.byte 0x4 0.--3. 1. "S0PF,Source0 pixel format"
group.long 0x7C++0xB
line.long 0x0 "TCR07,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
bitfld.long 0x0 27. "WRM_EN,Enabling minimum interval control of write request issuance" "0,1"
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hexmask.long.word 0x0 16.--26. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "WRM_CYCLE,Setting minimum interval of write request issuance"
line.long 0x4 "D0SAR7,This register is used to set the start address of Destination0 to write to external memory or internal memory."
hexmask.long 0x4 0.--31. 1. "D0SAR,Set the start address of Destination0 in byte unit."
line.long 0x8 "D0STR7,This register is used to set the memory width of Destination0 to write to external memory or internal memory."
hexmask.long.tbyte 0x8 15.--31. 1. "Reserved_15,Reserved"
hexmask.long.word 0x8 0.--14. 1. "D0STR,Memory width of Destination0 is set in byte unit. The setting range is 1~32767."
group.long 0x90++0x7
line.long 0x0 "D0CR7,This register is used to control Destination0."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 12.--15. 1. "D0TAMODE,Destination0 tile addressing mode"
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hexmask.long.byte 0x0 4.--11. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "D0PF,Destination0 pixel format"
line.long 0x4 "IMGSIZER7,This register is used to set the processing size (width and height) of Source and Destination. It is set in pixel unit."
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "IWIDTH,These bits specify the width of the processed image."
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rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "IHEIGHT,These bits specify the height of the processed image."
group.long 0xA0++0x3
line.long 0x0 "FCR07,This register is used to control functions of IMP DMAC"
bitfld.long 0x0 31. "BITCNTEN,Bit count enable setting" "0: Do not operate bit count,1: Operate bit count"
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
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hexmask.long.byte 0x0 0.--7. 1. "LOP,Logical operation setting"
group.long 0xAC++0x3
line.long 0x0 "FCR17,[IMP DMAC]"
bitfld.long 0x0 31. "PXALIGN,Pixel alignment mode enable" "0: 64-byte or 128-byte alignment mode,1: Pixel alignment mode"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
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hexmask.long.word 0x0 13.--27. 1. "Reserved_13,Reserved"
hexmask.long.byte 0x0 8.--12. 1. "SHIFT,Setting of shift amount after LOP"
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hexmask.long.byte 0x0 4.--7. 1. "RNDMD,Setting rounding mode after shift"
bitfld.long 0x0 3. "SATEN,Saturation process enable" "0: Do not process saturation,1: Process saturation"
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rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
bitfld.long 0x0 0.--1. "SATW,Saturation bit width selection" "?,1: Saturate to 10 bits,2: Saturate to 12 bits,3: Saturate to 14 bits"
rgroup.long 0xC8++0x7
line.long 0x0 "CLFAR7,This register is used to display the address of CL fetch destination."
hexmask.long 0x0 2.--31. 1. "CLFAR,These bits display bit31~bit2 of the address of CL fetch destination (during execution)."
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "CLEIR7,This register is used to display the instruction during CL execution."
hexmask.long 0x4 0.--31. 1. "CLEIR,These bits display the instruction during CL execution."
group.long 0xD0++0x3
line.long 0x0 "RAMTSTR7,This is safety related register. Do not set this register during DMAC operation."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved."
bitfld.long 0x0 15. "MEMINIT,DMAC Memory Initialize Bit" "0: Invalid,1: Initiate initialization"
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hexmask.long.word 0x0 0.--14. 1. "Reserved_0,Reserved."
group.long 0xDC++0x7
line.long 0x0 "DPCR7,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "IFBSYCNTENB,IFID operation count enable" "0,1"
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bitfld.long 0x0 0. "DBSYCNTENB,Data transmission operation count enable" "0,1"
line.long 0x4 "DPBSYCNTR7,"
hexmask.long 0x4 0.--31. 1. "DPBSYCNTR,This register count cycles during operation"
group.long 0xE8++0xF
line.long 0x0 "SYNCCR07,This register specifies the module corresponding to bits 0 to 3 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x0 24.--31. 1. "SYNCC3,This register specifies the module corresponding to bit 3 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x0 16.--23. 1. "SYNCC2,This register specifies the module corresponding to bit 2 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x0 8.--15. 1. "SYNCC1,This register specifies the module corresponding to bit 1 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x0 0.--7. 1. "SYNCC0,This register specifies the module corresponding to bit 0 in the SYNCC enable field of WUP and SLP instructions."
line.long 0x4 "SYNCCR17,This register specifies the module corresponding to bits 4 to 7 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x4 24.--31. 1. "SYNCC7,This register specifies the module corresponding to bit 7 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x4 16.--23. 1. "SYNCC6,This register specifies the module corresponding to bit 6 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x4 8.--15. 1. "SYNCC5,This register specifies the module corresponding to bit 5 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x4 0.--7. 1. "SYNCC4,This register specifies the module corresponding to bit 4 in the SYNCC enable field of WUP and SLP instructions."
line.long 0x8 "SYNCCR27,This register specifies the module corresponding to bits 8 to 11 in the SYNCC enable field of WUP and SLP instructions. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0x8 24.--31. 1. "SYNCC11,This register specifies the module corresponding to bit 11 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x8 16.--23. 1. "SYNCC10,This register specifies the module corresponding to bit 10 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0x8 8.--15. 1. "SYNCC9,This register specifies the module corresponding to bit 9 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0x8 0.--7. 1. "SYNCC8,This register specifies the module corresponding to bit 8 in the SYNCC enable field of WUP and SLP instructions."
line.long 0xC "SYNCCR37,This register specifies the module corresponding to bits 12 to 15 of the SYNCC enable field of WUP and SLP instruction. Set the number of the module you want to specify in this register. For module number. refer to Figure U30.6. Settings not.."
hexmask.long.byte 0xC 24.--31. 1. "SYNCC15,This register specifies the module corresponding to bit 15 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0xC 16.--23. 1. "SYNCC14,This register specifies the module corresponding to bit 14 in the SYNCC enable field of WUP and SLP instructions."
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hexmask.long.byte 0xC 8.--15. 1. "SYNCC13,This register specifies the module corresponding to bit 13 in the SYNCC enable field of WUP and SLP instructions."
hexmask.long.byte 0xC 0.--7. 1. "SYNCC12,This register specifies the module corresponding to bit 12 in the SYNCC enable field of WUP and SLP instructions."
group.long 0x260++0x1F
line.long 0x0 "INDEX07,"
hexmask.long 0x0 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x4 "INDEX17,"
hexmask.long 0x4 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x8 "INDEX27,"
hexmask.long 0x8 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0xC "INDEX37,"
hexmask.long 0xC 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x10 "INDEX47,"
hexmask.long 0x10 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x14 "INDEX57,"
hexmask.long 0x14 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x18 "INDEX67,"
hexmask.long 0x18 0.--31. 1. "INDEXn,Index0 register is read only."
line.long 0x1C "INDEX77,"
hexmask.long 0x1C 0.--31. 1. "INDEXn,Index0 register is read only."
group.long 0x298++0x13
line.long 0x0 "WRAPER7,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "DST_WRAP_ENB,Dst address wraparound enable" "0: Not wraparound Dst address,1: Wraparound Dst address"
newline
bitfld.long 0x0 0. "SRC_WRAP_ENB,Src address wraparound enable" "0: Not wraparound Src address,1: Wraparound Src address"
line.long 0x4 "WRAPS_MIN7,"
hexmask.long 0x4 0.--31. 1. "WRAP_MIN_SRC,Minimum address of Src wraparound."
line.long 0x8 "WRAPS_MAX7,"
hexmask.long 0x8 0.--31. 1. "WRAP_MAX_SRC,Maximum address of Src wraparound."
line.long 0xC "WRAPD_MIN7,"
hexmask.long 0xC 0.--31. 1. "WRAP_MIN_DST,Minimum address of Dst wraparound."
line.long 0x10 "WRAPD_MAX7,"
hexmask.long 0x10 0.--31. 1. "WRAP_MAX_DST,Maximum address of Dst wraparound."
group.long 0x344++0x3
line.long 0x0 "TCR17,This controls the issue cycle of Src0.1 read request."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "S1RM_CYCLE,Setting minimum interval to issue the read request of Src1"
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hexmask.long.byte 0x0 0.--7. 1. "S0RM_CYCLE,Setting minimum interval to issue the read request of Src0"
wgroup.long 0x350++0xB
line.long 0x0 "S0SAR_OFS7,This register is used to set the offset to be added to the start address of Source0."
hexmask.long 0x0 0.--31. 1. "S0SAR_OFS,Set the offset value to be added to the start address of Source0 in byte unit."
line.long 0x4 "S1SAR_OFS7,This register is used to set the offset to be added to the start address of Source1."
hexmask.long 0x4 0.--31. 1. "S1SAR_OFS,Set the offset value to be added to the start address of Source1 in byte unit."
line.long 0x8 "D0SAR_OFS7,This register is used to set the offset to be added to the start address of Destination0."
hexmask.long 0x8 0.--31. 1. "D0SAR_OFS,Set the offset value to be added to the start address of Destination0 in byte unit."
group.long 0x3F4++0x3
line.long 0x0 "CLBRKADDRR7,This is the register to control the CL break."
hexmask.long 0x0 0.--31. 1. "CLBRKADDRR,CL break address. Specify the address(break point) of command list."
group.long 0x3FC++0x3
line.long 0x0 "CLCNDGSBR7,This is the register to control the GOSUB command."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLCNDGSBR,Condition for conditional GOSUB instruction:" "0: GOSUB is not executed,1: GOSUB is executed"
tree.end
tree.end
tree "IMP_DTA (Debug Trace Agent)"
base ad:0xFFA88000
group.long 0x0++0x3
line.long 0x0 "IMPDTACTRL,"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved."
bitfld.long 0x0 4. "AXIM_SEL,AXI bus select signal" "0: AXIM256,1: AXIM64"
newline
bitfld.long 0x0 3. "GLBKICK,Global KICK" "0: no function,1: triggers a KICK pulse on all KICK signals"
bitfld.long 0x0 2. "GLBBRK,Global Break" "0: disabled,1: all Components will be stopped"
newline
bitfld.long 0x0 1. "GLBDBMODE,Global Debug Mode" "0: Disabled,1: Enabled"
bitfld.long 0x0 0. "EN,IMPDTA enable:" "0: disabled,1: enabled"
rgroup.long 0xC++0x3
line.long 0x0 "IMPDTAOPC,"
hexmask.long 0x0 0.--31. 1. "Reserved_0,Reserved."
group.long 0x10++0xB
line.long 0x0 "IMPDTADBCTRL0,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x0 5. "DLY_KICK,DLY_KICK" "0: KICK is directly sent out,1: KICK is delayed till message has been.."
newline
bitfld.long 0x0 4. "MSGEN,Message EN" "0: Only Trace information,1: User message and trace information will be sent.."
bitfld.long 0x0 3. "KICK,Kick" "0: No Kick,1: Kick"
newline
bitfld.long 0x0 2. "EVCNTRES,Event Counter Reset" "0: no function,1: Counter reset"
bitfld.long 0x0 1. "TraceEN,Trace EN" "0: disabled,1: Trace information will be sent if wake up.."
newline
bitfld.long 0x0 0. "DBMODE,Individual Debug Mode:" "0: Disabled,1: Enabled"
line.long 0x4 "IMPDTAEVCNTLIMIT0,"
hexmask.long 0x4 0.--31. 1. "LIMIT,Node counter target value."
line.long 0x8 "IMPDTAID0,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved."
hexmask.long.byte 0x8 16.--23. 1. "TRCMSG,User trace message for this component"
newline
hexmask.long.word 0x8 0.--15. 1. "TRCID,Configures the trace ID for this component"
rgroup.long 0x1C++0x7
line.long 0x0 "IMPDTASTAT0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x0 1. "BRK,1: Component is stopped due to individual break. Bit is cleared if KICK is executed" "?,1: Component is stopped due to individual break"
newline
bitfld.long 0x0 0. "GLBBRK,1: Component is stopped due to global break." "?,1: Component is stopped due to global break"
line.long 0x4 "IMPDTAEVCNTVAL0,"
hexmask.long 0x4 0.--31. 1. "CNTVAL,Shows the current event counter value."
group.long 0x50++0xB
line.long 0x0 "IMPDTADBCTRL1,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x0 5. "DLY_KICK,DLY_KICK" "0: KICK is directly sent out,1: KICK is delayed till message has been.."
newline
bitfld.long 0x0 4. "MSGEN,Message EN" "0: Only Trace information,1: User message and trace information will be sent.."
bitfld.long 0x0 3. "KICK,Kick" "0: No Kick,1: Kick"
newline
bitfld.long 0x0 2. "EVCNTRES,Event Counter Reset" "0: no function,1: Counter reset"
bitfld.long 0x0 1. "TraceEN,Trace EN" "0: disabled,1: Trace information will be sent if wake up.."
newline
bitfld.long 0x0 0. "DBMODE,Individual Debug Mode:" "0: Disabled,1: Enabled"
line.long 0x4 "IMPDTAEVCNTLIMIT1,"
hexmask.long 0x4 0.--31. 1. "LIMIT,Node counter target value."
line.long 0x8 "IMPDTAID1,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved."
hexmask.long.byte 0x8 16.--23. 1. "TRCMSG,User trace message for this component"
newline
hexmask.long.word 0x8 0.--15. 1. "TRCID,Configures the trace ID for this component"
rgroup.long 0x5C++0x7
line.long 0x0 "IMPDTASTAT1,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x0 1. "BRK,1: Component is stopped due to individual break. Bit is cleared if KICK is executed" "?,1: Component is stopped due to individual break"
newline
bitfld.long 0x0 0. "GLBBRK,1: Component is stopped due to global break." "?,1: Component is stopped due to global break"
line.long 0x4 "IMPDTAEVCNTVAL1,"
hexmask.long 0x4 0.--31. 1. "CNTVAL,Shows the current event counter value."
group.long 0x90++0xB
line.long 0x0 "IMPDTADBCTRL2,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x0 5. "DLY_KICK,DLY_KICK" "0: KICK is directly sent out,1: KICK is delayed till message has been.."
newline
bitfld.long 0x0 4. "MSGEN,Message EN" "0: Only Trace information,1: User message and trace information will be sent.."
bitfld.long 0x0 3. "KICK,Kick" "0: No Kick,1: Kick"
newline
bitfld.long 0x0 2. "EVCNTRES,Event Counter Reset" "0: no function,1: Counter reset"
bitfld.long 0x0 1. "TraceEN,Trace EN" "0: disabled,1: Trace information will be sent if wake up.."
newline
bitfld.long 0x0 0. "DBMODE,Individual Debug Mode:" "0: Disabled,1: Enabled"
line.long 0x4 "IMPDTAEVCNTLIMIT2,"
hexmask.long 0x4 0.--31. 1. "LIMIT,Node counter target value."
line.long 0x8 "IMPDTAID2,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved."
hexmask.long.byte 0x8 16.--23. 1. "TRCMSG,User trace message for this component"
newline
hexmask.long.word 0x8 0.--15. 1. "TRCID,Configures the trace ID for this component"
rgroup.long 0x9C++0x7
line.long 0x0 "IMPDTASTAT2,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x0 1. "BRK,1: Component is stopped due to individual break. Bit is cleared if KICK is executed" "?,1: Component is stopped due to individual break"
newline
bitfld.long 0x0 0. "GLBBRK,1: Component is stopped due to global break." "?,1: Component is stopped due to global break"
line.long 0x4 "IMPDTAEVCNTVAL2,"
hexmask.long 0x4 0.--31. 1. "CNTVAL,Shows the current event counter value."
group.long 0xD0++0xB
line.long 0x0 "IMPDTADBCTRL3,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x0 5. "DLY_KICK,DLY_KICK" "0: KICK is directly sent out,1: KICK is delayed till message has been.."
newline
bitfld.long 0x0 4. "MSGEN,Message EN" "0: Only Trace information,1: User message and trace information will be sent.."
bitfld.long 0x0 3. "KICK,Kick" "0: No Kick,1: Kick"
newline
bitfld.long 0x0 2. "EVCNTRES,Event Counter Reset" "0: no function,1: Counter reset"
bitfld.long 0x0 1. "TraceEN,Trace EN" "0: disabled,1: Trace information will be sent if wake up.."
newline
bitfld.long 0x0 0. "DBMODE,Individual Debug Mode:" "0: Disabled,1: Enabled"
line.long 0x4 "IMPDTAEVCNTLIMIT3,"
hexmask.long 0x4 0.--31. 1. "LIMIT,Node counter target value."
line.long 0x8 "IMPDTAID3,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved."
hexmask.long.byte 0x8 16.--23. 1. "TRCMSG,User trace message for this component"
newline
hexmask.long.word 0x8 0.--15. 1. "TRCID,Configures the trace ID for this component"
rgroup.long 0xDC++0x7
line.long 0x0 "IMPDTASTAT3,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x0 1. "BRK,1: Component is stopped due to individual break. Bit is cleared if KICK is executed" "?,1: Component is stopped due to individual break"
newline
bitfld.long 0x0 0. "GLBBRK,1: Component is stopped due to global break." "?,1: Component is stopped due to global break"
line.long 0x4 "IMPDTAEVCNTVAL3,"
hexmask.long 0x4 0.--31. 1. "CNTVAL,Shows the current event counter value."
group.long 0x110++0xB
line.long 0x0 "IMPDTADBCTRL4,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x0 5. "DLY_KICK,DLY_KICK" "0: KICK is directly sent out,1: KICK is delayed till message has been.."
newline
bitfld.long 0x0 4. "MSGEN,Message EN" "0: Only Trace information,1: User message and trace information will be sent.."
bitfld.long 0x0 3. "KICK,Kick" "0: No Kick,1: Kick"
newline
bitfld.long 0x0 2. "EVCNTRES,Event Counter Reset" "0: no function,1: Counter reset"
bitfld.long 0x0 1. "TraceEN,Trace EN" "0: disabled,1: Trace information will be sent if wake up.."
newline
bitfld.long 0x0 0. "DBMODE,Individual Debug Mode:" "0: Disabled,1: Enabled"
line.long 0x4 "IMPDTAEVCNTLIMIT4,"
hexmask.long 0x4 0.--31. 1. "LIMIT,Node counter target value."
line.long 0x8 "IMPDTAID4,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved."
hexmask.long.byte 0x8 16.--23. 1. "TRCMSG,User trace message for this component"
newline
hexmask.long.word 0x8 0.--15. 1. "TRCID,Configures the trace ID for this component"
rgroup.long 0x11C++0x7
line.long 0x0 "IMPDTASTAT4,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x0 1. "BRK,1: Component is stopped due to individual break. Bit is cleared if KICK is executed" "?,1: Component is stopped due to individual break"
newline
bitfld.long 0x0 0. "GLBBRK,1: Component is stopped due to global break." "?,1: Component is stopped due to global break"
line.long 0x4 "IMPDTAEVCNTVAL4,"
hexmask.long 0x4 0.--31. 1. "CNTVAL,Shows the current event counter value."
group.long 0x150++0xB
line.long 0x0 "IMPDTADBCTRL5,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x0 5. "DLY_KICK,DLY_KICK" "0: KICK is directly sent out,1: KICK is delayed till message has been.."
newline
bitfld.long 0x0 4. "MSGEN,Message EN" "0: Only Trace information,1: User message and trace information will be sent.."
bitfld.long 0x0 3. "KICK,Kick" "0: No Kick,1: Kick"
newline
bitfld.long 0x0 2. "EVCNTRES,Event Counter Reset" "0: no function,1: Counter reset"
bitfld.long 0x0 1. "TraceEN,Trace EN" "0: disabled,1: Trace information will be sent if wake up.."
newline
bitfld.long 0x0 0. "DBMODE,Individual Debug Mode:" "0: Disabled,1: Enabled"
line.long 0x4 "IMPDTAEVCNTLIMIT5,"
hexmask.long 0x4 0.--31. 1. "LIMIT,Node counter target value."
line.long 0x8 "IMPDTAID5,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved."
hexmask.long.byte 0x8 16.--23. 1. "TRCMSG,User trace message for this component"
newline
hexmask.long.word 0x8 0.--15. 1. "TRCID,Configures the trace ID for this component"
rgroup.long 0x15C++0x7
line.long 0x0 "IMPDTASTAT5,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x0 1. "BRK,1: Component is stopped due to individual break. Bit is cleared if KICK is executed" "?,1: Component is stopped due to individual break"
newline
bitfld.long 0x0 0. "GLBBRK,1: Component is stopped due to global break." "?,1: Component is stopped due to global break"
line.long 0x4 "IMPDTAEVCNTVAL5,"
hexmask.long 0x4 0.--31. 1. "CNTVAL,Shows the current event counter value."
group.long 0x190++0xB
line.long 0x0 "IMPDTADBCTRL6,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x0 5. "DLY_KICK,DLY_KICK" "0: KICK is directly sent out,1: KICK is delayed till message has been.."
newline
bitfld.long 0x0 4. "MSGEN,Message EN" "0: Only Trace information,1: User message and trace information will be sent.."
bitfld.long 0x0 3. "KICK,Kick" "0: No Kick,1: Kick"
newline
bitfld.long 0x0 2. "EVCNTRES,Event Counter Reset" "0: no function,1: Counter reset"
bitfld.long 0x0 1. "TraceEN,Trace EN" "0: disabled,1: Trace information will be sent if wake up.."
newline
bitfld.long 0x0 0. "DBMODE,Individual Debug Mode:" "0: Disabled,1: Enabled"
line.long 0x4 "IMPDTAEVCNTLIMIT6,"
hexmask.long 0x4 0.--31. 1. "LIMIT,Node counter target value."
line.long 0x8 "IMPDTAID6,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved."
hexmask.long.byte 0x8 16.--23. 1. "TRCMSG,User trace message for this component"
newline
hexmask.long.word 0x8 0.--15. 1. "TRCID,Configures the trace ID for this component"
rgroup.long 0x19C++0x7
line.long 0x0 "IMPDTASTAT6,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x0 1. "BRK,1: Component is stopped due to individual break. Bit is cleared if KICK is executed" "?,1: Component is stopped due to individual break"
newline
bitfld.long 0x0 0. "GLBBRK,1: Component is stopped due to global break." "?,1: Component is stopped due to global break"
line.long 0x4 "IMPDTAEVCNTVAL6,"
hexmask.long 0x4 0.--31. 1. "CNTVAL,Shows the current event counter value."
group.long 0x1D0++0xB
line.long 0x0 "IMPDTADBCTRL7,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x0 5. "DLY_KICK,DLY_KICK" "0: KICK is directly sent out,1: KICK is delayed till message has been.."
newline
bitfld.long 0x0 4. "MSGEN,Message EN" "0: Only Trace information,1: User message and trace information will be sent.."
bitfld.long 0x0 3. "KICK,Kick" "0: No Kick,1: Kick"
newline
bitfld.long 0x0 2. "EVCNTRES,Event Counter Reset" "0: no function,1: Counter reset"
bitfld.long 0x0 1. "TraceEN,Trace EN" "0: disabled,1: Trace information will be sent if wake up.."
newline
bitfld.long 0x0 0. "DBMODE,Individual Debug Mode:" "0: Disabled,1: Enabled"
line.long 0x4 "IMPDTAEVCNTLIMIT7,"
hexmask.long 0x4 0.--31. 1. "LIMIT,Node counter target value."
line.long 0x8 "IMPDTAID7,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved."
hexmask.long.byte 0x8 16.--23. 1. "TRCMSG,User trace message for this component"
newline
hexmask.long.word 0x8 0.--15. 1. "TRCID,Configures the trace ID for this component"
rgroup.long 0x1DC++0x7
line.long 0x0 "IMPDTASTAT7,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x0 1. "BRK,1: Component is stopped due to individual break. Bit is cleared if KICK is executed" "?,1: Component is stopped due to individual break"
newline
bitfld.long 0x0 0. "GLBBRK,1: Component is stopped due to global break." "?,1: Component is stopped due to global break"
line.long 0x4 "IMPDTAEVCNTVAL7,"
hexmask.long 0x4 0.--31. 1. "CNTVAL,Shows the current event counter value."
group.long 0x210++0xB
line.long 0x0 "IMPDTADBCTRL8,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x0 5. "DLY_KICK,DLY_KICK" "0: KICK is directly sent out,1: KICK is delayed till message has been.."
newline
bitfld.long 0x0 4. "MSGEN,Message EN" "0: Only Trace information,1: User message and trace information will be sent.."
bitfld.long 0x0 3. "KICK,Kick" "0: No Kick,1: Kick"
newline
bitfld.long 0x0 2. "EVCNTRES,Event Counter Reset" "0: no function,1: Counter reset"
bitfld.long 0x0 1. "TraceEN,Trace EN" "0: disabled,1: Trace information will be sent if wake up.."
newline
bitfld.long 0x0 0. "DBMODE,Individual Debug Mode:" "0: Disabled,1: Enabled"
line.long 0x4 "IMPDTAEVCNTLIMIT8,"
hexmask.long 0x4 0.--31. 1. "LIMIT,Node counter target value."
line.long 0x8 "IMPDTAID8,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved."
hexmask.long.byte 0x8 16.--23. 1. "TRCMSG,User trace message for this component"
newline
hexmask.long.word 0x8 0.--15. 1. "TRCID,Configures the trace ID for this component"
rgroup.long 0x21C++0x7
line.long 0x0 "IMPDTASTAT8,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x0 1. "BRK,1: Component is stopped due to individual break. Bit is cleared if KICK is executed" "?,1: Component is stopped due to individual break"
newline
bitfld.long 0x0 0. "GLBBRK,1: Component is stopped due to global break." "?,1: Component is stopped due to global break"
line.long 0x4 "IMPDTAEVCNTVAL8,"
hexmask.long 0x4 0.--31. 1. "CNTVAL,Shows the current event counter value."
group.long 0x250++0xB
line.long 0x0 "IMPDTADBCTRL9,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x0 5. "DLY_KICK,DLY_KICK" "0: KICK is directly sent out,1: KICK is delayed till message has been.."
newline
bitfld.long 0x0 4. "MSGEN,Message EN" "0: Only Trace information,1: User message and trace information will be sent.."
bitfld.long 0x0 3. "KICK,Kick" "0: No Kick,1: Kick"
newline
bitfld.long 0x0 2. "EVCNTRES,Event Counter Reset" "0: no function,1: Counter reset"
bitfld.long 0x0 1. "TraceEN,Trace EN" "0: disabled,1: Trace information will be sent if wake up.."
newline
bitfld.long 0x0 0. "DBMODE,Individual Debug Mode:" "0: Disabled,1: Enabled"
line.long 0x4 "IMPDTAEVCNTLIMIT9,"
hexmask.long 0x4 0.--31. 1. "LIMIT,Node counter target value."
line.long 0x8 "IMPDTAID9,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved."
hexmask.long.byte 0x8 16.--23. 1. "TRCMSG,User trace message for this component"
newline
hexmask.long.word 0x8 0.--15. 1. "TRCID,Configures the trace ID for this component"
rgroup.long 0x25C++0x7
line.long 0x0 "IMPDTASTAT9,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x0 1. "BRK,1: Component is stopped due to individual break. Bit is cleared if KICK is executed" "?,1: Component is stopped due to individual break"
newline
bitfld.long 0x0 0. "GLBBRK,1: Component is stopped due to global break." "?,1: Component is stopped due to global break"
line.long 0x4 "IMPDTAEVCNTVAL9,"
hexmask.long 0x4 0.--31. 1. "CNTVAL,Shows the current event counter value."
group.long 0x290++0xB
line.long 0x0 "IMPDTADBCTRL10,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x0 5. "DLY_KICK,DLY_KICK" "0: KICK is directly sent out,1: KICK is delayed till message has been.."
newline
bitfld.long 0x0 4. "MSGEN,Message EN" "0: Only Trace information,1: User message and trace information will be sent.."
bitfld.long 0x0 3. "KICK,Kick" "0: No Kick,1: Kick"
newline
bitfld.long 0x0 2. "EVCNTRES,Event Counter Reset" "0: no function,1: Counter reset"
bitfld.long 0x0 1. "TraceEN,Trace EN" "0: disabled,1: Trace information will be sent if wake up.."
newline
bitfld.long 0x0 0. "DBMODE,Individual Debug Mode:" "0: Disabled,1: Enabled"
line.long 0x4 "IMPDTAEVCNTLIMIT10,"
hexmask.long 0x4 0.--31. 1. "LIMIT,Node counter target value."
line.long 0x8 "IMPDTAID10,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved."
hexmask.long.byte 0x8 16.--23. 1. "TRCMSG,User trace message for this component"
newline
hexmask.long.word 0x8 0.--15. 1. "TRCID,Configures the trace ID for this component"
rgroup.long 0x29C++0x7
line.long 0x0 "IMPDTASTAT10,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x0 1. "BRK,1: Component is stopped due to individual break. Bit is cleared if KICK is executed" "?,1: Component is stopped due to individual break"
newline
bitfld.long 0x0 0. "GLBBRK,1: Component is stopped due to global break." "?,1: Component is stopped due to global break"
line.long 0x4 "IMPDTAEVCNTVAL10,"
hexmask.long 0x4 0.--31. 1. "CNTVAL,Shows the current event counter value."
group.long 0x2D0++0xB
line.long 0x0 "IMPDTADBCTRL11,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x0 5. "DLY_KICK,DLY_KICK" "0: KICK is directly sent out,1: KICK is delayed till message has been.."
newline
bitfld.long 0x0 4. "MSGEN,Message EN" "0: Only Trace information,1: User message and trace information will be sent.."
bitfld.long 0x0 3. "KICK,Kick" "0: No Kick,1: Kick"
newline
bitfld.long 0x0 2. "EVCNTRES,Event Counter Reset" "0: no function,1: Counter reset"
bitfld.long 0x0 1. "TraceEN,Trace EN" "0: disabled,1: Trace information will be sent if wake up.."
newline
bitfld.long 0x0 0. "DBMODE,Individual Debug Mode:" "0: Disabled,1: Enabled"
line.long 0x4 "IMPDTAEVCNTLIMIT11,"
hexmask.long 0x4 0.--31. 1. "LIMIT,Node counter target value."
line.long 0x8 "IMPDTAID11,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved."
hexmask.long.byte 0x8 16.--23. 1. "TRCMSG,User trace message for this component"
newline
hexmask.long.word 0x8 0.--15. 1. "TRCID,Configures the trace ID for this component"
rgroup.long 0x2DC++0x7
line.long 0x0 "IMPDTASTAT11,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x0 1. "BRK,1: Component is stopped due to individual break. Bit is cleared if KICK is executed" "?,1: Component is stopped due to individual break"
newline
bitfld.long 0x0 0. "GLBBRK,1: Component is stopped due to global break." "?,1: Component is stopped due to global break"
line.long 0x4 "IMPDTAEVCNTVAL11,"
hexmask.long 0x4 0.--31. 1. "CNTVAL,Shows the current event counter value."
group.long 0x310++0xB
line.long 0x0 "IMPDTADBCTRL12,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x0 5. "DLY_KICK,DLY_KICK" "0: KICK is directly sent out,1: KICK is delayed till message has been.."
newline
bitfld.long 0x0 4. "MSGEN,Message EN" "0: Only Trace information,1: User message and trace information will be sent.."
bitfld.long 0x0 3. "KICK,Kick" "0: No Kick,1: Kick"
newline
bitfld.long 0x0 2. "EVCNTRES,Event Counter Reset" "0: no function,1: Counter reset"
bitfld.long 0x0 1. "TraceEN,Trace EN" "0: disabled,1: Trace information will be sent if wake up.."
newline
bitfld.long 0x0 0. "DBMODE,Individual Debug Mode:" "0: Disabled,1: Enabled"
line.long 0x4 "IMPDTAEVCNTLIMIT12,"
hexmask.long 0x4 0.--31. 1. "LIMIT,Node counter target value."
line.long 0x8 "IMPDTAID12,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved."
hexmask.long.byte 0x8 16.--23. 1. "TRCMSG,User trace message for this component"
newline
hexmask.long.word 0x8 0.--15. 1. "TRCID,Configures the trace ID for this component"
rgroup.long 0x31C++0x7
line.long 0x0 "IMPDTASTAT12,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x0 1. "BRK,1: Component is stopped due to individual break. Bit is cleared if KICK is executed" "?,1: Component is stopped due to individual break"
newline
bitfld.long 0x0 0. "GLBBRK,1: Component is stopped due to global break." "?,1: Component is stopped due to global break"
line.long 0x4 "IMPDTAEVCNTVAL12,"
hexmask.long 0x4 0.--31. 1. "CNTVAL,Shows the current event counter value."
group.long 0x350++0xB
line.long 0x0 "IMPDTADBCTRL13,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x0 5. "DLY_KICK,DLY_KICK" "0: KICK is directly sent out,1: KICK is delayed till message has been.."
newline
bitfld.long 0x0 4. "MSGEN,Message EN" "0: Only Trace information,1: User message and trace information will be sent.."
bitfld.long 0x0 3. "KICK,Kick" "0: No Kick,1: Kick"
newline
bitfld.long 0x0 2. "EVCNTRES,Event Counter Reset" "0: no function,1: Counter reset"
bitfld.long 0x0 1. "TraceEN,Trace EN" "0: disabled,1: Trace information will be sent if wake up.."
newline
bitfld.long 0x0 0. "DBMODE,Individual Debug Mode:" "0: Disabled,1: Enabled"
line.long 0x4 "IMPDTAEVCNTLIMIT13,"
hexmask.long 0x4 0.--31. 1. "LIMIT,Node counter target value."
line.long 0x8 "IMPDTAID13,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved."
hexmask.long.byte 0x8 16.--23. 1. "TRCMSG,User trace message for this component"
newline
hexmask.long.word 0x8 0.--15. 1. "TRCID,Configures the trace ID for this component"
rgroup.long 0x35C++0x7
line.long 0x0 "IMPDTASTAT13,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x0 1. "BRK,1: Component is stopped due to individual break. Bit is cleared if KICK is executed" "?,1: Component is stopped due to individual break"
newline
bitfld.long 0x0 0. "GLBBRK,1: Component is stopped due to global break." "?,1: Component is stopped due to global break"
line.long 0x4 "IMPDTAEVCNTVAL13,"
hexmask.long 0x4 0.--31. 1. "CNTVAL,Shows the current event counter value."
group.long 0x390++0xB
line.long 0x0 "IMPDTADBCTRL14,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x0 5. "DLY_KICK,DLY_KICK" "0: KICK is directly sent out,1: KICK is delayed till message has been.."
newline
bitfld.long 0x0 4. "MSGEN,Message EN" "0: Only Trace information,1: User message and trace information will be sent.."
bitfld.long 0x0 3. "KICK,Kick" "0: No Kick,1: Kick"
newline
bitfld.long 0x0 2. "EVCNTRES,Event Counter Reset" "0: no function,1: Counter reset"
bitfld.long 0x0 1. "TraceEN,Trace EN" "0: disabled,1: Trace information will be sent if wake up.."
newline
bitfld.long 0x0 0. "DBMODE,Individual Debug Mode:" "0: Disabled,1: Enabled"
line.long 0x4 "IMPDTAEVCNTLIMIT14,"
hexmask.long 0x4 0.--31. 1. "LIMIT,Node counter target value."
line.long 0x8 "IMPDTAID14,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved."
hexmask.long.byte 0x8 16.--23. 1. "TRCMSG,User trace message for this component"
newline
hexmask.long.word 0x8 0.--15. 1. "TRCID,Configures the trace ID for this component"
rgroup.long 0x39C++0x7
line.long 0x0 "IMPDTASTAT14,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x0 1. "BRK,1: Component is stopped due to individual break. Bit is cleared if KICK is executed" "?,1: Component is stopped due to individual break"
newline
bitfld.long 0x0 0. "GLBBRK,1: Component is stopped due to global break." "?,1: Component is stopped due to global break"
line.long 0x4 "IMPDTAEVCNTVAL14,"
hexmask.long 0x4 0.--31. 1. "CNTVAL,Shows the current event counter value."
group.long 0x3D0++0xB
line.long 0x0 "IMPDTADBCTRL15,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x0 5. "DLY_KICK,DLY_KICK" "0: KICK is directly sent out,1: KICK is delayed till message has been.."
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bitfld.long 0x0 4. "MSGEN,Message EN" "0: Only Trace information,1: User message and trace information will be sent.."
bitfld.long 0x0 3. "KICK,Kick" "0: No Kick,1: Kick"
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bitfld.long 0x0 2. "EVCNTRES,Event Counter Reset" "0: no function,1: Counter reset"
bitfld.long 0x0 1. "TraceEN,Trace EN" "0: disabled,1: Trace information will be sent if wake up.."
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bitfld.long 0x0 0. "DBMODE,Individual Debug Mode:" "0: Disabled,1: Enabled"
line.long 0x4 "IMPDTAEVCNTLIMIT15,"
hexmask.long 0x4 0.--31. 1. "LIMIT,Node counter target value."
line.long 0x8 "IMPDTAID15,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved."
hexmask.long.byte 0x8 16.--23. 1. "TRCMSG,User trace message for this component"
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hexmask.long.word 0x8 0.--15. 1. "TRCID,Configures the trace ID for this component"
rgroup.long 0x3DC++0x7
line.long 0x0 "IMPDTASTAT15,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x0 1. "BRK,1: Component is stopped due to individual break. Bit is cleared if KICK is executed" "?,1: Component is stopped due to individual break"
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bitfld.long 0x0 0. "GLBBRK,1: Component is stopped due to global break." "?,1: Component is stopped due to global break"
line.long 0x4 "IMPDTAEVCNTVAL15,"
hexmask.long 0x4 0.--31. 1. "CNTVAL,Shows the current event counter value."
group.long 0x410++0xB
line.long 0x0 "IMPDTADBCTRL16,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x0 5. "DLY_KICK,DLY_KICK" "0: KICK is directly sent out,1: KICK is delayed till message has been.."
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bitfld.long 0x0 4. "MSGEN,Message EN" "0: Only Trace information,1: User message and trace information will be sent.."
bitfld.long 0x0 3. "KICK,Kick" "0: No Kick,1: Kick"
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bitfld.long 0x0 2. "EVCNTRES,Event Counter Reset" "0: no function,1: Counter reset"
bitfld.long 0x0 1. "TraceEN,Trace EN" "0: disabled,1: Trace information will be sent if wake up.."
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bitfld.long 0x0 0. "DBMODE,Individual Debug Mode:" "0: Disabled,1: Enabled"
line.long 0x4 "IMPDTAEVCNTLIMIT16,"
hexmask.long 0x4 0.--31. 1. "LIMIT,Node counter target value."
line.long 0x8 "IMPDTAID16,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved."
hexmask.long.byte 0x8 16.--23. 1. "TRCMSG,User trace message for this component"
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hexmask.long.word 0x8 0.--15. 1. "TRCID,Configures the trace ID for this component"
rgroup.long 0x41C++0x7
line.long 0x0 "IMPDTASTAT16,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x0 1. "BRK,1: Component is stopped due to individual break. Bit is cleared if KICK is executed" "?,1: Component is stopped due to individual break"
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bitfld.long 0x0 0. "GLBBRK,1: Component is stopped due to global break." "?,1: Component is stopped due to global break"
line.long 0x4 "IMPDTAEVCNTVAL16,"
hexmask.long 0x4 0.--31. 1. "CNTVAL,Shows the current event counter value."
group.long 0x450++0xB
line.long 0x0 "IMPDTADBCTRL17,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved."
bitfld.long 0x0 5. "DLY_KICK,DLY_KICK" "0: KICK is directly sent out,1: KICK is delayed till message has been.."
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bitfld.long 0x0 4. "MSGEN,Message EN" "0: Only Trace information,1: User message and trace information will be sent.."
bitfld.long 0x0 3. "KICK,Kick" "0: No Kick,1: Kick"
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bitfld.long 0x0 2. "EVCNTRES,Event Counter Reset" "0: no function,1: Counter reset"
bitfld.long 0x0 1. "TraceEN,Trace EN" "0: disabled,1: Trace information will be sent if wake up.."
newline
bitfld.long 0x0 0. "DBMODE,Individual Debug Mode:" "0: Disabled,1: Enabled"
line.long 0x4 "IMPDTAEVCNTLIMIT17,"
hexmask.long 0x4 0.--31. 1. "LIMIT,Node counter target value."
line.long 0x8 "IMPDTAID17,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved."
hexmask.long.byte 0x8 16.--23. 1. "TRCMSG,User trace message for this component"
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hexmask.long.word 0x8 0.--15. 1. "TRCID,Configures the trace ID for this component"
rgroup.long 0x45C++0x7
line.long 0x0 "IMPDTASTAT17,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x0 1. "BRK,1: Component is stopped due to individual break. Bit is cleared if KICK is executed" "?,1: Component is stopped due to individual break"
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bitfld.long 0x0 0. "GLBBRK,1: Component is stopped due to global break." "?,1: Component is stopped due to global break"
line.long 0x4 "IMPDTAEVCNTVAL17,"
hexmask.long 0x4 0.--31. 1. "CNTVAL,Shows the current event counter value."
tree.end
tree "IMP_PSC"
base ad:0xFFA84000
rgroup.long 0x0++0x3
line.long 0x0 "VCR,This register indicates the version of this module."
hexmask.long 0x0 0.--31. 1. "VER,Indicates the version of this module."
group.long 0x4++0x3
line.long 0x0 "SCTLR0,This register performs (software) reset control."
bitfld.long 0x0 31. "SWRST,Software reset" "0: Cancels a software reset for this module,1: Applies a software reset to this module"
hexmask.long 0x0 0.--30. 1. "Reserved_0,Reserve"
rgroup.long 0x8++0x3
line.long 0x0 "SR,IMP This register displays each status generated by PSC."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserve"
bitfld.long 0x0 16. "WUPCOVF,WUP counter overflow" "0: WUP overflow has not been occured,1: WUP overflow has been occured"
newline
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserve"
bitfld.long 0x0 10. "CLBRK,CL break status." "0: CL does not break,1: CL break"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserve" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "INT,Decoding of INT instruction/" "0: ;The INT instruction is not decoded,1: ;The INT instruction is decoded"
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bitfld.long 0x0 5. "IER,Decoding of illegal instruction or GOSUB overflow/underflow." "0: ;Illegal instruction is not decoded,1: ;Illegal instruction is decoded"
bitfld.long 0x0 4. "TRA,Decode TRAP instruction" "0: TRAP instruction is not decoded,1: TRAP instruction is decoded"
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bitfld.long 0x0 1.--3. "Reserved_1,Reserve" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "END,Image processing end of IMP PSC" "0: IMP PSC is not running or image processing is in..,1: IMP PSC image processing has ended"
group.long 0xC++0xF
line.long 0x0 "SCR,This register clears each status displayed in the SR register. Clearing is done by writing a 1. writing 0 is illegal."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserve"
bitfld.long 0x0 16. "WUPCOVFC,Clear the WUPOVF bit." "0,1"
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hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserve"
bitfld.long 0x0 10. "CLBRKC,CL break status clear." "0,1"
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rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "INTC,Clear the INT bit" "0,1"
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bitfld.long 0x0 5. "IERC,Clear the IER bit" "0,1"
bitfld.long 0x0 4. "TRAC,Clear TRA bit" "0,1"
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rbitfld.long 0x0 1.--3. "Reserved_1,Reserve" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "ENDC,Clear the END bit" "0,1"
line.long 0x4 "SER,The bits of this register are used to set whether to reflect the status of the corresponding SR register bit."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserve"
bitfld.long 0x4 16. "WUPCOVFE,WUPOVF bit set enable" "0: Even if the WUP overflow is detected,1: When WUP overflow is detected"
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hexmask.long.byte 0x4 11.--15. 1. "Reserved_11,Reserve"
bitfld.long 0x4 10. "CLBRKE,CL break status/CL break enable." "0: CL break disable,1: CL break enable"
newline
rbitfld.long 0x4 7.--9. "Reserved_7,Reserve" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 6. "INTE,INT bit set enable" "0: Even if the INT instruction is decoded,1: When the INT instruction is decoded"
newline
bitfld.long 0x4 5. "IERE,Set IER bit Enable" "0: Even if an illegal instruction is decoded,1: When an illegal instruction is decoded"
bitfld.long 0x4 4. "TRAE,TRA bit set enable" "0: Even if the TRAP instruction is decoded,1: When the TRAP instruction is decoded"
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rbitfld.long 0x4 1.--3. "Reserved_1,Reserve" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0. "ENDE,END bit set enable" "0: Even after IMP PSC image processing is completed,1: When image processing of IMP PSC is completed"
line.long 0x8 "IMR,It is a register that sets whether to generate an interrupt to CPU based on the internal interrupt cause or whether to mask the internal interrupt cause."
hexmask.long.word 0x8 17.--31. 1. "Reserved_17,Reserve"
bitfld.long 0x8 16. "WUPCOVFM,Interrupt mask setting by WUPOVF status" "0: Interrupt generation by WUPOVF is not masked,1: Interrupt generation by WUPOVF is masked"
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hexmask.long.byte 0x8 11.--15. 1. "Reserved_11,Reserve"
bitfld.long 0x8 10. "CLBRKM,Mask setting of interrupt by CLBRK status" "0: The generation of CLBRK interrupt is not masked,1: The generation of CLBRK interrupt is masked"
newline
rbitfld.long 0x8 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 6. "INTM,Interrupt mask setting by INT status" "0: Interrupt generation by INT is not masked,1: Interrupt generation by INT is masked"
newline
bitfld.long 0x8 5. "IERM,Interrupt mask setting by IER status" "0: Interrupt generation by IER is not masked,1: Interrupt generation by IER is masked"
bitfld.long 0x8 4. "TRAM,Interrupt mask setting by TRA status" "0: Interrupt generation by TRA is not masked,1: Interrupt generation by TRA is masked"
newline
rbitfld.long 0x8 1.--3. "Reserved_1,Reserve" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0. "ENDM,Interrupt mask setting by END status" "0: Interrupt generation by END is not masked,1: Interrupt generation by END is masked"
line.long 0xC "SCTLR1,It is a register that controls activation of CL."
hexmask.long 0xC 1.--31. 1. "Reserved_1,Reserve"
bitfld.long 0xC 0. "CLE,IMP PSC CL (Command List) activation bit" "0: CL is not running,1: CL is running"
group.long 0x38++0x3
line.long 0x0 "CLSAR,This register sets the start address for fetching CL."
hexmask.long 0x0 2.--31. 1. "CLSAR,Start address of CL"
rbitfld.long 0x0 0.--1. "Reserved_0,Reserve" "0,1,2,3"
rgroup.long 0x3C++0x3
line.long 0x0 "SR1,This register displays the code value when IMP PSC executes INT and TRAP instructions."
hexmask.long.byte 0x0 24.--31. 1. "INTCODE,INT interrupt code"
hexmask.long.byte 0x0 16.--23. 1. "TRAPCODE,TRAP interrupt code"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserve"
rgroup.long 0x44++0x7
line.long 0x0 "CLFAR,This register displays the address of the CL fetch destination (running)."
hexmask.long 0x0 2.--31. 1. "CLFAR,Displays the CL fetch destination address (running)."
bitfld.long 0x0 0.--1. "Reserved_0,Reserve" "0,1,2,3"
line.long 0x4 "CLEIR,This register displays the command being executed by CL."
hexmask.long 0x4 0.--31. 1. "CLEIR,Display the command being executed by the CL."
group.long 0x58++0x3
line.long 0x0 "SYNCCR0,This register specifies the module corresponding to bits 0 to 3 of the SYNCC enable field of WUP or SLP instruction."
hexmask.long.byte 0x0 24.--31. 1. "SYNCC3,This register is used to specify the correlated module for Bit 3 of the SYNCC enable field of the WUP  SLP instruction."
hexmask.long.byte 0x0 16.--23. 1. "SYNCC2,This register is used to specify the correlated module for Bit 2 of the SYNCC enable field of the WUP  SLP instruction."
newline
hexmask.long.byte 0x0 8.--15. 1. "SYNCC1,This register is used to specify the correlated module for Bit 1 of the SYNCC enable field of the WUP  SLP instruction."
hexmask.long.byte 0x0 0.--7. 1. "SYNCC0,This register is used to specify the correlated module for Bit 0 of the SYNCC enable field of the WUP  SLP instruction."
group.long 0x60++0xB
line.long 0x0 "SYNCCR1,This register specifies the module corresponding to bits 4 to 7 of the SYNCC enable field of WUP or SLP instruction."
hexmask.long.byte 0x0 24.--31. 1. "SYNCC7,This register is used to specify the correlated module for Bit 7 of the SYNCC enable field of the WUP  SLP instruction."
hexmask.long.byte 0x0 16.--23. 1. "SYNCC6,This register is used to specify the correlated module for Bit 6 of the SYNCC enable field of the WUP  SLP instruction."
newline
hexmask.long.byte 0x0 8.--15. 1. "SYNCC5,This register is used to specify the correlated module for Bit 5 of the SYNCC enable field of the WUP  SLP instruction."
hexmask.long.byte 0x0 0.--7. 1. "SYNCC4,This register is used to specify the correlated module for Bit 4 of the SYNCC enable field of the WUP  SLP instruction."
line.long 0x4 "SYNCCR2,This register specifies the module corresponding to bits 8 to 11 of the SYNCC enable field of WUP or SLP instruction."
hexmask.long.byte 0x4 24.--31. 1. "SYNCC11,This register is used to specify the correlated module for Bit 11 of the SYNCC enable field of the WUP  SLP instruction."
hexmask.long.byte 0x4 16.--23. 1. "SYNCC10,This register is used to specify the correlated module for Bit 10 of the SYNCC enable field of the WUP  SLP instruction."
newline
hexmask.long.byte 0x4 8.--15. 1. "SYNCC9,This register is used to specify the correlated module for Bit 9 of the SYNCC enable field of the WUP  SLP instruction."
hexmask.long.byte 0x4 0.--7. 1. "SYNCC8,This register is used to specify the correlated module for Bit 8 of the SYNCC enable field of the WUP  SLP instruction."
line.long 0x8 "SYNCCR3,This register specifies the module corresponding to bits 12 to 15 of the SYNCC enable field of WUP or SLP instruction."
hexmask.long.byte 0x8 24.--31. 1. "SYNCC15,This register is used to specify the correlated module for Bit 15 of the SYNCC enable field of the WUP  SLP instruction."
hexmask.long.byte 0x8 16.--23. 1. "SYNCC14,This register is used to specify the correlated module for Bit 14 of the SYNCC enable field of the WUP  SLP instruction."
newline
hexmask.long.byte 0x8 8.--15. 1. "SYNCC13,This register is used to specify the correlated module for Bit 13 of the SYNCC enable field of the WUP  SLP instruction."
hexmask.long.byte 0x8 0.--7. 1. "SYNCC12,This register is used to specify the correlated module for Bit 12 of the SYNCC enable field of the WUP  SLP instruction."
group.long 0xE8++0x7
line.long 0x0 "PCR,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "IFBSYCNTENB,IFID operation count enable" "0,1"
newline
bitfld.long 0x0 0. "IBSYCNTENB,Image operation count enable" "0,1"
line.long 0x4 "PBSYCNTR,"
hexmask.long 0x4 0.--31. 1. "PBSYCNTR,This register count cycles during operation"
group.long 0x100++0x2B
line.long 0x0 "SSAR,This register sets the start address of the Source image to be read from DDR-SDRAM or Internal memory."
hexmask.long 0x0 0.--31. 1. "SSAR,Set the start address of the source image in byte units."
line.long 0x4 "SLR,This register sets the reading size of the Source image from the DDR-SDRAM or Internal memory."
rbitfld.long 0x4 29.--31. "Reserved_29,Reserve" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 16.--28. 1. "YLNG,Please specify the number of lines in the Y direction of the Source image."
newline
rbitfld.long 0x4 13.--15. "Reserved_13,Reserve" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 0.--12. 1. "XLNG,Please specify the number of pixels in the X direction of the Source image."
line.long 0x8 "SSTR,This register sets the stride of the Source image to be read from DDR-SDRAM or Internal memory."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserve"
hexmask.long.word 0x8 0.--15. 1. "SSTR,Sets the stride of the source image in unsigned byte units."
line.long 0xC "DSAR0,This register sets the start address of the Destination image to be written to in DDR-SDRAM or Internal memory."
hexmask.long 0xC 0.--31. 1. "DSARn,Please set the start address of the Destination image in byte units."
line.long 0x10 "DSAR1,This register sets the start address of the Destination image to be written to in DDR-SDRAM or Internal memory."
hexmask.long 0x10 0.--31. 1. "DSARn,Please set the start address of the Destination image in byte units."
line.long 0x14 "DSAR2,This register sets the start address of the Destination image to be written to in DDR-SDRAM or Internal memory."
hexmask.long 0x14 0.--31. 1. "DSARn,Please set the start address of the Destination image in byte units."
line.long 0x18 "DSAR3,This register sets the start address of the Destination image to be written to in DDR-SDRAM or Internal memory."
hexmask.long 0x18 0.--31. 1. "DSARn,Please set the start address of the Destination image in byte units."
line.long 0x1C "DSTR0,This register sets the stride of the Destination image to be written to in DDR-SDRAM or Internal memory."
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserve"
hexmask.long.word 0x1C 0.--15. 1. "DSTRn,Sets the stride of the Destination image in unsigned byte units."
line.long 0x20 "DSTR1,This register sets the stride of the Destination image to be written to in DDR-SDRAM or Internal memory."
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserve"
hexmask.long.word 0x20 0.--15. 1. "DSTRn,Sets the stride of the Destination image in unsigned byte units."
line.long 0x24 "DSTR2,This register sets the stride of the Destination image to be written to in DDR-SDRAM or Internal memory."
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserve"
hexmask.long.word 0x24 0.--15. 1. "DSTRn,Sets the stride of the Destination image in unsigned byte units."
line.long 0x28 "DSTR3,This register sets the stride of the Destination image to be written to in DDR-SDRAM or Internal memory."
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserve"
hexmask.long.word 0x28 0.--15. 1. "DSTRn,Sets the stride of the Destination image in unsigned byte units."
group.long 0x130++0x17
line.long 0x0 "DLNGR0,This register sets the size of the Destination image to be written to in DDR-SDRAM or Internal memory."
rbitfld.long 0x0 29.--31. "Reserved_29,Reserve" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 16.--28. 1. "DYLNGn,Please specify the number of lines in the Y direction of the Destination image."
newline
rbitfld.long 0x0 13.--15. "Reserved_13,Reserve" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 0.--12. 1. "DXLNGn,Please specify the number of pixels in the X direction of the Destination image."
line.long 0x4 "DLNGR1,This register sets the size of the Destination image to be written to in DDR-SDRAM or Internal memory."
rbitfld.long 0x4 29.--31. "Reserved_29,Reserve" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 16.--28. 1. "DYLNGn,Please specify the number of lines in the Y direction of the Destination image."
newline
rbitfld.long 0x4 13.--15. "Reserved_13,Reserve" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 0.--12. 1. "DXLNGn,Please specify the number of pixels in the X direction of the Destination image."
line.long 0x8 "DLNGR2,This register sets the size of the Destination image to be written to in DDR-SDRAM or Internal memory."
rbitfld.long 0x8 29.--31. "Reserved_29,Reserve" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x8 16.--28. 1. "DYLNGn,Please specify the number of lines in the Y direction of the Destination image."
newline
rbitfld.long 0x8 13.--15. "Reserved_13,Reserve" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x8 0.--12. 1. "DXLNGn,Please specify the number of pixels in the X direction of the Destination image."
line.long 0xC "DLNGR3,This register sets the size of the Destination image to be written to in DDR-SDRAM or Internal memory."
rbitfld.long 0xC 29.--31. "Reserved_29,Reserve" "0,1,2,3,4,5,6,7"
hexmask.long.word 0xC 16.--28. 1. "DYLNGn,Please specify the number of lines in the Y direction of the Destination image."
newline
rbitfld.long 0xC 13.--15. "Reserved_13,Reserve" "0,1,2,3,4,5,6,7"
hexmask.long.word 0xC 0.--12. 1. "DXLNGn,Please specify the number of pixels in the X direction of the Destination image."
line.long 0x10 "DCTLR,This register specifies the pixel format of the Source image and Destination images."
hexmask.long.byte 0x10 28.--31. 1. "PFSRC,Specify the pixel format of the Source image."
hexmask.long.word 0x10 16.--27. 1. "Reserved_16,Reserve"
newline
hexmask.long.byte 0x10 12.--15. 1. "PFDST,Specifies the pixel format of the Destination image."
hexmask.long.word 0x10 0.--11. 1. "Reserved_0,Reserve"
line.long 0x14 "EXCTLR,It is a register that controls startup of IMP PSC."
bitfld.long 0x14 31. "EX,IMP PSC activation bit" "0: IMP PSC is not activated,1: IMP PSC is running"
hexmask.long 0x14 0.--30. 1. "Reserved_0,Reserve"
rgroup.long 0x148++0x3
line.long 0x0 "EXCNTR,This register displays the number of output lines of the Destination imageand#12290;"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserve"
hexmask.long.word 0x0 0.--13. 1. "EXCNT,Displays the number of output lines of the Destination image."
group.long 0x180++0xF
line.long 0x0 "DAER0,"
hexmask.long 0x0 0.--31. 1. "DAERn,DAER 0: Destination address of output image 0 bit Enable"
line.long 0x4 "DAER1,"
hexmask.long 0x4 0.--31. 1. "DAERn,DAER 0: Destination address of output image 0 bit Enable"
line.long 0x8 "DAER2,"
hexmask.long 0x8 0.--31. 1. "DAERn,DAER 0: Destination address of output image 0 bit Enable"
line.long 0xC "DAER3,"
hexmask.long 0xC 0.--31. 1. "DAERn,DAER 0: Destination address of output image 0 bit Enable"
group.long 0x200++0x13
line.long 0x0 "SPR,Scaling operation setting register of IMP PSC."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserve"
hexmask.long.byte 0x0 0.--3. 1. "SURFACE_3_0,Depending on the number of Destination images to be outputted  set the output image 0 to 3 to be used as follows."
line.long 0x4 "SRYDR0,This register sets the magnification in the Y direction."
hexmask.long.tbyte 0x4 10.--31. 1. "RATY,Set the magnification in Y direction according to Source image size / Destination image size."
hexmask.long.word 0x4 0.--9. 1. "Reserved_0,Reserve"
line.long 0x8 "SRXDR0,This register sets the magnification in the X direction."
hexmask.long.tbyte 0x8 10.--31. 1. "RATX,Set the magnification in the X direction according to the Source image size / Destination image size."
hexmask.long.word 0x8 0.--9. 1. "Reserved_0,Reserve"
line.long 0xC "SOYDR0,This register specifies the start offset for reading the source image in the Y direction."
rbitfld.long 0xC 31. "Reserved_31,Reserve" "0,1"
hexmask.long.tbyte 0xC 10.--30. 1. "YOFS,Specify the offset value in the Y direction at the start of processing."
newline
hexmask.long.word 0xC 0.--9. 1. "Reserved_0,Reserve"
line.long 0x10 "SOXDR0,This register specifies the start offset for reading the source image in the X direction."
rbitfld.long 0x10 31. "Reserved_31,Reserve" "0,1"
hexmask.long.tbyte 0x10 10.--30. 1. "XOFS,Specify the offset value in the X direction at the start of processing."
newline
hexmask.long.word 0x10 0.--9. 1. "Reserved_0,Reserve"
group.long 0x21C++0xF
line.long 0x0 "SRYDR1,This register sets the magnification in the Y direction."
hexmask.long.tbyte 0x0 10.--31. 1. "RATY,Set the magnification in Y direction according to Source image size / Destination image size."
hexmask.long.word 0x0 0.--9. 1. "Reserved_0,Reserve"
line.long 0x4 "SRXDR1,This register sets the magnification in the X direction."
hexmask.long.tbyte 0x4 10.--31. 1. "RATX,Set the magnification in the X direction according to the Source image size / Destination image size."
hexmask.long.word 0x4 0.--9. 1. "Reserved_0,Reserve"
line.long 0x8 "SOYDR1,This register specifies the start offset for reading the source image in the Y direction."
rbitfld.long 0x8 31. "Reserved_31,Reserve" "0,1"
hexmask.long.tbyte 0x8 10.--30. 1. "YOFS,Specify the offset value in the Y direction at the start of processing."
newline
hexmask.long.word 0x8 0.--9. 1. "Reserved_0,Reserve"
line.long 0xC "SOXDR1,This register specifies the start offset for reading the source image in the X direction."
rbitfld.long 0xC 31. "Reserved_31,Reserve" "0,1"
hexmask.long.tbyte 0xC 10.--30. 1. "XOFS,Specify the offset value in the X direction at the start of processing."
newline
hexmask.long.word 0xC 0.--9. 1. "Reserved_0,Reserve"
group.long 0x234++0xF
line.long 0x0 "SRYDR2,This register sets the magnification in the Y direction."
hexmask.long.tbyte 0x0 10.--31. 1. "RATY,Set the magnification in Y direction according to Source image size / Destination image size."
hexmask.long.word 0x0 0.--9. 1. "Reserved_0,Reserve"
line.long 0x4 "SRXDR2,This register sets the magnification in the X direction."
hexmask.long.tbyte 0x4 10.--31. 1. "RATX,Set the magnification in the X direction according to the Source image size / Destination image size."
hexmask.long.word 0x4 0.--9. 1. "Reserved_0,Reserve"
line.long 0x8 "SOYDR2,This register specifies the start offset for reading the source image in the Y direction."
rbitfld.long 0x8 31. "Reserved_31,Reserve" "0,1"
hexmask.long.tbyte 0x8 10.--30. 1. "YOFS,Specify the offset value in the Y direction at the start of processing."
newline
hexmask.long.word 0x8 0.--9. 1. "Reserved_0,Reserve"
line.long 0xC "SOXDR2,This register specifies the start offset for reading the source image in the X direction."
rbitfld.long 0xC 31. "Reserved_31,Reserve" "0,1"
hexmask.long.tbyte 0xC 10.--30. 1. "XOFS,Specify the offset value in the X direction at the start of processing."
newline
hexmask.long.word 0xC 0.--9. 1. "Reserved_0,Reserve"
group.long 0x24C++0xF
line.long 0x0 "SRYDR3,This register sets the magnification in the Y direction."
hexmask.long.tbyte 0x0 10.--31. 1. "RATY,Set the magnification in Y direction according to Source image size / Destination image size."
hexmask.long.word 0x0 0.--9. 1. "Reserved_0,Reserve"
line.long 0x4 "SRXDR3,This register sets the magnification in the X direction."
hexmask.long.tbyte 0x4 10.--31. 1. "RATX,Set the magnification in the X direction according to the Source image size / Destination image size."
hexmask.long.word 0x4 0.--9. 1. "Reserved_0,Reserve"
line.long 0x8 "SOYDR3,This register specifies the start offset for reading the source image in the Y direction."
rbitfld.long 0x8 31. "Reserved_31,Reserve" "0,1"
hexmask.long.tbyte 0x8 10.--30. 1. "YOFS,Specify the offset value in the Y direction at the start of processing."
newline
hexmask.long.word 0x8 0.--9. 1. "Reserved_0,Reserve"
line.long 0xC "SOXDR3,This register specifies the start offset for reading the source image in the X direction."
rbitfld.long 0xC 31. "Reserved_31,Reserve" "0,1"
hexmask.long.tbyte 0xC 10.--30. 1. "XOFS,Specify the offset value in the X direction at the start of processing."
newline
hexmask.long.word 0xC 0.--9. 1. "Reserved_0,Reserve"
group.long 0x264++0xF
line.long 0x0 "BMDR0,It is a register that controls blend of pixels (bilinear interpolation operation)and#12290;"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserve"
bitfld.long 0x0 1. "RNDM,When shrinking in X direction  this bit is used for masking the rounding with bilinear interpolation calculation." "0: Perform rounding processing,1: Mask rounding processing"
newline
bitfld.long 0x0 0. "BLDM,When shrinking in X direction  this bit is used for masking the bilinear interpolation calculation." "0: Bilinear interpolation operation is executed,1: Mask bilinear interpolation operation"
line.long 0x4 "BMDR1,It is a register that controls blend of pixels (bilinear interpolation operation)and#12290;"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserve"
bitfld.long 0x4 1. "RNDM,When shrinking in X direction  this bit is used for masking the rounding with bilinear interpolation calculation." "0: Perform rounding processing,1: Mask rounding processing"
newline
bitfld.long 0x4 0. "BLDM,When shrinking in X direction  this bit is used for masking the bilinear interpolation calculation." "0: Bilinear interpolation operation is executed,1: Mask bilinear interpolation operation"
line.long 0x8 "BMDR2,It is a register that controls blend of pixels (bilinear interpolation operation)and#12290;"
hexmask.long 0x8 2.--31. 1. "Reserved_2,Reserve"
bitfld.long 0x8 1. "RNDM,When shrinking in X direction  this bit is used for masking the rounding with bilinear interpolation calculation." "0: Perform rounding processing,1: Mask rounding processing"
newline
bitfld.long 0x8 0. "BLDM,When shrinking in X direction  this bit is used for masking the bilinear interpolation calculation." "0: Bilinear interpolation operation is executed,1: Mask bilinear interpolation operation"
line.long 0xC "BMDR3,It is a register that controls blend of pixels (bilinear interpolation operation)and#12290;"
hexmask.long 0xC 2.--31. 1. "Reserved_2,Reserve"
bitfld.long 0xC 1. "RNDM,When shrinking in X direction  this bit is used for masking the rounding with bilinear interpolation calculation." "0: Perform rounding processing,1: Mask rounding processing"
newline
bitfld.long 0xC 0. "BLDM,When shrinking in X direction  this bit is used for masking the bilinear interpolation calculation." "0: Bilinear interpolation operation is executed,1: Mask bilinear interpolation operation"
group.long 0x3F4++0x3
line.long 0x0 "CLBRKADDRR,"
hexmask.long 0x0 0.--31. 1. "CLBRKADDRR,CL break address. Specify the address(break point) of command list."
group.long 0x3FC++0x3
line.long 0x0 "CLCNDGSBR,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CLCNDGSBR,Condition for conditional GOSUB instruction:" "0: GOSUB is not executed,1: GOSUB is executed"
tree.end
tree "IMP_X7_SYS (IMP-X7 System)"
base ad:0x0
tree "IMP_X7_System_IMPSLV_0"
base ad:0xFF900000
rgroup.long 0x0++0x3
line.long 0x0 "VCR,"
hexmask.long 0x0 0.--31. 1. "VCR,Version information."
rgroup.long 0x10++0x3
line.long 0x0 "INTSTS0,Each bit field shows the interrupt status of the corresponded to IP. This register is related to 1st/2nd/3rd interrupt signals."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "ID20,Corresponding to Group 02" "0,1"
bitfld.long 0x0 19. "ID19,Corresponding to Group 01" "0,1"
bitfld.long 0x0 18. "ID18,Corresponding to Group 00" "0,1"
bitfld.long 0x0 17. "ID17,Corresponding to IMP Slim DMAC ch1/thread1" "0,1"
newline
bitfld.long 0x0 16. "ID16,Corresponding to IMP Slim DMAC ch1/thread0" "0,1"
bitfld.long 0x0 15. "ID15,Corresponding to IMP Slim DMAC ch0/thread1" "0,1"
bitfld.long 0x0 14. "ID14,Corresponding to IMP Slim DMAC ch0/thread0" "0,1"
bitfld.long 0x0 13. "ID13,Corresponding to CNN" "0,1"
bitfld.long 0x0 12. "ID12,Corresponding to light CVe cluster2" "0,1"
newline
bitfld.long 0x0 11. "ID11,Corresponding to light CVe cluster1" "0,1"
bitfld.long 0x0 10. "ID10,Corresponding to light CVe cluster0" "0,1"
bitfld.long 0x0 9. "ID09,Corresponding to CVe cluster0" "0,1"
bitfld.long 0x0 8. "ID08,Corresponding to IMP DMAC ch1/thread1" "0,1"
bitfld.long 0x0 7. "ID07,Corresponding to IMP DMAC ch1/thread0" "0,1"
newline
bitfld.long 0x0 6. "ID06,Corresponding to IMP DMAC ch0/thread1" "0,1"
bitfld.long 0x0 5. "ID05,Corresponding to IMP DMAC ch0/thread0" "0,1"
bitfld.long 0x0 4. "ID04,Corresponding to PSC" "0,1"
bitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
bitfld.long 0x0 1. "ID01,Corresponding to IMP Core ch1" "0,1"
newline
bitfld.long 0x0 0. "ID00,Corresponding to IMP Core ch0" "0,1"
group.long 0x20++0xB
line.long 0x0 "INTEN00,This register is related to 1st interrupt signal. Each bit field has the output enabling function of the interrupt which is issued by the corresponded IP."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "ID20,Corresponding to Group 02" "0,1"
bitfld.long 0x0 19. "ID19,Corresponding to Group 01" "0,1"
bitfld.long 0x0 18. "ID18,Corresponding to Group 00" "0,1"
bitfld.long 0x0 17. "ID17,Corresponding to IMP Slim DMAC ch1/thread1" "0,1"
newline
bitfld.long 0x0 16. "ID16,Corresponding to IMP Slim DMAC ch1/thread0" "0,1"
bitfld.long 0x0 15. "ID15,Corresponding to IMP Slim DMAC ch0/thread1" "0,1"
bitfld.long 0x0 14. "ID14,Corresponding to IMP Slim DMAC ch0/thread0" "0,1"
bitfld.long 0x0 13. "ID13,Corresponding to CNN" "0,1"
bitfld.long 0x0 12. "ID12,Corresponding to light CVe cluster2" "0,1"
newline
bitfld.long 0x0 11. "ID11,Corresponding to light CVe cluster1" "0,1"
bitfld.long 0x0 10. "ID10,Corresponding to light CVe cluster0" "0,1"
bitfld.long 0x0 9. "ID09,Corresponding to CVe cluster0" "0,1"
bitfld.long 0x0 8. "ID08,Corresponding to IMP DMAC ch1/thread1" "0,1"
bitfld.long 0x0 7. "ID07,Corresponding to IMP DMAC ch1/thread0" "0,1"
newline
bitfld.long 0x0 6. "ID06,Corresponding to IMP DMAC ch0/thread1" "0,1"
bitfld.long 0x0 5. "ID05,Corresponding to IMP DMAC ch0/thread0" "0,1"
bitfld.long 0x0 4. "ID04,Corresponding to PSC" "0,1"
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
bitfld.long 0x0 1. "ID01,Corresponding to IMP Core ch1" "0,1"
newline
bitfld.long 0x0 0. "ID00,Corresponding to IMP Core ch0" "0,1"
line.long 0x4 "INTEN01,This register is related to 2nd interrupt signal. Each bit field has the output enabling function of the interrupt which is issued by the corresponded IP."
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "ID20,Corresponding to Group 02" "0,1"
bitfld.long 0x4 19. "ID19,Corresponding to Group 01" "0,1"
bitfld.long 0x4 18. "ID18,Corresponding to Group 00" "0,1"
bitfld.long 0x4 17. "ID17,Corresponding to IMP Slim DMAC ch1/thread1" "0,1"
newline
bitfld.long 0x4 16. "ID16,Corresponding to IMP Slim DMAC ch1/thread0" "0,1"
bitfld.long 0x4 15. "ID15,Corresponding to IMP Slim DMAC ch0/thread1" "0,1"
bitfld.long 0x4 14. "ID14,Corresponding to IMP Slim DMAC ch0/thread0" "0,1"
bitfld.long 0x4 13. "ID13,Corresponding to CNN" "0,1"
bitfld.long 0x4 12. "ID12,Corresponding to light CVe cluster2" "0,1"
newline
bitfld.long 0x4 11. "ID11,Corresponding to light CVe cluster1" "0,1"
bitfld.long 0x4 10. "ID10,Corresponding to light CVe cluster0" "0,1"
bitfld.long 0x4 9. "ID09,Corresponding to CVe cluster0" "0,1"
bitfld.long 0x4 8. "ID08,Corresponding to IMP DMAC ch1/thread1" "0,1"
bitfld.long 0x4 7. "ID07,Corresponding to IMP DMAC ch1/thread0" "0,1"
newline
bitfld.long 0x4 6. "ID06,Corresponding to IMP DMAC ch0/thread1" "0,1"
bitfld.long 0x4 5. "ID05,Corresponding to IMP DMAC ch0/thread0" "0,1"
bitfld.long 0x4 4. "ID04,Corresponding to PSC" "0,1"
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
bitfld.long 0x4 1. "ID01,Corresponding to IMP Core ch1" "0,1"
newline
bitfld.long 0x4 0. "ID00,Corresponding to IMP Core ch0" "0,1"
line.long 0x8 "INTEN02,This register is related to 3rd interrupt signal. Each bit field has the output enabling function of the interrupt which is issued by the corresponded IP."
hexmask.long.word 0x8 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x8 20. "ID20,Corresponding to Group 02" "0,1"
bitfld.long 0x8 19. "ID19,Corresponding to Group 01" "0,1"
bitfld.long 0x8 18. "ID18,Corresponding to Group 00" "0,1"
bitfld.long 0x8 17. "ID17,Corresponding to IMP Slim DMAC ch1/thread1" "0,1"
newline
bitfld.long 0x8 16. "ID16,Corresponding to IMP Slim DMAC ch1/thread0" "0,1"
bitfld.long 0x8 15. "ID15,Corresponding to IMP Slim DMAC ch0/thread1" "0,1"
bitfld.long 0x8 14. "ID14,Corresponding to IMP Slim DMAC ch0/thread0" "0,1"
bitfld.long 0x8 13. "ID13,Corresponding to CNN" "0,1"
bitfld.long 0x8 12. "ID12,Corresponding to light CVe cluster2" "0,1"
newline
bitfld.long 0x8 11. "ID11,Corresponding to light CVe cluster1" "0,1"
bitfld.long 0x8 10. "ID10,Corresponding to light CVe cluster0" "0,1"
bitfld.long 0x8 9. "ID09,Corresponding to CVe cluster0" "0,1"
bitfld.long 0x8 8. "ID08,Corresponding to IMP DMAC ch1/thread1" "0,1"
bitfld.long 0x8 7. "ID07,Corresponding to IMP DMAC ch1/thread0" "0,1"
newline
bitfld.long 0x8 6. "ID06,Corresponding to IMP DMAC ch0/thread1" "0,1"
bitfld.long 0x8 5. "ID05,Corresponding to IMP DMAC ch0/thread0" "0,1"
bitfld.long 0x8 4. "ID04,Corresponding to PSC" "0,1"
rbitfld.long 0x8 2.--3. "Reserved_2,Reserved" "0,1,2,3"
bitfld.long 0x8 1. "ID01,Corresponding to IMP Core ch1" "0,1"
newline
bitfld.long 0x8 0. "ID00,Corresponding to IMP Core ch0" "0,1"
group.long 0x30++0xB
line.long 0x0 "G00INTSEL,This register has the selecting function of the grouping interrupt double_quotationGroup 00double_quotation. Each bit field is corresponded to each IP."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "ID17,Corresponding to IMP Slim DMAC ch1/thread1" "0,1"
bitfld.long 0x0 16. "ID16,Corresponding to IMP Slim DMAC ch1/thread0" "0,1"
bitfld.long 0x0 15. "ID15,Corresponding to IMP Slim DMAC ch0/thread1" "0,1"
bitfld.long 0x0 14. "ID14,Corresponding to IMP Slim DMAC ch0/thread0" "0,1"
newline
bitfld.long 0x0 13. "ID13,Corresponding to CNN" "0,1"
bitfld.long 0x0 12. "ID12,Corresponding to light CVe cluster2" "0,1"
bitfld.long 0x0 11. "ID11,Corresponding to light CVe cluster1" "0,1"
bitfld.long 0x0 10. "ID10,Corresponding to light CVe cluster0" "0,1"
bitfld.long 0x0 9. "ID09,Corresponding to CVe cluster0" "0,1"
newline
bitfld.long 0x0 8. "ID08,Corresponding to IMP DMAC ch1/thread1" "0,1"
bitfld.long 0x0 7. "ID07,Corresponding to IMP DMAC ch1/thread0" "0,1"
bitfld.long 0x0 6. "ID06,Corresponding to IMP DMAC ch0/thread1" "0,1"
bitfld.long 0x0 5. "ID05,Corresponding to IMP DMAC ch0/thread0" "0,1"
bitfld.long 0x0 4. "ID04,Corresponding to PSC" "0,1"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
bitfld.long 0x0 1. "ID01,Corresponding to IMP Core ch1" "0,1"
bitfld.long 0x0 0. "ID00,Corresponding to IMP Core ch0" "0,1"
line.long 0x4 "G01INTSEL,This register has the selecting function of the grouping interrupt double_quotationGroup 01double_quotation. Each bit field is corresponded to each IP."
hexmask.long.word 0x4 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x4 17. "ID17,Corresponding to IMP Slim DMAC ch1/thread1" "0,1"
bitfld.long 0x4 16. "ID16,Corresponding to IMP Slim DMAC ch1/thread0" "0,1"
bitfld.long 0x4 15. "ID15,Corresponding to IMP Slim DMAC ch0/thread1" "0,1"
bitfld.long 0x4 14. "ID14,Corresponding to IMP Slim DMAC ch0/thread0" "0,1"
newline
bitfld.long 0x4 13. "ID13,Corresponding to CNN" "0,1"
bitfld.long 0x4 12. "ID12,Corresponding to light CVe cluster2" "0,1"
bitfld.long 0x4 11. "ID11,Corresponding to light CVe cluster1" "0,1"
bitfld.long 0x4 10. "ID10,Corresponding to light CVe cluster0" "0,1"
bitfld.long 0x4 9. "ID09,Corresponding to CVe cluster0" "0,1"
newline
bitfld.long 0x4 8. "ID08,Corresponding to IMP DMAC ch1/thread1" "0,1"
bitfld.long 0x4 7. "ID07,Corresponding to IMP DMAC ch1/thread0" "0,1"
bitfld.long 0x4 6. "ID06,Corresponding to IMP DMAC ch0/thread1" "0,1"
bitfld.long 0x4 5. "ID05,Corresponding to IMP DMAC ch0/thread0" "0,1"
bitfld.long 0x4 4. "ID04,Corresponding to PSC" "0,1"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
bitfld.long 0x4 1. "ID01,Corresponding to IMP Core ch1" "0,1"
bitfld.long 0x4 0. "ID00,Corresponding to IMP Core ch0" "0,1"
line.long 0x8 "G02INTSEL,This register has the selecting function of the grouping interrupt double_quotationGroup 02double_quotation. Each bit field is corresponded to each IP."
hexmask.long.word 0x8 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x8 17. "ID17,Corresponding to IMP Slim DMAC ch1/thread1" "0,1"
bitfld.long 0x8 16. "ID16,Corresponding to IMP Slim DMAC ch1/thread0" "0,1"
bitfld.long 0x8 15. "ID15,Corresponding to IMP Slim DMAC ch0/thread1" "0,1"
bitfld.long 0x8 14. "ID14,Corresponding to IMP Slim DMAC ch0/thread0" "0,1"
newline
bitfld.long 0x8 13. "ID13,Corresponding to CNN" "0,1"
bitfld.long 0x8 12. "ID12,Corresponding to light CVe cluster2" "0,1"
bitfld.long 0x8 11. "ID11,Corresponding to light CVe cluster1" "0,1"
bitfld.long 0x8 10. "ID10,Corresponding to light CVe cluster0" "0,1"
bitfld.long 0x8 9. "ID09,Corresponding to CVe cluster0" "0,1"
newline
bitfld.long 0x8 8. "ID08,Corresponding to IMP DMAC ch1/thread1" "0,1"
bitfld.long 0x8 7. "ID07,Corresponding to IMP DMAC ch1/thread0" "0,1"
bitfld.long 0x8 6. "ID06,Corresponding to IMP DMAC ch0/thread1" "0,1"
bitfld.long 0x8 5. "ID05,Corresponding to IMP DMAC ch0/thread0" "0,1"
bitfld.long 0x8 4. "ID04,Corresponding to PSC" "0,1"
newline
rbitfld.long 0x8 2.--3. "Reserved_2,Reserved" "0,1,2,3"
bitfld.long 0x8 1. "ID01,Corresponding to IMP Core ch1" "0,1"
bitfld.long 0x8 0. "ID00,Corresponding to IMP Core ch0" "0,1"
rgroup.long 0xC0++0x3
line.long 0x0 "FSERRBRD,This register indicates the functional safety errors."
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "Bit_1919,FuSa error summary. Corresponding to errors occurred at domain 0. This is regarding EDC error for SRAM." "0,1"
bitfld.long 0x0 18. "Bit_1818,FuSa error summary. Corresponding to errors occurred at domain 0. This is regarding ECC error for SRAM." "0,1"
bitfld.long 0x0 17. "Bit_1717,FuSa error summary. Corresponding to errors occurred at domain 0. This is regarding DCLS error for scratchpad memory." "0,1"
bitfld.long 0x0 16. "Bit_1616,FuSa error summary. Corresponding to errors occurred at domain 0. This is regarding bus error." "0,1"
newline
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "Bit_77,FuSa error summary. Corresponding to errors occurred at register module." "0,1"
hexmask.long.byte 0x0 1.--6. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "Bit_00,FuSa error summary. Corresponding to errors occurred at internal AXI Slave bus." "0,1"
group.long 0x110++0x3
line.long 0x0 "ACLR,This register has the function to clear the bus error. Each bit field corresponds to each part on the own AXI slave bus domain."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Bit_3030,Corresponding part : post-process  going toward built-in register module (area2)." "0,1"
bitfld.long 0x0 29. "Bit_2929,Corresponding part : post-process  going toward built-in register module." "0,1"
hexmask.long 0x0 2.--28. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "Bit_11,Corresponding part : post-process  going toward IMP-SS central domain bus (SPMI)." "0,1"
newline
bitfld.long 0x0 0. "Bit_00,Corresponding part : pre-process (address decode phase)." "0,1"
rgroup.long 0x114++0x1B
line.long 0x0 "ACA,This register indicates any errors which are happened on the own AXI slave bus domain."
bitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Bit_3030,Destination ID check error regarding built-in register module (area2)." "0,1"
bitfld.long 0x0 29. "Bit_2929,Destination ID check error regarding built-in register module." "0,1"
hexmask.long.byte 0x0 22.--28. 1. "Reserved_22,Reserved"
bitfld.long 0x0 21. "Bit_2121,Redundant register slice error (valid and ready signals)" "0,1"
newline
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
bitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
newline
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID check error (R-ch)" "0,1"
newline
bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
bitfld.long 0x0 6. "Reserved_6,Reserved" "0,1"
bitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
bitfld.long 0x0 4. "Reserved_4,Reserved" "0,1"
newline
bitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
bitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "DERRINFO,This register indicates the information regarding the address decoder of the own AXI slave bus. The contents are recorded when the error is detected."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "DERRADRAR,This register indicates the information regarding the address decoder of the own AXI slave bus. The contents are recorded when the error is detected."
hexmask.long 0x8 0.--31. 1. "Bit_310,Decode error address for read function (lower 32-bit)"
line.long 0xC "DERRADRAW,This register indicates the information regarding the address decoder of the own AXI slave bus. The contents are recorded when the error is detected."
hexmask.long 0xC 0.--31. 1. "Bit_310,Decode error address for write function (lower 32-bit)"
line.long 0x10 "PCNT,This register is related to AXI slave bus. It indicates the number of on-the-fly transaction."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x10 24.--28. 1. "Bit_2824,Packet counter for W-ch"
bitfld.long 0x10 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x10 16.--20. 1. "Bit_2016,Packet counter for AW-ch"
hexmask.long.word 0x10 5.--15. 1. "Reserved_5,Reserved"
newline
hexmask.long.byte 0x10 0.--4. 1. "Bit_40,Packet counter for AR-ch"
line.long 0x14 "RTOIDAR,This register is related to the own AXI slave bus. The contents are recorded when the error is detected."
hexmask.long.byte 0x14 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.tbyte 0x14 8.--24. 1. "Bit_248,Bus information (arid)"
hexmask.long.byte 0x14 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
line.long 0x18 "RTOIDAW,This register is related to the own AXI slave bus. The contents are recorded when the error is detected."
hexmask.long.byte 0x18 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.tbyte 0x18 8.--24. 1. "Bit_248,Bus information (awid)"
hexmask.long.byte 0x18 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
group.long 0x130++0x3
line.long 0x0 "ACAD,This register is related to the own AXI slave bus. When each bit filed is set to double_quotation1double_quotation. the corresponding checker function is disabled."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Register slice ordering check (including redundant signal check)" "0,1"
hexmask.long.byte 0x0 13.--19. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "Bit_1212,Protocol check" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination ID check" "0,1"
newline
bitfld.long 0x0 10. "Bit_1010,Burst ID check (R-ch)" "0,1"
hexmask.long.word 0x0 0.--9. 1. "Reserved_0,Reserved"
rgroup.long 0x144++0x7
line.long 0x0 "ACASLV00,This register is related to the own AXI slave bus. It indicates any errors which are happened on the dedicated part regarding IMP-SS central domain bus (SPMI)."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "PCNTSLV00,This register is related to the own AXI slave bus. It indicates the number of on-the-fly transaction which are going toward to IMP-SS central domain bus (SPMI)."
bitfld.long 0x4 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x4 24.--28. 1. "Bit_2824,Packet counter for W-ch"
bitfld.long 0x4 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x4 16.--20. 1. "Bit_2016,Packet counter for AW-ch"
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
newline
hexmask.long.byte 0x4 0.--4. 1. "Bit_40,Packet counter for AR-ch"
rgroup.long 0x184++0x7
line.long 0x0 "ACASLV02,This register is related to the own AXI slave bus. It indicates any errors which are happened on the dedicated part regarding built-in register module."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "PCNTSLV02,This register is related to the own AXI slave bus. It indicates the number of on-the-fly transaction which are going toward to built-in register module."
bitfld.long 0x4 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x4 24.--28. 1. "Bit_2824,Packet counter for W-ch"
bitfld.long 0x4 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x4 16.--20. 1. "Bit_2016,Packet counter for AW-ch"
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
newline
hexmask.long.byte 0x4 0.--4. 1. "Bit_40,Packet counter for AR-ch"
rgroup.long 0x1A4++0x7
line.long 0x0 "ACASLV03,This register is related to the own AXI slave bus. It indicates any errors which are happened on the dedicated part regarding built-in register module (area2)."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "PCNTSLV03,This register is related to the own AXI slave bus. It indicates the number of on-the-fly transaction which are going toward to built-in register module (area2)."
bitfld.long 0x4 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x4 24.--28. 1. "Bit_2824,Packet counter for W-ch"
bitfld.long 0x4 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x4 16.--20. 1. "Bit_2016,Packet counter for AW-ch"
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
newline
hexmask.long.byte 0x4 0.--4. 1. "Bit_40,Packet counter for AR-ch"
rgroup.long 0x400++0x3
line.long 0x0 "ACAREG,This register indicates the error regarding functional safety. There errors can be cleared by the register double_quotationERRCTRL0.CLRdouble_quotation."
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
bitfld.long 0x0 5. "Bit_55,EDC error for W-ch (for built-in register module (area2))." "0,1"
bitfld.long 0x0 4. "Bit_44,EDC error for AW-ch (for built-in register module (area2))." "0,1"
bitfld.long 0x0 3. "Bit_33,EDC error for AR-ch (for built-in register module (area2))." "0,1"
bitfld.long 0x0 2. "Bit_22,EDC error for W-ch (for built-in register module)." "0,1"
newline
bitfld.long 0x0 1. "Bit_11,EDC error for AW-ch (for built-in register module)." "0,1"
bitfld.long 0x0 0. "Bit_00,EDC error for AR-ch (for built-in register module)." "0,1"
group.long 0xD30++0x3
line.long 0x0 "TIMESCALE,This register has the function regrding the functional safety. It is the settings of timeout counters."
bitfld.long 0x0 31. "Bit_3131,System timer enable" "0,1"
hexmask.long 0x0 4.--30. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,System timer scale"
group.long 0xEA0++0x7
line.long 0x0 "ERRCTRL0,This register is related to the functional safety."
bitfld.long 0x0 31. "CLR,Clear EDC error" "0,1"
bitfld.long 0x0 30. "DISABLE,Disable for EDC error output" "0,1"
hexmask.long 0x0 4.--29. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "TH,Threshold number of EDC error for the own AXI slave bus"
line.long 0x4 "ERRCTRL1,This register is related to the functional safety."
bitfld.long 0x4 31. "Bit_3131,Error injection for the own AXI slave (post-process  going toward default slave)" "0,1"
bitfld.long 0x4 30. "Bit_3030,Error injection for the own AXI slave (post-process  going toward built-in register module (area2))" "0,1"
bitfld.long 0x4 29. "Bit_2929,Error injection for the own AXI slave (post-process  going toward built-in register module)" "0,1"
hexmask.long.word 0x4 19.--28. 1. "Reserved_19,Reserved"
bitfld.long 0x4 16.--18. "Bit_1816,Error injection for build-in register module" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 2.--15. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "Bit_11,Error injection for the own AXI slave (post-process  going toward IMP-SS central domain bus (SPMI))" "0,1"
bitfld.long 0x4 0. "Bit_00,Error injection for the own AXI slave (pre-process)" "0,1"
rgroup.long 0xEE0++0x3
line.long 0x0 "ERRSUM0,This register indicates the error regarding functional safety."
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
bitfld.long 0x0 13.--15. "Bit_1513,Error Summary for the own AXI slave (post-process  built-in register module and default slave)" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x0 2.--12. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "Bit_11,Error Summary for the own AXI slave (post-process)" "0,1"
bitfld.long 0x0 0. "Bit_00,Error Summary for the own AXI Slave (pre-process)" "0,1"
group.long 0x2000++0x3
line.long 0x0 "PRESET,This is the preset register. It should be set once at the initialization phase."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "PRESET,Set to 1010"
rgroup.long 0x4000++0x3
line.long 0x0 "CLACTSTS,This register shows the status of command list controller in each IP."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "ID17,Corresponding to CNN" "0,1"
bitfld.long 0x0 16. "ID16,Corresponding to PSC" "0,1"
bitfld.long 0x0 15. "ID15,Corresponding to IMP Slim DMAC ch1/thread1" "0,1"
bitfld.long 0x0 14. "ID14,Corresponding to IMP Slim DMAC ch1/thread0" "0,1"
newline
bitfld.long 0x0 13. "ID13,Corresponding to IMP Slim DMAC ch0/thread1" "0,1"
bitfld.long 0x0 12. "ID12,Corresponding to IMP Slim DMAC ch0/thread0" "0,1"
bitfld.long 0x0 11. "ID11,Corresponding to IMP DMAC ch1/thread1" "0,1"
bitfld.long 0x0 10. "ID10,Corresponding to IMP DMAC ch1/thread0" "0,1"
bitfld.long 0x0 9. "ID09,Corresponding to IMP DMAC ch0/thread1" "0,1"
newline
bitfld.long 0x0 8. "ID08,Corresponding to IMP DMAC ch0/thread0" "0,1"
bitfld.long 0x0 7. "ID07,Corresponding to light CVe cluster2" "0,1"
bitfld.long 0x0 6. "ID06,Corresponding to light CVe cluster1" "0,1"
bitfld.long 0x0 5. "ID05,Corresponding to light CVe cluster0" "0,1"
bitfld.long 0x0 4. "ID04,Corresponding to CVe cluster0" "0,1"
newline
bitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
bitfld.long 0x0 1. "ID01,Corresponding to IMP Core ch1" "0,1"
bitfld.long 0x0 0. "ID00,Corresponding to IMP Core ch0" "0,1"
group.long 0x4010++0xB
line.long 0x0 "VDSP0CT,The communication type between each IP and DSP ch0 is selected by this register. The bit fields correspond to each IP."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "ID17,Corresponding to CNN" "0,1"
bitfld.long 0x0 16. "ID16,Corresponding to PSC" "0,1"
bitfld.long 0x0 15. "ID15,Corresponding to IMP Slim DMAC ch1/thread1" "0,1"
bitfld.long 0x0 14. "ID14,Corresponding to IMP Slim DMAC ch1/thread0" "0,1"
newline
bitfld.long 0x0 13. "ID13,Corresponding to IMP Slim DMAC ch0/thread1" "0,1"
bitfld.long 0x0 12. "ID12,Corresponding to IMP Slim DMAC ch0/thread0" "0,1"
bitfld.long 0x0 11. "ID11,Corresponding to IMP DMAC ch1/thread1" "0,1"
bitfld.long 0x0 10. "ID10,Corresponding to IMP DMAC ch1/thread0" "0,1"
bitfld.long 0x0 9. "ID09,Corresponding to IMP DMAC ch0/thread1" "0,1"
newline
bitfld.long 0x0 8. "ID08,Corresponding to IMP DMAC ch0/thread0" "0,1"
bitfld.long 0x0 7. "ID07,Corresponding to light CVe cluster2" "0,1"
bitfld.long 0x0 6. "ID06,Corresponding to light CVe cluster1" "0,1"
bitfld.long 0x0 5. "ID05,Corresponding to light CVe cluster0" "0,1"
bitfld.long 0x0 4. "ID04,Corresponding to CVe cluster0" "0,1"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
bitfld.long 0x0 1. "ID01,Corresponding to IMP Core ch1" "0,1"
bitfld.long 0x0 0. "ID00,Corresponding to IMP Core ch0" "0,1"
line.long 0x4 "VDSP0CSTS,This register indicates the status of the communication from each IP. When IP issue WUP command to DSP ch0. the corresponding bit field become double_quotation1double_quotation."
hexmask.long.word 0x4 18.--31. 1. "Reserved_18,Reserved"
eventfld.long 0x4 17. "ID17,Corresponding to CNN" "0,1"
eventfld.long 0x4 16. "ID16,Corresponding to PSC" "0,1"
eventfld.long 0x4 15. "ID15,Corresponding to IMP Slim DMAC ch1/thread1" "0,1"
eventfld.long 0x4 14. "ID14,Corresponding to IMP Slim DMAC ch1/thread0" "0,1"
newline
eventfld.long 0x4 13. "ID13,Corresponding to IMP Slim DMAC ch0/thread1" "0,1"
eventfld.long 0x4 12. "ID12,Corresponding to IMP Slim DMAC ch0/thread0" "0,1"
eventfld.long 0x4 11. "ID11,Corresponding to IMP DMAC ch1/thread1" "0,1"
eventfld.long 0x4 10. "ID10,Corresponding to IMP DMAC ch1/thread0" "0,1"
eventfld.long 0x4 9. "ID09,Corresponding to IMP DMAC ch0/thread1" "0,1"
newline
eventfld.long 0x4 8. "ID08,Corresponding to IMP DMAC ch0/thread0" "0,1"
eventfld.long 0x4 7. "ID07,Corresponding to light CVe cluster2" "0,1"
eventfld.long 0x4 6. "ID06,Corresponding to light CVe cluster1" "0,1"
eventfld.long 0x4 5. "ID05,Corresponding to light CVe cluster0" "0,1"
eventfld.long 0x4 4. "ID04,Corresponding to CVe cluster0" "0,1"
newline
rbitfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
eventfld.long 0x4 1. "ID01,Corresponding to IMP Core ch1" "0,1"
eventfld.long 0x4 0. "ID00,Corresponding to IMP Core ch0" "0,1"
line.long 0x8 "VDSP0CTRM,WUP signal with the identification as DSP ch0 is issued when this register is written by the double_quotation1double_quotation. The corresponding field of DSP0CSTS is also cleared at the same time."
hexmask.long.word 0x8 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x8 17. "ID17,Corresponding to CNN" "0,1"
bitfld.long 0x8 16. "ID16,Corresponding to PSC" "0,1"
bitfld.long 0x8 15. "ID15,Corresponding to IMP Slim DMAC ch1/thread1" "0,1"
bitfld.long 0x8 14. "ID14,Corresponding to IMP Slim DMAC ch1/thread0" "0,1"
newline
bitfld.long 0x8 13. "ID13,Corresponding to IMP Slim DMAC ch0/thread1" "0,1"
bitfld.long 0x8 12. "ID12,Corresponding to IMP Slim DMAC ch0/thread0" "0,1"
bitfld.long 0x8 11. "ID11,Corresponding to IMP DMAC ch1/thread1" "0,1"
bitfld.long 0x8 10. "ID10,Corresponding to IMP DMAC ch1/thread0" "0,1"
bitfld.long 0x8 9. "ID09,Corresponding to IMP DMAC ch0/thread1" "0,1"
newline
bitfld.long 0x8 8. "ID08,Corresponding to IMP DMAC ch0/thread0" "0,1"
bitfld.long 0x8 7. "ID07,Corresponding to light CVe cluster2" "0,1"
bitfld.long 0x8 6. "ID06,Corresponding to light CVe cluster1" "0,1"
bitfld.long 0x8 5. "ID05,Corresponding to light CVe cluster0" "0,1"
bitfld.long 0x8 4. "ID04,Corresponding to CVe cluster0" "0,1"
newline
bitfld.long 0x8 2.--3. "Reserved_2,Reserved" "0,1,2,3"
bitfld.long 0x8 1. "ID01,Corresponding to IMP Core ch1" "0,1"
bitfld.long 0x8 0. "ID00,Corresponding to IMP Core ch0" "0,1"
group.long 0x4020++0xB
line.long 0x0 "VDSP1CT,The communication type between each IP and DSP ch1 is selected by this register. The bit fields correspond to each IP."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "ID17,Corresponding to CNN" "0,1"
bitfld.long 0x0 16. "ID16,Corresponding to PSC" "0,1"
bitfld.long 0x0 15. "ID15,Corresponding to IMP Slim DMAC ch1/thread1" "0,1"
bitfld.long 0x0 14. "ID14,Corresponding to IMP Slim DMAC ch1/thread0" "0,1"
newline
bitfld.long 0x0 13. "ID13,Corresponding to IMP Slim DMAC ch0/thread1" "0,1"
bitfld.long 0x0 12. "ID12,Corresponding to IMP Slim DMAC ch0/thread0" "0,1"
bitfld.long 0x0 11. "ID11,Corresponding to IMP DMAC ch1/thread1" "0,1"
bitfld.long 0x0 10. "ID10,Corresponding to IMP DMAC ch1/thread0" "0,1"
bitfld.long 0x0 9. "ID09,Corresponding to IMP DMAC ch0/thread1" "0,1"
newline
bitfld.long 0x0 8. "ID08,Corresponding to IMP DMAC ch0/thread0" "0,1"
bitfld.long 0x0 7. "ID07,Corresponding to light CVe cluster2" "0,1"
bitfld.long 0x0 6. "ID06,Corresponding to light CVe cluster1" "0,1"
bitfld.long 0x0 5. "ID05,Corresponding to light CVe cluster0" "0,1"
bitfld.long 0x0 4. "ID04,Corresponding to CVe cluster0" "0,1"
newline
bitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
bitfld.long 0x0 1. "ID01,Corresponding to IMP Core ch1" "0,1"
bitfld.long 0x0 0. "ID00,Corresponding to IMP Core ch0" "0,1"
line.long 0x4 "VDSP1CSTS,This register indicates the status of the communication from each IP. When IP issue WUP command to DSP ch1. the corresponding bit field become double_quotation1double_quotation."
hexmask.long.word 0x4 18.--31. 1. "Reserved_18,Reserved"
eventfld.long 0x4 17. "ID17,Corresponding to CNN" "0,1"
eventfld.long 0x4 16. "ID16,Corresponding to PSC" "0,1"
eventfld.long 0x4 15. "ID15,Corresponding to IMP Slim DMAC ch1/thread1" "0,1"
eventfld.long 0x4 14. "ID14,Corresponding to IMP Slim DMAC ch1/thread0" "0,1"
newline
eventfld.long 0x4 13. "ID13,Corresponding to IMP Slim DMAC ch0/thread1" "0,1"
eventfld.long 0x4 12. "ID12,Corresponding to IMP Slim DMAC ch0/thread0" "0,1"
eventfld.long 0x4 11. "ID11,Corresponding to IMP DMAC ch1/thread1" "0,1"
eventfld.long 0x4 10. "ID10,Corresponding to IMP DMAC ch1/thread0" "0,1"
eventfld.long 0x4 9. "ID09,Corresponding to IMP DMAC ch0/thread1" "0,1"
newline
eventfld.long 0x4 8. "ID08,Corresponding to IMP DMAC ch0/thread0" "0,1"
eventfld.long 0x4 7. "ID07,Corresponding to light CVe cluster2" "0,1"
eventfld.long 0x4 6. "ID06,Corresponding to light CVe cluster1" "0,1"
eventfld.long 0x4 5. "ID05,Corresponding to light CVe cluster0" "0,1"
eventfld.long 0x4 4. "ID04,Corresponding to CVe cluster0" "0,1"
newline
eventfld.long 0x4 2.--3. "Reserved_2,Reserved" "0,1,2,3"
eventfld.long 0x4 1. "ID01,Corresponding to IMP Core ch1" "0,1"
eventfld.long 0x4 0. "ID00,Corresponding to IMP Core ch0" "0,1"
line.long 0x8 "VDSP1CTRM,WUP signal with the identification as DSP ch1 is issued when this register is written by the double_quotation1double_quotation. The corresponding field of DSP0CSTS is also cleared at the same time."
hexmask.long.word 0x8 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x8 17. "ID17,Corresponding to CNN" "0,1"
bitfld.long 0x8 16. "ID16,Corresponding to PSC" "0,1"
bitfld.long 0x8 15. "ID15,Corresponding to IMP Slim DMAC ch1/thread1" "0,1"
bitfld.long 0x8 14. "ID14,Corresponding to IMP Slim DMAC ch1/thread0" "0,1"
newline
bitfld.long 0x8 13. "ID13,Corresponding to IMP Slim DMAC ch0/thread1" "0,1"
bitfld.long 0x8 12. "ID12,Corresponding to IMP Slim DMAC ch0/thread0" "0,1"
bitfld.long 0x8 11. "ID11,Corresponding to IMP DMAC ch1/thread1" "0,1"
bitfld.long 0x8 10. "ID10,Corresponding to IMP DMAC ch1/thread0" "0,1"
bitfld.long 0x8 9. "ID09,Corresponding to IMP DMAC ch0/thread1" "0,1"
newline
bitfld.long 0x8 8. "ID08,Corresponding to IMP DMAC ch0/thread0" "0,1"
bitfld.long 0x8 7. "ID07,Corresponding to light CVe cluster2" "0,1"
bitfld.long 0x8 6. "ID06,Corresponding to light CVe cluster1" "0,1"
bitfld.long 0x8 5. "ID05,Corresponding to light CVe cluster0" "0,1"
bitfld.long 0x8 4. "ID04,Corresponding to CVe cluster0" "0,1"
newline
bitfld.long 0x8 2.--3. "Reserved_2,Reserved" "0,1,2,3"
bitfld.long 0x8 1. "ID01,Corresponding to IMP Core ch1" "0,1"
bitfld.long 0x8 0. "ID00,Corresponding to IMP Core ch0" "0,1"
tree.end
tree "IMP_X7_System_SPM_0"
base ad:0xED200000
group.long 0x0++0x3
line.long 0x0 "SPM_SPMCTRL0,This is the control register for the own Scratchpad Memory."
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "INIT,Start function of SRAM Initialization" "0,1"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
rgroup.long 0x4++0x3
line.long 0x0 "SPM_INITSTS0,This is the initializing status register for the own Scratchpad Memory."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "INITFIN,This status indicates that SRAM initialization is finished." "0,1"
bitfld.long 0x0 0. "INITST,This status indicates that SRAM initialization is started." "0,1"
group.long 0x20++0x3
line.long 0x0 "SPM_SPMECTRL0,This is the register regarding the functional safety."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ERRCLR,Error clear. It can clear SPMECOUNT  ERRINFO00-15 and EADDRINFO00-15. Set to 0 after clearing." "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "SPM_SPMECOUNT0,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x0 31. "Bit_3131,Overflow bit. This field is corresponding to 4th SRAM." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 4th SRAM."
bitfld.long 0x0 23. "Bit_2323,Overflow bit. This field is corresponding to 3rd SRAM." "0,1"
hexmask.long.byte 0x0 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 3rd SRAM."
bitfld.long 0x0 15. "Bit_1515,Overflow bit. This field is corresponding to 2nd SRAM." "0,1"
hexmask.long.byte 0x0 8.--14. 1. "Bit_148,Error count. This field is corresponding to 2nd SRAM."
bitfld.long 0x0 7. "Bit_77,Overflow bit. This field is corresponding to 1st SRAM." "0,1"
newline
hexmask.long.byte 0x0 0.--6. 1. "Bit_60,Error count. This field is corresponding to 1st SRAM."
rgroup.long 0x40++0x7F
line.long 0x0 "SPM_ERRINFO00_0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x4 "SPM_ERRINFO01_0,"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x8 "SPM_ERRINFO02_0,"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0xC "SPM_ERRINFO03_0,"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x10 "SPM_ERRINFO04_0,"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x14 "SPM_ERRINFO05_0,"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x18 "SPM_ERRINFO06_0,"
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x1C "SPM_ERRINFO07_0,"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x20 "SPM_ERRINFO08_0,"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x24 "SPM_ERRINFO09_0,"
hexmask.long.tbyte 0x24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x28 "SPM_ERRINFO10_0,"
hexmask.long.tbyte 0x28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x28 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x2C "SPM_ERRINFO11_0,"
hexmask.long.tbyte 0x2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x30 "SPM_ERRINFO12_0,"
hexmask.long.tbyte 0x30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x30 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x34 "SPM_ERRINFO13_0,"
hexmask.long.tbyte 0x34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x34 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x38 "SPM_ERRINFO14_0,"
hexmask.long.tbyte 0x38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x38 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x3C "SPM_ERRINFO15_0,"
hexmask.long.tbyte 0x3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
line.long 0x40 "SPM_EADDRINFO00_0,"
hexmask.long 0x40 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x44 "SPM_EADDRINFO01_0,"
hexmask.long 0x44 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x48 "SPM_EADDRINFO02_0,"
hexmask.long 0x48 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0x4C "SPM_EADDRINFO03_0,"
hexmask.long 0x4C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x50 "SPM_EADDRINFO04_0,"
hexmask.long 0x50 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x54 "SPM_EADDRINFO05_0,"
hexmask.long 0x54 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x58 "SPM_EADDRINFO06_0,"
hexmask.long 0x58 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x5C "SPM_EADDRINFO07_0,"
hexmask.long 0x5C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x60 "SPM_EADDRINFO08_0,"
hexmask.long 0x60 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x64 "SPM_EADDRINFO09_0,"
hexmask.long 0x64 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x68 "SPM_EADDRINFO10_0,"
hexmask.long 0x68 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x6C "SPM_EADDRINFO11_0,"
hexmask.long 0x6C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x70 "SPM_EADDRINFO12_0,"
hexmask.long 0x70 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x74 "SPM_EADDRINFO13_0,"
hexmask.long 0x74 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x78 "SPM_EADDRINFO14_0,"
hexmask.long 0x78 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x7C "SPM_EADDRINFO15_0,"
hexmask.long 0x7C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
tree.end
tree "IMP_X7_System_SPM_1"
base ad:0xED240000
group.long 0x0++0x3
line.long 0x0 "SPM_SPMCTRL1,This is the control register for the own Scratchpad Memory."
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "INIT,Start function of SRAM Initialization" "0,1"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
rgroup.long 0x4++0x3
line.long 0x0 "SPM_INITSTS1,This is the initializing status register for the own Scratchpad Memory."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "INITFIN,This status indicates that SRAM initialization is finished." "0,1"
bitfld.long 0x0 0. "INITST,This status indicates that SRAM initialization is started." "0,1"
group.long 0x20++0x3
line.long 0x0 "SPM_SPMECTRL1,This is the register regarding the functional safety."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ERRCLR,Error clear. It can clear SPMECOUNT  ERRINFO00-15 and EADDRINFO00-15. Set to 0 after clearing." "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "SPM_SPMECOUNT1,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x0 31. "Bit_3131,Overflow bit. This field is corresponding to 4th SRAM." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 4th SRAM."
bitfld.long 0x0 23. "Bit_2323,Overflow bit. This field is corresponding to 3rd SRAM." "0,1"
hexmask.long.byte 0x0 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 3rd SRAM."
bitfld.long 0x0 15. "Bit_1515,Overflow bit. This field is corresponding to 2nd SRAM." "0,1"
hexmask.long.byte 0x0 8.--14. 1. "Bit_148,Error count. This field is corresponding to 2nd SRAM."
bitfld.long 0x0 7. "Bit_77,Overflow bit. This field is corresponding to 1st SRAM." "0,1"
newline
hexmask.long.byte 0x0 0.--6. 1. "Bit_60,Error count. This field is corresponding to 1st SRAM."
rgroup.long 0x40++0x7F
line.long 0x0 "SPM_ERRINFO00_1,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x4 "SPM_ERRINFO01_1,"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x8 "SPM_ERRINFO02_1,"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0xC "SPM_ERRINFO03_1,"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x10 "SPM_ERRINFO04_1,"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x14 "SPM_ERRINFO05_1,"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x18 "SPM_ERRINFO06_1,"
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x1C "SPM_ERRINFO07_1,"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x20 "SPM_ERRINFO08_1,"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x24 "SPM_ERRINFO09_1,"
hexmask.long.tbyte 0x24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x28 "SPM_ERRINFO10_1,"
hexmask.long.tbyte 0x28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x28 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x2C "SPM_ERRINFO11_1,"
hexmask.long.tbyte 0x2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x30 "SPM_ERRINFO12_1,"
hexmask.long.tbyte 0x30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x30 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x34 "SPM_ERRINFO13_1,"
hexmask.long.tbyte 0x34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x34 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x38 "SPM_ERRINFO14_1,"
hexmask.long.tbyte 0x38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x38 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x3C "SPM_ERRINFO15_1,"
hexmask.long.tbyte 0x3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
line.long 0x40 "SPM_EADDRINFO00_1,"
hexmask.long 0x40 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x44 "SPM_EADDRINFO01_1,"
hexmask.long 0x44 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x48 "SPM_EADDRINFO02_1,"
hexmask.long 0x48 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0x4C "SPM_EADDRINFO03_1,"
hexmask.long 0x4C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x50 "SPM_EADDRINFO04_1,"
hexmask.long 0x50 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x54 "SPM_EADDRINFO05_1,"
hexmask.long 0x54 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x58 "SPM_EADDRINFO06_1,"
hexmask.long 0x58 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x5C "SPM_EADDRINFO07_1,"
hexmask.long 0x5C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x60 "SPM_EADDRINFO08_1,"
hexmask.long 0x60 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x64 "SPM_EADDRINFO09_1,"
hexmask.long 0x64 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x68 "SPM_EADDRINFO10_1,"
hexmask.long 0x68 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x6C "SPM_EADDRINFO11_1,"
hexmask.long 0x6C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x70 "SPM_EADDRINFO12_1,"
hexmask.long 0x70 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x74 "SPM_EADDRINFO13_1,"
hexmask.long 0x74 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x78 "SPM_EADDRINFO14_1,"
hexmask.long 0x78 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x7C "SPM_EADDRINFO15_1,"
hexmask.long 0x7C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
tree.end
tree "IMP_X7_System_SPM_2"
base ad:0xED280000
group.long 0x0++0x3
line.long 0x0 "SPM_SPMCTRL2,This is the control register for the own Scratchpad Memory."
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "INIT,Start function of SRAM Initialization" "0,1"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
rgroup.long 0x4++0x3
line.long 0x0 "SPM_INITSTS2,This is the initializing status register for the own Scratchpad Memory."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "INITFIN,This status indicates that SRAM initialization is finished." "0,1"
bitfld.long 0x0 0. "INITST,This status indicates that SRAM initialization is started." "0,1"
group.long 0x20++0x3
line.long 0x0 "SPM_SPMECTRL2,This is the register regarding the functional safety."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ERRCLR,Error clear. It can clear SPMECOUNT  ERRINFO00-15 and EADDRINFO00-15. Set to 0 after clearing." "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "SPM_SPMECOUNT2,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x0 31. "Bit_3131,Overflow bit. This field is corresponding to 4th SRAM." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 4th SRAM."
bitfld.long 0x0 23. "Bit_2323,Overflow bit. This field is corresponding to 3rd SRAM." "0,1"
hexmask.long.byte 0x0 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 3rd SRAM."
bitfld.long 0x0 15. "Bit_1515,Overflow bit. This field is corresponding to 2nd SRAM." "0,1"
hexmask.long.byte 0x0 8.--14. 1. "Bit_148,Error count. This field is corresponding to 2nd SRAM."
bitfld.long 0x0 7. "Bit_77,Overflow bit. This field is corresponding to 1st SRAM." "0,1"
newline
hexmask.long.byte 0x0 0.--6. 1. "Bit_60,Error count. This field is corresponding to 1st SRAM."
rgroup.long 0x40++0x7F
line.long 0x0 "SPM_ERRINFO00_2,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x4 "SPM_ERRINFO01_2,"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x8 "SPM_ERRINFO02_2,"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0xC "SPM_ERRINFO03_2,"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x10 "SPM_ERRINFO04_2,"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x14 "SPM_ERRINFO05_2,"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x18 "SPM_ERRINFO06_2,"
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x1C "SPM_ERRINFO07_2,"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x20 "SPM_ERRINFO08_2,"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x24 "SPM_ERRINFO09_2,"
hexmask.long.tbyte 0x24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x28 "SPM_ERRINFO10_2,"
hexmask.long.tbyte 0x28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x28 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x2C "SPM_ERRINFO11_2,"
hexmask.long.tbyte 0x2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x30 "SPM_ERRINFO12_2,"
hexmask.long.tbyte 0x30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x30 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x34 "SPM_ERRINFO13_2,"
hexmask.long.tbyte 0x34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x34 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x38 "SPM_ERRINFO14_2,"
hexmask.long.tbyte 0x38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x38 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x3C "SPM_ERRINFO15_2,"
hexmask.long.tbyte 0x3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
line.long 0x40 "SPM_EADDRINFO00_2,"
hexmask.long 0x40 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x44 "SPM_EADDRINFO01_2,"
hexmask.long 0x44 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x48 "SPM_EADDRINFO02_2,"
hexmask.long 0x48 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0x4C "SPM_EADDRINFO03_2,"
hexmask.long 0x4C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x50 "SPM_EADDRINFO04_2,"
hexmask.long 0x50 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x54 "SPM_EADDRINFO05_2,"
hexmask.long 0x54 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x58 "SPM_EADDRINFO06_2,"
hexmask.long 0x58 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x5C "SPM_EADDRINFO07_2,"
hexmask.long 0x5C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x60 "SPM_EADDRINFO08_2,"
hexmask.long 0x60 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x64 "SPM_EADDRINFO09_2,"
hexmask.long 0x64 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x68 "SPM_EADDRINFO10_2,"
hexmask.long 0x68 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x6C "SPM_EADDRINFO11_2,"
hexmask.long 0x6C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x70 "SPM_EADDRINFO12_2,"
hexmask.long 0x70 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x74 "SPM_EADDRINFO13_2,"
hexmask.long 0x74 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x78 "SPM_EADDRINFO14_2,"
hexmask.long 0x78 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x7C "SPM_EADDRINFO15_2,"
hexmask.long 0x7C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
tree.end
tree "IMP_X7_System_SPM_3"
base ad:0xED2C0000
group.long 0x0++0x3
line.long 0x0 "SPM_SPMCTRL3,This is the control register for the own Scratchpad Memory."
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "INIT,Start function of SRAM Initialization" "0,1"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
rgroup.long 0x4++0x3
line.long 0x0 "SPM_INITSTS3,This is the initializing status register for the own Scratchpad Memory."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "INITFIN,This status indicates that SRAM initialization is finished." "0,1"
bitfld.long 0x0 0. "INITST,This status indicates that SRAM initialization is started." "0,1"
group.long 0x20++0x3
line.long 0x0 "SPM_SPMECTRL3,This is the register regarding the functional safety."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ERRCLR,Error clear. It can clear SPMECOUNT  ERRINFO00-15 and EADDRINFO00-15. Set to 0 after clearing." "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "SPM_SPMECOUNT3,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x0 31. "Bit_3131,Overflow bit. This field is corresponding to 4th SRAM." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 4th SRAM."
bitfld.long 0x0 23. "Bit_2323,Overflow bit. This field is corresponding to 3rd SRAM." "0,1"
hexmask.long.byte 0x0 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 3rd SRAM."
bitfld.long 0x0 15. "Bit_1515,Overflow bit. This field is corresponding to 2nd SRAM." "0,1"
hexmask.long.byte 0x0 8.--14. 1. "Bit_148,Error count. This field is corresponding to 2nd SRAM."
bitfld.long 0x0 7. "Bit_77,Overflow bit. This field is corresponding to 1st SRAM." "0,1"
newline
hexmask.long.byte 0x0 0.--6. 1. "Bit_60,Error count. This field is corresponding to 1st SRAM."
rgroup.long 0x40++0x7F
line.long 0x0 "SPM_ERRINFO00_3,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x4 "SPM_ERRINFO01_3,"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x8 "SPM_ERRINFO02_3,"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0xC "SPM_ERRINFO03_3,"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x10 "SPM_ERRINFO04_3,"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x14 "SPM_ERRINFO05_3,"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x18 "SPM_ERRINFO06_3,"
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x1C "SPM_ERRINFO07_3,"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x20 "SPM_ERRINFO08_3,"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x24 "SPM_ERRINFO09_3,"
hexmask.long.tbyte 0x24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x28 "SPM_ERRINFO10_3,"
hexmask.long.tbyte 0x28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x28 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x2C "SPM_ERRINFO11_3,"
hexmask.long.tbyte 0x2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x30 "SPM_ERRINFO12_3,"
hexmask.long.tbyte 0x30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x30 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x34 "SPM_ERRINFO13_3,"
hexmask.long.tbyte 0x34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x34 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x38 "SPM_ERRINFO14_3,"
hexmask.long.tbyte 0x38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x38 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x3C "SPM_ERRINFO15_3,"
hexmask.long.tbyte 0x3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
line.long 0x40 "SPM_EADDRINFO00_3,"
hexmask.long 0x40 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x44 "SPM_EADDRINFO01_3,"
hexmask.long 0x44 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x48 "SPM_EADDRINFO02_3,"
hexmask.long 0x48 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0x4C "SPM_EADDRINFO03_3,"
hexmask.long 0x4C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x50 "SPM_EADDRINFO04_3,"
hexmask.long 0x50 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x54 "SPM_EADDRINFO05_3,"
hexmask.long 0x54 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x58 "SPM_EADDRINFO06_3,"
hexmask.long 0x58 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x5C "SPM_EADDRINFO07_3,"
hexmask.long 0x5C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x60 "SPM_EADDRINFO08_3,"
hexmask.long 0x60 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x64 "SPM_EADDRINFO09_3,"
hexmask.long 0x64 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x68 "SPM_EADDRINFO10_3,"
hexmask.long 0x68 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x6C "SPM_EADDRINFO11_3,"
hexmask.long 0x6C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x70 "SPM_EADDRINFO12_3,"
hexmask.long 0x70 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x74 "SPM_EADDRINFO13_3,"
hexmask.long 0x74 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x78 "SPM_EADDRINFO14_3,"
hexmask.long 0x78 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x7C "SPM_EADDRINFO15_3,"
hexmask.long 0x7C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
tree.end
tree "IMP_X7_System_SPM_4"
base ad:0xED300000
group.long 0x0++0x3
line.long 0x0 "SPM_SPMCTRL4,This is the control register for the own Scratchpad Memory."
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "INIT,Start function of SRAM Initialization" "0,1"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
rgroup.long 0x4++0x3
line.long 0x0 "SPM_INITSTS4,This is the initializing status register for the own Scratchpad Memory."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "INITFIN,This status indicates that SRAM initialization is finished." "0,1"
bitfld.long 0x0 0. "INITST,This status indicates that SRAM initialization is started." "0,1"
group.long 0x20++0x3
line.long 0x0 "SPM_SPMECTRL4,This is the register regarding the functional safety."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ERRCLR,Error clear. It can clear SPMECOUNT  ERRINFO00-15 and EADDRINFO00-15. Set to 0 after clearing." "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "SPM_SPMECOUNT4,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x0 31. "Bit_3131,Overflow bit. This field is corresponding to 4th SRAM." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 4th SRAM."
bitfld.long 0x0 23. "Bit_2323,Overflow bit. This field is corresponding to 3rd SRAM." "0,1"
hexmask.long.byte 0x0 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 3rd SRAM."
bitfld.long 0x0 15. "Bit_1515,Overflow bit. This field is corresponding to 2nd SRAM." "0,1"
hexmask.long.byte 0x0 8.--14. 1. "Bit_148,Error count. This field is corresponding to 2nd SRAM."
bitfld.long 0x0 7. "Bit_77,Overflow bit. This field is corresponding to 1st SRAM." "0,1"
newline
hexmask.long.byte 0x0 0.--6. 1. "Bit_60,Error count. This field is corresponding to 1st SRAM."
rgroup.long 0x40++0x7F
line.long 0x0 "SPM_ERRINFO00_4,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x4 "SPM_ERRINFO01_4,"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x8 "SPM_ERRINFO02_4,"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0xC "SPM_ERRINFO03_4,"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x10 "SPM_ERRINFO04_4,"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x14 "SPM_ERRINFO05_4,"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x18 "SPM_ERRINFO06_4,"
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x1C "SPM_ERRINFO07_4,"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x20 "SPM_ERRINFO08_4,"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x24 "SPM_ERRINFO09_4,"
hexmask.long.tbyte 0x24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x28 "SPM_ERRINFO10_4,"
hexmask.long.tbyte 0x28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x28 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x2C "SPM_ERRINFO11_4,"
hexmask.long.tbyte 0x2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x30 "SPM_ERRINFO12_4,"
hexmask.long.tbyte 0x30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x30 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x34 "SPM_ERRINFO13_4,"
hexmask.long.tbyte 0x34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x34 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x38 "SPM_ERRINFO14_4,"
hexmask.long.tbyte 0x38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x38 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x3C "SPM_ERRINFO15_4,"
hexmask.long.tbyte 0x3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
line.long 0x40 "SPM_EADDRINFO00_4,"
hexmask.long 0x40 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x44 "SPM_EADDRINFO01_4,"
hexmask.long 0x44 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x48 "SPM_EADDRINFO02_4,"
hexmask.long 0x48 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0x4C "SPM_EADDRINFO03_4,"
hexmask.long 0x4C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x50 "SPM_EADDRINFO04_4,"
hexmask.long 0x50 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x54 "SPM_EADDRINFO05_4,"
hexmask.long 0x54 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x58 "SPM_EADDRINFO06_4,"
hexmask.long 0x58 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x5C "SPM_EADDRINFO07_4,"
hexmask.long 0x5C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x60 "SPM_EADDRINFO08_4,"
hexmask.long 0x60 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x64 "SPM_EADDRINFO09_4,"
hexmask.long 0x64 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x68 "SPM_EADDRINFO10_4,"
hexmask.long 0x68 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x6C "SPM_EADDRINFO11_4,"
hexmask.long 0x6C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x70 "SPM_EADDRINFO12_4,"
hexmask.long 0x70 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x74 "SPM_EADDRINFO13_4,"
hexmask.long 0x74 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x78 "SPM_EADDRINFO14_4,"
hexmask.long 0x78 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x7C "SPM_EADDRINFO15_4,"
hexmask.long 0x7C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
tree.end
tree "IMP_X7_System_SPM_5"
base ad:0xED340000
group.long 0x0++0x3
line.long 0x0 "SPM_SPMCTRL5,This is the control register for the own Scratchpad Memory."
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "INIT,Start function of SRAM Initialization" "0,1"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
rgroup.long 0x4++0x3
line.long 0x0 "SPM_INITSTS5,This is the initializing status register for the own Scratchpad Memory."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "INITFIN,This status indicates that SRAM initialization is finished." "0,1"
bitfld.long 0x0 0. "INITST,This status indicates that SRAM initialization is started." "0,1"
group.long 0x20++0x3
line.long 0x0 "SPM_SPMECTRL5,This is the register regarding the functional safety."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ERRCLR,Error clear. It can clear SPMECOUNT  ERRINFO00-15 and EADDRINFO00-15. Set to 0 after clearing." "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "SPM_SPMECOUNT5,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x0 31. "Bit_3131,Overflow bit. This field is corresponding to 4th SRAM." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 4th SRAM."
bitfld.long 0x0 23. "Bit_2323,Overflow bit. This field is corresponding to 3rd SRAM." "0,1"
hexmask.long.byte 0x0 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 3rd SRAM."
bitfld.long 0x0 15. "Bit_1515,Overflow bit. This field is corresponding to 2nd SRAM." "0,1"
hexmask.long.byte 0x0 8.--14. 1. "Bit_148,Error count. This field is corresponding to 2nd SRAM."
bitfld.long 0x0 7. "Bit_77,Overflow bit. This field is corresponding to 1st SRAM." "0,1"
newline
hexmask.long.byte 0x0 0.--6. 1. "Bit_60,Error count. This field is corresponding to 1st SRAM."
rgroup.long 0x40++0x7F
line.long 0x0 "SPM_ERRINFO00_5,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x4 "SPM_ERRINFO01_5,"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x8 "SPM_ERRINFO02_5,"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0xC "SPM_ERRINFO03_5,"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x10 "SPM_ERRINFO04_5,"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x14 "SPM_ERRINFO05_5,"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x18 "SPM_ERRINFO06_5,"
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x1C "SPM_ERRINFO07_5,"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x20 "SPM_ERRINFO08_5,"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x24 "SPM_ERRINFO09_5,"
hexmask.long.tbyte 0x24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x28 "SPM_ERRINFO10_5,"
hexmask.long.tbyte 0x28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x28 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x2C "SPM_ERRINFO11_5,"
hexmask.long.tbyte 0x2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x30 "SPM_ERRINFO12_5,"
hexmask.long.tbyte 0x30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x30 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x34 "SPM_ERRINFO13_5,"
hexmask.long.tbyte 0x34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x34 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x38 "SPM_ERRINFO14_5,"
hexmask.long.tbyte 0x38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x38 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x3C "SPM_ERRINFO15_5,"
hexmask.long.tbyte 0x3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
line.long 0x40 "SPM_EADDRINFO00_5,"
hexmask.long 0x40 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x44 "SPM_EADDRINFO01_5,"
hexmask.long 0x44 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x48 "SPM_EADDRINFO02_5,"
hexmask.long 0x48 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0x4C "SPM_EADDRINFO03_5,"
hexmask.long 0x4C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x50 "SPM_EADDRINFO04_5,"
hexmask.long 0x50 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x54 "SPM_EADDRINFO05_5,"
hexmask.long 0x54 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x58 "SPM_EADDRINFO06_5,"
hexmask.long 0x58 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x5C "SPM_EADDRINFO07_5,"
hexmask.long 0x5C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x60 "SPM_EADDRINFO08_5,"
hexmask.long 0x60 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x64 "SPM_EADDRINFO09_5,"
hexmask.long 0x64 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x68 "SPM_EADDRINFO10_5,"
hexmask.long 0x68 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x6C "SPM_EADDRINFO11_5,"
hexmask.long 0x6C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x70 "SPM_EADDRINFO12_5,"
hexmask.long 0x70 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x74 "SPM_EADDRINFO13_5,"
hexmask.long 0x74 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x78 "SPM_EADDRINFO14_5,"
hexmask.long 0x78 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x7C "SPM_EADDRINFO15_5,"
hexmask.long 0x7C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
tree.end
tree "IMP_X7_System_SPM_6"
base ad:0xED380000
group.long 0x0++0x3
line.long 0x0 "SPM_SPMCTRL6,This is the control register for the own Scratchpad Memory."
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "INIT,Start function of SRAM Initialization" "0,1"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
rgroup.long 0x4++0x3
line.long 0x0 "SPM_INITSTS6,This is the initializing status register for the own Scratchpad Memory."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "INITFIN,This status indicates that SRAM initialization is finished." "0,1"
bitfld.long 0x0 0. "INITST,This status indicates that SRAM initialization is started." "0,1"
group.long 0x20++0x3
line.long 0x0 "SPM_SPMECTRL6,This is the register regarding the functional safety."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ERRCLR,Error clear. It can clear SPMECOUNT  ERRINFO00-15 and EADDRINFO00-15. Set to 0 after clearing." "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "SPM_SPMECOUNT6,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x0 31. "Bit_3131,Overflow bit. This field is corresponding to 4th SRAM." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 4th SRAM."
bitfld.long 0x0 23. "Bit_2323,Overflow bit. This field is corresponding to 3rd SRAM." "0,1"
hexmask.long.byte 0x0 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 3rd SRAM."
bitfld.long 0x0 15. "Bit_1515,Overflow bit. This field is corresponding to 2nd SRAM." "0,1"
hexmask.long.byte 0x0 8.--14. 1. "Bit_148,Error count. This field is corresponding to 2nd SRAM."
bitfld.long 0x0 7. "Bit_77,Overflow bit. This field is corresponding to 1st SRAM." "0,1"
newline
hexmask.long.byte 0x0 0.--6. 1. "Bit_60,Error count. This field is corresponding to 1st SRAM."
rgroup.long 0x40++0x7F
line.long 0x0 "SPM_ERRINFO00_6,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x4 "SPM_ERRINFO01_6,"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x8 "SPM_ERRINFO02_6,"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0xC "SPM_ERRINFO03_6,"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x10 "SPM_ERRINFO04_6,"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x14 "SPM_ERRINFO05_6,"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x18 "SPM_ERRINFO06_6,"
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x1C "SPM_ERRINFO07_6,"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x20 "SPM_ERRINFO08_6,"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x24 "SPM_ERRINFO09_6,"
hexmask.long.tbyte 0x24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x28 "SPM_ERRINFO10_6,"
hexmask.long.tbyte 0x28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x28 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x2C "SPM_ERRINFO11_6,"
hexmask.long.tbyte 0x2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x30 "SPM_ERRINFO12_6,"
hexmask.long.tbyte 0x30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x30 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x34 "SPM_ERRINFO13_6,"
hexmask.long.tbyte 0x34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x34 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x38 "SPM_ERRINFO14_6,"
hexmask.long.tbyte 0x38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x38 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x3C "SPM_ERRINFO15_6,"
hexmask.long.tbyte 0x3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
line.long 0x40 "SPM_EADDRINFO00_6,"
hexmask.long 0x40 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x44 "SPM_EADDRINFO01_6,"
hexmask.long 0x44 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x48 "SPM_EADDRINFO02_6,"
hexmask.long 0x48 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0x4C "SPM_EADDRINFO03_6,"
hexmask.long 0x4C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x50 "SPM_EADDRINFO04_6,"
hexmask.long 0x50 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x54 "SPM_EADDRINFO05_6,"
hexmask.long 0x54 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x58 "SPM_EADDRINFO06_6,"
hexmask.long 0x58 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x5C "SPM_EADDRINFO07_6,"
hexmask.long 0x5C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x60 "SPM_EADDRINFO08_6,"
hexmask.long 0x60 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x64 "SPM_EADDRINFO09_6,"
hexmask.long 0x64 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x68 "SPM_EADDRINFO10_6,"
hexmask.long 0x68 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x6C "SPM_EADDRINFO11_6,"
hexmask.long 0x6C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x70 "SPM_EADDRINFO12_6,"
hexmask.long 0x70 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x74 "SPM_EADDRINFO13_6,"
hexmask.long 0x74 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x78 "SPM_EADDRINFO14_6,"
hexmask.long 0x78 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x7C "SPM_EADDRINFO15_6,"
hexmask.long 0x7C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
tree.end
tree "IMP_X7_System_SPM_7"
base ad:0xED3C0000
group.long 0x0++0x3
line.long 0x0 "SPM_SPMCTRL7,This is the control register for the own Scratchpad Memory."
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "INIT,Start function of SRAM Initialization" "0,1"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
rgroup.long 0x4++0x3
line.long 0x0 "SPM_INITSTS7,This is the initializing status register for the own Scratchpad Memory."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "INITFIN,This status indicates that SRAM initialization is finished." "0,1"
bitfld.long 0x0 0. "INITST,This status indicates that SRAM initialization is started." "0,1"
group.long 0x20++0x3
line.long 0x0 "SPM_SPMECTRL7,This is the register regarding the functional safety."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ERRCLR,Error clear. It can clear SPMECOUNT  ERRINFO00-15 and EADDRINFO00-15. Set to 0 after clearing." "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "SPM_SPMECOUNT7,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x0 31. "Bit_3131,Overflow bit. This field is corresponding to 4th SRAM." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 4th SRAM."
bitfld.long 0x0 23. "Bit_2323,Overflow bit. This field is corresponding to 3rd SRAM." "0,1"
hexmask.long.byte 0x0 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 3rd SRAM."
bitfld.long 0x0 15. "Bit_1515,Overflow bit. This field is corresponding to 2nd SRAM." "0,1"
hexmask.long.byte 0x0 8.--14. 1. "Bit_148,Error count. This field is corresponding to 2nd SRAM."
bitfld.long 0x0 7. "Bit_77,Overflow bit. This field is corresponding to 1st SRAM." "0,1"
newline
hexmask.long.byte 0x0 0.--6. 1. "Bit_60,Error count. This field is corresponding to 1st SRAM."
rgroup.long 0x40++0x7F
line.long 0x0 "SPM_ERRINFO00_7,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x4 "SPM_ERRINFO01_7,"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x8 "SPM_ERRINFO02_7,"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0xC "SPM_ERRINFO03_7,"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x10 "SPM_ERRINFO04_7,"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x14 "SPM_ERRINFO05_7,"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x18 "SPM_ERRINFO06_7,"
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x1C "SPM_ERRINFO07_7,"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x20 "SPM_ERRINFO08_7,"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x24 "SPM_ERRINFO09_7,"
hexmask.long.tbyte 0x24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x28 "SPM_ERRINFO10_7,"
hexmask.long.tbyte 0x28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x28 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x2C "SPM_ERRINFO11_7,"
hexmask.long.tbyte 0x2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x30 "SPM_ERRINFO12_7,"
hexmask.long.tbyte 0x30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x30 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x34 "SPM_ERRINFO13_7,"
hexmask.long.tbyte 0x34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x34 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x38 "SPM_ERRINFO14_7,"
hexmask.long.tbyte 0x38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x38 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x3C "SPM_ERRINFO15_7,"
hexmask.long.tbyte 0x3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
line.long 0x40 "SPM_EADDRINFO00_7,"
hexmask.long 0x40 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x44 "SPM_EADDRINFO01_7,"
hexmask.long 0x44 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x48 "SPM_EADDRINFO02_7,"
hexmask.long 0x48 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0x4C "SPM_EADDRINFO03_7,"
hexmask.long 0x4C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x50 "SPM_EADDRINFO04_7,"
hexmask.long 0x50 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x54 "SPM_EADDRINFO05_7,"
hexmask.long 0x54 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x58 "SPM_EADDRINFO06_7,"
hexmask.long 0x58 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x5C "SPM_EADDRINFO07_7,"
hexmask.long 0x5C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x60 "SPM_EADDRINFO08_7,"
hexmask.long 0x60 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x64 "SPM_EADDRINFO09_7,"
hexmask.long 0x64 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x68 "SPM_EADDRINFO10_7,"
hexmask.long 0x68 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x6C "SPM_EADDRINFO11_7,"
hexmask.long 0x6C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x70 "SPM_EADDRINFO12_7,"
hexmask.long 0x70 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x74 "SPM_EADDRINFO13_7,"
hexmask.long 0x74 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x78 "SPM_EADDRINFO14_7,"
hexmask.long 0x78 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x7C "SPM_EADDRINFO15_7,"
hexmask.long 0x7C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
tree.end
tree "IMP_X7_System_SPM_8"
base ad:0xED400000
group.long 0x0++0x3
line.long 0x0 "SPMC0_SPMCTRL,This is the control register for the own Scratchpad Memory."
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "INIT,Start function of SRAM Initialization" "0,1"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
rgroup.long 0x4++0x3
line.long 0x0 "SPMC0_INITSTS,This is the initializing status register for the own Scratchpad Memory."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "INITFIN,This status indicates that SRAM initialization is finished." "0,1"
bitfld.long 0x0 0. "INITST,This status indicates that SRAM initialization is started." "0,1"
group.long 0x200++0x3
line.long 0x0 "SPMC0_SPMECTRL,This is the register regarding the functional safety."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ERRCLR,Error clear. It can clear SPMECOUNT00-07  ERRINFO000-255 and EADDRINFO000-255. Set to 0 after clearing." "0,1"
rgroup.long 0x210++0x3F
line.long 0x0 "SPMC0_SPMECOUNT00,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x0 31. "Bit_3131,Overflow bit. This field is corresponding to 4th SRAM." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 4th SRAM."
bitfld.long 0x0 23. "Bit_2323,Overflow bit. This field is corresponding to 3rd SRAM." "0,1"
hexmask.long.byte 0x0 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 3rd SRAM."
bitfld.long 0x0 15. "Bit_1515,Overflow bit. This field is corresponding to 2nd SRAM." "0,1"
hexmask.long.byte 0x0 8.--14. 1. "Bit_148,Error count. This field is corresponding to 2nd SRAM."
bitfld.long 0x0 7. "Bit_77,Overflow bit. This field is corresponding to 1st SRAM." "0,1"
newline
hexmask.long.byte 0x0 0.--6. 1. "Bit_60,Error count. This field is corresponding to 1st SRAM."
line.long 0x4 "SPMC0_SPMECOUNT01,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x4 31. "Bit_3131,Overflow bit. This field is corresponding to 8th SRAM." "0,1"
hexmask.long.byte 0x4 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 8th SRAM."
bitfld.long 0x4 23. "Bit_2323,Overflow bit. This field is corresponding to 7th SRAM." "0,1"
hexmask.long.byte 0x4 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 7th SRAM."
bitfld.long 0x4 15. "Bit_1515,Overflow bit. This field is corresponding to 6th SRAM." "0,1"
hexmask.long.byte 0x4 8.--14. 1. "Bit_148,Error count. This field is corresponding to 6th SRAM."
bitfld.long 0x4 7. "Bit_77,Overflow bit. This field is corresponding to 5th SRAM." "0,1"
newline
hexmask.long.byte 0x4 0.--6. 1. "Bit_60,Error count. This field is corresponding to 5th SRAM."
line.long 0x8 "SPMC0_SPMECOUNT02,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x8 31. "Bit_3131,Overflow bit. This field is corresponding to 12th SRAM." "0,1"
hexmask.long.byte 0x8 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 12th SRAM."
bitfld.long 0x8 23. "Bit_2323,Overflow bit. This field is corresponding to 11th SRAM." "0,1"
hexmask.long.byte 0x8 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 11th SRAM."
bitfld.long 0x8 15. "Bit_1515,Overflow bit. This field is corresponding to 10th SRAM." "0,1"
hexmask.long.byte 0x8 8.--14. 1. "Bit_148,Error count. This field is corresponding to 10th SRAM."
bitfld.long 0x8 7. "Bit_77,Overflow bit. This field is corresponding to 9th SRAM." "0,1"
newline
hexmask.long.byte 0x8 0.--6. 1. "Bit_60,Error count. This field is corresponding to 9th SRAM."
line.long 0xC "SPMC0_SPMECOUNT03,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0xC 31. "Bit_3131,Overflow bit. This field is corresponding to 16th SRAM." "0,1"
hexmask.long.byte 0xC 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 16th SRAM."
bitfld.long 0xC 23. "Bit_2323,Overflow bit. This field is corresponding to 15th SRAM." "0,1"
hexmask.long.byte 0xC 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 15th SRAM."
bitfld.long 0xC 15. "Bit_1515,Overflow bit. This field is corresponding to 14th SRAM." "0,1"
hexmask.long.byte 0xC 8.--14. 1. "Bit_148,Error count. This field is corresponding to 14th SRAM."
bitfld.long 0xC 7. "Bit_77,Overflow bit. This field is corresponding to 13th SRAM." "0,1"
newline
hexmask.long.byte 0xC 0.--6. 1. "Bit_60,Error count. This field is corresponding to 13th SRAM."
line.long 0x10 "SPMC0_SPMECOUNT04,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x10 31. "Bit_3131,Overflow bit. This field is corresponding to 20th SRAM." "0,1"
hexmask.long.byte 0x10 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 20th SRAM."
bitfld.long 0x10 23. "Bit_2323,Overflow bit. This field is corresponding to 19th SRAM." "0,1"
hexmask.long.byte 0x10 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 19th SRAM."
bitfld.long 0x10 15. "Bit_1515,Overflow bit. This field is corresponding to 18th SRAM." "0,1"
hexmask.long.byte 0x10 8.--14. 1. "Bit_148,Error count. This field is corresponding to 18th SRAM."
bitfld.long 0x10 7. "Bit_77,Overflow bit. This field is corresponding to 17th SRAM." "0,1"
newline
hexmask.long.byte 0x10 0.--6. 1. "Bit_60,Error count. This field is corresponding to 17th SRAM."
line.long 0x14 "SPMC0_SPMECOUNT05,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x14 31. "Bit_3131,Overflow bit. This field is corresponding to 24th SRAM." "0,1"
hexmask.long.byte 0x14 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 24th SRAM."
bitfld.long 0x14 23. "Bit_2323,Overflow bit. This field is corresponding to 23th SRAM." "0,1"
hexmask.long.byte 0x14 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 23th SRAM."
bitfld.long 0x14 15. "Bit_1515,Overflow bit. This field is corresponding to 22th SRAM." "0,1"
hexmask.long.byte 0x14 8.--14. 1. "Bit_148,Error count. This field is corresponding to 22th SRAM."
bitfld.long 0x14 7. "Bit_77,Overflow bit. This field is corresponding to 21th SRAM." "0,1"
newline
hexmask.long.byte 0x14 0.--6. 1. "Bit_60,Error count. This field is corresponding to 21th SRAM."
line.long 0x18 "SPMC0_SPMECOUNT06,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x18 31. "Bit_3131,Overflow bit. This field is corresponding to 28th SRAM." "0,1"
hexmask.long.byte 0x18 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 28th SRAM."
bitfld.long 0x18 23. "Bit_2323,Overflow bit. This field is corresponding to 27th SRAM." "0,1"
hexmask.long.byte 0x18 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 27th SRAM."
bitfld.long 0x18 15. "Bit_1515,Overflow bit. This field is corresponding to 26th SRAM." "0,1"
hexmask.long.byte 0x18 8.--14. 1. "Bit_148,Error count. This field is corresponding to 26th SRAM."
bitfld.long 0x18 7. "Bit_77,Overflow bit. This field is corresponding to 25th SRAM." "0,1"
newline
hexmask.long.byte 0x18 0.--6. 1. "Bit_60,Error count. This field is corresponding to 25th SRAM."
line.long 0x1C "SPMC0_SPMECOUNT07,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x1C 31. "Bit_3131,Overflow bit. This field is corresponding to 32th SRAM." "0,1"
hexmask.long.byte 0x1C 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 32th SRAM."
bitfld.long 0x1C 23. "Bit_2323,Overflow bit. This field is corresponding to 31th SRAM." "0,1"
hexmask.long.byte 0x1C 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 31th SRAM."
bitfld.long 0x1C 15. "Bit_1515,Overflow bit. This field is corresponding to 30th SRAM." "0,1"
hexmask.long.byte 0x1C 8.--14. 1. "Bit_148,Error count. This field is corresponding to 30th SRAM."
bitfld.long 0x1C 7. "Bit_77,Overflow bit. This field is corresponding to 29th SRAM." "0,1"
newline
hexmask.long.byte 0x1C 0.--6. 1. "Bit_60,Error count. This field is corresponding to 29th SRAM."
line.long 0x20 "SPMC0_SPMECOUNT08,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x20 31. "Bit_3131,Overflow bit. This field is corresponding to 36th SRAM." "0,1"
hexmask.long.byte 0x20 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 36th SRAM."
bitfld.long 0x20 23. "Bit_2323,Overflow bit. This field is corresponding to 35th SRAM." "0,1"
hexmask.long.byte 0x20 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 35th SRAM."
bitfld.long 0x20 15. "Bit_1515,Overflow bit. This field is corresponding to 34th SRAM." "0,1"
hexmask.long.byte 0x20 8.--14. 1. "Bit_148,Error count. This field is corresponding to 34th SRAM."
bitfld.long 0x20 7. "Bit_77,Overflow bit. This field is corresponding to 33th SRAM." "0,1"
newline
hexmask.long.byte 0x20 0.--6. 1. "Bit_60,Error count. This field is corresponding to 33th SRAM."
line.long 0x24 "SPMC0_SPMECOUNT09,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x24 31. "Bit_3131,Overflow bit. This field is corresponding to 40th SRAM." "0,1"
hexmask.long.byte 0x24 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 40th SRAM."
bitfld.long 0x24 23. "Bit_2323,Overflow bit. This field is corresponding to 39th SRAM." "0,1"
hexmask.long.byte 0x24 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 39th SRAM."
bitfld.long 0x24 15. "Bit_1515,Overflow bit. This field is corresponding to 38th SRAM." "0,1"
hexmask.long.byte 0x24 8.--14. 1. "Bit_148,Error count. This field is corresponding to 38th SRAM."
bitfld.long 0x24 7. "Bit_77,Overflow bit. This field is corresponding to 37th SRAM." "0,1"
newline
hexmask.long.byte 0x24 0.--6. 1. "Bit_60,Error count. This field is corresponding to 37th SRAM."
line.long 0x28 "SPMC0_SPMECOUNT10,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x28 31. "Bit_3131,Overflow bit. This field is corresponding to 44th SRAM." "0,1"
hexmask.long.byte 0x28 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 44th SRAM."
bitfld.long 0x28 23. "Bit_2323,Overflow bit. This field is corresponding to 43th SRAM." "0,1"
hexmask.long.byte 0x28 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 43th SRAM."
bitfld.long 0x28 15. "Bit_1515,Overflow bit. This field is corresponding to 42th SRAM." "0,1"
hexmask.long.byte 0x28 8.--14. 1. "Bit_148,Error count. This field is corresponding to 42th SRAM."
bitfld.long 0x28 7. "Bit_77,Overflow bit. This field is corresponding to 41th SRAM." "0,1"
newline
hexmask.long.byte 0x28 0.--6. 1. "Bit_60,Error count. This field is corresponding to 41th SRAM."
line.long 0x2C "SPMC0_SPMECOUNT11,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x2C 31. "Bit_3131,Overflow bit. This field is corresponding to 48th SRAM." "0,1"
hexmask.long.byte 0x2C 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 48th SRAM."
bitfld.long 0x2C 23. "Bit_2323,Overflow bit. This field is corresponding to 47th SRAM." "0,1"
hexmask.long.byte 0x2C 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 47th SRAM."
bitfld.long 0x2C 15. "Bit_1515,Overflow bit. This field is corresponding to 46th SRAM." "0,1"
hexmask.long.byte 0x2C 8.--14. 1. "Bit_148,Error count. This field is corresponding to 46th SRAM."
bitfld.long 0x2C 7. "Bit_77,Overflow bit. This field is corresponding to 45th SRAM." "0,1"
newline
hexmask.long.byte 0x2C 0.--6. 1. "Bit_60,Error count. This field is corresponding to 45th SRAM."
line.long 0x30 "SPMC0_SPMECOUNT12,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x30 31. "Bit_3131,Overflow bit. This field is corresponding to 52th SRAM." "0,1"
hexmask.long.byte 0x30 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 52th SRAM."
bitfld.long 0x30 23. "Bit_2323,Overflow bit. This field is corresponding to 51th SRAM." "0,1"
hexmask.long.byte 0x30 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 51th SRAM."
bitfld.long 0x30 15. "Bit_1515,Overflow bit. This field is corresponding to 50th SRAM." "0,1"
hexmask.long.byte 0x30 8.--14. 1. "Bit_148,Error count. This field is corresponding to 50th SRAM."
bitfld.long 0x30 7. "Bit_77,Overflow bit. This field is corresponding to 49th SRAM." "0,1"
newline
hexmask.long.byte 0x30 0.--6. 1. "Bit_60,Error count. This field is corresponding to 49th SRAM."
line.long 0x34 "SPMC0_SPMECOUNT13,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x34 31. "Bit_3131,Overflow bit. This field is corresponding to 56th SRAM." "0,1"
hexmask.long.byte 0x34 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 56th SRAM."
bitfld.long 0x34 23. "Bit_2323,Overflow bit. This field is corresponding to 55th SRAM." "0,1"
hexmask.long.byte 0x34 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 55th SRAM."
bitfld.long 0x34 15. "Bit_1515,Overflow bit. This field is corresponding to 54th SRAM." "0,1"
hexmask.long.byte 0x34 8.--14. 1. "Bit_148,Error count. This field is corresponding to 54th SRAM."
bitfld.long 0x34 7. "Bit_77,Overflow bit. This field is corresponding to 53th SRAM." "0,1"
newline
hexmask.long.byte 0x34 0.--6. 1. "Bit_60,Error count. This field is corresponding to 53th SRAM."
line.long 0x38 "SPMC0_SPMECOUNT14,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x38 31. "Bit_3131,Overflow bit. This field is corresponding to 60th SRAM." "0,1"
hexmask.long.byte 0x38 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 60th SRAM."
bitfld.long 0x38 23. "Bit_2323,Overflow bit. This field is corresponding to 59th SRAM." "0,1"
hexmask.long.byte 0x38 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 59th SRAM."
bitfld.long 0x38 15. "Bit_1515,Overflow bit. This field is corresponding to 58th SRAM." "0,1"
hexmask.long.byte 0x38 8.--14. 1. "Bit_148,Error count. This field is corresponding to 58th SRAM."
bitfld.long 0x38 7. "Bit_77,Overflow bit. This field is corresponding to 57th SRAM." "0,1"
newline
hexmask.long.byte 0x38 0.--6. 1. "Bit_60,Error count. This field is corresponding to 57th SRAM."
line.long 0x3C "SPMC0_SPMECOUNT15,This register indicates the number of SRAM ECC/EDC error."
bitfld.long 0x3C 31. "Bit_3131,Overflow bit. This field is corresponding to 64th SRAM." "0,1"
hexmask.long.byte 0x3C 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 64th SRAM."
bitfld.long 0x3C 23. "Bit_2323,Overflow bit. This field is corresponding to 63th SRAM." "0,1"
hexmask.long.byte 0x3C 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 63th SRAM."
bitfld.long 0x3C 15. "Bit_1515,Overflow bit. This field is corresponding to 62th SRAM." "0,1"
hexmask.long.byte 0x3C 8.--14. 1. "Bit_148,Error count. This field is corresponding to 62th SRAM."
bitfld.long 0x3C 7. "Bit_77,Overflow bit. This field is corresponding to 61th SRAM." "0,1"
newline
hexmask.long.byte 0x3C 0.--6. 1. "Bit_60,Error count. This field is corresponding to 61th SRAM."
rgroup.long 0x300++0x7FF
line.long 0x0 "SPMC0_ERRINFO000,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x4 "SPMC0_ERRINFO001,"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x8 "SPMC0_ERRINFO002,"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0xC "SPMC0_ERRINFO003,"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x10 "SPMC0_ERRINFO004,"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x14 "SPMC0_ERRINFO005,"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x18 "SPMC0_ERRINFO006,"
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x1C "SPMC0_ERRINFO007,"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x20 "SPMC0_ERRINFO008,"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x24 "SPMC0_ERRINFO009,"
hexmask.long.tbyte 0x24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x28 "SPMC0_ERRINFO010,"
hexmask.long.tbyte 0x28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x28 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x2C "SPMC0_ERRINFO011,"
hexmask.long.tbyte 0x2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x30 "SPMC0_ERRINFO012,"
hexmask.long.tbyte 0x30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x30 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x34 "SPMC0_ERRINFO013,"
hexmask.long.tbyte 0x34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x34 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x38 "SPMC0_ERRINFO014,"
hexmask.long.tbyte 0x38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x38 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x3C "SPMC0_ERRINFO015,"
hexmask.long.tbyte 0x3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
line.long 0x40 "SPMC0_ERRINFO016,"
hexmask.long.tbyte 0x40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x40 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 5th SRAM is happened. This record is 1st error."
line.long 0x44 "SPMC0_ERRINFO017,"
hexmask.long.tbyte 0x44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x44 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 5th SRAM is happened. This record is 2nd error."
line.long 0x48 "SPMC0_ERRINFO018,"
hexmask.long.tbyte 0x48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x48 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 5th SRAM is happened. This record is 3rd error."
line.long 0x4C "SPMC0_ERRINFO019,"
hexmask.long.tbyte 0x4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 5th SRAM is happened. This record is 4th error."
line.long 0x50 "SPMC0_ERRINFO020,"
hexmask.long.tbyte 0x50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x50 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 6th SRAM is happened. This record is 1st error."
line.long 0x54 "SPMC0_ERRINFO021,"
hexmask.long.tbyte 0x54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x54 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 6th SRAM is happened. This record is 2nd error."
line.long 0x58 "SPMC0_ERRINFO022,"
hexmask.long.tbyte 0x58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x58 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 6th SRAM is happened. This record is 3rd error."
line.long 0x5C "SPMC0_ERRINFO023,"
hexmask.long.tbyte 0x5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 6th SRAM is happened. This record is 4th error."
line.long 0x60 "SPMC0_ERRINFO024,"
hexmask.long.tbyte 0x60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x60 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 7th SRAM is happened. This record is 1st error."
line.long 0x64 "SPMC0_ERRINFO025,"
hexmask.long.tbyte 0x64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x64 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 7th SRAM is happened. This record is 2nd error."
line.long 0x68 "SPMC0_ERRINFO026,"
hexmask.long.tbyte 0x68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x68 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 7th SRAM is happened. This record is 3rd error."
line.long 0x6C "SPMC0_ERRINFO027,"
hexmask.long.tbyte 0x6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 7th SRAM is happened. This record is 4th error."
line.long 0x70 "SPMC0_ERRINFO028,"
hexmask.long.tbyte 0x70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x70 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 8th SRAM is happened. This record is 1st error."
line.long 0x74 "SPMC0_ERRINFO029,"
hexmask.long.tbyte 0x74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x74 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 8th SRAM is happened. This record is 2nd error."
line.long 0x78 "SPMC0_ERRINFO030,"
hexmask.long.tbyte 0x78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x78 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 8th SRAM is happened. This record is 3rd error."
line.long 0x7C "SPMC0_ERRINFO031,"
hexmask.long.tbyte 0x7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 8th SRAM is happened. This record is 4th error."
line.long 0x80 "SPMC0_ERRINFO032,"
hexmask.long.tbyte 0x80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x80 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 9th SRAM is happened. This record is 1st error."
line.long 0x84 "SPMC0_ERRINFO033,"
hexmask.long.tbyte 0x84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x84 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 9th SRAM is happened. This record is 2nd error."
line.long 0x88 "SPMC0_ERRINFO034,"
hexmask.long.tbyte 0x88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x88 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 9th SRAM is happened. This record is 3rd error."
line.long 0x8C "SPMC0_ERRINFO035,"
hexmask.long.tbyte 0x8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 9th SRAM is happened. This record is 4th error."
line.long 0x90 "SPMC0_ERRINFO036,"
hexmask.long.tbyte 0x90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x90 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 10th SRAM is happened. This record is 1st error."
line.long 0x94 "SPMC0_ERRINFO037,"
hexmask.long.tbyte 0x94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x94 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 10th SRAM is happened. This record is 2nd error."
line.long 0x98 "SPMC0_ERRINFO038,"
hexmask.long.tbyte 0x98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x98 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 10th SRAM is happened. This record is 3rd error."
line.long 0x9C "SPMC0_ERRINFO039,"
hexmask.long.tbyte 0x9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 10th SRAM is happened. This record is 4th error."
line.long 0xA0 "SPMC0_ERRINFO040,"
hexmask.long.tbyte 0xA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 11th SRAM is happened. This record is 1st error."
line.long 0xA4 "SPMC0_ERRINFO041,"
hexmask.long.tbyte 0xA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 11th SRAM is happened. This record is 2nd error."
line.long 0xA8 "SPMC0_ERRINFO042,"
hexmask.long.tbyte 0xA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 11th SRAM is happened. This record is 3rd error."
line.long 0xAC "SPMC0_ERRINFO043,"
hexmask.long.tbyte 0xAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 11th SRAM is happened. This record is 4th error."
line.long 0xB0 "SPMC0_ERRINFO044,"
hexmask.long.tbyte 0xB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 12th SRAM is happened. This record is 1st error."
line.long 0xB4 "SPMC0_ERRINFO045,"
hexmask.long.tbyte 0xB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 12th SRAM is happened. This record is 2nd error."
line.long 0xB8 "SPMC0_ERRINFO046,"
hexmask.long.tbyte 0xB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 12th SRAM is happened. This record is 3rd error."
line.long 0xBC "SPMC0_ERRINFO047,"
hexmask.long.tbyte 0xBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 12th SRAM is happened. This record is 4th error."
line.long 0xC0 "SPMC0_ERRINFO048,"
hexmask.long.tbyte 0xC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 13th SRAM is happened. This record is 1st error."
line.long 0xC4 "SPMC0_ERRINFO049,"
hexmask.long.tbyte 0xC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 13th SRAM is happened. This record is 2nd error."
line.long 0xC8 "SPMC0_ERRINFO050,"
hexmask.long.tbyte 0xC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 13th SRAM is happened. This record is 3rd error."
line.long 0xCC "SPMC0_ERRINFO051,"
hexmask.long.tbyte 0xCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 13th SRAM is happened. This record is 4th error."
line.long 0xD0 "SPMC0_ERRINFO052,"
hexmask.long.tbyte 0xD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 14th SRAM is happened. This record is 1st error."
line.long 0xD4 "SPMC0_ERRINFO053,"
hexmask.long.tbyte 0xD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 14th SRAM is happened. This record is 2nd error."
line.long 0xD8 "SPMC0_ERRINFO054,"
hexmask.long.tbyte 0xD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 14th SRAM is happened. This record is 3rd error."
line.long 0xDC "SPMC0_ERRINFO055,"
hexmask.long.tbyte 0xDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 14th SRAM is happened. This record is 4th error."
line.long 0xE0 "SPMC0_ERRINFO056,"
hexmask.long.tbyte 0xE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 15th SRAM is happened. This record is 1st error."
line.long 0xE4 "SPMC0_ERRINFO057,"
hexmask.long.tbyte 0xE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 15th SRAM is happened. This record is 2nd error."
line.long 0xE8 "SPMC0_ERRINFO058,"
hexmask.long.tbyte 0xE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 15th SRAM is happened. This record is 3rd error."
line.long 0xEC "SPMC0_ERRINFO059,"
hexmask.long.tbyte 0xEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 15th SRAM is happened. This record is 4th error."
line.long 0xF0 "SPMC0_ERRINFO060,"
hexmask.long.tbyte 0xF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 16th SRAM is happened. This record is 1st error."
line.long 0xF4 "SPMC0_ERRINFO061,"
hexmask.long.tbyte 0xF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 16th SRAM is happened. This record is 2nd error."
line.long 0xF8 "SPMC0_ERRINFO062,"
hexmask.long.tbyte 0xF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 16th SRAM is happened. This record is 3rd error."
line.long 0xFC "SPMC0_ERRINFO063,"
hexmask.long.tbyte 0xFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 16th SRAM is happened. This record is 4th error."
line.long 0x100 "SPMC0_ERRINFO064,"
hexmask.long.tbyte 0x100 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x100 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 17th SRAM is happened. This record is 1st error."
line.long 0x104 "SPMC0_ERRINFO065,"
hexmask.long.tbyte 0x104 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x104 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 17th SRAM is happened. This record is 2nd error."
line.long 0x108 "SPMC0_ERRINFO066,"
hexmask.long.tbyte 0x108 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x108 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 17th SRAM is happened. This record is 3rd error."
line.long 0x10C "SPMC0_ERRINFO067,"
hexmask.long.tbyte 0x10C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 17th SRAM is happened. This record is 4th error."
line.long 0x110 "SPMC0_ERRINFO068,"
hexmask.long.tbyte 0x110 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x110 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 18th SRAM is happened. This record is 1st error."
line.long 0x114 "SPMC0_ERRINFO069,"
hexmask.long.tbyte 0x114 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x114 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 18th SRAM is happened. This record is 2nd error."
line.long 0x118 "SPMC0_ERRINFO070,"
hexmask.long.tbyte 0x118 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x118 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 18th SRAM is happened. This record is 3rd error."
line.long 0x11C "SPMC0_ERRINFO071,"
hexmask.long.tbyte 0x11C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x11C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 18th SRAM is happened. This record is 4th error."
line.long 0x120 "SPMC0_ERRINFO072,"
hexmask.long.tbyte 0x120 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x120 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 19th SRAM is happened. This record is 1st error."
line.long 0x124 "SPMC0_ERRINFO073,"
hexmask.long.tbyte 0x124 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x124 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 19th SRAM is happened. This record is 2nd error."
line.long 0x128 "SPMC0_ERRINFO074,"
hexmask.long.tbyte 0x128 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x128 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 19th SRAM is happened. This record is 3rd error."
line.long 0x12C "SPMC0_ERRINFO075,"
hexmask.long.tbyte 0x12C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x12C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 19th SRAM is happened. This record is 4th error."
line.long 0x130 "SPMC0_ERRINFO076,"
hexmask.long.tbyte 0x130 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x130 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 20th SRAM is happened. This record is 1st error."
line.long 0x134 "SPMC0_ERRINFO077,"
hexmask.long.tbyte 0x134 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x134 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 20th SRAM is happened. This record is 2nd error."
line.long 0x138 "SPMC0_ERRINFO078,"
hexmask.long.tbyte 0x138 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x138 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 20th SRAM is happened. This record is 3rd error."
line.long 0x13C "SPMC0_ERRINFO079,"
hexmask.long.tbyte 0x13C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x13C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 20th SRAM is happened. This record is 4th error."
line.long 0x140 "SPMC0_ERRINFO080,"
hexmask.long.tbyte 0x140 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x140 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 21th SRAM is happened. This record is 1st error."
line.long 0x144 "SPMC0_ERRINFO081,"
hexmask.long.tbyte 0x144 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x144 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 21th SRAM is happened. This record is 2nd error."
line.long 0x148 "SPMC0_ERRINFO082,"
hexmask.long.tbyte 0x148 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x148 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 21th SRAM is happened. This record is 3rd error."
line.long 0x14C "SPMC0_ERRINFO083,"
hexmask.long.tbyte 0x14C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 21th SRAM is happened. This record is 4th error."
line.long 0x150 "SPMC0_ERRINFO084,"
hexmask.long.tbyte 0x150 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x150 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 22th SRAM is happened. This record is 1st error."
line.long 0x154 "SPMC0_ERRINFO085,"
hexmask.long.tbyte 0x154 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x154 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 22th SRAM is happened. This record is 2nd error."
line.long 0x158 "SPMC0_ERRINFO086,"
hexmask.long.tbyte 0x158 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x158 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 22th SRAM is happened. This record is 3rd error."
line.long 0x15C "SPMC0_ERRINFO087,"
hexmask.long.tbyte 0x15C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x15C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 22th SRAM is happened. This record is 4th error."
line.long 0x160 "SPMC0_ERRINFO088,"
hexmask.long.tbyte 0x160 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x160 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 23th SRAM is happened. This record is 1st error."
line.long 0x164 "SPMC0_ERRINFO089,"
hexmask.long.tbyte 0x164 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x164 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 23th SRAM is happened. This record is 2nd error."
line.long 0x168 "SPMC0_ERRINFO090,"
hexmask.long.tbyte 0x168 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x168 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 23th SRAM is happened. This record is 3rd error."
line.long 0x16C "SPMC0_ERRINFO091,"
hexmask.long.tbyte 0x16C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x16C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 23th SRAM is happened. This record is 4th error."
line.long 0x170 "SPMC0_ERRINFO092,"
hexmask.long.tbyte 0x170 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x170 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 24th SRAM is happened. This record is 1st error."
line.long 0x174 "SPMC0_ERRINFO093,"
hexmask.long.tbyte 0x174 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x174 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 24th SRAM is happened. This record is 2nd error."
line.long 0x178 "SPMC0_ERRINFO094,"
hexmask.long.tbyte 0x178 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x178 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 24th SRAM is happened. This record is 3rd error."
line.long 0x17C "SPMC0_ERRINFO095,"
hexmask.long.tbyte 0x17C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x17C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 24th SRAM is happened. This record is 4th error."
line.long 0x180 "SPMC0_ERRINFO096,"
hexmask.long.tbyte 0x180 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x180 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 25th SRAM is happened. This record is 1st error."
line.long 0x184 "SPMC0_ERRINFO097,"
hexmask.long.tbyte 0x184 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x184 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 25th SRAM is happened. This record is 2nd error."
line.long 0x188 "SPMC0_ERRINFO098,"
hexmask.long.tbyte 0x188 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x188 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 25th SRAM is happened. This record is 3rd error."
line.long 0x18C "SPMC0_ERRINFO099,"
hexmask.long.tbyte 0x18C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 25th SRAM is happened. This record is 4th error."
line.long 0x190 "SPMC0_ERRINFO100,"
hexmask.long.tbyte 0x190 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x190 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 26th SRAM is happened. This record is 1st error."
line.long 0x194 "SPMC0_ERRINFO101,"
hexmask.long.tbyte 0x194 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x194 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 26th SRAM is happened. This record is 2nd error."
line.long 0x198 "SPMC0_ERRINFO102,"
hexmask.long.tbyte 0x198 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x198 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 26th SRAM is happened. This record is 3rd error."
line.long 0x19C "SPMC0_ERRINFO103,"
hexmask.long.tbyte 0x19C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x19C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 26th SRAM is happened. This record is 4th error."
line.long 0x1A0 "SPMC0_ERRINFO104,"
hexmask.long.tbyte 0x1A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1A0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 27th SRAM is happened. This record is 1st error."
line.long 0x1A4 "SPMC0_ERRINFO105,"
hexmask.long.tbyte 0x1A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1A4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 27th SRAM is happened. This record is 2nd error."
line.long 0x1A8 "SPMC0_ERRINFO106,"
hexmask.long.tbyte 0x1A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1A8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 27th SRAM is happened. This record is 3rd error."
line.long 0x1AC "SPMC0_ERRINFO107,"
hexmask.long.tbyte 0x1AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1AC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 27th SRAM is happened. This record is 4th error."
line.long 0x1B0 "SPMC0_ERRINFO108,"
hexmask.long.tbyte 0x1B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1B0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 28th SRAM is happened. This record is 1st error."
line.long 0x1B4 "SPMC0_ERRINFO109,"
hexmask.long.tbyte 0x1B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1B4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 28th SRAM is happened. This record is 2nd error."
line.long 0x1B8 "SPMC0_ERRINFO110,"
hexmask.long.tbyte 0x1B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1B8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 28th SRAM is happened. This record is 3rd error."
line.long 0x1BC "SPMC0_ERRINFO111,"
hexmask.long.tbyte 0x1BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1BC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 28th SRAM is happened. This record is 4th error."
line.long 0x1C0 "SPMC0_ERRINFO112,"
hexmask.long.tbyte 0x1C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 29th SRAM is happened. This record is 1st error."
line.long 0x1C4 "SPMC0_ERRINFO113,"
hexmask.long.tbyte 0x1C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 29th SRAM is happened. This record is 2nd error."
line.long 0x1C8 "SPMC0_ERRINFO114,"
hexmask.long.tbyte 0x1C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 29th SRAM is happened. This record is 3rd error."
line.long 0x1CC "SPMC0_ERRINFO115,"
hexmask.long.tbyte 0x1CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1CC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 29th SRAM is happened. This record is 4th error."
line.long 0x1D0 "SPMC0_ERRINFO116,"
hexmask.long.tbyte 0x1D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1D0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 30th SRAM is happened. This record is 1st error."
line.long 0x1D4 "SPMC0_ERRINFO117,"
hexmask.long.tbyte 0x1D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1D4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 30th SRAM is happened. This record is 2nd error."
line.long 0x1D8 "SPMC0_ERRINFO118,"
hexmask.long.tbyte 0x1D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1D8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 30th SRAM is happened. This record is 3rd error."
line.long 0x1DC "SPMC0_ERRINFO119,"
hexmask.long.tbyte 0x1DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1DC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 30th SRAM is happened. This record is 4th error."
line.long 0x1E0 "SPMC0_ERRINFO120,"
hexmask.long.tbyte 0x1E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1E0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 31th SRAM is happened. This record is 1st error."
line.long 0x1E4 "SPMC0_ERRINFO121,"
hexmask.long.tbyte 0x1E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1E4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 31th SRAM is happened. This record is 2nd error."
line.long 0x1E8 "SPMC0_ERRINFO122,"
hexmask.long.tbyte 0x1E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1E8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 31th SRAM is happened. This record is 3rd error."
line.long 0x1EC "SPMC0_ERRINFO123,"
hexmask.long.tbyte 0x1EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1EC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 31th SRAM is happened. This record is 4th error."
line.long 0x1F0 "SPMC0_ERRINFO124,"
hexmask.long.tbyte 0x1F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1F0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 32th SRAM is happened. This record is 1st error."
line.long 0x1F4 "SPMC0_ERRINFO125,"
hexmask.long.tbyte 0x1F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1F4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 32th SRAM is happened. This record is 2nd error."
line.long 0x1F8 "SPMC0_ERRINFO126,"
hexmask.long.tbyte 0x1F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1F8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 32th SRAM is happened. This record is 3rd error."
line.long 0x1FC "SPMC0_ERRINFO127,"
hexmask.long.tbyte 0x1FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1FC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 32th SRAM is happened. This record is 4th error."
line.long 0x200 "SPMC0_ERRINFO128,"
hexmask.long.tbyte 0x200 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x200 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 33th SRAM is happened. This record is 1st error."
line.long 0x204 "SPMC0_ERRINFO129,"
hexmask.long.tbyte 0x204 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x204 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 33th SRAM is happened. This record is 2nd error."
line.long 0x208 "SPMC0_ERRINFO130,"
hexmask.long.tbyte 0x208 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x208 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 33th SRAM is happened. This record is 3rd error."
line.long 0x20C "SPMC0_ERRINFO131,"
hexmask.long.tbyte 0x20C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 33th SRAM is happened. This record is 4th error."
line.long 0x210 "SPMC0_ERRINFO132,"
hexmask.long.tbyte 0x210 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x210 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 34th SRAM is happened. This record is 1st error."
line.long 0x214 "SPMC0_ERRINFO133,"
hexmask.long.tbyte 0x214 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x214 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 34th SRAM is happened. This record is 2nd error."
line.long 0x218 "SPMC0_ERRINFO134,"
hexmask.long.tbyte 0x218 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x218 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 34th SRAM is happened. This record is 3rd error."
line.long 0x21C "SPMC0_ERRINFO135,"
hexmask.long.tbyte 0x21C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x21C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 34th SRAM is happened. This record is 4th error."
line.long 0x220 "SPMC0_ERRINFO136,"
hexmask.long.tbyte 0x220 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x220 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 35th SRAM is happened. This record is 1st error."
line.long 0x224 "SPMC0_ERRINFO137,"
hexmask.long.tbyte 0x224 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x224 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 35th SRAM is happened. This record is 2nd error."
line.long 0x228 "SPMC0_ERRINFO138,"
hexmask.long.tbyte 0x228 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x228 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 35th SRAM is happened. This record is 3rd error."
line.long 0x22C "SPMC0_ERRINFO139,"
hexmask.long.tbyte 0x22C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x22C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 35th SRAM is happened. This record is 4th error."
line.long 0x230 "SPMC0_ERRINFO140,"
hexmask.long.tbyte 0x230 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x230 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 36th SRAM is happened. This record is 1st error."
line.long 0x234 "SPMC0_ERRINFO141,"
hexmask.long.tbyte 0x234 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x234 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 36th SRAM is happened. This record is 2nd error."
line.long 0x238 "SPMC0_ERRINFO142,"
hexmask.long.tbyte 0x238 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x238 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 36th SRAM is happened. This record is 3rd error."
line.long 0x23C "SPMC0_ERRINFO143,"
hexmask.long.tbyte 0x23C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x23C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 36th SRAM is happened. This record is 4th error."
line.long 0x240 "SPMC0_ERRINFO144,"
hexmask.long.tbyte 0x240 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x240 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 37th SRAM is happened. This record is 1st error."
line.long 0x244 "SPMC0_ERRINFO145,"
hexmask.long.tbyte 0x244 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x244 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 37th SRAM is happened. This record is 2nd error."
line.long 0x248 "SPMC0_ERRINFO146,"
hexmask.long.tbyte 0x248 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x248 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 37th SRAM is happened. This record is 3rd error."
line.long 0x24C "SPMC0_ERRINFO147,"
hexmask.long.tbyte 0x24C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 37th SRAM is happened. This record is 4th error."
line.long 0x250 "SPMC0_ERRINFO148,"
hexmask.long.tbyte 0x250 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x250 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 38th SRAM is happened. This record is 1st error."
line.long 0x254 "SPMC0_ERRINFO149,"
hexmask.long.tbyte 0x254 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x254 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 38th SRAM is happened. This record is 2nd error."
line.long 0x258 "SPMC0_ERRINFO150,"
hexmask.long.tbyte 0x258 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x258 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 38th SRAM is happened. This record is 3rd error."
line.long 0x25C "SPMC0_ERRINFO151,"
hexmask.long.tbyte 0x25C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x25C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 38th SRAM is happened. This record is 4th error."
line.long 0x260 "SPMC0_ERRINFO152,"
hexmask.long.tbyte 0x260 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x260 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 39th SRAM is happened. This record is 1st error."
line.long 0x264 "SPMC0_ERRINFO153,"
hexmask.long.tbyte 0x264 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x264 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 39th SRAM is happened. This record is 2nd error."
line.long 0x268 "SPMC0_ERRINFO154,"
hexmask.long.tbyte 0x268 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x268 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 39th SRAM is happened. This record is 3rd error."
line.long 0x26C "SPMC0_ERRINFO155,"
hexmask.long.tbyte 0x26C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x26C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 39th SRAM is happened. This record is 4th error."
line.long 0x270 "SPMC0_ERRINFO156,"
hexmask.long.tbyte 0x270 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x270 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 40th SRAM is happened. This record is 1st error."
line.long 0x274 "SPMC0_ERRINFO157,"
hexmask.long.tbyte 0x274 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x274 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 40th SRAM is happened. This record is 2nd error."
line.long 0x278 "SPMC0_ERRINFO158,"
hexmask.long.tbyte 0x278 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x278 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 40th SRAM is happened. This record is 3rd error."
line.long 0x27C "SPMC0_ERRINFO159,"
hexmask.long.tbyte 0x27C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x27C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 40th SRAM is happened. This record is 4th error."
line.long 0x280 "SPMC0_ERRINFO160,"
hexmask.long.tbyte 0x280 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x280 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 41th SRAM is happened. This record is 1st error."
line.long 0x284 "SPMC0_ERRINFO161,"
hexmask.long.tbyte 0x284 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x284 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 41th SRAM is happened. This record is 2nd error."
line.long 0x288 "SPMC0_ERRINFO162,"
hexmask.long.tbyte 0x288 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x288 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 41th SRAM is happened. This record is 3rd error."
line.long 0x28C "SPMC0_ERRINFO163,"
hexmask.long.tbyte 0x28C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x28C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 41th SRAM is happened. This record is 4th error."
line.long 0x290 "SPMC0_ERRINFO164,"
hexmask.long.tbyte 0x290 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x290 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 42th SRAM is happened. This record is 1st error."
line.long 0x294 "SPMC0_ERRINFO165,"
hexmask.long.tbyte 0x294 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x294 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 42th SRAM is happened. This record is 2nd error."
line.long 0x298 "SPMC0_ERRINFO166,"
hexmask.long.tbyte 0x298 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x298 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 42th SRAM is happened. This record is 3rd error."
line.long 0x29C "SPMC0_ERRINFO167,"
hexmask.long.tbyte 0x29C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x29C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 42th SRAM is happened. This record is 4th error."
line.long 0x2A0 "SPMC0_ERRINFO168,"
hexmask.long.tbyte 0x2A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2A0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 43th SRAM is happened. This record is 1st error."
line.long 0x2A4 "SPMC0_ERRINFO169,"
hexmask.long.tbyte 0x2A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2A4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 43th SRAM is happened. This record is 2nd error."
line.long 0x2A8 "SPMC0_ERRINFO170,"
hexmask.long.tbyte 0x2A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2A8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 43th SRAM is happened. This record is 3rd error."
line.long 0x2AC "SPMC0_ERRINFO171,"
hexmask.long.tbyte 0x2AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2AC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 43th SRAM is happened. This record is 4th error."
line.long 0x2B0 "SPMC0_ERRINFO172,"
hexmask.long.tbyte 0x2B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2B0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 44th SRAM is happened. This record is 1st error."
line.long 0x2B4 "SPMC0_ERRINFO173,"
hexmask.long.tbyte 0x2B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2B4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 44th SRAM is happened. This record is 2nd error."
line.long 0x2B8 "SPMC0_ERRINFO174,"
hexmask.long.tbyte 0x2B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2B8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 44th SRAM is happened. This record is 3rd error."
line.long 0x2BC "SPMC0_ERRINFO175,"
hexmask.long.tbyte 0x2BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2BC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 44th SRAM is happened. This record is 4th error."
line.long 0x2C0 "SPMC0_ERRINFO176,"
hexmask.long.tbyte 0x2C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 45th SRAM is happened. This record is 1st error."
line.long 0x2C4 "SPMC0_ERRINFO177,"
hexmask.long.tbyte 0x2C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 45th SRAM is happened. This record is 2nd error."
line.long 0x2C8 "SPMC0_ERRINFO178,"
hexmask.long.tbyte 0x2C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 45th SRAM is happened. This record is 3rd error."
line.long 0x2CC "SPMC0_ERRINFO179,"
hexmask.long.tbyte 0x2CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2CC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 45th SRAM is happened. This record is 4th error."
line.long 0x2D0 "SPMC0_ERRINFO180,"
hexmask.long.tbyte 0x2D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2D0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 46th SRAM is happened. This record is 1st error."
line.long 0x2D4 "SPMC0_ERRINFO181,"
hexmask.long.tbyte 0x2D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2D4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 46th SRAM is happened. This record is 2nd error."
line.long 0x2D8 "SPMC0_ERRINFO182,"
hexmask.long.tbyte 0x2D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2D8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 46th SRAM is happened. This record is 3rd error."
line.long 0x2DC "SPMC0_ERRINFO183,"
hexmask.long.tbyte 0x2DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2DC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 46th SRAM is happened. This record is 4th error."
line.long 0x2E0 "SPMC0_ERRINFO184,"
hexmask.long.tbyte 0x2E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2E0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 47th SRAM is happened. This record is 1st error."
line.long 0x2E4 "SPMC0_ERRINFO185,"
hexmask.long.tbyte 0x2E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2E4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 47th SRAM is happened. This record is 2nd error."
line.long 0x2E8 "SPMC0_ERRINFO186,"
hexmask.long.tbyte 0x2E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2E8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 47th SRAM is happened. This record is 3rd error."
line.long 0x2EC "SPMC0_ERRINFO187,"
hexmask.long.tbyte 0x2EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2EC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 47th SRAM is happened. This record is 4th error."
line.long 0x2F0 "SPMC0_ERRINFO188,"
hexmask.long.tbyte 0x2F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2F0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 48th SRAM is happened. This record is 1st error."
line.long 0x2F4 "SPMC0_ERRINFO189,"
hexmask.long.tbyte 0x2F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2F4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 48th SRAM is happened. This record is 2nd error."
line.long 0x2F8 "SPMC0_ERRINFO190,"
hexmask.long.tbyte 0x2F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2F8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 48th SRAM is happened. This record is 3rd error."
line.long 0x2FC "SPMC0_ERRINFO191,"
hexmask.long.tbyte 0x2FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2FC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 48th SRAM is happened. This record is 4th error."
line.long 0x300 "SPMC0_ERRINFO192,"
hexmask.long.tbyte 0x300 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x300 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 49th SRAM is happened. This record is 1st error."
line.long 0x304 "SPMC0_ERRINFO193,"
hexmask.long.tbyte 0x304 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x304 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 49th SRAM is happened. This record is 2nd error."
line.long 0x308 "SPMC0_ERRINFO194,"
hexmask.long.tbyte 0x308 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x308 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 49th SRAM is happened. This record is 3rd error."
line.long 0x30C "SPMC0_ERRINFO195,"
hexmask.long.tbyte 0x30C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x30C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 49th SRAM is happened. This record is 4th error."
line.long 0x310 "SPMC0_ERRINFO196,"
hexmask.long.tbyte 0x310 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x310 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 50th SRAM is happened. This record is 1st error."
line.long 0x314 "SPMC0_ERRINFO197,"
hexmask.long.tbyte 0x314 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x314 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 50th SRAM is happened. This record is 2nd error."
line.long 0x318 "SPMC0_ERRINFO198,"
hexmask.long.tbyte 0x318 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x318 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 50th SRAM is happened. This record is 3rd error."
line.long 0x31C "SPMC0_ERRINFO199,"
hexmask.long.tbyte 0x31C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x31C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 50th SRAM is happened. This record is 4th error."
line.long 0x320 "SPMC0_ERRINFO200,"
hexmask.long.tbyte 0x320 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x320 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 51th SRAM is happened. This record is 1st error."
line.long 0x324 "SPMC0_ERRINFO201,"
hexmask.long.tbyte 0x324 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x324 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 51th SRAM is happened. This record is 2nd error."
line.long 0x328 "SPMC0_ERRINFO202,"
hexmask.long.tbyte 0x328 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x328 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 51th SRAM is happened. This record is 3rd error."
line.long 0x32C "SPMC0_ERRINFO203,"
hexmask.long.tbyte 0x32C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x32C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 51th SRAM is happened. This record is 4th error."
line.long 0x330 "SPMC0_ERRINFO204,"
hexmask.long.tbyte 0x330 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x330 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 52th SRAM is happened. This record is 1st error."
line.long 0x334 "SPMC0_ERRINFO205,"
hexmask.long.tbyte 0x334 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x334 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 52th SRAM is happened. This record is 2nd error."
line.long 0x338 "SPMC0_ERRINFO206,"
hexmask.long.tbyte 0x338 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x338 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 52th SRAM is happened. This record is 3rd error."
line.long 0x33C "SPMC0_ERRINFO207,"
hexmask.long.tbyte 0x33C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x33C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 52th SRAM is happened. This record is 4th error."
line.long 0x340 "SPMC0_ERRINFO208,"
hexmask.long.tbyte 0x340 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x340 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 53th SRAM is happened. This record is 1st error."
line.long 0x344 "SPMC0_ERRINFO209,"
hexmask.long.tbyte 0x344 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x344 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 53th SRAM is happened. This record is 2nd error."
line.long 0x348 "SPMC0_ERRINFO210,"
hexmask.long.tbyte 0x348 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x348 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 53th SRAM is happened. This record is 3rd error."
line.long 0x34C "SPMC0_ERRINFO211,"
hexmask.long.tbyte 0x34C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x34C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 53th SRAM is happened. This record is 4th error."
line.long 0x350 "SPMC0_ERRINFO212,"
hexmask.long.tbyte 0x350 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x350 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 54th SRAM is happened. This record is 1st error."
line.long 0x354 "SPMC0_ERRINFO213,"
hexmask.long.tbyte 0x354 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x354 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 54th SRAM is happened. This record is 2nd error."
line.long 0x358 "SPMC0_ERRINFO214,"
hexmask.long.tbyte 0x358 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x358 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 54th SRAM is happened. This record is 3rd error."
line.long 0x35C "SPMC0_ERRINFO215,"
hexmask.long.tbyte 0x35C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x35C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 54th SRAM is happened. This record is 4th error."
line.long 0x360 "SPMC0_ERRINFO216,"
hexmask.long.tbyte 0x360 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x360 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 55th SRAM is happened. This record is 1st error."
line.long 0x364 "SPMC0_ERRINFO217,"
hexmask.long.tbyte 0x364 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x364 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 55th SRAM is happened. This record is 2nd error."
line.long 0x368 "SPMC0_ERRINFO218,"
hexmask.long.tbyte 0x368 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x368 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 55th SRAM is happened. This record is 3rd error."
line.long 0x36C "SPMC0_ERRINFO219,"
hexmask.long.tbyte 0x36C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x36C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 55th SRAM is happened. This record is 4th error."
line.long 0x370 "SPMC0_ERRINFO220,"
hexmask.long.tbyte 0x370 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x370 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 56th SRAM is happened. This record is 1st error."
line.long 0x374 "SPMC0_ERRINFO221,"
hexmask.long.tbyte 0x374 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x374 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 56th SRAM is happened. This record is 2nd error."
line.long 0x378 "SPMC0_ERRINFO222,"
hexmask.long.tbyte 0x378 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x378 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 56th SRAM is happened. This record is 3rd error."
line.long 0x37C "SPMC0_ERRINFO223,"
hexmask.long.tbyte 0x37C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x37C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 56th SRAM is happened. This record is 4th error."
line.long 0x380 "SPMC0_ERRINFO224,"
hexmask.long.tbyte 0x380 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x380 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 57th SRAM is happened. This record is 1st error."
line.long 0x384 "SPMC0_ERRINFO225,"
hexmask.long.tbyte 0x384 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x384 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 57th SRAM is happened. This record is 2nd error."
line.long 0x388 "SPMC0_ERRINFO226,"
hexmask.long.tbyte 0x388 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x388 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 57th SRAM is happened. This record is 3rd error."
line.long 0x38C "SPMC0_ERRINFO227,"
hexmask.long.tbyte 0x38C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x38C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 57th SRAM is happened. This record is 4th error."
line.long 0x390 "SPMC0_ERRINFO228,"
hexmask.long.tbyte 0x390 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x390 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 58th SRAM is happened. This record is 1st error."
line.long 0x394 "SPMC0_ERRINFO229,"
hexmask.long.tbyte 0x394 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x394 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 58th SRAM is happened. This record is 2nd error."
line.long 0x398 "SPMC0_ERRINFO230,"
hexmask.long.tbyte 0x398 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x398 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 58th SRAM is happened. This record is 3rd error."
line.long 0x39C "SPMC0_ERRINFO231,"
hexmask.long.tbyte 0x39C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x39C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 58th SRAM is happened. This record is 4th error."
line.long 0x3A0 "SPMC0_ERRINFO232,"
hexmask.long.tbyte 0x3A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3A0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 59th SRAM is happened. This record is 1st error."
line.long 0x3A4 "SPMC0_ERRINFO233,"
hexmask.long.tbyte 0x3A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3A4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 59th SRAM is happened. This record is 2nd error."
line.long 0x3A8 "SPMC0_ERRINFO234,"
hexmask.long.tbyte 0x3A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3A8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 59th SRAM is happened. This record is 3rd error."
line.long 0x3AC "SPMC0_ERRINFO235,"
hexmask.long.tbyte 0x3AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3AC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 59th SRAM is happened. This record is 4th error."
line.long 0x3B0 "SPMC0_ERRINFO236,"
hexmask.long.tbyte 0x3B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3B0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 60th SRAM is happened. This record is 1st error."
line.long 0x3B4 "SPMC0_ERRINFO237,"
hexmask.long.tbyte 0x3B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3B4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 60th SRAM is happened. This record is 2nd error."
line.long 0x3B8 "SPMC0_ERRINFO238,"
hexmask.long.tbyte 0x3B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3B8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 60th SRAM is happened. This record is 3rd error."
line.long 0x3BC "SPMC0_ERRINFO239,"
hexmask.long.tbyte 0x3BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3BC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 60th SRAM is happened. This record is 4th error."
line.long 0x3C0 "SPMC0_ERRINFO240,"
hexmask.long.tbyte 0x3C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 61th SRAM is happened. This record is 1st error."
line.long 0x3C4 "SPMC0_ERRINFO241,"
hexmask.long.tbyte 0x3C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 61th SRAM is happened. This record is 2nd error."
line.long 0x3C8 "SPMC0_ERRINFO242,"
hexmask.long.tbyte 0x3C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 61th SRAM is happened. This record is 3rd error."
line.long 0x3CC "SPMC0_ERRINFO243,"
hexmask.long.tbyte 0x3CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3CC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 61th SRAM is happened. This record is 4th error."
line.long 0x3D0 "SPMC0_ERRINFO244,"
hexmask.long.tbyte 0x3D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3D0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 62th SRAM is happened. This record is 1st error."
line.long 0x3D4 "SPMC0_ERRINFO245,"
hexmask.long.tbyte 0x3D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3D4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 62th SRAM is happened. This record is 2nd error."
line.long 0x3D8 "SPMC0_ERRINFO246,"
hexmask.long.tbyte 0x3D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3D8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 62th SRAM is happened. This record is 3rd error."
line.long 0x3DC "SPMC0_ERRINFO247,"
hexmask.long.tbyte 0x3DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3DC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 62th SRAM is happened. This record is 4th error."
line.long 0x3E0 "SPMC0_ERRINFO248,"
hexmask.long.tbyte 0x3E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3E0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 63th SRAM is happened. This record is 1st error."
line.long 0x3E4 "SPMC0_ERRINFO249,"
hexmask.long.tbyte 0x3E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3E4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 63th SRAM is happened. This record is 2nd error."
line.long 0x3E8 "SPMC0_ERRINFO250,"
hexmask.long.tbyte 0x3E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3E8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 63th SRAM is happened. This record is 3rd error."
line.long 0x3EC "SPMC0_ERRINFO251,"
hexmask.long.tbyte 0x3EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3EC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 63th SRAM is happened. This record is 4th error."
line.long 0x3F0 "SPMC0_ERRINFO252,"
hexmask.long.tbyte 0x3F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3F0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 64th SRAM is happened. This record is 1st error."
line.long 0x3F4 "SPMC0_ERRINFO253,"
hexmask.long.tbyte 0x3F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3F4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 64th SRAM is happened. This record is 2nd error."
line.long 0x3F8 "SPMC0_ERRINFO254,"
hexmask.long.tbyte 0x3F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3F8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 64th SRAM is happened. This record is 3rd error."
line.long 0x3FC "SPMC0_ERRINFO255,"
hexmask.long.tbyte 0x3FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3FC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 64th SRAM is happened. This record is 4th error."
line.long 0x400 "SPMC0_EADDRINFO000,"
hexmask.long 0x400 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x404 "SPMC0_EADDRINFO001,"
hexmask.long 0x404 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x408 "SPMC0_EADDRINFO002,"
hexmask.long 0x408 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0x40C "SPMC0_EADDRINFO003,"
hexmask.long 0x40C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x410 "SPMC0_EADDRINFO004,"
hexmask.long 0x410 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x414 "SPMC0_EADDRINFO005,"
hexmask.long 0x414 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x418 "SPMC0_EADDRINFO006,"
hexmask.long 0x418 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x41C "SPMC0_EADDRINFO007,"
hexmask.long 0x41C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x420 "SPMC0_EADDRINFO008,"
hexmask.long 0x420 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x424 "SPMC0_EADDRINFO009,"
hexmask.long 0x424 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x428 "SPMC0_EADDRINFO010,"
hexmask.long 0x428 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x42C "SPMC0_EADDRINFO011,"
hexmask.long 0x42C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x430 "SPMC0_EADDRINFO012,"
hexmask.long 0x430 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x434 "SPMC0_EADDRINFO013,"
hexmask.long 0x434 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x438 "SPMC0_EADDRINFO014,"
hexmask.long 0x438 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x43C "SPMC0_EADDRINFO015,"
hexmask.long 0x43C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
line.long 0x440 "SPMC0_EADDRINFO016,"
hexmask.long 0x440 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 5th SRAM is happened. This record is 1st error."
line.long 0x444 "SPMC0_EADDRINFO017,"
hexmask.long 0x444 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 5th SRAM is happened. This record is 2nd error."
line.long 0x448 "SPMC0_EADDRINFO018,"
hexmask.long 0x448 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 5th SRAM is happened. This record is 3rd error."
line.long 0x44C "SPMC0_EADDRINFO019,"
hexmask.long 0x44C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 5th SRAM is happened. This record is 4th error."
line.long 0x450 "SPMC0_EADDRINFO020,"
hexmask.long 0x450 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 6th SRAM is happened. This record is 1st error."
line.long 0x454 "SPMC0_EADDRINFO021,"
hexmask.long 0x454 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 6th SRAM is happened. This record is 2nd error."
line.long 0x458 "SPMC0_EADDRINFO022,"
hexmask.long 0x458 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 6th SRAM is happened. This record is 3rd error."
line.long 0x45C "SPMC0_EADDRINFO023,"
hexmask.long 0x45C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 6th SRAM is happened. This record is 4th error."
line.long 0x460 "SPMC0_EADDRINFO024,"
hexmask.long 0x460 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 7th SRAM is happened. This record is 1st error."
line.long 0x464 "SPMC0_EADDRINFO025,"
hexmask.long 0x464 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 7th SRAM is happened. This record is 2nd error."
line.long 0x468 "SPMC0_EADDRINFO026,"
hexmask.long 0x468 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 7th SRAM is happened. This record is 3rd error."
line.long 0x46C "SPMC0_EADDRINFO027,"
hexmask.long 0x46C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 7th SRAM is happened. This record is 4th error."
line.long 0x470 "SPMC0_EADDRINFO028,"
hexmask.long 0x470 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 8th SRAM is happened. This record is 1st error."
line.long 0x474 "SPMC0_EADDRINFO029,"
hexmask.long 0x474 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 8th SRAM is happened. This record is 2nd error."
line.long 0x478 "SPMC0_EADDRINFO030,"
hexmask.long 0x478 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 8th SRAM is happened. This record is 3rd error."
line.long 0x47C "SPMC0_EADDRINFO031,"
hexmask.long 0x47C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 8th SRAM is happened. This record is 4th error."
line.long 0x480 "SPMC0_EADDRINFO032,"
hexmask.long 0x480 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 9th SRAM is happened. This record is 1st error."
line.long 0x484 "SPMC0_EADDRINFO033,"
hexmask.long 0x484 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 9th SRAM is happened. This record is 2nd error."
line.long 0x488 "SPMC0_EADDRINFO034,"
hexmask.long 0x488 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 9th SRAM is happened. This record is 3rd error."
line.long 0x48C "SPMC0_EADDRINFO035,"
hexmask.long 0x48C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 9th SRAM is happened. This record is 4th error."
line.long 0x490 "SPMC0_EADDRINFO036,"
hexmask.long 0x490 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 10th SRAM is happened. This record is 1st error."
line.long 0x494 "SPMC0_EADDRINFO037,"
hexmask.long 0x494 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 10th SRAM is happened. This record is 2nd error."
line.long 0x498 "SPMC0_EADDRINFO038,"
hexmask.long 0x498 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 10th SRAM is happened. This record is 3rd error."
line.long 0x49C "SPMC0_EADDRINFO039,"
hexmask.long 0x49C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 10th SRAM is happened. This record is 4th error."
line.long 0x4A0 "SPMC0_EADDRINFO040,"
hexmask.long 0x4A0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 11th SRAM is happened. This record is 1st error."
line.long 0x4A4 "SPMC0_EADDRINFO041,"
hexmask.long 0x4A4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 11th SRAM is happened. This record is 2nd error."
line.long 0x4A8 "SPMC0_EADDRINFO042,"
hexmask.long 0x4A8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 11th SRAM is happened. This record is 3rd error."
line.long 0x4AC "SPMC0_EADDRINFO043,"
hexmask.long 0x4AC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 11th SRAM is happened. This record is 4th error."
line.long 0x4B0 "SPMC0_EADDRINFO044,"
hexmask.long 0x4B0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 12th SRAM is happened. This record is 1st error."
line.long 0x4B4 "SPMC0_EADDRINFO045,"
hexmask.long 0x4B4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 12th SRAM is happened. This record is 2nd error."
line.long 0x4B8 "SPMC0_EADDRINFO046,"
hexmask.long 0x4B8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 12th SRAM is happened. This record is 3rd error."
line.long 0x4BC "SPMC0_EADDRINFO047,"
hexmask.long 0x4BC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 12th SRAM is happened. This record is 4th error."
line.long 0x4C0 "SPMC0_EADDRINFO048,"
hexmask.long 0x4C0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 13th SRAM is happened. This record is 1st error."
line.long 0x4C4 "SPMC0_EADDRINFO049,"
hexmask.long 0x4C4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 13th SRAM is happened. This record is 2nd error."
line.long 0x4C8 "SPMC0_EADDRINFO050,"
hexmask.long 0x4C8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 13th SRAM is happened. This record is 3rd error."
line.long 0x4CC "SPMC0_EADDRINFO051,"
hexmask.long 0x4CC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 13th SRAM is happened. This record is 4th error."
line.long 0x4D0 "SPMC0_EADDRINFO052,"
hexmask.long 0x4D0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 14th SRAM is happened. This record is 1st error."
line.long 0x4D4 "SPMC0_EADDRINFO053,"
hexmask.long 0x4D4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 14th SRAM is happened. This record is 2nd error."
line.long 0x4D8 "SPMC0_EADDRINFO054,"
hexmask.long 0x4D8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 14th SRAM is happened. This record is 3rd error."
line.long 0x4DC "SPMC0_EADDRINFO055,"
hexmask.long 0x4DC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 14th SRAM is happened. This record is 4th error."
line.long 0x4E0 "SPMC0_EADDRINFO056,"
hexmask.long 0x4E0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 15th SRAM is happened. This record is 1st error."
line.long 0x4E4 "SPMC0_EADDRINFO057,"
hexmask.long 0x4E4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 15th SRAM is happened. This record is 2nd error."
line.long 0x4E8 "SPMC0_EADDRINFO058,"
hexmask.long 0x4E8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 15th SRAM is happened. This record is 3rd error."
line.long 0x4EC "SPMC0_EADDRINFO059,"
hexmask.long 0x4EC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 15th SRAM is happened. This record is 4th error."
line.long 0x4F0 "SPMC0_EADDRINFO060,"
hexmask.long 0x4F0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 16th SRAM is happened. This record is 1st error."
line.long 0x4F4 "SPMC0_EADDRINFO061,"
hexmask.long 0x4F4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 16th SRAM is happened. This record is 2nd error."
line.long 0x4F8 "SPMC0_EADDRINFO062,"
hexmask.long 0x4F8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 16th SRAM is happened. This record is 3rd error."
line.long 0x4FC "SPMC0_EADDRINFO063,"
hexmask.long 0x4FC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 16th SRAM is happened. This record is 4th error."
line.long 0x500 "SPMC0_EADDRINFO064,"
hexmask.long 0x500 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 17th SRAM is happened. This record is 1st error."
line.long 0x504 "SPMC0_EADDRINFO065,"
hexmask.long 0x504 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 17th SRAM is happened. This record is 2nd error."
line.long 0x508 "SPMC0_EADDRINFO066,"
hexmask.long 0x508 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 17th SRAM is happened. This record is 3rd error."
line.long 0x50C "SPMC0_EADDRINFO067,"
hexmask.long 0x50C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 17th SRAM is happened. This record is 4th error."
line.long 0x510 "SPMC0_EADDRINFO068,"
hexmask.long 0x510 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 18th SRAM is happened. This record is 1st error."
line.long 0x514 "SPMC0_EADDRINFO069,"
hexmask.long 0x514 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 18th SRAM is happened. This record is 2nd error."
line.long 0x518 "SPMC0_EADDRINFO070,"
hexmask.long 0x518 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 18th SRAM is happened. This record is 3rd error."
line.long 0x51C "SPMC0_EADDRINFO071,"
hexmask.long 0x51C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 18th SRAM is happened. This record is 4th error."
line.long 0x520 "SPMC0_EADDRINFO072,"
hexmask.long 0x520 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 19th SRAM is happened. This record is 1st error."
line.long 0x524 "SPMC0_EADDRINFO073,"
hexmask.long 0x524 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 19th SRAM is happened. This record is 2nd error."
line.long 0x528 "SPMC0_EADDRINFO074,"
hexmask.long 0x528 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 19th SRAM is happened. This record is 3rd error."
line.long 0x52C "SPMC0_EADDRINFO075,"
hexmask.long 0x52C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 19th SRAM is happened. This record is 4th error."
line.long 0x530 "SPMC0_EADDRINFO076,"
hexmask.long 0x530 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 20th SRAM is happened. This record is 1st error."
line.long 0x534 "SPMC0_EADDRINFO077,"
hexmask.long 0x534 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 20th SRAM is happened. This record is 2nd error."
line.long 0x538 "SPMC0_EADDRINFO078,"
hexmask.long 0x538 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 20th SRAM is happened. This record is 3rd error."
line.long 0x53C "SPMC0_EADDRINFO079,"
hexmask.long 0x53C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 20th SRAM is happened. This record is 4th error."
line.long 0x540 "SPMC0_EADDRINFO080,"
hexmask.long 0x540 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 21th SRAM is happened. This record is 1st error."
line.long 0x544 "SPMC0_EADDRINFO081,"
hexmask.long 0x544 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 21th SRAM is happened. This record is 2nd error."
line.long 0x548 "SPMC0_EADDRINFO082,"
hexmask.long 0x548 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 21th SRAM is happened. This record is 3rd error."
line.long 0x54C "SPMC0_EADDRINFO083,"
hexmask.long 0x54C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 21th SRAM is happened. This record is 4th error."
line.long 0x550 "SPMC0_EADDRINFO084,"
hexmask.long 0x550 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 22th SRAM is happened. This record is 1st error."
line.long 0x554 "SPMC0_EADDRINFO085,"
hexmask.long 0x554 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 22th SRAM is happened. This record is 2nd error."
line.long 0x558 "SPMC0_EADDRINFO086,"
hexmask.long 0x558 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 22th SRAM is happened. This record is 3rd error."
line.long 0x55C "SPMC0_EADDRINFO087,"
hexmask.long 0x55C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 22th SRAM is happened. This record is 4th error."
line.long 0x560 "SPMC0_EADDRINFO088,"
hexmask.long 0x560 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 23th SRAM is happened. This record is 1st error."
line.long 0x564 "SPMC0_EADDRINFO089,"
hexmask.long 0x564 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 23th SRAM is happened. This record is 2nd error."
line.long 0x568 "SPMC0_EADDRINFO090,"
hexmask.long 0x568 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 23th SRAM is happened. This record is 3rd error."
line.long 0x56C "SPMC0_EADDRINFO091,"
hexmask.long 0x56C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 23th SRAM is happened. This record is 4th error."
line.long 0x570 "SPMC0_EADDRINFO092,"
hexmask.long 0x570 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 24th SRAM is happened. This record is 1st error."
line.long 0x574 "SPMC0_EADDRINFO093,"
hexmask.long 0x574 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 24th SRAM is happened. This record is 2nd error."
line.long 0x578 "SPMC0_EADDRINFO094,"
hexmask.long 0x578 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 24th SRAM is happened. This record is 3rd error."
line.long 0x57C "SPMC0_EADDRINFO095,"
hexmask.long 0x57C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 24th SRAM is happened. This record is 4th error."
line.long 0x580 "SPMC0_EADDRINFO096,"
hexmask.long 0x580 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 25th SRAM is happened. This record is 1st error."
line.long 0x584 "SPMC0_EADDRINFO097,"
hexmask.long 0x584 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 25th SRAM is happened. This record is 2nd error."
line.long 0x588 "SPMC0_EADDRINFO098,"
hexmask.long 0x588 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 25th SRAM is happened. This record is 3rd error."
line.long 0x58C "SPMC0_EADDRINFO099,"
hexmask.long 0x58C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 25th SRAM is happened. This record is 4th error."
line.long 0x590 "SPMC0_EADDRINFO100,"
hexmask.long 0x590 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 26th SRAM is happened. This record is 1st error."
line.long 0x594 "SPMC0_EADDRINFO101,"
hexmask.long 0x594 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 26th SRAM is happened. This record is 2nd error."
line.long 0x598 "SPMC0_EADDRINFO102,"
hexmask.long 0x598 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 26th SRAM is happened. This record is 3rd error."
line.long 0x59C "SPMC0_EADDRINFO103,"
hexmask.long 0x59C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 26th SRAM is happened. This record is 4th error."
line.long 0x5A0 "SPMC0_EADDRINFO104,"
hexmask.long 0x5A0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 27th SRAM is happened. This record is 1st error."
line.long 0x5A4 "SPMC0_EADDRINFO105,"
hexmask.long 0x5A4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 27th SRAM is happened. This record is 2nd error."
line.long 0x5A8 "SPMC0_EADDRINFO106,"
hexmask.long 0x5A8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 27th SRAM is happened. This record is 3rd error."
line.long 0x5AC "SPMC0_EADDRINFO107,"
hexmask.long 0x5AC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 27th SRAM is happened. This record is 4th error."
line.long 0x5B0 "SPMC0_EADDRINFO108,"
hexmask.long 0x5B0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 28th SRAM is happened. This record is 1st error."
line.long 0x5B4 "SPMC0_EADDRINFO109,"
hexmask.long 0x5B4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 28th SRAM is happened. This record is 2nd error."
line.long 0x5B8 "SPMC0_EADDRINFO110,"
hexmask.long 0x5B8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 28th SRAM is happened. This record is 3rd error."
line.long 0x5BC "SPMC0_EADDRINFO111,"
hexmask.long 0x5BC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 28th SRAM is happened. This record is 4th error."
line.long 0x5C0 "SPMC0_EADDRINFO112,"
hexmask.long 0x5C0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 29th SRAM is happened. This record is 1st error."
line.long 0x5C4 "SPMC0_EADDRINFO113,"
hexmask.long 0x5C4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 29th SRAM is happened. This record is 2nd error."
line.long 0x5C8 "SPMC0_EADDRINFO114,"
hexmask.long 0x5C8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 29th SRAM is happened. This record is 3rd error."
line.long 0x5CC "SPMC0_EADDRINFO115,"
hexmask.long 0x5CC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 29th SRAM is happened. This record is 4th error."
line.long 0x5D0 "SPMC0_EADDRINFO116,"
hexmask.long 0x5D0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 30th SRAM is happened. This record is 1st error."
line.long 0x5D4 "SPMC0_EADDRINFO117,"
hexmask.long 0x5D4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 30th SRAM is happened. This record is 2nd error."
line.long 0x5D8 "SPMC0_EADDRINFO118,"
hexmask.long 0x5D8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 30th SRAM is happened. This record is 3rd error."
line.long 0x5DC "SPMC0_EADDRINFO119,"
hexmask.long 0x5DC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 30th SRAM is happened. This record is 4th error."
line.long 0x5E0 "SPMC0_EADDRINFO120,"
hexmask.long 0x5E0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 31th SRAM is happened. This record is 1st error."
line.long 0x5E4 "SPMC0_EADDRINFO121,"
hexmask.long 0x5E4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 31th SRAM is happened. This record is 2nd error."
line.long 0x5E8 "SPMC0_EADDRINFO122,"
hexmask.long 0x5E8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 31th SRAM is happened. This record is 3rd error."
line.long 0x5EC "SPMC0_EADDRINFO123,"
hexmask.long 0x5EC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 31th SRAM is happened. This record is 4th error."
line.long 0x5F0 "SPMC0_EADDRINFO124,"
hexmask.long 0x5F0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 32th SRAM is happened. This record is 1st error."
line.long 0x5F4 "SPMC0_EADDRINFO125,"
hexmask.long 0x5F4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 32th SRAM is happened. This record is 2nd error."
line.long 0x5F8 "SPMC0_EADDRINFO126,"
hexmask.long 0x5F8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 32th SRAM is happened. This record is 3rd error."
line.long 0x5FC "SPMC0_EADDRINFO127,"
hexmask.long 0x5FC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 32th SRAM is happened. This record is 4th error."
line.long 0x600 "SPMC0_EADDRINFO128,"
hexmask.long 0x600 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 33th SRAM is happened. This record is 1st error."
line.long 0x604 "SPMC0_EADDRINFO129,"
hexmask.long 0x604 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 33th SRAM is happened. This record is 2nd error."
line.long 0x608 "SPMC0_EADDRINFO130,"
hexmask.long 0x608 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 33th SRAM is happened. This record is 3rd error."
line.long 0x60C "SPMC0_EADDRINFO131,"
hexmask.long 0x60C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 33th SRAM is happened. This record is 4th error."
line.long 0x610 "SPMC0_EADDRINFO132,"
hexmask.long 0x610 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 34th SRAM is happened. This record is 1st error."
line.long 0x614 "SPMC0_EADDRINFO133,"
hexmask.long 0x614 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 34th SRAM is happened. This record is 2nd error."
line.long 0x618 "SPMC0_EADDRINFO134,"
hexmask.long 0x618 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 34th SRAM is happened. This record is 3rd error."
line.long 0x61C "SPMC0_EADDRINFO135,"
hexmask.long 0x61C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 34th SRAM is happened. This record is 4th error."
line.long 0x620 "SPMC0_EADDRINFO136,"
hexmask.long 0x620 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 35th SRAM is happened. This record is 1st error."
line.long 0x624 "SPMC0_EADDRINFO137,"
hexmask.long 0x624 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 35th SRAM is happened. This record is 2nd error."
line.long 0x628 "SPMC0_EADDRINFO138,"
hexmask.long 0x628 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 35th SRAM is happened. This record is 3rd error."
line.long 0x62C "SPMC0_EADDRINFO139,"
hexmask.long 0x62C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 35th SRAM is happened. This record is 4th error."
line.long 0x630 "SPMC0_EADDRINFO140,"
hexmask.long 0x630 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 36th SRAM is happened. This record is 1st error."
line.long 0x634 "SPMC0_EADDRINFO141,"
hexmask.long 0x634 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 36th SRAM is happened. This record is 2nd error."
line.long 0x638 "SPMC0_EADDRINFO142,"
hexmask.long 0x638 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 36th SRAM is happened. This record is 3rd error."
line.long 0x63C "SPMC0_EADDRINFO143,"
hexmask.long 0x63C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 36th SRAM is happened. This record is 4th error."
line.long 0x640 "SPMC0_EADDRINFO144,"
hexmask.long 0x640 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 37th SRAM is happened. This record is 1st error."
line.long 0x644 "SPMC0_EADDRINFO145,"
hexmask.long 0x644 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 37th SRAM is happened. This record is 2nd error."
line.long 0x648 "SPMC0_EADDRINFO146,"
hexmask.long 0x648 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 37th SRAM is happened. This record is 3rd error."
line.long 0x64C "SPMC0_EADDRINFO147,"
hexmask.long 0x64C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 37th SRAM is happened. This record is 4th error."
line.long 0x650 "SPMC0_EADDRINFO148,"
hexmask.long 0x650 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 38th SRAM is happened. This record is 1st error."
line.long 0x654 "SPMC0_EADDRINFO149,"
hexmask.long 0x654 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 38th SRAM is happened. This record is 2nd error."
line.long 0x658 "SPMC0_EADDRINFO150,"
hexmask.long 0x658 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 38th SRAM is happened. This record is 3rd error."
line.long 0x65C "SPMC0_EADDRINFO151,"
hexmask.long 0x65C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 38th SRAM is happened. This record is 4th error."
line.long 0x660 "SPMC0_EADDRINFO152,"
hexmask.long 0x660 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 39th SRAM is happened. This record is 1st error."
line.long 0x664 "SPMC0_EADDRINFO153,"
hexmask.long 0x664 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 39th SRAM is happened. This record is 2nd error."
line.long 0x668 "SPMC0_EADDRINFO154,"
hexmask.long 0x668 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 39th SRAM is happened. This record is 3rd error."
line.long 0x66C "SPMC0_EADDRINFO155,"
hexmask.long 0x66C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 39th SRAM is happened. This record is 4th error."
line.long 0x670 "SPMC0_EADDRINFO156,"
hexmask.long 0x670 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 40th SRAM is happened. This record is 1st error."
line.long 0x674 "SPMC0_EADDRINFO157,"
hexmask.long 0x674 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 40th SRAM is happened. This record is 2nd error."
line.long 0x678 "SPMC0_EADDRINFO158,"
hexmask.long 0x678 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 40th SRAM is happened. This record is 3rd error."
line.long 0x67C "SPMC0_EADDRINFO159,"
hexmask.long 0x67C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 40th SRAM is happened. This record is 4th error."
line.long 0x680 "SPMC0_EADDRINFO160,"
hexmask.long 0x680 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 41th SRAM is happened. This record is 1st error."
line.long 0x684 "SPMC0_EADDRINFO161,"
hexmask.long 0x684 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 41th SRAM is happened. This record is 2nd error."
line.long 0x688 "SPMC0_EADDRINFO162,"
hexmask.long 0x688 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 41th SRAM is happened. This record is 3rd error."
line.long 0x68C "SPMC0_EADDRINFO163,"
hexmask.long 0x68C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 41th SRAM is happened. This record is 4th error."
line.long 0x690 "SPMC0_EADDRINFO164,"
hexmask.long 0x690 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 42th SRAM is happened. This record is 1st error."
line.long 0x694 "SPMC0_EADDRINFO165,"
hexmask.long 0x694 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 42th SRAM is happened. This record is 2nd error."
line.long 0x698 "SPMC0_EADDRINFO166,"
hexmask.long 0x698 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 42th SRAM is happened. This record is 3rd error."
line.long 0x69C "SPMC0_EADDRINFO167,"
hexmask.long 0x69C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 42th SRAM is happened. This record is 4th error."
line.long 0x6A0 "SPMC0_EADDRINFO168,"
hexmask.long 0x6A0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 43th SRAM is happened. This record is 1st error."
line.long 0x6A4 "SPMC0_EADDRINFO169,"
hexmask.long 0x6A4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 43th SRAM is happened. This record is 2nd error."
line.long 0x6A8 "SPMC0_EADDRINFO170,"
hexmask.long 0x6A8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 43th SRAM is happened. This record is 3rd error."
line.long 0x6AC "SPMC0_EADDRINFO171,"
hexmask.long 0x6AC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 43th SRAM is happened. This record is 4th error."
line.long 0x6B0 "SPMC0_EADDRINFO172,"
hexmask.long 0x6B0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 44th SRAM is happened. This record is 1st error."
line.long 0x6B4 "SPMC0_EADDRINFO173,"
hexmask.long 0x6B4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 44th SRAM is happened. This record is 2nd error."
line.long 0x6B8 "SPMC0_EADDRINFO174,"
hexmask.long 0x6B8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 44th SRAM is happened. This record is 3rd error."
line.long 0x6BC "SPMC0_EADDRINFO175,"
hexmask.long 0x6BC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 44th SRAM is happened. This record is 4th error."
line.long 0x6C0 "SPMC0_EADDRINFO176,"
hexmask.long 0x6C0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 45th SRAM is happened. This record is 1st error."
line.long 0x6C4 "SPMC0_EADDRINFO177,"
hexmask.long 0x6C4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 45th SRAM is happened. This record is 2nd error."
line.long 0x6C8 "SPMC0_EADDRINFO178,"
hexmask.long 0x6C8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 45th SRAM is happened. This record is 3rd error."
line.long 0x6CC "SPMC0_EADDRINFO179,"
hexmask.long 0x6CC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 45th SRAM is happened. This record is 4th error."
line.long 0x6D0 "SPMC0_EADDRINFO180,"
hexmask.long 0x6D0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 46th SRAM is happened. This record is 1st error."
line.long 0x6D4 "SPMC0_EADDRINFO181,"
hexmask.long 0x6D4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 46th SRAM is happened. This record is 2nd error."
line.long 0x6D8 "SPMC0_EADDRINFO182,"
hexmask.long 0x6D8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 46th SRAM is happened. This record is 3rd error."
line.long 0x6DC "SPMC0_EADDRINFO183,"
hexmask.long 0x6DC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 46th SRAM is happened. This record is 4th error."
line.long 0x6E0 "SPMC0_EADDRINFO184,"
hexmask.long 0x6E0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 47th SRAM is happened. This record is 1st error."
line.long 0x6E4 "SPMC0_EADDRINFO185,"
hexmask.long 0x6E4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 47th SRAM is happened. This record is 2nd error."
line.long 0x6E8 "SPMC0_EADDRINFO186,"
hexmask.long 0x6E8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 47th SRAM is happened. This record is 3rd error."
line.long 0x6EC "SPMC0_EADDRINFO187,"
hexmask.long 0x6EC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 47th SRAM is happened. This record is 4th error."
line.long 0x6F0 "SPMC0_EADDRINFO188,"
hexmask.long 0x6F0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 48th SRAM is happened. This record is 1st error."
line.long 0x6F4 "SPMC0_EADDRINFO189,"
hexmask.long 0x6F4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 48th SRAM is happened. This record is 2nd error."
line.long 0x6F8 "SPMC0_EADDRINFO190,"
hexmask.long 0x6F8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 48th SRAM is happened. This record is 3rd error."
line.long 0x6FC "SPMC0_EADDRINFO191,"
hexmask.long 0x6FC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 48th SRAM is happened. This record is 4th error."
line.long 0x700 "SPMC0_EADDRINFO192,"
hexmask.long 0x700 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 49th SRAM is happened. This record is 1st error."
line.long 0x704 "SPMC0_EADDRINFO193,"
hexmask.long 0x704 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 49th SRAM is happened. This record is 2nd error."
line.long 0x708 "SPMC0_EADDRINFO194,"
hexmask.long 0x708 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 49th SRAM is happened. This record is 3rd error."
line.long 0x70C "SPMC0_EADDRINFO195,"
hexmask.long 0x70C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 49th SRAM is happened. This record is 4th error."
line.long 0x710 "SPMC0_EADDRINFO196,"
hexmask.long 0x710 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 50th SRAM is happened. This record is 1st error."
line.long 0x714 "SPMC0_EADDRINFO197,"
hexmask.long 0x714 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 50th SRAM is happened. This record is 2nd error."
line.long 0x718 "SPMC0_EADDRINFO198,"
hexmask.long 0x718 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 50th SRAM is happened. This record is 3rd error."
line.long 0x71C "SPMC0_EADDRINFO199,"
hexmask.long 0x71C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 50th SRAM is happened. This record is 4th error."
line.long 0x720 "SPMC0_EADDRINFO200,"
hexmask.long 0x720 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 51th SRAM is happened. This record is 1st error."
line.long 0x724 "SPMC0_EADDRINFO201,"
hexmask.long 0x724 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 51th SRAM is happened. This record is 2nd error."
line.long 0x728 "SPMC0_EADDRINFO202,"
hexmask.long 0x728 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 51th SRAM is happened. This record is 3rd error."
line.long 0x72C "SPMC0_EADDRINFO203,"
hexmask.long 0x72C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 51th SRAM is happened. This record is 4th error."
line.long 0x730 "SPMC0_EADDRINFO204,"
hexmask.long 0x730 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 52th SRAM is happened. This record is 1st error."
line.long 0x734 "SPMC0_EADDRINFO205,"
hexmask.long 0x734 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 52th SRAM is happened. This record is 2nd error."
line.long 0x738 "SPMC0_EADDRINFO206,"
hexmask.long 0x738 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 52th SRAM is happened. This record is 3rd error."
line.long 0x73C "SPMC0_EADDRINFO207,"
hexmask.long 0x73C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 52th SRAM is happened. This record is 4th error."
line.long 0x740 "SPMC0_EADDRINFO208,"
hexmask.long 0x740 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 53th SRAM is happened. This record is 1st error."
line.long 0x744 "SPMC0_EADDRINFO209,"
hexmask.long 0x744 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 53th SRAM is happened. This record is 2nd error."
line.long 0x748 "SPMC0_EADDRINFO210,"
hexmask.long 0x748 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 53th SRAM is happened. This record is 3rd error."
line.long 0x74C "SPMC0_EADDRINFO211,"
hexmask.long 0x74C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 53th SRAM is happened. This record is 4th error."
line.long 0x750 "SPMC0_EADDRINFO212,"
hexmask.long 0x750 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 54th SRAM is happened. This record is 1st error."
line.long 0x754 "SPMC0_EADDRINFO213,"
hexmask.long 0x754 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 54th SRAM is happened. This record is 2nd error."
line.long 0x758 "SPMC0_EADDRINFO214,"
hexmask.long 0x758 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 54th SRAM is happened. This record is 3rd error."
line.long 0x75C "SPMC0_EADDRINFO215,"
hexmask.long 0x75C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 54th SRAM is happened. This record is 4th error."
line.long 0x760 "SPMC0_EADDRINFO216,"
hexmask.long 0x760 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 55th SRAM is happened. This record is 1st error."
line.long 0x764 "SPMC0_EADDRINFO217,"
hexmask.long 0x764 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 55th SRAM is happened. This record is 2nd error."
line.long 0x768 "SPMC0_EADDRINFO218,"
hexmask.long 0x768 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 55th SRAM is happened. This record is 3rd error."
line.long 0x76C "SPMC0_EADDRINFO219,"
hexmask.long 0x76C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 55th SRAM is happened. This record is 4th error."
line.long 0x770 "SPMC0_EADDRINFO220,"
hexmask.long 0x770 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 56th SRAM is happened. This record is 1st error."
line.long 0x774 "SPMC0_EADDRINFO221,"
hexmask.long 0x774 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 56th SRAM is happened. This record is 2nd error."
line.long 0x778 "SPMC0_EADDRINFO222,"
hexmask.long 0x778 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 56th SRAM is happened. This record is 3rd error."
line.long 0x77C "SPMC0_EADDRINFO223,"
hexmask.long 0x77C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 56th SRAM is happened. This record is 4th error."
line.long 0x780 "SPMC0_EADDRINFO224,"
hexmask.long 0x780 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 57th SRAM is happened. This record is 1st error."
line.long 0x784 "SPMC0_EADDRINFO225,"
hexmask.long 0x784 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 57th SRAM is happened. This record is 2nd error."
line.long 0x788 "SPMC0_EADDRINFO226,"
hexmask.long 0x788 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 57th SRAM is happened. This record is 3rd error."
line.long 0x78C "SPMC0_EADDRINFO227,"
hexmask.long 0x78C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 57th SRAM is happened. This record is 4th error."
line.long 0x790 "SPMC0_EADDRINFO228,"
hexmask.long 0x790 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 58th SRAM is happened. This record is 1st error."
line.long 0x794 "SPMC0_EADDRINFO229,"
hexmask.long 0x794 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 58th SRAM is happened. This record is 2nd error."
line.long 0x798 "SPMC0_EADDRINFO230,"
hexmask.long 0x798 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 58th SRAM is happened. This record is 3rd error."
line.long 0x79C "SPMC0_EADDRINFO231,"
hexmask.long 0x79C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 58th SRAM is happened. This record is 4th error."
line.long 0x7A0 "SPMC0_EADDRINFO232,"
hexmask.long 0x7A0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 59th SRAM is happened. This record is 1st error."
line.long 0x7A4 "SPMC0_EADDRINFO233,"
hexmask.long 0x7A4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 59th SRAM is happened. This record is 2nd error."
line.long 0x7A8 "SPMC0_EADDRINFO234,"
hexmask.long 0x7A8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 59th SRAM is happened. This record is 3rd error."
line.long 0x7AC "SPMC0_EADDRINFO235,"
hexmask.long 0x7AC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 59th SRAM is happened. This record is 4th error."
line.long 0x7B0 "SPMC0_EADDRINFO236,"
hexmask.long 0x7B0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 60th SRAM is happened. This record is 1st error."
line.long 0x7B4 "SPMC0_EADDRINFO237,"
hexmask.long 0x7B4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 60th SRAM is happened. This record is 2nd error."
line.long 0x7B8 "SPMC0_EADDRINFO238,"
hexmask.long 0x7B8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 60th SRAM is happened. This record is 3rd error."
line.long 0x7BC "SPMC0_EADDRINFO239,"
hexmask.long 0x7BC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 60th SRAM is happened. This record is 4th error."
line.long 0x7C0 "SPMC0_EADDRINFO240,"
hexmask.long 0x7C0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 61th SRAM is happened. This record is 1st error."
line.long 0x7C4 "SPMC0_EADDRINFO241,"
hexmask.long 0x7C4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 61th SRAM is happened. This record is 2nd error."
line.long 0x7C8 "SPMC0_EADDRINFO242,"
hexmask.long 0x7C8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 61th SRAM is happened. This record is 3rd error."
line.long 0x7CC "SPMC0_EADDRINFO243,"
hexmask.long 0x7CC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 61th SRAM is happened. This record is 4th error."
line.long 0x7D0 "SPMC0_EADDRINFO244,"
hexmask.long 0x7D0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 62th SRAM is happened. This record is 1st error."
line.long 0x7D4 "SPMC0_EADDRINFO245,"
hexmask.long 0x7D4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 62th SRAM is happened. This record is 2nd error."
line.long 0x7D8 "SPMC0_EADDRINFO246,"
hexmask.long 0x7D8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 62th SRAM is happened. This record is 3rd error."
line.long 0x7DC "SPMC0_EADDRINFO247,"
hexmask.long 0x7DC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 62th SRAM is happened. This record is 4th error."
line.long 0x7E0 "SPMC0_EADDRINFO248,"
hexmask.long 0x7E0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 63th SRAM is happened. This record is 1st error."
line.long 0x7E4 "SPMC0_EADDRINFO249,"
hexmask.long 0x7E4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 63th SRAM is happened. This record is 2nd error."
line.long 0x7E8 "SPMC0_EADDRINFO250,"
hexmask.long 0x7E8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 63th SRAM is happened. This record is 3rd error."
line.long 0x7EC "SPMC0_EADDRINFO251,"
hexmask.long 0x7EC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 63th SRAM is happened. This record is 4th error."
line.long 0x7F0 "SPMC0_EADDRINFO252,"
hexmask.long 0x7F0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 64th SRAM is happened. This record is 1st error."
line.long 0x7F4 "SPMC0_EADDRINFO253,"
hexmask.long 0x7F4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 64th SRAM is happened. This record is 2nd error."
line.long 0x7F8 "SPMC0_EADDRINFO254,"
hexmask.long 0x7F8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 64th SRAM is happened. This record is 3rd error."
line.long 0x7FC "SPMC0_EADDRINFO255,"
hexmask.long 0x7FC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 64th SRAM is happened. This record is 4th error."
tree.end
tree "IMP_X7_System_SPM_9"
base ad:0xED600000
group.long 0x0++0x3
line.long 0x0 "SPMC1_SPMCTRL,"
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "INIT,Start function of SRAM Initialization" "0,1"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
rgroup.long 0x4++0x3
line.long 0x0 "SPMC1_INITSTS,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "INITFIN,This status indicates that SRAM initialization is finished." "0,1"
bitfld.long 0x0 0. "INITST,This status indicates that SRAM initialization is started." "0,1"
group.long 0x200++0x3
line.long 0x0 "SPMC1_SPMECTRL,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "ERRCLR,Error clear. It can clear SPMECOUNT00-07  ERRINFO000-127 and EADDRINFO000-127. Set to 0 after clearing." "0,1"
rgroup.long 0x210++0x1F
line.long 0x0 "SPMC1_SPMECOUNT00,"
bitfld.long 0x0 31. "Bit_3131,Overflow bit. This field is corresponding to 4th SRAM." "0,1"
hexmask.long.byte 0x0 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 4th SRAM."
bitfld.long 0x0 23. "Bit_2323,Overflow bit. This field is corresponding to 3rd SRAM." "0,1"
hexmask.long.byte 0x0 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 3rd SRAM."
bitfld.long 0x0 15. "Bit_1515,Overflow bit. This field is corresponding to 2nd SRAM." "0,1"
hexmask.long.byte 0x0 8.--14. 1. "Bit_148,Error count. This field is corresponding to 2nd SRAM."
bitfld.long 0x0 7. "Bit_77,Overflow bit. This field is corresponding to 1st SRAM." "0,1"
newline
hexmask.long.byte 0x0 0.--6. 1. "Bit_60,Error count. This field is corresponding to 1st SRAM."
line.long 0x4 "SPMC1_SPMECOUNT01,"
bitfld.long 0x4 31. "Bit_3131,Overflow bit. This field is corresponding to 8th SRAM." "0,1"
hexmask.long.byte 0x4 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 8th SRAM."
bitfld.long 0x4 23. "Bit_2323,Overflow bit. This field is corresponding to 7th SRAM." "0,1"
hexmask.long.byte 0x4 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 7th SRAM."
bitfld.long 0x4 15. "Bit_1515,Overflow bit. This field is corresponding to 6th SRAM." "0,1"
hexmask.long.byte 0x4 8.--14. 1. "Bit_148,Error count. This field is corresponding to 6th SRAM."
bitfld.long 0x4 7. "Bit_77,Overflow bit. This field is corresponding to 5th SRAM." "0,1"
newline
hexmask.long.byte 0x4 0.--6. 1. "Bit_60,Error count. This field is corresponding to 5th SRAM."
line.long 0x8 "SPMC1_SPMECOUNT02,"
bitfld.long 0x8 31. "Bit_3131,Overflow bit. This field is corresponding to 12th SRAM." "0,1"
hexmask.long.byte 0x8 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 12th SRAM."
bitfld.long 0x8 23. "Bit_2323,Overflow bit. This field is corresponding to 11th SRAM." "0,1"
hexmask.long.byte 0x8 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 11th SRAM."
bitfld.long 0x8 15. "Bit_1515,Overflow bit. This field is corresponding to 10th SRAM." "0,1"
hexmask.long.byte 0x8 8.--14. 1. "Bit_148,Error count. This field is corresponding to 10th SRAM."
bitfld.long 0x8 7. "Bit_77,Overflow bit. This field is corresponding to 9th SRAM." "0,1"
newline
hexmask.long.byte 0x8 0.--6. 1. "Bit_60,Error count. This field is corresponding to 9th SRAM."
line.long 0xC "SPMC1_SPMECOUNT03,"
bitfld.long 0xC 31. "Bit_3131,Overflow bit. This field is corresponding to 16th SRAM." "0,1"
hexmask.long.byte 0xC 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 16th SRAM."
bitfld.long 0xC 23. "Bit_2323,Overflow bit. This field is corresponding to 15th SRAM." "0,1"
hexmask.long.byte 0xC 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 15th SRAM."
bitfld.long 0xC 15. "Bit_1515,Overflow bit. This field is corresponding to 14th SRAM." "0,1"
hexmask.long.byte 0xC 8.--14. 1. "Bit_148,Error count. This field is corresponding to 14th SRAM."
bitfld.long 0xC 7. "Bit_77,Overflow bit. This field is corresponding to 13th SRAM." "0,1"
newline
hexmask.long.byte 0xC 0.--6. 1. "Bit_60,Error count. This field is corresponding to 13th SRAM."
line.long 0x10 "SPMC1_SPMECOUNT04,"
bitfld.long 0x10 31. "Bit_3131,Overflow bit. This field is corresponding to 20th SRAM." "0,1"
hexmask.long.byte 0x10 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 20th SRAM."
bitfld.long 0x10 23. "Bit_2323,Overflow bit. This field is corresponding to 19th SRAM." "0,1"
hexmask.long.byte 0x10 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 19th SRAM."
bitfld.long 0x10 15. "Bit_1515,Overflow bit. This field is corresponding to 18th SRAM." "0,1"
hexmask.long.byte 0x10 8.--14. 1. "Bit_148,Error count. This field is corresponding to 18th SRAM."
bitfld.long 0x10 7. "Bit_77,Overflow bit. This field is corresponding to 17th SRAM." "0,1"
newline
hexmask.long.byte 0x10 0.--6. 1. "Bit_60,Error count. This field is corresponding to 17th SRAM."
line.long 0x14 "SPMC1_SPMECOUNT05,"
bitfld.long 0x14 31. "Bit_3131,Overflow bit. This field is corresponding to 24th SRAM." "0,1"
hexmask.long.byte 0x14 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 24th SRAM."
bitfld.long 0x14 23. "Bit_2323,Overflow bit. This field is corresponding to 23th SRAM." "0,1"
hexmask.long.byte 0x14 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 23th SRAM."
bitfld.long 0x14 15. "Bit_1515,Overflow bit. This field is corresponding to 22th SRAM." "0,1"
hexmask.long.byte 0x14 8.--14. 1. "Bit_148,Error count. This field is corresponding to 22th SRAM."
bitfld.long 0x14 7. "Bit_77,Overflow bit. This field is corresponding to 21th SRAM." "0,1"
newline
hexmask.long.byte 0x14 0.--6. 1. "Bit_60,Error count. This field is corresponding to 21th SRAM."
line.long 0x18 "SPMC1_SPMECOUNT06,"
bitfld.long 0x18 31. "Bit_3131,Overflow bit. This field is corresponding to 28th SRAM." "0,1"
hexmask.long.byte 0x18 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 28th SRAM."
bitfld.long 0x18 23. "Bit_2323,Overflow bit. This field is corresponding to 27th SRAM." "0,1"
hexmask.long.byte 0x18 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 27th SRAM."
bitfld.long 0x18 15. "Bit_1515,Overflow bit. This field is corresponding to 26th SRAM." "0,1"
hexmask.long.byte 0x18 8.--14. 1. "Bit_148,Error count. This field is corresponding to 26th SRAM."
bitfld.long 0x18 7. "Bit_77,Overflow bit. This field is corresponding to 25th SRAM." "0,1"
newline
hexmask.long.byte 0x18 0.--6. 1. "Bit_60,Error count. This field is corresponding to 25th SRAM."
line.long 0x1C "SPMC1_SPMECOUNT07,"
bitfld.long 0x1C 31. "Bit_3131,Overflow bit. This field is corresponding to 32th SRAM." "0,1"
hexmask.long.byte 0x1C 24.--30. 1. "Bit_3024,Error count. This field is corresponding to 32th SRAM."
bitfld.long 0x1C 23. "Bit_2323,Overflow bit. This field is corresponding to 31th SRAM." "0,1"
hexmask.long.byte 0x1C 16.--22. 1. "Bit_2216,Error count. This field is corresponding to 31th SRAM."
bitfld.long 0x1C 15. "Bit_1515,Overflow bit. This field is corresponding to 30th SRAM." "0,1"
hexmask.long.byte 0x1C 8.--14. 1. "Bit_148,Error count. This field is corresponding to 30th SRAM."
bitfld.long 0x1C 7. "Bit_77,Overflow bit. This field is corresponding to 29th SRAM." "0,1"
newline
hexmask.long.byte 0x1C 0.--6. 1. "Bit_60,Error count. This field is corresponding to 29th SRAM."
rgroup.long 0x300++0x1FF
line.long 0x0 "SPMC1_ERRINFO000,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x4 "SPMC1_ERRINFO001,"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x8 "SPMC1_ERRINFO002,"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0xC "SPMC1_ERRINFO003,"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x10 "SPMC1_ERRINFO004,"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x14 "SPMC1_ERRINFO005,"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x18 "SPMC1_ERRINFO006,"
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x1C "SPMC1_ERRINFO007,"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x20 "SPMC1_ERRINFO008,"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x24 "SPMC1_ERRINFO009,"
hexmask.long.tbyte 0x24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x28 "SPMC1_ERRINFO010,"
hexmask.long.tbyte 0x28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x28 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x2C "SPMC1_ERRINFO011,"
hexmask.long.tbyte 0x2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x30 "SPMC1_ERRINFO012,"
hexmask.long.tbyte 0x30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x30 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x34 "SPMC1_ERRINFO013,"
hexmask.long.tbyte 0x34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x34 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x38 "SPMC1_ERRINFO014,"
hexmask.long.tbyte 0x38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x38 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x3C "SPMC1_ERRINFO015,"
hexmask.long.tbyte 0x3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
line.long 0x40 "SPMC1_ERRINFO016,"
hexmask.long.tbyte 0x40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x40 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 5th SRAM is happened. This record is 1st error."
line.long 0x44 "SPMC1_ERRINFO017,"
hexmask.long.tbyte 0x44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x44 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 5th SRAM is happened. This record is 2nd error."
line.long 0x48 "SPMC1_ERRINFO018,"
hexmask.long.tbyte 0x48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x48 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 5th SRAM is happened. This record is 3rd error."
line.long 0x4C "SPMC1_ERRINFO019,"
hexmask.long.tbyte 0x4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 5th SRAM is happened. This record is 4th error."
line.long 0x50 "SPMC1_ERRINFO020,"
hexmask.long.tbyte 0x50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x50 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 6th SRAM is happened. This record is 1st error."
line.long 0x54 "SPMC1_ERRINFO021,"
hexmask.long.tbyte 0x54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x54 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 6th SRAM is happened. This record is 2nd error."
line.long 0x58 "SPMC1_ERRINFO022,"
hexmask.long.tbyte 0x58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x58 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 6th SRAM is happened. This record is 3rd error."
line.long 0x5C "SPMC1_ERRINFO023,"
hexmask.long.tbyte 0x5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 6th SRAM is happened. This record is 4th error."
line.long 0x60 "SPMC1_ERRINFO024,"
hexmask.long.tbyte 0x60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x60 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 7th SRAM is happened. This record is 1st error."
line.long 0x64 "SPMC1_ERRINFO025,"
hexmask.long.tbyte 0x64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x64 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 7th SRAM is happened. This record is 2nd error."
line.long 0x68 "SPMC1_ERRINFO026,"
hexmask.long.tbyte 0x68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x68 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 7th SRAM is happened. This record is 3rd error."
line.long 0x6C "SPMC1_ERRINFO027,"
hexmask.long.tbyte 0x6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 7th SRAM is happened. This record is 4th error."
line.long 0x70 "SPMC1_ERRINFO028,"
hexmask.long.tbyte 0x70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x70 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 8th SRAM is happened. This record is 1st error."
line.long 0x74 "SPMC1_ERRINFO029,"
hexmask.long.tbyte 0x74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x74 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 8th SRAM is happened. This record is 2nd error."
line.long 0x78 "SPMC1_ERRINFO030,"
hexmask.long.tbyte 0x78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x78 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 8th SRAM is happened. This record is 3rd error."
line.long 0x7C "SPMC1_ERRINFO031,"
hexmask.long.tbyte 0x7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 8th SRAM is happened. This record is 4th error."
line.long 0x80 "SPMC1_ERRINFO032,"
hexmask.long.tbyte 0x80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x80 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 9th SRAM is happened. This record is 1st error."
line.long 0x84 "SPMC1_ERRINFO033,"
hexmask.long.tbyte 0x84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x84 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 9th SRAM is happened. This record is 2nd error."
line.long 0x88 "SPMC1_ERRINFO034,"
hexmask.long.tbyte 0x88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x88 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 9th SRAM is happened. This record is 3rd error."
line.long 0x8C "SPMC1_ERRINFO035,"
hexmask.long.tbyte 0x8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 9th SRAM is happened. This record is 4th error."
line.long 0x90 "SPMC1_ERRINFO036,"
hexmask.long.tbyte 0x90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x90 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 10th SRAM is happened. This record is 1st error."
line.long 0x94 "SPMC1_ERRINFO037,"
hexmask.long.tbyte 0x94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x94 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 10th SRAM is happened. This record is 2nd error."
line.long 0x98 "SPMC1_ERRINFO038,"
hexmask.long.tbyte 0x98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x98 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 10th SRAM is happened. This record is 3rd error."
line.long 0x9C "SPMC1_ERRINFO039,"
hexmask.long.tbyte 0x9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 10th SRAM is happened. This record is 4th error."
line.long 0xA0 "SPMC1_ERRINFO040,"
hexmask.long.tbyte 0xA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 11th SRAM is happened. This record is 1st error."
line.long 0xA4 "SPMC1_ERRINFO041,"
hexmask.long.tbyte 0xA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 11th SRAM is happened. This record is 2nd error."
line.long 0xA8 "SPMC1_ERRINFO042,"
hexmask.long.tbyte 0xA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 11th SRAM is happened. This record is 3rd error."
line.long 0xAC "SPMC1_ERRINFO043,"
hexmask.long.tbyte 0xAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 11th SRAM is happened. This record is 4th error."
line.long 0xB0 "SPMC1_ERRINFO044,"
hexmask.long.tbyte 0xB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 12th SRAM is happened. This record is 1st error."
line.long 0xB4 "SPMC1_ERRINFO045,"
hexmask.long.tbyte 0xB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 12th SRAM is happened. This record is 2nd error."
line.long 0xB8 "SPMC1_ERRINFO046,"
hexmask.long.tbyte 0xB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 12th SRAM is happened. This record is 3rd error."
line.long 0xBC "SPMC1_ERRINFO047,"
hexmask.long.tbyte 0xBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 12th SRAM is happened. This record is 4th error."
line.long 0xC0 "SPMC1_ERRINFO048,"
hexmask.long.tbyte 0xC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 13th SRAM is happened. This record is 1st error."
line.long 0xC4 "SPMC1_ERRINFO049,"
hexmask.long.tbyte 0xC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 13th SRAM is happened. This record is 2nd error."
line.long 0xC8 "SPMC1_ERRINFO050,"
hexmask.long.tbyte 0xC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 13th SRAM is happened. This record is 3rd error."
line.long 0xCC "SPMC1_ERRINFO051,"
hexmask.long.tbyte 0xCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 13th SRAM is happened. This record is 4th error."
line.long 0xD0 "SPMC1_ERRINFO052,"
hexmask.long.tbyte 0xD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 14th SRAM is happened. This record is 1st error."
line.long 0xD4 "SPMC1_ERRINFO053,"
hexmask.long.tbyte 0xD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 14th SRAM is happened. This record is 2nd error."
line.long 0xD8 "SPMC1_ERRINFO054,"
hexmask.long.tbyte 0xD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 14th SRAM is happened. This record is 3rd error."
line.long 0xDC "SPMC1_ERRINFO055,"
hexmask.long.tbyte 0xDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 14th SRAM is happened. This record is 4th error."
line.long 0xE0 "SPMC1_ERRINFO056,"
hexmask.long.tbyte 0xE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 15th SRAM is happened. This record is 1st error."
line.long 0xE4 "SPMC1_ERRINFO057,"
hexmask.long.tbyte 0xE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 15th SRAM is happened. This record is 2nd error."
line.long 0xE8 "SPMC1_ERRINFO058,"
hexmask.long.tbyte 0xE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 15th SRAM is happened. This record is 3rd error."
line.long 0xEC "SPMC1_ERRINFO059,"
hexmask.long.tbyte 0xEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 15th SRAM is happened. This record is 4th error."
line.long 0xF0 "SPMC1_ERRINFO060,"
hexmask.long.tbyte 0xF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 16th SRAM is happened. This record is 1st error."
line.long 0xF4 "SPMC1_ERRINFO061,"
hexmask.long.tbyte 0xF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 16th SRAM is happened. This record is 2nd error."
line.long 0xF8 "SPMC1_ERRINFO062,"
hexmask.long.tbyte 0xF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 16th SRAM is happened. This record is 3rd error."
line.long 0xFC "SPMC1_ERRINFO063,"
hexmask.long.tbyte 0xFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 16th SRAM is happened. This record is 4th error."
line.long 0x100 "SPMC1_ERRINFO064,"
hexmask.long.tbyte 0x100 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x100 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 17th SRAM is happened. This record is 1st error."
line.long 0x104 "SPMC1_ERRINFO065,"
hexmask.long.tbyte 0x104 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x104 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 17th SRAM is happened. This record is 2nd error."
line.long 0x108 "SPMC1_ERRINFO066,"
hexmask.long.tbyte 0x108 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x108 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 17th SRAM is happened. This record is 3rd error."
line.long 0x10C "SPMC1_ERRINFO067,"
hexmask.long.tbyte 0x10C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 17th SRAM is happened. This record is 4th error."
line.long 0x110 "SPMC1_ERRINFO068,"
hexmask.long.tbyte 0x110 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x110 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 18th SRAM is happened. This record is 1st error."
line.long 0x114 "SPMC1_ERRINFO069,"
hexmask.long.tbyte 0x114 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x114 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 18th SRAM is happened. This record is 2nd error."
line.long 0x118 "SPMC1_ERRINFO070,"
hexmask.long.tbyte 0x118 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x118 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 18th SRAM is happened. This record is 3rd error."
line.long 0x11C "SPMC1_ERRINFO071,"
hexmask.long.tbyte 0x11C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x11C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 18th SRAM is happened. This record is 4th error."
line.long 0x120 "SPMC1_ERRINFO072,"
hexmask.long.tbyte 0x120 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x120 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 19th SRAM is happened. This record is 1st error."
line.long 0x124 "SPMC1_ERRINFO073,"
hexmask.long.tbyte 0x124 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x124 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 19th SRAM is happened. This record is 2nd error."
line.long 0x128 "SPMC1_ERRINFO074,"
hexmask.long.tbyte 0x128 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x128 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 19th SRAM is happened. This record is 3rd error."
line.long 0x12C "SPMC1_ERRINFO075,"
hexmask.long.tbyte 0x12C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x12C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 19th SRAM is happened. This record is 4th error."
line.long 0x130 "SPMC1_ERRINFO076,"
hexmask.long.tbyte 0x130 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x130 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 20th SRAM is happened. This record is 1st error."
line.long 0x134 "SPMC1_ERRINFO077,"
hexmask.long.tbyte 0x134 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x134 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 20th SRAM is happened. This record is 2nd error."
line.long 0x138 "SPMC1_ERRINFO078,"
hexmask.long.tbyte 0x138 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x138 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 20th SRAM is happened. This record is 3rd error."
line.long 0x13C "SPMC1_ERRINFO079,"
hexmask.long.tbyte 0x13C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x13C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 20th SRAM is happened. This record is 4th error."
line.long 0x140 "SPMC1_ERRINFO080,"
hexmask.long.tbyte 0x140 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x140 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 21th SRAM is happened. This record is 1st error."
line.long 0x144 "SPMC1_ERRINFO081,"
hexmask.long.tbyte 0x144 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x144 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 21th SRAM is happened. This record is 2nd error."
line.long 0x148 "SPMC1_ERRINFO082,"
hexmask.long.tbyte 0x148 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x148 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 21th SRAM is happened. This record is 3rd error."
line.long 0x14C "SPMC1_ERRINFO083,"
hexmask.long.tbyte 0x14C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 21th SRAM is happened. This record is 4th error."
line.long 0x150 "SPMC1_ERRINFO084,"
hexmask.long.tbyte 0x150 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x150 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 22th SRAM is happened. This record is 1st error."
line.long 0x154 "SPMC1_ERRINFO085,"
hexmask.long.tbyte 0x154 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x154 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 22th SRAM is happened. This record is 2nd error."
line.long 0x158 "SPMC1_ERRINFO086,"
hexmask.long.tbyte 0x158 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x158 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 22th SRAM is happened. This record is 3rd error."
line.long 0x15C "SPMC1_ERRINFO087,"
hexmask.long.tbyte 0x15C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x15C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 22th SRAM is happened. This record is 4th error."
line.long 0x160 "SPMC1_ERRINFO088,"
hexmask.long.tbyte 0x160 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x160 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 23th SRAM is happened. This record is 1st error."
line.long 0x164 "SPMC1_ERRINFO089,"
hexmask.long.tbyte 0x164 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x164 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 23th SRAM is happened. This record is 2nd error."
line.long 0x168 "SPMC1_ERRINFO090,"
hexmask.long.tbyte 0x168 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x168 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 23th SRAM is happened. This record is 3rd error."
line.long 0x16C "SPMC1_ERRINFO091,"
hexmask.long.tbyte 0x16C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x16C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 23th SRAM is happened. This record is 4th error."
line.long 0x170 "SPMC1_ERRINFO092,"
hexmask.long.tbyte 0x170 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x170 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 24th SRAM is happened. This record is 1st error."
line.long 0x174 "SPMC1_ERRINFO093,"
hexmask.long.tbyte 0x174 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x174 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 24th SRAM is happened. This record is 2nd error."
line.long 0x178 "SPMC1_ERRINFO094,"
hexmask.long.tbyte 0x178 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x178 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 24th SRAM is happened. This record is 3rd error."
line.long 0x17C "SPMC1_ERRINFO095,"
hexmask.long.tbyte 0x17C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x17C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 24th SRAM is happened. This record is 4th error."
line.long 0x180 "SPMC1_ERRINFO096,"
hexmask.long.tbyte 0x180 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x180 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 25th SRAM is happened. This record is 1st error."
line.long 0x184 "SPMC1_ERRINFO097,"
hexmask.long.tbyte 0x184 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x184 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 25th SRAM is happened. This record is 2nd error."
line.long 0x188 "SPMC1_ERRINFO098,"
hexmask.long.tbyte 0x188 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x188 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 25th SRAM is happened. This record is 3rd error."
line.long 0x18C "SPMC1_ERRINFO099,"
hexmask.long.tbyte 0x18C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 25th SRAM is happened. This record is 4th error."
line.long 0x190 "SPMC1_ERRINFO100,"
hexmask.long.tbyte 0x190 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x190 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 26th SRAM is happened. This record is 1st error."
line.long 0x194 "SPMC1_ERRINFO101,"
hexmask.long.tbyte 0x194 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x194 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 26th SRAM is happened. This record is 2nd error."
line.long 0x198 "SPMC1_ERRINFO102,"
hexmask.long.tbyte 0x198 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x198 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 26th SRAM is happened. This record is 3rd error."
line.long 0x19C "SPMC1_ERRINFO103,"
hexmask.long.tbyte 0x19C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x19C 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 26th SRAM is happened. This record is 4th error."
line.long 0x1A0 "SPMC1_ERRINFO104,"
hexmask.long.tbyte 0x1A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1A0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 27th SRAM is happened. This record is 1st error."
line.long 0x1A4 "SPMC1_ERRINFO105,"
hexmask.long.tbyte 0x1A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1A4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 27th SRAM is happened. This record is 2nd error."
line.long 0x1A8 "SPMC1_ERRINFO106,"
hexmask.long.tbyte 0x1A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1A8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 27th SRAM is happened. This record is 3rd error."
line.long 0x1AC "SPMC1_ERRINFO107,"
hexmask.long.tbyte 0x1AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1AC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 27th SRAM is happened. This record is 4th error."
line.long 0x1B0 "SPMC1_ERRINFO108,"
hexmask.long.tbyte 0x1B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1B0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 28th SRAM is happened. This record is 1st error."
line.long 0x1B4 "SPMC1_ERRINFO109,"
hexmask.long.tbyte 0x1B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1B4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 28th SRAM is happened. This record is 2nd error."
line.long 0x1B8 "SPMC1_ERRINFO110,"
hexmask.long.tbyte 0x1B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1B8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 28th SRAM is happened. This record is 3rd error."
line.long 0x1BC "SPMC1_ERRINFO111,"
hexmask.long.tbyte 0x1BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1BC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 28th SRAM is happened. This record is 4th error."
line.long 0x1C0 "SPMC1_ERRINFO112,"
hexmask.long.tbyte 0x1C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 29th SRAM is happened. This record is 1st error."
line.long 0x1C4 "SPMC1_ERRINFO113,"
hexmask.long.tbyte 0x1C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 29th SRAM is happened. This record is 2nd error."
line.long 0x1C8 "SPMC1_ERRINFO114,"
hexmask.long.tbyte 0x1C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 29th SRAM is happened. This record is 3rd error."
line.long 0x1CC "SPMC1_ERRINFO115,"
hexmask.long.tbyte 0x1CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1CC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 29th SRAM is happened. This record is 4th error."
line.long 0x1D0 "SPMC1_ERRINFO116,"
hexmask.long.tbyte 0x1D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1D0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 30th SRAM is happened. This record is 1st error."
line.long 0x1D4 "SPMC1_ERRINFO117,"
hexmask.long.tbyte 0x1D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1D4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 30th SRAM is happened. This record is 2nd error."
line.long 0x1D8 "SPMC1_ERRINFO118,"
hexmask.long.tbyte 0x1D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1D8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 30th SRAM is happened. This record is 3rd error."
line.long 0x1DC "SPMC1_ERRINFO119,"
hexmask.long.tbyte 0x1DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1DC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 30th SRAM is happened. This record is 4th error."
line.long 0x1E0 "SPMC1_ERRINFO120,"
hexmask.long.tbyte 0x1E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1E0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 31th SRAM is happened. This record is 1st error."
line.long 0x1E4 "SPMC1_ERRINFO121,"
hexmask.long.tbyte 0x1E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1E4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 31th SRAM is happened. This record is 2nd error."
line.long 0x1E8 "SPMC1_ERRINFO122,"
hexmask.long.tbyte 0x1E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1E8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 31th SRAM is happened. This record is 3rd error."
line.long 0x1EC "SPMC1_ERRINFO123,"
hexmask.long.tbyte 0x1EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1EC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 31th SRAM is happened. This record is 4th error."
line.long 0x1F0 "SPMC1_ERRINFO124,"
hexmask.long.tbyte 0x1F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1F0 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 32th SRAM is happened. This record is 1st error."
line.long 0x1F4 "SPMC1_ERRINFO125,"
hexmask.long.tbyte 0x1F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1F4 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 32th SRAM is happened. This record is 2nd error."
line.long 0x1F8 "SPMC1_ERRINFO126,"
hexmask.long.tbyte 0x1F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1F8 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 32th SRAM is happened. This record is 3rd error."
line.long 0x1FC "SPMC1_ERRINFO127,"
hexmask.long.tbyte 0x1FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1FC 0.--7. 1. "Bit_70,It indicates the recorded information when the ECC/EDC error regarding 32th SRAM is happened. This record is 4th error."
rgroup.long 0x700++0x1FF
line.long 0x0 "SPMC1_EADDRINFO000,"
hexmask.long 0x0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 1st error."
line.long 0x4 "SPMC1_EADDRINFO001,"
hexmask.long 0x4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 2nd error."
line.long 0x8 "SPMC1_EADDRINFO002,"
hexmask.long 0x8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 3rd error."
line.long 0xC "SPMC1_EADDRINFO003,"
hexmask.long 0xC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 1st SRAM is happened. This record is 4th error."
line.long 0x10 "SPMC1_EADDRINFO004,"
hexmask.long 0x10 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 1st error."
line.long 0x14 "SPMC1_EADDRINFO005,"
hexmask.long 0x14 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 2nd error."
line.long 0x18 "SPMC1_EADDRINFO006,"
hexmask.long 0x18 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 3rd error."
line.long 0x1C "SPMC1_EADDRINFO007,"
hexmask.long 0x1C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 2nd SRAM is happened. This record is 4th error."
line.long 0x20 "SPMC1_EADDRINFO008,"
hexmask.long 0x20 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 1st error."
line.long 0x24 "SPMC1_EADDRINFO009,"
hexmask.long 0x24 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 2nd error."
line.long 0x28 "SPMC1_EADDRINFO010,"
hexmask.long 0x28 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 3rd error."
line.long 0x2C "SPMC1_EADDRINFO011,"
hexmask.long 0x2C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 3rd SRAM is happened. This record is 4th error."
line.long 0x30 "SPMC1_EADDRINFO012,"
hexmask.long 0x30 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 1st error."
line.long 0x34 "SPMC1_EADDRINFO013,"
hexmask.long 0x34 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 2nd error."
line.long 0x38 "SPMC1_EADDRINFO014,"
hexmask.long 0x38 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 3rd error."
line.long 0x3C "SPMC1_EADDRINFO015,"
hexmask.long 0x3C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 4th SRAM is happened. This record is 4th error."
line.long 0x40 "SPMC1_EADDRINFO016,"
hexmask.long 0x40 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 5th SRAM is happened. This record is 1st error."
line.long 0x44 "SPMC1_EADDRINFO017,"
hexmask.long 0x44 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 5th SRAM is happened. This record is 2nd error."
line.long 0x48 "SPMC1_EADDRINFO018,"
hexmask.long 0x48 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 5th SRAM is happened. This record is 3rd error."
line.long 0x4C "SPMC1_EADDRINFO019,"
hexmask.long 0x4C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 5th SRAM is happened. This record is 4th error."
line.long 0x50 "SPMC1_EADDRINFO020,"
hexmask.long 0x50 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 6th SRAM is happened. This record is 1st error."
line.long 0x54 "SPMC1_EADDRINFO021,"
hexmask.long 0x54 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 6th SRAM is happened. This record is 2nd error."
line.long 0x58 "SPMC1_EADDRINFO022,"
hexmask.long 0x58 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 6th SRAM is happened. This record is 3rd error."
line.long 0x5C "SPMC1_EADDRINFO023,"
hexmask.long 0x5C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 6th SRAM is happened. This record is 4th error."
line.long 0x60 "SPMC1_EADDRINFO024,"
hexmask.long 0x60 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 7th SRAM is happened. This record is 1st error."
line.long 0x64 "SPMC1_EADDRINFO025,"
hexmask.long 0x64 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 7th SRAM is happened. This record is 2nd error."
line.long 0x68 "SPMC1_EADDRINFO026,"
hexmask.long 0x68 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 7th SRAM is happened. This record is 3rd error."
line.long 0x6C "SPMC1_EADDRINFO027,"
hexmask.long 0x6C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 7th SRAM is happened. This record is 4th error."
line.long 0x70 "SPMC1_EADDRINFO028,"
hexmask.long 0x70 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 8th SRAM is happened. This record is 1st error."
line.long 0x74 "SPMC1_EADDRINFO029,"
hexmask.long 0x74 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 8th SRAM is happened. This record is 2nd error."
line.long 0x78 "SPMC1_EADDRINFO030,"
hexmask.long 0x78 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 8th SRAM is happened. This record is 3rd error."
line.long 0x7C "SPMC1_EADDRINFO031,"
hexmask.long 0x7C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 8th SRAM is happened. This record is 4th error."
line.long 0x80 "SPMC1_EADDRINFO032,"
hexmask.long 0x80 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 9th SRAM is happened. This record is 1st error."
line.long 0x84 "SPMC1_EADDRINFO033,"
hexmask.long 0x84 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 9th SRAM is happened. This record is 2nd error."
line.long 0x88 "SPMC1_EADDRINFO034,"
hexmask.long 0x88 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 9th SRAM is happened. This record is 3rd error."
line.long 0x8C "SPMC1_EADDRINFO035,"
hexmask.long 0x8C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 9th SRAM is happened. This record is 4th error."
line.long 0x90 "SPMC1_EADDRINFO036,"
hexmask.long 0x90 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 10th SRAM is happened. This record is 1st error."
line.long 0x94 "SPMC1_EADDRINFO037,"
hexmask.long 0x94 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 10th SRAM is happened. This record is 2nd error."
line.long 0x98 "SPMC1_EADDRINFO038,"
hexmask.long 0x98 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 10th SRAM is happened. This record is 3rd error."
line.long 0x9C "SPMC1_EADDRINFO039,"
hexmask.long 0x9C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 10th SRAM is happened. This record is 4th error."
line.long 0xA0 "SPMC1_EADDRINFO040,"
hexmask.long 0xA0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 11th SRAM is happened. This record is 1st error."
line.long 0xA4 "SPMC1_EADDRINFO041,"
hexmask.long 0xA4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 11th SRAM is happened. This record is 2nd error."
line.long 0xA8 "SPMC1_EADDRINFO042,"
hexmask.long 0xA8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 11th SRAM is happened. This record is 3rd error."
line.long 0xAC "SPMC1_EADDRINFO043,"
hexmask.long 0xAC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 11th SRAM is happened. This record is 4th error."
line.long 0xB0 "SPMC1_EADDRINFO044,"
hexmask.long 0xB0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 12th SRAM is happened. This record is 1st error."
line.long 0xB4 "SPMC1_EADDRINFO045,"
hexmask.long 0xB4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 12th SRAM is happened. This record is 2nd error."
line.long 0xB8 "SPMC1_EADDRINFO046,"
hexmask.long 0xB8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 12th SRAM is happened. This record is 3rd error."
line.long 0xBC "SPMC1_EADDRINFO047,"
hexmask.long 0xBC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 12th SRAM is happened. This record is 4th error."
line.long 0xC0 "SPMC1_EADDRINFO048,"
hexmask.long 0xC0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 13th SRAM is happened. This record is 1st error."
line.long 0xC4 "SPMC1_EADDRINFO049,"
hexmask.long 0xC4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 13th SRAM is happened. This record is 2nd error."
line.long 0xC8 "SPMC1_EADDRINFO050,"
hexmask.long 0xC8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 13th SRAM is happened. This record is 3rd error."
line.long 0xCC "SPMC1_EADDRINFO051,"
hexmask.long 0xCC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 13th SRAM is happened. This record is 4th error."
line.long 0xD0 "SPMC1_EADDRINFO052,"
hexmask.long 0xD0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 14th SRAM is happened. This record is 1st error."
line.long 0xD4 "SPMC1_EADDRINFO053,"
hexmask.long 0xD4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 14th SRAM is happened. This record is 2nd error."
line.long 0xD8 "SPMC1_EADDRINFO054,"
hexmask.long 0xD8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 14th SRAM is happened. This record is 3rd error."
line.long 0xDC "SPMC1_EADDRINFO055,"
hexmask.long 0xDC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 14th SRAM is happened. This record is 4th error."
line.long 0xE0 "SPMC1_EADDRINFO056,"
hexmask.long 0xE0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 15th SRAM is happened. This record is 1st error."
line.long 0xE4 "SPMC1_EADDRINFO057,"
hexmask.long 0xE4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 15th SRAM is happened. This record is 2nd error."
line.long 0xE8 "SPMC1_EADDRINFO058,"
hexmask.long 0xE8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 15th SRAM is happened. This record is 3rd error."
line.long 0xEC "SPMC1_EADDRINFO059,"
hexmask.long 0xEC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 15th SRAM is happened. This record is 4th error."
line.long 0xF0 "SPMC1_EADDRINFO060,"
hexmask.long 0xF0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 16th SRAM is happened. This record is 1st error."
line.long 0xF4 "SPMC1_EADDRINFO061,"
hexmask.long 0xF4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 16th SRAM is happened. This record is 2nd error."
line.long 0xF8 "SPMC1_EADDRINFO062,"
hexmask.long 0xF8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 16th SRAM is happened. This record is 3rd error."
line.long 0xFC "SPMC1_EADDRINFO063,"
hexmask.long 0xFC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 16th SRAM is happened. This record is 4th error."
line.long 0x100 "SPMC1_EADDRINFO064,"
hexmask.long 0x100 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 17th SRAM is happened. This record is 1st error."
line.long 0x104 "SPMC1_EADDRINFO065,"
hexmask.long 0x104 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 17th SRAM is happened. This record is 2nd error."
line.long 0x108 "SPMC1_EADDRINFO066,"
hexmask.long 0x108 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 17th SRAM is happened. This record is 3rd error."
line.long 0x10C "SPMC1_EADDRINFO067,"
hexmask.long 0x10C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 17th SRAM is happened. This record is 4th error."
line.long 0x110 "SPMC1_EADDRINFO068,"
hexmask.long 0x110 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 18th SRAM is happened. This record is 1st error."
line.long 0x114 "SPMC1_EADDRINFO069,"
hexmask.long 0x114 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 18th SRAM is happened. This record is 2nd error."
line.long 0x118 "SPMC1_EADDRINFO070,"
hexmask.long 0x118 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 18th SRAM is happened. This record is 3rd error."
line.long 0x11C "SPMC1_EADDRINFO071,"
hexmask.long 0x11C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 18th SRAM is happened. This record is 4th error."
line.long 0x120 "SPMC1_EADDRINFO072,"
hexmask.long 0x120 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 19th SRAM is happened. This record is 1st error."
line.long 0x124 "SPMC1_EADDRINFO073,"
hexmask.long 0x124 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 19th SRAM is happened. This record is 2nd error."
line.long 0x128 "SPMC1_EADDRINFO074,"
hexmask.long 0x128 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 19th SRAM is happened. This record is 3rd error."
line.long 0x12C "SPMC1_EADDRINFO075,"
hexmask.long 0x12C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 19th SRAM is happened. This record is 4th error."
line.long 0x130 "SPMC1_EADDRINFO076,"
hexmask.long 0x130 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 20th SRAM is happened. This record is 1st error."
line.long 0x134 "SPMC1_EADDRINFO077,"
hexmask.long 0x134 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 20th SRAM is happened. This record is 2nd error."
line.long 0x138 "SPMC1_EADDRINFO078,"
hexmask.long 0x138 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 20th SRAM is happened. This record is 3rd error."
line.long 0x13C "SPMC1_EADDRINFO079,"
hexmask.long 0x13C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 20th SRAM is happened. This record is 4th error."
line.long 0x140 "SPMC1_EADDRINFO080,"
hexmask.long 0x140 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 21th SRAM is happened. This record is 1st error."
line.long 0x144 "SPMC1_EADDRINFO081,"
hexmask.long 0x144 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 21th SRAM is happened. This record is 2nd error."
line.long 0x148 "SPMC1_EADDRINFO082,"
hexmask.long 0x148 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 21th SRAM is happened. This record is 3rd error."
line.long 0x14C "SPMC1_EADDRINFO083,"
hexmask.long 0x14C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 21th SRAM is happened. This record is 4th error."
line.long 0x150 "SPMC1_EADDRINFO084,"
hexmask.long 0x150 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 22th SRAM is happened. This record is 1st error."
line.long 0x154 "SPMC1_EADDRINFO085,"
hexmask.long 0x154 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 22th SRAM is happened. This record is 2nd error."
line.long 0x158 "SPMC1_EADDRINFO086,"
hexmask.long 0x158 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 22th SRAM is happened. This record is 3rd error."
line.long 0x15C "SPMC1_EADDRINFO087,"
hexmask.long 0x15C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 22th SRAM is happened. This record is 4th error."
line.long 0x160 "SPMC1_EADDRINFO088,"
hexmask.long 0x160 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 23th SRAM is happened. This record is 1st error."
line.long 0x164 "SPMC1_EADDRINFO089,"
hexmask.long 0x164 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 23th SRAM is happened. This record is 2nd error."
line.long 0x168 "SPMC1_EADDRINFO090,"
hexmask.long 0x168 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 23th SRAM is happened. This record is 3rd error."
line.long 0x16C "SPMC1_EADDRINFO091,"
hexmask.long 0x16C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 23th SRAM is happened. This record is 4th error."
line.long 0x170 "SPMC1_EADDRINFO092,"
hexmask.long 0x170 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 24th SRAM is happened. This record is 1st error."
line.long 0x174 "SPMC1_EADDRINFO093,"
hexmask.long 0x174 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 24th SRAM is happened. This record is 2nd error."
line.long 0x178 "SPMC1_EADDRINFO094,"
hexmask.long 0x178 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 24th SRAM is happened. This record is 3rd error."
line.long 0x17C "SPMC1_EADDRINFO095,"
hexmask.long 0x17C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 24th SRAM is happened. This record is 4th error."
line.long 0x180 "SPMC1_EADDRINFO096,"
hexmask.long 0x180 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 25th SRAM is happened. This record is 1st error."
line.long 0x184 "SPMC1_EADDRINFO097,"
hexmask.long 0x184 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 25th SRAM is happened. This record is 2nd error."
line.long 0x188 "SPMC1_EADDRINFO098,"
hexmask.long 0x188 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 25th SRAM is happened. This record is 3rd error."
line.long 0x18C "SPMC1_EADDRINFO099,"
hexmask.long 0x18C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 25th SRAM is happened. This record is 4th error."
line.long 0x190 "SPMC1_EADDRINFO100,"
hexmask.long 0x190 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 26th SRAM is happened. This record is 1st error."
line.long 0x194 "SPMC1_EADDRINFO101,"
hexmask.long 0x194 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 26th SRAM is happened. This record is 2nd error."
line.long 0x198 "SPMC1_EADDRINFO102,"
hexmask.long 0x198 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 26th SRAM is happened. This record is 3rd error."
line.long 0x19C "SPMC1_EADDRINFO103,"
hexmask.long 0x19C 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 26th SRAM is happened. This record is 4th error."
line.long 0x1A0 "SPMC1_EADDRINFO104,"
hexmask.long 0x1A0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 27th SRAM is happened. This record is 1st error."
line.long 0x1A4 "SPMC1_EADDRINFO105,"
hexmask.long 0x1A4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 27th SRAM is happened. This record is 2nd error."
line.long 0x1A8 "SPMC1_EADDRINFO106,"
hexmask.long 0x1A8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 27th SRAM is happened. This record is 3rd error."
line.long 0x1AC "SPMC1_EADDRINFO107,"
hexmask.long 0x1AC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 27th SRAM is happened. This record is 4th error."
line.long 0x1B0 "SPMC1_EADDRINFO108,"
hexmask.long 0x1B0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 28th SRAM is happened. This record is 1st error."
line.long 0x1B4 "SPMC1_EADDRINFO109,"
hexmask.long 0x1B4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 28th SRAM is happened. This record is 2nd error."
line.long 0x1B8 "SPMC1_EADDRINFO110,"
hexmask.long 0x1B8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 28th SRAM is happened. This record is 3rd error."
line.long 0x1BC "SPMC1_EADDRINFO111,"
hexmask.long 0x1BC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 28th SRAM is happened. This record is 4th error."
line.long 0x1C0 "SPMC1_EADDRINFO112,"
hexmask.long 0x1C0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 29th SRAM is happened. This record is 1st error."
line.long 0x1C4 "SPMC1_EADDRINFO113,"
hexmask.long 0x1C4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 29th SRAM is happened. This record is 2nd error."
line.long 0x1C8 "SPMC1_EADDRINFO114,"
hexmask.long 0x1C8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 29th SRAM is happened. This record is 3rd error."
line.long 0x1CC "SPMC1_EADDRINFO115,"
hexmask.long 0x1CC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 29th SRAM is happened. This record is 4th error."
line.long 0x1D0 "SPMC1_EADDRINFO116,"
hexmask.long 0x1D0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 30th SRAM is happened. This record is 1st error."
line.long 0x1D4 "SPMC1_EADDRINFO117,"
hexmask.long 0x1D4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 30th SRAM is happened. This record is 2nd error."
line.long 0x1D8 "SPMC1_EADDRINFO118,"
hexmask.long 0x1D8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 30th SRAM is happened. This record is 3rd error."
line.long 0x1DC "SPMC1_EADDRINFO119,"
hexmask.long 0x1DC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 30th SRAM is happened. This record is 4th error."
line.long 0x1E0 "SPMC1_EADDRINFO120,"
hexmask.long 0x1E0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 31th SRAM is happened. This record is 1st error."
line.long 0x1E4 "SPMC1_EADDRINFO121,"
hexmask.long 0x1E4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 31th SRAM is happened. This record is 2nd error."
line.long 0x1E8 "SPMC1_EADDRINFO122,"
hexmask.long 0x1E8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 31th SRAM is happened. This record is 3rd error."
line.long 0x1EC "SPMC1_EADDRINFO123,"
hexmask.long 0x1EC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 31th SRAM is happened. This record is 4th error."
line.long 0x1F0 "SPMC1_EADDRINFO124,"
hexmask.long 0x1F0 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 32th SRAM is happened. This record is 1st error."
line.long 0x1F4 "SPMC1_EADDRINFO125,"
hexmask.long 0x1F4 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 32th SRAM is happened. This record is 2nd error."
line.long 0x1F8 "SPMC1_EADDRINFO126,"
hexmask.long 0x1F8 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 32th SRAM is happened. This record is 3rd error."
line.long 0x1FC "SPMC1_EADDRINFO127,"
hexmask.long 0x1FC 0.--31. 1. "Bit_310,It indicates the recorded address when the ECC/EDC error regarding 32th SRAM is happened. This record is 4th error."
tree.end
tree "IMP_X7_System_SPMC"
base ad:0xFFAB0000
rgroup.long 0x0++0x3
line.long 0x0 "VCR,"
hexmask.long 0x0 0.--31. 1. "VCR,Version information."
rgroup.long 0xC0++0x3
line.long 0x0 "FSERRBRD,This register indicates the functional safety errors."
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "Bit_88,EDC error for IP." "0,1"
bitfld.long 0x0 7. "Bit_77,Error for built-in register modules." "0,1"
bitfld.long 0x0 6. "Reserved_6,Reserved" "0,1"
bitfld.long 0x0 5. "Bit_55,EDC error for the own Scratchpad Memory." "0,1"
newline
bitfld.long 0x0 4. "Bit_44,ECC error for the own Scratchpad Memory." "0,1"
bitfld.long 0x0 3. "Bit_33,DCLS error for the own Scratchpad Memory." "0,1"
bitfld.long 0x0 2. "Bit_22,Any errors occurred at the own AXI master bus (post-process)." "0,1"
bitfld.long 0x0 1. "Bit_11,Any errors occurred at the own AXI master bus (pre-process)." "0,1"
bitfld.long 0x0 0. "Bit_00,Any errors occurred at the own AXI slave bus." "0,1"
group.long 0x110++0x3
line.long 0x0 "ACLR,This register has the function to clear the error regarding the functional safety. Each bit field corresponds to each part on the own AXI slave bus domain."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Bit_3030,Corresponding part : post-process  going toward built-in register module." "0,1"
hexmask.long 0x0 4.--29. 1. "Reserved_4,Reserved"
bitfld.long 0x0 3. "Bit_33,Corresponding part : post-process  going toward IMP Slim DMAC ch1." "0,1"
bitfld.long 0x0 2. "Bit_22,Corresponding part : post-process  going toward IMP Slim DMAC ch0." "0,1"
newline
bitfld.long 0x0 1. "Bit_11,Corresponding part : post-process  going toward IMP CNN." "0,1"
bitfld.long 0x0 0. "Bit_00,Corresponding part : pre-process (address decode phase)." "0,1"
rgroup.long 0x114++0x13
line.long 0x0 "ACA,This register indicates any errors which are happened on the own AXI slave bus domain."
bitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Bit_3030,Destination ID check error regarding built-in register module" "0,1"
hexmask.long.word 0x0 21.--29. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
bitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
newline
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID check error (R-ch)" "0,1"
bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
newline
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
newline
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "DERRINFO,This register indicates the information regarding the address decoder of the own AXI slave bus. The contents are recorded when the error is detected."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "DERRADRAR,This register indicates the information regarding the address decoder of the own AXI slave bus. The contents are recorded when the error is detected."
hexmask.long 0x8 0.--31. 1. "Bit_310,Decode error address for read function (lower 32-bit)"
line.long 0xC "DERRADRAW,This register indicates the information regarding the address decoder of the own AXI slave bus. The contents are recorded when the error is detected."
hexmask.long 0xC 0.--31. 1. "Bit_310,Decode error address for write function (lower 32-bit)"
line.long 0x10 "PCNT,This register is related to AXI slave bus. It indicates the number of on-the-fly transaction."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x10 24.--28. 1. "Bit_2824,Packet counter for W-ch"
bitfld.long 0x10 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x10 16.--20. 1. "Bit_2016,Packet counter for AW-ch"
hexmask.long.word 0x10 5.--15. 1. "Reserved_5,Reserved"
newline
hexmask.long.byte 0x10 0.--4. 1. "Bit_40,Packet counter for AR-ch"
group.long 0x130++0x3
line.long 0x0 "ACAD,This register is related to the own AXI slave bus. When each bit filed is set to double_quotation1double_quotation. the corresponding checker function is disabled."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Register slice ordering check" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID check" "0,1"
bitfld.long 0x0 10. "Bit_1010,Burst ID check (R-ch)" "0,1"
newline
hexmask.long.word 0x0 0.--9. 1. "Reserved_0,Reserved"
rgroup.long 0x144++0x3
line.long 0x0 "ACASLV00,This register is related to the own AXI slave bus. It indicates any errors which are happened on the dedicated part regarding IMP CNN."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
rgroup.long 0x164++0x3
line.long 0x0 "ACASLV01,This register is related to the own AXI slave bus. It indicates any errors which are happened on the dedicated part regarding IMP Slim DMAC ch0."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
rgroup.long 0x184++0x3
line.long 0x0 "ACASLV02,This register is related to the own AXI slave bus. It indicates any errors which are happened on the dedicated part regarding IMP Slim DMAC ch1."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
rgroup.long 0x400++0x7
line.long 0x0 "ACAREG0,This register is related to ."
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved"
bitfld.long 0x0 2. "Bit_22,EDC check for W-ch / Register module" "0,1"
bitfld.long 0x0 1. "Bit_11,EDC check for AW-ch / Register module" "0,1"
bitfld.long 0x0 0. "Bit_00,EDC check for AR-ch / Register module" "0,1"
line.long 0x4 "ACAREG1,This register is related to built-in register modules in each Scratchpad Memory bank."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x4 7. "Bit_77,Routing check / SPM register module (bank1)" "0,1"
bitfld.long 0x4 6. "Bit_66,EDC check for W-ch / SPM register module (bank1)" "0,1"
bitfld.long 0x4 5. "Bit_55,EDC check for AW-ch / SPM register module (bank1)" "0,1"
bitfld.long 0x4 4. "Bit_44,EDC check for AR-ch / SPM register module (bank1)" "0,1"
newline
bitfld.long 0x4 3. "Bit_33,Routing check / SPM register module (bank0)" "0,1"
bitfld.long 0x4 2. "Bit_22,EDC check for W-ch / SPM register module (bank0)" "0,1"
bitfld.long 0x4 1. "Bit_11,EDC check for AW-ch / SPM register module (bank0)" "0,1"
bitfld.long 0x4 0. "Bit_00,EDC check for AR-ch / SPM register module (bank0)" "0,1"
group.long 0x604++0xB
line.long 0x0 "TTOC00,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP CNN (IF 0)."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "Bit_1515,Eable of the timeout counter for read function" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time for read function"
line.long 0x4 "TOCAX00,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP CNN (IF 0)."
rbitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Reserved_16,Reserved"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x8 "TOCRB00,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP CNN (IF 0)."
rbitfld.long 0x8 31. "Reserved_31,Reserved" "0,1"
hexmask.long.word 0x8 16.--30. 1. "Reserved_16,Reserved"
bitfld.long 0x8 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x610++0xF
line.long 0x0 "ACA00,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP CNN (IF 0)."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 27.--29. "Reserved_27,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 24.--26. "Bit_2624,EDC checker. It can be cleared by ERRCTRL0.CLR." "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
newline
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
newline
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination(Source) ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (R-ch)" "0,1"
bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
newline
bitfld.long 0x0 6. "Reserved_6,Reserved" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 3.--4. "Reserved_3,Reserved" "0,1,2,3"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "Bit_00,Timeout error for read function" "0,1"
line.long 0x4 "DERRINFO00,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP CNN (IF 0)."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
newline
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "PCNT00,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP CNN (IF 0)."
hexmask.long 0x8 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Packet counter for AR-ch"
line.long 0xC "RTOIDAR00,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP CNN (IF 0)."
bitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0xC 8.--28. 1. "Bit_288,Bus information (arid)"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
rgroup.long 0x624++0x3
line.long 0x0 "RSA000,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP CNN (IF 0). It indicates the ordering error of register slice."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "Bit_77,Redundant register slice error (valid and ready signals)" "0,1"
bitfld.long 0x0 6. "Bit_66,Register slice  going toward default slave (p1)" "0,1"
bitfld.long 0x0 4.--5. "Reserved_4,Reserved" "0,1,2,3"
bitfld.long 0x0 3. "Bit_33,Register slice  going toward default slave (p0)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Register slice  going toward central domain bus (SPMI)" "0,1"
bitfld.long 0x0 1. "Bit_11,2nd register slice" "0,1"
bitfld.long 0x0 0. "Bit_00,1st register slice" "0,1"
group.long 0x6C4++0xB
line.long 0x0 "TTOC04,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Slim DMAC ch0."
bitfld.long 0x0 31. "Bit_3131,Eable of the timeout counter for write function" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time for write function"
bitfld.long 0x0 15. "Bit_1515,Eable of the timeout counter for read function" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time for read function"
line.long 0x4 "TOCAX04,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Slim DMAC ch0."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x8 "TOCRB04,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Slim DMAC ch0."
bitfld.long 0x8 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x8 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x6D0++0x17
line.long 0x0 "ACA04,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Slim DMAC ch0."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 27.--29. "Reserved_27,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 24.--26. "Bit_2624,EDC checker. It can be cleared by ERRCTRL0.CLR." "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
newline
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
newline
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination(Source) ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (R-ch)" "0,1"
bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
newline
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
newline
bitfld.long 0x0 1. "Bit_11,Timeout error for write function" "0,1"
bitfld.long 0x0 0. "Bit_00,Timeout error for read function" "0,1"
line.long 0x4 "DERRINFO04,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Slim DMAC ch0."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "PCNT04,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Slim DMAC ch0."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 6.--15. 1. "Reserved_6,Reserved"
newline
hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Packet counter for AR-ch"
line.long 0xC "RTOIDAR04,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Slim DMAC ch0."
bitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0xC 8.--28. 1. "Bit_288,Bus information (arid)"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
line.long 0x10 "RTOIDAW04,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Slim DMAC ch0."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x10 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x14 "RSA040,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Slim DMAC ch0. It indicates the ordering error of register slice."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x14 7. "Bit_77,Redundant register slice error (valid and ready signals)" "0,1"
bitfld.long 0x14 6. "Bit_66,Register slice  going toward default slave (p1)" "0,1"
bitfld.long 0x14 4.--5. "Bit_54,Register slice  going toward Scratchpad Memory" "0,1,2,3"
bitfld.long 0x14 3. "Bit_33,Register slice  going toward default slave (p0)" "0,1"
newline
bitfld.long 0x14 2. "Bit_22,Register slice  going toward central domain bus (SPMI)" "0,1"
bitfld.long 0x14 1. "Bit_11,2nd register slice" "0,1"
bitfld.long 0x14 0. "Bit_00,1st register slice" "0,1"
group.long 0x6F4++0xB
line.long 0x0 "TTOC05,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Slim DMAC ch1."
bitfld.long 0x0 31. "Bit_3131,Eable of the timeout counter for write function" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time for write function"
bitfld.long 0x0 15. "Bit_1515,Eable of the timeout counter for read function" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time for read function"
line.long 0x4 "TOCAX05,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Slim DMAC ch1."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x8 "TOCRB05,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Slim DMAC ch1."
bitfld.long 0x8 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x8 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x700++0x17
line.long 0x0 "ACA05,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Slim DMAC ch1."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 27.--29. "Reserved_27,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 24.--26. "Bit_2624,EDC checker. It can be cleared by ERRCTRL0.CLR." "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
newline
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
newline
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination(Source) ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (R-ch)" "0,1"
bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
newline
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
newline
bitfld.long 0x0 1. "Bit_11,Timeout error for write function" "0,1"
bitfld.long 0x0 0. "Bit_00,Timeout error for read function" "0,1"
line.long 0x4 "DERRINFO05,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Slim DMAC ch1."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "PCNT05,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Slim DMAC ch1."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 6.--15. 1. "Reserved_6,Reserved"
newline
hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Packet counter for AR-ch"
line.long 0xC "RTOIDAR05,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Slim DMAC ch1."
bitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0xC 8.--28. 1. "Bit_288,Bus information (arid)"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
line.long 0x10 "RTOIDAW05,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Slim DMAC ch1."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x10 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x14 "RSA050,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Slim DMAC ch1. It indicates the ordering error of register slice."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x14 7. "Bit_77,Redundant register slice error (valid and ready signals)" "0,1"
bitfld.long 0x14 6. "Bit_66,Register slice  going toward default slave (p1)" "0,1"
bitfld.long 0x14 4.--5. "Bit_54,Register slice  going toward Scratchpad Memory" "0,1,2,3"
bitfld.long 0x14 3. "Bit_33,Register slice  going toward default slave (p0)" "0,1"
newline
bitfld.long 0x14 2. "Bit_22,Register slice  going toward central domain bus (SPMI)" "0,1"
bitfld.long 0x14 1. "Bit_11,2nd register slice" "0,1"
bitfld.long 0x14 0. "Bit_00,1st register slice" "0,1"
group.long 0x724++0xB
line.long 0x0 "TTOC06,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for VDSP ch0."
bitfld.long 0x0 31. "Bit_3131,Eable of the timeout counter for write function" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time for write function"
bitfld.long 0x0 15. "Bit_1515,Eable of the timeout counter for read function" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time for read function"
line.long 0x4 "TOCAX06,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for VDSP ch0."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x8 "TOCRB06,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for VDSP ch0."
bitfld.long 0x8 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x8 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x730++0x17
line.long 0x0 "ACA06,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for VDSP ch0."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 27.--29. "Bit_2927,EDC checker. It can be cleared by ERRCTRL0.CLR." "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 20.--26. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
newline
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
newline
bitfld.long 0x0 11. "Bit_1111,Destination(Source) ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (R-ch)" "0,1"
bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
newline
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 1. "Bit_11,Timeout error for write function" "0,1"
newline
bitfld.long 0x0 0. "Bit_00,Timeout error for read function" "0,1"
line.long 0x4 "DERRINFO06,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for VDSP ch0."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "PCNT06,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for VDSP ch0."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 6.--15. 1. "Reserved_6,Reserved"
newline
hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Packet counter for AR-ch"
line.long 0xC "RTOIDAR06,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for VDSP ch0."
bitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0xC 8.--28. 1. "Bit_288,Bus information (arid)"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
line.long 0x10 "RTOIDAW06,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for VDSP ch0."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x10 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x14 "RSA060,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for VDSP ch0. It indicates the ordering error of register slice."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x14 7. "Bit_77,Redundant register slice error (valid and ready signals)" "0,1"
bitfld.long 0x14 6. "Bit_66,Register slice  going toward default slave (p1)" "0,1"
bitfld.long 0x14 4.--5. "Bit_54,Register slice  going toward Scratchpad Memory" "0,1,2,3"
bitfld.long 0x14 3. "Bit_33,Register slice  going toward default slave (p0)" "0,1"
newline
bitfld.long 0x14 2. "Bit_22,Register slice  going toward central domain bus (SPMI)" "0,1"
bitfld.long 0x14 1. "Bit_11,2nd register slice" "0,1"
bitfld.long 0x14 0. "Bit_00,1st register slice" "0,1"
group.long 0x754++0xB
line.long 0x0 "TTOC07,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for VDSP ch1."
bitfld.long 0x0 31. "Bit_3131,Eable of the timeout counter for write function" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time for write function"
bitfld.long 0x0 15. "Bit_1515,Eable of the timeout counter for read function" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time for read function"
line.long 0x4 "TOCAX07,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for VDSP ch1."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x8 "TOCRB07,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for VDSP ch1."
bitfld.long 0x8 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x8 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x760++0x17
line.long 0x0 "ACA07,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for VDSP ch1."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 27.--29. "Bit_2927,EDC checker. It can be cleared by ERRCTRL0.CLR." "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 20.--26. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
newline
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
newline
bitfld.long 0x0 11. "Bit_1111,Destination(Source) ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (R-ch)" "0,1"
bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
newline
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 1. "Bit_11,Timeout error for write function" "0,1"
newline
bitfld.long 0x0 0. "Bit_00,Timeout error for read function" "0,1"
line.long 0x4 "DERRINFO07,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for VDSP ch1."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "PCNT07,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for VDSP ch1."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 6.--15. 1. "Reserved_6,Reserved"
newline
hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Packet counter for AR-ch"
line.long 0xC "RTOIDAR07,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for VDSP ch1."
bitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0xC 8.--28. 1. "Bit_288,Bus information (arid)"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
line.long 0x10 "RTOIDAW07,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for VDSP ch1."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x10 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x14 "RSA070,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for VDSP ch1. It indicates the ordering error of register slice."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x14 7. "Bit_77,Redundant register slice error (valid and ready signals)" "0,1"
bitfld.long 0x14 6. "Bit_66,Register slice  going toward default slave (p1)" "0,1"
bitfld.long 0x14 4.--5. "Bit_54,Register slice  going toward Scratchpad Memory" "0,1,2,3"
bitfld.long 0x14 3. "Bit_33,Register slice  going toward default slave (p0)" "0,1"
newline
bitfld.long 0x14 2. "Bit_22,Register slice  going toward central domain bus (SPMI)" "0,1"
bitfld.long 0x14 1. "Bit_11,2nd register slice" "0,1"
bitfld.long 0x14 0. "Bit_00,1st register slice" "0,1"
group.long 0x7E8++0x7
line.long 0x0 "TOCAX10,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for central domain bus (SPMI)."
bitfld.long 0x0 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x0 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x4 "TOCRB10,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for central domain bus (SPMI)."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x7F0++0x17
line.long 0x0 "ACA10,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for central domain bus (SPMI)."
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
newline
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
newline
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
newline
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "DERRINFO10,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for central domain bus (SPMI)."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "PCNT10,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for central domain bus (SPMI)."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 6.--15. 1. "Reserved_6,Reserved"
newline
hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Packet counter for AR-ch"
line.long 0xC "RTOIDAR10,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for central domain bus (SPMI)."
bitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0xC 8.--28. 1. "Bit_288,Bus information (arid)"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
line.long 0x10 "RTOIDAW10,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for central domain bus (SPMI)."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x10 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x14 "RSA100,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for central domain bus (SPMI). It indicates the ordering error of register slice."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x14 7. "Bit_77,Redundant register slice error (valid and ready signals)" "0,1"
bitfld.long 0x14 6. "Bit_66,Register slice  going toward default slave (p1)" "0,1"
bitfld.long 0x14 4.--5. "Bit_54,Register slice  going toward Scratchpad Memory" "0,1,2,3"
bitfld.long 0x14 3. "Bit_33,Register slice  going toward default slave (p0)" "0,1"
newline
bitfld.long 0x14 2. "Reserved_2,Reserved" "0,1"
bitfld.long 0x14 1. "Bit_11,2nd register slice" "0,1"
bitfld.long 0x14 0. "Bit_00,1st register slice" "0,1"
group.long 0x8F0++0x7
line.long 0x0 "ACACLRPR,This register has the function to clear the bus errors. Each bit field corresponds to each pre-process part on the own AXI master bus domain."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.byte 0x0 4.--10. 1. "Bit_104,Access alert clear (bit position is corresponding to bus master number)"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "Bit_00,Access alert clear (bit position is corresponding to bus master number)" "0,1"
line.long 0x4 "ACACLRPT,This register has the function to clear the bus errors. Each bit field corresponds to each post-process part on the own AXI master bus domain."
hexmask.long 0x4 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x4 0.--4. 1. "Bit_40,Access alert clear (bit position is corresponding to bus master number)"
group.long 0x908++0x7
line.long 0x0 "TOCAXPRT00,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank0."
bitfld.long 0x0 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x0 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x4 "TOCRBPRT00,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank0."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x910++0x3
line.long 0x0 "ACAPRT00,This register is related to the own AXI master bus. It indicates any errors which are detected on the dedicated part regarding the own Scratchpad Memory bank0."
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 20.--23. 1. "Bit_2320,Ordering error of register slice"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
newline
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
hexmask.long.byte 0x0 7.--11. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
newline
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0x928++0x7
line.long 0x0 "TOCAXPRT01,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank1."
bitfld.long 0x0 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x0 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x4 "TOCRBPRT01,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank1."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x930++0x3
line.long 0x0 "ACAPRT01,This register is related to the own AXI master bus. It indicates any errors which are detected on the dedicated part regarding the own Scratchpad Memory bank1."
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 20.--23. 1. "Bit_2320,Ordering error of register slice"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
newline
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
hexmask.long.byte 0x0 7.--11. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
newline
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0x948++0x7
line.long 0x0 "TOCAXPRT02,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward central domain bus (SPMI)."
bitfld.long 0x0 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x0 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x4 "TOCRBPRT02,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward central domain bus (SPMI)."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x950++0x3
line.long 0x0 "ACAPRT02,This register is related to the own AXI master bus. It indicates any errors which are detected on the dedicated part regarding central domain bus (SPMI)."
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 20.--23. 1. "Bit_2320,Ordering error of register slice"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
newline
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
newline
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0xB00++0x3
line.long 0x0 "TIMESCALE0,This register has the function regrding the functional safety. It is the settings of timeout counters."
bitfld.long 0x0 31. "Bit_3131,System timer enable" "0,1"
hexmask.long 0x0 4.--30. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,System timer scale"
group.long 0xD00++0x3
line.long 0x0 "IP0ERRCTRL,This register is related to the functional safety. it is correspondig to IMP CNN."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Bit_3030,Disable for EDC error output" "0,1"
hexmask.long.tbyte 0x0 12.--29. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,Threshold number of EDC error for SRAM"
newline
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,Threshold number of EDC error for the bus access"
rgroup.long 0xD04++0x3
line.long 0x0 "IP0ERRSTS,This register is related to the functional safety. it is correspondig to IMP CNN."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 20.--23. 1. "Bit_2320,The number of EDC error for AXI slave bus W-ch"
hexmask.long.byte 0x0 16.--19. 1. "Bit_1916,The number of EDC error for AXI slave bus AW-ch"
hexmask.long.byte 0x0 12.--15. 1. "Bit_1512,The number of EDC error for AXI slave bus AR-ch"
newline
hexmask.long.byte 0x0 8.--11. 1. "Bit_118,The number of EDC error for CNN dedicated IF/SRAM"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,The number of EDC error for AXI master bus R-ch (data)"
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,The number of EDC error for AXI master bus R-ch (command)"
group.long 0xD10++0x3
line.long 0x0 "IP1ERRCTRL,This register is related to the functional safety. it is correspondig to IMP Slim DMAC ch0."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Bit_3030,Disable for EDC error output" "0,1"
hexmask.long.tbyte 0x0 12.--29. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,Threshold number of EDC error for SRAM"
newline
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,Threshold number of EDC error for the bus access"
rgroup.long 0xD14++0x3
line.long 0x0 "IP1ERRSTS,This register is related to the functional safety. it is correspondig to IMP Slim DMAC ch0."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x0 24.--27. 1. "Bit_2724,The number of EDC error for SRAM"
hexmask.long.byte 0x0 20.--23. 1. "Bit_2320,The number of EDC error for AXI slave bus W-ch"
hexmask.long.byte 0x0 16.--19. 1. "Bit_1916,The number of EDC error for AXI slave bus AW-ch"
hexmask.long.byte 0x0 12.--15. 1. "Bit_1512,The number of EDC error for AXI slave bus AR-ch"
newline
hexmask.long.byte 0x0 8.--11. 1. "Bit_118,The number of EDC error for AXI master bus B-ch"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,The number of EDC error for AXI master bus R-ch (data)"
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,The number of EDC error for AXI master bus R-ch (command)"
group.long 0xD20++0x3
line.long 0x0 "IP2ERRCTRL,This register is related to the functional safety. it is correspondig to IMP Slim DMAC ch1."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Bit_3030,Disable for EDC error output" "0,1"
hexmask.long.tbyte 0x0 12.--29. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,Threshold number of EDC error for SRAM"
newline
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,Threshold number of EDC error for the bus access"
rgroup.long 0xD24++0x3
line.long 0x0 "IP2ERRSTS,This register is related to the functional safety. it is correspondig to IMP Slim DMAC ch1."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x0 24.--27. 1. "Bit_2724,The number of EDC error for SRAM"
hexmask.long.byte 0x0 20.--23. 1. "Bit_2320,The number of EDC error for AXI slave bus W-ch"
hexmask.long.byte 0x0 16.--19. 1. "Bit_1916,The number of EDC error for AXI slave bus AW-ch"
hexmask.long.byte 0x0 12.--15. 1. "Bit_1512,The number of EDC error for AXI slave bus AR-ch"
newline
hexmask.long.byte 0x0 8.--11. 1. "Bit_118,The number of EDC error for AXI master bus B-ch"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,The number of EDC error for AXI master bus R-ch (data)"
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,The number of EDC error for AXI master bus R-ch (command)"
group.long 0xEA0++0xF
line.long 0x0 "ERRCTRL0,This register is related to the functional safety."
bitfld.long 0x0 31. "CLR,Clear EDC error" "0,1"
bitfld.long 0x0 30. "DISABLE,Disable for EDC error output" "0,1"
hexmask.long 0x0 4.--29. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "TH,Threshold number of EDC error for the own AXI slave/master bus"
line.long 0x4 "ERRCTRL1,This register is related to the functional safety."
bitfld.long 0x4 31. "Bit_3131,Error injection for the own AXI slave (post-process  going toward default slave)" "0,1"
bitfld.long 0x4 30. "Bit_3030,Error injection for the own AXI slave (post-process  going toward built-in register module)" "0,1"
hexmask.long.word 0x4 19.--29. 1. "Reserved_19,Reserved"
bitfld.long 0x4 16.--18. "Bit_1816,Error injection for build-in register module" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 4.--15. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x4 3. "Bit_33,Error injection for the own AXI slave (post-process  going toward IMP Slim DMAC ch1)" "0,1"
bitfld.long 0x4 2. "Bit_22,Error injection for the own AXI slave (post-process  going toward IMP Slim DMAC ch0)" "0,1"
bitfld.long 0x4 1. "Bit_11,Error injection for the own AXI slave (post-process  going toward IMP CNN)" "0,1"
bitfld.long 0x4 0. "Bit_00,Error injection for the own AXI slave (pre-process)" "0,1"
line.long 0x8 "ERRCTRL2,This register is related to the functional safety."
rbitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Error injection for the own AXI master (pre-process  EDC checker  dedicated part of IMP Slim DMAC ch0)"
hexmask.long.tbyte 0x8 6.--23. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Error injection for the own AXI master (pre-process  EDC checker  dedicated part of IMP CNN (IF 0))"
line.long 0xC "ERRCTRL3,This register is related to the functional safety."
hexmask.long.word 0xC 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0xC 12.--17. 1. "Bit_1712,Error injection for the own AXI master (pre-process  EDC checker  dedicated part of VDSP ch1)"
hexmask.long.byte 0xC 6.--11. 1. "Bit_116,Error injection for the own AXI master (pre-process  EDC checker  dedicated part of VDSP ch0)"
hexmask.long.byte 0xC 0.--5. 1. "Bit_50,Error injection for the own AXI master (pre-process  EDC checker  dedicated part of IMP Slim DMAC ch1)"
group.long 0xEB4++0x3
line.long 0x0 "ERRCTRL5,This register is related to the functional safety."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Error injection for the own AXI master (pre-process  dedicated part of default slave (p1))" "0,1"
bitfld.long 0x0 19. "Bit_1919,Error injection for the own AXI master (pre-process  dedicated part of default slave (p0))" "0,1"
bitfld.long 0x0 18. "Bit_1818,Error injection for the own AXI master (pre-process  dedicated part of central domain bus (SPMI))" "0,1"
bitfld.long 0x0 17. "Bit_1717,Error injection for the own AXI master (pre-process  dedicated part of the own Scratchpad Memory bank1)" "0,1"
newline
bitfld.long 0x0 16. "Bit_1616,Error injection for the own AXI master (pre-process  dedicated part of the own Scratchpad Memory bank0)" "0,1"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
bitfld.long 0x0 10. "Bit_1010,Error injection for the own AXI master (pre-process  dedicated part of central domain bus (SPMI))" "0,1"
rbitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "Bit_77,Error injection for the own AXI master (pre-process  dedicated part of VDSP ch1)" "0,1"
newline
bitfld.long 0x0 6. "Bit_66,Error injection for the own AXI master (pre-process  dedicated part of VDSP ch0)" "0,1"
bitfld.long 0x0 5. "Bit_55,Error injection for the own AXI master (pre-process  dedicated part of IMP Slim DMAC ch1)" "0,1"
bitfld.long 0x0 4. "Bit_44,Error injection for the own AXI master (pre-process  dedicated part of IMP Slim DMAC ch0)" "0,1"
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "Bit_00,Error injection for the own AXI master (pre-process  dedicated part of IMP CNN (IF 0))" "0,1"
rgroup.long 0xEE0++0xF
line.long 0x0 "ERRSUM0,This register is related to the functional safety."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x0 20.--29. 1. "Reserved_20,Reserved"
bitfld.long 0x0 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
hexmask.long.word 0x0 4.--13. 1. "Reserved_4,Reserved"
bitfld.long 0x0 1.--3. "Bit_31,Error Summary for the own AXI slave bus (post-process)" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "Bit_00,Error Summary for the own AXI slave bus (pre-process)" "0,1"
line.long 0x4 "ERRSUM1,This register is related to the functional safety."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.byte 0x4 20.--26. 1. "Reserved_20,Reserved"
bitfld.long 0x4 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
hexmask.long.byte 0x4 11.--15. 1. "Reserved_11,Reserved"
newline
hexmask.long.byte 0x4 4.--10. 1. "Bit_104,Error Summary for the own AXI master bus (pre-process)"
bitfld.long 0x4 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0. "Bit_00,Error Summary for the own AXI master bus (pre-process)" "0,1"
line.long 0x8 "ERRSUM2,This register is related to the functional safety."
hexmask.long.word 0x8 20.--31. 1. "Reserved_20,Reserved"
hexmask.long.byte 0x8 16.--19. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 4.--15. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x8 0.--3. 1. "Bit_30,Error Summary for the own AXI master bus (post-process)"
line.long 0xC "ERRSUM3,This register is related to the functional safety."
hexmask.long.byte 0xC 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.byte 0xC 20.--26. 1. "Reserved_20,Reserved"
bitfld.long 0xC 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 16. "Reserved_16,Reserved" "0,1"
hexmask.long.byte 0xC 11.--15. 1. "Reserved_11,Reserved"
newline
hexmask.long.byte 0xC 4.--10. 1. "Bit_104,Error Summary for the own AXI master bus (pre-process  EDC checker)"
bitfld.long 0xC 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 0. "Bit_00,Error Summary for the own AXI master bus (pre-process  EDC checker)" "0,1"
rgroup.long 0xEF4++0x3
line.long 0x0 "ERRSUM5,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "Bit_77,AXI256 sync post-slice" "0,1"
bitfld.long 0x0 6. "Reserved_6,Reserved" "0,1"
bitfld.long 0x0 5. "Bit_55,AXI64 sync post-slice" "0,1"
hexmask.long.byte 0x0 0.--4. 1. "Reserved_0,Reserved"
rgroup.long 0xF00++0x7
line.long 0x0 "SPMERR0,This register is related to the functional safety. for the own Scratchpad Memory."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 8.--9. "Bit_98,SRAM EDC error  each bit field is corresponding to each bank." "0,1,2,3"
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "Bit_10,SRAM ECC error  each bit field is corresponding to each bank." "0,1,2,3"
line.long 0x4 "SPMERR1,This register is related to the functional safety. for the own Scratchpad Memory."
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved"
bitfld.long 0x4 24.--25. "Bit_2524,DCLS error  each bit field is corresponding to each bank." "0,1,2,3"
hexmask.long.word 0x4 12.--23. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x4 6.--11. 1. "Bit_116,Bus EDC error  for bank1 (SPMC1)."
hexmask.long.byte 0x4 0.--5. 1. "Bit_50,Bus EDC error  for bank0 (SPMC0)."
group.long 0xF08++0x13
line.long 0x0 "SPMCTRL0,This register is related to the own Scratchpad Memory. It indicates the timing control value regarding the resume standby."
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
hexmask.long.tbyte 0x0 0.--19. 1. "Bit_190,This is the guarantee time between the stopping clock and the asserting rs."
line.long 0x4 "SPMCTRL1,This register is related to the own Scratchpad Memory. It indicates the timing control value regarding the resume standby."
hexmask.long.word 0x4 20.--31. 1. "Reserved_20,Reserved"
hexmask.long.tbyte 0x4 0.--19. 1. "Bit_190,This is the guarantee time regardiing rs which is the active state."
line.long 0x8 "SPMCTRL2,This register is related to the own Scratchpad Memory. It indicates the timing control value regarding the resume standby."
hexmask.long.word 0x8 20.--31. 1. "Reserved_20,Reserved"
hexmask.long.tbyte 0x8 0.--19. 1. "Bit_190,This is the guarantee time between the deasserting rs and the beginning of the supplying clock."
line.long 0xC "SPMCTRL3,This register is related to the own Scratchpad Memory."
hexmask.long.byte 0xC 26.--31. 1. "Reserved_26,Reserved"
bitfld.long 0xC 24.--25. "Bit_2524,Error injection for bus EDC error  target bank is corresponding to each bit field." "0,1,2,3"
hexmask.long.word 0xC 10.--23. 1. "Reserved_10,Reserved"
bitfld.long 0xC 8.--9. "Bit_98,Error injection for DCLS error  target bank is corresponding to each bit field." "0,1,2,3"
rbitfld.long 0xC 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0xC 4.--5. "Bit_54,Error injection for SRAM error  target bank is corresponding to each bit field." "0,1,2,3"
hexmask.long.byte 0xC 0.--3. 1. "Bit_30,Error injection mode for SRAM:"
line.long 0x10 "SPMCTRL4,This register is related to the own Scratchpad Memory."
rbitfld.long 0x10 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x10 30. "Bit_3030,Disable for SRAM ECC/EDC error output" "0,1"
hexmask.long.byte 0x10 24.--29. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x10 20.--23. 1. "Bit_2320,Threshold number of SRAM ECC error"
hexmask.long.byte 0x10 16.--19. 1. "Bit_1916,Threshold number of SRAM EDC error"
newline
hexmask.long.byte 0x10 10.--15. 1. "Reserved_10,Reserved"
bitfld.long 0x10 8.--9. "Bit_98,SRAM ECC mode enable" "0,1,2,3"
hexmask.long.byte 0x10 0.--7. 1. "Reserved_0,Reserved"
rgroup.long 0xF80++0x7
line.long 0x0 "DERRADRARPRE00,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 0 (IMP CNN (IF 0)). The contents are recorded when the error is detected."
hexmask.long 0x0 0.--31. 1. "Bit_310,Decode error address for read function"
line.long 0x4 "DERRADRAWPRE00,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 0 (IMP CNN (IF 0)). The contents are recorded when the error is detected."
hexmask.long 0x4 0.--31. 1. "Bit_310,Decode error address for write function"
rgroup.long 0xFA0++0x1F
line.long 0x0 "DERRADRARPRE04,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 4 (IMP Slim DMAC ch0). The contents are recorded when the error is detected."
hexmask.long 0x0 0.--31. 1. "Bit_310,Decode error address for read function"
line.long 0x4 "DERRADRAWPRE04,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 4 (IMP Slim DMAC ch0). The contents are recorded when the error is detected."
hexmask.long 0x4 0.--31. 1. "Bit_310,Decode error address for write function"
line.long 0x8 "DERRADRARPRE05,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 5 (IMP Slim DMAC ch1). The contents are recorded when the error is detected."
hexmask.long 0x8 0.--31. 1. "Bit_310,Decode error address for read function"
line.long 0xC "DERRADRAWPRE05,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 5 (IMP Slim DMAC ch1). The contents are recorded when the error is detected."
hexmask.long 0xC 0.--31. 1. "Bit_310,Decode error address for write function"
line.long 0x10 "DERRADRARPRE06,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 6 (VDSP ch0). The contents are recorded when the error is detected."
hexmask.long 0x10 0.--31. 1. "Bit_310,Decode error address for read function"
line.long 0x14 "DERRADRAWPRE06,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 6 (VDSP ch0). The contents are recorded when the error is detected."
hexmask.long 0x14 0.--31. 1. "Bit_310,Decode error address for write function"
line.long 0x18 "DERRADRARPRE07,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 7 (VDSP ch1). The contents are recorded when the error is detected."
hexmask.long 0x18 0.--31. 1. "Bit_310,Decode error address for read function"
line.long 0x1C "DERRADRAWPRE07,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 7 (VDSP ch1). The contents are recorded when the error is detected."
hexmask.long 0x1C 0.--31. 1. "Bit_310,Decode error address for write function"
rgroup.long 0xFD0++0x7
line.long 0x0 "DERRADRARPRE10,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 10 (central domain bus (SPMI)). The contents are recorded when the error is detected."
hexmask.long 0x0 0.--31. 1. "Bit_310,Decode error address for read function"
line.long 0x4 "DERRADRAWPRE10,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 10 (central domain bus (SPMI)). The contents are recorded when the error is detected."
hexmask.long 0x4 0.--31. 1. "Bit_310,Decode error address for write function"
group.long 0x2000++0x3
line.long 0x0 "PRESET,This is the preset register. It should be set once at the initialization phase."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "PRESET,Set to 1001"
group.long 0x2270++0x13
line.long 0x0 "BMATTR00,This register is related to the behavior of IMP CNN."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 12.--14. "Bit_1412,OS-ID for memory access (write function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 7.--11. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 4.--6. "Bit_64,OS-ID for memory access (read function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved"
line.long 0x4 "BMATTR01,This register is related to the behavior of IMP Slim DMAC ch0."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
rbitfld.long 0x4 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x4 12.--14. "Bit_1412,OS-ID for memory access (write function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x4 7.--11. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x4 4.--6. "Bit_64,OS-ID for memory access (read function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x4 0.--3. 1. "Reserved_0,Reserved"
line.long 0x8 "BMATTR02,This register is related to the behavior of IMP Slim DMAC ch1."
hexmask.long.word 0x8 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x8 16. "Reserved_16,Reserved" "0,1"
rbitfld.long 0x8 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x8 12.--14. "Bit_1412,OS-ID for memory access (write function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 7.--11. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x8 4.--6. "Bit_64,OS-ID for memory access (read function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 0.--3. 1. "Reserved_0,Reserved"
line.long 0xC "BMATTR03,This register is related to the behavior of VDSP ch0."
hexmask.long.word 0xC 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0xC 16. "Reserved_16,Reserved" "0,1"
rbitfld.long 0xC 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0xC 12.--14. "Bit_1412,OS-ID for memory access (write function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0xC 7.--11. 1. "Reserved_7,Reserved"
newline
bitfld.long 0xC 4.--6. "Bit_64,OS-ID for memory access (read function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0xC 0.--3. 1. "Reserved_0,Reserved"
line.long 0x10 "BMATTR04,This register is related to the behavior of VDSP ch1."
hexmask.long.word 0x10 17.--31. 1. "Reserved_17,Reserved"
rbitfld.long 0x10 16. "Reserved_16,Reserved" "0,1"
rbitfld.long 0x10 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x10 12.--14. "Bit_1412,OS-ID for memory access (write function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x10 7.--11. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x10 4.--6. "Bit_64,OS-ID for memory access (read function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x10 0.--3. 1. "Reserved_0,Reserved"
group.long 0x2300++0x3
line.long 0x0 "SPMCTRLX0,This register is the control register of the own Scratchpad Memory."
bitfld.long 0x0 31. "Bit_3131,The enable of SRAM initialization. All Scratchpad Memory banks are started initializing at the same time." "0,1"
hexmask.long 0x0 2.--30. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "Bit_10,DMS disable. Each bit field corresponds to each bank." "0,1,2,3"
tree.end
tree "IMP_X7_System_SPMI"
base ad:0xFFA8C000
rgroup.long 0x0++0x3
line.long 0x0 "VCR,"
hexmask.long 0x0 0.--31. 1. "VCR,Version information."
rgroup.long 0xC0++0x3
line.long 0x0 "FSERRBRD,This register indicates the functional safety errors."
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "Bit_1919,spmc0 / SPM EDC error" "0,1"
bitfld.long 0x0 18. "Bit_1818,spmc0 / SPM ECC error" "0,1"
bitfld.long 0x0 17. "Bit_1717,spmc0 / SPM dcls error" "0,1"
bitfld.long 0x0 16. "Bit_1616,spmc0 / Bus error" "0,1"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "Bit_88,EDC error for IP." "0,1"
bitfld.long 0x0 7. "Bit_77,Error for built-in register modules." "0,1"
bitfld.long 0x0 6. "Bit_66,Error for the own DPR." "0,1"
bitfld.long 0x0 5. "Bit_55,EDC error for the own Scratchpad Memory." "0,1"
newline
bitfld.long 0x0 4. "Bit_44,ECC error for the own Scratchpad Memory." "0,1"
bitfld.long 0x0 3. "Bit_33,DCLS error for the own Scratchpad Memory." "0,1"
bitfld.long 0x0 2. "Bit_22,Any errors occurred at the own AXI master bus (post-process)." "0,1"
bitfld.long 0x0 1. "Bit_11,Any errors occurred at the own AXI master bus (pre-process)." "0,1"
bitfld.long 0x0 0. "Bit_00,Any errors occurred at the own AXI slave bus." "0,1"
group.long 0x110++0x3
line.long 0x0 "ACLR,This register has the function to clear the error regarding the functional safety. Each bit field corresponds to each part on the own AXI slave bus domain."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Bit_3030,Corresponding part : post-process  going toward built-in register module." "0,1"
hexmask.long.word 0x0 15.--29. 1. "Reserved_15,Reserved"
bitfld.long 0x0 14. "Bit_1414,Corresponding part : post-process  going toward AXI master bus." "0,1"
bitfld.long 0x0 13. "Bit_1313,Corresponding part : post-process  going toward IMP DMAC ch1." "0,1"
newline
bitfld.long 0x0 12. "Bit_1212,Corresponding part : post-process  going toward IMP DTA." "0,1"
bitfld.long 0x0 11. "Bit_1111,Corresponding part : post-process  going toward IMP PSC." "0,1"
bitfld.long 0x0 10. "Bit_1010,Corresponding part : post-process  going toward IMP DMAC ch0." "0,1"
bitfld.long 0x0 9. "Bit_99,Corresponding part : post-process  going toward high speed domain bus (SPMC)." "0,1"
bitfld.long 0x0 8. "Bit_88,Corresponding part : post-process  going toward light CVe cluster2." "0,1"
newline
bitfld.long 0x0 7. "Bit_77,Corresponding part : post-process  going toward light CVe cluster1." "0,1"
bitfld.long 0x0 6. "Bit_66,Corresponding part : post-process  going toward light CVe cluster0." "0,1"
bitfld.long 0x0 3.--5. "Bit_53,Corresponding part : post-process  going toward CVe cluster0." "0,1,2,3,4,5,6,7"
bitfld.long 0x0 2. "Bit_22,Corresponding part : post-process  going toward IMP Core ch1." "0,1"
bitfld.long 0x0 1. "Bit_11,Corresponding part : post-process  going toward IMP Core ch0." "0,1"
newline
bitfld.long 0x0 0. "Bit_00,Corresponding part : pre-process (address decode phase)." "0,1"
rgroup.long 0x114++0x13
line.long 0x0 "ACA,This register indicates any errors which are happened on the own AXI slave bus domain."
bitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Bit_3030,Destination ID check error regarding built-in register module" "0,1"
hexmask.long.word 0x0 21.--29. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
bitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
newline
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID check error (R-ch)" "0,1"
bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
newline
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
newline
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "DERRINFO,This register indicates the information regarding the address decoder of the own AXI slave bus. The contents are recorded when the error is detected."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "DERRADRAR,This register indicates the information regarding the address decoder of the own AXI slave bus. The contents are recorded when the error is detected."
hexmask.long 0x8 0.--31. 1. "Bit_310,Decode error address for read function (lower 32-bit)"
line.long 0xC "DERRADRAW,This register indicates the information regarding the address decoder of the own AXI slave bus. The contents are recorded when the error is detected."
hexmask.long 0xC 0.--31. 1. "Bit_310,Decode error address for write function (lower 32-bit)"
line.long 0x10 "PCNT,This register is related to AXI slave bus. It indicates the number of on-the-fly transaction."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x10 24.--28. 1. "Bit_2824,Packet counter for W-ch"
bitfld.long 0x10 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x10 16.--20. 1. "Bit_2016,Packet counter for AW-ch"
hexmask.long.word 0x10 5.--15. 1. "Reserved_5,Reserved"
newline
hexmask.long.byte 0x10 0.--4. 1. "Bit_40,Packet counter for AR-ch"
group.long 0x130++0x3
line.long 0x0 "ACAD,This register is related to the own AXI slave bus. When each bit filed is set to double_quotation1double_quotation. the corresponding checker function is disabled."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Register slice ordering check" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID check" "0,1"
bitfld.long 0x0 10. "Bit_1010,Burst ID check (R-ch)" "0,1"
newline
hexmask.long.word 0x0 0.--9. 1. "Reserved_0,Reserved"
rgroup.long 0x144++0x3
line.long 0x0 "ACASLV00,This register is related to the own AXI slave bus. It indicates any errors which are happened on the dedicated part regarding IMP Core ch0."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
rgroup.long 0x164++0x3
line.long 0x0 "ACASLV01,This register is related to the own AXI slave bus. It indicates any errors which are happened on the dedicated part regarding IMP Core ch1."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
rgroup.long 0x1C4++0x3
line.long 0x0 "ACASLV04,This register is related to the own AXI slave bus. It indicates any errors which are happened on the dedicated part regarding CVe cluster0."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
rgroup.long 0x1E4++0x3
line.long 0x0 "ACASLV05,This register is related to the own AXI slave bus. It indicates any errors which are happened on the dedicated part regarding light CVe cluster0."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
rgroup.long 0x204++0x3
line.long 0x0 "ACASLV06,This register is related to the own AXI slave bus. It indicates any errors which are happened on the dedicated part regarding light CVe cluster1."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
rgroup.long 0x224++0x3
line.long 0x0 "ACASLV07,This register is related to the own AXI slave bus. It indicates any errors which are happened on the dedicated part regarding light CVe cluster2."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
rgroup.long 0x244++0x3
line.long 0x0 "ACASLV08,This register is related to the own AXI slave bus. It indicates any errors which are happened on the dedicated part regarding high speed domain bus (SPMC)."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
rgroup.long 0x264++0x3
line.long 0x0 "ACASLV09,This register is related to the own AXI slave bus. It indicates any errors which are happened on the dedicated part regarding IMP DMAC ch0."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
rgroup.long 0x284++0x3
line.long 0x0 "ACASLV10,This register is related to the own AXI slave bus. It indicates any errors which are happened on the dedicated part regarding IMP PSC."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
rgroup.long 0x2A4++0x3
line.long 0x0 "ACASLV11,This register is related to the own AXI slave bus. It indicates any errors which are happened on the dedicated part regarding IMP DTA."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
rgroup.long 0x2C4++0x3
line.long 0x0 "ACASLV12,This register is related to the own AXI slave bus. It indicates any errors which are happened on the dedicated part regarding IMP DMAC ch1."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
rgroup.long 0x2E4++0x3
line.long 0x0 "ACASLV13,This register is related to the own AXI slave bus. It indicates any errors which are happened on the dedicated part regarding AXI master bus."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
hexmask.long.byte 0x0 12.--19. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
rgroup.long 0x400++0xB
line.long 0x0 "ACAREG0,This register is related to built-in register module."
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved"
bitfld.long 0x0 2. "Bit_22,EDC check for W-ch / Register module" "0,1"
bitfld.long 0x0 1. "Bit_11,EDC check for AW-ch / Register module" "0,1"
bitfld.long 0x0 0. "Bit_00,EDC check for AR-ch / Register module" "0,1"
line.long 0x4 "ACAREG1,This register is related to built-in register modules in each Scratchpad Memory bank."
bitfld.long 0x4 31. "Bit_3131,Routing check / SPM register module (bank7)" "0,1"
bitfld.long 0x4 30. "Bit_3030,EDC check for W-ch / SPM register module (bank7)" "0,1"
bitfld.long 0x4 29. "Bit_2929,EDC check for AW-ch / SPM register module (bank7)" "0,1"
bitfld.long 0x4 28. "Bit_2828,EDC check for AR-ch / SPM register module (bank7)" "0,1"
bitfld.long 0x4 27. "Bit_2727,Routing check / SPM register module (bank6)" "0,1"
newline
bitfld.long 0x4 26. "Bit_2626,EDC check for W-ch / SPM register module (bank6)" "0,1"
bitfld.long 0x4 25. "Bit_2525,EDC check for AW-ch / SPM register module (bank6)" "0,1"
bitfld.long 0x4 24. "Bit_2424,EDC check for AR-ch / SPM register module (bank6)" "0,1"
bitfld.long 0x4 23. "Bit_2323,Routing check / SPM register module (bank5)" "0,1"
bitfld.long 0x4 22. "Bit_2222,EDC check for W-ch / SPM register module (bank5)" "0,1"
newline
bitfld.long 0x4 21. "Bit_2121,EDC check for AW-ch / SPM register module (bank5)" "0,1"
bitfld.long 0x4 20. "Bit_2020,EDC check for AR-ch / SPM register module (bank5)" "0,1"
bitfld.long 0x4 19. "Bit_1919,Routing check / SPM register module (bank4)" "0,1"
bitfld.long 0x4 18. "Bit_1818,EDC check for W-ch / SPM register module (bank4)" "0,1"
bitfld.long 0x4 17. "Bit_1717,EDC check for AW-ch / SPM register module (bank4)" "0,1"
newline
bitfld.long 0x4 16. "Bit_1616,EDC check for AR-ch / SPM register module (bank4)" "0,1"
bitfld.long 0x4 15. "Bit_1515,Routing check / SPM register module (bank3)" "0,1"
bitfld.long 0x4 14. "Bit_1414,EDC check for W-ch / SPM register module (bank3)" "0,1"
bitfld.long 0x4 13. "Bit_1313,EDC check for AW-ch / SPM register module (bank3)" "0,1"
bitfld.long 0x4 12. "Bit_1212,EDC check for AR-ch / SPM register module (bank3)" "0,1"
newline
bitfld.long 0x4 11. "Bit_1111,Routing check / SPM register module (bank2)" "0,1"
bitfld.long 0x4 10. "Bit_1010,EDC check for W-ch / SPM register module (bank2)" "0,1"
bitfld.long 0x4 9. "Bit_99,EDC check for AW-ch / SPM register module (bank2)" "0,1"
bitfld.long 0x4 8. "Bit_88,EDC check for AR-ch / SPM register module (bank2)" "0,1"
bitfld.long 0x4 7. "Bit_77,Routing check / SPM register module (bank1)" "0,1"
newline
bitfld.long 0x4 6. "Bit_66,EDC check for W-ch / SPM register module (bank1)" "0,1"
bitfld.long 0x4 5. "Bit_55,EDC check for AW-ch / SPM register module (bank1)" "0,1"
bitfld.long 0x4 4. "Bit_44,EDC check for AR-ch / SPM register module (bank1)" "0,1"
bitfld.long 0x4 3. "Bit_33,Routing check / SPM register module (bank0)" "0,1"
bitfld.long 0x4 2. "Bit_22,EDC check for W-ch / SPM register module (bank0)" "0,1"
newline
bitfld.long 0x4 1. "Bit_11,EDC check for AW-ch / SPM register module (bank0)" "0,1"
bitfld.long 0x4 0. "Bit_00,EDC check for AR-ch / SPM register module (bank0)" "0,1"
line.long 0x8 "ACASLV2MST,This register is related to the bridge between AXI slave bus and AXI master bus."
hexmask.long.tbyte 0x8 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x8 8.--9. "Bit_98,Register Slice ID check" "0,1,2,3"
bitfld.long 0x8 6.--7. "Reserved_6,Reserved" "0,1,2,3"
bitfld.long 0x8 5. "Bit_55,EDC check for B-ch" "0,1"
bitfld.long 0x8 4. "Bit_44,EDC check for R-ch (data)" "0,1"
newline
bitfld.long 0x8 3. "Bit_33,EDC check for R-ch (command)" "0,1"
bitfld.long 0x8 2. "Bit_22,EDC check for W-ch" "0,1"
bitfld.long 0x8 1. "Bit_11,EDC check for AW-ch" "0,1"
bitfld.long 0x8 0. "Bit_00,EDC check for AR-ch" "0,1"
group.long 0x604++0xB
line.long 0x0 "TTOC00,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Core ch0."
bitfld.long 0x0 31. "Bit_3131,Eable of the timeout counter for write function" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time for write function"
bitfld.long 0x0 15. "Bit_1515,Eable of the timeout counter for read function" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time for read function"
line.long 0x4 "TOCAX00,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Core ch0."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x8 "TOCRB00,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Core ch0."
bitfld.long 0x8 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x8 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x610++0x17
line.long 0x0 "ACA00,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Core ch0."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 27.--29. "Reserved_27,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 24.--26. "Bit_2624,EDC checker" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 22.--23. "Reserved_22,Reserved" "0,1,2,3"
bitfld.long 0x0 20.--21. "Bit_2120,Ordering error of register slice" "0,1,2,3"
newline
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination(Source) ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (R-ch)" "0,1"
bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 1. "Bit_11,Timeout error for write function" "0,1"
bitfld.long 0x0 0. "Bit_00,Timeout error for read function" "0,1"
line.long 0x4 "DERRINFO00,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Core ch0."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "PCNT00,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Core ch0."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 6.--15. 1. "Reserved_6,Reserved"
newline
hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Packet counter for AR-ch"
line.long 0xC "RTOIDAR00,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Core ch0."
bitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0xC 8.--28. 1. "Bit_288,Bus information (arid)"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
line.long 0x10 "RTOIDAW00,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Core ch0."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x10 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x14 "RSA000,"
hexmask.long.tbyte 0x14 15.--31. 1. "Reserved_15,Reserved"
bitfld.long 0x14 14. "Bit_1414,Register slice  going toward default slave (p1)" "0,1"
hexmask.long.byte 0x14 6.--13. 1. "Bit_136,Register slice  going toward Scratchpad Memory"
bitfld.long 0x14 5. "Bit_55,Register slice  going toward default slave (p0)" "0,1"
bitfld.long 0x14 4. "Bit_44,Register slice  going toward system bus (IF1)" "0,1"
newline
bitfld.long 0x14 3. "Bit_33,Register slice  going toward system bus (IF0)" "0,1"
bitfld.long 0x14 2. "Bit_22,Register slice  going toward high speed domain bus (SPMC)" "0,1"
bitfld.long 0x14 1. "Bit_11,2nd register slice" "0,1"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
group.long 0x628++0x3
line.long 0x0 "MBCTRL000,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Core ch0."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "Bit_1717,Indicate the IF number of system bus for write function" "0,1"
bitfld.long 0x0 16. "Bit_1616,Indicate the IF number of system bus for read function" "0,1"
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
group.long 0x634++0xB
line.long 0x0 "TTOC01,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Core ch1."
bitfld.long 0x0 31. "Bit_3131,Eable of the timeout counter for write function" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time for write function"
bitfld.long 0x0 15. "Bit_1515,Eable of the timeout counter for read function" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time for read function"
line.long 0x4 "TOCAX01,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Core ch1."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x8 "TOCRB01,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Core ch1."
bitfld.long 0x8 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x8 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x640++0x17
line.long 0x0 "ACA01,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Core ch1."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 27.--29. "Reserved_27,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 24.--26. "Bit_2624,EDC checker" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 22.--23. "Reserved_22,Reserved" "0,1,2,3"
bitfld.long 0x0 20.--21. "Bit_2120,Ordering error of register slice" "0,1,2,3"
newline
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination(Source) ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (R-ch)" "0,1"
bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
newline
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 1. "Bit_11,Timeout error for write function" "0,1"
bitfld.long 0x0 0. "Bit_00,Timeout error for read function" "0,1"
line.long 0x4 "DERRINFO01,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Core ch1."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "PCNT01,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Core ch1."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 6.--15. 1. "Reserved_6,Reserved"
newline
hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Packet counter for AR-ch"
line.long 0xC "RTOIDAR01,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Core ch1."
bitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0xC 8.--28. 1. "Bit_288,Bus information (arid)"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
line.long 0x10 "RTOIDAW01,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Core ch1."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x10 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x14 "RSA010,"
hexmask.long.tbyte 0x14 15.--31. 1. "Reserved_15,Reserved"
bitfld.long 0x14 14. "Bit_1414,Register slice  going toward default slave (p1)" "0,1"
hexmask.long.byte 0x14 6.--13. 1. "Bit_136,Register slice  going toward Scratchpad Memory"
bitfld.long 0x14 5. "Bit_55,Register slice  going toward default slave (p0)" "0,1"
bitfld.long 0x14 4. "Bit_44,Register slice  going toward system bus (IF1)" "0,1"
newline
bitfld.long 0x14 3. "Bit_33,Register slice  going toward system bus (IF0)" "0,1"
bitfld.long 0x14 2. "Bit_22,Register slice  going toward high speed domain bus (SPMC)" "0,1"
bitfld.long 0x14 1. "Bit_11,2nd register slice" "0,1"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
group.long 0x658++0x3
line.long 0x0 "MBCTRL010,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP Core ch1."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "Bit_1717,Indicate the IF number of system bus for write function" "0,1"
bitfld.long 0x0 16. "Bit_1616,Indicate the IF number of system bus for read function" "0,1"
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
group.long 0x6C4++0xB
line.long 0x0 "TTOC04,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP PSC/DTA."
bitfld.long 0x0 31. "Bit_3131,Eable of the timeout counter for write function" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time for write function"
bitfld.long 0x0 15. "Bit_1515,Eable of the timeout counter for read function" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time for read function"
line.long 0x4 "TOCAX04,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP PSC/DTA."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x8 "TOCRB04,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP PSC/DTA."
bitfld.long 0x8 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x8 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x6D0++0x17
line.long 0x0 "ACA04,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP PSC/DTA."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 27.--29. "Reserved_27,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 24.--26. "Bit_2624,EDC checker" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
newline
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
newline
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
newline
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "DERRINFO04,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP PSC/DTA."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "PCNT04,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP PSC/DTA."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 6.--15. 1. "Reserved_6,Reserved"
newline
hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Packet counter for AR-ch"
line.long 0xC "RTOIDAR04,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP PSC/DTA."
bitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0xC 8.--28. 1. "Bit_288,Bus information (arid)"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
line.long 0x10 "RTOIDAW04,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP PSC/DTA."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x10 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x14 "RSA040,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP PSC/DTA. It indicates the ordering error of register slice."
hexmask.long.tbyte 0x14 15.--31. 1. "Reserved_15,Reserved"
bitfld.long 0x14 14. "Bit_1414,Register slice  going toward default slave (p1)" "0,1"
hexmask.long.byte 0x14 6.--13. 1. "Bit_136,Register slice  going toward Scratchpad Memory"
bitfld.long 0x14 5. "Bit_55,Register slice  going toward default slave (p0)" "0,1"
bitfld.long 0x14 4. "Bit_44,Register slice  going toward system bus (IF1)" "0,1"
newline
bitfld.long 0x14 3. "Bit_33,Register slice  going toward system bus (IF0)" "0,1"
bitfld.long 0x14 2. "Bit_22,Register slice  going toward high speed domain bus (SPMC)" "0,1"
bitfld.long 0x14 1. "Bit_11,2nd register slice" "0,1"
bitfld.long 0x14 0. "Reserved_0,Reserved" "0,1"
group.long 0x6E8++0x3
line.long 0x0 "MBCTRL040,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP PSC/DTA."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "Bit_1717,Indicate the IF number of system bus for write function" "0,1"
bitfld.long 0x0 16. "Bit_1616,Indicate the IF number of system bus for read function" "0,1"
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
group.long 0x6F4++0xB
line.long 0x0 "TTOC05,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch0."
bitfld.long 0x0 31. "Bit_3131,Eable of the timeout counter for write function" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time for write function"
bitfld.long 0x0 15. "Bit_1515,Eable of the timeout counter for read function" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time for read function"
line.long 0x4 "TOCAX05,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch0."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x8 "TOCRB05,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch0."
bitfld.long 0x8 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x8 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x700++0x17
line.long 0x0 "ACA05,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch0."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 27.--29. "Reserved_27,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 24.--26. "Bit_2624,EDC checker" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
newline
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
newline
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination(Source) ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (R-ch)" "0,1"
bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
newline
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
newline
bitfld.long 0x0 1. "Bit_11,Timeout error for write function" "0,1"
bitfld.long 0x0 0. "Bit_00,Timeout error for read function" "0,1"
line.long 0x4 "DERRINFO05,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch0."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "PCNT05,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch0."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 6.--15. 1. "Reserved_6,Reserved"
newline
hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Packet counter for AR-ch"
line.long 0xC "RTOIDAR05,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch0."
bitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0xC 8.--28. 1. "Bit_288,Bus information (arid)"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
line.long 0x10 "RTOIDAW05,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch0."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x10 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x14 "RSA050,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch0. It indicates the ordering error of register slice."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14 15. "Bit_1515,Redundant register slice error (valid and ready signals)" "0,1"
bitfld.long 0x14 14. "Bit_1414,Register slice  going toward default slave (p1)" "0,1"
hexmask.long.byte 0x14 6.--13. 1. "Bit_136,Register slice  going toward Scratchpad Memory"
bitfld.long 0x14 5. "Bit_55,Register slice  going toward default slave (p0)" "0,1"
newline
bitfld.long 0x14 4. "Bit_44,Register slice  going toward system bus (IF1)" "0,1"
bitfld.long 0x14 3. "Bit_33,Register slice  going toward system bus (IF0)" "0,1"
bitfld.long 0x14 2. "Bit_22,Register slice  going toward high speed domain bus (SPMC)" "0,1"
bitfld.long 0x14 1. "Bit_11,2nd register slice" "0,1"
bitfld.long 0x14 0. "Bit_00,1st register slice (except for DPR related IP)" "0,1"
group.long 0x718++0x3
line.long 0x0 "MBCTRL050,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch0."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "Bit_1717,Indicate the IF number of system bus for write function" "0,1"
bitfld.long 0x0 16. "Bit_1616,Indicate the IF number of system bus for read function" "0,1"
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
group.long 0x724++0xB
line.long 0x0 "TTOC06,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch1."
bitfld.long 0x0 31. "Bit_3131,Eable of the timeout counter for write function" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time for write function"
bitfld.long 0x0 15. "Bit_1515,Eable of the timeout counter for read function" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time for read function"
line.long 0x4 "TOCAX06,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch1."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x8 "TOCRB06,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch1."
bitfld.long 0x8 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x8 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x730++0x17
line.long 0x0 "ACA06,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch1."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 27.--29. "Reserved_27,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 24.--26. "Bit_2624,EDC checker" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
newline
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
newline
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination(Source) ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (R-ch)" "0,1"
bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
newline
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
newline
bitfld.long 0x0 1. "Bit_11,Timeout error for write function" "0,1"
bitfld.long 0x0 0. "Bit_00,Timeout error for read function" "0,1"
line.long 0x4 "DERRINFO06,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch1."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "PCNT06,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch1."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 6.--15. 1. "Reserved_6,Reserved"
newline
hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Packet counter for AR-ch"
line.long 0xC "RTOIDAR06,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch1."
bitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0xC 8.--28. 1. "Bit_288,Bus information (arid)"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
line.long 0x10 "RTOIDAW06,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch1."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x10 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x14 "RSA060,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch1. It indicates the ordering error of register slice."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14 15. "Bit_1515,Redundant register slice error (valid and ready signals)" "0,1"
bitfld.long 0x14 14. "Bit_1414,Register slice  going toward default slave (p1)" "0,1"
hexmask.long.byte 0x14 6.--13. 1. "Bit_136,Register slice  going toward Scratchpad Memory"
bitfld.long 0x14 5. "Bit_55,Register slice  going toward default slave (p0)" "0,1"
newline
bitfld.long 0x14 4. "Bit_44,Register slice  going toward system bus (IF1)" "0,1"
bitfld.long 0x14 3. "Bit_33,Register slice  going toward system bus (IF0)" "0,1"
bitfld.long 0x14 2. "Bit_22,Register slice  going toward high speed domain bus (SPMC)" "0,1"
bitfld.long 0x14 1. "Bit_11,2nd register slice" "0,1"
bitfld.long 0x14 0. "Bit_00,1st register slice (except for DPR related IP)" "0,1"
group.long 0x748++0x3
line.long 0x0 "MBCTRL060,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for IMP DMAC ch1."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "Bit_1717,Indicate the IF number of system bus for write function" "0,1"
bitfld.long 0x0 16. "Bit_1616,Indicate the IF number of system bus for read function" "0,1"
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
group.long 0x754++0xB
line.long 0x0 "TTOC07,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for CVe cluster0."
bitfld.long 0x0 31. "Bit_3131,Eable of the timeout counter for write function" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time for write function"
bitfld.long 0x0 15. "Bit_1515,Eable of the timeout counter for read function" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time for read function"
line.long 0x4 "TOCAX07,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for CVe cluster0."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x8 "TOCRB07,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for CVe cluster0."
bitfld.long 0x8 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x8 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x760++0x17
line.long 0x0 "ACA07,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for CVe cluster0."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 27.--29. "Reserved_27,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 24.--26. "Bit_2624,EDC checker" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
newline
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
newline
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination(Source) ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (R-ch)" "0,1"
bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
newline
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
newline
bitfld.long 0x0 1. "Bit_11,Timeout error for write function" "0,1"
bitfld.long 0x0 0. "Bit_00,Timeout error for read function" "0,1"
line.long 0x4 "DERRINFO07,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for CVe cluster0."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "PCNT07,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for CVe cluster0."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 6.--15. 1. "Reserved_6,Reserved"
newline
hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Packet counter for AR-ch"
line.long 0xC "RTOIDAR07,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for CVe cluster0."
bitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0xC 8.--28. 1. "Bit_288,Bus information (arid)"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
line.long 0x10 "RTOIDAW07,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for CVe cluster0."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x10 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x14 "RSA070,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for CVe cluster0. It indicates the ordering error of register slice."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14 15. "Bit_1515,Redundant register slice error (valid and ready signals)" "0,1"
bitfld.long 0x14 14. "Bit_1414,Register slice  going toward default slave (p1)" "0,1"
hexmask.long.byte 0x14 6.--13. 1. "Bit_136,Register slice  going toward Scratchpad Memory"
bitfld.long 0x14 5. "Bit_55,Register slice  going toward default slave (p0)" "0,1"
newline
bitfld.long 0x14 4. "Bit_44,Register slice  going toward system bus (IF1)" "0,1"
bitfld.long 0x14 3. "Bit_33,Register slice  going toward system bus (IF0)" "0,1"
bitfld.long 0x14 2. "Bit_22,Register slice  going toward high speed domain bus (SPMC)" "0,1"
bitfld.long 0x14 1. "Bit_11,2nd register slice" "0,1"
bitfld.long 0x14 0. "Bit_00,1st register slice (except for DPR related IP)" "0,1"
group.long 0x778++0x3
line.long 0x0 "MBCTRL070,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for CVe cluster0."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "Bit_1717,Indicate the IF number of system bus for write function" "0,1"
bitfld.long 0x0 16. "Bit_1616,Indicate the IF number of system bus for read function" "0,1"
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
group.long 0x784++0xB
line.long 0x0 "TTOC08,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster0."
bitfld.long 0x0 31. "Bit_3131,Eable of the timeout counter for write function" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time for write function"
bitfld.long 0x0 15. "Bit_1515,Eable of the timeout counter for read function" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time for read function"
line.long 0x4 "TOCAX08,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster0."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x8 "TOCRB08,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster0."
bitfld.long 0x8 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x8 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x790++0x17
line.long 0x0 "ACA08,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster0."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 27.--29. "Reserved_27,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 24.--26. "Bit_2624,EDC checker" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
newline
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
newline
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination(Source) ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (R-ch)" "0,1"
bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
newline
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
newline
bitfld.long 0x0 1. "Bit_11,Timeout error for write function" "0,1"
bitfld.long 0x0 0. "Bit_00,Timeout error for read function" "0,1"
line.long 0x4 "DERRINFO08,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster0."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "PCNT08,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster0."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 6.--15. 1. "Reserved_6,Reserved"
newline
hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Packet counter for AR-ch"
line.long 0xC "RTOIDAR08,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster0."
bitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0xC 8.--28. 1. "Bit_288,Bus information (arid)"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
line.long 0x10 "RTOIDAW08,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster0."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x10 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x14 "RSA080,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster0. It indicates the ordering error of register slice."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14 15. "Bit_1515,Redundant register slice error (valid and ready signals)" "0,1"
bitfld.long 0x14 14. "Bit_1414,Register slice  going toward default slave (p1)" "0,1"
hexmask.long.byte 0x14 6.--13. 1. "Bit_136,Register slice  going toward Scratchpad Memory"
bitfld.long 0x14 5. "Bit_55,Register slice  going toward default slave (p0)" "0,1"
newline
bitfld.long 0x14 4. "Bit_44,Register slice  going toward system bus (IF1)" "0,1"
bitfld.long 0x14 3. "Bit_33,Register slice  going toward system bus (IF0)" "0,1"
bitfld.long 0x14 2. "Bit_22,Register slice  going toward high speed domain bus (SPMC)" "0,1"
bitfld.long 0x14 1. "Bit_11,2nd register slice" "0,1"
bitfld.long 0x14 0. "Bit_00,1st register slice (except for DPR related IP)" "0,1"
group.long 0x7A8++0x3
line.long 0x0 "MBCTRL080,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster0."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "Bit_1717,Indicate the IF number of system bus for write function" "0,1"
bitfld.long 0x0 16. "Bit_1616,Indicate the IF number of system bus for read function" "0,1"
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
group.long 0x7B4++0xB
line.long 0x0 "TTOC09,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster1."
bitfld.long 0x0 31. "Bit_3131,Eable of the timeout counter for write function" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time for write function"
bitfld.long 0x0 15. "Bit_1515,Eable of the timeout counter for read function" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time for read function"
line.long 0x4 "TOCAX09,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster1."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x8 "TOCRB09,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster1."
bitfld.long 0x8 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x8 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x7C0++0x17
line.long 0x0 "ACA09,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster1."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 27.--29. "Reserved_27,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 24.--26. "Bit_2624,EDC checker" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
newline
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
newline
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination(Source) ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (R-ch)" "0,1"
bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
newline
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
newline
bitfld.long 0x0 1. "Bit_11,Timeout error for write function" "0,1"
bitfld.long 0x0 0. "Bit_00,Timeout error for read function" "0,1"
line.long 0x4 "DERRINFO09,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster1."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "PCNT09,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster1."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 6.--15. 1. "Reserved_6,Reserved"
newline
hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Packet counter for AR-ch"
line.long 0xC "RTOIDAR09,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster1."
bitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0xC 8.--28. 1. "Bit_288,Bus information (arid)"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
line.long 0x10 "RTOIDAW09,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster1."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x10 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x14 "RSA090,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster1. It indicates the ordering error of register slice."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14 15. "Bit_1515,Redundant register slice error (valid and ready signals)" "0,1"
bitfld.long 0x14 14. "Bit_1414,Register slice  going toward default slave (p1)" "0,1"
hexmask.long.byte 0x14 6.--13. 1. "Bit_136,Register slice  going toward Scratchpad Memory"
bitfld.long 0x14 5. "Bit_55,Register slice  going toward default slave (p0)" "0,1"
newline
bitfld.long 0x14 4. "Bit_44,Register slice  going toward system bus (IF1)" "0,1"
bitfld.long 0x14 3. "Bit_33,Register slice  going toward system bus (IF0)" "0,1"
bitfld.long 0x14 2. "Bit_22,Register slice  going toward high speed domain bus (SPMC)" "0,1"
bitfld.long 0x14 1. "Bit_11,2nd register slice" "0,1"
bitfld.long 0x14 0. "Bit_00,1st register slice (except for DPR related IP)" "0,1"
group.long 0x7D8++0x3
line.long 0x0 "MBCTRL090,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster1."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "Bit_1717,Indicate the IF number of system bus for write function" "0,1"
bitfld.long 0x0 16. "Bit_1616,Indicate the IF number of system bus for read function" "0,1"
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
group.long 0x7E4++0xB
line.long 0x0 "TTOC10,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster2."
bitfld.long 0x0 31. "Bit_3131,Eable of the timeout counter for write function" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time for write function"
bitfld.long 0x0 15. "Bit_1515,Eable of the timeout counter for read function" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time for read function"
line.long 0x4 "TOCAX10,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster2."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x8 "TOCRB10,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster2."
bitfld.long 0x8 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x8 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x8 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x7F0++0x17
line.long 0x0 "ACA10,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster2."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 27.--29. "Reserved_27,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 24.--26. "Bit_2624,EDC checker" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
newline
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
newline
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination(Source) ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (R-ch)" "0,1"
bitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
newline
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
newline
bitfld.long 0x0 1. "Bit_11,Timeout error for write function" "0,1"
bitfld.long 0x0 0. "Bit_00,Timeout error for read function" "0,1"
line.long 0x4 "DERRINFO10,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster2."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "PCNT10,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster2."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 6.--15. 1. "Reserved_6,Reserved"
newline
hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Packet counter for AR-ch"
line.long 0xC "RTOIDAR10,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster2."
bitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0xC 8.--28. 1. "Bit_288,Bus information (arid)"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
line.long 0x10 "RTOIDAW10,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster2."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x10 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x14 "RSA100,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster2. It indicates the ordering error of register slice."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14 15. "Bit_1515,Redundant register slice error (valid and ready signals)" "0,1"
bitfld.long 0x14 14. "Bit_1414,Register slice  going toward default slave (p1)" "0,1"
hexmask.long.byte 0x14 6.--13. 1. "Bit_136,Register slice  going toward Scratchpad Memory"
bitfld.long 0x14 5. "Bit_55,Register slice  going toward default slave (p0)" "0,1"
newline
bitfld.long 0x14 4. "Bit_44,Register slice  going toward system bus (IF1)" "0,1"
bitfld.long 0x14 3. "Bit_33,Register slice  going toward system bus (IF0)" "0,1"
bitfld.long 0x14 2. "Bit_22,Register slice  going toward high speed domain bus (SPMC)" "0,1"
bitfld.long 0x14 1. "Bit_11,2nd register slice" "0,1"
bitfld.long 0x14 0. "Bit_00,1st register slice (except for DPR related IP)" "0,1"
group.long 0x808++0x3
line.long 0x0 "MBCTRL100,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for light CVe cluster2."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "Bit_1717,Indicate the IF number of system bus for write function" "0,1"
bitfld.long 0x0 16. "Bit_1616,Indicate the IF number of system bus for read function" "0,1"
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
group.long 0x818++0x7
line.long 0x0 "TOCAX11,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for AXI slave bus."
bitfld.long 0x0 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x0 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x4 "TOCRB11,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for AXI slave bus."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x820++0x17
line.long 0x0 "ACA11,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for AXI slave bus."
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
newline
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
newline
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
newline
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "DERRINFO11,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for AXI slave bus."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "PCNT11,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for AXI slave bus."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 6.--15. 1. "Reserved_6,Reserved"
newline
hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Packet counter for AR-ch"
line.long 0xC "RTOIDAR11,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for AXI slave bus."
bitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0xC 8.--28. 1. "Bit_288,Bus information (arid)"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
line.long 0x10 "RTOIDAW11,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for AXI slave bus."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x10 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x14 "RSA110,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for AXI slave bus. It indicates the ordering error of register slice."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14 15. "Bit_1515,Redundant register slice error (valid and ready signals)" "0,1"
bitfld.long 0x14 14. "Bit_1414,Register slice  going toward default slave (p1)" "0,1"
hexmask.long.byte 0x14 6.--13. 1. "Bit_136,Register slice  going toward Scratchpad Memory"
bitfld.long 0x14 5. "Bit_55,Register slice  going toward default slave (p0)" "0,1"
newline
bitfld.long 0x14 4. "Bit_44,Register slice  going toward system bus (IF1)" "0,1"
bitfld.long 0x14 3. "Bit_33,Register slice  going toward system bus (IF0)" "0,1"
bitfld.long 0x14 2. "Bit_22,Register slice  going toward high speed domain bus (SPMC)" "0,1"
bitfld.long 0x14 1. "Bit_11,2nd register slice" "0,1"
bitfld.long 0x14 0. "Bit_00,1st register slice (except for DPR related IP)" "0,1"
group.long 0x848++0x7
line.long 0x0 "TOCAX12,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for high speed domain bus0 (SPMC)."
bitfld.long 0x0 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x0 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x4 "TOCRB12,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for high speed domain bus0 (SPMC)."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x850++0x17
line.long 0x0 "ACA12,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for high speed domain bus0 (SPMC)."
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
newline
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
newline
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
newline
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "DERRINFO12,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for high speed domain bus0 (SPMC)."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
newline
hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "PCNT12,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for high speed domain bus0 (SPMC)."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 6.--15. 1. "Reserved_6,Reserved"
newline
hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Packet counter for AR-ch"
line.long 0xC "RTOIDAR12,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for high speed domain bus0 (SPMC)."
bitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0xC 8.--28. 1. "Bit_288,Bus information (arid)"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
line.long 0x10 "RTOIDAW12,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for high speed domain bus0 (SPMC)."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x10 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x14 "RSA120,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for high speed domain bus0 (SPMC). It indicates the ordering error of register slice."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14 15. "Bit_1515,Redundant register slice error (valid and ready signals)" "0,1"
bitfld.long 0x14 14. "Bit_1414,Register slice  going toward default slave (p1)" "0,1"
hexmask.long.byte 0x14 6.--13. 1. "Bit_136,Register slice  going toward Scratchpad Memory"
bitfld.long 0x14 5. "Bit_55,Register slice  going toward default slave (p0)" "0,1"
newline
bitfld.long 0x14 4. "Bit_44,Register slice  going toward system bus (IF1)" "0,1"
bitfld.long 0x14 3. "Bit_33,Register slice  going toward system bus (IF0)" "0,1"
bitfld.long 0x14 2. "Bit_22,Register slice  going toward high speed domain bus (SPMC)" "0,1"
bitfld.long 0x14 1. "Bit_11,2nd register slice" "0,1"
bitfld.long 0x14 0. "Bit_00,1st register slice (except for DPR related IP)" "0,1"
group.long 0x868++0x3
line.long 0x0 "MBCTRL120,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for high speed domain bus0 (SPMC)."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "Bit_1717,Enable fixed IF mode for write function" "0,1"
bitfld.long 0x0 16. "Bit_1616,Enable fixed IF mode for read function" "0,1"
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
rgroup.long 0x870++0x3
line.long 0x0 "ACA0PRE,This register is for the route regarding IMP PSC (Read IF)."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
hexmask.long.byte 0x0 14.--19. 1. "Reserved_14,Reserved"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
newline
bitfld.long 0x0 11. "Bit_1111,Destination(Source) ID check error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID check error (R-ch)" "0,1"
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--6. 1. "Bit_60,AXI master bus timer error"
rgroup.long 0x878++0x3
line.long 0x0 "RTOIDAR0PRE,This register is for the route IMP PSC (Read IF)."
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x0 8.--28. 1. "Bit_288,Bus information (arid)"
hexmask.long.byte 0x0 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
rgroup.long 0x880++0x7
line.long 0x0 "ACA1PRE,This register is for the route IMP PSC (Write IF 0)."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "Bit_2020,Ordering error of register slice" "0,1"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (AW/W-ch ID check (not implemented))" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
newline
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
hexmask.long.byte 0x0 12.--15. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,Destination(Source) ID check error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID check error (R-ch)" "0,1"
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--6. 1. "Bit_60,AXI master bus timer error"
line.long 0x4 "PCNT1PRE,This register is for the route IMP PSC (Write IF 0)."
bitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x4 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x4 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
rgroup.long 0x88C++0xB
line.long 0x0 "RTOIDAW1PRE,This register is for the route IMP PSC (Write IF 0)."
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x0 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x0 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x4 "ACA2PRE,This register is for the route IMP PSC (Write IF 1)."
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "Bit_2020,Ordering error of register slice" "0,1"
bitfld.long 0x4 19. "Bit_1919,Protocol check error for write transaction (AW/W-ch ID check (not implemented))" "0,1"
bitfld.long 0x4 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x4 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
newline
bitfld.long 0x4 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
bitfld.long 0x4 11. "Bit_1111,Destination(Source) ID check error" "0,1"
bitfld.long 0x4 10. "Bit_1010,Busrt ID check error (R-ch)" "0,1"
bitfld.long 0x4 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 0.--6. 1. "Bit_60,AXI master bus timer error"
line.long 0x8 "PCNT2PRE,This register is for the route IMP PSC (Write IF 1)."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
rgroup.long 0x89C++0xB
line.long 0x0 "RTOIDAW2PRE,This register is for the route IMP PSC (Write IF 1)."
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x0 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x0 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x4 "ACA3PRE,This register is for the route IMP PSC (Write IF 2)."
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "Bit_2020,Ordering error of register slice" "0,1"
bitfld.long 0x4 19. "Bit_1919,Protocol check error for write transaction (AW/W-ch ID check (not implemented))" "0,1"
bitfld.long 0x4 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x4 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
newline
bitfld.long 0x4 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
bitfld.long 0x4 11. "Bit_1111,Destination(Source) ID check error" "0,1"
bitfld.long 0x4 10. "Bit_1010,Busrt ID check error (R-ch)" "0,1"
bitfld.long 0x4 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 0.--6. 1. "Bit_60,AXI master bus timer error"
line.long 0x8 "PCNT3PRE,This register is for the route regarding IMP PSC (Write IF 2)."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
rgroup.long 0x8AC++0xB
line.long 0x0 "RTOIDAW3PRE,This register is for the route regarding IMP PSC (Write IF 2)."
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x0 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x0 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x4 "ACA4PRE,This register is for the route regarding IMP PSC (Write IF 3)."
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "Bit_2020,Ordering error of register slice" "0,1"
bitfld.long 0x4 19. "Bit_1919,Protocol check error for write transaction (AW/W-ch ID check (not implemented))" "0,1"
bitfld.long 0x4 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x4 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
newline
bitfld.long 0x4 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
bitfld.long 0x4 11. "Bit_1111,Destination(Source) ID check error" "0,1"
bitfld.long 0x4 10. "Bit_1010,Busrt ID check error (R-ch)" "0,1"
bitfld.long 0x4 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 0.--6. 1. "Bit_60,AXI master bus timer error"
line.long 0x8 "PCNT4PRE,This register is for the route regarding IMP PSC (Write IF 3)."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
rgroup.long 0x8BC++0xB
line.long 0x0 "RTOIDAW4PRE,This register is for the route regarding IMP PSC (Write IF 3)."
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x0 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x0 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x4 "ACA5PRE,This register is for the route regarding IMP DTA."
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "Bit_2020,Ordering error of register slice" "0,1"
bitfld.long 0x4 19. "Bit_1919,Protocol check error for write transaction (AW/W-ch ID check (not implemented))" "0,1"
bitfld.long 0x4 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x4 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
newline
bitfld.long 0x4 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
bitfld.long 0x4 11. "Bit_1111,Destination(Source) ID check error" "0,1"
bitfld.long 0x4 10. "Bit_1010,Busrt ID check error (R-ch)" "0,1"
bitfld.long 0x4 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 0.--6. 1. "Bit_60,AXI master bus timer error"
line.long 0x8 "PCNT5PRE,This register is for the route regarding IMP DTA."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
rgroup.long 0x8CC++0x3
line.long 0x0 "RTOIDAW5PRE,This register is for the route regarding IMP DTA."
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x0 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x0 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
group.long 0x8F0++0x7
line.long 0x0 "ACACLRPR,This register has the function to clear the bus errors. Each bit field corresponds to each pre-process part on the own AXI master bus domain."
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x0 0.--13. 1. "Bit_130,Access alert clear (bit position is corresponding to bus master number)"
line.long 0x4 "ACACLRPT,This register has the function to clear the bus errors. Each bit field corresponds to each post-process part on the own AXI master bus domain."
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x4 0.--13. 1. "Bit_130,Access alert clear (bit position is corresponding to bus master number)"
group.long 0x908++0x7
line.long 0x0 "TOCAXPRT00,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank0."
bitfld.long 0x0 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x0 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x4 "TOCRBPRT00,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank0."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x910++0x3
line.long 0x0 "ACAPRT00,This register is related to the own AXI master bus. It indicates any errors which are detected on the dedicated part regarding the own Scratchpad Memory bank0."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.byte 0x0 20.--24. 1. "Bit_2420,Ordering error of register slice"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
newline
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
newline
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
newline
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0x928++0x7
line.long 0x0 "TOCAXPRT01,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank1."
bitfld.long 0x0 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x0 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x4 "TOCRBPRT01,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank1."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x930++0x3
line.long 0x0 "ACAPRT01,This register is related to the own AXI master bus. It indicates any errors which are detected on the dedicated part regarding the own Scratchpad Memory bank1."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.byte 0x0 20.--24. 1. "Bit_2420,Ordering error of register slice"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
newline
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
newline
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
newline
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0x948++0x7
line.long 0x0 "TOCAXPRT02,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank2."
bitfld.long 0x0 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x0 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x4 "TOCRBPRT02,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank2."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x950++0x3
line.long 0x0 "ACAPRT02,This register is related to the own AXI master bus. It indicates any errors which are detected on the dedicated part regarding the own Scratchpad Memory bank2."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.byte 0x0 20.--24. 1. "Bit_2420,Ordering error of register slice"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
newline
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
newline
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
newline
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0x968++0x7
line.long 0x0 "TOCAXPRT03,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank3."
bitfld.long 0x0 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x0 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x4 "TOCRBPRT03,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank3."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x970++0x3
line.long 0x0 "ACAPRT03,This register is related to the own AXI master bus. It indicates any errors which are detected on the dedicated part regarding the own Scratchpad Memory bank3."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.byte 0x0 20.--24. 1. "Bit_2420,Ordering error of register slice"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
newline
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
newline
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
newline
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0x988++0x7
line.long 0x0 "TOCAXPRT04,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank4."
bitfld.long 0x0 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x0 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x4 "TOCRBPRT04,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank4."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x990++0x3
line.long 0x0 "ACAPRT04,This register is related to the own AXI master bus. It indicates any errors which are detected on the dedicated part regarding the own Scratchpad Memory bank4."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.byte 0x0 20.--24. 1. "Bit_2420,Ordering error of register slice"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
newline
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
newline
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
newline
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0x9A8++0x7
line.long 0x0 "TOCAXPRT05,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank5."
bitfld.long 0x0 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x0 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x4 "TOCRBPRT05,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank5."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x9B0++0x3
line.long 0x0 "ACAPRT05,This register is related to the own AXI master bus. It indicates any errors which are detected on the dedicated part regarding the own Scratchpad Memory bank5."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.byte 0x0 20.--24. 1. "Bit_2420,Ordering error of register slice"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
newline
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
newline
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
newline
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0x9C8++0x7
line.long 0x0 "TOCAXPRT06,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank6."
bitfld.long 0x0 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x0 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x4 "TOCRBPRT06,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank6."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x9D0++0x3
line.long 0x0 "ACAPRT06,This register is related to the own AXI master bus. It indicates any errors which are detected on the dedicated part regarding the own Scratchpad Memory bank6."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.byte 0x0 20.--24. 1. "Bit_2420,Ordering error of register slice"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
newline
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
newline
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
newline
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0x9E8++0x7
line.long 0x0 "TOCAXPRT07,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank7."
bitfld.long 0x0 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x0 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x4 "TOCRBPRT07,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward the own Scratchpad Memory bank7."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x9F0++0x3
line.long 0x0 "ACAPRT07,This register is related to the own AXI master bus. It indicates any errors which are detected on the dedicated part regarding the own Scratchpad Memory bank7."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.byte 0x0 20.--24. 1. "Bit_2420,Ordering error of register slice"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
newline
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
newline
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
newline
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0xA08++0x7
line.long 0x0 "TOCAXPRT08,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward high speed domain bus (SPMC)."
bitfld.long 0x0 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x0 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x4 "TOCRBPRT08,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward high speed domain bus (SPMC)."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0xA10++0x3
line.long 0x0 "ACAPRT08,This register is related to the own AXI master bus. It indicates any errors which are detected on the dedicated part regarding high speed domain bus (SPMC)."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
hexmask.long.byte 0x0 20.--24. 1. "Bit_2420,Ordering error of register slice"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
newline
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
newline
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
newline
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0xA20++0x3
line.long 0x0 "MOSNPRT09,This register is related to the own AXI master bus. It has the control function of the number of the outstanding transaction which are going toward system bus (IF0)."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
hexmask.long.word 0x0 22.--30. 1. "Reserved_22,Reserved"
hexmask.long.byte 0x0 16.--21. 1. "Bit_2116,Outstanding number for write function. (Default : unlimited mode)"
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
hexmask.long.word 0x0 6.--14. 1. "Reserved_6,Reserved"
newline
hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved"
group.long 0xA28++0x7
line.long 0x0 "TOCAXPRT09,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward system bus (IF0)."
bitfld.long 0x0 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x0 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x4 "TOCRBPRT09,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward system bus (IF0)."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0xA30++0x3
line.long 0x0 "ACAPRT09,This register is related to the own AXI master bus. It indicates any errors which are detected on the dedicated part regarding system bus (IF0)."
bitfld.long 0x0 31. "Bit_3131,ID conversion error" "0,1"
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 20.--23. 1. "Bit_2320,Ordering error of register slice"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
newline
bitfld.long 0x0 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
newline
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
newline
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
group.long 0xA48++0x7
line.long 0x0 "TOCAXPRT10,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward system bus (IF1)."
bitfld.long 0x0 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x0 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x4 "TOCRBPRT10,This register is related to the own AXI master bus. It has the setting of the timeout function. It is related to the transaction going toward system bus (IF1)."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0xA50++0x3
line.long 0x0 "ACAPRT10,This register is related to the own AXI master bus. It indicates any errors which are detected on the dedicated part regarding system bus (IF1)."
bitfld.long 0x0 31. "Bit_3131,ID conversion error" "0,1"
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x0 20.--23. 1. "Bit_2320,Ordering error of register slice"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
newline
bitfld.long 0x0 17. "Bit_1717,Protocol check error for write transaction (length of write packet)" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
newline
bitfld.long 0x0 11. "Bit_1111,Destination ID error" "0,1"
bitfld.long 0x0 10. "Bit_1010,Busrt ID error (W-ch)" "0,1"
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
newline
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
rgroup.long 0xAF0++0x3
line.long 0x0 "ACAGAXI,This register is related to the own AXI master bus. It indicates EDC errors detected at the connection between IMP-SS and system AXI bus."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
bitfld.long 0x0 27. "Bit_2727,EDC error for ID table (B-ch  response side) / IF1" "0,1"
bitfld.long 0x0 26. "Bit_2626,EDC error for ID table (R-ch  response side) / IF1" "0,1"
bitfld.long 0x0 25. "Bit_2525,EDC error for ID table (AW-ch  request side) / IF1" "0,1"
bitfld.long 0x0 24. "Bit_2424,EDC error for ID table (AR-ch  request side) / IF1" "0,1"
newline
bitfld.long 0x0 22.--23. "Reserved_22,Reserved" "0,1,2,3"
bitfld.long 0x0 21. "Bit_2121,EDC error for B-ch / IF1" "0,1"
bitfld.long 0x0 20. "Bit_2020,EDC error for R-ch (data) / IF1" "0,1"
bitfld.long 0x0 19. "Bit_1919,EDC error for R-ch (command) / IF1" "0,1"
bitfld.long 0x0 18. "Bit_1818,EDC error for W-ch / IF1" "0,1"
newline
bitfld.long 0x0 17. "Bit_1717,EDC error for AW-ch / IF1" "0,1"
bitfld.long 0x0 16. "Bit_1616,EDC error for AR-ch / IF1" "0,1"
hexmask.long.byte 0x0 12.--15. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "Bit_1111,EDC error for ID table (B-ch  response side) / IF0" "0,1"
bitfld.long 0x0 10. "Bit_1010,EDC error for ID table (R-ch  response side) / IF0" "0,1"
newline
bitfld.long 0x0 9. "Bit_99,EDC error for ID table (AW-ch  request side) / IF0" "0,1"
bitfld.long 0x0 8. "Bit_88,EDC error for ID table (AR-ch  request side) / IF0" "0,1"
bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
bitfld.long 0x0 5. "Bit_55,EDC error for B-ch / IF0" "0,1"
bitfld.long 0x0 4. "Bit_44,EDC error for R-ch (data) / IF0" "0,1"
newline
bitfld.long 0x0 3. "Bit_33,EDC error for R-ch (command) / IF0" "0,1"
bitfld.long 0x0 2. "Bit_22,EDC error for W-ch / IF0" "0,1"
bitfld.long 0x0 1. "Bit_11,EDC error for AW-ch / IF0" "0,1"
bitfld.long 0x0 0. "Bit_00,EDC error for AR-ch / IF0" "0,1"
group.long 0xB00++0x3
line.long 0x0 "TIMESCALE,This register has the function regrding the functional safety. It is the settings of timeout counters."
bitfld.long 0x0 31. "Bit_3131,System timer enable" "0,1"
hexmask.long 0x0 4.--30. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,System timer scale"
group.long 0xD00++0x3
line.long 0x0 "IP0ERRCTRL,This register is related to the functional safety. it is correspondig to IMP Core ch0."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Bit_3030,Disable for EDC error output" "0,1"
hexmask.long.tbyte 0x0 12.--29. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,Threshold number of EDC error for SRAM"
newline
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,Threshold number of EDC error for the bus access"
rgroup.long 0xD04++0x3
line.long 0x0 "IP0ERRSTS,This register is related to the functional safety. it is correspondig to IMP Core ch0."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x0 24.--27. 1. "Bit_2724,The number of EDC error for SRAM"
hexmask.long.byte 0x0 20.--23. 1. "Bit_2320,The number of EDC error for AXI slave bus W-ch"
hexmask.long.byte 0x0 16.--19. 1. "Bit_1916,The number of EDC error for AXI slave bus AW-ch"
hexmask.long.byte 0x0 12.--15. 1. "Bit_1512,The number of EDC error for AXI slave bus AR-ch"
newline
hexmask.long.byte 0x0 8.--11. 1. "Bit_118,The number of EDC error for AXI master bus B-ch"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,The number of EDC error for AXI master bus R-ch (data)"
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,The number of EDC error for AXI master bus R-ch (command)"
group.long 0xD10++0x3
line.long 0x0 "IP1ERRCTRL,This register is related to the functional safety. it is correspondig to IMP Core ch1."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Bit_3030,Disable for EDC error output" "0,1"
hexmask.long.tbyte 0x0 12.--29. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,Threshold number of EDC error for SRAM"
newline
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,Threshold number of EDC error for the bus access"
rgroup.long 0xD14++0x3
line.long 0x0 "IP1ERRSTS,This register is related to the functional safety. it is correspondig to IMP Core ch1."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x0 24.--27. 1. "Bit_2724,The number of EDC error for SRAM"
hexmask.long.byte 0x0 20.--23. 1. "Bit_2320,The number of EDC error for AXI slave bus W-ch"
hexmask.long.byte 0x0 16.--19. 1. "Bit_1916,The number of EDC error for AXI slave bus AW-ch"
hexmask.long.byte 0x0 12.--15. 1. "Bit_1512,The number of EDC error for AXI slave bus AR-ch"
newline
hexmask.long.byte 0x0 8.--11. 1. "Bit_118,The number of EDC error for AXI master bus B-ch"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,The number of EDC error for AXI master bus R-ch (data)"
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,The number of EDC error for AXI master bus R-ch (command)"
group.long 0xD40++0x3
line.long 0x0 "IP4ERRCTRL,This register is related to the functional safety. it is correspondig to IMP PSC."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Bit_3030,Disable for EDC error output" "0,1"
hexmask.long.tbyte 0x0 12.--29. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,Threshold number of EDC error for SRAM"
newline
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,Threshold number of EDC error for the bus access"
rgroup.long 0xD44++0x3
line.long 0x0 "IP4ERRSTS,This register is related to the functional safety. it is correspondig to IMP PSC."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x0 24.--27. 1. "Bit_2724,The number of EDC error for SRAM"
hexmask.long.byte 0x0 20.--23. 1. "Bit_2320,The number of EDC error for AXI slave bus W-ch"
hexmask.long.byte 0x0 16.--19. 1. "Bit_1916,The number of EDC error for AXI slave bus AW-ch"
hexmask.long.byte 0x0 12.--15. 1. "Bit_1512,The number of EDC error for AXI slave bus AR-ch"
newline
hexmask.long.byte 0x0 8.--11. 1. "Bit_118,The number of EDC error for AXI master bus B-ch"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,The number of EDC error for AXI master bus R-ch (data)"
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,The number of EDC error for AXI master bus R-ch (command)"
group.long 0xD50++0x3
line.long 0x0 "IP5ERRCTRL,This register is related to the functional safety. it is correspondig to IMP DMAC ch0."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Bit_3030,Disable for EDC error output" "0,1"
hexmask.long.tbyte 0x0 12.--29. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,Threshold number of EDC error for SRAM"
newline
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,Threshold number of EDC error for the bus access"
rgroup.long 0xD54++0x3
line.long 0x0 "IP5ERRSTS,This register is related to the functional safety. it is correspondig to IMP DMAC ch0."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x0 24.--27. 1. "Bit_2724,The number of EDC error for SRAM"
hexmask.long.byte 0x0 20.--23. 1. "Bit_2320,The number of EDC error for AXI slave bus W-ch"
hexmask.long.byte 0x0 16.--19. 1. "Bit_1916,The number of EDC error for AXI slave bus AW-ch"
hexmask.long.byte 0x0 12.--15. 1. "Bit_1512,The number of EDC error for AXI slave bus AR-ch"
newline
hexmask.long.byte 0x0 8.--11. 1. "Bit_118,The number of EDC error for AXI master bus B-ch"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,The number of EDC error for AXI master bus R-ch (data)"
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,The number of EDC error for AXI master bus R-ch (command)"
group.long 0xD60++0x3
line.long 0x0 "IP6ERRCTRL,This register is related to the functional safety. it is correspondig to IMP DMAC ch1."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Bit_3030,Disable for EDC error output" "0,1"
hexmask.long.tbyte 0x0 12.--29. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,Threshold number of EDC error for SRAM"
newline
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,Threshold number of EDC error for the bus access"
rgroup.long 0xD64++0x3
line.long 0x0 "IP6ERRSTS,This register is related to the functional safety. it is correspondig to IMP DMAC ch1."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x0 24.--27. 1. "Bit_2724,The number of EDC error for SRAM"
hexmask.long.byte 0x0 20.--23. 1. "Bit_2320,The number of EDC error for AXI slave bus W-ch"
hexmask.long.byte 0x0 16.--19. 1. "Bit_1916,The number of EDC error for AXI slave bus AW-ch"
hexmask.long.byte 0x0 12.--15. 1. "Bit_1512,The number of EDC error for AXI slave bus AR-ch"
newline
hexmask.long.byte 0x0 8.--11. 1. "Bit_118,The number of EDC error for AXI master bus B-ch"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,The number of EDC error for AXI master bus R-ch (data)"
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,The number of EDC error for AXI master bus R-ch (command)"
group.long 0xD70++0x3
line.long 0x0 "IP7ERRCTRL,This register is related to the functional safety. it is correspondig to CVe cluster0."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Bit_3030,Disable for EDC error output" "0,1"
hexmask.long.tbyte 0x0 12.--29. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,Threshold number of EDC error for SRAM"
newline
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,Threshold number of EDC error for the bus access"
rgroup.long 0xD74++0x3
line.long 0x0 "IP7ERRSTS,This register is related to the functional safety. it is correspondig to CVe cluster0."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x0 24.--27. 1. "Bit_2724,The number of EDC error for SRAM"
hexmask.long.byte 0x0 20.--23. 1. "Bit_2320,The number of EDC error for AXI slave bus W-ch"
hexmask.long.byte 0x0 16.--19. 1. "Bit_1916,The number of EDC error for AXI slave bus AW-ch"
hexmask.long.byte 0x0 12.--15. 1. "Bit_1512,The number of EDC error for AXI slave bus AR-ch"
newline
hexmask.long.byte 0x0 8.--11. 1. "Bit_118,The number of EDC error for AXI master bus B-ch"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,The number of EDC error for AXI master bus R-ch (data)"
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,The number of EDC error for AXI master bus R-ch (command)"
group.long 0xD80++0x3
line.long 0x0 "IP8ERRCTRL,This register is related to the functional safety. it is correspondig to light CVe cluster0."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Bit_3030,Disable for EDC error output" "0,1"
hexmask.long.tbyte 0x0 12.--29. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,Threshold number of EDC error for SRAM"
newline
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,Threshold number of EDC error for the bus access"
rgroup.long 0xD84++0x3
line.long 0x0 "IP8ERRSTS,This register is related to the functional safety. it is correspondig to light CVe cluster0."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x0 24.--27. 1. "Bit_2724,The number of EDC error for SRAM"
hexmask.long.byte 0x0 20.--23. 1. "Bit_2320,The number of EDC error for AXI slave bus W-ch"
hexmask.long.byte 0x0 16.--19. 1. "Bit_1916,The number of EDC error for AXI slave bus AW-ch"
hexmask.long.byte 0x0 12.--15. 1. "Bit_1512,The number of EDC error for AXI slave bus AR-ch"
newline
hexmask.long.byte 0x0 8.--11. 1. "Bit_118,The number of EDC error for AXI master bus B-ch"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,The number of EDC error for AXI master bus R-ch (data)"
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,The number of EDC error for AXI master bus R-ch (command)"
group.long 0xD90++0x3
line.long 0x0 "IP9ERRCTRL,This register is related to the functional safety. it is correspondig to light CVe cluster1."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Bit_3030,Disable for EDC error output" "0,1"
hexmask.long.tbyte 0x0 12.--29. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,Threshold number of EDC error for SRAM"
newline
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,Threshold number of EDC error for the bus access"
rgroup.long 0xD94++0x3
line.long 0x0 "IP9ERRSTS,This register is related to the functional safety. it is correspondig to light CVe cluster1."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x0 24.--27. 1. "Bit_2724,The number of EDC error for SRAM"
hexmask.long.byte 0x0 20.--23. 1. "Bit_2320,The number of EDC error for AXI slave bus W-ch"
hexmask.long.byte 0x0 16.--19. 1. "Bit_1916,The number of EDC error for AXI slave bus AW-ch"
hexmask.long.byte 0x0 12.--15. 1. "Bit_1512,The number of EDC error for AXI slave bus AR-ch"
newline
hexmask.long.byte 0x0 8.--11. 1. "Bit_118,The number of EDC error for AXI master bus B-ch"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,The number of EDC error for AXI master bus R-ch (data)"
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,The number of EDC error for AXI master bus R-ch (command)"
group.long 0xDA0++0x3
line.long 0x0 "IP10ERRCTRL,This register is related to the functional safety. it is correspondig to light CVe cluster2."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Bit_3030,Disable for EDC error output" "0,1"
hexmask.long.tbyte 0x0 12.--29. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,Threshold number of EDC error for SRAM"
newline
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,Threshold number of EDC error for the bus access"
rgroup.long 0xDA4++0x3
line.long 0x0 "IP10ERRSTS,This register is related to the functional safety. it is correspondig to light CVe cluster2."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x0 24.--27. 1. "Bit_2724,The number of EDC error for SRAM"
hexmask.long.byte 0x0 20.--23. 1. "Bit_2320,The number of EDC error for AXI slave bus W-ch"
hexmask.long.byte 0x0 16.--19. 1. "Bit_1916,The number of EDC error for AXI slave bus AW-ch"
hexmask.long.byte 0x0 12.--15. 1. "Bit_1512,The number of EDC error for AXI slave bus AR-ch"
newline
hexmask.long.byte 0x0 8.--11. 1. "Bit_118,The number of EDC error for AXI master bus B-ch"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,The number of EDC error for AXI master bus R-ch (data)"
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,The number of EDC error for AXI master bus R-ch (command)"
group.long 0xDB0++0x3
line.long 0x0 "IP11ERRCTRL,This register is related to the functional safety. it is correspondig to IMP DTA."
rbitfld.long 0x0 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x0 30. "Bit_3030,Disable for EDC error output" "0,1"
hexmask.long.tbyte 0x0 12.--29. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,Threshold number of EDC error for SRAM"
newline
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,Threshold number of EDC error for the bus access"
rgroup.long 0xDB4++0x3
line.long 0x0 "IP11ERRSTS,This register is related to the functional safety. it is correspondig to IMP DTA."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x0 24.--27. 1. "Bit_2724,The number of EDC error for SRAM"
hexmask.long.byte 0x0 20.--23. 1. "Bit_2320,The number of EDC error for AXI slave bus W-ch"
hexmask.long.byte 0x0 16.--19. 1. "Bit_1916,The number of EDC error for AXI slave bus AW-ch"
hexmask.long.byte 0x0 12.--15. 1. "Bit_1512,The number of EDC error for AXI slave bus AR-ch"
newline
hexmask.long.byte 0x0 8.--11. 1. "Bit_118,The number of EDC error for AXI master bus B-ch"
hexmask.long.byte 0x0 4.--7. 1. "Bit_74,The number of EDC error for AXI master bus R-ch (data)"
hexmask.long.byte 0x0 0.--3. 1. "Bit_30,The number of EDC error for AXI master bus R-ch (command)"
group.long 0xEA0++0x13
line.long 0x0 "ERRCTRL0,This register is related to the functional safety."
bitfld.long 0x0 31. "CLR,Clear EDC error" "0,1"
bitfld.long 0x0 30. "DISABLE,Disable for EDC error output" "0,1"
hexmask.long 0x0 4.--29. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "TH,Threshold number of EDC error for the own AXI slave/master bus"
line.long 0x4 "ERRCTRL1,This register is related to the functional safety."
bitfld.long 0x4 31. "Bit_3131,Error injection for the own AXI slave (post-process  going toward default slave)" "0,1"
bitfld.long 0x4 30. "Bit_3030,Error injection for the own AXI slave (post-process  going toward built-in register module)" "0,1"
hexmask.long.word 0x4 19.--29. 1. "Reserved_19,Reserved"
bitfld.long 0x4 16.--18. "Bit_1816,Error injection for build-in register module" "0,1,2,3,4,5,6,7"
rbitfld.long 0x4 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 12. "Bit_1212,Error injection for the own AXI slave (post-process  going toward IMP DTA)" "0,1"
bitfld.long 0x4 11. "Bit_1111,Error injection for the own AXI slave (post-process  going toward IMP PSC)" "0,1"
bitfld.long 0x4 10. "Bit_1010,Error injection for the own AXI slave (post-process  going toward IMP DMAC ch0)" "0,1"
bitfld.long 0x4 9. "Bit_99,Error injection for the own AXI slave (post-process  going toward high speed domain bus (SPMC))" "0,1"
bitfld.long 0x4 8. "Bit_88,Error injection for the own AXI slave (post-process  going toward light CVe cluster2)" "0,1"
newline
bitfld.long 0x4 7. "Bit_77,Error injection for the own AXI slave (post-process  going toward light CVe cluster1)" "0,1"
bitfld.long 0x4 6. "Bit_66,Error injection for the own AXI slave (post-process  going toward light CVe cluster0)" "0,1"
bitfld.long 0x4 5. "Bit_55,Error injection for the own AXI slave (post-process  going toward CVe cluster0)" "0,1"
rbitfld.long 0x4 3.--4. "Reserved_3,Reserved" "0,1,2,3"
bitfld.long 0x4 2. "Bit_22,Error injection for the own AXI slave (post-process  going toward IMP Core ch1)" "0,1"
newline
bitfld.long 0x4 1. "Bit_11,Error injection for the own AXI slave (post-process  going toward IMP Core ch0)" "0,1"
bitfld.long 0x4 0. "Bit_00,Error injection for the own AXI slave (pre-process)" "0,1"
line.long 0x8 "ERRCTRL2,This register is related to the functional safety."
rbitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Error injection for the own AXI master (pre-process  EDC checker  dedicated part of IMP PSC/DTA)"
hexmask.long.word 0x8 12.--23. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x8 6.--11. 1. "Bit_116,Error injection for the own AXI master (pre-process  EDC checker  dedicated part of IMP Core ch1)"
hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Error injection for the own AXI master (pre-process  EDC checker  dedicated part of IMP Core ch0)"
line.long 0xC "ERRCTRL3,This register is related to the functional safety."
rbitfld.long 0xC 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0xC 24.--29. 1. "Bit_2924,Error injection for the own AXI master (pre-process  EDC checker  dedicated part of light CVe cluster1)"
hexmask.long.byte 0xC 18.--23. 1. "Bit_2318,Error injection for the own AXI master (pre-process  EDC checker  dedicated part of light CVe cluster0)"
hexmask.long.byte 0xC 12.--17. 1. "Bit_1712,Error injection for the own AXI master (pre-process  EDC checker  dedicated part of CVe cluster0)"
hexmask.long.byte 0xC 6.--11. 1. "Bit_116,Error injection for the own AXI master (pre-process  EDC checker  dedicated part of IMP DMAC ch1)"
newline
hexmask.long.byte 0xC 0.--5. 1. "Bit_50,Error injection for the own AXI master (pre-process  EDC checker  dedicated part of IMP DMAC ch0)"
line.long 0x10 "ERRCTRL4,This register is related to the functional safety."
hexmask.long.byte 0x10 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x10 18.--23. 1. "Bit_2318,Error injection for the own AXI master (pre-process  EDC checker  dedicated part of high speed domain bus1 (SPMC))"
hexmask.long.byte 0x10 12.--17. 1. "Bit_1712,Error injection for the own AXI master (pre-process  EDC checker  dedicated part of high speed domain bus0 (SPMC))"
hexmask.long.byte 0x10 6.--11. 1. "Bit_116,Error injection for the own AXI master (pre-process  EDC checker  dedicated part of AXI slave bus)"
hexmask.long.byte 0x10 0.--5. 1. "Bit_50,Error injection for the own AXI master (pre-process  EDC checker  dedicated part of light CVe cluster2)"
group.long 0xEB8++0x3
line.long 0x0 "ERRCTRL6,This register is related to the functional safety."
rbitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 28. "Reserved_28,Reserved" "0,1"
rbitfld.long 0x0 27. "Reserved_27,Reserved" "0,1"
bitfld.long 0x0 26. "Bit_2626,Error injection for the own AXI master (post-process  dedicated part of system bus (IF1))" "0,1"
bitfld.long 0x0 25. "Bit_2525,Error injection for the own AXI master (post-process  dedicated part of system bus (IF0))" "0,1"
newline
bitfld.long 0x0 24. "Bit_2424,Error injection for the own AXI master (post-process  dedicated part of high speed domain bus (SPMC))" "0,1"
bitfld.long 0x0 23. "Bit_2323,Error injection for the own AXI master (post-process  dedicated part of the own Scratchpad Memory bank7)" "0,1"
bitfld.long 0x0 22. "Bit_2222,Error injection for the own AXI master (post-process  dedicated part of the own Scratchpad Memory bank6)" "0,1"
bitfld.long 0x0 21. "Bit_2121,Error injection for the own AXI master (post-process  dedicated part of the own Scratchpad Memory bank5)" "0,1"
bitfld.long 0x0 20. "Bit_2020,Error injection for the own AXI master (post-process  dedicated part of the own Scratchpad Memory bank4)" "0,1"
newline
bitfld.long 0x0 19. "Bit_1919,Error injection for the own AXI master (post-process  dedicated part of the own Scratchpad Memory bank3)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Error injection for the own AXI master (post-process  dedicated part of the own Scratchpad Memory bank2)" "0,1"
bitfld.long 0x0 17. "Bit_1717,Error injection for the own AXI master (post-process  dedicated part of the own Scratchpad Memory bank1)" "0,1"
bitfld.long 0x0 16. "Bit_1616,Error injection for the own AXI master (post-process  dedicated part of the own Scratchpad Memory bank0)" "0,1"
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 13. "Bit_1313,Error injection for the own AXI master (pre-process  dedicated part of high speed domain bus1 (SPMC))" "0,1"
bitfld.long 0x0 12. "Bit_1212,Error injection for the own AXI master (pre-process  dedicated part of high speed domain bus0 (SPMC))" "0,1"
bitfld.long 0x0 11. "Bit_1111,Error injection for the own AXI master (pre-process  dedicated part of AXI slave bus)" "0,1"
bitfld.long 0x0 10. "Bit_1010,Error injection for the own AXI master (pre-process  dedicated part of light CVe cluster2)" "0,1"
bitfld.long 0x0 9. "Bit_99,Error injection for the own AXI master (pre-process  dedicated part of light CVe cluster1)" "0,1"
newline
bitfld.long 0x0 8. "Bit_88,Error injection for the own AXI master (pre-process  dedicated part of light CVe cluster0)" "0,1"
bitfld.long 0x0 7. "Bit_77,Error injection for the own AXI master (pre-process  dedicated part of CVe cluster0)" "0,1"
bitfld.long 0x0 6. "Bit_66,Error injection for the own AXI master (pre-process  dedicated part of IMP DMAC ch1)" "0,1"
bitfld.long 0x0 5. "Bit_55,Error injection for the own AXI master (pre-process  dedicated part of IMP DMAC ch0)" "0,1"
bitfld.long 0x0 4. "Bit_44,Error injection for the own AXI master (pre-process  dedicated part of IMP PSC/DTA)" "0,1"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
bitfld.long 0x0 1. "Bit_11,Error injection for the own AXI master (pre-process  dedicated part of IMP Core ch1)" "0,1"
bitfld.long 0x0 0. "Bit_00,Error injection for the own AXI master (pre-process  dedicated part of IMP Core ch0)" "0,1"
rgroup.long 0xEE0++0x3
line.long 0x0 "ERRSUM0,This register is related to the functional safety."
bitfld.long 0x0 30.--31. "Bit_3130,Error Summary for the own AXI slave bus (post-process  built-in register module and default slave)" "0,1,2,3"
hexmask.long.word 0x0 15.--29. 1. "Reserved_15,Reserved"
hexmask.long.word 0x0 1.--14. 1. "Bit_141,Error Summary for the own AXI slave bus (post-process)"
bitfld.long 0x0 0. "Bit_00,Error Summary for the own AXI slave bus (pre-process)" "0,1"
rgroup.long 0xEE8++0x1F
line.long 0x0 "ERRSUM2,This register is related to the functional safety."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x0 16.--29. 1. "Reserved_16,Reserved"
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x0 0.--13. 1. "Bit_130,Error Summary for the own AXI master bus (pre-process)"
line.long 0x4 "ERRSUM3,This register is related to the functional safety."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "Bit_150,Error Summary for the own AXI master bus (post-process)"
line.long 0x8 "ERRSUM4,This register is related to the functional safety."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x8 16.--29. 1. "Reserved_16,Reserved"
bitfld.long 0x8 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x8 0.--13. 1. "Bit_130,Error Summary for the own AXI master bus (pre-process  EDC checker)"
line.long 0xC "ERRSUM5,This register is related to the functional safety."
bitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.word 0xC 16.--28. 1. "Reserved_16,Reserved"
bitfld.long 0xC 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.word 0xC 0.--12. 1. "Bit_120,Error Summary for the own AXI master bus (post-process  EDC checker)"
line.long 0x10 "ERRSUM6,This register is related to the functional safety."
hexmask.long.word 0x10 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x10 16. "Reserved_16,Reserved" "0,1"
hexmask.long.word 0x10 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x10 0. "Bit_00,Error Summary for the bridge between AXI slave bus and AXI master bus" "0,1"
line.long 0x14 "ERRSUM7,This register is related to the functional safety."
hexmask.long.word 0x14 19.--31. 1. "Reserved_19,Reserved"
bitfld.long 0x14 18. "Reserved_18,Reserved" "0,1"
bitfld.long 0x14 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x14 16. "Reserved_16,Reserved" "0,1"
hexmask.long.word 0x14 3.--15. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x14 2. "Reserved_2,Reserved" "0,1"
bitfld.long 0x14 1. "Bit_11,Error Summary for AXI master bus at the own Scratchpad Memory" "0,1"
bitfld.long 0x14 0. "Bit_00,Error Summary for the bridge between AXI slave bus and AXI master bus (EDC checker)" "0,1"
line.long 0x18 "SPMERR0,This register is related to the functional safety. for the own Scratchpad Memory."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x18 16.--23. 1. "Bit_2316,Ordering error of register slice  each bit field is corresponding to each bank."
hexmask.long.byte 0x18 8.--15. 1. "Bit_158,SRAM EDC error  each bit field is corresponding to each bank."
hexmask.long.byte 0x18 0.--7. 1. "Bit_70,SRAM ECC error  each bit field is corresponding to each bank."
line.long 0x1C "SPMERR1,This register is related to the functional safety. for the own Scratchpad Memory."
hexmask.long.byte 0x1C 24.--31. 1. "Bit_3124,DCLS error  each bit field is corresponding to each bank."
bitfld.long 0x1C 21.--23. "Bit_2321,AXI bus EDC error  for bank7." "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 18.--20. "Bit_2018,AXI bus EDC error  for bank6." "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 15.--17. "Bit_1715,AXI bus EDC error  for bank5." "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 12.--14. "Bit_1412,AXI bus EDC error  for bank4." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x1C 9.--11. "Bit_119,AXI bus EDC error  for bank3." "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 6.--8. "Bit_86,AXI bus EDC error  for bank2." "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 3.--5. "Bit_53,AXI bus EDC error  for bank1." "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 0.--2. "Bit_20,AXI bus EDC error  for bank0." "0,1,2,3,4,5,6,7"
group.long 0xF08++0x17
line.long 0x0 "SPMCTRL0,This register is related to the own Scratchpad Memory. It indicates the timing control value regarding the resume standby."
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
hexmask.long.tbyte 0x0 0.--19. 1. "Bit_190,This is the guarantee time between the stopping clock and the asserting rs."
line.long 0x4 "SPMCTRL1,This register is related to the own Scratchpad Memory. It indicates the timing control value regarding the resume standby."
hexmask.long.word 0x4 20.--31. 1. "Reserved_20,Reserved"
hexmask.long.tbyte 0x4 0.--19. 1. "Bit_190,This is the guarantee time regardiing rs which is the active state."
line.long 0x8 "SPMCTRL2,This register is related to the own Scratchpad Memory. It indicates the timing control value regarding the resume standby."
hexmask.long.word 0x8 20.--31. 1. "Reserved_20,Reserved"
hexmask.long.tbyte 0x8 0.--19. 1. "Bit_190,This is the guarantee time between the deasserting rs and the beginning of the supplying clock."
line.long 0xC "SPMCTRL3,This register is related to the own Scratchpad Memory."
hexmask.long.byte 0xC 24.--31. 1. "Bit_3124,Error injection for bus EDC error  target bank is corresponding to each bit field."
hexmask.long.byte 0xC 16.--23. 1. "Bit_2316,Error injection for SRAM error  target bank is corresponding to each bit field."
hexmask.long.byte 0xC 8.--15. 1. "Bit_158,Error injection for DCLS error  target bank is corresponding to each bit field."
hexmask.long.byte 0xC 4.--7. 1. "Reserved_4,Reserved"
hexmask.long.byte 0xC 0.--3. 1. "Bit_30,Error injection mode for SRAM:"
line.long 0x10 "SPMCTRL4,This register is related to the own Scratchpad Memory."
bitfld.long 0x10 31. "Bit_3131,Enable for access to built-in register module in each Scratchpad Memory (apply to path via AXI slave bus)" "0,1"
bitfld.long 0x10 30. "Bit_3030,Disable for SRAM ECC/EDC error output" "0,1"
hexmask.long.byte 0x10 24.--29. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x10 20.--23. 1. "Bit_2320,Threshold number of SRAM ECC error"
hexmask.long.byte 0x10 16.--19. 1. "Bit_1916,Threshold number of SRAM EDC error"
newline
hexmask.long.byte 0x10 8.--15. 1. "Bit_158,SRAM ECC mode enable"
hexmask.long.byte 0x10 0.--7. 1. "Reserved_0,Reserved"
line.long 0x14 "SPMCTRL5,This register is related to the own Scratchpad Memory."
bitfld.long 0x14 31. "Bit_3131,Disable for the ordering error of register slice  target bank is corresponding to each bit field." "0,1"
hexmask.long.tbyte 0x14 8.--30. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "Bit_70,Error injection for the ordering error of register slice  target bank is corresponding to each bit field."
rgroup.long 0xF80++0xF
line.long 0x0 "DERRADRARPRE00,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 0 (IMP Core ch0). The contents are recorded when the error is detected."
hexmask.long 0x0 0.--31. 1. "Bit_310,Decode error address for read function"
line.long 0x4 "DERRADRAWPRE00,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 0 (IMP Core ch0). The contents are recorded when the error is detected."
hexmask.long 0x4 0.--31. 1. "Bit_310,Decode error address for write function"
line.long 0x8 "DERRADRARPRE01,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 1 (IMP Core ch1). The contents are recorded when the error is detected."
hexmask.long 0x8 0.--31. 1. "Bit_310,Decode error address for read function"
line.long 0xC "DERRADRAWPRE01,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 1 (IMP Core ch1). The contents are recorded when the error is detected."
hexmask.long 0xC 0.--31. 1. "Bit_310,Decode error address for write function"
rgroup.long 0xFA0++0x4F
line.long 0x0 "DERRADRARPRE04,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 4 (IMP PSC/DTA). The contents are recorded when the error is detected."
hexmask.long 0x0 0.--31. 1. "Bit_310,Decode error address for read function"
line.long 0x4 "DERRADRAWPRE04,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 4 (IMP PSC/DTA). The contents are recorded when the error is detected."
hexmask.long 0x4 0.--31. 1. "Bit_310,Decode error address for write function"
line.long 0x8 "DERRADRARPRE05,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 5 (IMP DMAC ch0). The contents are recorded when the error is detected."
hexmask.long 0x8 0.--31. 1. "Bit_310,Decode error address for read function"
line.long 0xC "DERRADRAWPRE05,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 5 (IMP DMAC ch0). The contents are recorded when the error is detected."
hexmask.long 0xC 0.--31. 1. "Bit_310,Decode error address for write function"
line.long 0x10 "DERRADRARPRE06,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 6 (IMP DMAC ch1). The contents are recorded when the error is detected."
hexmask.long 0x10 0.--31. 1. "Bit_310,Decode error address for read function"
line.long 0x14 "DERRADRAWPRE06,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 6 (IMP DMAC ch1). The contents are recorded when the error is detected."
hexmask.long 0x14 0.--31. 1. "Bit_310,Decode error address for write function"
line.long 0x18 "DERRADRARPRE07,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 7 (CVe cluster0). The contents are recorded when the error is detected."
hexmask.long 0x18 0.--31. 1. "Bit_310,Decode error address for read function"
line.long 0x1C "DERRADRAWPRE07,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 7 (CVe cluster0). The contents are recorded when the error is detected."
hexmask.long 0x1C 0.--31. 1. "Bit_310,Decode error address for write function"
line.long 0x20 "DERRADRARPRE08,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 8 (light CVe cluster0). The contents are recorded when the error is detected."
hexmask.long 0x20 0.--31. 1. "Bit_310,Decode error address for read function"
line.long 0x24 "DERRADRAWPRE08,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 8 (light CVe cluster0). The contents are recorded when the error is detected."
hexmask.long 0x24 0.--31. 1. "Bit_310,Decode error address for write function"
line.long 0x28 "DERRADRARPRE09,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 9 (light CVe cluster1). The contents are recorded when the error is detected."
hexmask.long 0x28 0.--31. 1. "Bit_310,Decode error address for read function"
line.long 0x2C "DERRADRAWPRE09,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 9 (light CVe cluster1). The contents are recorded when the error is detected."
hexmask.long 0x2C 0.--31. 1. "Bit_310,Decode error address for write function"
line.long 0x30 "DERRADRARPRE10,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 10 (light CVe cluster2). The contents are recorded when the error is detected."
hexmask.long 0x30 0.--31. 1. "Bit_310,Decode error address for read function"
line.long 0x34 "DERRADRAWPRE10,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 10 (light CVe cluster2). The contents are recorded when the error is detected."
hexmask.long 0x34 0.--31. 1. "Bit_310,Decode error address for write function"
line.long 0x38 "DERRADRARPRE11,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 11 (AXI slave bus). The contents are recorded when the error is detected."
hexmask.long 0x38 0.--31. 1. "Bit_310,Decode error address for read function"
line.long 0x3C "DERRADRAWPRE11,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 11 (AXI slave bus). The contents are recorded when the error is detected."
hexmask.long 0x3C 0.--31. 1. "Bit_310,Decode error address for write function"
line.long 0x40 "DERRADRARPRE12,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 12 (high speed domain bus0 (SPMC)). The contents are recorded when the error is detected."
hexmask.long 0x40 0.--31. 1. "Bit_310,Decode error address for read function"
line.long 0x44 "DERRADRAWPRE12,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 12 (high speed domain bus0 (SPMC)). The contents are recorded when the error is detected."
hexmask.long 0x44 0.--31. 1. "Bit_310,Decode error address for write function"
line.long 0x48 "DERRADRARPRE13,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 13 (high speed domain bus1 (SPMC)). The contents are recorded when the error is detected."
hexmask.long 0x48 0.--31. 1. "Bit_310,Decode error address for read function"
line.long 0x4C "DERRADRAWPRE13,This register indicates the information regarding the address decoder of the own AXI master bus/pre-process 13 (high speed domain bus1 (SPMC)). The contents are recorded when the error is detected."
hexmask.long 0x4C 0.--31. 1. "Bit_310,Decode error address for write function"
group.long 0x1008++0x7
line.long 0x0 "TOCAX13,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for high speed domain bus1 (SPMC)."
bitfld.long 0x0 31. "Bit_3131,Enable of timeout counter for double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationAWREADYdouble_quotation and double_quotationWREADYdouble_quotation for write function"
bitfld.long 0x0 15. "Bit_1515,Enable of timeout counter for double_quotationARREADYdouble_quotation" "0,1"
hexmask.long.word 0x0 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationARREADYdouble_quotation for read functiondouble_quotation"
line.long 0x4 "TOCRB13,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for high speed domain bus1 (SPMC)."
bitfld.long 0x4 31. "Bit_3131,Enable of timeout counter for double_quotationBREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 16.--30. 1. "Bit_3016,Waiting time of the acknowledge double_quotationBREADYdouble_quotation for write function"
bitfld.long 0x4 15. "Bit_1515,Enable of timeout counter for double_quotationRREADYdouble_quotation" "0,1"
hexmask.long.word 0x4 0.--14. 1. "Bit_140,Waiting time of the acknowledge double_quotationRREADYdouble_quotation for read function"
rgroup.long 0x1010++0x17
line.long 0x0 "ACA13,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for high speed domain bus1 (SPMC)."
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
bitfld.long 0x0 19. "Bit_1919,Protocol check error for write transaction (ID check  consistency between AW-ch and W-ch)" "0,1"
bitfld.long 0x0 18. "Bit_1818,Protocol check error for write transaction (W-ch ID check  consistency during 1 transaction)" "0,1"
bitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
bitfld.long 0x0 16. "Bit_1616,Protocol check error for write transaction (size)" "0,1"
newline
bitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.long 0x0 13. "Bit_1313,Protocol check error for read transaction (length of response packet)" "0,1"
bitfld.long 0x0 12. "Bit_1212,Protocol check error for read transaction (size)" "0,1"
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "Bit_77,Address decode error" "0,1"
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bitfld.long 0x0 6. "Bit_66,Timeout error for acknowledge waiting (BREADY)" "0,1"
bitfld.long 0x0 5. "Bit_55,Timeout error for acknowledge waiting (RREADY)" "0,1"
bitfld.long 0x0 4. "Bit_44,Timeout error for acknowledge waiting (WREADY)" "0,1"
bitfld.long 0x0 3. "Bit_33,Timeout error for acknowledge waiting (AWREADY)" "0,1"
bitfld.long 0x0 2. "Bit_22,Timeout error for acknowledge waiting (ARREADY)" "0,1"
newline
bitfld.long 0x0 0.--1. "Reserved_0,Reserved" "0,1,2,3"
line.long 0x4 "DERRINFO13,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for high speed domain bus1 (SPMC)."
hexmask.long.byte 0x4 24.--31. 1. "Bit_3124,Source ID information for write function"
hexmask.long.byte 0x4 20.--23. 1. "Bit_2320,Region ID information for write function"
bitfld.long 0x4 18.--19. "Bit_1918,Secure ID information for write function" "0,1,2,3"
bitfld.long 0x4 17. "Bit_1717,Security error for write function" "0,1"
bitfld.long 0x4 16. "Bit_1616,Slave error for write function" "0,1"
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hexmask.long.byte 0x4 8.--15. 1. "Bit_158,Source ID information for read function"
hexmask.long.byte 0x4 4.--7. 1. "Bit_74,Region ID information for read function"
bitfld.long 0x4 2.--3. "Bit_32,Secure ID information for read function" "0,1,2,3"
bitfld.long 0x4 1. "Bit_11,Security error for read function" "0,1"
bitfld.long 0x4 0. "Bit_00,Slave error for read function" "0,1"
line.long 0x8 "PCNT13,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for high speed domain bus1 (SPMC)."
bitfld.long 0x8 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 24.--29. 1. "Bit_2924,Packet counter for W-ch"
bitfld.long 0x8 22.--23. "Reserved_22,Reserved" "0,1,2,3"
hexmask.long.byte 0x8 16.--21. 1. "Bit_2116,Packet counter for AW-ch"
hexmask.long.word 0x8 6.--15. 1. "Reserved_6,Reserved"
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hexmask.long.byte 0x8 0.--5. 1. "Bit_50,Packet counter for AR-ch"
line.long 0xC "RTOIDAR13,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for high speed domain bus1 (SPMC)."
bitfld.long 0xC 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0xC 8.--28. 1. "Bit_288,Bus information (arid)"
hexmask.long.byte 0xC 0.--7. 1. "Bit_70,Transaction ID (Source ID) for read function"
line.long 0x10 "RTOIDAW13,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for high speed domain bus1 (SPMC)."
bitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.tbyte 0x10 8.--28. 1. "Bit_288,Bus information (awid)"
hexmask.long.byte 0x10 0.--7. 1. "Bit_70,Transaction ID (Source ID) for write function"
line.long 0x14 "RSA130,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for high speed domain bus1 (SPMC). It indicates the ordering error of register slice."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x14 15. "Bit_1515,Redundant register slice error (valid and ready signals)" "0,1"
bitfld.long 0x14 14. "Bit_1414,Register slice  going toward default slave (p1)" "0,1"
hexmask.long.byte 0x14 6.--13. 1. "Bit_136,Register slice  going toward Scratchpad Memory"
bitfld.long 0x14 5. "Bit_55,Register slice  going toward default slave (p0)" "0,1"
newline
bitfld.long 0x14 4. "Bit_44,Register slice  going toward system bus (IF1)" "0,1"
bitfld.long 0x14 3. "Bit_33,Register slice  going toward system bus (IF0)" "0,1"
bitfld.long 0x14 2. "Bit_22,Register slice  going toward high speed domain bus (SPMC)" "0,1"
bitfld.long 0x14 1. "Bit_11,2nd register slice" "0,1"
bitfld.long 0x14 0. "Bit_00,1st register slice (except for DPR related IP)" "0,1"
group.long 0x1028++0x3
line.long 0x0 "MBCTRL130,This register is related to AXI master bus (pre-process). and the covered area is the dedication part for high speed domain bus1 (SPMC)."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
bitfld.long 0x0 17. "Bit_1717,Enable fixed IF mode for write function" "0,1"
bitfld.long 0x0 16. "Bit_1616,Enable fixed IF mode for read function" "0,1"
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
group.long 0x2000++0x3
line.long 0x0 "PRESET,This is the preset register. It should be set once at the initialization phase."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "PRESET,Set to 1010"
group.long 0x2270++0x7
line.long 0x0 "BMATTR00,This register is related to the behavior of IMP Core ch0."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 12.--14. "Bit_1412,OS-ID for memory access (write function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 7.--11. 1. "Reserved_7,Reserved"
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bitfld.long 0x0 4.--6. "Bit_64,OS-ID for memory access (read function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved"
line.long 0x4 "BMATTR01,This register is related to the behavior of IMP Core ch1."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
rbitfld.long 0x4 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x4 12.--14. "Bit_1412,OS-ID for memory access (write function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x4 7.--11. 1. "Reserved_7,Reserved"
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bitfld.long 0x4 4.--6. "Bit_64,OS-ID for memory access (read function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x4 0.--3. 1. "Reserved_0,Reserved"
group.long 0x2280++0x1F
line.long 0x0 "BMATTR04,This register is related to the behavior of IMP PSC."
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 12.--14. "Bit_1412,OS-ID for memory access (write function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 7.--11. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 4.--6. "Bit_64,OS-ID for memory access (read function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved"
line.long 0x4 "BMATTR05,This register is related to the behavior of IMP DMAC ch0."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
rbitfld.long 0x4 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x4 12.--14. "Bit_1412,OS-ID for memory access (write function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x4 7.--11. 1. "Reserved_7,Reserved"
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bitfld.long 0x4 4.--6. "Bit_64,OS-ID for memory access (read function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x4 0.--3. 1. "Reserved_0,Reserved"
line.long 0x8 "BMATTR06,This register is related to the behavior of IMP DMAC ch1."
hexmask.long.word 0x8 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x8 16. "Reserved_16,Reserved" "0,1"
rbitfld.long 0x8 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x8 12.--14. "Bit_1412,OS-ID for memory access (write function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 7.--11. 1. "Reserved_7,Reserved"
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bitfld.long 0x8 4.--6. "Bit_64,OS-ID for memory access (read function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 0.--3. 1. "Reserved_0,Reserved"
line.long 0xC "BMATTR07,This register is related to the behavior of CVe cluster0."
hexmask.long.word 0xC 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0xC 16. "Reserved_16,Reserved" "0,1"
rbitfld.long 0xC 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0xC 12.--14. "Bit_1412,OS-ID for memory access (write function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0xC 7.--11. 1. "Reserved_7,Reserved"
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bitfld.long 0xC 4.--6. "Bit_64,OS-ID for memory access (read function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0xC 0.--3. 1. "Reserved_0,Reserved"
line.long 0x10 "BMATTR08,This register is related to the behavior of light CVe cluster0."
hexmask.long.word 0x10 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x10 16. "Reserved_16,Reserved" "0,1"
rbitfld.long 0x10 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x10 12.--14. "Bit_1412,OS-ID for memory access (write function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x10 7.--11. 1. "Reserved_7,Reserved"
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bitfld.long 0x10 4.--6. "Bit_64,OS-ID for memory access (read function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x10 0.--3. 1. "Reserved_0,Reserved"
line.long 0x14 "BMATTR09,This register is related to the behavior of light CVe cluster1."
hexmask.long.word 0x14 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x14 16. "Reserved_16,Reserved" "0,1"
rbitfld.long 0x14 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x14 12.--14. "Bit_1412,OS-ID for memory access (write function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x14 7.--11. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x14 4.--6. "Bit_64,OS-ID for memory access (read function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x14 0.--3. 1. "Reserved_0,Reserved"
line.long 0x18 "BMATTR10,This register is related to the behavior of light CVe cluster2."
hexmask.long.word 0x18 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x18 16. "Reserved_16,Reserved" "0,1"
rbitfld.long 0x18 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x18 12.--14. "Bit_1412,OS-ID for memory access (write function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x18 7.--11. 1. "Reserved_7,Reserved"
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bitfld.long 0x18 4.--6. "Bit_64,OS-ID for memory access (read function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x18 0.--3. 1. "Reserved_0,Reserved"
line.long 0x1C "BMATTRSP0,This register is related to the behavior of IMP DTA."
hexmask.long.word 0x1C 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x1C 16. "Reserved_16,Reserved" "0,1"
rbitfld.long 0x1C 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x1C 12.--14. "Bit_1412,OS-ID for memory access (write function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x1C 7.--11. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x1C 4.--6. "Bit_64,OS-ID for memory access (read function)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x1C 0.--3. 1. "Reserved_0,Reserved"
group.long 0x2300++0x3
line.long 0x0 "SPMCTRLX0,This register is the control register of the own Scratchpad Memory."
bitfld.long 0x0 31. "Bit_3131,The enable of SRAM initialization. All Scratchpad Memory banks are started initializing at the same time." "0,1"
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "Bit_70,DMS disable. Each bit field corresponds to each bank."
tree.end
tree.end
tree "IMR-LX6 (Image Renderer Light Extended 6)"
base ad:0x0
tree "IMR_LX_0"
base ad:0xFE860000
group.long 0x8++0x3
line.long 0x0 "CR0,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "SWRST,Software Reset" "0: Cancels a software reset for this module,1: Applies a software reset to this module"
newline
hexmask.long.word 0x0 1.--14. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "RS,Rendering Start" "0: Does not start rendering,1: Starts rendering"
rgroup.long 0xC++0x3
line.long 0x0 "SR0,"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "WERR,Indicates that this module has received the WUP signal from another module while it is not executing a display list. This bit is cleared to 0 by writing 1 to the WERRCLR bit in SRCR." "0: This module has not received the WUP signal..,1: This module has received the WUP signal while it.."
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bitfld.long 0x0 10. "WOVF,Indicates that the number of WUP signals this module has received but not processed has exceeded the maximum number allowed. The maximum number in this product is 1. This bit is cleared to 0 by writing 1 to the WOVFCLR bit in SRCR." "0: The number of WUP signals that have not been..,1: The number of WUP signals that have not been.."
hexmask.long.byte 0x0 6.--9. 1. "Reserved_6,Reserved"
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bitfld.long 0x0 5. "REN,Rendering-in-Progress Flag" "0: Rendering is not in progress,1: Rendering is in progress"
bitfld.long 0x0 3.--4. "Reserved_3,Reserved" "0,1,2,3"
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bitfld.long 0x0 2. "INT,INT Instruction Decode" "0: The INT instruction in the DL has not been decoded,1: The INT instruction in the DL has been decoded"
bitfld.long 0x0 1. "IER,Illegal Instruction Decode" "0: No illegal instruction has been decoded in the DL,1: An illegal instruction has been decoded in the DL"
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bitfld.long 0x0 0. "TRA,Trap" "0: Rendering has not been started or is in progress,1: The TRAP instruction has been decoded and.."
group.long 0x10++0xB
line.long 0x0 "SRCR0,Writing 1 to a bit in SRCR clears the corresponding status bit in the status register (SR)."
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "WERRCLR,Writing 1 to this bit clears the WERR bit in SR." "0,1"
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bitfld.long 0x0 10. "WOVFCLR,Writing 1 to this bit clears the WOVF bit in SR." "0,1"
hexmask.long.byte 0x0 3.--9. 1. "Reserved_3,Reserved"
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bitfld.long 0x0 2. "INTCLR,Writing 1 to this bit clears the INT bit in SR." "0,1"
bitfld.long 0x0 1. "IERCLR,Writing 1 to this bit clears the IER bit in SR." "0,1"
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bitfld.long 0x0 0. "TRACLR,Writing 1 to this bit clears the TRA bit in SR." "0,1"
line.long 0x4 "ICR0,The effective bits in the ICR are used to enable setting of the corresponding bit in the status register (SR) in response to the corresponding interrupt sources. To allow the generation of an interrupt. this register should be set to enable setting.."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x4 11. "WERRENB,0: Disables the generation of an interrupt when this module receives the WUP signal from another module while it is not executing a display list." "0: Disables the generation of an interrupt when..,1: Enables the generation of an interrupt when this.."
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bitfld.long 0x4 10. "WOVFENB,0: Disables the generation of an interrupt when the number of WUP signals this module has received but not processed exceeds the maximum number allowed." "0: Disables the generation of an interrupt when the..,1: Enables the generation of an interrupt when the.."
hexmask.long.byte 0x4 5.--9. 1. "Reserved_5,Reserved"
newline
rbitfld.long 0x4 3.--4. "Reserved_3,Reserved" "0,1,2,3"
bitfld.long 0x4 2. "INTENB,0: Disables the generation of INT interrupts." "0: Disables the generation of INT interrupts,1: Enables the generation of an interrupt when an.."
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bitfld.long 0x4 1. "IERENB,0: Disables the generation of IER interrupts generation." "0: Disables the generation of IER interrupts..,1: Enables the generation of an interrupt when an.."
bitfld.long 0x4 0. "TRAENB,0: Disables the generation of TRAP interrupts." "0: Disables the generation of TRAP interrupts,1: Enables the generation of an interrupt when a.."
line.long 0x8 "IMR0,The effective bits in the IMR are used for masking or non-masking of the output of the corresponding interrupt to the interrupt controller when the corresponding interrupt source bits are set in the SR. To allow interrupt generation. this register.."
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x8 11. "WERRM,0: The generation of interrupts when this module receives the WUP signal from another module while it is not executing a display list is not masked." "0: The generation of interrupts when this module..,1: The generation of interrupts when this module.."
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bitfld.long 0x8 10. "WOVFM,0: The generation of interrupts when the number of WUP signals this module has received but not processed exceeds the maximum number allowed is not masked." "0: The generation of interrupts when the number of..,1: The generation of interrupts when the number of.."
hexmask.long.byte 0x8 5.--9. 1. "Reserved_5,Reserved"
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rbitfld.long 0x8 3.--4. "Reserved_3,Reserved" "0,1,2,3"
bitfld.long 0x8 2. "INM,0: The generation of INT interrupts is not masked." "0: The generation of INT interrupts is not masked,1: The generation of INT interrupts is masked"
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bitfld.long 0x8 1. "IEM,0: The generation of IER interrupts is not masked." "0: The generation of IER interrupts is not masked,1: The generation of IER interrupts is masked"
bitfld.long 0x8 0. "TRAM,0: The generation of TRAP interrupts is not masked." "0: The generation of TRAP interrupts is not masked,1: The generation of TRAP interrupts is masked"
rgroup.long 0x1C++0x7
line.long 0x0 "DLSP0,"
hexmask.long 0x0 0.--31. 1. "DLSP,DL Stack Pointer"
line.long 0x4 "DLPR0,"
hexmask.long 0x4 0.--31. 1. "DLP,DL Pointer"
group.long 0x28++0x3
line.long 0x0 "EDLR0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "EDL,Executed DL Status"
group.long 0x30++0x13
line.long 0x0 "DLSAR0,"
hexmask.long 0x0 0.--31. 1. "DLSA,DL Start Address"
line.long 0x4 "DSAR0,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long 0x4 6.--31. 1. "DSA,Destination Start Address"
hexmask.long.byte 0x4 0.--5. 1. "Reserved_0,Reserved"
line.long 0x8 "SSAR0,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x8 8.--31. 1. "SSAR,SRC Start Address"
bitfld.long 0x8 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x8 0.--5. 1. "Reserved_0,Reserved"
line.long 0xC "DSTR0,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.word 0xC 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0xC 0.--16. 1. "DST,Specifies the memory width of the DST area in bytes within a range from 64 to 65 536 bytes in 64-byte alignment. In tile addressing mode  quadruple the value of the setting is used as the memory width. To modify the value during execution  execute.."
line.long 0x10 "SSTR0,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.word 0x10 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x10 0.--16. 1. "SSTR,Specifies the memory width of the SRC area in bytes within a range from 256 to 65 536 bytes in 256-byte alignment in the linear addressing mode when reading texture data from the external memory. In tile addressing mode  quadruple the value of the.."
group.long 0x50++0x3
line.long 0x0 "DSOR0,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long 0x0 5.--31. 1. "DSOFSTA,In Y/UV separate output mode  set an offset value for the UV output destination address that corresponds to the output destination address of Y. The offset must be a signed 32-bit value. Specify the value in 64-byte alignment."
hexmask.long.byte 0x0 0.--4. 1. "Reserved_0,Reserved"
rgroup.long 0x54++0x3
line.long 0x0 "CMRCR0,CMRCR indicates the output mode. bit precision. and correction mode for the drawing results. To set each bit in this register to 1. write 1 to the corresponding bit in CMRCSR. To clear each bit to 0. write 1 to the corresponding bit in CMRCCR."
bitfld.long 0x0 31. "EFPE,Enables or disables the extended filtering pipeline." "0: Disabled,1: Enabled"
bitfld.long 0x0 30. "CP32E,Copy 32-bit mode" "0: Disables copying 32-bit data,1: Enables copying 32-bit data"
newline
bitfld.long 0x0 28.--29. "SUV1416,Specifies the pixel format of the hue of the source data as 14 or 16 bpp or makes neither specification." "0: Does not specify the format as 14 or 16 bpp,?,?,?"
bitfld.long 0x0 26.--27. "DUV1416,Specifies the pixel format of the hue of the destination data as 14 or 16 bpp or makes neither specification." "0: Does not specify the format as 14 or 16 bpp,?,?,?"
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bitfld.long 0x0 24.--25. "SY1416,Specifies the pixel format of the luminance of the source data as 14 or 16 bpp or makes neither specification." "0: Does not specify the format as 14 or 16 bpp,?,?,?"
bitfld.long 0x0 22.--23. "DY1416,Specifies the pixel format of the luminance of the destination data as 14 or 16 bpp or makes neither specification." "0: Does not specify the format as 14 or 16 bpp,?,?,?"
newline
bitfld.long 0x0 20.--21. "Reserved_20,Reserved" "0,1,2,3"
bitfld.long 0x0 19. "CLSM,Hue Correction Scale Parameter Register Specification Mode" "0: Uses the hue correction scale parameters..,1: Uses the hue correction scale parameters.."
newline
bitfld.long 0x0 18. "CLOM,Hue Correction Offset Parameter Register Specification Mode" "0: Uses the hue correction offset parameters..,1: Uses the hue correction offset parameters.."
bitfld.long 0x0 17. "LUSM,Luminance Correction Scale Parameter Register Specification Mode" "0: Uses the luminance correction scale parameters..,1: Uses the luminance correction scale parameter.."
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bitfld.long 0x0 16. "LUOM,Luminance Correction Offset Parameter Register Specification Mode" "0: Uses the luminance correction offset parameters..,1: Uses the luminance correction offset parameter.."
bitfld.long 0x0 15. "CP16E,Copy 16-bit mode" "0: Disables copying 16-bit data,1: Enables copying 16-bit data"
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bitfld.long 0x0 14. "YCM,YC Mode" "0: Processes Y,1: Processes UV"
bitfld.long 0x0 13. "UVS,Specifies whether the input UV plane is in YUV420 format." "0: The input UV plane is not in YUV420 format,1: The input UV plane is in YUV420 format"
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bitfld.long 0x0 12. "SY12,Specifies the precision of luminance processing of source data." "0: 8-bpp precision or 10-bpp precision,1: 12-bpp precision"
bitfld.long 0x0 11. "SY10,Specifies the precision of luminance processing of source data." "0: 8-bpp precision or 12-bpp precision,1: 10-bpp precision"
newline
bitfld.long 0x0 10. "YOM,Output only Y data and discard U/V data." "0,1"
bitfld.long 0x0 9. "Y12,Set this bit when Y data is output in 12-bpp precision." "0: Outputs Y data in 8- or 10-bpp precision,1: Outputs Y data in 12-bpp precision"
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bitfld.long 0x0 8. "Y10,Set this bit when Y data is output in 10-bpp precision." "0: Outputs Y data in 8- or 12-bpp precision,1: Outputs Y data in 10-bpp precision"
bitfld.long 0x0 7. "YISM,Selects the output format for YUV data." "0: Produces the interleave output of YUV data,1: Produces the separate output of Y/UV data"
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bitfld.long 0x0 5.--6. "SUV,Specifies the precision of color difference processing of source data." "0: 8-bpp precision,1: 10-bpp precision,?,?"
bitfld.long 0x0 3.--4. "DUV,Specifies the precision of color difference of output data." "0: Outputs UV data in 8-bpp precision,1: Outputs UV data in 10-bpp precision,?,?"
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bitfld.long 0x0 2. "CLCE,Hue Correction Enable" "0: Disables hue correction,1: Enables hue correction"
bitfld.long 0x0 1. "LUCE,Luminance Correction Enable" "0: Disables luminance correction,1: Enables luminance correction"
newline
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x58++0x7
line.long 0x0 "CMRCSR0,"
bitfld.long 0x0 31. "EFPES,0: The EFPE bit in CMRCR is not set to 1." "0: The EFPE bit in CMRCR is not set to 1,1: The EFPE bit in CMRCR is set to 1"
bitfld.long 0x0 30. "CP32ES,0: The CP32E bit in CMRCR is not set to 1." "0: The CP32E bit in CMRCR is not set to 1,1: The CP32E bit in CMRCR is set to 1"
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bitfld.long 0x0 28.--29. "SUV1416S,00: Neither of the SUV1416 bits in CMRCR is set to 1." "0: Neither of the SUV1416 bits in CMRCR is set to 1,1: Sets bit 0 of the SUV1416 bits in CMRCR to 1,?,?"
bitfld.long 0x0 26.--27. "DUV1416S,00: Neither of the DUV1416 bits in CMRCR is set to 1." "0: Neither of the DUV1416 bits in CMRCR is set to 1,1: Sets bit 0 of the DUV1416 bits in CMRCR to 1,?,?"
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bitfld.long 0x0 24.--25. "SY1416S,00: Neither of the SY1416 bits in CMRCR is set to 1." "0: Neither of the SY1416 bits in CMRCR is set to 1,1: Sets bit 0 of the SY1416 bits in CMRCR to 1,?,?"
bitfld.long 0x0 22.--23. "DY1416S,00: Neither of the DY1416 bits in CMRCR is set to 1." "0: Neither of the DY1416 bits in CMRCR is set to 1,1: Sets bit 0 of the DY1416 bits in CMRCR to 1,?,?"
newline
rbitfld.long 0x0 20.--21. "Reserved_20,Reserved" "0,1,2,3"
bitfld.long 0x0 19. "CLSMS,0: The CLSM bit in CMRCR is not set to 1." "0: The CLSM bit in CMRCR is not set to 1,1: The CLSM bit in CMRCR is set to 1"
newline
bitfld.long 0x0 18. "CLOMS,0: The CLOM bit in CMRCR is not set to 1." "0: The CLOM bit in CMRCR is not set to 1,1: The CLOM bit in CMRCR is set to 1"
bitfld.long 0x0 17. "LUSMS,0: The LUSM bit in CMRCR is not set to 1." "0: The LUSM bit in CMRCR is not set to 1,1: The LUSM bit in CMRCR is set to 1"
newline
bitfld.long 0x0 16. "LUOMS,0: The LUOM bit in CMRCR is not set to 1." "0: The LUOM bit in CMRCR is not set to 1,1: The LUOM bit in CMRCR is set to 1"
bitfld.long 0x0 15. "CP16ES,0: The CP16E bit in CMRCR is not set to 1." "0: The CP16E bit in CMRCR is not set to 1,1: The CP16E bit in CMRCR is set to 1"
newline
bitfld.long 0x0 14. "YCMS,0: The YCM bit in CMRCR is not set to 1." "0: The YCM bit in CMRCR is not set to 1,1: The YCM to bit in CMRCR is set to 1"
bitfld.long 0x0 13. "UVSS,0: The UVS bit in CMRCR is not set to 1." "0: The UVS bit in CMRCR is not set to 1,1: The UVS bit in CMRCR is set to 1"
newline
bitfld.long 0x0 12. "SY12S,0: The SY12 bit in CMRCR is not set to 1." "0: The SY12 bit in CMRCR is not set to 1,1: The SY12 bit in CMRCR is set to 1"
bitfld.long 0x0 11. "SY10S,0: The SY10 bit in CMRCR is not set to 1." "0: The SY10 bit in CMRCR is not set to 1,1: The SY10 bit in CMRCR is set to 1"
newline
bitfld.long 0x0 10. "YOMS,0: The YOM bit in CMRCR is not set to 1." "0: The YOM bit in CMRCR is not set to 1,1: The YOM bit in CMRCR is set to 1"
bitfld.long 0x0 9. "Y12S,0: The Y12 bit in CMRCR is not set to 1." "0: The Y12 bit in CMRCR is not set to 1,1: The Y12 bit in CMRCR is set to 1"
newline
bitfld.long 0x0 8. "Y10S,0: The Y10 bit in CMRCR is not set to 1." "0: The Y10 bit in CMRCR is not set to 1,1: The Y10 bit in CMRCR is set to 1"
bitfld.long 0x0 7. "YISMS,0: The YISM bit in CMRCR is not set to 1." "0: The YISM bit in CMRCR is not set to 1,1: The YISM bit in CMRCR is set to 1"
newline
bitfld.long 0x0 5.--6. "SUVS,00: Neither of the SUV bits in CMRCR is set to 1." "0: Neither of the SUV bits in CMRCR is set to 1,1: Sets bit 0 of the SUV bits in CMRCR to 1,?,?"
bitfld.long 0x0 3.--4. "DUVS,00: Neither of the DUV bits in CMRCR is set to 1." "0: Neither of the DUV bits in CMRCR is set to 1,1: Sets bit 0 of the DUV bits in CMRCR to 1,?,?"
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bitfld.long 0x0 2. "CLCES,0: The CLCE bit in CMRCR is not set to 1." "0: The CLCE bit in CMRCR is not set to 1,1: The CLCE bit in CMRCR is set to 1"
bitfld.long 0x0 1. "LUCES,0: The LUCE bit in CMRCR is not set to 1." "0: The LUCE bit in CMRCR is not set to 1,1: The LUCE bit in CMRCR is set to 1"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "CMRCCR0,CMRCCR is used to clear the corresponding bits of the rendering mode register (CMRCR). To disable the modes and functions selected by the bits in CMRCR. write 1 to the corresponding bits in this register."
bitfld.long 0x4 31. "EFPEC,0: Does not clear the EFPE bit in CMRCR to 0." "0: Does not clear the EFPE bit in CMRCR to 0,1: Clears the EFPE bit in CMRCR to 0"
bitfld.long 0x4 30. "CP32EC,0: Does not clear the CP32E bit in CMRCR to 0." "0: Does not clear the CP32E bit in CMRCR to 0,1: Clears the CP32E bit in CMRCR to 0"
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bitfld.long 0x4 28.--29. "SUV1416C,00: Does not clear either of the SUV1416 bits in CMRCR to 0." "0: Does not clear either of the SUV1416 bits in..,1: Clears bit 0 of the SUV1416 bits in CMRCR to 0,?,?"
bitfld.long 0x4 26.--27. "DUV1416C,00: Does not clear either of the DUV1416 bits in CMRCR to 0." "0: Does not clear either of the DUV1416 bits in..,1: Clears bit 0 of the DUV1416 bits in CMRCR to 0,?,?"
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bitfld.long 0x4 24.--25. "SY1416C,00: Does not clear either of the SY1416 bits in CMRCR to 0." "0: Does not clear either of the SY1416 bits in..,1: Clears bit 0 of the SY1416 bits in CMRCR to 0,?,?"
bitfld.long 0x4 22.--23. "DY1416C,00: Does not clear either of the DY1416 bits in CMRCR to 0." "0: Does not clear either of the DY1416 bits in..,1: Clears bit 0 of the DY1416 bits in CMRCR to 0,?,?"
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rbitfld.long 0x4 20.--21. "Reserved_20,Reserved" "0,1,2,3"
bitfld.long 0x4 19. "CLSMC,0: Does not clear the CLSM bit in CMRCR to 0." "0: Does not clear the CLSM bit in CMRCR to 0,1: Clears the CLSM bit in CMRCR to 0"
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bitfld.long 0x4 18. "CLOMC,0: Does not clear the CLOM bit in CMRCR to 0." "0: Does not clear the CLOM bit in CMRCR to 0,1: Clears the CLOM bit in CMRCR to 0"
bitfld.long 0x4 17. "LUSMC,0: Does not clear the LUSM bit in CMRCR to 0." "0: Does not clear the LUSM bit in CMRCR to 0,1: Clears the LUSM bit in CMRCR to 0"
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bitfld.long 0x4 16. "LUOMC,0: Does not clear the LUOM bit in CMRCR to 0." "0: Does not clear the LUOM bit in CMRCR to 0,1: Clears the LUOM bit in CMRCR to 0"
bitfld.long 0x4 15. "CP16EC,0: Does not clear the CP16E bit in CMRCR to 0." "0: Does not clear the CP16E bit in CMRCR to 0,1: Clears the CP16E bit in CMRCR to 0"
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bitfld.long 0x4 14. "YCMC,0: Does not clear the YCM bit in CMRCR to 0." "0: Does not clear the YCM bit in CMRCR to 0,1: Clears the YCM bit in CMRCR to 0"
bitfld.long 0x4 13. "UVSC,0: Does not clear the UVS bit in CMRCR to 0." "0: Does not clear the UVS bit in CMRCR to 0,1: Clears the UVS bit in CMRCR to 0"
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bitfld.long 0x4 12. "SY12C,0: Does not clear the SY12 bit in CMRCR to 0." "0: Does not clear the SY12 bit in CMRCR to 0,1: Clears the SY12 bit in CMRCR to 0"
bitfld.long 0x4 11. "SY10C,0: Does not clear the SY10 bit in CMRCR to 0." "0: Does not clear the SY10 bit in CMRCR to 0,1: Clears the SY10 bit in CMRCR to 0"
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bitfld.long 0x4 10. "YOMC,0: Does not clear the YOM bit in CMRCR to 0." "0: Does not clear the YOM bit in CMRCR to 0,1: Clears the YOM bit in CMRCR to 0"
bitfld.long 0x4 9. "Y12C,0: Does not clear the Y12 bit in CMRCR to 0." "0: Does not clear the Y12 bit in CMRCR to 0,1: Clears the Y12 bit in CMRCR to 0"
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bitfld.long 0x4 8. "Y10C,0: Does not clear the Y10 bit in CMRCR to 0." "0: Does not clear the Y10 bit in CMRCR to 0,1: Clears the Y10 bit in CMRCR to 0"
bitfld.long 0x4 7. "YISMC,0: Does not clear the YISM bit in CMRCR to 0." "0: Does not clear the YISM bit in CMRCR to 0,1: Clears the YISM bit in CMRCR to 0"
newline
bitfld.long 0x4 5.--6. "SUVC,00: Does not clear either of the SUV bits in CMRCR to 0." "0: Does not clear either of the SUV bits in CMRCR..,1: Clears bit 0 of the SUV bits in CMRCR to 0,?,?"
bitfld.long 0x4 3.--4. "DUVC,00: Does not clear either of the DUV bit in CMRCR to 0." "0: Does not clear either of the DUV bit in CMRCR to 0,1: Clears bit 0 of the DUV bits in CMRCR to 0,?,?"
newline
bitfld.long 0x4 2. "CLCEC,0: Does not clear the CLCE bit in CMRCR to 0." "0: Does not clear the CLCE bit in CMRCR to 0,1: Clears the CLCE bit in CMRCR to 0"
bitfld.long 0x4 1. "LUCEC,0: Does not clear the LUCE bit in CMRCR to 0." "0: Does not clear the LUCE bit in CMRCR to 0,1: Clears the LUCE bit in CMRCR to 0"
newline
rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x60++0x3
line.long 0x0 "TRIMR0,TRIMR is used to select the various triangle drawing modes including coordinate generation modes and filter types. To set each bit in this register to 1. write 1 to the corresponding bit in TRIMSR. To clear each bit to 0. write 1 to the.."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
bitfld.long 0x0 24. "DIDL,Disable input information of CLCE or LUCE mode in DL." "0: Enable input information of CLCE or LUCE mode in..,1: Disable input information of CLCE or LUCE mode.."
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bitfld.long 0x0 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 20. "UVSHFVAL,Specifies one bit of logical right-shifting after filtering when the extended filtering pipeline is in use. This setting is applied to the UV plane as described in Table 56.12. Otherwise  SHFE and SHFVAL settings are used. This setting is only.." "0,1"
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bitfld.long 0x0 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 16. "SHFVAL,Specifies one bit of logical right-shifting after filtering when the extended filtering pipeline is in use. Sets the UV plane as described in Table 56.12. This setting is only possible when the EFPE bit in CMRCR and the SHFE bit in this register.." "0,1"
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bitfld.long 0x0 15. "UVSHFE,Specifies whether to truncate the fractional part or to retain the specified fractional digits following filtering by the extended filtering pipeline. This setting is applied to the UV plane as described in Table 56.12. Otherwise  SHFE and SHFVAL.." "0: The fractional part is truncated after filtering,1: Some of the digits of the fractional part after.."
bitfld.long 0x0 14. "SHFE,Specifies whether to truncate the fractional part or to retain the specified fractional digits following filtering by the extended filtering pipeline. Set the UV plane as described in Table 56.12." "0: The fractional part is truncated after filtering,1: Some of the digits of the fractional part after.."
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bitfld.long 0x0 13. "RDE,Specifies how to round the fractional part in filtering." "0: Truncation,1: Rounding up or down"
bitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
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bitfld.long 0x0 11. "TFE,Pyramidal Image Filtering Enable" "0: Disables the filtering between two adjacent..,1: Enables the filtering between two adjacent.."
hexmask.long.byte 0x0 7.--10. 1. "Reserved_7,Reserved"
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bitfld.long 0x0 6. "TCM,Triangle Clockwise Mode" "0: Specifies triangle vertexes counterclockwise,1: Specifies triangle vertexes clockwise"
bitfld.long 0x0 4.--5. "Reserved_4,Reserved" "0,1,2,3"
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bitfld.long 0x0 3. "AUTOSG,Automatic Source Coordinate Generation Mode" "0: Disables the automatic source coordinate..,1: Enables the automatic source coordinate.."
bitfld.long 0x0 2. "AUTODG,Automatic Destination Coordinate Generation Mode" "0: Disables the automatic destination coordinate..,1: Enables the automatic destination coordinate.."
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bitfld.long 0x0 1. "BFE,Bilinear Filter Enable" "0: Bilinear filtering is not used,1: Bilinear filtering is used"
bitfld.long 0x0 0. "TME,Texture Mapping Enable" "0: The single color specified by TRICR,1: Texture mapping is used"
group.long 0x64++0x17
line.long 0x0 "TRIMSR0,TRIMSR is used to set the corresponding bits of the triangle mode register (TRIMR). To enable the modes and functions selected by the bits in TRIMR. write 1 to the corresponding bits in this register."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
bitfld.long 0x0 24. "DIDLS,0: The DIDL bit is not set to 1." "0: The DIDL bit is not set to 1,1: The DIDL bit is not set to 1"
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rbitfld.long 0x0 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 20. "UVSHFVALS0,0: The UVSHFVAL bit is not set to 1." "0: The UVSHFVAL bit is not set to 1,1: The UVSHFVAL bit is set to 1"
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rbitfld.long 0x0 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 16. "SHFVALS,0: The SHFVAL bit is not set to 1." "0: The SHFVAL bit is not set to 1,1: The SHFVAL bit is set to 1"
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bitfld.long 0x0 15. "UVSHFVALS1,0: The UVSHFVAL bit is not set to 1." "0: The UVSHFVAL bit is not set to 1,1: The UVSHFVAL bit is set to 1"
bitfld.long 0x0 14. "SHFES,0: The SHFE bit is not set to 1." "0: The SHFE bit is not set to 1,1: The SHFE bit is set to 1"
newline
bitfld.long 0x0 13. "RDES,0: The RDE bit is not set to 1." "0: The RDE bit is not set to 1,1: The RDE bit is set to 1"
rbitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
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bitfld.long 0x0 11. "TFES,0: The TFE bit is not set to 1." "0: The TFE bit is not set to 1,1: The TFE bit is set to 1"
hexmask.long.byte 0x0 7.--10. 1. "Reserved_7,Reserved"
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bitfld.long 0x0 6. "TCMS,0: The TCM bit is not set to 1." "0: The TCM bit is not set to 1,1: The TCM bit is set to 1"
rbitfld.long 0x0 4.--5. "Reserved_4,Reserved" "0,1,2,3"
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bitfld.long 0x0 3. "AUTOSGS,0: The AUTOSG bit is not set to 1." "0: The AUTOSG bit is not set to 1,1: The AUTOSG bit is set to 1"
bitfld.long 0x0 2. "AUTODGS,0: The AUTODG bit is not set to 1." "0: The AUTODG bit is not set to 1,1: The AUTODG bit is set to 1"
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bitfld.long 0x0 1. "BFES,0: The BFE bit is not set to 1." "0: The BFE bit is not set to 1,1: The BFE bit is set to 1"
bitfld.long 0x0 0. "TMES,0: The TME bit is not set to 1." "0: The TME bit is not set to 1,1: The TME bit is set to 1"
line.long 0x4 "TRIMCR0,TRIMCR is used to clear the corresponding bits of the triangle mode register (TRIMR). To disable the modes and functions selected by the bits in TRIMR. write 1 to the corresponding bits in this register."
hexmask.long.byte 0x4 25.--31. 1. "Reserved_25,Reserved"
rbitfld.long 0x4 24. "DIDLC,Set bit DIDL in TRIMR" "0: Bit DIDL in TRIMR is not clear,1: Bit DIDL in TRIMR is clear to 0"
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rbitfld.long 0x4 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "UVSHFVALC0,0: Does not clear the UVSHFVAL bit to 0." "0: Does not clear the UVSHFVAL bit to 0,1: Clears the UVSHFVAL bit to 0"
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rbitfld.long 0x4 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 16. "SHFVALC,0: Does not clear the SHFVAL bit to 0." "0: Does not clear the SHFVAL bit to 0,1: Clears the SHFVAL bit to 0"
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bitfld.long 0x4 15. "UVSHFVALC1,0: Does not clear the UVSHFVAL bit to 0." "0: Does not clear the UVSHFVAL bit to 0,1: Clears the UVSHFVAL bit to 0"
bitfld.long 0x4 14. "SHFEC,0: Does not clear the SHFE bit to 0." "0: Does not clear the SHFE bit to 0,1: Clears the SHFE bit to 0"
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bitfld.long 0x4 13. "RDEC,0: Does not clear the RDE bit to 0." "0: Does not clear the RDE bit to 0,1: Clears the RDE bit to 0"
rbitfld.long 0x4 12. "Reserved_12,Reserved" "0,1"
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bitfld.long 0x4 11. "TFEC,0: Does not clear the TFE bit to 0." "0: Does not clear the TFE bit to 0,1: Clears the TFE bit to 0"
hexmask.long.byte 0x4 7.--10. 1. "Reserved_7,Reserved"
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bitfld.long 0x4 6. "TCMC,0: Does not clear the TCM bit to 0." "0: Does not clear the TCM bit to 0,1: Clears the TCM bit to 0"
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
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bitfld.long 0x4 3. "AUTOSGC,0: Does not clear the AUTOSG bit to 0." "0: Does not clear the AUTOSG bit to 0,1: Clears the AUTOSG bit to 0"
bitfld.long 0x4 2. "AUTODGC,0: Does not clear the AUTODG bit to 0." "0: Does not clear the AUTODG bit to 0,1: Clears the AUTODG bit to 0"
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bitfld.long 0x4 1. "BFEC,0: Does not clear the BFE bit to 0." "0: Does not clear the BFE bit to 0,1: Clears the BFE bit to 0"
bitfld.long 0x4 0. "TMEC,0: Does not clear the TME bit to 0." "0: Does not clear the TME bit to 0,1: Clears the TME bit to 0"
line.long 0x8 "TRICR0,TRICR is used to specify the color for single-color drawing with a TRI instruction when single-color drawing is selected with the TME bit in TRIMR."
bitfld.long 0x8 31. "YCFORM,For interleave output (for which the YISM bit in CMRCR is 0 and the YUV422E bit in CMRCR2 is 1)  changes the order of Y and U/V. Normally  Y and U/V are in a {U/V  Y} order; this bit  however  can reverse the order to {Y  U/V}." "0: For interleave output,1: For interleave output"
rbitfld.long 0x8 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x8 26.--27. "TCY3,When Y is to be output in 12 bpp  these bits specify bits 11 and 10 of color Y for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x8 24.--25. "TCY2,When Y is to be output in 10/12 bpp  these bits specify bits 9 and 8 of color Y for single-color drawing with the TRI instruction." "0,1,2,3"
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hexmask.long.byte 0x8 16.--23. 1. "TCV,When V is to be output in 8 bits  these bits specify color V for single-color drawing with the TRI instruction. When outputting V in 10 bits/12 bits  the V value in the TRICR2 register is used."
hexmask.long.byte 0x8 8.--15. 1. "TCU,When U is to be output in 8 bits  these bits specify color U for single-color drawing with the TRI instruction. When outputting U in 10 bits/12 bits  the U value in the TRICR2 register is used."
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hexmask.long.byte 0x8 0.--7. 1. "TCY,Specifies color Y for single-color drawing with the TRI instruction."
line.long 0xC "UVDPOR0,"
hexmask.long.tbyte 0xC 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0xC 8. "DDP,Specifies the destination coordinates described in the DL and the registers related to the setting of destination coordinates." "0: Specifies destination coordinates in integer,1: Specifies destination coordinates in fixed-point.."
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hexmask.long.byte 0xC 3.--7. 1. "Reserved_3,Reserved"
bitfld.long 0xC 0.--2. "UVDPO,Source Coordinate Decimal Point" "0,1,2,3,4,5,6,7"
line.long 0x10 "SUSR0,SUSR is used to specify the width (horizontal size) of the source. The width value depends on the source data format."
hexmask.long.byte 0x10 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x10 16.--26. 1. "SUW,Specify double_quotationsource width - 2double_quotation. The maximum value is 2 046."
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hexmask.long.byte 0x10 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x10 0.--10. 1. "SVW,Specify double_quotationsource width - 1double_quotation. The maximum value is 2 047."
line.long 0x14 "SVSR0,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this field without executing the SYNCM instruction."
hexmask.long.tbyte 0x14 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0x14 0.--10. 1. "SVS,Specifies the height (vertical size) of the source."
group.long 0x80++0x23
line.long 0x0 "XMINR0,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x0 0.--12. 1. "XMIN,X Clip MIN"
line.long 0x4 "YMINR0,"
hexmask.long.tbyte 0x4 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x4 0.--12. 1. "YMIN,Y Clip MIN"
line.long 0x8 "XMAXR0,"
hexmask.long.tbyte 0x8 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x8 0.--12. 1. "XMAX,X Clip MAX"
line.long 0xC "YMAXR0,"
hexmask.long.tbyte 0xC 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0xC 0.--12. 1. "YMAX,Y Clip MAX"
line.long 0x10 "AMXSR0,"
hexmask.long.tbyte 0x10 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x10 0.--12. 1. "AMXS,Automatic Mesh X Size"
line.long 0x14 "AMYSR0,"
hexmask.long.tbyte 0x14 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x14 0.--12. 1. "AMYS,Automatic Mesh Y Size"
line.long 0x18 "AMXOR0,"
hexmask.long.tbyte 0x18 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x18 0.--12. 1. "AMXO,Automatic Mesh X Origin"
line.long 0x1C "AMYOR0,"
hexmask.long.tbyte 0x1C 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x1C 0.--12. 1. "AMYO,Automatic Mesh Y Origin"
line.long 0x20 "TRICR20,TRICR2 is used to specify the color for single-color drawing with a TRI instruction when single-color drawing is selected with the TME bit in TRIMR. This register is used when UV is output in 10 bpp/12 bpp."
bitfld.long 0x20 30.--31. "TCV16,When V is to be output in 16 bpp  these bits specify bits 15 and 14 of color V for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x20 28.--29. "TCV14,When V is to be output in 14/16 bpp  these bits specify bits 13 and 12 of color V for single-color drawing with the TRI instruction." "0,1,2,3"
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bitfld.long 0x20 26.--27. "TCV12,When V is to be output in 12/14/16 bpp  these bits specify bits 11 and 10 of color V for single-color drawing with the TRI instruction." "0,1,2,3"
hexmask.long.word 0x20 16.--25. 1. "TCV10,When V is to be output in 10/12/14/16 bpp  these bits specify bits 9 to 0 of color V for single-color drawing with the TRI instruction."
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bitfld.long 0x20 14.--15. "TCU16,When U is to be output in 16 bpp  these bits specify bits 15 and 14 of color U for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x20 12.--13. "TCU14,When U is to be output in 14/16 bpp  these bits specify bits 13 and 12 of color U for single-color drawing with the TRI instruction." "0,1,2,3"
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bitfld.long 0x20 10.--11. "TCU12,When U is to be output in 12/14/16 bpp  these bits specify bits 11 and 10 of color U for single-color drawing with the TRI instruction." "0,1,2,3"
hexmask.long.word 0x20 0.--9. 1. "TCU10,When U is to be output in 10/12/14/16 bpp  these bits specify bits 9 to 0 of color U for single-color drawing with the TRI instruction."
rgroup.long 0xA4++0x3
line.long 0x0 "TRIMR20,TRIMR2 is used to select the maximum level of detail."
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 9.--11. "MAXLODU,The maximum level of detail for pyramidal images to be used in the u direction. The setting should be from 0 to 4. Other settings are prohibited. To modify the value during execution  execute the SYNCM instruction before modification. When this.." "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 3.--5. "MAXLODV,The maximum level of detail for pyramidal images to be used in the v direction. The setting should be from 0 to 4. Other settings are prohibited. To modify the value during execution  execute the SYNCM instruction before modification. When this.." "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
group.long 0xA8++0x1F
line.long 0x0 "TRIMSR20,TRIMSR2 is used to set the corresponding bits of the triangle mode register (TRIMR2). To enable the modes and functions selected by the bits in TRIMR2. write 1 to the corresponding bits in this register."
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 9.--11. "MAXLODUS,Sets the corresponding MAXLODU bits in the TRIMR2 register." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 3.--5. "MAXLODVS,Sets the corresponding MAXLODV bits in the TRIMR2 register." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x0 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4 "TRIMCR20,TRIMCR2 is used to clear the corresponding bits of the triangle mode register (TRIMR2). To disable the modes and functions selected by the bits in TRIMR2. write 1 to the corresponding bits in this register."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x4 9.--11. "MAXLODUC,Clears the corresponding MAXLODU bits in the TRIMR2 register." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x4 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 3.--5. "MAXLODVC,Clears the corresponding MAXLODV bits in the TRIMR2 register." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x4 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x8 "YLMINR0,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "YLMIN,Specifies the minimum luminance value when luminance correction is applied. If after correction the luminance value is lower than the value specified in this register  the luminance value is clamped at the value specified by these bits."
line.long 0xC "UBMINR0,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "UBMIN,Specifies the minimum U value when hue correction is applied. If after correction the U value is lower than the value specified in this register  the U value is clamped at the value specified by these bits."
line.long 0x10 "VRMINR0,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "VRMIN,Specifies the minimum V value when hue correction is applied. If after correction the V value is lower than the value specified in this register  the V value is clamped at the value specified by these bits."
line.long 0x14 "YLMAXR0,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "YLMAX,Specifies the maximum luminance value when luminance correction is applied. If after correction the luminance value is higher than the value specified in this register  the luminance value is clamped at the value specified by these bits."
line.long 0x18 "UBMAXR0,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "UBMAX,Specifies the maximum U value when hue correction is applied. If after correction the U value is higher than the value specified in this register  the U value is clamped at the value specified by these bits."
line.long 0x1C "VRMAXR0,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "VRMAX,Specifies the maximum V value when hue correction is applied. If after correction the V value is higher than the value specified in this register  the V value is clamped at the value specified by these bits."
group.long 0xD0++0x13
line.long 0x0 "CPDPOR0,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 8.--10. "YLDPO,Specifies the number of bits after the decimal point for the value specified as the luminance correction scale value." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
bitfld.long 0x0 4.--6. "UBDPO,Specifies the number of bits after the decimal point for the value specified as the hue correction U value scale value." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.long 0x0 0.--2. "VRDPO,Specifies the number of bits after the decimal point for the value specified as the hue correction V value scale value." "0,1,2,3,4,5,6,7"
line.long 0x4 "YLCPR0,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.byte 0x4 24.--31. 1. "DYP_LSCAL,Specifies the scale parameter of second Y plane in DYP mode if the luminance correction scale parameter is specified by a register setting (LUSM = 1 in CMRCR)."
hexmask.long.byte 0x4 16.--23. 1. "DYP_LOFST,Specifies the offset parameter of second Y plane in DYP mode"
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hexmask.long.byte 0x4 8.--15. 1. "LSCAL,Specifies the scale parameter when the luminance correction scale parameter is specified by a register setting (LUSM = 1 in CMRCR). The setting is passed as unsigned fixed-point data  and the number of decimal places is specified by YLDPO in.."
hexmask.long.byte 0x4 0.--7. 1. "LOFST,Specifies the offset parameter when the luminance correction offset parameter is specified by a register setting (LUOM = 1 in CMRCR). Specify the value of these bits as signed 8-bit data."
line.long 0x8 "UBCPR0,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x8 8.--15. 1. "UBSCL,Specifies the U value scale parameter when the hue correction scale parameters are specified by register settings (CLSM = 1 in CMRCR). The setting is passed as fixed-point data  and the number of decimal places is specified by UBDPO in CPDPOR."
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hexmask.long.byte 0x8 0.--7. 1. "UBOFS,Specifies the U value offset parameter when the hue correction offset parameters are specified by register settings (CLOM = 1 in CMRCR). Specify the value of these bits as signed 8-bit data."
line.long 0xC "VRCPR0,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0xC 8.--15. 1. "VRSCL,Specifies the V value scale parameter when the hue correction scale parameters are specified by register settings (CLSM = 1 in CMRCR). The setting is passed as fixed-point data  and the number of decimal places is specified by VRDPO in CPDPOR."
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hexmask.long.byte 0xC 0.--7. 1. "VROFS,Specifies the V value offset parameter when the hue correction offset parameters are specified by register settings (CLOM = 1 in CMRCR). Specify the value of these bits as signed 8-bit data."
line.long 0x10 "TRICR30,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
bitfld.long 0x10 30.--31. "DYP_TCY16,When 2nd Y in DYP mode is to be output in 16 bpp  these bits specify bits 15 and 14 of color 2nd Y for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x10 28.--29. "DYP_TCY14,When 2nd Y in DYP mode is to be output in 14 bpp or 16 bpp  these bits specify bits 13 to 0 of color 2nd Y for single-color drawing with the TRI instruction." "0,1,2,3"
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bitfld.long 0x10 26.--27. "DYP_TCY12,When 2nd Y in DYP mode is to be output in 12bpp or 14 bpp or 16 bpp  these bits specify bits 11 to 0 of color 2nd Y for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x10 24.--25. "DYP_TCY10,When 2nd Y in DYP mode is to be output in 10bpp or 12bpp or 14 bpp or 16 bpp  these bits specify bits 9 to 0 of color 2nd Y for single-color drawing with the TRI instruction." "0,1,2,3"
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hexmask.long.byte 0x10 16.--23. 1. "DYP_TCY8,In DYP mode  these bits specify bits 7 to 0 of color 2nd Y for single-color drawing with the TRI instruction."
bitfld.long 0x10 14.--15. "TCY16,When Y is to be output in 16 bpp  these bits specify bits 15 and 14 of color Y for single-color drawing with the TRI instruction." "0,1,2,3"
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hexmask.long.word 0x10 0.--13. 1. "TCY14,When Y is to be output in 14 bpp or 16 bpp  these bits specify bits 13 to 0 of color Y for single-color drawing with the TRI instruction."
rgroup.long 0xE4++0x3
line.long 0x0 "CMRCR20,CMRCR2 indicates the output mode for the drawing results. To set each bit in this register to 1. write 1 to the corresponding bit in CMRCSR2. To clear each bit to 0. write 1 to the corresponding bit in CMRCCR2."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "DCTE,Tile Addressing Mode Enable for Destination Data" "0: Linear addressing mode,1: Tile addressing mode"
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bitfld.long 0x0 13.--14. "Reserved_13,Reserved" "0,1,2,3"
bitfld.long 0x0 12. "TCTE,Tile Addressing Mode Enable for Texture Data" "0: Linear addressing mode,1: Tile addressing mode"
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bitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 6. "UVFORM,Swap the order of adjacent single_quotationUsingle_quotation and single_quotationVsingle_quotation on the YUV422 interleaved texture data." "0: Keeps the original order,1: Swaps the order"
bitfld.long 0x0 5. "YUV422FORM,Swap the order of adjacent single_quotationYsingle_quotation and single_quotationUsingle_quotation or single_quotationVsingle_quotation on the YUV422 interleaved texture data." "0: Keeps the original order,1: Swaps the order"
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bitfld.long 0x0 4. "DYP,DYP: Double luminance plane mode" "0: Not use double luminance plane function,1: Use double luminance plane"
bitfld.long 0x0 3. "YUVSEMI,YUV Semi-planar mode" "0: The input image format is not YUV Semi-planar,1: The input image format is YUV Semi-planar"
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bitfld.long 0x0 2. "YUV422E,YUV422 Interleaved Mode Enable" "0: Processes Y only or UV only plane,1: Processes YUV422 interleaved plane"
bitfld.long 0x0 1. "UVC,UV plane format conversion" "0: Does not convert the format of UV plane,1: Converts the format of UV plane"
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bitfld.long 0x0 0. "LUTE,Lookup Table Enable" "0: Does not convert data using the LUT,1: Converts data using the LUT"
group.long 0xE8++0xB
line.long 0x0 "CMRCSR20,CMRCSR2 is used to set the corresponding bits in the rendering mode register 2 (CMRCR2). To enable the modes and functions selected by the bits in CMRCR2. write 1 to the corresponding bits in this register."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "DCTES,0: The DCTE bit in CMRCR2 is not set to 1." "0: The DCTE bit in CMRCR2 is not set to 1,1: The DCTE bit in CMRCR2 is set to 1"
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rbitfld.long 0x0 13.--14. "Reserved_13,Reserved" "0,1,2,3"
bitfld.long 0x0 12. "TCTES,0: The TCTE bit in CMRCR2 is not set to 1." "0: The TCTE bit in CMRCR2 is not set to 1,1: The TCTE bit in CMRCR2 is set to 1"
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rbitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 6. "UVFORMS,0: The UVFORM bit in CMRCR2 is not set to 1." "0: The UVFORM bit in CMRCR2 is not set to 1,1: The UVFORM bit in CMRCR2 is set to 1"
bitfld.long 0x0 5. "YUV422FORMS,0: The YUV422FORM bit in CMRCR2 is not set to 1." "0: The YUV422FORM bit in CMRCR2 is not set to 1,1: The YUV422FORM bit in CMRCR2 is set to 1"
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bitfld.long 0x0 4. "DYPS,0: The DYP bit in CMRCR2 is not set to 1" "0: The DYP bit in CMRCR2 is not set to 1,1: The DYP bit in CMRCR2 is set to 1"
bitfld.long 0x0 3. "YUVSEMIS,0: The YUVSEMI bit in CMRCR2 is not set to 1." "0: The YUVSEMI bit in CMRCR2 is not set to 1,1: The YUVSEMI bit in CMRCR2 is set to 1"
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bitfld.long 0x0 2. "YUV422ES,0: The YUV422E bit in CMRCR2 is not set to 1." "0: The YUV422E bit in CMRCR2 is not set to 1,1: The YUV422E bit in CMRCR2 is set to 1"
bitfld.long 0x0 1. "UVCS,0: The UVC bit in CMRCR2 is not set to 1." "0: The UVC bit in CMRCR2 is not set to 1,1: The UVC bit in CMRCR2 is set to 1"
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bitfld.long 0x0 0. "LUTES,0: The LUTE bit in CMRCR2 is not set to 1." "0: The LUTE bit in CMRCR2 is not set to 1,1: The LUTE bit in CMRCR2 is set to 1"
line.long 0x4 "CMRCCR20,CMRCCR2 is used to clear the corresponding bits of the rendering mode register 2 (CMRCR2). To disable the modes and functions selected by the bits in CMRCR2. write 1 to the corresponding bits in this register."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4 15. "DCTEC,0: Does not clear the DCTE bit in CMRCR2 to 0." "0: Does not clear the DCTE bit in CMRCR2 to 0,1: Clears the DCTE bit in CMRCR2 to 0"
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rbitfld.long 0x4 13.--14. "Reserved_13,Reserved" "0,1,2,3"
bitfld.long 0x4 12. "TCTEC,0: Does not clear the TCTE bit in CMRCR2 to 0." "0: Does not clear the TCTE bit in CMRCR2 to 0,1: Clears the TCTE bit in CMRCR2 to 0"
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rbitfld.long 0x4 10.--11. "Reserved_10,Reserved" "0,1,2,3"
rbitfld.long 0x4 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x4 6. "UVFORMC,0: Does not clear the UVFORM bit in CMRCR2 to 0." "0: Does not clear the UVFORM bit in CMRCR2 to 0,1: Clears the UVFORM bit in CMRCR2 to 0"
bitfld.long 0x4 5. "YUV422FORMC,0: Does not clear the YUV422FORM bit in CMRCR2 to 0." "0: Does not clear the YUV422FORM bit in CMRCR2 to 0,1: Clears the YUV422FORM bit in CMRCR2 to 0"
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bitfld.long 0x4 4. "DYPC,0: The DYP bit in CMRCR2 is not clear to 0." "0: The DYP bit in CMRCR2 is not clear to 0,1: The DYP bit in CMRCR2 is clear to 0"
bitfld.long 0x4 3. "YUVSEMIC,0: Does not clear the YUVSEMI bit in CMRCR2 to 0." "0: Does not clear the YUVSEMI bit in CMRCR2 to 0,1: Clears the YUVSEMI bit in CMRCR2 to 0"
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bitfld.long 0x4 2. "YUV422EC,0: Does not clear the YUV422E bit in CMRCR2 to 0." "0: Does not clear the YUV422E bit in CMRCR2 to 0,1: Clears the YUV422E bit in CMRCR2 to 0"
bitfld.long 0x4 1. "UVCC,0: Does not clear the UVC bit in CMRCR2 to 0." "0: Does not clear the UVC bit in CMRCR2 to 0,1: Clears the UVC bit in CMRCR2 to 0"
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bitfld.long 0x4 0. "LUTEC,0: Does not clear the LUTE bit in CMRCR to 0." "0: Does not clear the LUTE bit in CMRCR to 0,1: Clears the LUTE bit in CMRCR to 0"
line.long 0x8 "NCMR0,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x8 8.--31. 1. "ACC_KEY,Access Key to change NCME bit of this register."
hexmask.long.byte 0x8 1.--7. 1. "Reserved_1,Reserved"
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bitfld.long 0x8 0. "NCME,Non-blocking cache mode enable bit for source data." "0,1"
group.long 0x114++0x7
line.long 0x0 "DCCR0,When changing the setting of this register by the DL. be sure to execute the SYNCM instruction"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "UVDSTSEL,Sets the register that sets the memory stride of UV plane when outputting YUV422/420 semi-planar." "0: Uses the setting value of DSTR register as..,1: Uses the setting value of UVDSTR register as.."
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hexmask.long.word 0x0 0.--14. 1. "Reserved_0,Reserved"
line.long 0x4 "SCCR0,When changing the setting of this register by the DL. be sure to execute the SYNCM instruction"
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x4 16. "TCMENB,Select the size of the source cache when pyramidal images filtering not supported. When this bit is 1  set TRIMR.TFE  TRIMR2.MAXLODU and TRIMR2.MAXLODV to 0." "0: 32 Kbytes,1: 64 Kbytes"
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hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
group.long 0x120++0x3
line.long 0x0 "PEFCCR0,This register controls the following performance-counter-related registers: PEFCTCR. PEFCTMR. PERFCMAXPR. PEFCMINPR. PEFCDCAR. PEFCDCMR. PEFCSCAR. PEFCSCMR. However. counted value of the performance counter is not guaranteed."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CLR,Clear all the performance counter related registers." "0,1"
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bitfld.long 0x0 0. "EN,Enable all performance-counter-related registers." "0: Counting-up by the performance-counter-related..,1: Counting-up by the performance-counter-related.."
rgroup.long 0x124++0x17
line.long 0x0 "PEFCTCR0,"
hexmask.long 0x0 0.--31. 1. "PEFCTCR,Performance counter to count the number of cycles when the setting of the EN bit of PEFCCR is 1."
line.long 0x4 "PEFCTMR0,"
hexmask.long 0x4 0.--31. 1. "PEFCTMR,Performance counter to count the total number of cycles among those counted by PEFCTCR in which the cache is missed."
line.long 0x8 "PEFCMAXPR0,"
hexmask.long 0x8 0.--31. 1. "PEFCMAXPR,Performance counter to count the maximum number of cycles necessitated by a cache miss."
line.long 0xC "PEFCMINPR0,"
hexmask.long 0xC 0.--31. 1. "PEFCMINPR,Performance counter to count the minimum number of cycles necessitated by a cache miss."
line.long 0x10 "PEFCDCAR0,"
hexmask.long 0x10 0.--31. 1. "PEFCDCA,Performance counter to count the number of times the destination cache is accessed."
line.long 0x14 "PEFCDCMR0,"
hexmask.long 0x14 0.--31. 1. "PEFCDCM,Performance counter to count the number of times the destination cache is missed."
rgroup.long 0x144++0x7
line.long 0x0 "PEFCSCAR0,"
hexmask.long 0x0 0.--31. 1. "PEFCSCA,Performance counter to count the number of times the source cache is accessed."
line.long 0x4 "PEFCSCMR0,"
hexmask.long 0x4 0.--31. 1. "PEFCSCM,Performance counter to count the number of times the source cache is missed."
group.long 0x1A0++0x33
line.long 0x0 "SSAOR0,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x0 8.--31. 1. "SSAOR,SRC Start Address Offset"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
line.long 0x4 "SSAOR10,m = 1 to 4."
hexmask.long.tbyte 0x4 8.--31. 1. "SSAORn,SRC Offset Address for Map n"
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
line.long 0x8 "SSAOR20,m = 1 to 4."
hexmask.long.tbyte 0x8 8.--31. 1. "SSAORn,SRC Offset Address for Map n"
hexmask.long.byte 0x8 0.--7. 1. "Reserved_0,Reserved"
line.long 0xC "SSAOR30,m = 1 to 4."
hexmask.long.tbyte 0xC 8.--31. 1. "SSAORn,SRC Offset Address for Map n"
hexmask.long.byte 0xC 0.--7. 1. "Reserved_0,Reserved"
line.long 0x10 "SSAOR40,m = 1 to 4."
hexmask.long.tbyte 0x10 8.--31. 1. "SSAORn,SRC Offset Address for Map n"
hexmask.long.byte 0x10 0.--7. 1. "Reserved_0,Reserved"
line.long 0x14 "UVSSAOR0,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x14 8.--31. 1. "UVSSAOR,SRC Start Address Offset for UV plane"
hexmask.long.byte 0x14 0.--7. 1. "Reserved_0,Reserved"
line.long 0x18 "UVSSAOR10,n = 1 to 4."
hexmask.long.tbyte 0x18 8.--31. 1. "UVSSAOR_n,SRC Start Address Offset for UV plane for Map n"
hexmask.long.byte 0x18 0.--7. 1. "Reserved_0,Reserved"
line.long 0x1C "UVSSAOR20,n = 1 to 4."
hexmask.long.tbyte 0x1C 8.--31. 1. "UVSSAOR_n,SRC Start Address Offset for UV plane for Map n"
hexmask.long.byte 0x1C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x20 "UVSSAOR30,n = 1 to 4."
hexmask.long.tbyte 0x20 8.--31. 1. "UVSSAOR_n,SRC Start Address Offset for UV plane for Map n"
hexmask.long.byte 0x20 0.--7. 1. "Reserved_0,Reserved"
line.long 0x24 "UVSSAOR40,n = 1 to 4."
hexmask.long.tbyte 0x24 8.--31. 1. "UVSSAOR_n,SRC Start Address Offset for UV plane for Map n"
hexmask.long.byte 0x24 0.--7. 1. "Reserved_0,Reserved"
line.long 0x28 "DSAOR0,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long 0x28 6.--31. 1. "DSAO,Destination Offset Address"
hexmask.long.byte 0x28 0.--5. 1. "Reserved_0,Reserved"
line.long 0x2C "XYOFSR0,"
hexmask.long.byte 0x2C 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x2C 16.--27. 1. "XOFS,The value  obtained by adding the offset specified in this field to the X coordinate automatically generated or specified by DL  is used for processing as X coordinate."
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hexmask.long.byte 0x2C 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.word 0x2C 0.--11. 1. "YOFS,The value  obtained by adding the offset specified in this field to the Y coordinate automatically generated or specified by DL  is used for processing as Y coordinate."
line.long 0x30 "UVOFSR0,"
hexmask.long.word 0x30 16.--31. 1. "UOFS,The value  obtained by adding the offset specified in this field to the u coordinate automatically generated or specified by DL  is used for processing as v coordinate."
hexmask.long.word 0x30 0.--15. 1. "VOFS,The value  obtained by adding the offset specified in this field to the Y coordinate automatically generated or specified by DL  is used for processing as Y coordinate."
group.long 0x280++0x7
line.long 0x0 "EDCCR0,"
hexmask.long.tbyte 0x0 15.--31. 1. "Reserved_15,Reserved"
bitfld.long 0x0 14. "LUTEDCIJE,LUT EDC injection enable" "0: LUT injection is disabled,1: LUT injection is enabled"
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hexmask.long.word 0x0 0.--13. 1. "Reserved_0,Reserved"
line.long 0x4 "EDCSR0,"
hexmask.long.tbyte 0x4 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x4 8. "LMERR,Line Memory SRAM Parity checker status." "0: LMERR bit is not cleared,1: LMERR bit is cleared to 0"
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bitfld.long 0x4 7. "ROTERR,Rotator Buffer SRAM Parity checker status." "0: ROTERR bit is not cleared,1: ROTERR bit is cleared to 0"
bitfld.long 0x4 6. "DCERR2,Destination Cache Data SRAM Parity checker status." "0: DCERR2 bit is not cleared,1: DCERR2 bit is cleared"
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bitfld.long 0x4 5. "MFERR,Miss FIFO SRAM EDC checker status." "0: MFERR bit is not cleared,1: MFERR bit is cleared"
bitfld.long 0x4 4. "SQERR,Store Queue SRAM EDC checker status." "0: SQERR bit is not cleared,1: SQERR bit is cleared"
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bitfld.long 0x4 3. "PXERR,PX FIFO EDC checker status" "0: PXERR bit is not cleared,1: PXERR bit is cleared"
bitfld.long 0x4 2. "DCERR,Destination cache dirty bit SRAM checker status" "0: DCERR bit is not cleared,1: DCERR bit is cleared"
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bitfld.long 0x4 1. "LUTERR,LUT SRAM Parity checker status" "0: LUTERR bit is not cleared,1: LUTERR bit is cleared"
bitfld.long 0x4 0. "SCERR,Source Cache SRAM Parity checker status" "0: SCERR bit is not cleared,1: SCERR bit is cleared"
group.long 0x2A0++0xF
line.long 0x0 "SYNCCR00,This register specifies the module corresponding to bits 0 to 3 in the SYNCC enable field of the WUP and SLP instructions. Set the number for specifying the module in this register. See Table 56.21 for the numbers for specifying the module. Do.."
hexmask.long.byte 0x0 24.--31. 1. "SYNCC3,Specifies the module corresponding to bit 3 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x0 16.--23. 1. "SYNCC2,Specifies the module corresponding to bit 2 of the SYNCC enable field of the WUP and SLP instructions."
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hexmask.long.byte 0x0 8.--15. 1. "SYNCC1,Specifies the module corresponding to bit 1 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x0 0.--7. 1. "SYNCC0,Specifies the module corresponding to bit 0 of the SYNCC enable field of the WUP and SLP instructions."
line.long 0x4 "SYNCCR10,This register specifies the module corresponding to bits 4 to 7 in the SYNCC enable field of the WUP and SLP instructions. Set the number for specifying the module in this register. See Table 56.21 for the numbers for specifying the module. Do.."
hexmask.long.byte 0x4 24.--31. 1. "SYNCC7,Specifies the module corresponding to bit 7 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x4 16.--23. 1. "SYNCC6,Specifies the module corresponding to bit 6 of the SYNCC enable field of the WUP and SLP instructions."
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hexmask.long.byte 0x4 8.--15. 1. "SYNCC5,Specifies the module corresponding to bit 5 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x4 0.--7. 1. "SYNCC4,Specifies the module corresponding to bit 4 of the SYNCC enable field of the WUP and SLP instructions."
line.long 0x8 "SYNCCR20,This register specifies the module corresponding to bits 8 to 11 in the SYNCC enable field of the WUP and SLP instructions. Set the number for specifying the module in this register. See Table 56.21 for the numbers for specifying the module. Do.."
hexmask.long.byte 0x8 24.--31. 1. "SYNCC11,Specifies the module corresponding to bit 11 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x8 16.--23. 1. "SYNCC10,Specifies the module corresponding to bit 10 of the SYNCC enable field of the WUP and SLP instructions."
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hexmask.long.byte 0x8 8.--15. 1. "SYNCC9,Specifies the module corresponding to bit 9 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x8 0.--7. 1. "SYNCC8,Specifies the module corresponding to bit 8 of the SYNCC enable field of the WUP and SLP instructions."
line.long 0xC "SYNCCR30,This register specifies the module corresponding to bits 12 to 15 in the SYNCC enable field of the WUP and SLP instructions. Set the number for specifying the module in this register. See Table 56.21 for the numbers for specifying the module. Do.."
hexmask.long.byte 0xC 24.--31. 1. "SYNCC15,Specifies the module corresponding to bit 15 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0xC 16.--23. 1. "SYNCC14,Specifies the module corresponding to bit 14of the SYNCC enable field of the WUP and SLP instructions."
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hexmask.long.byte 0xC 8.--15. 1. "SYNCC13,Specifies the module corresponding to bit 13 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0xC 0.--7. 1. "SYNCC12,Specifies the module corresponding to bit 12 of the SYNCC enable field of the WUP and SLP instructions."
group.long 0xB00++0x4B
line.long 0x0 "SSAR10,m = 1 to 4."
hexmask.long.tbyte 0x0 8.--31. 1. "SSARn,SRC Start Address for Map n"
bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
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hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved"
line.long 0x4 "SSTR10,m = 1 to 4."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x4 0.--16. 1. "SSTRn,Specifies the memory width of the source area for the n-th map in bytes as an integer multiple of 256 within the range from 256 to 65 536 bytes in the linear addressing mode when reading texture data from the external memory. In tile addressing.."
line.long 0x8 "SSAR20,m = 1 to 4."
hexmask.long.tbyte 0x8 8.--31. 1. "SSARn,SRC Start Address for Map n"
bitfld.long 0x8 6.--7. "Reserved_6,Reserved" "0,1,2,3"
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hexmask.long.byte 0x8 0.--5. 1. "Reserved_0,Reserved"
line.long 0xC "SSTR20,m = 1 to 4."
hexmask.long.word 0xC 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0xC 0.--16. 1. "SSTRn,Specifies the memory width of the source area for the n-th map in bytes as an integer multiple of 256 within the range from 256 to 65 536 bytes in the linear addressing mode when reading texture data from the external memory. In tile addressing.."
line.long 0x10 "SSAR30,m = 1 to 4."
hexmask.long.tbyte 0x10 8.--31. 1. "SSARn,SRC Start Address for Map n"
bitfld.long 0x10 6.--7. "Reserved_6,Reserved" "0,1,2,3"
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hexmask.long.byte 0x10 0.--5. 1. "Reserved_0,Reserved"
line.long 0x14 "SSTR30,m = 1 to 4."
hexmask.long.word 0x14 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x14 0.--16. 1. "SSTRn,Specifies the memory width of the source area for the n-th map in bytes as an integer multiple of 256 within the range from 256 to 65 536 bytes in the linear addressing mode when reading texture data from the external memory. In tile addressing.."
line.long 0x18 "SSAR40,m = 1 to 4."
hexmask.long.tbyte 0x18 8.--31. 1. "SSARn,SRC Start Address for Map n"
bitfld.long 0x18 6.--7. "Reserved_6,Reserved" "0,1,2,3"
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hexmask.long.byte 0x18 0.--5. 1. "Reserved_0,Reserved"
line.long 0x1C "SSTR40,m = 1 to 4."
hexmask.long.word 0x1C 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x1C 0.--16. 1. "SSTRn,Specifies the memory width of the source area for the n-th map in bytes as an integer multiple of 256 within the range from 256 to 65 536 bytes in the linear addressing mode when reading texture data from the external memory. In tile addressing.."
line.long 0x20 "UVSSAR0,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x20 8.--31. 1. "UVSSAR,SRC Start Address for UV plane"
hexmask.long.byte 0x20 0.--7. 1. "Reserved_0,Reserved"
line.long 0x24 "UVSSTR0,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.word 0x24 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x24 0.--16. 1. "UVSSTR,Sets the memory width of texture data read from the external memory of UV plane in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is used as-is  while in.."
line.long 0x28 "UVSSAR10,n = 1 to 4."
hexmask.long.tbyte 0x28 8.--31. 1. "UVSSARn,SRC Start Address for UV plane for Map n"
hexmask.long.byte 0x28 0.--7. 1. "Reserved_0,Reserved"
line.long 0x2C "UVSSTR10,"
hexmask.long.word 0x2C 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x2C 0.--16. 1. "UVSSTRn,Sets the memory width of texture data read from the external memory of UV plane for the n-th Map in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is.."
line.long 0x30 "UVSSAR20,n = 1 to 4."
hexmask.long.tbyte 0x30 8.--31. 1. "UVSSARn,SRC Start Address for UV plane for Map n"
hexmask.long.byte 0x30 0.--7. 1. "Reserved_0,Reserved"
line.long 0x34 "UVSSTR20,"
hexmask.long.word 0x34 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x34 0.--16. 1. "UVSSTRn,Sets the memory width of texture data read from the external memory of UV plane for the n-th Map in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is.."
line.long 0x38 "UVSSAR30,n = 1 to 4."
hexmask.long.tbyte 0x38 8.--31. 1. "UVSSARn,SRC Start Address for UV plane for Map n"
hexmask.long.byte 0x38 0.--7. 1. "Reserved_0,Reserved"
line.long 0x3C "UVSSTR30,"
hexmask.long.word 0x3C 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x3C 0.--16. 1. "UVSSTRn,Sets the memory width of texture data read from the external memory of UV plane for the n-th Map in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is.."
line.long 0x40 "UVSSAR40,n = 1 to 4."
hexmask.long.tbyte 0x40 8.--31. 1. "UVSSARn,SRC Start Address for UV plane for Map n"
hexmask.long.byte 0x40 0.--7. 1. "Reserved_0,Reserved"
line.long 0x44 "UVSSTR40,"
hexmask.long.word 0x44 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x44 0.--16. 1. "UVSSTRn,Sets the memory width of texture data read from the external memory of UV plane for the n-th Map in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is.."
line.long 0x48 "UVDSTR0,This register is not initialized by the SWRST bit in the control register (CR)"
hexmask.long.word 0x48 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x48 0.--16. 1. "UVDSTR,Sets the memory width of destination data of UV plane in Semi-planar format to a range from 64 bytes to 65 536 bytes and in 64-byte unit. If the UVDSTSEL bit of DCCR register is 1  the setting of this register is used as memory stride  while if.."
group.long 0x1000++0xFFF
line.long 0x0 "LUTDR00,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4 "LUTDR10,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8 "LUTDR20,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC "LUTDR30,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x10 "LUTDR40,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x14 "LUTDR50,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x18 "LUTDR60,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1C "LUTDR70,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x20 "LUTDR80,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x24 "LUTDR90,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x28 "LUTDR100,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2C "LUTDR110,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x30 "LUTDR120,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x34 "LUTDR130,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x38 "LUTDR140,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3C "LUTDR150,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x40 "LUTDR160,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x44 "LUTDR170,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x48 "LUTDR180,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4C "LUTDR190,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x50 "LUTDR200,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x54 "LUTDR210,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x58 "LUTDR220,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5C "LUTDR230,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x60 "LUTDR240,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x64 "LUTDR250,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x68 "LUTDR260,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6C "LUTDR270,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x70 "LUTDR280,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x74 "LUTDR290,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x78 "LUTDR300,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7C "LUTDR310,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x80 "LUTDR320,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x84 "LUTDR330,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x88 "LUTDR340,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8C "LUTDR350,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x90 "LUTDR360,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x94 "LUTDR370,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x98 "LUTDR380,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9C "LUTDR390,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA0 "LUTDR400,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA4 "LUTDR410,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA8 "LUTDR420,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAC "LUTDR430,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB0 "LUTDR440,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB4 "LUTDR450,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB8 "LUTDR460,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBC "LUTDR470,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC0 "LUTDR480,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC4 "LUTDR490,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC8 "LUTDR500,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCC "LUTDR510,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD0 "LUTDR520,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD4 "LUTDR530,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD8 "LUTDR540,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDC "LUTDR550,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE0 "LUTDR560,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE4 "LUTDR570,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE8 "LUTDR580,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEC "LUTDR590,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF0 "LUTDR600,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF4 "LUTDR610,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF8 "LUTDR620,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFC "LUTDR630,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x100 "LUTDR640,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x100 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x100 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x104 "LUTDR650,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x104 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x104 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x108 "LUTDR660,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x108 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x108 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x10C "LUTDR670,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x10C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x110 "LUTDR680,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x110 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x110 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x114 "LUTDR690,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x114 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x114 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x118 "LUTDR700,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x118 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x118 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x11C "LUTDR710,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x11C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x11C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x120 "LUTDR720,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x120 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x120 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x124 "LUTDR730,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x124 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x124 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x128 "LUTDR740,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x128 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x128 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x12C "LUTDR750,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x12C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x12C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x130 "LUTDR760,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x130 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x130 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x134 "LUTDR770,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x134 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x134 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x138 "LUTDR780,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x138 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x138 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x13C "LUTDR790,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x13C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x13C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x140 "LUTDR800,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x140 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x140 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x144 "LUTDR810,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x144 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x144 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x148 "LUTDR820,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x148 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x148 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x14C "LUTDR830,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x14C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x150 "LUTDR840,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x150 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x150 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x154 "LUTDR850,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x154 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x154 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x158 "LUTDR860,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x158 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x158 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x15C "LUTDR870,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x15C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x15C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x160 "LUTDR880,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x160 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x160 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x164 "LUTDR890,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x164 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x164 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x168 "LUTDR900,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x168 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x168 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x16C "LUTDR910,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x16C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x16C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x170 "LUTDR920,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x170 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x170 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x174 "LUTDR930,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x174 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x174 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x178 "LUTDR940,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x178 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x178 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x17C "LUTDR950,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x17C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x17C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x180 "LUTDR960,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x180 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x180 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x184 "LUTDR970,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x184 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x184 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x188 "LUTDR980,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x188 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x188 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x18C "LUTDR990,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x18C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x190 "LUTDR1000,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x190 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x190 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x194 "LUTDR1010,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x194 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x194 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x198 "LUTDR1020,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x198 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x198 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x19C "LUTDR1030,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x19C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x19C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1A0 "LUTDR1040,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1A4 "LUTDR1050,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1A8 "LUTDR1060,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1AC "LUTDR1070,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1B0 "LUTDR1080,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1B4 "LUTDR1090,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1B8 "LUTDR1100,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1BC "LUTDR1110,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1C0 "LUTDR1120,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1C4 "LUTDR1130,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1C8 "LUTDR1140,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1CC "LUTDR1150,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1D0 "LUTDR1160,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1D4 "LUTDR1170,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1D8 "LUTDR1180,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1DC "LUTDR1190,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1E0 "LUTDR1200,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1E4 "LUTDR1210,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1E8 "LUTDR1220,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1EC "LUTDR1230,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1F0 "LUTDR1240,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1F4 "LUTDR1250,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1F8 "LUTDR1260,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1FC "LUTDR1270,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x200 "LUTDR1280,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x200 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x200 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x204 "LUTDR1290,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x204 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x204 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x208 "LUTDR1300,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x208 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x208 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x20C "LUTDR1310,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x20C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x210 "LUTDR1320,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x210 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x210 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x214 "LUTDR1330,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x214 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x214 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x218 "LUTDR1340,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x218 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x218 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x21C "LUTDR1350,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x21C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x21C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x220 "LUTDR1360,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x220 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x220 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x224 "LUTDR1370,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x224 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x224 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x228 "LUTDR1380,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x228 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x228 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x22C "LUTDR1390,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x22C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x22C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x230 "LUTDR1400,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x230 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x230 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x234 "LUTDR1410,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x234 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x234 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x238 "LUTDR1420,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x238 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x238 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x23C "LUTDR1430,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x23C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x23C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x240 "LUTDR1440,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x240 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x240 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x244 "LUTDR1450,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x244 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x244 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x248 "LUTDR1460,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x248 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x248 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x24C "LUTDR1470,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x24C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x250 "LUTDR1480,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x250 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x250 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x254 "LUTDR1490,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x254 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x254 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x258 "LUTDR1500,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x258 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x258 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x25C "LUTDR1510,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x25C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x25C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x260 "LUTDR1520,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x260 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x260 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x264 "LUTDR1530,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x264 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x264 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x268 "LUTDR1540,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x268 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x268 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x26C "LUTDR1550,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x26C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x26C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x270 "LUTDR1560,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x270 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x270 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x274 "LUTDR1570,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x274 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x274 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x278 "LUTDR1580,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x278 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x278 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x27C "LUTDR1590,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x27C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x27C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x280 "LUTDR1600,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x280 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x280 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x284 "LUTDR1610,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x284 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x284 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x288 "LUTDR1620,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x288 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x288 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x28C "LUTDR1630,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x28C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x28C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x290 "LUTDR1640,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x290 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x290 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x294 "LUTDR1650,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x294 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x294 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x298 "LUTDR1660,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x298 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x298 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x29C "LUTDR1670,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x29C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x29C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2A0 "LUTDR1680,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2A4 "LUTDR1690,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2A8 "LUTDR1700,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2AC "LUTDR1710,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2B0 "LUTDR1720,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2B4 "LUTDR1730,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2B8 "LUTDR1740,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2BC "LUTDR1750,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2C0 "LUTDR1760,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2C4 "LUTDR1770,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2C8 "LUTDR1780,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2CC "LUTDR1790,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2D0 "LUTDR1800,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2D4 "LUTDR1810,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2D8 "LUTDR1820,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2DC "LUTDR1830,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2E0 "LUTDR1840,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2E4 "LUTDR1850,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2E8 "LUTDR1860,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2EC "LUTDR1870,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2F0 "LUTDR1880,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2F4 "LUTDR1890,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2F8 "LUTDR1900,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2FC "LUTDR1910,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x300 "LUTDR1920,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x300 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x300 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x304 "LUTDR1930,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x304 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x304 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x308 "LUTDR1940,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x308 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x308 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x30C "LUTDR1950,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x30C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x30C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x310 "LUTDR1960,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x310 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x310 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x314 "LUTDR1970,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x314 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x314 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x318 "LUTDR1980,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x318 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x318 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x31C "LUTDR1990,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x31C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x31C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x320 "LUTDR2000,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x320 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x320 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x324 "LUTDR2010,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x324 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x324 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x328 "LUTDR2020,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x328 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x328 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x32C "LUTDR2030,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x32C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x32C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x330 "LUTDR2040,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x330 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x330 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x334 "LUTDR2050,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x334 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x334 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x338 "LUTDR2060,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x338 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x338 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x33C "LUTDR2070,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x33C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x33C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x340 "LUTDR2080,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x340 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x340 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x344 "LUTDR2090,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x344 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x344 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x348 "LUTDR2100,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x348 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x348 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x34C "LUTDR2110,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x34C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x34C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x350 "LUTDR2120,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x350 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x350 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x354 "LUTDR2130,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x354 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x354 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x358 "LUTDR2140,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x358 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x358 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x35C "LUTDR2150,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x35C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x35C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x360 "LUTDR2160,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x360 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x360 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x364 "LUTDR2170,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x364 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x364 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x368 "LUTDR2180,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x368 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x368 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x36C "LUTDR2190,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x36C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x36C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x370 "LUTDR2200,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x370 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x370 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x374 "LUTDR2210,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x374 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x374 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x378 "LUTDR2220,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x378 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x378 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x37C "LUTDR2230,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x37C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x37C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x380 "LUTDR2240,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x380 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x380 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x384 "LUTDR2250,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x384 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x384 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x388 "LUTDR2260,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x388 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x388 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x38C "LUTDR2270,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x38C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x38C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x390 "LUTDR2280,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x390 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x390 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x394 "LUTDR2290,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x394 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x394 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x398 "LUTDR2300,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x398 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x398 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x39C "LUTDR2310,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x39C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x39C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3A0 "LUTDR2320,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3A4 "LUTDR2330,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3A8 "LUTDR2340,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3AC "LUTDR2350,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3B0 "LUTDR2360,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3B4 "LUTDR2370,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3B8 "LUTDR2380,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3BC "LUTDR2390,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3C0 "LUTDR2400,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3C4 "LUTDR2410,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3C8 "LUTDR2420,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3CC "LUTDR2430,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3D0 "LUTDR2440,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3D4 "LUTDR2450,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3D8 "LUTDR2460,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3DC "LUTDR2470,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3E0 "LUTDR2480,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3E4 "LUTDR2490,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3E8 "LUTDR2500,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3EC "LUTDR2510,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3F0 "LUTDR2520,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3F4 "LUTDR2530,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3F8 "LUTDR2540,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3FC "LUTDR2550,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x400 "LUTDR2560,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x400 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x400 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x404 "LUTDR2570,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x404 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x404 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x408 "LUTDR2580,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x408 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x408 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x40C "LUTDR2590,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x40C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x40C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x410 "LUTDR2600,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x410 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x410 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x414 "LUTDR2610,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x414 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x414 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x418 "LUTDR2620,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x418 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x418 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x41C "LUTDR2630,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x41C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x41C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x420 "LUTDR2640,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x420 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x420 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x424 "LUTDR2650,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x424 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x424 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x428 "LUTDR2660,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x428 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x428 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x42C "LUTDR2670,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x42C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x42C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x430 "LUTDR2680,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x430 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x430 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x434 "LUTDR2690,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x434 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x434 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x438 "LUTDR2700,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x438 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x438 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x43C "LUTDR2710,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x43C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x43C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x440 "LUTDR2720,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x440 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x440 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x444 "LUTDR2730,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x444 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x444 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x448 "LUTDR2740,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x448 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x448 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x44C "LUTDR2750,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x44C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x44C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x450 "LUTDR2760,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x450 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x450 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x454 "LUTDR2770,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x454 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x454 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x458 "LUTDR2780,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x458 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x458 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x45C "LUTDR2790,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x45C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x45C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x460 "LUTDR2800,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x460 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x460 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x464 "LUTDR2810,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x464 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x464 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x468 "LUTDR2820,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x468 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x468 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x46C "LUTDR2830,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x46C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x46C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x470 "LUTDR2840,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x470 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x470 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x474 "LUTDR2850,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x474 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x474 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x478 "LUTDR2860,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x478 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x478 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x47C "LUTDR2870,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x47C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x47C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x480 "LUTDR2880,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x480 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x480 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x484 "LUTDR2890,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x484 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x484 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x488 "LUTDR2900,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x488 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x488 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x48C "LUTDR2910,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x48C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x48C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x490 "LUTDR2920,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x490 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x490 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x494 "LUTDR2930,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x494 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x494 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x498 "LUTDR2940,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x498 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x498 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x49C "LUTDR2950,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x49C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x49C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4A0 "LUTDR2960,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4A4 "LUTDR2970,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4A8 "LUTDR2980,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4AC "LUTDR2990,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4B0 "LUTDR3000,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4B4 "LUTDR3010,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4B8 "LUTDR3020,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4BC "LUTDR3030,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4C0 "LUTDR3040,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4C4 "LUTDR3050,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4C8 "LUTDR3060,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4CC "LUTDR3070,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4D0 "LUTDR3080,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4D4 "LUTDR3090,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4D8 "LUTDR3100,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4DC "LUTDR3110,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4E0 "LUTDR3120,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4E4 "LUTDR3130,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4E8 "LUTDR3140,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4EC "LUTDR3150,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4F0 "LUTDR3160,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4F4 "LUTDR3170,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4F8 "LUTDR3180,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4FC "LUTDR3190,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x500 "LUTDR3200,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x500 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x500 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x504 "LUTDR3210,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x504 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x504 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x508 "LUTDR3220,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x508 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x508 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x50C "LUTDR3230,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x50C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x50C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x510 "LUTDR3240,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x510 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x510 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x514 "LUTDR3250,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x514 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x514 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x518 "LUTDR3260,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x518 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x518 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x51C "LUTDR3270,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x51C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x51C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x520 "LUTDR3280,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x520 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x520 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x524 "LUTDR3290,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x524 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x524 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x528 "LUTDR3300,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x528 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x528 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x52C "LUTDR3310,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x52C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x52C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x530 "LUTDR3320,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x530 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x530 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x534 "LUTDR3330,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x534 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x534 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x538 "LUTDR3340,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x538 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x538 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x53C "LUTDR3350,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x53C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x53C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x540 "LUTDR3360,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x540 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x540 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x544 "LUTDR3370,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x544 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x544 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x548 "LUTDR3380,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x548 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x548 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x54C "LUTDR3390,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x54C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x54C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x550 "LUTDR3400,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x550 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x550 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x554 "LUTDR3410,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x554 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x554 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x558 "LUTDR3420,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x558 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x558 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x55C "LUTDR3430,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x55C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x55C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x560 "LUTDR3440,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x560 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x560 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x564 "LUTDR3450,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x564 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x564 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x568 "LUTDR3460,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x568 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x568 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x56C "LUTDR3470,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x56C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x56C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x570 "LUTDR3480,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x570 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x570 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x574 "LUTDR3490,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x574 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x574 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x578 "LUTDR3500,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x578 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x578 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x57C "LUTDR3510,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x57C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x57C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x580 "LUTDR3520,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x580 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x580 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x584 "LUTDR3530,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x584 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x584 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x588 "LUTDR3540,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x588 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x588 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x58C "LUTDR3550,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x58C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x58C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x590 "LUTDR3560,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x590 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x590 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x594 "LUTDR3570,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x594 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x594 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x598 "LUTDR3580,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x598 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x598 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x59C "LUTDR3590,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x59C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x59C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5A0 "LUTDR3600,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5A4 "LUTDR3610,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5A8 "LUTDR3620,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5AC "LUTDR3630,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5B0 "LUTDR3640,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5B4 "LUTDR3650,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5B8 "LUTDR3660,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5BC "LUTDR3670,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5C0 "LUTDR3680,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5C4 "LUTDR3690,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5C8 "LUTDR3700,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5CC "LUTDR3710,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5D0 "LUTDR3720,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5D4 "LUTDR3730,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5D8 "LUTDR3740,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5DC "LUTDR3750,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5E0 "LUTDR3760,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5E4 "LUTDR3770,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5E8 "LUTDR3780,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5EC "LUTDR3790,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5F0 "LUTDR3800,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5F4 "LUTDR3810,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5F8 "LUTDR3820,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5FC "LUTDR3830,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x600 "LUTDR3840,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x600 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x600 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x604 "LUTDR3850,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x604 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x604 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x608 "LUTDR3860,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x608 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x608 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x60C "LUTDR3870,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x60C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x60C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x610 "LUTDR3880,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x610 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x610 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x614 "LUTDR3890,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x614 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x614 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x618 "LUTDR3900,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x618 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x618 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x61C "LUTDR3910,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x61C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x61C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x620 "LUTDR3920,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x620 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x620 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x624 "LUTDR3930,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x624 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x624 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x628 "LUTDR3940,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x628 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x628 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x62C "LUTDR3950,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x62C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x62C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x630 "LUTDR3960,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x630 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x630 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x634 "LUTDR3970,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x634 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x634 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x638 "LUTDR3980,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x638 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x638 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x63C "LUTDR3990,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x63C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x63C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x640 "LUTDR4000,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x640 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x640 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x644 "LUTDR4010,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x644 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x644 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x648 "LUTDR4020,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x648 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x648 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x64C "LUTDR4030,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x64C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x64C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x650 "LUTDR4040,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x650 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x650 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x654 "LUTDR4050,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x654 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x654 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x658 "LUTDR4060,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x658 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x658 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x65C "LUTDR4070,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x65C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x65C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x660 "LUTDR4080,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x660 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x660 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x664 "LUTDR4090,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x664 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x664 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x668 "LUTDR4100,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x668 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x668 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x66C "LUTDR4110,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x66C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x66C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x670 "LUTDR4120,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x670 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x670 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x674 "LUTDR4130,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x674 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x674 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x678 "LUTDR4140,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x678 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x678 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x67C "LUTDR4150,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x67C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x67C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x680 "LUTDR4160,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x680 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x680 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x684 "LUTDR4170,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x684 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x684 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x688 "LUTDR4180,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x688 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x688 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x68C "LUTDR4190,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x68C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x68C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x690 "LUTDR4200,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x690 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x690 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x694 "LUTDR4210,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x694 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x694 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x698 "LUTDR4220,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x698 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x698 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x69C "LUTDR4230,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x69C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x69C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6A0 "LUTDR4240,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6A4 "LUTDR4250,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6A8 "LUTDR4260,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6AC "LUTDR4270,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6B0 "LUTDR4280,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6B4 "LUTDR4290,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6B8 "LUTDR4300,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6BC "LUTDR4310,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6C0 "LUTDR4320,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6C4 "LUTDR4330,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6C8 "LUTDR4340,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6CC "LUTDR4350,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6D0 "LUTDR4360,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6D4 "LUTDR4370,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6D8 "LUTDR4380,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6DC "LUTDR4390,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6E0 "LUTDR4400,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6E4 "LUTDR4410,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6E8 "LUTDR4420,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6EC "LUTDR4430,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6F0 "LUTDR4440,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6F4 "LUTDR4450,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6F8 "LUTDR4460,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6FC "LUTDR4470,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x700 "LUTDR4480,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x700 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x700 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x704 "LUTDR4490,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x704 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x704 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x708 "LUTDR4500,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x708 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x708 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x70C "LUTDR4510,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x70C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x70C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x710 "LUTDR4520,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x710 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x710 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x714 "LUTDR4530,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x714 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x714 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x718 "LUTDR4540,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x718 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x718 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x71C "LUTDR4550,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x71C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x71C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x720 "LUTDR4560,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x720 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x720 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x724 "LUTDR4570,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x724 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x724 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x728 "LUTDR4580,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x728 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x728 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x72C "LUTDR4590,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x72C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x72C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x730 "LUTDR4600,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x730 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x730 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x734 "LUTDR4610,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x734 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x734 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x738 "LUTDR4620,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x738 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x738 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x73C "LUTDR4630,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x73C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x73C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x740 "LUTDR4640,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x740 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x740 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x744 "LUTDR4650,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x744 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x744 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x748 "LUTDR4660,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x748 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x748 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x74C "LUTDR4670,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x74C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x74C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x750 "LUTDR4680,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x750 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x750 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x754 "LUTDR4690,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x754 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x754 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x758 "LUTDR4700,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x758 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x758 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x75C "LUTDR4710,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x75C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x75C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x760 "LUTDR4720,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x760 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x760 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x764 "LUTDR4730,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x764 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x764 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x768 "LUTDR4740,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x768 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x768 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x76C "LUTDR4750,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x76C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x76C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x770 "LUTDR4760,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x770 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x770 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x774 "LUTDR4770,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x774 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x774 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x778 "LUTDR4780,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x778 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x778 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x77C "LUTDR4790,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x77C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x77C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x780 "LUTDR4800,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x780 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x780 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x784 "LUTDR4810,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x784 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x784 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x788 "LUTDR4820,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x788 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x788 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x78C "LUTDR4830,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x78C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x78C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x790 "LUTDR4840,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x790 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x790 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x794 "LUTDR4850,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x794 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x794 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x798 "LUTDR4860,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x798 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x798 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x79C "LUTDR4870,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x79C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x79C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7A0 "LUTDR4880,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7A4 "LUTDR4890,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7A8 "LUTDR4900,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7AC "LUTDR4910,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7B0 "LUTDR4920,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7B4 "LUTDR4930,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7B8 "LUTDR4940,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7BC "LUTDR4950,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7C0 "LUTDR4960,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7C4 "LUTDR4970,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7C8 "LUTDR4980,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7CC "LUTDR4990,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7D0 "LUTDR5000,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7D4 "LUTDR5010,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7D8 "LUTDR5020,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7DC "LUTDR5030,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7E0 "LUTDR5040,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7E4 "LUTDR5050,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7E8 "LUTDR5060,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7EC "LUTDR5070,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7F0 "LUTDR5080,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7F4 "LUTDR5090,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7F8 "LUTDR5100,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7FC "LUTDR5110,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x800 "LUTDR5120,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x800 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x800 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x804 "LUTDR5130,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x804 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x804 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x808 "LUTDR5140,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x808 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x808 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x80C "LUTDR5150,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x80C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x80C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x810 "LUTDR5160,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x810 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x810 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x814 "LUTDR5170,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x814 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x814 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x818 "LUTDR5180,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x818 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x818 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x81C "LUTDR5190,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x81C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x81C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x820 "LUTDR5200,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x820 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x820 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x824 "LUTDR5210,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x824 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x824 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x828 "LUTDR5220,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x828 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x828 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x82C "LUTDR5230,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x82C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x82C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x830 "LUTDR5240,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x830 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x830 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x834 "LUTDR5250,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x834 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x834 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x838 "LUTDR5260,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x838 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x838 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x83C "LUTDR5270,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x83C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x83C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x840 "LUTDR5280,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x840 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x840 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x844 "LUTDR5290,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x844 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x844 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x848 "LUTDR5300,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x848 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x848 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x84C "LUTDR5310,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x84C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x84C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x850 "LUTDR5320,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x850 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x850 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x854 "LUTDR5330,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x854 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x854 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x858 "LUTDR5340,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x858 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x858 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x85C "LUTDR5350,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x85C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x85C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x860 "LUTDR5360,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x860 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x860 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x864 "LUTDR5370,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x864 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x864 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x868 "LUTDR5380,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x868 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x868 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x86C "LUTDR5390,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x86C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x86C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x870 "LUTDR5400,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x870 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x870 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x874 "LUTDR5410,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x874 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x874 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x878 "LUTDR5420,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x878 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x878 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x87C "LUTDR5430,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x87C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x87C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x880 "LUTDR5440,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x880 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x880 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x884 "LUTDR5450,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x884 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x884 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x888 "LUTDR5460,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x888 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x888 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x88C "LUTDR5470,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x88C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x88C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x890 "LUTDR5480,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x890 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x890 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x894 "LUTDR5490,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x894 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x894 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x898 "LUTDR5500,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x898 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x898 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x89C "LUTDR5510,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x89C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x89C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8A0 "LUTDR5520,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8A4 "LUTDR5530,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8A8 "LUTDR5540,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8AC "LUTDR5550,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8B0 "LUTDR5560,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8B4 "LUTDR5570,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8B8 "LUTDR5580,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8BC "LUTDR5590,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8C0 "LUTDR5600,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8C4 "LUTDR5610,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8C8 "LUTDR5620,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8CC "LUTDR5630,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8D0 "LUTDR5640,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8D4 "LUTDR5650,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8D8 "LUTDR5660,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8DC "LUTDR5670,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8E0 "LUTDR5680,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8E4 "LUTDR5690,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8E8 "LUTDR5700,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8EC "LUTDR5710,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8F0 "LUTDR5720,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8F4 "LUTDR5730,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8F8 "LUTDR5740,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8FC "LUTDR5750,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x900 "LUTDR5760,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x900 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x900 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x904 "LUTDR5770,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x904 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x904 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x908 "LUTDR5780,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x908 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x908 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x90C "LUTDR5790,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x90C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x90C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x910 "LUTDR5800,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x910 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x910 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x914 "LUTDR5810,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x914 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x914 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x918 "LUTDR5820,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x918 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x918 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x91C "LUTDR5830,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x91C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x91C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x920 "LUTDR5840,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x920 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x920 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x924 "LUTDR5850,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x924 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x924 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x928 "LUTDR5860,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x928 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x928 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x92C "LUTDR5870,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x92C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x92C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x930 "LUTDR5880,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x930 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x930 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x934 "LUTDR5890,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x934 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x934 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x938 "LUTDR5900,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x938 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x938 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x93C "LUTDR5910,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x93C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x93C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x940 "LUTDR5920,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x940 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x940 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x944 "LUTDR5930,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x944 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x944 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x948 "LUTDR5940,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x948 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x948 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x94C "LUTDR5950,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x94C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x94C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x950 "LUTDR5960,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x950 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x950 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x954 "LUTDR5970,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x954 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x954 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x958 "LUTDR5980,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x958 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x958 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x95C "LUTDR5990,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x95C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x95C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x960 "LUTDR6000,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x960 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x960 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x964 "LUTDR6010,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x964 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x964 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x968 "LUTDR6020,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x968 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x968 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x96C "LUTDR6030,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x96C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x96C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x970 "LUTDR6040,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x970 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x970 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x974 "LUTDR6050,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x974 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x974 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x978 "LUTDR6060,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x978 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x978 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x97C "LUTDR6070,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x97C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x97C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x980 "LUTDR6080,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x980 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x980 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x984 "LUTDR6090,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x984 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x984 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x988 "LUTDR6100,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x988 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x988 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x98C "LUTDR6110,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x98C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x98C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x990 "LUTDR6120,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x990 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x990 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x994 "LUTDR6130,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x994 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x994 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x998 "LUTDR6140,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x998 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x998 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x99C "LUTDR6150,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x99C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x99C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9A0 "LUTDR6160,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9A4 "LUTDR6170,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9A8 "LUTDR6180,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9AC "LUTDR6190,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9B0 "LUTDR6200,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9B4 "LUTDR6210,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9B8 "LUTDR6220,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9BC "LUTDR6230,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9C0 "LUTDR6240,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9C4 "LUTDR6250,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9C8 "LUTDR6260,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9CC "LUTDR6270,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9D0 "LUTDR6280,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9D4 "LUTDR6290,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9D8 "LUTDR6300,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9DC "LUTDR6310,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9E0 "LUTDR6320,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9E4 "LUTDR6330,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9E8 "LUTDR6340,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9EC "LUTDR6350,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9F0 "LUTDR6360,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9F4 "LUTDR6370,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9F8 "LUTDR6380,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9FC "LUTDR6390,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA00 "LUTDR6400,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA04 "LUTDR6410,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA08 "LUTDR6420,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA0C "LUTDR6430,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA10 "LUTDR6440,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA14 "LUTDR6450,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA18 "LUTDR6460,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA1C "LUTDR6470,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA20 "LUTDR6480,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA24 "LUTDR6490,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA28 "LUTDR6500,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA2C "LUTDR6510,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA30 "LUTDR6520,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA34 "LUTDR6530,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA38 "LUTDR6540,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA3C "LUTDR6550,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA40 "LUTDR6560,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA44 "LUTDR6570,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA48 "LUTDR6580,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA4C "LUTDR6590,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA50 "LUTDR6600,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA54 "LUTDR6610,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA58 "LUTDR6620,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA5C "LUTDR6630,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA60 "LUTDR6640,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA64 "LUTDR6650,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA68 "LUTDR6660,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA6C "LUTDR6670,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA70 "LUTDR6680,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA74 "LUTDR6690,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA78 "LUTDR6700,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA7C "LUTDR6710,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA80 "LUTDR6720,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA84 "LUTDR6730,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA88 "LUTDR6740,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA8C "LUTDR6750,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA90 "LUTDR6760,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA94 "LUTDR6770,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA98 "LUTDR6780,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA9C "LUTDR6790,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAA0 "LUTDR6800,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAA4 "LUTDR6810,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAA8 "LUTDR6820,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAAC "LUTDR6830,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAB0 "LUTDR6840,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAB4 "LUTDR6850,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAB8 "LUTDR6860,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xABC "LUTDR6870,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xABC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xABC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAC0 "LUTDR6880,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAC4 "LUTDR6890,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAC8 "LUTDR6900,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xACC "LUTDR6910,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xACC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xACC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAD0 "LUTDR6920,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAD4 "LUTDR6930,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAD8 "LUTDR6940,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xADC "LUTDR6950,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xADC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xADC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAE0 "LUTDR6960,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAE4 "LUTDR6970,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAE8 "LUTDR6980,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAEC "LUTDR6990,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAF0 "LUTDR7000,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAF4 "LUTDR7010,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAF8 "LUTDR7020,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAFC "LUTDR7030,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB00 "LUTDR7040,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB04 "LUTDR7050,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB08 "LUTDR7060,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB0C "LUTDR7070,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB10 "LUTDR7080,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB14 "LUTDR7090,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB18 "LUTDR7100,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB1C "LUTDR7110,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB20 "LUTDR7120,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB24 "LUTDR7130,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB28 "LUTDR7140,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB2C "LUTDR7150,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB30 "LUTDR7160,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB34 "LUTDR7170,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB38 "LUTDR7180,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB3C "LUTDR7190,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB40 "LUTDR7200,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB44 "LUTDR7210,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB48 "LUTDR7220,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB4C "LUTDR7230,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB50 "LUTDR7240,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB54 "LUTDR7250,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB58 "LUTDR7260,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB5C "LUTDR7270,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB60 "LUTDR7280,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB64 "LUTDR7290,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB68 "LUTDR7300,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB6C "LUTDR7310,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB70 "LUTDR7320,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB74 "LUTDR7330,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB78 "LUTDR7340,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB7C "LUTDR7350,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB80 "LUTDR7360,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB84 "LUTDR7370,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB88 "LUTDR7380,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB8C "LUTDR7390,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB90 "LUTDR7400,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB94 "LUTDR7410,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB98 "LUTDR7420,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB9C "LUTDR7430,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBA0 "LUTDR7440,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBA4 "LUTDR7450,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBA8 "LUTDR7460,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBAC "LUTDR7470,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBB0 "LUTDR7480,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBB4 "LUTDR7490,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBB8 "LUTDR7500,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBBC "LUTDR7510,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBC0 "LUTDR7520,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBC4 "LUTDR7530,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBC8 "LUTDR7540,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBCC "LUTDR7550,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBD0 "LUTDR7560,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBD4 "LUTDR7570,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBD8 "LUTDR7580,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBDC "LUTDR7590,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBE0 "LUTDR7600,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBE4 "LUTDR7610,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBE8 "LUTDR7620,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBEC "LUTDR7630,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBF0 "LUTDR7640,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBF4 "LUTDR7650,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBF8 "LUTDR7660,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBFC "LUTDR7670,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC00 "LUTDR7680,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC04 "LUTDR7690,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC08 "LUTDR7700,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC0C "LUTDR7710,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC10 "LUTDR7720,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC14 "LUTDR7730,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC18 "LUTDR7740,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC1C "LUTDR7750,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC20 "LUTDR7760,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC24 "LUTDR7770,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC28 "LUTDR7780,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC2C "LUTDR7790,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC30 "LUTDR7800,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC34 "LUTDR7810,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC38 "LUTDR7820,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC3C "LUTDR7830,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC40 "LUTDR7840,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC44 "LUTDR7850,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC48 "LUTDR7860,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC4C "LUTDR7870,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC50 "LUTDR7880,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC54 "LUTDR7890,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC58 "LUTDR7900,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC5C "LUTDR7910,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC60 "LUTDR7920,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC64 "LUTDR7930,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC68 "LUTDR7940,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC6C "LUTDR7950,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC70 "LUTDR7960,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC74 "LUTDR7970,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC78 "LUTDR7980,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC7C "LUTDR7990,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC80 "LUTDR8000,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC84 "LUTDR8010,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC88 "LUTDR8020,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC8C "LUTDR8030,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC90 "LUTDR8040,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC94 "LUTDR8050,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC98 "LUTDR8060,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC9C "LUTDR8070,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCA0 "LUTDR8080,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCA4 "LUTDR8090,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCA8 "LUTDR8100,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCAC "LUTDR8110,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCB0 "LUTDR8120,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCB4 "LUTDR8130,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCB8 "LUTDR8140,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCBC "LUTDR8150,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCC0 "LUTDR8160,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCC4 "LUTDR8170,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCC8 "LUTDR8180,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCCC "LUTDR8190,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCD0 "LUTDR8200,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCD4 "LUTDR8210,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCD8 "LUTDR8220,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCDC "LUTDR8230,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCE0 "LUTDR8240,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCE4 "LUTDR8250,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCE8 "LUTDR8260,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCEC "LUTDR8270,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCF0 "LUTDR8280,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCF4 "LUTDR8290,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCF8 "LUTDR8300,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCFC "LUTDR8310,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD00 "LUTDR8320,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD04 "LUTDR8330,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD08 "LUTDR8340,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD0C "LUTDR8350,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD10 "LUTDR8360,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD14 "LUTDR8370,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD18 "LUTDR8380,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD1C "LUTDR8390,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD20 "LUTDR8400,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD24 "LUTDR8410,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD28 "LUTDR8420,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD2C "LUTDR8430,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD30 "LUTDR8440,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD34 "LUTDR8450,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD38 "LUTDR8460,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD3C "LUTDR8470,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD40 "LUTDR8480,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD44 "LUTDR8490,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD48 "LUTDR8500,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD4C "LUTDR8510,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD50 "LUTDR8520,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD54 "LUTDR8530,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD58 "LUTDR8540,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD5C "LUTDR8550,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD60 "LUTDR8560,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD64 "LUTDR8570,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD68 "LUTDR8580,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD6C "LUTDR8590,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD70 "LUTDR8600,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD74 "LUTDR8610,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD78 "LUTDR8620,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD7C "LUTDR8630,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD80 "LUTDR8640,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD84 "LUTDR8650,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD88 "LUTDR8660,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD8C "LUTDR8670,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD90 "LUTDR8680,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD94 "LUTDR8690,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD98 "LUTDR8700,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD9C "LUTDR8710,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDA0 "LUTDR8720,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDA4 "LUTDR8730,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDA8 "LUTDR8740,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDAC "LUTDR8750,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDB0 "LUTDR8760,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDB4 "LUTDR8770,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDB8 "LUTDR8780,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDBC "LUTDR8790,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDC0 "LUTDR8800,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDC4 "LUTDR8810,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDC8 "LUTDR8820,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDCC "LUTDR8830,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDD0 "LUTDR8840,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDD4 "LUTDR8850,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDD8 "LUTDR8860,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDDC "LUTDR8870,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDE0 "LUTDR8880,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDE4 "LUTDR8890,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDE8 "LUTDR8900,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDEC "LUTDR8910,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDF0 "LUTDR8920,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDF4 "LUTDR8930,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDF8 "LUTDR8940,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDFC "LUTDR8950,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE00 "LUTDR8960,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE04 "LUTDR8970,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE08 "LUTDR8980,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE0C "LUTDR8990,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE10 "LUTDR9000,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE14 "LUTDR9010,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE18 "LUTDR9020,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE1C "LUTDR9030,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE20 "LUTDR9040,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE24 "LUTDR9050,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE28 "LUTDR9060,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE2C "LUTDR9070,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE30 "LUTDR9080,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE34 "LUTDR9090,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE38 "LUTDR9100,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE3C "LUTDR9110,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE40 "LUTDR9120,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE44 "LUTDR9130,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE48 "LUTDR9140,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE4C "LUTDR9150,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE50 "LUTDR9160,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE54 "LUTDR9170,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE58 "LUTDR9180,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE5C "LUTDR9190,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE60 "LUTDR9200,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE64 "LUTDR9210,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE68 "LUTDR9220,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE6C "LUTDR9230,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE70 "LUTDR9240,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE74 "LUTDR9250,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE78 "LUTDR9260,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE7C "LUTDR9270,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE80 "LUTDR9280,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE84 "LUTDR9290,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE88 "LUTDR9300,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE8C "LUTDR9310,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE90 "LUTDR9320,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE94 "LUTDR9330,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE98 "LUTDR9340,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE9C "LUTDR9350,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEA0 "LUTDR9360,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEA4 "LUTDR9370,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEA8 "LUTDR9380,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEAC "LUTDR9390,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEB0 "LUTDR9400,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEB4 "LUTDR9410,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEB8 "LUTDR9420,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEBC "LUTDR9430,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEC0 "LUTDR9440,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEC4 "LUTDR9450,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEC8 "LUTDR9460,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xECC "LUTDR9470,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xECC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xECC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xED0 "LUTDR9480,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xED0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xED0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xED4 "LUTDR9490,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xED4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xED4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xED8 "LUTDR9500,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xED8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xED8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEDC "LUTDR9510,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEE0 "LUTDR9520,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEE4 "LUTDR9530,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEE8 "LUTDR9540,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEEC "LUTDR9550,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEF0 "LUTDR9560,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEF4 "LUTDR9570,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEF8 "LUTDR9580,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEFC "LUTDR9590,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF00 "LUTDR9600,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF04 "LUTDR9610,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF08 "LUTDR9620,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF0C "LUTDR9630,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF10 "LUTDR9640,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF14 "LUTDR9650,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF18 "LUTDR9660,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF1C "LUTDR9670,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF20 "LUTDR9680,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF24 "LUTDR9690,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF28 "LUTDR9700,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF2C "LUTDR9710,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF30 "LUTDR9720,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF34 "LUTDR9730,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF38 "LUTDR9740,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF3C "LUTDR9750,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF40 "LUTDR9760,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF44 "LUTDR9770,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF48 "LUTDR9780,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF4C "LUTDR9790,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF50 "LUTDR9800,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF54 "LUTDR9810,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF58 "LUTDR9820,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF5C "LUTDR9830,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF60 "LUTDR9840,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF64 "LUTDR9850,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF68 "LUTDR9860,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF6C "LUTDR9870,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF70 "LUTDR9880,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF74 "LUTDR9890,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF78 "LUTDR9900,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF7C "LUTDR9910,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF80 "LUTDR9920,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF84 "LUTDR9930,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF88 "LUTDR9940,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF8C "LUTDR9950,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF90 "LUTDR9960,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF94 "LUTDR9970,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF98 "LUTDR9980,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF9C "LUTDR9990,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFA0 "LUTDR10000,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFA4 "LUTDR10010,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFA8 "LUTDR10020,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFAC "LUTDR10030,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFB0 "LUTDR10040,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFB4 "LUTDR10050,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFB8 "LUTDR10060,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFBC "LUTDR10070,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFC0 "LUTDR10080,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFC4 "LUTDR10090,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFC8 "LUTDR10100,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFCC "LUTDR10110,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFD0 "LUTDR10120,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFD4 "LUTDR10130,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFD8 "LUTDR10140,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFDC "LUTDR10150,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFE0 "LUTDR10160,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFE4 "LUTDR10170,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFE8 "LUTDR10180,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFEC "LUTDR10190,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFF0 "LUTDR10200,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFF4 "LUTDR10210,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFF8 "LUTDR10220,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFFC "LUTDR10230,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
tree.end
tree "IMR_LX_1"
base ad:0xFE870000
group.long 0x8++0x3
line.long 0x0 "CR1,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "SWRST,Software Reset" "0: Cancels a software reset for this module,1: Applies a software reset to this module"
newline
hexmask.long.word 0x0 1.--14. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "RS,Rendering Start" "0: Does not start rendering,1: Starts rendering"
rgroup.long 0xC++0x3
line.long 0x0 "SR1,"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "WERR,Indicates that this module has received the WUP signal from another module while it is not executing a display list. This bit is cleared to 0 by writing 1 to the WERRCLR bit in SRCR." "0: This module has not received the WUP signal..,1: This module has received the WUP signal while it.."
newline
bitfld.long 0x0 10. "WOVF,Indicates that the number of WUP signals this module has received but not processed has exceeded the maximum number allowed. The maximum number in this product is 1. This bit is cleared to 0 by writing 1 to the WOVFCLR bit in SRCR." "0: The number of WUP signals that have not been..,1: The number of WUP signals that have not been.."
hexmask.long.byte 0x0 6.--9. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "REN,Rendering-in-Progress Flag" "0: Rendering is not in progress,1: Rendering is in progress"
bitfld.long 0x0 3.--4. "Reserved_3,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 2. "INT,INT Instruction Decode" "0: The INT instruction in the DL has not been decoded,1: The INT instruction in the DL has been decoded"
bitfld.long 0x0 1. "IER,Illegal Instruction Decode" "0: No illegal instruction has been decoded in the DL,1: An illegal instruction has been decoded in the DL"
newline
bitfld.long 0x0 0. "TRA,Trap" "0: Rendering has not been started or is in progress,1: The TRAP instruction has been decoded and.."
group.long 0x10++0xB
line.long 0x0 "SRCR1,Writing 1 to a bit in SRCR clears the corresponding status bit in the status register (SR)."
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "WERRCLR,Writing 1 to this bit clears the WERR bit in SR." "0,1"
newline
bitfld.long 0x0 10. "WOVFCLR,Writing 1 to this bit clears the WOVF bit in SR." "0,1"
hexmask.long.byte 0x0 3.--9. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTCLR,Writing 1 to this bit clears the INT bit in SR." "0,1"
bitfld.long 0x0 1. "IERCLR,Writing 1 to this bit clears the IER bit in SR." "0,1"
newline
bitfld.long 0x0 0. "TRACLR,Writing 1 to this bit clears the TRA bit in SR." "0,1"
line.long 0x4 "ICR1,The effective bits in the ICR are used to enable setting of the corresponding bit in the status register (SR) in response to the corresponding interrupt sources. To allow the generation of an interrupt. this register should be set to enable setting.."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x4 11. "WERRENB,0: Disables the generation of an interrupt when this module receives the WUP signal from another module while it is not executing a display list." "0: Disables the generation of an interrupt when..,1: Enables the generation of an interrupt when this.."
newline
bitfld.long 0x4 10. "WOVFENB,0: Disables the generation of an interrupt when the number of WUP signals this module has received but not processed exceeds the maximum number allowed." "0: Disables the generation of an interrupt when the..,1: Enables the generation of an interrupt when the.."
hexmask.long.byte 0x4 5.--9. 1. "Reserved_5,Reserved"
newline
rbitfld.long 0x4 3.--4. "Reserved_3,Reserved" "0,1,2,3"
bitfld.long 0x4 2. "INTENB,0: Disables the generation of INT interrupts." "0: Disables the generation of INT interrupts,1: Enables the generation of an interrupt when an.."
newline
bitfld.long 0x4 1. "IERENB,0: Disables the generation of IER interrupts generation." "0: Disables the generation of IER interrupts..,1: Enables the generation of an interrupt when an.."
bitfld.long 0x4 0. "TRAENB,0: Disables the generation of TRAP interrupts." "0: Disables the generation of TRAP interrupts,1: Enables the generation of an interrupt when a.."
line.long 0x8 "IMR1,The effective bits in the IMR are used for masking or non-masking of the output of the corresponding interrupt to the interrupt controller when the corresponding interrupt source bits are set in the SR. To allow interrupt generation. this register.."
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x8 11. "WERRM,0: The generation of interrupts when this module receives the WUP signal from another module while it is not executing a display list is not masked." "0: The generation of interrupts when this module..,1: The generation of interrupts when this module.."
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bitfld.long 0x8 10. "WOVFM,0: The generation of interrupts when the number of WUP signals this module has received but not processed exceeds the maximum number allowed is not masked." "0: The generation of interrupts when the number of..,1: The generation of interrupts when the number of.."
hexmask.long.byte 0x8 5.--9. 1. "Reserved_5,Reserved"
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rbitfld.long 0x8 3.--4. "Reserved_3,Reserved" "0,1,2,3"
bitfld.long 0x8 2. "INM,0: The generation of INT interrupts is not masked." "0: The generation of INT interrupts is not masked,1: The generation of INT interrupts is masked"
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bitfld.long 0x8 1. "IEM,0: The generation of IER interrupts is not masked." "0: The generation of IER interrupts is not masked,1: The generation of IER interrupts is masked"
bitfld.long 0x8 0. "TRAM,0: The generation of TRAP interrupts is not masked." "0: The generation of TRAP interrupts is not masked,1: The generation of TRAP interrupts is masked"
rgroup.long 0x1C++0x7
line.long 0x0 "DLSP1,"
hexmask.long 0x0 0.--31. 1. "DLSP,DL Stack Pointer"
line.long 0x4 "DLPR1,"
hexmask.long 0x4 0.--31. 1. "DLP,DL Pointer"
group.long 0x28++0x3
line.long 0x0 "EDLR1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "EDL,Executed DL Status"
group.long 0x30++0x13
line.long 0x0 "DLSAR1,"
hexmask.long 0x0 0.--31. 1. "DLSA,DL Start Address"
line.long 0x4 "DSAR1,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long 0x4 6.--31. 1. "DSA,Destination Start Address"
hexmask.long.byte 0x4 0.--5. 1. "Reserved_0,Reserved"
line.long 0x8 "SSAR1,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x8 8.--31. 1. "SSAR,SRC Start Address"
bitfld.long 0x8 6.--7. "Reserved_6,Reserved" "0,1,2,3"
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hexmask.long.byte 0x8 0.--5. 1. "Reserved_0,Reserved"
line.long 0xC "DSTR1,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.word 0xC 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0xC 0.--16. 1. "DST,Specifies the memory width of the DST area in bytes within a range from 64 to 65 536 bytes in 64-byte alignment. In tile addressing mode  quadruple the value of the setting is used as the memory width. To modify the value during execution  execute.."
line.long 0x10 "SSTR1,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.word 0x10 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x10 0.--16. 1. "SSTR,Specifies the memory width of the SRC area in bytes within a range from 256 to 65 536 bytes in 256-byte alignment in the linear addressing mode when reading texture data from the external memory. In tile addressing mode  quadruple the value of the.."
group.long 0x50++0x3
line.long 0x0 "DSOR1,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long 0x0 5.--31. 1. "DSOFSTA,In Y/UV separate output mode  set an offset value for the UV output destination address that corresponds to the output destination address of Y. The offset must be a signed 32-bit value. Specify the value in 64-byte alignment."
hexmask.long.byte 0x0 0.--4. 1. "Reserved_0,Reserved"
rgroup.long 0x54++0x3
line.long 0x0 "CMRCR1,CMRCR indicates the output mode. bit precision. and correction mode for the drawing results. To set each bit in this register to 1. write 1 to the corresponding bit in CMRCSR. To clear each bit to 0. write 1 to the corresponding bit in CMRCCR."
bitfld.long 0x0 31. "EFPE,Enables or disables the extended filtering pipeline." "0: Disabled,1: Enabled"
bitfld.long 0x0 30. "CP32E,Copy 32-bit mode" "0: Disables copying 32-bit data,1: Enables copying 32-bit data"
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bitfld.long 0x0 28.--29. "SUV1416,Specifies the pixel format of the hue of the source data as 14 or 16 bpp or makes neither specification." "0: Does not specify the format as 14 or 16 bpp,?,?,?"
bitfld.long 0x0 26.--27. "DUV1416,Specifies the pixel format of the hue of the destination data as 14 or 16 bpp or makes neither specification." "0: Does not specify the format as 14 or 16 bpp,?,?,?"
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bitfld.long 0x0 24.--25. "SY1416,Specifies the pixel format of the luminance of the source data as 14 or 16 bpp or makes neither specification." "0: Does not specify the format as 14 or 16 bpp,?,?,?"
bitfld.long 0x0 22.--23. "DY1416,Specifies the pixel format of the luminance of the destination data as 14 or 16 bpp or makes neither specification." "0: Does not specify the format as 14 or 16 bpp,?,?,?"
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bitfld.long 0x0 20.--21. "Reserved_20,Reserved" "0,1,2,3"
bitfld.long 0x0 19. "CLSM,Hue Correction Scale Parameter Register Specification Mode" "0: Uses the hue correction scale parameters..,1: Uses the hue correction scale parameters.."
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bitfld.long 0x0 18. "CLOM,Hue Correction Offset Parameter Register Specification Mode" "0: Uses the hue correction offset parameters..,1: Uses the hue correction offset parameters.."
bitfld.long 0x0 17. "LUSM,Luminance Correction Scale Parameter Register Specification Mode" "0: Uses the luminance correction scale parameters..,1: Uses the luminance correction scale parameter.."
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bitfld.long 0x0 16. "LUOM,Luminance Correction Offset Parameter Register Specification Mode" "0: Uses the luminance correction offset parameters..,1: Uses the luminance correction offset parameter.."
bitfld.long 0x0 15. "CP16E,Copy 16-bit mode" "0: Disables copying 16-bit data,1: Enables copying 16-bit data"
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bitfld.long 0x0 14. "YCM,YC Mode" "0: Processes Y,1: Processes UV"
bitfld.long 0x0 13. "UVS,Specifies whether the input UV plane is in YUV420 format." "0: The input UV plane is not in YUV420 format,1: The input UV plane is in YUV420 format"
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bitfld.long 0x0 12. "SY12,Specifies the precision of luminance processing of source data." "0: 8-bpp precision or 10-bpp precision,1: 12-bpp precision"
bitfld.long 0x0 11. "SY10,Specifies the precision of luminance processing of source data." "0: 8-bpp precision or 12-bpp precision,1: 10-bpp precision"
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bitfld.long 0x0 10. "YOM,Output only Y data and discard U/V data." "0,1"
bitfld.long 0x0 9. "Y12,Set this bit when Y data is output in 12-bpp precision." "0: Outputs Y data in 8- or 10-bpp precision,1: Outputs Y data in 12-bpp precision"
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bitfld.long 0x0 8. "Y10,Set this bit when Y data is output in 10-bpp precision." "0: Outputs Y data in 8- or 12-bpp precision,1: Outputs Y data in 10-bpp precision"
bitfld.long 0x0 7. "YISM,Selects the output format for YUV data." "0: Produces the interleave output of YUV data,1: Produces the separate output of Y/UV data"
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bitfld.long 0x0 5.--6. "SUV,Specifies the precision of color difference processing of source data." "0: 8-bpp precision,1: 10-bpp precision,?,?"
bitfld.long 0x0 3.--4. "DUV,Specifies the precision of color difference of output data." "0: Outputs UV data in 8-bpp precision,1: Outputs UV data in 10-bpp precision,?,?"
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bitfld.long 0x0 2. "CLCE,Hue Correction Enable" "0: Disables hue correction,1: Enables hue correction"
bitfld.long 0x0 1. "LUCE,Luminance Correction Enable" "0: Disables luminance correction,1: Enables luminance correction"
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bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x58++0x7
line.long 0x0 "CMRCSR1,"
bitfld.long 0x0 31. "EFPES,0: The EFPE bit in CMRCR is not set to 1." "0: The EFPE bit in CMRCR is not set to 1,1: The EFPE bit in CMRCR is set to 1"
bitfld.long 0x0 30. "CP32ES,0: The CP32E bit in CMRCR is not set to 1." "0: The CP32E bit in CMRCR is not set to 1,1: The CP32E bit in CMRCR is set to 1"
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bitfld.long 0x0 28.--29. "SUV1416S,00: Neither of the SUV1416 bits in CMRCR is set to 1." "0: Neither of the SUV1416 bits in CMRCR is set to 1,1: Sets bit 0 of the SUV1416 bits in CMRCR to 1,?,?"
bitfld.long 0x0 26.--27. "DUV1416S,00: Neither of the DUV1416 bits in CMRCR is set to 1." "0: Neither of the DUV1416 bits in CMRCR is set to 1,1: Sets bit 0 of the DUV1416 bits in CMRCR to 1,?,?"
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bitfld.long 0x0 24.--25. "SY1416S,00: Neither of the SY1416 bits in CMRCR is set to 1." "0: Neither of the SY1416 bits in CMRCR is set to 1,1: Sets bit 0 of the SY1416 bits in CMRCR to 1,?,?"
bitfld.long 0x0 22.--23. "DY1416S,00: Neither of the DY1416 bits in CMRCR is set to 1." "0: Neither of the DY1416 bits in CMRCR is set to 1,1: Sets bit 0 of the DY1416 bits in CMRCR to 1,?,?"
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rbitfld.long 0x0 20.--21. "Reserved_20,Reserved" "0,1,2,3"
bitfld.long 0x0 19. "CLSMS,0: The CLSM bit in CMRCR is not set to 1." "0: The CLSM bit in CMRCR is not set to 1,1: The CLSM bit in CMRCR is set to 1"
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bitfld.long 0x0 18. "CLOMS,0: The CLOM bit in CMRCR is not set to 1." "0: The CLOM bit in CMRCR is not set to 1,1: The CLOM bit in CMRCR is set to 1"
bitfld.long 0x0 17. "LUSMS,0: The LUSM bit in CMRCR is not set to 1." "0: The LUSM bit in CMRCR is not set to 1,1: The LUSM bit in CMRCR is set to 1"
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bitfld.long 0x0 16. "LUOMS,0: The LUOM bit in CMRCR is not set to 1." "0: The LUOM bit in CMRCR is not set to 1,1: The LUOM bit in CMRCR is set to 1"
bitfld.long 0x0 15. "CP16ES,0: The CP16E bit in CMRCR is not set to 1." "0: The CP16E bit in CMRCR is not set to 1,1: The CP16E bit in CMRCR is set to 1"
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bitfld.long 0x0 14. "YCMS,0: The YCM bit in CMRCR is not set to 1." "0: The YCM bit in CMRCR is not set to 1,1: The YCM to bit in CMRCR is set to 1"
bitfld.long 0x0 13. "UVSS,0: The UVS bit in CMRCR is not set to 1." "0: The UVS bit in CMRCR is not set to 1,1: The UVS bit in CMRCR is set to 1"
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bitfld.long 0x0 12. "SY12S,0: The SY12 bit in CMRCR is not set to 1." "0: The SY12 bit in CMRCR is not set to 1,1: The SY12 bit in CMRCR is set to 1"
bitfld.long 0x0 11. "SY10S,0: The SY10 bit in CMRCR is not set to 1." "0: The SY10 bit in CMRCR is not set to 1,1: The SY10 bit in CMRCR is set to 1"
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bitfld.long 0x0 10. "YOMS,0: The YOM bit in CMRCR is not set to 1." "0: The YOM bit in CMRCR is not set to 1,1: The YOM bit in CMRCR is set to 1"
bitfld.long 0x0 9. "Y12S,0: The Y12 bit in CMRCR is not set to 1." "0: The Y12 bit in CMRCR is not set to 1,1: The Y12 bit in CMRCR is set to 1"
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bitfld.long 0x0 8. "Y10S,0: The Y10 bit in CMRCR is not set to 1." "0: The Y10 bit in CMRCR is not set to 1,1: The Y10 bit in CMRCR is set to 1"
bitfld.long 0x0 7. "YISMS,0: The YISM bit in CMRCR is not set to 1." "0: The YISM bit in CMRCR is not set to 1,1: The YISM bit in CMRCR is set to 1"
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bitfld.long 0x0 5.--6. "SUVS,00: Neither of the SUV bits in CMRCR is set to 1." "0: Neither of the SUV bits in CMRCR is set to 1,1: Sets bit 0 of the SUV bits in CMRCR to 1,?,?"
bitfld.long 0x0 3.--4. "DUVS,00: Neither of the DUV bits in CMRCR is set to 1." "0: Neither of the DUV bits in CMRCR is set to 1,1: Sets bit 0 of the DUV bits in CMRCR to 1,?,?"
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bitfld.long 0x0 2. "CLCES,0: The CLCE bit in CMRCR is not set to 1." "0: The CLCE bit in CMRCR is not set to 1,1: The CLCE bit in CMRCR is set to 1"
bitfld.long 0x0 1. "LUCES,0: The LUCE bit in CMRCR is not set to 1." "0: The LUCE bit in CMRCR is not set to 1,1: The LUCE bit in CMRCR is set to 1"
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rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "CMRCCR1,CMRCCR is used to clear the corresponding bits of the rendering mode register (CMRCR). To disable the modes and functions selected by the bits in CMRCR. write 1 to the corresponding bits in this register."
bitfld.long 0x4 31. "EFPEC,0: Does not clear the EFPE bit in CMRCR to 0." "0: Does not clear the EFPE bit in CMRCR to 0,1: Clears the EFPE bit in CMRCR to 0"
bitfld.long 0x4 30. "CP32EC,0: Does not clear the CP32E bit in CMRCR to 0." "0: Does not clear the CP32E bit in CMRCR to 0,1: Clears the CP32E bit in CMRCR to 0"
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bitfld.long 0x4 28.--29. "SUV1416C,00: Does not clear either of the SUV1416 bits in CMRCR to 0." "0: Does not clear either of the SUV1416 bits in..,1: Clears bit 0 of the SUV1416 bits in CMRCR to 0,?,?"
bitfld.long 0x4 26.--27. "DUV1416C,00: Does not clear either of the DUV1416 bits in CMRCR to 0." "0: Does not clear either of the DUV1416 bits in..,1: Clears bit 0 of the DUV1416 bits in CMRCR to 0,?,?"
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bitfld.long 0x4 24.--25. "SY1416C,00: Does not clear either of the SY1416 bits in CMRCR to 0." "0: Does not clear either of the SY1416 bits in..,1: Clears bit 0 of the SY1416 bits in CMRCR to 0,?,?"
bitfld.long 0x4 22.--23. "DY1416C,00: Does not clear either of the DY1416 bits in CMRCR to 0." "0: Does not clear either of the DY1416 bits in..,1: Clears bit 0 of the DY1416 bits in CMRCR to 0,?,?"
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rbitfld.long 0x4 20.--21. "Reserved_20,Reserved" "0,1,2,3"
bitfld.long 0x4 19. "CLSMC,0: Does not clear the CLSM bit in CMRCR to 0." "0: Does not clear the CLSM bit in CMRCR to 0,1: Clears the CLSM bit in CMRCR to 0"
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bitfld.long 0x4 18. "CLOMC,0: Does not clear the CLOM bit in CMRCR to 0." "0: Does not clear the CLOM bit in CMRCR to 0,1: Clears the CLOM bit in CMRCR to 0"
bitfld.long 0x4 17. "LUSMC,0: Does not clear the LUSM bit in CMRCR to 0." "0: Does not clear the LUSM bit in CMRCR to 0,1: Clears the LUSM bit in CMRCR to 0"
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bitfld.long 0x4 16. "LUOMC,0: Does not clear the LUOM bit in CMRCR to 0." "0: Does not clear the LUOM bit in CMRCR to 0,1: Clears the LUOM bit in CMRCR to 0"
bitfld.long 0x4 15. "CP16EC,0: Does not clear the CP16E bit in CMRCR to 0." "0: Does not clear the CP16E bit in CMRCR to 0,1: Clears the CP16E bit in CMRCR to 0"
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bitfld.long 0x4 14. "YCMC,0: Does not clear the YCM bit in CMRCR to 0." "0: Does not clear the YCM bit in CMRCR to 0,1: Clears the YCM bit in CMRCR to 0"
bitfld.long 0x4 13. "UVSC,0: Does not clear the UVS bit in CMRCR to 0." "0: Does not clear the UVS bit in CMRCR to 0,1: Clears the UVS bit in CMRCR to 0"
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bitfld.long 0x4 12. "SY12C,0: Does not clear the SY12 bit in CMRCR to 0." "0: Does not clear the SY12 bit in CMRCR to 0,1: Clears the SY12 bit in CMRCR to 0"
bitfld.long 0x4 11. "SY10C,0: Does not clear the SY10 bit in CMRCR to 0." "0: Does not clear the SY10 bit in CMRCR to 0,1: Clears the SY10 bit in CMRCR to 0"
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bitfld.long 0x4 10. "YOMC,0: Does not clear the YOM bit in CMRCR to 0." "0: Does not clear the YOM bit in CMRCR to 0,1: Clears the YOM bit in CMRCR to 0"
bitfld.long 0x4 9. "Y12C,0: Does not clear the Y12 bit in CMRCR to 0." "0: Does not clear the Y12 bit in CMRCR to 0,1: Clears the Y12 bit in CMRCR to 0"
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bitfld.long 0x4 8. "Y10C,0: Does not clear the Y10 bit in CMRCR to 0." "0: Does not clear the Y10 bit in CMRCR to 0,1: Clears the Y10 bit in CMRCR to 0"
bitfld.long 0x4 7. "YISMC,0: Does not clear the YISM bit in CMRCR to 0." "0: Does not clear the YISM bit in CMRCR to 0,1: Clears the YISM bit in CMRCR to 0"
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bitfld.long 0x4 5.--6. "SUVC,00: Does not clear either of the SUV bits in CMRCR to 0." "0: Does not clear either of the SUV bits in CMRCR..,1: Clears bit 0 of the SUV bits in CMRCR to 0,?,?"
bitfld.long 0x4 3.--4. "DUVC,00: Does not clear either of the DUV bit in CMRCR to 0." "0: Does not clear either of the DUV bit in CMRCR to 0,1: Clears bit 0 of the DUV bits in CMRCR to 0,?,?"
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bitfld.long 0x4 2. "CLCEC,0: Does not clear the CLCE bit in CMRCR to 0." "0: Does not clear the CLCE bit in CMRCR to 0,1: Clears the CLCE bit in CMRCR to 0"
bitfld.long 0x4 1. "LUCEC,0: Does not clear the LUCE bit in CMRCR to 0." "0: Does not clear the LUCE bit in CMRCR to 0,1: Clears the LUCE bit in CMRCR to 0"
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rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x60++0x3
line.long 0x0 "TRIMR1,TRIMR is used to select the various triangle drawing modes including coordinate generation modes and filter types. To set each bit in this register to 1. write 1 to the corresponding bit in TRIMSR. To clear each bit to 0. write 1 to the.."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
bitfld.long 0x0 24. "DIDL,Disable input information of CLCE or LUCE mode in DL." "0: Enable input information of CLCE or LUCE mode in..,1: Disable input information of CLCE or LUCE mode.."
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bitfld.long 0x0 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 20. "UVSHFVAL,Specifies one bit of logical right-shifting after filtering when the extended filtering pipeline is in use. This setting is applied to the UV plane as described in Table 56.12. Otherwise  SHFE and SHFVAL settings are used. This setting is only.." "0,1"
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bitfld.long 0x0 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 16. "SHFVAL,Specifies one bit of logical right-shifting after filtering when the extended filtering pipeline is in use. Sets the UV plane as described in Table 56.12. This setting is only possible when the EFPE bit in CMRCR and the SHFE bit in this register.." "0,1"
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bitfld.long 0x0 15. "UVSHFE,Specifies whether to truncate the fractional part or to retain the specified fractional digits following filtering by the extended filtering pipeline. This setting is applied to the UV plane as described in Table 56.12. Otherwise  SHFE and SHFVAL.." "0: The fractional part is truncated after filtering,1: Some of the digits of the fractional part after.."
bitfld.long 0x0 14. "SHFE,Specifies whether to truncate the fractional part or to retain the specified fractional digits following filtering by the extended filtering pipeline. Set the UV plane as described in Table 56.12." "0: The fractional part is truncated after filtering,1: Some of the digits of the fractional part after.."
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bitfld.long 0x0 13. "RDE,Specifies how to round the fractional part in filtering." "0: Truncation,1: Rounding up or down"
bitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
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bitfld.long 0x0 11. "TFE,Pyramidal Image Filtering Enable" "0: Disables the filtering between two adjacent..,1: Enables the filtering between two adjacent.."
hexmask.long.byte 0x0 7.--10. 1. "Reserved_7,Reserved"
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bitfld.long 0x0 6. "TCM,Triangle Clockwise Mode" "0: Specifies triangle vertexes counterclockwise,1: Specifies triangle vertexes clockwise"
bitfld.long 0x0 4.--5. "Reserved_4,Reserved" "0,1,2,3"
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bitfld.long 0x0 3. "AUTOSG,Automatic Source Coordinate Generation Mode" "0: Disables the automatic source coordinate..,1: Enables the automatic source coordinate.."
bitfld.long 0x0 2. "AUTODG,Automatic Destination Coordinate Generation Mode" "0: Disables the automatic destination coordinate..,1: Enables the automatic destination coordinate.."
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bitfld.long 0x0 1. "BFE,Bilinear Filter Enable" "0: Bilinear filtering is not used,1: Bilinear filtering is used"
bitfld.long 0x0 0. "TME,Texture Mapping Enable" "0: The single color specified by TRICR,1: Texture mapping is used"
group.long 0x64++0x17
line.long 0x0 "TRIMSR1,TRIMSR is used to set the corresponding bits of the triangle mode register (TRIMR). To enable the modes and functions selected by the bits in TRIMR. write 1 to the corresponding bits in this register."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
bitfld.long 0x0 24. "DIDLS,0: The DIDL bit is not set to 1." "0: The DIDL bit is not set to 1,1: The DIDL bit is not set to 1"
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rbitfld.long 0x0 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 20. "UVSHFVALS0,0: The UVSHFVAL bit is not set to 1." "0: The UVSHFVAL bit is not set to 1,1: The UVSHFVAL bit is set to 1"
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rbitfld.long 0x0 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 16. "SHFVALS,0: The SHFVAL bit is not set to 1." "0: The SHFVAL bit is not set to 1,1: The SHFVAL bit is set to 1"
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bitfld.long 0x0 15. "UVSHFVALS1,0: The UVSHFVAL bit is not set to 1." "0: The UVSHFVAL bit is not set to 1,1: The UVSHFVAL bit is set to 1"
bitfld.long 0x0 14. "SHFES,0: The SHFE bit is not set to 1." "0: The SHFE bit is not set to 1,1: The SHFE bit is set to 1"
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bitfld.long 0x0 13. "RDES,0: The RDE bit is not set to 1." "0: The RDE bit is not set to 1,1: The RDE bit is set to 1"
rbitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
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bitfld.long 0x0 11. "TFES,0: The TFE bit is not set to 1." "0: The TFE bit is not set to 1,1: The TFE bit is set to 1"
hexmask.long.byte 0x0 7.--10. 1. "Reserved_7,Reserved"
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bitfld.long 0x0 6. "TCMS,0: The TCM bit is not set to 1." "0: The TCM bit is not set to 1,1: The TCM bit is set to 1"
rbitfld.long 0x0 4.--5. "Reserved_4,Reserved" "0,1,2,3"
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bitfld.long 0x0 3. "AUTOSGS,0: The AUTOSG bit is not set to 1." "0: The AUTOSG bit is not set to 1,1: The AUTOSG bit is set to 1"
bitfld.long 0x0 2. "AUTODGS,0: The AUTODG bit is not set to 1." "0: The AUTODG bit is not set to 1,1: The AUTODG bit is set to 1"
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bitfld.long 0x0 1. "BFES,0: The BFE bit is not set to 1." "0: The BFE bit is not set to 1,1: The BFE bit is set to 1"
bitfld.long 0x0 0. "TMES,0: The TME bit is not set to 1." "0: The TME bit is not set to 1,1: The TME bit is set to 1"
line.long 0x4 "TRIMCR1,TRIMCR is used to clear the corresponding bits of the triangle mode register (TRIMR). To disable the modes and functions selected by the bits in TRIMR. write 1 to the corresponding bits in this register."
hexmask.long.byte 0x4 25.--31. 1. "Reserved_25,Reserved"
rbitfld.long 0x4 24. "DIDLC,Set bit DIDL in TRIMR" "0: Bit DIDL in TRIMR is not clear,1: Bit DIDL in TRIMR is clear to 0"
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rbitfld.long 0x4 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "UVSHFVALC0,0: Does not clear the UVSHFVAL bit to 0." "0: Does not clear the UVSHFVAL bit to 0,1: Clears the UVSHFVAL bit to 0"
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rbitfld.long 0x4 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 16. "SHFVALC,0: Does not clear the SHFVAL bit to 0." "0: Does not clear the SHFVAL bit to 0,1: Clears the SHFVAL bit to 0"
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bitfld.long 0x4 15. "UVSHFVALC1,0: Does not clear the UVSHFVAL bit to 0." "0: Does not clear the UVSHFVAL bit to 0,1: Clears the UVSHFVAL bit to 0"
bitfld.long 0x4 14. "SHFEC,0: Does not clear the SHFE bit to 0." "0: Does not clear the SHFE bit to 0,1: Clears the SHFE bit to 0"
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bitfld.long 0x4 13. "RDEC,0: Does not clear the RDE bit to 0." "0: Does not clear the RDE bit to 0,1: Clears the RDE bit to 0"
rbitfld.long 0x4 12. "Reserved_12,Reserved" "0,1"
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bitfld.long 0x4 11. "TFEC,0: Does not clear the TFE bit to 0." "0: Does not clear the TFE bit to 0,1: Clears the TFE bit to 0"
hexmask.long.byte 0x4 7.--10. 1. "Reserved_7,Reserved"
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bitfld.long 0x4 6. "TCMC,0: Does not clear the TCM bit to 0." "0: Does not clear the TCM bit to 0,1: Clears the TCM bit to 0"
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
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bitfld.long 0x4 3. "AUTOSGC,0: Does not clear the AUTOSG bit to 0." "0: Does not clear the AUTOSG bit to 0,1: Clears the AUTOSG bit to 0"
bitfld.long 0x4 2. "AUTODGC,0: Does not clear the AUTODG bit to 0." "0: Does not clear the AUTODG bit to 0,1: Clears the AUTODG bit to 0"
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bitfld.long 0x4 1. "BFEC,0: Does not clear the BFE bit to 0." "0: Does not clear the BFE bit to 0,1: Clears the BFE bit to 0"
bitfld.long 0x4 0. "TMEC,0: Does not clear the TME bit to 0." "0: Does not clear the TME bit to 0,1: Clears the TME bit to 0"
line.long 0x8 "TRICR1,TRICR is used to specify the color for single-color drawing with a TRI instruction when single-color drawing is selected with the TME bit in TRIMR."
bitfld.long 0x8 31. "YCFORM,For interleave output (for which the YISM bit in CMRCR is 0 and the YUV422E bit in CMRCR2 is 1)  changes the order of Y and U/V. Normally  Y and U/V are in a {U/V  Y} order; this bit  however  can reverse the order to {Y  U/V}." "0: For interleave output,1: For interleave output"
rbitfld.long 0x8 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x8 26.--27. "TCY3,When Y is to be output in 12 bpp  these bits specify bits 11 and 10 of color Y for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x8 24.--25. "TCY2,When Y is to be output in 10/12 bpp  these bits specify bits 9 and 8 of color Y for single-color drawing with the TRI instruction." "0,1,2,3"
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hexmask.long.byte 0x8 16.--23. 1. "TCV,When V is to be output in 8 bits  these bits specify color V for single-color drawing with the TRI instruction. When outputting V in 10 bits/12 bits  the V value in the TRICR2 register is used."
hexmask.long.byte 0x8 8.--15. 1. "TCU,When U is to be output in 8 bits  these bits specify color U for single-color drawing with the TRI instruction. When outputting U in 10 bits/12 bits  the U value in the TRICR2 register is used."
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hexmask.long.byte 0x8 0.--7. 1. "TCY,Specifies color Y for single-color drawing with the TRI instruction."
line.long 0xC "UVDPOR1,"
hexmask.long.tbyte 0xC 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0xC 8. "DDP,Specifies the destination coordinates described in the DL and the registers related to the setting of destination coordinates." "0: Specifies destination coordinates in integer,1: Specifies destination coordinates in fixed-point.."
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hexmask.long.byte 0xC 3.--7. 1. "Reserved_3,Reserved"
bitfld.long 0xC 0.--2. "UVDPO,Source Coordinate Decimal Point" "0,1,2,3,4,5,6,7"
line.long 0x10 "SUSR1,SUSR is used to specify the width (horizontal size) of the source. The width value depends on the source data format."
hexmask.long.byte 0x10 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x10 16.--26. 1. "SUW,Specify double_quotationsource width - 2double_quotation. The maximum value is 2 046."
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hexmask.long.byte 0x10 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x10 0.--10. 1. "SVW,Specify double_quotationsource width - 1double_quotation. The maximum value is 2 047."
line.long 0x14 "SVSR1,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this field without executing the SYNCM instruction."
hexmask.long.tbyte 0x14 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0x14 0.--10. 1. "SVS,Specifies the height (vertical size) of the source."
group.long 0x80++0x23
line.long 0x0 "XMINR1,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x0 0.--12. 1. "XMIN,X Clip MIN"
line.long 0x4 "YMINR1,"
hexmask.long.tbyte 0x4 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x4 0.--12. 1. "YMIN,Y Clip MIN"
line.long 0x8 "XMAXR1,"
hexmask.long.tbyte 0x8 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x8 0.--12. 1. "XMAX,X Clip MAX"
line.long 0xC "YMAXR1,"
hexmask.long.tbyte 0xC 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0xC 0.--12. 1. "YMAX,Y Clip MAX"
line.long 0x10 "AMXSR1,"
hexmask.long.tbyte 0x10 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x10 0.--12. 1. "AMXS,Automatic Mesh X Size"
line.long 0x14 "AMYSR1,"
hexmask.long.tbyte 0x14 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x14 0.--12. 1. "AMYS,Automatic Mesh Y Size"
line.long 0x18 "AMXOR1,"
hexmask.long.tbyte 0x18 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x18 0.--12. 1. "AMXO,Automatic Mesh X Origin"
line.long 0x1C "AMYOR1,"
hexmask.long.tbyte 0x1C 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x1C 0.--12. 1. "AMYO,Automatic Mesh Y Origin"
line.long 0x20 "TRICR21,TRICR2 is used to specify the color for single-color drawing with a TRI instruction when single-color drawing is selected with the TME bit in TRIMR. This register is used when UV is output in 10 bpp/12 bpp."
bitfld.long 0x20 30.--31. "TCV16,When V is to be output in 16 bpp  these bits specify bits 15 and 14 of color V for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x20 28.--29. "TCV14,When V is to be output in 14/16 bpp  these bits specify bits 13 and 12 of color V for single-color drawing with the TRI instruction." "0,1,2,3"
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bitfld.long 0x20 26.--27. "TCV12,When V is to be output in 12/14/16 bpp  these bits specify bits 11 and 10 of color V for single-color drawing with the TRI instruction." "0,1,2,3"
hexmask.long.word 0x20 16.--25. 1. "TCV10,When V is to be output in 10/12/14/16 bpp  these bits specify bits 9 to 0 of color V for single-color drawing with the TRI instruction."
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bitfld.long 0x20 14.--15. "TCU16,When U is to be output in 16 bpp  these bits specify bits 15 and 14 of color U for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x20 12.--13. "TCU14,When U is to be output in 14/16 bpp  these bits specify bits 13 and 12 of color U for single-color drawing with the TRI instruction." "0,1,2,3"
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bitfld.long 0x20 10.--11. "TCU12,When U is to be output in 12/14/16 bpp  these bits specify bits 11 and 10 of color U for single-color drawing with the TRI instruction." "0,1,2,3"
hexmask.long.word 0x20 0.--9. 1. "TCU10,When U is to be output in 10/12/14/16 bpp  these bits specify bits 9 to 0 of color U for single-color drawing with the TRI instruction."
rgroup.long 0xA4++0x3
line.long 0x0 "TRIMR21,TRIMR2 is used to select the maximum level of detail."
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 9.--11. "MAXLODU,The maximum level of detail for pyramidal images to be used in the u direction. The setting should be from 0 to 4. Other settings are prohibited. To modify the value during execution  execute the SYNCM instruction before modification. When this.." "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 3.--5. "MAXLODV,The maximum level of detail for pyramidal images to be used in the v direction. The setting should be from 0 to 4. Other settings are prohibited. To modify the value during execution  execute the SYNCM instruction before modification. When this.." "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
group.long 0xA8++0x1F
line.long 0x0 "TRIMSR21,TRIMSR2 is used to set the corresponding bits of the triangle mode register (TRIMR2). To enable the modes and functions selected by the bits in TRIMR2. write 1 to the corresponding bits in this register."
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 9.--11. "MAXLODUS,Sets the corresponding MAXLODU bits in the TRIMR2 register." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 3.--5. "MAXLODVS,Sets the corresponding MAXLODV bits in the TRIMR2 register." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x0 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4 "TRIMCR21,TRIMCR2 is used to clear the corresponding bits of the triangle mode register (TRIMR2). To disable the modes and functions selected by the bits in TRIMR2. write 1 to the corresponding bits in this register."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x4 9.--11. "MAXLODUC,Clears the corresponding MAXLODU bits in the TRIMR2 register." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x4 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 3.--5. "MAXLODVC,Clears the corresponding MAXLODV bits in the TRIMR2 register." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x4 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x8 "YLMINR1,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "YLMIN,Specifies the minimum luminance value when luminance correction is applied. If after correction the luminance value is lower than the value specified in this register  the luminance value is clamped at the value specified by these bits."
line.long 0xC "UBMINR1,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "UBMIN,Specifies the minimum U value when hue correction is applied. If after correction the U value is lower than the value specified in this register  the U value is clamped at the value specified by these bits."
line.long 0x10 "VRMINR1,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "VRMIN,Specifies the minimum V value when hue correction is applied. If after correction the V value is lower than the value specified in this register  the V value is clamped at the value specified by these bits."
line.long 0x14 "YLMAXR1,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "YLMAX,Specifies the maximum luminance value when luminance correction is applied. If after correction the luminance value is higher than the value specified in this register  the luminance value is clamped at the value specified by these bits."
line.long 0x18 "UBMAXR1,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "UBMAX,Specifies the maximum U value when hue correction is applied. If after correction the U value is higher than the value specified in this register  the U value is clamped at the value specified by these bits."
line.long 0x1C "VRMAXR1,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "VRMAX,Specifies the maximum V value when hue correction is applied. If after correction the V value is higher than the value specified in this register  the V value is clamped at the value specified by these bits."
group.long 0xD0++0x13
line.long 0x0 "CPDPOR1,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 8.--10. "YLDPO,Specifies the number of bits after the decimal point for the value specified as the luminance correction scale value." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
bitfld.long 0x0 4.--6. "UBDPO,Specifies the number of bits after the decimal point for the value specified as the hue correction U value scale value." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.long 0x0 0.--2. "VRDPO,Specifies the number of bits after the decimal point for the value specified as the hue correction V value scale value." "0,1,2,3,4,5,6,7"
line.long 0x4 "YLCPR1,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.byte 0x4 24.--31. 1. "DYP_LSCAL,Specifies the scale parameter of second Y plane in DYP mode if the luminance correction scale parameter is specified by a register setting (LUSM = 1 in CMRCR)."
hexmask.long.byte 0x4 16.--23. 1. "DYP_LOFST,Specifies the offset parameter of second Y plane in DYP mode"
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hexmask.long.byte 0x4 8.--15. 1. "LSCAL,Specifies the scale parameter when the luminance correction scale parameter is specified by a register setting (LUSM = 1 in CMRCR). The setting is passed as unsigned fixed-point data  and the number of decimal places is specified by YLDPO in.."
hexmask.long.byte 0x4 0.--7. 1. "LOFST,Specifies the offset parameter when the luminance correction offset parameter is specified by a register setting (LUOM = 1 in CMRCR). Specify the value of these bits as signed 8-bit data."
line.long 0x8 "UBCPR1,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x8 8.--15. 1. "UBSCL,Specifies the U value scale parameter when the hue correction scale parameters are specified by register settings (CLSM = 1 in CMRCR). The setting is passed as fixed-point data  and the number of decimal places is specified by UBDPO in CPDPOR."
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hexmask.long.byte 0x8 0.--7. 1. "UBOFS,Specifies the U value offset parameter when the hue correction offset parameters are specified by register settings (CLOM = 1 in CMRCR). Specify the value of these bits as signed 8-bit data."
line.long 0xC "VRCPR1,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0xC 8.--15. 1. "VRSCL,Specifies the V value scale parameter when the hue correction scale parameters are specified by register settings (CLSM = 1 in CMRCR). The setting is passed as fixed-point data  and the number of decimal places is specified by VRDPO in CPDPOR."
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hexmask.long.byte 0xC 0.--7. 1. "VROFS,Specifies the V value offset parameter when the hue correction offset parameters are specified by register settings (CLOM = 1 in CMRCR). Specify the value of these bits as signed 8-bit data."
line.long 0x10 "TRICR31,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
bitfld.long 0x10 30.--31. "DYP_TCY16,When 2nd Y in DYP mode is to be output in 16 bpp  these bits specify bits 15 and 14 of color 2nd Y for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x10 28.--29. "DYP_TCY14,When 2nd Y in DYP mode is to be output in 14 bpp or 16 bpp  these bits specify bits 13 to 0 of color 2nd Y for single-color drawing with the TRI instruction." "0,1,2,3"
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bitfld.long 0x10 26.--27. "DYP_TCY12,When 2nd Y in DYP mode is to be output in 12bpp or 14 bpp or 16 bpp  these bits specify bits 11 to 0 of color 2nd Y for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x10 24.--25. "DYP_TCY10,When 2nd Y in DYP mode is to be output in 10bpp or 12bpp or 14 bpp or 16 bpp  these bits specify bits 9 to 0 of color 2nd Y for single-color drawing with the TRI instruction." "0,1,2,3"
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hexmask.long.byte 0x10 16.--23. 1. "DYP_TCY8,In DYP mode  these bits specify bits 7 to 0 of color 2nd Y for single-color drawing with the TRI instruction."
bitfld.long 0x10 14.--15. "TCY16,When Y is to be output in 16 bpp  these bits specify bits 15 and 14 of color Y for single-color drawing with the TRI instruction." "0,1,2,3"
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hexmask.long.word 0x10 0.--13. 1. "TCY14,When Y is to be output in 14 bpp or 16 bpp  these bits specify bits 13 to 0 of color Y for single-color drawing with the TRI instruction."
rgroup.long 0xE4++0x3
line.long 0x0 "CMRCR21,CMRCR2 indicates the output mode for the drawing results. To set each bit in this register to 1. write 1 to the corresponding bit in CMRCSR2. To clear each bit to 0. write 1 to the corresponding bit in CMRCCR2."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "DCTE,Tile Addressing Mode Enable for Destination Data" "0: Linear addressing mode,1: Tile addressing mode"
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bitfld.long 0x0 13.--14. "Reserved_13,Reserved" "0,1,2,3"
bitfld.long 0x0 12. "TCTE,Tile Addressing Mode Enable for Texture Data" "0: Linear addressing mode,1: Tile addressing mode"
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bitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 6. "UVFORM,Swap the order of adjacent single_quotationUsingle_quotation and single_quotationVsingle_quotation on the YUV422 interleaved texture data." "0: Keeps the original order,1: Swaps the order"
bitfld.long 0x0 5. "YUV422FORM,Swap the order of adjacent single_quotationYsingle_quotation and single_quotationUsingle_quotation or single_quotationVsingle_quotation on the YUV422 interleaved texture data." "0: Keeps the original order,1: Swaps the order"
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bitfld.long 0x0 4. "DYP,DYP: Double luminance plane mode" "0: Not use double luminance plane function,1: Use double luminance plane"
bitfld.long 0x0 3. "YUVSEMI,YUV Semi-planar mode" "0: The input image format is not YUV Semi-planar,1: The input image format is YUV Semi-planar"
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bitfld.long 0x0 2. "YUV422E,YUV422 Interleaved Mode Enable" "0: Processes Y only or UV only plane,1: Processes YUV422 interleaved plane"
bitfld.long 0x0 1. "UVC,UV plane format conversion" "0: Does not convert the format of UV plane,1: Converts the format of UV plane"
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bitfld.long 0x0 0. "LUTE,Lookup Table Enable" "0: Does not convert data using the LUT,1: Converts data using the LUT"
group.long 0xE8++0xB
line.long 0x0 "CMRCSR21,CMRCSR2 is used to set the corresponding bits in the rendering mode register 2 (CMRCR2). To enable the modes and functions selected by the bits in CMRCR2. write 1 to the corresponding bits in this register."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "DCTES,0: The DCTE bit in CMRCR2 is not set to 1." "0: The DCTE bit in CMRCR2 is not set to 1,1: The DCTE bit in CMRCR2 is set to 1"
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rbitfld.long 0x0 13.--14. "Reserved_13,Reserved" "0,1,2,3"
bitfld.long 0x0 12. "TCTES,0: The TCTE bit in CMRCR2 is not set to 1." "0: The TCTE bit in CMRCR2 is not set to 1,1: The TCTE bit in CMRCR2 is set to 1"
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rbitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 6. "UVFORMS,0: The UVFORM bit in CMRCR2 is not set to 1." "0: The UVFORM bit in CMRCR2 is not set to 1,1: The UVFORM bit in CMRCR2 is set to 1"
bitfld.long 0x0 5. "YUV422FORMS,0: The YUV422FORM bit in CMRCR2 is not set to 1." "0: The YUV422FORM bit in CMRCR2 is not set to 1,1: The YUV422FORM bit in CMRCR2 is set to 1"
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bitfld.long 0x0 4. "DYPS,0: The DYP bit in CMRCR2 is not set to 1" "0: The DYP bit in CMRCR2 is not set to 1,1: The DYP bit in CMRCR2 is set to 1"
bitfld.long 0x0 3. "YUVSEMIS,0: The YUVSEMI bit in CMRCR2 is not set to 1." "0: The YUVSEMI bit in CMRCR2 is not set to 1,1: The YUVSEMI bit in CMRCR2 is set to 1"
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bitfld.long 0x0 2. "YUV422ES,0: The YUV422E bit in CMRCR2 is not set to 1." "0: The YUV422E bit in CMRCR2 is not set to 1,1: The YUV422E bit in CMRCR2 is set to 1"
bitfld.long 0x0 1. "UVCS,0: The UVC bit in CMRCR2 is not set to 1." "0: The UVC bit in CMRCR2 is not set to 1,1: The UVC bit in CMRCR2 is set to 1"
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bitfld.long 0x0 0. "LUTES,0: The LUTE bit in CMRCR2 is not set to 1." "0: The LUTE bit in CMRCR2 is not set to 1,1: The LUTE bit in CMRCR2 is set to 1"
line.long 0x4 "CMRCCR21,CMRCCR2 is used to clear the corresponding bits of the rendering mode register 2 (CMRCR2). To disable the modes and functions selected by the bits in CMRCR2. write 1 to the corresponding bits in this register."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4 15. "DCTEC,0: Does not clear the DCTE bit in CMRCR2 to 0." "0: Does not clear the DCTE bit in CMRCR2 to 0,1: Clears the DCTE bit in CMRCR2 to 0"
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rbitfld.long 0x4 13.--14. "Reserved_13,Reserved" "0,1,2,3"
bitfld.long 0x4 12. "TCTEC,0: Does not clear the TCTE bit in CMRCR2 to 0." "0: Does not clear the TCTE bit in CMRCR2 to 0,1: Clears the TCTE bit in CMRCR2 to 0"
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rbitfld.long 0x4 10.--11. "Reserved_10,Reserved" "0,1,2,3"
rbitfld.long 0x4 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x4 6. "UVFORMC,0: Does not clear the UVFORM bit in CMRCR2 to 0." "0: Does not clear the UVFORM bit in CMRCR2 to 0,1: Clears the UVFORM bit in CMRCR2 to 0"
bitfld.long 0x4 5. "YUV422FORMC,0: Does not clear the YUV422FORM bit in CMRCR2 to 0." "0: Does not clear the YUV422FORM bit in CMRCR2 to 0,1: Clears the YUV422FORM bit in CMRCR2 to 0"
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bitfld.long 0x4 4. "DYPC,0: The DYP bit in CMRCR2 is not clear to 0." "0: The DYP bit in CMRCR2 is not clear to 0,1: The DYP bit in CMRCR2 is clear to 0"
bitfld.long 0x4 3. "YUVSEMIC,0: Does not clear the YUVSEMI bit in CMRCR2 to 0." "0: Does not clear the YUVSEMI bit in CMRCR2 to 0,1: Clears the YUVSEMI bit in CMRCR2 to 0"
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bitfld.long 0x4 2. "YUV422EC,0: Does not clear the YUV422E bit in CMRCR2 to 0." "0: Does not clear the YUV422E bit in CMRCR2 to 0,1: Clears the YUV422E bit in CMRCR2 to 0"
bitfld.long 0x4 1. "UVCC,0: Does not clear the UVC bit in CMRCR2 to 0." "0: Does not clear the UVC bit in CMRCR2 to 0,1: Clears the UVC bit in CMRCR2 to 0"
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bitfld.long 0x4 0. "LUTEC,0: Does not clear the LUTE bit in CMRCR to 0." "0: Does not clear the LUTE bit in CMRCR to 0,1: Clears the LUTE bit in CMRCR to 0"
line.long 0x8 "NCMR1,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x8 8.--31. 1. "ACC_KEY,Access Key to change NCME bit of this register."
hexmask.long.byte 0x8 1.--7. 1. "Reserved_1,Reserved"
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bitfld.long 0x8 0. "NCME,Non-blocking cache mode enable bit for source data." "0,1"
group.long 0x114++0x7
line.long 0x0 "DCCR1,When changing the setting of this register by the DL. be sure to execute the SYNCM instruction"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "UVDSTSEL,Sets the register that sets the memory stride of UV plane when outputting YUV422/420 semi-planar." "0: Uses the setting value of DSTR register as..,1: Uses the setting value of UVDSTR register as.."
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hexmask.long.word 0x0 0.--14. 1. "Reserved_0,Reserved"
line.long 0x4 "SCCR1,When changing the setting of this register by the DL. be sure to execute the SYNCM instruction"
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x4 16. "TCMENB,Select the size of the source cache when pyramidal images filtering not supported. When this bit is 1  set TRIMR.TFE  TRIMR2.MAXLODU and TRIMR2.MAXLODV to 0." "0: 32 Kbytes,1: 64 Kbytes"
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hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
group.long 0x120++0x3
line.long 0x0 "PEFCCR1,This register controls the following performance-counter-related registers: PEFCTCR. PEFCTMR. PERFCMAXPR. PEFCMINPR. PEFCDCAR. PEFCDCMR. PEFCSCAR. PEFCSCMR. However. counted value of the performance counter is not guaranteed."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CLR,Clear all the performance counter related registers." "0,1"
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bitfld.long 0x0 0. "EN,Enable all performance-counter-related registers." "0: Counting-up by the performance-counter-related..,1: Counting-up by the performance-counter-related.."
rgroup.long 0x124++0x17
line.long 0x0 "PEFCTCR1,"
hexmask.long 0x0 0.--31. 1. "PEFCTCR,Performance counter to count the number of cycles when the setting of the EN bit of PEFCCR is 1."
line.long 0x4 "PEFCTMR1,"
hexmask.long 0x4 0.--31. 1. "PEFCTMR,Performance counter to count the total number of cycles among those counted by PEFCTCR in which the cache is missed."
line.long 0x8 "PEFCMAXPR1,"
hexmask.long 0x8 0.--31. 1. "PEFCMAXPR,Performance counter to count the maximum number of cycles necessitated by a cache miss."
line.long 0xC "PEFCMINPR1,"
hexmask.long 0xC 0.--31. 1. "PEFCMINPR,Performance counter to count the minimum number of cycles necessitated by a cache miss."
line.long 0x10 "PEFCDCAR1,"
hexmask.long 0x10 0.--31. 1. "PEFCDCA,Performance counter to count the number of times the destination cache is accessed."
line.long 0x14 "PEFCDCMR1,"
hexmask.long 0x14 0.--31. 1. "PEFCDCM,Performance counter to count the number of times the destination cache is missed."
rgroup.long 0x144++0x7
line.long 0x0 "PEFCSCAR1,"
hexmask.long 0x0 0.--31. 1. "PEFCSCA,Performance counter to count the number of times the source cache is accessed."
line.long 0x4 "PEFCSCMR1,"
hexmask.long 0x4 0.--31. 1. "PEFCSCM,Performance counter to count the number of times the source cache is missed."
group.long 0x1A0++0x33
line.long 0x0 "SSAOR1,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x0 8.--31. 1. "SSAOR,SRC Start Address Offset"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
line.long 0x4 "SSAOR11,m = 1 to 4."
hexmask.long.tbyte 0x4 8.--31. 1. "SSAORn,SRC Offset Address for Map n"
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
line.long 0x8 "SSAOR21,m = 1 to 4."
hexmask.long.tbyte 0x8 8.--31. 1. "SSAORn,SRC Offset Address for Map n"
hexmask.long.byte 0x8 0.--7. 1. "Reserved_0,Reserved"
line.long 0xC "SSAOR31,m = 1 to 4."
hexmask.long.tbyte 0xC 8.--31. 1. "SSAORn,SRC Offset Address for Map n"
hexmask.long.byte 0xC 0.--7. 1. "Reserved_0,Reserved"
line.long 0x10 "SSAOR41,m = 1 to 4."
hexmask.long.tbyte 0x10 8.--31. 1. "SSAORn,SRC Offset Address for Map n"
hexmask.long.byte 0x10 0.--7. 1. "Reserved_0,Reserved"
line.long 0x14 "UVSSAOR1,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x14 8.--31. 1. "UVSSAOR,SRC Start Address Offset for UV plane"
hexmask.long.byte 0x14 0.--7. 1. "Reserved_0,Reserved"
line.long 0x18 "UVSSAOR11,n = 1 to 4."
hexmask.long.tbyte 0x18 8.--31. 1. "UVSSAOR_n,SRC Start Address Offset for UV plane for Map n"
hexmask.long.byte 0x18 0.--7. 1. "Reserved_0,Reserved"
line.long 0x1C "UVSSAOR21,n = 1 to 4."
hexmask.long.tbyte 0x1C 8.--31. 1. "UVSSAOR_n,SRC Start Address Offset for UV plane for Map n"
hexmask.long.byte 0x1C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x20 "UVSSAOR31,n = 1 to 4."
hexmask.long.tbyte 0x20 8.--31. 1. "UVSSAOR_n,SRC Start Address Offset for UV plane for Map n"
hexmask.long.byte 0x20 0.--7. 1. "Reserved_0,Reserved"
line.long 0x24 "UVSSAOR41,n = 1 to 4."
hexmask.long.tbyte 0x24 8.--31. 1. "UVSSAOR_n,SRC Start Address Offset for UV plane for Map n"
hexmask.long.byte 0x24 0.--7. 1. "Reserved_0,Reserved"
line.long 0x28 "DSAOR1,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long 0x28 6.--31. 1. "DSAO,Destination Offset Address"
hexmask.long.byte 0x28 0.--5. 1. "Reserved_0,Reserved"
line.long 0x2C "XYOFSR1,"
hexmask.long.byte 0x2C 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x2C 16.--27. 1. "XOFS,The value  obtained by adding the offset specified in this field to the X coordinate automatically generated or specified by DL  is used for processing as X coordinate."
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hexmask.long.byte 0x2C 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.word 0x2C 0.--11. 1. "YOFS,The value  obtained by adding the offset specified in this field to the Y coordinate automatically generated or specified by DL  is used for processing as Y coordinate."
line.long 0x30 "UVOFSR1,"
hexmask.long.word 0x30 16.--31. 1. "UOFS,The value  obtained by adding the offset specified in this field to the u coordinate automatically generated or specified by DL  is used for processing as v coordinate."
hexmask.long.word 0x30 0.--15. 1. "VOFS,The value  obtained by adding the offset specified in this field to the Y coordinate automatically generated or specified by DL  is used for processing as Y coordinate."
group.long 0x280++0x7
line.long 0x0 "EDCCR1,"
hexmask.long.tbyte 0x0 15.--31. 1. "Reserved_15,Reserved"
bitfld.long 0x0 14. "LUTEDCIJE,LUT EDC injection enable" "0: LUT injection is disabled,1: LUT injection is enabled"
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hexmask.long.word 0x0 0.--13. 1. "Reserved_0,Reserved"
line.long 0x4 "EDCSR1,"
hexmask.long.tbyte 0x4 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x4 8. "LMERR,Line Memory SRAM Parity checker status." "0: LMERR bit is not cleared,1: LMERR bit is cleared to 0"
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bitfld.long 0x4 7. "ROTERR,Rotator Buffer SRAM Parity checker status." "0: ROTERR bit is not cleared,1: ROTERR bit is cleared to 0"
bitfld.long 0x4 6. "DCERR2,Destination Cache Data SRAM Parity checker status." "0: DCERR2 bit is not cleared,1: DCERR2 bit is cleared"
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bitfld.long 0x4 5. "MFERR,Miss FIFO SRAM EDC checker status." "0: MFERR bit is not cleared,1: MFERR bit is cleared"
bitfld.long 0x4 4. "SQERR,Store Queue SRAM EDC checker status." "0: SQERR bit is not cleared,1: SQERR bit is cleared"
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bitfld.long 0x4 3. "PXERR,PX FIFO EDC checker status" "0: PXERR bit is not cleared,1: PXERR bit is cleared"
bitfld.long 0x4 2. "DCERR,Destination cache dirty bit SRAM checker status" "0: DCERR bit is not cleared,1: DCERR bit is cleared"
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bitfld.long 0x4 1. "LUTERR,LUT SRAM Parity checker status" "0: LUTERR bit is not cleared,1: LUTERR bit is cleared"
bitfld.long 0x4 0. "SCERR,Source Cache SRAM Parity checker status" "0: SCERR bit is not cleared,1: SCERR bit is cleared"
group.long 0x2A0++0xF
line.long 0x0 "SYNCCR01,This register specifies the module corresponding to bits 0 to 3 in the SYNCC enable field of the WUP and SLP instructions. Set the number for specifying the module in this register. See Table 56.21 for the numbers for specifying the module. Do.."
hexmask.long.byte 0x0 24.--31. 1. "SYNCC3,Specifies the module corresponding to bit 3 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x0 16.--23. 1. "SYNCC2,Specifies the module corresponding to bit 2 of the SYNCC enable field of the WUP and SLP instructions."
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hexmask.long.byte 0x0 8.--15. 1. "SYNCC1,Specifies the module corresponding to bit 1 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x0 0.--7. 1. "SYNCC0,Specifies the module corresponding to bit 0 of the SYNCC enable field of the WUP and SLP instructions."
line.long 0x4 "SYNCCR11,This register specifies the module corresponding to bits 4 to 7 in the SYNCC enable field of the WUP and SLP instructions. Set the number for specifying the module in this register. See Table 56.21 for the numbers for specifying the module. Do.."
hexmask.long.byte 0x4 24.--31. 1. "SYNCC7,Specifies the module corresponding to bit 7 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x4 16.--23. 1. "SYNCC6,Specifies the module corresponding to bit 6 of the SYNCC enable field of the WUP and SLP instructions."
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hexmask.long.byte 0x4 8.--15. 1. "SYNCC5,Specifies the module corresponding to bit 5 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x4 0.--7. 1. "SYNCC4,Specifies the module corresponding to bit 4 of the SYNCC enable field of the WUP and SLP instructions."
line.long 0x8 "SYNCCR21,This register specifies the module corresponding to bits 8 to 11 in the SYNCC enable field of the WUP and SLP instructions. Set the number for specifying the module in this register. See Table 56.21 for the numbers for specifying the module. Do.."
hexmask.long.byte 0x8 24.--31. 1. "SYNCC11,Specifies the module corresponding to bit 11 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x8 16.--23. 1. "SYNCC10,Specifies the module corresponding to bit 10 of the SYNCC enable field of the WUP and SLP instructions."
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hexmask.long.byte 0x8 8.--15. 1. "SYNCC9,Specifies the module corresponding to bit 9 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x8 0.--7. 1. "SYNCC8,Specifies the module corresponding to bit 8 of the SYNCC enable field of the WUP and SLP instructions."
line.long 0xC "SYNCCR31,This register specifies the module corresponding to bits 12 to 15 in the SYNCC enable field of the WUP and SLP instructions. Set the number for specifying the module in this register. See Table 56.21 for the numbers for specifying the module. Do.."
hexmask.long.byte 0xC 24.--31. 1. "SYNCC15,Specifies the module corresponding to bit 15 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0xC 16.--23. 1. "SYNCC14,Specifies the module corresponding to bit 14of the SYNCC enable field of the WUP and SLP instructions."
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hexmask.long.byte 0xC 8.--15. 1. "SYNCC13,Specifies the module corresponding to bit 13 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0xC 0.--7. 1. "SYNCC12,Specifies the module corresponding to bit 12 of the SYNCC enable field of the WUP and SLP instructions."
group.long 0xB00++0x4B
line.long 0x0 "SSAR11,m = 1 to 4."
hexmask.long.tbyte 0x0 8.--31. 1. "SSARn,SRC Start Address for Map n"
bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
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hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved"
line.long 0x4 "SSTR11,m = 1 to 4."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x4 0.--16. 1. "SSTRn,Specifies the memory width of the source area for the n-th map in bytes as an integer multiple of 256 within the range from 256 to 65 536 bytes in the linear addressing mode when reading texture data from the external memory. In tile addressing.."
line.long 0x8 "SSAR21,m = 1 to 4."
hexmask.long.tbyte 0x8 8.--31. 1. "SSARn,SRC Start Address for Map n"
bitfld.long 0x8 6.--7. "Reserved_6,Reserved" "0,1,2,3"
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hexmask.long.byte 0x8 0.--5. 1. "Reserved_0,Reserved"
line.long 0xC "SSTR21,m = 1 to 4."
hexmask.long.word 0xC 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0xC 0.--16. 1. "SSTRn,Specifies the memory width of the source area for the n-th map in bytes as an integer multiple of 256 within the range from 256 to 65 536 bytes in the linear addressing mode when reading texture data from the external memory. In tile addressing.."
line.long 0x10 "SSAR31,m = 1 to 4."
hexmask.long.tbyte 0x10 8.--31. 1. "SSARn,SRC Start Address for Map n"
bitfld.long 0x10 6.--7. "Reserved_6,Reserved" "0,1,2,3"
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hexmask.long.byte 0x10 0.--5. 1. "Reserved_0,Reserved"
line.long 0x14 "SSTR31,m = 1 to 4."
hexmask.long.word 0x14 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x14 0.--16. 1. "SSTRn,Specifies the memory width of the source area for the n-th map in bytes as an integer multiple of 256 within the range from 256 to 65 536 bytes in the linear addressing mode when reading texture data from the external memory. In tile addressing.."
line.long 0x18 "SSAR41,m = 1 to 4."
hexmask.long.tbyte 0x18 8.--31. 1. "SSARn,SRC Start Address for Map n"
bitfld.long 0x18 6.--7. "Reserved_6,Reserved" "0,1,2,3"
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hexmask.long.byte 0x18 0.--5. 1. "Reserved_0,Reserved"
line.long 0x1C "SSTR41,m = 1 to 4."
hexmask.long.word 0x1C 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x1C 0.--16. 1. "SSTRn,Specifies the memory width of the source area for the n-th map in bytes as an integer multiple of 256 within the range from 256 to 65 536 bytes in the linear addressing mode when reading texture data from the external memory. In tile addressing.."
line.long 0x20 "UVSSAR1,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x20 8.--31. 1. "UVSSAR,SRC Start Address for UV plane"
hexmask.long.byte 0x20 0.--7. 1. "Reserved_0,Reserved"
line.long 0x24 "UVSSTR1,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.word 0x24 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x24 0.--16. 1. "UVSSTR,Sets the memory width of texture data read from the external memory of UV plane in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is used as-is  while in.."
line.long 0x28 "UVSSAR11,n = 1 to 4."
hexmask.long.tbyte 0x28 8.--31. 1. "UVSSARn,SRC Start Address for UV plane for Map n"
hexmask.long.byte 0x28 0.--7. 1. "Reserved_0,Reserved"
line.long 0x2C "UVSSTR11,"
hexmask.long.word 0x2C 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x2C 0.--16. 1. "UVSSTRn,Sets the memory width of texture data read from the external memory of UV plane for the n-th Map in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is.."
line.long 0x30 "UVSSAR21,n = 1 to 4."
hexmask.long.tbyte 0x30 8.--31. 1. "UVSSARn,SRC Start Address for UV plane for Map n"
hexmask.long.byte 0x30 0.--7. 1. "Reserved_0,Reserved"
line.long 0x34 "UVSSTR21,"
hexmask.long.word 0x34 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x34 0.--16. 1. "UVSSTRn,Sets the memory width of texture data read from the external memory of UV plane for the n-th Map in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is.."
line.long 0x38 "UVSSAR31,n = 1 to 4."
hexmask.long.tbyte 0x38 8.--31. 1. "UVSSARn,SRC Start Address for UV plane for Map n"
hexmask.long.byte 0x38 0.--7. 1. "Reserved_0,Reserved"
line.long 0x3C "UVSSTR31,"
hexmask.long.word 0x3C 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x3C 0.--16. 1. "UVSSTRn,Sets the memory width of texture data read from the external memory of UV plane for the n-th Map in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is.."
line.long 0x40 "UVSSAR41,n = 1 to 4."
hexmask.long.tbyte 0x40 8.--31. 1. "UVSSARn,SRC Start Address for UV plane for Map n"
hexmask.long.byte 0x40 0.--7. 1. "Reserved_0,Reserved"
line.long 0x44 "UVSSTR41,"
hexmask.long.word 0x44 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x44 0.--16. 1. "UVSSTRn,Sets the memory width of texture data read from the external memory of UV plane for the n-th Map in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is.."
line.long 0x48 "UVDSTR1,This register is not initialized by the SWRST bit in the control register (CR)"
hexmask.long.word 0x48 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x48 0.--16. 1. "UVDSTR,Sets the memory width of destination data of UV plane in Semi-planar format to a range from 64 bytes to 65 536 bytes and in 64-byte unit. If the UVDSTSEL bit of DCCR register is 1  the setting of this register is used as memory stride  while if.."
group.long 0x1000++0xFFF
line.long 0x0 "LUTDR01,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4 "LUTDR11,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8 "LUTDR21,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC "LUTDR31,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x10 "LUTDR41,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x14 "LUTDR51,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x18 "LUTDR61,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1C "LUTDR71,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x20 "LUTDR81,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x24 "LUTDR91,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x28 "LUTDR101,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2C "LUTDR111,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x30 "LUTDR121,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x34 "LUTDR131,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x38 "LUTDR141,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3C "LUTDR151,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x40 "LUTDR161,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x44 "LUTDR171,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x48 "LUTDR181,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4C "LUTDR191,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x50 "LUTDR201,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x54 "LUTDR211,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x58 "LUTDR221,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5C "LUTDR231,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x60 "LUTDR241,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x64 "LUTDR251,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x68 "LUTDR261,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6C "LUTDR271,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x70 "LUTDR281,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x74 "LUTDR291,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x78 "LUTDR301,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7C "LUTDR311,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x80 "LUTDR321,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x84 "LUTDR331,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x88 "LUTDR341,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8C "LUTDR351,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x90 "LUTDR361,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x94 "LUTDR371,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x98 "LUTDR381,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9C "LUTDR391,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA0 "LUTDR401,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA4 "LUTDR411,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA8 "LUTDR421,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAC "LUTDR431,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB0 "LUTDR441,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB4 "LUTDR451,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB8 "LUTDR461,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBC "LUTDR471,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC0 "LUTDR481,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC4 "LUTDR491,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC8 "LUTDR501,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCC "LUTDR511,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD0 "LUTDR521,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD4 "LUTDR531,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD8 "LUTDR541,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDC "LUTDR551,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE0 "LUTDR561,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE4 "LUTDR571,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE8 "LUTDR581,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEC "LUTDR591,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF0 "LUTDR601,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF4 "LUTDR611,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF8 "LUTDR621,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFC "LUTDR631,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x100 "LUTDR641,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x100 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x100 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x104 "LUTDR651,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x104 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x104 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x108 "LUTDR661,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x108 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x108 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x10C "LUTDR671,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x10C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x110 "LUTDR681,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x110 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x110 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x114 "LUTDR691,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x114 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x114 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x118 "LUTDR701,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x118 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x118 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x11C "LUTDR711,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x11C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x11C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x120 "LUTDR721,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x120 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x120 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x124 "LUTDR731,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x124 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x124 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x128 "LUTDR741,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x128 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x128 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x12C "LUTDR751,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x12C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x12C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x130 "LUTDR761,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x130 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x130 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x134 "LUTDR771,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x134 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x134 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x138 "LUTDR781,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x138 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x138 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x13C "LUTDR791,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x13C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x13C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x140 "LUTDR801,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x140 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x140 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x144 "LUTDR811,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x144 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x144 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x148 "LUTDR821,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x148 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x148 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x14C "LUTDR831,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x14C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x150 "LUTDR841,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x150 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x150 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x154 "LUTDR851,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x154 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x154 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x158 "LUTDR861,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x158 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x158 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x15C "LUTDR871,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x15C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x15C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x160 "LUTDR881,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x160 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x160 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x164 "LUTDR891,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x164 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x164 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x168 "LUTDR901,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x168 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x168 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x16C "LUTDR911,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x16C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x16C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x170 "LUTDR921,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x170 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x170 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x174 "LUTDR931,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x174 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x174 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x178 "LUTDR941,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x178 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x178 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x17C "LUTDR951,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x17C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x17C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x180 "LUTDR961,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x180 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x180 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x184 "LUTDR971,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x184 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x184 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x188 "LUTDR981,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x188 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x188 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x18C "LUTDR991,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x18C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x190 "LUTDR1001,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x190 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x190 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x194 "LUTDR1011,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x194 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x194 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x198 "LUTDR1021,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x198 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x198 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x19C "LUTDR1031,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x19C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x19C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1A0 "LUTDR1041,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1A4 "LUTDR1051,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1A8 "LUTDR1061,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1AC "LUTDR1071,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1B0 "LUTDR1081,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1B4 "LUTDR1091,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1B8 "LUTDR1101,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1BC "LUTDR1111,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1C0 "LUTDR1121,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1C4 "LUTDR1131,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1C8 "LUTDR1141,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1CC "LUTDR1151,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1D0 "LUTDR1161,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1D4 "LUTDR1171,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1D8 "LUTDR1181,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1DC "LUTDR1191,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1E0 "LUTDR1201,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1E4 "LUTDR1211,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1E8 "LUTDR1221,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1EC "LUTDR1231,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1F0 "LUTDR1241,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1F4 "LUTDR1251,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1F8 "LUTDR1261,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1FC "LUTDR1271,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x200 "LUTDR1281,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x200 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x200 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x204 "LUTDR1291,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x204 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x204 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x208 "LUTDR1301,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x208 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x208 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x20C "LUTDR1311,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x20C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x210 "LUTDR1321,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x210 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x210 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x214 "LUTDR1331,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x214 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x214 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x218 "LUTDR1341,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x218 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x218 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x21C "LUTDR1351,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x21C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x21C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x220 "LUTDR1361,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x220 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x220 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x224 "LUTDR1371,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x224 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x224 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x228 "LUTDR1381,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x228 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x228 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x22C "LUTDR1391,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x22C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x22C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x230 "LUTDR1401,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x230 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x230 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x234 "LUTDR1411,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x234 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x234 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x238 "LUTDR1421,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x238 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x238 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x23C "LUTDR1431,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x23C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x23C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x240 "LUTDR1441,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x240 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x240 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x244 "LUTDR1451,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x244 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x244 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x248 "LUTDR1461,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x248 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x248 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x24C "LUTDR1471,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x24C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x250 "LUTDR1481,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x250 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x250 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x254 "LUTDR1491,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x254 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x254 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x258 "LUTDR1501,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x258 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x258 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x25C "LUTDR1511,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x25C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x25C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x260 "LUTDR1521,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x260 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x260 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x264 "LUTDR1531,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x264 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x264 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x268 "LUTDR1541,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x268 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x268 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x26C "LUTDR1551,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x26C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x26C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x270 "LUTDR1561,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x270 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x270 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x274 "LUTDR1571,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x274 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x274 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x278 "LUTDR1581,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x278 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x278 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x27C "LUTDR1591,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x27C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x27C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x280 "LUTDR1601,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x280 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x280 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x284 "LUTDR1611,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x284 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x284 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x288 "LUTDR1621,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x288 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x288 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x28C "LUTDR1631,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x28C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x28C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x290 "LUTDR1641,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x290 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x290 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x294 "LUTDR1651,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x294 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x294 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x298 "LUTDR1661,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x298 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x298 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x29C "LUTDR1671,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x29C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x29C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2A0 "LUTDR1681,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2A4 "LUTDR1691,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2A8 "LUTDR1701,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2AC "LUTDR1711,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2B0 "LUTDR1721,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2B4 "LUTDR1731,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2B8 "LUTDR1741,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2BC "LUTDR1751,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2C0 "LUTDR1761,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2C4 "LUTDR1771,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2C8 "LUTDR1781,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2CC "LUTDR1791,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2D0 "LUTDR1801,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2D4 "LUTDR1811,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2D8 "LUTDR1821,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2DC "LUTDR1831,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2E0 "LUTDR1841,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2E4 "LUTDR1851,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2E8 "LUTDR1861,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2EC "LUTDR1871,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2F0 "LUTDR1881,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2F4 "LUTDR1891,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2F8 "LUTDR1901,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2FC "LUTDR1911,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x300 "LUTDR1921,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x300 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x300 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x304 "LUTDR1931,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x304 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x304 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x308 "LUTDR1941,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x308 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x308 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x30C "LUTDR1951,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x30C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x30C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x310 "LUTDR1961,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x310 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x310 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x314 "LUTDR1971,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x314 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x314 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x318 "LUTDR1981,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x318 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x318 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x31C "LUTDR1991,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x31C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x31C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x320 "LUTDR2001,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x320 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x320 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x324 "LUTDR2011,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x324 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x324 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x328 "LUTDR2021,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x328 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x328 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x32C "LUTDR2031,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x32C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x32C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x330 "LUTDR2041,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x330 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x330 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x334 "LUTDR2051,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x334 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x334 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x338 "LUTDR2061,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x338 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x338 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x33C "LUTDR2071,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x33C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x33C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x340 "LUTDR2081,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x340 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x340 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x344 "LUTDR2091,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x344 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x344 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x348 "LUTDR2101,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x348 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x348 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x34C "LUTDR2111,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x34C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x34C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x350 "LUTDR2121,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x350 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x350 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x354 "LUTDR2131,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x354 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x354 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x358 "LUTDR2141,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x358 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x358 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x35C "LUTDR2151,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x35C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x35C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x360 "LUTDR2161,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x360 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x360 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x364 "LUTDR2171,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x364 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x364 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x368 "LUTDR2181,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x368 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x368 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x36C "LUTDR2191,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x36C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x36C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x370 "LUTDR2201,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x370 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x370 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x374 "LUTDR2211,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x374 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x374 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x378 "LUTDR2221,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x378 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x378 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x37C "LUTDR2231,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x37C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x37C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x380 "LUTDR2241,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x380 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x380 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x384 "LUTDR2251,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x384 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x384 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x388 "LUTDR2261,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x388 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x388 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x38C "LUTDR2271,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x38C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x38C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x390 "LUTDR2281,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x390 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x390 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x394 "LUTDR2291,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x394 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x394 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x398 "LUTDR2301,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x398 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x398 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x39C "LUTDR2311,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x39C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x39C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3A0 "LUTDR2321,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3A4 "LUTDR2331,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3A8 "LUTDR2341,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3AC "LUTDR2351,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3B0 "LUTDR2361,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3B4 "LUTDR2371,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3B8 "LUTDR2381,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3BC "LUTDR2391,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3C0 "LUTDR2401,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3C4 "LUTDR2411,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3C8 "LUTDR2421,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3CC "LUTDR2431,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3D0 "LUTDR2441,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3D4 "LUTDR2451,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3D8 "LUTDR2461,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3DC "LUTDR2471,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3E0 "LUTDR2481,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3E4 "LUTDR2491,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3E8 "LUTDR2501,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3EC "LUTDR2511,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3F0 "LUTDR2521,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3F4 "LUTDR2531,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3F8 "LUTDR2541,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3FC "LUTDR2551,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x400 "LUTDR2561,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x400 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x400 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x404 "LUTDR2571,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x404 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x404 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x408 "LUTDR2581,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x408 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x408 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x40C "LUTDR2591,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x40C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x40C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x410 "LUTDR2601,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x410 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x410 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x414 "LUTDR2611,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x414 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x414 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x418 "LUTDR2621,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x418 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x418 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x41C "LUTDR2631,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x41C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x41C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x420 "LUTDR2641,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x420 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x420 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x424 "LUTDR2651,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x424 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x424 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x428 "LUTDR2661,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x428 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x428 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x42C "LUTDR2671,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x42C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x42C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x430 "LUTDR2681,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x430 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x430 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x434 "LUTDR2691,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x434 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x434 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x438 "LUTDR2701,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x438 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x438 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x43C "LUTDR2711,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x43C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x43C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x440 "LUTDR2721,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x440 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x440 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x444 "LUTDR2731,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x444 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x444 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x448 "LUTDR2741,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x448 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x448 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x44C "LUTDR2751,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x44C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x44C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x450 "LUTDR2761,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x450 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x450 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x454 "LUTDR2771,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x454 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x454 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x458 "LUTDR2781,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x458 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x458 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x45C "LUTDR2791,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x45C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x45C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x460 "LUTDR2801,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x460 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x460 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x464 "LUTDR2811,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x464 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x464 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x468 "LUTDR2821,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x468 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x468 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x46C "LUTDR2831,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x46C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x46C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x470 "LUTDR2841,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x470 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x470 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x474 "LUTDR2851,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x474 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x474 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x478 "LUTDR2861,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x478 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x478 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x47C "LUTDR2871,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x47C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x47C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x480 "LUTDR2881,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x480 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x480 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x484 "LUTDR2891,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x484 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x484 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x488 "LUTDR2901,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x488 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x488 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x48C "LUTDR2911,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x48C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x48C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x490 "LUTDR2921,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x490 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x490 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x494 "LUTDR2931,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x494 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x494 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x498 "LUTDR2941,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x498 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x498 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x49C "LUTDR2951,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x49C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x49C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4A0 "LUTDR2961,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4A4 "LUTDR2971,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4A8 "LUTDR2981,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4AC "LUTDR2991,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4B0 "LUTDR3001,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4B4 "LUTDR3011,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4B8 "LUTDR3021,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4BC "LUTDR3031,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4C0 "LUTDR3041,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4C4 "LUTDR3051,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4C8 "LUTDR3061,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4CC "LUTDR3071,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4D0 "LUTDR3081,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4D4 "LUTDR3091,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4D8 "LUTDR3101,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4DC "LUTDR3111,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4E0 "LUTDR3121,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4E4 "LUTDR3131,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4E8 "LUTDR3141,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4EC "LUTDR3151,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4F0 "LUTDR3161,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4F4 "LUTDR3171,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4F8 "LUTDR3181,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4FC "LUTDR3191,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x500 "LUTDR3201,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x500 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x500 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x504 "LUTDR3211,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x504 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x504 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x508 "LUTDR3221,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x508 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x508 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x50C "LUTDR3231,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x50C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x50C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x510 "LUTDR3241,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x510 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x510 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x514 "LUTDR3251,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x514 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x514 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x518 "LUTDR3261,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x518 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x518 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x51C "LUTDR3271,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x51C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x51C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x520 "LUTDR3281,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x520 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x520 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x524 "LUTDR3291,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x524 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x524 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x528 "LUTDR3301,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x528 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x528 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x52C "LUTDR3311,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x52C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x52C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x530 "LUTDR3321,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x530 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x530 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x534 "LUTDR3331,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x534 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x534 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x538 "LUTDR3341,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x538 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x538 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x53C "LUTDR3351,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x53C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x53C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x540 "LUTDR3361,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x540 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x540 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x544 "LUTDR3371,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x544 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x544 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x548 "LUTDR3381,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x548 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x548 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x54C "LUTDR3391,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x54C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x54C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x550 "LUTDR3401,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x550 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x550 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x554 "LUTDR3411,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x554 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x554 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x558 "LUTDR3421,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x558 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x558 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x55C "LUTDR3431,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x55C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x55C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x560 "LUTDR3441,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x560 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x560 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x564 "LUTDR3451,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x564 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x564 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x568 "LUTDR3461,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x568 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x568 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x56C "LUTDR3471,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x56C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x56C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x570 "LUTDR3481,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x570 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x570 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x574 "LUTDR3491,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x574 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x574 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x578 "LUTDR3501,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x578 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x578 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x57C "LUTDR3511,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x57C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x57C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x580 "LUTDR3521,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x580 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x580 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x584 "LUTDR3531,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x584 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x584 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x588 "LUTDR3541,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x588 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x588 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x58C "LUTDR3551,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x58C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x58C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x590 "LUTDR3561,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x590 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x590 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x594 "LUTDR3571,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x594 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x594 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x598 "LUTDR3581,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x598 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x598 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x59C "LUTDR3591,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x59C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x59C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5A0 "LUTDR3601,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5A4 "LUTDR3611,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5A8 "LUTDR3621,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5AC "LUTDR3631,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5B0 "LUTDR3641,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5B4 "LUTDR3651,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5B8 "LUTDR3661,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5BC "LUTDR3671,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5C0 "LUTDR3681,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5C4 "LUTDR3691,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5C8 "LUTDR3701,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5CC "LUTDR3711,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5D0 "LUTDR3721,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5D4 "LUTDR3731,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5D8 "LUTDR3741,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5DC "LUTDR3751,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5E0 "LUTDR3761,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5E4 "LUTDR3771,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5E8 "LUTDR3781,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5EC "LUTDR3791,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5F0 "LUTDR3801,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5F4 "LUTDR3811,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5F8 "LUTDR3821,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5FC "LUTDR3831,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x600 "LUTDR3841,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x600 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x600 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x604 "LUTDR3851,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x604 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x604 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x608 "LUTDR3861,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x608 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x608 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x60C "LUTDR3871,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x60C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x60C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x610 "LUTDR3881,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x610 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x610 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x614 "LUTDR3891,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x614 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x614 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x618 "LUTDR3901,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x618 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x618 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x61C "LUTDR3911,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x61C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x61C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x620 "LUTDR3921,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x620 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x620 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x624 "LUTDR3931,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x624 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x624 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x628 "LUTDR3941,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x628 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x628 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x62C "LUTDR3951,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x62C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x62C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x630 "LUTDR3961,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x630 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x630 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x634 "LUTDR3971,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x634 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x634 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x638 "LUTDR3981,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x638 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x638 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x63C "LUTDR3991,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x63C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x63C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x640 "LUTDR4001,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x640 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x640 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x644 "LUTDR4011,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x644 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x644 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x648 "LUTDR4021,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x648 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x648 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x64C "LUTDR4031,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x64C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x64C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x650 "LUTDR4041,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x650 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x650 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x654 "LUTDR4051,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x654 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x654 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x658 "LUTDR4061,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x658 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x658 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x65C "LUTDR4071,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x65C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x65C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x660 "LUTDR4081,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x660 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x660 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x664 "LUTDR4091,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x664 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x664 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x668 "LUTDR4101,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x668 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x668 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x66C "LUTDR4111,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x66C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x66C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x670 "LUTDR4121,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x670 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x670 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x674 "LUTDR4131,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x674 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x674 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x678 "LUTDR4141,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x678 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x678 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x67C "LUTDR4151,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x67C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x67C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x680 "LUTDR4161,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x680 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x680 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x684 "LUTDR4171,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x684 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x684 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x688 "LUTDR4181,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x688 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x688 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x68C "LUTDR4191,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x68C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x68C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x690 "LUTDR4201,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x690 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x690 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x694 "LUTDR4211,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x694 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x694 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x698 "LUTDR4221,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x698 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x698 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x69C "LUTDR4231,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x69C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x69C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6A0 "LUTDR4241,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6A4 "LUTDR4251,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6A8 "LUTDR4261,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6AC "LUTDR4271,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6B0 "LUTDR4281,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6B4 "LUTDR4291,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6B8 "LUTDR4301,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6BC "LUTDR4311,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6C0 "LUTDR4321,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6C4 "LUTDR4331,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6C8 "LUTDR4341,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6CC "LUTDR4351,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6D0 "LUTDR4361,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6D4 "LUTDR4371,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6D8 "LUTDR4381,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6DC "LUTDR4391,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6E0 "LUTDR4401,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6E4 "LUTDR4411,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6E8 "LUTDR4421,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6EC "LUTDR4431,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6F0 "LUTDR4441,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6F4 "LUTDR4451,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6F8 "LUTDR4461,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6FC "LUTDR4471,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x700 "LUTDR4481,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x700 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x700 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x704 "LUTDR4491,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x704 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x704 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x708 "LUTDR4501,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x708 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x708 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x70C "LUTDR4511,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x70C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x70C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x710 "LUTDR4521,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x710 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x710 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x714 "LUTDR4531,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x714 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x714 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x718 "LUTDR4541,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x718 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x718 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x71C "LUTDR4551,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x71C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x71C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x720 "LUTDR4561,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x720 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x720 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x724 "LUTDR4571,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x724 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x724 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x728 "LUTDR4581,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x728 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x728 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x72C "LUTDR4591,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x72C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x72C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x730 "LUTDR4601,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x730 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x730 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x734 "LUTDR4611,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x734 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x734 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x738 "LUTDR4621,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x738 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x738 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x73C "LUTDR4631,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x73C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x73C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x740 "LUTDR4641,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x740 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x740 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x744 "LUTDR4651,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x744 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x744 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x748 "LUTDR4661,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x748 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x748 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x74C "LUTDR4671,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x74C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x74C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x750 "LUTDR4681,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x750 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x750 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x754 "LUTDR4691,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x754 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x754 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x758 "LUTDR4701,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x758 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x758 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x75C "LUTDR4711,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x75C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x75C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x760 "LUTDR4721,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x760 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x760 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x764 "LUTDR4731,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x764 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x764 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x768 "LUTDR4741,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x768 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x768 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x76C "LUTDR4751,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x76C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x76C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x770 "LUTDR4761,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x770 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x770 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x774 "LUTDR4771,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x774 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x774 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x778 "LUTDR4781,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x778 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x778 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x77C "LUTDR4791,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x77C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x77C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x780 "LUTDR4801,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x780 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x780 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x784 "LUTDR4811,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x784 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x784 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x788 "LUTDR4821,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x788 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x788 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x78C "LUTDR4831,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x78C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x78C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x790 "LUTDR4841,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x790 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x790 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x794 "LUTDR4851,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x794 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x794 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x798 "LUTDR4861,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x798 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x798 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x79C "LUTDR4871,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x79C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x79C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7A0 "LUTDR4881,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7A4 "LUTDR4891,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7A8 "LUTDR4901,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7AC "LUTDR4911,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7B0 "LUTDR4921,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7B4 "LUTDR4931,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7B8 "LUTDR4941,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7BC "LUTDR4951,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7C0 "LUTDR4961,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7C4 "LUTDR4971,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7C8 "LUTDR4981,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7CC "LUTDR4991,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7D0 "LUTDR5001,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7D4 "LUTDR5011,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7D8 "LUTDR5021,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7DC "LUTDR5031,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7E0 "LUTDR5041,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7E4 "LUTDR5051,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7E8 "LUTDR5061,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7EC "LUTDR5071,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7F0 "LUTDR5081,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7F4 "LUTDR5091,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7F8 "LUTDR5101,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7FC "LUTDR5111,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x800 "LUTDR5121,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x800 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x800 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x804 "LUTDR5131,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x804 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x804 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x808 "LUTDR5141,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x808 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x808 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x80C "LUTDR5151,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x80C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x80C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x810 "LUTDR5161,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x810 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x810 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x814 "LUTDR5171,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x814 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x814 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x818 "LUTDR5181,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x818 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x818 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x81C "LUTDR5191,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x81C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x81C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x820 "LUTDR5201,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x820 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x820 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x824 "LUTDR5211,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x824 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x824 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x828 "LUTDR5221,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x828 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x828 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x82C "LUTDR5231,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x82C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x82C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x830 "LUTDR5241,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x830 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x830 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x834 "LUTDR5251,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x834 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x834 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x838 "LUTDR5261,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x838 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x838 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x83C "LUTDR5271,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x83C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x83C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x840 "LUTDR5281,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x840 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x840 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x844 "LUTDR5291,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x844 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x844 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x848 "LUTDR5301,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x848 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x848 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x84C "LUTDR5311,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x84C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x84C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x850 "LUTDR5321,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x850 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x850 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x854 "LUTDR5331,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x854 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x854 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x858 "LUTDR5341,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x858 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x858 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x85C "LUTDR5351,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x85C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x85C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x860 "LUTDR5361,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x860 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x860 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x864 "LUTDR5371,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x864 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x864 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x868 "LUTDR5381,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x868 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x868 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x86C "LUTDR5391,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x86C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x86C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x870 "LUTDR5401,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x870 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x870 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x874 "LUTDR5411,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x874 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x874 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x878 "LUTDR5421,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x878 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x878 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x87C "LUTDR5431,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x87C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x87C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x880 "LUTDR5441,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x880 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x880 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x884 "LUTDR5451,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x884 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x884 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x888 "LUTDR5461,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x888 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x888 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x88C "LUTDR5471,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x88C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x88C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x890 "LUTDR5481,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x890 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x890 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x894 "LUTDR5491,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x894 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x894 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x898 "LUTDR5501,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x898 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x898 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x89C "LUTDR5511,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x89C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x89C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8A0 "LUTDR5521,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8A4 "LUTDR5531,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8A8 "LUTDR5541,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8AC "LUTDR5551,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8B0 "LUTDR5561,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8B4 "LUTDR5571,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8B8 "LUTDR5581,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8BC "LUTDR5591,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8C0 "LUTDR5601,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8C4 "LUTDR5611,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8C8 "LUTDR5621,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8CC "LUTDR5631,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8D0 "LUTDR5641,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8D4 "LUTDR5651,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8D8 "LUTDR5661,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8DC "LUTDR5671,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8E0 "LUTDR5681,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8E4 "LUTDR5691,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8E8 "LUTDR5701,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8EC "LUTDR5711,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8F0 "LUTDR5721,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8F4 "LUTDR5731,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8F8 "LUTDR5741,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8FC "LUTDR5751,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x900 "LUTDR5761,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x900 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x900 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x904 "LUTDR5771,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x904 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x904 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x908 "LUTDR5781,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x908 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x908 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x90C "LUTDR5791,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x90C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x90C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x910 "LUTDR5801,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x910 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x910 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x914 "LUTDR5811,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x914 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x914 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x918 "LUTDR5821,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x918 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x918 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x91C "LUTDR5831,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x91C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x91C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x920 "LUTDR5841,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x920 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x920 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x924 "LUTDR5851,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x924 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x924 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x928 "LUTDR5861,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x928 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x928 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x92C "LUTDR5871,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x92C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x92C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x930 "LUTDR5881,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x930 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x930 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x934 "LUTDR5891,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x934 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x934 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x938 "LUTDR5901,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x938 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x938 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x93C "LUTDR5911,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x93C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x93C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x940 "LUTDR5921,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x940 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x940 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x944 "LUTDR5931,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x944 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x944 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x948 "LUTDR5941,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x948 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x948 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x94C "LUTDR5951,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x94C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x94C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x950 "LUTDR5961,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x950 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x950 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x954 "LUTDR5971,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x954 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x954 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x958 "LUTDR5981,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x958 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x958 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x95C "LUTDR5991,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x95C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x95C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x960 "LUTDR6001,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x960 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x960 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x964 "LUTDR6011,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x964 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x964 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x968 "LUTDR6021,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x968 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x968 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x96C "LUTDR6031,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x96C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x96C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x970 "LUTDR6041,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x970 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x970 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x974 "LUTDR6051,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x974 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x974 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x978 "LUTDR6061,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x978 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x978 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x97C "LUTDR6071,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x97C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x97C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x980 "LUTDR6081,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x980 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x980 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x984 "LUTDR6091,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x984 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x984 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x988 "LUTDR6101,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x988 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x988 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x98C "LUTDR6111,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x98C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x98C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x990 "LUTDR6121,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x990 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x990 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x994 "LUTDR6131,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x994 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x994 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x998 "LUTDR6141,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x998 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x998 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x99C "LUTDR6151,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x99C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x99C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9A0 "LUTDR6161,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9A4 "LUTDR6171,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9A8 "LUTDR6181,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9AC "LUTDR6191,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9B0 "LUTDR6201,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9B4 "LUTDR6211,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9B8 "LUTDR6221,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9BC "LUTDR6231,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9C0 "LUTDR6241,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9C4 "LUTDR6251,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9C8 "LUTDR6261,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9CC "LUTDR6271,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9D0 "LUTDR6281,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9D4 "LUTDR6291,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9D8 "LUTDR6301,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9DC "LUTDR6311,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9E0 "LUTDR6321,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9E4 "LUTDR6331,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9E8 "LUTDR6341,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9EC "LUTDR6351,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9F0 "LUTDR6361,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9F4 "LUTDR6371,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9F8 "LUTDR6381,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9FC "LUTDR6391,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA00 "LUTDR6401,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA04 "LUTDR6411,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA08 "LUTDR6421,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA0C "LUTDR6431,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA10 "LUTDR6441,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA14 "LUTDR6451,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA18 "LUTDR6461,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA1C "LUTDR6471,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA20 "LUTDR6481,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA24 "LUTDR6491,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA28 "LUTDR6501,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA2C "LUTDR6511,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA30 "LUTDR6521,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA34 "LUTDR6531,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA38 "LUTDR6541,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA3C "LUTDR6551,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA40 "LUTDR6561,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA44 "LUTDR6571,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA48 "LUTDR6581,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA4C "LUTDR6591,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA50 "LUTDR6601,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA54 "LUTDR6611,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA58 "LUTDR6621,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA5C "LUTDR6631,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA60 "LUTDR6641,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA64 "LUTDR6651,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA68 "LUTDR6661,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA6C "LUTDR6671,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA70 "LUTDR6681,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA74 "LUTDR6691,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA78 "LUTDR6701,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA7C "LUTDR6711,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA80 "LUTDR6721,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA84 "LUTDR6731,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA88 "LUTDR6741,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA8C "LUTDR6751,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA90 "LUTDR6761,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA94 "LUTDR6771,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA98 "LUTDR6781,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA9C "LUTDR6791,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAA0 "LUTDR6801,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAA4 "LUTDR6811,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAA8 "LUTDR6821,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAAC "LUTDR6831,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAB0 "LUTDR6841,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAB4 "LUTDR6851,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAB8 "LUTDR6861,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xABC "LUTDR6871,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xABC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xABC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAC0 "LUTDR6881,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAC4 "LUTDR6891,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAC8 "LUTDR6901,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xACC "LUTDR6911,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xACC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xACC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAD0 "LUTDR6921,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAD4 "LUTDR6931,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAD8 "LUTDR6941,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xADC "LUTDR6951,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xADC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xADC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAE0 "LUTDR6961,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAE4 "LUTDR6971,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAE8 "LUTDR6981,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAEC "LUTDR6991,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAF0 "LUTDR7001,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAF4 "LUTDR7011,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAF8 "LUTDR7021,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAFC "LUTDR7031,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB00 "LUTDR7041,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB04 "LUTDR7051,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB08 "LUTDR7061,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB0C "LUTDR7071,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB10 "LUTDR7081,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB14 "LUTDR7091,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB18 "LUTDR7101,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB1C "LUTDR7111,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB20 "LUTDR7121,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB24 "LUTDR7131,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB28 "LUTDR7141,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB2C "LUTDR7151,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB30 "LUTDR7161,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB34 "LUTDR7171,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB38 "LUTDR7181,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB3C "LUTDR7191,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB40 "LUTDR7201,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB44 "LUTDR7211,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB48 "LUTDR7221,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB4C "LUTDR7231,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB50 "LUTDR7241,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB54 "LUTDR7251,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB58 "LUTDR7261,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB5C "LUTDR7271,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB60 "LUTDR7281,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB64 "LUTDR7291,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB68 "LUTDR7301,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB6C "LUTDR7311,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB70 "LUTDR7321,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB74 "LUTDR7331,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB78 "LUTDR7341,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB7C "LUTDR7351,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB80 "LUTDR7361,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB84 "LUTDR7371,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB88 "LUTDR7381,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB8C "LUTDR7391,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB90 "LUTDR7401,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB94 "LUTDR7411,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB98 "LUTDR7421,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB9C "LUTDR7431,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBA0 "LUTDR7441,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBA4 "LUTDR7451,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBA8 "LUTDR7461,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBAC "LUTDR7471,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBB0 "LUTDR7481,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBB4 "LUTDR7491,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBB8 "LUTDR7501,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBBC "LUTDR7511,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBC0 "LUTDR7521,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBC4 "LUTDR7531,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBC8 "LUTDR7541,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBCC "LUTDR7551,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBD0 "LUTDR7561,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBD4 "LUTDR7571,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBD8 "LUTDR7581,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBDC "LUTDR7591,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBE0 "LUTDR7601,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBE4 "LUTDR7611,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBE8 "LUTDR7621,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBEC "LUTDR7631,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBF0 "LUTDR7641,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBF4 "LUTDR7651,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBF8 "LUTDR7661,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBFC "LUTDR7671,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC00 "LUTDR7681,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC04 "LUTDR7691,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC08 "LUTDR7701,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC0C "LUTDR7711,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC10 "LUTDR7721,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC14 "LUTDR7731,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC18 "LUTDR7741,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC1C "LUTDR7751,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC20 "LUTDR7761,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC24 "LUTDR7771,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC28 "LUTDR7781,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC2C "LUTDR7791,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC30 "LUTDR7801,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC34 "LUTDR7811,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC38 "LUTDR7821,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC3C "LUTDR7831,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC40 "LUTDR7841,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC44 "LUTDR7851,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC48 "LUTDR7861,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC4C "LUTDR7871,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC50 "LUTDR7881,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC54 "LUTDR7891,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC58 "LUTDR7901,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC5C "LUTDR7911,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC60 "LUTDR7921,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC64 "LUTDR7931,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC68 "LUTDR7941,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC6C "LUTDR7951,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC70 "LUTDR7961,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC74 "LUTDR7971,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC78 "LUTDR7981,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC7C "LUTDR7991,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC80 "LUTDR8001,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC84 "LUTDR8011,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC88 "LUTDR8021,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC8C "LUTDR8031,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC90 "LUTDR8041,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC94 "LUTDR8051,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC98 "LUTDR8061,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC9C "LUTDR8071,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCA0 "LUTDR8081,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCA4 "LUTDR8091,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCA8 "LUTDR8101,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCAC "LUTDR8111,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCB0 "LUTDR8121,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCB4 "LUTDR8131,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCB8 "LUTDR8141,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCBC "LUTDR8151,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCC0 "LUTDR8161,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCC4 "LUTDR8171,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCC8 "LUTDR8181,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCCC "LUTDR8191,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCD0 "LUTDR8201,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCD4 "LUTDR8211,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCD8 "LUTDR8221,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCDC "LUTDR8231,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCE0 "LUTDR8241,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCE4 "LUTDR8251,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCE8 "LUTDR8261,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCEC "LUTDR8271,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCF0 "LUTDR8281,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCF4 "LUTDR8291,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCF8 "LUTDR8301,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCFC "LUTDR8311,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD00 "LUTDR8321,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD04 "LUTDR8331,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD08 "LUTDR8341,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD0C "LUTDR8351,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD10 "LUTDR8361,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD14 "LUTDR8371,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD18 "LUTDR8381,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD1C "LUTDR8391,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD20 "LUTDR8401,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD24 "LUTDR8411,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD28 "LUTDR8421,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD2C "LUTDR8431,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD30 "LUTDR8441,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD34 "LUTDR8451,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD38 "LUTDR8461,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD3C "LUTDR8471,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD40 "LUTDR8481,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD44 "LUTDR8491,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD48 "LUTDR8501,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD4C "LUTDR8511,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD50 "LUTDR8521,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD54 "LUTDR8531,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD58 "LUTDR8541,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD5C "LUTDR8551,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD60 "LUTDR8561,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD64 "LUTDR8571,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD68 "LUTDR8581,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD6C "LUTDR8591,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD70 "LUTDR8601,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD74 "LUTDR8611,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD78 "LUTDR8621,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD7C "LUTDR8631,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD80 "LUTDR8641,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD84 "LUTDR8651,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD88 "LUTDR8661,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD8C "LUTDR8671,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD90 "LUTDR8681,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD94 "LUTDR8691,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD98 "LUTDR8701,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD9C "LUTDR8711,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDA0 "LUTDR8721,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDA4 "LUTDR8731,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDA8 "LUTDR8741,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDAC "LUTDR8751,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDB0 "LUTDR8761,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDB4 "LUTDR8771,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDB8 "LUTDR8781,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDBC "LUTDR8791,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDC0 "LUTDR8801,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDC4 "LUTDR8811,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDC8 "LUTDR8821,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDCC "LUTDR8831,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDD0 "LUTDR8841,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDD4 "LUTDR8851,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDD8 "LUTDR8861,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDDC "LUTDR8871,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDE0 "LUTDR8881,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDE4 "LUTDR8891,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDE8 "LUTDR8901,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDEC "LUTDR8911,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDF0 "LUTDR8921,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDF4 "LUTDR8931,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDF8 "LUTDR8941,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDFC "LUTDR8951,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE00 "LUTDR8961,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE04 "LUTDR8971,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE08 "LUTDR8981,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE0C "LUTDR8991,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE10 "LUTDR9001,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE14 "LUTDR9011,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE18 "LUTDR9021,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE1C "LUTDR9031,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE20 "LUTDR9041,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE24 "LUTDR9051,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE28 "LUTDR9061,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE2C "LUTDR9071,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE30 "LUTDR9081,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE34 "LUTDR9091,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE38 "LUTDR9101,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE3C "LUTDR9111,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE40 "LUTDR9121,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE44 "LUTDR9131,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE48 "LUTDR9141,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE4C "LUTDR9151,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE50 "LUTDR9161,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE54 "LUTDR9171,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE58 "LUTDR9181,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE5C "LUTDR9191,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE60 "LUTDR9201,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE64 "LUTDR9211,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE68 "LUTDR9221,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE6C "LUTDR9231,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE70 "LUTDR9241,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE74 "LUTDR9251,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE78 "LUTDR9261,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE7C "LUTDR9271,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE80 "LUTDR9281,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE84 "LUTDR9291,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE88 "LUTDR9301,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE8C "LUTDR9311,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE90 "LUTDR9321,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE94 "LUTDR9331,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE98 "LUTDR9341,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE9C "LUTDR9351,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEA0 "LUTDR9361,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEA4 "LUTDR9371,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEA8 "LUTDR9381,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEAC "LUTDR9391,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEB0 "LUTDR9401,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEB4 "LUTDR9411,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEB8 "LUTDR9421,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEBC "LUTDR9431,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEC0 "LUTDR9441,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEC4 "LUTDR9451,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEC8 "LUTDR9461,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xECC "LUTDR9471,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xECC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xECC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xED0 "LUTDR9481,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xED0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xED0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xED4 "LUTDR9491,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xED4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xED4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xED8 "LUTDR9501,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xED8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xED8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEDC "LUTDR9511,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEE0 "LUTDR9521,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEE4 "LUTDR9531,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEE8 "LUTDR9541,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEEC "LUTDR9551,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEF0 "LUTDR9561,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEF4 "LUTDR9571,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEF8 "LUTDR9581,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEFC "LUTDR9591,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF00 "LUTDR9601,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF04 "LUTDR9611,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF08 "LUTDR9621,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF0C "LUTDR9631,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF10 "LUTDR9641,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF14 "LUTDR9651,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF18 "LUTDR9661,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF1C "LUTDR9671,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF20 "LUTDR9681,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF24 "LUTDR9691,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF28 "LUTDR9701,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF2C "LUTDR9711,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF30 "LUTDR9721,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF34 "LUTDR9731,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF38 "LUTDR9741,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF3C "LUTDR9751,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF40 "LUTDR9761,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF44 "LUTDR9771,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF48 "LUTDR9781,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF4C "LUTDR9791,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF50 "LUTDR9801,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF54 "LUTDR9811,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF58 "LUTDR9821,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF5C "LUTDR9831,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF60 "LUTDR9841,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF64 "LUTDR9851,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF68 "LUTDR9861,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF6C "LUTDR9871,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF70 "LUTDR9881,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF74 "LUTDR9891,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF78 "LUTDR9901,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF7C "LUTDR9911,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF80 "LUTDR9921,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF84 "LUTDR9931,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF88 "LUTDR9941,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF8C "LUTDR9951,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF90 "LUTDR9961,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF94 "LUTDR9971,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF98 "LUTDR9981,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF9C "LUTDR9991,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFA0 "LUTDR10001,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFA4 "LUTDR10011,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFA8 "LUTDR10021,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFAC "LUTDR10031,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFB0 "LUTDR10041,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFB4 "LUTDR10051,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFB8 "LUTDR10061,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFBC "LUTDR10071,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFC0 "LUTDR10081,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFC4 "LUTDR10091,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFC8 "LUTDR10101,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFCC "LUTDR10111,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFD0 "LUTDR10121,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFD4 "LUTDR10131,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFD8 "LUTDR10141,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFDC "LUTDR10151,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFE0 "LUTDR10161,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFE4 "LUTDR10171,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFE8 "LUTDR10181,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFEC "LUTDR10191,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFF0 "LUTDR10201,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFF4 "LUTDR10211,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFF8 "LUTDR10221,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFFC "LUTDR10231,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
tree.end
tree "IMR_LX_2"
base ad:0xFE880000
group.long 0x8++0x3
line.long 0x0 "CR2,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "SWRST,Software Reset" "0: Cancels a software reset for this module,1: Applies a software reset to this module"
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hexmask.long.word 0x0 1.--14. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "RS,Rendering Start" "0: Does not start rendering,1: Starts rendering"
rgroup.long 0xC++0x3
line.long 0x0 "SR2,"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "WERR,Indicates that this module has received the WUP signal from another module while it is not executing a display list. This bit is cleared to 0 by writing 1 to the WERRCLR bit in SRCR." "0: This module has not received the WUP signal..,1: This module has received the WUP signal while it.."
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bitfld.long 0x0 10. "WOVF,Indicates that the number of WUP signals this module has received but not processed has exceeded the maximum number allowed. The maximum number in this product is 1. This bit is cleared to 0 by writing 1 to the WOVFCLR bit in SRCR." "0: The number of WUP signals that have not been..,1: The number of WUP signals that have not been.."
hexmask.long.byte 0x0 6.--9. 1. "Reserved_6,Reserved"
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bitfld.long 0x0 5. "REN,Rendering-in-Progress Flag" "0: Rendering is not in progress,1: Rendering is in progress"
bitfld.long 0x0 3.--4. "Reserved_3,Reserved" "0,1,2,3"
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bitfld.long 0x0 2. "INT,INT Instruction Decode" "0: The INT instruction in the DL has not been decoded,1: The INT instruction in the DL has been decoded"
bitfld.long 0x0 1. "IER,Illegal Instruction Decode" "0: No illegal instruction has been decoded in the DL,1: An illegal instruction has been decoded in the DL"
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bitfld.long 0x0 0. "TRA,Trap" "0: Rendering has not been started or is in progress,1: The TRAP instruction has been decoded and.."
group.long 0x10++0xB
line.long 0x0 "SRCR2,Writing 1 to a bit in SRCR clears the corresponding status bit in the status register (SR)."
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "WERRCLR,Writing 1 to this bit clears the WERR bit in SR." "0,1"
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bitfld.long 0x0 10. "WOVFCLR,Writing 1 to this bit clears the WOVF bit in SR." "0,1"
hexmask.long.byte 0x0 3.--9. 1. "Reserved_3,Reserved"
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bitfld.long 0x0 2. "INTCLR,Writing 1 to this bit clears the INT bit in SR." "0,1"
bitfld.long 0x0 1. "IERCLR,Writing 1 to this bit clears the IER bit in SR." "0,1"
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bitfld.long 0x0 0. "TRACLR,Writing 1 to this bit clears the TRA bit in SR." "0,1"
line.long 0x4 "ICR2,The effective bits in the ICR are used to enable setting of the corresponding bit in the status register (SR) in response to the corresponding interrupt sources. To allow the generation of an interrupt. this register should be set to enable setting.."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x4 11. "WERRENB,0: Disables the generation of an interrupt when this module receives the WUP signal from another module while it is not executing a display list." "0: Disables the generation of an interrupt when..,1: Enables the generation of an interrupt when this.."
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bitfld.long 0x4 10. "WOVFENB,0: Disables the generation of an interrupt when the number of WUP signals this module has received but not processed exceeds the maximum number allowed." "0: Disables the generation of an interrupt when the..,1: Enables the generation of an interrupt when the.."
hexmask.long.byte 0x4 5.--9. 1. "Reserved_5,Reserved"
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rbitfld.long 0x4 3.--4. "Reserved_3,Reserved" "0,1,2,3"
bitfld.long 0x4 2. "INTENB,0: Disables the generation of INT interrupts." "0: Disables the generation of INT interrupts,1: Enables the generation of an interrupt when an.."
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bitfld.long 0x4 1. "IERENB,0: Disables the generation of IER interrupts generation." "0: Disables the generation of IER interrupts..,1: Enables the generation of an interrupt when an.."
bitfld.long 0x4 0. "TRAENB,0: Disables the generation of TRAP interrupts." "0: Disables the generation of TRAP interrupts,1: Enables the generation of an interrupt when a.."
line.long 0x8 "IMR2,The effective bits in the IMR are used for masking or non-masking of the output of the corresponding interrupt to the interrupt controller when the corresponding interrupt source bits are set in the SR. To allow interrupt generation. this register.."
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x8 11. "WERRM,0: The generation of interrupts when this module receives the WUP signal from another module while it is not executing a display list is not masked." "0: The generation of interrupts when this module..,1: The generation of interrupts when this module.."
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bitfld.long 0x8 10. "WOVFM,0: The generation of interrupts when the number of WUP signals this module has received but not processed exceeds the maximum number allowed is not masked." "0: The generation of interrupts when the number of..,1: The generation of interrupts when the number of.."
hexmask.long.byte 0x8 5.--9. 1. "Reserved_5,Reserved"
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rbitfld.long 0x8 3.--4. "Reserved_3,Reserved" "0,1,2,3"
bitfld.long 0x8 2. "INM,0: The generation of INT interrupts is not masked." "0: The generation of INT interrupts is not masked,1: The generation of INT interrupts is masked"
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bitfld.long 0x8 1. "IEM,0: The generation of IER interrupts is not masked." "0: The generation of IER interrupts is not masked,1: The generation of IER interrupts is masked"
bitfld.long 0x8 0. "TRAM,0: The generation of TRAP interrupts is not masked." "0: The generation of TRAP interrupts is not masked,1: The generation of TRAP interrupts is masked"
rgroup.long 0x1C++0x7
line.long 0x0 "DLSP2,"
hexmask.long 0x0 0.--31. 1. "DLSP,DL Stack Pointer"
line.long 0x4 "DLPR2,"
hexmask.long 0x4 0.--31. 1. "DLP,DL Pointer"
group.long 0x28++0x3
line.long 0x0 "EDLR2,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "EDL,Executed DL Status"
group.long 0x30++0x13
line.long 0x0 "DLSAR2,"
hexmask.long 0x0 0.--31. 1. "DLSA,DL Start Address"
line.long 0x4 "DSAR2,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long 0x4 6.--31. 1. "DSA,Destination Start Address"
hexmask.long.byte 0x4 0.--5. 1. "Reserved_0,Reserved"
line.long 0x8 "SSAR2,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x8 8.--31. 1. "SSAR,SRC Start Address"
bitfld.long 0x8 6.--7. "Reserved_6,Reserved" "0,1,2,3"
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hexmask.long.byte 0x8 0.--5. 1. "Reserved_0,Reserved"
line.long 0xC "DSTR2,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.word 0xC 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0xC 0.--16. 1. "DST,Specifies the memory width of the DST area in bytes within a range from 64 to 65 536 bytes in 64-byte alignment. In tile addressing mode  quadruple the value of the setting is used as the memory width. To modify the value during execution  execute.."
line.long 0x10 "SSTR2,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.word 0x10 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x10 0.--16. 1. "SSTR,Specifies the memory width of the SRC area in bytes within a range from 256 to 65 536 bytes in 256-byte alignment in the linear addressing mode when reading texture data from the external memory. In tile addressing mode  quadruple the value of the.."
group.long 0x50++0x3
line.long 0x0 "DSOR2,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long 0x0 5.--31. 1. "DSOFSTA,In Y/UV separate output mode  set an offset value for the UV output destination address that corresponds to the output destination address of Y. The offset must be a signed 32-bit value. Specify the value in 64-byte alignment."
hexmask.long.byte 0x0 0.--4. 1. "Reserved_0,Reserved"
rgroup.long 0x54++0x3
line.long 0x0 "CMRCR2,CMRCR indicates the output mode. bit precision. and correction mode for the drawing results. To set each bit in this register to 1. write 1 to the corresponding bit in CMRCSR. To clear each bit to 0. write 1 to the corresponding bit in CMRCCR."
bitfld.long 0x0 31. "EFPE,Enables or disables the extended filtering pipeline." "0: Disabled,1: Enabled"
bitfld.long 0x0 30. "CP32E,Copy 32-bit mode" "0: Disables copying 32-bit data,1: Enables copying 32-bit data"
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bitfld.long 0x0 28.--29. "SUV1416,Specifies the pixel format of the hue of the source data as 14 or 16 bpp or makes neither specification." "0: Does not specify the format as 14 or 16 bpp,?,?,?"
bitfld.long 0x0 26.--27. "DUV1416,Specifies the pixel format of the hue of the destination data as 14 or 16 bpp or makes neither specification." "0: Does not specify the format as 14 or 16 bpp,?,?,?"
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bitfld.long 0x0 24.--25. "SY1416,Specifies the pixel format of the luminance of the source data as 14 or 16 bpp or makes neither specification." "0: Does not specify the format as 14 or 16 bpp,?,?,?"
bitfld.long 0x0 22.--23. "DY1416,Specifies the pixel format of the luminance of the destination data as 14 or 16 bpp or makes neither specification." "0: Does not specify the format as 14 or 16 bpp,?,?,?"
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bitfld.long 0x0 20.--21. "Reserved_20,Reserved" "0,1,2,3"
bitfld.long 0x0 19. "CLSM,Hue Correction Scale Parameter Register Specification Mode" "0: Uses the hue correction scale parameters..,1: Uses the hue correction scale parameters.."
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bitfld.long 0x0 18. "CLOM,Hue Correction Offset Parameter Register Specification Mode" "0: Uses the hue correction offset parameters..,1: Uses the hue correction offset parameters.."
bitfld.long 0x0 17. "LUSM,Luminance Correction Scale Parameter Register Specification Mode" "0: Uses the luminance correction scale parameters..,1: Uses the luminance correction scale parameter.."
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bitfld.long 0x0 16. "LUOM,Luminance Correction Offset Parameter Register Specification Mode" "0: Uses the luminance correction offset parameters..,1: Uses the luminance correction offset parameter.."
bitfld.long 0x0 15. "CP16E,Copy 16-bit mode" "0: Disables copying 16-bit data,1: Enables copying 16-bit data"
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bitfld.long 0x0 14. "YCM,YC Mode" "0: Processes Y,1: Processes UV"
bitfld.long 0x0 13. "UVS,Specifies whether the input UV plane is in YUV420 format." "0: The input UV plane is not in YUV420 format,1: The input UV plane is in YUV420 format"
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bitfld.long 0x0 12. "SY12,Specifies the precision of luminance processing of source data." "0: 8-bpp precision or 10-bpp precision,1: 12-bpp precision"
bitfld.long 0x0 11. "SY10,Specifies the precision of luminance processing of source data." "0: 8-bpp precision or 12-bpp precision,1: 10-bpp precision"
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bitfld.long 0x0 10. "YOM,Output only Y data and discard U/V data." "0,1"
bitfld.long 0x0 9. "Y12,Set this bit when Y data is output in 12-bpp precision." "0: Outputs Y data in 8- or 10-bpp precision,1: Outputs Y data in 12-bpp precision"
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bitfld.long 0x0 8. "Y10,Set this bit when Y data is output in 10-bpp precision." "0: Outputs Y data in 8- or 12-bpp precision,1: Outputs Y data in 10-bpp precision"
bitfld.long 0x0 7. "YISM,Selects the output format for YUV data." "0: Produces the interleave output of YUV data,1: Produces the separate output of Y/UV data"
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bitfld.long 0x0 5.--6. "SUV,Specifies the precision of color difference processing of source data." "0: 8-bpp precision,1: 10-bpp precision,?,?"
bitfld.long 0x0 3.--4. "DUV,Specifies the precision of color difference of output data." "0: Outputs UV data in 8-bpp precision,1: Outputs UV data in 10-bpp precision,?,?"
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bitfld.long 0x0 2. "CLCE,Hue Correction Enable" "0: Disables hue correction,1: Enables hue correction"
bitfld.long 0x0 1. "LUCE,Luminance Correction Enable" "0: Disables luminance correction,1: Enables luminance correction"
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bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x58++0x7
line.long 0x0 "CMRCSR2,"
bitfld.long 0x0 31. "EFPES,0: The EFPE bit in CMRCR is not set to 1." "0: The EFPE bit in CMRCR is not set to 1,1: The EFPE bit in CMRCR is set to 1"
bitfld.long 0x0 30. "CP32ES,0: The CP32E bit in CMRCR is not set to 1." "0: The CP32E bit in CMRCR is not set to 1,1: The CP32E bit in CMRCR is set to 1"
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bitfld.long 0x0 28.--29. "SUV1416S,00: Neither of the SUV1416 bits in CMRCR is set to 1." "0: Neither of the SUV1416 bits in CMRCR is set to 1,1: Sets bit 0 of the SUV1416 bits in CMRCR to 1,?,?"
bitfld.long 0x0 26.--27. "DUV1416S,00: Neither of the DUV1416 bits in CMRCR is set to 1." "0: Neither of the DUV1416 bits in CMRCR is set to 1,1: Sets bit 0 of the DUV1416 bits in CMRCR to 1,?,?"
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bitfld.long 0x0 24.--25. "SY1416S,00: Neither of the SY1416 bits in CMRCR is set to 1." "0: Neither of the SY1416 bits in CMRCR is set to 1,1: Sets bit 0 of the SY1416 bits in CMRCR to 1,?,?"
bitfld.long 0x0 22.--23. "DY1416S,00: Neither of the DY1416 bits in CMRCR is set to 1." "0: Neither of the DY1416 bits in CMRCR is set to 1,1: Sets bit 0 of the DY1416 bits in CMRCR to 1,?,?"
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rbitfld.long 0x0 20.--21. "Reserved_20,Reserved" "0,1,2,3"
bitfld.long 0x0 19. "CLSMS,0: The CLSM bit in CMRCR is not set to 1." "0: The CLSM bit in CMRCR is not set to 1,1: The CLSM bit in CMRCR is set to 1"
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bitfld.long 0x0 18. "CLOMS,0: The CLOM bit in CMRCR is not set to 1." "0: The CLOM bit in CMRCR is not set to 1,1: The CLOM bit in CMRCR is set to 1"
bitfld.long 0x0 17. "LUSMS,0: The LUSM bit in CMRCR is not set to 1." "0: The LUSM bit in CMRCR is not set to 1,1: The LUSM bit in CMRCR is set to 1"
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bitfld.long 0x0 16. "LUOMS,0: The LUOM bit in CMRCR is not set to 1." "0: The LUOM bit in CMRCR is not set to 1,1: The LUOM bit in CMRCR is set to 1"
bitfld.long 0x0 15. "CP16ES,0: The CP16E bit in CMRCR is not set to 1." "0: The CP16E bit in CMRCR is not set to 1,1: The CP16E bit in CMRCR is set to 1"
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bitfld.long 0x0 14. "YCMS,0: The YCM bit in CMRCR is not set to 1." "0: The YCM bit in CMRCR is not set to 1,1: The YCM to bit in CMRCR is set to 1"
bitfld.long 0x0 13. "UVSS,0: The UVS bit in CMRCR is not set to 1." "0: The UVS bit in CMRCR is not set to 1,1: The UVS bit in CMRCR is set to 1"
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bitfld.long 0x0 12. "SY12S,0: The SY12 bit in CMRCR is not set to 1." "0: The SY12 bit in CMRCR is not set to 1,1: The SY12 bit in CMRCR is set to 1"
bitfld.long 0x0 11. "SY10S,0: The SY10 bit in CMRCR is not set to 1." "0: The SY10 bit in CMRCR is not set to 1,1: The SY10 bit in CMRCR is set to 1"
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bitfld.long 0x0 10. "YOMS,0: The YOM bit in CMRCR is not set to 1." "0: The YOM bit in CMRCR is not set to 1,1: The YOM bit in CMRCR is set to 1"
bitfld.long 0x0 9. "Y12S,0: The Y12 bit in CMRCR is not set to 1." "0: The Y12 bit in CMRCR is not set to 1,1: The Y12 bit in CMRCR is set to 1"
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bitfld.long 0x0 8. "Y10S,0: The Y10 bit in CMRCR is not set to 1." "0: The Y10 bit in CMRCR is not set to 1,1: The Y10 bit in CMRCR is set to 1"
bitfld.long 0x0 7. "YISMS,0: The YISM bit in CMRCR is not set to 1." "0: The YISM bit in CMRCR is not set to 1,1: The YISM bit in CMRCR is set to 1"
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bitfld.long 0x0 5.--6. "SUVS,00: Neither of the SUV bits in CMRCR is set to 1." "0: Neither of the SUV bits in CMRCR is set to 1,1: Sets bit 0 of the SUV bits in CMRCR to 1,?,?"
bitfld.long 0x0 3.--4. "DUVS,00: Neither of the DUV bits in CMRCR is set to 1." "0: Neither of the DUV bits in CMRCR is set to 1,1: Sets bit 0 of the DUV bits in CMRCR to 1,?,?"
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bitfld.long 0x0 2. "CLCES,0: The CLCE bit in CMRCR is not set to 1." "0: The CLCE bit in CMRCR is not set to 1,1: The CLCE bit in CMRCR is set to 1"
bitfld.long 0x0 1. "LUCES,0: The LUCE bit in CMRCR is not set to 1." "0: The LUCE bit in CMRCR is not set to 1,1: The LUCE bit in CMRCR is set to 1"
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rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "CMRCCR2,CMRCCR is used to clear the corresponding bits of the rendering mode register (CMRCR). To disable the modes and functions selected by the bits in CMRCR. write 1 to the corresponding bits in this register."
bitfld.long 0x4 31. "EFPEC,0: Does not clear the EFPE bit in CMRCR to 0." "0: Does not clear the EFPE bit in CMRCR to 0,1: Clears the EFPE bit in CMRCR to 0"
bitfld.long 0x4 30. "CP32EC,0: Does not clear the CP32E bit in CMRCR to 0." "0: Does not clear the CP32E bit in CMRCR to 0,1: Clears the CP32E bit in CMRCR to 0"
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bitfld.long 0x4 28.--29. "SUV1416C,00: Does not clear either of the SUV1416 bits in CMRCR to 0." "0: Does not clear either of the SUV1416 bits in..,1: Clears bit 0 of the SUV1416 bits in CMRCR to 0,?,?"
bitfld.long 0x4 26.--27. "DUV1416C,00: Does not clear either of the DUV1416 bits in CMRCR to 0." "0: Does not clear either of the DUV1416 bits in..,1: Clears bit 0 of the DUV1416 bits in CMRCR to 0,?,?"
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bitfld.long 0x4 24.--25. "SY1416C,00: Does not clear either of the SY1416 bits in CMRCR to 0." "0: Does not clear either of the SY1416 bits in..,1: Clears bit 0 of the SY1416 bits in CMRCR to 0,?,?"
bitfld.long 0x4 22.--23. "DY1416C,00: Does not clear either of the DY1416 bits in CMRCR to 0." "0: Does not clear either of the DY1416 bits in..,1: Clears bit 0 of the DY1416 bits in CMRCR to 0,?,?"
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rbitfld.long 0x4 20.--21. "Reserved_20,Reserved" "0,1,2,3"
bitfld.long 0x4 19. "CLSMC,0: Does not clear the CLSM bit in CMRCR to 0." "0: Does not clear the CLSM bit in CMRCR to 0,1: Clears the CLSM bit in CMRCR to 0"
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bitfld.long 0x4 18. "CLOMC,0: Does not clear the CLOM bit in CMRCR to 0." "0: Does not clear the CLOM bit in CMRCR to 0,1: Clears the CLOM bit in CMRCR to 0"
bitfld.long 0x4 17. "LUSMC,0: Does not clear the LUSM bit in CMRCR to 0." "0: Does not clear the LUSM bit in CMRCR to 0,1: Clears the LUSM bit in CMRCR to 0"
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bitfld.long 0x4 16. "LUOMC,0: Does not clear the LUOM bit in CMRCR to 0." "0: Does not clear the LUOM bit in CMRCR to 0,1: Clears the LUOM bit in CMRCR to 0"
bitfld.long 0x4 15. "CP16EC,0: Does not clear the CP16E bit in CMRCR to 0." "0: Does not clear the CP16E bit in CMRCR to 0,1: Clears the CP16E bit in CMRCR to 0"
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bitfld.long 0x4 14. "YCMC,0: Does not clear the YCM bit in CMRCR to 0." "0: Does not clear the YCM bit in CMRCR to 0,1: Clears the YCM bit in CMRCR to 0"
bitfld.long 0x4 13. "UVSC,0: Does not clear the UVS bit in CMRCR to 0." "0: Does not clear the UVS bit in CMRCR to 0,1: Clears the UVS bit in CMRCR to 0"
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bitfld.long 0x4 12. "SY12C,0: Does not clear the SY12 bit in CMRCR to 0." "0: Does not clear the SY12 bit in CMRCR to 0,1: Clears the SY12 bit in CMRCR to 0"
bitfld.long 0x4 11. "SY10C,0: Does not clear the SY10 bit in CMRCR to 0." "0: Does not clear the SY10 bit in CMRCR to 0,1: Clears the SY10 bit in CMRCR to 0"
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bitfld.long 0x4 10. "YOMC,0: Does not clear the YOM bit in CMRCR to 0." "0: Does not clear the YOM bit in CMRCR to 0,1: Clears the YOM bit in CMRCR to 0"
bitfld.long 0x4 9. "Y12C,0: Does not clear the Y12 bit in CMRCR to 0." "0: Does not clear the Y12 bit in CMRCR to 0,1: Clears the Y12 bit in CMRCR to 0"
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bitfld.long 0x4 8. "Y10C,0: Does not clear the Y10 bit in CMRCR to 0." "0: Does not clear the Y10 bit in CMRCR to 0,1: Clears the Y10 bit in CMRCR to 0"
bitfld.long 0x4 7. "YISMC,0: Does not clear the YISM bit in CMRCR to 0." "0: Does not clear the YISM bit in CMRCR to 0,1: Clears the YISM bit in CMRCR to 0"
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bitfld.long 0x4 5.--6. "SUVC,00: Does not clear either of the SUV bits in CMRCR to 0." "0: Does not clear either of the SUV bits in CMRCR..,1: Clears bit 0 of the SUV bits in CMRCR to 0,?,?"
bitfld.long 0x4 3.--4. "DUVC,00: Does not clear either of the DUV bit in CMRCR to 0." "0: Does not clear either of the DUV bit in CMRCR to 0,1: Clears bit 0 of the DUV bits in CMRCR to 0,?,?"
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bitfld.long 0x4 2. "CLCEC,0: Does not clear the CLCE bit in CMRCR to 0." "0: Does not clear the CLCE bit in CMRCR to 0,1: Clears the CLCE bit in CMRCR to 0"
bitfld.long 0x4 1. "LUCEC,0: Does not clear the LUCE bit in CMRCR to 0." "0: Does not clear the LUCE bit in CMRCR to 0,1: Clears the LUCE bit in CMRCR to 0"
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rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x60++0x3
line.long 0x0 "TRIMR2,TRIMR is used to select the various triangle drawing modes including coordinate generation modes and filter types. To set each bit in this register to 1. write 1 to the corresponding bit in TRIMSR. To clear each bit to 0. write 1 to the.."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
bitfld.long 0x0 24. "DIDL,Disable input information of CLCE or LUCE mode in DL." "0: Enable input information of CLCE or LUCE mode in..,1: Disable input information of CLCE or LUCE mode.."
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bitfld.long 0x0 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 20. "UVSHFVAL,Specifies one bit of logical right-shifting after filtering when the extended filtering pipeline is in use. This setting is applied to the UV plane as described in Table 56.12. Otherwise  SHFE and SHFVAL settings are used. This setting is only.." "0,1"
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bitfld.long 0x0 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 16. "SHFVAL,Specifies one bit of logical right-shifting after filtering when the extended filtering pipeline is in use. Sets the UV plane as described in Table 56.12. This setting is only possible when the EFPE bit in CMRCR and the SHFE bit in this register.." "0,1"
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bitfld.long 0x0 15. "UVSHFE,Specifies whether to truncate the fractional part or to retain the specified fractional digits following filtering by the extended filtering pipeline. This setting is applied to the UV plane as described in Table 56.12. Otherwise  SHFE and SHFVAL.." "0: The fractional part is truncated after filtering,1: Some of the digits of the fractional part after.."
bitfld.long 0x0 14. "SHFE,Specifies whether to truncate the fractional part or to retain the specified fractional digits following filtering by the extended filtering pipeline. Set the UV plane as described in Table 56.12." "0: The fractional part is truncated after filtering,1: Some of the digits of the fractional part after.."
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bitfld.long 0x0 13. "RDE,Specifies how to round the fractional part in filtering." "0: Truncation,1: Rounding up or down"
bitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
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bitfld.long 0x0 11. "TFE,Pyramidal Image Filtering Enable" "0: Disables the filtering between two adjacent..,1: Enables the filtering between two adjacent.."
hexmask.long.byte 0x0 7.--10. 1. "Reserved_7,Reserved"
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bitfld.long 0x0 6. "TCM,Triangle Clockwise Mode" "0: Specifies triangle vertexes counterclockwise,1: Specifies triangle vertexes clockwise"
bitfld.long 0x0 4.--5. "Reserved_4,Reserved" "0,1,2,3"
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bitfld.long 0x0 3. "AUTOSG,Automatic Source Coordinate Generation Mode" "0: Disables the automatic source coordinate..,1: Enables the automatic source coordinate.."
bitfld.long 0x0 2. "AUTODG,Automatic Destination Coordinate Generation Mode" "0: Disables the automatic destination coordinate..,1: Enables the automatic destination coordinate.."
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bitfld.long 0x0 1. "BFE,Bilinear Filter Enable" "0: Bilinear filtering is not used,1: Bilinear filtering is used"
bitfld.long 0x0 0. "TME,Texture Mapping Enable" "0: The single color specified by TRICR,1: Texture mapping is used"
group.long 0x64++0x17
line.long 0x0 "TRIMSR2,TRIMSR is used to set the corresponding bits of the triangle mode register (TRIMR). To enable the modes and functions selected by the bits in TRIMR. write 1 to the corresponding bits in this register."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
bitfld.long 0x0 24. "DIDLS,0: The DIDL bit is not set to 1." "0: The DIDL bit is not set to 1,1: The DIDL bit is not set to 1"
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rbitfld.long 0x0 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 20. "UVSHFVALS0,0: The UVSHFVAL bit is not set to 1." "0: The UVSHFVAL bit is not set to 1,1: The UVSHFVAL bit is set to 1"
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rbitfld.long 0x0 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 16. "SHFVALS,0: The SHFVAL bit is not set to 1." "0: The SHFVAL bit is not set to 1,1: The SHFVAL bit is set to 1"
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bitfld.long 0x0 15. "UVSHFVALS1,0: The UVSHFVAL bit is not set to 1." "0: The UVSHFVAL bit is not set to 1,1: The UVSHFVAL bit is set to 1"
bitfld.long 0x0 14. "SHFES,0: The SHFE bit is not set to 1." "0: The SHFE bit is not set to 1,1: The SHFE bit is set to 1"
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bitfld.long 0x0 13. "RDES,0: The RDE bit is not set to 1." "0: The RDE bit is not set to 1,1: The RDE bit is set to 1"
rbitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
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bitfld.long 0x0 11. "TFES,0: The TFE bit is not set to 1." "0: The TFE bit is not set to 1,1: The TFE bit is set to 1"
hexmask.long.byte 0x0 7.--10. 1. "Reserved_7,Reserved"
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bitfld.long 0x0 6. "TCMS,0: The TCM bit is not set to 1." "0: The TCM bit is not set to 1,1: The TCM bit is set to 1"
rbitfld.long 0x0 4.--5. "Reserved_4,Reserved" "0,1,2,3"
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bitfld.long 0x0 3. "AUTOSGS,0: The AUTOSG bit is not set to 1." "0: The AUTOSG bit is not set to 1,1: The AUTOSG bit is set to 1"
bitfld.long 0x0 2. "AUTODGS,0: The AUTODG bit is not set to 1." "0: The AUTODG bit is not set to 1,1: The AUTODG bit is set to 1"
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bitfld.long 0x0 1. "BFES,0: The BFE bit is not set to 1." "0: The BFE bit is not set to 1,1: The BFE bit is set to 1"
bitfld.long 0x0 0. "TMES,0: The TME bit is not set to 1." "0: The TME bit is not set to 1,1: The TME bit is set to 1"
line.long 0x4 "TRIMCR2,TRIMCR is used to clear the corresponding bits of the triangle mode register (TRIMR). To disable the modes and functions selected by the bits in TRIMR. write 1 to the corresponding bits in this register."
hexmask.long.byte 0x4 25.--31. 1. "Reserved_25,Reserved"
rbitfld.long 0x4 24. "DIDLC,Set bit DIDL in TRIMR" "0: Bit DIDL in TRIMR is not clear,1: Bit DIDL in TRIMR is clear to 0"
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rbitfld.long 0x4 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "UVSHFVALC0,0: Does not clear the UVSHFVAL bit to 0." "0: Does not clear the UVSHFVAL bit to 0,1: Clears the UVSHFVAL bit to 0"
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rbitfld.long 0x4 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 16. "SHFVALC,0: Does not clear the SHFVAL bit to 0." "0: Does not clear the SHFVAL bit to 0,1: Clears the SHFVAL bit to 0"
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bitfld.long 0x4 15. "UVSHFVALC1,0: Does not clear the UVSHFVAL bit to 0." "0: Does not clear the UVSHFVAL bit to 0,1: Clears the UVSHFVAL bit to 0"
bitfld.long 0x4 14. "SHFEC,0: Does not clear the SHFE bit to 0." "0: Does not clear the SHFE bit to 0,1: Clears the SHFE bit to 0"
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bitfld.long 0x4 13. "RDEC,0: Does not clear the RDE bit to 0." "0: Does not clear the RDE bit to 0,1: Clears the RDE bit to 0"
rbitfld.long 0x4 12. "Reserved_12,Reserved" "0,1"
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bitfld.long 0x4 11. "TFEC,0: Does not clear the TFE bit to 0." "0: Does not clear the TFE bit to 0,1: Clears the TFE bit to 0"
hexmask.long.byte 0x4 7.--10. 1. "Reserved_7,Reserved"
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bitfld.long 0x4 6. "TCMC,0: Does not clear the TCM bit to 0." "0: Does not clear the TCM bit to 0,1: Clears the TCM bit to 0"
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
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bitfld.long 0x4 3. "AUTOSGC,0: Does not clear the AUTOSG bit to 0." "0: Does not clear the AUTOSG bit to 0,1: Clears the AUTOSG bit to 0"
bitfld.long 0x4 2. "AUTODGC,0: Does not clear the AUTODG bit to 0." "0: Does not clear the AUTODG bit to 0,1: Clears the AUTODG bit to 0"
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bitfld.long 0x4 1. "BFEC,0: Does not clear the BFE bit to 0." "0: Does not clear the BFE bit to 0,1: Clears the BFE bit to 0"
bitfld.long 0x4 0. "TMEC,0: Does not clear the TME bit to 0." "0: Does not clear the TME bit to 0,1: Clears the TME bit to 0"
line.long 0x8 "TRICR2,TRICR is used to specify the color for single-color drawing with a TRI instruction when single-color drawing is selected with the TME bit in TRIMR."
bitfld.long 0x8 31. "YCFORM,For interleave output (for which the YISM bit in CMRCR is 0 and the YUV422E bit in CMRCR2 is 1)  changes the order of Y and U/V. Normally  Y and U/V are in a {U/V  Y} order; this bit  however  can reverse the order to {Y  U/V}." "0: For interleave output,1: For interleave output"
rbitfld.long 0x8 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x8 26.--27. "TCY3,When Y is to be output in 12 bpp  these bits specify bits 11 and 10 of color Y for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x8 24.--25. "TCY2,When Y is to be output in 10/12 bpp  these bits specify bits 9 and 8 of color Y for single-color drawing with the TRI instruction." "0,1,2,3"
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hexmask.long.byte 0x8 16.--23. 1. "TCV,When V is to be output in 8 bits  these bits specify color V for single-color drawing with the TRI instruction. When outputting V in 10 bits/12 bits  the V value in the TRICR2 register is used."
hexmask.long.byte 0x8 8.--15. 1. "TCU,When U is to be output in 8 bits  these bits specify color U for single-color drawing with the TRI instruction. When outputting U in 10 bits/12 bits  the U value in the TRICR2 register is used."
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hexmask.long.byte 0x8 0.--7. 1. "TCY,Specifies color Y for single-color drawing with the TRI instruction."
line.long 0xC "UVDPOR2,"
hexmask.long.tbyte 0xC 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0xC 8. "DDP,Specifies the destination coordinates described in the DL and the registers related to the setting of destination coordinates." "0: Specifies destination coordinates in integer,1: Specifies destination coordinates in fixed-point.."
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hexmask.long.byte 0xC 3.--7. 1. "Reserved_3,Reserved"
bitfld.long 0xC 0.--2. "UVDPO,Source Coordinate Decimal Point" "0,1,2,3,4,5,6,7"
line.long 0x10 "SUSR2,SUSR is used to specify the width (horizontal size) of the source. The width value depends on the source data format."
hexmask.long.byte 0x10 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x10 16.--26. 1. "SUW,Specify double_quotationsource width - 2double_quotation. The maximum value is 2 046."
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hexmask.long.byte 0x10 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x10 0.--10. 1. "SVW,Specify double_quotationsource width - 1double_quotation. The maximum value is 2 047."
line.long 0x14 "SVSR2,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this field without executing the SYNCM instruction."
hexmask.long.tbyte 0x14 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0x14 0.--10. 1. "SVS,Specifies the height (vertical size) of the source."
group.long 0x80++0x23
line.long 0x0 "XMINR2,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x0 0.--12. 1. "XMIN,X Clip MIN"
line.long 0x4 "YMINR2,"
hexmask.long.tbyte 0x4 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x4 0.--12. 1. "YMIN,Y Clip MIN"
line.long 0x8 "XMAXR2,"
hexmask.long.tbyte 0x8 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x8 0.--12. 1. "XMAX,X Clip MAX"
line.long 0xC "YMAXR2,"
hexmask.long.tbyte 0xC 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0xC 0.--12. 1. "YMAX,Y Clip MAX"
line.long 0x10 "AMXSR2,"
hexmask.long.tbyte 0x10 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x10 0.--12. 1. "AMXS,Automatic Mesh X Size"
line.long 0x14 "AMYSR2,"
hexmask.long.tbyte 0x14 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x14 0.--12. 1. "AMYS,Automatic Mesh Y Size"
line.long 0x18 "AMXOR2,"
hexmask.long.tbyte 0x18 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x18 0.--12. 1. "AMXO,Automatic Mesh X Origin"
line.long 0x1C "AMYOR2,"
hexmask.long.tbyte 0x1C 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x1C 0.--12. 1. "AMYO,Automatic Mesh Y Origin"
line.long 0x20 "TRICR22,TRICR2 is used to specify the color for single-color drawing with a TRI instruction when single-color drawing is selected with the TME bit in TRIMR. This register is used when UV is output in 10 bpp/12 bpp."
bitfld.long 0x20 30.--31. "TCV16,When V is to be output in 16 bpp  these bits specify bits 15 and 14 of color V for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x20 28.--29. "TCV14,When V is to be output in 14/16 bpp  these bits specify bits 13 and 12 of color V for single-color drawing with the TRI instruction." "0,1,2,3"
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bitfld.long 0x20 26.--27. "TCV12,When V is to be output in 12/14/16 bpp  these bits specify bits 11 and 10 of color V for single-color drawing with the TRI instruction." "0,1,2,3"
hexmask.long.word 0x20 16.--25. 1. "TCV10,When V is to be output in 10/12/14/16 bpp  these bits specify bits 9 to 0 of color V for single-color drawing with the TRI instruction."
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bitfld.long 0x20 14.--15. "TCU16,When U is to be output in 16 bpp  these bits specify bits 15 and 14 of color U for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x20 12.--13. "TCU14,When U is to be output in 14/16 bpp  these bits specify bits 13 and 12 of color U for single-color drawing with the TRI instruction." "0,1,2,3"
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bitfld.long 0x20 10.--11. "TCU12,When U is to be output in 12/14/16 bpp  these bits specify bits 11 and 10 of color U for single-color drawing with the TRI instruction." "0,1,2,3"
hexmask.long.word 0x20 0.--9. 1. "TCU10,When U is to be output in 10/12/14/16 bpp  these bits specify bits 9 to 0 of color U for single-color drawing with the TRI instruction."
rgroup.long 0xA4++0x3
line.long 0x0 "TRIMR22,TRIMR2 is used to select the maximum level of detail."
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 9.--11. "MAXLODU,The maximum level of detail for pyramidal images to be used in the u direction. The setting should be from 0 to 4. Other settings are prohibited. To modify the value during execution  execute the SYNCM instruction before modification. When this.." "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 3.--5. "MAXLODV,The maximum level of detail for pyramidal images to be used in the v direction. The setting should be from 0 to 4. Other settings are prohibited. To modify the value during execution  execute the SYNCM instruction before modification. When this.." "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
group.long 0xA8++0x1F
line.long 0x0 "TRIMSR22,TRIMSR2 is used to set the corresponding bits of the triangle mode register (TRIMR2). To enable the modes and functions selected by the bits in TRIMR2. write 1 to the corresponding bits in this register."
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 9.--11. "MAXLODUS,Sets the corresponding MAXLODU bits in the TRIMR2 register." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 3.--5. "MAXLODVS,Sets the corresponding MAXLODV bits in the TRIMR2 register." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x0 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4 "TRIMCR22,TRIMCR2 is used to clear the corresponding bits of the triangle mode register (TRIMR2). To disable the modes and functions selected by the bits in TRIMR2. write 1 to the corresponding bits in this register."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x4 9.--11. "MAXLODUC,Clears the corresponding MAXLODU bits in the TRIMR2 register." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x4 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 3.--5. "MAXLODVC,Clears the corresponding MAXLODV bits in the TRIMR2 register." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x4 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x8 "YLMINR2,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "YLMIN,Specifies the minimum luminance value when luminance correction is applied. If after correction the luminance value is lower than the value specified in this register  the luminance value is clamped at the value specified by these bits."
line.long 0xC "UBMINR2,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "UBMIN,Specifies the minimum U value when hue correction is applied. If after correction the U value is lower than the value specified in this register  the U value is clamped at the value specified by these bits."
line.long 0x10 "VRMINR2,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "VRMIN,Specifies the minimum V value when hue correction is applied. If after correction the V value is lower than the value specified in this register  the V value is clamped at the value specified by these bits."
line.long 0x14 "YLMAXR2,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "YLMAX,Specifies the maximum luminance value when luminance correction is applied. If after correction the luminance value is higher than the value specified in this register  the luminance value is clamped at the value specified by these bits."
line.long 0x18 "UBMAXR2,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "UBMAX,Specifies the maximum U value when hue correction is applied. If after correction the U value is higher than the value specified in this register  the U value is clamped at the value specified by these bits."
line.long 0x1C "VRMAXR2,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "VRMAX,Specifies the maximum V value when hue correction is applied. If after correction the V value is higher than the value specified in this register  the V value is clamped at the value specified by these bits."
group.long 0xD0++0x13
line.long 0x0 "CPDPOR2,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 8.--10. "YLDPO,Specifies the number of bits after the decimal point for the value specified as the luminance correction scale value." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
bitfld.long 0x0 4.--6. "UBDPO,Specifies the number of bits after the decimal point for the value specified as the hue correction U value scale value." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.long 0x0 0.--2. "VRDPO,Specifies the number of bits after the decimal point for the value specified as the hue correction V value scale value." "0,1,2,3,4,5,6,7"
line.long 0x4 "YLCPR2,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.byte 0x4 24.--31. 1. "DYP_LSCAL,Specifies the scale parameter of second Y plane in DYP mode if the luminance correction scale parameter is specified by a register setting (LUSM = 1 in CMRCR)."
hexmask.long.byte 0x4 16.--23. 1. "DYP_LOFST,Specifies the offset parameter of second Y plane in DYP mode"
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hexmask.long.byte 0x4 8.--15. 1. "LSCAL,Specifies the scale parameter when the luminance correction scale parameter is specified by a register setting (LUSM = 1 in CMRCR). The setting is passed as unsigned fixed-point data  and the number of decimal places is specified by YLDPO in.."
hexmask.long.byte 0x4 0.--7. 1. "LOFST,Specifies the offset parameter when the luminance correction offset parameter is specified by a register setting (LUOM = 1 in CMRCR). Specify the value of these bits as signed 8-bit data."
line.long 0x8 "UBCPR2,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x8 8.--15. 1. "UBSCL,Specifies the U value scale parameter when the hue correction scale parameters are specified by register settings (CLSM = 1 in CMRCR). The setting is passed as fixed-point data  and the number of decimal places is specified by UBDPO in CPDPOR."
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hexmask.long.byte 0x8 0.--7. 1. "UBOFS,Specifies the U value offset parameter when the hue correction offset parameters are specified by register settings (CLOM = 1 in CMRCR). Specify the value of these bits as signed 8-bit data."
line.long 0xC "VRCPR2,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0xC 8.--15. 1. "VRSCL,Specifies the V value scale parameter when the hue correction scale parameters are specified by register settings (CLSM = 1 in CMRCR). The setting is passed as fixed-point data  and the number of decimal places is specified by VRDPO in CPDPOR."
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hexmask.long.byte 0xC 0.--7. 1. "VROFS,Specifies the V value offset parameter when the hue correction offset parameters are specified by register settings (CLOM = 1 in CMRCR). Specify the value of these bits as signed 8-bit data."
line.long 0x10 "TRICR32,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
bitfld.long 0x10 30.--31. "DYP_TCY16,When 2nd Y in DYP mode is to be output in 16 bpp  these bits specify bits 15 and 14 of color 2nd Y for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x10 28.--29. "DYP_TCY14,When 2nd Y in DYP mode is to be output in 14 bpp or 16 bpp  these bits specify bits 13 to 0 of color 2nd Y for single-color drawing with the TRI instruction." "0,1,2,3"
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bitfld.long 0x10 26.--27. "DYP_TCY12,When 2nd Y in DYP mode is to be output in 12bpp or 14 bpp or 16 bpp  these bits specify bits 11 to 0 of color 2nd Y for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x10 24.--25. "DYP_TCY10,When 2nd Y in DYP mode is to be output in 10bpp or 12bpp or 14 bpp or 16 bpp  these bits specify bits 9 to 0 of color 2nd Y for single-color drawing with the TRI instruction." "0,1,2,3"
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hexmask.long.byte 0x10 16.--23. 1. "DYP_TCY8,In DYP mode  these bits specify bits 7 to 0 of color 2nd Y for single-color drawing with the TRI instruction."
bitfld.long 0x10 14.--15. "TCY16,When Y is to be output in 16 bpp  these bits specify bits 15 and 14 of color Y for single-color drawing with the TRI instruction." "0,1,2,3"
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hexmask.long.word 0x10 0.--13. 1. "TCY14,When Y is to be output in 14 bpp or 16 bpp  these bits specify bits 13 to 0 of color Y for single-color drawing with the TRI instruction."
rgroup.long 0xE4++0x3
line.long 0x0 "CMRCR22,CMRCR2 indicates the output mode for the drawing results. To set each bit in this register to 1. write 1 to the corresponding bit in CMRCSR2. To clear each bit to 0. write 1 to the corresponding bit in CMRCCR2."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "DCTE,Tile Addressing Mode Enable for Destination Data" "0: Linear addressing mode,1: Tile addressing mode"
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bitfld.long 0x0 13.--14. "Reserved_13,Reserved" "0,1,2,3"
bitfld.long 0x0 12. "TCTE,Tile Addressing Mode Enable for Texture Data" "0: Linear addressing mode,1: Tile addressing mode"
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bitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 6. "UVFORM,Swap the order of adjacent single_quotationUsingle_quotation and single_quotationVsingle_quotation on the YUV422 interleaved texture data." "0: Keeps the original order,1: Swaps the order"
bitfld.long 0x0 5. "YUV422FORM,Swap the order of adjacent single_quotationYsingle_quotation and single_quotationUsingle_quotation or single_quotationVsingle_quotation on the YUV422 interleaved texture data." "0: Keeps the original order,1: Swaps the order"
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bitfld.long 0x0 4. "DYP,DYP: Double luminance plane mode" "0: Not use double luminance plane function,1: Use double luminance plane"
bitfld.long 0x0 3. "YUVSEMI,YUV Semi-planar mode" "0: The input image format is not YUV Semi-planar,1: The input image format is YUV Semi-planar"
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bitfld.long 0x0 2. "YUV422E,YUV422 Interleaved Mode Enable" "0: Processes Y only or UV only plane,1: Processes YUV422 interleaved plane"
bitfld.long 0x0 1. "UVC,UV plane format conversion" "0: Does not convert the format of UV plane,1: Converts the format of UV plane"
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bitfld.long 0x0 0. "LUTE,Lookup Table Enable" "0: Does not convert data using the LUT,1: Converts data using the LUT"
group.long 0xE8++0xB
line.long 0x0 "CMRCSR22,CMRCSR2 is used to set the corresponding bits in the rendering mode register 2 (CMRCR2). To enable the modes and functions selected by the bits in CMRCR2. write 1 to the corresponding bits in this register."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "DCTES,0: The DCTE bit in CMRCR2 is not set to 1." "0: The DCTE bit in CMRCR2 is not set to 1,1: The DCTE bit in CMRCR2 is set to 1"
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rbitfld.long 0x0 13.--14. "Reserved_13,Reserved" "0,1,2,3"
bitfld.long 0x0 12. "TCTES,0: The TCTE bit in CMRCR2 is not set to 1." "0: The TCTE bit in CMRCR2 is not set to 1,1: The TCTE bit in CMRCR2 is set to 1"
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rbitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 6. "UVFORMS,0: The UVFORM bit in CMRCR2 is not set to 1." "0: The UVFORM bit in CMRCR2 is not set to 1,1: The UVFORM bit in CMRCR2 is set to 1"
bitfld.long 0x0 5. "YUV422FORMS,0: The YUV422FORM bit in CMRCR2 is not set to 1." "0: The YUV422FORM bit in CMRCR2 is not set to 1,1: The YUV422FORM bit in CMRCR2 is set to 1"
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bitfld.long 0x0 4. "DYPS,0: The DYP bit in CMRCR2 is not set to 1" "0: The DYP bit in CMRCR2 is not set to 1,1: The DYP bit in CMRCR2 is set to 1"
bitfld.long 0x0 3. "YUVSEMIS,0: The YUVSEMI bit in CMRCR2 is not set to 1." "0: The YUVSEMI bit in CMRCR2 is not set to 1,1: The YUVSEMI bit in CMRCR2 is set to 1"
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bitfld.long 0x0 2. "YUV422ES,0: The YUV422E bit in CMRCR2 is not set to 1." "0: The YUV422E bit in CMRCR2 is not set to 1,1: The YUV422E bit in CMRCR2 is set to 1"
bitfld.long 0x0 1. "UVCS,0: The UVC bit in CMRCR2 is not set to 1." "0: The UVC bit in CMRCR2 is not set to 1,1: The UVC bit in CMRCR2 is set to 1"
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bitfld.long 0x0 0. "LUTES,0: The LUTE bit in CMRCR2 is not set to 1." "0: The LUTE bit in CMRCR2 is not set to 1,1: The LUTE bit in CMRCR2 is set to 1"
line.long 0x4 "CMRCCR22,CMRCCR2 is used to clear the corresponding bits of the rendering mode register 2 (CMRCR2). To disable the modes and functions selected by the bits in CMRCR2. write 1 to the corresponding bits in this register."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4 15. "DCTEC,0: Does not clear the DCTE bit in CMRCR2 to 0." "0: Does not clear the DCTE bit in CMRCR2 to 0,1: Clears the DCTE bit in CMRCR2 to 0"
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rbitfld.long 0x4 13.--14. "Reserved_13,Reserved" "0,1,2,3"
bitfld.long 0x4 12. "TCTEC,0: Does not clear the TCTE bit in CMRCR2 to 0." "0: Does not clear the TCTE bit in CMRCR2 to 0,1: Clears the TCTE bit in CMRCR2 to 0"
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rbitfld.long 0x4 10.--11. "Reserved_10,Reserved" "0,1,2,3"
rbitfld.long 0x4 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x4 6. "UVFORMC,0: Does not clear the UVFORM bit in CMRCR2 to 0." "0: Does not clear the UVFORM bit in CMRCR2 to 0,1: Clears the UVFORM bit in CMRCR2 to 0"
bitfld.long 0x4 5. "YUV422FORMC,0: Does not clear the YUV422FORM bit in CMRCR2 to 0." "0: Does not clear the YUV422FORM bit in CMRCR2 to 0,1: Clears the YUV422FORM bit in CMRCR2 to 0"
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bitfld.long 0x4 4. "DYPC,0: The DYP bit in CMRCR2 is not clear to 0." "0: The DYP bit in CMRCR2 is not clear to 0,1: The DYP bit in CMRCR2 is clear to 0"
bitfld.long 0x4 3. "YUVSEMIC,0: Does not clear the YUVSEMI bit in CMRCR2 to 0." "0: Does not clear the YUVSEMI bit in CMRCR2 to 0,1: Clears the YUVSEMI bit in CMRCR2 to 0"
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bitfld.long 0x4 2. "YUV422EC,0: Does not clear the YUV422E bit in CMRCR2 to 0." "0: Does not clear the YUV422E bit in CMRCR2 to 0,1: Clears the YUV422E bit in CMRCR2 to 0"
bitfld.long 0x4 1. "UVCC,0: Does not clear the UVC bit in CMRCR2 to 0." "0: Does not clear the UVC bit in CMRCR2 to 0,1: Clears the UVC bit in CMRCR2 to 0"
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bitfld.long 0x4 0. "LUTEC,0: Does not clear the LUTE bit in CMRCR to 0." "0: Does not clear the LUTE bit in CMRCR to 0,1: Clears the LUTE bit in CMRCR to 0"
line.long 0x8 "NCMR2,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x8 8.--31. 1. "ACC_KEY,Access Key to change NCME bit of this register."
hexmask.long.byte 0x8 1.--7. 1. "Reserved_1,Reserved"
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bitfld.long 0x8 0. "NCME,Non-blocking cache mode enable bit for source data." "0,1"
group.long 0x114++0x7
line.long 0x0 "DCCR2,When changing the setting of this register by the DL. be sure to execute the SYNCM instruction"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "UVDSTSEL,Sets the register that sets the memory stride of UV plane when outputting YUV422/420 semi-planar." "0: Uses the setting value of DSTR register as..,1: Uses the setting value of UVDSTR register as.."
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hexmask.long.word 0x0 0.--14. 1. "Reserved_0,Reserved"
line.long 0x4 "SCCR2,When changing the setting of this register by the DL. be sure to execute the SYNCM instruction"
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x4 16. "TCMENB,Select the size of the source cache when pyramidal images filtering not supported. When this bit is 1  set TRIMR.TFE  TRIMR2.MAXLODU and TRIMR2.MAXLODV to 0." "0: 32 Kbytes,1: 64 Kbytes"
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hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
group.long 0x120++0x3
line.long 0x0 "PEFCCR2,This register controls the following performance-counter-related registers: PEFCTCR. PEFCTMR. PERFCMAXPR. PEFCMINPR. PEFCDCAR. PEFCDCMR. PEFCSCAR. PEFCSCMR. However. counted value of the performance counter is not guaranteed."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CLR,Clear all the performance counter related registers." "0,1"
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bitfld.long 0x0 0. "EN,Enable all performance-counter-related registers." "0: Counting-up by the performance-counter-related..,1: Counting-up by the performance-counter-related.."
rgroup.long 0x124++0x17
line.long 0x0 "PEFCTCR2,"
hexmask.long 0x0 0.--31. 1. "PEFCTCR,Performance counter to count the number of cycles when the setting of the EN bit of PEFCCR is 1."
line.long 0x4 "PEFCTMR2,"
hexmask.long 0x4 0.--31. 1. "PEFCTMR,Performance counter to count the total number of cycles among those counted by PEFCTCR in which the cache is missed."
line.long 0x8 "PEFCMAXPR2,"
hexmask.long 0x8 0.--31. 1. "PEFCMAXPR,Performance counter to count the maximum number of cycles necessitated by a cache miss."
line.long 0xC "PEFCMINPR2,"
hexmask.long 0xC 0.--31. 1. "PEFCMINPR,Performance counter to count the minimum number of cycles necessitated by a cache miss."
line.long 0x10 "PEFCDCAR2,"
hexmask.long 0x10 0.--31. 1. "PEFCDCA,Performance counter to count the number of times the destination cache is accessed."
line.long 0x14 "PEFCDCMR2,"
hexmask.long 0x14 0.--31. 1. "PEFCDCM,Performance counter to count the number of times the destination cache is missed."
rgroup.long 0x144++0x7
line.long 0x0 "PEFCSCAR2,"
hexmask.long 0x0 0.--31. 1. "PEFCSCA,Performance counter to count the number of times the source cache is accessed."
line.long 0x4 "PEFCSCMR2,"
hexmask.long 0x4 0.--31. 1. "PEFCSCM,Performance counter to count the number of times the source cache is missed."
group.long 0x1A0++0x33
line.long 0x0 "SSAOR2,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x0 8.--31. 1. "SSAOR,SRC Start Address Offset"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
line.long 0x4 "SSAOR12,m = 1 to 4."
hexmask.long.tbyte 0x4 8.--31. 1. "SSAORn,SRC Offset Address for Map n"
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
line.long 0x8 "SSAOR22,m = 1 to 4."
hexmask.long.tbyte 0x8 8.--31. 1. "SSAORn,SRC Offset Address for Map n"
hexmask.long.byte 0x8 0.--7. 1. "Reserved_0,Reserved"
line.long 0xC "SSAOR32,m = 1 to 4."
hexmask.long.tbyte 0xC 8.--31. 1. "SSAORn,SRC Offset Address for Map n"
hexmask.long.byte 0xC 0.--7. 1. "Reserved_0,Reserved"
line.long 0x10 "SSAOR42,m = 1 to 4."
hexmask.long.tbyte 0x10 8.--31. 1. "SSAORn,SRC Offset Address for Map n"
hexmask.long.byte 0x10 0.--7. 1. "Reserved_0,Reserved"
line.long 0x14 "UVSSAOR2,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x14 8.--31. 1. "UVSSAOR,SRC Start Address Offset for UV plane"
hexmask.long.byte 0x14 0.--7. 1. "Reserved_0,Reserved"
line.long 0x18 "UVSSAOR12,n = 1 to 4."
hexmask.long.tbyte 0x18 8.--31. 1. "UVSSAOR_n,SRC Start Address Offset for UV plane for Map n"
hexmask.long.byte 0x18 0.--7. 1. "Reserved_0,Reserved"
line.long 0x1C "UVSSAOR22,n = 1 to 4."
hexmask.long.tbyte 0x1C 8.--31. 1. "UVSSAOR_n,SRC Start Address Offset for UV plane for Map n"
hexmask.long.byte 0x1C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x20 "UVSSAOR32,n = 1 to 4."
hexmask.long.tbyte 0x20 8.--31. 1. "UVSSAOR_n,SRC Start Address Offset for UV plane for Map n"
hexmask.long.byte 0x20 0.--7. 1. "Reserved_0,Reserved"
line.long 0x24 "UVSSAOR42,n = 1 to 4."
hexmask.long.tbyte 0x24 8.--31. 1. "UVSSAOR_n,SRC Start Address Offset for UV plane for Map n"
hexmask.long.byte 0x24 0.--7. 1. "Reserved_0,Reserved"
line.long 0x28 "DSAOR2,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long 0x28 6.--31. 1. "DSAO,Destination Offset Address"
hexmask.long.byte 0x28 0.--5. 1. "Reserved_0,Reserved"
line.long 0x2C "XYOFSR2,"
hexmask.long.byte 0x2C 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x2C 16.--27. 1. "XOFS,The value  obtained by adding the offset specified in this field to the X coordinate automatically generated or specified by DL  is used for processing as X coordinate."
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hexmask.long.byte 0x2C 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.word 0x2C 0.--11. 1. "YOFS,The value  obtained by adding the offset specified in this field to the Y coordinate automatically generated or specified by DL  is used for processing as Y coordinate."
line.long 0x30 "UVOFSR2,"
hexmask.long.word 0x30 16.--31. 1. "UOFS,The value  obtained by adding the offset specified in this field to the u coordinate automatically generated or specified by DL  is used for processing as v coordinate."
hexmask.long.word 0x30 0.--15. 1. "VOFS,The value  obtained by adding the offset specified in this field to the Y coordinate automatically generated or specified by DL  is used for processing as Y coordinate."
rgroup.long 0x200++0x3
line.long 0x0 "RSCR2,"
bitfld.long 0x0 31. "RSE,This bit enables the extended functionality to handle rotation and scaling down." "0: The extended functionality is disabled,1: The extended functionality is enabled"
bitfld.long 0x0 30. "RSUVFLT,Specifies the algorithm to rotate the UV plane in YUV422 format." "0: Rotated in 2x2 block unit,1: Rotated during interpolation"
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hexmask.long.byte 0x0 26.--29. 1. "Reserved_26,Reserved"
bitfld.long 0x0 24.--25. "SC8SHFVAL,Number of bit positions for logical right shifting of the value following processing for vertical and horizontal reduction to 1/8." "0,1,2,3"
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bitfld.long 0x0 22.--23. "Reserved_22,Reserved" "0,1,2,3"
bitfld.long 0x0 20.--21. "SC4SHFVAL,Number of bit positions for logical right shifting of the value following processing for vertical and horizontal reduction to 1/4." "0,1,2,3"
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bitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x0 16.--17. "SC2SHFVAL,Number of bit positions for logical right shifting of the value following processing for vertical and horizontal reduction to 1/2." "0,1,2,3"
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bitfld.long 0x0 15. "RSUV420,Specifies the YUV format of the input image. The algorithm to rotate the UV plane varies depending on the setting of this bit. The operation when the Y plane is input is not affected." "0: YUV422 format,1: YUV420 format"
bitfld.long 0x0 14. "Reserved_14,Reserved" "0,1"
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bitfld.long 0x0 13. "BP8E,This bit selects whether to average or add the values of sets of neighboring four pixels as filtering in scaling down." "0: Four times of the average of the neighboring..,1: The values of the neighboring four pixels are.."
bitfld.long 0x0 12. "RD8E,This bit specifies the rounding mode in the division when averaging of the neighboring four pixels in scaling down is selected." "0: Rounding down,1: Rounding to the nearest number"
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bitfld.long 0x0 11. "BP4E,This bit selects whether to average or add the values of sets of neighboring four pixels as filtering in scaling down." "0: Four times of the average of the neighboring..,1: The values of the neighboring four pixels are.."
bitfld.long 0x0 10. "RD4E,This bit specifies the rounding mode in the division when averaging of the neighboring four pixels in scaling down is selected." "0: Rounding down,1: Rounding to the nearest number"
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bitfld.long 0x0 9. "BP2E,This bit selects whether to average or add the values of sets of neighboring four pixels as filtering in scaling down." "0: Four times of the average of the neighboring..,1: The values of the neighboring four pixels are.."
bitfld.long 0x0 8. "RD2E,This bit specifies the rounding mode in the division when averaging of the neighboring four pixels in scaling down is selected." "0: Rounding down,1: Rounding to the nearest number"
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bitfld.long 0x0 7. "RT8E,This bit controls output of the data vertically and horizontally scaled down to 1/8 in response to execution of the OUTROT instruction." "0: The data vertically and horizontally scaled down..,1: The data vertically and horizontally scaled down.."
bitfld.long 0x0 6. "NR8E,This bit controls output of the data vertically and horizontally scaled down to 1/8 in response to execution of the OUTNOR instruction." "0: The data vertically and horizontally scaled down..,1: The data vertically and horizontally scaled down.."
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bitfld.long 0x0 5. "RT4E,This bit controls output of the data vertically and horizontally scaled down to 1/4 in response to execution of the OUTROT instruction." "0: The data vertically and horizontally scaled down..,1: The data vertically and horizontally scaled down.."
bitfld.long 0x0 4. "NR4E,This bit controls output of the data vertically and horizontally scaled down to 1/4 in response to execution of the OUTNOR instruction." "0: The data vertically and horizontally scaled down..,1: The data vertically and horizontally scaled down.."
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bitfld.long 0x0 3. "RT2E,This bit controls output of the data vertically and horizontally scaled down to 1/2 in response to execution of the OUTROT instruction." "0: The data vertically and horizontally scaled down..,1: The data vertically and horizontally scaled down.."
bitfld.long 0x0 2. "NR2E,This bit controls output of the data vertically and horizontally scaled down to 1/2 in response to execution of the OUTNOR instruction." "0: The data vertically and horizontally scaled down..,1: The data vertically and horizontally scaled down.."
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bitfld.long 0x0 1. "RT1E,This bit controls output of the non-scaled data in response to execution of the OUTROT instruction." "0: The non-scaled data are not output in response..,1: The non-scaled data are output in response to.."
bitfld.long 0x0 0. "NR1E,This bit controls output of the non-scaled data in response to execution of the OUTNOR instruction." "0: The non-scaled data are not output in response..,1: The non-scaled data are output in response to.."
group.long 0x204++0x6F
line.long 0x0 "RSCSR2,This register is used to allow or disallow setting of the corresponding bits in the rotator and scaler control register (RSCR) to 1. Before setting a bit in RSCR to 1. write 1 to the corresponding bit in this register."
bitfld.long 0x0 31. "RSES,0: The RSE bit in RSCR is not set to 1." "0: The RSE bit in RSCR is not set to 1,1: The RSE bit in RSCR is set to 1"
bitfld.long 0x0 30. "RSUVFLTS,0: The RSUVFLT bit in RSCR is not set to 1" "0: The RSUVFLT bit in RSCR is not set to 1,1: The RSUVFLT bit in RSCR is set to 1"
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hexmask.long.byte 0x0 26.--29. 1. "Reserved_26,Reserved"
bitfld.long 0x0 24.--25. "SC8SHFVALS,The bits of this field set the respective bits of the SC8SHFVAL field to 1." "0,1,2,3"
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rbitfld.long 0x0 22.--23. "Reserved_22,Reserved" "0,1,2,3"
bitfld.long 0x0 20.--21. "SC4SHFVALS,The bits of this field set the respective bits of the SC4SHFVAL field to 1." "0,1,2,3"
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rbitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x0 16.--17. "SC2SHFVALS,The bits of this field set the respective bits of the SC2SHFVAL field to 1." "0,1,2,3"
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bitfld.long 0x0 15. "RSUV420S,0: The RSUV420 bit in RSCR is not set to 1." "0: The RSUV420 bit in RSCR is not set to 1,1: The RSUV420 bit in RSCR is set to 1"
rbitfld.long 0x0 14. "Reserved_14,Reserved" "0,1"
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bitfld.long 0x0 13. "BP8ES,0: The BP8E bit in RSCR is not set to 1." "0: The BP8E bit in RSCR is not set to 1,1: The BP8E bit in RSCR is set to 1"
bitfld.long 0x0 12. "RD8ES,0: The RD8E bit in RSCR is not set to 1." "0: The RD8E bit in RSCR is not set to 1,1: The RD8E bit in RSCR is set to 1"
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bitfld.long 0x0 11. "BP4ES,0: The BP4E bit in RSCR is not set to 1." "0: The BP4E bit in RSCR is not set to 1,1: The BP4E bit in RSCR is set to 1"
bitfld.long 0x0 10. "RD4ES,0: The RD4E bit in RSCR is not set to 1." "0: The RD4E bit in RSCR is not set to 1,1: The RD4E bit in RSCR is set to 1"
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bitfld.long 0x0 9. "BP2ES,0: The BP2E bit in RSCR is not set to 1." "0: The BP2E bit in RSCR is not set to 1,1: The BP2E bit in RSCR is set to 1"
bitfld.long 0x0 8. "RD2ES,0: The RD2E bit in RSCR is not set to 1." "0: The RD2E bit in RSCR is not set to 1,1: The RD2E bit in RSCR is set to 1"
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bitfld.long 0x0 7. "RT8ES,0: The RT8E bit in RSCR is not set to1." "0: The RT8E bit in RSCR is not set to1,1: The RT8E bit in RSCR is set to 1"
bitfld.long 0x0 6. "NR8ES,0: The NR8E bit in RSCR is not set to 1." "0: The NR8E bit in RSCR is not set to 1,1: The NR8E bit in RSCR is set to 1"
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bitfld.long 0x0 5. "RT4ES,0: The RT4E bit in RSCR is not set to 1." "0: The RT4E bit in RSCR is not set to 1,1: The RT4E bit in RSCR is set to 1"
bitfld.long 0x0 4. "NR4ES,0: The NR4E bit in RSCR is not set to 1." "0: The NR4E bit in RSCR is not set to 1,1: The NR4E bit in RSCR is set to 1"
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bitfld.long 0x0 3. "RT2ES,0: The RT2E bit in RSCR is not set to 1." "0: The RT2E bit in RSCR is not set to 1,1: The RT2E bit in RSCR is set to 1"
bitfld.long 0x0 2. "NR2ES,0: The NR2E bit in RSCR is not set to 1." "0: The NR2E bit in RSCR is not set to 1,1: The NR2E bit in RSCR is set to 1"
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bitfld.long 0x0 1. "RT1ES,0: The RT1E bit in RSCR is not set to 1." "0: The RT1E bit in RSCR is not set to 1,1: The RT1E bit in RSCR is set to 1"
bitfld.long 0x0 0. "NR1ES,0: The NR1E bit in RSCR is not set to 1." "0: The NR1E bit in RSCR is not set to 1,1: The NR1E bit in RSCR is set to 1"
line.long 0x4 "RSCCR2,This register is used to allow or disallow clearing of the corresponding bits in the rotator and scaler control register (RSCR). Before clearing a bit in RSCR. write 1 to the corresponding bit in this register."
bitfld.long 0x4 31. "RSEC,0: Does not clear the RSE bit in RSCR to 0." "0: Does not clear the RSE bit in RSCR to 0,1: Clears the RSE bit in RSCR to 0"
bitfld.long 0x4 30. "RSUVFLTC,0: Does not clear the RSUVFLT bit in RSCR to 0." "0: Does not clear the RSUVFLT bit in RSCR to 0,1: Clears the RSUVFLT bit in RSCR to 0"
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hexmask.long.byte 0x4 26.--29. 1. "Reserved_26,Reserved"
bitfld.long 0x4 24.--25. "SC8SHFVALC,The bits of this field clear the respective bits of the SC8SHFVAL field to 0." "0,1,2,3"
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rbitfld.long 0x4 22.--23. "Reserved_22,Reserved" "0,1,2,3"
bitfld.long 0x4 20.--21. "SC4SHFVALC,The bits of this field clear the respective bits of the SC4SHFVAL field to 0." "0,1,2,3"
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rbitfld.long 0x4 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x4 16.--17. "SC2SHFVALC,The bits of this field clear the respective bits of the SC2SHFVAL field to 0." "0,1,2,3"
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bitfld.long 0x4 15. "RSUV420C,0: Does not clear the RSUV420 bit in RSCR to 0." "0: Does not clear the RSUV420 bit in RSCR to 0,1: Clears the RSUV420 bit in RSCR to 0"
rbitfld.long 0x4 14. "Reserved_14,Reserved" "0,1"
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bitfld.long 0x4 13. "BP8EC,0: Does not clear the BP8E bit in RSCR to 0." "0: Does not clear the BP8E bit in RSCR to 0,1: Clears the BP8E bit in RSCR to 0"
bitfld.long 0x4 12. "RD8EC,0: Does not clear the RD8E bit in RSCR to 0." "0: Does not clear the RD8E bit in RSCR to 0,1: Clears the RD8E bit in RSCR to 0"
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bitfld.long 0x4 11. "BP4EC,0: Does not clear the BP4E bit in RSCR to 0." "0: Does not clear the BP4E bit in RSCR to 0,1: Clears the BP4E bit in RSCR to 0"
bitfld.long 0x4 10. "RD4EC,0: Does not clear the RD4E bit in RSCR to 0." "0: Does not clear the RD4E bit in RSCR to 0,1: Clears the RD4E bit in RSCR to 0"
newline
bitfld.long 0x4 9. "BP2EC,0: Does not clear the BP2E bit in RSCR to 0." "0: Does not clear the BP2E bit in RSCR to 0,1: Clears the BP2E bit in RSCR to 0"
bitfld.long 0x4 8. "RD2EC,0: Does not clear the RD2E bit in RSCR to 0." "0: Does not clear the RD2E bit in RSCR to 0,1: Clears the RD2E bit in RSCR to 0"
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bitfld.long 0x4 7. "RT8EC,0: Does not clear the RT8E bit in RSCR to 0." "0: Does not clear the RT8E bit in RSCR to 0,1: Clears the RT8E bit in RSCR to 0"
bitfld.long 0x4 6. "NR8EC,0: Does not clear the NR8E bit in RSCR to 0." "0: Does not clear the NR8E bit in RSCR to 0,1: Clears the NR8E bit in RSCR to 0"
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bitfld.long 0x4 5. "RT4EC,0: Does not clear the RT4E bit in RSCR to 0" "0: Does not clear the RT4E bit in RSCR to 0,1: Clears the RT4E bit in RSCR to 0"
bitfld.long 0x4 4. "NR4EC,0: Does not clear the NR4E bit in RSCR to 0." "0: Does not clear the NR4E bit in RSCR to 0,1: Clears the NR4E bit in RSCR to 0"
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bitfld.long 0x4 3. "RT2EC,0: Does not clear the RT2E bit in RSCR to 0." "0: Does not clear the RT2E bit in RSCR to 0,1: Clears the RT2E bit in RSCR to 0"
bitfld.long 0x4 2. "NR2EC,0: Does not clear the NR2E bit in RSCR to 0." "0: Does not clear the NR2E bit in RSCR to 0,1: Clears the NR2E bit in RSCR to 0"
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bitfld.long 0x4 1. "RT1EC,0: Does not clear the RT1E bit in RSCR to 0." "0: Does not clear the RT1E bit in RSCR to 0,1: Clears the RT1E bit in RSCR to 0"
bitfld.long 0x4 0. "NR1EC,0: Does not clear the NR1E bit in RSCT to 0." "0: Does not clear the NR1E bit in RSCT to 0,1: Clears the NR1E bit in RSCR to 0"
line.long 0x8 "RSOFR2,This register is used to specify the pixel format in the three scalers within the extended function block. Set this register in accord with the combinations shown in Table 56.25 or Table 56.26. Use the CMRCR register to specify the pixel format.."
hexmask.long.byte 0x8 27.--31. 1. "Reserved_27,Reserved"
bitfld.long 0x8 24.--26. "OFM8R,These bits specify the format of the image rotated and vertically and horizontally scaled down to 1/8." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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rbitfld.long 0x8 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x8 20.--22. "OFM4R,These bits specify the format of the image rotated and vertically and horizontally scaled down to 1/4." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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rbitfld.long 0x8 19. "Reserved_19,Reserved" "0,1"
bitfld.long 0x8 16.--18. "OFM2R,These bits specify the format of the image rotated and vertically and horizontally scaled down to 1/2." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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hexmask.long.byte 0x8 11.--15. 1. "Reserved_11,Reserved"
bitfld.long 0x8 8.--10. "OFM8N,These bits specify the format of the non-rotated image vertically and horizontally scaled down to 1/8." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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rbitfld.long 0x8 7. "Reserved_7,Reserved" "0,1"
bitfld.long 0x8 4.--6. "OFM4N,These bits specify the format of the non-rotated image vertically and horizontally scaled down to 1/4." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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rbitfld.long 0x8 3. "Reserved_3,Reserved" "0,1"
bitfld.long 0x8 0.--2. "OFM2N,These bits specify the format of the non-rotated image vertically and horizontally scaled down to 1/2." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
line.long 0xC "DSANRR02,"
hexmask.long 0xC 0.--31. 1. "DSANR0,These bits specify the base address in bytes of the destination for the output of non-rotated images with unchanged size."
line.long 0x10 "DSTNRR02,"
hexmask.long.word 0x10 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x10 0.--16. 1. "DSTNR0,These bits specify the stride in bytes at the destination for the output of non-rotated images with unchanged size."
line.long 0x14 "DSARR02,"
hexmask.long 0x14 0.--31. 1. "DSAR0,These bits specify the base address in bytes of the destination for the output of rotated images with unchanged size."
line.long 0x18 "DSTRR02,"
hexmask.long.word 0x18 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x18 0.--16. 1. "DSTR0,These bits specify the stride in bytes at the destination for the output of rotated images with unchanged size."
line.long 0x1C "DSANRR12,"
hexmask.long 0x1C 0.--31. 1. "DSANR1,These bits specify the base address in bytes of the destination for non-rotated images horizontally and vertically scaled down to 1/2."
line.long 0x20 "DSTNRR12,"
hexmask.long.word 0x20 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x20 0.--16. 1. "DSTNR1,These bits specify the stride in bytes at the destination for the output of non-rotated images horizontally and vertically scaled down to 1/2."
line.long 0x24 "DSARR12,"
hexmask.long 0x24 0.--31. 1. "DSAR1,These bits specify the base address in bytes of the destination for the output of rotated images vertically and horizontally scaled down to 1/2."
line.long 0x28 "DSTRR12,"
hexmask.long.word 0x28 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x28 0.--16. 1. "DSTR1,These bits specify the stride in bytes at the destination for the output of rotated images horizontally and vertically scaled down to 1/2."
line.long 0x2C "DSANRR22,"
hexmask.long 0x2C 0.--31. 1. "DSANR2,These bits specify the base address in bytes of the destination for non-rotated images horizontally and vertically scaled down to 1/4."
line.long 0x30 "DSTNRR22,"
hexmask.long.word 0x30 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x30 0.--16. 1. "DSTNR2,These bits specify the stride in bytes at the destination for the output of non-rotated images horizontally and vertically scaled down to 1/4."
line.long 0x34 "DSARR22,"
hexmask.long 0x34 0.--31. 1. "DSAR2,These bits specify the base address in bytes of the destination for the output of rotated images vertically and horizontally scaled down to 1/4."
line.long 0x38 "DSTRR22,"
hexmask.long.word 0x38 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x38 0.--16. 1. "DSTR2,These bits specify the stride in bytes at the destination for the output of rotated images horizontally and vertically scaled down to 1/4."
line.long 0x3C "DSANRR32,"
hexmask.long 0x3C 0.--31. 1. "DSANR3,These bits specify the base address in bytes of the destination for non-rotated images horizontally and vertically scaled down to 1/8."
line.long 0x40 "DSTNRR32,"
hexmask.long.word 0x40 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x40 0.--16. 1. "DSTNR3,These bits specify the stride in bytes at the destination for the output of non-rotated images horizontally and vertically scaled down to 1/8."
line.long 0x44 "DSARR32,"
hexmask.long 0x44 0.--31. 1. "DSAR3,These bits specify the base address in bytes of the destination for the output of rotated images vertically and horizontally scaled down to 1/8."
line.long 0x48 "DSTRR32,"
hexmask.long.word 0x48 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x48 0.--16. 1. "DSTR3,These bits specify the stride in bytes at the destination for the output of rotated images horizontally and vertically scaled down to 1/8."
line.long 0x4C "DSONRR02,"
hexmask.long 0x4C 0.--31. 1. "DSONR0,These bits specify the offset from the base address in bytes of the destination for the output of non-rotated images with unchanged size."
line.long 0x50 "DSONRR12,"
hexmask.long 0x50 0.--31. 1. "DSONR1,These bits specify the offset from the base address in bytes of the destination for the output of non-rotated images vertically and horizontally scaled down to 1/2."
line.long 0x54 "DSONRR22,"
hexmask.long 0x54 0.--31. 1. "DSONR2,These bits specify the offset from the base address in bytes of the destination for the output of non-rotated images vertically and horizontally scaled down to 1/4."
line.long 0x58 "DSONRR32,"
hexmask.long 0x58 0.--31. 1. "DSONR3,These bits specify the offset from the base address in bytes of the destination for the output of non-rotated images vertically and horizontally scaled down to 1/8."
line.long 0x5C "DSORR02,"
hexmask.long 0x5C 0.--31. 1. "DSOR0,These bits specify the offset from the base address in bytes of the destination for the output of rotated images with unchanged size."
line.long 0x60 "DSORR12,"
hexmask.long 0x60 0.--31. 1. "DSOR1,These bits specify the offset from the base address in bytes of the destination for the output of rotated images vertically and horizontally scaled down to 1/2."
line.long 0x64 "DSORR22,"
hexmask.long 0x64 0.--31. 1. "DSOR2,These bits specify the offset from the base address in bytes of the destination for the output of rotated images vertically and horizontally scaled down to 1/4."
line.long 0x68 "DSORR32,"
hexmask.long 0x68 0.--31. 1. "DSOR3,These bits specify the offset from the base address in bytes of the destination for the output of rotated images vertically and horizontally scaled down to 1/8."
line.long 0x6C "GFCR2,"
hexmask.long.byte 0x6C 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x6C 24.--27. 1. "SC8GSFHVAL,When calculating the Gaussian filter  this bit sets the number of digits of right-shifting after multiplying by the coefficient."
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hexmask.long.byte 0x6C 20.--23. 1. "SC4GSFHVAL,When calculating the Gaussian filter  this bit sets the number of digits of right-shifting after multiplying by the coefficient."
hexmask.long.byte 0x6C 16.--19. 1. "SC2GSFHVAL,When calculating the Gaussian filter  this bit sets the number of digits of right-shifting after multiplying by the coefficient."
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hexmask.long.byte 0x6C 11.--15. 1. "Reserved_11,Reserved"
bitfld.long 0x6C 10. "GRD8E,Sets the handling of the value after the decimal point in the calculation result when calculating the Gaussian filter." "0: Truncates the value after the decimal point,1: Rounds off the value after the decimal point"
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bitfld.long 0x6C 9. "GRD4E,Sets the handling of the value after the decimal point in the calculation result when calculating the Gaussian filter." "0: Truncates the value after the decimal point,1: Rounds off the value after the decimal point"
bitfld.long 0x6C 8. "GRD2E,Sets the handling of the value after the decimal point in the calculation result when calculating the Gaussian filter." "0: Truncates the value after the decimal point,1: Rounds off the value after the decimal point"
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bitfld.long 0x6C 7. "UPE,0: Does not apply padding to the top of the image" "0: Does not apply padding to the top of the image,1: Applies padding to the top of the image if the.."
bitfld.long 0x6C 6. "DPE,0: Does not apply padding to the bottom of the image" "0: Does not apply padding to the bottom of the image,1: Applies padding to the bottom of the image if.."
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bitfld.long 0x6C 5. "LPE,0: Does not apply padding to the left edge of the image" "0: Does not apply padding to the left edge of the..,1: Applies padding to the left edge of the image if.."
bitfld.long 0x6C 4. "RPE,0: Does not apply padding to the right edge of the image" "0: Does not apply padding to the right edge of the..,1: Applies padding to the right edge of the image.."
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rbitfld.long 0x6C 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x6C 0. "GFE,Gaussian Filter Enable" "0: 2and#65431,1: 3and#65431"
rgroup.long 0x274++0x3
line.long 0x0 "RSCR22,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0x0 3. "AFB8E,This bit controls whether the 2x2 averaging filter is bypassed or not." "0: Bypass not allowed,1: Bypass allowed"
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bitfld.long 0x0 2. "AFB4E,This bit controls whether the 2x2 averaging filter is bypassed or not." "0: Bypass not allowed,1: Bypass allowed"
bitfld.long 0x0 1. "AFB2E,This bit controls whether the 2x2 averaging filter is bypassed or not." "0: Bypass allowed,1: Bypass not allowed"
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bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x278++0xF
line.long 0x0 "RSCSR22,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0x0 3. "AFB8ES,0: The AFB8E bit in RSCR2 is not set to 1." "0: The AFB8E bit in RSCR2 is not set to 1,1: The AFB8E bit in RSCR2 is set to 1"
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bitfld.long 0x0 2. "AFB4ES,0: The AFB4E bit in RSCR2 is not set to 1." "0: The AFB4E bit in RSCR2 is not set to 1,1: The AFB4E bit in RSCR2 is set to 1"
bitfld.long 0x0 1. "AFB2ES,0: The AFB2E bit in RSCR2 is not set to 1." "0: The AFB2E bit in RSCR2 is not set to 1,1: The AFB2E bit in RSCR2 is set to 1"
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rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "RSCCR22,This register is used to allow or disallow clearing of the corresponding bits in the rotator and scaler control register 2 (RSCR2). Before clearing a bit in RSCR2. write 1 to the corresponding bit in this register."
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0x4 3. "AFB8EC,0: The AFB8E bit in RSCR2 is not clear to 0." "0: The AFB8E bit in RSCR2 is not clear to 0,1: The AFB8E bit in RSCR2 is clear to 0"
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bitfld.long 0x4 2. "AFB4EC,0: The AFB4E bit in RSCR2 is not clear to 0." "0: The AFB4E bit in RSCR2 is not clear to 0,1: The AFB4E bit in RSCR2 is clear to 0"
bitfld.long 0x4 1. "AFB2EC,0: The AFB2E bit in RSCR2 is not clear to 0." "0: The AFB2E bit in RSCR2 is not clear to 0,1: The AFB2E bit in RSCR2 is clear to 0"
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rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "EDCCR2,"
hexmask.long.tbyte 0x8 15.--31. 1. "Reserved_15,Reserved"
bitfld.long 0x8 14. "LUTEDCIJE,LUT EDC injection enable" "0: LUT injection is disabled,1: LUT injection is enabled"
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hexmask.long.word 0x8 0.--13. 1. "Reserved_0,Reserved"
line.long 0xC "EDCSR2,"
hexmask.long.tbyte 0xC 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0xC 8. "LMERR,Line Memory SRAM Parity checker status." "0: LMERR bit is not cleared,1: LMERR bit is cleared to 0"
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bitfld.long 0xC 7. "ROTERR,Rotator Buffer SRAM Parity checker status." "0: ROTERR bit is not cleared,1: ROTERR bit is cleared to 0"
bitfld.long 0xC 6. "DCERR2,Destination Cache Data SRAM Parity checker status." "0: DCERR2 bit is not cleared,1: DCERR2 bit is cleared"
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bitfld.long 0xC 5. "MFERR,Miss FIFO SRAM EDC checker status." "0: MFERR bit is not cleared,1: MFERR bit is cleared"
bitfld.long 0xC 4. "SQERR,Store Queue SRAM EDC checker status." "0: SQERR bit is not cleared,1: SQERR bit is cleared"
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bitfld.long 0xC 3. "PXERR,PX FIFO EDC checker status" "0: PXERR bit is not cleared,1: PXERR bit is cleared"
bitfld.long 0xC 2. "DCERR,Destination cache dirty bit SRAM checker status" "0: DCERR bit is not cleared,1: DCERR bit is cleared"
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bitfld.long 0xC 1. "LUTERR,LUT SRAM Parity checker status" "0: LUTERR bit is not cleared,1: LUTERR bit is cleared"
bitfld.long 0xC 0. "SCERR,Source Cache SRAM Parity checker status" "0: SCERR bit is not cleared,1: SCERR bit is cleared"
group.long 0x2A0++0xF
line.long 0x0 "SYNCCR02,This register specifies the module corresponding to bits 0 to 3 in the SYNCC enable field of the WUP and SLP instructions. Set the number for specifying the module in this register. See Table 56.21 for the numbers for specifying the module. Do.."
hexmask.long.byte 0x0 24.--31. 1. "SYNCC3,Specifies the module corresponding to bit 3 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x0 16.--23. 1. "SYNCC2,Specifies the module corresponding to bit 2 of the SYNCC enable field of the WUP and SLP instructions."
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hexmask.long.byte 0x0 8.--15. 1. "SYNCC1,Specifies the module corresponding to bit 1 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x0 0.--7. 1. "SYNCC0,Specifies the module corresponding to bit 0 of the SYNCC enable field of the WUP and SLP instructions."
line.long 0x4 "SYNCCR12,This register specifies the module corresponding to bits 4 to 7 in the SYNCC enable field of the WUP and SLP instructions. Set the number for specifying the module in this register. See Table 56.21 for the numbers for specifying the module. Do.."
hexmask.long.byte 0x4 24.--31. 1. "SYNCC7,Specifies the module corresponding to bit 7 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x4 16.--23. 1. "SYNCC6,Specifies the module corresponding to bit 6 of the SYNCC enable field of the WUP and SLP instructions."
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hexmask.long.byte 0x4 8.--15. 1. "SYNCC5,Specifies the module corresponding to bit 5 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x4 0.--7. 1. "SYNCC4,Specifies the module corresponding to bit 4 of the SYNCC enable field of the WUP and SLP instructions."
line.long 0x8 "SYNCCR22,This register specifies the module corresponding to bits 8 to 11 in the SYNCC enable field of the WUP and SLP instructions. Set the number for specifying the module in this register. See Table 56.21 for the numbers for specifying the module. Do.."
hexmask.long.byte 0x8 24.--31. 1. "SYNCC11,Specifies the module corresponding to bit 11 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x8 16.--23. 1. "SYNCC10,Specifies the module corresponding to bit 10 of the SYNCC enable field of the WUP and SLP instructions."
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hexmask.long.byte 0x8 8.--15. 1. "SYNCC9,Specifies the module corresponding to bit 9 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x8 0.--7. 1. "SYNCC8,Specifies the module corresponding to bit 8 of the SYNCC enable field of the WUP and SLP instructions."
line.long 0xC "SYNCCR32,This register specifies the module corresponding to bits 12 to 15 in the SYNCC enable field of the WUP and SLP instructions. Set the number for specifying the module in this register. See Table 56.21 for the numbers for specifying the module. Do.."
hexmask.long.byte 0xC 24.--31. 1. "SYNCC15,Specifies the module corresponding to bit 15 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0xC 16.--23. 1. "SYNCC14,Specifies the module corresponding to bit 14of the SYNCC enable field of the WUP and SLP instructions."
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hexmask.long.byte 0xC 8.--15. 1. "SYNCC13,Specifies the module corresponding to bit 13 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0xC 0.--7. 1. "SYNCC12,Specifies the module corresponding to bit 12 of the SYNCC enable field of the WUP and SLP instructions."
group.long 0x2C8++0x3
line.long 0x0 "GFOFR2,This register is used to specify the pixel format in the three scalers within the extended function block. Set this register in accord with the combinations shown in Table 56.25 or Table 56.26. Use the CMRCR register to specify the pixel format.."
hexmask.long.byte 0x0 27.--31. 1. "Reserved_27,Reserved"
bitfld.long 0x0 24.--26. "GFM8R,These bits specify the format of the image rotated and vertically and horizontally scaled down to 1/8 after the Gaussian Filter." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 20.--22. "GFM4R,These bits specify the format of the image rotated and vertically and horizontally scaled down to 1/4 after the Gaussian Filter." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
bitfld.long 0x0 16.--18. "GFM2R,These bits specify the format of the image rotated and vertically and horizontally scaled down to 1/2 after the Gaussian Filter." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
bitfld.long 0x0 8.--10. "GFM8N,These bits specify the format of the non-rotated image vertically and horizontally scaled down to 1/8 after the Gaussian Filter." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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rbitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
bitfld.long 0x0 4.--6. "GFM4N,These bits specify the format of the non-rotated image vertically and horizontally scaled down to 1/4 after the Gaussian filter." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.long 0x0 0.--2. "GFM2N,These bits specify the format of the non-rotated image vertically and horizontally scaled down to 1/2 after the Gaussianfilter." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
group.long 0xB00++0x4B
line.long 0x0 "SSAR12,m = 1 to 4."
hexmask.long.tbyte 0x0 8.--31. 1. "SSARn,SRC Start Address for Map n"
bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
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hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved"
line.long 0x4 "SSTR12,m = 1 to 4."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x4 0.--16. 1. "SSTRn,Specifies the memory width of the source area for the n-th map in bytes as an integer multiple of 256 within the range from 256 to 65 536 bytes in the linear addressing mode when reading texture data from the external memory. In tile addressing.."
line.long 0x8 "SSAR22,m = 1 to 4."
hexmask.long.tbyte 0x8 8.--31. 1. "SSARn,SRC Start Address for Map n"
bitfld.long 0x8 6.--7. "Reserved_6,Reserved" "0,1,2,3"
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hexmask.long.byte 0x8 0.--5. 1. "Reserved_0,Reserved"
line.long 0xC "SSTR22,m = 1 to 4."
hexmask.long.word 0xC 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0xC 0.--16. 1. "SSTRn,Specifies the memory width of the source area for the n-th map in bytes as an integer multiple of 256 within the range from 256 to 65 536 bytes in the linear addressing mode when reading texture data from the external memory. In tile addressing.."
line.long 0x10 "SSAR32,m = 1 to 4."
hexmask.long.tbyte 0x10 8.--31. 1. "SSARn,SRC Start Address for Map n"
bitfld.long 0x10 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x10 0.--5. 1. "Reserved_0,Reserved"
line.long 0x14 "SSTR32,m = 1 to 4."
hexmask.long.word 0x14 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x14 0.--16. 1. "SSTRn,Specifies the memory width of the source area for the n-th map in bytes as an integer multiple of 256 within the range from 256 to 65 536 bytes in the linear addressing mode when reading texture data from the external memory. In tile addressing.."
line.long 0x18 "SSAR42,m = 1 to 4."
hexmask.long.tbyte 0x18 8.--31. 1. "SSARn,SRC Start Address for Map n"
bitfld.long 0x18 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x18 0.--5. 1. "Reserved_0,Reserved"
line.long 0x1C "SSTR42,m = 1 to 4."
hexmask.long.word 0x1C 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x1C 0.--16. 1. "SSTRn,Specifies the memory width of the source area for the n-th map in bytes as an integer multiple of 256 within the range from 256 to 65 536 bytes in the linear addressing mode when reading texture data from the external memory. In tile addressing.."
line.long 0x20 "UVSSAR2,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x20 8.--31. 1. "UVSSAR,SRC Start Address for UV plane"
hexmask.long.byte 0x20 0.--7. 1. "Reserved_0,Reserved"
line.long 0x24 "UVSSTR2,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.word 0x24 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x24 0.--16. 1. "UVSSTR,Sets the memory width of texture data read from the external memory of UV plane in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is used as-is  while in.."
line.long 0x28 "UVSSAR12,n = 1 to 4."
hexmask.long.tbyte 0x28 8.--31. 1. "UVSSARn,SRC Start Address for UV plane for Map n"
hexmask.long.byte 0x28 0.--7. 1. "Reserved_0,Reserved"
line.long 0x2C "UVSSTR12,"
hexmask.long.word 0x2C 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x2C 0.--16. 1. "UVSSTRn,Sets the memory width of texture data read from the external memory of UV plane for the n-th Map in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is.."
line.long 0x30 "UVSSAR22,n = 1 to 4."
hexmask.long.tbyte 0x30 8.--31. 1. "UVSSARn,SRC Start Address for UV plane for Map n"
hexmask.long.byte 0x30 0.--7. 1. "Reserved_0,Reserved"
line.long 0x34 "UVSSTR22,"
hexmask.long.word 0x34 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x34 0.--16. 1. "UVSSTRn,Sets the memory width of texture data read from the external memory of UV plane for the n-th Map in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is.."
line.long 0x38 "UVSSAR32,n = 1 to 4."
hexmask.long.tbyte 0x38 8.--31. 1. "UVSSARn,SRC Start Address for UV plane for Map n"
hexmask.long.byte 0x38 0.--7. 1. "Reserved_0,Reserved"
line.long 0x3C "UVSSTR32,"
hexmask.long.word 0x3C 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x3C 0.--16. 1. "UVSSTRn,Sets the memory width of texture data read from the external memory of UV plane for the n-th Map in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is.."
line.long 0x40 "UVSSAR42,n = 1 to 4."
hexmask.long.tbyte 0x40 8.--31. 1. "UVSSARn,SRC Start Address for UV plane for Map n"
hexmask.long.byte 0x40 0.--7. 1. "Reserved_0,Reserved"
line.long 0x44 "UVSSTR42,"
hexmask.long.word 0x44 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x44 0.--16. 1. "UVSSTRn,Sets the memory width of texture data read from the external memory of UV plane for the n-th Map in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is.."
line.long 0x48 "UVDSTR2,This register is not initialized by the SWRST bit in the control register (CR)"
hexmask.long.word 0x48 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x48 0.--16. 1. "UVDSTR,Sets the memory width of destination data of UV plane in Semi-planar format to a range from 64 bytes to 65 536 bytes and in 64-byte unit. If the UVDSTSEL bit of DCCR register is 1  the setting of this register is used as memory stride  while if.."
group.long 0x1000++0xFFF
line.long 0x0 "LUTDR02,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4 "LUTDR12,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8 "LUTDR22,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC "LUTDR32,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x10 "LUTDR42,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x14 "LUTDR52,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x18 "LUTDR62,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1C "LUTDR72,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x20 "LUTDR82,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x24 "LUTDR92,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x28 "LUTDR102,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2C "LUTDR112,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x30 "LUTDR122,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x34 "LUTDR132,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x38 "LUTDR142,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3C "LUTDR152,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x40 "LUTDR162,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x44 "LUTDR172,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x48 "LUTDR182,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4C "LUTDR192,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x50 "LUTDR202,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x54 "LUTDR212,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x58 "LUTDR222,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5C "LUTDR232,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x60 "LUTDR242,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x64 "LUTDR252,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x68 "LUTDR262,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6C "LUTDR272,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x70 "LUTDR282,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x74 "LUTDR292,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x78 "LUTDR302,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7C "LUTDR312,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x80 "LUTDR322,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x84 "LUTDR332,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x88 "LUTDR342,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8C "LUTDR352,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x90 "LUTDR362,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x94 "LUTDR372,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x98 "LUTDR382,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9C "LUTDR392,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA0 "LUTDR402,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA4 "LUTDR412,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA8 "LUTDR422,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAC "LUTDR432,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB0 "LUTDR442,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB4 "LUTDR452,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB8 "LUTDR462,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBC "LUTDR472,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC0 "LUTDR482,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC4 "LUTDR492,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC8 "LUTDR502,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCC "LUTDR512,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD0 "LUTDR522,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD4 "LUTDR532,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD8 "LUTDR542,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDC "LUTDR552,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE0 "LUTDR562,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE4 "LUTDR572,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE8 "LUTDR582,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEC "LUTDR592,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF0 "LUTDR602,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF4 "LUTDR612,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF8 "LUTDR622,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFC "LUTDR632,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x100 "LUTDR642,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x100 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x100 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x104 "LUTDR652,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x104 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x104 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x108 "LUTDR662,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x108 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x108 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x10C "LUTDR672,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x10C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x110 "LUTDR682,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x110 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x110 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x114 "LUTDR692,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x114 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x114 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x118 "LUTDR702,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x118 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x118 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x11C "LUTDR712,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x11C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x11C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x120 "LUTDR722,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x120 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x120 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x124 "LUTDR732,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x124 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x124 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x128 "LUTDR742,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x128 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x128 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x12C "LUTDR752,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x12C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x12C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x130 "LUTDR762,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x130 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x130 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x134 "LUTDR772,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x134 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x134 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x138 "LUTDR782,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x138 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x138 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x13C "LUTDR792,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x13C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x13C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x140 "LUTDR802,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x140 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x140 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x144 "LUTDR812,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x144 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x144 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x148 "LUTDR822,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x148 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x148 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x14C "LUTDR832,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x14C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x150 "LUTDR842,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x150 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x150 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x154 "LUTDR852,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x154 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x154 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x158 "LUTDR862,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x158 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x158 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x15C "LUTDR872,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x15C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x15C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x160 "LUTDR882,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x160 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x160 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x164 "LUTDR892,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x164 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x164 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x168 "LUTDR902,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x168 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x168 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x16C "LUTDR912,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x16C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x16C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x170 "LUTDR922,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x170 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x170 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x174 "LUTDR932,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x174 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x174 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x178 "LUTDR942,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x178 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x178 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x17C "LUTDR952,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x17C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x17C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x180 "LUTDR962,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x180 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x180 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x184 "LUTDR972,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x184 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x184 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x188 "LUTDR982,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x188 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x188 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x18C "LUTDR992,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x18C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x190 "LUTDR1002,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x190 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x190 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x194 "LUTDR1012,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x194 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x194 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x198 "LUTDR1022,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x198 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x198 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x19C "LUTDR1032,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x19C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x19C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1A0 "LUTDR1042,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1A4 "LUTDR1052,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1A8 "LUTDR1062,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1AC "LUTDR1072,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1B0 "LUTDR1082,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1B4 "LUTDR1092,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1B8 "LUTDR1102,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1BC "LUTDR1112,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1C0 "LUTDR1122,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1C4 "LUTDR1132,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1C8 "LUTDR1142,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1CC "LUTDR1152,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1D0 "LUTDR1162,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1D4 "LUTDR1172,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1D8 "LUTDR1182,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1DC "LUTDR1192,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1E0 "LUTDR1202,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1E4 "LUTDR1212,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1E8 "LUTDR1222,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1EC "LUTDR1232,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1F0 "LUTDR1242,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1F4 "LUTDR1252,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1F8 "LUTDR1262,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1FC "LUTDR1272,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x200 "LUTDR1282,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x200 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x200 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x204 "LUTDR1292,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x204 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x204 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x208 "LUTDR1302,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x208 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x208 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x20C "LUTDR1312,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x20C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x210 "LUTDR1322,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x210 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x210 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x214 "LUTDR1332,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x214 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x214 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x218 "LUTDR1342,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x218 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x218 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x21C "LUTDR1352,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x21C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x21C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x220 "LUTDR1362,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x220 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x220 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x224 "LUTDR1372,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x224 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x224 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x228 "LUTDR1382,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x228 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x228 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x22C "LUTDR1392,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x22C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x22C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x230 "LUTDR1402,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x230 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x230 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x234 "LUTDR1412,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x234 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x234 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x238 "LUTDR1422,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x238 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x238 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x23C "LUTDR1432,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x23C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x23C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x240 "LUTDR1442,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x240 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x240 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x244 "LUTDR1452,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x244 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x244 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x248 "LUTDR1462,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x248 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x248 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x24C "LUTDR1472,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x24C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x250 "LUTDR1482,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x250 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x250 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x254 "LUTDR1492,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x254 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x254 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x258 "LUTDR1502,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x258 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x258 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x25C "LUTDR1512,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x25C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x25C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x260 "LUTDR1522,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x260 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x260 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x264 "LUTDR1532,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x264 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x264 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x268 "LUTDR1542,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x268 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x268 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x26C "LUTDR1552,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x26C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x26C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x270 "LUTDR1562,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x270 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x270 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x274 "LUTDR1572,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x274 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x274 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x278 "LUTDR1582,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x278 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x278 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x27C "LUTDR1592,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x27C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x27C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x280 "LUTDR1602,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x280 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x280 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x284 "LUTDR1612,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x284 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x284 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x288 "LUTDR1622,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x288 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x288 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x28C "LUTDR1632,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x28C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x28C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x290 "LUTDR1642,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x290 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x290 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x294 "LUTDR1652,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x294 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x294 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x298 "LUTDR1662,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x298 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x298 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x29C "LUTDR1672,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x29C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x29C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2A0 "LUTDR1682,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2A4 "LUTDR1692,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2A8 "LUTDR1702,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2AC "LUTDR1712,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2B0 "LUTDR1722,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2B4 "LUTDR1732,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2B8 "LUTDR1742,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2BC "LUTDR1752,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2C0 "LUTDR1762,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2C4 "LUTDR1772,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2C8 "LUTDR1782,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2CC "LUTDR1792,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2D0 "LUTDR1802,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2D4 "LUTDR1812,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2D8 "LUTDR1822,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2DC "LUTDR1832,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2E0 "LUTDR1842,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2E4 "LUTDR1852,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2E8 "LUTDR1862,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2EC "LUTDR1872,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2F0 "LUTDR1882,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2F4 "LUTDR1892,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2F8 "LUTDR1902,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2FC "LUTDR1912,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x300 "LUTDR1922,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x300 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x300 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x304 "LUTDR1932,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x304 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x304 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x308 "LUTDR1942,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x308 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x308 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x30C "LUTDR1952,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x30C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x30C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x310 "LUTDR1962,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x310 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x310 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x314 "LUTDR1972,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x314 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x314 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x318 "LUTDR1982,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x318 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x318 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x31C "LUTDR1992,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x31C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x31C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x320 "LUTDR2002,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x320 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x320 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x324 "LUTDR2012,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x324 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x324 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x328 "LUTDR2022,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x328 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x328 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x32C "LUTDR2032,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x32C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x32C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x330 "LUTDR2042,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x330 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x330 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x334 "LUTDR2052,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x334 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x334 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x338 "LUTDR2062,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x338 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x338 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x33C "LUTDR2072,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x33C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x33C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x340 "LUTDR2082,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x340 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x340 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x344 "LUTDR2092,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x344 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x344 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x348 "LUTDR2102,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x348 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x348 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x34C "LUTDR2112,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x34C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x34C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x350 "LUTDR2122,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x350 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x350 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x354 "LUTDR2132,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x354 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x354 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x358 "LUTDR2142,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x358 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x358 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x35C "LUTDR2152,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x35C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x35C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x360 "LUTDR2162,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x360 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x360 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x364 "LUTDR2172,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x364 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x364 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x368 "LUTDR2182,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x368 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x368 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x36C "LUTDR2192,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x36C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x36C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x370 "LUTDR2202,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x370 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x370 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x374 "LUTDR2212,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x374 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x374 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x378 "LUTDR2222,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x378 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x378 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x37C "LUTDR2232,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x37C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x37C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x380 "LUTDR2242,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x380 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x380 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x384 "LUTDR2252,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x384 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x384 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x388 "LUTDR2262,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x388 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x388 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x38C "LUTDR2272,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x38C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x38C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x390 "LUTDR2282,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x390 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x390 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x394 "LUTDR2292,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x394 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x394 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x398 "LUTDR2302,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x398 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x398 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x39C "LUTDR2312,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x39C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x39C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3A0 "LUTDR2322,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3A4 "LUTDR2332,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3A8 "LUTDR2342,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3AC "LUTDR2352,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3B0 "LUTDR2362,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3B4 "LUTDR2372,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3B8 "LUTDR2382,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3BC "LUTDR2392,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3C0 "LUTDR2402,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3C4 "LUTDR2412,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3C8 "LUTDR2422,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3CC "LUTDR2432,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3D0 "LUTDR2442,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3D4 "LUTDR2452,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3D8 "LUTDR2462,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3DC "LUTDR2472,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3E0 "LUTDR2482,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3E4 "LUTDR2492,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3E8 "LUTDR2502,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3EC "LUTDR2512,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3F0 "LUTDR2522,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3F4 "LUTDR2532,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3F8 "LUTDR2542,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3FC "LUTDR2552,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x400 "LUTDR2562,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x400 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x400 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x404 "LUTDR2572,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x404 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x404 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x408 "LUTDR2582,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x408 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x408 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x40C "LUTDR2592,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x40C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x40C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x410 "LUTDR2602,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x410 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x410 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x414 "LUTDR2612,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x414 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x414 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x418 "LUTDR2622,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x418 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x418 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x41C "LUTDR2632,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x41C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x41C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x420 "LUTDR2642,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x420 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x420 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x424 "LUTDR2652,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x424 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x424 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x428 "LUTDR2662,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x428 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x428 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x42C "LUTDR2672,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x42C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x42C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x430 "LUTDR2682,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x430 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x430 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x434 "LUTDR2692,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x434 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x434 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x438 "LUTDR2702,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x438 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x438 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x43C "LUTDR2712,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x43C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x43C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x440 "LUTDR2722,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x440 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x440 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x444 "LUTDR2732,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x444 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x444 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x448 "LUTDR2742,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x448 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x448 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x44C "LUTDR2752,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x44C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x44C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x450 "LUTDR2762,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x450 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x450 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x454 "LUTDR2772,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x454 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x454 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x458 "LUTDR2782,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x458 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x458 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x45C "LUTDR2792,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x45C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x45C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x460 "LUTDR2802,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x460 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x460 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x464 "LUTDR2812,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x464 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x464 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x468 "LUTDR2822,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x468 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x468 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x46C "LUTDR2832,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x46C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x46C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x470 "LUTDR2842,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x470 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x470 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x474 "LUTDR2852,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x474 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x474 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x478 "LUTDR2862,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x478 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x478 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x47C "LUTDR2872,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x47C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x47C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x480 "LUTDR2882,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x480 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x480 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x484 "LUTDR2892,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x484 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x484 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x488 "LUTDR2902,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x488 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x488 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x48C "LUTDR2912,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x48C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x48C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x490 "LUTDR2922,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x490 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x490 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x494 "LUTDR2932,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x494 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x494 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x498 "LUTDR2942,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x498 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x498 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x49C "LUTDR2952,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x49C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x49C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4A0 "LUTDR2962,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4A4 "LUTDR2972,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4A8 "LUTDR2982,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4AC "LUTDR2992,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4B0 "LUTDR3002,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4B4 "LUTDR3012,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4B8 "LUTDR3022,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4BC "LUTDR3032,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4C0 "LUTDR3042,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4C4 "LUTDR3052,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4C8 "LUTDR3062,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4CC "LUTDR3072,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4D0 "LUTDR3082,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4D4 "LUTDR3092,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4D8 "LUTDR3102,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4DC "LUTDR3112,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4E0 "LUTDR3122,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4E4 "LUTDR3132,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4E8 "LUTDR3142,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4EC "LUTDR3152,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4F0 "LUTDR3162,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4F4 "LUTDR3172,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4F8 "LUTDR3182,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4FC "LUTDR3192,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x500 "LUTDR3202,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x500 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x500 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x504 "LUTDR3212,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x504 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x504 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x508 "LUTDR3222,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x508 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x508 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x50C "LUTDR3232,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x50C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x50C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x510 "LUTDR3242,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x510 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x510 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x514 "LUTDR3252,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x514 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x514 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x518 "LUTDR3262,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x518 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x518 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x51C "LUTDR3272,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x51C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x51C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x520 "LUTDR3282,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x520 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x520 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x524 "LUTDR3292,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x524 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x524 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x528 "LUTDR3302,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x528 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x528 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x52C "LUTDR3312,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x52C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x52C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x530 "LUTDR3322,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x530 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x530 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x534 "LUTDR3332,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x534 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x534 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x538 "LUTDR3342,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x538 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x538 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x53C "LUTDR3352,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x53C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x53C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x540 "LUTDR3362,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x540 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x540 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x544 "LUTDR3372,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x544 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x544 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x548 "LUTDR3382,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x548 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x548 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x54C "LUTDR3392,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x54C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x54C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x550 "LUTDR3402,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x550 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x550 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x554 "LUTDR3412,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x554 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x554 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x558 "LUTDR3422,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x558 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x558 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x55C "LUTDR3432,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x55C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x55C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x560 "LUTDR3442,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x560 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x560 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x564 "LUTDR3452,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x564 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x564 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x568 "LUTDR3462,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x568 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x568 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x56C "LUTDR3472,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x56C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x56C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x570 "LUTDR3482,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x570 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x570 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x574 "LUTDR3492,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x574 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x574 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x578 "LUTDR3502,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x578 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x578 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x57C "LUTDR3512,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x57C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x57C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x580 "LUTDR3522,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x580 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x580 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x584 "LUTDR3532,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x584 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x584 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x588 "LUTDR3542,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x588 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x588 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x58C "LUTDR3552,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x58C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x58C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x590 "LUTDR3562,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x590 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x590 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x594 "LUTDR3572,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x594 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x594 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x598 "LUTDR3582,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x598 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x598 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x59C "LUTDR3592,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x59C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x59C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5A0 "LUTDR3602,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5A4 "LUTDR3612,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5A8 "LUTDR3622,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5AC "LUTDR3632,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5B0 "LUTDR3642,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5B4 "LUTDR3652,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5B8 "LUTDR3662,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5BC "LUTDR3672,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5C0 "LUTDR3682,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5C4 "LUTDR3692,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5C8 "LUTDR3702,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5CC "LUTDR3712,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5D0 "LUTDR3722,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5D4 "LUTDR3732,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5D8 "LUTDR3742,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5DC "LUTDR3752,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5E0 "LUTDR3762,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5E4 "LUTDR3772,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5E8 "LUTDR3782,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5EC "LUTDR3792,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5F0 "LUTDR3802,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5F4 "LUTDR3812,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5F8 "LUTDR3822,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5FC "LUTDR3832,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x600 "LUTDR3842,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x600 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x600 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x604 "LUTDR3852,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x604 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x604 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x608 "LUTDR3862,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x608 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x608 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x60C "LUTDR3872,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x60C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x60C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x610 "LUTDR3882,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x610 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x610 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x614 "LUTDR3892,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x614 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x614 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x618 "LUTDR3902,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x618 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x618 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x61C "LUTDR3912,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x61C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x61C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x620 "LUTDR3922,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x620 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x620 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x624 "LUTDR3932,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x624 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x624 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x628 "LUTDR3942,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x628 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x628 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x62C "LUTDR3952,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x62C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x62C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x630 "LUTDR3962,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x630 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x630 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x634 "LUTDR3972,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x634 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x634 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x638 "LUTDR3982,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x638 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x638 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x63C "LUTDR3992,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x63C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x63C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x640 "LUTDR4002,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x640 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x640 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x644 "LUTDR4012,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x644 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x644 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x648 "LUTDR4022,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x648 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x648 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x64C "LUTDR4032,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x64C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x64C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x650 "LUTDR4042,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x650 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x650 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x654 "LUTDR4052,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x654 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x654 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x658 "LUTDR4062,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x658 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x658 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x65C "LUTDR4072,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x65C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x65C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x660 "LUTDR4082,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x660 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x660 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x664 "LUTDR4092,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x664 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x664 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x668 "LUTDR4102,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x668 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x668 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x66C "LUTDR4112,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x66C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x66C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x670 "LUTDR4122,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x670 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x670 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x674 "LUTDR4132,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x674 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x674 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x678 "LUTDR4142,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x678 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x678 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x67C "LUTDR4152,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x67C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x67C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x680 "LUTDR4162,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x680 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x680 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x684 "LUTDR4172,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x684 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x684 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x688 "LUTDR4182,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x688 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x688 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x68C "LUTDR4192,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x68C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x68C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x690 "LUTDR4202,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x690 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x690 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x694 "LUTDR4212,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x694 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x694 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x698 "LUTDR4222,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x698 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x698 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x69C "LUTDR4232,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x69C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x69C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6A0 "LUTDR4242,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6A4 "LUTDR4252,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6A8 "LUTDR4262,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6AC "LUTDR4272,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6B0 "LUTDR4282,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6B4 "LUTDR4292,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6B8 "LUTDR4302,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6BC "LUTDR4312,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6C0 "LUTDR4322,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6C4 "LUTDR4332,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6C8 "LUTDR4342,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6CC "LUTDR4352,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6D0 "LUTDR4362,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6D4 "LUTDR4372,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6D8 "LUTDR4382,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6DC "LUTDR4392,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6E0 "LUTDR4402,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6E4 "LUTDR4412,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6E8 "LUTDR4422,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6EC "LUTDR4432,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6F0 "LUTDR4442,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6F4 "LUTDR4452,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6F8 "LUTDR4462,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6FC "LUTDR4472,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x700 "LUTDR4482,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x700 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x700 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x704 "LUTDR4492,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x704 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x704 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x708 "LUTDR4502,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x708 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x708 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x70C "LUTDR4512,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x70C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x70C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x710 "LUTDR4522,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x710 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x710 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x714 "LUTDR4532,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x714 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x714 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x718 "LUTDR4542,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x718 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x718 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x71C "LUTDR4552,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x71C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x71C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x720 "LUTDR4562,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x720 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x720 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x724 "LUTDR4572,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x724 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x724 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x728 "LUTDR4582,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x728 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x728 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x72C "LUTDR4592,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x72C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x72C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x730 "LUTDR4602,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x730 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x730 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x734 "LUTDR4612,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x734 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x734 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x738 "LUTDR4622,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x738 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x738 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x73C "LUTDR4632,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x73C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x73C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x740 "LUTDR4642,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x740 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x740 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x744 "LUTDR4652,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x744 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x744 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x748 "LUTDR4662,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x748 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x748 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x74C "LUTDR4672,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x74C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x74C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x750 "LUTDR4682,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x750 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x750 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x754 "LUTDR4692,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x754 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x754 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x758 "LUTDR4702,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x758 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x758 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x75C "LUTDR4712,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x75C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x75C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x760 "LUTDR4722,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x760 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x760 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x764 "LUTDR4732,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x764 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x764 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x768 "LUTDR4742,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x768 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x768 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x76C "LUTDR4752,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x76C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x76C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x770 "LUTDR4762,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x770 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x770 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x774 "LUTDR4772,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x774 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x774 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x778 "LUTDR4782,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x778 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x778 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x77C "LUTDR4792,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x77C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x77C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x780 "LUTDR4802,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x780 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x780 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x784 "LUTDR4812,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x784 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x784 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x788 "LUTDR4822,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x788 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x788 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x78C "LUTDR4832,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x78C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x78C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x790 "LUTDR4842,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x790 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x790 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x794 "LUTDR4852,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x794 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x794 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x798 "LUTDR4862,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x798 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x798 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x79C "LUTDR4872,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x79C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x79C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7A0 "LUTDR4882,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7A4 "LUTDR4892,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7A8 "LUTDR4902,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7AC "LUTDR4912,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7B0 "LUTDR4922,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7B4 "LUTDR4932,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7B8 "LUTDR4942,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7BC "LUTDR4952,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7C0 "LUTDR4962,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7C4 "LUTDR4972,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7C8 "LUTDR4982,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7CC "LUTDR4992,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7D0 "LUTDR5002,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7D4 "LUTDR5012,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7D8 "LUTDR5022,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7DC "LUTDR5032,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7E0 "LUTDR5042,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7E4 "LUTDR5052,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7E8 "LUTDR5062,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7EC "LUTDR5072,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7F0 "LUTDR5082,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7F4 "LUTDR5092,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7F8 "LUTDR5102,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7FC "LUTDR5112,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x800 "LUTDR5122,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x800 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x800 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x804 "LUTDR5132,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x804 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x804 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x808 "LUTDR5142,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x808 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x808 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x80C "LUTDR5152,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x80C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x80C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x810 "LUTDR5162,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x810 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x810 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x814 "LUTDR5172,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x814 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x814 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x818 "LUTDR5182,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x818 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x818 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x81C "LUTDR5192,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x81C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x81C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x820 "LUTDR5202,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x820 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x820 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x824 "LUTDR5212,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x824 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x824 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x828 "LUTDR5222,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x828 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x828 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x82C "LUTDR5232,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x82C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x82C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x830 "LUTDR5242,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x830 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x830 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x834 "LUTDR5252,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x834 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x834 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x838 "LUTDR5262,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x838 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x838 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x83C "LUTDR5272,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x83C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x83C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x840 "LUTDR5282,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x840 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x840 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x844 "LUTDR5292,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x844 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x844 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x848 "LUTDR5302,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x848 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x848 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x84C "LUTDR5312,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x84C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x84C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x850 "LUTDR5322,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x850 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x850 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x854 "LUTDR5332,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x854 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x854 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x858 "LUTDR5342,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x858 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x858 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x85C "LUTDR5352,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x85C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x85C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x860 "LUTDR5362,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x860 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x860 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x864 "LUTDR5372,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x864 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x864 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x868 "LUTDR5382,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x868 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x868 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x86C "LUTDR5392,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x86C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x86C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x870 "LUTDR5402,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x870 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x870 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x874 "LUTDR5412,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x874 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x874 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x878 "LUTDR5422,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x878 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x878 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x87C "LUTDR5432,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x87C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x87C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x880 "LUTDR5442,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x880 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x880 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x884 "LUTDR5452,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x884 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x884 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x888 "LUTDR5462,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x888 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x888 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x88C "LUTDR5472,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x88C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x88C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x890 "LUTDR5482,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x890 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x890 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x894 "LUTDR5492,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x894 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x894 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x898 "LUTDR5502,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x898 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x898 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x89C "LUTDR5512,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x89C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x89C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8A0 "LUTDR5522,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8A4 "LUTDR5532,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8A8 "LUTDR5542,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8AC "LUTDR5552,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8B0 "LUTDR5562,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8B4 "LUTDR5572,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8B8 "LUTDR5582,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8BC "LUTDR5592,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8C0 "LUTDR5602,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8C4 "LUTDR5612,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8C8 "LUTDR5622,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8CC "LUTDR5632,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8D0 "LUTDR5642,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8D4 "LUTDR5652,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8D8 "LUTDR5662,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8DC "LUTDR5672,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8E0 "LUTDR5682,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8E4 "LUTDR5692,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8E8 "LUTDR5702,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8EC "LUTDR5712,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8F0 "LUTDR5722,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8F4 "LUTDR5732,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8F8 "LUTDR5742,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8FC "LUTDR5752,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x900 "LUTDR5762,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x900 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x900 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x904 "LUTDR5772,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x904 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x904 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x908 "LUTDR5782,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x908 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x908 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x90C "LUTDR5792,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x90C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x90C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x910 "LUTDR5802,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x910 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x910 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x914 "LUTDR5812,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x914 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x914 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x918 "LUTDR5822,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x918 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x918 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x91C "LUTDR5832,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x91C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x91C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x920 "LUTDR5842,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x920 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x920 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x924 "LUTDR5852,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x924 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x924 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x928 "LUTDR5862,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x928 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x928 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x92C "LUTDR5872,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x92C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x92C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x930 "LUTDR5882,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x930 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x930 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x934 "LUTDR5892,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x934 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x934 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x938 "LUTDR5902,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x938 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x938 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x93C "LUTDR5912,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x93C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x93C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x940 "LUTDR5922,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x940 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x940 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x944 "LUTDR5932,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x944 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x944 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x948 "LUTDR5942,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x948 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x948 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x94C "LUTDR5952,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x94C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x94C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x950 "LUTDR5962,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x950 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x950 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x954 "LUTDR5972,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x954 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x954 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x958 "LUTDR5982,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x958 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x958 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x95C "LUTDR5992,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x95C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x95C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x960 "LUTDR6002,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x960 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x960 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x964 "LUTDR6012,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x964 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x964 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x968 "LUTDR6022,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x968 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x968 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x96C "LUTDR6032,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x96C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x96C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x970 "LUTDR6042,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x970 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x970 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x974 "LUTDR6052,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x974 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x974 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x978 "LUTDR6062,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x978 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x978 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x97C "LUTDR6072,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x97C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x97C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x980 "LUTDR6082,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x980 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x980 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x984 "LUTDR6092,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x984 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x984 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x988 "LUTDR6102,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x988 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x988 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x98C "LUTDR6112,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x98C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x98C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x990 "LUTDR6122,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x990 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x990 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x994 "LUTDR6132,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x994 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x994 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x998 "LUTDR6142,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x998 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x998 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x99C "LUTDR6152,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x99C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x99C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9A0 "LUTDR6162,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9A4 "LUTDR6172,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9A8 "LUTDR6182,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9AC "LUTDR6192,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9B0 "LUTDR6202,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9B4 "LUTDR6212,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9B8 "LUTDR6222,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9BC "LUTDR6232,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9C0 "LUTDR6242,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9C4 "LUTDR6252,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9C8 "LUTDR6262,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9CC "LUTDR6272,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9D0 "LUTDR6282,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9D4 "LUTDR6292,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9D8 "LUTDR6302,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9DC "LUTDR6312,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9E0 "LUTDR6322,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9E4 "LUTDR6332,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9E8 "LUTDR6342,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9EC "LUTDR6352,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9F0 "LUTDR6362,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9F4 "LUTDR6372,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9F8 "LUTDR6382,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9FC "LUTDR6392,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA00 "LUTDR6402,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA04 "LUTDR6412,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA08 "LUTDR6422,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA0C "LUTDR6432,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA10 "LUTDR6442,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA14 "LUTDR6452,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA18 "LUTDR6462,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA1C "LUTDR6472,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA20 "LUTDR6482,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA24 "LUTDR6492,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA28 "LUTDR6502,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA2C "LUTDR6512,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA30 "LUTDR6522,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA34 "LUTDR6532,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA38 "LUTDR6542,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA3C "LUTDR6552,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA40 "LUTDR6562,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA44 "LUTDR6572,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA48 "LUTDR6582,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA4C "LUTDR6592,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA50 "LUTDR6602,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA54 "LUTDR6612,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA58 "LUTDR6622,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA5C "LUTDR6632,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA60 "LUTDR6642,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA64 "LUTDR6652,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA68 "LUTDR6662,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA6C "LUTDR6672,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA70 "LUTDR6682,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA74 "LUTDR6692,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA78 "LUTDR6702,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA7C "LUTDR6712,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA80 "LUTDR6722,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA84 "LUTDR6732,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA88 "LUTDR6742,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA8C "LUTDR6752,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA90 "LUTDR6762,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA94 "LUTDR6772,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA98 "LUTDR6782,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA9C "LUTDR6792,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAA0 "LUTDR6802,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAA4 "LUTDR6812,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAA8 "LUTDR6822,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAAC "LUTDR6832,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAB0 "LUTDR6842,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAB4 "LUTDR6852,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAB8 "LUTDR6862,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xABC "LUTDR6872,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xABC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xABC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAC0 "LUTDR6882,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAC4 "LUTDR6892,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAC8 "LUTDR6902,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xACC "LUTDR6912,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xACC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xACC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAD0 "LUTDR6922,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAD4 "LUTDR6932,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAD8 "LUTDR6942,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xADC "LUTDR6952,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xADC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xADC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAE0 "LUTDR6962,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAE4 "LUTDR6972,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAE8 "LUTDR6982,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAEC "LUTDR6992,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAF0 "LUTDR7002,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAF4 "LUTDR7012,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAF8 "LUTDR7022,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAFC "LUTDR7032,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB00 "LUTDR7042,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB04 "LUTDR7052,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB08 "LUTDR7062,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB0C "LUTDR7072,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB10 "LUTDR7082,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB14 "LUTDR7092,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB18 "LUTDR7102,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB1C "LUTDR7112,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB20 "LUTDR7122,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB24 "LUTDR7132,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB28 "LUTDR7142,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB2C "LUTDR7152,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB30 "LUTDR7162,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB34 "LUTDR7172,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB38 "LUTDR7182,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB3C "LUTDR7192,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB40 "LUTDR7202,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB44 "LUTDR7212,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB48 "LUTDR7222,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB4C "LUTDR7232,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB50 "LUTDR7242,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB54 "LUTDR7252,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB58 "LUTDR7262,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB5C "LUTDR7272,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB60 "LUTDR7282,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB64 "LUTDR7292,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB68 "LUTDR7302,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB6C "LUTDR7312,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB70 "LUTDR7322,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB74 "LUTDR7332,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB78 "LUTDR7342,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB7C "LUTDR7352,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB80 "LUTDR7362,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB84 "LUTDR7372,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB88 "LUTDR7382,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB8C "LUTDR7392,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB90 "LUTDR7402,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB94 "LUTDR7412,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB98 "LUTDR7422,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB9C "LUTDR7432,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBA0 "LUTDR7442,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBA4 "LUTDR7452,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBA8 "LUTDR7462,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBAC "LUTDR7472,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBB0 "LUTDR7482,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBB4 "LUTDR7492,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBB8 "LUTDR7502,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBBC "LUTDR7512,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBC0 "LUTDR7522,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBC4 "LUTDR7532,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBC8 "LUTDR7542,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBCC "LUTDR7552,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBD0 "LUTDR7562,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBD4 "LUTDR7572,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBD8 "LUTDR7582,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBDC "LUTDR7592,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBE0 "LUTDR7602,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBE4 "LUTDR7612,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBE8 "LUTDR7622,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBEC "LUTDR7632,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBF0 "LUTDR7642,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBF4 "LUTDR7652,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBF8 "LUTDR7662,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBFC "LUTDR7672,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC00 "LUTDR7682,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC04 "LUTDR7692,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC08 "LUTDR7702,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC0C "LUTDR7712,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC10 "LUTDR7722,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC14 "LUTDR7732,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC18 "LUTDR7742,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC1C "LUTDR7752,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC20 "LUTDR7762,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC24 "LUTDR7772,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC28 "LUTDR7782,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC2C "LUTDR7792,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC30 "LUTDR7802,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC34 "LUTDR7812,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC38 "LUTDR7822,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC3C "LUTDR7832,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC40 "LUTDR7842,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC44 "LUTDR7852,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC48 "LUTDR7862,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC4C "LUTDR7872,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC50 "LUTDR7882,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC54 "LUTDR7892,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC58 "LUTDR7902,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC5C "LUTDR7912,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC60 "LUTDR7922,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC64 "LUTDR7932,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC68 "LUTDR7942,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC6C "LUTDR7952,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC70 "LUTDR7962,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC74 "LUTDR7972,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC78 "LUTDR7982,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC7C "LUTDR7992,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC80 "LUTDR8002,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC84 "LUTDR8012,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC88 "LUTDR8022,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC8C "LUTDR8032,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC90 "LUTDR8042,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC94 "LUTDR8052,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC98 "LUTDR8062,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC9C "LUTDR8072,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCA0 "LUTDR8082,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCA4 "LUTDR8092,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCA8 "LUTDR8102,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCAC "LUTDR8112,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCB0 "LUTDR8122,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCB4 "LUTDR8132,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCB8 "LUTDR8142,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCBC "LUTDR8152,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCC0 "LUTDR8162,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCC4 "LUTDR8172,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCC8 "LUTDR8182,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCCC "LUTDR8192,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCD0 "LUTDR8202,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCD4 "LUTDR8212,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCD8 "LUTDR8222,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCDC "LUTDR8232,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCE0 "LUTDR8242,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCE4 "LUTDR8252,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCE8 "LUTDR8262,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCEC "LUTDR8272,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCF0 "LUTDR8282,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCF4 "LUTDR8292,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCF8 "LUTDR8302,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCFC "LUTDR8312,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD00 "LUTDR8322,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD04 "LUTDR8332,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD08 "LUTDR8342,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD0C "LUTDR8352,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD10 "LUTDR8362,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD14 "LUTDR8372,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD18 "LUTDR8382,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD1C "LUTDR8392,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD20 "LUTDR8402,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD24 "LUTDR8412,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD28 "LUTDR8422,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD2C "LUTDR8432,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD30 "LUTDR8442,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD34 "LUTDR8452,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD38 "LUTDR8462,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD3C "LUTDR8472,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD40 "LUTDR8482,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD44 "LUTDR8492,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD48 "LUTDR8502,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD4C "LUTDR8512,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD50 "LUTDR8522,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD54 "LUTDR8532,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD58 "LUTDR8542,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD5C "LUTDR8552,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD60 "LUTDR8562,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD64 "LUTDR8572,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD68 "LUTDR8582,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD6C "LUTDR8592,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD70 "LUTDR8602,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD74 "LUTDR8612,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD78 "LUTDR8622,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD7C "LUTDR8632,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD80 "LUTDR8642,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD84 "LUTDR8652,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD88 "LUTDR8662,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD8C "LUTDR8672,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD90 "LUTDR8682,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD94 "LUTDR8692,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD98 "LUTDR8702,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD9C "LUTDR8712,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDA0 "LUTDR8722,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDA4 "LUTDR8732,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDA8 "LUTDR8742,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDAC "LUTDR8752,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDB0 "LUTDR8762,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDB4 "LUTDR8772,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDB8 "LUTDR8782,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDBC "LUTDR8792,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDC0 "LUTDR8802,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDC4 "LUTDR8812,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDC8 "LUTDR8822,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDCC "LUTDR8832,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDD0 "LUTDR8842,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDD4 "LUTDR8852,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDD8 "LUTDR8862,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDDC "LUTDR8872,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDE0 "LUTDR8882,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDE4 "LUTDR8892,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDE8 "LUTDR8902,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDEC "LUTDR8912,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDF0 "LUTDR8922,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDF4 "LUTDR8932,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDF8 "LUTDR8942,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDFC "LUTDR8952,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE00 "LUTDR8962,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE04 "LUTDR8972,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE08 "LUTDR8982,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE0C "LUTDR8992,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE10 "LUTDR9002,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE14 "LUTDR9012,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE18 "LUTDR9022,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE1C "LUTDR9032,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE20 "LUTDR9042,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE24 "LUTDR9052,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE28 "LUTDR9062,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE2C "LUTDR9072,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE30 "LUTDR9082,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE34 "LUTDR9092,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE38 "LUTDR9102,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE3C "LUTDR9112,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE40 "LUTDR9122,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE44 "LUTDR9132,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE48 "LUTDR9142,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE4C "LUTDR9152,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE50 "LUTDR9162,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE54 "LUTDR9172,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE58 "LUTDR9182,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE5C "LUTDR9192,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE60 "LUTDR9202,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE64 "LUTDR9212,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE68 "LUTDR9222,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE6C "LUTDR9232,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE70 "LUTDR9242,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE74 "LUTDR9252,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE78 "LUTDR9262,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE7C "LUTDR9272,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE80 "LUTDR9282,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE84 "LUTDR9292,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE88 "LUTDR9302,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE8C "LUTDR9312,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE90 "LUTDR9322,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE94 "LUTDR9332,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE98 "LUTDR9342,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE9C "LUTDR9352,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEA0 "LUTDR9362,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEA4 "LUTDR9372,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEA8 "LUTDR9382,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEAC "LUTDR9392,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEB0 "LUTDR9402,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEB4 "LUTDR9412,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEB8 "LUTDR9422,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEBC "LUTDR9432,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEC0 "LUTDR9442,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEC4 "LUTDR9452,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEC8 "LUTDR9462,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xECC "LUTDR9472,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xECC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xECC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xED0 "LUTDR9482,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xED0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xED0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xED4 "LUTDR9492,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xED4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xED4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xED8 "LUTDR9502,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xED8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xED8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEDC "LUTDR9512,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEE0 "LUTDR9522,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEE4 "LUTDR9532,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEE8 "LUTDR9542,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEEC "LUTDR9552,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEF0 "LUTDR9562,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEF4 "LUTDR9572,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEF8 "LUTDR9582,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEFC "LUTDR9592,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF00 "LUTDR9602,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF04 "LUTDR9612,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF08 "LUTDR9622,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF0C "LUTDR9632,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF10 "LUTDR9642,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF14 "LUTDR9652,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF18 "LUTDR9662,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF1C "LUTDR9672,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF20 "LUTDR9682,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF24 "LUTDR9692,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF28 "LUTDR9702,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF2C "LUTDR9712,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF30 "LUTDR9722,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF34 "LUTDR9732,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF38 "LUTDR9742,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF3C "LUTDR9752,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF40 "LUTDR9762,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF44 "LUTDR9772,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF48 "LUTDR9782,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF4C "LUTDR9792,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF50 "LUTDR9802,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF54 "LUTDR9812,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF58 "LUTDR9822,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF5C "LUTDR9832,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF60 "LUTDR9842,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF64 "LUTDR9852,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF68 "LUTDR9862,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF6C "LUTDR9872,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF70 "LUTDR9882,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF74 "LUTDR9892,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF78 "LUTDR9902,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF7C "LUTDR9912,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF80 "LUTDR9922,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF84 "LUTDR9932,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF88 "LUTDR9942,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF8C "LUTDR9952,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF90 "LUTDR9962,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF94 "LUTDR9972,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF98 "LUTDR9982,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF9C "LUTDR9992,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFA0 "LUTDR10002,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFA4 "LUTDR10012,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFA8 "LUTDR10022,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFAC "LUTDR10032,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFB0 "LUTDR10042,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFB4 "LUTDR10052,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFB8 "LUTDR10062,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFBC "LUTDR10072,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFC0 "LUTDR10082,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFC4 "LUTDR10092,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFC8 "LUTDR10102,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFCC "LUTDR10112,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFD0 "LUTDR10122,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFD4 "LUTDR10132,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFD8 "LUTDR10142,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFDC "LUTDR10152,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFE0 "LUTDR10162,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFE4 "LUTDR10172,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFE8 "LUTDR10182,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFEC "LUTDR10192,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFF0 "LUTDR10202,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFF4 "LUTDR10212,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFF8 "LUTDR10222,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFFC "LUTDR10232,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
tree.end
tree "IMR_LX_3"
base ad:0xFE890000
group.long 0x8++0x3
line.long 0x0 "CR3,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "SWRST,Software Reset" "0: Cancels a software reset for this module,1: Applies a software reset to this module"
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hexmask.long.word 0x0 1.--14. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "RS,Rendering Start" "0: Does not start rendering,1: Starts rendering"
rgroup.long 0xC++0x3
line.long 0x0 "SR3,"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "WERR,Indicates that this module has received the WUP signal from another module while it is not executing a display list. This bit is cleared to 0 by writing 1 to the WERRCLR bit in SRCR." "0: This module has not received the WUP signal..,1: This module has received the WUP signal while it.."
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bitfld.long 0x0 10. "WOVF,Indicates that the number of WUP signals this module has received but not processed has exceeded the maximum number allowed. The maximum number in this product is 1. This bit is cleared to 0 by writing 1 to the WOVFCLR bit in SRCR." "0: The number of WUP signals that have not been..,1: The number of WUP signals that have not been.."
hexmask.long.byte 0x0 6.--9. 1. "Reserved_6,Reserved"
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bitfld.long 0x0 5. "REN,Rendering-in-Progress Flag" "0: Rendering is not in progress,1: Rendering is in progress"
bitfld.long 0x0 3.--4. "Reserved_3,Reserved" "0,1,2,3"
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bitfld.long 0x0 2. "INT,INT Instruction Decode" "0: The INT instruction in the DL has not been decoded,1: The INT instruction in the DL has been decoded"
bitfld.long 0x0 1. "IER,Illegal Instruction Decode" "0: No illegal instruction has been decoded in the DL,1: An illegal instruction has been decoded in the DL"
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bitfld.long 0x0 0. "TRA,Trap" "0: Rendering has not been started or is in progress,1: The TRAP instruction has been decoded and.."
group.long 0x10++0xB
line.long 0x0 "SRCR3,Writing 1 to a bit in SRCR clears the corresponding status bit in the status register (SR)."
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 11. "WERRCLR,Writing 1 to this bit clears the WERR bit in SR." "0,1"
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bitfld.long 0x0 10. "WOVFCLR,Writing 1 to this bit clears the WOVF bit in SR." "0,1"
hexmask.long.byte 0x0 3.--9. 1. "Reserved_3,Reserved"
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bitfld.long 0x0 2. "INTCLR,Writing 1 to this bit clears the INT bit in SR." "0,1"
bitfld.long 0x0 1. "IERCLR,Writing 1 to this bit clears the IER bit in SR." "0,1"
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bitfld.long 0x0 0. "TRACLR,Writing 1 to this bit clears the TRA bit in SR." "0,1"
line.long 0x4 "ICR3,The effective bits in the ICR are used to enable setting of the corresponding bit in the status register (SR) in response to the corresponding interrupt sources. To allow the generation of an interrupt. this register should be set to enable setting.."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x4 11. "WERRENB,0: Disables the generation of an interrupt when this module receives the WUP signal from another module while it is not executing a display list." "0: Disables the generation of an interrupt when..,1: Enables the generation of an interrupt when this.."
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bitfld.long 0x4 10. "WOVFENB,0: Disables the generation of an interrupt when the number of WUP signals this module has received but not processed exceeds the maximum number allowed." "0: Disables the generation of an interrupt when the..,1: Enables the generation of an interrupt when the.."
hexmask.long.byte 0x4 5.--9. 1. "Reserved_5,Reserved"
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rbitfld.long 0x4 3.--4. "Reserved_3,Reserved" "0,1,2,3"
bitfld.long 0x4 2. "INTENB,0: Disables the generation of INT interrupts." "0: Disables the generation of INT interrupts,1: Enables the generation of an interrupt when an.."
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bitfld.long 0x4 1. "IERENB,0: Disables the generation of IER interrupts generation." "0: Disables the generation of IER interrupts..,1: Enables the generation of an interrupt when an.."
bitfld.long 0x4 0. "TRAENB,0: Disables the generation of TRAP interrupts." "0: Disables the generation of TRAP interrupts,1: Enables the generation of an interrupt when a.."
line.long 0x8 "IMR3,The effective bits in the IMR are used for masking or non-masking of the output of the corresponding interrupt to the interrupt controller when the corresponding interrupt source bits are set in the SR. To allow interrupt generation. this register.."
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x8 11. "WERRM,0: The generation of interrupts when this module receives the WUP signal from another module while it is not executing a display list is not masked." "0: The generation of interrupts when this module..,1: The generation of interrupts when this module.."
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bitfld.long 0x8 10. "WOVFM,0: The generation of interrupts when the number of WUP signals this module has received but not processed exceeds the maximum number allowed is not masked." "0: The generation of interrupts when the number of..,1: The generation of interrupts when the number of.."
hexmask.long.byte 0x8 5.--9. 1. "Reserved_5,Reserved"
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rbitfld.long 0x8 3.--4. "Reserved_3,Reserved" "0,1,2,3"
bitfld.long 0x8 2. "INM,0: The generation of INT interrupts is not masked." "0: The generation of INT interrupts is not masked,1: The generation of INT interrupts is masked"
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bitfld.long 0x8 1. "IEM,0: The generation of IER interrupts is not masked." "0: The generation of IER interrupts is not masked,1: The generation of IER interrupts is masked"
bitfld.long 0x8 0. "TRAM,0: The generation of TRAP interrupts is not masked." "0: The generation of TRAP interrupts is not masked,1: The generation of TRAP interrupts is masked"
rgroup.long 0x1C++0x7
line.long 0x0 "DLSP3,"
hexmask.long 0x0 0.--31. 1. "DLSP,DL Stack Pointer"
line.long 0x4 "DLPR3,"
hexmask.long 0x4 0.--31. 1. "DLP,DL Pointer"
group.long 0x28++0x3
line.long 0x0 "EDLR3,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 0.--15. 1. "EDL,Executed DL Status"
group.long 0x30++0x13
line.long 0x0 "DLSAR3,"
hexmask.long 0x0 0.--31. 1. "DLSA,DL Start Address"
line.long 0x4 "DSAR3,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long 0x4 6.--31. 1. "DSA,Destination Start Address"
hexmask.long.byte 0x4 0.--5. 1. "Reserved_0,Reserved"
line.long 0x8 "SSAR3,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x8 8.--31. 1. "SSAR,SRC Start Address"
bitfld.long 0x8 6.--7. "Reserved_6,Reserved" "0,1,2,3"
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hexmask.long.byte 0x8 0.--5. 1. "Reserved_0,Reserved"
line.long 0xC "DSTR3,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.word 0xC 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0xC 0.--16. 1. "DST,Specifies the memory width of the DST area in bytes within a range from 64 to 65 536 bytes in 64-byte alignment. In tile addressing mode  quadruple the value of the setting is used as the memory width. To modify the value during execution  execute.."
line.long 0x10 "SSTR3,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.word 0x10 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x10 0.--16. 1. "SSTR,Specifies the memory width of the SRC area in bytes within a range from 256 to 65 536 bytes in 256-byte alignment in the linear addressing mode when reading texture data from the external memory. In tile addressing mode  quadruple the value of the.."
group.long 0x50++0x3
line.long 0x0 "DSOR3,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long 0x0 5.--31. 1. "DSOFSTA,In Y/UV separate output mode  set an offset value for the UV output destination address that corresponds to the output destination address of Y. The offset must be a signed 32-bit value. Specify the value in 64-byte alignment."
hexmask.long.byte 0x0 0.--4. 1. "Reserved_0,Reserved"
rgroup.long 0x54++0x3
line.long 0x0 "CMRCR3,CMRCR indicates the output mode. bit precision. and correction mode for the drawing results. To set each bit in this register to 1. write 1 to the corresponding bit in CMRCSR. To clear each bit to 0. write 1 to the corresponding bit in CMRCCR."
bitfld.long 0x0 31. "EFPE,Enables or disables the extended filtering pipeline." "0: Disabled,1: Enabled"
bitfld.long 0x0 30. "CP32E,Copy 32-bit mode" "0: Disables copying 32-bit data,1: Enables copying 32-bit data"
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bitfld.long 0x0 28.--29. "SUV1416,Specifies the pixel format of the hue of the source data as 14 or 16 bpp or makes neither specification." "0: Does not specify the format as 14 or 16 bpp,?,?,?"
bitfld.long 0x0 26.--27. "DUV1416,Specifies the pixel format of the hue of the destination data as 14 or 16 bpp or makes neither specification." "0: Does not specify the format as 14 or 16 bpp,?,?,?"
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bitfld.long 0x0 24.--25. "SY1416,Specifies the pixel format of the luminance of the source data as 14 or 16 bpp or makes neither specification." "0: Does not specify the format as 14 or 16 bpp,?,?,?"
bitfld.long 0x0 22.--23. "DY1416,Specifies the pixel format of the luminance of the destination data as 14 or 16 bpp or makes neither specification." "0: Does not specify the format as 14 or 16 bpp,?,?,?"
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bitfld.long 0x0 20.--21. "Reserved_20,Reserved" "0,1,2,3"
bitfld.long 0x0 19. "CLSM,Hue Correction Scale Parameter Register Specification Mode" "0: Uses the hue correction scale parameters..,1: Uses the hue correction scale parameters.."
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bitfld.long 0x0 18. "CLOM,Hue Correction Offset Parameter Register Specification Mode" "0: Uses the hue correction offset parameters..,1: Uses the hue correction offset parameters.."
bitfld.long 0x0 17. "LUSM,Luminance Correction Scale Parameter Register Specification Mode" "0: Uses the luminance correction scale parameters..,1: Uses the luminance correction scale parameter.."
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bitfld.long 0x0 16. "LUOM,Luminance Correction Offset Parameter Register Specification Mode" "0: Uses the luminance correction offset parameters..,1: Uses the luminance correction offset parameter.."
bitfld.long 0x0 15. "CP16E,Copy 16-bit mode" "0: Disables copying 16-bit data,1: Enables copying 16-bit data"
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bitfld.long 0x0 14. "YCM,YC Mode" "0: Processes Y,1: Processes UV"
bitfld.long 0x0 13. "UVS,Specifies whether the input UV plane is in YUV420 format." "0: The input UV plane is not in YUV420 format,1: The input UV plane is in YUV420 format"
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bitfld.long 0x0 12. "SY12,Specifies the precision of luminance processing of source data." "0: 8-bpp precision or 10-bpp precision,1: 12-bpp precision"
bitfld.long 0x0 11. "SY10,Specifies the precision of luminance processing of source data." "0: 8-bpp precision or 12-bpp precision,1: 10-bpp precision"
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bitfld.long 0x0 10. "YOM,Output only Y data and discard U/V data." "0,1"
bitfld.long 0x0 9. "Y12,Set this bit when Y data is output in 12-bpp precision." "0: Outputs Y data in 8- or 10-bpp precision,1: Outputs Y data in 12-bpp precision"
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bitfld.long 0x0 8. "Y10,Set this bit when Y data is output in 10-bpp precision." "0: Outputs Y data in 8- or 12-bpp precision,1: Outputs Y data in 10-bpp precision"
bitfld.long 0x0 7. "YISM,Selects the output format for YUV data." "0: Produces the interleave output of YUV data,1: Produces the separate output of Y/UV data"
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bitfld.long 0x0 5.--6. "SUV,Specifies the precision of color difference processing of source data." "0: 8-bpp precision,1: 10-bpp precision,?,?"
bitfld.long 0x0 3.--4. "DUV,Specifies the precision of color difference of output data." "0: Outputs UV data in 8-bpp precision,1: Outputs UV data in 10-bpp precision,?,?"
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bitfld.long 0x0 2. "CLCE,Hue Correction Enable" "0: Disables hue correction,1: Enables hue correction"
bitfld.long 0x0 1. "LUCE,Luminance Correction Enable" "0: Disables luminance correction,1: Enables luminance correction"
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bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x58++0x7
line.long 0x0 "CMRCSR3,"
bitfld.long 0x0 31. "EFPES,0: The EFPE bit in CMRCR is not set to 1." "0: The EFPE bit in CMRCR is not set to 1,1: The EFPE bit in CMRCR is set to 1"
bitfld.long 0x0 30. "CP32ES,0: The CP32E bit in CMRCR is not set to 1." "0: The CP32E bit in CMRCR is not set to 1,1: The CP32E bit in CMRCR is set to 1"
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bitfld.long 0x0 28.--29. "SUV1416S,00: Neither of the SUV1416 bits in CMRCR is set to 1." "0: Neither of the SUV1416 bits in CMRCR is set to 1,1: Sets bit 0 of the SUV1416 bits in CMRCR to 1,?,?"
bitfld.long 0x0 26.--27. "DUV1416S,00: Neither of the DUV1416 bits in CMRCR is set to 1." "0: Neither of the DUV1416 bits in CMRCR is set to 1,1: Sets bit 0 of the DUV1416 bits in CMRCR to 1,?,?"
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bitfld.long 0x0 24.--25. "SY1416S,00: Neither of the SY1416 bits in CMRCR is set to 1." "0: Neither of the SY1416 bits in CMRCR is set to 1,1: Sets bit 0 of the SY1416 bits in CMRCR to 1,?,?"
bitfld.long 0x0 22.--23. "DY1416S,00: Neither of the DY1416 bits in CMRCR is set to 1." "0: Neither of the DY1416 bits in CMRCR is set to 1,1: Sets bit 0 of the DY1416 bits in CMRCR to 1,?,?"
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rbitfld.long 0x0 20.--21. "Reserved_20,Reserved" "0,1,2,3"
bitfld.long 0x0 19. "CLSMS,0: The CLSM bit in CMRCR is not set to 1." "0: The CLSM bit in CMRCR is not set to 1,1: The CLSM bit in CMRCR is set to 1"
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bitfld.long 0x0 18. "CLOMS,0: The CLOM bit in CMRCR is not set to 1." "0: The CLOM bit in CMRCR is not set to 1,1: The CLOM bit in CMRCR is set to 1"
bitfld.long 0x0 17. "LUSMS,0: The LUSM bit in CMRCR is not set to 1." "0: The LUSM bit in CMRCR is not set to 1,1: The LUSM bit in CMRCR is set to 1"
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bitfld.long 0x0 16. "LUOMS,0: The LUOM bit in CMRCR is not set to 1." "0: The LUOM bit in CMRCR is not set to 1,1: The LUOM bit in CMRCR is set to 1"
bitfld.long 0x0 15. "CP16ES,0: The CP16E bit in CMRCR is not set to 1." "0: The CP16E bit in CMRCR is not set to 1,1: The CP16E bit in CMRCR is set to 1"
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bitfld.long 0x0 14. "YCMS,0: The YCM bit in CMRCR is not set to 1." "0: The YCM bit in CMRCR is not set to 1,1: The YCM to bit in CMRCR is set to 1"
bitfld.long 0x0 13. "UVSS,0: The UVS bit in CMRCR is not set to 1." "0: The UVS bit in CMRCR is not set to 1,1: The UVS bit in CMRCR is set to 1"
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bitfld.long 0x0 12. "SY12S,0: The SY12 bit in CMRCR is not set to 1." "0: The SY12 bit in CMRCR is not set to 1,1: The SY12 bit in CMRCR is set to 1"
bitfld.long 0x0 11. "SY10S,0: The SY10 bit in CMRCR is not set to 1." "0: The SY10 bit in CMRCR is not set to 1,1: The SY10 bit in CMRCR is set to 1"
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bitfld.long 0x0 10. "YOMS,0: The YOM bit in CMRCR is not set to 1." "0: The YOM bit in CMRCR is not set to 1,1: The YOM bit in CMRCR is set to 1"
bitfld.long 0x0 9. "Y12S,0: The Y12 bit in CMRCR is not set to 1." "0: The Y12 bit in CMRCR is not set to 1,1: The Y12 bit in CMRCR is set to 1"
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bitfld.long 0x0 8. "Y10S,0: The Y10 bit in CMRCR is not set to 1." "0: The Y10 bit in CMRCR is not set to 1,1: The Y10 bit in CMRCR is set to 1"
bitfld.long 0x0 7. "YISMS,0: The YISM bit in CMRCR is not set to 1." "0: The YISM bit in CMRCR is not set to 1,1: The YISM bit in CMRCR is set to 1"
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bitfld.long 0x0 5.--6. "SUVS,00: Neither of the SUV bits in CMRCR is set to 1." "0: Neither of the SUV bits in CMRCR is set to 1,1: Sets bit 0 of the SUV bits in CMRCR to 1,?,?"
bitfld.long 0x0 3.--4. "DUVS,00: Neither of the DUV bits in CMRCR is set to 1." "0: Neither of the DUV bits in CMRCR is set to 1,1: Sets bit 0 of the DUV bits in CMRCR to 1,?,?"
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bitfld.long 0x0 2. "CLCES,0: The CLCE bit in CMRCR is not set to 1." "0: The CLCE bit in CMRCR is not set to 1,1: The CLCE bit in CMRCR is set to 1"
bitfld.long 0x0 1. "LUCES,0: The LUCE bit in CMRCR is not set to 1." "0: The LUCE bit in CMRCR is not set to 1,1: The LUCE bit in CMRCR is set to 1"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "CMRCCR3,CMRCCR is used to clear the corresponding bits of the rendering mode register (CMRCR). To disable the modes and functions selected by the bits in CMRCR. write 1 to the corresponding bits in this register."
bitfld.long 0x4 31. "EFPEC,0: Does not clear the EFPE bit in CMRCR to 0." "0: Does not clear the EFPE bit in CMRCR to 0,1: Clears the EFPE bit in CMRCR to 0"
bitfld.long 0x4 30. "CP32EC,0: Does not clear the CP32E bit in CMRCR to 0." "0: Does not clear the CP32E bit in CMRCR to 0,1: Clears the CP32E bit in CMRCR to 0"
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bitfld.long 0x4 28.--29. "SUV1416C,00: Does not clear either of the SUV1416 bits in CMRCR to 0." "0: Does not clear either of the SUV1416 bits in..,1: Clears bit 0 of the SUV1416 bits in CMRCR to 0,?,?"
bitfld.long 0x4 26.--27. "DUV1416C,00: Does not clear either of the DUV1416 bits in CMRCR to 0." "0: Does not clear either of the DUV1416 bits in..,1: Clears bit 0 of the DUV1416 bits in CMRCR to 0,?,?"
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bitfld.long 0x4 24.--25. "SY1416C,00: Does not clear either of the SY1416 bits in CMRCR to 0." "0: Does not clear either of the SY1416 bits in..,1: Clears bit 0 of the SY1416 bits in CMRCR to 0,?,?"
bitfld.long 0x4 22.--23. "DY1416C,00: Does not clear either of the DY1416 bits in CMRCR to 0." "0: Does not clear either of the DY1416 bits in..,1: Clears bit 0 of the DY1416 bits in CMRCR to 0,?,?"
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rbitfld.long 0x4 20.--21. "Reserved_20,Reserved" "0,1,2,3"
bitfld.long 0x4 19. "CLSMC,0: Does not clear the CLSM bit in CMRCR to 0." "0: Does not clear the CLSM bit in CMRCR to 0,1: Clears the CLSM bit in CMRCR to 0"
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bitfld.long 0x4 18. "CLOMC,0: Does not clear the CLOM bit in CMRCR to 0." "0: Does not clear the CLOM bit in CMRCR to 0,1: Clears the CLOM bit in CMRCR to 0"
bitfld.long 0x4 17. "LUSMC,0: Does not clear the LUSM bit in CMRCR to 0." "0: Does not clear the LUSM bit in CMRCR to 0,1: Clears the LUSM bit in CMRCR to 0"
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bitfld.long 0x4 16. "LUOMC,0: Does not clear the LUOM bit in CMRCR to 0." "0: Does not clear the LUOM bit in CMRCR to 0,1: Clears the LUOM bit in CMRCR to 0"
bitfld.long 0x4 15. "CP16EC,0: Does not clear the CP16E bit in CMRCR to 0." "0: Does not clear the CP16E bit in CMRCR to 0,1: Clears the CP16E bit in CMRCR to 0"
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bitfld.long 0x4 14. "YCMC,0: Does not clear the YCM bit in CMRCR to 0." "0: Does not clear the YCM bit in CMRCR to 0,1: Clears the YCM bit in CMRCR to 0"
bitfld.long 0x4 13. "UVSC,0: Does not clear the UVS bit in CMRCR to 0." "0: Does not clear the UVS bit in CMRCR to 0,1: Clears the UVS bit in CMRCR to 0"
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bitfld.long 0x4 12. "SY12C,0: Does not clear the SY12 bit in CMRCR to 0." "0: Does not clear the SY12 bit in CMRCR to 0,1: Clears the SY12 bit in CMRCR to 0"
bitfld.long 0x4 11. "SY10C,0: Does not clear the SY10 bit in CMRCR to 0." "0: Does not clear the SY10 bit in CMRCR to 0,1: Clears the SY10 bit in CMRCR to 0"
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bitfld.long 0x4 10. "YOMC,0: Does not clear the YOM bit in CMRCR to 0." "0: Does not clear the YOM bit in CMRCR to 0,1: Clears the YOM bit in CMRCR to 0"
bitfld.long 0x4 9. "Y12C,0: Does not clear the Y12 bit in CMRCR to 0." "0: Does not clear the Y12 bit in CMRCR to 0,1: Clears the Y12 bit in CMRCR to 0"
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bitfld.long 0x4 8. "Y10C,0: Does not clear the Y10 bit in CMRCR to 0." "0: Does not clear the Y10 bit in CMRCR to 0,1: Clears the Y10 bit in CMRCR to 0"
bitfld.long 0x4 7. "YISMC,0: Does not clear the YISM bit in CMRCR to 0." "0: Does not clear the YISM bit in CMRCR to 0,1: Clears the YISM bit in CMRCR to 0"
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bitfld.long 0x4 5.--6. "SUVC,00: Does not clear either of the SUV bits in CMRCR to 0." "0: Does not clear either of the SUV bits in CMRCR..,1: Clears bit 0 of the SUV bits in CMRCR to 0,?,?"
bitfld.long 0x4 3.--4. "DUVC,00: Does not clear either of the DUV bit in CMRCR to 0." "0: Does not clear either of the DUV bit in CMRCR to 0,1: Clears bit 0 of the DUV bits in CMRCR to 0,?,?"
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bitfld.long 0x4 2. "CLCEC,0: Does not clear the CLCE bit in CMRCR to 0." "0: Does not clear the CLCE bit in CMRCR to 0,1: Clears the CLCE bit in CMRCR to 0"
bitfld.long 0x4 1. "LUCEC,0: Does not clear the LUCE bit in CMRCR to 0." "0: Does not clear the LUCE bit in CMRCR to 0,1: Clears the LUCE bit in CMRCR to 0"
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rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x60++0x3
line.long 0x0 "TRIMR3,TRIMR is used to select the various triangle drawing modes including coordinate generation modes and filter types. To set each bit in this register to 1. write 1 to the corresponding bit in TRIMSR. To clear each bit to 0. write 1 to the.."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
bitfld.long 0x0 24. "DIDL,Disable input information of CLCE or LUCE mode in DL." "0: Enable input information of CLCE or LUCE mode in..,1: Disable input information of CLCE or LUCE mode.."
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bitfld.long 0x0 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 20. "UVSHFVAL,Specifies one bit of logical right-shifting after filtering when the extended filtering pipeline is in use. This setting is applied to the UV plane as described in Table 56.12. Otherwise  SHFE and SHFVAL settings are used. This setting is only.." "0,1"
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bitfld.long 0x0 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 16. "SHFVAL,Specifies one bit of logical right-shifting after filtering when the extended filtering pipeline is in use. Sets the UV plane as described in Table 56.12. This setting is only possible when the EFPE bit in CMRCR and the SHFE bit in this register.." "0,1"
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bitfld.long 0x0 15. "UVSHFE,Specifies whether to truncate the fractional part or to retain the specified fractional digits following filtering by the extended filtering pipeline. This setting is applied to the UV plane as described in Table 56.12. Otherwise  SHFE and SHFVAL.." "0: The fractional part is truncated after filtering,1: Some of the digits of the fractional part after.."
bitfld.long 0x0 14. "SHFE,Specifies whether to truncate the fractional part or to retain the specified fractional digits following filtering by the extended filtering pipeline. Set the UV plane as described in Table 56.12." "0: The fractional part is truncated after filtering,1: Some of the digits of the fractional part after.."
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bitfld.long 0x0 13. "RDE,Specifies how to round the fractional part in filtering." "0: Truncation,1: Rounding up or down"
bitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
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bitfld.long 0x0 11. "TFE,Pyramidal Image Filtering Enable" "0: Disables the filtering between two adjacent..,1: Enables the filtering between two adjacent.."
hexmask.long.byte 0x0 7.--10. 1. "Reserved_7,Reserved"
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bitfld.long 0x0 6. "TCM,Triangle Clockwise Mode" "0: Specifies triangle vertexes counterclockwise,1: Specifies triangle vertexes clockwise"
bitfld.long 0x0 4.--5. "Reserved_4,Reserved" "0,1,2,3"
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bitfld.long 0x0 3. "AUTOSG,Automatic Source Coordinate Generation Mode" "0: Disables the automatic source coordinate..,1: Enables the automatic source coordinate.."
bitfld.long 0x0 2. "AUTODG,Automatic Destination Coordinate Generation Mode" "0: Disables the automatic destination coordinate..,1: Enables the automatic destination coordinate.."
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bitfld.long 0x0 1. "BFE,Bilinear Filter Enable" "0: Bilinear filtering is not used,1: Bilinear filtering is used"
bitfld.long 0x0 0. "TME,Texture Mapping Enable" "0: The single color specified by TRICR,1: Texture mapping is used"
group.long 0x64++0x17
line.long 0x0 "TRIMSR3,TRIMSR is used to set the corresponding bits of the triangle mode register (TRIMR). To enable the modes and functions selected by the bits in TRIMR. write 1 to the corresponding bits in this register."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
bitfld.long 0x0 24. "DIDLS,0: The DIDL bit is not set to 1." "0: The DIDL bit is not set to 1,1: The DIDL bit is not set to 1"
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rbitfld.long 0x0 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 20. "UVSHFVALS0,0: The UVSHFVAL bit is not set to 1." "0: The UVSHFVAL bit is not set to 1,1: The UVSHFVAL bit is set to 1"
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rbitfld.long 0x0 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 16. "SHFVALS,0: The SHFVAL bit is not set to 1." "0: The SHFVAL bit is not set to 1,1: The SHFVAL bit is set to 1"
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bitfld.long 0x0 15. "UVSHFVALS1,0: The UVSHFVAL bit is not set to 1." "0: The UVSHFVAL bit is not set to 1,1: The UVSHFVAL bit is set to 1"
bitfld.long 0x0 14. "SHFES,0: The SHFE bit is not set to 1." "0: The SHFE bit is not set to 1,1: The SHFE bit is set to 1"
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bitfld.long 0x0 13. "RDES,0: The RDE bit is not set to 1." "0: The RDE bit is not set to 1,1: The RDE bit is set to 1"
rbitfld.long 0x0 12. "Reserved_12,Reserved" "0,1"
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bitfld.long 0x0 11. "TFES,0: The TFE bit is not set to 1." "0: The TFE bit is not set to 1,1: The TFE bit is set to 1"
hexmask.long.byte 0x0 7.--10. 1. "Reserved_7,Reserved"
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bitfld.long 0x0 6. "TCMS,0: The TCM bit is not set to 1." "0: The TCM bit is not set to 1,1: The TCM bit is set to 1"
rbitfld.long 0x0 4.--5. "Reserved_4,Reserved" "0,1,2,3"
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bitfld.long 0x0 3. "AUTOSGS,0: The AUTOSG bit is not set to 1." "0: The AUTOSG bit is not set to 1,1: The AUTOSG bit is set to 1"
bitfld.long 0x0 2. "AUTODGS,0: The AUTODG bit is not set to 1." "0: The AUTODG bit is not set to 1,1: The AUTODG bit is set to 1"
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bitfld.long 0x0 1. "BFES,0: The BFE bit is not set to 1." "0: The BFE bit is not set to 1,1: The BFE bit is set to 1"
bitfld.long 0x0 0. "TMES,0: The TME bit is not set to 1." "0: The TME bit is not set to 1,1: The TME bit is set to 1"
line.long 0x4 "TRIMCR3,TRIMCR is used to clear the corresponding bits of the triangle mode register (TRIMR). To disable the modes and functions selected by the bits in TRIMR. write 1 to the corresponding bits in this register."
hexmask.long.byte 0x4 25.--31. 1. "Reserved_25,Reserved"
rbitfld.long 0x4 24. "DIDLC,Set bit DIDL in TRIMR" "0: Bit DIDL in TRIMR is not clear,1: Bit DIDL in TRIMR is clear to 0"
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rbitfld.long 0x4 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "UVSHFVALC0,0: Does not clear the UVSHFVAL bit to 0." "0: Does not clear the UVSHFVAL bit to 0,1: Clears the UVSHFVAL bit to 0"
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rbitfld.long 0x4 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 16. "SHFVALC,0: Does not clear the SHFVAL bit to 0." "0: Does not clear the SHFVAL bit to 0,1: Clears the SHFVAL bit to 0"
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bitfld.long 0x4 15. "UVSHFVALC1,0: Does not clear the UVSHFVAL bit to 0." "0: Does not clear the UVSHFVAL bit to 0,1: Clears the UVSHFVAL bit to 0"
bitfld.long 0x4 14. "SHFEC,0: Does not clear the SHFE bit to 0." "0: Does not clear the SHFE bit to 0,1: Clears the SHFE bit to 0"
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bitfld.long 0x4 13. "RDEC,0: Does not clear the RDE bit to 0." "0: Does not clear the RDE bit to 0,1: Clears the RDE bit to 0"
rbitfld.long 0x4 12. "Reserved_12,Reserved" "0,1"
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bitfld.long 0x4 11. "TFEC,0: Does not clear the TFE bit to 0." "0: Does not clear the TFE bit to 0,1: Clears the TFE bit to 0"
hexmask.long.byte 0x4 7.--10. 1. "Reserved_7,Reserved"
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bitfld.long 0x4 6. "TCMC,0: Does not clear the TCM bit to 0." "0: Does not clear the TCM bit to 0,1: Clears the TCM bit to 0"
rbitfld.long 0x4 4.--5. "Reserved_4,Reserved" "0,1,2,3"
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bitfld.long 0x4 3. "AUTOSGC,0: Does not clear the AUTOSG bit to 0." "0: Does not clear the AUTOSG bit to 0,1: Clears the AUTOSG bit to 0"
bitfld.long 0x4 2. "AUTODGC,0: Does not clear the AUTODG bit to 0." "0: Does not clear the AUTODG bit to 0,1: Clears the AUTODG bit to 0"
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bitfld.long 0x4 1. "BFEC,0: Does not clear the BFE bit to 0." "0: Does not clear the BFE bit to 0,1: Clears the BFE bit to 0"
bitfld.long 0x4 0. "TMEC,0: Does not clear the TME bit to 0." "0: Does not clear the TME bit to 0,1: Clears the TME bit to 0"
line.long 0x8 "TRICR3,TRICR is used to specify the color for single-color drawing with a TRI instruction when single-color drawing is selected with the TME bit in TRIMR."
bitfld.long 0x8 31. "YCFORM,For interleave output (for which the YISM bit in CMRCR is 0 and the YUV422E bit in CMRCR2 is 1)  changes the order of Y and U/V. Normally  Y and U/V are in a {U/V  Y} order; this bit  however  can reverse the order to {Y  U/V}." "0: For interleave output,1: For interleave output"
rbitfld.long 0x8 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x8 26.--27. "TCY3,When Y is to be output in 12 bpp  these bits specify bits 11 and 10 of color Y for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x8 24.--25. "TCY2,When Y is to be output in 10/12 bpp  these bits specify bits 9 and 8 of color Y for single-color drawing with the TRI instruction." "0,1,2,3"
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hexmask.long.byte 0x8 16.--23. 1. "TCV,When V is to be output in 8 bits  these bits specify color V for single-color drawing with the TRI instruction. When outputting V in 10 bits/12 bits  the V value in the TRICR2 register is used."
hexmask.long.byte 0x8 8.--15. 1. "TCU,When U is to be output in 8 bits  these bits specify color U for single-color drawing with the TRI instruction. When outputting U in 10 bits/12 bits  the U value in the TRICR2 register is used."
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hexmask.long.byte 0x8 0.--7. 1. "TCY,Specifies color Y for single-color drawing with the TRI instruction."
line.long 0xC "UVDPOR3,"
hexmask.long.tbyte 0xC 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0xC 8. "DDP,Specifies the destination coordinates described in the DL and the registers related to the setting of destination coordinates." "0: Specifies destination coordinates in integer,1: Specifies destination coordinates in fixed-point.."
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hexmask.long.byte 0xC 3.--7. 1. "Reserved_3,Reserved"
bitfld.long 0xC 0.--2. "UVDPO,Source Coordinate Decimal Point" "0,1,2,3,4,5,6,7"
line.long 0x10 "SUSR3,SUSR is used to specify the width (horizontal size) of the source. The width value depends on the source data format."
hexmask.long.byte 0x10 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x10 16.--26. 1. "SUW,Specify double_quotationsource width - 2double_quotation. The maximum value is 2 046."
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hexmask.long.byte 0x10 11.--15. 1. "Reserved_11,Reserved"
hexmask.long.word 0x10 0.--10. 1. "SVW,Specify double_quotationsource width - 1double_quotation. The maximum value is 2 047."
line.long 0x14 "SVSR3,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this field without executing the SYNCM instruction."
hexmask.long.tbyte 0x14 11.--31. 1. "Reserved_11,Reserved"
hexmask.long.word 0x14 0.--10. 1. "SVS,Specifies the height (vertical size) of the source."
group.long 0x80++0x23
line.long 0x0 "XMINR3,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x0 0.--12. 1. "XMIN,X Clip MIN"
line.long 0x4 "YMINR3,"
hexmask.long.tbyte 0x4 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x4 0.--12. 1. "YMIN,Y Clip MIN"
line.long 0x8 "XMAXR3,"
hexmask.long.tbyte 0x8 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x8 0.--12. 1. "XMAX,X Clip MAX"
line.long 0xC "YMAXR3,"
hexmask.long.tbyte 0xC 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0xC 0.--12. 1. "YMAX,Y Clip MAX"
line.long 0x10 "AMXSR3,"
hexmask.long.tbyte 0x10 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x10 0.--12. 1. "AMXS,Automatic Mesh X Size"
line.long 0x14 "AMYSR3,"
hexmask.long.tbyte 0x14 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x14 0.--12. 1. "AMYS,Automatic Mesh Y Size"
line.long 0x18 "AMXOR3,"
hexmask.long.tbyte 0x18 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x18 0.--12. 1. "AMXO,Automatic Mesh X Origin"
line.long 0x1C "AMYOR3,"
hexmask.long.tbyte 0x1C 13.--31. 1. "Reserved_13,Reserved"
hexmask.long.word 0x1C 0.--12. 1. "AMYO,Automatic Mesh Y Origin"
line.long 0x20 "TRICR23,TRICR2 is used to specify the color for single-color drawing with a TRI instruction when single-color drawing is selected with the TME bit in TRIMR. This register is used when UV is output in 10 bpp/12 bpp."
bitfld.long 0x20 30.--31. "TCV16,When V is to be output in 16 bpp  these bits specify bits 15 and 14 of color V for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x20 28.--29. "TCV14,When V is to be output in 14/16 bpp  these bits specify bits 13 and 12 of color V for single-color drawing with the TRI instruction." "0,1,2,3"
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bitfld.long 0x20 26.--27. "TCV12,When V is to be output in 12/14/16 bpp  these bits specify bits 11 and 10 of color V for single-color drawing with the TRI instruction." "0,1,2,3"
hexmask.long.word 0x20 16.--25. 1. "TCV10,When V is to be output in 10/12/14/16 bpp  these bits specify bits 9 to 0 of color V for single-color drawing with the TRI instruction."
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bitfld.long 0x20 14.--15. "TCU16,When U is to be output in 16 bpp  these bits specify bits 15 and 14 of color U for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x20 12.--13. "TCU14,When U is to be output in 14/16 bpp  these bits specify bits 13 and 12 of color U for single-color drawing with the TRI instruction." "0,1,2,3"
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bitfld.long 0x20 10.--11. "TCU12,When U is to be output in 12/14/16 bpp  these bits specify bits 11 and 10 of color U for single-color drawing with the TRI instruction." "0,1,2,3"
hexmask.long.word 0x20 0.--9. 1. "TCU10,When U is to be output in 10/12/14/16 bpp  these bits specify bits 9 to 0 of color U for single-color drawing with the TRI instruction."
rgroup.long 0xA4++0x3
line.long 0x0 "TRIMR23,TRIMR2 is used to select the maximum level of detail."
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 9.--11. "MAXLODU,The maximum level of detail for pyramidal images to be used in the u direction. The setting should be from 0 to 4. Other settings are prohibited. To modify the value during execution  execute the SYNCM instruction before modification. When this.." "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 3.--5. "MAXLODV,The maximum level of detail for pyramidal images to be used in the v direction. The setting should be from 0 to 4. Other settings are prohibited. To modify the value during execution  execute the SYNCM instruction before modification. When this.." "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
group.long 0xA8++0x1F
line.long 0x0 "TRIMSR23,TRIMSR2 is used to set the corresponding bits of the triangle mode register (TRIMR2). To enable the modes and functions selected by the bits in TRIMR2. write 1 to the corresponding bits in this register."
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x0 9.--11. "MAXLODUS,Sets the corresponding MAXLODU bits in the TRIMR2 register." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 3.--5. "MAXLODVS,Sets the corresponding MAXLODV bits in the TRIMR2 register." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x0 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4 "TRIMCR23,TRIMCR2 is used to clear the corresponding bits of the triangle mode register (TRIMR2). To disable the modes and functions selected by the bits in TRIMR2. write 1 to the corresponding bits in this register."
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
bitfld.long 0x4 9.--11. "MAXLODUC,Clears the corresponding MAXLODU bits in the TRIMR2 register." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x4 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 3.--5. "MAXLODVC,Clears the corresponding MAXLODV bits in the TRIMR2 register." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x4 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x8 "YLMINR3,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "YLMIN,Specifies the minimum luminance value when luminance correction is applied. If after correction the luminance value is lower than the value specified in this register  the luminance value is clamped at the value specified by these bits."
line.long 0xC "UBMINR3,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0xC 0.--15. 1. "UBMIN,Specifies the minimum U value when hue correction is applied. If after correction the U value is lower than the value specified in this register  the U value is clamped at the value specified by these bits."
line.long 0x10 "VRMINR3,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x10 0.--15. 1. "VRMIN,Specifies the minimum V value when hue correction is applied. If after correction the V value is lower than the value specified in this register  the V value is clamped at the value specified by these bits."
line.long 0x14 "YLMAXR3,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x14 0.--15. 1. "YLMAX,Specifies the maximum luminance value when luminance correction is applied. If after correction the luminance value is higher than the value specified in this register  the luminance value is clamped at the value specified by these bits."
line.long 0x18 "UBMAXR3,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x18 0.--15. 1. "UBMAX,Specifies the maximum U value when hue correction is applied. If after correction the U value is higher than the value specified in this register  the U value is clamped at the value specified by these bits."
line.long 0x1C "VRMAXR3,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x1C 0.--15. 1. "VRMAX,Specifies the maximum V value when hue correction is applied. If after correction the V value is higher than the value specified in this register  the V value is clamped at the value specified by these bits."
group.long 0xD0++0x13
line.long 0x0 "CPDPOR3,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 8.--10. "YLDPO,Specifies the number of bits after the decimal point for the value specified as the luminance correction scale value." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
bitfld.long 0x0 4.--6. "UBDPO,Specifies the number of bits after the decimal point for the value specified as the hue correction U value scale value." "0,1,2,3,4,5,6,7"
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rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.long 0x0 0.--2. "VRDPO,Specifies the number of bits after the decimal point for the value specified as the hue correction V value scale value." "0,1,2,3,4,5,6,7"
line.long 0x4 "YLCPR3,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.byte 0x4 24.--31. 1. "DYP_LSCAL,Specifies the scale parameter of second Y plane in DYP mode if the luminance correction scale parameter is specified by a register setting (LUSM = 1 in CMRCR)."
hexmask.long.byte 0x4 16.--23. 1. "DYP_LOFST,Specifies the offset parameter of second Y plane in DYP mode"
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hexmask.long.byte 0x4 8.--15. 1. "LSCAL,Specifies the scale parameter when the luminance correction scale parameter is specified by a register setting (LUSM = 1 in CMRCR). The setting is passed as unsigned fixed-point data  and the number of decimal places is specified by YLDPO in.."
hexmask.long.byte 0x4 0.--7. 1. "LOFST,Specifies the offset parameter when the luminance correction offset parameter is specified by a register setting (LUOM = 1 in CMRCR). Specify the value of these bits as signed 8-bit data."
line.long 0x8 "UBCPR3,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x8 8.--15. 1. "UBSCL,Specifies the U value scale parameter when the hue correction scale parameters are specified by register settings (CLSM = 1 in CMRCR). The setting is passed as fixed-point data  and the number of decimal places is specified by UBDPO in CPDPOR."
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hexmask.long.byte 0x8 0.--7. 1. "UBOFS,Specifies the U value offset parameter when the hue correction offset parameters are specified by register settings (CLOM = 1 in CMRCR). Specify the value of these bits as signed 8-bit data."
line.long 0xC "VRCPR3,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0xC 8.--15. 1. "VRSCL,Specifies the V value scale parameter when the hue correction scale parameters are specified by register settings (CLSM = 1 in CMRCR). The setting is passed as fixed-point data  and the number of decimal places is specified by VRDPO in CPDPOR."
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hexmask.long.byte 0xC 0.--7. 1. "VROFS,Specifies the V value offset parameter when the hue correction offset parameters are specified by register settings (CLOM = 1 in CMRCR). Specify the value of these bits as signed 8-bit data."
line.long 0x10 "TRICR33,When the NCME bit in NCMR is 1 for non-blocking cache mode. do not change this register without executing the SYNCM instruction."
bitfld.long 0x10 30.--31. "DYP_TCY16,When 2nd Y in DYP mode is to be output in 16 bpp  these bits specify bits 15 and 14 of color 2nd Y for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x10 28.--29. "DYP_TCY14,When 2nd Y in DYP mode is to be output in 14 bpp or 16 bpp  these bits specify bits 13 to 0 of color 2nd Y for single-color drawing with the TRI instruction." "0,1,2,3"
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bitfld.long 0x10 26.--27. "DYP_TCY12,When 2nd Y in DYP mode is to be output in 12bpp or 14 bpp or 16 bpp  these bits specify bits 11 to 0 of color 2nd Y for single-color drawing with the TRI instruction." "0,1,2,3"
bitfld.long 0x10 24.--25. "DYP_TCY10,When 2nd Y in DYP mode is to be output in 10bpp or 12bpp or 14 bpp or 16 bpp  these bits specify bits 9 to 0 of color 2nd Y for single-color drawing with the TRI instruction." "0,1,2,3"
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hexmask.long.byte 0x10 16.--23. 1. "DYP_TCY8,In DYP mode  these bits specify bits 7 to 0 of color 2nd Y for single-color drawing with the TRI instruction."
bitfld.long 0x10 14.--15. "TCY16,When Y is to be output in 16 bpp  these bits specify bits 15 and 14 of color Y for single-color drawing with the TRI instruction." "0,1,2,3"
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hexmask.long.word 0x10 0.--13. 1. "TCY14,When Y is to be output in 14 bpp or 16 bpp  these bits specify bits 13 to 0 of color Y for single-color drawing with the TRI instruction."
rgroup.long 0xE4++0x3
line.long 0x0 "CMRCR23,CMRCR2 indicates the output mode for the drawing results. To set each bit in this register to 1. write 1 to the corresponding bit in CMRCSR2. To clear each bit to 0. write 1 to the corresponding bit in CMRCCR2."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "DCTE,Tile Addressing Mode Enable for Destination Data" "0: Linear addressing mode,1: Tile addressing mode"
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bitfld.long 0x0 13.--14. "Reserved_13,Reserved" "0,1,2,3"
bitfld.long 0x0 12. "TCTE,Tile Addressing Mode Enable for Texture Data" "0: Linear addressing mode,1: Tile addressing mode"
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bitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 6. "UVFORM,Swap the order of adjacent single_quotationUsingle_quotation and single_quotationVsingle_quotation on the YUV422 interleaved texture data." "0: Keeps the original order,1: Swaps the order"
bitfld.long 0x0 5. "YUV422FORM,Swap the order of adjacent single_quotationYsingle_quotation and single_quotationUsingle_quotation or single_quotationVsingle_quotation on the YUV422 interleaved texture data." "0: Keeps the original order,1: Swaps the order"
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bitfld.long 0x0 4. "DYP,DYP: Double luminance plane mode" "0: Not use double luminance plane function,1: Use double luminance plane"
bitfld.long 0x0 3. "YUVSEMI,YUV Semi-planar mode" "0: The input image format is not YUV Semi-planar,1: The input image format is YUV Semi-planar"
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bitfld.long 0x0 2. "YUV422E,YUV422 Interleaved Mode Enable" "0: Processes Y only or UV only plane,1: Processes YUV422 interleaved plane"
bitfld.long 0x0 1. "UVC,UV plane format conversion" "0: Does not convert the format of UV plane,1: Converts the format of UV plane"
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bitfld.long 0x0 0. "LUTE,Lookup Table Enable" "0: Does not convert data using the LUT,1: Converts data using the LUT"
group.long 0xE8++0xB
line.long 0x0 "CMRCSR23,CMRCSR2 is used to set the corresponding bits in the rendering mode register 2 (CMRCR2). To enable the modes and functions selected by the bits in CMRCR2. write 1 to the corresponding bits in this register."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "DCTES,0: The DCTE bit in CMRCR2 is not set to 1." "0: The DCTE bit in CMRCR2 is not set to 1,1: The DCTE bit in CMRCR2 is set to 1"
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rbitfld.long 0x0 13.--14. "Reserved_13,Reserved" "0,1,2,3"
bitfld.long 0x0 12. "TCTES,0: The TCTE bit in CMRCR2 is not set to 1." "0: The TCTE bit in CMRCR2 is not set to 1,1: The TCTE bit in CMRCR2 is set to 1"
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rbitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 6. "UVFORMS,0: The UVFORM bit in CMRCR2 is not set to 1." "0: The UVFORM bit in CMRCR2 is not set to 1,1: The UVFORM bit in CMRCR2 is set to 1"
bitfld.long 0x0 5. "YUV422FORMS,0: The YUV422FORM bit in CMRCR2 is not set to 1." "0: The YUV422FORM bit in CMRCR2 is not set to 1,1: The YUV422FORM bit in CMRCR2 is set to 1"
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bitfld.long 0x0 4. "DYPS,0: The DYP bit in CMRCR2 is not set to 1" "0: The DYP bit in CMRCR2 is not set to 1,1: The DYP bit in CMRCR2 is set to 1"
bitfld.long 0x0 3. "YUVSEMIS,0: The YUVSEMI bit in CMRCR2 is not set to 1." "0: The YUVSEMI bit in CMRCR2 is not set to 1,1: The YUVSEMI bit in CMRCR2 is set to 1"
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bitfld.long 0x0 2. "YUV422ES,0: The YUV422E bit in CMRCR2 is not set to 1." "0: The YUV422E bit in CMRCR2 is not set to 1,1: The YUV422E bit in CMRCR2 is set to 1"
bitfld.long 0x0 1. "UVCS,0: The UVC bit in CMRCR2 is not set to 1." "0: The UVC bit in CMRCR2 is not set to 1,1: The UVC bit in CMRCR2 is set to 1"
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bitfld.long 0x0 0. "LUTES,0: The LUTE bit in CMRCR2 is not set to 1." "0: The LUTE bit in CMRCR2 is not set to 1,1: The LUTE bit in CMRCR2 is set to 1"
line.long 0x4 "CMRCCR23,CMRCCR2 is used to clear the corresponding bits of the rendering mode register 2 (CMRCR2). To disable the modes and functions selected by the bits in CMRCR2. write 1 to the corresponding bits in this register."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x4 15. "DCTEC,0: Does not clear the DCTE bit in CMRCR2 to 0." "0: Does not clear the DCTE bit in CMRCR2 to 0,1: Clears the DCTE bit in CMRCR2 to 0"
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rbitfld.long 0x4 13.--14. "Reserved_13,Reserved" "0,1,2,3"
bitfld.long 0x4 12. "TCTEC,0: Does not clear the TCTE bit in CMRCR2 to 0." "0: Does not clear the TCTE bit in CMRCR2 to 0,1: Clears the TCTE bit in CMRCR2 to 0"
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rbitfld.long 0x4 10.--11. "Reserved_10,Reserved" "0,1,2,3"
rbitfld.long 0x4 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.long 0x4 6. "UVFORMC,0: Does not clear the UVFORM bit in CMRCR2 to 0." "0: Does not clear the UVFORM bit in CMRCR2 to 0,1: Clears the UVFORM bit in CMRCR2 to 0"
bitfld.long 0x4 5. "YUV422FORMC,0: Does not clear the YUV422FORM bit in CMRCR2 to 0." "0: Does not clear the YUV422FORM bit in CMRCR2 to 0,1: Clears the YUV422FORM bit in CMRCR2 to 0"
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bitfld.long 0x4 4. "DYPC,0: The DYP bit in CMRCR2 is not clear to 0." "0: The DYP bit in CMRCR2 is not clear to 0,1: The DYP bit in CMRCR2 is clear to 0"
bitfld.long 0x4 3. "YUVSEMIC,0: Does not clear the YUVSEMI bit in CMRCR2 to 0." "0: Does not clear the YUVSEMI bit in CMRCR2 to 0,1: Clears the YUVSEMI bit in CMRCR2 to 0"
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bitfld.long 0x4 2. "YUV422EC,0: Does not clear the YUV422E bit in CMRCR2 to 0." "0: Does not clear the YUV422E bit in CMRCR2 to 0,1: Clears the YUV422E bit in CMRCR2 to 0"
bitfld.long 0x4 1. "UVCC,0: Does not clear the UVC bit in CMRCR2 to 0." "0: Does not clear the UVC bit in CMRCR2 to 0,1: Clears the UVC bit in CMRCR2 to 0"
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bitfld.long 0x4 0. "LUTEC,0: Does not clear the LUTE bit in CMRCR to 0." "0: Does not clear the LUTE bit in CMRCR to 0,1: Clears the LUTE bit in CMRCR to 0"
line.long 0x8 "NCMR3,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x8 8.--31. 1. "ACC_KEY,Access Key to change NCME bit of this register."
hexmask.long.byte 0x8 1.--7. 1. "Reserved_1,Reserved"
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bitfld.long 0x8 0. "NCME,Non-blocking cache mode enable bit for source data." "0,1"
group.long 0x114++0x7
line.long 0x0 "DCCR3,When changing the setting of this register by the DL. be sure to execute the SYNCM instruction"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "UVDSTSEL,Sets the register that sets the memory stride of UV plane when outputting YUV422/420 semi-planar." "0: Uses the setting value of DSTR register as..,1: Uses the setting value of UVDSTR register as.."
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hexmask.long.word 0x0 0.--14. 1. "Reserved_0,Reserved"
line.long 0x4 "SCCR3,When changing the setting of this register by the DL. be sure to execute the SYNCM instruction"
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
bitfld.long 0x4 16. "TCMENB,Select the size of the source cache when pyramidal images filtering not supported. When this bit is 1  set TRIMR.TFE  TRIMR2.MAXLODU and TRIMR2.MAXLODV to 0." "0: 32 Kbytes,1: 64 Kbytes"
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hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
group.long 0x120++0x3
line.long 0x0 "PEFCCR3,This register controls the following performance-counter-related registers: PEFCTCR. PEFCTMR. PERFCMAXPR. PEFCMINPR. PEFCDCAR. PEFCDCMR. PEFCSCAR. PEFCSCMR. However. counted value of the performance counter is not guaranteed."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CLR,Clear all the performance counter related registers." "0,1"
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bitfld.long 0x0 0. "EN,Enable all performance-counter-related registers." "0: Counting-up by the performance-counter-related..,1: Counting-up by the performance-counter-related.."
rgroup.long 0x124++0x17
line.long 0x0 "PEFCTCR3,"
hexmask.long 0x0 0.--31. 1. "PEFCTCR,Performance counter to count the number of cycles when the setting of the EN bit of PEFCCR is 1."
line.long 0x4 "PEFCTMR3,"
hexmask.long 0x4 0.--31. 1. "PEFCTMR,Performance counter to count the total number of cycles among those counted by PEFCTCR in which the cache is missed."
line.long 0x8 "PEFCMAXPR3,"
hexmask.long 0x8 0.--31. 1. "PEFCMAXPR,Performance counter to count the maximum number of cycles necessitated by a cache miss."
line.long 0xC "PEFCMINPR3,"
hexmask.long 0xC 0.--31. 1. "PEFCMINPR,Performance counter to count the minimum number of cycles necessitated by a cache miss."
line.long 0x10 "PEFCDCAR3,"
hexmask.long 0x10 0.--31. 1. "PEFCDCA,Performance counter to count the number of times the destination cache is accessed."
line.long 0x14 "PEFCDCMR3,"
hexmask.long 0x14 0.--31. 1. "PEFCDCM,Performance counter to count the number of times the destination cache is missed."
rgroup.long 0x144++0x7
line.long 0x0 "PEFCSCAR3,"
hexmask.long 0x0 0.--31. 1. "PEFCSCA,Performance counter to count the number of times the source cache is accessed."
line.long 0x4 "PEFCSCMR3,"
hexmask.long 0x4 0.--31. 1. "PEFCSCM,Performance counter to count the number of times the source cache is missed."
group.long 0x1A0++0x33
line.long 0x0 "SSAOR3,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x0 8.--31. 1. "SSAOR,SRC Start Address Offset"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
line.long 0x4 "SSAOR13,m = 1 to 4."
hexmask.long.tbyte 0x4 8.--31. 1. "SSAORn,SRC Offset Address for Map n"
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
line.long 0x8 "SSAOR23,m = 1 to 4."
hexmask.long.tbyte 0x8 8.--31. 1. "SSAORn,SRC Offset Address for Map n"
hexmask.long.byte 0x8 0.--7. 1. "Reserved_0,Reserved"
line.long 0xC "SSAOR33,m = 1 to 4."
hexmask.long.tbyte 0xC 8.--31. 1. "SSAORn,SRC Offset Address for Map n"
hexmask.long.byte 0xC 0.--7. 1. "Reserved_0,Reserved"
line.long 0x10 "SSAOR43,m = 1 to 4."
hexmask.long.tbyte 0x10 8.--31. 1. "SSAORn,SRC Offset Address for Map n"
hexmask.long.byte 0x10 0.--7. 1. "Reserved_0,Reserved"
line.long 0x14 "UVSSAOR3,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x14 8.--31. 1. "UVSSAOR,SRC Start Address Offset for UV plane"
hexmask.long.byte 0x14 0.--7. 1. "Reserved_0,Reserved"
line.long 0x18 "UVSSAOR13,n = 1 to 4."
hexmask.long.tbyte 0x18 8.--31. 1. "UVSSAOR_n,SRC Start Address Offset for UV plane for Map n"
hexmask.long.byte 0x18 0.--7. 1. "Reserved_0,Reserved"
line.long 0x1C "UVSSAOR23,n = 1 to 4."
hexmask.long.tbyte 0x1C 8.--31. 1. "UVSSAOR_n,SRC Start Address Offset for UV plane for Map n"
hexmask.long.byte 0x1C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x20 "UVSSAOR33,n = 1 to 4."
hexmask.long.tbyte 0x20 8.--31. 1. "UVSSAOR_n,SRC Start Address Offset for UV plane for Map n"
hexmask.long.byte 0x20 0.--7. 1. "Reserved_0,Reserved"
line.long 0x24 "UVSSAOR43,n = 1 to 4."
hexmask.long.tbyte 0x24 8.--31. 1. "UVSSAOR_n,SRC Start Address Offset for UV plane for Map n"
hexmask.long.byte 0x24 0.--7. 1. "Reserved_0,Reserved"
line.long 0x28 "DSAOR3,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long 0x28 6.--31. 1. "DSAO,Destination Offset Address"
hexmask.long.byte 0x28 0.--5. 1. "Reserved_0,Reserved"
line.long 0x2C "XYOFSR3,"
hexmask.long.byte 0x2C 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.word 0x2C 16.--27. 1. "XOFS,The value  obtained by adding the offset specified in this field to the X coordinate automatically generated or specified by DL  is used for processing as X coordinate."
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hexmask.long.byte 0x2C 12.--15. 1. "Reserved_12,Reserved"
hexmask.long.word 0x2C 0.--11. 1. "YOFS,The value  obtained by adding the offset specified in this field to the Y coordinate automatically generated or specified by DL  is used for processing as Y coordinate."
line.long 0x30 "UVOFSR3,"
hexmask.long.word 0x30 16.--31. 1. "UOFS,The value  obtained by adding the offset specified in this field to the u coordinate automatically generated or specified by DL  is used for processing as v coordinate."
hexmask.long.word 0x30 0.--15. 1. "VOFS,The value  obtained by adding the offset specified in this field to the Y coordinate automatically generated or specified by DL  is used for processing as Y coordinate."
rgroup.long 0x200++0x3
line.long 0x0 "RSCR3,"
bitfld.long 0x0 31. "RSE,This bit enables the extended functionality to handle rotation and scaling down." "0: The extended functionality is disabled,1: The extended functionality is enabled"
bitfld.long 0x0 30. "RSUVFLT,Specifies the algorithm to rotate the UV plane in YUV422 format." "0: Rotated in 2x2 block unit,1: Rotated during interpolation"
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hexmask.long.byte 0x0 26.--29. 1. "Reserved_26,Reserved"
bitfld.long 0x0 24.--25. "SC8SHFVAL,Number of bit positions for logical right shifting of the value following processing for vertical and horizontal reduction to 1/8." "0,1,2,3"
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bitfld.long 0x0 22.--23. "Reserved_22,Reserved" "0,1,2,3"
bitfld.long 0x0 20.--21. "SC4SHFVAL,Number of bit positions for logical right shifting of the value following processing for vertical and horizontal reduction to 1/4." "0,1,2,3"
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bitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x0 16.--17. "SC2SHFVAL,Number of bit positions for logical right shifting of the value following processing for vertical and horizontal reduction to 1/2." "0,1,2,3"
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bitfld.long 0x0 15. "RSUV420,Specifies the YUV format of the input image. The algorithm to rotate the UV plane varies depending on the setting of this bit. The operation when the Y plane is input is not affected." "0: YUV422 format,1: YUV420 format"
bitfld.long 0x0 14. "Reserved_14,Reserved" "0,1"
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bitfld.long 0x0 13. "BP8E,This bit selects whether to average or add the values of sets of neighboring four pixels as filtering in scaling down." "0: Four times of the average of the neighboring..,1: The values of the neighboring four pixels are.."
bitfld.long 0x0 12. "RD8E,This bit specifies the rounding mode in the division when averaging of the neighboring four pixels in scaling down is selected." "0: Rounding down,1: Rounding to the nearest number"
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bitfld.long 0x0 11. "BP4E,This bit selects whether to average or add the values of sets of neighboring four pixels as filtering in scaling down." "0: Four times of the average of the neighboring..,1: The values of the neighboring four pixels are.."
bitfld.long 0x0 10. "RD4E,This bit specifies the rounding mode in the division when averaging of the neighboring four pixels in scaling down is selected." "0: Rounding down,1: Rounding to the nearest number"
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bitfld.long 0x0 9. "BP2E,This bit selects whether to average or add the values of sets of neighboring four pixels as filtering in scaling down." "0: Four times of the average of the neighboring..,1: The values of the neighboring four pixels are.."
bitfld.long 0x0 8. "RD2E,This bit specifies the rounding mode in the division when averaging of the neighboring four pixels in scaling down is selected." "0: Rounding down,1: Rounding to the nearest number"
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bitfld.long 0x0 7. "RT8E,This bit controls output of the data vertically and horizontally scaled down to 1/8 in response to execution of the OUTROT instruction." "0: The data vertically and horizontally scaled down..,1: The data vertically and horizontally scaled down.."
bitfld.long 0x0 6. "NR8E,This bit controls output of the data vertically and horizontally scaled down to 1/8 in response to execution of the OUTNOR instruction." "0: The data vertically and horizontally scaled down..,1: The data vertically and horizontally scaled down.."
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bitfld.long 0x0 5. "RT4E,This bit controls output of the data vertically and horizontally scaled down to 1/4 in response to execution of the OUTROT instruction." "0: The data vertically and horizontally scaled down..,1: The data vertically and horizontally scaled down.."
bitfld.long 0x0 4. "NR4E,This bit controls output of the data vertically and horizontally scaled down to 1/4 in response to execution of the OUTNOR instruction." "0: The data vertically and horizontally scaled down..,1: The data vertically and horizontally scaled down.."
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bitfld.long 0x0 3. "RT2E,This bit controls output of the data vertically and horizontally scaled down to 1/2 in response to execution of the OUTROT instruction." "0: The data vertically and horizontally scaled down..,1: The data vertically and horizontally scaled down.."
bitfld.long 0x0 2. "NR2E,This bit controls output of the data vertically and horizontally scaled down to 1/2 in response to execution of the OUTNOR instruction." "0: The data vertically and horizontally scaled down..,1: The data vertically and horizontally scaled down.."
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bitfld.long 0x0 1. "RT1E,This bit controls output of the non-scaled data in response to execution of the OUTROT instruction." "0: The non-scaled data are not output in response..,1: The non-scaled data are output in response to.."
bitfld.long 0x0 0. "NR1E,This bit controls output of the non-scaled data in response to execution of the OUTNOR instruction." "0: The non-scaled data are not output in response..,1: The non-scaled data are output in response to.."
group.long 0x204++0x6F
line.long 0x0 "RSCSR3,This register is used to allow or disallow setting of the corresponding bits in the rotator and scaler control register (RSCR) to 1. Before setting a bit in RSCR to 1. write 1 to the corresponding bit in this register."
bitfld.long 0x0 31. "RSES,0: The RSE bit in RSCR is not set to 1." "0: The RSE bit in RSCR is not set to 1,1: The RSE bit in RSCR is set to 1"
bitfld.long 0x0 30. "RSUVFLTS,0: The RSUVFLT bit in RSCR is not set to 1" "0: The RSUVFLT bit in RSCR is not set to 1,1: The RSUVFLT bit in RSCR is set to 1"
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hexmask.long.byte 0x0 26.--29. 1. "Reserved_26,Reserved"
bitfld.long 0x0 24.--25. "SC8SHFVALS,The bits of this field set the respective bits of the SC8SHFVAL field to 1." "0,1,2,3"
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rbitfld.long 0x0 22.--23. "Reserved_22,Reserved" "0,1,2,3"
bitfld.long 0x0 20.--21. "SC4SHFVALS,The bits of this field set the respective bits of the SC4SHFVAL field to 1." "0,1,2,3"
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rbitfld.long 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x0 16.--17. "SC2SHFVALS,The bits of this field set the respective bits of the SC2SHFVAL field to 1." "0,1,2,3"
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bitfld.long 0x0 15. "RSUV420S,0: The RSUV420 bit in RSCR is not set to 1." "0: The RSUV420 bit in RSCR is not set to 1,1: The RSUV420 bit in RSCR is set to 1"
rbitfld.long 0x0 14. "Reserved_14,Reserved" "0,1"
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bitfld.long 0x0 13. "BP8ES,0: The BP8E bit in RSCR is not set to 1." "0: The BP8E bit in RSCR is not set to 1,1: The BP8E bit in RSCR is set to 1"
bitfld.long 0x0 12. "RD8ES,0: The RD8E bit in RSCR is not set to 1." "0: The RD8E bit in RSCR is not set to 1,1: The RD8E bit in RSCR is set to 1"
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bitfld.long 0x0 11. "BP4ES,0: The BP4E bit in RSCR is not set to 1." "0: The BP4E bit in RSCR is not set to 1,1: The BP4E bit in RSCR is set to 1"
bitfld.long 0x0 10. "RD4ES,0: The RD4E bit in RSCR is not set to 1." "0: The RD4E bit in RSCR is not set to 1,1: The RD4E bit in RSCR is set to 1"
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bitfld.long 0x0 9. "BP2ES,0: The BP2E bit in RSCR is not set to 1." "0: The BP2E bit in RSCR is not set to 1,1: The BP2E bit in RSCR is set to 1"
bitfld.long 0x0 8. "RD2ES,0: The RD2E bit in RSCR is not set to 1." "0: The RD2E bit in RSCR is not set to 1,1: The RD2E bit in RSCR is set to 1"
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bitfld.long 0x0 7. "RT8ES,0: The RT8E bit in RSCR is not set to1." "0: The RT8E bit in RSCR is not set to1,1: The RT8E bit in RSCR is set to 1"
bitfld.long 0x0 6. "NR8ES,0: The NR8E bit in RSCR is not set to 1." "0: The NR8E bit in RSCR is not set to 1,1: The NR8E bit in RSCR is set to 1"
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bitfld.long 0x0 5. "RT4ES,0: The RT4E bit in RSCR is not set to 1." "0: The RT4E bit in RSCR is not set to 1,1: The RT4E bit in RSCR is set to 1"
bitfld.long 0x0 4. "NR4ES,0: The NR4E bit in RSCR is not set to 1." "0: The NR4E bit in RSCR is not set to 1,1: The NR4E bit in RSCR is set to 1"
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bitfld.long 0x0 3. "RT2ES,0: The RT2E bit in RSCR is not set to 1." "0: The RT2E bit in RSCR is not set to 1,1: The RT2E bit in RSCR is set to 1"
bitfld.long 0x0 2. "NR2ES,0: The NR2E bit in RSCR is not set to 1." "0: The NR2E bit in RSCR is not set to 1,1: The NR2E bit in RSCR is set to 1"
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bitfld.long 0x0 1. "RT1ES,0: The RT1E bit in RSCR is not set to 1." "0: The RT1E bit in RSCR is not set to 1,1: The RT1E bit in RSCR is set to 1"
bitfld.long 0x0 0. "NR1ES,0: The NR1E bit in RSCR is not set to 1." "0: The NR1E bit in RSCR is not set to 1,1: The NR1E bit in RSCR is set to 1"
line.long 0x4 "RSCCR3,This register is used to allow or disallow clearing of the corresponding bits in the rotator and scaler control register (RSCR). Before clearing a bit in RSCR. write 1 to the corresponding bit in this register."
bitfld.long 0x4 31. "RSEC,0: Does not clear the RSE bit in RSCR to 0." "0: Does not clear the RSE bit in RSCR to 0,1: Clears the RSE bit in RSCR to 0"
bitfld.long 0x4 30. "RSUVFLTC,0: Does not clear the RSUVFLT bit in RSCR to 0." "0: Does not clear the RSUVFLT bit in RSCR to 0,1: Clears the RSUVFLT bit in RSCR to 0"
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hexmask.long.byte 0x4 26.--29. 1. "Reserved_26,Reserved"
bitfld.long 0x4 24.--25. "SC8SHFVALC,The bits of this field clear the respective bits of the SC8SHFVAL field to 0." "0,1,2,3"
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rbitfld.long 0x4 22.--23. "Reserved_22,Reserved" "0,1,2,3"
bitfld.long 0x4 20.--21. "SC4SHFVALC,The bits of this field clear the respective bits of the SC4SHFVAL field to 0." "0,1,2,3"
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rbitfld.long 0x4 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x4 16.--17. "SC2SHFVALC,The bits of this field clear the respective bits of the SC2SHFVAL field to 0." "0,1,2,3"
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bitfld.long 0x4 15. "RSUV420C,0: Does not clear the RSUV420 bit in RSCR to 0." "0: Does not clear the RSUV420 bit in RSCR to 0,1: Clears the RSUV420 bit in RSCR to 0"
rbitfld.long 0x4 14. "Reserved_14,Reserved" "0,1"
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bitfld.long 0x4 13. "BP8EC,0: Does not clear the BP8E bit in RSCR to 0." "0: Does not clear the BP8E bit in RSCR to 0,1: Clears the BP8E bit in RSCR to 0"
bitfld.long 0x4 12. "RD8EC,0: Does not clear the RD8E bit in RSCR to 0." "0: Does not clear the RD8E bit in RSCR to 0,1: Clears the RD8E bit in RSCR to 0"
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bitfld.long 0x4 11. "BP4EC,0: Does not clear the BP4E bit in RSCR to 0." "0: Does not clear the BP4E bit in RSCR to 0,1: Clears the BP4E bit in RSCR to 0"
bitfld.long 0x4 10. "RD4EC,0: Does not clear the RD4E bit in RSCR to 0." "0: Does not clear the RD4E bit in RSCR to 0,1: Clears the RD4E bit in RSCR to 0"
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bitfld.long 0x4 9. "BP2EC,0: Does not clear the BP2E bit in RSCR to 0." "0: Does not clear the BP2E bit in RSCR to 0,1: Clears the BP2E bit in RSCR to 0"
bitfld.long 0x4 8. "RD2EC,0: Does not clear the RD2E bit in RSCR to 0." "0: Does not clear the RD2E bit in RSCR to 0,1: Clears the RD2E bit in RSCR to 0"
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bitfld.long 0x4 7. "RT8EC,0: Does not clear the RT8E bit in RSCR to 0." "0: Does not clear the RT8E bit in RSCR to 0,1: Clears the RT8E bit in RSCR to 0"
bitfld.long 0x4 6. "NR8EC,0: Does not clear the NR8E bit in RSCR to 0." "0: Does not clear the NR8E bit in RSCR to 0,1: Clears the NR8E bit in RSCR to 0"
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bitfld.long 0x4 5. "RT4EC,0: Does not clear the RT4E bit in RSCR to 0" "0: Does not clear the RT4E bit in RSCR to 0,1: Clears the RT4E bit in RSCR to 0"
bitfld.long 0x4 4. "NR4EC,0: Does not clear the NR4E bit in RSCR to 0." "0: Does not clear the NR4E bit in RSCR to 0,1: Clears the NR4E bit in RSCR to 0"
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bitfld.long 0x4 3. "RT2EC,0: Does not clear the RT2E bit in RSCR to 0." "0: Does not clear the RT2E bit in RSCR to 0,1: Clears the RT2E bit in RSCR to 0"
bitfld.long 0x4 2. "NR2EC,0: Does not clear the NR2E bit in RSCR to 0." "0: Does not clear the NR2E bit in RSCR to 0,1: Clears the NR2E bit in RSCR to 0"
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bitfld.long 0x4 1. "RT1EC,0: Does not clear the RT1E bit in RSCR to 0." "0: Does not clear the RT1E bit in RSCR to 0,1: Clears the RT1E bit in RSCR to 0"
bitfld.long 0x4 0. "NR1EC,0: Does not clear the NR1E bit in RSCT to 0." "0: Does not clear the NR1E bit in RSCT to 0,1: Clears the NR1E bit in RSCR to 0"
line.long 0x8 "RSOFR3,This register is used to specify the pixel format in the three scalers within the extended function block. Set this register in accord with the combinations shown in Table 56.25 or Table 56.26. Use the CMRCR register to specify the pixel format.."
hexmask.long.byte 0x8 27.--31. 1. "Reserved_27,Reserved"
bitfld.long 0x8 24.--26. "OFM8R,These bits specify the format of the image rotated and vertically and horizontally scaled down to 1/8." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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rbitfld.long 0x8 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x8 20.--22. "OFM4R,These bits specify the format of the image rotated and vertically and horizontally scaled down to 1/4." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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rbitfld.long 0x8 19. "Reserved_19,Reserved" "0,1"
bitfld.long 0x8 16.--18. "OFM2R,These bits specify the format of the image rotated and vertically and horizontally scaled down to 1/2." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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hexmask.long.byte 0x8 11.--15. 1. "Reserved_11,Reserved"
bitfld.long 0x8 8.--10. "OFM8N,These bits specify the format of the non-rotated image vertically and horizontally scaled down to 1/8." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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rbitfld.long 0x8 7. "Reserved_7,Reserved" "0,1"
bitfld.long 0x8 4.--6. "OFM4N,These bits specify the format of the non-rotated image vertically and horizontally scaled down to 1/4." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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rbitfld.long 0x8 3. "Reserved_3,Reserved" "0,1"
bitfld.long 0x8 0.--2. "OFM2N,These bits specify the format of the non-rotated image vertically and horizontally scaled down to 1/2." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
line.long 0xC "DSANRR03,"
hexmask.long 0xC 0.--31. 1. "DSANR0,These bits specify the base address in bytes of the destination for the output of non-rotated images with unchanged size."
line.long 0x10 "DSTNRR03,"
hexmask.long.word 0x10 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x10 0.--16. 1. "DSTNR0,These bits specify the stride in bytes at the destination for the output of non-rotated images with unchanged size."
line.long 0x14 "DSARR03,"
hexmask.long 0x14 0.--31. 1. "DSAR0,These bits specify the base address in bytes of the destination for the output of rotated images with unchanged size."
line.long 0x18 "DSTRR03,"
hexmask.long.word 0x18 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x18 0.--16. 1. "DSTR0,These bits specify the stride in bytes at the destination for the output of rotated images with unchanged size."
line.long 0x1C "DSANRR13,"
hexmask.long 0x1C 0.--31. 1. "DSANR1,These bits specify the base address in bytes of the destination for non-rotated images horizontally and vertically scaled down to 1/2."
line.long 0x20 "DSTNRR13,"
hexmask.long.word 0x20 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x20 0.--16. 1. "DSTNR1,These bits specify the stride in bytes at the destination for the output of non-rotated images horizontally and vertically scaled down to 1/2."
line.long 0x24 "DSARR13,"
hexmask.long 0x24 0.--31. 1. "DSAR1,These bits specify the base address in bytes of the destination for the output of rotated images vertically and horizontally scaled down to 1/2."
line.long 0x28 "DSTRR13,"
hexmask.long.word 0x28 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x28 0.--16. 1. "DSTR1,These bits specify the stride in bytes at the destination for the output of rotated images horizontally and vertically scaled down to 1/2."
line.long 0x2C "DSANRR23,"
hexmask.long 0x2C 0.--31. 1. "DSANR2,These bits specify the base address in bytes of the destination for non-rotated images horizontally and vertically scaled down to 1/4."
line.long 0x30 "DSTNRR23,"
hexmask.long.word 0x30 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x30 0.--16. 1. "DSTNR2,These bits specify the stride in bytes at the destination for the output of non-rotated images horizontally and vertically scaled down to 1/4."
line.long 0x34 "DSARR23,"
hexmask.long 0x34 0.--31. 1. "DSAR2,These bits specify the base address in bytes of the destination for the output of rotated images vertically and horizontally scaled down to 1/4."
line.long 0x38 "DSTRR23,"
hexmask.long.word 0x38 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x38 0.--16. 1. "DSTR2,These bits specify the stride in bytes at the destination for the output of rotated images horizontally and vertically scaled down to 1/4."
line.long 0x3C "DSANRR33,"
hexmask.long 0x3C 0.--31. 1. "DSANR3,These bits specify the base address in bytes of the destination for non-rotated images horizontally and vertically scaled down to 1/8."
line.long 0x40 "DSTNRR33,"
hexmask.long.word 0x40 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x40 0.--16. 1. "DSTNR3,These bits specify the stride in bytes at the destination for the output of non-rotated images horizontally and vertically scaled down to 1/8."
line.long 0x44 "DSARR33,"
hexmask.long 0x44 0.--31. 1. "DSAR3,These bits specify the base address in bytes of the destination for the output of rotated images vertically and horizontally scaled down to 1/8."
line.long 0x48 "DSTRR33,"
hexmask.long.word 0x48 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x48 0.--16. 1. "DSTR3,These bits specify the stride in bytes at the destination for the output of rotated images horizontally and vertically scaled down to 1/8."
line.long 0x4C "DSONRR03,"
hexmask.long 0x4C 0.--31. 1. "DSONR0,These bits specify the offset from the base address in bytes of the destination for the output of non-rotated images with unchanged size."
line.long 0x50 "DSONRR13,"
hexmask.long 0x50 0.--31. 1. "DSONR1,These bits specify the offset from the base address in bytes of the destination for the output of non-rotated images vertically and horizontally scaled down to 1/2."
line.long 0x54 "DSONRR23,"
hexmask.long 0x54 0.--31. 1. "DSONR2,These bits specify the offset from the base address in bytes of the destination for the output of non-rotated images vertically and horizontally scaled down to 1/4."
line.long 0x58 "DSONRR33,"
hexmask.long 0x58 0.--31. 1. "DSONR3,These bits specify the offset from the base address in bytes of the destination for the output of non-rotated images vertically and horizontally scaled down to 1/8."
line.long 0x5C "DSORR03,"
hexmask.long 0x5C 0.--31. 1. "DSOR0,These bits specify the offset from the base address in bytes of the destination for the output of rotated images with unchanged size."
line.long 0x60 "DSORR13,"
hexmask.long 0x60 0.--31. 1. "DSOR1,These bits specify the offset from the base address in bytes of the destination for the output of rotated images vertically and horizontally scaled down to 1/2."
line.long 0x64 "DSORR23,"
hexmask.long 0x64 0.--31. 1. "DSOR2,These bits specify the offset from the base address in bytes of the destination for the output of rotated images vertically and horizontally scaled down to 1/4."
line.long 0x68 "DSORR33,"
hexmask.long 0x68 0.--31. 1. "DSOR3,These bits specify the offset from the base address in bytes of the destination for the output of rotated images vertically and horizontally scaled down to 1/8."
line.long 0x6C "GFCR3,"
hexmask.long.byte 0x6C 28.--31. 1. "Reserved_28,Reserved"
hexmask.long.byte 0x6C 24.--27. 1. "SC8GSFHVAL,When calculating the Gaussian filter  this bit sets the number of digits of right-shifting after multiplying by the coefficient."
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hexmask.long.byte 0x6C 20.--23. 1. "SC4GSFHVAL,When calculating the Gaussian filter  this bit sets the number of digits of right-shifting after multiplying by the coefficient."
hexmask.long.byte 0x6C 16.--19. 1. "SC2GSFHVAL,When calculating the Gaussian filter  this bit sets the number of digits of right-shifting after multiplying by the coefficient."
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hexmask.long.byte 0x6C 11.--15. 1. "Reserved_11,Reserved"
bitfld.long 0x6C 10. "GRD8E,Sets the handling of the value after the decimal point in the calculation result when calculating the Gaussian filter." "0: Truncates the value after the decimal point,1: Rounds off the value after the decimal point"
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bitfld.long 0x6C 9. "GRD4E,Sets the handling of the value after the decimal point in the calculation result when calculating the Gaussian filter." "0: Truncates the value after the decimal point,1: Rounds off the value after the decimal point"
bitfld.long 0x6C 8. "GRD2E,Sets the handling of the value after the decimal point in the calculation result when calculating the Gaussian filter." "0: Truncates the value after the decimal point,1: Rounds off the value after the decimal point"
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bitfld.long 0x6C 7. "UPE,0: Does not apply padding to the top of the image" "0: Does not apply padding to the top of the image,1: Applies padding to the top of the image if the.."
bitfld.long 0x6C 6. "DPE,0: Does not apply padding to the bottom of the image" "0: Does not apply padding to the bottom of the image,1: Applies padding to the bottom of the image if.."
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bitfld.long 0x6C 5. "LPE,0: Does not apply padding to the left edge of the image" "0: Does not apply padding to the left edge of the..,1: Applies padding to the left edge of the image if.."
bitfld.long 0x6C 4. "RPE,0: Does not apply padding to the right edge of the image" "0: Does not apply padding to the right edge of the..,1: Applies padding to the right edge of the image.."
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rbitfld.long 0x6C 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x6C 0. "GFE,Gaussian Filter Enable" "0: 2and#65431,1: 3and#65431"
rgroup.long 0x274++0x3
line.long 0x0 "RSCR23,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0x0 3. "AFB8E,This bit controls whether the 2x2 averaging filter is bypassed or not." "0: Bypass not allowed,1: Bypass allowed"
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bitfld.long 0x0 2. "AFB4E,This bit controls whether the 2x2 averaging filter is bypassed or not." "0: Bypass not allowed,1: Bypass allowed"
bitfld.long 0x0 1. "AFB2E,This bit controls whether the 2x2 averaging filter is bypassed or not." "0: Bypass allowed,1: Bypass not allowed"
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bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x278++0xF
line.long 0x0 "RSCSR23,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0x0 3. "AFB8ES,0: The AFB8E bit in RSCR2 is not set to 1." "0: The AFB8E bit in RSCR2 is not set to 1,1: The AFB8E bit in RSCR2 is set to 1"
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bitfld.long 0x0 2. "AFB4ES,0: The AFB4E bit in RSCR2 is not set to 1." "0: The AFB4E bit in RSCR2 is not set to 1,1: The AFB4E bit in RSCR2 is set to 1"
bitfld.long 0x0 1. "AFB2ES,0: The AFB2E bit in RSCR2 is not set to 1." "0: The AFB2E bit in RSCR2 is not set to 1,1: The AFB2E bit in RSCR2 is set to 1"
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rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "RSCCR23,This register is used to allow or disallow clearing of the corresponding bits in the rotator and scaler control register 2 (RSCR2). Before clearing a bit in RSCR2. write 1 to the corresponding bit in this register."
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0x4 3. "AFB8EC,0: The AFB8E bit in RSCR2 is not clear to 0." "0: The AFB8E bit in RSCR2 is not clear to 0,1: The AFB8E bit in RSCR2 is clear to 0"
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bitfld.long 0x4 2. "AFB4EC,0: The AFB4E bit in RSCR2 is not clear to 0." "0: The AFB4E bit in RSCR2 is not clear to 0,1: The AFB4E bit in RSCR2 is clear to 0"
bitfld.long 0x4 1. "AFB2EC,0: The AFB2E bit in RSCR2 is not clear to 0." "0: The AFB2E bit in RSCR2 is not clear to 0,1: The AFB2E bit in RSCR2 is clear to 0"
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rbitfld.long 0x4 0. "Reserved_0,Reserved" "0,1"
line.long 0x8 "EDCCR3,"
hexmask.long.tbyte 0x8 15.--31. 1. "Reserved_15,Reserved"
bitfld.long 0x8 14. "LUTEDCIJE,LUT EDC injection enable" "0: LUT injection is disabled,1: LUT injection is enabled"
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hexmask.long.word 0x8 0.--13. 1. "Reserved_0,Reserved"
line.long 0xC "EDCSR3,"
hexmask.long.tbyte 0xC 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0xC 8. "LMERR,Line Memory SRAM Parity checker status." "0: LMERR bit is not cleared,1: LMERR bit is cleared to 0"
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bitfld.long 0xC 7. "ROTERR,Rotator Buffer SRAM Parity checker status." "0: ROTERR bit is not cleared,1: ROTERR bit is cleared to 0"
bitfld.long 0xC 6. "DCERR2,Destination Cache Data SRAM Parity checker status." "0: DCERR2 bit is not cleared,1: DCERR2 bit is cleared"
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bitfld.long 0xC 5. "MFERR,Miss FIFO SRAM EDC checker status." "0: MFERR bit is not cleared,1: MFERR bit is cleared"
bitfld.long 0xC 4. "SQERR,Store Queue SRAM EDC checker status." "0: SQERR bit is not cleared,1: SQERR bit is cleared"
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bitfld.long 0xC 3. "PXERR,PX FIFO EDC checker status" "0: PXERR bit is not cleared,1: PXERR bit is cleared"
bitfld.long 0xC 2. "DCERR,Destination cache dirty bit SRAM checker status" "0: DCERR bit is not cleared,1: DCERR bit is cleared"
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bitfld.long 0xC 1. "LUTERR,LUT SRAM Parity checker status" "0: LUTERR bit is not cleared,1: LUTERR bit is cleared"
bitfld.long 0xC 0. "SCERR,Source Cache SRAM Parity checker status" "0: SCERR bit is not cleared,1: SCERR bit is cleared"
group.long 0x2A0++0xF
line.long 0x0 "SYNCCR03,This register specifies the module corresponding to bits 0 to 3 in the SYNCC enable field of the WUP and SLP instructions. Set the number for specifying the module in this register. See Table 56.21 for the numbers for specifying the module. Do.."
hexmask.long.byte 0x0 24.--31. 1. "SYNCC3,Specifies the module corresponding to bit 3 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x0 16.--23. 1. "SYNCC2,Specifies the module corresponding to bit 2 of the SYNCC enable field of the WUP and SLP instructions."
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hexmask.long.byte 0x0 8.--15. 1. "SYNCC1,Specifies the module corresponding to bit 1 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x0 0.--7. 1. "SYNCC0,Specifies the module corresponding to bit 0 of the SYNCC enable field of the WUP and SLP instructions."
line.long 0x4 "SYNCCR13,This register specifies the module corresponding to bits 4 to 7 in the SYNCC enable field of the WUP and SLP instructions. Set the number for specifying the module in this register. See Table 56.21 for the numbers for specifying the module. Do.."
hexmask.long.byte 0x4 24.--31. 1. "SYNCC7,Specifies the module corresponding to bit 7 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x4 16.--23. 1. "SYNCC6,Specifies the module corresponding to bit 6 of the SYNCC enable field of the WUP and SLP instructions."
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hexmask.long.byte 0x4 8.--15. 1. "SYNCC5,Specifies the module corresponding to bit 5 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x4 0.--7. 1. "SYNCC4,Specifies the module corresponding to bit 4 of the SYNCC enable field of the WUP and SLP instructions."
line.long 0x8 "SYNCCR23,This register specifies the module corresponding to bits 8 to 11 in the SYNCC enable field of the WUP and SLP instructions. Set the number for specifying the module in this register. See Table 56.21 for the numbers for specifying the module. Do.."
hexmask.long.byte 0x8 24.--31. 1. "SYNCC11,Specifies the module corresponding to bit 11 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x8 16.--23. 1. "SYNCC10,Specifies the module corresponding to bit 10 of the SYNCC enable field of the WUP and SLP instructions."
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hexmask.long.byte 0x8 8.--15. 1. "SYNCC9,Specifies the module corresponding to bit 9 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0x8 0.--7. 1. "SYNCC8,Specifies the module corresponding to bit 8 of the SYNCC enable field of the WUP and SLP instructions."
line.long 0xC "SYNCCR33,This register specifies the module corresponding to bits 12 to 15 in the SYNCC enable field of the WUP and SLP instructions. Set the number for specifying the module in this register. See Table 56.21 for the numbers for specifying the module. Do.."
hexmask.long.byte 0xC 24.--31. 1. "SYNCC15,Specifies the module corresponding to bit 15 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0xC 16.--23. 1. "SYNCC14,Specifies the module corresponding to bit 14of the SYNCC enable field of the WUP and SLP instructions."
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hexmask.long.byte 0xC 8.--15. 1. "SYNCC13,Specifies the module corresponding to bit 13 of the SYNCC enable field of the WUP and SLP instructions."
hexmask.long.byte 0xC 0.--7. 1. "SYNCC12,Specifies the module corresponding to bit 12 of the SYNCC enable field of the WUP and SLP instructions."
group.long 0x2C8++0x3
line.long 0x0 "GFOFR3,This register is used to specify the pixel format in the three scalers within the extended function block. Set this register in accord with the combinations shown in Table 56.25 or Table 56.26. Use the CMRCR register to specify the pixel format.."
hexmask.long.byte 0x0 27.--31. 1. "Reserved_27,Reserved"
bitfld.long 0x0 24.--26. "GFM8R,These bits specify the format of the image rotated and vertically and horizontally scaled down to 1/8 after the Gaussian Filter." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 20.--22. "GFM4R,These bits specify the format of the image rotated and vertically and horizontally scaled down to 1/4 after the Gaussian Filter." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
bitfld.long 0x0 16.--18. "GFM2R,These bits specify the format of the image rotated and vertically and horizontally scaled down to 1/2 after the Gaussian Filter." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved"
bitfld.long 0x0 8.--10. "GFM8N,These bits specify the format of the non-rotated image vertically and horizontally scaled down to 1/8 after the Gaussian Filter." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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rbitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
bitfld.long 0x0 4.--6. "GFM4N,These bits specify the format of the non-rotated image vertically and horizontally scaled down to 1/4 after the Gaussian filter." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
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rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.long 0x0 0.--2. "GFM2N,These bits specify the format of the non-rotated image vertically and horizontally scaled down to 1/2 after the Gaussianfilter." "0: 8 bpp,1: 10 bpp,2: 12 bpp,3: 14 bpp,4: 16 bpp,?,?,?"
group.long 0xB00++0x4B
line.long 0x0 "SSAR13,m = 1 to 4."
hexmask.long.tbyte 0x0 8.--31. 1. "SSARn,SRC Start Address for Map n"
bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
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hexmask.long.byte 0x0 0.--5. 1. "Reserved_0,Reserved"
line.long 0x4 "SSTR13,m = 1 to 4."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x4 0.--16. 1. "SSTRn,Specifies the memory width of the source area for the n-th map in bytes as an integer multiple of 256 within the range from 256 to 65 536 bytes in the linear addressing mode when reading texture data from the external memory. In tile addressing.."
line.long 0x8 "SSAR23,m = 1 to 4."
hexmask.long.tbyte 0x8 8.--31. 1. "SSARn,SRC Start Address for Map n"
bitfld.long 0x8 6.--7. "Reserved_6,Reserved" "0,1,2,3"
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hexmask.long.byte 0x8 0.--5. 1. "Reserved_0,Reserved"
line.long 0xC "SSTR23,m = 1 to 4."
hexmask.long.word 0xC 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0xC 0.--16. 1. "SSTRn,Specifies the memory width of the source area for the n-th map in bytes as an integer multiple of 256 within the range from 256 to 65 536 bytes in the linear addressing mode when reading texture data from the external memory. In tile addressing.."
line.long 0x10 "SSAR33,m = 1 to 4."
hexmask.long.tbyte 0x10 8.--31. 1. "SSARn,SRC Start Address for Map n"
bitfld.long 0x10 6.--7. "Reserved_6,Reserved" "0,1,2,3"
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hexmask.long.byte 0x10 0.--5. 1. "Reserved_0,Reserved"
line.long 0x14 "SSTR33,m = 1 to 4."
hexmask.long.word 0x14 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x14 0.--16. 1. "SSTRn,Specifies the memory width of the source area for the n-th map in bytes as an integer multiple of 256 within the range from 256 to 65 536 bytes in the linear addressing mode when reading texture data from the external memory. In tile addressing.."
line.long 0x18 "SSAR43,m = 1 to 4."
hexmask.long.tbyte 0x18 8.--31. 1. "SSARn,SRC Start Address for Map n"
bitfld.long 0x18 6.--7. "Reserved_6,Reserved" "0,1,2,3"
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hexmask.long.byte 0x18 0.--5. 1. "Reserved_0,Reserved"
line.long 0x1C "SSTR43,m = 1 to 4."
hexmask.long.word 0x1C 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x1C 0.--16. 1. "SSTRn,Specifies the memory width of the source area for the n-th map in bytes as an integer multiple of 256 within the range from 256 to 65 536 bytes in the linear addressing mode when reading texture data from the external memory. In tile addressing.."
line.long 0x20 "UVSSAR3,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.tbyte 0x20 8.--31. 1. "UVSSAR,SRC Start Address for UV plane"
hexmask.long.byte 0x20 0.--7. 1. "Reserved_0,Reserved"
line.long 0x24 "UVSSTR3,This register is not initialized by the SWRST bit in the control register (CR)."
hexmask.long.word 0x24 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x24 0.--16. 1. "UVSSTR,Sets the memory width of texture data read from the external memory of UV plane in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is used as-is  while in.."
line.long 0x28 "UVSSAR13,n = 1 to 4."
hexmask.long.tbyte 0x28 8.--31. 1. "UVSSARn,SRC Start Address for UV plane for Map n"
hexmask.long.byte 0x28 0.--7. 1. "Reserved_0,Reserved"
line.long 0x2C "UVSSTR13,"
hexmask.long.word 0x2C 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x2C 0.--16. 1. "UVSSTRn,Sets the memory width of texture data read from the external memory of UV plane for the n-th Map in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is.."
line.long 0x30 "UVSSAR23,n = 1 to 4."
hexmask.long.tbyte 0x30 8.--31. 1. "UVSSARn,SRC Start Address for UV plane for Map n"
hexmask.long.byte 0x30 0.--7. 1. "Reserved_0,Reserved"
line.long 0x34 "UVSSTR23,"
hexmask.long.word 0x34 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x34 0.--16. 1. "UVSSTRn,Sets the memory width of texture data read from the external memory of UV plane for the n-th Map in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is.."
line.long 0x38 "UVSSAR33,n = 1 to 4."
hexmask.long.tbyte 0x38 8.--31. 1. "UVSSARn,SRC Start Address for UV plane for Map n"
hexmask.long.byte 0x38 0.--7. 1. "Reserved_0,Reserved"
line.long 0x3C "UVSSTR33,"
hexmask.long.word 0x3C 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x3C 0.--16. 1. "UVSSTRn,Sets the memory width of texture data read from the external memory of UV plane for the n-th Map in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is.."
line.long 0x40 "UVSSAR43,n = 1 to 4."
hexmask.long.tbyte 0x40 8.--31. 1. "UVSSARn,SRC Start Address for UV plane for Map n"
hexmask.long.byte 0x40 0.--7. 1. "Reserved_0,Reserved"
line.long 0x44 "UVSSTR43,"
hexmask.long.word 0x44 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x44 0.--16. 1. "UVSSTRn,Sets the memory width of texture data read from the external memory of UV plane for the n-th Map in Semi-planar format to a range from 256 bytes to 65 536 bytes and in 256-byte unit. In Linear Addressing mode  the value set in this register is.."
line.long 0x48 "UVDSTR3,This register is not initialized by the SWRST bit in the control register (CR)"
hexmask.long.word 0x48 17.--31. 1. "Reserved_17,Reserved"
hexmask.long.tbyte 0x48 0.--16. 1. "UVDSTR,Sets the memory width of destination data of UV plane in Semi-planar format to a range from 64 bytes to 65 536 bytes and in 64-byte unit. If the UVDSTSEL bit of DCCR register is 1  the setting of this register is used as memory stride  while if.."
group.long 0x1000++0xFFF
line.long 0x0 "LUTDR03,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4 "LUTDR13,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8 "LUTDR23,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC "LUTDR33,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x10 "LUTDR43,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x14 "LUTDR53,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x18 "LUTDR63,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1C "LUTDR73,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x20 "LUTDR83,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x24 "LUTDR93,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x28 "LUTDR103,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2C "LUTDR113,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x30 "LUTDR123,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x34 "LUTDR133,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x38 "LUTDR143,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3C "LUTDR153,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x40 "LUTDR163,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x44 "LUTDR173,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x48 "LUTDR183,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4C "LUTDR193,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x50 "LUTDR203,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x54 "LUTDR213,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x58 "LUTDR223,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5C "LUTDR233,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x60 "LUTDR243,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x64 "LUTDR253,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x68 "LUTDR263,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6C "LUTDR273,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x70 "LUTDR283,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x74 "LUTDR293,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x78 "LUTDR303,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7C "LUTDR313,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x80 "LUTDR323,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x84 "LUTDR333,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x88 "LUTDR343,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8C "LUTDR353,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x90 "LUTDR363,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x94 "LUTDR373,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x98 "LUTDR383,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9C "LUTDR393,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA0 "LUTDR403,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA4 "LUTDR413,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA8 "LUTDR423,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAC "LUTDR433,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB0 "LUTDR443,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB4 "LUTDR453,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB8 "LUTDR463,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBC "LUTDR473,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC0 "LUTDR483,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC4 "LUTDR493,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC8 "LUTDR503,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCC "LUTDR513,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD0 "LUTDR523,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD4 "LUTDR533,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD8 "LUTDR543,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDC "LUTDR553,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE0 "LUTDR563,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE4 "LUTDR573,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE8 "LUTDR583,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEC "LUTDR593,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF0 "LUTDR603,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF4 "LUTDR613,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF8 "LUTDR623,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFC "LUTDR633,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x100 "LUTDR643,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x100 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x100 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x104 "LUTDR653,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x104 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x104 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x108 "LUTDR663,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x108 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x108 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x10C "LUTDR673,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x10C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x10C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x110 "LUTDR683,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x110 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x110 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x114 "LUTDR693,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x114 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x114 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x118 "LUTDR703,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x118 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x118 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x11C "LUTDR713,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x11C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x11C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x120 "LUTDR723,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x120 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x120 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x124 "LUTDR733,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x124 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x124 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x128 "LUTDR743,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x128 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x128 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x12C "LUTDR753,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x12C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x12C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x130 "LUTDR763,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x130 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x130 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x134 "LUTDR773,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x134 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x134 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x138 "LUTDR783,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x138 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x138 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x13C "LUTDR793,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x13C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x13C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x140 "LUTDR803,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x140 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x140 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x144 "LUTDR813,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x144 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x144 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x148 "LUTDR823,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x148 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x148 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x14C "LUTDR833,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x14C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x14C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x150 "LUTDR843,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x150 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x150 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x154 "LUTDR853,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x154 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x154 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x158 "LUTDR863,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x158 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x158 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x15C "LUTDR873,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x15C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x15C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x160 "LUTDR883,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x160 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x160 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x164 "LUTDR893,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x164 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x164 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x168 "LUTDR903,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x168 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x168 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x16C "LUTDR913,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x16C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x16C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x170 "LUTDR923,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x170 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x170 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x174 "LUTDR933,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x174 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x174 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x178 "LUTDR943,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x178 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x178 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x17C "LUTDR953,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x17C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x17C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x180 "LUTDR963,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x180 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x180 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x184 "LUTDR973,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x184 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x184 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x188 "LUTDR983,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x188 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x188 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x18C "LUTDR993,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x18C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x190 "LUTDR1003,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x190 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x190 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x194 "LUTDR1013,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x194 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x194 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x198 "LUTDR1023,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x198 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x198 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x19C "LUTDR1033,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x19C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x19C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1A0 "LUTDR1043,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1A4 "LUTDR1053,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1A8 "LUTDR1063,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1AC "LUTDR1073,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1B0 "LUTDR1083,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1B4 "LUTDR1093,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1B8 "LUTDR1103,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1BC "LUTDR1113,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1C0 "LUTDR1123,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1C4 "LUTDR1133,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1C8 "LUTDR1143,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1CC "LUTDR1153,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1D0 "LUTDR1163,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1D4 "LUTDR1173,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1D8 "LUTDR1183,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1DC "LUTDR1193,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1E0 "LUTDR1203,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1E4 "LUTDR1213,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1E8 "LUTDR1223,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1EC "LUTDR1233,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1F0 "LUTDR1243,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1F4 "LUTDR1253,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1F8 "LUTDR1263,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x1FC "LUTDR1273,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x1FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x1FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x200 "LUTDR1283,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x200 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x200 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x204 "LUTDR1293,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x204 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x204 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x208 "LUTDR1303,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x208 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x208 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x20C "LUTDR1313,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x20C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x20C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x210 "LUTDR1323,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x210 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x210 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x214 "LUTDR1333,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x214 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x214 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x218 "LUTDR1343,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x218 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x218 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x21C "LUTDR1353,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x21C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x21C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x220 "LUTDR1363,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x220 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x220 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x224 "LUTDR1373,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x224 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x224 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x228 "LUTDR1383,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x228 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x228 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x22C "LUTDR1393,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x22C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x22C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x230 "LUTDR1403,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x230 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x230 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x234 "LUTDR1413,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x234 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x234 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x238 "LUTDR1423,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x238 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x238 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x23C "LUTDR1433,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x23C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x23C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x240 "LUTDR1443,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x240 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x240 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x244 "LUTDR1453,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x244 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x244 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x248 "LUTDR1463,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x248 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x248 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x24C "LUTDR1473,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x24C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x24C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x250 "LUTDR1483,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x250 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x250 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x254 "LUTDR1493,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x254 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x254 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x258 "LUTDR1503,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x258 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x258 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x25C "LUTDR1513,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x25C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x25C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x260 "LUTDR1523,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x260 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x260 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x264 "LUTDR1533,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x264 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x264 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x268 "LUTDR1543,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x268 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x268 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x26C "LUTDR1553,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x26C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x26C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x270 "LUTDR1563,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x270 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x270 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x274 "LUTDR1573,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x274 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x274 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x278 "LUTDR1583,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x278 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x278 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x27C "LUTDR1593,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x27C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x27C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x280 "LUTDR1603,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x280 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x280 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x284 "LUTDR1613,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x284 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x284 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x288 "LUTDR1623,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x288 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x288 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x28C "LUTDR1633,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x28C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x28C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x290 "LUTDR1643,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x290 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x290 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x294 "LUTDR1653,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x294 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x294 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x298 "LUTDR1663,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x298 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x298 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x29C "LUTDR1673,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x29C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x29C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2A0 "LUTDR1683,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2A4 "LUTDR1693,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2A8 "LUTDR1703,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2AC "LUTDR1713,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2B0 "LUTDR1723,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2B4 "LUTDR1733,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2B8 "LUTDR1743,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2BC "LUTDR1753,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2C0 "LUTDR1763,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2C4 "LUTDR1773,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2C8 "LUTDR1783,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2CC "LUTDR1793,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2D0 "LUTDR1803,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2D4 "LUTDR1813,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2D8 "LUTDR1823,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2DC "LUTDR1833,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2E0 "LUTDR1843,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2E4 "LUTDR1853,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2E8 "LUTDR1863,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2EC "LUTDR1873,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2F0 "LUTDR1883,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2F4 "LUTDR1893,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2F8 "LUTDR1903,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x2FC "LUTDR1913,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x2FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x2FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x300 "LUTDR1923,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x300 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x300 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x304 "LUTDR1933,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x304 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x304 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x308 "LUTDR1943,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x308 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x308 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x30C "LUTDR1953,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x30C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x30C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x310 "LUTDR1963,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x310 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x310 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x314 "LUTDR1973,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x314 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x314 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x318 "LUTDR1983,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x318 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x318 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x31C "LUTDR1993,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x31C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x31C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x320 "LUTDR2003,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x320 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x320 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x324 "LUTDR2013,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x324 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x324 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x328 "LUTDR2023,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x328 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x328 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x32C "LUTDR2033,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x32C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x32C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x330 "LUTDR2043,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x330 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x330 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x334 "LUTDR2053,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x334 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x334 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x338 "LUTDR2063,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x338 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x338 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x33C "LUTDR2073,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x33C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x33C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x340 "LUTDR2083,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x340 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x340 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x344 "LUTDR2093,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x344 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x344 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x348 "LUTDR2103,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x348 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x348 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x34C "LUTDR2113,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x34C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x34C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x350 "LUTDR2123,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x350 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x350 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x354 "LUTDR2133,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x354 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x354 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x358 "LUTDR2143,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x358 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x358 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x35C "LUTDR2153,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x35C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x35C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x360 "LUTDR2163,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x360 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x360 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x364 "LUTDR2173,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x364 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x364 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x368 "LUTDR2183,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x368 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x368 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x36C "LUTDR2193,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x36C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x36C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x370 "LUTDR2203,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x370 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x370 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x374 "LUTDR2213,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x374 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x374 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x378 "LUTDR2223,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x378 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x378 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x37C "LUTDR2233,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x37C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x37C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x380 "LUTDR2243,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x380 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x380 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x384 "LUTDR2253,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x384 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x384 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x388 "LUTDR2263,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x388 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x388 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x38C "LUTDR2273,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x38C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x38C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x390 "LUTDR2283,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x390 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x390 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x394 "LUTDR2293,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x394 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x394 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x398 "LUTDR2303,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x398 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x398 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x39C "LUTDR2313,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x39C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x39C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3A0 "LUTDR2323,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3A4 "LUTDR2333,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3A8 "LUTDR2343,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3AC "LUTDR2353,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3B0 "LUTDR2363,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3B4 "LUTDR2373,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3B8 "LUTDR2383,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3BC "LUTDR2393,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3C0 "LUTDR2403,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3C4 "LUTDR2413,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3C8 "LUTDR2423,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3CC "LUTDR2433,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3D0 "LUTDR2443,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3D4 "LUTDR2453,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3D8 "LUTDR2463,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3DC "LUTDR2473,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3E0 "LUTDR2483,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3E4 "LUTDR2493,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3E8 "LUTDR2503,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3EC "LUTDR2513,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3F0 "LUTDR2523,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3F4 "LUTDR2533,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3F8 "LUTDR2543,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x3FC "LUTDR2553,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x3FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x3FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x400 "LUTDR2563,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x400 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x400 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x404 "LUTDR2573,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x404 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x404 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x408 "LUTDR2583,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x408 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x408 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x40C "LUTDR2593,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x40C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x40C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x410 "LUTDR2603,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x410 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x410 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x414 "LUTDR2613,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x414 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x414 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x418 "LUTDR2623,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x418 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x418 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x41C "LUTDR2633,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x41C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x41C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x420 "LUTDR2643,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x420 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x420 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x424 "LUTDR2653,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x424 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x424 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x428 "LUTDR2663,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x428 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x428 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x42C "LUTDR2673,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x42C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x42C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x430 "LUTDR2683,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x430 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x430 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x434 "LUTDR2693,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x434 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x434 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x438 "LUTDR2703,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x438 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x438 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x43C "LUTDR2713,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x43C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x43C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x440 "LUTDR2723,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x440 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x440 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x444 "LUTDR2733,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x444 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x444 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x448 "LUTDR2743,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x448 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x448 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x44C "LUTDR2753,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x44C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x44C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x450 "LUTDR2763,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x450 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x450 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x454 "LUTDR2773,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x454 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x454 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x458 "LUTDR2783,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x458 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x458 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x45C "LUTDR2793,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x45C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x45C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x460 "LUTDR2803,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x460 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x460 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x464 "LUTDR2813,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x464 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x464 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x468 "LUTDR2823,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x468 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x468 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x46C "LUTDR2833,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x46C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x46C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x470 "LUTDR2843,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x470 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x470 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x474 "LUTDR2853,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x474 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x474 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x478 "LUTDR2863,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x478 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x478 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x47C "LUTDR2873,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x47C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x47C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x480 "LUTDR2883,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x480 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x480 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x484 "LUTDR2893,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x484 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x484 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x488 "LUTDR2903,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x488 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x488 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x48C "LUTDR2913,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x48C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x48C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x490 "LUTDR2923,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x490 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x490 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x494 "LUTDR2933,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x494 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x494 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x498 "LUTDR2943,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x498 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x498 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x49C "LUTDR2953,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x49C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x49C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4A0 "LUTDR2963,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4A4 "LUTDR2973,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4A8 "LUTDR2983,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4AC "LUTDR2993,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4B0 "LUTDR3003,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4B4 "LUTDR3013,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4B8 "LUTDR3023,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4BC "LUTDR3033,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4C0 "LUTDR3043,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4C4 "LUTDR3053,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4C8 "LUTDR3063,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4CC "LUTDR3073,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4D0 "LUTDR3083,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4D4 "LUTDR3093,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4D8 "LUTDR3103,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4DC "LUTDR3113,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4E0 "LUTDR3123,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4E4 "LUTDR3133,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4E8 "LUTDR3143,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4EC "LUTDR3153,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4F0 "LUTDR3163,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4F4 "LUTDR3173,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4F8 "LUTDR3183,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x4FC "LUTDR3193,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x4FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x500 "LUTDR3203,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x500 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x500 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x504 "LUTDR3213,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x504 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x504 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x508 "LUTDR3223,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x508 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x508 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x50C "LUTDR3233,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x50C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x50C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x510 "LUTDR3243,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x510 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x510 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x514 "LUTDR3253,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x514 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x514 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x518 "LUTDR3263,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x518 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x518 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x51C "LUTDR3273,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x51C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x51C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x520 "LUTDR3283,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x520 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x520 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x524 "LUTDR3293,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x524 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x524 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x528 "LUTDR3303,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x528 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x528 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x52C "LUTDR3313,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x52C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x52C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x530 "LUTDR3323,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x530 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x530 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x534 "LUTDR3333,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x534 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x534 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x538 "LUTDR3343,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x538 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x538 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x53C "LUTDR3353,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x53C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x53C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x540 "LUTDR3363,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x540 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x540 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x544 "LUTDR3373,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x544 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x544 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x548 "LUTDR3383,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x548 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x548 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x54C "LUTDR3393,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x54C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x54C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x550 "LUTDR3403,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x550 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x550 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x554 "LUTDR3413,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x554 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x554 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x558 "LUTDR3423,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x558 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x558 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x55C "LUTDR3433,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x55C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x55C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x560 "LUTDR3443,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x560 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x560 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x564 "LUTDR3453,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x564 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x564 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x568 "LUTDR3463,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x568 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x568 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x56C "LUTDR3473,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x56C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x56C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x570 "LUTDR3483,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x570 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x570 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x574 "LUTDR3493,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x574 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x574 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x578 "LUTDR3503,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x578 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x578 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x57C "LUTDR3513,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x57C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x57C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x580 "LUTDR3523,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x580 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x580 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x584 "LUTDR3533,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x584 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x584 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x588 "LUTDR3543,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x588 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x588 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x58C "LUTDR3553,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x58C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x58C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x590 "LUTDR3563,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x590 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x590 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x594 "LUTDR3573,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x594 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x594 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x598 "LUTDR3583,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x598 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x598 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x59C "LUTDR3593,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x59C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x59C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5A0 "LUTDR3603,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5A4 "LUTDR3613,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5A8 "LUTDR3623,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5AC "LUTDR3633,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5B0 "LUTDR3643,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5B4 "LUTDR3653,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5B8 "LUTDR3663,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5BC "LUTDR3673,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5C0 "LUTDR3683,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5C4 "LUTDR3693,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5C8 "LUTDR3703,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5CC "LUTDR3713,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5D0 "LUTDR3723,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5D4 "LUTDR3733,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5D8 "LUTDR3743,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5DC "LUTDR3753,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5E0 "LUTDR3763,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5E4 "LUTDR3773,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5E8 "LUTDR3783,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5EC "LUTDR3793,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5F0 "LUTDR3803,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5F4 "LUTDR3813,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5F8 "LUTDR3823,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x5FC "LUTDR3833,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x5FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x5FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x600 "LUTDR3843,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x600 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x600 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x604 "LUTDR3853,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x604 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x604 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x608 "LUTDR3863,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x608 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x608 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x60C "LUTDR3873,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x60C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x60C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x610 "LUTDR3883,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x610 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x610 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x614 "LUTDR3893,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x614 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x614 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x618 "LUTDR3903,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x618 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x618 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x61C "LUTDR3913,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x61C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x61C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x620 "LUTDR3923,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x620 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x620 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x624 "LUTDR3933,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x624 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x624 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x628 "LUTDR3943,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x628 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x628 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x62C "LUTDR3953,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x62C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x62C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x630 "LUTDR3963,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x630 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x630 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x634 "LUTDR3973,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x634 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x634 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x638 "LUTDR3983,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x638 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x638 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x63C "LUTDR3993,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x63C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x63C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x640 "LUTDR4003,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x640 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x640 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x644 "LUTDR4013,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x644 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x644 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x648 "LUTDR4023,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x648 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x648 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x64C "LUTDR4033,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x64C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x64C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x650 "LUTDR4043,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x650 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x650 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x654 "LUTDR4053,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x654 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x654 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x658 "LUTDR4063,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x658 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x658 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x65C "LUTDR4073,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x65C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x65C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x660 "LUTDR4083,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x660 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x660 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x664 "LUTDR4093,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x664 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x664 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x668 "LUTDR4103,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x668 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x668 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x66C "LUTDR4113,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x66C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x66C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x670 "LUTDR4123,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x670 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x670 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x674 "LUTDR4133,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x674 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x674 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x678 "LUTDR4143,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x678 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x678 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x67C "LUTDR4153,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x67C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x67C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x680 "LUTDR4163,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x680 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x680 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x684 "LUTDR4173,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x684 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x684 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x688 "LUTDR4183,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x688 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x688 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x68C "LUTDR4193,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x68C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x68C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x690 "LUTDR4203,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x690 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x690 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x694 "LUTDR4213,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x694 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x694 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x698 "LUTDR4223,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x698 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x698 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x69C "LUTDR4233,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x69C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x69C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6A0 "LUTDR4243,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6A4 "LUTDR4253,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6A8 "LUTDR4263,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6AC "LUTDR4273,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6B0 "LUTDR4283,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6B4 "LUTDR4293,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6B8 "LUTDR4303,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6BC "LUTDR4313,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6C0 "LUTDR4323,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6C4 "LUTDR4333,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6C8 "LUTDR4343,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6CC "LUTDR4353,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6D0 "LUTDR4363,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6D4 "LUTDR4373,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6D8 "LUTDR4383,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6DC "LUTDR4393,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6E0 "LUTDR4403,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6E4 "LUTDR4413,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6E8 "LUTDR4423,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6EC "LUTDR4433,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6F0 "LUTDR4443,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6F4 "LUTDR4453,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6F8 "LUTDR4463,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x6FC "LUTDR4473,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x6FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x6FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x700 "LUTDR4483,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x700 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x700 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x704 "LUTDR4493,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x704 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x704 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x708 "LUTDR4503,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x708 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x708 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x70C "LUTDR4513,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x70C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x70C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x710 "LUTDR4523,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x710 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x710 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x714 "LUTDR4533,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x714 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x714 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x718 "LUTDR4543,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x718 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x718 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x71C "LUTDR4553,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x71C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x71C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x720 "LUTDR4563,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x720 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x720 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x724 "LUTDR4573,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x724 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x724 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x728 "LUTDR4583,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x728 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x728 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x72C "LUTDR4593,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x72C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x72C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x730 "LUTDR4603,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x730 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x730 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x734 "LUTDR4613,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x734 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x734 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x738 "LUTDR4623,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x738 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x738 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x73C "LUTDR4633,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x73C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x73C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x740 "LUTDR4643,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x740 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x740 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x744 "LUTDR4653,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x744 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x744 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x748 "LUTDR4663,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x748 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x748 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x74C "LUTDR4673,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x74C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x74C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x750 "LUTDR4683,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x750 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x750 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x754 "LUTDR4693,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x754 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x754 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x758 "LUTDR4703,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x758 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x758 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x75C "LUTDR4713,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x75C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x75C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x760 "LUTDR4723,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x760 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x760 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x764 "LUTDR4733,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x764 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x764 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x768 "LUTDR4743,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x768 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x768 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x76C "LUTDR4753,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x76C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x76C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x770 "LUTDR4763,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x770 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x770 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x774 "LUTDR4773,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x774 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x774 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x778 "LUTDR4783,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x778 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x778 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x77C "LUTDR4793,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x77C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x77C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x780 "LUTDR4803,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x780 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x780 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x784 "LUTDR4813,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x784 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x784 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x788 "LUTDR4823,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x788 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x788 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x78C "LUTDR4833,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x78C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x78C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x790 "LUTDR4843,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x790 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x790 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x794 "LUTDR4853,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x794 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x794 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x798 "LUTDR4863,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x798 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x798 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x79C "LUTDR4873,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x79C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x79C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7A0 "LUTDR4883,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7A4 "LUTDR4893,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7A8 "LUTDR4903,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7AC "LUTDR4913,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7B0 "LUTDR4923,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7B4 "LUTDR4933,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7B8 "LUTDR4943,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7BC "LUTDR4953,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7C0 "LUTDR4963,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7C4 "LUTDR4973,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7C8 "LUTDR4983,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7CC "LUTDR4993,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7D0 "LUTDR5003,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7D4 "LUTDR5013,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7D8 "LUTDR5023,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7DC "LUTDR5033,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7E0 "LUTDR5043,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7E4 "LUTDR5053,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7E8 "LUTDR5063,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7EC "LUTDR5073,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7F0 "LUTDR5083,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7F4 "LUTDR5093,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7F8 "LUTDR5103,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x7FC "LUTDR5113,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x7FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x7FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x800 "LUTDR5123,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x800 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x800 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x804 "LUTDR5133,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x804 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x804 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x808 "LUTDR5143,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x808 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x808 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x80C "LUTDR5153,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x80C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x80C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x810 "LUTDR5163,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x810 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x810 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x814 "LUTDR5173,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x814 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x814 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x818 "LUTDR5183,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x818 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x818 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x81C "LUTDR5193,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x81C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x81C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x820 "LUTDR5203,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x820 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x820 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x824 "LUTDR5213,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x824 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x824 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x828 "LUTDR5223,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x828 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x828 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x82C "LUTDR5233,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x82C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x82C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x830 "LUTDR5243,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x830 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x830 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x834 "LUTDR5253,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x834 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x834 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x838 "LUTDR5263,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x838 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x838 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x83C "LUTDR5273,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x83C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x83C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x840 "LUTDR5283,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x840 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x840 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x844 "LUTDR5293,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x844 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x844 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x848 "LUTDR5303,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x848 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x848 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x84C "LUTDR5313,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x84C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x84C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x850 "LUTDR5323,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x850 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x850 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x854 "LUTDR5333,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x854 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x854 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x858 "LUTDR5343,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x858 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x858 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x85C "LUTDR5353,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x85C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x85C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x860 "LUTDR5363,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x860 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x860 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x864 "LUTDR5373,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x864 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x864 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x868 "LUTDR5383,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x868 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x868 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x86C "LUTDR5393,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x86C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x86C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x870 "LUTDR5403,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x870 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x870 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x874 "LUTDR5413,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x874 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x874 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x878 "LUTDR5423,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x878 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x878 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x87C "LUTDR5433,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x87C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x87C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x880 "LUTDR5443,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x880 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x880 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x884 "LUTDR5453,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x884 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x884 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x888 "LUTDR5463,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x888 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x888 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x88C "LUTDR5473,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x88C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x88C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x890 "LUTDR5483,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x890 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x890 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x894 "LUTDR5493,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x894 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x894 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x898 "LUTDR5503,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x898 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x898 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x89C "LUTDR5513,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x89C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x89C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8A0 "LUTDR5523,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8A4 "LUTDR5533,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8A8 "LUTDR5543,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8AC "LUTDR5553,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8B0 "LUTDR5563,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8B4 "LUTDR5573,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8B8 "LUTDR5583,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8BC "LUTDR5593,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8C0 "LUTDR5603,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8C4 "LUTDR5613,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8C8 "LUTDR5623,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8CC "LUTDR5633,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8D0 "LUTDR5643,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8D4 "LUTDR5653,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8D8 "LUTDR5663,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8DC "LUTDR5673,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8E0 "LUTDR5683,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8E4 "LUTDR5693,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8E8 "LUTDR5703,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8EC "LUTDR5713,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8F0 "LUTDR5723,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8F4 "LUTDR5733,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8F8 "LUTDR5743,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x8FC "LUTDR5753,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x8FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x900 "LUTDR5763,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x900 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x900 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x904 "LUTDR5773,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x904 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x904 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x908 "LUTDR5783,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x908 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x908 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x90C "LUTDR5793,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x90C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x90C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x910 "LUTDR5803,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x910 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x910 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x914 "LUTDR5813,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x914 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x914 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x918 "LUTDR5823,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x918 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x918 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x91C "LUTDR5833,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x91C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x91C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x920 "LUTDR5843,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x920 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x920 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x924 "LUTDR5853,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x924 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x924 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x928 "LUTDR5863,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x928 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x928 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x92C "LUTDR5873,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x92C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x92C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x930 "LUTDR5883,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x930 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x930 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x934 "LUTDR5893,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x934 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x934 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x938 "LUTDR5903,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x938 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x938 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x93C "LUTDR5913,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x93C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x93C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x940 "LUTDR5923,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x940 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x940 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x944 "LUTDR5933,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x944 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x944 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x948 "LUTDR5943,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x948 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x948 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x94C "LUTDR5953,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x94C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x94C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x950 "LUTDR5963,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x950 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x950 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x954 "LUTDR5973,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x954 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x954 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x958 "LUTDR5983,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x958 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x958 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x95C "LUTDR5993,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x95C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x95C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x960 "LUTDR6003,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x960 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x960 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x964 "LUTDR6013,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x964 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x964 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x968 "LUTDR6023,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x968 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x968 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x96C "LUTDR6033,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x96C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x96C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x970 "LUTDR6043,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x970 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x970 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x974 "LUTDR6053,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x974 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x974 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x978 "LUTDR6063,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x978 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x978 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x97C "LUTDR6073,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x97C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x97C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x980 "LUTDR6083,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x980 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x980 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x984 "LUTDR6093,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x984 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x984 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x988 "LUTDR6103,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x988 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x988 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x98C "LUTDR6113,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x98C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x98C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x990 "LUTDR6123,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x990 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x990 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x994 "LUTDR6133,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x994 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x994 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x998 "LUTDR6143,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x998 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x998 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x99C "LUTDR6153,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x99C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x99C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9A0 "LUTDR6163,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9A0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9A0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9A4 "LUTDR6173,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9A4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9A4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9A8 "LUTDR6183,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9A8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9A8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9AC "LUTDR6193,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9AC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9AC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9B0 "LUTDR6203,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9B0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9B0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9B4 "LUTDR6213,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9B4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9B4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9B8 "LUTDR6223,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9B8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9B8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9BC "LUTDR6233,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9BC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9BC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9C0 "LUTDR6243,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9C0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9C0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9C4 "LUTDR6253,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9C4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9C4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9C8 "LUTDR6263,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9C8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9C8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9CC "LUTDR6273,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9CC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9CC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9D0 "LUTDR6283,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9D0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9D0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9D4 "LUTDR6293,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9D4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9D4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9D8 "LUTDR6303,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9D8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9D8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9DC "LUTDR6313,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9DC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9DC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9E0 "LUTDR6323,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9E0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9E0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9E4 "LUTDR6333,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9E4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9E4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9E8 "LUTDR6343,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9E8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9E8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9EC "LUTDR6353,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9EC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9EC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9F0 "LUTDR6363,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9F0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9F0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9F4 "LUTDR6373,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9F4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9F4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9F8 "LUTDR6383,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9F8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9F8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0x9FC "LUTDR6393,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0x9FC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x9FC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA00 "LUTDR6403,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA04 "LUTDR6413,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA08 "LUTDR6423,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA0C "LUTDR6433,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA10 "LUTDR6443,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA14 "LUTDR6453,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA18 "LUTDR6463,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA1C "LUTDR6473,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA20 "LUTDR6483,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA24 "LUTDR6493,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA28 "LUTDR6503,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA2C "LUTDR6513,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA30 "LUTDR6523,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA34 "LUTDR6533,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA38 "LUTDR6543,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA3C "LUTDR6553,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA40 "LUTDR6563,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA44 "LUTDR6573,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA48 "LUTDR6583,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA4C "LUTDR6593,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA50 "LUTDR6603,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA54 "LUTDR6613,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA58 "LUTDR6623,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA5C "LUTDR6633,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA60 "LUTDR6643,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA64 "LUTDR6653,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA68 "LUTDR6663,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA6C "LUTDR6673,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA70 "LUTDR6683,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA74 "LUTDR6693,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA78 "LUTDR6703,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA7C "LUTDR6713,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA80 "LUTDR6723,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA84 "LUTDR6733,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA88 "LUTDR6743,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA8C "LUTDR6753,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA90 "LUTDR6763,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA94 "LUTDR6773,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA98 "LUTDR6783,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xA9C "LUTDR6793,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xA9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xA9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAA0 "LUTDR6803,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAA4 "LUTDR6813,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAA8 "LUTDR6823,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAAC "LUTDR6833,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAB0 "LUTDR6843,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAB4 "LUTDR6853,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAB8 "LUTDR6863,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xABC "LUTDR6873,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xABC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xABC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAC0 "LUTDR6883,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAC4 "LUTDR6893,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAC8 "LUTDR6903,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xACC "LUTDR6913,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xACC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xACC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAD0 "LUTDR6923,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAD4 "LUTDR6933,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAD8 "LUTDR6943,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xADC "LUTDR6953,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xADC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xADC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAE0 "LUTDR6963,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAE4 "LUTDR6973,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAE8 "LUTDR6983,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAEC "LUTDR6993,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAF0 "LUTDR7003,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAF4 "LUTDR7013,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAF8 "LUTDR7023,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xAFC "LUTDR7033,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xAFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xAFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB00 "LUTDR7043,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB04 "LUTDR7053,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB08 "LUTDR7063,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB0C "LUTDR7073,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB10 "LUTDR7083,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB14 "LUTDR7093,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB18 "LUTDR7103,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB1C "LUTDR7113,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB20 "LUTDR7123,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB24 "LUTDR7133,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB28 "LUTDR7143,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB2C "LUTDR7153,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB30 "LUTDR7163,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB34 "LUTDR7173,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB38 "LUTDR7183,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB3C "LUTDR7193,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB40 "LUTDR7203,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB44 "LUTDR7213,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB48 "LUTDR7223,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB4C "LUTDR7233,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB50 "LUTDR7243,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB54 "LUTDR7253,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB58 "LUTDR7263,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB5C "LUTDR7273,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB60 "LUTDR7283,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB64 "LUTDR7293,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB68 "LUTDR7303,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB6C "LUTDR7313,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB70 "LUTDR7323,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB74 "LUTDR7333,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB78 "LUTDR7343,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB7C "LUTDR7353,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB80 "LUTDR7363,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB84 "LUTDR7373,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB88 "LUTDR7383,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB8C "LUTDR7393,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB90 "LUTDR7403,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB94 "LUTDR7413,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB98 "LUTDR7423,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xB9C "LUTDR7433,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xB9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xB9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBA0 "LUTDR7443,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBA4 "LUTDR7453,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBA8 "LUTDR7463,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBAC "LUTDR7473,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBB0 "LUTDR7483,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBB4 "LUTDR7493,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBB8 "LUTDR7503,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBBC "LUTDR7513,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBC0 "LUTDR7523,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBC4 "LUTDR7533,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBC8 "LUTDR7543,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBCC "LUTDR7553,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBD0 "LUTDR7563,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBD4 "LUTDR7573,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBD8 "LUTDR7583,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBDC "LUTDR7593,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBE0 "LUTDR7603,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBE4 "LUTDR7613,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBE8 "LUTDR7623,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBEC "LUTDR7633,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBF0 "LUTDR7643,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBF4 "LUTDR7653,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBF8 "LUTDR7663,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xBFC "LUTDR7673,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xBFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xBFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC00 "LUTDR7683,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC04 "LUTDR7693,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC08 "LUTDR7703,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC0C "LUTDR7713,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC10 "LUTDR7723,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC14 "LUTDR7733,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC18 "LUTDR7743,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC1C "LUTDR7753,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC20 "LUTDR7763,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC24 "LUTDR7773,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC28 "LUTDR7783,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC2C "LUTDR7793,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC30 "LUTDR7803,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC34 "LUTDR7813,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC38 "LUTDR7823,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC3C "LUTDR7833,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC40 "LUTDR7843,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC44 "LUTDR7853,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC48 "LUTDR7863,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC4C "LUTDR7873,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC50 "LUTDR7883,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC54 "LUTDR7893,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC58 "LUTDR7903,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC5C "LUTDR7913,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC60 "LUTDR7923,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC64 "LUTDR7933,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC68 "LUTDR7943,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC6C "LUTDR7953,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC70 "LUTDR7963,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC74 "LUTDR7973,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC78 "LUTDR7983,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC7C "LUTDR7993,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC80 "LUTDR8003,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC84 "LUTDR8013,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC88 "LUTDR8023,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC8C "LUTDR8033,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC90 "LUTDR8043,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC94 "LUTDR8053,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC98 "LUTDR8063,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xC9C "LUTDR8073,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xC9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCA0 "LUTDR8083,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCA4 "LUTDR8093,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCA8 "LUTDR8103,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCAC "LUTDR8113,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCB0 "LUTDR8123,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCB4 "LUTDR8133,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCB8 "LUTDR8143,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCBC "LUTDR8153,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCC0 "LUTDR8163,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCC4 "LUTDR8173,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCC8 "LUTDR8183,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCCC "LUTDR8193,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCD0 "LUTDR8203,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCD4 "LUTDR8213,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCD8 "LUTDR8223,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCDC "LUTDR8233,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCE0 "LUTDR8243,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCE4 "LUTDR8253,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCE8 "LUTDR8263,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCEC "LUTDR8273,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCF0 "LUTDR8283,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCF4 "LUTDR8293,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCF8 "LUTDR8303,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xCFC "LUTDR8313,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xCFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xCFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD00 "LUTDR8323,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD04 "LUTDR8333,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD08 "LUTDR8343,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD0C "LUTDR8353,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD10 "LUTDR8363,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD14 "LUTDR8373,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD18 "LUTDR8383,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD1C "LUTDR8393,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD20 "LUTDR8403,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD24 "LUTDR8413,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD28 "LUTDR8423,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD2C "LUTDR8433,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD30 "LUTDR8443,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD34 "LUTDR8453,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD38 "LUTDR8463,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD3C "LUTDR8473,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD40 "LUTDR8483,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD44 "LUTDR8493,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD48 "LUTDR8503,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD4C "LUTDR8513,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD50 "LUTDR8523,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD54 "LUTDR8533,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD58 "LUTDR8543,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD5C "LUTDR8553,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD60 "LUTDR8563,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD64 "LUTDR8573,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD68 "LUTDR8583,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD6C "LUTDR8593,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD70 "LUTDR8603,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD74 "LUTDR8613,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD78 "LUTDR8623,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD7C "LUTDR8633,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD80 "LUTDR8643,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD84 "LUTDR8653,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD88 "LUTDR8663,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD8C "LUTDR8673,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD90 "LUTDR8683,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD94 "LUTDR8693,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD98 "LUTDR8703,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xD9C "LUTDR8713,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xD9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xD9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDA0 "LUTDR8723,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDA4 "LUTDR8733,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDA8 "LUTDR8743,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDAC "LUTDR8753,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDB0 "LUTDR8763,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDB4 "LUTDR8773,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDB8 "LUTDR8783,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDBC "LUTDR8793,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDC0 "LUTDR8803,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDC4 "LUTDR8813,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDC8 "LUTDR8823,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDCC "LUTDR8833,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDD0 "LUTDR8843,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDD4 "LUTDR8853,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDD8 "LUTDR8863,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDDC "LUTDR8873,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDE0 "LUTDR8883,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDE4 "LUTDR8893,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDE8 "LUTDR8903,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDEC "LUTDR8913,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDF0 "LUTDR8923,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDF4 "LUTDR8933,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDF8 "LUTDR8943,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xDFC "LUTDR8953,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xDFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xDFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE00 "LUTDR8963,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE04 "LUTDR8973,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE08 "LUTDR8983,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE0C "LUTDR8993,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE10 "LUTDR9003,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE14 "LUTDR9013,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE18 "LUTDR9023,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE1C "LUTDR9033,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE20 "LUTDR9043,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE24 "LUTDR9053,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE28 "LUTDR9063,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE2C "LUTDR9073,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE30 "LUTDR9083,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE34 "LUTDR9093,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE38 "LUTDR9103,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE3C "LUTDR9113,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE40 "LUTDR9123,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE44 "LUTDR9133,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE48 "LUTDR9143,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE4C "LUTDR9153,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE50 "LUTDR9163,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE54 "LUTDR9173,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE58 "LUTDR9183,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE5C "LUTDR9193,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE60 "LUTDR9203,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE64 "LUTDR9213,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE68 "LUTDR9223,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE6C "LUTDR9233,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE70 "LUTDR9243,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE74 "LUTDR9253,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE78 "LUTDR9263,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE7C "LUTDR9273,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE80 "LUTDR9283,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE84 "LUTDR9293,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE88 "LUTDR9303,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE8C "LUTDR9313,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE90 "LUTDR9323,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE94 "LUTDR9333,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE98 "LUTDR9343,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xE9C "LUTDR9353,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xE9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xE9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEA0 "LUTDR9363,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEA4 "LUTDR9373,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEA8 "LUTDR9383,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEAC "LUTDR9393,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEB0 "LUTDR9403,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEB4 "LUTDR9413,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEB8 "LUTDR9423,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEBC "LUTDR9433,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEC0 "LUTDR9443,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEC4 "LUTDR9453,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEC8 "LUTDR9463,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xECC "LUTDR9473,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xECC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xECC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xED0 "LUTDR9483,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xED0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xED0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xED4 "LUTDR9493,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xED4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xED4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xED8 "LUTDR9503,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xED8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xED8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEDC "LUTDR9513,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEE0 "LUTDR9523,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEE4 "LUTDR9533,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEE8 "LUTDR9543,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEEC "LUTDR9553,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEF0 "LUTDR9563,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEF4 "LUTDR9573,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEF8 "LUTDR9583,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xEFC "LUTDR9593,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xEFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xEFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF00 "LUTDR9603,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF00 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF00 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF04 "LUTDR9613,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF04 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF04 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF08 "LUTDR9623,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF08 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF08 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF0C "LUTDR9633,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF0C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF0C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF10 "LUTDR9643,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF10 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF10 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF14 "LUTDR9653,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF14 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF14 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF18 "LUTDR9663,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF18 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF18 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF1C "LUTDR9673,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF1C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF1C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF20 "LUTDR9683,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF20 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF20 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF24 "LUTDR9693,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF24 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF24 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF28 "LUTDR9703,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF28 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF28 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF2C "LUTDR9713,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF2C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF2C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF30 "LUTDR9723,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF30 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF30 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF34 "LUTDR9733,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF34 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF34 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF38 "LUTDR9743,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF38 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF38 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF3C "LUTDR9753,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF3C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF3C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF40 "LUTDR9763,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF40 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF40 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF44 "LUTDR9773,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF44 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF44 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF48 "LUTDR9783,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF48 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF48 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF4C "LUTDR9793,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF4C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF4C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF50 "LUTDR9803,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF50 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF50 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF54 "LUTDR9813,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF54 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF54 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF58 "LUTDR9823,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF58 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF58 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF5C "LUTDR9833,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF5C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF5C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF60 "LUTDR9843,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF60 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF60 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF64 "LUTDR9853,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF64 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF64 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF68 "LUTDR9863,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF68 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF68 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF6C "LUTDR9873,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF6C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF6C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF70 "LUTDR9883,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF70 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF70 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF74 "LUTDR9893,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF74 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF74 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF78 "LUTDR9903,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF78 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF78 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF7C "LUTDR9913,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF7C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF7C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF80 "LUTDR9923,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF80 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF80 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF84 "LUTDR9933,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF84 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF84 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF88 "LUTDR9943,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF88 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF88 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF8C "LUTDR9953,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF8C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF8C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF90 "LUTDR9963,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF90 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF90 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF94 "LUTDR9973,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF94 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF94 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF98 "LUTDR9983,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF98 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF98 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xF9C "LUTDR9993,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xF9C 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xF9C 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFA0 "LUTDR10003,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFA0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFA0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFA4 "LUTDR10013,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFA4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFA4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFA8 "LUTDR10023,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFA8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFA8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFAC "LUTDR10033,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFAC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFAC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFB0 "LUTDR10043,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFB0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFB0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFB4 "LUTDR10053,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFB4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFB4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFB8 "LUTDR10063,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFB8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFB8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFBC "LUTDR10073,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFBC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFBC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFC0 "LUTDR10083,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFC0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFC0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFC4 "LUTDR10093,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFC4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFC4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFC8 "LUTDR10103,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFC8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFC8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFCC "LUTDR10113,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFCC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFCC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFD0 "LUTDR10123,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFD0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFD0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFD4 "LUTDR10133,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFD4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFD4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFD8 "LUTDR10143,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFD8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFD8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFDC "LUTDR10153,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFDC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFDC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFE0 "LUTDR10163,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFE0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFE0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFE4 "LUTDR10173,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFE4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFE4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFE8 "LUTDR10183,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFE8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFE8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFEC "LUTDR10193,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFEC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFEC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFF0 "LUTDR10203,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFF0 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFF0 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFF4 "LUTDR10213,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFF4 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFF4 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFF8 "LUTDR10223,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFF8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFF8 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
line.long 0xFFC "LUTDR10233,0 less_than_or_equals n less_than_or_equals 1023"
hexmask.long.tbyte 0xFFC 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xFFC 0.--7. 1. "LUTDRn,These bits are used when the LUTE bit in the CMRCR2 register is 1."
tree.end
tree.end
tree "INTC (Interrupt Controller)"
base ad:0x0
tree "INTC_0"
base ad:0xFFEA0000
group.long 0x0++0x13
line.long 0x0 "IMNTRSESR,This register shows secure access error status. Only secure access is allowed."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "SEC_ERR,security access error status" "0,1"
line.long 0x4 "INMTRESIDR,This register shows master ID when occurred secure access error. Only secure access is allowed."
hexmask.long.word 0x4 20.--31. 1. "Reserved_20,Reserved"
hexmask.long.tbyte 0x4 0.--19. 1. "ERR_S_ID,Error ID information for security access error"
line.long 0x8 "IMNTRESADDR,This register shows Slave register address when occurred secure access error. Only secure access is allowed"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "ERR_S_ADDR,Error Address information for security access error"
line.long 0xC "IMNTAPEDCEN,This register is functional safety use only. Keep initial value."
hexmask.long 0xC 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0xC 3. "Reserved_3,Reserved" "0,1"
bitfld.long 0xC 2. "Reserved_2,Reserved" "0,1"
bitfld.long 0xC 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0xC 0. "EDCEN0,EDC enable for AXI4 stream channel 0" "0: Disable check function,1: Enable check function"
line.long 0x10 "IMNTAPDBGEDC,This register is functional safety use only. Keep initial value."
hexmask.long.byte 0x10 25.--31. 1. "Reserved_25,Reserved"
bitfld.long 0x10 22.--24. "ACEM,EDC error injection for ACE Master I/F" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 19.--21. "ACES,EDC error injection for ACE Slave I/F" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 16.--18. "OTHER,EDC error injection for sideband signal I/F" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x10 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x10 8.--11. 1. "Reserved_8,Reserved"
bitfld.long 0x10 6.--7. "Reserved_6,Reserved" "0,1,2,3"
bitfld.long 0x10 4.--5. "Reserved_4,Reserved" "0,1,2,3"
bitfld.long 0x10 2.--3. "Reserved_2,Reserved" "0,1,2,3"
bitfld.long 0x10 0.--1. "AXI4_0,EDC error injection for AXI4 stream channel 0" "0,1,2,3"
group.long 0x20++0x7
line.long 0x0 "IMNTEDCESTS,This register is functional safety use only. Keep initial value."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
bitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
line.long 0x4 "IMNTAPDBGTC,This register is functional safety use only. Keep initial value."
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "TC_INJ,Error injection for tranfer count of AXI4 stream"
group.long 0x50++0xF
line.long 0x0 "IMNTAPEDCACEMR,This register is functional safety use only. Keep initial value."
bitfld.long 0x0 31. "CLR,Clear bit. When this register is set to double_quotation1double_quotation  Error ID information is cleared" "0,1"
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "ID_7_0,Error ID information for read response of ACE Master I/F"
line.long 0x4 "IMNTAPEDCACESAR,This register is functional safety use only. Keep initial value."
bitfld.long 0x4 31. "CLR,Clear bit. When this register is set to double_quotation1double_quotation  Error ID information is cleared" "0,1"
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "ID_7_0,Error ID information for read request of ACE Slave I/F"
line.long 0x8 "IMNTAPEDCACESAW,This register is functional safety use only. Keep initial value."
bitfld.long 0x8 31. "CLR,Clear bit. When this register is set to double_quotation1double_quotation  Error ID information is cleared" "0,1"
hexmask.long.tbyte 0x8 8.--30. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 0.--7. 1. "ID_7_0,Error ID information for write request of ACE Slave I/F"
line.long 0xC "IMNTAPEDCACESW,This register is functional safety use only. Keep initial value."
bitfld.long 0xC 31. "CLR,Clear bit. When this register is set to double_quotation1double_quotation  Error ID information is cleared" "0,1"
hexmask.long.tbyte 0xC 8.--30. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC 0.--7. 1. "ID_7_0,Error ID information for write data access of ACE Slave I/F"
group.long 0x1000++0x3
line.long 0x0 "IMNTRCCR,Only secure access is allowed."
hexmask.long.word 0x0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
hexmask.long.byte 0x0 0.--3. 1. "IMNTR_CLK,Select the clock of interrupt IMNTR's counter."
tree.end
tree "INTC_1"
base ad:0xFFEA2000
group.long 0x0++0xF1F
line.long 0x0 "IMNTRCR0,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4 "IMNTRCR1,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8 "IMNTRCR2,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC "IMNTRCR3,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x10 "IMNTRCR4,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x10 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x10 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x10 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x10 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x10 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x10 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x10 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x10 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x14 "IMNTRCR5,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x14 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x14 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x14 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x14 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x14 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x14 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x14 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x14 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x18 "IMNTRCR6,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x18 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x18 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x18 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x18 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x18 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x18 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x18 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x18 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1C "IMNTRCR7,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x20 "IMNTRCR8,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x20 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x20 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x20 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x20 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x20 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x20 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x20 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x20 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x24 "IMNTRCR9,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x24 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x24 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x24 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x24 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x24 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x24 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x24 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x24 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x28 "IMNTRCR10,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x28 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x28 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x28 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x28 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x28 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x28 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x28 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x28 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2C "IMNTRCR11,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x30 "IMNTRCR12,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x30 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x30 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x30 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x30 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x30 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x30 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x30 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x30 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x34 "IMNTRCR13,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x34 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x34 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x34 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x34 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x34 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x34 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x34 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x34 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x38 "IMNTRCR14,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x38 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x38 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x38 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x38 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x38 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x38 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x38 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x38 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3C "IMNTRCR15,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x40 "IMNTRCR16,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x40 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x40 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x40 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x40 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x40 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x40 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x40 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x40 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x44 "IMNTRCR17,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x44 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x44 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x44 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x44 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x44 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x44 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x44 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x44 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x48 "IMNTRCR18,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x48 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x48 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x48 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x48 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x48 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x48 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x48 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x48 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4C "IMNTRCR19,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x50 "IMNTRCR20,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x50 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x50 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x50 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x50 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x50 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x50 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x50 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x50 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x54 "IMNTRCR21,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x54 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x54 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x54 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x54 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x54 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x54 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x54 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x54 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x58 "IMNTRCR22,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x58 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x58 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x58 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x58 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x58 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x58 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x58 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x58 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5C "IMNTRCR23,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x60 "IMNTRCR24,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x60 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x60 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x60 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x60 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x60 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x60 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x60 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x60 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x64 "IMNTRCR25,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x64 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x64 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x64 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x64 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x64 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x64 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x64 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x64 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x68 "IMNTRCR26,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x68 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x68 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x68 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x68 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x68 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x68 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x68 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x68 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6C "IMNTRCR27,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x70 "IMNTRCR28,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x70 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x70 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x70 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x70 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x70 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x70 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x70 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x70 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x74 "IMNTRCR29,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x74 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x74 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x74 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x74 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x74 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x74 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x74 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x74 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x78 "IMNTRCR30,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x78 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x78 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x78 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x78 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x78 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x78 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x78 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x78 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7C "IMNTRCR31,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x80 "IMNTRCR32,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x80 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x80 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x80 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x80 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x80 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x80 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x80 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x80 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x84 "IMNTRCR33,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x84 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x84 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x84 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x84 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x84 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x84 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x84 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x84 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x88 "IMNTRCR34,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x88 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x88 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x88 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x88 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x88 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x88 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x88 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x88 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8C "IMNTRCR35,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x90 "IMNTRCR36,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x90 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x90 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x90 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x90 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x90 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x90 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x90 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x90 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x94 "IMNTRCR37,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x94 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x94 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x94 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x94 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x94 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x94 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x94 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x94 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x98 "IMNTRCR38,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x98 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x98 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x98 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x98 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x98 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x98 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x98 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x98 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9C "IMNTRCR39,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA0 "IMNTRCR40,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA4 "IMNTRCR41,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA8 "IMNTRCR42,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAC "IMNTRCR43,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB0 "IMNTRCR44,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB4 "IMNTRCR45,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB8 "IMNTRCR46,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBC "IMNTRCR47,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC0 "IMNTRCR48,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC4 "IMNTRCR49,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC8 "IMNTRCR50,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCC "IMNTRCR51,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD0 "IMNTRCR52,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD4 "IMNTRCR53,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD8 "IMNTRCR54,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDC "IMNTRCR55,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE0 "IMNTRCR56,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE4 "IMNTRCR57,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE8 "IMNTRCR58,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEC "IMNTRCR59,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xF0 "IMNTRCR60,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xF0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xF0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xF0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xF0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xF0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xF0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xF0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xF0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xF4 "IMNTRCR61,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xF4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xF4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xF4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xF4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xF4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xF4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xF4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xF4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xF8 "IMNTRCR62,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xF8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xF8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xF8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xF8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xF8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xF8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xF8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xF8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xFC "IMNTRCR63,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xFC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xFC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xFC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xFC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xFC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xFC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xFC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xFC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x100 "IMNTRCR64,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x100 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x100 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x100 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x100 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x100 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x100 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x100 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x100 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x104 "IMNTRCR65,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x104 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x104 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x104 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x104 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x104 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x104 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x104 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x104 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x108 "IMNTRCR66,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x108 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x108 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x108 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x108 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x108 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x108 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x108 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x108 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x10C "IMNTRCR67,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x10C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x10C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x10C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x10C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x10C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x10C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x10C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x10C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x110 "IMNTRCR68,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x110 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x110 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x110 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x110 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x110 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x110 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x110 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x110 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x114 "IMNTRCR69,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x114 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x114 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x114 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x114 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x114 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x114 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x114 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x114 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x118 "IMNTRCR70,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x118 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x118 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x118 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x118 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x118 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x118 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x118 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x118 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x11C "IMNTRCR71,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x11C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x11C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x11C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x11C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x11C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x11C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x11C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x11C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x120 "IMNTRCR72,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x120 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x120 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x120 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x120 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x120 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x120 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x120 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x120 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x124 "IMNTRCR73,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x124 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x124 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x124 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x124 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x124 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x124 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x124 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x124 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x128 "IMNTRCR74,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x128 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x128 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x128 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x128 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x128 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x128 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x128 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x128 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x12C "IMNTRCR75,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x12C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x12C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x12C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x12C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x12C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x12C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x12C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x12C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x130 "IMNTRCR76,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x130 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x130 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x130 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x130 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x130 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x130 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x130 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x130 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x134 "IMNTRCR77,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x134 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x134 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x134 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x134 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x134 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x134 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x134 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x134 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x138 "IMNTRCR78,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x138 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x138 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x138 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x138 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x138 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x138 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x138 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x138 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x13C "IMNTRCR79,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x13C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x13C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x13C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x13C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x13C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x13C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x13C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x13C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x140 "IMNTRCR80,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x140 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x140 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x140 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x140 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x140 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x140 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x140 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x140 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x144 "IMNTRCR81,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x144 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x144 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x144 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x144 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x144 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x144 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x144 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x144 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x148 "IMNTRCR82,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x148 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x148 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x148 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x148 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x148 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x148 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x148 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x148 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x14C "IMNTRCR83,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x14C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x14C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x14C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x14C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x14C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x14C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x14C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x14C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x150 "IMNTRCR84,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x150 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x150 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x150 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x150 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x150 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x150 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x150 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x150 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x154 "IMNTRCR85,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x154 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x154 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x154 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x154 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x154 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x154 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x154 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x154 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x158 "IMNTRCR86,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x158 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x158 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x158 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x158 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x158 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x158 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x158 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x158 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x15C "IMNTRCR87,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x15C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x15C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x15C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x15C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x15C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x15C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x15C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x15C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x160 "IMNTRCR88,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x160 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x160 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x160 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x160 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x160 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x160 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x160 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x160 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x164 "IMNTRCR89,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x164 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x164 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x164 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x164 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x164 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x164 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x164 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x164 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x168 "IMNTRCR90,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x168 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x168 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x168 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x168 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x168 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x168 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x168 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x168 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x16C "IMNTRCR91,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x16C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x16C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x16C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x16C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x16C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x16C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x16C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x16C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x170 "IMNTRCR92,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x170 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x170 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x170 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x170 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x170 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x170 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x170 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x170 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x174 "IMNTRCR93,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x174 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x174 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x174 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x174 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x174 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x174 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x174 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x174 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x178 "IMNTRCR94,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x178 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x178 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x178 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x178 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x178 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x178 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x178 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x178 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x17C "IMNTRCR95,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x17C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x17C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x17C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x17C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x17C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x17C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x17C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x17C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x180 "IMNTRCR96,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x180 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x180 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x180 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x180 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x180 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x180 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x180 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x180 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x184 "IMNTRCR97,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x184 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x184 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x184 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x184 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x184 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x184 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x184 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x184 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x188 "IMNTRCR98,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x188 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x188 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x188 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x188 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x188 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x188 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x188 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x188 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x18C "IMNTRCR99,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x18C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x18C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x18C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x18C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x18C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x18C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x18C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x18C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x190 "IMNTRCR100,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x190 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x190 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x190 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x190 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x190 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x190 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x190 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x190 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x194 "IMNTRCR101,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x194 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x194 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x194 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x194 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x194 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x194 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x194 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x194 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x198 "IMNTRCR102,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x198 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x198 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x198 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x198 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x198 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x198 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x198 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x198 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x19C "IMNTRCR103,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x19C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x19C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x19C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x19C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x19C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x19C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x19C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x19C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1A0 "IMNTRCR104,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1A0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1A0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1A0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1A0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1A0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1A0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1A0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1A0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1A4 "IMNTRCR105,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1A4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1A4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1A4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1A4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1A4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1A4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1A4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1A4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1A8 "IMNTRCR106,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1A8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1A8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1A8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1A8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1A8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1A8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1A8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1A8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1AC "IMNTRCR107,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1AC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1AC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1AC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1AC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1AC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1AC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1AC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1AC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1B0 "IMNTRCR108,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1B0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1B0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1B0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1B0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1B0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1B0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1B0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1B0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1B4 "IMNTRCR109,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1B4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1B4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1B4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1B4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1B4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1B4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1B4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1B4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1B8 "IMNTRCR110,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1B8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1B8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1B8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1B8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1B8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1B8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1B8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1B8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1BC "IMNTRCR111,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1BC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1BC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1BC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1BC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1BC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1BC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1BC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1BC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1C0 "IMNTRCR112,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1C0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1C0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1C0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1C0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1C0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1C0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1C0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1C0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1C4 "IMNTRCR113,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1C4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1C4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1C4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1C4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1C4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1C4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1C4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1C4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1C8 "IMNTRCR114,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1C8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1C8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1C8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1C8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1C8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1C8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1C8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1C8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1CC "IMNTRCR115,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1CC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1CC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1CC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1CC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1CC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1CC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1CC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1CC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1D0 "IMNTRCR116,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1D0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1D0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1D0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1D0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1D0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1D0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1D0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1D0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1D4 "IMNTRCR117,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1D4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1D4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1D4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1D4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1D4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1D4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1D4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1D4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1D8 "IMNTRCR118,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1D8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1D8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1D8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1D8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1D8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1D8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1D8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1D8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1DC "IMNTRCR119,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1DC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1DC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1DC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1DC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1DC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1DC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1DC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1DC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1E0 "IMNTRCR120,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1E0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1E0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1E0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1E0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1E0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1E0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1E0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1E0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1E4 "IMNTRCR121,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1E4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1E4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1E4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1E4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1E4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1E4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1E4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1E4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1E8 "IMNTRCR122,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1E8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1E8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1E8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1E8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1E8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1E8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1E8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1E8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1EC "IMNTRCR123,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1EC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1EC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1EC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1EC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1EC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1EC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1EC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1EC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1F0 "IMNTRCR124,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1F0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1F0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1F0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1F0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1F0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1F0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1F0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1F0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1F4 "IMNTRCR125,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1F4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1F4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1F4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1F4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1F4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1F4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1F4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1F4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1F8 "IMNTRCR126,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1F8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1F8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1F8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1F8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1F8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1F8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1F8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1F8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x1FC "IMNTRCR127,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1FC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x1FC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x1FC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x1FC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x1FC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x1FC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x1FC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x1FC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x200 "IMNTRCR128,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x200 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x200 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x200 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x200 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x200 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x200 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x200 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x200 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x204 "IMNTRCR129,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x204 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x204 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x204 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x204 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x204 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x204 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x204 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x204 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x208 "IMNTRCR130,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x208 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x208 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x208 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x208 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x208 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x208 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x208 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x208 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x20C "IMNTRCR131,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x20C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x20C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x20C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x20C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x20C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x20C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x20C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x20C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x210 "IMNTRCR132,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x210 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x210 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x210 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x210 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x210 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x210 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x210 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x210 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x214 "IMNTRCR133,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x214 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x214 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x214 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x214 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x214 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x214 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x214 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x214 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x218 "IMNTRCR134,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x218 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x218 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x218 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x218 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x218 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x218 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x218 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x218 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x21C "IMNTRCR135,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x21C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x21C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x21C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x21C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x21C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x21C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x21C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x21C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x220 "IMNTRCR136,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x220 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x220 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x220 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x220 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x220 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x220 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x220 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x220 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x224 "IMNTRCR137,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x224 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x224 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x224 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x224 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x224 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x224 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x224 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x224 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x228 "IMNTRCR138,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x228 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x228 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x228 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x228 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x228 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x228 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x228 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x228 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x22C "IMNTRCR139,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x22C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x22C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x22C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x22C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x22C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x22C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x22C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x22C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x230 "IMNTRCR140,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x230 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x230 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x230 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x230 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x230 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x230 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x230 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x230 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x234 "IMNTRCR141,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x234 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x234 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x234 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x234 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x234 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x234 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x234 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x234 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x238 "IMNTRCR142,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x238 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x238 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x238 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x238 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x238 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x238 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x238 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x238 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x23C "IMNTRCR143,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x23C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x23C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x23C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x23C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x23C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x23C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x23C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x23C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x240 "IMNTRCR144,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x240 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x240 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x240 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x240 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x240 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x240 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x240 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x240 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x244 "IMNTRCR145,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x244 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x244 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x244 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x244 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x244 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x244 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x244 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x244 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x248 "IMNTRCR146,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x248 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x248 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x248 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x248 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x248 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x248 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x248 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x248 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x24C "IMNTRCR147,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x24C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x24C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x24C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x24C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x24C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x24C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x24C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x24C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x250 "IMNTRCR148,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x250 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x250 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x250 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x250 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x250 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x250 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x250 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x250 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x254 "IMNTRCR149,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x254 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x254 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x254 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x254 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x254 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x254 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x254 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x254 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x258 "IMNTRCR150,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x258 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x258 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x258 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x258 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x258 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x258 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x258 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x258 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x25C "IMNTRCR151,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x25C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x25C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x25C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x25C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x25C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x25C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x25C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x25C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x260 "IMNTRCR152,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x260 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x260 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x260 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x260 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x260 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x260 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x260 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x260 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x264 "IMNTRCR153,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x264 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x264 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x264 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x264 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x264 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x264 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x264 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x264 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x268 "IMNTRCR154,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x268 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x268 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x268 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x268 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x268 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x268 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x268 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x268 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x26C "IMNTRCR155,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x26C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x26C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x26C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x26C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x26C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x26C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x26C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x26C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x270 "IMNTRCR156,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x270 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x270 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x270 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x270 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x270 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x270 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x270 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x270 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x274 "IMNTRCR157,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x274 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x274 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x274 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x274 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x274 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x274 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x274 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x274 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x278 "IMNTRCR158,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x278 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x278 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x278 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x278 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x278 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x278 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x278 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x278 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x27C "IMNTRCR159,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x27C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x27C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x27C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x27C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x27C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x27C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x27C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x27C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x280 "IMNTRCR160,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x280 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x280 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x280 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x280 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x280 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x280 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x280 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x280 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x284 "IMNTRCR161,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x284 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x284 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x284 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x284 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x284 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x284 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x284 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x284 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x288 "IMNTRCR162,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x288 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x288 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x288 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x288 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x288 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x288 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x288 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x288 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x28C "IMNTRCR163,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x28C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x28C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x28C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x28C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x28C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x28C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x28C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x28C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x290 "IMNTRCR164,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x290 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x290 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x290 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x290 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x290 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x290 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x290 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x290 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x294 "IMNTRCR165,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x294 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x294 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x294 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x294 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x294 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x294 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x294 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x294 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x298 "IMNTRCR166,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x298 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x298 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x298 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x298 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x298 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x298 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x298 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x298 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x29C "IMNTRCR167,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x29C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x29C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x29C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x29C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x29C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x29C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x29C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x29C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2A0 "IMNTRCR168,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2A0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2A0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2A0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2A0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2A0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2A0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2A0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2A0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2A4 "IMNTRCR169,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2A4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2A4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2A4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2A4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2A4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2A4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2A4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2A4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2A8 "IMNTRCR170,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2A8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2A8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2A8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2A8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2A8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2A8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2A8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2A8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2AC "IMNTRCR171,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2AC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2AC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2AC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2AC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2AC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2AC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2AC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2AC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2B0 "IMNTRCR172,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2B0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2B0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2B0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2B0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2B0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2B0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2B0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2B0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2B4 "IMNTRCR173,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2B4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2B4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2B4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2B4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2B4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2B4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2B4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2B4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2B8 "IMNTRCR174,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2B8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2B8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2B8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2B8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2B8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2B8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2B8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2B8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2BC "IMNTRCR175,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2BC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2BC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2BC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2BC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2BC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2BC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2BC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2BC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2C0 "IMNTRCR176,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2C0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2C0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2C0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2C0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2C0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2C0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2C0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2C0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2C4 "IMNTRCR177,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2C4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2C4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2C4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2C4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2C4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2C4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2C4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2C4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2C8 "IMNTRCR178,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2C8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2C8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2C8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2C8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2C8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2C8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2C8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2C8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2CC "IMNTRCR179,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2CC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2CC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2CC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2CC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2CC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2CC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2CC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2CC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2D0 "IMNTRCR180,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2D0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2D0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2D0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2D0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2D0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2D0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2D0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2D0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2D4 "IMNTRCR181,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2D4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2D4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2D4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2D4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2D4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2D4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2D4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2D4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2D8 "IMNTRCR182,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2D8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2D8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2D8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2D8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2D8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2D8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2D8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2D8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2DC "IMNTRCR183,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2DC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2DC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2DC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2DC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2DC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2DC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2DC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2DC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2E0 "IMNTRCR184,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2E0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2E0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2E0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2E0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2E0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2E0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2E0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2E0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2E4 "IMNTRCR185,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2E4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2E4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2E4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2E4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2E4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2E4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2E4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2E4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2E8 "IMNTRCR186,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2E8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2E8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2E8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2E8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2E8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2E8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2E8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2E8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2EC "IMNTRCR187,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2EC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2EC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2EC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2EC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2EC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2EC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2EC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2EC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2F0 "IMNTRCR188,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2F0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2F0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2F0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2F0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2F0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2F0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2F0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2F0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2F4 "IMNTRCR189,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2F4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2F4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2F4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2F4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2F4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2F4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2F4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2F4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2F8 "IMNTRCR190,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2F8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2F8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2F8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2F8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2F8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2F8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2F8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2F8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x2FC "IMNTRCR191,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2FC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x2FC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x2FC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x2FC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x2FC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x2FC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x2FC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x2FC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x300 "IMNTRCR192,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x300 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x300 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x300 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x300 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x300 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x300 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x300 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x300 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x304 "IMNTRCR193,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x304 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x304 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x304 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x304 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x304 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x304 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x304 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x304 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x308 "IMNTRCR194,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x308 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x308 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x308 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x308 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x308 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x308 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x308 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x308 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x30C "IMNTRCR195,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x30C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x30C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x30C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x30C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x30C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x30C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x30C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x30C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x310 "IMNTRCR196,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x310 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x310 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x310 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x310 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x310 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x310 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x310 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x310 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x314 "IMNTRCR197,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x314 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x314 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x314 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x314 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x314 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x314 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x314 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x314 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x318 "IMNTRCR198,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x318 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x318 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x318 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x318 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x318 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x318 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x318 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x318 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x31C "IMNTRCR199,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x31C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x31C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x31C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x31C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x31C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x31C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x31C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x31C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x320 "IMNTRCR200,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x320 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x320 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x320 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x320 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x320 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x320 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x320 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x320 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x324 "IMNTRCR201,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x324 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x324 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x324 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x324 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x324 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x324 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x324 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x324 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x328 "IMNTRCR202,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x328 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x328 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x328 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x328 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x328 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x328 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x328 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x328 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x32C "IMNTRCR203,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x32C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x32C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x32C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x32C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x32C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x32C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x32C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x32C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x330 "IMNTRCR204,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x330 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x330 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x330 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x330 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x330 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x330 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x330 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x330 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x334 "IMNTRCR205,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x334 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x334 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x334 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x334 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x334 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x334 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x334 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x334 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x338 "IMNTRCR206,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x338 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x338 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x338 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x338 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x338 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x338 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x338 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x338 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x33C "IMNTRCR207,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x33C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x33C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x33C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x33C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x33C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x33C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x33C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x33C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x340 "IMNTRCR208,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x340 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x340 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x340 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x340 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x340 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x340 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x340 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x340 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x344 "IMNTRCR209,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x344 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x344 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x344 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x344 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x344 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x344 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x344 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x344 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x348 "IMNTRCR210,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x348 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x348 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x348 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x348 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x348 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x348 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x348 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x348 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x34C "IMNTRCR211,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x34C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x34C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x34C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x34C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x34C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x34C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x34C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x34C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x350 "IMNTRCR212,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x350 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x350 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x350 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x350 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x350 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x350 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x350 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x350 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x354 "IMNTRCR213,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x354 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x354 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x354 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x354 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x354 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x354 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x354 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x354 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x358 "IMNTRCR214,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x358 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x358 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x358 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x358 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x358 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x358 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x358 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x358 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x35C "IMNTRCR215,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x35C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x35C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x35C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x35C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x35C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x35C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x35C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x35C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x360 "IMNTRCR216,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x360 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x360 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x360 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x360 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x360 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x360 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x360 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x360 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x364 "IMNTRCR217,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x364 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x364 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x364 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x364 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x364 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x364 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x364 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x364 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x368 "IMNTRCR218,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x368 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x368 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x368 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x368 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x368 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x368 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x368 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x368 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x36C "IMNTRCR219,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x36C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x36C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x36C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x36C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x36C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x36C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x36C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x36C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x370 "IMNTRCR220,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x370 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x370 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x370 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x370 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x370 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x370 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x370 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x370 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x374 "IMNTRCR221,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x374 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x374 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x374 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x374 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x374 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x374 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x374 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x374 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x378 "IMNTRCR222,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x378 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x378 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x378 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x378 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x378 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x378 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x378 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x378 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x37C "IMNTRCR223,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x37C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x37C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x37C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x37C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x37C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x37C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x37C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x37C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x380 "IMNTRCR224,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x380 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x380 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x380 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x380 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x380 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x380 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x380 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x380 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x384 "IMNTRCR225,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x384 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x384 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x384 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x384 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x384 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x384 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x384 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x384 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x388 "IMNTRCR226,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x388 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x388 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x388 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x388 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x388 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x388 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x388 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x388 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x38C "IMNTRCR227,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x38C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x38C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x38C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x38C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x38C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x38C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x38C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x38C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x390 "IMNTRCR228,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x390 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x390 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x390 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x390 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x390 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x390 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x390 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x390 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x394 "IMNTRCR229,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x394 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x394 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x394 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x394 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x394 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x394 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x394 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x394 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x398 "IMNTRCR230,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x398 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x398 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x398 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x398 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x398 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x398 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x398 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x398 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x39C "IMNTRCR231,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x39C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x39C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x39C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x39C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x39C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x39C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x39C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x39C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3A0 "IMNTRCR232,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3A0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3A0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3A0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3A0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3A0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3A0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3A0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3A0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3A4 "IMNTRCR233,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3A4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3A4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3A4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3A4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3A4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3A4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3A4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3A4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3A8 "IMNTRCR234,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3A8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3A8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3A8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3A8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3A8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3A8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3A8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3A8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3AC "IMNTRCR235,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3AC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3AC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3AC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3AC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3AC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3AC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3AC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3AC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3B0 "IMNTRCR236,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3B0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3B0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3B0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3B0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3B0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3B0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3B0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3B0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3B4 "IMNTRCR237,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3B4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3B4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3B4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3B4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3B4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3B4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3B4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3B4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3B8 "IMNTRCR238,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3B8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3B8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3B8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3B8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3B8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3B8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3B8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3B8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3BC "IMNTRCR239,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3BC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3BC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3BC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3BC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3BC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3BC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3BC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3BC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3C0 "IMNTRCR240,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3C0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3C0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3C0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3C0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3C0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3C0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3C0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3C0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3C4 "IMNTRCR241,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3C4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3C4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3C4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3C4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3C4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3C4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3C4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3C4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3C8 "IMNTRCR242,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3C8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3C8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3C8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3C8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3C8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3C8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3C8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3C8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3CC "IMNTRCR243,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3CC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3CC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3CC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3CC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3CC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3CC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3CC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3CC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3D0 "IMNTRCR244,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3D0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3D0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3D0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3D0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3D0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3D0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3D0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3D0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3D4 "IMNTRCR245,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3D4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3D4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3D4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3D4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3D4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3D4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3D4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3D4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3D8 "IMNTRCR246,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3D8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3D8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3D8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3D8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3D8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3D8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3D8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3D8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3DC "IMNTRCR247,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3DC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3DC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3DC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3DC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3DC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3DC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3DC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3DC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3E0 "IMNTRCR248,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3E0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3E0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3E0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3E0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3E0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3E0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3E0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3E0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3E4 "IMNTRCR249,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3E4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3E4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3E4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3E4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3E4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3E4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3E4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3E4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3E8 "IMNTRCR250,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3E8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3E8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3E8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3E8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3E8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3E8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3E8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3E8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3EC "IMNTRCR251,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3EC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3EC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3EC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3EC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3EC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3EC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3EC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3EC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3F0 "IMNTRCR252,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3F0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3F0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3F0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3F0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3F0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3F0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3F0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3F0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3F4 "IMNTRCR253,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3F4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3F4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3F4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3F4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3F4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3F4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3F4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3F4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3F8 "IMNTRCR254,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3F8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3F8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3F8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3F8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3F8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3F8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3F8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3F8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x3FC "IMNTRCR255,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3FC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x3FC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x3FC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x3FC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x3FC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x3FC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x3FC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x3FC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x400 "IMNTRCR256,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x400 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x400 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x400 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x400 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x400 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x400 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x400 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x400 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x404 "IMNTRCR257,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x404 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x404 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x404 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x404 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x404 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x404 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x404 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x404 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x408 "IMNTRCR258,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x408 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x408 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x408 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x408 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x408 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x408 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x408 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x408 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x40C "IMNTRCR259,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x40C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x40C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x40C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x40C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x40C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x40C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x40C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x40C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x410 "IMNTRCR260,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x410 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x410 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x410 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x410 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x410 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x410 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x410 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x410 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x414 "IMNTRCR261,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x414 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x414 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x414 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x414 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x414 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x414 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x414 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x414 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x418 "IMNTRCR262,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x418 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x418 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x418 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x418 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x418 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x418 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x418 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x418 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x41C "IMNTRCR263,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x41C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x41C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x41C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x41C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x41C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x41C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x41C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x41C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x420 "IMNTRCR264,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x420 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x420 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x420 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x420 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x420 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x420 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x420 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x420 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x424 "IMNTRCR265,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x424 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x424 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x424 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x424 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x424 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x424 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x424 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x424 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x428 "IMNTRCR266,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x428 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x428 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x428 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x428 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x428 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x428 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x428 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x428 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x42C "IMNTRCR267,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x42C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x42C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x42C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x42C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x42C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x42C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x42C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x42C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x430 "IMNTRCR268,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x430 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x430 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x430 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x430 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x430 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x430 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x430 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x430 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x434 "IMNTRCR269,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x434 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x434 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x434 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x434 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x434 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x434 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x434 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x434 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x438 "IMNTRCR270,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x438 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x438 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x438 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x438 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x438 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x438 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x438 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x438 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x43C "IMNTRCR271,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x43C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x43C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x43C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x43C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x43C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x43C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x43C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x43C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x440 "IMNTRCR272,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x440 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x440 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x440 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x440 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x440 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x440 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x440 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x440 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x444 "IMNTRCR273,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x444 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x444 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x444 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x444 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x444 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x444 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x444 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x444 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x448 "IMNTRCR274,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x448 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x448 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x448 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x448 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x448 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x448 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x448 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x448 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x44C "IMNTRCR275,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x44C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x44C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x44C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x44C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x44C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x44C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x44C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x44C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x450 "IMNTRCR276,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x450 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x450 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x450 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x450 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x450 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x450 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x450 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x450 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x454 "IMNTRCR277,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x454 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x454 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x454 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x454 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x454 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x454 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x454 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x454 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x458 "IMNTRCR278,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x458 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x458 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x458 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x458 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x458 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x458 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x458 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x458 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x45C "IMNTRCR279,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x45C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x45C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x45C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x45C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x45C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x45C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x45C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x45C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x460 "IMNTRCR280,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x460 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x460 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x460 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x460 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x460 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x460 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x460 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x460 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x464 "IMNTRCR281,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x464 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x464 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x464 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x464 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x464 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x464 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x464 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x464 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x468 "IMNTRCR282,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x468 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x468 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x468 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x468 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x468 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x468 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x468 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x468 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x46C "IMNTRCR283,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x46C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x46C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x46C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x46C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x46C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x46C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x46C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x46C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x470 "IMNTRCR284,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x470 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x470 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x470 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x470 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x470 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x470 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x470 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x470 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x474 "IMNTRCR285,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x474 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x474 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x474 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x474 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x474 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x474 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x474 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x474 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x478 "IMNTRCR286,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x478 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x478 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x478 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x478 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x478 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x478 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x478 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x478 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x47C "IMNTRCR287,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x47C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x47C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x47C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x47C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x47C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x47C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x47C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x47C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x480 "IMNTRCR288,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x480 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x480 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x480 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x480 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x480 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x480 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x480 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x480 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x484 "IMNTRCR289,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x484 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x484 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x484 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x484 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x484 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x484 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x484 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x484 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x488 "IMNTRCR290,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x488 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x488 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x488 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x488 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x488 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x488 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x488 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x488 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x48C "IMNTRCR291,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x48C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x48C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x48C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x48C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x48C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x48C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x48C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x48C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x490 "IMNTRCR292,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x490 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x490 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x490 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x490 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x490 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x490 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x490 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x490 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x494 "IMNTRCR293,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x494 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x494 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x494 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x494 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x494 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x494 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x494 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x494 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x498 "IMNTRCR294,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x498 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x498 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x498 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x498 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x498 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x498 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x498 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x498 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x49C "IMNTRCR295,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x49C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x49C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x49C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x49C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x49C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x49C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x49C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x49C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4A0 "IMNTRCR296,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4A0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4A0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4A0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4A0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4A0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4A0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4A0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4A0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4A4 "IMNTRCR297,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4A4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4A4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4A4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4A4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4A4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4A4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4A4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4A4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4A8 "IMNTRCR298,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4A8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4A8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4A8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4A8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4A8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4A8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4A8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4A8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4AC "IMNTRCR299,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4AC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4AC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4AC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4AC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4AC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4AC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4AC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4AC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4B0 "IMNTRCR300,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4B0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4B0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4B0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4B0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4B0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4B0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4B0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4B0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4B4 "IMNTRCR301,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4B4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4B4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4B4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4B4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4B4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4B4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4B4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4B4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4B8 "IMNTRCR302,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4B8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4B8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4B8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4B8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4B8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4B8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4B8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4B8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4BC "IMNTRCR303,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4BC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4BC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4BC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4BC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4BC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4BC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4BC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4BC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4C0 "IMNTRCR304,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4C0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4C0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4C0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4C0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4C0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4C0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4C0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4C0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4C4 "IMNTRCR305,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4C4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4C4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4C4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4C4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4C4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4C4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4C4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4C4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4C8 "IMNTRCR306,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4C8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4C8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4C8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4C8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4C8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4C8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4C8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4C8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4CC "IMNTRCR307,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4CC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4CC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4CC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4CC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4CC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4CC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4CC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4CC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4D0 "IMNTRCR308,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4D0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4D0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4D0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4D0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4D0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4D0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4D0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4D0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4D4 "IMNTRCR309,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4D4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4D4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4D4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4D4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4D4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4D4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4D4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4D4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4D8 "IMNTRCR310,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4D8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4D8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4D8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4D8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4D8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4D8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4D8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4D8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4DC "IMNTRCR311,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4DC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4DC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4DC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4DC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4DC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4DC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4DC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4DC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4E0 "IMNTRCR312,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4E0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4E0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4E0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4E0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4E0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4E0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4E0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4E0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4E4 "IMNTRCR313,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4E4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4E4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4E4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4E4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4E4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4E4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4E4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4E4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4E8 "IMNTRCR314,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4E8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4E8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4E8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4E8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4E8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4E8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4E8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4E8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4EC "IMNTRCR315,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4EC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4EC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4EC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4EC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4EC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4EC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4EC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4EC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4F0 "IMNTRCR316,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4F0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4F0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4F0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4F0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4F0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4F0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4F0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4F0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4F4 "IMNTRCR317,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4F4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4F4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4F4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4F4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4F4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4F4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4F4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4F4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4F8 "IMNTRCR318,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4F8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4F8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4F8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4F8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4F8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4F8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4F8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4F8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x4FC "IMNTRCR319,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4FC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x4FC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x4FC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x4FC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x4FC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x4FC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x4FC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x4FC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x500 "IMNTRCR320,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x500 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x500 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x500 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x500 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x500 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x500 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x500 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x500 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x504 "IMNTRCR321,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x504 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x504 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x504 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x504 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x504 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x504 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x504 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x504 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x508 "IMNTRCR322,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x508 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x508 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x508 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x508 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x508 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x508 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x508 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x508 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x50C "IMNTRCR323,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x50C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x50C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x50C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x50C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x50C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x50C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x50C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x50C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x510 "IMNTRCR324,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x510 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x510 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x510 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x510 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x510 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x510 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x510 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x510 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x514 "IMNTRCR325,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x514 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x514 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x514 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x514 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x514 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x514 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x514 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x514 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x518 "IMNTRCR326,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x518 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x518 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x518 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x518 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x518 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x518 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x518 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x518 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x51C "IMNTRCR327,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x51C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x51C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x51C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x51C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x51C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x51C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x51C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x51C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x520 "IMNTRCR328,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x520 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x520 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x520 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x520 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x520 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x520 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x520 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x520 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x524 "IMNTRCR329,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x524 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x524 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x524 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x524 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x524 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x524 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x524 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x524 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x528 "IMNTRCR330,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x528 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x528 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x528 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x528 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x528 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x528 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x528 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x528 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x52C "IMNTRCR331,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x52C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x52C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x52C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x52C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x52C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x52C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x52C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x52C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x530 "IMNTRCR332,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x530 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x530 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x530 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x530 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x530 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x530 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x530 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x530 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x534 "IMNTRCR333,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x534 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x534 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x534 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x534 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x534 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x534 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x534 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x534 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x538 "IMNTRCR334,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x538 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x538 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x538 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x538 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x538 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x538 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x538 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x538 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x53C "IMNTRCR335,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x53C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x53C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x53C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x53C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x53C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x53C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x53C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x53C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x540 "IMNTRCR336,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x540 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x540 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x540 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x540 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x540 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x540 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x540 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x540 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x544 "IMNTRCR337,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x544 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x544 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x544 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x544 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x544 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x544 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x544 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x544 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x548 "IMNTRCR338,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x548 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x548 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x548 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x548 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x548 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x548 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x548 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x548 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x54C "IMNTRCR339,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x54C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x54C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x54C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x54C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x54C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x54C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x54C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x54C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x550 "IMNTRCR340,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x550 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x550 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x550 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x550 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x550 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x550 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x550 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x550 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x554 "IMNTRCR341,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x554 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x554 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x554 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x554 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x554 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x554 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x554 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x554 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x558 "IMNTRCR342,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x558 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x558 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x558 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x558 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x558 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x558 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x558 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x558 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x55C "IMNTRCR343,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x55C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x55C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x55C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x55C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x55C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x55C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x55C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x55C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x560 "IMNTRCR344,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x560 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x560 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x560 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x560 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x560 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x560 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x560 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x560 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x564 "IMNTRCR345,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x564 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x564 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x564 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x564 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x564 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x564 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x564 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x564 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x568 "IMNTRCR346,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x568 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x568 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x568 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x568 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x568 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x568 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x568 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x568 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x56C "IMNTRCR347,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x56C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x56C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x56C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x56C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x56C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x56C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x56C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x56C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x570 "IMNTRCR348,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x570 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x570 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x570 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x570 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x570 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x570 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x570 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x570 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x574 "IMNTRCR349,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x574 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x574 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x574 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x574 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x574 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x574 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x574 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x574 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x578 "IMNTRCR350,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x578 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x578 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x578 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x578 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x578 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x578 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x578 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x578 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x57C "IMNTRCR351,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x57C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x57C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x57C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x57C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x57C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x57C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x57C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x57C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x580 "IMNTRCR352,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x580 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x580 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x580 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x580 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x580 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x580 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x580 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x580 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x584 "IMNTRCR353,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x584 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x584 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x584 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x584 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x584 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x584 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x584 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x584 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x588 "IMNTRCR354,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x588 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x588 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x588 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x588 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x588 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x588 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x588 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x588 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x58C "IMNTRCR355,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x58C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x58C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x58C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x58C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x58C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x58C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x58C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x58C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x590 "IMNTRCR356,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x590 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x590 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x590 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x590 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x590 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x590 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x590 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x590 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x594 "IMNTRCR357,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x594 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x594 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x594 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x594 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x594 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x594 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x594 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x594 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x598 "IMNTRCR358,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x598 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x598 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x598 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x598 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x598 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x598 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x598 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x598 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x59C "IMNTRCR359,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x59C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x59C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x59C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x59C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x59C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x59C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x59C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x59C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5A0 "IMNTRCR360,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5A0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5A0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5A0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5A0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5A0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5A0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5A0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5A0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5A4 "IMNTRCR361,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5A4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5A4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5A4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5A4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5A4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5A4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5A4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5A4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5A8 "IMNTRCR362,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5A8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5A8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5A8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5A8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5A8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5A8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5A8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5A8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5AC "IMNTRCR363,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5AC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5AC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5AC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5AC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5AC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5AC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5AC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5AC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5B0 "IMNTRCR364,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5B0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5B0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5B0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5B0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5B0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5B0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5B0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5B0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5B4 "IMNTRCR365,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5B4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5B4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5B4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5B4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5B4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5B4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5B4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5B4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5B8 "IMNTRCR366,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5B8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5B8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5B8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5B8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5B8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5B8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5B8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5B8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5BC "IMNTRCR367,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5BC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5BC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5BC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5BC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5BC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5BC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5BC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5BC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5C0 "IMNTRCR368,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5C0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5C0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5C0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5C0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5C0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5C0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5C0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5C0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5C4 "IMNTRCR369,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5C4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5C4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5C4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5C4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5C4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5C4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5C4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5C4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5C8 "IMNTRCR370,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5C8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5C8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5C8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5C8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5C8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5C8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5C8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5C8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5CC "IMNTRCR371,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5CC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5CC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5CC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5CC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5CC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5CC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5CC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5CC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5D0 "IMNTRCR372,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5D0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5D0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5D0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5D0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5D0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5D0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5D0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5D0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5D4 "IMNTRCR373,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5D4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5D4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5D4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5D4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5D4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5D4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5D4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5D4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5D8 "IMNTRCR374,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5D8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5D8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5D8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5D8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5D8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5D8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5D8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5D8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5DC "IMNTRCR375,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5DC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5DC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5DC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5DC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5DC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5DC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5DC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5DC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5E0 "IMNTRCR376,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5E0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5E0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5E0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5E0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5E0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5E0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5E0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5E0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5E4 "IMNTRCR377,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5E4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5E4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5E4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5E4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5E4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5E4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5E4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5E4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5E8 "IMNTRCR378,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5E8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5E8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5E8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5E8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5E8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5E8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5E8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5E8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5EC "IMNTRCR379,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5EC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5EC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5EC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5EC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5EC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5EC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5EC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5EC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5F0 "IMNTRCR380,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5F0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5F0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5F0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5F0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5F0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5F0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5F0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5F0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5F4 "IMNTRCR381,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5F4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5F4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5F4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5F4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5F4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5F4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5F4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5F4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5F8 "IMNTRCR382,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5F8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5F8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5F8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5F8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5F8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5F8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5F8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5F8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x5FC "IMNTRCR383,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5FC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x5FC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x5FC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x5FC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x5FC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x5FC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x5FC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x5FC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x600 "IMNTRCR384,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x600 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x600 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x600 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x600 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x600 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x600 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x600 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x600 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x604 "IMNTRCR385,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x604 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x604 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x604 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x604 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x604 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x604 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x604 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x604 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x608 "IMNTRCR386,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x608 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x608 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x608 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x608 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x608 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x608 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x608 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x608 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x60C "IMNTRCR387,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x60C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x60C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x60C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x60C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x60C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x60C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x60C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x60C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x610 "IMNTRCR388,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x610 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x610 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x610 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x610 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x610 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x610 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x610 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x610 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x614 "IMNTRCR389,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x614 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x614 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x614 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x614 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x614 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x614 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x614 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x614 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x618 "IMNTRCR390,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x618 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x618 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x618 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x618 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x618 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x618 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x618 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x618 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x61C "IMNTRCR391,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x61C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x61C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x61C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x61C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x61C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x61C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x61C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x61C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x620 "IMNTRCR392,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x620 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x620 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x620 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x620 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x620 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x620 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x620 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x620 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x624 "IMNTRCR393,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x624 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x624 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x624 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x624 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x624 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x624 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x624 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x624 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x628 "IMNTRCR394,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x628 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x628 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x628 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x628 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x628 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x628 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x628 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x628 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x62C "IMNTRCR395,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x62C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x62C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x62C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x62C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x62C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x62C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x62C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x62C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x630 "IMNTRCR396,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x630 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x630 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x630 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x630 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x630 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x630 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x630 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x630 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x634 "IMNTRCR397,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x634 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x634 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x634 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x634 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x634 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x634 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x634 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x634 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x638 "IMNTRCR398,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x638 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x638 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x638 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x638 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x638 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x638 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x638 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x638 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x63C "IMNTRCR399,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x63C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x63C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x63C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x63C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x63C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x63C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x63C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x63C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x640 "IMNTRCR400,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x640 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x640 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x640 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x640 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x640 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x640 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x640 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x640 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x644 "IMNTRCR401,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x644 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x644 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x644 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x644 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x644 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x644 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x644 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x644 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x648 "IMNTRCR402,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x648 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x648 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x648 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x648 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x648 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x648 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x648 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x648 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x64C "IMNTRCR403,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x64C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x64C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x64C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x64C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x64C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x64C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x64C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x64C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x650 "IMNTRCR404,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x650 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x650 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x650 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x650 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x650 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x650 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x650 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x650 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x654 "IMNTRCR405,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x654 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x654 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x654 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x654 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x654 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x654 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x654 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x654 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x658 "IMNTRCR406,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x658 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x658 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x658 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x658 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x658 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x658 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x658 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x658 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x65C "IMNTRCR407,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x65C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x65C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x65C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x65C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x65C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x65C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x65C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x65C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x660 "IMNTRCR408,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x660 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x660 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x660 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x660 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x660 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x660 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x660 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x660 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x664 "IMNTRCR409,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x664 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x664 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x664 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x664 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x664 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x664 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x664 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x664 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x668 "IMNTRCR410,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x668 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x668 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x668 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x668 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x668 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x668 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x668 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x668 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x66C "IMNTRCR411,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x66C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x66C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x66C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x66C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x66C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x66C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x66C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x66C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x670 "IMNTRCR412,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x670 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x670 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x670 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x670 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x670 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x670 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x670 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x670 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x674 "IMNTRCR413,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x674 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x674 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x674 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x674 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x674 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x674 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x674 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x674 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x678 "IMNTRCR414,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x678 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x678 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x678 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x678 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x678 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x678 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x678 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x678 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x67C "IMNTRCR415,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x67C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x67C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x67C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x67C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x67C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x67C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x67C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x67C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x680 "IMNTRCR416,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x680 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x680 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x680 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x680 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x680 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x680 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x680 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x680 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x684 "IMNTRCR417,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x684 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x684 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x684 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x684 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x684 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x684 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x684 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x684 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x688 "IMNTRCR418,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x688 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x688 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x688 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x688 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x688 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x688 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x688 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x688 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x68C "IMNTRCR419,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x68C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x68C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x68C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x68C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x68C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x68C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x68C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x68C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x690 "IMNTRCR420,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x690 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x690 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x690 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x690 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x690 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x690 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x690 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x690 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x694 "IMNTRCR421,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x694 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x694 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x694 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x694 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x694 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x694 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x694 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x694 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x698 "IMNTRCR422,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x698 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x698 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x698 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x698 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x698 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x698 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x698 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x698 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x69C "IMNTRCR423,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x69C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x69C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x69C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x69C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x69C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x69C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x69C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x69C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6A0 "IMNTRCR424,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6A0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6A0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6A0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6A0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6A0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6A0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6A0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6A0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6A4 "IMNTRCR425,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6A4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6A4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6A4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6A4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6A4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6A4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6A4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6A4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6A8 "IMNTRCR426,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6A8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6A8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6A8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6A8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6A8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6A8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6A8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6A8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6AC "IMNTRCR427,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6AC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6AC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6AC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6AC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6AC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6AC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6AC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6AC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6B0 "IMNTRCR428,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6B0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6B0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6B0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6B0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6B0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6B0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6B0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6B0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6B4 "IMNTRCR429,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6B4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6B4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6B4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6B4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6B4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6B4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6B4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6B4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6B8 "IMNTRCR430,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6B8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6B8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6B8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6B8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6B8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6B8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6B8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6B8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6BC "IMNTRCR431,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6BC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6BC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6BC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6BC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6BC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6BC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6BC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6BC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6C0 "IMNTRCR432,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6C0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6C0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6C0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6C0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6C0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6C0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6C0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6C0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6C4 "IMNTRCR433,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6C4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6C4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6C4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6C4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6C4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6C4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6C4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6C4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6C8 "IMNTRCR434,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6C8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6C8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6C8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6C8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6C8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6C8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6C8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6C8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6CC "IMNTRCR435,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6CC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6CC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6CC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6CC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6CC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6CC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6CC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6CC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6D0 "IMNTRCR436,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6D0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6D0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6D0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6D0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6D0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6D0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6D0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6D0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6D4 "IMNTRCR437,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6D4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6D4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6D4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6D4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6D4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6D4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6D4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6D4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6D8 "IMNTRCR438,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6D8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6D8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6D8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6D8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6D8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6D8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6D8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6D8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6DC "IMNTRCR439,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6DC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6DC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6DC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6DC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6DC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6DC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6DC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6DC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6E0 "IMNTRCR440,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6E0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6E0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6E0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6E0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6E0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6E0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6E0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6E0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6E4 "IMNTRCR441,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6E4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6E4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6E4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6E4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6E4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6E4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6E4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6E4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6E8 "IMNTRCR442,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6E8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6E8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6E8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6E8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6E8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6E8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6E8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6E8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6EC "IMNTRCR443,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6EC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6EC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6EC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6EC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6EC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6EC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6EC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6EC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6F0 "IMNTRCR444,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6F0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6F0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6F0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6F0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6F0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6F0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6F0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6F0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6F4 "IMNTRCR445,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6F4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6F4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6F4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6F4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6F4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6F4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6F4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6F4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6F8 "IMNTRCR446,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6F8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6F8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6F8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6F8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6F8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6F8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6F8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6F8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x6FC "IMNTRCR447,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6FC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x6FC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x6FC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x6FC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x6FC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x6FC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x6FC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x6FC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x700 "IMNTRCR448,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x700 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x700 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x700 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x700 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x700 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x700 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x700 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x700 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x704 "IMNTRCR449,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x704 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x704 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x704 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x704 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x704 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x704 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x704 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x704 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x708 "IMNTRCR450,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x708 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x708 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x708 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x708 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x708 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x708 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x708 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x708 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x70C "IMNTRCR451,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x70C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x70C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x70C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x70C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x70C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x70C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x70C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x70C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x710 "IMNTRCR452,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x710 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x710 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x710 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x710 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x710 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x710 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x710 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x710 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x714 "IMNTRCR453,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x714 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x714 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x714 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x714 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x714 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x714 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x714 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x714 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x718 "IMNTRCR454,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x718 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x718 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x718 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x718 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x718 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x718 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x718 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x718 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x71C "IMNTRCR455,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x71C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x71C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x71C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x71C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x71C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x71C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x71C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x71C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x720 "IMNTRCR456,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x720 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x720 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x720 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x720 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x720 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x720 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x720 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x720 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x724 "IMNTRCR457,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x724 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x724 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x724 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x724 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x724 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x724 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x724 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x724 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x728 "IMNTRCR458,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x728 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x728 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x728 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x728 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x728 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x728 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x728 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x728 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x72C "IMNTRCR459,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x72C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x72C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x72C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x72C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x72C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x72C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x72C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x72C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x730 "IMNTRCR460,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x730 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x730 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x730 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x730 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x730 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x730 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x730 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x730 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x734 "IMNTRCR461,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x734 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x734 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x734 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x734 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x734 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x734 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x734 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x734 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x738 "IMNTRCR462,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x738 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x738 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x738 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x738 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x738 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x738 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x738 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x738 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x73C "IMNTRCR463,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x73C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x73C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x73C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x73C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x73C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x73C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x73C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x73C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x740 "IMNTRCR464,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x740 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x740 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x740 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x740 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x740 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x740 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x740 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x740 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x744 "IMNTRCR465,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x744 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x744 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x744 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x744 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x744 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x744 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x744 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x744 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x748 "IMNTRCR466,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x748 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x748 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x748 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x748 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x748 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x748 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x748 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x748 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x74C "IMNTRCR467,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x74C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x74C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x74C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x74C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x74C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x74C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x74C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x74C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x750 "IMNTRCR468,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x750 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x750 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x750 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x750 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x750 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x750 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x750 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x750 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x754 "IMNTRCR469,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x754 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x754 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x754 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x754 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x754 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x754 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x754 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x754 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x758 "IMNTRCR470,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x758 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x758 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x758 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x758 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x758 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x758 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x758 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x758 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x75C "IMNTRCR471,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x75C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x75C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x75C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x75C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x75C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x75C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x75C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x75C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x760 "IMNTRCR472,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x760 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x760 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x760 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x760 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x760 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x760 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x760 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x760 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x764 "IMNTRCR473,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x764 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x764 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x764 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x764 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x764 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x764 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x764 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x764 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x768 "IMNTRCR474,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x768 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x768 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x768 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x768 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x768 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x768 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x768 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x768 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x76C "IMNTRCR475,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x76C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x76C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x76C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x76C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x76C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x76C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x76C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x76C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x770 "IMNTRCR476,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x770 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x770 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x770 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x770 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x770 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x770 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x770 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x770 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x774 "IMNTRCR477,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x774 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x774 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x774 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x774 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x774 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x774 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x774 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x774 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x778 "IMNTRCR478,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x778 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x778 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x778 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x778 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x778 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x778 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x778 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x778 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x77C "IMNTRCR479,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x77C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x77C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x77C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x77C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x77C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x77C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x77C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x77C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x780 "IMNTRCR480,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x780 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x780 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x780 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x780 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x780 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x780 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x780 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x780 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x784 "IMNTRCR481,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x784 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x784 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x784 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x784 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x784 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x784 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x784 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x784 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x788 "IMNTRCR482,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x788 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x788 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x788 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x788 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x788 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x788 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x788 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x788 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x78C "IMNTRCR483,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x78C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x78C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x78C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x78C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x78C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x78C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x78C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x78C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x790 "IMNTRCR484,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x790 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x790 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x790 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x790 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x790 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x790 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x790 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x790 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x794 "IMNTRCR485,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x794 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x794 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x794 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x794 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x794 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x794 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x794 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x794 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x798 "IMNTRCR486,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x798 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x798 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x798 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x798 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x798 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x798 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x798 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x798 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x79C "IMNTRCR487,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x79C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x79C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x79C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x79C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x79C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x79C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x79C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x79C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7A0 "IMNTRCR488,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7A0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7A0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7A0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7A0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7A0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7A0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7A0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7A0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7A4 "IMNTRCR489,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7A4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7A4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7A4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7A4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7A4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7A4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7A4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7A4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7A8 "IMNTRCR490,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7A8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7A8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7A8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7A8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7A8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7A8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7A8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7A8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7AC "IMNTRCR491,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7AC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7AC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7AC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7AC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7AC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7AC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7AC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7AC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7B0 "IMNTRCR492,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7B0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7B0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7B0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7B0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7B0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7B0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7B0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7B0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7B4 "IMNTRCR493,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7B4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7B4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7B4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7B4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7B4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7B4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7B4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7B4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7B8 "IMNTRCR494,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7B8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7B8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7B8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7B8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7B8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7B8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7B8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7B8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7BC "IMNTRCR495,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7BC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7BC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7BC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7BC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7BC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7BC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7BC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7BC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7C0 "IMNTRCR496,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7C0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7C0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7C0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7C0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7C0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7C0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7C0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7C0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7C4 "IMNTRCR497,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7C4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7C4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7C4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7C4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7C4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7C4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7C4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7C4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7C8 "IMNTRCR498,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7C8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7C8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7C8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7C8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7C8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7C8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7C8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7C8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7CC "IMNTRCR499,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7CC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7CC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7CC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7CC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7CC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7CC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7CC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7CC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7D0 "IMNTRCR500,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7D0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7D0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7D0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7D0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7D0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7D0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7D0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7D0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7D4 "IMNTRCR501,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7D4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7D4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7D4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7D4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7D4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7D4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7D4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7D4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7D8 "IMNTRCR502,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7D8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7D8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7D8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7D8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7D8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7D8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7D8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7D8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7DC "IMNTRCR503,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7DC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7DC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7DC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7DC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7DC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7DC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7DC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7DC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7E0 "IMNTRCR504,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7E0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7E0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7E0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7E0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7E0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7E0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7E0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7E0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7E4 "IMNTRCR505,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7E4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7E4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7E4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7E4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7E4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7E4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7E4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7E4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7E8 "IMNTRCR506,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7E8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7E8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7E8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7E8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7E8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7E8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7E8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7E8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7EC "IMNTRCR507,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7EC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7EC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7EC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7EC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7EC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7EC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7EC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7EC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7F0 "IMNTRCR508,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7F0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7F0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7F0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7F0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7F0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7F0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7F0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7F0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7F4 "IMNTRCR509,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7F4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7F4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7F4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7F4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7F4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7F4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7F4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7F4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7F8 "IMNTRCR510,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7F8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7F8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7F8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7F8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7F8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7F8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7F8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7F8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x7FC "IMNTRCR511,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7FC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x7FC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x7FC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x7FC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x7FC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x7FC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x7FC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x7FC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x800 "IMNTRCR512,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x800 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x800 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x800 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x800 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x800 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x800 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x800 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x800 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x804 "IMNTRCR513,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x804 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x804 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x804 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x804 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x804 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x804 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x804 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x804 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x808 "IMNTRCR514,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x808 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x808 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x808 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x808 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x808 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x808 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x808 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x808 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x80C "IMNTRCR515,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x80C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x80C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x80C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x80C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x80C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x80C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x80C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x80C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x810 "IMNTRCR516,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x810 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x810 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x810 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x810 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x810 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x810 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x810 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x810 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x814 "IMNTRCR517,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x814 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x814 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x814 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x814 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x814 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x814 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x814 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x814 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x818 "IMNTRCR518,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x818 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x818 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x818 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x818 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x818 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x818 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x818 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x818 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x81C "IMNTRCR519,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x81C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x81C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x81C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x81C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x81C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x81C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x81C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x81C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x820 "IMNTRCR520,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x820 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x820 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x820 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x820 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x820 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x820 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x820 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x820 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x824 "IMNTRCR521,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x824 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x824 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x824 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x824 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x824 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x824 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x824 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x824 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x828 "IMNTRCR522,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x828 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x828 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x828 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x828 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x828 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x828 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x828 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x828 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x82C "IMNTRCR523,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x82C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x82C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x82C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x82C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x82C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x82C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x82C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x82C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x830 "IMNTRCR524,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x830 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x830 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x830 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x830 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x830 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x830 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x830 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x830 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x834 "IMNTRCR525,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x834 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x834 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x834 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x834 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x834 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x834 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x834 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x834 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x838 "IMNTRCR526,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x838 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x838 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x838 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x838 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x838 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x838 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x838 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x838 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x83C "IMNTRCR527,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x83C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x83C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x83C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x83C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x83C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x83C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x83C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x83C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x840 "IMNTRCR528,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x840 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x840 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x840 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x840 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x840 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x840 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x840 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x840 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x844 "IMNTRCR529,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x844 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x844 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x844 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x844 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x844 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x844 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x844 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x844 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x848 "IMNTRCR530,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x848 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x848 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x848 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x848 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x848 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x848 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x848 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x848 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x84C "IMNTRCR531,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x84C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x84C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x84C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x84C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x84C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x84C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x84C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x84C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x850 "IMNTRCR532,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x850 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x850 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x850 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x850 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x850 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x850 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x850 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x850 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x854 "IMNTRCR533,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x854 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x854 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x854 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x854 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x854 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x854 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x854 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x854 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x858 "IMNTRCR534,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x858 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x858 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x858 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x858 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x858 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x858 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x858 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x858 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x85C "IMNTRCR535,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x85C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x85C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x85C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x85C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x85C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x85C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x85C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x85C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x860 "IMNTRCR536,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x860 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x860 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x860 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x860 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x860 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x860 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x860 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x860 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x864 "IMNTRCR537,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x864 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x864 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x864 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x864 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x864 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x864 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x864 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x864 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x868 "IMNTRCR538,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x868 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x868 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x868 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x868 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x868 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x868 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x868 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x868 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x86C "IMNTRCR539,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x86C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x86C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x86C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x86C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x86C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x86C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x86C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x86C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x870 "IMNTRCR540,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x870 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x870 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x870 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x870 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x870 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x870 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x870 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x870 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x874 "IMNTRCR541,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x874 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x874 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x874 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x874 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x874 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x874 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x874 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x874 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x878 "IMNTRCR542,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x878 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x878 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x878 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x878 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x878 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x878 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x878 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x878 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x87C "IMNTRCR543,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x87C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x87C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x87C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x87C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x87C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x87C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x87C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x87C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x880 "IMNTRCR544,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x880 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x880 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x880 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x880 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x880 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x880 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x880 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x880 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x884 "IMNTRCR545,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x884 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x884 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x884 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x884 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x884 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x884 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x884 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x884 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x888 "IMNTRCR546,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x888 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x888 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x888 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x888 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x888 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x888 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x888 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x888 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x88C "IMNTRCR547,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x88C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x88C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x88C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x88C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x88C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x88C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x88C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x88C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x890 "IMNTRCR548,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x890 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x890 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x890 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x890 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x890 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x890 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x890 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x890 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x894 "IMNTRCR549,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x894 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x894 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x894 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x894 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x894 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x894 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x894 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x894 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x898 "IMNTRCR550,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x898 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x898 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x898 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x898 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x898 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x898 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x898 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x898 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x89C "IMNTRCR551,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x89C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x89C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x89C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x89C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x89C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x89C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x89C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x89C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8A0 "IMNTRCR552,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8A0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8A0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8A0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8A0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8A0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8A0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8A0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8A0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8A4 "IMNTRCR553,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8A4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8A4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8A4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8A4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8A4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8A4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8A4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8A4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8A8 "IMNTRCR554,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8A8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8A8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8A8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8A8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8A8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8A8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8A8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8A8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8AC "IMNTRCR555,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8AC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8AC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8AC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8AC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8AC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8AC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8AC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8AC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8B0 "IMNTRCR556,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8B0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8B0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8B0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8B0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8B0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8B0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8B0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8B0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8B4 "IMNTRCR557,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8B4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8B4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8B4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8B4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8B4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8B4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8B4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8B4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8B8 "IMNTRCR558,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8B8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8B8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8B8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8B8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8B8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8B8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8B8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8B8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8BC "IMNTRCR559,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8BC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8BC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8BC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8BC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8BC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8BC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8BC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8BC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8C0 "IMNTRCR560,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8C0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8C0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8C0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8C0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8C0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8C0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8C0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8C0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8C4 "IMNTRCR561,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8C4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8C4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8C4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8C4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8C4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8C4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8C4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8C4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8C8 "IMNTRCR562,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8C8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8C8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8C8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8C8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8C8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8C8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8C8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8C8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8CC "IMNTRCR563,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8CC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8CC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8CC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8CC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8CC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8CC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8CC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8CC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8D0 "IMNTRCR564,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8D0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8D0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8D0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8D0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8D0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8D0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8D0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8D0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8D4 "IMNTRCR565,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8D4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8D4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8D4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8D4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8D4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8D4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8D4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8D4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8D8 "IMNTRCR566,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8D8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8D8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8D8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8D8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8D8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8D8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8D8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8D8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8DC "IMNTRCR567,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8DC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8DC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8DC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8DC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8DC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8DC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8DC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8DC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8E0 "IMNTRCR568,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8E0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8E0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8E0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8E0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8E0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8E0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8E0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8E0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8E4 "IMNTRCR569,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8E4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8E4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8E4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8E4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8E4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8E4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8E4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8E4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8E8 "IMNTRCR570,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8E8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8E8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8E8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8E8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8E8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8E8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8E8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8E8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8EC "IMNTRCR571,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8EC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8EC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8EC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8EC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8EC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8EC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8EC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8EC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8F0 "IMNTRCR572,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8F0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8F0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8F0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8F0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8F0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8F0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8F0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8F0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8F4 "IMNTRCR573,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8F4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8F4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8F4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8F4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8F4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8F4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8F4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8F4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8F8 "IMNTRCR574,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8F8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8F8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8F8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8F8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8F8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8F8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8F8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8F8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x8FC "IMNTRCR575,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8FC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x8FC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x8FC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x8FC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x8FC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x8FC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x8FC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x8FC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x900 "IMNTRCR576,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x900 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x900 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x900 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x900 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x900 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x900 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x900 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x900 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x904 "IMNTRCR577,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x904 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x904 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x904 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x904 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x904 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x904 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x904 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x904 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x908 "IMNTRCR578,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x908 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x908 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x908 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x908 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x908 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x908 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x908 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x908 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x90C "IMNTRCR579,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x90C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x90C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x90C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x90C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x90C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x90C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x90C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x90C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x910 "IMNTRCR580,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x910 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x910 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x910 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x910 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x910 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x910 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x910 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x910 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x914 "IMNTRCR581,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x914 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x914 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x914 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x914 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x914 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x914 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x914 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x914 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x918 "IMNTRCR582,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x918 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x918 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x918 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x918 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x918 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x918 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x918 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x918 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x91C "IMNTRCR583,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x91C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x91C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x91C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x91C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x91C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x91C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x91C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x91C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x920 "IMNTRCR584,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x920 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x920 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x920 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x920 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x920 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x920 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x920 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x920 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x924 "IMNTRCR585,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x924 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x924 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x924 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x924 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x924 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x924 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x924 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x924 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x928 "IMNTRCR586,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x928 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x928 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x928 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x928 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x928 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x928 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x928 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x928 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x92C "IMNTRCR587,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x92C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x92C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x92C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x92C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x92C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x92C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x92C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x92C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x930 "IMNTRCR588,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x930 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x930 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x930 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x930 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x930 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x930 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x930 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x930 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x934 "IMNTRCR589,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x934 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x934 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x934 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x934 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x934 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x934 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x934 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x934 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x938 "IMNTRCR590,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x938 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x938 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x938 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x938 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x938 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x938 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x938 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x938 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x93C "IMNTRCR591,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x93C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x93C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x93C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x93C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x93C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x93C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x93C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x93C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x940 "IMNTRCR592,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x940 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x940 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x940 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x940 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x940 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x940 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x940 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x940 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x944 "IMNTRCR593,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x944 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x944 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x944 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x944 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x944 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x944 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x944 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x944 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x948 "IMNTRCR594,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x948 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x948 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x948 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x948 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x948 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x948 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x948 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x948 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x94C "IMNTRCR595,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x94C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x94C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x94C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x94C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x94C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x94C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x94C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x94C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x950 "IMNTRCR596,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x950 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x950 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x950 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x950 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x950 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x950 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x950 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x950 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x954 "IMNTRCR597,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x954 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x954 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x954 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x954 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x954 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x954 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x954 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x954 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x958 "IMNTRCR598,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x958 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x958 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x958 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x958 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x958 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x958 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x958 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x958 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x95C "IMNTRCR599,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x95C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x95C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x95C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x95C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x95C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x95C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x95C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x95C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x960 "IMNTRCR600,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x960 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x960 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x960 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x960 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x960 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x960 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x960 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x960 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x964 "IMNTRCR601,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x964 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x964 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x964 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x964 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x964 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x964 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x964 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x964 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x968 "IMNTRCR602,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x968 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x968 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x968 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x968 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x968 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x968 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x968 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x968 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x96C "IMNTRCR603,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x96C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x96C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x96C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x96C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x96C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x96C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x96C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x96C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x970 "IMNTRCR604,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x970 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x970 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x970 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x970 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x970 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x970 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x970 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x970 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x974 "IMNTRCR605,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x974 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x974 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x974 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x974 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x974 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x974 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x974 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x974 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x978 "IMNTRCR606,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x978 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x978 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x978 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x978 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x978 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x978 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x978 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x978 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x97C "IMNTRCR607,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x97C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x97C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x97C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x97C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x97C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x97C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x97C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x97C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x980 "IMNTRCR608,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x980 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x980 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x980 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x980 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x980 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x980 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x980 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x980 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x984 "IMNTRCR609,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x984 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x984 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x984 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x984 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x984 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x984 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x984 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x984 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x988 "IMNTRCR610,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x988 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x988 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x988 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x988 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x988 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x988 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x988 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x988 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x98C "IMNTRCR611,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x98C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x98C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x98C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x98C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x98C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x98C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x98C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x98C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x990 "IMNTRCR612,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x990 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x990 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x990 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x990 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x990 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x990 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x990 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x990 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x994 "IMNTRCR613,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x994 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x994 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x994 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x994 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x994 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x994 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x994 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x994 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x998 "IMNTRCR614,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x998 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x998 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x998 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x998 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x998 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x998 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x998 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x998 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x99C "IMNTRCR615,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x99C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x99C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x99C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x99C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x99C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x99C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x99C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x99C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9A0 "IMNTRCR616,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9A0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9A0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9A0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9A0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9A0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9A0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9A0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9A0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9A4 "IMNTRCR617,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9A4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9A4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9A4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9A4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9A4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9A4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9A4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9A4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9A8 "IMNTRCR618,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9A8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9A8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9A8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9A8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9A8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9A8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9A8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9A8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9AC "IMNTRCR619,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9AC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9AC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9AC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9AC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9AC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9AC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9AC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9AC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9B0 "IMNTRCR620,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9B0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9B0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9B0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9B0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9B0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9B0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9B0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9B0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9B4 "IMNTRCR621,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9B4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9B4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9B4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9B4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9B4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9B4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9B4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9B4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9B8 "IMNTRCR622,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9B8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9B8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9B8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9B8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9B8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9B8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9B8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9B8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9BC "IMNTRCR623,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9BC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9BC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9BC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9BC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9BC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9BC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9BC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9BC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9C0 "IMNTRCR624,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9C0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9C0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9C0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9C0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9C0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9C0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9C0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9C0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9C4 "IMNTRCR625,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9C4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9C4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9C4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9C4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9C4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9C4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9C4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9C4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9C8 "IMNTRCR626,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9C8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9C8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9C8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9C8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9C8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9C8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9C8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9C8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9CC "IMNTRCR627,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9CC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9CC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9CC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9CC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9CC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9CC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9CC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9CC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9D0 "IMNTRCR628,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9D0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9D0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9D0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9D0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9D0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9D0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9D0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9D0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9D4 "IMNTRCR629,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9D4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9D4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9D4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9D4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9D4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9D4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9D4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9D4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9D8 "IMNTRCR630,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9D8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9D8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9D8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9D8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9D8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9D8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9D8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9D8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9DC "IMNTRCR631,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9DC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9DC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9DC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9DC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9DC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9DC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9DC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9DC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9E0 "IMNTRCR632,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9E0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9E0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9E0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9E0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9E0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9E0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9E0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9E0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9E4 "IMNTRCR633,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9E4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9E4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9E4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9E4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9E4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9E4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9E4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9E4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9E8 "IMNTRCR634,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9E8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9E8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9E8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9E8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9E8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9E8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9E8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9E8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9EC "IMNTRCR635,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9EC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9EC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9EC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9EC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9EC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9EC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9EC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9EC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9F0 "IMNTRCR636,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9F0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9F0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9F0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9F0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9F0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9F0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9F0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9F0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9F4 "IMNTRCR637,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9F4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9F4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9F4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9F4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9F4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9F4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9F4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9F4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9F8 "IMNTRCR638,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9F8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9F8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9F8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9F8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9F8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9F8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9F8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9F8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0x9FC "IMNTRCR639,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9FC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0x9FC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0x9FC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0x9FC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0x9FC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0x9FC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0x9FC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0x9FC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA00 "IMNTRCR640,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA00 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA00 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA00 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA00 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA00 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA00 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA00 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA00 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA04 "IMNTRCR641,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA04 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA04 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA04 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA04 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA04 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA04 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA04 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA04 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA08 "IMNTRCR642,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA08 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA08 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA08 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA08 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA08 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA08 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA08 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA08 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA0C "IMNTRCR643,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA0C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA0C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA0C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA0C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA0C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA0C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA0C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA0C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA10 "IMNTRCR644,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA10 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA10 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA10 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA10 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA10 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA10 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA10 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA10 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA14 "IMNTRCR645,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA14 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA14 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA14 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA14 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA14 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA14 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA14 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA14 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA18 "IMNTRCR646,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA18 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA18 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA18 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA18 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA18 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA18 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA18 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA18 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA1C "IMNTRCR647,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA1C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA1C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA1C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA1C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA1C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA1C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA1C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA1C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA20 "IMNTRCR648,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA20 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA20 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA20 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA20 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA20 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA20 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA20 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA20 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA24 "IMNTRCR649,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA24 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA24 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA24 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA24 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA24 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA24 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA24 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA24 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA28 "IMNTRCR650,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA28 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA28 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA28 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA28 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA28 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA28 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA28 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA28 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA2C "IMNTRCR651,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA2C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA2C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA2C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA2C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA2C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA2C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA2C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA2C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA30 "IMNTRCR652,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA30 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA30 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA30 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA30 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA30 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA30 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA30 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA30 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA34 "IMNTRCR653,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA34 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA34 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA34 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA34 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA34 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA34 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA34 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA34 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA38 "IMNTRCR654,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA38 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA38 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA38 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA38 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA38 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA38 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA38 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA38 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA3C "IMNTRCR655,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA3C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA3C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA3C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA3C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA3C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA3C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA3C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA3C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA40 "IMNTRCR656,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA40 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA40 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA40 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA40 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA40 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA40 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA40 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA40 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA44 "IMNTRCR657,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA44 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA44 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA44 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA44 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA44 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA44 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA44 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA44 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA48 "IMNTRCR658,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA48 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA48 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA48 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA48 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA48 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA48 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA48 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA48 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA4C "IMNTRCR659,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA4C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA4C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA4C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA4C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA4C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA4C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA4C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA4C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA50 "IMNTRCR660,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA50 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA50 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA50 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA50 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA50 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA50 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA50 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA50 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA54 "IMNTRCR661,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA54 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA54 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA54 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA54 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA54 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA54 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA54 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA54 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA58 "IMNTRCR662,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA58 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA58 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA58 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA58 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA58 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA58 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA58 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA58 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA5C "IMNTRCR663,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA5C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA5C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA5C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA5C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA5C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA5C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA5C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA5C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA60 "IMNTRCR664,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA60 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA60 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA60 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA60 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA60 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA60 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA60 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA60 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA64 "IMNTRCR665,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA64 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA64 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA64 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA64 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA64 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA64 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA64 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA64 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA68 "IMNTRCR666,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA68 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA68 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA68 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA68 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA68 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA68 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA68 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA68 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA6C "IMNTRCR667,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA6C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA6C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA6C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA6C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA6C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA6C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA6C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA6C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA70 "IMNTRCR668,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA70 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA70 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA70 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA70 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA70 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA70 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA70 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA70 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA74 "IMNTRCR669,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA74 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA74 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA74 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA74 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA74 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA74 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA74 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA74 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA78 "IMNTRCR670,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA78 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA78 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA78 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA78 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA78 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA78 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA78 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA78 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA7C "IMNTRCR671,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA7C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA7C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA7C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA7C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA7C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA7C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA7C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA7C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA80 "IMNTRCR672,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA80 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA80 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA80 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA80 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA80 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA80 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA80 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA80 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA84 "IMNTRCR673,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA84 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA84 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA84 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA84 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA84 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA84 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA84 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA84 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA88 "IMNTRCR674,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA88 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA88 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA88 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA88 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA88 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA88 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA88 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA88 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA8C "IMNTRCR675,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA8C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA8C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA8C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA8C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA8C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA8C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA8C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA8C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA90 "IMNTRCR676,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA90 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA90 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA90 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA90 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA90 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA90 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA90 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA90 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA94 "IMNTRCR677,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA94 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA94 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA94 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA94 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA94 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA94 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA94 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA94 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA98 "IMNTRCR678,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA98 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA98 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA98 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA98 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA98 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA98 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA98 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA98 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xA9C "IMNTRCR679,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA9C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xA9C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xA9C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xA9C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xA9C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xA9C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xA9C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xA9C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAA0 "IMNTRCR680,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAA0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAA0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAA0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAA0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAA0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAA0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAA0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAA0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAA4 "IMNTRCR681,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAA4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAA4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAA4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAA4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAA4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAA4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAA4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAA4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAA8 "IMNTRCR682,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAA8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAA8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAA8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAA8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAA8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAA8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAA8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAA8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAAC "IMNTRCR683,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAAC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAAC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAAC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAAC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAAC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAAC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAAC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAAC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAB0 "IMNTRCR684,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAB0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAB0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAB0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAB0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAB0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAB0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAB0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAB0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAB4 "IMNTRCR685,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAB4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAB4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAB4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAB4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAB4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAB4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAB4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAB4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAB8 "IMNTRCR686,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAB8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAB8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAB8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAB8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAB8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAB8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAB8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAB8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xABC "IMNTRCR687,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xABC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xABC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xABC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xABC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xABC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xABC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xABC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xABC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAC0 "IMNTRCR688,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAC0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAC0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAC0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAC0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAC0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAC0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAC0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAC0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAC4 "IMNTRCR689,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAC4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAC4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAC4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAC4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAC4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAC4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAC4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAC4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAC8 "IMNTRCR690,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAC8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAC8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAC8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAC8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAC8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAC8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAC8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAC8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xACC "IMNTRCR691,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xACC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xACC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xACC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xACC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xACC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xACC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xACC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xACC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAD0 "IMNTRCR692,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAD0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAD0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAD0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAD0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAD0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAD0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAD0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAD0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAD4 "IMNTRCR693,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAD4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAD4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAD4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAD4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAD4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAD4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAD4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAD4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAD8 "IMNTRCR694,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAD8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAD8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAD8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAD8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAD8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAD8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAD8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAD8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xADC "IMNTRCR695,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xADC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xADC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xADC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xADC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xADC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xADC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xADC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xADC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAE0 "IMNTRCR696,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAE0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAE0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAE0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAE0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAE0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAE0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAE0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAE0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAE4 "IMNTRCR697,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAE4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAE4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAE4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAE4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAE4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAE4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAE4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAE4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAE8 "IMNTRCR698,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAE8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAE8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAE8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAE8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAE8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAE8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAE8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAE8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAEC "IMNTRCR699,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAEC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAEC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAEC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAEC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAEC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAEC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAEC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAEC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAF0 "IMNTRCR700,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAF0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAF0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAF0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAF0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAF0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAF0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAF0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAF0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAF4 "IMNTRCR701,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAF4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAF4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAF4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAF4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAF4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAF4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAF4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAF4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAF8 "IMNTRCR702,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAF8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAF8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAF8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAF8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAF8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAF8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAF8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAF8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xAFC "IMNTRCR703,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAFC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xAFC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xAFC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xAFC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xAFC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xAFC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xAFC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xAFC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB00 "IMNTRCR704,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB00 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB00 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB00 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB00 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB00 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB00 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB00 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB00 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB04 "IMNTRCR705,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB04 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB04 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB04 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB04 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB04 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB04 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB04 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB04 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB08 "IMNTRCR706,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB08 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB08 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB08 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB08 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB08 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB08 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB08 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB08 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB0C "IMNTRCR707,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB0C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB0C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB0C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB0C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB0C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB0C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB0C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB0C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB10 "IMNTRCR708,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB10 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB10 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB10 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB10 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB10 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB10 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB10 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB10 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB14 "IMNTRCR709,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB14 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB14 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB14 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB14 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB14 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB14 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB14 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB14 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB18 "IMNTRCR710,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB18 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB18 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB18 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB18 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB18 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB18 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB18 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB18 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB1C "IMNTRCR711,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB1C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB1C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB1C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB1C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB1C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB1C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB1C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB1C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB20 "IMNTRCR712,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB20 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB20 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB20 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB20 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB20 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB20 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB20 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB20 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB24 "IMNTRCR713,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB24 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB24 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB24 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB24 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB24 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB24 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB24 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB24 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB28 "IMNTRCR714,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB28 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB28 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB28 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB28 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB28 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB28 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB28 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB28 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB2C "IMNTRCR715,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB2C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB2C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB2C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB2C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB2C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB2C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB2C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB2C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB30 "IMNTRCR716,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB30 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB30 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB30 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB30 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB30 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB30 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB30 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB30 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB34 "IMNTRCR717,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB34 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB34 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB34 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB34 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB34 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB34 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB34 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB34 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB38 "IMNTRCR718,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB38 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB38 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB38 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB38 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB38 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB38 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB38 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB38 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB3C "IMNTRCR719,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB3C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB3C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB3C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB3C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB3C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB3C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB3C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB3C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB40 "IMNTRCR720,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB40 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB40 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB40 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB40 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB40 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB40 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB40 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB40 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB44 "IMNTRCR721,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB44 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB44 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB44 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB44 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB44 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB44 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB44 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB44 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB48 "IMNTRCR722,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB48 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB48 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB48 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB48 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB48 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB48 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB48 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB48 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB4C "IMNTRCR723,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB4C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB4C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB4C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB4C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB4C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB4C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB4C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB4C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB50 "IMNTRCR724,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB50 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB50 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB50 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB50 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB50 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB50 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB50 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB50 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB54 "IMNTRCR725,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB54 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB54 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB54 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB54 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB54 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB54 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB54 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB54 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB58 "IMNTRCR726,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB58 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB58 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB58 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB58 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB58 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB58 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB58 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB58 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB5C "IMNTRCR727,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB5C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB5C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB5C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB5C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB5C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB5C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB5C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB5C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB60 "IMNTRCR728,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB60 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB60 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB60 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB60 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB60 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB60 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB60 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB60 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB64 "IMNTRCR729,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB64 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB64 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB64 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB64 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB64 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB64 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB64 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB64 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB68 "IMNTRCR730,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB68 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB68 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB68 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB68 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB68 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB68 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB68 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB68 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB6C "IMNTRCR731,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB6C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB6C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB6C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB6C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB6C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB6C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB6C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB6C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB70 "IMNTRCR732,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB70 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB70 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB70 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB70 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB70 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB70 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB70 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB70 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB74 "IMNTRCR733,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB74 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB74 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB74 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB74 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB74 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB74 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB74 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB74 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB78 "IMNTRCR734,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB78 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB78 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB78 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB78 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB78 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB78 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB78 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB78 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB7C "IMNTRCR735,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB7C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB7C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB7C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB7C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB7C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB7C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB7C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB7C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB80 "IMNTRCR736,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB80 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB80 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB80 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB80 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB80 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB80 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB80 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB80 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB84 "IMNTRCR737,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB84 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB84 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB84 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB84 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB84 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB84 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB84 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB84 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB88 "IMNTRCR738,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB88 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB88 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB88 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB88 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB88 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB88 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB88 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB88 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB8C "IMNTRCR739,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB8C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB8C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB8C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB8C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB8C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB8C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB8C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB8C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB90 "IMNTRCR740,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB90 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB90 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB90 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB90 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB90 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB90 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB90 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB90 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB94 "IMNTRCR741,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB94 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB94 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB94 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB94 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB94 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB94 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB94 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB94 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB98 "IMNTRCR742,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB98 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB98 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB98 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB98 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB98 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB98 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB98 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB98 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xB9C "IMNTRCR743,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB9C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xB9C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xB9C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xB9C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xB9C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xB9C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xB9C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xB9C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBA0 "IMNTRCR744,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBA0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBA0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBA0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBA0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBA0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBA0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBA0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBA0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBA4 "IMNTRCR745,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBA4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBA4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBA4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBA4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBA4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBA4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBA4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBA4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBA8 "IMNTRCR746,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBA8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBA8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBA8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBA8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBA8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBA8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBA8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBA8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBAC "IMNTRCR747,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBAC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBAC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBAC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBAC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBAC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBAC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBAC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBAC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBB0 "IMNTRCR748,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBB0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBB0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBB0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBB0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBB0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBB0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBB0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBB0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBB4 "IMNTRCR749,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBB4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBB4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBB4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBB4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBB4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBB4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBB4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBB4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBB8 "IMNTRCR750,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBB8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBB8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBB8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBB8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBB8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBB8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBB8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBB8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBBC "IMNTRCR751,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBBC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBBC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBBC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBBC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBBC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBBC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBBC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBBC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBC0 "IMNTRCR752,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBC0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBC0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBC0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBC0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBC0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBC0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBC0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBC0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBC4 "IMNTRCR753,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBC4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBC4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBC4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBC4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBC4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBC4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBC4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBC4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBC8 "IMNTRCR754,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBC8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBC8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBC8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBC8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBC8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBC8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBC8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBC8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBCC "IMNTRCR755,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBCC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBCC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBCC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBCC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBCC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBCC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBCC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBCC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBD0 "IMNTRCR756,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBD0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBD0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBD0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBD0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBD0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBD0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBD0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBD0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBD4 "IMNTRCR757,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBD4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBD4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBD4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBD4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBD4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBD4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBD4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBD4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBD8 "IMNTRCR758,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBD8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBD8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBD8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBD8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBD8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBD8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBD8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBD8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBDC "IMNTRCR759,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBDC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBDC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBDC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBDC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBDC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBDC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBDC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBDC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBE0 "IMNTRCR760,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBE0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBE0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBE0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBE0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBE0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBE0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBE0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBE0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBE4 "IMNTRCR761,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBE4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBE4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBE4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBE4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBE4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBE4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBE4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBE4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBE8 "IMNTRCR762,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBE8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBE8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBE8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBE8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBE8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBE8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBE8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBE8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBEC "IMNTRCR763,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBEC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBEC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBEC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBEC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBEC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBEC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBEC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBEC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBF0 "IMNTRCR764,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBF0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBF0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBF0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBF0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBF0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBF0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBF0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBF0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBF4 "IMNTRCR765,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBF4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBF4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBF4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBF4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBF4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBF4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBF4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBF4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBF8 "IMNTRCR766,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBF8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBF8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBF8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBF8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBF8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBF8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBF8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBF8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xBFC "IMNTRCR767,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBFC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xBFC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xBFC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xBFC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xBFC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xBFC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xBFC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xBFC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC00 "IMNTRCR768,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC00 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC00 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC00 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC00 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC00 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC00 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC00 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC00 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC04 "IMNTRCR769,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC04 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC04 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC04 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC04 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC04 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC04 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC04 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC04 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC08 "IMNTRCR770,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC08 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC08 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC08 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC08 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC08 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC08 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC08 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC08 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC0C "IMNTRCR771,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC0C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC0C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC0C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC0C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC0C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC0C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC0C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC0C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC10 "IMNTRCR772,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC10 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC10 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC10 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC10 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC10 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC10 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC10 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC10 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC14 "IMNTRCR773,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC14 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC14 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC14 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC14 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC14 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC14 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC14 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC14 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC18 "IMNTRCR774,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC18 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC18 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC18 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC18 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC18 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC18 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC18 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC18 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC1C "IMNTRCR775,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC1C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC1C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC1C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC1C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC1C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC1C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC1C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC1C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC20 "IMNTRCR776,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC20 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC20 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC20 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC20 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC20 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC20 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC20 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC20 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC24 "IMNTRCR777,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC24 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC24 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC24 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC24 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC24 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC24 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC24 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC24 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC28 "IMNTRCR778,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC28 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC28 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC28 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC28 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC28 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC28 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC28 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC28 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC2C "IMNTRCR779,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC2C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC2C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC2C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC2C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC2C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC2C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC2C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC2C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC30 "IMNTRCR780,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC30 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC30 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC30 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC30 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC30 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC30 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC30 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC30 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC34 "IMNTRCR781,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC34 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC34 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC34 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC34 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC34 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC34 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC34 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC34 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC38 "IMNTRCR782,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC38 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC38 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC38 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC38 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC38 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC38 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC38 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC38 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC3C "IMNTRCR783,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC3C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC3C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC3C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC3C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC3C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC3C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC3C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC3C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC40 "IMNTRCR784,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC40 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC40 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC40 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC40 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC40 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC40 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC40 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC40 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC44 "IMNTRCR785,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC44 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC44 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC44 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC44 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC44 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC44 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC44 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC44 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC48 "IMNTRCR786,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC48 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC48 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC48 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC48 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC48 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC48 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC48 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC48 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC4C "IMNTRCR787,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC4C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC4C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC4C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC4C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC4C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC4C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC4C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC4C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC50 "IMNTRCR788,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC50 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC50 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC50 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC50 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC50 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC50 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC50 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC50 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC54 "IMNTRCR789,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC54 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC54 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC54 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC54 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC54 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC54 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC54 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC54 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC58 "IMNTRCR790,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC58 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC58 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC58 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC58 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC58 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC58 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC58 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC58 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC5C "IMNTRCR791,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC5C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC5C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC5C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC5C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC5C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC5C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC5C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC5C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC60 "IMNTRCR792,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC60 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC60 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC60 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC60 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC60 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC60 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC60 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC60 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC64 "IMNTRCR793,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC64 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC64 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC64 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC64 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC64 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC64 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC64 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC64 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC68 "IMNTRCR794,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC68 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC68 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC68 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC68 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC68 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC68 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC68 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC68 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC6C "IMNTRCR795,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC6C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC6C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC6C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC6C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC6C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC6C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC6C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC6C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC70 "IMNTRCR796,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC70 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC70 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC70 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC70 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC70 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC70 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC70 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC70 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC74 "IMNTRCR797,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC74 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC74 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC74 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC74 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC74 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC74 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC74 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC74 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC78 "IMNTRCR798,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC78 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC78 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC78 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC78 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC78 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC78 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC78 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC78 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC7C "IMNTRCR799,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC7C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC7C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC7C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC7C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC7C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC7C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC7C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC7C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC80 "IMNTRCR800,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC80 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC80 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC80 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC80 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC80 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC80 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC80 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC80 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC84 "IMNTRCR801,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC84 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC84 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC84 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC84 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC84 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC84 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC84 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC84 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC88 "IMNTRCR802,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC88 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC88 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC88 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC88 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC88 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC88 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC88 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC88 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC8C "IMNTRCR803,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC8C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC8C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC8C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC8C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC8C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC8C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC8C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC8C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC90 "IMNTRCR804,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC90 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC90 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC90 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC90 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC90 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC90 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC90 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC90 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC94 "IMNTRCR805,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC94 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC94 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC94 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC94 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC94 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC94 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC94 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC94 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC98 "IMNTRCR806,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC98 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC98 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC98 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC98 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC98 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC98 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC98 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC98 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xC9C "IMNTRCR807,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC9C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xC9C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xC9C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xC9C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xC9C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xC9C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xC9C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xC9C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCA0 "IMNTRCR808,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCA0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCA0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCA0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCA0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCA0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCA0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCA0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCA0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCA4 "IMNTRCR809,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCA4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCA4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCA4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCA4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCA4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCA4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCA4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCA4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCA8 "IMNTRCR810,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCA8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCA8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCA8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCA8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCA8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCA8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCA8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCA8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCAC "IMNTRCR811,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCAC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCAC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCAC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCAC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCAC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCAC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCAC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCAC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCB0 "IMNTRCR812,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCB0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCB0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCB0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCB0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCB0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCB0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCB0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCB0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCB4 "IMNTRCR813,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCB4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCB4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCB4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCB4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCB4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCB4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCB4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCB4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCB8 "IMNTRCR814,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCB8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCB8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCB8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCB8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCB8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCB8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCB8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCB8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCBC "IMNTRCR815,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCBC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCBC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCBC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCBC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCBC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCBC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCBC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCBC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCC0 "IMNTRCR816,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCC0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCC0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCC0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCC0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCC0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCC0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCC0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCC0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCC4 "IMNTRCR817,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCC4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCC4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCC4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCC4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCC4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCC4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCC4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCC4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCC8 "IMNTRCR818,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCC8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCC8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCC8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCC8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCC8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCC8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCC8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCC8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCCC "IMNTRCR819,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCCC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCCC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCCC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCCC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCCC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCCC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCCC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCCC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCD0 "IMNTRCR820,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCD0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCD0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCD0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCD0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCD0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCD0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCD0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCD0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCD4 "IMNTRCR821,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCD4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCD4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCD4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCD4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCD4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCD4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCD4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCD4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCD8 "IMNTRCR822,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCD8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCD8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCD8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCD8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCD8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCD8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCD8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCD8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCDC "IMNTRCR823,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCDC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCDC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCDC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCDC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCDC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCDC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCDC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCDC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCE0 "IMNTRCR824,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCE0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCE0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCE0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCE0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCE0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCE0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCE0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCE0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCE4 "IMNTRCR825,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCE4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCE4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCE4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCE4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCE4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCE4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCE4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCE4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCE8 "IMNTRCR826,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCE8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCE8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCE8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCE8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCE8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCE8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCE8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCE8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCEC "IMNTRCR827,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCEC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCEC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCEC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCEC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCEC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCEC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCEC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCEC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCF0 "IMNTRCR828,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCF0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCF0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCF0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCF0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCF0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCF0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCF0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCF0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCF4 "IMNTRCR829,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCF4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCF4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCF4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCF4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCF4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCF4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCF4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCF4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCF8 "IMNTRCR830,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCF8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCF8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCF8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCF8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCF8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCF8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCF8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCF8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xCFC "IMNTRCR831,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCFC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xCFC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xCFC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xCFC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xCFC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xCFC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xCFC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xCFC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD00 "IMNTRCR832,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD00 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD00 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD00 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD00 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD00 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD00 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD00 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD00 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD04 "IMNTRCR833,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD04 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD04 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD04 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD04 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD04 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD04 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD04 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD04 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD08 "IMNTRCR834,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD08 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD08 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD08 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD08 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD08 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD08 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD08 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD08 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD0C "IMNTRCR835,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD0C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD0C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD0C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD0C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD0C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD0C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD0C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD0C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD10 "IMNTRCR836,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD10 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD10 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD10 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD10 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD10 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD10 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD10 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD10 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD14 "IMNTRCR837,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD14 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD14 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD14 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD14 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD14 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD14 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD14 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD14 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD18 "IMNTRCR838,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD18 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD18 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD18 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD18 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD18 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD18 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD18 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD18 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD1C "IMNTRCR839,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD1C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD1C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD1C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD1C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD1C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD1C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD1C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD1C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD20 "IMNTRCR840,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD20 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD20 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD20 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD20 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD20 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD20 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD20 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD20 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD24 "IMNTRCR841,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD24 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD24 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD24 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD24 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD24 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD24 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD24 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD24 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD28 "IMNTRCR842,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD28 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD28 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD28 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD28 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD28 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD28 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD28 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD28 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD2C "IMNTRCR843,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD2C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD2C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD2C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD2C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD2C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD2C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD2C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD2C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD30 "IMNTRCR844,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD30 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD30 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD30 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD30 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD30 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD30 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD30 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD30 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD34 "IMNTRCR845,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD34 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD34 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD34 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD34 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD34 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD34 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD34 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD34 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD38 "IMNTRCR846,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD38 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD38 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD38 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD38 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD38 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD38 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD38 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD38 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD3C "IMNTRCR847,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD3C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD3C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD3C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD3C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD3C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD3C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD3C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD3C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD40 "IMNTRCR848,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD40 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD40 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD40 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD40 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD40 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD40 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD40 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD40 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD44 "IMNTRCR849,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD44 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD44 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD44 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD44 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD44 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD44 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD44 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD44 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD48 "IMNTRCR850,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD48 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD48 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD48 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD48 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD48 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD48 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD48 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD48 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD4C "IMNTRCR851,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD4C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD4C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD4C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD4C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD4C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD4C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD4C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD4C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD50 "IMNTRCR852,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD50 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD50 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD50 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD50 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD50 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD50 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD50 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD50 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD54 "IMNTRCR853,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD54 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD54 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD54 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD54 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD54 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD54 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD54 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD54 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD58 "IMNTRCR854,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD58 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD58 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD58 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD58 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD58 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD58 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD58 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD58 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD5C "IMNTRCR855,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD5C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD5C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD5C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD5C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD5C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD5C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD5C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD5C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD60 "IMNTRCR856,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD60 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD60 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD60 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD60 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD60 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD60 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD60 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD60 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD64 "IMNTRCR857,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD64 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD64 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD64 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD64 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD64 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD64 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD64 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD64 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD68 "IMNTRCR858,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD68 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD68 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD68 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD68 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD68 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD68 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD68 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD68 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD6C "IMNTRCR859,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD6C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD6C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD6C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD6C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD6C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD6C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD6C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD6C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD70 "IMNTRCR860,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD70 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD70 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD70 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD70 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD70 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD70 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD70 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD70 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD74 "IMNTRCR861,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD74 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD74 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD74 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD74 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD74 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD74 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD74 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD74 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD78 "IMNTRCR862,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD78 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD78 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD78 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD78 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD78 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD78 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD78 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD78 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD7C "IMNTRCR863,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD7C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD7C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD7C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD7C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD7C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD7C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD7C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD7C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD80 "IMNTRCR864,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD80 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD80 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD80 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD80 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD80 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD80 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD80 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD80 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD84 "IMNTRCR865,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD84 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD84 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD84 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD84 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD84 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD84 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD84 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD84 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD88 "IMNTRCR866,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD88 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD88 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD88 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD88 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD88 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD88 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD88 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD88 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD8C "IMNTRCR867,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD8C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD8C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD8C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD8C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD8C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD8C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD8C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD8C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD90 "IMNTRCR868,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD90 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD90 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD90 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD90 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD90 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD90 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD90 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD90 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD94 "IMNTRCR869,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD94 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD94 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD94 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD94 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD94 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD94 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD94 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD94 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD98 "IMNTRCR870,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD98 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD98 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD98 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD98 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD98 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD98 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD98 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD98 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xD9C "IMNTRCR871,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD9C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xD9C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xD9C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xD9C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xD9C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xD9C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xD9C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xD9C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDA0 "IMNTRCR872,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDA0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDA0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDA0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDA0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDA0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDA0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDA0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDA0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDA4 "IMNTRCR873,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDA4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDA4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDA4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDA4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDA4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDA4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDA4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDA4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDA8 "IMNTRCR874,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDA8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDA8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDA8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDA8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDA8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDA8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDA8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDA8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDAC "IMNTRCR875,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDAC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDAC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDAC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDAC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDAC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDAC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDAC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDAC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDB0 "IMNTRCR876,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDB0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDB0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDB0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDB0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDB0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDB0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDB0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDB0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDB4 "IMNTRCR877,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDB4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDB4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDB4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDB4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDB4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDB4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDB4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDB4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDB8 "IMNTRCR878,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDB8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDB8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDB8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDB8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDB8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDB8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDB8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDB8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDBC "IMNTRCR879,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDBC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDBC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDBC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDBC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDBC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDBC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDBC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDBC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDC0 "IMNTRCR880,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDC0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDC0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDC0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDC0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDC0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDC0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDC0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDC0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDC4 "IMNTRCR881,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDC4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDC4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDC4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDC4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDC4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDC4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDC4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDC4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDC8 "IMNTRCR882,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDC8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDC8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDC8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDC8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDC8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDC8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDC8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDC8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDCC "IMNTRCR883,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDCC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDCC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDCC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDCC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDCC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDCC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDCC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDCC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDD0 "IMNTRCR884,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDD0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDD0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDD0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDD0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDD0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDD0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDD0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDD0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDD4 "IMNTRCR885,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDD4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDD4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDD4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDD4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDD4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDD4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDD4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDD4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDD8 "IMNTRCR886,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDD8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDD8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDD8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDD8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDD8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDD8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDD8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDD8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDDC "IMNTRCR887,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDDC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDDC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDDC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDDC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDDC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDDC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDDC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDDC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDE0 "IMNTRCR888,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDE0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDE0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDE0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDE0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDE0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDE0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDE0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDE0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDE4 "IMNTRCR889,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDE4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDE4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDE4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDE4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDE4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDE4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDE4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDE4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDE8 "IMNTRCR890,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDE8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDE8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDE8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDE8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDE8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDE8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDE8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDE8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDEC "IMNTRCR891,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDEC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDEC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDEC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDEC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDEC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDEC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDEC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDEC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDF0 "IMNTRCR892,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDF0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDF0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDF0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDF0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDF0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDF0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDF0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDF0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDF4 "IMNTRCR893,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDF4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDF4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDF4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDF4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDF4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDF4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDF4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDF4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDF8 "IMNTRCR894,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDF8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDF8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDF8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDF8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDF8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDF8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDF8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDF8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xDFC "IMNTRCR895,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDFC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xDFC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xDFC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xDFC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xDFC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xDFC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xDFC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xDFC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE00 "IMNTRCR896,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE00 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE00 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE00 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE00 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE00 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE00 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE00 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE00 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE04 "IMNTRCR897,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE04 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE04 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE04 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE04 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE04 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE04 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE04 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE04 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE08 "IMNTRCR898,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE08 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE08 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE08 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE08 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE08 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE08 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE08 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE08 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE0C "IMNTRCR899,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE0C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE0C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE0C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE0C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE0C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE0C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE0C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE0C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE10 "IMNTRCR900,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE10 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE10 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE10 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE10 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE10 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE10 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE10 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE10 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE14 "IMNTRCR901,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE14 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE14 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE14 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE14 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE14 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE14 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE14 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE14 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE18 "IMNTRCR902,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE18 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE18 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE18 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE18 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE18 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE18 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE18 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE18 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE1C "IMNTRCR903,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE1C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE1C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE1C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE1C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE1C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE1C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE1C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE1C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE20 "IMNTRCR904,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE20 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE20 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE20 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE20 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE20 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE20 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE20 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE20 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE24 "IMNTRCR905,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE24 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE24 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE24 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE24 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE24 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE24 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE24 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE24 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE28 "IMNTRCR906,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE28 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE28 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE28 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE28 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE28 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE28 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE28 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE28 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE2C "IMNTRCR907,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE2C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE2C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE2C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE2C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE2C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE2C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE2C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE2C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE30 "IMNTRCR908,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE30 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE30 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE30 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE30 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE30 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE30 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE30 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE30 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE34 "IMNTRCR909,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE34 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE34 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE34 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE34 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE34 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE34 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE34 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE34 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE38 "IMNTRCR910,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE38 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE38 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE38 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE38 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE38 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE38 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE38 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE38 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE3C "IMNTRCR911,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE3C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE3C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE3C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE3C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE3C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE3C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE3C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE3C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE40 "IMNTRCR912,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE40 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE40 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE40 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE40 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE40 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE40 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE40 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE40 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE44 "IMNTRCR913,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE44 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE44 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE44 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE44 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE44 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE44 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE44 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE44 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE48 "IMNTRCR914,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE48 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE48 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE48 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE48 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE48 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE48 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE48 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE48 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE4C "IMNTRCR915,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE4C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE4C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE4C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE4C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE4C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE4C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE4C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE4C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE50 "IMNTRCR916,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE50 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE50 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE50 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE50 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE50 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE50 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE50 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE50 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE54 "IMNTRCR917,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE54 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE54 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE54 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE54 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE54 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE54 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE54 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE54 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE58 "IMNTRCR918,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE58 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE58 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE58 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE58 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE58 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE58 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE58 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE58 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE5C "IMNTRCR919,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE5C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE5C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE5C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE5C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE5C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE5C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE5C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE5C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE60 "IMNTRCR920,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE60 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE60 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE60 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE60 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE60 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE60 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE60 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE60 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE64 "IMNTRCR921,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE64 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE64 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE64 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE64 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE64 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE64 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE64 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE64 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE68 "IMNTRCR922,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE68 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE68 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE68 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE68 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE68 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE68 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE68 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE68 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE6C "IMNTRCR923,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE6C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE6C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE6C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE6C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE6C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE6C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE6C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE6C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE70 "IMNTRCR924,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE70 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE70 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE70 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE70 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE70 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE70 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE70 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE70 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE74 "IMNTRCR925,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE74 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE74 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE74 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE74 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE74 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE74 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE74 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE74 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE78 "IMNTRCR926,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE78 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE78 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE78 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE78 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE78 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE78 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE78 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE78 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE7C "IMNTRCR927,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE7C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE7C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE7C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE7C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE7C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE7C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE7C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE7C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE80 "IMNTRCR928,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE80 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE80 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE80 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE80 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE80 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE80 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE80 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE80 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE84 "IMNTRCR929,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE84 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE84 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE84 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE84 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE84 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE84 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE84 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE84 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE88 "IMNTRCR930,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE88 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE88 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE88 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE88 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE88 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE88 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE88 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE88 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE8C "IMNTRCR931,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE8C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE8C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE8C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE8C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE8C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE8C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE8C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE8C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE90 "IMNTRCR932,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE90 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE90 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE90 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE90 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE90 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE90 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE90 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE90 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE94 "IMNTRCR933,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE94 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE94 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE94 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE94 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE94 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE94 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE94 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE94 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE98 "IMNTRCR934,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE98 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE98 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE98 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE98 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE98 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE98 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE98 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE98 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xE9C "IMNTRCR935,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE9C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xE9C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xE9C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xE9C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xE9C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xE9C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xE9C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xE9C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEA0 "IMNTRCR936,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEA0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEA0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEA0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEA0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEA0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEA0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEA0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEA0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEA4 "IMNTRCR937,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEA4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEA4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEA4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEA4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEA4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEA4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEA4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEA4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEA8 "IMNTRCR938,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEA8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEA8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEA8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEA8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEA8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEA8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEA8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEA8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEAC "IMNTRCR939,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEAC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEAC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEAC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEAC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEAC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEAC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEAC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEAC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEB0 "IMNTRCR940,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEB0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEB0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEB0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEB0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEB0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEB0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEB0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEB0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEB4 "IMNTRCR941,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEB4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEB4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEB4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEB4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEB4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEB4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEB4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEB4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEB8 "IMNTRCR942,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEB8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEB8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEB8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEB8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEB8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEB8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEB8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEB8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEBC "IMNTRCR943,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEBC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEBC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEBC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEBC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEBC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEBC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEBC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEBC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEC0 "IMNTRCR944,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEC0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEC0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEC0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEC0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEC0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEC0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEC0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEC0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEC4 "IMNTRCR945,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEC4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEC4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEC4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEC4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEC4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEC4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEC4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEC4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEC8 "IMNTRCR946,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEC8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEC8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEC8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEC8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEC8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEC8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEC8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEC8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xECC "IMNTRCR947,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xECC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xECC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xECC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xECC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xECC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xECC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xECC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xECC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xED0 "IMNTRCR948,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xED0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xED0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xED0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xED0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xED0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xED0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xED0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xED0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xED4 "IMNTRCR949,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xED4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xED4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xED4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xED4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xED4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xED4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xED4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xED4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xED8 "IMNTRCR950,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xED8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xED8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xED8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xED8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xED8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xED8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xED8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xED8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEDC "IMNTRCR951,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEDC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEDC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEDC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEDC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEDC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEDC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEDC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEDC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEE0 "IMNTRCR952,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEE0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEE0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEE0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEE0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEE0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEE0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEE0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEE0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEE4 "IMNTRCR953,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEE4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEE4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEE4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEE4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEE4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEE4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEE4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEE4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEE8 "IMNTRCR954,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEE8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEE8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEE8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEE8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEE8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEE8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEE8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEE8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEEC "IMNTRCR955,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEEC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEEC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEEC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEEC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEEC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEEC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEEC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEEC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEF0 "IMNTRCR956,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEF0 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEF0 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEF0 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEF0 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEF0 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEF0 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEF0 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEF0 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEF4 "IMNTRCR957,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEF4 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEF4 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEF4 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEF4 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEF4 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEF4 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEF4 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEF4 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEF8 "IMNTRCR958,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEF8 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEF8 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEF8 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEF8 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEF8 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEF8 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEF8 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEF8 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xEFC "IMNTRCR959,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEFC 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xEFC 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xEFC 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xEFC 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xEFC 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xEFC 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xEFC 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xEFC 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xF00 "IMNTRCR960,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xF00 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xF00 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xF00 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xF00 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xF00 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xF00 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xF00 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xF00 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xF04 "IMNTRCR961,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xF04 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xF04 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xF04 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xF04 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xF04 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xF04 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xF04 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xF04 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xF08 "IMNTRCR962,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xF08 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xF08 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xF08 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xF08 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xF08 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xF08 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xF08 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xF08 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xF0C "IMNTRCR963,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xF0C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xF0C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xF0C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xF0C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xF0C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xF0C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xF0C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xF0C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xF10 "IMNTRCR964,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xF10 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xF10 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xF10 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xF10 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xF10 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xF10 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xF10 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xF10 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xF14 "IMNTRCR965,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xF14 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xF14 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xF14 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xF14 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xF14 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xF14 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xF14 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xF14 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xF18 "IMNTRCR966,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xF18 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xF18 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xF18 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xF18 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xF18 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xF18 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xF18 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xF18 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
line.long 0xF1C "IMNTRCR967,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xF1C 16.--31. 1. "KEYCODE,Key Code."
hexmask.long.byte 0xF1C 8.--15. 1. "Reserved_8,Reserved"
bitfld.long 0xF1C 7. "NUM1_EN,Enable to use CNT_NUM1 for only assert period" "0: CNT_NUM1 is disable,1: CNT_NUM1 is enable"
bitfld.long 0xF1C 5.--6. "CNT_NUM1,Select the number of interrupt IMNTR's counter for only assert" "0: 32,1: 64,?,?"
bitfld.long 0xF1C 4. "CNT_RESET,Reset the interrupt IMNTR's counter." "0: Ignored,1: Reset the counter"
newline
bitfld.long 0xF1C 2.--3. "CNT_NUM0,Select the number of interrupt IMNTR's counter." "0: 32,1: 64,?,?"
bitfld.long 0xF1C 1. "IMNTR_EN,Enable the interrupt IMNTR." "0: Disable,1: Enable"
bitfld.long 0xF1C 0. "WAIT_SET,Enable the waiting interrupt mode when IMNTR_EN is Enable." "0: Disable,1: Enable"
tree.end
tree "INTC_2"
base ad:0xFFEA3000
group.long 0x0++0x1E3
line.long 0x0 "IMNTRSR0,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x0 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x0 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x0 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x0 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x0 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x0 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x0 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x0 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x0 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x0 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x0 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x0 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x0 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x0 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x0 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x0 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x0 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x4 "IMNTRSR1,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x4 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x4 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x4 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x4 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x4 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x8 "IMNTRSR2,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x8 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x8 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x8 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x8 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x8 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xC "IMNTRSR3,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xC 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xC 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xC 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xC 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xC 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x10 "IMNTRSR4,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x10 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x10 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x10 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x10 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x10 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x10 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x14 "IMNTRSR5,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x14 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x14 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x14 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x14 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x14 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x14 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x18 "IMNTRSR6,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x18 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x18 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x18 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x18 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x18 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x18 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x1C "IMNTRSR7,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1C 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x1C 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1C 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1C 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1C 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1C 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x20 "IMNTRSR8,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x20 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x20 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x20 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x20 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x20 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x20 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x20 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x20 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x20 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x20 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x20 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x20 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x20 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x20 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x20 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x20 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x20 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x24 "IMNTRSR9,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x24 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x24 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x24 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x24 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x24 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x24 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x24 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x24 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x24 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x24 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x24 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x24 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x24 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x24 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x24 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x24 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x24 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x28 "IMNTRSR10,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x28 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x28 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x28 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x28 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x28 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x28 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x28 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x28 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x28 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x28 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x28 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x28 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x28 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x28 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x28 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x28 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x28 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x2C "IMNTRSR11,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x2C 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x2C 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x2C 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x2C 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x2C 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x2C 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x2C 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x2C 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x2C 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x2C 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x2C 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x2C 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x2C 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x2C 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x2C 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x2C 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x2C 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x30 "IMNTRSR12,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x30 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x30 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x30 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x30 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x30 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x30 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x30 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x30 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x30 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x30 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x30 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x30 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x30 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x30 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x30 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x30 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x30 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x34 "IMNTRSR13,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x34 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x34 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x34 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x34 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x34 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x34 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x34 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x34 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x34 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x34 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x34 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x34 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x34 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x34 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x34 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x34 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x34 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x38 "IMNTRSR14,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x38 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x38 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x38 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x38 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x38 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x38 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x38 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x38 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x38 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x38 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x38 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x38 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x38 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x38 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x38 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x38 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x38 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x3C "IMNTRSR15,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x3C 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x3C 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x3C 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x3C 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x3C 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x3C 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x3C 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x3C 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x3C 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x3C 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x3C 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x3C 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x3C 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x3C 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x3C 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x3C 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x3C 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x40 "IMNTRSR16,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x40 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x40 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x40 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x40 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x40 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x40 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x40 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x40 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x40 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x40 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x40 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x40 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x40 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x40 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x40 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x40 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x40 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x44 "IMNTRSR17,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x44 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x44 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x44 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x44 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x44 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x44 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x44 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x44 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x44 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x44 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x44 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x44 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x44 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x44 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x44 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x44 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x44 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x48 "IMNTRSR18,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x48 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x48 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x48 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x48 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x48 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x48 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x48 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x48 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x48 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x48 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x48 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x48 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x48 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x48 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x48 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x48 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x48 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x4C "IMNTRSR19,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x4C 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x4C 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4C 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4C 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x4C 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4C 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4C 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4C 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x4C 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4C 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4C 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4C 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x4C 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4C 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4C 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x4C 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x4C 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x50 "IMNTRSR20,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x50 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x50 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x50 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x50 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x50 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x50 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x50 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x50 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x50 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x50 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x50 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x50 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x50 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x50 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x50 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x50 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x50 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x54 "IMNTRSR21,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x54 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x54 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x54 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x54 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x54 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x54 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x54 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x54 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x54 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x54 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x54 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x54 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x54 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x54 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x54 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x54 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x54 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x58 "IMNTRSR22,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x58 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x58 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x58 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x58 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x58 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x58 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x58 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x58 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x58 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x58 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x58 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x58 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x58 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x58 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x58 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x58 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x58 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x5C "IMNTRSR23,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x5C 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x5C 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x5C 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x5C 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x5C 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x5C 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x5C 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x5C 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x5C 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x5C 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x5C 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x5C 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x5C 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x5C 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x5C 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x5C 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x5C 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x60 "IMNTRSR24,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x60 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x60 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x60 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x60 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x60 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x60 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x60 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x60 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x60 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x60 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x60 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x60 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x60 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x60 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x60 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x60 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x60 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x64 "IMNTRSR25,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x64 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x64 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x64 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x64 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x64 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x64 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x64 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x64 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x64 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x64 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x64 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x64 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x64 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x64 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x64 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x64 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x64 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x68 "IMNTRSR26,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x68 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x68 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x68 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x68 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x68 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x68 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x68 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x68 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x68 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x68 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x68 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x68 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x68 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x68 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x68 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x68 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x68 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x6C "IMNTRSR27,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x6C 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x6C 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x6C 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x6C 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x6C 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x6C 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x6C 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x6C 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x6C 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x6C 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x6C 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x6C 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x6C 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x6C 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x6C 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x6C 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x6C 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x70 "IMNTRSR28,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x70 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x70 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x70 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x70 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x70 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x70 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x70 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x70 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x70 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x70 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x70 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x70 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x70 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x70 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x70 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x70 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x70 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x74 "IMNTRSR29,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x74 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x74 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x74 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x74 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x74 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x74 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x74 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x74 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x74 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x74 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x74 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x74 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x74 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x74 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x74 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x74 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x74 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x78 "IMNTRSR30,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x78 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x78 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x78 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x78 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x78 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x78 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x78 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x78 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x78 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x78 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x78 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x78 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x78 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x78 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x78 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x78 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x78 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x7C "IMNTRSR31,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x7C 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x7C 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x7C 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x7C 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x7C 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x7C 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x7C 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x7C 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x7C 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x7C 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x7C 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x7C 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x7C 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x7C 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x7C 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x7C 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x7C 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x80 "IMNTRSR32,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x80 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x80 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x80 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x80 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x80 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x80 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x80 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x80 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x80 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x80 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x80 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x80 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x80 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x80 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x80 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x80 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x80 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x84 "IMNTRSR33,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x84 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x84 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x84 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x84 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x84 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x84 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x84 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x84 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x84 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x84 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x84 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x84 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x84 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x84 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x84 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x84 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x84 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x88 "IMNTRSR34,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x88 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x88 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x88 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x88 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x88 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x88 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x88 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x88 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x88 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x88 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x88 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x88 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x88 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x88 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x88 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x88 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x88 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x8C "IMNTRSR35,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x8C 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x8C 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8C 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8C 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x8C 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8C 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8C 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8C 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x8C 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8C 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8C 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8C 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x8C 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8C 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8C 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x8C 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x8C 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x90 "IMNTRSR36,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x90 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x90 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x90 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x90 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x90 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x90 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x90 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x90 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x90 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x90 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x90 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x90 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x90 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x90 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x90 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x90 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x90 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x94 "IMNTRSR37,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x94 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x94 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x94 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x94 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x94 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x94 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x94 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x94 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x94 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x94 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x94 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x94 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x94 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x94 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x94 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x94 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x94 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x98 "IMNTRSR38,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x98 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x98 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x98 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x98 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x98 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x98 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x98 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x98 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x98 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x98 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x98 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x98 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x98 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x98 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x98 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x98 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x98 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x9C "IMNTRSR39,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x9C 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x9C 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x9C 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x9C 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x9C 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x9C 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x9C 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x9C 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x9C 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x9C 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x9C 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x9C 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x9C 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x9C 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x9C 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x9C 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x9C 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xA0 "IMNTRSR40,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA0 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xA0 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA0 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA0 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xA0 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA0 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA0 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA0 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xA0 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA0 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA0 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA0 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xA0 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA0 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA0 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA0 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xA0 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xA4 "IMNTRSR41,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA4 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xA4 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA4 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA4 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xA4 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA4 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA4 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA4 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xA4 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA4 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA4 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA4 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xA4 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA4 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA4 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA4 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xA4 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xA8 "IMNTRSR42,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xA8 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xA8 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA8 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA8 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xA8 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA8 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA8 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA8 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xA8 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA8 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA8 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA8 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xA8 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA8 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA8 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xA8 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xA8 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xAC "IMNTRSR43,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xAC 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xAC 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xAC 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xAC 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xAC 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xAC 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xAC 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xAC 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xAC 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xAC 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xAC 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xAC 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xAC 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xAC 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xAC 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xAC 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xAC 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xB0 "IMNTRSR44,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB0 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xB0 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB0 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB0 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xB0 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB0 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB0 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB0 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xB0 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB0 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB0 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB0 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xB0 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB0 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB0 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB0 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xB0 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xB4 "IMNTRSR45,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB4 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xB4 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB4 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB4 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xB4 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB4 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB4 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB4 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xB4 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB4 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB4 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB4 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xB4 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB4 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB4 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB4 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xB4 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xB8 "IMNTRSR46,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xB8 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xB8 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB8 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB8 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xB8 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB8 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB8 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB8 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xB8 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB8 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB8 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB8 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xB8 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB8 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB8 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xB8 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xB8 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xBC "IMNTRSR47,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xBC 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xBC 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xBC 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xBC 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xBC 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xBC 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xBC 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xBC 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xBC 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xBC 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xBC 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xBC 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xBC 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xBC 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xBC 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xBC 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xBC 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xC0 "IMNTRSR48,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC0 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xC0 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC0 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC0 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xC0 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC0 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC0 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC0 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xC0 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC0 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC0 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC0 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xC0 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC0 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC0 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC0 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xC0 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xC4 "IMNTRSR49,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC4 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xC4 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC4 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC4 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xC4 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC4 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC4 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC4 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xC4 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC4 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC4 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC4 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xC4 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC4 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC4 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC4 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xC4 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xC8 "IMNTRSR50,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xC8 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xC8 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC8 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC8 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xC8 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC8 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC8 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC8 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xC8 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC8 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC8 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC8 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xC8 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC8 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC8 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xC8 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xC8 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xCC "IMNTRSR51,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xCC 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xCC 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xCC 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xCC 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xCC 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xCC 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xCC 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xCC 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xCC 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xCC 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xCC 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xCC 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xCC 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xCC 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xCC 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xCC 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xCC 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xD0 "IMNTRSR52,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD0 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xD0 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD0 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD0 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xD0 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD0 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD0 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD0 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xD0 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD0 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD0 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD0 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xD0 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD0 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD0 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD0 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xD0 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xD4 "IMNTRSR53,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD4 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xD4 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD4 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD4 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xD4 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD4 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD4 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD4 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xD4 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD4 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD4 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD4 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xD4 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD4 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD4 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD4 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xD4 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xD8 "IMNTRSR54,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xD8 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xD8 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD8 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD8 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xD8 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD8 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD8 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD8 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xD8 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD8 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD8 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD8 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xD8 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD8 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD8 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xD8 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xD8 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xDC "IMNTRSR55,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xDC 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xDC 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xDC 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xDC 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xDC 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xDC 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xDC 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xDC 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xDC 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xDC 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xDC 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xDC 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xDC 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xDC 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xDC 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xDC 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xDC 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xE0 "IMNTRSR56,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE0 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xE0 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE0 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE0 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xE0 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE0 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE0 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE0 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xE0 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE0 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE0 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE0 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xE0 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE0 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE0 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE0 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xE0 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xE4 "IMNTRSR57,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE4 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xE4 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE4 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE4 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xE4 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE4 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE4 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE4 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xE4 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE4 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE4 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE4 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xE4 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE4 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE4 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE4 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xE4 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xE8 "IMNTRSR58,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xE8 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xE8 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE8 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE8 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xE8 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE8 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE8 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE8 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xE8 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE8 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE8 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE8 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xE8 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE8 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE8 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xE8 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xE8 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xEC "IMNTRSR59,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xEC 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xEC 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xEC 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xEC 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xEC 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xEC 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xEC 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xEC 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xEC 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xEC 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xEC 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xEC 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xEC 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xEC 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xEC 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xEC 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xEC 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xF0 "IMNTRSR60,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xF0 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xF0 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF0 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF0 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xF0 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF0 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF0 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF0 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xF0 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF0 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF0 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF0 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xF0 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF0 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF0 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF0 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xF0 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xF4 "IMNTRSR61,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xF4 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xF4 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF4 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF4 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xF4 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF4 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF4 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF4 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xF4 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF4 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF4 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF4 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xF4 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF4 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF4 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF4 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xF4 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xF8 "IMNTRSR62,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xF8 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xF8 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF8 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF8 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xF8 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF8 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF8 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF8 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xF8 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF8 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF8 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF8 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xF8 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF8 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF8 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xF8 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xF8 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0xFC "IMNTRSR63,This register is functional safety use only. Keep initial value."
hexmask.long.word 0xFC 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0xFC 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xFC 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xFC 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xFC 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xFC 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xFC 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xFC 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xFC 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xFC 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xFC 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xFC 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xFC 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xFC 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xFC 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0xFC 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0xFC 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x100 "IMNTRSR64,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x100 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x100 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x100 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x100 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x100 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x100 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x100 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x100 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x100 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x100 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x100 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x100 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x100 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x100 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x100 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x100 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x100 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x104 "IMNTRSR65,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x104 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x104 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x104 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x104 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x104 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x104 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x104 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x104 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x104 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x104 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x104 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x104 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x104 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x104 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x104 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x104 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x104 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x108 "IMNTRSR66,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x108 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x108 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x108 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x108 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x108 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x108 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x108 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x108 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x108 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x108 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x108 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x108 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x108 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x108 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x108 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x108 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x108 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x10C "IMNTRSR67,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x10C 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x10C 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10C 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10C 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x10C 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10C 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10C 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10C 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x10C 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10C 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10C 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10C 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x10C 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10C 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10C 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x10C 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x10C 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x110 "IMNTRSR68,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x110 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x110 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x110 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x110 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x110 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x110 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x110 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x110 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x110 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x110 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x110 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x110 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x110 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x110 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x110 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x110 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x110 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x114 "IMNTRSR69,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x114 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x114 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x114 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x114 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x114 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x114 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x114 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x114 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x114 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x114 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x114 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x114 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x114 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x114 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x114 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x114 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x114 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x118 "IMNTRSR70,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x118 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x118 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x118 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x118 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x118 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x118 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x118 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x118 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x118 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x118 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x118 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x118 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x118 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x118 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x118 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x118 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x118 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x11C "IMNTRSR71,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x11C 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x11C 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x11C 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x11C 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x11C 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x11C 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x11C 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x11C 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x11C 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x11C 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x11C 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x11C 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x11C 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x11C 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x11C 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x11C 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x11C 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x120 "IMNTRSR72,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x120 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x120 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x120 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x120 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x120 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x120 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x120 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x120 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x120 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x120 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x120 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x120 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x120 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x120 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x120 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x120 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x120 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x124 "IMNTRSR73,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x124 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x124 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x124 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x124 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x124 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x124 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x124 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x124 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x124 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x124 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x124 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x124 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x124 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x124 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x124 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x124 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x124 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x128 "IMNTRSR74,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x128 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x128 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x128 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x128 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x128 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x128 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x128 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x128 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x128 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x128 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x128 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x128 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x128 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x128 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x128 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x128 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x128 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x12C "IMNTRSR75,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x12C 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x12C 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x12C 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x12C 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x12C 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x12C 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x12C 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x12C 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x12C 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x12C 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x12C 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x12C 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x12C 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x12C 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x12C 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x12C 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x12C 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x130 "IMNTRSR76,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x130 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x130 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x130 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x130 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x130 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x130 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x130 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x130 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x130 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x130 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x130 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x130 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x130 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x130 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x130 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x130 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x130 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x134 "IMNTRSR77,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x134 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x134 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x134 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x134 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x134 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x134 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x134 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x134 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x134 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x134 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x134 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x134 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x134 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x134 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x134 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x134 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x134 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x138 "IMNTRSR78,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x138 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x138 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x138 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x138 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x138 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x138 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x138 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x138 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x138 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x138 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x138 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x138 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x138 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x138 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x138 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x138 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x138 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x13C "IMNTRSR79,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x13C 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x13C 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x13C 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x13C 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x13C 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x13C 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x13C 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x13C 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x13C 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x13C 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x13C 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x13C 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x13C 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x13C 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x13C 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x13C 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x13C 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x140 "IMNTRSR80,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x140 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x140 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x140 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x140 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x140 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x140 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x140 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x140 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x140 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x140 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x140 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x140 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x140 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x140 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x140 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x140 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x140 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x144 "IMNTRSR81,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x144 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x144 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x144 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x144 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x144 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x144 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x144 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x144 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x144 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x144 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x144 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x144 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x144 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x144 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x144 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x144 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x144 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x148 "IMNTRSR82,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x148 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x148 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x148 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x148 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x148 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x148 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x148 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x148 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x148 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x148 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x148 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x148 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x148 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x148 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x148 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x148 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x148 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x14C "IMNTRSR83,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x14C 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x14C 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14C 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14C 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x14C 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14C 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14C 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14C 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x14C 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14C 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14C 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14C 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x14C 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14C 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14C 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x14C 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x14C 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x150 "IMNTRSR84,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x150 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x150 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x150 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x150 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x150 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x150 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x150 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x150 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x150 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x150 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x150 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x150 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x150 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x150 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x150 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x150 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x150 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x154 "IMNTRSR85,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x154 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x154 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x154 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x154 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x154 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x154 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x154 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x154 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x154 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x154 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x154 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x154 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x154 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x154 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x154 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x154 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x154 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x158 "IMNTRSR86,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x158 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x158 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x158 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x158 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x158 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x158 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x158 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x158 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x158 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x158 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x158 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x158 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x158 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x158 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x158 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x158 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x158 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x15C "IMNTRSR87,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x15C 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x15C 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x15C 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x15C 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x15C 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x15C 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x15C 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x15C 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x15C 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x15C 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x15C 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x15C 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x15C 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x15C 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x15C 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x15C 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x15C 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x160 "IMNTRSR88,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x160 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x160 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x160 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x160 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x160 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x160 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x160 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x160 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x160 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x160 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x160 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x160 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x160 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x160 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x160 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x160 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x160 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x164 "IMNTRSR89,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x164 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x164 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x164 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x164 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x164 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x164 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x164 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x164 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x164 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x164 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x164 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x164 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x164 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x164 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x164 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x164 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x164 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x168 "IMNTRSR90,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x168 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x168 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x168 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x168 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x168 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x168 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x168 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x168 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x168 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x168 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x168 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x168 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x168 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x168 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x168 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x168 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x168 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x16C "IMNTRSR91,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x16C 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x16C 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x16C 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x16C 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x16C 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x16C 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x16C 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x16C 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x16C 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x16C 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x16C 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x16C 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x16C 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x16C 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x16C 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x16C 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x16C 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x170 "IMNTRSR92,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x170 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x170 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x170 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x170 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x170 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x170 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x170 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x170 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x170 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x170 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x170 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x170 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x170 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x170 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x170 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x170 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x170 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x174 "IMNTRSR93,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x174 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x174 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x174 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x174 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x174 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x174 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x174 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x174 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x174 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x174 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x174 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x174 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x174 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x174 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x174 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x174 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x174 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x178 "IMNTRSR94,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x178 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x178 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x178 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x178 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x178 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x178 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x178 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x178 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x178 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x178 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x178 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x178 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x178 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x178 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x178 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x178 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x178 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x17C "IMNTRSR95,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x17C 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x17C 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x17C 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x17C 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x17C 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x17C 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x17C 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x17C 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x17C 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x17C 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x17C 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x17C 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x17C 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x17C 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x17C 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x17C 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x17C 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x180 "IMNTRSR96,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x180 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x180 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x180 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x180 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x180 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x180 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x180 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x180 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x180 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x180 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x180 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x180 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x180 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x180 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x180 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x180 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x180 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x184 "IMNTRSR97,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x184 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x184 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x184 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x184 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x184 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x184 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x184 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x184 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x184 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x184 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x184 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x184 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x184 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x184 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x184 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x184 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x184 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x188 "IMNTRSR98,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x188 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x188 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x188 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x188 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x188 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x188 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x188 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x188 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x188 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x188 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x188 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x188 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x188 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x188 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x188 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x188 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x188 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x18C "IMNTRSR99,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x18C 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x18C 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18C 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18C 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x18C 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18C 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18C 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18C 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x18C 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18C 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18C 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18C 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x18C 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18C 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18C 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x18C 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x18C 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x190 "IMNTRSR100,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x190 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x190 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x190 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x190 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x190 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x190 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x190 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x190 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x190 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x190 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x190 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x190 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x190 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x190 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x190 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x190 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x190 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x194 "IMNTRSR101,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x194 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x194 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x194 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x194 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x194 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x194 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x194 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x194 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x194 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x194 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x194 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x194 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x194 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x194 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x194 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x194 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x194 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x198 "IMNTRSR102,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x198 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x198 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x198 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x198 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x198 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x198 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x198 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x198 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x198 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x198 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x198 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x198 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x198 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x198 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x198 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x198 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x198 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x19C "IMNTRSR103,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x19C 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x19C 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x19C 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x19C 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x19C 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x19C 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x19C 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x19C 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x19C 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x19C 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x19C 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x19C 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x19C 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x19C 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x19C 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x19C 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x19C 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x1A0 "IMNTRSR104,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1A0 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x1A0 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A0 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A0 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1A0 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A0 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A0 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A0 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1A0 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A0 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A0 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A0 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1A0 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A0 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A0 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A0 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1A0 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x1A4 "IMNTRSR105,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1A4 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x1A4 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A4 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A4 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1A4 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A4 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A4 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A4 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1A4 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A4 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A4 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A4 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1A4 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A4 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A4 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A4 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1A4 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x1A8 "IMNTRSR106,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1A8 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x1A8 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A8 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A8 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1A8 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A8 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A8 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A8 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1A8 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A8 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A8 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A8 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1A8 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A8 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A8 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1A8 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1A8 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x1AC "IMNTRSR107,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1AC 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x1AC 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1AC 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1AC 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1AC 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1AC 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1AC 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1AC 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1AC 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1AC 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1AC 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1AC 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1AC 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1AC 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1AC 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1AC 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1AC 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x1B0 "IMNTRSR108,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1B0 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x1B0 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B0 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B0 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1B0 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B0 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B0 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B0 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1B0 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B0 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B0 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B0 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1B0 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B0 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B0 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B0 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1B0 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x1B4 "IMNTRSR109,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1B4 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x1B4 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B4 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B4 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1B4 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B4 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B4 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B4 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1B4 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B4 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B4 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B4 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1B4 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B4 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B4 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B4 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1B4 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x1B8 "IMNTRSR110,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1B8 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x1B8 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B8 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B8 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1B8 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B8 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B8 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B8 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1B8 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B8 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B8 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B8 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1B8 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B8 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B8 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1B8 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1B8 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x1BC "IMNTRSR111,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1BC 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x1BC 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1BC 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1BC 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1BC 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1BC 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1BC 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1BC 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1BC 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1BC 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1BC 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1BC 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1BC 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1BC 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1BC 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1BC 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1BC 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x1C0 "IMNTRSR112,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1C0 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x1C0 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C0 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C0 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1C0 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C0 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C0 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C0 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1C0 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C0 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C0 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C0 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1C0 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C0 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C0 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C0 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1C0 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x1C4 "IMNTRSR113,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1C4 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x1C4 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C4 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C4 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1C4 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C4 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C4 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C4 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1C4 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C4 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C4 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C4 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1C4 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C4 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C4 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C4 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1C4 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x1C8 "IMNTRSR114,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1C8 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x1C8 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C8 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C8 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1C8 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C8 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C8 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C8 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1C8 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C8 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C8 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C8 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1C8 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C8 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C8 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1C8 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1C8 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x1CC "IMNTRSR115,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1CC 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x1CC 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1CC 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1CC 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1CC 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1CC 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1CC 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1CC 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1CC 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1CC 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1CC 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1CC 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1CC 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1CC 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1CC 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1CC 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1CC 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x1D0 "IMNTRSR116,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1D0 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x1D0 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D0 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D0 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1D0 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D0 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D0 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D0 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1D0 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D0 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D0 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D0 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1D0 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D0 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D0 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D0 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1D0 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x1D4 "IMNTRSR117,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1D4 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x1D4 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D4 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D4 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1D4 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D4 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D4 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D4 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1D4 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D4 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D4 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D4 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1D4 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D4 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D4 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D4 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1D4 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x1D8 "IMNTRSR118,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1D8 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x1D8 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D8 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D8 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1D8 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D8 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D8 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D8 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1D8 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D8 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D8 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D8 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1D8 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D8 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D8 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1D8 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1D8 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x1DC "IMNTRSR119,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1DC 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x1DC 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1DC 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1DC 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1DC 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1DC 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1DC 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1DC 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1DC 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1DC 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1DC 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1DC 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1DC 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1DC 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1DC 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1DC 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1DC 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
line.long 0x1E0 "IMNTRSR120,This register is functional safety use only. Keep initial value."
hexmask.long.word 0x1E0 16.--31. 1. "KEYCODE,Key Code."
eventfld.long 0x1E0 15. "CNT_ERR7,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1E0 14. "WAIT_ERR7,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1E0 13. "CNT_ERR6,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1E0 12. "WAIT_ERR6,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1E0 11. "CNT_ERR5,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1E0 10. "WAIT_ERR5,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1E0 9. "CNT_ERR4,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1E0 8. "WAIT_ERR4,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1E0 7. "CNT_ERR3,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1E0 6. "WAIT_ERR3,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1E0 5. "CNT_ERR2,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1E0 4. "WAIT_ERR2,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1E0 3. "CNT_ERR1,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1E0 2. "WAIT_ERR1,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
eventfld.long 0x1E0 1. "CNT_ERR0,Show the error state of count up mode." "0: Ignored,1: Clear this bit"
newline
eventfld.long 0x1E0 0. "WAIT_ERR0,Show the error state of waiting interrupt mode." "0: Ignored,1: Clear this bit"
tree.end
tree "INTC_3"
base ad:0xFFEA6000
rgroup.long 0x0++0xF3
line.long 0x0 "IMNTRRTR0,This register is functional safety use only. Keep initial value."
bitfld.long 0x0 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x0 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x0 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
newline
bitfld.long 0x0 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x0 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x0 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
newline
bitfld.long 0x0 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x0 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x0 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
newline
bitfld.long 0x0 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x0 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x0 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
newline
bitfld.long 0x0 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x0 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x0 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x0 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x0 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x0 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x0 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x0 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x0 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x0 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x0 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x0 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x0 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x0 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x0 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x0 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x0 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x0 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x0 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x0 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x4 "IMNTRRTR1,This register is functional safety use only. Keep initial value."
bitfld.long 0x4 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x4 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x4 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x4 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x4 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x4 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x4 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x4 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x4 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x4 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x4 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x8 "IMNTRRTR2,This register is functional safety use only. Keep initial value."
bitfld.long 0x8 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x8 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x8 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x8 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x8 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x8 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x8 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x8 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x8 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x8 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x8 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xC "IMNTRRTR3,This register is functional safety use only. Keep initial value."
bitfld.long 0xC 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x10 "IMNTRRTR4,This register is functional safety use only. Keep initial value."
bitfld.long 0x10 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x10 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x10 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x10 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x10 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x10 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x10 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x10 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x10 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x10 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x10 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x10 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x10 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x10 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x10 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x10 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x10 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x10 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x10 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x10 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x10 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x10 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x10 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x10 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x10 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x10 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x10 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x10 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x10 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x10 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x10 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x10 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x14 "IMNTRRTR5,This register is functional safety use only. Keep initial value."
bitfld.long 0x14 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x14 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x14 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x14 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x14 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x14 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x14 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x14 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x14 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x14 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x14 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x14 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x14 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x14 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x14 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x14 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x14 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x14 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x14 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x14 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x14 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x14 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x14 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x14 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x14 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x14 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x14 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x14 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x14 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x14 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x14 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x14 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x18 "IMNTRRTR6,This register is functional safety use only. Keep initial value."
bitfld.long 0x18 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x18 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x18 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x18 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x18 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x18 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x18 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x18 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x18 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x18 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x18 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x18 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x18 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x18 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x18 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x18 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x18 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x18 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x18 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x18 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x18 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x18 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x18 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x18 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x18 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x18 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x18 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x18 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x18 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x18 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x18 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x18 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x1C "IMNTRRTR7,This register is functional safety use only. Keep initial value."
bitfld.long 0x1C 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x1C 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x1C 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x1C 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x1C 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x1C 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x1C 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x1C 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x1C 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x1C 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x1C 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x1C 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x1C 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x1C 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x1C 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x1C 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x1C 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x1C 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x1C 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x1C 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x1C 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x1C 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x1C 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x1C 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x1C 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x1C 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x1C 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x1C 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x1C 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x1C 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x1C 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x1C 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x20 "IMNTRRTR8,This register is functional safety use only. Keep initial value."
bitfld.long 0x20 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x20 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x20 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x20 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x20 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x20 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x20 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x20 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x20 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x20 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x20 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x20 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x20 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x20 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x20 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x20 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x20 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x20 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x20 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x20 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x20 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x20 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x20 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x20 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x20 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x20 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x20 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x20 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x20 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x20 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x20 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x20 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x24 "IMNTRRTR9,This register is functional safety use only. Keep initial value."
bitfld.long 0x24 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x24 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x24 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x24 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x24 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x24 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x24 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x24 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x24 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x24 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x24 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x24 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x24 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x24 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x24 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x24 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x24 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x24 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x24 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x24 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x24 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x24 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x24 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x24 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x24 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x24 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x24 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x24 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x24 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x24 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x24 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x24 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x28 "IMNTRRTR10,This register is functional safety use only. Keep initial value."
bitfld.long 0x28 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x28 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x28 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x28 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x28 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x28 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x28 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x28 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x28 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x28 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x28 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x28 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x28 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x28 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x28 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x28 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x28 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x28 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x28 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x28 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x28 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x28 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x28 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x28 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x28 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x28 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x28 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x28 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x28 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x28 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x28 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x28 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x2C "IMNTRRTR11,This register is functional safety use only. Keep initial value."
bitfld.long 0x2C 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x2C 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x2C 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x2C 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x2C 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x2C 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x2C 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x2C 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x2C 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x2C 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x2C 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x2C 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x2C 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x2C 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x2C 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x2C 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x2C 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x2C 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x2C 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x2C 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x2C 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x2C 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x2C 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x2C 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x2C 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x2C 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x2C 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x2C 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x2C 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x2C 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x2C 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x2C 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x30 "IMNTRRTR12,This register is functional safety use only. Keep initial value."
bitfld.long 0x30 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x30 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x30 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x30 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x30 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x30 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x30 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x30 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x30 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x30 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x30 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x30 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x30 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x30 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x30 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x30 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x30 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x30 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x30 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x30 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x30 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x30 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x30 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x30 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x30 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x30 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x30 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x30 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x30 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x30 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x30 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x30 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x34 "IMNTRRTR13,This register is functional safety use only. Keep initial value."
bitfld.long 0x34 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x34 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x34 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x34 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x34 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x34 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x34 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x34 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x34 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x34 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x34 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x34 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x34 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x34 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x34 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x34 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x34 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x34 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x34 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x34 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x34 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x34 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x34 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x34 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x34 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x34 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x34 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x34 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x34 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x34 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x34 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x34 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x38 "IMNTRRTR14,This register is functional safety use only. Keep initial value."
bitfld.long 0x38 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x38 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x38 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x38 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x38 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x38 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x38 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x38 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x38 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x38 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x38 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x38 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x38 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x38 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x38 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x38 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x38 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x38 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x38 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x38 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x38 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x38 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x38 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x38 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x38 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x38 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x38 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x38 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x38 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x38 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x38 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x38 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x3C "IMNTRRTR15,This register is functional safety use only. Keep initial value."
bitfld.long 0x3C 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x3C 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x3C 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x3C 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x3C 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x3C 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x3C 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x3C 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x3C 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x3C 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x3C 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x3C 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x3C 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x3C 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x3C 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x3C 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x3C 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x3C 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x3C 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x3C 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x3C 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x3C 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x3C 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x3C 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x3C 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x3C 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x3C 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x3C 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x3C 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x3C 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x3C 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x3C 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x40 "IMNTRRTR16,This register is functional safety use only. Keep initial value."
bitfld.long 0x40 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x40 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x40 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x40 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x40 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x40 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x40 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x40 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x40 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x40 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x40 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x40 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x40 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x40 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x40 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x40 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x40 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x40 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x40 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x40 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x40 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x40 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x40 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x40 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x40 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x40 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x40 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x40 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x40 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x40 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x40 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x40 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x44 "IMNTRRTR17,This register is functional safety use only. Keep initial value."
bitfld.long 0x44 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x44 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x44 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x44 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x44 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x44 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x44 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x44 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x44 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x44 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x44 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x44 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x44 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x44 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x44 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x44 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x44 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x44 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x44 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x44 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x44 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x44 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x44 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x44 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x44 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x44 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x44 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x44 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x44 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x44 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x44 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x44 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x48 "IMNTRRTR18,This register is functional safety use only. Keep initial value."
bitfld.long 0x48 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x48 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x48 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x48 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x48 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x48 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x48 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x48 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x48 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x48 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x48 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x48 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x48 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x48 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x48 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x48 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x48 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x48 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x48 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x48 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x48 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x48 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x48 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x48 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x48 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x48 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x48 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x48 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x48 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x48 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x48 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x48 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x4C "IMNTRRTR19,This register is functional safety use only. Keep initial value."
bitfld.long 0x4C 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4C 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4C 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x4C 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4C 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4C 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x4C 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4C 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4C 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x4C 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4C 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4C 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x4C 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4C 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4C 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x4C 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4C 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4C 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x4C 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4C 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4C 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x4C 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4C 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4C 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x4C 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4C 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4C 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x4C 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x4C 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4C 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x4C 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x4C 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x50 "IMNTRRTR20,This register is functional safety use only. Keep initial value."
bitfld.long 0x50 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x50 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x50 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x50 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x50 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x50 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x50 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x50 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x50 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x50 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x50 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x50 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x50 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x50 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x50 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x50 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x50 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x50 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x50 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x50 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x50 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x50 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x50 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x50 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x50 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x50 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x50 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x50 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x50 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x50 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x50 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x50 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x54 "IMNTRRTR21,This register is functional safety use only. Keep initial value."
bitfld.long 0x54 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x54 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x54 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x54 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x54 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x54 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x54 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x54 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x54 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x54 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x54 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x54 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x54 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x54 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x54 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x54 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x54 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x54 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x54 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x54 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x54 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x54 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x54 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x54 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x54 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x54 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x54 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x54 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x54 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x54 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x54 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x54 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x58 "IMNTRRTR22,This register is functional safety use only. Keep initial value."
bitfld.long 0x58 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x58 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x58 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x58 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x58 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x58 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x58 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x58 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x58 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x58 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x58 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x58 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x58 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x58 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x58 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x58 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x58 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x58 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x58 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x58 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x58 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x58 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x58 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x58 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x58 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x58 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x58 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x58 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x58 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x58 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x58 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x58 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x5C "IMNTRRTR23,This register is functional safety use only. Keep initial value."
bitfld.long 0x5C 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x5C 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x5C 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x5C 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x5C 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x5C 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x5C 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x5C 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x5C 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x5C 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x5C 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x5C 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x5C 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x5C 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x5C 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x5C 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x5C 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x5C 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x5C 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x5C 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x5C 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x5C 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x5C 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x5C 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x5C 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x5C 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x5C 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x5C 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x5C 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x5C 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x5C 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x5C 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x60 "IMNTRRTR24,This register is functional safety use only. Keep initial value."
bitfld.long 0x60 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x60 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x60 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x60 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x60 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x60 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x60 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x60 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x60 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x60 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x60 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x60 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x60 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x60 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x60 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x60 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x60 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x60 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x60 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x60 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x60 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x60 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x60 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x60 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x60 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x60 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x60 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x60 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x60 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x60 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x60 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x60 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x64 "IMNTRRTR25,This register is functional safety use only. Keep initial value."
bitfld.long 0x64 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x64 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x64 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x64 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x64 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x64 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x64 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x64 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x64 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x64 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x64 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x64 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x64 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x64 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x64 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x64 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x64 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x64 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x64 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x64 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x64 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x64 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x64 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x64 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x64 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x64 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x64 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x64 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x64 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x64 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x64 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x64 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x68 "IMNTRRTR26,This register is functional safety use only. Keep initial value."
bitfld.long 0x68 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x68 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x68 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x68 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x68 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x68 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x68 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x68 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x68 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x68 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x68 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x68 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x68 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x68 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x68 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x68 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x68 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x68 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x68 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x68 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x68 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x68 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x68 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x68 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x68 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x68 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x68 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x68 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x68 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x68 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x68 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x68 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x6C "IMNTRRTR27,This register is functional safety use only. Keep initial value."
bitfld.long 0x6C 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x6C 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x6C 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x6C 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x6C 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x6C 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x6C 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x6C 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x6C 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x6C 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x6C 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x6C 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x6C 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x6C 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x6C 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x6C 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x6C 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x6C 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x6C 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x6C 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x6C 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x6C 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x6C 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x6C 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x6C 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x6C 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x6C 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x6C 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x6C 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x6C 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x6C 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x6C 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x70 "IMNTRRTR28,This register is functional safety use only. Keep initial value."
bitfld.long 0x70 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x70 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x70 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x70 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x70 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x70 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x70 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x70 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x70 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x70 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x70 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x70 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x70 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x70 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x70 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x70 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x70 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x70 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x70 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x70 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x70 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x70 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x70 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x70 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x70 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x70 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x70 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x70 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x70 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x70 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x70 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x70 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x74 "IMNTRRTR29,This register is functional safety use only. Keep initial value."
bitfld.long 0x74 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x74 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x74 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x74 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x74 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x74 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x74 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x74 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x74 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x74 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x74 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x74 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x74 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x74 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x74 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x74 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x74 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x74 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x74 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x74 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x74 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x74 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x74 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x74 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x74 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x74 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x74 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x74 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x74 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x74 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x74 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x74 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x78 "IMNTRRTR30,This register is functional safety use only. Keep initial value."
bitfld.long 0x78 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x78 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x78 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x78 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x78 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x78 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x78 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x78 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x78 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x78 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x78 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x78 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x78 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x78 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x78 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x78 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x78 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x78 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x78 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x78 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x78 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x78 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x78 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x78 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x78 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x78 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x78 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x78 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x78 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x78 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x78 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x78 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x7C "IMNTRRTR31,This register is functional safety use only. Keep initial value."
bitfld.long 0x7C 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x7C 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x7C 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x7C 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x7C 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x7C 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x7C 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x7C 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x7C 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x7C 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x7C 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x7C 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x7C 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x7C 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x7C 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x7C 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x7C 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x7C 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x7C 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x7C 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x7C 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x7C 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x7C 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x7C 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x7C 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x7C 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x7C 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x7C 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x7C 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x7C 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x7C 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x7C 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x80 "IMNTRRTR32,This register is functional safety use only. Keep initial value."
bitfld.long 0x80 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x80 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x80 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x80 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x80 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x80 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x80 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x80 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x80 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x80 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x80 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x80 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x80 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x80 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x80 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x80 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x80 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x80 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x80 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x80 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x80 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x80 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x80 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x80 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x80 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x80 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x80 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x80 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x80 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x80 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x80 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x80 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x84 "IMNTRRTR33,This register is functional safety use only. Keep initial value."
bitfld.long 0x84 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x84 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x84 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x84 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x84 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x84 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x84 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x84 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x84 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x84 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x84 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x84 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x84 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x84 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x84 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x84 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x84 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x84 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x84 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x84 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x84 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x84 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x84 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x84 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x84 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x84 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x84 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x84 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x84 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x84 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x84 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x84 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x88 "IMNTRRTR34,This register is functional safety use only. Keep initial value."
bitfld.long 0x88 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x88 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x88 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x88 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x88 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x88 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x88 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x88 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x88 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x88 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x88 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x88 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x88 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x88 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x88 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x88 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x88 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x88 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x88 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x88 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x88 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x88 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x88 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x88 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x88 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x88 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x88 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x88 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x88 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x88 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x88 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x88 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x8C "IMNTRRTR35,This register is functional safety use only. Keep initial value."
bitfld.long 0x8C 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8C 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8C 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x8C 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8C 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8C 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x8C 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8C 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8C 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x8C 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8C 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8C 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x8C 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8C 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8C 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x8C 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8C 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8C 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x8C 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8C 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8C 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x8C 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8C 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8C 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x8C 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8C 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8C 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x8C 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x8C 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8C 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x8C 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x8C 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x90 "IMNTRRTR36,This register is functional safety use only. Keep initial value."
bitfld.long 0x90 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x90 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x90 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x90 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x90 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x90 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x90 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x90 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x90 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x90 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x90 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x90 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x90 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x90 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x90 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x90 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x90 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x90 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x90 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x90 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x90 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x90 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x90 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x90 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x90 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x90 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x90 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x90 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x90 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x90 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x90 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x90 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x94 "IMNTRRTR37,This register is functional safety use only. Keep initial value."
bitfld.long 0x94 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x94 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x94 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x94 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x94 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x94 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x94 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x94 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x94 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x94 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x94 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x94 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x94 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x94 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x94 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x94 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x94 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x94 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x94 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x94 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x94 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x94 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x94 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x94 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x94 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x94 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x94 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x94 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x94 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x94 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x94 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x94 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x98 "IMNTRRTR38,This register is functional safety use only. Keep initial value."
bitfld.long 0x98 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x98 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x98 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x98 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x98 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x98 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x98 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x98 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x98 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x98 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x98 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x98 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x98 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x98 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x98 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x98 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x98 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x98 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x98 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x98 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x98 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x98 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x98 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x98 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x98 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x98 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x98 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x98 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x98 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x98 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x98 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x98 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0x9C "IMNTRRTR39,This register is functional safety use only. Keep initial value."
bitfld.long 0x9C 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x9C 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x9C 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x9C 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x9C 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x9C 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x9C 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x9C 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x9C 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x9C 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x9C 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x9C 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x9C 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x9C 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x9C 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x9C 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x9C 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x9C 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x9C 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x9C 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x9C 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x9C 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x9C 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x9C 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x9C 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x9C 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x9C 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0x9C 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0x9C 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x9C 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0x9C 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0x9C 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xA0 "IMNTRRTR40,This register is functional safety use only. Keep initial value."
bitfld.long 0xA0 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA0 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA0 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xA0 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA0 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA0 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xA0 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA0 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA0 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xA0 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA0 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA0 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xA0 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA0 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA0 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xA0 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA0 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA0 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xA0 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA0 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA0 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xA0 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA0 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA0 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xA0 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA0 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA0 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xA0 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA0 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA0 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xA0 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA0 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xA4 "IMNTRRTR41,This register is functional safety use only. Keep initial value."
bitfld.long 0xA4 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA4 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA4 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xA4 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA4 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA4 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xA4 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA4 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA4 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xA4 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA4 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA4 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xA4 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA4 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA4 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xA4 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA4 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA4 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xA4 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA4 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA4 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xA4 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA4 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA4 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xA4 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA4 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA4 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xA4 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA4 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA4 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xA4 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA4 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xA8 "IMNTRRTR42,This register is functional safety use only. Keep initial value."
bitfld.long 0xA8 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA8 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA8 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xA8 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA8 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA8 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xA8 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA8 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA8 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xA8 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA8 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA8 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xA8 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA8 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA8 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xA8 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA8 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA8 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xA8 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA8 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA8 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xA8 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA8 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA8 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xA8 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA8 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA8 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xA8 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xA8 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA8 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xA8 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xA8 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xAC "IMNTRRTR43,This register is functional safety use only. Keep initial value."
bitfld.long 0xAC 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xAC 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xAC 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xAC 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xAC 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xAC 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xAC 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xAC 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xAC 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xAC 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xAC 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xAC 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xAC 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xAC 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xAC 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xAC 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xAC 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xAC 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xAC 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xAC 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xAC 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xAC 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xAC 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xAC 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xAC 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xAC 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xAC 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xAC 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xAC 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xAC 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xAC 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xAC 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xB0 "IMNTRRTR44,This register is functional safety use only. Keep initial value."
bitfld.long 0xB0 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB0 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB0 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xB0 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB0 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB0 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xB0 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB0 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB0 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xB0 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB0 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB0 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xB0 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB0 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB0 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xB0 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB0 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB0 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xB0 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB0 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB0 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xB0 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB0 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB0 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xB0 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB0 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB0 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xB0 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB0 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB0 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xB0 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB0 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xB4 "IMNTRRTR45,This register is functional safety use only. Keep initial value."
bitfld.long 0xB4 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB4 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB4 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xB4 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB4 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB4 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xB4 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB4 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB4 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xB4 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB4 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB4 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xB4 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB4 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB4 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xB4 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB4 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB4 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xB4 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB4 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB4 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xB4 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB4 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB4 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xB4 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB4 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB4 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xB4 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB4 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB4 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xB4 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB4 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xB8 "IMNTRRTR46,This register is functional safety use only. Keep initial value."
bitfld.long 0xB8 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB8 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB8 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xB8 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB8 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB8 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xB8 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB8 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB8 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xB8 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB8 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB8 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xB8 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB8 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB8 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xB8 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB8 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB8 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xB8 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB8 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB8 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xB8 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB8 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB8 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xB8 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB8 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB8 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xB8 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xB8 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB8 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xB8 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xB8 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xBC "IMNTRRTR47,This register is functional safety use only. Keep initial value."
bitfld.long 0xBC 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xBC 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xBC 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xBC 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xBC 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xBC 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xBC 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xBC 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xBC 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xBC 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xBC 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xBC 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xBC 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xBC 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xBC 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xBC 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xBC 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xBC 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xBC 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xBC 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xBC 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xBC 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xBC 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xBC 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xBC 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xBC 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xBC 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xBC 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xBC 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xBC 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xBC 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xBC 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xC0 "IMNTRRTR48,This register is functional safety use only. Keep initial value."
bitfld.long 0xC0 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC0 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC0 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC0 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC0 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC0 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC0 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC0 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC0 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC0 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC0 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC0 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC0 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC0 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC0 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC0 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC0 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC0 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC0 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC0 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC0 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC0 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC0 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC0 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC0 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC0 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC0 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC0 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC0 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC0 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC0 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC0 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xC4 "IMNTRRTR49,This register is functional safety use only. Keep initial value."
bitfld.long 0xC4 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC4 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC4 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC4 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC4 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC4 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC4 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC4 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC4 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC4 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC4 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC4 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC4 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC4 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC4 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC4 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC4 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC4 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC4 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC4 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC4 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC4 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC4 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC4 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC4 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC4 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC4 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC4 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC4 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC4 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC4 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC4 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xC8 "IMNTRRTR50,This register is functional safety use only. Keep initial value."
bitfld.long 0xC8 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC8 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC8 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC8 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC8 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC8 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC8 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC8 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC8 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC8 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC8 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC8 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC8 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC8 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC8 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC8 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC8 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC8 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC8 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC8 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC8 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC8 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC8 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC8 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC8 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC8 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC8 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xC8 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xC8 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC8 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xC8 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xC8 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xCC "IMNTRRTR51,This register is functional safety use only. Keep initial value."
bitfld.long 0xCC 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xCC 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xCC 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xCC 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xCC 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xCC 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xCC 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xCC 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xCC 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xCC 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xCC 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xCC 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xCC 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xCC 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xCC 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xCC 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xCC 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xCC 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xCC 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xCC 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xCC 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xCC 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xCC 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xCC 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xCC 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xCC 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xCC 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xCC 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xCC 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xCC 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xCC 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xCC 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xD0 "IMNTRRTR52,This register is functional safety use only. Keep initial value."
bitfld.long 0xD0 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD0 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD0 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xD0 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD0 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD0 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xD0 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD0 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD0 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xD0 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD0 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD0 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xD0 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD0 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD0 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xD0 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD0 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD0 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xD0 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD0 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD0 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xD0 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD0 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD0 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xD0 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD0 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD0 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xD0 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD0 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD0 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xD0 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD0 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xD4 "IMNTRRTR53,This register is functional safety use only. Keep initial value."
bitfld.long 0xD4 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD4 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD4 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xD4 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD4 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD4 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xD4 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD4 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD4 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xD4 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD4 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD4 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xD4 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD4 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD4 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xD4 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD4 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD4 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xD4 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD4 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD4 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xD4 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD4 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD4 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xD4 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD4 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD4 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xD4 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD4 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD4 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xD4 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD4 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xD8 "IMNTRRTR54,This register is functional safety use only. Keep initial value."
bitfld.long 0xD8 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD8 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD8 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xD8 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD8 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD8 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xD8 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD8 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD8 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xD8 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD8 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD8 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xD8 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD8 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD8 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xD8 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD8 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD8 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xD8 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD8 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD8 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xD8 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD8 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD8 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xD8 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD8 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD8 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xD8 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xD8 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD8 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xD8 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xD8 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xDC "IMNTRRTR55,This register is functional safety use only. Keep initial value."
bitfld.long 0xDC 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xDC 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xDC 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xDC 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xDC 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xDC 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xDC 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xDC 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xDC 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xDC 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xDC 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xDC 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xDC 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xDC 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xDC 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xDC 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xDC 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xDC 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xDC 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xDC 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xDC 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xDC 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xDC 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xDC 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xDC 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xDC 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xDC 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xDC 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xDC 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xDC 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xDC 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xDC 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xE0 "IMNTRRTR56,This register is functional safety use only. Keep initial value."
bitfld.long 0xE0 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE0 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE0 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xE0 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE0 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE0 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xE0 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE0 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE0 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xE0 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE0 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE0 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xE0 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE0 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE0 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xE0 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE0 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE0 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xE0 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE0 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE0 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xE0 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE0 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE0 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xE0 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE0 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE0 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xE0 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE0 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE0 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xE0 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE0 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xE4 "IMNTRRTR57,This register is functional safety use only. Keep initial value."
bitfld.long 0xE4 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE4 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE4 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xE4 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE4 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE4 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xE4 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE4 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE4 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xE4 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE4 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE4 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xE4 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE4 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE4 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xE4 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE4 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE4 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xE4 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE4 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE4 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xE4 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE4 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE4 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xE4 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE4 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE4 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xE4 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE4 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE4 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xE4 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE4 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xE8 "IMNTRRTR58,This register is functional safety use only. Keep initial value."
bitfld.long 0xE8 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE8 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE8 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xE8 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE8 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE8 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xE8 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE8 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE8 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xE8 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE8 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE8 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xE8 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE8 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE8 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xE8 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE8 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE8 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xE8 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE8 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE8 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xE8 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE8 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE8 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xE8 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE8 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE8 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xE8 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xE8 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE8 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xE8 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xE8 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xEC "IMNTRRTR59,This register is functional safety use only. Keep initial value."
bitfld.long 0xEC 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xEC 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xEC 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xEC 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xEC 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xEC 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xEC 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xEC 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xEC 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xEC 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xEC 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xEC 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xEC 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xEC 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xEC 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xEC 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xEC 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xEC 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xEC 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xEC 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xEC 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xEC 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xEC 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xEC 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xEC 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xEC 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xEC 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xEC 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xEC 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xEC 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xEC 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xEC 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
line.long 0xF0 "IMNTRRTR60,This register is functional safety use only. Keep initial value."
bitfld.long 0xF0 31. "IMNTR_EN15,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xF0 30. "WAIT_SET15,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xF0 29. "IMNTR_EN14,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xF0 28. "WAIT_SET14,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xF0 27. "IMNTR_EN13,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xF0 26. "WAIT_SET13,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xF0 25. "IMNTR_EN12,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xF0 24. "WAIT_SET12,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xF0 23. "IMNTR_EN11,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xF0 22. "WAIT_SET11,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xF0 21. "IMNTR_EN10,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xF0 20. "WAIT_SET10,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xF0 19. "IMNTR_EN9,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xF0 18. "WAIT_SET9,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xF0 17. "IMNTR_EN8,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xF0 16. "WAIT_SET8,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xF0 15. "IMNTR_EN7,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xF0 14. "WAIT_SET7,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xF0 13. "IMNTR_EN6,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xF0 12. "WAIT_SET6,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xF0 11. "IMNTR_EN5,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xF0 10. "WAIT_SET5,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xF0 9. "IMNTR_EN4,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xF0 8. "WAIT_SET4,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xF0 7. "IMNTR_EN3,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xF0 6. "WAIT_SET3,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xF0 5. "IMNTR_EN2,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
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bitfld.long 0xF0 4. "WAIT_SET2,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
bitfld.long 0xF0 3. "IMNTR_EN1,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xF0 2. "WAIT_SET1,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
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bitfld.long 0xF0 1. "IMNTR_EN0,Show the configuration of IMNTRCRx's IMNTR_EN bit." "0: IMNTRCRx's IMNTR_EN bit is 0,1: IMNTRCRx's IMNTR_EN bit is 1"
bitfld.long 0xF0 0. "WAIT_SET0,Show the configuration of IMNTRCRx's WAIT_SET bit." "0: IMNTRCRx's WAIT_SET bit is 0,1: IMNTRCRx's WAIT_SET bit is 1"
tree.end
tree "INTC_4"
base ad:0xE61C0000
rgroup.long 0x0++0x3
line.long 0x0 "INTREQ_STS0,This register shows interrupt request status. Each bit define for each signal IRQ0 to IRQ5"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x0 0.--5. 1. "INTREQ,Interrupt Status"
group.long 0x4++0x7
line.long 0x0 "INTEN_STS0,This register shows interrupt enable status and clear interrupt enable. Each bit define for each signal IRQ0 to IRQ5"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x0 0.--5. 1. "INTEN,Interrupt Enable"
line.long 0x4 "INTEN_SET0,This register set interrupt enable. Each bit define for each signal IRQ0 to IRQ5"
hexmask.long 0x4 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x4 0.--5. 1. "INTENS,Interrupt Enable Set"
group.long 0x100++0x3
line.long 0x0 "DETECT_STATUS,This register shows IRQn event detection status and provides the function to clear edge-triggered event. The status bit is cleared by writing 1 to the corresponding bit in edge-triggered mode. Writing 0 to this register bits does not affect.."
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x0 0.--5. 1. "IRQnDET,IRQn Event Detection Status"
rgroup.long 0x104++0x1F
line.long 0x0 "MONITOR,This register provide external signal monitor. Each bit define for each signal IRQ0 to IRQ5"
hexmask.long 0x0 6.--31. 1. "Reserved_6,-"
hexmask.long.byte 0x0 0.--5. 1. "IRQnMON,IRQn External Signal Level Monitor"
line.long 0x4 "HLVL_STS,This register provides interrupt detail detect status. Each bit define for each signal IRQ0 to IRQ5"
hexmask.long 0x4 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x4 0.--5. 1. "IRQnHSTS,IRQn High Level Interrupt Status"
line.long 0x8 "LLVL_STS,This register provides interrupt detail detect status. Each bit define for each signal IRQ0 to IRQ5"
hexmask.long 0x8 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x8 0.--5. 1. "IRQnLSTS,IRQn Low Level Interrupt Status"
line.long 0xC "S_R_EDGE_STS,This register provides interrupt detail detect status. Each bit define for each signal IRQ0 to IRQ5"
hexmask.long 0xC 6.--31. 1. "Reserved_6,-"
hexmask.long.byte 0xC 0.--5. 1. "IRQnSRSTS,IRQn Synchronous Rise Edge Interrupt Status"
line.long 0x10 "S_F_EDGE_STS,This register provides interrupt detail detect status. Each bit define for each signal IRQ0 to IRQ5"
hexmask.long 0x10 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x10 0.--5. 1. "IRQnSFSTS,IRQn Synchronous Fall Edge Interrupt Status"
line.long 0x14 "A_R_EDGE_STS,This register provides interrupt detail detect status. Each bit define for each signal IRQ0 to IRQ5"
hexmask.long 0x14 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x14 0.--5. 1. "IRQnARSTS,IRQn Asynchronous Rise Edge Interrupt Status"
line.long 0x18 "A_F_EDGE_STS,This register provides interrupt detail detect status. Each bit define for each signal IRQ0 to IRQ5"
hexmask.long 0x18 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x18 0.--5. 1. "IRQnAFSTS,IRQn Asynchronous Fall Edge Interrupt Status"
line.long 0x1C "CHTEN_STS,This register shows chattering reduction enable status."
hexmask.long 0x1C 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x1C 0.--5. 1. "CHTEN,Chattering Reduction Enable Status"
group.long 0x180++0x17
line.long 0x0 "CONFIG_0,This register provides detection mode and chattering reduction setting."
bitfld.long 0x0 31. "CHTEN,Chattering Reduction Enable" "0: Chattering reduction disabled,1: Chattering reduction enabled"
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
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bitfld.long 0x0 22.--23. "STS1,IRQn Scan Timing" "0: 1 ms,1: 2 ms,?,?"
hexmask.long.byte 0x0 16.--21. 1. "STS2,IRQn Chattering Reduction Period"
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hexmask.long.word 0x0 6.--15. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x0 0.--5. 1. "SS,Sense Selection"
line.long 0x4 "CONFIG_1,This register provides detection mode and chattering reduction setting."
bitfld.long 0x4 31. "CHTEN,Chattering Reduction Enable" "0: Chattering reduction disabled,1: Chattering reduction enabled"
hexmask.long.byte 0x4 24.--30. 1. "Reserved_24,Reserved"
newline
bitfld.long 0x4 22.--23. "STS1,IRQn Scan Timing" "0: 1 ms,1: 2 ms,?,?"
hexmask.long.byte 0x4 16.--21. 1. "STS2,IRQn Chattering Reduction Period"
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hexmask.long.word 0x4 6.--15. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x4 0.--5. 1. "SS,Sense Selection"
line.long 0x8 "CONFIG_2,This register provides detection mode and chattering reduction setting."
bitfld.long 0x8 31. "CHTEN,Chattering Reduction Enable" "0: Chattering reduction disabled,1: Chattering reduction enabled"
hexmask.long.byte 0x8 24.--30. 1. "Reserved_24,Reserved"
newline
bitfld.long 0x8 22.--23. "STS1,IRQn Scan Timing" "0: 1 ms,1: 2 ms,?,?"
hexmask.long.byte 0x8 16.--21. 1. "STS2,IRQn Chattering Reduction Period"
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hexmask.long.word 0x8 6.--15. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x8 0.--5. 1. "SS,Sense Selection"
line.long 0xC "CONFIG_3,This register provides detection mode and chattering reduction setting."
bitfld.long 0xC 31. "CHTEN,Chattering Reduction Enable" "0: Chattering reduction disabled,1: Chattering reduction enabled"
hexmask.long.byte 0xC 24.--30. 1. "Reserved_24,Reserved"
newline
bitfld.long 0xC 22.--23. "STS1,IRQn Scan Timing" "0: 1 ms,1: 2 ms,?,?"
hexmask.long.byte 0xC 16.--21. 1. "STS2,IRQn Chattering Reduction Period"
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hexmask.long.word 0xC 6.--15. 1. "Reserved_6,Reserved"
hexmask.long.byte 0xC 0.--5. 1. "SS,Sense Selection"
line.long 0x10 "CONFIG_4,This register provides detection mode and chattering reduction setting."
bitfld.long 0x10 31. "CHTEN,Chattering Reduction Enable" "0: Chattering reduction disabled,1: Chattering reduction enabled"
hexmask.long.byte 0x10 24.--30. 1. "Reserved_24,Reserved"
newline
bitfld.long 0x10 22.--23. "STS1,IRQn Scan Timing" "0: 1 ms,1: 2 ms,?,?"
hexmask.long.byte 0x10 16.--21. 1. "STS2,IRQn Chattering Reduction Period"
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hexmask.long.word 0x10 6.--15. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x10 0.--5. 1. "SS,Sense Selection"
line.long 0x14 "CONFIG_5,This register provides detection mode and chattering reduction setting."
bitfld.long 0x14 31. "CHTEN,Chattering Reduction Enable" "0: Chattering reduction disabled,1: Chattering reduction enabled"
hexmask.long.byte 0x14 24.--30. 1. "Reserved_24,Reserved"
newline
bitfld.long 0x14 22.--23. "STS1,IRQn Scan Timing" "0: 1 ms,1: 2 ms,?,?"
hexmask.long.byte 0x14 16.--21. 1. "STS2,IRQn Chattering Reduction Period"
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hexmask.long.word 0x14 6.--15. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x14 0.--5. 1. "SS,Sense Selection"
rgroup.long 0x400++0x3
line.long 0x0 "NMIREQ_STS0,This register shows external NMI request status."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "C7STS,NMI Status for CPU7 interface" "0: not during NMI service,1: during NMI service"
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bitfld.long 0x0 6. "C6STS,NMI Status for CPU6 interface" "0: not during NMI service,1: during NMI service"
bitfld.long 0x0 5. "C5STS,NMI Status for CPU5 interface" "0: not during NMI service,1: during NMI service"
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bitfld.long 0x0 4. "C4STS,NMI Status for CPU4 interface" "0: not during NMI service,1: during NMI service"
bitfld.long 0x0 3. "C3STS,NMI Status for CPU3 interface" "0: not during NMI service,1: during NMI service"
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bitfld.long 0x0 2. "C2STS,NMI Status for CPU2 interface" "0: not during NMI service,1: during NMI service"
bitfld.long 0x0 1. "C1STS,NMI Status for CPU1 interface" "0: not during NMI service,1: during NMI service"
newline
bitfld.long 0x0 0. "C0STS,NMI Status for CPU0 interface" "0: not during NMI service,1: during NMI service"
group.long 0x404++0x7
line.long 0x0 "NMIEN_STS0,This register shows NMI interrupt enable status and clears NMI interrupt enable."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
eventfld.long 0x0 7. "C7IEN,Interrupt Enable for CPU7 interface" "0: No functional effect,1: NMI interrupt enable clear"
newline
eventfld.long 0x0 6. "C6IEN,Interrupt Enable for CPU6 interface" "0: No functional effect,1: NMI interrupt enable clear"
eventfld.long 0x0 5. "C5IEN,Interrupt Enable for CPU5 interface" "0: No functional effect,1: NMI interrupt enable clear"
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eventfld.long 0x0 4. "C4IEN,Interrupt Enable for CPU4 interface" "0: No functional effect,1: NMI interrupt enable clear"
eventfld.long 0x0 3. "C3IEN,Interrupt Enable for CPU3 interface" "0: No functional effect,1: NMI interrupt enable clear"
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eventfld.long 0x0 2. "C2IEN,Interrupt Enable for CPU2 interface" "0: No functional effect,1: NMI interrupt enable clear"
eventfld.long 0x0 1. "C1IEN,Interrupt Enable for CPU1 interface" "0: No functional effect,1: NMI interrupt enable clear"
newline
eventfld.long 0x0 0. "C0IEN,Interrupt Enable for CPU0 interface" "0: No functional effect,1: NMI interrupt enable clear"
line.long 0x4 "NMIEN_SET0,This register enables the NMI interrupt to each CPU"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x4 7. "C7SET,Interrupt Enable Set for CPU7 interface" "0: No functional effect,1: Interrupt enable set"
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bitfld.long 0x4 6. "C6SET,Interrupt Enable Set for CPU6 interface" "0: No functional effect,1: Interrupt enable set"
bitfld.long 0x4 5. "C5SET,Interrupt Enable Set for CPU5 interface" "0: No functional effect,1: Interrupt enable set"
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bitfld.long 0x4 4. "C4SET,Interrupt Enable Set for CPU4 interface" "0: No functional effect,1: Interrupt enable set"
bitfld.long 0x4 3. "C3SET,Interrupt Enable Set for CPU3 interface" "0: No functional effect,1: Interrupt enable set"
newline
bitfld.long 0x4 2. "C2SET,Interrupt Enable Set for CPU2 interface" "0: No functional effect,1: Interrupt enable set"
bitfld.long 0x4 1. "C1SET,Interrupt Enable Set for CPU1 interface" "0: No functional effect,1: Interrupt enable set"
newline
bitfld.long 0x4 0. "C0SET,Interrupt Enable Set for CPU0 interface" "0: No functional effect,1: Interrupt enable set"
group.long 0x500++0x3
line.long 0x0 "DETECT_STATUS_NMI,This register shows NMIn event detection status and provides the function to clear edge-triggered event. The status bit is cleared by writing 1 to the corresponding bit in edge-triggered mode. Writing 0 to this register bits does not.."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
eventfld.long 0x0 7. "NMI7DET,NMI Event Detection Status for CPU7 interface" "0: No functional effect,1: No functional effect"
newline
eventfld.long 0x0 6. "NMI6DET,NMI Event Detection Status for CPU6 interface" "0: No functional effect,1: No functional effect"
eventfld.long 0x0 5. "NMI5DET,NMI Event Detection Status for CPU5 interface" "0: No functional effect,1: No functional effect"
newline
eventfld.long 0x0 4. "NMI4DET,NMI Event Detection Status for CPU4 interface" "0: No functional effect,1: No functional effect"
eventfld.long 0x0 3. "NMI3DET,NMI Event Detection Status for CPU3 interface" "0: No functional effect,1: No functional effect"
newline
eventfld.long 0x0 2. "NMI2DET,NMI Event Detection Status for CPU2 interface" "0: No functional effect,1: No functional effect"
eventfld.long 0x0 1. "NMI1DET,NMI Event Detection Status for CPU1 interface" "0: No functional effect,1: No functional effect"
newline
eventfld.long 0x0 0. "NMI0DET,NMI Event Detection Status for CPU0 interface" "0: No functional effect,1: No functional effect"
rgroup.long 0x504++0x1F
line.long 0x0 "MONITOR_NMI,This register provides external signal monitor."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "NMI7MON,NMI External Signal Level Monitor for CPU7 interface" "0: NMI is low level,1: NMI is high level"
newline
bitfld.long 0x0 6. "NMI6MON,NMI External Signal Level Monitor for CPU6 interface" "0: NMI is low level,1: NMI is high level"
bitfld.long 0x0 5. "NMI5MON,NMI External Signal Level Monitor for CPU5 interface" "0: NMI is low level,1: NMI is high level"
newline
bitfld.long 0x0 4. "NMI4MON,NMI External Signal Level Monitor for CPU4 interface" "0: NMI is low level,1: NMI is high level"
bitfld.long 0x0 3. "NMI3MON,NMI External Signal Level Monitor for CPU3 interface" "0: NMI is low level,1: NMI is high level"
newline
bitfld.long 0x0 2. "NMI2MON,NMI External Signal Level Monitor for CPU2 interface" "0: NMI is low level,1: NMI is high level"
bitfld.long 0x0 1. "NMI1MON,NMI External Signal Level Monitor for CPU1 interface" "0: NMI is low level,1: NMI is high level"
newline
bitfld.long 0x0 0. "NMI0MON,NMI External Signal Level Monitor for CPU0 interface" "0: NMI is low level,1: NMI is high level"
line.long 0x4 "HLVL_STS_NMI,This register provides interrupt detail detect status."
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x4 7. "NMI7HSTS,NMI High Level Interrupt Status for CPU7 interface" "0: NMI high level interrupt request not occurred,1: NMI high level interrupt request occurred"
newline
bitfld.long 0x4 6. "NMI6HSTS,NMI High Level Interrupt Status for CPU6 interface" "0: NMI high level interrupt request not occurred,1: NMI high level interrupt request occurred"
bitfld.long 0x4 5. "NMI5HSTS,NMI High Level Interrupt Status for CPU5 interface" "0: NMI high level interrupt request not occurred,1: NMI high level interrupt request occurred"
newline
bitfld.long 0x4 4. "NMI4HSTS,NMI High Level Interrupt Status for CPU4 interface" "0: NMI high level interrupt request not occurred,1: NMI high level interrupt request occurred"
bitfld.long 0x4 3. "NMI3HSTS,NMI High Level Interrupt Status for CPU3 interface" "0: NMI high level interrupt request not occurred,1: NMI high level interrupt request occurred"
newline
bitfld.long 0x4 2. "NMI2HSTS,NMI High Level Interrupt Status for CPU2 interface" "0: NMI high level interrupt request not occurred,1: NMI high level interrupt request occurred"
bitfld.long 0x4 1. "NMI1HSTS,NMI High Level Interrupt Status for CPU1 interface" "0: NMI high level interrupt request not occurred,1: NMI high level interrupt request occurred"
newline
bitfld.long 0x4 0. "NMI0HSTS,NMI High Level Interrupt Status for CPU0 interface" "0: NMI high level interrupt request not occurred,1: NMI high level interrupt request occurred"
line.long 0x8 "LLVL_STS_NMI,This register provides interrupt detail detect status."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x8 7. "NMI7LSTS,NMI Low Level Interrupt Status for CPU7 interface" "0: NMI low level interrupt request not occurred,1: NMI low level interrupt request occurred"
newline
bitfld.long 0x8 6. "NMI6LSTS,NMI Low Level Interrupt Status for CPU6 interface" "0: NMI low level interrupt request not occurred,1: NMI low level interrupt request occurred"
bitfld.long 0x8 5. "NMI5LSTS,NMI Low Level Interrupt Status for CPU5 interface" "0: NMI low level interrupt request not occurred,1: NMI low level interrupt request occurred"
newline
bitfld.long 0x8 4. "NMI4LSTS,NMI Low Level Interrupt Status for CPU4 interface" "0: NMI low level interrupt request not occurred,1: NMI low level interrupt request occurred"
bitfld.long 0x8 3. "NMI3LSTS,NMI Low Level Interrupt Status for CPU3 interface" "0: NMI low level interrupt request not occurred,1: NMI low level interrupt request occurred"
newline
bitfld.long 0x8 2. "NMI2LSTS,NMI Low Level Interrupt Status for CPU2 interface" "0: NMI low level interrupt request not occurred,1: NMI low level interrupt request occurred"
bitfld.long 0x8 1. "NMI1LSTS,NMI Low Level Interrupt Status for CPU1 interface" "0: NMI low level interrupt request not occurred,1: NMI low level interrupt request occurred"
newline
bitfld.long 0x8 0. "NMI0LSTS,NMI Low Level Interrupt Status for CPU0 interface" "0: NMI low level interrupt request not occurred,1: NMI low level interrupt request occurred"
line.long 0xC "S_R_EDGE_STS_NMI,This register provides interrupt detail detect status."
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0xC 7. "NMI7SRSTS,NMI Synchronous Rise Edge Interrupt Status for CPU7 interface" "0: NMI rise edge interrupt request not occurred,1: NMI rise edge interrupt request occurred"
newline
bitfld.long 0xC 6. "NMI6SRSTS,NMI Synchronous Rise Edge Interrupt Status for CPU6 interface" "0: NMI rise edge interrupt request not occurred,1: NMI rise edge interrupt request occurred"
bitfld.long 0xC 5. "NMI5SRSTS,NMI Synchronous Rise Edge Interrupt Status for CPU5 interface" "0: NMI rise edge interrupt request not occurred,1: NMI rise edge interrupt request occurred"
newline
bitfld.long 0xC 4. "NMI4SRSTS,NMI Synchronous Rise Edge Interrupt Status for CPU4 interface" "0: NMI rise edge interrupt request not occurred,1: NMI rise edge interrupt request occurred"
bitfld.long 0xC 3. "NMI3SRSTS,NMI Synchronous Rise Edge Interrupt Status for CPU3 interface" "0: NMI rise edge interrupt request not occurred,1: NMI rise edge interrupt request occurred"
newline
bitfld.long 0xC 2. "NMI2SRSTS,NMI Synchronous Rise Edge Interrupt Status for CPU2 interface" "0: NMI rise edge interrupt request not occurred,1: NMI rise edge interrupt request occurred"
bitfld.long 0xC 1. "NMI1SRSTS,NMI Synchronous Rise Edge Interrupt Status for CPU1 interface" "0: NMI rise edge interrupt request not occurred,1: NMI rise edge interrupt request occurred"
newline
bitfld.long 0xC 0. "NMI0SRSTS,NMI Synchronous Rise Edge Interrupt Status for CPU0 interface" "0: NMI rise edge interrupt request not occurred,1: NMI rise edge interrupt request occurred"
line.long 0x10 "S_F_EDGE_STS_NMI,This register provides interrupt detail detect status."
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x10 7. "NMI7SFSTS,NMI Synchronous Fall Edge Interrupt Status for CPU7 interface" "0: NMI fall edge interrupt request not occurred,1: NMI fall edge interrupt request occurred"
newline
bitfld.long 0x10 6. "NMI6SFSTS,NMI Synchronous Fall Edge Interrupt Status for CPU6 interface" "0: NMI fall edge interrupt request not occurred,1: NMI fall edge interrupt request occurred"
bitfld.long 0x10 5. "NMI5SFSTS,NMI Synchronous Fall Edge Interrupt Status for CPU5 interface" "0: NMI fall edge interrupt request not occurred,1: NMI fall edge interrupt request occurred"
newline
bitfld.long 0x10 4. "NMI4SFSTS,NMI Synchronous Fall Edge Interrupt Status for CPU4 interface" "0: NMI fall edge interrupt request not occurred,1: NMI fall edge interrupt request occurred"
bitfld.long 0x10 3. "NMI3SFSTS,NMI Synchronous Fall Edge Interrupt Status for CPU3 interface" "0: NMI fall edge interrupt request not occurred,1: NMI fall edge interrupt request occurred"
newline
bitfld.long 0x10 2. "NMI2SFSTS,NMI Synchronous Fall Edge Interrupt Status for CPU2 interface" "0: NMI fall edge interrupt request not occurred,1: NMI fall edge interrupt request occurred"
bitfld.long 0x10 1. "NMI1SFSTS,NMI Synchronous Fall Edge Interrupt Status for CPU1 interface" "0: NMI fall edge interrupt request not occurred,1: NMI fall edge interrupt request occurred"
newline
bitfld.long 0x10 0. "NMI0SFSTS,NMI Synchronous Fall Edge Interrupt Status for CPU0 interface" "0: NMI fall edge interrupt request not occurred,1: NMI fall edge interrupt request occurred"
line.long 0x14 "A_R_EDGE_STS_NMI,This register provides interrupt detail detect status."
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x14 7. "NMI7ARSTS,NMI Asynchronous Rise Edge Interrupt Status for CPU7 interface" "0: NMI rise edge interrupt request not occurred,1: NMI rise edge interrupt request occurred"
newline
bitfld.long 0x14 6. "NMI6ARSTS,NMI Asynchronous Rise Edge Interrupt Status for CPU6 interface" "0: NMI rise edge interrupt request not occurred,1: NMI rise edge interrupt request occurred"
bitfld.long 0x14 5. "NMI5ARSTS,NMI Asynchronous Rise Edge Interrupt Status for CPU5 interface" "0: NMI rise edge interrupt request not occurred,1: NMI rise edge interrupt request occurred"
newline
bitfld.long 0x14 4. "NMI4ARSTS,NMI Asynchronous Rise Edge Interrupt Status for CPU4 interface" "0: NMI rise edge interrupt request not occurred,1: NMI rise edge interrupt request occurred"
bitfld.long 0x14 3. "NMI3ARSTS,NMI Asynchronous Rise Edge Interrupt Status for CPU3 interface" "0: NMI rise edge interrupt request not occurred,1: NMI rise edge interrupt request occurred"
newline
bitfld.long 0x14 2. "NMI2ARSTS,NMI Asynchronous Rise Edge Interrupt Status for CPU2 interface" "0: NMI rise edge interrupt request not occurred,1: NMI rise edge interrupt request occurred"
bitfld.long 0x14 1. "NMI1ARSTS,NMI Asynchronous Rise Edge Interrupt Status for CPU1 interface" "0: NMI rise edge interrupt request not occurred,1: NMI rise edge interrupt request occurred"
newline
bitfld.long 0x14 0. "NMI0ARSTS,NMI Asynchronous Rise Edge Interrupt Status for CPU0 interface" "0: NMI rise edge interrupt request not occurred,1: NMI rise edge interrupt request occurred"
line.long 0x18 "A_F_EDGE_STS_NMI,This register provides interrupt detail detect status."
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved_8,Reserved"
bitfld.long 0x18 7. "NMI7AFSTS,NMI Asynchronous Fall Edge Interrupt Status for CPU7 interface" "0: NMI fall edge interrupt request not occurred,1: NMI fall edge interrupt request occurred"
newline
bitfld.long 0x18 6. "NMI6AFSTS,NMI Asynchronous Fall Edge Interrupt Status for CPU6 interface" "0: NMI fall edge interrupt request not occurred,1: NMI fall edge interrupt request occurred"
bitfld.long 0x18 5. "NMI5AFSTS,NMI Asynchronous Fall Edge Interrupt Status for CPU5 interface" "0: NMI fall edge interrupt request not occurred,1: NMI fall edge interrupt request occurred"
newline
bitfld.long 0x18 4. "NMI4AFSTS,NMI Asynchronous Fall Edge Interrupt Status for CPU4 interface" "0: NMI fall edge interrupt request not occurred,1: NMI fall edge interrupt request occurred"
bitfld.long 0x18 3. "NMI3AFSTS,NMI Asynchronous Fall Edge Interrupt Status for CPU3 interface" "0: NMI fall edge interrupt request not occurred,1: NMI fall edge interrupt request occurred"
newline
bitfld.long 0x18 2. "NMI2AFSTS,NMI Asynchronous Fall Edge Interrupt Status for CPU2 interface" "0: NMI fall edge interrupt request not occurred,1: NMI fall edge interrupt request occurred"
bitfld.long 0x18 1. "NMI1AFSTS,NMI Asynchronous Fall Edge Interrupt Status for CPU1 interface" "0: NMI fall edge interrupt request not occurred,1: NMI fall edge interrupt request occurred"
newline
bitfld.long 0x18 0. "NMI0AFSTS,NMI Asynchronous Fall Edge Interrupt Status for CPU0 interface" "0: NMI fall edge interrupt request not occurred,1: NMI fall edge interrupt request occurred"
line.long 0x1C "CHTEN_STS_NMI,This register shows chattering reduction enable status."
hexmask.long 0x1C 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x1C 0. "CHTEN,Chattering Reduction Enable Status" "0: Chattering reduction disabled,1: Chattering reduction enabled"
group.long 0x540++0x3
line.long 0x0 "DEB_SET_NMI,This register provides chattering reduction setting."
bitfld.long 0x0 31. "CHTEN,Chattering Reduction Enable" "0: Chattering reduction disabled,1: Chattering reduction enabled"
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
bitfld.long 0x0 22.--23. "STS1,NMI Scan Timing" "0: 1 ms,1: 2 ms,?,?"
hexmask.long.byte 0x0 16.--21. 1. "STS2,NMI Chattering Reduction Period"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
group.long 0x580++0x1F
line.long 0x0 "CONFIG0_NMI,This register provides chattering reduction setting."
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x0 0.--5. 1. "SS,Sense Selection"
line.long 0x4 "CONFIG1_NMI,This register provides chattering reduction setting."
hexmask.long 0x4 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x4 0.--5. 1. "SS,Sense Selection"
line.long 0x8 "CONFIG2_NMI,This register provides chattering reduction setting."
hexmask.long 0x8 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x8 0.--5. 1. "SS,Sense Selection"
line.long 0xC "CONFIG3_NMI,This register provides chattering reduction setting."
hexmask.long 0xC 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0xC 0.--5. 1. "SS,Sense Selection"
line.long 0x10 "CONFIG4_NMI,This register provides chattering reduction setting."
hexmask.long 0x10 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x10 0.--5. 1. "SS,Sense Selection"
line.long 0x14 "CONFIG5_NMI,This register provides chattering reduction setting."
hexmask.long 0x14 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x14 0.--5. 1. "SS,Sense Selection"
line.long 0x18 "CONFIG6_NMI,This register provides chattering reduction setting."
hexmask.long 0x18 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x18 0.--5. 1. "SS,Sense Selection"
line.long 0x1C "CONFIG7_NMI,This register provides chattering reduction setting."
hexmask.long 0x1C 6.--31. 1. "Reserved_6,Reserved"
hexmask.long.byte 0x1C 0.--5. 1. "SS,Sense Selection"
group.long 0xA00++0xF
line.long 0x0 "NMI_LCK,This register provides NMI mask locking feature. When set the same value as NMI_LCKCODE. then NMI cannot be masked by software (always accept NMI interrupt)."
hexmask.long 0x0 0.--31. 1. "MSKLCK,Lock code setting"
line.long 0x4 "NMI_LCKCODE,This register sets the value for lock code of NMI mask."
hexmask.long 0x4 0.--31. 1. "LCKCODE,NMI mask lock code setting"
line.long 0x8 "NMI_DBG,This register enables the debug feature for NMI mask lock."
hexmask.long 0x8 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x8 0. "DBGEN,Enable debug for NMI mask lock feature" "0,1"
line.long 0xC "NMI_DBGCODE,This register sets value for debug code of NMI mask lock. When set the following value. then unlock this mask feature."
hexmask.long 0xC 0.--31. 1. "DBGCODE,NMI mask lock debug code setting"
tree.end
tree.end
tree "IPMMU (IP Memory Management Unit)"
base ad:0x0
tree "IPMMU_0"
base ad:0xEE000000
group.long 0x480548++0x7
line.long 0x0 "IMERRSIDAR__RT0,This register indicates the Error SrcID when EDC error happen in AXI AR channel."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x4 "IMERRSIDR__RT0,This register indicates the Error SrcID when EDC error happen in AXI R channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0x480558++0x3
line.long 0x0 "IMERRSIDNPTWAR__RT0,This register indicates the Error SrcID when EDC error happen in AXI AR channel with no Page Table Walk."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0x480560++0x1B
line.long 0x0 "IMAPQOS__RT0,This resister controls QoS value that is output from IPMMU(cache) to IPMMU(main) through ARADDR[35:32]."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "APQOS,Append QoS"
line.long 0x4 "IMERRSIDRRESP__RT0,This register indicates the Error SrcID when EDC error happen in AXI R(response) channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x8 "IMERRSIDPA__RT0,This register indicates the Error SrcID when EDC error happen in APB address channel."
bitfld.long 0x8 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x8 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x8 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0xC "IMERRSIDPWD__RT0,This register indicates the Error SrcID when EDC error happen in APB write data channel."
bitfld.long 0xC 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0xC 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x10 "IMRGID__RT0,Region-ID setting will be available for each IPMMU-hier (each bus hierarchy). This will be used for all PTW transactions originating in this bus hierarchy."
hexmask.long 0x10 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x10 0.--3. 1. "RGID,Region-ID"
line.long 0x14 "IMRGIDEN__RT0,This register is used for setting to protect IMRGID register."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x14 0.--15. 1. "RGIDEN,When RGIDEN[PUSER[5:2]]=1  IMRGID[3:0] register can be accessed."
line.long 0x18 "IMSECGRP__RT0,This register is used for setting to protect IMRGID register."
hexmask.long 0x18 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x18 0. "SECGRP,When PUSER[1]=0 " "0,1"
group.long 0x481500++0x3
line.long 0x0 "IMSCTLR__RT0,This register controls the behavior of IPMMU function."
bitfld.long 0x0 31. "DISWPROT,Read and Write protection of MMU System Control Register and MMU auxiliary Control register" "0: can write IMSCTLR,1: can write/read IMSCTLR"
newline
bitfld.long 0x0 30. "NSACCEN,Non-secure access enable for MMU System Control Register and MMU auxiliary Control register" "0: disable non-secure access,1: enable non-secure access"
newline
bitfld.long 0x0 29. "DISMMU,Disable IPMMU cache" "0: enable IPMMU cache,1: disable IPMMU cache"
newline
bitfld.long 0x0 28. "USE_SECGRP,Use security group to judge Secure/Non-secure access" "0,1"
newline
hexmask.long 0x0 0.--27. 1. "Reserved_0,Reserved"
group.long 0x481554++0x3
line.long 0x0 "ISERRINJR__RT0,IPMMU cache"
hexmask.long 0x0 7.--31. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 6. "ERRINJ_EDCERR_PWD,Error injection bit for EDC error in APB write datta channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 5. "ERRINJ_EDCERR_PA,Error injection bit for EDC error in APB address channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 4. "ERRINJ_EDCERR_RRESP,Error injection bit for EDC error in AXI R response channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 3. "ERRINJ_EDCERR_NPTW_AR,Error injection bit for EDC error in AXI AR channel (during not Page Table Walk)." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 2. "ERRINJ_COMPFAIL,Error injection bit for DCLS error." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 1. "ERRINJ_EDCERR_R,Error injection bit for EDC error in AXI R channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 0. "ERRINJ_EDCERR_AR,Error injection bit for EDC error in AXI AR channel." "0: Clear error injection,1: Enable error injection"
group.long 0x481580++0x3
line.long 0x0 "IMPFMCTR__RT0,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "MD,Monitor Mode" "0: Monitor all MMUs,1: Reserved,?,?"
newline
hexmask.long.byte 0x0 8.--11. 1. "SEL,When MD is B'11  SEL indicates the MMU table number to be monitored."
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "RST,Reset all status and counter values." "0,1"
newline
bitfld.long 0x0 0. "EN,Performance Monitor Enable" "0: Stop to count,1: Start to count"
rgroup.long 0x481590++0xB
line.long 0x0 "IMPFMTOTAL__RT0,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x0 0.--23. 1. "TOTAL,The total number of translation requests"
line.long 0x4 "IMPFMHIT__RT0,"
hexmask.long.byte 0x4 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x4 0.--23. 1. "HIT,The total number of TLB hit requests"
line.long 0x8 "IMPFMMISS__RT0,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x8 0.--23. 1. "MISS,The total number of miss requests"
group.long 0x482200++0x3
line.long 0x0 "IMPCTR__RT0,This register controls the behavior of the PMB function."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "TTSEL,Translation Table Select"
newline
bitfld.long 0x0 3. "TTEN,TLB Translation Enable" "0: Output PPN as a physical address,1: Output PPN as an intermediate physical address.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurred"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "PMBEN,PMB Enable" "0: PMB disabled,1: PMB enabled"
group.long 0x482208++0x3
line.long 0x0 "IMPSTR__RT0,This register indicates the error status of the address translation by PMB."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "MHIT,Multiple hit" "0,1"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "TF,Translation Fault" "0,1"
rgroup.long 0x48220C++0x3
line.long 0x0 "IMPEAR__RT0,This register indicates the address which an address translation error occurred."
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0x482280++0x7F
line.long 0x0 "IMPMBA0__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x0 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
line.long 0x4 "IMPMBA1__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x4 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x4 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
line.long 0x8 "IMPMBA2__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x8 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x8 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x8 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x8 0.--7. 1. "Reserved_0,Reserved"
line.long 0xC "IMPMBA3__RT0,Note: n= 0 to 15"
hexmask.long.byte 0xC 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0xC 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0xC 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0xC 0.--7. 1. "Reserved_0,Reserved"
line.long 0x10 "IMPMBA4__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x10 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x10 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x10 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x10 0.--7. 1. "Reserved_0,Reserved"
line.long 0x14 "IMPMBA5__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x14 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x14 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x14 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x14 0.--7. 1. "Reserved_0,Reserved"
line.long 0x18 "IMPMBA6__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x18 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x18 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x18 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x18 0.--7. 1. "Reserved_0,Reserved"
line.long 0x1C "IMPMBA7__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x1C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x1C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x1C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x1C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x20 "IMPMBA8__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x20 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x20 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x20 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x20 0.--7. 1. "Reserved_0,Reserved"
line.long 0x24 "IMPMBA9__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x24 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x24 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x24 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x24 0.--7. 1. "Reserved_0,Reserved"
line.long 0x28 "IMPMBA10__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x28 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x28 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x28 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x28 0.--7. 1. "Reserved_0,Reserved"
line.long 0x2C "IMPMBA11__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x2C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x2C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x2C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x2C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x30 "IMPMBA12__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x30 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x30 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x30 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x30 0.--7. 1. "Reserved_0,Reserved"
line.long 0x34 "IMPMBA13__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x34 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x34 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x34 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x34 0.--7. 1. "Reserved_0,Reserved"
line.long 0x38 "IMPMBA14__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x38 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x38 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x38 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x38 0.--7. 1. "Reserved_0,Reserved"
line.long 0x3C "IMPMBA15__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x3C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x3C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x3C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x3C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x40 "IMPMBD0__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x40 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x40 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x40 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x40 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x40 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x40 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x40 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x40 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x40 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x44 "IMPMBD1__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x44 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x44 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x44 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x44 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x44 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x44 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x44 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x44 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x44 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x48 "IMPMBD2__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x48 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x48 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x48 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x48 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x48 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x48 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x48 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x48 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x48 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4C "IMPMBD3__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x4C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x4C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x4C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x4C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x4C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x4C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x4C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x4C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x50 "IMPMBD4__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x50 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x50 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x50 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x50 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x50 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x50 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x50 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x50 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x50 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x54 "IMPMBD5__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x54 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x54 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x54 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x54 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x54 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x54 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x54 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x54 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x54 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x58 "IMPMBD6__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x58 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x58 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x58 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x58 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x58 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x58 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x58 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x58 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x58 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x5C "IMPMBD7__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x5C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x5C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x5C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x5C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x5C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x5C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x5C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x5C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x5C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x60 "IMPMBD8__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x60 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x60 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x60 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x60 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x60 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x60 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x60 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x60 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x60 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x64 "IMPMBD9__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x64 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x64 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x64 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x64 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x64 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x64 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x64 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x64 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x64 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x68 "IMPMBD10__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x68 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x68 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x68 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x68 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x68 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x68 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x68 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x68 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x68 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x6C "IMPMBD11__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x6C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x6C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x6C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x6C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x6C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x6C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x6C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x6C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x6C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x70 "IMPMBD12__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x70 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x70 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x70 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x70 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x70 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x70 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x70 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x70 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x70 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x74 "IMPMBD13__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x74 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x74 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x74 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x74 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x74 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x74 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x74 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x74 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x74 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x78 "IMPMBD14__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x78 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x78 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x78 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x78 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x78 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x78 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x78 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x78 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x78 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x7C "IMPMBD15__RT0,Note: n= 0 to 15"
hexmask.long.byte 0x7C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x7C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x7C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x7C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x7C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x7C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x7C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x7C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x7C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
group.long 0x483300++0x3
line.long 0x0 "IMUCTR0__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483308++0x3
line.long 0x0 "IMUASID0__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483310++0x3
line.long 0x0 "IMUCTR1__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483318++0x3
line.long 0x0 "IMUASID1__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483320++0x3
line.long 0x0 "IMUCTR2__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483328++0x3
line.long 0x0 "IMUASID2__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483330++0x3
line.long 0x0 "IMUCTR3__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483338++0x3
line.long 0x0 "IMUASID3__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483340++0x3
line.long 0x0 "IMUCTR4__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483348++0x3
line.long 0x0 "IMUASID4__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483350++0x3
line.long 0x0 "IMUCTR5__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483358++0x3
line.long 0x0 "IMUASID5__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483360++0x3
line.long 0x0 "IMUCTR6__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483368++0x3
line.long 0x0 "IMUASID6__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483370++0x3
line.long 0x0 "IMUCTR7__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483378++0x3
line.long 0x0 "IMUASID7__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483380++0x3
line.long 0x0 "IMUCTR8__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483388++0x3
line.long 0x0 "IMUASID8__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483390++0x3
line.long 0x0 "IMUCTR9__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483398++0x3
line.long 0x0 "IMUASID9__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4833A0++0x3
line.long 0x0 "IMUCTR10__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4833A8++0x3
line.long 0x0 "IMUASID10__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4833B0++0x3
line.long 0x0 "IMUCTR11__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4833B8++0x3
line.long 0x0 "IMUASID11__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4833C0++0x3
line.long 0x0 "IMUCTR12__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4833C8++0x3
line.long 0x0 "IMUASID12__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4833D0++0x3
line.long 0x0 "IMUCTR13__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4833D8++0x3
line.long 0x0 "IMUASID13__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4833E0++0x3
line.long 0x0 "IMUCTR14__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4833E8++0x3
line.long 0x0 "IMUASID14__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4833F0++0x3
line.long 0x0 "IMUCTR15__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4833F8++0x3
line.long 0x0 "IMUASID15__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483400++0x3
line.long 0x0 "IMUCTR16__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483408++0x3
line.long 0x0 "IMUASID16__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483410++0x3
line.long 0x0 "IMUCTR17__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483418++0x3
line.long 0x0 "IMUASID17__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483420++0x3
line.long 0x0 "IMUCTR18__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483428++0x3
line.long 0x0 "IMUASID18__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483430++0x3
line.long 0x0 "IMUCTR19__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483438++0x3
line.long 0x0 "IMUASID19__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483440++0x3
line.long 0x0 "IMUCTR20__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483448++0x3
line.long 0x0 "IMUASID20__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483450++0x3
line.long 0x0 "IMUCTR21__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483458++0x3
line.long 0x0 "IMUASID21__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483460++0x3
line.long 0x0 "IMUCTR22__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483468++0x3
line.long 0x0 "IMUASID22__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483470++0x3
line.long 0x0 "IMUCTR23__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483478++0x3
line.long 0x0 "IMUASID23__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483480++0x3
line.long 0x0 "IMUCTR24__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483488++0x3
line.long 0x0 "IMUASID24__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483490++0x3
line.long 0x0 "IMUCTR25__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483498++0x3
line.long 0x0 "IMUASID25__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4834A0++0x3
line.long 0x0 "IMUCTR26__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4834A8++0x3
line.long 0x0 "IMUASID26__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4834B0++0x3
line.long 0x0 "IMUCTR27__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4834B8++0x3
line.long 0x0 "IMUASID27__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4834C0++0x3
line.long 0x0 "IMUCTR28__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4834C8++0x3
line.long 0x0 "IMUASID28__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4834D0++0x3
line.long 0x0 "IMUCTR29__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4834D8++0x3
line.long 0x0 "IMUASID29__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4834E0++0x3
line.long 0x0 "IMUCTR30__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4834E8++0x3
line.long 0x0 "IMUASID30__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4834F0++0x3
line.long 0x0 "IMUCTR31__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4834F8++0x3
line.long 0x0 "IMUASID31__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483600++0x3
line.long 0x0 "IMUCTR32__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483608++0x3
line.long 0x0 "IMUASID32__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483610++0x3
line.long 0x0 "IMUCTR33__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483618++0x3
line.long 0x0 "IMUASID33__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483620++0x3
line.long 0x0 "IMUCTR34__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483628++0x3
line.long 0x0 "IMUASID34__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483630++0x3
line.long 0x0 "IMUCTR35__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483638++0x3
line.long 0x0 "IMUASID35__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483640++0x3
line.long 0x0 "IMUCTR36__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483648++0x3
line.long 0x0 "IMUASID36__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483650++0x3
line.long 0x0 "IMUCTR37__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483658++0x3
line.long 0x0 "IMUASID37__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483660++0x3
line.long 0x0 "IMUCTR38__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483668++0x3
line.long 0x0 "IMUASID38__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483670++0x3
line.long 0x0 "IMUCTR39__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483678++0x3
line.long 0x0 "IMUASID39__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483680++0x3
line.long 0x0 "IMUCTR40__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483688++0x3
line.long 0x0 "IMUASID40__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483690++0x3
line.long 0x0 "IMUCTR41__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483698++0x3
line.long 0x0 "IMUASID41__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4836A0++0x3
line.long 0x0 "IMUCTR42__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4836A8++0x3
line.long 0x0 "IMUASID42__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4836B0++0x3
line.long 0x0 "IMUCTR43__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4836B8++0x3
line.long 0x0 "IMUASID43__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4836C0++0x3
line.long 0x0 "IMUCTR44__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4836C8++0x3
line.long 0x0 "IMUASID44__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4836D0++0x3
line.long 0x0 "IMUCTR45__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4836D8++0x3
line.long 0x0 "IMUASID45__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4836E0++0x3
line.long 0x0 "IMUCTR46__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4836E8++0x3
line.long 0x0 "IMUASID46__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4836F0++0x3
line.long 0x0 "IMUCTR47__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4836F8++0x3
line.long 0x0 "IMUASID47__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483700++0x3
line.long 0x0 "IMUCTR48__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483708++0x3
line.long 0x0 "IMUASID48__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483710++0x3
line.long 0x0 "IMUCTR49__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483718++0x3
line.long 0x0 "IMUASID49__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483720++0x3
line.long 0x0 "IMUCTR50__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483728++0x3
line.long 0x0 "IMUASID50__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483730++0x3
line.long 0x0 "IMUCTR51__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483738++0x3
line.long 0x0 "IMUASID51__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483740++0x3
line.long 0x0 "IMUCTR52__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483748++0x3
line.long 0x0 "IMUASID52__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483750++0x3
line.long 0x0 "IMUCTR53__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483758++0x3
line.long 0x0 "IMUASID53__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483760++0x3
line.long 0x0 "IMUCTR54__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483768++0x3
line.long 0x0 "IMUASID54__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483770++0x3
line.long 0x0 "IMUCTR55__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483778++0x3
line.long 0x0 "IMUASID55__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483780++0x3
line.long 0x0 "IMUCTR56__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483788++0x3
line.long 0x0 "IMUASID56__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x483790++0x3
line.long 0x0 "IMUCTR57__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x483798++0x3
line.long 0x0 "IMUASID57__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4837A0++0x3
line.long 0x0 "IMUCTR58__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4837A8++0x3
line.long 0x0 "IMUASID58__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4837B0++0x3
line.long 0x0 "IMUCTR59__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4837B8++0x3
line.long 0x0 "IMUASID59__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4837C0++0x3
line.long 0x0 "IMUCTR60__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4837C8++0x3
line.long 0x0 "IMUASID60__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4837D0++0x3
line.long 0x0 "IMUCTR61__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4837D8++0x3
line.long 0x0 "IMUASID61__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4837E0++0x3
line.long 0x0 "IMUCTR62__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4837E8++0x3
line.long 0x0 "IMUASID62__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4837F0++0x3
line.long 0x0 "IMUCTR63__RT0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4837F8++0x3
line.long 0x0 "IMUASID63__RT0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x490000++0x3
line.long 0x0 "IMCTR0__RT0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x490040++0x3
line.long 0x0 "IMSEC__RT0,This register controls the attribute of secure/non-secure for MMU. This register can be accessed by the master which operates on secure-mode only. When non-secure master accesses to this regiser. write access is ignored."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "SEC,SEC[n]=0 : IMCTRn~IMERIDn is Non-secure"
group.long 0x491040++0x3
line.long 0x0 "IMCTR1__RT0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x492080++0x3
line.long 0x0 "IMCTR2__RT0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x4930C0++0x3
line.long 0x0 "IMCTR3__RT0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x494100++0x3
line.long 0x0 "IMCTR4__RT0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x495140++0x3
line.long 0x0 "IMCTR5__RT0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x496180++0x3
line.long 0x0 "IMCTR6__RT0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x4971C0++0x3
line.long 0x0 "IMCTR7__RT0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x498800++0x3
line.long 0x0 "IMCTR8__RT0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x499840++0x3
line.long 0x0 "IMCTR9__RT0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x49A880++0x3
line.long 0x0 "IMCTR10__RT0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x49B8C0++0x3
line.long 0x0 "IMCTR11__RT0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x49C900++0x3
line.long 0x0 "IMCTR12__RT0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x49D940++0x3
line.long 0x0 "IMCTR13__RT0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x49E980++0x3
line.long 0x0 "IMCTR14__RT0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x49F9C0++0x3
line.long 0x0 "IMCTR15__RT0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x4C0548++0x7
line.long 0x0 "IMERRSIDAR__RT1,This register indicates the Error SrcID when EDC error happen in AXI AR channel."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x4 "IMERRSIDR__RT1,This register indicates the Error SrcID when EDC error happen in AXI R channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0x4C0558++0x3
line.long 0x0 "IMERRSIDNPTWAR__RT1,This register indicates the Error SrcID when EDC error happen in AXI AR channel with no Page Table Walk."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0x4C0560++0x1B
line.long 0x0 "IMAPQOS__RT1,This resister controls QoS value that is output from IPMMU(cache) to IPMMU(main) through ARADDR[35:32]."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "APQOS,Append QoS"
line.long 0x4 "IMERRSIDRRESP__RT1,This register indicates the Error SrcID when EDC error happen in AXI R(response) channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x8 "IMERRSIDPA__RT1,This register indicates the Error SrcID when EDC error happen in APB address channel."
bitfld.long 0x8 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x8 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x8 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0xC "IMERRSIDPWD__RT1,This register indicates the Error SrcID when EDC error happen in APB write data channel."
bitfld.long 0xC 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0xC 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x10 "IMRGID__RT1,Region-ID setting will be available for each IPMMU-hier (each bus hierarchy). This will be used for all PTW transactions originating in this bus hierarchy."
hexmask.long 0x10 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x10 0.--3. 1. "RGID,Region-ID"
line.long 0x14 "IMRGIDEN__RT1,This register is used for setting to protect IMRGID register."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x14 0.--15. 1. "RGIDEN,When RGIDEN[PUSER[5:2]]=1  IMRGID[3:0] register can be accessed."
line.long 0x18 "IMSECGRP__RT1,This register is used for setting to protect IMRGID register."
hexmask.long 0x18 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x18 0. "SECGRP,When PUSER[1]=0 " "0,1"
group.long 0x4C1500++0x3
line.long 0x0 "IMSCTLR__RT1,This register controls the behavior of IPMMU function."
bitfld.long 0x0 31. "DISWPROT,Read and Write protection of MMU System Control Register and MMU auxiliary Control register" "0: can write IMSCTLR,1: can write/read IMSCTLR"
newline
bitfld.long 0x0 30. "NSACCEN,Non-secure access enable for MMU System Control Register and MMU auxiliary Control register" "0: disable non-secure access,1: enable non-secure access"
newline
bitfld.long 0x0 29. "DISMMU,Disable IPMMU cache" "0: enable IPMMU cache,1: disable IPMMU cache"
newline
bitfld.long 0x0 28. "USE_SECGRP,Use security group to judge Secure/Non-secure access" "0,1"
newline
hexmask.long 0x0 0.--27. 1. "Reserved_0,Reserved"
group.long 0x4C1554++0x3
line.long 0x0 "ISERRINJR__RT1,IPMMU cache"
hexmask.long 0x0 7.--31. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 6. "ERRINJ_EDCERR_PWD,Error injection bit for EDC error in APB write datta channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 5. "ERRINJ_EDCERR_PA,Error injection bit for EDC error in APB address channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 4. "ERRINJ_EDCERR_RRESP,Error injection bit for EDC error in AXI R response channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 3. "ERRINJ_EDCERR_NPTW_AR,Error injection bit for EDC error in AXI AR channel (during not Page Table Walk)." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 2. "ERRINJ_COMPFAIL,Error injection bit for DCLS error." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 1. "ERRINJ_EDCERR_R,Error injection bit for EDC error in AXI R channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 0. "ERRINJ_EDCERR_AR,Error injection bit for EDC error in AXI AR channel." "0: Clear error injection,1: Enable error injection"
group.long 0x4C1580++0x3
line.long 0x0 "IMPFMCTR__RT1,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "MD,Monitor Mode" "0: Monitor all MMUs,1: Reserved,?,?"
newline
hexmask.long.byte 0x0 8.--11. 1. "SEL,When MD is B'11  SEL indicates the MMU table number to be monitored."
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "RST,Reset all status and counter values." "0,1"
newline
bitfld.long 0x0 0. "EN,Performance Monitor Enable" "0: Stop to count,1: Start to count"
rgroup.long 0x4C1590++0xB
line.long 0x0 "IMPFMTOTAL__RT1,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x0 0.--23. 1. "TOTAL,The total number of translation requests"
line.long 0x4 "IMPFMHIT__RT1,"
hexmask.long.byte 0x4 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x4 0.--23. 1. "HIT,The total number of TLB hit requests"
line.long 0x8 "IMPFMMISS__RT1,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x8 0.--23. 1. "MISS,The total number of miss requests"
group.long 0x4C2200++0x3
line.long 0x0 "IMPCTR__RT1,This register controls the behavior of the PMB function."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "TTSEL,Translation Table Select"
newline
bitfld.long 0x0 3. "TTEN,TLB Translation Enable" "0: Output PPN as a physical address,1: Output PPN as an intermediate physical address.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurred"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "PMBEN,PMB Enable" "0: PMB disabled,1: PMB enabled"
group.long 0x4C2208++0x3
line.long 0x0 "IMPSTR__RT1,This register indicates the error status of the address translation by PMB."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "MHIT,Multiple hit" "0,1"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "TF,Translation Fault" "0,1"
rgroup.long 0x4C220C++0x3
line.long 0x0 "IMPEAR__RT1,This register indicates the address which an address translation error occurred."
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0x4C2280++0x7F
line.long 0x0 "IMPMBA0__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x0 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
line.long 0x4 "IMPMBA1__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x4 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x4 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
line.long 0x8 "IMPMBA2__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x8 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x8 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x8 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x8 0.--7. 1. "Reserved_0,Reserved"
line.long 0xC "IMPMBA3__RT1,Note: n= 0 to 15"
hexmask.long.byte 0xC 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0xC 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0xC 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0xC 0.--7. 1. "Reserved_0,Reserved"
line.long 0x10 "IMPMBA4__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x10 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x10 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x10 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x10 0.--7. 1. "Reserved_0,Reserved"
line.long 0x14 "IMPMBA5__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x14 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x14 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x14 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x14 0.--7. 1. "Reserved_0,Reserved"
line.long 0x18 "IMPMBA6__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x18 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x18 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x18 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x18 0.--7. 1. "Reserved_0,Reserved"
line.long 0x1C "IMPMBA7__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x1C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x1C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x1C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x1C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x20 "IMPMBA8__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x20 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x20 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x20 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x20 0.--7. 1. "Reserved_0,Reserved"
line.long 0x24 "IMPMBA9__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x24 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x24 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x24 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x24 0.--7. 1. "Reserved_0,Reserved"
line.long 0x28 "IMPMBA10__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x28 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x28 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x28 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x28 0.--7. 1. "Reserved_0,Reserved"
line.long 0x2C "IMPMBA11__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x2C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x2C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x2C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x2C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x30 "IMPMBA12__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x30 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x30 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x30 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x30 0.--7. 1. "Reserved_0,Reserved"
line.long 0x34 "IMPMBA13__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x34 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x34 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x34 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x34 0.--7. 1. "Reserved_0,Reserved"
line.long 0x38 "IMPMBA14__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x38 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x38 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x38 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x38 0.--7. 1. "Reserved_0,Reserved"
line.long 0x3C "IMPMBA15__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x3C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x3C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x3C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x3C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x40 "IMPMBD0__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x40 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x40 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x40 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x40 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x40 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x40 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x40 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x40 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x40 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x44 "IMPMBD1__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x44 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x44 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x44 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x44 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x44 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x44 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x44 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x44 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x44 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x48 "IMPMBD2__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x48 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x48 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x48 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x48 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x48 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x48 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x48 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x48 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x48 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4C "IMPMBD3__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x4C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x4C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x4C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x4C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x4C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x4C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x4C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x4C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x50 "IMPMBD4__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x50 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x50 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x50 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x50 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x50 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x50 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x50 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x50 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x50 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x54 "IMPMBD5__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x54 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x54 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x54 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x54 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x54 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x54 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x54 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x54 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x54 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x58 "IMPMBD6__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x58 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x58 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x58 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x58 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x58 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x58 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x58 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x58 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x58 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x5C "IMPMBD7__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x5C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x5C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x5C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x5C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x5C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x5C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x5C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x5C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x5C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x60 "IMPMBD8__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x60 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x60 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x60 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x60 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x60 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x60 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x60 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x60 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x60 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x64 "IMPMBD9__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x64 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x64 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x64 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x64 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x64 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x64 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x64 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x64 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x64 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x68 "IMPMBD10__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x68 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x68 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x68 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x68 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x68 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x68 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x68 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x68 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x68 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x6C "IMPMBD11__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x6C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x6C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x6C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x6C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x6C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x6C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x6C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x6C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x6C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x70 "IMPMBD12__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x70 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x70 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x70 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x70 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x70 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x70 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x70 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x70 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x70 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x74 "IMPMBD13__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x74 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x74 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x74 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x74 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x74 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x74 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x74 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x74 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x74 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x78 "IMPMBD14__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x78 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x78 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x78 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x78 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x78 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x78 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x78 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x78 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x78 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x7C "IMPMBD15__RT1,Note: n= 0 to 15"
hexmask.long.byte 0x7C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x7C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x7C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x7C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x7C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x7C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x7C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x7C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x7C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
group.long 0x4C3300++0x3
line.long 0x0 "IMUCTR0__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3308++0x3
line.long 0x0 "IMUASID0__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3310++0x3
line.long 0x0 "IMUCTR1__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3318++0x3
line.long 0x0 "IMUASID1__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3320++0x3
line.long 0x0 "IMUCTR2__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3328++0x3
line.long 0x0 "IMUASID2__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3330++0x3
line.long 0x0 "IMUCTR3__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3338++0x3
line.long 0x0 "IMUASID3__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3340++0x3
line.long 0x0 "IMUCTR4__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3348++0x3
line.long 0x0 "IMUASID4__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3350++0x3
line.long 0x0 "IMUCTR5__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3358++0x3
line.long 0x0 "IMUASID5__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3360++0x3
line.long 0x0 "IMUCTR6__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3368++0x3
line.long 0x0 "IMUASID6__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3370++0x3
line.long 0x0 "IMUCTR7__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3378++0x3
line.long 0x0 "IMUASID7__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3380++0x3
line.long 0x0 "IMUCTR8__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3388++0x3
line.long 0x0 "IMUASID8__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3390++0x3
line.long 0x0 "IMUCTR9__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3398++0x3
line.long 0x0 "IMUASID9__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C33A0++0x3
line.long 0x0 "IMUCTR10__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C33A8++0x3
line.long 0x0 "IMUASID10__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C33B0++0x3
line.long 0x0 "IMUCTR11__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C33B8++0x3
line.long 0x0 "IMUASID11__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C33C0++0x3
line.long 0x0 "IMUCTR12__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C33C8++0x3
line.long 0x0 "IMUASID12__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C33D0++0x3
line.long 0x0 "IMUCTR13__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C33D8++0x3
line.long 0x0 "IMUASID13__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C33E0++0x3
line.long 0x0 "IMUCTR14__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C33E8++0x3
line.long 0x0 "IMUASID14__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C33F0++0x3
line.long 0x0 "IMUCTR15__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C33F8++0x3
line.long 0x0 "IMUASID15__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3400++0x3
line.long 0x0 "IMUCTR16__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3408++0x3
line.long 0x0 "IMUASID16__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3410++0x3
line.long 0x0 "IMUCTR17__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3418++0x3
line.long 0x0 "IMUASID17__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3420++0x3
line.long 0x0 "IMUCTR18__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3428++0x3
line.long 0x0 "IMUASID18__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3430++0x3
line.long 0x0 "IMUCTR19__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3438++0x3
line.long 0x0 "IMUASID19__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3440++0x3
line.long 0x0 "IMUCTR20__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3448++0x3
line.long 0x0 "IMUASID20__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3450++0x3
line.long 0x0 "IMUCTR21__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3458++0x3
line.long 0x0 "IMUASID21__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3460++0x3
line.long 0x0 "IMUCTR22__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3468++0x3
line.long 0x0 "IMUASID22__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3470++0x3
line.long 0x0 "IMUCTR23__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3478++0x3
line.long 0x0 "IMUASID23__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3480++0x3
line.long 0x0 "IMUCTR24__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3488++0x3
line.long 0x0 "IMUASID24__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3490++0x3
line.long 0x0 "IMUCTR25__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3498++0x3
line.long 0x0 "IMUASID25__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C34A0++0x3
line.long 0x0 "IMUCTR26__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C34A8++0x3
line.long 0x0 "IMUASID26__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C34B0++0x3
line.long 0x0 "IMUCTR27__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C34B8++0x3
line.long 0x0 "IMUASID27__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C34C0++0x3
line.long 0x0 "IMUCTR28__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C34C8++0x3
line.long 0x0 "IMUASID28__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C34D0++0x3
line.long 0x0 "IMUCTR29__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C34D8++0x3
line.long 0x0 "IMUASID29__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C34E0++0x3
line.long 0x0 "IMUCTR30__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C34E8++0x3
line.long 0x0 "IMUASID30__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C34F0++0x3
line.long 0x0 "IMUCTR31__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C34F8++0x3
line.long 0x0 "IMUASID31__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3600++0x3
line.long 0x0 "IMUCTR32__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3608++0x3
line.long 0x0 "IMUASID32__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3610++0x3
line.long 0x0 "IMUCTR33__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3618++0x3
line.long 0x0 "IMUASID33__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3620++0x3
line.long 0x0 "IMUCTR34__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3628++0x3
line.long 0x0 "IMUASID34__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3630++0x3
line.long 0x0 "IMUCTR35__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3638++0x3
line.long 0x0 "IMUASID35__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3640++0x3
line.long 0x0 "IMUCTR36__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3648++0x3
line.long 0x0 "IMUASID36__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3650++0x3
line.long 0x0 "IMUCTR37__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3658++0x3
line.long 0x0 "IMUASID37__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3660++0x3
line.long 0x0 "IMUCTR38__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3668++0x3
line.long 0x0 "IMUASID38__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3670++0x3
line.long 0x0 "IMUCTR39__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3678++0x3
line.long 0x0 "IMUASID39__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3680++0x3
line.long 0x0 "IMUCTR40__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3688++0x3
line.long 0x0 "IMUASID40__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3690++0x3
line.long 0x0 "IMUCTR41__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3698++0x3
line.long 0x0 "IMUASID41__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C36A0++0x3
line.long 0x0 "IMUCTR42__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C36A8++0x3
line.long 0x0 "IMUASID42__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C36B0++0x3
line.long 0x0 "IMUCTR43__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C36B8++0x3
line.long 0x0 "IMUASID43__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C36C0++0x3
line.long 0x0 "IMUCTR44__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C36C8++0x3
line.long 0x0 "IMUASID44__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C36D0++0x3
line.long 0x0 "IMUCTR45__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C36D8++0x3
line.long 0x0 "IMUASID45__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C36E0++0x3
line.long 0x0 "IMUCTR46__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C36E8++0x3
line.long 0x0 "IMUASID46__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C36F0++0x3
line.long 0x0 "IMUCTR47__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C36F8++0x3
line.long 0x0 "IMUASID47__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3700++0x3
line.long 0x0 "IMUCTR48__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3708++0x3
line.long 0x0 "IMUASID48__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3710++0x3
line.long 0x0 "IMUCTR49__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3718++0x3
line.long 0x0 "IMUASID49__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3720++0x3
line.long 0x0 "IMUCTR50__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3728++0x3
line.long 0x0 "IMUASID50__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3730++0x3
line.long 0x0 "IMUCTR51__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3738++0x3
line.long 0x0 "IMUASID51__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3740++0x3
line.long 0x0 "IMUCTR52__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3748++0x3
line.long 0x0 "IMUASID52__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3750++0x3
line.long 0x0 "IMUCTR53__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3758++0x3
line.long 0x0 "IMUASID53__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3760++0x3
line.long 0x0 "IMUCTR54__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3768++0x3
line.long 0x0 "IMUASID54__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3770++0x3
line.long 0x0 "IMUCTR55__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3778++0x3
line.long 0x0 "IMUASID55__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3780++0x3
line.long 0x0 "IMUCTR56__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3788++0x3
line.long 0x0 "IMUASID56__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C3790++0x3
line.long 0x0 "IMUCTR57__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C3798++0x3
line.long 0x0 "IMUASID57__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C37A0++0x3
line.long 0x0 "IMUCTR58__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C37A8++0x3
line.long 0x0 "IMUASID58__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C37B0++0x3
line.long 0x0 "IMUCTR59__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C37B8++0x3
line.long 0x0 "IMUASID59__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C37C0++0x3
line.long 0x0 "IMUCTR60__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C37C8++0x3
line.long 0x0 "IMUASID60__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C37D0++0x3
line.long 0x0 "IMUCTR61__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C37D8++0x3
line.long 0x0 "IMUASID61__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C37E0++0x3
line.long 0x0 "IMUCTR62__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C37E8++0x3
line.long 0x0 "IMUASID62__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4C37F0++0x3
line.long 0x0 "IMUCTR63__RT1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0x4C37F8++0x3
line.long 0x0 "IMUASID63__RT1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0x4D0000++0x3
line.long 0x0 "IMCTR0__RT1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x4D0040++0x3
line.long 0x0 "IMSEC__RT1,This register controls the attribute of secure/non-secure for MMU. This register can be accessed by the master which operates on secure-mode only. When non-secure master accesses to this regiser. write access is ignored."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "SEC,SEC[n]=0 : IMCTRn~IMERIDn is Non-secure"
group.long 0x4D1040++0x3
line.long 0x0 "IMCTR1__RT1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x4D2080++0x3
line.long 0x0 "IMCTR2__RT1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x4D30C0++0x3
line.long 0x0 "IMCTR3__RT1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x4D4100++0x3
line.long 0x0 "IMCTR4__RT1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x4D5140++0x3
line.long 0x0 "IMCTR5__RT1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x4D6180++0x3
line.long 0x0 "IMCTR6__RT1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x4D71C0++0x3
line.long 0x0 "IMCTR7__RT1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x4D8800++0x3
line.long 0x0 "IMCTR8__RT1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x4D9840++0x3
line.long 0x0 "IMCTR9__RT1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x4DA880++0x3
line.long 0x0 "IMCTR10__RT1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x4DB8C0++0x3
line.long 0x0 "IMCTR11__RT1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x4DC900++0x3
line.long 0x0 "IMCTR12__RT1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x4DD940++0x3
line.long 0x0 "IMCTR13__RT1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x4DE980++0x3
line.long 0x0 "IMCTR14__RT1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x4DF9C0++0x3
line.long 0x0 "IMCTR15__RT1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD00548++0x7
line.long 0x0 "IMERRSIDAR__DS0,This register indicates the Error SrcID when EDC error happen in AXI AR channel."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x4 "IMERRSIDR__DS0,This register indicates the Error SrcID when EDC error happen in AXI R channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0xD00558++0x3
line.long 0x0 "IMERRSIDNPTWAR__DS0,This register indicates the Error SrcID when EDC error happen in AXI AR channel with no Page Table Walk."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0xD00560++0x1B
line.long 0x0 "IMAPQOS__DS0,This resister controls QoS value that is output from IPMMU(cache) to IPMMU(main) through ARADDR[35:32]."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "APQOS,Append QoS"
line.long 0x4 "IMERRSIDRRESP__DS0,This register indicates the Error SrcID when EDC error happen in AXI R(response) channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x8 "IMERRSIDPA__DS0,This register indicates the Error SrcID when EDC error happen in APB address channel."
bitfld.long 0x8 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x8 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x8 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0xC "IMERRSIDPWD__DS0,This register indicates the Error SrcID when EDC error happen in APB write data channel."
bitfld.long 0xC 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0xC 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x10 "IMRGID__DS0,Region-ID setting will be available for each IPMMU-hier (each bus hierarchy). This will be used for all PTW transactions originating in this bus hierarchy."
hexmask.long 0x10 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x10 0.--3. 1. "RGID,Region-ID"
line.long 0x14 "IMRGIDEN__DS0,This register is used for setting to protect IMRGID register."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x14 0.--15. 1. "RGIDEN,When RGIDEN[PUSER[5:2]]=1  IMRGID[3:0] register can be accessed."
line.long 0x18 "IMSECGRP__DS0,This register is used for setting to protect IMRGID register."
hexmask.long 0x18 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x18 0. "SECGRP,When PUSER[1]=0 " "0,1"
group.long 0xD01500++0x3
line.long 0x0 "IMSCTLR__DS0,This register controls the behavior of IPMMU function."
bitfld.long 0x0 31. "DISWPROT,Read and Write protection of MMU System Control Register and MMU auxiliary Control register" "0: can write IMSCTLR,1: can write/read IMSCTLR"
newline
bitfld.long 0x0 30. "NSACCEN,Non-secure access enable for MMU System Control Register and MMU auxiliary Control register" "0: disable non-secure access,1: enable non-secure access"
newline
bitfld.long 0x0 29. "DISMMU,Disable IPMMU cache" "0: enable IPMMU cache,1: disable IPMMU cache"
newline
bitfld.long 0x0 28. "USE_SECGRP,Use security group to judge Secure/Non-secure access" "0,1"
newline
hexmask.long 0x0 0.--27. 1. "Reserved_0,Reserved"
group.long 0xD01554++0x3
line.long 0x0 "ISERRINJR__DS0,IPMMU cache"
hexmask.long 0x0 7.--31. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 6. "ERRINJ_EDCERR_PWD,Error injection bit for EDC error in APB write datta channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 5. "ERRINJ_EDCERR_PA,Error injection bit for EDC error in APB address channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 4. "ERRINJ_EDCERR_RRESP,Error injection bit for EDC error in AXI R response channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 3. "ERRINJ_EDCERR_NPTW_AR,Error injection bit for EDC error in AXI AR channel (during not Page Table Walk)." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 2. "ERRINJ_COMPFAIL,Error injection bit for DCLS error." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 1. "ERRINJ_EDCERR_R,Error injection bit for EDC error in AXI R channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 0. "ERRINJ_EDCERR_AR,Error injection bit for EDC error in AXI AR channel." "0: Clear error injection,1: Enable error injection"
group.long 0xD01580++0x3
line.long 0x0 "IMPFMCTR__DS0,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "MD,Monitor Mode" "0: Monitor all MMUs,1: Reserved,?,?"
newline
hexmask.long.byte 0x0 8.--11. 1. "SEL,When MD is B'11  SEL indicates the MMU table number to be monitored."
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "RST,Reset all status and counter values." "0,1"
newline
bitfld.long 0x0 0. "EN,Performance Monitor Enable" "0: Stop to count,1: Start to count"
rgroup.long 0xD01590++0xB
line.long 0x0 "IMPFMTOTAL__DS0,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x0 0.--23. 1. "TOTAL,The total number of translation requests"
line.long 0x4 "IMPFMHIT__DS0,"
hexmask.long.byte 0x4 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x4 0.--23. 1. "HIT,The total number of TLB hit requests"
line.long 0x8 "IMPFMMISS__DS0,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x8 0.--23. 1. "MISS,The total number of miss requests"
group.long 0xD02200++0x3
line.long 0x0 "IMPCTR__DS0,This register controls the behavior of the PMB function."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "TTSEL,Translation Table Select"
newline
bitfld.long 0x0 3. "TTEN,TLB Translation Enable" "0: Output PPN as a physical address,1: Output PPN as an intermediate physical address.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurred"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "PMBEN,PMB Enable" "0: PMB disabled,1: PMB enabled"
group.long 0xD02208++0x3
line.long 0x0 "IMPSTR__DS0,This register indicates the error status of the address translation by PMB."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "MHIT,Multiple hit" "0,1"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "TF,Translation Fault" "0,1"
rgroup.long 0xD0220C++0x3
line.long 0x0 "IMPEAR__DS0,This register indicates the address which an address translation error occurred."
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0xD02280++0x7F
line.long 0x0 "IMPMBA0__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x0 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
line.long 0x4 "IMPMBA1__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x4 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x4 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
line.long 0x8 "IMPMBA2__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x8 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x8 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x8 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x8 0.--7. 1. "Reserved_0,Reserved"
line.long 0xC "IMPMBA3__DS0,Note: n= 0 to 15"
hexmask.long.byte 0xC 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0xC 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0xC 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0xC 0.--7. 1. "Reserved_0,Reserved"
line.long 0x10 "IMPMBA4__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x10 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x10 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x10 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x10 0.--7. 1. "Reserved_0,Reserved"
line.long 0x14 "IMPMBA5__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x14 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x14 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x14 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x14 0.--7. 1. "Reserved_0,Reserved"
line.long 0x18 "IMPMBA6__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x18 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x18 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x18 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x18 0.--7. 1. "Reserved_0,Reserved"
line.long 0x1C "IMPMBA7__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x1C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x1C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x1C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x1C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x20 "IMPMBA8__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x20 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x20 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x20 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x20 0.--7. 1. "Reserved_0,Reserved"
line.long 0x24 "IMPMBA9__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x24 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x24 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x24 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x24 0.--7. 1. "Reserved_0,Reserved"
line.long 0x28 "IMPMBA10__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x28 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x28 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x28 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x28 0.--7. 1. "Reserved_0,Reserved"
line.long 0x2C "IMPMBA11__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x2C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x2C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x2C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x2C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x30 "IMPMBA12__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x30 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x30 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x30 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x30 0.--7. 1. "Reserved_0,Reserved"
line.long 0x34 "IMPMBA13__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x34 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x34 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x34 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x34 0.--7. 1. "Reserved_0,Reserved"
line.long 0x38 "IMPMBA14__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x38 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x38 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x38 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x38 0.--7. 1. "Reserved_0,Reserved"
line.long 0x3C "IMPMBA15__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x3C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x3C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x3C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x3C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x40 "IMPMBD0__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x40 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x40 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x40 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x40 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x40 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x40 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x40 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x40 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x40 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x44 "IMPMBD1__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x44 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x44 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x44 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x44 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x44 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x44 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x44 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x44 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x44 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x48 "IMPMBD2__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x48 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x48 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x48 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x48 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x48 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x48 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x48 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x48 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x48 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4C "IMPMBD3__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x4C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x4C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x4C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x4C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x4C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x4C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x4C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x4C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x50 "IMPMBD4__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x50 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x50 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x50 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x50 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x50 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x50 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x50 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x50 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x50 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x54 "IMPMBD5__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x54 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x54 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x54 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x54 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x54 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x54 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x54 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x54 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x54 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x58 "IMPMBD6__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x58 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x58 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x58 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x58 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x58 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x58 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x58 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x58 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x58 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x5C "IMPMBD7__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x5C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x5C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x5C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x5C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x5C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x5C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x5C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x5C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x5C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x60 "IMPMBD8__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x60 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x60 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x60 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x60 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x60 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x60 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x60 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x60 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x60 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x64 "IMPMBD9__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x64 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x64 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x64 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x64 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x64 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x64 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x64 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x64 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x64 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x68 "IMPMBD10__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x68 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x68 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x68 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x68 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x68 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x68 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x68 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x68 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x68 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x6C "IMPMBD11__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x6C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x6C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x6C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x6C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x6C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x6C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x6C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x6C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x6C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x70 "IMPMBD12__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x70 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x70 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x70 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x70 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x70 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x70 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x70 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x70 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x70 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x74 "IMPMBD13__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x74 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x74 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x74 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x74 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x74 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x74 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x74 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x74 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x74 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x78 "IMPMBD14__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x78 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x78 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x78 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x78 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x78 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x78 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x78 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x78 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x78 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x7C "IMPMBD15__DS0,Note: n= 0 to 15"
hexmask.long.byte 0x7C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x7C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x7C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x7C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x7C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x7C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x7C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x7C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x7C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
group.long 0xD03300++0x3
line.long 0x0 "IMUCTR0__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03308++0x3
line.long 0x0 "IMUASID0__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03310++0x3
line.long 0x0 "IMUCTR1__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03318++0x3
line.long 0x0 "IMUASID1__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03320++0x3
line.long 0x0 "IMUCTR2__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03328++0x3
line.long 0x0 "IMUASID2__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03330++0x3
line.long 0x0 "IMUCTR3__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03338++0x3
line.long 0x0 "IMUASID3__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03340++0x3
line.long 0x0 "IMUCTR4__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03348++0x3
line.long 0x0 "IMUASID4__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03350++0x3
line.long 0x0 "IMUCTR5__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03358++0x3
line.long 0x0 "IMUASID5__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03360++0x3
line.long 0x0 "IMUCTR6__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03368++0x3
line.long 0x0 "IMUASID6__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03370++0x3
line.long 0x0 "IMUCTR7__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03378++0x3
line.long 0x0 "IMUASID7__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03380++0x3
line.long 0x0 "IMUCTR8__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03388++0x3
line.long 0x0 "IMUASID8__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03390++0x3
line.long 0x0 "IMUCTR9__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03398++0x3
line.long 0x0 "IMUASID9__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD033A0++0x3
line.long 0x0 "IMUCTR10__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD033A8++0x3
line.long 0x0 "IMUASID10__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD033B0++0x3
line.long 0x0 "IMUCTR11__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD033B8++0x3
line.long 0x0 "IMUASID11__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD033C0++0x3
line.long 0x0 "IMUCTR12__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD033C8++0x3
line.long 0x0 "IMUASID12__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD033D0++0x3
line.long 0x0 "IMUCTR13__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD033D8++0x3
line.long 0x0 "IMUASID13__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD033E0++0x3
line.long 0x0 "IMUCTR14__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD033E8++0x3
line.long 0x0 "IMUASID14__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD033F0++0x3
line.long 0x0 "IMUCTR15__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD033F8++0x3
line.long 0x0 "IMUASID15__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03400++0x3
line.long 0x0 "IMUCTR16__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03408++0x3
line.long 0x0 "IMUASID16__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03410++0x3
line.long 0x0 "IMUCTR17__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03418++0x3
line.long 0x0 "IMUASID17__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03420++0x3
line.long 0x0 "IMUCTR18__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03428++0x3
line.long 0x0 "IMUASID18__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03430++0x3
line.long 0x0 "IMUCTR19__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03438++0x3
line.long 0x0 "IMUASID19__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03440++0x3
line.long 0x0 "IMUCTR20__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03448++0x3
line.long 0x0 "IMUASID20__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03450++0x3
line.long 0x0 "IMUCTR21__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03458++0x3
line.long 0x0 "IMUASID21__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03460++0x3
line.long 0x0 "IMUCTR22__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03468++0x3
line.long 0x0 "IMUASID22__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03470++0x3
line.long 0x0 "IMUCTR23__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03478++0x3
line.long 0x0 "IMUASID23__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03480++0x3
line.long 0x0 "IMUCTR24__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03488++0x3
line.long 0x0 "IMUASID24__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03490++0x3
line.long 0x0 "IMUCTR25__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03498++0x3
line.long 0x0 "IMUASID25__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD034A0++0x3
line.long 0x0 "IMUCTR26__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD034A8++0x3
line.long 0x0 "IMUASID26__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD034B0++0x3
line.long 0x0 "IMUCTR27__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD034B8++0x3
line.long 0x0 "IMUASID27__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD034C0++0x3
line.long 0x0 "IMUCTR28__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD034C8++0x3
line.long 0x0 "IMUASID28__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD034D0++0x3
line.long 0x0 "IMUCTR29__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD034D8++0x3
line.long 0x0 "IMUASID29__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD034E0++0x3
line.long 0x0 "IMUCTR30__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD034E8++0x3
line.long 0x0 "IMUASID30__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD034F0++0x3
line.long 0x0 "IMUCTR31__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD034F8++0x3
line.long 0x0 "IMUASID31__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03600++0x3
line.long 0x0 "IMUCTR32__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03608++0x3
line.long 0x0 "IMUASID32__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03610++0x3
line.long 0x0 "IMUCTR33__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03618++0x3
line.long 0x0 "IMUASID33__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03620++0x3
line.long 0x0 "IMUCTR34__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03628++0x3
line.long 0x0 "IMUASID34__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03630++0x3
line.long 0x0 "IMUCTR35__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03638++0x3
line.long 0x0 "IMUASID35__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03640++0x3
line.long 0x0 "IMUCTR36__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03648++0x3
line.long 0x0 "IMUASID36__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03650++0x3
line.long 0x0 "IMUCTR37__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03658++0x3
line.long 0x0 "IMUASID37__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03660++0x3
line.long 0x0 "IMUCTR38__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03668++0x3
line.long 0x0 "IMUASID38__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03670++0x3
line.long 0x0 "IMUCTR39__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03678++0x3
line.long 0x0 "IMUASID39__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03680++0x3
line.long 0x0 "IMUCTR40__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03688++0x3
line.long 0x0 "IMUASID40__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03690++0x3
line.long 0x0 "IMUCTR41__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03698++0x3
line.long 0x0 "IMUASID41__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD036A0++0x3
line.long 0x0 "IMUCTR42__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD036A8++0x3
line.long 0x0 "IMUASID42__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD036B0++0x3
line.long 0x0 "IMUCTR43__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD036B8++0x3
line.long 0x0 "IMUASID43__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD036C0++0x3
line.long 0x0 "IMUCTR44__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD036C8++0x3
line.long 0x0 "IMUASID44__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD036D0++0x3
line.long 0x0 "IMUCTR45__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD036D8++0x3
line.long 0x0 "IMUASID45__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD036E0++0x3
line.long 0x0 "IMUCTR46__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD036E8++0x3
line.long 0x0 "IMUASID46__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD036F0++0x3
line.long 0x0 "IMUCTR47__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD036F8++0x3
line.long 0x0 "IMUASID47__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03700++0x3
line.long 0x0 "IMUCTR48__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03708++0x3
line.long 0x0 "IMUASID48__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03710++0x3
line.long 0x0 "IMUCTR49__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03718++0x3
line.long 0x0 "IMUASID49__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03720++0x3
line.long 0x0 "IMUCTR50__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03728++0x3
line.long 0x0 "IMUASID50__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03730++0x3
line.long 0x0 "IMUCTR51__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03738++0x3
line.long 0x0 "IMUASID51__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03740++0x3
line.long 0x0 "IMUCTR52__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03748++0x3
line.long 0x0 "IMUASID52__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03750++0x3
line.long 0x0 "IMUCTR53__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03758++0x3
line.long 0x0 "IMUASID53__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03760++0x3
line.long 0x0 "IMUCTR54__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03768++0x3
line.long 0x0 "IMUASID54__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03770++0x3
line.long 0x0 "IMUCTR55__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03778++0x3
line.long 0x0 "IMUASID55__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03780++0x3
line.long 0x0 "IMUCTR56__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03788++0x3
line.long 0x0 "IMUASID56__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD03790++0x3
line.long 0x0 "IMUCTR57__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD03798++0x3
line.long 0x0 "IMUASID57__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD037A0++0x3
line.long 0x0 "IMUCTR58__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD037A8++0x3
line.long 0x0 "IMUASID58__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD037B0++0x3
line.long 0x0 "IMUCTR59__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD037B8++0x3
line.long 0x0 "IMUASID59__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD037C0++0x3
line.long 0x0 "IMUCTR60__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD037C8++0x3
line.long 0x0 "IMUASID60__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD037D0++0x3
line.long 0x0 "IMUCTR61__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD037D8++0x3
line.long 0x0 "IMUASID61__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD037E0++0x3
line.long 0x0 "IMUCTR62__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD037E8++0x3
line.long 0x0 "IMUASID62__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD037F0++0x3
line.long 0x0 "IMUCTR63__DS0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD037F8++0x3
line.long 0x0 "IMUASID63__DS0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD10000++0x3
line.long 0x0 "IMCTR0__DS0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD10040++0x3
line.long 0x0 "IMSEC__DS0,This register controls the attribute of secure/non-secure for MMU. This register can be accessed by the master which operates on secure-mode only. When non-secure master accesses to this regiser. write access is ignored."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "SEC,SEC[n]=0 : IMCTRn~IMERIDn is Non-secure"
group.long 0xD11040++0x3
line.long 0x0 "IMCTR1__DS0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD12080++0x3
line.long 0x0 "IMCTR2__DS0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD130C0++0x3
line.long 0x0 "IMCTR3__DS0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD14100++0x3
line.long 0x0 "IMCTR4__DS0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD15140++0x3
line.long 0x0 "IMCTR5__DS0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD16180++0x3
line.long 0x0 "IMCTR6__DS0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD171C0++0x3
line.long 0x0 "IMCTR7__DS0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD18800++0x3
line.long 0x0 "IMCTR8__DS0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD19840++0x3
line.long 0x0 "IMCTR9__DS0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD1A880++0x3
line.long 0x0 "IMCTR10__DS0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD1B8C0++0x3
line.long 0x0 "IMCTR11__DS0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD1C900++0x3
line.long 0x0 "IMCTR12__DS0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD1D940++0x3
line.long 0x0 "IMCTR13__DS0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD1E980++0x3
line.long 0x0 "IMCTR14__DS0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD1F9C0++0x3
line.long 0x0 "IMCTR15__DS0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD40548++0x7
line.long 0x0 "IMERRSIDAR__HSC,This register indicates the Error SrcID when EDC error happen in AXI AR channel."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x4 "IMERRSIDR__HSC,This register indicates the Error SrcID when EDC error happen in AXI R channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0xD40558++0x3
line.long 0x0 "IMERRSIDNPTWAR__HSC,This register indicates the Error SrcID when EDC error happen in AXI AR channel with no Page Table Walk."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0xD40560++0x1B
line.long 0x0 "IMAPQOS__HSC,This resister controls QoS value that is output from IPMMU(cache) to IPMMU(main) through ARADDR[35:32]."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "APQOS,Append QoS"
line.long 0x4 "IMERRSIDRRESP__HSC,This register indicates the Error SrcID when EDC error happen in AXI R(response) channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x8 "IMERRSIDPA__HSC,This register indicates the Error SrcID when EDC error happen in APB address channel."
bitfld.long 0x8 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x8 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x8 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0xC "IMERRSIDPWD__HSC,This register indicates the Error SrcID when EDC error happen in APB write data channel."
bitfld.long 0xC 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0xC 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x10 "IMRGID__HSC,Region-ID setting will be available for each IPMMU-hier (each bus hierarchy). This will be used for all PTW transactions originating in this bus hierarchy."
hexmask.long 0x10 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x10 0.--3. 1. "RGID,Region-ID"
line.long 0x14 "IMRGIDEN__HSC,This register is used for setting to protect IMRGID register."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x14 0.--15. 1. "RGIDEN,When RGIDEN[PUSER[5:2]]=1  IMRGID[3:0] register can be accessed."
line.long 0x18 "IMSECGRP__HSC,This register is used for setting to protect IMRGID register."
hexmask.long 0x18 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x18 0. "SECGRP,When PUSER[1]=0 " "0,1"
group.long 0xD41500++0x3
line.long 0x0 "IMSCTLR__HSC,This register controls the behavior of IPMMU function."
bitfld.long 0x0 31. "DISWPROT,Read and Write protection of MMU System Control Register and MMU auxiliary Control register" "0: can write IMSCTLR,1: can write/read IMSCTLR"
newline
bitfld.long 0x0 30. "NSACCEN,Non-secure access enable for MMU System Control Register and MMU auxiliary Control register" "0: disable non-secure access,1: enable non-secure access"
newline
bitfld.long 0x0 29. "DISMMU,Disable IPMMU cache" "0: enable IPMMU cache,1: disable IPMMU cache"
newline
bitfld.long 0x0 28. "USE_SECGRP,Use security group to judge Secure/Non-secure access" "0,1"
newline
hexmask.long 0x0 0.--27. 1. "Reserved_0,Reserved"
group.long 0xD41554++0x3
line.long 0x0 "ISERRINJR__HSC,IPMMU cache"
hexmask.long 0x0 7.--31. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 6. "ERRINJ_EDCERR_PWD,Error injection bit for EDC error in APB write datta channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 5. "ERRINJ_EDCERR_PA,Error injection bit for EDC error in APB address channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 4. "ERRINJ_EDCERR_RRESP,Error injection bit for EDC error in AXI R response channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 3. "ERRINJ_EDCERR_NPTW_AR,Error injection bit for EDC error in AXI AR channel (during not Page Table Walk)." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 2. "ERRINJ_COMPFAIL,Error injection bit for DCLS error." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 1. "ERRINJ_EDCERR_R,Error injection bit for EDC error in AXI R channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 0. "ERRINJ_EDCERR_AR,Error injection bit for EDC error in AXI AR channel." "0: Clear error injection,1: Enable error injection"
group.long 0xD41580++0x3
line.long 0x0 "IMPFMCTR__HSC,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "MD,Monitor Mode" "0: Monitor all MMUs,1: Reserved,?,?"
newline
hexmask.long.byte 0x0 8.--11. 1. "SEL,When MD is B'11  SEL indicates the MMU table number to be monitored."
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "RST,Reset all status and counter values." "0,1"
newline
bitfld.long 0x0 0. "EN,Performance Monitor Enable" "0: Stop to count,1: Start to count"
rgroup.long 0xD41590++0xB
line.long 0x0 "IMPFMTOTAL__HSC,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x0 0.--23. 1. "TOTAL,The total number of translation requests"
line.long 0x4 "IMPFMHIT__HSC,"
hexmask.long.byte 0x4 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x4 0.--23. 1. "HIT,The total number of TLB hit requests"
line.long 0x8 "IMPFMMISS__HSC,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x8 0.--23. 1. "MISS,The total number of miss requests"
group.long 0xD42200++0x3
line.long 0x0 "IMPCTR__HSC,This register controls the behavior of the PMB function."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "TTSEL,Translation Table Select"
newline
bitfld.long 0x0 3. "TTEN,TLB Translation Enable" "0: Output PPN as a physical address,1: Output PPN as an intermediate physical address.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurred"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "PMBEN,PMB Enable" "0: PMB disabled,1: PMB enabled"
group.long 0xD42208++0x3
line.long 0x0 "IMPSTR__HSC,This register indicates the error status of the address translation by PMB."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "MHIT,Multiple hit" "0,1"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "TF,Translation Fault" "0,1"
rgroup.long 0xD4220C++0x3
line.long 0x0 "IMPEAR__HSC,This register indicates the address which an address translation error occurred."
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0xD42280++0x7F
line.long 0x0 "IMPMBA0__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x0 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
line.long 0x4 "IMPMBA1__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x4 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x4 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
line.long 0x8 "IMPMBA2__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x8 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x8 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x8 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x8 0.--7. 1. "Reserved_0,Reserved"
line.long 0xC "IMPMBA3__HSC,Note: n= 0 to 15"
hexmask.long.byte 0xC 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0xC 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0xC 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0xC 0.--7. 1. "Reserved_0,Reserved"
line.long 0x10 "IMPMBA4__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x10 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x10 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x10 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x10 0.--7. 1. "Reserved_0,Reserved"
line.long 0x14 "IMPMBA5__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x14 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x14 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x14 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x14 0.--7. 1. "Reserved_0,Reserved"
line.long 0x18 "IMPMBA6__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x18 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x18 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x18 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x18 0.--7. 1. "Reserved_0,Reserved"
line.long 0x1C "IMPMBA7__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x1C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x1C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x1C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x1C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x20 "IMPMBA8__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x20 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x20 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x20 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x20 0.--7. 1. "Reserved_0,Reserved"
line.long 0x24 "IMPMBA9__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x24 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x24 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x24 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x24 0.--7. 1. "Reserved_0,Reserved"
line.long 0x28 "IMPMBA10__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x28 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x28 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x28 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x28 0.--7. 1. "Reserved_0,Reserved"
line.long 0x2C "IMPMBA11__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x2C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x2C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x2C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x2C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x30 "IMPMBA12__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x30 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x30 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x30 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x30 0.--7. 1. "Reserved_0,Reserved"
line.long 0x34 "IMPMBA13__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x34 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x34 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x34 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x34 0.--7. 1. "Reserved_0,Reserved"
line.long 0x38 "IMPMBA14__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x38 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x38 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x38 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x38 0.--7. 1. "Reserved_0,Reserved"
line.long 0x3C "IMPMBA15__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x3C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x3C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x3C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x3C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x40 "IMPMBD0__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x40 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x40 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x40 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x40 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x40 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x40 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x40 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x40 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x40 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x44 "IMPMBD1__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x44 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x44 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x44 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x44 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x44 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x44 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x44 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x44 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x44 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x48 "IMPMBD2__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x48 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x48 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x48 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x48 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x48 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x48 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x48 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x48 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x48 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4C "IMPMBD3__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x4C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x4C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x4C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x4C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x4C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x4C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x4C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x4C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x50 "IMPMBD4__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x50 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x50 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x50 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x50 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x50 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x50 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x50 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x50 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x50 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x54 "IMPMBD5__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x54 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x54 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x54 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x54 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x54 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x54 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x54 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x54 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x54 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x58 "IMPMBD6__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x58 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x58 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x58 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x58 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x58 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x58 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x58 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x58 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x58 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x5C "IMPMBD7__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x5C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x5C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x5C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x5C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x5C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x5C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x5C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x5C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x5C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x60 "IMPMBD8__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x60 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x60 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x60 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x60 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x60 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x60 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x60 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x60 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x60 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x64 "IMPMBD9__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x64 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x64 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x64 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x64 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x64 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x64 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x64 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x64 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x64 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x68 "IMPMBD10__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x68 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x68 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x68 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x68 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x68 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x68 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x68 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x68 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x68 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x6C "IMPMBD11__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x6C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x6C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x6C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x6C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x6C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x6C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x6C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x6C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x6C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x70 "IMPMBD12__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x70 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x70 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x70 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x70 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x70 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x70 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x70 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x70 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x70 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x74 "IMPMBD13__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x74 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x74 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x74 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x74 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x74 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x74 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x74 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x74 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x74 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x78 "IMPMBD14__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x78 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x78 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x78 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x78 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x78 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x78 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x78 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x78 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x78 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x7C "IMPMBD15__HSC,Note: n= 0 to 15"
hexmask.long.byte 0x7C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x7C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x7C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x7C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x7C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x7C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x7C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x7C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x7C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
group.long 0xD43300++0x3
line.long 0x0 "IMUCTR0__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43308++0x3
line.long 0x0 "IMUASID0__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43310++0x3
line.long 0x0 "IMUCTR1__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43318++0x3
line.long 0x0 "IMUASID1__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43320++0x3
line.long 0x0 "IMUCTR2__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43328++0x3
line.long 0x0 "IMUASID2__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43330++0x3
line.long 0x0 "IMUCTR3__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43338++0x3
line.long 0x0 "IMUASID3__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43340++0x3
line.long 0x0 "IMUCTR4__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43348++0x3
line.long 0x0 "IMUASID4__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43350++0x3
line.long 0x0 "IMUCTR5__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43358++0x3
line.long 0x0 "IMUASID5__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43360++0x3
line.long 0x0 "IMUCTR6__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43368++0x3
line.long 0x0 "IMUASID6__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43370++0x3
line.long 0x0 "IMUCTR7__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43378++0x3
line.long 0x0 "IMUASID7__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43380++0x3
line.long 0x0 "IMUCTR8__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43388++0x3
line.long 0x0 "IMUASID8__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43390++0x3
line.long 0x0 "IMUCTR9__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43398++0x3
line.long 0x0 "IMUASID9__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD433A0++0x3
line.long 0x0 "IMUCTR10__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD433A8++0x3
line.long 0x0 "IMUASID10__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD433B0++0x3
line.long 0x0 "IMUCTR11__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD433B8++0x3
line.long 0x0 "IMUASID11__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD433C0++0x3
line.long 0x0 "IMUCTR12__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD433C8++0x3
line.long 0x0 "IMUASID12__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD433D0++0x3
line.long 0x0 "IMUCTR13__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD433D8++0x3
line.long 0x0 "IMUASID13__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD433E0++0x3
line.long 0x0 "IMUCTR14__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD433E8++0x3
line.long 0x0 "IMUASID14__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD433F0++0x3
line.long 0x0 "IMUCTR15__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD433F8++0x3
line.long 0x0 "IMUASID15__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43400++0x3
line.long 0x0 "IMUCTR16__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43408++0x3
line.long 0x0 "IMUASID16__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43410++0x3
line.long 0x0 "IMUCTR17__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43418++0x3
line.long 0x0 "IMUASID17__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43420++0x3
line.long 0x0 "IMUCTR18__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43428++0x3
line.long 0x0 "IMUASID18__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43430++0x3
line.long 0x0 "IMUCTR19__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43438++0x3
line.long 0x0 "IMUASID19__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43440++0x3
line.long 0x0 "IMUCTR20__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43448++0x3
line.long 0x0 "IMUASID20__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43450++0x3
line.long 0x0 "IMUCTR21__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43458++0x3
line.long 0x0 "IMUASID21__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43460++0x3
line.long 0x0 "IMUCTR22__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43468++0x3
line.long 0x0 "IMUASID22__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43470++0x3
line.long 0x0 "IMUCTR23__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43478++0x3
line.long 0x0 "IMUASID23__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43480++0x3
line.long 0x0 "IMUCTR24__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43488++0x3
line.long 0x0 "IMUASID24__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43490++0x3
line.long 0x0 "IMUCTR25__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43498++0x3
line.long 0x0 "IMUASID25__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD434A0++0x3
line.long 0x0 "IMUCTR26__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD434A8++0x3
line.long 0x0 "IMUASID26__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD434B0++0x3
line.long 0x0 "IMUCTR27__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD434B8++0x3
line.long 0x0 "IMUASID27__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD434C0++0x3
line.long 0x0 "IMUCTR28__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD434C8++0x3
line.long 0x0 "IMUASID28__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD434D0++0x3
line.long 0x0 "IMUCTR29__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD434D8++0x3
line.long 0x0 "IMUASID29__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD434E0++0x3
line.long 0x0 "IMUCTR30__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD434E8++0x3
line.long 0x0 "IMUASID30__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD434F0++0x3
line.long 0x0 "IMUCTR31__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD434F8++0x3
line.long 0x0 "IMUASID31__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43600++0x3
line.long 0x0 "IMUCTR32__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43608++0x3
line.long 0x0 "IMUASID32__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43610++0x3
line.long 0x0 "IMUCTR33__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43618++0x3
line.long 0x0 "IMUASID33__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43620++0x3
line.long 0x0 "IMUCTR34__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43628++0x3
line.long 0x0 "IMUASID34__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43630++0x3
line.long 0x0 "IMUCTR35__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43638++0x3
line.long 0x0 "IMUASID35__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43640++0x3
line.long 0x0 "IMUCTR36__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43648++0x3
line.long 0x0 "IMUASID36__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43650++0x3
line.long 0x0 "IMUCTR37__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43658++0x3
line.long 0x0 "IMUASID37__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43660++0x3
line.long 0x0 "IMUCTR38__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43668++0x3
line.long 0x0 "IMUASID38__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43670++0x3
line.long 0x0 "IMUCTR39__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43678++0x3
line.long 0x0 "IMUASID39__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43680++0x3
line.long 0x0 "IMUCTR40__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43688++0x3
line.long 0x0 "IMUASID40__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43690++0x3
line.long 0x0 "IMUCTR41__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43698++0x3
line.long 0x0 "IMUASID41__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD436A0++0x3
line.long 0x0 "IMUCTR42__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD436A8++0x3
line.long 0x0 "IMUASID42__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD436B0++0x3
line.long 0x0 "IMUCTR43__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD436B8++0x3
line.long 0x0 "IMUASID43__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD436C0++0x3
line.long 0x0 "IMUCTR44__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD436C8++0x3
line.long 0x0 "IMUASID44__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD436D0++0x3
line.long 0x0 "IMUCTR45__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD436D8++0x3
line.long 0x0 "IMUASID45__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD436E0++0x3
line.long 0x0 "IMUCTR46__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD436E8++0x3
line.long 0x0 "IMUASID46__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD436F0++0x3
line.long 0x0 "IMUCTR47__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD436F8++0x3
line.long 0x0 "IMUASID47__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43700++0x3
line.long 0x0 "IMUCTR48__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43708++0x3
line.long 0x0 "IMUASID48__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43710++0x3
line.long 0x0 "IMUCTR49__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43718++0x3
line.long 0x0 "IMUASID49__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43720++0x3
line.long 0x0 "IMUCTR50__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43728++0x3
line.long 0x0 "IMUASID50__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43730++0x3
line.long 0x0 "IMUCTR51__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43738++0x3
line.long 0x0 "IMUASID51__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43740++0x3
line.long 0x0 "IMUCTR52__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43748++0x3
line.long 0x0 "IMUASID52__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43750++0x3
line.long 0x0 "IMUCTR53__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43758++0x3
line.long 0x0 "IMUASID53__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43760++0x3
line.long 0x0 "IMUCTR54__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43768++0x3
line.long 0x0 "IMUASID54__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43770++0x3
line.long 0x0 "IMUCTR55__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43778++0x3
line.long 0x0 "IMUASID55__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43780++0x3
line.long 0x0 "IMUCTR56__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43788++0x3
line.long 0x0 "IMUASID56__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD43790++0x3
line.long 0x0 "IMUCTR57__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD43798++0x3
line.long 0x0 "IMUASID57__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD437A0++0x3
line.long 0x0 "IMUCTR58__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD437A8++0x3
line.long 0x0 "IMUASID58__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD437B0++0x3
line.long 0x0 "IMUCTR59__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD437B8++0x3
line.long 0x0 "IMUASID59__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD437C0++0x3
line.long 0x0 "IMUCTR60__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD437C8++0x3
line.long 0x0 "IMUASID60__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD437D0++0x3
line.long 0x0 "IMUCTR61__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD437D8++0x3
line.long 0x0 "IMUASID61__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD437E0++0x3
line.long 0x0 "IMUCTR62__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD437E8++0x3
line.long 0x0 "IMUASID62__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD437F0++0x3
line.long 0x0 "IMUCTR63__HSC,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD437F8++0x3
line.long 0x0 "IMUASID63__HSC,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD50000++0x3
line.long 0x0 "IMCTR0__HSC,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD50040++0x3
line.long 0x0 "IMSEC__HSC,This register controls the attribute of secure/non-secure for MMU. This register can be accessed by the master which operates on secure-mode only. When non-secure master accesses to this regiser. write access is ignored."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "SEC,SEC[n]=0 : IMCTRn~IMERIDn is Non-secure"
group.long 0xD51040++0x3
line.long 0x0 "IMCTR1__HSC,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD52080++0x3
line.long 0x0 "IMCTR2__HSC,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD530C0++0x3
line.long 0x0 "IMCTR3__HSC,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD54100++0x3
line.long 0x0 "IMCTR4__HSC,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD55140++0x3
line.long 0x0 "IMCTR5__HSC,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD56180++0x3
line.long 0x0 "IMCTR6__HSC,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD571C0++0x3
line.long 0x0 "IMCTR7__HSC,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD58800++0x3
line.long 0x0 "IMCTR8__HSC,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD59840++0x3
line.long 0x0 "IMCTR9__HSC,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD5A880++0x3
line.long 0x0 "IMCTR10__HSC,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD5B8C0++0x3
line.long 0x0 "IMCTR11__HSC,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD5C900++0x3
line.long 0x0 "IMCTR12__HSC,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD5D940++0x3
line.long 0x0 "IMCTR13__HSC,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD5E980++0x3
line.long 0x0 "IMCTR14__HSC,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD5F9C0++0x3
line.long 0x0 "IMCTR15__HSC,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD80548++0x7
line.long 0x0 "IMERRSIDAR__IR,This register indicates the Error SrcID when EDC error happen in AXI AR channel."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x4 "IMERRSIDR__IR,This register indicates the Error SrcID when EDC error happen in AXI R channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0xD80558++0x3
line.long 0x0 "IMERRSIDNPTWAR__IR,This register indicates the Error SrcID when EDC error happen in AXI AR channel with no Page Table Walk."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0xD80560++0x1B
line.long 0x0 "IMAPQOS__IR,This resister controls QoS value that is output from IPMMU(cache) to IPMMU(main) through ARADDR[35:32]."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "APQOS,Append QoS"
line.long 0x4 "IMERRSIDRRESP__IR,This register indicates the Error SrcID when EDC error happen in AXI R(response) channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x8 "IMERRSIDPA__IR,This register indicates the Error SrcID when EDC error happen in APB address channel."
bitfld.long 0x8 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x8 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x8 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0xC "IMERRSIDPWD__IR,This register indicates the Error SrcID when EDC error happen in APB write data channel."
bitfld.long 0xC 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0xC 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x10 "IMRGID__IR,Region-ID setting will be available for each IPMMU-hier (each bus hierarchy). This will be used for all PTW transactions originating in this bus hierarchy."
hexmask.long 0x10 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x10 0.--3. 1. "RGID,Region-ID"
line.long 0x14 "IMRGIDEN__IR,This register is used for setting to protect IMRGID register."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x14 0.--15. 1. "RGIDEN,When RGIDEN[PUSER[5:2]]=1  IMRGID[3:0] register can be accessed."
line.long 0x18 "IMSECGRP__IR,This register is used for setting to protect IMRGID register."
hexmask.long 0x18 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x18 0. "SECGRP,When PUSER[1]=0 " "0,1"
group.long 0xD81500++0x3
line.long 0x0 "IMSCTLR__IR,This register controls the behavior of IPMMU function."
bitfld.long 0x0 31. "DISWPROT,Read and Write protection of MMU System Control Register and MMU auxiliary Control register" "0: can write IMSCTLR,1: can write/read IMSCTLR"
newline
bitfld.long 0x0 30. "NSACCEN,Non-secure access enable for MMU System Control Register and MMU auxiliary Control register" "0: disable non-secure access,1: enable non-secure access"
newline
bitfld.long 0x0 29. "DISMMU,Disable IPMMU cache" "0: enable IPMMU cache,1: disable IPMMU cache"
newline
bitfld.long 0x0 28. "USE_SECGRP,Use security group to judge Secure/Non-secure access" "0,1"
newline
hexmask.long 0x0 0.--27. 1. "Reserved_0,Reserved"
group.long 0xD81554++0x3
line.long 0x0 "ISERRINJR__IR,IPMMU cache"
hexmask.long 0x0 7.--31. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 6. "ERRINJ_EDCERR_PWD,Error injection bit for EDC error in APB write datta channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 5. "ERRINJ_EDCERR_PA,Error injection bit for EDC error in APB address channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 4. "ERRINJ_EDCERR_RRESP,Error injection bit for EDC error in AXI R response channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 3. "ERRINJ_EDCERR_NPTW_AR,Error injection bit for EDC error in AXI AR channel (during not Page Table Walk)." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 2. "ERRINJ_COMPFAIL,Error injection bit for DCLS error." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 1. "ERRINJ_EDCERR_R,Error injection bit for EDC error in AXI R channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 0. "ERRINJ_EDCERR_AR,Error injection bit for EDC error in AXI AR channel." "0: Clear error injection,1: Enable error injection"
group.long 0xD81580++0x3
line.long 0x0 "IMPFMCTR__IR,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "MD,Monitor Mode" "0: Monitor all MMUs,1: Reserved,?,?"
newline
hexmask.long.byte 0x0 8.--11. 1. "SEL,When MD is B'11  SEL indicates the MMU table number to be monitored."
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "RST,Reset all status and counter values." "0,1"
newline
bitfld.long 0x0 0. "EN,Performance Monitor Enable" "0: Stop to count,1: Start to count"
rgroup.long 0xD81590++0xB
line.long 0x0 "IMPFMTOTAL__IR,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x0 0.--23. 1. "TOTAL,The total number of translation requests"
line.long 0x4 "IMPFMHIT__IR,"
hexmask.long.byte 0x4 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x4 0.--23. 1. "HIT,The total number of TLB hit requests"
line.long 0x8 "IMPFMMISS__IR,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x8 0.--23. 1. "MISS,The total number of miss requests"
group.long 0xD82200++0x3
line.long 0x0 "IMPCTR__IR,This register controls the behavior of the PMB function."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "TTSEL,Translation Table Select"
newline
bitfld.long 0x0 3. "TTEN,TLB Translation Enable" "0: Output PPN as a physical address,1: Output PPN as an intermediate physical address.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurred"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "PMBEN,PMB Enable" "0: PMB disabled,1: PMB enabled"
group.long 0xD82208++0x3
line.long 0x0 "IMPSTR__IR,This register indicates the error status of the address translation by PMB."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "MHIT,Multiple hit" "0,1"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "TF,Translation Fault" "0,1"
rgroup.long 0xD8220C++0x3
line.long 0x0 "IMPEAR__IR,This register indicates the address which an address translation error occurred."
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0xD82280++0x7F
line.long 0x0 "IMPMBA0__IR,Note: n= 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x0 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
line.long 0x4 "IMPMBA1__IR,Note: n= 0 to 15"
hexmask.long.byte 0x4 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x4 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
line.long 0x8 "IMPMBA2__IR,Note: n= 0 to 15"
hexmask.long.byte 0x8 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x8 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x8 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x8 0.--7. 1. "Reserved_0,Reserved"
line.long 0xC "IMPMBA3__IR,Note: n= 0 to 15"
hexmask.long.byte 0xC 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0xC 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0xC 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0xC 0.--7. 1. "Reserved_0,Reserved"
line.long 0x10 "IMPMBA4__IR,Note: n= 0 to 15"
hexmask.long.byte 0x10 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x10 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x10 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x10 0.--7. 1. "Reserved_0,Reserved"
line.long 0x14 "IMPMBA5__IR,Note: n= 0 to 15"
hexmask.long.byte 0x14 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x14 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x14 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x14 0.--7. 1. "Reserved_0,Reserved"
line.long 0x18 "IMPMBA6__IR,Note: n= 0 to 15"
hexmask.long.byte 0x18 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x18 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x18 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x18 0.--7. 1. "Reserved_0,Reserved"
line.long 0x1C "IMPMBA7__IR,Note: n= 0 to 15"
hexmask.long.byte 0x1C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x1C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x1C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x1C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x20 "IMPMBA8__IR,Note: n= 0 to 15"
hexmask.long.byte 0x20 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x20 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x20 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x20 0.--7. 1. "Reserved_0,Reserved"
line.long 0x24 "IMPMBA9__IR,Note: n= 0 to 15"
hexmask.long.byte 0x24 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x24 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x24 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x24 0.--7. 1. "Reserved_0,Reserved"
line.long 0x28 "IMPMBA10__IR,Note: n= 0 to 15"
hexmask.long.byte 0x28 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x28 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x28 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x28 0.--7. 1. "Reserved_0,Reserved"
line.long 0x2C "IMPMBA11__IR,Note: n= 0 to 15"
hexmask.long.byte 0x2C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x2C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x2C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x2C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x30 "IMPMBA12__IR,Note: n= 0 to 15"
hexmask.long.byte 0x30 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x30 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x30 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x30 0.--7. 1. "Reserved_0,Reserved"
line.long 0x34 "IMPMBA13__IR,Note: n= 0 to 15"
hexmask.long.byte 0x34 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x34 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x34 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x34 0.--7. 1. "Reserved_0,Reserved"
line.long 0x38 "IMPMBA14__IR,Note: n= 0 to 15"
hexmask.long.byte 0x38 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x38 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x38 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x38 0.--7. 1. "Reserved_0,Reserved"
line.long 0x3C "IMPMBA15__IR,Note: n= 0 to 15"
hexmask.long.byte 0x3C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x3C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x3C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x3C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x40 "IMPMBD0__IR,Note: n= 0 to 15"
hexmask.long.byte 0x40 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x40 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x40 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x40 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x40 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x40 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x40 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x40 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x40 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x44 "IMPMBD1__IR,Note: n= 0 to 15"
hexmask.long.byte 0x44 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x44 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x44 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x44 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x44 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x44 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x44 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x44 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x44 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x48 "IMPMBD2__IR,Note: n= 0 to 15"
hexmask.long.byte 0x48 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x48 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x48 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x48 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x48 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x48 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x48 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x48 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x48 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4C "IMPMBD3__IR,Note: n= 0 to 15"
hexmask.long.byte 0x4C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x4C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x4C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x4C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x4C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x4C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x4C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x4C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x50 "IMPMBD4__IR,Note: n= 0 to 15"
hexmask.long.byte 0x50 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x50 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x50 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x50 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x50 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x50 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x50 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x50 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x50 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x54 "IMPMBD5__IR,Note: n= 0 to 15"
hexmask.long.byte 0x54 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x54 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x54 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x54 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x54 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x54 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x54 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x54 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x54 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x58 "IMPMBD6__IR,Note: n= 0 to 15"
hexmask.long.byte 0x58 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x58 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x58 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x58 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x58 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x58 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x58 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x58 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x58 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x5C "IMPMBD7__IR,Note: n= 0 to 15"
hexmask.long.byte 0x5C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x5C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x5C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x5C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x5C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x5C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x5C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x5C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x5C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x60 "IMPMBD8__IR,Note: n= 0 to 15"
hexmask.long.byte 0x60 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x60 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x60 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x60 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x60 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x60 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x60 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x60 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x60 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x64 "IMPMBD9__IR,Note: n= 0 to 15"
hexmask.long.byte 0x64 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x64 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x64 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x64 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x64 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x64 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x64 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x64 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x64 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x68 "IMPMBD10__IR,Note: n= 0 to 15"
hexmask.long.byte 0x68 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x68 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x68 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x68 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x68 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x68 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x68 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x68 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x68 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x6C "IMPMBD11__IR,Note: n= 0 to 15"
hexmask.long.byte 0x6C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x6C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x6C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x6C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x6C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x6C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x6C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x6C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x6C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x70 "IMPMBD12__IR,Note: n= 0 to 15"
hexmask.long.byte 0x70 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x70 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x70 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x70 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x70 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x70 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x70 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x70 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x70 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x74 "IMPMBD13__IR,Note: n= 0 to 15"
hexmask.long.byte 0x74 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x74 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x74 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x74 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x74 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x74 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x74 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x74 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x74 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x78 "IMPMBD14__IR,Note: n= 0 to 15"
hexmask.long.byte 0x78 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x78 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x78 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x78 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x78 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x78 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x78 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x78 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x78 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x7C "IMPMBD15__IR,Note: n= 0 to 15"
hexmask.long.byte 0x7C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x7C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x7C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x7C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x7C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x7C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x7C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x7C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x7C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
group.long 0xD83300++0x3
line.long 0x0 "IMUCTR0__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83308++0x3
line.long 0x0 "IMUASID0__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83310++0x3
line.long 0x0 "IMUCTR1__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83318++0x3
line.long 0x0 "IMUASID1__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83320++0x3
line.long 0x0 "IMUCTR2__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83328++0x3
line.long 0x0 "IMUASID2__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83330++0x3
line.long 0x0 "IMUCTR3__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83338++0x3
line.long 0x0 "IMUASID3__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83340++0x3
line.long 0x0 "IMUCTR4__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83348++0x3
line.long 0x0 "IMUASID4__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83350++0x3
line.long 0x0 "IMUCTR5__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83358++0x3
line.long 0x0 "IMUASID5__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83360++0x3
line.long 0x0 "IMUCTR6__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83368++0x3
line.long 0x0 "IMUASID6__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83370++0x3
line.long 0x0 "IMUCTR7__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83378++0x3
line.long 0x0 "IMUASID7__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83380++0x3
line.long 0x0 "IMUCTR8__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83388++0x3
line.long 0x0 "IMUASID8__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83390++0x3
line.long 0x0 "IMUCTR9__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83398++0x3
line.long 0x0 "IMUASID9__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD833A0++0x3
line.long 0x0 "IMUCTR10__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD833A8++0x3
line.long 0x0 "IMUASID10__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD833B0++0x3
line.long 0x0 "IMUCTR11__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD833B8++0x3
line.long 0x0 "IMUASID11__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD833C0++0x3
line.long 0x0 "IMUCTR12__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD833C8++0x3
line.long 0x0 "IMUASID12__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD833D0++0x3
line.long 0x0 "IMUCTR13__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD833D8++0x3
line.long 0x0 "IMUASID13__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD833E0++0x3
line.long 0x0 "IMUCTR14__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD833E8++0x3
line.long 0x0 "IMUASID14__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD833F0++0x3
line.long 0x0 "IMUCTR15__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD833F8++0x3
line.long 0x0 "IMUASID15__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83400++0x3
line.long 0x0 "IMUCTR16__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83408++0x3
line.long 0x0 "IMUASID16__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83410++0x3
line.long 0x0 "IMUCTR17__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83418++0x3
line.long 0x0 "IMUASID17__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83420++0x3
line.long 0x0 "IMUCTR18__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83428++0x3
line.long 0x0 "IMUASID18__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83430++0x3
line.long 0x0 "IMUCTR19__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83438++0x3
line.long 0x0 "IMUASID19__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83440++0x3
line.long 0x0 "IMUCTR20__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83448++0x3
line.long 0x0 "IMUASID20__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83450++0x3
line.long 0x0 "IMUCTR21__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83458++0x3
line.long 0x0 "IMUASID21__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83460++0x3
line.long 0x0 "IMUCTR22__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83468++0x3
line.long 0x0 "IMUASID22__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83470++0x3
line.long 0x0 "IMUCTR23__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83478++0x3
line.long 0x0 "IMUASID23__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83480++0x3
line.long 0x0 "IMUCTR24__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83488++0x3
line.long 0x0 "IMUASID24__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83490++0x3
line.long 0x0 "IMUCTR25__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83498++0x3
line.long 0x0 "IMUASID25__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD834A0++0x3
line.long 0x0 "IMUCTR26__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD834A8++0x3
line.long 0x0 "IMUASID26__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD834B0++0x3
line.long 0x0 "IMUCTR27__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD834B8++0x3
line.long 0x0 "IMUASID27__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD834C0++0x3
line.long 0x0 "IMUCTR28__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD834C8++0x3
line.long 0x0 "IMUASID28__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD834D0++0x3
line.long 0x0 "IMUCTR29__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD834D8++0x3
line.long 0x0 "IMUASID29__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD834E0++0x3
line.long 0x0 "IMUCTR30__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD834E8++0x3
line.long 0x0 "IMUASID30__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD834F0++0x3
line.long 0x0 "IMUCTR31__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD834F8++0x3
line.long 0x0 "IMUASID31__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83600++0x3
line.long 0x0 "IMUCTR32__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83608++0x3
line.long 0x0 "IMUASID32__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83610++0x3
line.long 0x0 "IMUCTR33__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83618++0x3
line.long 0x0 "IMUASID33__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83620++0x3
line.long 0x0 "IMUCTR34__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83628++0x3
line.long 0x0 "IMUASID34__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83630++0x3
line.long 0x0 "IMUCTR35__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83638++0x3
line.long 0x0 "IMUASID35__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83640++0x3
line.long 0x0 "IMUCTR36__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83648++0x3
line.long 0x0 "IMUASID36__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83650++0x3
line.long 0x0 "IMUCTR37__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83658++0x3
line.long 0x0 "IMUASID37__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83660++0x3
line.long 0x0 "IMUCTR38__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83668++0x3
line.long 0x0 "IMUASID38__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83670++0x3
line.long 0x0 "IMUCTR39__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83678++0x3
line.long 0x0 "IMUASID39__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83680++0x3
line.long 0x0 "IMUCTR40__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83688++0x3
line.long 0x0 "IMUASID40__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83690++0x3
line.long 0x0 "IMUCTR41__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83698++0x3
line.long 0x0 "IMUASID41__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD836A0++0x3
line.long 0x0 "IMUCTR42__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD836A8++0x3
line.long 0x0 "IMUASID42__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD836B0++0x3
line.long 0x0 "IMUCTR43__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD836B8++0x3
line.long 0x0 "IMUASID43__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD836C0++0x3
line.long 0x0 "IMUCTR44__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD836C8++0x3
line.long 0x0 "IMUASID44__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD836D0++0x3
line.long 0x0 "IMUCTR45__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD836D8++0x3
line.long 0x0 "IMUASID45__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD836E0++0x3
line.long 0x0 "IMUCTR46__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD836E8++0x3
line.long 0x0 "IMUASID46__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD836F0++0x3
line.long 0x0 "IMUCTR47__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD836F8++0x3
line.long 0x0 "IMUASID47__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83700++0x3
line.long 0x0 "IMUCTR48__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83708++0x3
line.long 0x0 "IMUASID48__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83710++0x3
line.long 0x0 "IMUCTR49__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83718++0x3
line.long 0x0 "IMUASID49__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83720++0x3
line.long 0x0 "IMUCTR50__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83728++0x3
line.long 0x0 "IMUASID50__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83730++0x3
line.long 0x0 "IMUCTR51__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83738++0x3
line.long 0x0 "IMUASID51__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83740++0x3
line.long 0x0 "IMUCTR52__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83748++0x3
line.long 0x0 "IMUASID52__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83750++0x3
line.long 0x0 "IMUCTR53__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83758++0x3
line.long 0x0 "IMUASID53__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83760++0x3
line.long 0x0 "IMUCTR54__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83768++0x3
line.long 0x0 "IMUASID54__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83770++0x3
line.long 0x0 "IMUCTR55__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83778++0x3
line.long 0x0 "IMUASID55__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83780++0x3
line.long 0x0 "IMUCTR56__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83788++0x3
line.long 0x0 "IMUASID56__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD83790++0x3
line.long 0x0 "IMUCTR57__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD83798++0x3
line.long 0x0 "IMUASID57__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD837A0++0x3
line.long 0x0 "IMUCTR58__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD837A8++0x3
line.long 0x0 "IMUASID58__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD837B0++0x3
line.long 0x0 "IMUCTR59__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD837B8++0x3
line.long 0x0 "IMUASID59__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD837C0++0x3
line.long 0x0 "IMUCTR60__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD837C8++0x3
line.long 0x0 "IMUASID60__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD837D0++0x3
line.long 0x0 "IMUCTR61__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD837D8++0x3
line.long 0x0 "IMUASID61__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD837E0++0x3
line.long 0x0 "IMUCTR62__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD837E8++0x3
line.long 0x0 "IMUASID62__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD837F0++0x3
line.long 0x0 "IMUCTR63__IR,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xD837F8++0x3
line.long 0x0 "IMUASID63__IR,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xD90000++0x3
line.long 0x0 "IMCTR0__IR,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD90040++0x3
line.long 0x0 "IMSEC__IR,This register controls the attribute of secure/non-secure for MMU. This register can be accessed by the master which operates on secure-mode only. When non-secure master accesses to this regiser. write access is ignored."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "SEC,SEC[n]=0 : IMCTRn~IMERIDn is Non-secure"
group.long 0xD91040++0x3
line.long 0x0 "IMCTR1__IR,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD92080++0x3
line.long 0x0 "IMCTR2__IR,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD930C0++0x3
line.long 0x0 "IMCTR3__IR,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD94100++0x3
line.long 0x0 "IMCTR4__IR,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD95140++0x3
line.long 0x0 "IMCTR5__IR,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD96180++0x3
line.long 0x0 "IMCTR6__IR,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD971C0++0x3
line.long 0x0 "IMCTR7__IR,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD98800++0x3
line.long 0x0 "IMCTR8__IR,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD99840++0x3
line.long 0x0 "IMCTR9__IR,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD9A880++0x3
line.long 0x0 "IMCTR10__IR,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD9B8C0++0x3
line.long 0x0 "IMCTR11__IR,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD9C900++0x3
line.long 0x0 "IMCTR12__IR,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD9D940++0x3
line.long 0x0 "IMCTR13__IR,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD9E980++0x3
line.long 0x0 "IMCTR14__IR,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xD9F9C0++0x3
line.long 0x0 "IMCTR15__IR,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xDC0548++0x7
line.long 0x0 "IMERRSIDAR__VC0,This register indicates the Error SrcID when EDC error happen in AXI AR channel."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x4 "IMERRSIDR__VC0,This register indicates the Error SrcID when EDC error happen in AXI R channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0xDC0558++0x3
line.long 0x0 "IMERRSIDNPTWAR__VC0,This register indicates the Error SrcID when EDC error happen in AXI AR channel with no Page Table Walk."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0xDC0560++0x1B
line.long 0x0 "IMAPQOS__VC0,This resister controls QoS value that is output from IPMMU(cache) to IPMMU(main) through ARADDR[35:32]."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "APQOS,Append QoS"
line.long 0x4 "IMERRSIDRRESP__VC0,This register indicates the Error SrcID when EDC error happen in AXI R(response) channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x8 "IMERRSIDPA__VC0,This register indicates the Error SrcID when EDC error happen in APB address channel."
bitfld.long 0x8 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x8 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x8 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0xC "IMERRSIDPWD__VC0,This register indicates the Error SrcID when EDC error happen in APB write data channel."
bitfld.long 0xC 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0xC 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x10 "IMRGID__VC0,Region-ID setting will be available for each IPMMU-hier (each bus hierarchy). This will be used for all PTW transactions originating in this bus hierarchy."
hexmask.long 0x10 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x10 0.--3. 1. "RGID,Region-ID"
line.long 0x14 "IMRGIDEN__VC0,This register is used for setting to protect IMRGID register."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x14 0.--15. 1. "RGIDEN,When RGIDEN[PUSER[5:2]]=1  IMRGID[3:0] register can be accessed."
line.long 0x18 "IMSECGRP__VC0,This register is used for setting to protect IMRGID register."
hexmask.long 0x18 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x18 0. "SECGRP,When PUSER[1]=0 " "0,1"
group.long 0xDC1500++0x3
line.long 0x0 "IMSCTLR__VC0,This register controls the behavior of IPMMU function."
bitfld.long 0x0 31. "DISWPROT,Read and Write protection of MMU System Control Register and MMU auxiliary Control register" "0: can write IMSCTLR,1: can write/read IMSCTLR"
newline
bitfld.long 0x0 30. "NSACCEN,Non-secure access enable for MMU System Control Register and MMU auxiliary Control register" "0: disable non-secure access,1: enable non-secure access"
newline
bitfld.long 0x0 29. "DISMMU,Disable IPMMU cache" "0: enable IPMMU cache,1: disable IPMMU cache"
newline
bitfld.long 0x0 28. "USE_SECGRP,Use security group to judge Secure/Non-secure access" "0,1"
newline
hexmask.long 0x0 0.--27. 1. "Reserved_0,Reserved"
group.long 0xDC1554++0x3
line.long 0x0 "ISERRINJR__VC0,IPMMU cache"
hexmask.long 0x0 7.--31. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 6. "ERRINJ_EDCERR_PWD,Error injection bit for EDC error in APB write datta channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 5. "ERRINJ_EDCERR_PA,Error injection bit for EDC error in APB address channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 4. "ERRINJ_EDCERR_RRESP,Error injection bit for EDC error in AXI R response channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 3. "ERRINJ_EDCERR_NPTW_AR,Error injection bit for EDC error in AXI AR channel (during not Page Table Walk)." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 2. "ERRINJ_COMPFAIL,Error injection bit for DCLS error." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 1. "ERRINJ_EDCERR_R,Error injection bit for EDC error in AXI R channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 0. "ERRINJ_EDCERR_AR,Error injection bit for EDC error in AXI AR channel." "0: Clear error injection,1: Enable error injection"
group.long 0xDC1580++0x3
line.long 0x0 "IMPFMCTR__VC0,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "MD,Monitor Mode" "0: Monitor all MMUs,1: Reserved,?,?"
newline
hexmask.long.byte 0x0 8.--11. 1. "SEL,When MD is B'11  SEL indicates the MMU table number to be monitored."
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "RST,Reset all status and counter values." "0,1"
newline
bitfld.long 0x0 0. "EN,Performance Monitor Enable" "0: Stop to count,1: Start to count"
rgroup.long 0xDC1590++0xB
line.long 0x0 "IMPFMTOTAL__VC0,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x0 0.--23. 1. "TOTAL,The total number of translation requests"
line.long 0x4 "IMPFMHIT__VC0,"
hexmask.long.byte 0x4 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x4 0.--23. 1. "HIT,The total number of TLB hit requests"
line.long 0x8 "IMPFMMISS__VC0,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x8 0.--23. 1. "MISS,The total number of miss requests"
group.long 0xDC2200++0x3
line.long 0x0 "IMPCTR__VC0,This register controls the behavior of the PMB function."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "TTSEL,Translation Table Select"
newline
bitfld.long 0x0 3. "TTEN,TLB Translation Enable" "0: Output PPN as a physical address,1: Output PPN as an intermediate physical address.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurred"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "PMBEN,PMB Enable" "0: PMB disabled,1: PMB enabled"
group.long 0xDC2208++0x3
line.long 0x0 "IMPSTR__VC0,This register indicates the error status of the address translation by PMB."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "MHIT,Multiple hit" "0,1"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "TF,Translation Fault" "0,1"
rgroup.long 0xDC220C++0x3
line.long 0x0 "IMPEAR__VC0,This register indicates the address which an address translation error occurred."
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0xDC2280++0x7F
line.long 0x0 "IMPMBA0__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x0 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
line.long 0x4 "IMPMBA1__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x4 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x4 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
line.long 0x8 "IMPMBA2__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x8 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x8 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x8 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x8 0.--7. 1. "Reserved_0,Reserved"
line.long 0xC "IMPMBA3__VC0,Note: n= 0 to 15"
hexmask.long.byte 0xC 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0xC 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0xC 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0xC 0.--7. 1. "Reserved_0,Reserved"
line.long 0x10 "IMPMBA4__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x10 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x10 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x10 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x10 0.--7. 1. "Reserved_0,Reserved"
line.long 0x14 "IMPMBA5__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x14 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x14 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x14 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x14 0.--7. 1. "Reserved_0,Reserved"
line.long 0x18 "IMPMBA6__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x18 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x18 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x18 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x18 0.--7. 1. "Reserved_0,Reserved"
line.long 0x1C "IMPMBA7__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x1C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x1C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x1C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x1C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x20 "IMPMBA8__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x20 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x20 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x20 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x20 0.--7. 1. "Reserved_0,Reserved"
line.long 0x24 "IMPMBA9__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x24 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x24 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x24 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x24 0.--7. 1. "Reserved_0,Reserved"
line.long 0x28 "IMPMBA10__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x28 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x28 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x28 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x28 0.--7. 1. "Reserved_0,Reserved"
line.long 0x2C "IMPMBA11__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x2C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x2C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x2C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x2C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x30 "IMPMBA12__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x30 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x30 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x30 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x30 0.--7. 1. "Reserved_0,Reserved"
line.long 0x34 "IMPMBA13__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x34 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x34 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x34 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x34 0.--7. 1. "Reserved_0,Reserved"
line.long 0x38 "IMPMBA14__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x38 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x38 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x38 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x38 0.--7. 1. "Reserved_0,Reserved"
line.long 0x3C "IMPMBA15__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x3C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x3C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x3C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x3C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x40 "IMPMBD0__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x40 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x40 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x40 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x40 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x40 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x40 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x40 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x40 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x40 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x44 "IMPMBD1__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x44 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x44 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x44 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x44 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x44 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x44 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x44 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x44 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x44 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x48 "IMPMBD2__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x48 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x48 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x48 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x48 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x48 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x48 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x48 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x48 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x48 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4C "IMPMBD3__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x4C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x4C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x4C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x4C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x4C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x4C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x4C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x4C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x50 "IMPMBD4__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x50 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x50 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x50 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x50 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x50 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x50 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x50 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x50 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x50 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x54 "IMPMBD5__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x54 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x54 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x54 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x54 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x54 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x54 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x54 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x54 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x54 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x58 "IMPMBD6__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x58 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x58 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x58 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x58 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x58 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x58 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x58 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x58 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x58 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x5C "IMPMBD7__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x5C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x5C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x5C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x5C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x5C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x5C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x5C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x5C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x5C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x60 "IMPMBD8__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x60 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x60 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x60 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x60 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x60 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x60 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x60 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x60 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x60 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x64 "IMPMBD9__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x64 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x64 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x64 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x64 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x64 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x64 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x64 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x64 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x64 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x68 "IMPMBD10__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x68 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x68 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x68 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x68 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x68 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x68 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x68 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x68 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x68 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x6C "IMPMBD11__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x6C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x6C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x6C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x6C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x6C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x6C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x6C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x6C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x6C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x70 "IMPMBD12__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x70 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x70 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x70 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x70 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x70 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x70 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x70 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x70 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x70 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x74 "IMPMBD13__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x74 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x74 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x74 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x74 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x74 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x74 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x74 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x74 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x74 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x78 "IMPMBD14__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x78 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x78 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x78 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x78 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x78 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x78 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x78 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x78 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x78 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x7C "IMPMBD15__VC0,Note: n= 0 to 15"
hexmask.long.byte 0x7C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x7C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x7C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x7C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x7C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x7C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x7C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x7C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x7C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
group.long 0xDC3300++0x3
line.long 0x0 "IMUCTR0__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3308++0x3
line.long 0x0 "IMUASID0__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3310++0x3
line.long 0x0 "IMUCTR1__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3318++0x3
line.long 0x0 "IMUASID1__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3320++0x3
line.long 0x0 "IMUCTR2__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3328++0x3
line.long 0x0 "IMUASID2__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3330++0x3
line.long 0x0 "IMUCTR3__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3338++0x3
line.long 0x0 "IMUASID3__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3340++0x3
line.long 0x0 "IMUCTR4__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3348++0x3
line.long 0x0 "IMUASID4__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3350++0x3
line.long 0x0 "IMUCTR5__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3358++0x3
line.long 0x0 "IMUASID5__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3360++0x3
line.long 0x0 "IMUCTR6__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3368++0x3
line.long 0x0 "IMUASID6__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3370++0x3
line.long 0x0 "IMUCTR7__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3378++0x3
line.long 0x0 "IMUASID7__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3380++0x3
line.long 0x0 "IMUCTR8__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3388++0x3
line.long 0x0 "IMUASID8__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3390++0x3
line.long 0x0 "IMUCTR9__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3398++0x3
line.long 0x0 "IMUASID9__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC33A0++0x3
line.long 0x0 "IMUCTR10__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC33A8++0x3
line.long 0x0 "IMUASID10__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC33B0++0x3
line.long 0x0 "IMUCTR11__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC33B8++0x3
line.long 0x0 "IMUASID11__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC33C0++0x3
line.long 0x0 "IMUCTR12__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC33C8++0x3
line.long 0x0 "IMUASID12__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC33D0++0x3
line.long 0x0 "IMUCTR13__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC33D8++0x3
line.long 0x0 "IMUASID13__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC33E0++0x3
line.long 0x0 "IMUCTR14__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC33E8++0x3
line.long 0x0 "IMUASID14__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC33F0++0x3
line.long 0x0 "IMUCTR15__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC33F8++0x3
line.long 0x0 "IMUASID15__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3400++0x3
line.long 0x0 "IMUCTR16__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3408++0x3
line.long 0x0 "IMUASID16__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3410++0x3
line.long 0x0 "IMUCTR17__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3418++0x3
line.long 0x0 "IMUASID17__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3420++0x3
line.long 0x0 "IMUCTR18__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3428++0x3
line.long 0x0 "IMUASID18__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3430++0x3
line.long 0x0 "IMUCTR19__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3438++0x3
line.long 0x0 "IMUASID19__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3440++0x3
line.long 0x0 "IMUCTR20__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3448++0x3
line.long 0x0 "IMUASID20__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3450++0x3
line.long 0x0 "IMUCTR21__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3458++0x3
line.long 0x0 "IMUASID21__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3460++0x3
line.long 0x0 "IMUCTR22__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3468++0x3
line.long 0x0 "IMUASID22__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3470++0x3
line.long 0x0 "IMUCTR23__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3478++0x3
line.long 0x0 "IMUASID23__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3480++0x3
line.long 0x0 "IMUCTR24__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3488++0x3
line.long 0x0 "IMUASID24__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3490++0x3
line.long 0x0 "IMUCTR25__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3498++0x3
line.long 0x0 "IMUASID25__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC34A0++0x3
line.long 0x0 "IMUCTR26__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC34A8++0x3
line.long 0x0 "IMUASID26__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC34B0++0x3
line.long 0x0 "IMUCTR27__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC34B8++0x3
line.long 0x0 "IMUASID27__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC34C0++0x3
line.long 0x0 "IMUCTR28__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC34C8++0x3
line.long 0x0 "IMUASID28__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC34D0++0x3
line.long 0x0 "IMUCTR29__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC34D8++0x3
line.long 0x0 "IMUASID29__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC34E0++0x3
line.long 0x0 "IMUCTR30__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC34E8++0x3
line.long 0x0 "IMUASID30__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC34F0++0x3
line.long 0x0 "IMUCTR31__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC34F8++0x3
line.long 0x0 "IMUASID31__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3600++0x3
line.long 0x0 "IMUCTR32__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3608++0x3
line.long 0x0 "IMUASID32__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3610++0x3
line.long 0x0 "IMUCTR33__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3618++0x3
line.long 0x0 "IMUASID33__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3620++0x3
line.long 0x0 "IMUCTR34__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3628++0x3
line.long 0x0 "IMUASID34__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3630++0x3
line.long 0x0 "IMUCTR35__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3638++0x3
line.long 0x0 "IMUASID35__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3640++0x3
line.long 0x0 "IMUCTR36__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3648++0x3
line.long 0x0 "IMUASID36__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3650++0x3
line.long 0x0 "IMUCTR37__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3658++0x3
line.long 0x0 "IMUASID37__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3660++0x3
line.long 0x0 "IMUCTR38__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3668++0x3
line.long 0x0 "IMUASID38__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3670++0x3
line.long 0x0 "IMUCTR39__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3678++0x3
line.long 0x0 "IMUASID39__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3680++0x3
line.long 0x0 "IMUCTR40__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3688++0x3
line.long 0x0 "IMUASID40__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3690++0x3
line.long 0x0 "IMUCTR41__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3698++0x3
line.long 0x0 "IMUASID41__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC36A0++0x3
line.long 0x0 "IMUCTR42__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC36A8++0x3
line.long 0x0 "IMUASID42__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC36B0++0x3
line.long 0x0 "IMUCTR43__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC36B8++0x3
line.long 0x0 "IMUASID43__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC36C0++0x3
line.long 0x0 "IMUCTR44__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC36C8++0x3
line.long 0x0 "IMUASID44__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC36D0++0x3
line.long 0x0 "IMUCTR45__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC36D8++0x3
line.long 0x0 "IMUASID45__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC36E0++0x3
line.long 0x0 "IMUCTR46__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC36E8++0x3
line.long 0x0 "IMUASID46__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC36F0++0x3
line.long 0x0 "IMUCTR47__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC36F8++0x3
line.long 0x0 "IMUASID47__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3700++0x3
line.long 0x0 "IMUCTR48__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3708++0x3
line.long 0x0 "IMUASID48__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3710++0x3
line.long 0x0 "IMUCTR49__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3718++0x3
line.long 0x0 "IMUASID49__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3720++0x3
line.long 0x0 "IMUCTR50__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3728++0x3
line.long 0x0 "IMUASID50__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3730++0x3
line.long 0x0 "IMUCTR51__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3738++0x3
line.long 0x0 "IMUASID51__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3740++0x3
line.long 0x0 "IMUCTR52__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3748++0x3
line.long 0x0 "IMUASID52__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3750++0x3
line.long 0x0 "IMUCTR53__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3758++0x3
line.long 0x0 "IMUASID53__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3760++0x3
line.long 0x0 "IMUCTR54__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3768++0x3
line.long 0x0 "IMUASID54__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3770++0x3
line.long 0x0 "IMUCTR55__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3778++0x3
line.long 0x0 "IMUASID55__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3780++0x3
line.long 0x0 "IMUCTR56__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3788++0x3
line.long 0x0 "IMUASID56__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC3790++0x3
line.long 0x0 "IMUCTR57__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC3798++0x3
line.long 0x0 "IMUASID57__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC37A0++0x3
line.long 0x0 "IMUCTR58__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC37A8++0x3
line.long 0x0 "IMUASID58__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC37B0++0x3
line.long 0x0 "IMUCTR59__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC37B8++0x3
line.long 0x0 "IMUASID59__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC37C0++0x3
line.long 0x0 "IMUCTR60__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC37C8++0x3
line.long 0x0 "IMUASID60__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC37D0++0x3
line.long 0x0 "IMUCTR61__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC37D8++0x3
line.long 0x0 "IMUASID61__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC37E0++0x3
line.long 0x0 "IMUCTR62__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC37E8++0x3
line.long 0x0 "IMUASID62__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDC37F0++0x3
line.long 0x0 "IMUCTR63__VC0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xDC37F8++0x3
line.long 0x0 "IMUASID63__VC0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xDD0000++0x3
line.long 0x0 "IMCTR0__VC0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xDD0040++0x3
line.long 0x0 "IMSEC__VC0,This register controls the attribute of secure/non-secure for MMU. This register can be accessed by the master which operates on secure-mode only. When non-secure master accesses to this regiser. write access is ignored."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "SEC,SEC[n]=0 : IMCTRn~IMERIDn is Non-secure"
group.long 0xDD1040++0x3
line.long 0x0 "IMCTR1__VC0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xDD2080++0x3
line.long 0x0 "IMCTR2__VC0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xDD30C0++0x3
line.long 0x0 "IMCTR3__VC0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xDD4100++0x3
line.long 0x0 "IMCTR4__VC0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xDD5140++0x3
line.long 0x0 "IMCTR5__VC0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xDD6180++0x3
line.long 0x0 "IMCTR6__VC0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xDD71C0++0x3
line.long 0x0 "IMCTR7__VC0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xDD8800++0x3
line.long 0x0 "IMCTR8__VC0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xDD9840++0x3
line.long 0x0 "IMCTR9__VC0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xDDA880++0x3
line.long 0x0 "IMCTR10__VC0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xDDB8C0++0x3
line.long 0x0 "IMCTR11__VC0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xDDC900++0x3
line.long 0x0 "IMCTR12__VC0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xDDD940++0x3
line.long 0x0 "IMCTR13__VC0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xDDE980++0x3
line.long 0x0 "IMCTR14__VC0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xDDF9C0++0x3
line.long 0x0 "IMCTR15__VC0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE00548++0x7
line.long 0x0 "IMERRSIDAR__3DG,This register indicates the Error SrcID when EDC error happen in AXI AR channel."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x4 "IMERRSIDR__3DG,This register indicates the Error SrcID when EDC error happen in AXI R channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0xE00558++0x3
line.long 0x0 "IMERRSIDNPTWAR__3DG,This register indicates the Error SrcID when EDC error happen in AXI AR channel with no Page Table Walk."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0xE00560++0x1B
line.long 0x0 "IMAPQOS__3DG,This resister controls QoS value that is output from IPMMU(cache) to IPMMU(main) through ARADDR[35:32]."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "APQOS,Append QoS"
line.long 0x4 "IMERRSIDRRESP__3DG,This register indicates the Error SrcID when EDC error happen in AXI R(response) channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x8 "IMERRSIDPA__3DG,This register indicates the Error SrcID when EDC error happen in APB address channel."
bitfld.long 0x8 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x8 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x8 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0xC "IMERRSIDPWD__3DG,This register indicates the Error SrcID when EDC error happen in APB write data channel."
bitfld.long 0xC 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0xC 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x10 "IMRGID__3DG,Region-ID setting will be available for each IPMMU-hier (each bus hierarchy). This will be used for all PTW transactions originating in this bus hierarchy."
hexmask.long 0x10 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x10 0.--3. 1. "RGID,Region-ID"
line.long 0x14 "IMRGIDEN__3DG,This register is used for setting to protect IMRGID register."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x14 0.--15. 1. "RGIDEN,When RGIDEN[PUSER[5:2]]=1  IMRGID[3:0] register can be accessed."
line.long 0x18 "IMSECGRP__3DG,This register is used for setting to protect IMRGID register."
hexmask.long 0x18 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x18 0. "SECGRP,When PUSER[1]=0 " "0,1"
group.long 0xE01500++0x3
line.long 0x0 "IMSCTLR__3DG,This register controls the behavior of IPMMU function."
bitfld.long 0x0 31. "DISWPROT,Read and Write protection of MMU System Control Register and MMU auxiliary Control register" "0: can write IMSCTLR,1: can write/read IMSCTLR"
newline
bitfld.long 0x0 30. "NSACCEN,Non-secure access enable for MMU System Control Register and MMU auxiliary Control register" "0: disable non-secure access,1: enable non-secure access"
newline
bitfld.long 0x0 29. "DISMMU,Disable IPMMU cache" "0: enable IPMMU cache,1: disable IPMMU cache"
newline
bitfld.long 0x0 28. "USE_SECGRP,Use security group to judge Secure/Non-secure access" "0,1"
newline
hexmask.long 0x0 0.--27. 1. "Reserved_0,Reserved"
group.long 0xE01554++0x3
line.long 0x0 "ISERRINJR__3DG,IPMMU cache"
hexmask.long 0x0 7.--31. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 6. "ERRINJ_EDCERR_PWD,Error injection bit for EDC error in APB write datta channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 5. "ERRINJ_EDCERR_PA,Error injection bit for EDC error in APB address channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 4. "ERRINJ_EDCERR_RRESP,Error injection bit for EDC error in AXI R response channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 3. "ERRINJ_EDCERR_NPTW_AR,Error injection bit for EDC error in AXI AR channel (during not Page Table Walk)." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 2. "ERRINJ_COMPFAIL,Error injection bit for DCLS error." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 1. "ERRINJ_EDCERR_R,Error injection bit for EDC error in AXI R channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 0. "ERRINJ_EDCERR_AR,Error injection bit for EDC error in AXI AR channel." "0: Clear error injection,1: Enable error injection"
group.long 0xE01580++0x3
line.long 0x0 "IMPFMCTR__3DG,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "MD,Monitor Mode" "0: Monitor all MMUs,1: Reserved,?,?"
newline
hexmask.long.byte 0x0 8.--11. 1. "SEL,When MD is B'11  SEL indicates the MMU table number to be monitored."
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "RST,Reset all status and counter values." "0,1"
newline
bitfld.long 0x0 0. "EN,Performance Monitor Enable" "0: Stop to count,1: Start to count"
rgroup.long 0xE01590++0xB
line.long 0x0 "IMPFMTOTAL__3DG,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x0 0.--23. 1. "TOTAL,The total number of translation requests"
line.long 0x4 "IMPFMHIT__3DG,"
hexmask.long.byte 0x4 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x4 0.--23. 1. "HIT,The total number of TLB hit requests"
line.long 0x8 "IMPFMMISS__3DG,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x8 0.--23. 1. "MISS,The total number of miss requests"
group.long 0xE02200++0x3
line.long 0x0 "IMPCTR__3DG,This register controls the behavior of the PMB function."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "TTSEL,Translation Table Select"
newline
bitfld.long 0x0 3. "TTEN,TLB Translation Enable" "0: Output PPN as a physical address,1: Output PPN as an intermediate physical address.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurred"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "PMBEN,PMB Enable" "0: PMB disabled,1: PMB enabled"
group.long 0xE02208++0x3
line.long 0x0 "IMPSTR__3DG,This register indicates the error status of the address translation by PMB."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "MHIT,Multiple hit" "0,1"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "TF,Translation Fault" "0,1"
rgroup.long 0xE0220C++0x3
line.long 0x0 "IMPEAR__3DG,This register indicates the address which an address translation error occurred."
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0xE02280++0x7F
line.long 0x0 "IMPMBA0__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x0 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
line.long 0x4 "IMPMBA1__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x4 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x4 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
line.long 0x8 "IMPMBA2__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x8 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x8 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x8 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x8 0.--7. 1. "Reserved_0,Reserved"
line.long 0xC "IMPMBA3__3DG,Note: n= 0 to 15"
hexmask.long.byte 0xC 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0xC 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0xC 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0xC 0.--7. 1. "Reserved_0,Reserved"
line.long 0x10 "IMPMBA4__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x10 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x10 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x10 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x10 0.--7. 1. "Reserved_0,Reserved"
line.long 0x14 "IMPMBA5__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x14 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x14 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x14 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x14 0.--7. 1. "Reserved_0,Reserved"
line.long 0x18 "IMPMBA6__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x18 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x18 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x18 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x18 0.--7. 1. "Reserved_0,Reserved"
line.long 0x1C "IMPMBA7__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x1C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x1C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x1C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x1C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x20 "IMPMBA8__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x20 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x20 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x20 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x20 0.--7. 1. "Reserved_0,Reserved"
line.long 0x24 "IMPMBA9__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x24 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x24 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x24 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x24 0.--7. 1. "Reserved_0,Reserved"
line.long 0x28 "IMPMBA10__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x28 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x28 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x28 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x28 0.--7. 1. "Reserved_0,Reserved"
line.long 0x2C "IMPMBA11__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x2C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x2C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x2C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x2C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x30 "IMPMBA12__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x30 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x30 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x30 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x30 0.--7. 1. "Reserved_0,Reserved"
line.long 0x34 "IMPMBA13__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x34 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x34 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x34 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x34 0.--7. 1. "Reserved_0,Reserved"
line.long 0x38 "IMPMBA14__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x38 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x38 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x38 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x38 0.--7. 1. "Reserved_0,Reserved"
line.long 0x3C "IMPMBA15__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x3C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x3C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x3C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x3C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x40 "IMPMBD0__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x40 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x40 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x40 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x40 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x40 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x40 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x40 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x40 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x40 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x44 "IMPMBD1__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x44 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x44 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x44 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x44 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x44 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x44 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x44 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x44 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x44 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x48 "IMPMBD2__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x48 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x48 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x48 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x48 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x48 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x48 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x48 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x48 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x48 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4C "IMPMBD3__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x4C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x4C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x4C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x4C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x4C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x4C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x4C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x4C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x50 "IMPMBD4__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x50 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x50 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x50 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x50 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x50 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x50 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x50 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x50 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x50 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x54 "IMPMBD5__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x54 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x54 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x54 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x54 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x54 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x54 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x54 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x54 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x54 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x58 "IMPMBD6__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x58 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x58 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x58 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x58 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x58 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x58 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x58 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x58 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x58 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x5C "IMPMBD7__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x5C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x5C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x5C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x5C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x5C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x5C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x5C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x5C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x5C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x60 "IMPMBD8__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x60 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x60 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x60 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x60 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x60 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x60 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x60 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x60 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x60 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x64 "IMPMBD9__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x64 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x64 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x64 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x64 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x64 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x64 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x64 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x64 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x64 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x68 "IMPMBD10__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x68 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x68 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x68 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x68 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x68 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x68 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x68 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x68 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x68 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x6C "IMPMBD11__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x6C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x6C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x6C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x6C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x6C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x6C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x6C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x6C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x6C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x70 "IMPMBD12__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x70 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x70 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x70 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x70 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x70 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x70 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x70 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x70 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x70 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x74 "IMPMBD13__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x74 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x74 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x74 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x74 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x74 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x74 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x74 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x74 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x74 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x78 "IMPMBD14__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x78 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x78 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x78 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x78 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x78 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x78 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x78 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x78 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x78 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x7C "IMPMBD15__3DG,Note: n= 0 to 15"
hexmask.long.byte 0x7C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x7C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x7C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x7C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x7C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x7C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x7C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x7C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x7C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
group.long 0xE03300++0x3
line.long 0x0 "IMUCTR0__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03308++0x3
line.long 0x0 "IMUASID0__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03310++0x3
line.long 0x0 "IMUCTR1__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03318++0x3
line.long 0x0 "IMUASID1__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03320++0x3
line.long 0x0 "IMUCTR2__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03328++0x3
line.long 0x0 "IMUASID2__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03330++0x3
line.long 0x0 "IMUCTR3__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03338++0x3
line.long 0x0 "IMUASID3__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03340++0x3
line.long 0x0 "IMUCTR4__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03348++0x3
line.long 0x0 "IMUASID4__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03350++0x3
line.long 0x0 "IMUCTR5__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03358++0x3
line.long 0x0 "IMUASID5__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03360++0x3
line.long 0x0 "IMUCTR6__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03368++0x3
line.long 0x0 "IMUASID6__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03370++0x3
line.long 0x0 "IMUCTR7__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03378++0x3
line.long 0x0 "IMUASID7__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03380++0x3
line.long 0x0 "IMUCTR8__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03388++0x3
line.long 0x0 "IMUASID8__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03390++0x3
line.long 0x0 "IMUCTR9__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03398++0x3
line.long 0x0 "IMUASID9__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE033A0++0x3
line.long 0x0 "IMUCTR10__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE033A8++0x3
line.long 0x0 "IMUASID10__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE033B0++0x3
line.long 0x0 "IMUCTR11__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE033B8++0x3
line.long 0x0 "IMUASID11__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE033C0++0x3
line.long 0x0 "IMUCTR12__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE033C8++0x3
line.long 0x0 "IMUASID12__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE033D0++0x3
line.long 0x0 "IMUCTR13__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE033D8++0x3
line.long 0x0 "IMUASID13__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE033E0++0x3
line.long 0x0 "IMUCTR14__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE033E8++0x3
line.long 0x0 "IMUASID14__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE033F0++0x3
line.long 0x0 "IMUCTR15__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE033F8++0x3
line.long 0x0 "IMUASID15__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03400++0x3
line.long 0x0 "IMUCTR16__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03408++0x3
line.long 0x0 "IMUASID16__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03410++0x3
line.long 0x0 "IMUCTR17__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03418++0x3
line.long 0x0 "IMUASID17__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03420++0x3
line.long 0x0 "IMUCTR18__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03428++0x3
line.long 0x0 "IMUASID18__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03430++0x3
line.long 0x0 "IMUCTR19__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03438++0x3
line.long 0x0 "IMUASID19__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03440++0x3
line.long 0x0 "IMUCTR20__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03448++0x3
line.long 0x0 "IMUASID20__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03450++0x3
line.long 0x0 "IMUCTR21__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03458++0x3
line.long 0x0 "IMUASID21__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03460++0x3
line.long 0x0 "IMUCTR22__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03468++0x3
line.long 0x0 "IMUASID22__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03470++0x3
line.long 0x0 "IMUCTR23__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03478++0x3
line.long 0x0 "IMUASID23__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03480++0x3
line.long 0x0 "IMUCTR24__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03488++0x3
line.long 0x0 "IMUASID24__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03490++0x3
line.long 0x0 "IMUCTR25__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03498++0x3
line.long 0x0 "IMUASID25__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE034A0++0x3
line.long 0x0 "IMUCTR26__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE034A8++0x3
line.long 0x0 "IMUASID26__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE034B0++0x3
line.long 0x0 "IMUCTR27__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE034B8++0x3
line.long 0x0 "IMUASID27__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE034C0++0x3
line.long 0x0 "IMUCTR28__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE034C8++0x3
line.long 0x0 "IMUASID28__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE034D0++0x3
line.long 0x0 "IMUCTR29__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE034D8++0x3
line.long 0x0 "IMUASID29__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE034E0++0x3
line.long 0x0 "IMUCTR30__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE034E8++0x3
line.long 0x0 "IMUASID30__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE034F0++0x3
line.long 0x0 "IMUCTR31__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE034F8++0x3
line.long 0x0 "IMUASID31__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03600++0x3
line.long 0x0 "IMUCTR32__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03608++0x3
line.long 0x0 "IMUASID32__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03610++0x3
line.long 0x0 "IMUCTR33__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03618++0x3
line.long 0x0 "IMUASID33__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03620++0x3
line.long 0x0 "IMUCTR34__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03628++0x3
line.long 0x0 "IMUASID34__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03630++0x3
line.long 0x0 "IMUCTR35__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03638++0x3
line.long 0x0 "IMUASID35__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03640++0x3
line.long 0x0 "IMUCTR36__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03648++0x3
line.long 0x0 "IMUASID36__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03650++0x3
line.long 0x0 "IMUCTR37__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03658++0x3
line.long 0x0 "IMUASID37__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03660++0x3
line.long 0x0 "IMUCTR38__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03668++0x3
line.long 0x0 "IMUASID38__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03670++0x3
line.long 0x0 "IMUCTR39__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03678++0x3
line.long 0x0 "IMUASID39__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03680++0x3
line.long 0x0 "IMUCTR40__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03688++0x3
line.long 0x0 "IMUASID40__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03690++0x3
line.long 0x0 "IMUCTR41__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03698++0x3
line.long 0x0 "IMUASID41__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE036A0++0x3
line.long 0x0 "IMUCTR42__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE036A8++0x3
line.long 0x0 "IMUASID42__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE036B0++0x3
line.long 0x0 "IMUCTR43__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE036B8++0x3
line.long 0x0 "IMUASID43__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE036C0++0x3
line.long 0x0 "IMUCTR44__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE036C8++0x3
line.long 0x0 "IMUASID44__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE036D0++0x3
line.long 0x0 "IMUCTR45__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE036D8++0x3
line.long 0x0 "IMUASID45__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE036E0++0x3
line.long 0x0 "IMUCTR46__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE036E8++0x3
line.long 0x0 "IMUASID46__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE036F0++0x3
line.long 0x0 "IMUCTR47__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE036F8++0x3
line.long 0x0 "IMUASID47__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03700++0x3
line.long 0x0 "IMUCTR48__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03708++0x3
line.long 0x0 "IMUASID48__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03710++0x3
line.long 0x0 "IMUCTR49__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03718++0x3
line.long 0x0 "IMUASID49__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03720++0x3
line.long 0x0 "IMUCTR50__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03728++0x3
line.long 0x0 "IMUASID50__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03730++0x3
line.long 0x0 "IMUCTR51__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03738++0x3
line.long 0x0 "IMUASID51__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03740++0x3
line.long 0x0 "IMUCTR52__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03748++0x3
line.long 0x0 "IMUASID52__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03750++0x3
line.long 0x0 "IMUCTR53__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03758++0x3
line.long 0x0 "IMUASID53__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03760++0x3
line.long 0x0 "IMUCTR54__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03768++0x3
line.long 0x0 "IMUASID54__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03770++0x3
line.long 0x0 "IMUCTR55__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03778++0x3
line.long 0x0 "IMUASID55__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03780++0x3
line.long 0x0 "IMUCTR56__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03788++0x3
line.long 0x0 "IMUASID56__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE03790++0x3
line.long 0x0 "IMUCTR57__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE03798++0x3
line.long 0x0 "IMUASID57__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE037A0++0x3
line.long 0x0 "IMUCTR58__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE037A8++0x3
line.long 0x0 "IMUASID58__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE037B0++0x3
line.long 0x0 "IMUCTR59__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE037B8++0x3
line.long 0x0 "IMUASID59__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE037C0++0x3
line.long 0x0 "IMUCTR60__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE037C8++0x3
line.long 0x0 "IMUASID60__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE037D0++0x3
line.long 0x0 "IMUCTR61__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE037D8++0x3
line.long 0x0 "IMUASID61__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE037E0++0x3
line.long 0x0 "IMUCTR62__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE037E8++0x3
line.long 0x0 "IMUASID62__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE037F0++0x3
line.long 0x0 "IMUCTR63__3DG,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE037F8++0x3
line.long 0x0 "IMUASID63__3DG,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE10000++0x3
line.long 0x0 "IMCTR0__3DG,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE10040++0x3
line.long 0x0 "IMSEC__3DG,This register controls the attribute of secure/non-secure for MMU. This register can be accessed by the master which operates on secure-mode only. When non-secure master accesses to this regiser. write access is ignored."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "SEC,SEC[n]=0 : IMCTRn~IMERIDn is Non-secure"
group.long 0xE11040++0x3
line.long 0x0 "IMCTR1__3DG,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE12080++0x3
line.long 0x0 "IMCTR2__3DG,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE130C0++0x3
line.long 0x0 "IMCTR3__3DG,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE14100++0x3
line.long 0x0 "IMCTR4__3DG,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE15140++0x3
line.long 0x0 "IMCTR5__3DG,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE16180++0x3
line.long 0x0 "IMCTR6__3DG,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE171C0++0x3
line.long 0x0 "IMCTR7__3DG,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE18800++0x3
line.long 0x0 "IMCTR8__3DG,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE19840++0x3
line.long 0x0 "IMCTR9__3DG,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE1A880++0x3
line.long 0x0 "IMCTR10__3DG,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE1B8C0++0x3
line.long 0x0 "IMCTR11__3DG,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE1C900++0x3
line.long 0x0 "IMCTR12__3DG,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE1D940++0x3
line.long 0x0 "IMCTR13__3DG,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE1E980++0x3
line.long 0x0 "IMCTR14__3DG,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE1F9C0++0x3
line.long 0x0 "IMCTR15__3DG,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE80548++0x7
line.long 0x0 "IMERRSIDAR__VI0,This register indicates the Error SrcID when EDC error happen in AXI AR channel."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x4 "IMERRSIDR__VI0,This register indicates the Error SrcID when EDC error happen in AXI R channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0xE80558++0x3
line.long 0x0 "IMERRSIDNPTWAR__VI0,This register indicates the Error SrcID when EDC error happen in AXI AR channel with no Page Table Walk."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0xE80560++0x1B
line.long 0x0 "IMAPQOS__VI0,This resister controls QoS value that is output from IPMMU(cache) to IPMMU(main) through ARADDR[35:32]."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "APQOS,Append QoS"
line.long 0x4 "IMERRSIDRRESP__VI0,This register indicates the Error SrcID when EDC error happen in AXI R(response) channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x8 "IMERRSIDPA__VI0,This register indicates the Error SrcID when EDC error happen in APB address channel."
bitfld.long 0x8 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x8 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x8 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0xC "IMERRSIDPWD__VI0,This register indicates the Error SrcID when EDC error happen in APB write data channel."
bitfld.long 0xC 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0xC 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x10 "IMRGID__VI0,Region-ID setting will be available for each IPMMU-hier (each bus hierarchy). This will be used for all PTW transactions originating in this bus hierarchy."
hexmask.long 0x10 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x10 0.--3. 1. "RGID,Region-ID"
line.long 0x14 "IMRGIDEN__VI0,This register is used for setting to protect IMRGID register."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x14 0.--15. 1. "RGIDEN,When RGIDEN[PUSER[5:2]]=1  IMRGID[3:0] register can be accessed."
line.long 0x18 "IMSECGRP__VI0,This register is used for setting to protect IMRGID register."
hexmask.long 0x18 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x18 0. "SECGRP,When PUSER[1]=0 " "0,1"
group.long 0xE81500++0x3
line.long 0x0 "IMSCTLR__VI0,This register controls the behavior of IPMMU function."
bitfld.long 0x0 31. "DISWPROT,Read and Write protection of MMU System Control Register and MMU auxiliary Control register" "0: can write IMSCTLR,1: can write/read IMSCTLR"
newline
bitfld.long 0x0 30. "NSACCEN,Non-secure access enable for MMU System Control Register and MMU auxiliary Control register" "0: disable non-secure access,1: enable non-secure access"
newline
bitfld.long 0x0 29. "DISMMU,Disable IPMMU cache" "0: enable IPMMU cache,1: disable IPMMU cache"
newline
bitfld.long 0x0 28. "USE_SECGRP,Use security group to judge Secure/Non-secure access" "0,1"
newline
hexmask.long 0x0 0.--27. 1. "Reserved_0,Reserved"
group.long 0xE81554++0x3
line.long 0x0 "ISERRINJR__VI0,IPMMU cache"
hexmask.long 0x0 7.--31. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 6. "ERRINJ_EDCERR_PWD,Error injection bit for EDC error in APB write datta channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 5. "ERRINJ_EDCERR_PA,Error injection bit for EDC error in APB address channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 4. "ERRINJ_EDCERR_RRESP,Error injection bit for EDC error in AXI R response channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 3. "ERRINJ_EDCERR_NPTW_AR,Error injection bit for EDC error in AXI AR channel (during not Page Table Walk)." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 2. "ERRINJ_COMPFAIL,Error injection bit for DCLS error." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 1. "ERRINJ_EDCERR_R,Error injection bit for EDC error in AXI R channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 0. "ERRINJ_EDCERR_AR,Error injection bit for EDC error in AXI AR channel." "0: Clear error injection,1: Enable error injection"
group.long 0xE81580++0x3
line.long 0x0 "IMPFMCTR__VI0,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "MD,Monitor Mode" "0: Monitor all MMUs,1: Reserved,?,?"
newline
hexmask.long.byte 0x0 8.--11. 1. "SEL,When MD is B'11  SEL indicates the MMU table number to be monitored."
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "RST,Reset all status and counter values." "0,1"
newline
bitfld.long 0x0 0. "EN,Performance Monitor Enable" "0: Stop to count,1: Start to count"
rgroup.long 0xE81590++0xB
line.long 0x0 "IMPFMTOTAL__VI0,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x0 0.--23. 1. "TOTAL,The total number of translation requests"
line.long 0x4 "IMPFMHIT__VI0,"
hexmask.long.byte 0x4 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x4 0.--23. 1. "HIT,The total number of TLB hit requests"
line.long 0x8 "IMPFMMISS__VI0,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x8 0.--23. 1. "MISS,The total number of miss requests"
group.long 0xE82200++0x3
line.long 0x0 "IMPCTR__VI0,This register controls the behavior of the PMB function."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "TTSEL,Translation Table Select"
newline
bitfld.long 0x0 3. "TTEN,TLB Translation Enable" "0: Output PPN as a physical address,1: Output PPN as an intermediate physical address.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurred"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "PMBEN,PMB Enable" "0: PMB disabled,1: PMB enabled"
group.long 0xE82208++0x3
line.long 0x0 "IMPSTR__VI0,This register indicates the error status of the address translation by PMB."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "MHIT,Multiple hit" "0,1"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "TF,Translation Fault" "0,1"
rgroup.long 0xE8220C++0x3
line.long 0x0 "IMPEAR__VI0,This register indicates the address which an address translation error occurred."
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0xE82280++0x7F
line.long 0x0 "IMPMBA0__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x0 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
line.long 0x4 "IMPMBA1__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x4 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x4 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
line.long 0x8 "IMPMBA2__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x8 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x8 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x8 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x8 0.--7. 1. "Reserved_0,Reserved"
line.long 0xC "IMPMBA3__VI0,Note: n= 0 to 15"
hexmask.long.byte 0xC 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0xC 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0xC 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0xC 0.--7. 1. "Reserved_0,Reserved"
line.long 0x10 "IMPMBA4__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x10 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x10 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x10 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x10 0.--7. 1. "Reserved_0,Reserved"
line.long 0x14 "IMPMBA5__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x14 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x14 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x14 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x14 0.--7. 1. "Reserved_0,Reserved"
line.long 0x18 "IMPMBA6__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x18 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x18 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x18 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x18 0.--7. 1. "Reserved_0,Reserved"
line.long 0x1C "IMPMBA7__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x1C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x1C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x1C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x1C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x20 "IMPMBA8__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x20 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x20 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x20 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x20 0.--7. 1. "Reserved_0,Reserved"
line.long 0x24 "IMPMBA9__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x24 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x24 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x24 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x24 0.--7. 1. "Reserved_0,Reserved"
line.long 0x28 "IMPMBA10__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x28 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x28 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x28 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x28 0.--7. 1. "Reserved_0,Reserved"
line.long 0x2C "IMPMBA11__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x2C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x2C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x2C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x2C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x30 "IMPMBA12__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x30 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x30 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x30 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x30 0.--7. 1. "Reserved_0,Reserved"
line.long 0x34 "IMPMBA13__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x34 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x34 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x34 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x34 0.--7. 1. "Reserved_0,Reserved"
line.long 0x38 "IMPMBA14__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x38 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x38 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x38 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x38 0.--7. 1. "Reserved_0,Reserved"
line.long 0x3C "IMPMBA15__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x3C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x3C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x3C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x3C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x40 "IMPMBD0__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x40 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x40 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x40 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x40 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x40 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x40 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x40 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x40 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x40 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x44 "IMPMBD1__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x44 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x44 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x44 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x44 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x44 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x44 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x44 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x44 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x44 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x48 "IMPMBD2__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x48 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x48 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x48 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x48 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x48 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x48 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x48 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x48 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x48 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4C "IMPMBD3__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x4C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x4C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x4C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x4C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x4C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x4C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x4C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x4C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x50 "IMPMBD4__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x50 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x50 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x50 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x50 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x50 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x50 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x50 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x50 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x50 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x54 "IMPMBD5__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x54 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x54 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x54 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x54 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x54 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x54 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x54 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x54 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x54 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x58 "IMPMBD6__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x58 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x58 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x58 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x58 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x58 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x58 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x58 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x58 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x58 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x5C "IMPMBD7__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x5C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x5C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x5C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x5C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x5C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x5C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x5C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x5C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x5C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x60 "IMPMBD8__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x60 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x60 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x60 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x60 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x60 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x60 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x60 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x60 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x60 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x64 "IMPMBD9__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x64 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x64 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x64 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x64 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x64 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x64 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x64 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x64 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x64 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x68 "IMPMBD10__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x68 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x68 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x68 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x68 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x68 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x68 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x68 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x68 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x68 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x6C "IMPMBD11__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x6C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x6C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x6C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x6C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x6C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x6C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x6C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x6C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x6C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x70 "IMPMBD12__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x70 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x70 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x70 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x70 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x70 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x70 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x70 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x70 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x70 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x74 "IMPMBD13__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x74 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x74 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x74 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x74 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x74 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x74 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x74 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x74 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x74 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x78 "IMPMBD14__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x78 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x78 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x78 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x78 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x78 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x78 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x78 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x78 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x78 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x7C "IMPMBD15__VI0,Note: n= 0 to 15"
hexmask.long.byte 0x7C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x7C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x7C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x7C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x7C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x7C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x7C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x7C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x7C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
group.long 0xE83300++0x3
line.long 0x0 "IMUCTR0__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83308++0x3
line.long 0x0 "IMUASID0__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83310++0x3
line.long 0x0 "IMUCTR1__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83318++0x3
line.long 0x0 "IMUASID1__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83320++0x3
line.long 0x0 "IMUCTR2__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83328++0x3
line.long 0x0 "IMUASID2__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83330++0x3
line.long 0x0 "IMUCTR3__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83338++0x3
line.long 0x0 "IMUASID3__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83340++0x3
line.long 0x0 "IMUCTR4__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83348++0x3
line.long 0x0 "IMUASID4__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83350++0x3
line.long 0x0 "IMUCTR5__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83358++0x3
line.long 0x0 "IMUASID5__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83360++0x3
line.long 0x0 "IMUCTR6__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83368++0x3
line.long 0x0 "IMUASID6__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83370++0x3
line.long 0x0 "IMUCTR7__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83378++0x3
line.long 0x0 "IMUASID7__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83380++0x3
line.long 0x0 "IMUCTR8__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83388++0x3
line.long 0x0 "IMUASID8__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83390++0x3
line.long 0x0 "IMUCTR9__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83398++0x3
line.long 0x0 "IMUASID9__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE833A0++0x3
line.long 0x0 "IMUCTR10__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE833A8++0x3
line.long 0x0 "IMUASID10__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE833B0++0x3
line.long 0x0 "IMUCTR11__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE833B8++0x3
line.long 0x0 "IMUASID11__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE833C0++0x3
line.long 0x0 "IMUCTR12__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE833C8++0x3
line.long 0x0 "IMUASID12__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE833D0++0x3
line.long 0x0 "IMUCTR13__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE833D8++0x3
line.long 0x0 "IMUASID13__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE833E0++0x3
line.long 0x0 "IMUCTR14__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE833E8++0x3
line.long 0x0 "IMUASID14__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE833F0++0x3
line.long 0x0 "IMUCTR15__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE833F8++0x3
line.long 0x0 "IMUASID15__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83400++0x3
line.long 0x0 "IMUCTR16__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83408++0x3
line.long 0x0 "IMUASID16__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83410++0x3
line.long 0x0 "IMUCTR17__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83418++0x3
line.long 0x0 "IMUASID17__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83420++0x3
line.long 0x0 "IMUCTR18__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83428++0x3
line.long 0x0 "IMUASID18__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83430++0x3
line.long 0x0 "IMUCTR19__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83438++0x3
line.long 0x0 "IMUASID19__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83440++0x3
line.long 0x0 "IMUCTR20__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83448++0x3
line.long 0x0 "IMUASID20__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83450++0x3
line.long 0x0 "IMUCTR21__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83458++0x3
line.long 0x0 "IMUASID21__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83460++0x3
line.long 0x0 "IMUCTR22__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83468++0x3
line.long 0x0 "IMUASID22__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83470++0x3
line.long 0x0 "IMUCTR23__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83478++0x3
line.long 0x0 "IMUASID23__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83480++0x3
line.long 0x0 "IMUCTR24__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83488++0x3
line.long 0x0 "IMUASID24__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83490++0x3
line.long 0x0 "IMUCTR25__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83498++0x3
line.long 0x0 "IMUASID25__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE834A0++0x3
line.long 0x0 "IMUCTR26__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE834A8++0x3
line.long 0x0 "IMUASID26__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE834B0++0x3
line.long 0x0 "IMUCTR27__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE834B8++0x3
line.long 0x0 "IMUASID27__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE834C0++0x3
line.long 0x0 "IMUCTR28__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE834C8++0x3
line.long 0x0 "IMUASID28__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE834D0++0x3
line.long 0x0 "IMUCTR29__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE834D8++0x3
line.long 0x0 "IMUASID29__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE834E0++0x3
line.long 0x0 "IMUCTR30__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE834E8++0x3
line.long 0x0 "IMUASID30__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE834F0++0x3
line.long 0x0 "IMUCTR31__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE834F8++0x3
line.long 0x0 "IMUASID31__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83600++0x3
line.long 0x0 "IMUCTR32__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83608++0x3
line.long 0x0 "IMUASID32__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83610++0x3
line.long 0x0 "IMUCTR33__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83618++0x3
line.long 0x0 "IMUASID33__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83620++0x3
line.long 0x0 "IMUCTR34__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83628++0x3
line.long 0x0 "IMUASID34__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83630++0x3
line.long 0x0 "IMUCTR35__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83638++0x3
line.long 0x0 "IMUASID35__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83640++0x3
line.long 0x0 "IMUCTR36__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83648++0x3
line.long 0x0 "IMUASID36__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83650++0x3
line.long 0x0 "IMUCTR37__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83658++0x3
line.long 0x0 "IMUASID37__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83660++0x3
line.long 0x0 "IMUCTR38__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83668++0x3
line.long 0x0 "IMUASID38__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83670++0x3
line.long 0x0 "IMUCTR39__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83678++0x3
line.long 0x0 "IMUASID39__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83680++0x3
line.long 0x0 "IMUCTR40__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83688++0x3
line.long 0x0 "IMUASID40__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83690++0x3
line.long 0x0 "IMUCTR41__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83698++0x3
line.long 0x0 "IMUASID41__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE836A0++0x3
line.long 0x0 "IMUCTR42__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE836A8++0x3
line.long 0x0 "IMUASID42__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE836B0++0x3
line.long 0x0 "IMUCTR43__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE836B8++0x3
line.long 0x0 "IMUASID43__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE836C0++0x3
line.long 0x0 "IMUCTR44__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE836C8++0x3
line.long 0x0 "IMUASID44__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE836D0++0x3
line.long 0x0 "IMUCTR45__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE836D8++0x3
line.long 0x0 "IMUASID45__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE836E0++0x3
line.long 0x0 "IMUCTR46__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE836E8++0x3
line.long 0x0 "IMUASID46__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE836F0++0x3
line.long 0x0 "IMUCTR47__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE836F8++0x3
line.long 0x0 "IMUASID47__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83700++0x3
line.long 0x0 "IMUCTR48__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83708++0x3
line.long 0x0 "IMUASID48__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83710++0x3
line.long 0x0 "IMUCTR49__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83718++0x3
line.long 0x0 "IMUASID49__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83720++0x3
line.long 0x0 "IMUCTR50__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83728++0x3
line.long 0x0 "IMUASID50__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83730++0x3
line.long 0x0 "IMUCTR51__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83738++0x3
line.long 0x0 "IMUASID51__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83740++0x3
line.long 0x0 "IMUCTR52__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83748++0x3
line.long 0x0 "IMUASID52__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83750++0x3
line.long 0x0 "IMUCTR53__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83758++0x3
line.long 0x0 "IMUASID53__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83760++0x3
line.long 0x0 "IMUCTR54__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83768++0x3
line.long 0x0 "IMUASID54__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83770++0x3
line.long 0x0 "IMUCTR55__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83778++0x3
line.long 0x0 "IMUASID55__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83780++0x3
line.long 0x0 "IMUCTR56__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83788++0x3
line.long 0x0 "IMUASID56__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE83790++0x3
line.long 0x0 "IMUCTR57__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE83798++0x3
line.long 0x0 "IMUASID57__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE837A0++0x3
line.long 0x0 "IMUCTR58__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE837A8++0x3
line.long 0x0 "IMUASID58__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE837B0++0x3
line.long 0x0 "IMUCTR59__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE837B8++0x3
line.long 0x0 "IMUASID59__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE837C0++0x3
line.long 0x0 "IMUCTR60__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE837C8++0x3
line.long 0x0 "IMUASID60__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE837D0++0x3
line.long 0x0 "IMUCTR61__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE837D8++0x3
line.long 0x0 "IMUASID61__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE837E0++0x3
line.long 0x0 "IMUCTR62__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE837E8++0x3
line.long 0x0 "IMUASID62__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE837F0++0x3
line.long 0x0 "IMUCTR63__VI0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xE837F8++0x3
line.long 0x0 "IMUASID63__VI0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xE90000++0x3
line.long 0x0 "IMCTR0__VI0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE90040++0x3
line.long 0x0 "IMSEC__VI0,This register controls the attribute of secure/non-secure for MMU. This register can be accessed by the master which operates on secure-mode only. When non-secure master accesses to this regiser. write access is ignored."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "SEC,SEC[n]=0 : IMCTRn~IMERIDn is Non-secure"
group.long 0xE91040++0x3
line.long 0x0 "IMCTR1__VI0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE92080++0x3
line.long 0x0 "IMCTR2__VI0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE930C0++0x3
line.long 0x0 "IMCTR3__VI0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE94100++0x3
line.long 0x0 "IMCTR4__VI0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE95140++0x3
line.long 0x0 "IMCTR5__VI0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE96180++0x3
line.long 0x0 "IMCTR6__VI0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE971C0++0x3
line.long 0x0 "IMCTR7__VI0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE98800++0x3
line.long 0x0 "IMCTR8__VI0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE99840++0x3
line.long 0x0 "IMCTR9__VI0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE9A880++0x3
line.long 0x0 "IMCTR10__VI0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE9B8C0++0x3
line.long 0x0 "IMCTR11__VI0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE9C900++0x3
line.long 0x0 "IMCTR12__VI0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE9D940++0x3
line.long 0x0 "IMCTR13__VI0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE9E980++0x3
line.long 0x0 "IMCTR14__VI0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xE9F9C0++0x3
line.long 0x0 "IMCTR15__VI0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xEC0548++0x7
line.long 0x0 "IMERRSIDAR__VI1,This register indicates the Error SrcID when EDC error happen in AXI AR channel."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x4 "IMERRSIDR__VI1,This register indicates the Error SrcID when EDC error happen in AXI R channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0xEC0558++0x3
line.long 0x0 "IMERRSIDNPTWAR__VI1,This register indicates the Error SrcID when EDC error happen in AXI AR channel with no Page Table Walk."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0xEC0560++0x1B
line.long 0x0 "IMAPQOS__VI1,This resister controls QoS value that is output from IPMMU(cache) to IPMMU(main) through ARADDR[35:32]."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "APQOS,Append QoS"
line.long 0x4 "IMERRSIDRRESP__VI1,This register indicates the Error SrcID when EDC error happen in AXI R(response) channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x8 "IMERRSIDPA__VI1,This register indicates the Error SrcID when EDC error happen in APB address channel."
bitfld.long 0x8 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x8 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x8 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0xC "IMERRSIDPWD__VI1,This register indicates the Error SrcID when EDC error happen in APB write data channel."
bitfld.long 0xC 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0xC 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x10 "IMRGID__VI1,Region-ID setting will be available for each IPMMU-hier (each bus hierarchy). This will be used for all PTW transactions originating in this bus hierarchy."
hexmask.long 0x10 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x10 0.--3. 1. "RGID,Region-ID"
line.long 0x14 "IMRGIDEN__VI1,This register is used for setting to protect IMRGID register."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x14 0.--15. 1. "RGIDEN,When RGIDEN[PUSER[5:2]]=1  IMRGID[3:0] register can be accessed."
line.long 0x18 "IMSECGRP__VI1,This register is used for setting to protect IMRGID register."
hexmask.long 0x18 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x18 0. "SECGRP,When PUSER[1]=0 " "0,1"
group.long 0xEC1500++0x3
line.long 0x0 "IMSCTLR__VI1,This register controls the behavior of IPMMU function."
bitfld.long 0x0 31. "DISWPROT,Read and Write protection of MMU System Control Register and MMU auxiliary Control register" "0: can write IMSCTLR,1: can write/read IMSCTLR"
newline
bitfld.long 0x0 30. "NSACCEN,Non-secure access enable for MMU System Control Register and MMU auxiliary Control register" "0: disable non-secure access,1: enable non-secure access"
newline
bitfld.long 0x0 29. "DISMMU,Disable IPMMU cache" "0: enable IPMMU cache,1: disable IPMMU cache"
newline
bitfld.long 0x0 28. "USE_SECGRP,Use security group to judge Secure/Non-secure access" "0,1"
newline
hexmask.long 0x0 0.--27. 1. "Reserved_0,Reserved"
group.long 0xEC1554++0x3
line.long 0x0 "ISERRINJR__VI1,IPMMU cache"
hexmask.long 0x0 7.--31. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 6. "ERRINJ_EDCERR_PWD,Error injection bit for EDC error in APB write datta channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 5. "ERRINJ_EDCERR_PA,Error injection bit for EDC error in APB address channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 4. "ERRINJ_EDCERR_RRESP,Error injection bit for EDC error in AXI R response channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 3. "ERRINJ_EDCERR_NPTW_AR,Error injection bit for EDC error in AXI AR channel (during not Page Table Walk)." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 2. "ERRINJ_COMPFAIL,Error injection bit for DCLS error." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 1. "ERRINJ_EDCERR_R,Error injection bit for EDC error in AXI R channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 0. "ERRINJ_EDCERR_AR,Error injection bit for EDC error in AXI AR channel." "0: Clear error injection,1: Enable error injection"
group.long 0xEC1580++0x3
line.long 0x0 "IMPFMCTR__VI1,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "MD,Monitor Mode" "0: Monitor all MMUs,1: Reserved,?,?"
newline
hexmask.long.byte 0x0 8.--11. 1. "SEL,When MD is B'11  SEL indicates the MMU table number to be monitored."
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "RST,Reset all status and counter values." "0,1"
newline
bitfld.long 0x0 0. "EN,Performance Monitor Enable" "0: Stop to count,1: Start to count"
rgroup.long 0xEC1590++0xB
line.long 0x0 "IMPFMTOTAL__VI1,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x0 0.--23. 1. "TOTAL,The total number of translation requests"
line.long 0x4 "IMPFMHIT__VI1,"
hexmask.long.byte 0x4 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x4 0.--23. 1. "HIT,The total number of TLB hit requests"
line.long 0x8 "IMPFMMISS__VI1,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x8 0.--23. 1. "MISS,The total number of miss requests"
group.long 0xEC2200++0x3
line.long 0x0 "IMPCTR__VI1,This register controls the behavior of the PMB function."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "TTSEL,Translation Table Select"
newline
bitfld.long 0x0 3. "TTEN,TLB Translation Enable" "0: Output PPN as a physical address,1: Output PPN as an intermediate physical address.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurred"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "PMBEN,PMB Enable" "0: PMB disabled,1: PMB enabled"
group.long 0xEC2208++0x3
line.long 0x0 "IMPSTR__VI1,This register indicates the error status of the address translation by PMB."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "MHIT,Multiple hit" "0,1"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "TF,Translation Fault" "0,1"
rgroup.long 0xEC220C++0x3
line.long 0x0 "IMPEAR__VI1,This register indicates the address which an address translation error occurred."
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0xEC2280++0x7F
line.long 0x0 "IMPMBA0__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x0 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
line.long 0x4 "IMPMBA1__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x4 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x4 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
line.long 0x8 "IMPMBA2__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x8 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x8 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x8 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x8 0.--7. 1. "Reserved_0,Reserved"
line.long 0xC "IMPMBA3__VI1,Note: n= 0 to 15"
hexmask.long.byte 0xC 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0xC 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0xC 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0xC 0.--7. 1. "Reserved_0,Reserved"
line.long 0x10 "IMPMBA4__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x10 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x10 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x10 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x10 0.--7. 1. "Reserved_0,Reserved"
line.long 0x14 "IMPMBA5__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x14 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x14 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x14 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x14 0.--7. 1. "Reserved_0,Reserved"
line.long 0x18 "IMPMBA6__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x18 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x18 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x18 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x18 0.--7. 1. "Reserved_0,Reserved"
line.long 0x1C "IMPMBA7__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x1C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x1C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x1C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x1C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x20 "IMPMBA8__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x20 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x20 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x20 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x20 0.--7. 1. "Reserved_0,Reserved"
line.long 0x24 "IMPMBA9__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x24 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x24 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x24 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x24 0.--7. 1. "Reserved_0,Reserved"
line.long 0x28 "IMPMBA10__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x28 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x28 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x28 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x28 0.--7. 1. "Reserved_0,Reserved"
line.long 0x2C "IMPMBA11__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x2C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x2C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x2C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x2C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x30 "IMPMBA12__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x30 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x30 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x30 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x30 0.--7. 1. "Reserved_0,Reserved"
line.long 0x34 "IMPMBA13__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x34 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x34 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x34 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x34 0.--7. 1. "Reserved_0,Reserved"
line.long 0x38 "IMPMBA14__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x38 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x38 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x38 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x38 0.--7. 1. "Reserved_0,Reserved"
line.long 0x3C "IMPMBA15__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x3C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x3C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x3C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x3C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x40 "IMPMBD0__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x40 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x40 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x40 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x40 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x40 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x40 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x40 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x40 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x40 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x44 "IMPMBD1__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x44 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x44 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x44 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x44 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x44 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x44 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x44 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x44 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x44 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x48 "IMPMBD2__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x48 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x48 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x48 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x48 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x48 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x48 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x48 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x48 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x48 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4C "IMPMBD3__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x4C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x4C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x4C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x4C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x4C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x4C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x4C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x4C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x50 "IMPMBD4__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x50 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x50 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x50 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x50 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x50 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x50 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x50 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x50 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x50 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x54 "IMPMBD5__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x54 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x54 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x54 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x54 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x54 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x54 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x54 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x54 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x54 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x58 "IMPMBD6__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x58 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x58 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x58 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x58 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x58 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x58 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x58 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x58 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x58 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x5C "IMPMBD7__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x5C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x5C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x5C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x5C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x5C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x5C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x5C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x5C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x5C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x60 "IMPMBD8__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x60 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x60 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x60 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x60 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x60 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x60 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x60 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x60 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x60 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x64 "IMPMBD9__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x64 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x64 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x64 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x64 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x64 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x64 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x64 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x64 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x64 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x68 "IMPMBD10__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x68 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x68 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x68 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x68 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x68 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x68 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x68 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x68 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x68 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x6C "IMPMBD11__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x6C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x6C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x6C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x6C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x6C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x6C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x6C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x6C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x6C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x70 "IMPMBD12__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x70 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x70 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x70 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x70 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x70 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x70 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x70 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x70 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x70 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x74 "IMPMBD13__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x74 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x74 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x74 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x74 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x74 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x74 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x74 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x74 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x74 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x78 "IMPMBD14__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x78 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x78 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x78 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x78 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x78 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x78 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x78 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x78 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x78 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x7C "IMPMBD15__VI1,Note: n= 0 to 15"
hexmask.long.byte 0x7C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x7C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x7C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x7C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x7C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x7C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x7C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x7C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x7C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
group.long 0xEC3300++0x3
line.long 0x0 "IMUCTR0__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3308++0x3
line.long 0x0 "IMUASID0__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3310++0x3
line.long 0x0 "IMUCTR1__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3318++0x3
line.long 0x0 "IMUASID1__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3320++0x3
line.long 0x0 "IMUCTR2__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3328++0x3
line.long 0x0 "IMUASID2__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3330++0x3
line.long 0x0 "IMUCTR3__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3338++0x3
line.long 0x0 "IMUASID3__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3340++0x3
line.long 0x0 "IMUCTR4__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3348++0x3
line.long 0x0 "IMUASID4__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3350++0x3
line.long 0x0 "IMUCTR5__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3358++0x3
line.long 0x0 "IMUASID5__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3360++0x3
line.long 0x0 "IMUCTR6__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3368++0x3
line.long 0x0 "IMUASID6__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3370++0x3
line.long 0x0 "IMUCTR7__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3378++0x3
line.long 0x0 "IMUASID7__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3380++0x3
line.long 0x0 "IMUCTR8__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3388++0x3
line.long 0x0 "IMUASID8__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3390++0x3
line.long 0x0 "IMUCTR9__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3398++0x3
line.long 0x0 "IMUASID9__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC33A0++0x3
line.long 0x0 "IMUCTR10__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC33A8++0x3
line.long 0x0 "IMUASID10__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC33B0++0x3
line.long 0x0 "IMUCTR11__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC33B8++0x3
line.long 0x0 "IMUASID11__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC33C0++0x3
line.long 0x0 "IMUCTR12__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC33C8++0x3
line.long 0x0 "IMUASID12__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC33D0++0x3
line.long 0x0 "IMUCTR13__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC33D8++0x3
line.long 0x0 "IMUASID13__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC33E0++0x3
line.long 0x0 "IMUCTR14__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC33E8++0x3
line.long 0x0 "IMUASID14__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC33F0++0x3
line.long 0x0 "IMUCTR15__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC33F8++0x3
line.long 0x0 "IMUASID15__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3400++0x3
line.long 0x0 "IMUCTR16__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3408++0x3
line.long 0x0 "IMUASID16__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3410++0x3
line.long 0x0 "IMUCTR17__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3418++0x3
line.long 0x0 "IMUASID17__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3420++0x3
line.long 0x0 "IMUCTR18__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3428++0x3
line.long 0x0 "IMUASID18__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3430++0x3
line.long 0x0 "IMUCTR19__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3438++0x3
line.long 0x0 "IMUASID19__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3440++0x3
line.long 0x0 "IMUCTR20__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3448++0x3
line.long 0x0 "IMUASID20__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3450++0x3
line.long 0x0 "IMUCTR21__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3458++0x3
line.long 0x0 "IMUASID21__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3460++0x3
line.long 0x0 "IMUCTR22__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3468++0x3
line.long 0x0 "IMUASID22__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3470++0x3
line.long 0x0 "IMUCTR23__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3478++0x3
line.long 0x0 "IMUASID23__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3480++0x3
line.long 0x0 "IMUCTR24__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3488++0x3
line.long 0x0 "IMUASID24__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3490++0x3
line.long 0x0 "IMUCTR25__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3498++0x3
line.long 0x0 "IMUASID25__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC34A0++0x3
line.long 0x0 "IMUCTR26__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC34A8++0x3
line.long 0x0 "IMUASID26__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC34B0++0x3
line.long 0x0 "IMUCTR27__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC34B8++0x3
line.long 0x0 "IMUASID27__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC34C0++0x3
line.long 0x0 "IMUCTR28__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC34C8++0x3
line.long 0x0 "IMUASID28__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC34D0++0x3
line.long 0x0 "IMUCTR29__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC34D8++0x3
line.long 0x0 "IMUASID29__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC34E0++0x3
line.long 0x0 "IMUCTR30__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC34E8++0x3
line.long 0x0 "IMUASID30__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC34F0++0x3
line.long 0x0 "IMUCTR31__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC34F8++0x3
line.long 0x0 "IMUASID31__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3600++0x3
line.long 0x0 "IMUCTR32__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3608++0x3
line.long 0x0 "IMUASID32__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3610++0x3
line.long 0x0 "IMUCTR33__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3618++0x3
line.long 0x0 "IMUASID33__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3620++0x3
line.long 0x0 "IMUCTR34__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3628++0x3
line.long 0x0 "IMUASID34__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3630++0x3
line.long 0x0 "IMUCTR35__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3638++0x3
line.long 0x0 "IMUASID35__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3640++0x3
line.long 0x0 "IMUCTR36__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3648++0x3
line.long 0x0 "IMUASID36__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3650++0x3
line.long 0x0 "IMUCTR37__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3658++0x3
line.long 0x0 "IMUASID37__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3660++0x3
line.long 0x0 "IMUCTR38__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3668++0x3
line.long 0x0 "IMUASID38__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3670++0x3
line.long 0x0 "IMUCTR39__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3678++0x3
line.long 0x0 "IMUASID39__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3680++0x3
line.long 0x0 "IMUCTR40__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3688++0x3
line.long 0x0 "IMUASID40__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3690++0x3
line.long 0x0 "IMUCTR41__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3698++0x3
line.long 0x0 "IMUASID41__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC36A0++0x3
line.long 0x0 "IMUCTR42__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC36A8++0x3
line.long 0x0 "IMUASID42__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC36B0++0x3
line.long 0x0 "IMUCTR43__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC36B8++0x3
line.long 0x0 "IMUASID43__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC36C0++0x3
line.long 0x0 "IMUCTR44__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC36C8++0x3
line.long 0x0 "IMUASID44__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC36D0++0x3
line.long 0x0 "IMUCTR45__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC36D8++0x3
line.long 0x0 "IMUASID45__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC36E0++0x3
line.long 0x0 "IMUCTR46__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC36E8++0x3
line.long 0x0 "IMUASID46__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC36F0++0x3
line.long 0x0 "IMUCTR47__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC36F8++0x3
line.long 0x0 "IMUASID47__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3700++0x3
line.long 0x0 "IMUCTR48__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3708++0x3
line.long 0x0 "IMUASID48__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3710++0x3
line.long 0x0 "IMUCTR49__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3718++0x3
line.long 0x0 "IMUASID49__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3720++0x3
line.long 0x0 "IMUCTR50__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3728++0x3
line.long 0x0 "IMUASID50__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3730++0x3
line.long 0x0 "IMUCTR51__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3738++0x3
line.long 0x0 "IMUASID51__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3740++0x3
line.long 0x0 "IMUCTR52__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3748++0x3
line.long 0x0 "IMUASID52__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3750++0x3
line.long 0x0 "IMUCTR53__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3758++0x3
line.long 0x0 "IMUASID53__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3760++0x3
line.long 0x0 "IMUCTR54__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3768++0x3
line.long 0x0 "IMUASID54__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3770++0x3
line.long 0x0 "IMUCTR55__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3778++0x3
line.long 0x0 "IMUASID55__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3780++0x3
line.long 0x0 "IMUCTR56__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3788++0x3
line.long 0x0 "IMUASID56__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC3790++0x3
line.long 0x0 "IMUCTR57__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC3798++0x3
line.long 0x0 "IMUASID57__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC37A0++0x3
line.long 0x0 "IMUCTR58__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC37A8++0x3
line.long 0x0 "IMUASID58__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC37B0++0x3
line.long 0x0 "IMUCTR59__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC37B8++0x3
line.long 0x0 "IMUASID59__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC37C0++0x3
line.long 0x0 "IMUCTR60__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC37C8++0x3
line.long 0x0 "IMUASID60__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC37D0++0x3
line.long 0x0 "IMUCTR61__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC37D8++0x3
line.long 0x0 "IMUASID61__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC37E0++0x3
line.long 0x0 "IMUCTR62__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC37E8++0x3
line.long 0x0 "IMUASID62__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xEC37F0++0x3
line.long 0x0 "IMUCTR63__VI1,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xEC37F8++0x3
line.long 0x0 "IMUASID63__VI1,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xED0000++0x3
line.long 0x0 "IMCTR0__VI1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xED0040++0x3
line.long 0x0 "IMSEC__VI1,This register controls the attribute of secure/non-secure for MMU. This register can be accessed by the master which operates on secure-mode only. When non-secure master accesses to this regiser. write access is ignored."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "SEC,SEC[n]=0 : IMCTRn~IMERIDn is Non-secure"
group.long 0xED1040++0x3
line.long 0x0 "IMCTR1__VI1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xED2080++0x3
line.long 0x0 "IMCTR2__VI1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xED30C0++0x3
line.long 0x0 "IMCTR3__VI1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xED4100++0x3
line.long 0x0 "IMCTR4__VI1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xED5140++0x3
line.long 0x0 "IMCTR5__VI1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xED6180++0x3
line.long 0x0 "IMCTR6__VI1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xED71C0++0x3
line.long 0x0 "IMCTR7__VI1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xED8800++0x3
line.long 0x0 "IMCTR8__VI1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xED9840++0x3
line.long 0x0 "IMCTR9__VI1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xEDA880++0x3
line.long 0x0 "IMCTR10__VI1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xEDB8C0++0x3
line.long 0x0 "IMCTR11__VI1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xEDC900++0x3
line.long 0x0 "IMCTR12__VI1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xEDD940++0x3
line.long 0x0 "IMCTR13__VI1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xEDE980++0x3
line.long 0x0 "IMCTR14__VI1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xEDF9C0++0x3
line.long 0x0 "IMCTR15__VI1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xF00548++0x7
line.long 0x0 "IMERRSIDAR__VIP0,This register indicates the Error SrcID when EDC error happen in AXI AR channel."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x4 "IMERRSIDR__VIP0,This register indicates the Error SrcID when EDC error happen in AXI R channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0xF00558++0x3
line.long 0x0 "IMERRSIDNPTWAR__VIP0,This register indicates the Error SrcID when EDC error happen in AXI AR channel with no Page Table Walk."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0xF00560++0x1B
line.long 0x0 "IMAPQOS__VIP0,This resister controls QoS value that is output from IPMMU(cache) to IPMMU(main) through ARADDR[35:32]."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "APQOS,Append QoS"
line.long 0x4 "IMERRSIDRRESP__VIP0,This register indicates the Error SrcID when EDC error happen in AXI R(response) channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x8 "IMERRSIDPA__VIP0,This register indicates the Error SrcID when EDC error happen in APB address channel."
bitfld.long 0x8 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x8 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x8 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0xC "IMERRSIDPWD__VIP0,This register indicates the Error SrcID when EDC error happen in APB write data channel."
bitfld.long 0xC 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0xC 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x10 "IMRGID__VIP0,Region-ID setting will be available for each IPMMU-hier (each bus hierarchy). This will be used for all PTW transactions originating in this bus hierarchy."
hexmask.long 0x10 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x10 0.--3. 1. "RGID,Region-ID"
line.long 0x14 "IMRGIDEN__VIP0,This register is used for setting to protect IMRGID register."
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x14 0.--15. 1. "RGIDEN,When RGIDEN[PUSER[5:2]]=1  IMRGID[3:0] register can be accessed."
line.long 0x18 "IMSECGRP__VIP0,This register is used for setting to protect IMRGID register."
hexmask.long 0x18 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x18 0. "SECGRP,When PUSER[1]=0 " "0,1"
group.long 0xF01500++0x3
line.long 0x0 "IMSCTLR__VIP0,This register controls the behavior of IPMMU function."
bitfld.long 0x0 31. "DISWPROT,Read and Write protection of MMU System Control Register and MMU auxiliary Control register" "0: can write IMSCTLR,1: can write/read IMSCTLR"
newline
bitfld.long 0x0 30. "NSACCEN,Non-secure access enable for MMU System Control Register and MMU auxiliary Control register" "0: disable non-secure access,1: enable non-secure access"
newline
bitfld.long 0x0 29. "DISMMU,Disable IPMMU cache" "0: enable IPMMU cache,1: disable IPMMU cache"
newline
bitfld.long 0x0 28. "USE_SECGRP,Use security group to judge Secure/Non-secure access" "0,1"
newline
hexmask.long 0x0 0.--27. 1. "Reserved_0,Reserved"
group.long 0xF01554++0x3
line.long 0x0 "ISERRINJR__VIP0,IPMMU cache"
hexmask.long 0x0 7.--31. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 6. "ERRINJ_EDCERR_PWD,Error injection bit for EDC error in APB write datta channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 5. "ERRINJ_EDCERR_PA,Error injection bit for EDC error in APB address channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 4. "ERRINJ_EDCERR_RRESP,Error injection bit for EDC error in AXI R response channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 3. "ERRINJ_EDCERR_NPTW_AR,Error injection bit for EDC error in AXI AR channel (during not Page Table Walk)." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 2. "ERRINJ_COMPFAIL,Error injection bit for DCLS error." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 1. "ERRINJ_EDCERR_R,Error injection bit for EDC error in AXI R channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 0. "ERRINJ_EDCERR_AR,Error injection bit for EDC error in AXI AR channel." "0: Clear error injection,1: Enable error injection"
group.long 0xF01580++0x3
line.long 0x0 "IMPFMCTR__VIP0,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "MD,Monitor Mode" "0: Monitor all MMUs,1: Reserved,?,?"
newline
hexmask.long.byte 0x0 8.--11. 1. "SEL,When MD is B'11  SEL indicates the MMU table number to be monitored."
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "RST,Reset all status and counter values." "0,1"
newline
bitfld.long 0x0 0. "EN,Performance Monitor Enable" "0: Stop to count,1: Start to count"
rgroup.long 0xF01590++0xB
line.long 0x0 "IMPFMTOTAL__VIP0,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x0 0.--23. 1. "TOTAL,The total number of translation requests"
line.long 0x4 "IMPFMHIT__VIP0,"
hexmask.long.byte 0x4 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x4 0.--23. 1. "HIT,The total number of TLB hit requests"
line.long 0x8 "IMPFMMISS__VIP0,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x8 0.--23. 1. "MISS,The total number of miss requests"
group.long 0xF02200++0x3
line.long 0x0 "IMPCTR__VIP0,This register controls the behavior of the PMB function."
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "TTSEL,Translation Table Select"
newline
bitfld.long 0x0 3. "TTEN,TLB Translation Enable" "0: Output PPN as a physical address,1: Output PPN as an intermediate physical address.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurred"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "PMBEN,PMB Enable" "0: PMB disabled,1: PMB enabled"
group.long 0xF02208++0x3
line.long 0x0 "IMPSTR__VIP0,This register indicates the error status of the address translation by PMB."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "MHIT,Multiple hit" "0,1"
newline
rbitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "TF,Translation Fault" "0,1"
rgroup.long 0xF0220C++0x3
line.long 0x0 "IMPEAR__VIP0,This register indicates the address which an address translation error occurred."
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0xF02280++0x7F
line.long 0x0 "IMPMBA0__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x0 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
line.long 0x4 "IMPMBA1__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x4 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x4 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
line.long 0x8 "IMPMBA2__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x8 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x8 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x8 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x8 0.--7. 1. "Reserved_0,Reserved"
line.long 0xC "IMPMBA3__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0xC 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0xC 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0xC 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0xC 0.--7. 1. "Reserved_0,Reserved"
line.long 0x10 "IMPMBA4__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x10 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x10 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x10 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x10 0.--7. 1. "Reserved_0,Reserved"
line.long 0x14 "IMPMBA5__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x14 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x14 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x14 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x14 0.--7. 1. "Reserved_0,Reserved"
line.long 0x18 "IMPMBA6__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x18 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x18 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x18 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x18 0.--7. 1. "Reserved_0,Reserved"
line.long 0x1C "IMPMBA7__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x1C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x1C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x1C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x1C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x20 "IMPMBA8__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x20 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x20 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x20 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x20 0.--7. 1. "Reserved_0,Reserved"
line.long 0x24 "IMPMBA9__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x24 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x24 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x24 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x24 0.--7. 1. "Reserved_0,Reserved"
line.long 0x28 "IMPMBA10__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x28 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x28 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x28 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x28 0.--7. 1. "Reserved_0,Reserved"
line.long 0x2C "IMPMBA11__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x2C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x2C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x2C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x2C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x30 "IMPMBA12__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x30 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x30 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x30 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x30 0.--7. 1. "Reserved_0,Reserved"
line.long 0x34 "IMPMBA13__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x34 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x34 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x34 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x34 0.--7. 1. "Reserved_0,Reserved"
line.long 0x38 "IMPMBA14__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x38 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x38 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x38 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x38 0.--7. 1. "Reserved_0,Reserved"
line.long 0x3C "IMPMBA15__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x3C 24.--31. 1. "VPN,Virtual Page Number"
newline
hexmask.long.word 0x3C 9.--23. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x3C 8. "V,Enable this page translation." "0,1"
newline
hexmask.long.byte 0x3C 0.--7. 1. "Reserved_0,Reserved"
line.long 0x40 "IMPMBD0__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x40 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x40 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x40 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x40 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x40 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x40 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x40 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x40 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x40 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x44 "IMPMBD1__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x44 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x44 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x44 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x44 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x44 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x44 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x44 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x44 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x44 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x48 "IMPMBD2__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x48 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x48 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x48 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x48 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x48 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x48 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x48 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x48 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x48 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4C "IMPMBD3__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x4C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x4C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x4C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x4C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x4C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x4C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x4C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x4C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x4C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x50 "IMPMBD4__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x50 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x50 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x50 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x50 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x50 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x50 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x50 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x50 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x50 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x54 "IMPMBD5__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x54 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x54 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x54 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x54 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x54 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x54 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x54 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x54 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x54 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x58 "IMPMBD6__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x58 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x58 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x58 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x58 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x58 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x58 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x58 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x58 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x58 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x5C "IMPMBD7__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x5C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x5C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x5C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x5C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x5C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x5C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x5C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x5C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x5C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x60 "IMPMBD8__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x60 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x60 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x60 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x60 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x60 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x60 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x60 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x60 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x60 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x64 "IMPMBD9__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x64 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x64 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x64 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x64 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x64 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x64 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x64 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x64 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x64 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x68 "IMPMBD10__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x68 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x68 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x68 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x68 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x68 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x68 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x68 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x68 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x68 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x6C "IMPMBD11__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x6C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x6C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x6C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x6C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x6C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x6C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x6C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x6C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x6C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x70 "IMPMBD12__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x70 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x70 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x70 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x70 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x70 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x70 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x70 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x70 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x70 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x74 "IMPMBD13__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x74 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x74 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x74 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x74 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x74 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x74 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x74 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x74 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x74 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x78 "IMPMBD14__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x78 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x78 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x78 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x78 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x78 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x78 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x78 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x78 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x78 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x7C "IMPMBD15__VIP0,Note: n= 0 to 15"
hexmask.long.byte 0x7C 24.--31. 1. "PPN0,Physical Page Number"
newline
hexmask.long.byte 0x7C 16.--23. 1. "PPN1,Upper Physical Page Number"
newline
hexmask.long.byte 0x7C 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x7C 8. "V,Enable this page translation." "0,1"
newline
bitfld.long 0x7C 7. "SZ0,This bit and SZ[0] (bit 4) specify the page size." "0: 16-Mbyte page,1: 64-Mbyte page"
newline
rbitfld.long 0x7C 5.--6. "Reserved_5,Reserved" "0,1,2,3"
newline
bitfld.long 0x7C 4. "SZ1,Page Size" "0,1"
newline
bitfld.long 0x7C 3. "C,Cache bit" "0,1"
newline
rbitfld.long 0x7C 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
group.long 0xF03300++0x3
line.long 0x0 "IMUCTR0__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03308++0x3
line.long 0x0 "IMUASID0__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03310++0x3
line.long 0x0 "IMUCTR1__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03318++0x3
line.long 0x0 "IMUASID1__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03320++0x3
line.long 0x0 "IMUCTR2__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03328++0x3
line.long 0x0 "IMUASID2__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03330++0x3
line.long 0x0 "IMUCTR3__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03338++0x3
line.long 0x0 "IMUASID3__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03340++0x3
line.long 0x0 "IMUCTR4__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03348++0x3
line.long 0x0 "IMUASID4__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03350++0x3
line.long 0x0 "IMUCTR5__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03358++0x3
line.long 0x0 "IMUASID5__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03360++0x3
line.long 0x0 "IMUCTR6__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03368++0x3
line.long 0x0 "IMUASID6__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03370++0x3
line.long 0x0 "IMUCTR7__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03378++0x3
line.long 0x0 "IMUASID7__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03380++0x3
line.long 0x0 "IMUCTR8__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03388++0x3
line.long 0x0 "IMUASID8__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03390++0x3
line.long 0x0 "IMUCTR9__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03398++0x3
line.long 0x0 "IMUASID9__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF033A0++0x3
line.long 0x0 "IMUCTR10__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF033A8++0x3
line.long 0x0 "IMUASID10__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF033B0++0x3
line.long 0x0 "IMUCTR11__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF033B8++0x3
line.long 0x0 "IMUASID11__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF033C0++0x3
line.long 0x0 "IMUCTR12__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF033C8++0x3
line.long 0x0 "IMUASID12__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF033D0++0x3
line.long 0x0 "IMUCTR13__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF033D8++0x3
line.long 0x0 "IMUASID13__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF033E0++0x3
line.long 0x0 "IMUCTR14__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF033E8++0x3
line.long 0x0 "IMUASID14__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF033F0++0x3
line.long 0x0 "IMUCTR15__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF033F8++0x3
line.long 0x0 "IMUASID15__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03400++0x3
line.long 0x0 "IMUCTR16__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03408++0x3
line.long 0x0 "IMUASID16__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03410++0x3
line.long 0x0 "IMUCTR17__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03418++0x3
line.long 0x0 "IMUASID17__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03420++0x3
line.long 0x0 "IMUCTR18__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03428++0x3
line.long 0x0 "IMUASID18__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03430++0x3
line.long 0x0 "IMUCTR19__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03438++0x3
line.long 0x0 "IMUASID19__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03440++0x3
line.long 0x0 "IMUCTR20__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03448++0x3
line.long 0x0 "IMUASID20__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03450++0x3
line.long 0x0 "IMUCTR21__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03458++0x3
line.long 0x0 "IMUASID21__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03460++0x3
line.long 0x0 "IMUCTR22__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03468++0x3
line.long 0x0 "IMUASID22__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03470++0x3
line.long 0x0 "IMUCTR23__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03478++0x3
line.long 0x0 "IMUASID23__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03480++0x3
line.long 0x0 "IMUCTR24__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03488++0x3
line.long 0x0 "IMUASID24__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03490++0x3
line.long 0x0 "IMUCTR25__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03498++0x3
line.long 0x0 "IMUASID25__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF034A0++0x3
line.long 0x0 "IMUCTR26__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF034A8++0x3
line.long 0x0 "IMUASID26__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF034B0++0x3
line.long 0x0 "IMUCTR27__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF034B8++0x3
line.long 0x0 "IMUASID27__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF034C0++0x3
line.long 0x0 "IMUCTR28__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF034C8++0x3
line.long 0x0 "IMUASID28__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF034D0++0x3
line.long 0x0 "IMUCTR29__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF034D8++0x3
line.long 0x0 "IMUASID29__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF034E0++0x3
line.long 0x0 "IMUCTR30__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF034E8++0x3
line.long 0x0 "IMUASID30__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF034F0++0x3
line.long 0x0 "IMUCTR31__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF034F8++0x3
line.long 0x0 "IMUASID31__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03600++0x3
line.long 0x0 "IMUCTR32__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03608++0x3
line.long 0x0 "IMUASID32__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03610++0x3
line.long 0x0 "IMUCTR33__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03618++0x3
line.long 0x0 "IMUASID33__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03620++0x3
line.long 0x0 "IMUCTR34__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03628++0x3
line.long 0x0 "IMUASID34__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03630++0x3
line.long 0x0 "IMUCTR35__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03638++0x3
line.long 0x0 "IMUASID35__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03640++0x3
line.long 0x0 "IMUCTR36__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03648++0x3
line.long 0x0 "IMUASID36__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03650++0x3
line.long 0x0 "IMUCTR37__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03658++0x3
line.long 0x0 "IMUASID37__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03660++0x3
line.long 0x0 "IMUCTR38__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03668++0x3
line.long 0x0 "IMUASID38__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03670++0x3
line.long 0x0 "IMUCTR39__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03678++0x3
line.long 0x0 "IMUASID39__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03680++0x3
line.long 0x0 "IMUCTR40__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03688++0x3
line.long 0x0 "IMUASID40__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03690++0x3
line.long 0x0 "IMUCTR41__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03698++0x3
line.long 0x0 "IMUASID41__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF036A0++0x3
line.long 0x0 "IMUCTR42__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF036A8++0x3
line.long 0x0 "IMUASID42__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF036B0++0x3
line.long 0x0 "IMUCTR43__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF036B8++0x3
line.long 0x0 "IMUASID43__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF036C0++0x3
line.long 0x0 "IMUCTR44__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF036C8++0x3
line.long 0x0 "IMUASID44__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF036D0++0x3
line.long 0x0 "IMUCTR45__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF036D8++0x3
line.long 0x0 "IMUASID45__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF036E0++0x3
line.long 0x0 "IMUCTR46__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF036E8++0x3
line.long 0x0 "IMUASID46__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF036F0++0x3
line.long 0x0 "IMUCTR47__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF036F8++0x3
line.long 0x0 "IMUASID47__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03700++0x3
line.long 0x0 "IMUCTR48__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03708++0x3
line.long 0x0 "IMUASID48__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03710++0x3
line.long 0x0 "IMUCTR49__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03718++0x3
line.long 0x0 "IMUASID49__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03720++0x3
line.long 0x0 "IMUCTR50__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03728++0x3
line.long 0x0 "IMUASID50__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03730++0x3
line.long 0x0 "IMUCTR51__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03738++0x3
line.long 0x0 "IMUASID51__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03740++0x3
line.long 0x0 "IMUCTR52__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03748++0x3
line.long 0x0 "IMUASID52__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03750++0x3
line.long 0x0 "IMUCTR53__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03758++0x3
line.long 0x0 "IMUASID53__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03760++0x3
line.long 0x0 "IMUCTR54__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03768++0x3
line.long 0x0 "IMUASID54__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03770++0x3
line.long 0x0 "IMUCTR55__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03778++0x3
line.long 0x0 "IMUASID55__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03780++0x3
line.long 0x0 "IMUCTR56__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03788++0x3
line.long 0x0 "IMUASID56__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF03790++0x3
line.long 0x0 "IMUCTR57__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF03798++0x3
line.long 0x0 "IMUASID57__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF037A0++0x3
line.long 0x0 "IMUCTR58__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF037A8++0x3
line.long 0x0 "IMUASID58__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF037B0++0x3
line.long 0x0 "IMUCTR59__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF037B8++0x3
line.long 0x0 "IMUASID59__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF037C0++0x3
line.long 0x0 "IMUCTR60__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF037C8++0x3
line.long 0x0 "IMUASID60__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF037D0++0x3
line.long 0x0 "IMUCTR61__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF037D8++0x3
line.long 0x0 "IMUASID61__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF037E0++0x3
line.long 0x0 "IMUCTR62__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF037E8++0x3
line.long 0x0 "IMUASID62__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF037F0++0x3
line.long 0x0 "IMUCTR63__VIP0,Note: m= 0 to 63"
bitfld.long 0x0 31. "FIXADDEN,Fix the upper 8 bits of physical address" "0: Disable FIXADD[39:32],1: Enable FIXADD[39:32]"
newline
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "FIXADD,When FIXADDEN is 1  the upper 8bit of physical address is FIXADD[39:32]. This bit must be used only when IMTTBCRn.EAE is 0."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
hexmask.long.byte 0x0 4.--8. 1. "TTSEL,Translation Table"
newline
rbitfld.long 0x0 2.--3. "Reserved_2,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 1. "FLUSH,micro-TLB Invalidate" "?,1: Invalidate all entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,Address Translation Enable" "0: Disable address translation,1: Enable address translation"
group.long 0xF037F8++0x3
line.long 0x0 "IMUASID63__VIP0,Note: m= 0 to 63"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "ASID1,ASID1"
newline
hexmask.long.byte 0x0 0.--7. 1. "ASID0,ASID0"
group.long 0xF10000++0x3
line.long 0x0 "IMCTR0__VIP0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xF10040++0x3
line.long 0x0 "IMSEC__VIP0,This register controls the attribute of secure/non-secure for MMU. This register can be accessed by the master which operates on secure-mode only. When non-secure master accesses to this regiser. write access is ignored."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "SEC,SEC[n]=0 : IMCTRn~IMERIDn is Non-secure"
group.long 0xF11040++0x3
line.long 0x0 "IMCTR1__VIP0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xF12080++0x3
line.long 0x0 "IMCTR2__VIP0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xF130C0++0x3
line.long 0x0 "IMCTR3__VIP0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xF14100++0x3
line.long 0x0 "IMCTR4__VIP0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xF15140++0x3
line.long 0x0 "IMCTR5__VIP0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xF16180++0x3
line.long 0x0 "IMCTR6__VIP0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xF171C0++0x3
line.long 0x0 "IMCTR7__VIP0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xF18800++0x3
line.long 0x0 "IMCTR8__VIP0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xF19840++0x3
line.long 0x0 "IMCTR9__VIP0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xF1A880++0x3
line.long 0x0 "IMCTR10__VIP0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xF1B8C0++0x3
line.long 0x0 "IMCTR11__VIP0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xF1C900++0x3
line.long 0x0 "IMCTR12__VIP0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xF1D940++0x3
line.long 0x0 "IMCTR13__VIP0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xF1E980++0x3
line.long 0x0 "IMCTR14__VIP0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0xF1F9C0++0x3
line.long 0x0 "IMCTR15__VIP0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.word 0x0 3.--14. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
tree.end
tree "IPMMU_1"
base ad:0xEEFC0000
rgroup.long 0x540++0x3
line.long 0x0 "IMSSTR,This register indicates the interrupt status from each IPMMUs. This register can be read in non-secure mode only. In secure mode. refer to the IMSTRn.and IMPSTRn in the IPMMU where secure master is managed."
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x0 19. "RT1,Interrupt status of IPMMU-RT1" "0,1"
newline
bitfld.long 0x0 18. "MM,Interrupt status of IPMMU-MM" "0,1"
newline
bitfld.long 0x0 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 15. "VI1,Interrupt status of IPMMU-VI1" "0,1"
newline
bitfld.long 0x0 14. "VI0,Interrupt status of IPMMU-VI0" "0,1"
newline
bitfld.long 0x0 13. "Reserved_13,Reserved" "0,1"
newline
bitfld.long 0x0 12. "VC0,Interrupt status of IPMMU-VC0" "0,1"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "RT0,Interrupt status of IPMMU-RT" "0,1"
newline
bitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 6. "_3DG,Interrupt status of IPMMU-3DG" "0,1"
newline
bitfld.long 0x0 5. "VIP0,Interrupt status of IPMMU-VIP0" "0,1"
newline
bitfld.long 0x0 4. "Reserved_4,Reserved" "0,1"
newline
bitfld.long 0x0 3. "IR,Interrupt status of IPMMU-IR" "0,1"
newline
bitfld.long 0x0 2. "HC,Interrupt status of IPMMU-HC" "0,1"
newline
bitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x0 0. "DS0,Interrupt status of IPMMU-DS0" "0: interrupt is not accepted,1: interrupt is accepted"
group.long 0x544++0xB
line.long 0x0 "IMQOS,This register controls the threshold which is queued in the priority requeset FIFO."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 16.--17. "WAITTH,Limit of wait time by interrupt from normal priority repuest" "0: 1 time,1: 4 times,?,?"
newline
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "QOSTH,QoS threshold"
line.long 0x4 "IMERRSIDAR,This register indicates the Error SrcID when EDC error happen in AXI AR channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x8 "IMERRSIDR,This register indicates the Error SrcID when EDC error happen in AXI R channel."
bitfld.long 0x8 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x8 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x8 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0x554++0x3
line.long 0x0 "ISERRINJ,This register controls the error injection request of each request of error function. The following figure shows the bit assignments of this register."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x0 9. "ERRINJ_EDCERR_PWD,Error injection bit for EDC error in APB write data channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 8. "ERRINJ_EDCERR_PA,Error injection bit for EDC error in APB address channel ." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 7. "ERRINJ_EDCERR_AR2,Error injection bit for EDC error in AXI AR channel (STG~ASID)." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 6. "ERRINJ_EDCERR_RRESP,Error injection bit for EDC error in AXI R response channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 5. "ERRINJ_EDC_R,Error injection bit for EDC error in AXI R channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 4. "ERRINJ_EDCE_AR,Error injection bit for EDC error in AXI AR channel." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 3. "ERRINJ_COMPFAIL,Error injection bit for DCLS error." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 2. "ERRINJ_RAMERR,Error injection bit for 1-bit error in TLB-RAM." "0: Clear error injection,1: Enable error injection"
newline
bitfld.long 0x0 1. "ERRINJ_FATALRAMERR,Error injection bit for 2-bit error in TLB-RAM." "0: Clear error injection,1: Enable error injection"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x55C++0x3
line.long 0x0 "IMERRSIDAR2,This register indicates the Error SrcID when EDC error happen in AXI AR channel (STG~ASID)."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0x564++0xB
line.long 0x0 "IMERRSIDRRESP,This register indicates the Error SrcID when EDC error happen in AXI R(response) channel."
bitfld.long 0x0 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x4 "IMERRSIDPA,This register indicates the Error SrcID when EDC error happen in APB address channel."
bitfld.long 0x4 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "SRCID,Read : SrcID of error transaction."
line.long 0x8 "IMERRSIDPWD,This register indicates the Error SrcID when EDC error happen in APB write data channel."
bitfld.long 0x8 31. "CLR,1:clear SRCID" "0: No effect,1: clear SRCID"
newline
hexmask.long.tbyte 0x8 8.--30. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x8 0.--7. 1. "SRCID,Read : SrcID of error transaction."
group.long 0x5C0++0x7
line.long 0x0 "IMRAM0ERRCTR0,This register controls the assertion of the internal TLBRAM(L3) (Long Descriptor Table) error notification signal to MFIS."
bitfld.long 0x0 31. "L3UC15,L3 TLB-RAM15 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 30. "L3C15,L3 TLB-RAM15 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 29. "L3UC14,L3 TLB-RAM14 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 28. "L3C14,L3 TLB-RAM14 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 27. "L3UC13,L3 TLB-RAM13 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 26. "L3C13,L3 TLB-RAM13 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 25. "L3UC12,L3 TLB-RAM12 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 24. "L3C12,L3 TLB-RAM12 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 23. "L3UC11,L3 TLB-RAM11 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 22. "L3C11,L3 TLB-RAM11 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 21. "L3UC10,L3 TLB-RAM10 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 20. "L3C10,L3 TLB-RAM10 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 19. "L3UC9,L3 TLB-RAM9 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 18. "L3C9,L3 TLB-RAM9 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 17. "L3UC8,L3 TLB-RAM8 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 16. "L3C8,L3 TLB-RAM8 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 15. "L3UC7,L3 TLB-RAM7 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 14. "L3C7,L3 TLB-RAM7 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 13. "L3UC6,L3 TLB-RAM6 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 12. "L3C6,L3 TLB-RAM6 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 11. "L3UC5,L3 TLB-RAM5 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 10. "L3C5,L3 TLB-RAM5 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 9. "L3UC4,L3 TLB-RAM4 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 8. "L3C4,L3 TLB-RAM4 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 7. "L3UC3,L3 TLB-RAM3 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 6. "L3C3,L3 TLB-RAM3 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 5. "L3UC2,L3 TLB-RAM2 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 4. "L3C2,L3 TLB-RAM2 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 3. "L3UC1,L3 TLB-RAM1 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 2. "L3C1,L3 TLB-RAM1 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 1. "L3UC0,L3 TLB-RAM0 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x0 0. "L3C0,L3 TLB-RAM0 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
line.long 0x4 "IMRAM0ERRCTR1,This register controls the assertion of the internal TLBRAM(L2.L1) (Long Descriptor Table) error notification signal to MFIS."
hexmask.long.word 0x4 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "L1UC,L1 TLB-RAM EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 16. "L1C,L1 TLB-RAM EDC 1-biterror detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 15. "L2UC7,L2 TLB-RAM7 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 14. "L2C7,L2 TLB-RAM7 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 13. "L2UC6,L2 TLB-RAM6 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 12. "L2C6,L2 TLB-RAM6 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 11. "L2UC5,L2 TLB-RAM5 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 10. "L2C5,L2 TLB-RAM5 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 9. "L2UC4,L2 TLB-RAM4 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 8. "L2C4,L2 TLB-RAM4 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 7. "L2UC3,L2 TLB-RAM3 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 6. "L2C3,L2 TLB-RAM3 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 5. "L2UC2,L2 TLB-RAM2 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 4. "L2C2,L2 TLB-RAM2 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 3. "L2UC1,L2 TLB-RAM1 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 2. "L2C1,L2 TLB-RAM1 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 1. "L2UC0,L2 TLB-RAM0 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 0. "L2C0,L2 TLB-RAM0 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
wgroup.long 0x5C8++0x3
line.long 0x0 "IMRAM0ERRSTR0,This register indicates the error status of the internal TLBRAM(L3) (Long Descriptor Table)."
bitfld.long 0x0 31. "L3UC15,L3 TLB-RAM15 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 30. "L3C15,L3 TLB-RAM15 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 29. "L3UC14,L3 TLB-RAM14 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 28. "L3C14,L3 TLB-RAM14 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 27. "L3UC13,L3 TLB-RAM13 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 26. "L3C13,L3 TLB-RAM13 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 25. "L3UC12,L3 TLB-RAM12 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 24. "L3C12,L3 TLB-RAM12 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 23. "L3UC11,L3 TLB-RAM11 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 22. "L3C11,L3 TLB-RAM11 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 21. "L3UC10,L3 TLB-RAM10 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 20. "L3C10,L3 TLB-RAM10 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 19. "L3UC9,L3 TLB-RAM9 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 18. "L3C9,L3 TLB-RAM9 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 17. "L3UC8,L3 TLB-RAM8 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 16. "L3C8,L3 TLB-RAM8 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 15. "L3UC7,L3 TLB-RAM7 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 14. "L3C7,L3 TLB-RAM7 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 13. "L3UC6,L3 TLB-RAM6 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 12. "L3C6,L3 TLB-RAM6 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 11. "L3UC5,L3 TLB-RAM5 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 10. "L3C5,L3 TLB-RAM5 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 9. "L3UC4,L3 TLB-RAM4 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 8. "L3C4,L3 TLB-RAM4 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 7. "L3UC3,L3 TLB-RAM3 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 6. "L3C3,L3 TLB-RAM3 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 5. "L3UC2,L3 TLB-RAM2 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 4. "L3C2,L3 TLB-RAM2 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 3. "L3UC1,L3 TLB-RAM1 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 2. "L3C1,L3 TLB-RAM1 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 1. "L3UC0,L3 TLB-RAM0 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 0. "L3C0,L3 TLB-RAM0 EDC 1-bit error status" "0: no error,1: detect error"
group.long 0x5CC++0xB
line.long 0x0 "IMRAM0ERRSTR1,This register indicates the error status of the internal TLBRAM(L2.L1) (Long Descriptor Table)."
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "L1UC,L1 TLB-RAM EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 16. "L1C,L1 TLB-RAM EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 15. "L2UC7,L2 TLB-RAM7 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 14. "L2C7,L2 TLB-RAM7 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 13. "L2UC6,L2 TLB-RAM6 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 12. "L2C6,L2 TLB-RAM6 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 11. "L2UC5,L2 TLB-RAM5 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 10. "L2C5,L2 TLB-RAM5 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 9. "L2UC4,L2 TLB-RAM4 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 8. "L2C4,L2 TLB-RAM4 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 7. "L2UC3,L2 TLB-RAM3 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 6. "L2C3,L2 TLB-RAM3 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 5. "L2UC2,L2 TLB-RAM2 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 4. "L2C2,L2 TLB-RAM2 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 3. "L2UC1,L2 TLB-RAM1 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 2. "L2C1,L2 TLB-RAM1 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 1. "L2UC0,L2 TLB-RAM0 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x0 0. "L2C0,L2 TLB-RAM0 EDC 1-bit error status" "0: no error,1: detect error"
line.long 0x4 "IMRAM1ERRCTR,This register controls the assertion of the internal TLBRAM (Short Descriptor Table) error notification signal to MFIS."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
newline
bitfld.long 0x4 15. "L2UC7,L2 TLB-RAM7 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 14. "L2C7,L2 TLB-RAM7 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 13. "L2UC6,L2 TLB-RAM6 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 12. "L2C6,L2 TLB-RAM6 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 11. "L2UC5,L2 TLB-RAM5 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 10. "L2C5,L2 TLB-RAM5 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 9. "L2UC4,L2 TLB-RAM4 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 8. "L2C4,L2 TLB-RAM4 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 7. "L2UC3,L2 TLB-RAM3 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 6. "L2C3,L2 TLB-RAM3 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 5. "L2UC2,L2 TLB-RAM2 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 4. "L2C2,L2 TLB-RAM2 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 3. "L2UC1,L2 TLB-RAM1 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 2. "L2C1,L2 TLB-RAM1 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 1. "L2UC0,L2 TLB-RAM0 EDC 2-bit error detect enable" "0: disable error detection,1: enable error detection"
newline
bitfld.long 0x4 0. "L2C0,L2 TLB-RAM0 EDC 1-bit error detect enable" "0: disable error detection,1: enable error detection"
line.long 0x8 "IMRAM1ERRSTR,This register indicates the error status of the internal TLBRAM (Short Descriptor Table)."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
newline
bitfld.long 0x8 15. "L2UC7,L2 TLB-RAM7 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x8 14. "L2C7,L2 TLB-RAM7 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x8 13. "L2UC6,L2 TLB-RAM6 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x8 12. "L2C6,L2 TLB-RAM6 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x8 11. "L2UC5,L2 TLB-RAM5 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x8 10. "L2C5,L2 TLB-RAM5 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x8 9. "L2UC4,L2 TLB-RAM4 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x8 8. "L2C4,L2 TLB-RAM4 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x8 7. "L2UC3,L2 TLB-RAM3 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x8 6. "L2C3,L2 TLB-RAM3 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x8 5. "L2UC2,L2 TLB-RAM2 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x8 4. "L2C2,L2 TLB-RAM2 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x8 3. "L2UC1,L2 TLB-RAM1 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x8 2. "L2C1,L2 TLB-RAM1 EDC 1-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x8 1. "L2UC0,L2 TLB-RAM0 EDC 2-bit error status" "0: no error,1: detect error"
newline
bitfld.long 0x8 0. "L2C0,L2 TLB-RAM0 EDC 1-bit error status" "0: no error,1: detect error"
group.long 0x1500++0x7
line.long 0x0 "IMSCTLR,This register controls the behavior of IPMMU function."
bitfld.long 0x0 31. "DISWPROT,Read and Write protection of MMU System Control Register and MMU auxiliary Control register" "0: can write IMSCTLR,1: can write/read IMSCTLR"
newline
bitfld.long 0x0 30. "NSACCEN,Non-secure access enable for MMU System Control Register and MMU auxiliary Control register" "0: disable non-secure access,1: enable non-secure access"
newline
rbitfld.long 0x0 29. "Reserved_29,Reserved" "0,1"
newline
bitfld.long 0x0 28. "USE_SECGRP,Use security group to judge Secure/Non-secure access" "0,1"
newline
hexmask.long 0x0 0.--27. 1. "Reserved_0,Reserved"
line.long 0x4 "IMSAUXCTLR,This register controls the behavior of IPMMU function. This register is supported in main IPMMU only."
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved"
newline
bitfld.long 0x4 25. "MHINT40,disable the double_quotationhintdouble_quotation field in long descriptor format" "0: enable the hint field,1: disable the hint field"
newline
bitfld.long 0x4 24. "NMERGE40,disable merge for the adjacent TLB entry in long descriptor format" "0: enable merge for the adjacent TLB entry,1: disable merge for the adjacent TLB entry"
newline
hexmask.long.byte 0x4 17.--23. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x4 16. "NMERGE32,disable merge for the adjacent TLB entry in short descriptor format" "0: enable merge for the adjacent TLB entry,1: disable merge for the adjacent TLB entry"
newline
hexmask.long.word 0x4 4.--15. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x4 3. "S2PTE,support stage 2 translation table format" "0: use stage 1 translation table format when stage..,1: use stage 2 translation table format when stage.."
newline
rbitfld.long 0x4 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
group.long 0x1580++0x3
line.long 0x0 "IMPFMCTR,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 12.--13. "MD,Monitor Mode" "0: Monitor all 40-bit MMUs,1: Monitor all 32-bit MMUs,?,?"
newline
hexmask.long.byte 0x0 8.--11. 1. "SEL,When MD is B'11  SEL indicates the MMU table number to be monitored."
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "RST,Reset all status and counter values." "0,1"
newline
bitfld.long 0x0 0. "EN,Performance Monitor Enable" "0: Stop to count,1: Start to count"
rgroup.long 0x1590++0xF
line.long 0x0 "IMPFMTOTAL,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x0 0.--23. 1. "TOTAL,The total number of translation requests"
line.long 0x4 "IMPFMHIT,"
hexmask.long.byte 0x4 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x4 0.--23. 1. "HIT,The total number of TLB hit requests"
line.long 0x8 "IMPFML3MISS,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x8 0.--23. 1. "L3MISS,The total number of L3 miss requests (not including L2 miss and L1 miss)"
line.long 0xC "IMPFML2MISS,"
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0xC 0.--23. 1. "L2MISS,The total number of L2 miss requests (not including L1 miss)"
group.long 0x10000++0x3
line.long 0x0 "IMCTR0,Note: n= 0 to 15 (IPMMU context)"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 29. "VA64,AArch64 support" "0: VMSAv8-32 mode,1: VMSAv8-64 mode"
newline
hexmask.long.word 0x0 18.--28. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "TRE,TEX Remap Enable" "0: TEX remap disabled,1: TEX remap enabled"
newline
bitfld.long 0x0 16. "AFE,Access Flag Enable" "0: Behave as if AF bit is always set to 1,1: Enable software management of the Access Flag"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.byte 0x0 8.--14. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "RTSEL,Retranslation Table Select"
newline
bitfld.long 0x0 3. "TREN,MMU Retranslation Enable" "0: Output PA as a physical address,1: Output PA as an intermediate physical address to.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x10008++0x3
line.long 0x0 "IMTTBCR0,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "PMB,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x10008++0x3
line.long 0x0 "IMTTBCR0_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "BYPEN,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x10010++0x13
line.long 0x0 "IMTTLBR00,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x0 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x0 0.--11. 1. "Reserved_0,Reserved"
line.long 0x4 "IMTTUBR00,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x8 "IMTTLBR10,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x8 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x8 0.--11. 1. "Reserved_0,Reserved"
line.long 0xC "IMTTUBR10,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x10 "IMSTR0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x10 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x10 12.--13. "ERRLVL,indicate which level of page table walk caused the error." "0: Level1 page table walk,1: Level2 page table walk,?,?"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x10 8.--10. "ERRCODE,Indicate error type. ERRCODE is set only during page table walk." "?,1: Translation Fault,?,?,?,?,?,?"
newline
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "MHIT,TLB Conflict Fault" "0,1"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x10 2. "ABORT,This bit is set to 1 when the IPMMU received an error response during a page table walk." "0,1"
newline
bitfld.long 0x10 1. "PF,Permission Fault" "0,1"
newline
bitfld.long 0x10 0. "TF,Translation Fault" "0,1"
group.long 0x10028++0x3
line.long 0x0 "IMMAIR00,(Short-descriptor translation format)"
hexmask.long.byte 0x0 24.--31. 1. "NOS7_0,Outer Shareable property mapping for memory attributes n."
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x0 19. "NS1,Mapping of S = 1 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 18. "NS0,Mapping of S = 0 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 17. "DS1,Mapping of S = 1 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 16. "DS0,Mapping of S = 0 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 14.--15. "TR7,Primary TEX mapping for memory attributes 7. 7 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 12.--13. "TR6,Primary TEX mapping for memory attributes 6. 6 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 10.--11. "TR5,Primary TEX mapping for memory attributes 5. 5 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 8.--9. "TR4,Primary TEX mapping for memory attributes 4. 4 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 6.--7. "TR3,Primary TEX mapping for memory attributes 3. 3 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 4.--5. "TR2,Primary TEX mapping for memory attributes 2. 2 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 2.--3. "TR1,Primary TEX mapping for memory attributes 1. 1 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 0.--1. "TR0,Primary TEX mapping for memory attributes 0. 0 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
group.long 0x10028++0x7
line.long 0x0 "IMMAIR00_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR3,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR2,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR1,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR0,The memory attribute encoding for an AttrIndx[2:0] entry."
line.long 0x4 "IMMAIR10,(Short-descriptor translation format)"
bitfld.long 0x4 30.--31. "OR7,Outer Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 28.--29. "OR6,Outer Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 26.--27. "OR5,Outer Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 24.--25. "OR4,Outer Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 22.--23. "OR3,Outer Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 20.--21. "OR2,Outer Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 18.--19. "OR1,Outer Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 16.--17. "OR0,Outer Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 14.--15. "IR7,Inner Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 12.--13. "IR6,Inner Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 10.--11. "IR5,Inner Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 8.--9. "IR4,Inner Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 6.--7. "IR3,Inner Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 4.--5. "IR2,Inner Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 2.--3. "IR1,Inner Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 0.--1. "IR0,Inner Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
group.long 0x1002C++0x3
line.long 0x0 "IMMAIR10_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR7,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR6,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR5,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR4,The memory attribute encoding for an AttrIndx[2:0] entry."
rgroup.long 0x10030++0x7
line.long 0x0 "IMELAR0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
line.long 0x4 "IMEUAR0,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0x10040++0x3
line.long 0x0 "IMSEC,This register controls the attribute of secure/non-secure for MMU. This register can be accessed by the master which operates on secure-mode only. When non-secure master accesses to this regiser. write access is ignored."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "SEC,SEC[n]=0 : IMCTRn~IMERIDn is Non-secure"
group.long 0x11040++0x3
line.long 0x0 "IMCTR1,Note: n= 0 to 15 (IPMMU context)"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 29. "VA64,AArch64 support" "0: VMSAv8-32 mode,1: VMSAv8-64 mode"
newline
hexmask.long.word 0x0 18.--28. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "TRE,TEX Remap Enable" "0: TEX remap disabled,1: TEX remap enabled"
newline
bitfld.long 0x0 16. "AFE,Access Flag Enable" "0: Behave as if AF bit is always set to 1,1: Enable software management of the Access Flag"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.byte 0x0 8.--14. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "RTSEL,Retranslation Table Select"
newline
bitfld.long 0x0 3. "TREN,MMU Retranslation Enable" "0: Output PA as a physical address,1: Output PA as an intermediate physical address to.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x11048++0x3
line.long 0x0 "IMTTBCR1,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "PMB,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x11048++0x3
line.long 0x0 "IMTTBCR1_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "BYPEN,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x11050++0x13
line.long 0x0 "IMTTLBR01,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x0 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x0 0.--11. 1. "Reserved_0,Reserved"
line.long 0x4 "IMTTUBR01,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x8 "IMTTLBR11,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x8 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x8 0.--11. 1. "Reserved_0,Reserved"
line.long 0xC "IMTTUBR11,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x10 "IMSTR1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x10 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x10 12.--13. "ERRLVL,indicate which level of page table walk caused the error." "0: Level1 page table walk,1: Level2 page table walk,?,?"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x10 8.--10. "ERRCODE,Indicate error type. ERRCODE is set only during page table walk." "?,1: Translation Fault,?,?,?,?,?,?"
newline
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "MHIT,TLB Conflict Fault" "0,1"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x10 2. "ABORT,This bit is set to 1 when the IPMMU received an error response during a page table walk." "0,1"
newline
bitfld.long 0x10 1. "PF,Permission Fault" "0,1"
newline
bitfld.long 0x10 0. "TF,Translation Fault" "0,1"
group.long 0x11068++0x3
line.long 0x0 "IMMAIR01,(Short-descriptor translation format)"
hexmask.long.byte 0x0 24.--31. 1. "NOS7_0,Outer Shareable property mapping for memory attributes n."
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x0 19. "NS1,Mapping of S = 1 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 18. "NS0,Mapping of S = 0 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 17. "DS1,Mapping of S = 1 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 16. "DS0,Mapping of S = 0 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 14.--15. "TR7,Primary TEX mapping for memory attributes 7. 7 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 12.--13. "TR6,Primary TEX mapping for memory attributes 6. 6 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 10.--11. "TR5,Primary TEX mapping for memory attributes 5. 5 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 8.--9. "TR4,Primary TEX mapping for memory attributes 4. 4 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 6.--7. "TR3,Primary TEX mapping for memory attributes 3. 3 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 4.--5. "TR2,Primary TEX mapping for memory attributes 2. 2 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 2.--3. "TR1,Primary TEX mapping for memory attributes 1. 1 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 0.--1. "TR0,Primary TEX mapping for memory attributes 0. 0 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
group.long 0x11068++0x7
line.long 0x0 "IMMAIR01_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR3,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR2,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR1,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR0,The memory attribute encoding for an AttrIndx[2:0] entry."
line.long 0x4 "IMMAIR11,(Short-descriptor translation format)"
bitfld.long 0x4 30.--31. "OR7,Outer Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 28.--29. "OR6,Outer Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 26.--27. "OR5,Outer Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 24.--25. "OR4,Outer Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 22.--23. "OR3,Outer Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 20.--21. "OR2,Outer Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 18.--19. "OR1,Outer Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 16.--17. "OR0,Outer Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 14.--15. "IR7,Inner Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 12.--13. "IR6,Inner Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 10.--11. "IR5,Inner Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 8.--9. "IR4,Inner Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 6.--7. "IR3,Inner Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 4.--5. "IR2,Inner Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 2.--3. "IR1,Inner Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 0.--1. "IR0,Inner Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
group.long 0x1106C++0x3
line.long 0x0 "IMMAIR11_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR7,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR6,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR5,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR4,The memory attribute encoding for an AttrIndx[2:0] entry."
rgroup.long 0x11070++0x7
line.long 0x0 "IMELAR1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
line.long 0x4 "IMEUAR1,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0x12080++0x3
line.long 0x0 "IMCTR2,Note: n= 0 to 15 (IPMMU context)"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 29. "VA64,AArch64 support" "0: VMSAv8-32 mode,1: VMSAv8-64 mode"
newline
hexmask.long.word 0x0 18.--28. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "TRE,TEX Remap Enable" "0: TEX remap disabled,1: TEX remap enabled"
newline
bitfld.long 0x0 16. "AFE,Access Flag Enable" "0: Behave as if AF bit is always set to 1,1: Enable software management of the Access Flag"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.byte 0x0 8.--14. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "RTSEL,Retranslation Table Select"
newline
bitfld.long 0x0 3. "TREN,MMU Retranslation Enable" "0: Output PA as a physical address,1: Output PA as an intermediate physical address to.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x12088++0x3
line.long 0x0 "IMTTBCR2,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "PMB,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x12088++0x3
line.long 0x0 "IMTTBCR2_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "BYPEN,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x12090++0x13
line.long 0x0 "IMTTLBR02,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x0 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x0 0.--11. 1. "Reserved_0,Reserved"
line.long 0x4 "IMTTUBR02,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x8 "IMTTLBR12,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x8 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x8 0.--11. 1. "Reserved_0,Reserved"
line.long 0xC "IMTTUBR12,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x10 "IMSTR2,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x10 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x10 12.--13. "ERRLVL,indicate which level of page table walk caused the error." "0: Level1 page table walk,1: Level2 page table walk,?,?"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x10 8.--10. "ERRCODE,Indicate error type. ERRCODE is set only during page table walk." "?,1: Translation Fault,?,?,?,?,?,?"
newline
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "MHIT,TLB Conflict Fault" "0,1"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x10 2. "ABORT,This bit is set to 1 when the IPMMU received an error response during a page table walk." "0,1"
newline
bitfld.long 0x10 1. "PF,Permission Fault" "0,1"
newline
bitfld.long 0x10 0. "TF,Translation Fault" "0,1"
group.long 0x120A8++0x3
line.long 0x0 "IMMAIR02,(Short-descriptor translation format)"
hexmask.long.byte 0x0 24.--31. 1. "NOS7_0,Outer Shareable property mapping for memory attributes n."
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x0 19. "NS1,Mapping of S = 1 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 18. "NS0,Mapping of S = 0 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 17. "DS1,Mapping of S = 1 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 16. "DS0,Mapping of S = 0 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 14.--15. "TR7,Primary TEX mapping for memory attributes 7. 7 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 12.--13. "TR6,Primary TEX mapping for memory attributes 6. 6 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 10.--11. "TR5,Primary TEX mapping for memory attributes 5. 5 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 8.--9. "TR4,Primary TEX mapping for memory attributes 4. 4 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 6.--7. "TR3,Primary TEX mapping for memory attributes 3. 3 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 4.--5. "TR2,Primary TEX mapping for memory attributes 2. 2 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 2.--3. "TR1,Primary TEX mapping for memory attributes 1. 1 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 0.--1. "TR0,Primary TEX mapping for memory attributes 0. 0 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
group.long 0x120A8++0x7
line.long 0x0 "IMMAIR02_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR3,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR2,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR1,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR0,The memory attribute encoding for an AttrIndx[2:0] entry."
line.long 0x4 "IMMAIR12,(Short-descriptor translation format)"
bitfld.long 0x4 30.--31. "OR7,Outer Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 28.--29. "OR6,Outer Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 26.--27. "OR5,Outer Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 24.--25. "OR4,Outer Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 22.--23. "OR3,Outer Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 20.--21. "OR2,Outer Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 18.--19. "OR1,Outer Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 16.--17. "OR0,Outer Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 14.--15. "IR7,Inner Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 12.--13. "IR6,Inner Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 10.--11. "IR5,Inner Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 8.--9. "IR4,Inner Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 6.--7. "IR3,Inner Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 4.--5. "IR2,Inner Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 2.--3. "IR1,Inner Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 0.--1. "IR0,Inner Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
group.long 0x120AC++0x3
line.long 0x0 "IMMAIR12_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR7,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR6,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR5,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR4,The memory attribute encoding for an AttrIndx[2:0] entry."
rgroup.long 0x120B0++0x7
line.long 0x0 "IMELAR2,Note: n= 0 to 15 (IPMMU context)"
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
line.long 0x4 "IMEUAR2,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0x130C0++0x3
line.long 0x0 "IMCTR3,Note: n= 0 to 15 (IPMMU context)"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 29. "VA64,AArch64 support" "0: VMSAv8-32 mode,1: VMSAv8-64 mode"
newline
hexmask.long.word 0x0 18.--28. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "TRE,TEX Remap Enable" "0: TEX remap disabled,1: TEX remap enabled"
newline
bitfld.long 0x0 16. "AFE,Access Flag Enable" "0: Behave as if AF bit is always set to 1,1: Enable software management of the Access Flag"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.byte 0x0 8.--14. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "RTSEL,Retranslation Table Select"
newline
bitfld.long 0x0 3. "TREN,MMU Retranslation Enable" "0: Output PA as a physical address,1: Output PA as an intermediate physical address to.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x130C8++0x3
line.long 0x0 "IMTTBCR3,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "PMB,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x130C8++0x3
line.long 0x0 "IMTTBCR3_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "BYPEN,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x130D0++0x13
line.long 0x0 "IMTTLBR03,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x0 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x0 0.--11. 1. "Reserved_0,Reserved"
line.long 0x4 "IMTTUBR03,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x8 "IMTTLBR13,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x8 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x8 0.--11. 1. "Reserved_0,Reserved"
line.long 0xC "IMTTUBR13,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x10 "IMSTR3,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x10 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x10 12.--13. "ERRLVL,indicate which level of page table walk caused the error." "0: Level1 page table walk,1: Level2 page table walk,?,?"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x10 8.--10. "ERRCODE,Indicate error type. ERRCODE is set only during page table walk." "?,1: Translation Fault,?,?,?,?,?,?"
newline
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "MHIT,TLB Conflict Fault" "0,1"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x10 2. "ABORT,This bit is set to 1 when the IPMMU received an error response during a page table walk." "0,1"
newline
bitfld.long 0x10 1. "PF,Permission Fault" "0,1"
newline
bitfld.long 0x10 0. "TF,Translation Fault" "0,1"
group.long 0x130E8++0x3
line.long 0x0 "IMMAIR03,(Short-descriptor translation format)"
hexmask.long.byte 0x0 24.--31. 1. "NOS7_0,Outer Shareable property mapping for memory attributes n."
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x0 19. "NS1,Mapping of S = 1 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 18. "NS0,Mapping of S = 0 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 17. "DS1,Mapping of S = 1 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 16. "DS0,Mapping of S = 0 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 14.--15. "TR7,Primary TEX mapping for memory attributes 7. 7 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 12.--13. "TR6,Primary TEX mapping for memory attributes 6. 6 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 10.--11. "TR5,Primary TEX mapping for memory attributes 5. 5 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 8.--9. "TR4,Primary TEX mapping for memory attributes 4. 4 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 6.--7. "TR3,Primary TEX mapping for memory attributes 3. 3 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 4.--5. "TR2,Primary TEX mapping for memory attributes 2. 2 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 2.--3. "TR1,Primary TEX mapping for memory attributes 1. 1 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 0.--1. "TR0,Primary TEX mapping for memory attributes 0. 0 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
group.long 0x130E8++0x7
line.long 0x0 "IMMAIR03_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR3,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR2,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR1,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR0,The memory attribute encoding for an AttrIndx[2:0] entry."
line.long 0x4 "IMMAIR13,(Short-descriptor translation format)"
bitfld.long 0x4 30.--31. "OR7,Outer Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 28.--29. "OR6,Outer Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 26.--27. "OR5,Outer Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 24.--25. "OR4,Outer Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 22.--23. "OR3,Outer Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 20.--21. "OR2,Outer Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 18.--19. "OR1,Outer Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 16.--17. "OR0,Outer Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 14.--15. "IR7,Inner Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 12.--13. "IR6,Inner Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 10.--11. "IR5,Inner Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 8.--9. "IR4,Inner Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 6.--7. "IR3,Inner Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 4.--5. "IR2,Inner Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 2.--3. "IR1,Inner Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 0.--1. "IR0,Inner Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
group.long 0x130EC++0x3
line.long 0x0 "IMMAIR13_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR7,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR6,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR5,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR4,The memory attribute encoding for an AttrIndx[2:0] entry."
rgroup.long 0x130F0++0x7
line.long 0x0 "IMELAR3,Note: n= 0 to 15 (IPMMU context)"
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
line.long 0x4 "IMEUAR3,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0x14100++0x3
line.long 0x0 "IMCTR4,Note: n= 0 to 15 (IPMMU context)"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 29. "VA64,AArch64 support" "0: VMSAv8-32 mode,1: VMSAv8-64 mode"
newline
hexmask.long.word 0x0 18.--28. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "TRE,TEX Remap Enable" "0: TEX remap disabled,1: TEX remap enabled"
newline
bitfld.long 0x0 16. "AFE,Access Flag Enable" "0: Behave as if AF bit is always set to 1,1: Enable software management of the Access Flag"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.byte 0x0 8.--14. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "RTSEL,Retranslation Table Select"
newline
bitfld.long 0x0 3. "TREN,MMU Retranslation Enable" "0: Output PA as a physical address,1: Output PA as an intermediate physical address to.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x14108++0x3
line.long 0x0 "IMTTBCR4,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "PMB,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x14108++0x3
line.long 0x0 "IMTTBCR4_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "BYPEN,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x14110++0x13
line.long 0x0 "IMTTLBR04,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x0 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x0 0.--11. 1. "Reserved_0,Reserved"
line.long 0x4 "IMTTUBR04,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x8 "IMTTLBR14,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x8 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x8 0.--11. 1. "Reserved_0,Reserved"
line.long 0xC "IMTTUBR14,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x10 "IMSTR4,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x10 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x10 12.--13. "ERRLVL,indicate which level of page table walk caused the error." "0: Level1 page table walk,1: Level2 page table walk,?,?"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x10 8.--10. "ERRCODE,Indicate error type. ERRCODE is set only during page table walk." "?,1: Translation Fault,?,?,?,?,?,?"
newline
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "MHIT,TLB Conflict Fault" "0,1"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x10 2. "ABORT,This bit is set to 1 when the IPMMU received an error response during a page table walk." "0,1"
newline
bitfld.long 0x10 1. "PF,Permission Fault" "0,1"
newline
bitfld.long 0x10 0. "TF,Translation Fault" "0,1"
group.long 0x14128++0x3
line.long 0x0 "IMMAIR04,(Short-descriptor translation format)"
hexmask.long.byte 0x0 24.--31. 1. "NOS7_0,Outer Shareable property mapping for memory attributes n."
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x0 19. "NS1,Mapping of S = 1 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 18. "NS0,Mapping of S = 0 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 17. "DS1,Mapping of S = 1 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 16. "DS0,Mapping of S = 0 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 14.--15. "TR7,Primary TEX mapping for memory attributes 7. 7 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 12.--13. "TR6,Primary TEX mapping for memory attributes 6. 6 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 10.--11. "TR5,Primary TEX mapping for memory attributes 5. 5 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 8.--9. "TR4,Primary TEX mapping for memory attributes 4. 4 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 6.--7. "TR3,Primary TEX mapping for memory attributes 3. 3 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 4.--5. "TR2,Primary TEX mapping for memory attributes 2. 2 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 2.--3. "TR1,Primary TEX mapping for memory attributes 1. 1 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 0.--1. "TR0,Primary TEX mapping for memory attributes 0. 0 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
group.long 0x14128++0x7
line.long 0x0 "IMMAIR04_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR3,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR2,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR1,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR0,The memory attribute encoding for an AttrIndx[2:0] entry."
line.long 0x4 "IMMAIR14,(Short-descriptor translation format)"
bitfld.long 0x4 30.--31. "OR7,Outer Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 28.--29. "OR6,Outer Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 26.--27. "OR5,Outer Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 24.--25. "OR4,Outer Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 22.--23. "OR3,Outer Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 20.--21. "OR2,Outer Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 18.--19. "OR1,Outer Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 16.--17. "OR0,Outer Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 14.--15. "IR7,Inner Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 12.--13. "IR6,Inner Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 10.--11. "IR5,Inner Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 8.--9. "IR4,Inner Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 6.--7. "IR3,Inner Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 4.--5. "IR2,Inner Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 2.--3. "IR1,Inner Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 0.--1. "IR0,Inner Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
group.long 0x1412C++0x3
line.long 0x0 "IMMAIR14_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR7,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR6,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR5,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR4,The memory attribute encoding for an AttrIndx[2:0] entry."
rgroup.long 0x14130++0x7
line.long 0x0 "IMELAR4,Note: n= 0 to 15 (IPMMU context)"
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
line.long 0x4 "IMEUAR4,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0x15140++0x3
line.long 0x0 "IMCTR5,Note: n= 0 to 15 (IPMMU context)"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 29. "VA64,AArch64 support" "0: VMSAv8-32 mode,1: VMSAv8-64 mode"
newline
hexmask.long.word 0x0 18.--28. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "TRE,TEX Remap Enable" "0: TEX remap disabled,1: TEX remap enabled"
newline
bitfld.long 0x0 16. "AFE,Access Flag Enable" "0: Behave as if AF bit is always set to 1,1: Enable software management of the Access Flag"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.byte 0x0 8.--14. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "RTSEL,Retranslation Table Select"
newline
bitfld.long 0x0 3. "TREN,MMU Retranslation Enable" "0: Output PA as a physical address,1: Output PA as an intermediate physical address to.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x15148++0x3
line.long 0x0 "IMTTBCR5,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "PMB,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x15148++0x3
line.long 0x0 "IMTTBCR5_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "BYPEN,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x15150++0x13
line.long 0x0 "IMTTLBR05,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x0 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x0 0.--11. 1. "Reserved_0,Reserved"
line.long 0x4 "IMTTUBR05,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x8 "IMTTLBR15,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x8 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x8 0.--11. 1. "Reserved_0,Reserved"
line.long 0xC "IMTTUBR15,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x10 "IMSTR5,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x10 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x10 12.--13. "ERRLVL,indicate which level of page table walk caused the error." "0: Level1 page table walk,1: Level2 page table walk,?,?"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x10 8.--10. "ERRCODE,Indicate error type. ERRCODE is set only during page table walk." "?,1: Translation Fault,?,?,?,?,?,?"
newline
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "MHIT,TLB Conflict Fault" "0,1"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x10 2. "ABORT,This bit is set to 1 when the IPMMU received an error response during a page table walk." "0,1"
newline
bitfld.long 0x10 1. "PF,Permission Fault" "0,1"
newline
bitfld.long 0x10 0. "TF,Translation Fault" "0,1"
group.long 0x15168++0x3
line.long 0x0 "IMMAIR05,(Short-descriptor translation format)"
hexmask.long.byte 0x0 24.--31. 1. "NOS7_0,Outer Shareable property mapping for memory attributes n."
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x0 19. "NS1,Mapping of S = 1 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 18. "NS0,Mapping of S = 0 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 17. "DS1,Mapping of S = 1 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 16. "DS0,Mapping of S = 0 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 14.--15. "TR7,Primary TEX mapping for memory attributes 7. 7 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 12.--13. "TR6,Primary TEX mapping for memory attributes 6. 6 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 10.--11. "TR5,Primary TEX mapping for memory attributes 5. 5 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 8.--9. "TR4,Primary TEX mapping for memory attributes 4. 4 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 6.--7. "TR3,Primary TEX mapping for memory attributes 3. 3 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 4.--5. "TR2,Primary TEX mapping for memory attributes 2. 2 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 2.--3. "TR1,Primary TEX mapping for memory attributes 1. 1 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 0.--1. "TR0,Primary TEX mapping for memory attributes 0. 0 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
group.long 0x15168++0x7
line.long 0x0 "IMMAIR05_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR3,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR2,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR1,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR0,The memory attribute encoding for an AttrIndx[2:0] entry."
line.long 0x4 "IMMAIR15,(Short-descriptor translation format)"
bitfld.long 0x4 30.--31. "OR7,Outer Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 28.--29. "OR6,Outer Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 26.--27. "OR5,Outer Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 24.--25. "OR4,Outer Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 22.--23. "OR3,Outer Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 20.--21. "OR2,Outer Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 18.--19. "OR1,Outer Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 16.--17. "OR0,Outer Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 14.--15. "IR7,Inner Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 12.--13. "IR6,Inner Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 10.--11. "IR5,Inner Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 8.--9. "IR4,Inner Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 6.--7. "IR3,Inner Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 4.--5. "IR2,Inner Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 2.--3. "IR1,Inner Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 0.--1. "IR0,Inner Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
group.long 0x1516C++0x3
line.long 0x0 "IMMAIR15_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR7,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR6,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR5,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR4,The memory attribute encoding for an AttrIndx[2:0] entry."
rgroup.long 0x15170++0x7
line.long 0x0 "IMELAR5,Note: n= 0 to 15 (IPMMU context)"
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
line.long 0x4 "IMEUAR5,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0x16180++0x3
line.long 0x0 "IMCTR6,Note: n= 0 to 15 (IPMMU context)"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 29. "VA64,AArch64 support" "0: VMSAv8-32 mode,1: VMSAv8-64 mode"
newline
hexmask.long.word 0x0 18.--28. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "TRE,TEX Remap Enable" "0: TEX remap disabled,1: TEX remap enabled"
newline
bitfld.long 0x0 16. "AFE,Access Flag Enable" "0: Behave as if AF bit is always set to 1,1: Enable software management of the Access Flag"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.byte 0x0 8.--14. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "RTSEL,Retranslation Table Select"
newline
bitfld.long 0x0 3. "TREN,MMU Retranslation Enable" "0: Output PA as a physical address,1: Output PA as an intermediate physical address to.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x16188++0x3
line.long 0x0 "IMTTBCR6,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "PMB,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x16188++0x3
line.long 0x0 "IMTTBCR6_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "BYPEN,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x16190++0x13
line.long 0x0 "IMTTLBR06,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x0 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x0 0.--11. 1. "Reserved_0,Reserved"
line.long 0x4 "IMTTUBR06,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x8 "IMTTLBR16,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x8 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x8 0.--11. 1. "Reserved_0,Reserved"
line.long 0xC "IMTTUBR16,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x10 "IMSTR6,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x10 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x10 12.--13. "ERRLVL,indicate which level of page table walk caused the error." "0: Level1 page table walk,1: Level2 page table walk,?,?"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x10 8.--10. "ERRCODE,Indicate error type. ERRCODE is set only during page table walk." "?,1: Translation Fault,?,?,?,?,?,?"
newline
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "MHIT,TLB Conflict Fault" "0,1"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x10 2. "ABORT,This bit is set to 1 when the IPMMU received an error response during a page table walk." "0,1"
newline
bitfld.long 0x10 1. "PF,Permission Fault" "0,1"
newline
bitfld.long 0x10 0. "TF,Translation Fault" "0,1"
group.long 0x161A8++0x3
line.long 0x0 "IMMAIR06,(Short-descriptor translation format)"
hexmask.long.byte 0x0 24.--31. 1. "NOS7_0,Outer Shareable property mapping for memory attributes n."
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x0 19. "NS1,Mapping of S = 1 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 18. "NS0,Mapping of S = 0 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 17. "DS1,Mapping of S = 1 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 16. "DS0,Mapping of S = 0 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 14.--15. "TR7,Primary TEX mapping for memory attributes 7. 7 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 12.--13. "TR6,Primary TEX mapping for memory attributes 6. 6 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 10.--11. "TR5,Primary TEX mapping for memory attributes 5. 5 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 8.--9. "TR4,Primary TEX mapping for memory attributes 4. 4 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 6.--7. "TR3,Primary TEX mapping for memory attributes 3. 3 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 4.--5. "TR2,Primary TEX mapping for memory attributes 2. 2 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 2.--3. "TR1,Primary TEX mapping for memory attributes 1. 1 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 0.--1. "TR0,Primary TEX mapping for memory attributes 0. 0 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
group.long 0x161A8++0x7
line.long 0x0 "IMMAIR06_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR3,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR2,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR1,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR0,The memory attribute encoding for an AttrIndx[2:0] entry."
line.long 0x4 "IMMAIR16,(Short-descriptor translation format)"
bitfld.long 0x4 30.--31. "OR7,Outer Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 28.--29. "OR6,Outer Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 26.--27. "OR5,Outer Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 24.--25. "OR4,Outer Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 22.--23. "OR3,Outer Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 20.--21. "OR2,Outer Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 18.--19. "OR1,Outer Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 16.--17. "OR0,Outer Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 14.--15. "IR7,Inner Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 12.--13. "IR6,Inner Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 10.--11. "IR5,Inner Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 8.--9. "IR4,Inner Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 6.--7. "IR3,Inner Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 4.--5. "IR2,Inner Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 2.--3. "IR1,Inner Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 0.--1. "IR0,Inner Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
group.long 0x161AC++0x3
line.long 0x0 "IMMAIR16_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR7,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR6,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR5,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR4,The memory attribute encoding for an AttrIndx[2:0] entry."
rgroup.long 0x161B0++0x7
line.long 0x0 "IMELAR6,Note: n= 0 to 15 (IPMMU context)"
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
line.long 0x4 "IMEUAR6,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0x171C0++0x3
line.long 0x0 "IMCTR7,Note: n= 0 to 15 (IPMMU context)"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 29. "VA64,AArch64 support" "0: VMSAv8-32 mode,1: VMSAv8-64 mode"
newline
hexmask.long.word 0x0 18.--28. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "TRE,TEX Remap Enable" "0: TEX remap disabled,1: TEX remap enabled"
newline
bitfld.long 0x0 16. "AFE,Access Flag Enable" "0: Behave as if AF bit is always set to 1,1: Enable software management of the Access Flag"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.byte 0x0 8.--14. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "RTSEL,Retranslation Table Select"
newline
bitfld.long 0x0 3. "TREN,MMU Retranslation Enable" "0: Output PA as a physical address,1: Output PA as an intermediate physical address to.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x171C8++0x3
line.long 0x0 "IMTTBCR7,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "PMB,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x171C8++0x3
line.long 0x0 "IMTTBCR7_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "BYPEN,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x171D0++0x13
line.long 0x0 "IMTTLBR07,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x0 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x0 0.--11. 1. "Reserved_0,Reserved"
line.long 0x4 "IMTTUBR07,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x8 "IMTTLBR17,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x8 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x8 0.--11. 1. "Reserved_0,Reserved"
line.long 0xC "IMTTUBR17,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x10 "IMSTR7,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x10 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x10 12.--13. "ERRLVL,indicate which level of page table walk caused the error." "0: Level1 page table walk,1: Level2 page table walk,?,?"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x10 8.--10. "ERRCODE,Indicate error type. ERRCODE is set only during page table walk." "?,1: Translation Fault,?,?,?,?,?,?"
newline
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "MHIT,TLB Conflict Fault" "0,1"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x10 2. "ABORT,This bit is set to 1 when the IPMMU received an error response during a page table walk." "0,1"
newline
bitfld.long 0x10 1. "PF,Permission Fault" "0,1"
newline
bitfld.long 0x10 0. "TF,Translation Fault" "0,1"
group.long 0x171E8++0x3
line.long 0x0 "IMMAIR07,(Short-descriptor translation format)"
hexmask.long.byte 0x0 24.--31. 1. "NOS7_0,Outer Shareable property mapping for memory attributes n."
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x0 19. "NS1,Mapping of S = 1 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 18. "NS0,Mapping of S = 0 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 17. "DS1,Mapping of S = 1 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 16. "DS0,Mapping of S = 0 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 14.--15. "TR7,Primary TEX mapping for memory attributes 7. 7 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 12.--13. "TR6,Primary TEX mapping for memory attributes 6. 6 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 10.--11. "TR5,Primary TEX mapping for memory attributes 5. 5 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 8.--9. "TR4,Primary TEX mapping for memory attributes 4. 4 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 6.--7. "TR3,Primary TEX mapping for memory attributes 3. 3 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 4.--5. "TR2,Primary TEX mapping for memory attributes 2. 2 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 2.--3. "TR1,Primary TEX mapping for memory attributes 1. 1 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 0.--1. "TR0,Primary TEX mapping for memory attributes 0. 0 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
group.long 0x171E8++0x7
line.long 0x0 "IMMAIR07_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR3,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR2,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR1,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR0,The memory attribute encoding for an AttrIndx[2:0] entry."
line.long 0x4 "IMMAIR17,(Short-descriptor translation format)"
bitfld.long 0x4 30.--31. "OR7,Outer Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 28.--29. "OR6,Outer Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 26.--27. "OR5,Outer Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 24.--25. "OR4,Outer Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 22.--23. "OR3,Outer Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 20.--21. "OR2,Outer Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 18.--19. "OR1,Outer Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 16.--17. "OR0,Outer Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 14.--15. "IR7,Inner Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 12.--13. "IR6,Inner Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 10.--11. "IR5,Inner Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 8.--9. "IR4,Inner Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 6.--7. "IR3,Inner Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 4.--5. "IR2,Inner Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 2.--3. "IR1,Inner Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 0.--1. "IR0,Inner Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
group.long 0x171EC++0x3
line.long 0x0 "IMMAIR17_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR7,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR6,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR5,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR4,The memory attribute encoding for an AttrIndx[2:0] entry."
rgroup.long 0x171F0++0x7
line.long 0x0 "IMELAR7,Note: n= 0 to 15 (IPMMU context)"
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
line.long 0x4 "IMEUAR7,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0x18800++0x3
line.long 0x0 "IMCTR8,Note: n= 0 to 15 (IPMMU context)"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 29. "VA64,AArch64 support" "0: VMSAv8-32 mode,1: VMSAv8-64 mode"
newline
hexmask.long.word 0x0 18.--28. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "TRE,TEX Remap Enable" "0: TEX remap disabled,1: TEX remap enabled"
newline
bitfld.long 0x0 16. "AFE,Access Flag Enable" "0: Behave as if AF bit is always set to 1,1: Enable software management of the Access Flag"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.byte 0x0 8.--14. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "RTSEL,Retranslation Table Select"
newline
bitfld.long 0x0 3. "TREN,MMU Retranslation Enable" "0: Output PA as a physical address,1: Output PA as an intermediate physical address to.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x18808++0x3
line.long 0x0 "IMTTBCR8,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "PMB,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x18808++0x3
line.long 0x0 "IMTTBCR8_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "BYPEN,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x18810++0x13
line.long 0x0 "IMTTLBR08,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x0 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x0 0.--11. 1. "Reserved_0,Reserved"
line.long 0x4 "IMTTUBR08,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x8 "IMTTLBR18,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x8 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x8 0.--11. 1. "Reserved_0,Reserved"
line.long 0xC "IMTTUBR18,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x10 "IMSTR8,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x10 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x10 12.--13. "ERRLVL,indicate which level of page table walk caused the error." "0: Level1 page table walk,1: Level2 page table walk,?,?"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x10 8.--10. "ERRCODE,Indicate error type. ERRCODE is set only during page table walk." "?,1: Translation Fault,?,?,?,?,?,?"
newline
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "MHIT,TLB Conflict Fault" "0,1"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x10 2. "ABORT,This bit is set to 1 when the IPMMU received an error response during a page table walk." "0,1"
newline
bitfld.long 0x10 1. "PF,Permission Fault" "0,1"
newline
bitfld.long 0x10 0. "TF,Translation Fault" "0,1"
group.long 0x18828++0x3
line.long 0x0 "IMMAIR08,(Short-descriptor translation format)"
hexmask.long.byte 0x0 24.--31. 1. "NOS7_0,Outer Shareable property mapping for memory attributes n."
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x0 19. "NS1,Mapping of S = 1 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 18. "NS0,Mapping of S = 0 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 17. "DS1,Mapping of S = 1 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 16. "DS0,Mapping of S = 0 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 14.--15. "TR7,Primary TEX mapping for memory attributes 7. 7 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 12.--13. "TR6,Primary TEX mapping for memory attributes 6. 6 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 10.--11. "TR5,Primary TEX mapping for memory attributes 5. 5 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 8.--9. "TR4,Primary TEX mapping for memory attributes 4. 4 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 6.--7. "TR3,Primary TEX mapping for memory attributes 3. 3 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 4.--5. "TR2,Primary TEX mapping for memory attributes 2. 2 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 2.--3. "TR1,Primary TEX mapping for memory attributes 1. 1 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 0.--1. "TR0,Primary TEX mapping for memory attributes 0. 0 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
group.long 0x18828++0x7
line.long 0x0 "IMMAIR08_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR3,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR2,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR1,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR0,The memory attribute encoding for an AttrIndx[2:0] entry."
line.long 0x4 "IMMAIR18,(Short-descriptor translation format)"
bitfld.long 0x4 30.--31. "OR7,Outer Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 28.--29. "OR6,Outer Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 26.--27. "OR5,Outer Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 24.--25. "OR4,Outer Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 22.--23. "OR3,Outer Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 20.--21. "OR2,Outer Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 18.--19. "OR1,Outer Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 16.--17. "OR0,Outer Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 14.--15. "IR7,Inner Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 12.--13. "IR6,Inner Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 10.--11. "IR5,Inner Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 8.--9. "IR4,Inner Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 6.--7. "IR3,Inner Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 4.--5. "IR2,Inner Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 2.--3. "IR1,Inner Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 0.--1. "IR0,Inner Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
group.long 0x1882C++0x3
line.long 0x0 "IMMAIR18_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR7,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR6,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR5,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR4,The memory attribute encoding for an AttrIndx[2:0] entry."
rgroup.long 0x18830++0x7
line.long 0x0 "IMELAR8,Note: n= 0 to 15 (IPMMU context)"
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
line.long 0x4 "IMEUAR8,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0x19840++0x3
line.long 0x0 "IMCTR9,Note: n= 0 to 15 (IPMMU context)"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 29. "VA64,AArch64 support" "0: VMSAv8-32 mode,1: VMSAv8-64 mode"
newline
hexmask.long.word 0x0 18.--28. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "TRE,TEX Remap Enable" "0: TEX remap disabled,1: TEX remap enabled"
newline
bitfld.long 0x0 16. "AFE,Access Flag Enable" "0: Behave as if AF bit is always set to 1,1: Enable software management of the Access Flag"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.byte 0x0 8.--14. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "RTSEL,Retranslation Table Select"
newline
bitfld.long 0x0 3. "TREN,MMU Retranslation Enable" "0: Output PA as a physical address,1: Output PA as an intermediate physical address to.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x19848++0x3
line.long 0x0 "IMTTBCR9,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "PMB,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x19848++0x3
line.long 0x0 "IMTTBCR9_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "BYPEN,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x19850++0x13
line.long 0x0 "IMTTLBR09,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x0 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x0 0.--11. 1. "Reserved_0,Reserved"
line.long 0x4 "IMTTUBR09,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x8 "IMTTLBR19,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x8 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x8 0.--11. 1. "Reserved_0,Reserved"
line.long 0xC "IMTTUBR19,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x10 "IMSTR9,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x10 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x10 12.--13. "ERRLVL,indicate which level of page table walk caused the error." "0: Level1 page table walk,1: Level2 page table walk,?,?"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x10 8.--10. "ERRCODE,Indicate error type. ERRCODE is set only during page table walk." "?,1: Translation Fault,?,?,?,?,?,?"
newline
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "MHIT,TLB Conflict Fault" "0,1"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x10 2. "ABORT,This bit is set to 1 when the IPMMU received an error response during a page table walk." "0,1"
newline
bitfld.long 0x10 1. "PF,Permission Fault" "0,1"
newline
bitfld.long 0x10 0. "TF,Translation Fault" "0,1"
group.long 0x19868++0x3
line.long 0x0 "IMMAIR09,(Short-descriptor translation format)"
hexmask.long.byte 0x0 24.--31. 1. "NOS7_0,Outer Shareable property mapping for memory attributes n."
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x0 19. "NS1,Mapping of S = 1 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 18. "NS0,Mapping of S = 0 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 17. "DS1,Mapping of S = 1 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 16. "DS0,Mapping of S = 0 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 14.--15. "TR7,Primary TEX mapping for memory attributes 7. 7 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 12.--13. "TR6,Primary TEX mapping for memory attributes 6. 6 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 10.--11. "TR5,Primary TEX mapping for memory attributes 5. 5 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 8.--9. "TR4,Primary TEX mapping for memory attributes 4. 4 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 6.--7. "TR3,Primary TEX mapping for memory attributes 3. 3 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 4.--5. "TR2,Primary TEX mapping for memory attributes 2. 2 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 2.--3. "TR1,Primary TEX mapping for memory attributes 1. 1 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 0.--1. "TR0,Primary TEX mapping for memory attributes 0. 0 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
group.long 0x19868++0x7
line.long 0x0 "IMMAIR09_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR3,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR2,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR1,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR0,The memory attribute encoding for an AttrIndx[2:0] entry."
line.long 0x4 "IMMAIR19,(Short-descriptor translation format)"
bitfld.long 0x4 30.--31. "OR7,Outer Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 28.--29. "OR6,Outer Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 26.--27. "OR5,Outer Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 24.--25. "OR4,Outer Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 22.--23. "OR3,Outer Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 20.--21. "OR2,Outer Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 18.--19. "OR1,Outer Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 16.--17. "OR0,Outer Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 14.--15. "IR7,Inner Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 12.--13. "IR6,Inner Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 10.--11. "IR5,Inner Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 8.--9. "IR4,Inner Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 6.--7. "IR3,Inner Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 4.--5. "IR2,Inner Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 2.--3. "IR1,Inner Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 0.--1. "IR0,Inner Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
group.long 0x1986C++0x3
line.long 0x0 "IMMAIR19_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR7,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR6,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR5,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR4,The memory attribute encoding for an AttrIndx[2:0] entry."
rgroup.long 0x19870++0x7
line.long 0x0 "IMELAR9,Note: n= 0 to 15 (IPMMU context)"
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
line.long 0x4 "IMEUAR9,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0x1A880++0x3
line.long 0x0 "IMCTR10,Note: n= 0 to 15 (IPMMU context)"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 29. "VA64,AArch64 support" "0: VMSAv8-32 mode,1: VMSAv8-64 mode"
newline
hexmask.long.word 0x0 18.--28. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "TRE,TEX Remap Enable" "0: TEX remap disabled,1: TEX remap enabled"
newline
bitfld.long 0x0 16. "AFE,Access Flag Enable" "0: Behave as if AF bit is always set to 1,1: Enable software management of the Access Flag"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.byte 0x0 8.--14. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "RTSEL,Retranslation Table Select"
newline
bitfld.long 0x0 3. "TREN,MMU Retranslation Enable" "0: Output PA as a physical address,1: Output PA as an intermediate physical address to.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x1A888++0x3
line.long 0x0 "IMTTBCR10,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "PMB,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x1A888++0x3
line.long 0x0 "IMTTBCR10_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "BYPEN,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x1A890++0x13
line.long 0x0 "IMTTLBR010,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x0 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x0 0.--11. 1. "Reserved_0,Reserved"
line.long 0x4 "IMTTUBR010,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x8 "IMTTLBR110,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x8 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x8 0.--11. 1. "Reserved_0,Reserved"
line.long 0xC "IMTTUBR110,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x10 "IMSTR10,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x10 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x10 12.--13. "ERRLVL,indicate which level of page table walk caused the error." "0: Level1 page table walk,1: Level2 page table walk,?,?"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x10 8.--10. "ERRCODE,Indicate error type. ERRCODE is set only during page table walk." "?,1: Translation Fault,?,?,?,?,?,?"
newline
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "MHIT,TLB Conflict Fault" "0,1"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x10 2. "ABORT,This bit is set to 1 when the IPMMU received an error response during a page table walk." "0,1"
newline
bitfld.long 0x10 1. "PF,Permission Fault" "0,1"
newline
bitfld.long 0x10 0. "TF,Translation Fault" "0,1"
group.long 0x1A8A8++0x3
line.long 0x0 "IMMAIR010,(Short-descriptor translation format)"
hexmask.long.byte 0x0 24.--31. 1. "NOS7_0,Outer Shareable property mapping for memory attributes n."
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x0 19. "NS1,Mapping of S = 1 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 18. "NS0,Mapping of S = 0 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 17. "DS1,Mapping of S = 1 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 16. "DS0,Mapping of S = 0 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 14.--15. "TR7,Primary TEX mapping for memory attributes 7. 7 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 12.--13. "TR6,Primary TEX mapping for memory attributes 6. 6 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 10.--11. "TR5,Primary TEX mapping for memory attributes 5. 5 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 8.--9. "TR4,Primary TEX mapping for memory attributes 4. 4 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 6.--7. "TR3,Primary TEX mapping for memory attributes 3. 3 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 4.--5. "TR2,Primary TEX mapping for memory attributes 2. 2 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 2.--3. "TR1,Primary TEX mapping for memory attributes 1. 1 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 0.--1. "TR0,Primary TEX mapping for memory attributes 0. 0 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
group.long 0x1A8A8++0x7
line.long 0x0 "IMMAIR010_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR3,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR2,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR1,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR0,The memory attribute encoding for an AttrIndx[2:0] entry."
line.long 0x4 "IMMAIR110,(Short-descriptor translation format)"
bitfld.long 0x4 30.--31. "OR7,Outer Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 28.--29. "OR6,Outer Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 26.--27. "OR5,Outer Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 24.--25. "OR4,Outer Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 22.--23. "OR3,Outer Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 20.--21. "OR2,Outer Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 18.--19. "OR1,Outer Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 16.--17. "OR0,Outer Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 14.--15. "IR7,Inner Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 12.--13. "IR6,Inner Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 10.--11. "IR5,Inner Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 8.--9. "IR4,Inner Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 6.--7. "IR3,Inner Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 4.--5. "IR2,Inner Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 2.--3. "IR1,Inner Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 0.--1. "IR0,Inner Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
group.long 0x1A8AC++0x3
line.long 0x0 "IMMAIR110_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR7,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR6,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR5,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR4,The memory attribute encoding for an AttrIndx[2:0] entry."
rgroup.long 0x1A8B0++0x7
line.long 0x0 "IMELAR10,Note: n= 0 to 15 (IPMMU context)"
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
line.long 0x4 "IMEUAR10,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0x1B8C0++0x3
line.long 0x0 "IMCTR11,Note: n= 0 to 15 (IPMMU context)"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 29. "VA64,AArch64 support" "0: VMSAv8-32 mode,1: VMSAv8-64 mode"
newline
hexmask.long.word 0x0 18.--28. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "TRE,TEX Remap Enable" "0: TEX remap disabled,1: TEX remap enabled"
newline
bitfld.long 0x0 16. "AFE,Access Flag Enable" "0: Behave as if AF bit is always set to 1,1: Enable software management of the Access Flag"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.byte 0x0 8.--14. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "RTSEL,Retranslation Table Select"
newline
bitfld.long 0x0 3. "TREN,MMU Retranslation Enable" "0: Output PA as a physical address,1: Output PA as an intermediate physical address to.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x1B8C8++0x3
line.long 0x0 "IMTTBCR11,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "PMB,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x1B8C8++0x3
line.long 0x0 "IMTTBCR11_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "BYPEN,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x1B8D0++0x13
line.long 0x0 "IMTTLBR011,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x0 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x0 0.--11. 1. "Reserved_0,Reserved"
line.long 0x4 "IMTTUBR011,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x8 "IMTTLBR111,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x8 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x8 0.--11. 1. "Reserved_0,Reserved"
line.long 0xC "IMTTUBR111,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x10 "IMSTR11,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x10 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x10 12.--13. "ERRLVL,indicate which level of page table walk caused the error." "0: Level1 page table walk,1: Level2 page table walk,?,?"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x10 8.--10. "ERRCODE,Indicate error type. ERRCODE is set only during page table walk." "?,1: Translation Fault,?,?,?,?,?,?"
newline
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "MHIT,TLB Conflict Fault" "0,1"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x10 2. "ABORT,This bit is set to 1 when the IPMMU received an error response during a page table walk." "0,1"
newline
bitfld.long 0x10 1. "PF,Permission Fault" "0,1"
newline
bitfld.long 0x10 0. "TF,Translation Fault" "0,1"
group.long 0x1B8E8++0x3
line.long 0x0 "IMMAIR011,(Short-descriptor translation format)"
hexmask.long.byte 0x0 24.--31. 1. "NOS7_0,Outer Shareable property mapping for memory attributes n."
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x0 19. "NS1,Mapping of S = 1 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 18. "NS0,Mapping of S = 0 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 17. "DS1,Mapping of S = 1 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 16. "DS0,Mapping of S = 0 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 14.--15. "TR7,Primary TEX mapping for memory attributes 7. 7 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 12.--13. "TR6,Primary TEX mapping for memory attributes 6. 6 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 10.--11. "TR5,Primary TEX mapping for memory attributes 5. 5 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 8.--9. "TR4,Primary TEX mapping for memory attributes 4. 4 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 6.--7. "TR3,Primary TEX mapping for memory attributes 3. 3 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 4.--5. "TR2,Primary TEX mapping for memory attributes 2. 2 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 2.--3. "TR1,Primary TEX mapping for memory attributes 1. 1 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 0.--1. "TR0,Primary TEX mapping for memory attributes 0. 0 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
group.long 0x1B8E8++0x7
line.long 0x0 "IMMAIR011_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR3,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR2,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR1,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR0,The memory attribute encoding for an AttrIndx[2:0] entry."
line.long 0x4 "IMMAIR111,(Short-descriptor translation format)"
bitfld.long 0x4 30.--31. "OR7,Outer Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 28.--29. "OR6,Outer Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 26.--27. "OR5,Outer Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 24.--25. "OR4,Outer Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 22.--23. "OR3,Outer Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 20.--21. "OR2,Outer Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 18.--19. "OR1,Outer Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 16.--17. "OR0,Outer Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 14.--15. "IR7,Inner Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 12.--13. "IR6,Inner Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 10.--11. "IR5,Inner Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 8.--9. "IR4,Inner Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 6.--7. "IR3,Inner Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 4.--5. "IR2,Inner Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 2.--3. "IR1,Inner Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 0.--1. "IR0,Inner Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
group.long 0x1B8EC++0x3
line.long 0x0 "IMMAIR111_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR7,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR6,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR5,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR4,The memory attribute encoding for an AttrIndx[2:0] entry."
rgroup.long 0x1B8F0++0x7
line.long 0x0 "IMELAR11,Note: n= 0 to 15 (IPMMU context)"
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
line.long 0x4 "IMEUAR11,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0x1C900++0x3
line.long 0x0 "IMCTR12,Note: n= 0 to 15 (IPMMU context)"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 29. "VA64,AArch64 support" "0: VMSAv8-32 mode,1: VMSAv8-64 mode"
newline
hexmask.long.word 0x0 18.--28. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "TRE,TEX Remap Enable" "0: TEX remap disabled,1: TEX remap enabled"
newline
bitfld.long 0x0 16. "AFE,Access Flag Enable" "0: Behave as if AF bit is always set to 1,1: Enable software management of the Access Flag"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.byte 0x0 8.--14. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "RTSEL,Retranslation Table Select"
newline
bitfld.long 0x0 3. "TREN,MMU Retranslation Enable" "0: Output PA as a physical address,1: Output PA as an intermediate physical address to.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x1C908++0x3
line.long 0x0 "IMTTBCR12,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "PMB,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x1C908++0x3
line.long 0x0 "IMTTBCR12_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "BYPEN,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x1C910++0x13
line.long 0x0 "IMTTLBR012,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x0 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x0 0.--11. 1. "Reserved_0,Reserved"
line.long 0x4 "IMTTUBR012,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x8 "IMTTLBR112,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x8 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x8 0.--11. 1. "Reserved_0,Reserved"
line.long 0xC "IMTTUBR112,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x10 "IMSTR12,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x10 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x10 12.--13. "ERRLVL,indicate which level of page table walk caused the error." "0: Level1 page table walk,1: Level2 page table walk,?,?"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x10 8.--10. "ERRCODE,Indicate error type. ERRCODE is set only during page table walk." "?,1: Translation Fault,?,?,?,?,?,?"
newline
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "MHIT,TLB Conflict Fault" "0,1"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x10 2. "ABORT,This bit is set to 1 when the IPMMU received an error response during a page table walk." "0,1"
newline
bitfld.long 0x10 1. "PF,Permission Fault" "0,1"
newline
bitfld.long 0x10 0. "TF,Translation Fault" "0,1"
group.long 0x1C928++0x3
line.long 0x0 "IMMAIR012,(Short-descriptor translation format)"
hexmask.long.byte 0x0 24.--31. 1. "NOS7_0,Outer Shareable property mapping for memory attributes n."
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x0 19. "NS1,Mapping of S = 1 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 18. "NS0,Mapping of S = 0 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 17. "DS1,Mapping of S = 1 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 16. "DS0,Mapping of S = 0 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 14.--15. "TR7,Primary TEX mapping for memory attributes 7. 7 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 12.--13. "TR6,Primary TEX mapping for memory attributes 6. 6 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 10.--11. "TR5,Primary TEX mapping for memory attributes 5. 5 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 8.--9. "TR4,Primary TEX mapping for memory attributes 4. 4 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 6.--7. "TR3,Primary TEX mapping for memory attributes 3. 3 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 4.--5. "TR2,Primary TEX mapping for memory attributes 2. 2 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 2.--3. "TR1,Primary TEX mapping for memory attributes 1. 1 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 0.--1. "TR0,Primary TEX mapping for memory attributes 0. 0 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
group.long 0x1C928++0x7
line.long 0x0 "IMMAIR012_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR3,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR2,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR1,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR0,The memory attribute encoding for an AttrIndx[2:0] entry."
line.long 0x4 "IMMAIR112,(Short-descriptor translation format)"
bitfld.long 0x4 30.--31. "OR7,Outer Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 28.--29. "OR6,Outer Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 26.--27. "OR5,Outer Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 24.--25. "OR4,Outer Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 22.--23. "OR3,Outer Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 20.--21. "OR2,Outer Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 18.--19. "OR1,Outer Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 16.--17. "OR0,Outer Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 14.--15. "IR7,Inner Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 12.--13. "IR6,Inner Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 10.--11. "IR5,Inner Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 8.--9. "IR4,Inner Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 6.--7. "IR3,Inner Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 4.--5. "IR2,Inner Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 2.--3. "IR1,Inner Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 0.--1. "IR0,Inner Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
group.long 0x1C92C++0x3
line.long 0x0 "IMMAIR112_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR7,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR6,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR5,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR4,The memory attribute encoding for an AttrIndx[2:0] entry."
rgroup.long 0x1C930++0x7
line.long 0x0 "IMELAR12,Note: n= 0 to 15 (IPMMU context)"
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
line.long 0x4 "IMEUAR12,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0x1D940++0x3
line.long 0x0 "IMCTR13,Note: n= 0 to 15 (IPMMU context)"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 29. "VA64,AArch64 support" "0: VMSAv8-32 mode,1: VMSAv8-64 mode"
newline
hexmask.long.word 0x0 18.--28. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "TRE,TEX Remap Enable" "0: TEX remap disabled,1: TEX remap enabled"
newline
bitfld.long 0x0 16. "AFE,Access Flag Enable" "0: Behave as if AF bit is always set to 1,1: Enable software management of the Access Flag"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.byte 0x0 8.--14. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "RTSEL,Retranslation Table Select"
newline
bitfld.long 0x0 3. "TREN,MMU Retranslation Enable" "0: Output PA as a physical address,1: Output PA as an intermediate physical address to.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x1D948++0x3
line.long 0x0 "IMTTBCR13,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "PMB,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x1D948++0x3
line.long 0x0 "IMTTBCR13_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "BYPEN,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x1D950++0x13
line.long 0x0 "IMTTLBR013,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x0 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x0 0.--11. 1. "Reserved_0,Reserved"
line.long 0x4 "IMTTUBR013,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x8 "IMTTLBR113,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x8 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x8 0.--11. 1. "Reserved_0,Reserved"
line.long 0xC "IMTTUBR113,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x10 "IMSTR13,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x10 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x10 12.--13. "ERRLVL,indicate which level of page table walk caused the error." "0: Level1 page table walk,1: Level2 page table walk,?,?"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x10 8.--10. "ERRCODE,Indicate error type. ERRCODE is set only during page table walk." "?,1: Translation Fault,?,?,?,?,?,?"
newline
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "MHIT,TLB Conflict Fault" "0,1"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x10 2. "ABORT,This bit is set to 1 when the IPMMU received an error response during a page table walk." "0,1"
newline
bitfld.long 0x10 1. "PF,Permission Fault" "0,1"
newline
bitfld.long 0x10 0. "TF,Translation Fault" "0,1"
group.long 0x1D968++0x3
line.long 0x0 "IMMAIR013,(Short-descriptor translation format)"
hexmask.long.byte 0x0 24.--31. 1. "NOS7_0,Outer Shareable property mapping for memory attributes n."
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x0 19. "NS1,Mapping of S = 1 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 18. "NS0,Mapping of S = 0 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 17. "DS1,Mapping of S = 1 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 16. "DS0,Mapping of S = 0 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 14.--15. "TR7,Primary TEX mapping for memory attributes 7. 7 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 12.--13. "TR6,Primary TEX mapping for memory attributes 6. 6 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 10.--11. "TR5,Primary TEX mapping for memory attributes 5. 5 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 8.--9. "TR4,Primary TEX mapping for memory attributes 4. 4 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 6.--7. "TR3,Primary TEX mapping for memory attributes 3. 3 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 4.--5. "TR2,Primary TEX mapping for memory attributes 2. 2 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 2.--3. "TR1,Primary TEX mapping for memory attributes 1. 1 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 0.--1. "TR0,Primary TEX mapping for memory attributes 0. 0 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
group.long 0x1D968++0x7
line.long 0x0 "IMMAIR013_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR3,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR2,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR1,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR0,The memory attribute encoding for an AttrIndx[2:0] entry."
line.long 0x4 "IMMAIR113,(Short-descriptor translation format)"
bitfld.long 0x4 30.--31. "OR7,Outer Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 28.--29. "OR6,Outer Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 26.--27. "OR5,Outer Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 24.--25. "OR4,Outer Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 22.--23. "OR3,Outer Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 20.--21. "OR2,Outer Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 18.--19. "OR1,Outer Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 16.--17. "OR0,Outer Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 14.--15. "IR7,Inner Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 12.--13. "IR6,Inner Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 10.--11. "IR5,Inner Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 8.--9. "IR4,Inner Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 6.--7. "IR3,Inner Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 4.--5. "IR2,Inner Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 2.--3. "IR1,Inner Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 0.--1. "IR0,Inner Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
group.long 0x1D96C++0x3
line.long 0x0 "IMMAIR113_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR7,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR6,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR5,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR4,The memory attribute encoding for an AttrIndx[2:0] entry."
rgroup.long 0x1D970++0x7
line.long 0x0 "IMELAR13,Note: n= 0 to 15 (IPMMU context)"
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
line.long 0x4 "IMEUAR13,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0x1E980++0x3
line.long 0x0 "IMCTR14,Note: n= 0 to 15 (IPMMU context)"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 29. "VA64,AArch64 support" "0: VMSAv8-32 mode,1: VMSAv8-64 mode"
newline
hexmask.long.word 0x0 18.--28. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "TRE,TEX Remap Enable" "0: TEX remap disabled,1: TEX remap enabled"
newline
bitfld.long 0x0 16. "AFE,Access Flag Enable" "0: Behave as if AF bit is always set to 1,1: Enable software management of the Access Flag"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.byte 0x0 8.--14. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "RTSEL,Retranslation Table Select"
newline
bitfld.long 0x0 3. "TREN,MMU Retranslation Enable" "0: Output PA as a physical address,1: Output PA as an intermediate physical address to.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x1E988++0x3
line.long 0x0 "IMTTBCR14,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "PMB,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x1E988++0x3
line.long 0x0 "IMTTBCR14_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "BYPEN,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x1E990++0x13
line.long 0x0 "IMTTLBR014,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x0 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x0 0.--11. 1. "Reserved_0,Reserved"
line.long 0x4 "IMTTUBR014,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x8 "IMTTLBR114,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x8 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x8 0.--11. 1. "Reserved_0,Reserved"
line.long 0xC "IMTTUBR114,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x10 "IMSTR14,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x10 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x10 12.--13. "ERRLVL,indicate which level of page table walk caused the error." "0: Level1 page table walk,1: Level2 page table walk,?,?"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x10 8.--10. "ERRCODE,Indicate error type. ERRCODE is set only during page table walk." "?,1: Translation Fault,?,?,?,?,?,?"
newline
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "MHIT,TLB Conflict Fault" "0,1"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x10 2. "ABORT,This bit is set to 1 when the IPMMU received an error response during a page table walk." "0,1"
newline
bitfld.long 0x10 1. "PF,Permission Fault" "0,1"
newline
bitfld.long 0x10 0. "TF,Translation Fault" "0,1"
group.long 0x1E9A8++0x3
line.long 0x0 "IMMAIR014,(Short-descriptor translation format)"
hexmask.long.byte 0x0 24.--31. 1. "NOS7_0,Outer Shareable property mapping for memory attributes n."
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x0 19. "NS1,Mapping of S = 1 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 18. "NS0,Mapping of S = 0 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 17. "DS1,Mapping of S = 1 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 16. "DS0,Mapping of S = 0 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 14.--15. "TR7,Primary TEX mapping for memory attributes 7. 7 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 12.--13. "TR6,Primary TEX mapping for memory attributes 6. 6 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 10.--11. "TR5,Primary TEX mapping for memory attributes 5. 5 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 8.--9. "TR4,Primary TEX mapping for memory attributes 4. 4 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 6.--7. "TR3,Primary TEX mapping for memory attributes 3. 3 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 4.--5. "TR2,Primary TEX mapping for memory attributes 2. 2 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 2.--3. "TR1,Primary TEX mapping for memory attributes 1. 1 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 0.--1. "TR0,Primary TEX mapping for memory attributes 0. 0 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
group.long 0x1E9A8++0x7
line.long 0x0 "IMMAIR014_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR3,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR2,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR1,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR0,The memory attribute encoding for an AttrIndx[2:0] entry."
line.long 0x4 "IMMAIR114,(Short-descriptor translation format)"
bitfld.long 0x4 30.--31. "OR7,Outer Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 28.--29. "OR6,Outer Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 26.--27. "OR5,Outer Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 24.--25. "OR4,Outer Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 22.--23. "OR3,Outer Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 20.--21. "OR2,Outer Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 18.--19. "OR1,Outer Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 16.--17. "OR0,Outer Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 14.--15. "IR7,Inner Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 12.--13. "IR6,Inner Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 10.--11. "IR5,Inner Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 8.--9. "IR4,Inner Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 6.--7. "IR3,Inner Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 4.--5. "IR2,Inner Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 2.--3. "IR1,Inner Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 0.--1. "IR0,Inner Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
group.long 0x1E9AC++0x3
line.long 0x0 "IMMAIR114_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR7,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR6,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR5,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR4,The memory attribute encoding for an AttrIndx[2:0] entry."
rgroup.long 0x1E9B0++0x7
line.long 0x0 "IMELAR14,Note: n= 0 to 15 (IPMMU context)"
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
line.long 0x4 "IMEUAR14,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
group.long 0x1F9C0++0x3
line.long 0x0 "IMCTR15,Note: n= 0 to 15 (IPMMU context)"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 29. "VA64,AArch64 support" "0: VMSAv8-32 mode,1: VMSAv8-64 mode"
newline
hexmask.long.word 0x0 18.--28. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "TRE,TEX Remap Enable" "0: TEX remap disabled,1: TEX remap enabled"
newline
bitfld.long 0x0 16. "AFE,Access Flag Enable" "0: Behave as if AF bit is always set to 1,1: Enable software management of the Access Flag"
newline
rbitfld.long 0x0 15. "SEC,Copy of IMSEC.SEC[n]" "0: Behave as non-secure context,1: Behave as secure context"
newline
hexmask.long.byte 0x0 8.--14. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x0 4.--7. 1. "RTSEL,Retranslation Table Select"
newline
bitfld.long 0x0 3. "TREN,MMU Retranslation Enable" "0: Output PA as a physical address,1: Output PA as an intermediate physical address to.."
newline
bitfld.long 0x0 2. "INTEN,Interrupt Enable" "0: Donsingle_quotationt assert an interrupt when an..,1: Assert an interrupt when an error occurs"
newline
bitfld.long 0x0 1. "FLUSH,TLB Invalidate" "?,1: Invalidate all TLB entries instantaneously"
newline
bitfld.long 0x0 0. "MMUEN,MMU Enable." "0: MMU disabled,1: MMU enabled"
group.long 0x1F9C8++0x3
line.long 0x0 "IMTTBCR15,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "PMB,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 6.--7. "SL,Starting level for translation table walks." "0: Start at third level,1: Start at second level,?,?"
newline
hexmask.long.byte 0x0 0.--5. 1. "TSZ0,[VMSAv8-64]."
group.long 0x1F9C8++0x3
line.long 0x0 "IMTTBCR15_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
bitfld.long 0x0 31. "EAE,Extended Address Enable" "0: Enable the 32-bit translation system with the..,1: Enable the 40-bit translation System with the.."
newline
bitfld.long 0x0 30. "BYPEN,[EAE=0] PMB Enable" "0: not bypass stage 1 translation when stage 2..,1: bypass stage 1 translation when only stage 2.."
newline
bitfld.long 0x0 28.--29. "SH1,Share ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 26.--27. "ORGN1,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 24.--25. "IRGN1,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR1n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 23. "PGSZ,[VMSAv8-32  EAE=0]" "0: 4KB page granule,1: 64KB page granule"
newline
bitfld.long 0x0 22. "SCSZ,[VMSAv8-32  EAE=0]" "0: Support section size,1: Support super section size"
newline
hexmask.long.byte 0x0 16.--21. 1. "TSZ1,[VMSAv8-64]"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "SH0,Share ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Non-shareable,1: Reserved,?,?"
newline
bitfld.long 0x0 10.--11. "ORGN0,Outer Cache ability attributes for the memory associated with the translation table walks using TTBR0n." "0: Normal memory,1: Normal memory,?,?"
newline
bitfld.long 0x0 8.--9. "IRGN0,Inner Cache ability attributes for the memory associated with the translation table walks using TTBR0n.." "0: Normal memory,1: Normal memory,?,?"
group.long 0x1F9D0++0x13
line.long 0x0 "IMTTLBR015,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x0 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x0 0.--11. 1. "Reserved_0,Reserved"
line.long 0x4 "IMTTUBR015,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x8 "IMTTLBR115,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x8 12.--31. 1. "TTBR,Bits [31:12] of translation table base address"
newline
hexmask.long.word 0x8 0.--11. 1. "Reserved_0,Reserved"
line.long 0xC "IMTTUBR115,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "TTBR,Bits [39:32] of translation table base address"
line.long 0x10 "IMSTR15,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x10 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x10 12.--13. "ERRLVL,indicate which level of page table walk caused the error." "0: Level1 page table walk,1: Level2 page table walk,?,?"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x10 8.--10. "ERRCODE,Indicate error type. ERRCODE is set only during page table walk." "?,1: Translation Fault,?,?,?,?,?,?"
newline
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 4. "MHIT,TLB Conflict Fault" "0,1"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x10 2. "ABORT,This bit is set to 1 when the IPMMU received an error response during a page table walk." "0,1"
newline
bitfld.long 0x10 1. "PF,Permission Fault" "0,1"
newline
bitfld.long 0x10 0. "TF,Translation Fault" "0,1"
group.long 0x1F9E8++0x3
line.long 0x0 "IMMAIR015,(Short-descriptor translation format)"
hexmask.long.byte 0x0 24.--31. 1. "NOS7_0,Outer Shareable property mapping for memory attributes n."
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
bitfld.long 0x0 19. "NS1,Mapping of S = 1 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 18. "NS0,Mapping of S = 0 attribute for Normal memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 17. "DS1,Mapping of S = 1 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 16. "DS0,Mapping of S = 0 attribute for Device memory." "0: Region is not shareable,1: Region is shareable"
newline
bitfld.long 0x0 14.--15. "TR7,Primary TEX mapping for memory attributes 7. 7 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 12.--13. "TR6,Primary TEX mapping for memory attributes 6. 6 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 10.--11. "TR5,Primary TEX mapping for memory attributes 5. 5 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 8.--9. "TR4,Primary TEX mapping for memory attributes 4. 4 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 6.--7. "TR3,Primary TEX mapping for memory attributes 3. 3 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 4.--5. "TR2,Primary TEX mapping for memory attributes 2. 2 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 2.--3. "TR1,Primary TEX mapping for memory attributes 1. 1 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
newline
bitfld.long 0x0 0.--1. "TR0,Primary TEX mapping for memory attributes 0. 0 is the value of TEX[0]  C and B bits." "0: Strongly-ordered,1: Device,?,?"
group.long 0x1F9E8++0x7
line.long 0x0 "IMMAIR015_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR3,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR2,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR1,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR0,The memory attribute encoding for an AttrIndx[2:0] entry."
line.long 0x4 "IMMAIR115,(Short-descriptor translation format)"
bitfld.long 0x4 30.--31. "OR7,Outer Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 28.--29. "OR6,Outer Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 26.--27. "OR5,Outer Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 24.--25. "OR4,Outer Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 22.--23. "OR3,Outer Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 20.--21. "OR2,Outer Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 18.--19. "OR1,Outer Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 16.--17. "OR0,Outer Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 14.--15. "IR7,Inner Cacheable property mapping for memory attributes 7." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 12.--13. "IR6,Inner Cacheable property mapping for memory attributes 6." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 10.--11. "IR5,Inner Cacheable property mapping for memory attributes 5." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 8.--9. "IR4,Inner Cacheable property mapping for memory attributes 4." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 6.--7. "IR3,Inner Cacheable property mapping for memory attributes 3." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 4.--5. "IR2,Inner Cacheable property mapping for memory attributes 2." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 2.--3. "IR1,Inner Cacheable property mapping for memory attributes 1." "0: Region is non-cacheable,1: Region is write-back,?,?"
newline
bitfld.long 0x4 0.--1. "IR0,Inner Cacheable property mapping for memory attributes 0." "0: Region is non-cacheable,1: Region is write-back,?,?"
group.long 0x1F9EC++0x3
line.long 0x0 "IMMAIR115_Long_descriptor,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.byte 0x0 24.--31. 1. "ATTR7,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 16.--23. 1. "ATTR6,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 8.--15. 1. "ATTR5,The memory attribute encoding for an AttrIndx[2:0] entry."
newline
hexmask.long.byte 0x0 0.--7. 1. "ATTR4,The memory attribute encoding for an AttrIndx[2:0] entry."
rgroup.long 0x1F9F0++0x7
line.long 0x0 "IMELAR15,Note: n= 0 to 15 (IPMMU context)"
hexmask.long 0x0 0.--31. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
line.long 0x4 "IMEUAR15,Note: n= 0 to 15 (IPMMU context)"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "EAR,The faulting virtual address is set when an address translation error occurred."
tree.end
tree.end
tree "ISP (Image Signal Processor/Channel Selector)"
base ad:0x0
tree "ISP_0"
base ad:0xFED00000
rgroup.long 0x0++0x3
line.long 0x0 "ISPVCR_0,The value to be read varies depending on the product"
hexmask.long 0x0 0.--31. 1. "ISPVCR,ISP Version Control Register"
group.long 0x4++0x7
line.long 0x0 "ISPFIFOCTRL_0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved"
newline
hexmask.long.byte 0x0 12.--15. 1. "TRACE_SEL3,Selection signal of channels to output to trace port 3"
newline
hexmask.long.byte 0x0 8.--11. 1. "TRACE_SEL2,Selection signal of channels to output to trace port 2"
newline
hexmask.long.byte 0x0 3.--7. 1. "Reserved_3,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 2. "FIFO_PUSH_CSI,FIFO ENABLE for CSI" "0: CSI FIFO disable,1: CSI FIFO enable [default]"
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved. (These bits are always read as 0.)" "0,1,2,3"
line.long 0x4 "ISPINPUTSEL0_0,"
bitfld.long 0x4 31. "SEL_CSI0,Select CSI input for Pixel Reconstructor" "0: CSI input 0 [default],1: CSI input 1"
newline
hexmask.long.word 0x4 16.--30. 1. "Reserved_16,Reserved bits. Do not write any different value from its initial value."
newline
hexmask.long.byte 0x4 12.--15. 1. "TRACE_SEL1,Selection signal of channels to output to trace port 1"
newline
hexmask.long.byte 0x4 8.--11. 1. "TRACE_SEL0,Selection signal of channels to output to trace port 0"
newline
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved. (These bits are always read as B'0100.)"
newline
hexmask.long.byte 0x4 0.--3. 1. "CSI_SEL,Select of ISP core"
group.long 0x14++0x3
line.long 0x0 "ISPSTART_0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x0 0.--15. 1. "START_ISP,Starting and stopping control of ISP"
rgroup.long 0x40++0xF
line.long 0x0 "ISPINT_STATUS_0,"
bitfld.long 0x0 31. "ST31,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 30. "ST30,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 29. "ST29,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 28. "ST28,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 27. "ST27,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 26. "ST26,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 25. "ST25,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 24. "ST24,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 23. "ST23,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 22. "ST22,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 21. "ST21,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 20. "ST20,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 19. "ST19,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 18. "ST18,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 17. "ST17,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 16. "ST16,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 15. "ST15,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 14. "ST14,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 13. "ST13,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 12. "ST12,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 11. "ST11,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 10. "ST10,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 9. "ST9,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 8. "ST8,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 7. "ST7,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 6. "ST6,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 5. "ST5,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 4. "ST4,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 3. "ST3,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 2. "ST2,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 1. "ST1,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 0. "ST0,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
line.long 0x4 "ISPERR0_STATUS_0,"
bitfld.long 0x4 31. "ST31,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 30. "ST30,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 29. "ST29,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 28. "ST28,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 27. "ST27,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 26. "ST26,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 25. "ST25,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 24. "ST24,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 23. "ST23,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 22. "ST22,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 21. "ST21,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 20. "ST20,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 19. "ST19,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 18. "ST18,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 17. "ST17,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 16. "ST16,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 15. "ST15,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 14. "ST14,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 13. "ST13,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 12. "ST12,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 11. "ST11,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 10. "ST10,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 9. "ST9,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 8. "ST8,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 7. "ST7,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 6. "ST6,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 5. "ST5,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 4. "ST4,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 3. "ST3,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 2. "ST2,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 1. "ST1,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 0. "ST0,Error status." "0: Error is not happened [default],1: Error is happened"
line.long 0x8 "ISPERR1_STATUS_0,"
bitfld.long 0x8 31. "ST31,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 30. "ST30,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 29. "ST29,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 28. "ST28,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 27. "ST27,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 26. "ST26,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 25. "ST25,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 24. "ST24,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 23. "ST23,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 22. "ST22,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 21. "ST21,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 20. "ST20,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 19. "ST19,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 18. "ST18,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 17. "ST17,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 16. "ST16,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 15. "ST15,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 14. "ST14,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 13. "ST13,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 12. "ST12,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 11. "ST11,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 10. "ST10,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 9. "ST9,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 8. "ST8,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 7. "ST7,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 6. "ST6,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 5. "ST5,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 4. "ST4,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 3. "ST3,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 2. "ST2,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 1. "ST1,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 0. "ST0,Error status." "0: Error is not happened [default],1: Error is happened"
line.long 0xC "ISPERR2_STATUS_0,"
bitfld.long 0xC 31. "ST31,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 30. "ST30,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 29. "ST29,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 28. "ST28,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 27. "ST27,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 26. "ST26,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 25. "ST25,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 24. "ST24,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 23. "ST23,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 22. "ST22,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 21. "ST21,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 20. "ST20,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 19. "ST19,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 18. "ST18,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 17. "ST17,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 16. "ST16,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 15. "ST15,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 14. "ST14,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 13. "ST13,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 12. "ST12,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 11. "ST11,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 10. "ST10,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 9. "ST9,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 8. "ST8,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 7. "ST7,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 6. "ST6,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 5. "ST5,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 4. "ST4,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 3. "ST3,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 2. "ST2,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 1. "ST1,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 0. "ST0,Error status." "0: Error is not happened [default],1: Error is happened"
wgroup.long 0x50++0xF
line.long 0x0 "ISPINT_CLEAR_0,"
bitfld.long 0x0 31. "CLR31,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 30. "CLR30,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 29. "CLR29,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 28. "CLR28,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 27. "CLR27,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 26. "CLR26,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 25. "CLR25,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 24. "CLR24,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 23. "CLR23,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 22. "CLR22,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 21. "CLR21,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 20. "CLR20,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 19. "CLR19,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 18. "CLR18,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 17. "CLR17,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 16. "CLR16,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 15. "CLR15,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 14. "CLR14,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 13. "CLR13,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 12. "CLR12,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 11. "CLR11,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 10. "CLR10,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 9. "CLR9,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 8. "CLR8,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 7. "CLR7,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 6. "CLR6,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 5. "CLR5,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 4. "CLR4,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 3. "CLR3,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 2. "CLR2,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 1. "CLR1,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 0. "CLR0,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
line.long 0x4 "ISPERR0_CLEAR_0,"
bitfld.long 0x4 31. "CLR31,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 30. "CLR30,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 29. "CLR29,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 28. "CLR28,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 27. "CLR27,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 26. "CLR26,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 25. "CLR25,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 24. "CLR24,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 23. "CLR23,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 22. "CLR22,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 21. "CLR21,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 20. "CLR20,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 19. "CLR19,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 18. "CLR18,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 17. "CLR17,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 16. "CLR16,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 15. "CLR15,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 14. "CLR14,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 13. "CLR13,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 12. "CLR12,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 11. "CLR11,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 10. "CLR10,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 9. "CLR9,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 8. "CLR8,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 7. "CLR7,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 6. "CLR6,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 5. "CLR5,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 4. "CLR4,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 3. "CLR3,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 2. "CLR2,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 1. "CLR1,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 0. "CLR0,Clear register for error status ST[n] (n=0~31)." "0,1"
line.long 0x8 "ISPERR1_CLEAR_0,"
bitfld.long 0x8 31. "CLR31,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 30. "CLR30,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 29. "CLR29,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 28. "CLR28,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 27. "CLR27,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 26. "CLR26,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 25. "CLR25,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 24. "CLR24,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 23. "CLR23,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 22. "CLR22,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 21. "CLR21,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 20. "CLR20,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 19. "CLR19,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 18. "CLR18,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 17. "CLR17,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 16. "CLR16,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 15. "CLR15,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 14. "CLR14,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 13. "CLR13,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 12. "CLR12,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 11. "CLR11,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 10. "CLR10,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 9. "CLR9,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 8. "CLR8,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 7. "CLR7,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 6. "CLR6,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 5. "CLR5,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 4. "CLR4,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 3. "CLR3,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 2. "CLR2,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 1. "CLR1,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 0. "CLR0,Clear register for error status ST[n] (n=0~31)." "0,1"
line.long 0xC "ISPERR2_CLEAR_0,"
bitfld.long 0xC 31. "CLR31,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 30. "CLR30,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 29. "CLR29,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 28. "CLR28,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 27. "CLR27,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 26. "CLR26,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 25. "CLR25,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 24. "CLR24,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 23. "CLR23,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 22. "CLR22,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 21. "CLR21,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 20. "CLR20,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 19. "CLR19,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 18. "CLR18,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 17. "CLR17,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 16. "CLR16,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 15. "CLR15,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 14. "CLR14,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 13. "CLR13,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 12. "CLR12,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 11. "CLR11,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 10. "CLR10,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 9. "CLR9,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 8. "CLR8,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 7. "CLR7,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 6. "CLR6,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 5. "CLR5,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 4. "CLR4,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 3. "CLR3,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 2. "CLR2,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 1. "CLR1,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 0. "CLR0,Clear register for error status ST[n] (n=0~31)." "0,1"
group.long 0x60++0xF
line.long 0x0 "ISPINT_ENABLE_0,"
bitfld.long 0x0 31. "EN31,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 30. "EN30,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 29. "EN29,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 28. "EN28,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 27. "EN27,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 26. "EN26,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 25. "EN25,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 24. "EN24,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 23. "EN23,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 22. "EN22,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 21. "EN21,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 20. "EN20,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 19. "EN19,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 18. "EN18,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 17. "EN17,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 16. "EN16,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 15. "EN15,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 14. "EN14,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 13. "EN13,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 12. "EN12,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 11. "EN11,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 10. "EN10,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 9. "EN9,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 8. "EN8,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 7. "EN7,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 6. "EN6,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 5. "EN5,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 4. "EN4,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 3. "EN3,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 2. "EN2,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 1. "EN1,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 0. "EN0,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
line.long 0x4 "ISPERR0_ENABLE_0,"
bitfld.long 0x4 31. "EN31,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 30. "EN30,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 29. "EN29,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 28. "EN28,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 27. "EN27,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 26. "EN26,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 25. "EN25,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 24. "EN24,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 23. "EN23,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 22. "EN22,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 21. "EN21,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 20. "EN20,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 19. "EN19,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 18. "EN18,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 17. "EN17,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 16. "EN16,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 15. "EN15,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 14. "EN14,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 13. "EN13,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 12. "EN12,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 11. "EN11,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 10. "EN10,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 9. "EN9,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 8. "EN8,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 7. "EN7,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 6. "EN6,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 5. "EN5,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 4. "EN4,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 3. "EN3,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 2. "EN2,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 1. "EN1,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 0. "EN0,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
line.long 0x8 "ISPERR1_ENABLE_0,"
bitfld.long 0x8 31. "EN31,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 30. "EN30,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 29. "EN29,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 28. "EN28,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 27. "EN27,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 26. "EN26,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 25. "EN25,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 24. "EN24,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 23. "EN23,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 22. "EN22,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 21. "EN21,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 20. "EN20,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 19. "EN19,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 18. "EN18,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 17. "EN17,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 16. "EN16,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 15. "EN15,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 14. "EN14,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 13. "EN13,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 12. "EN12,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 11. "EN11,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 10. "EN10,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 9. "EN9,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 8. "EN8,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 7. "EN7,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 6. "EN6,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 5. "EN5,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 4. "EN4,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 3. "EN3,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 2. "EN2,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 1. "EN1,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 0. "EN0,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
line.long 0xC "ISPERR2_ENABLE_0,"
bitfld.long 0xC 31. "EN31,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 30. "EN30,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 29. "EN29,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 28. "EN28,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 27. "EN27,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 26. "EN26,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 25. "EN25,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 24. "EN24,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 23. "EN23,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 22. "EN22,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 21. "EN21,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 20. "EN20,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 19. "EN19,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 18. "EN18,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 17. "EN17,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 16. "EN16,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 15. "EN15,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 14. "EN14,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 13. "EN13,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 12. "EN12,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 11. "EN11,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 10. "EN10,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 9. "EN9,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 8. "EN8,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 7. "EN7,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 6. "EN6,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 5. "EN5,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 4. "EN4,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 3. "EN3,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 2. "EN2,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 1. "EN1,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 0. "EN0,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
rgroup.long 0x80++0x7
line.long 0x0 "ISPERR3_STATUS_0,"
bitfld.long 0x0 31. "ST31,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 30. "ST30,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 29. "ST29,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 28. "ST28,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 27. "ST27,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 26. "ST26,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 25. "ST25,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 24. "ST24,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 23. "ST23,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 22. "ST22,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 21. "ST21,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 20. "ST20,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 19. "ST19,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 18. "ST18,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 17. "ST17,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 16. "ST16,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 15. "ST15,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 14. "ST14,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 13. "ST13,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 12. "ST12,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 11. "ST11,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 10. "ST10,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 9. "ST9,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 8. "ST8,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 7. "ST7,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 6. "ST6,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 5. "ST5,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 4. "ST4,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 3. "ST3,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 2. "ST2,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 1. "ST1,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 0. "ST0,Error status." "0: Error is not happened [default],1: Error is happened"
line.long 0x4 "ISPERR4_STATUS_0,"
bitfld.long 0x4 31. "ST31,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 30. "ST30,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 29. "ST29,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 28. "ST28,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 27. "ST27,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 26. "ST26,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 25. "ST25,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 24. "ST24,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 23. "ST23,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 22. "ST22,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 21. "ST21,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 20. "ST20,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 19. "ST19,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 18. "ST18,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 17. "ST17,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 16. "ST16,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 15. "ST15,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 14. "ST14,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 13. "ST13,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 12. "ST12,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 11. "ST11,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 10. "ST10,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 9. "ST9,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 8. "ST8,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 7. "ST7,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 6. "ST6,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 5. "ST5,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 4. "ST4,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 3. "ST3,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 2. "ST2,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 1. "ST1,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 0. "ST0,Error status." "0: Error is not happened [default],1: Error is happened"
wgroup.long 0x90++0x7
line.long 0x0 "ISPERR3_CLEAR_0,"
bitfld.long 0x0 31. "CLR31,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 30. "CLR30,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 29. "CLR29,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 28. "CLR28,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 27. "CLR27,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 26. "CLR26,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 25. "CLR25,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 24. "CLR24,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 23. "CLR23,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 22. "CLR22,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 21. "CLR21,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 20. "CLR20,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 19. "CLR19,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 18. "CLR18,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 17. "CLR17,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 16. "CLR16,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 15. "CLR15,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 14. "CLR14,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 13. "CLR13,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 12. "CLR12,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 11. "CLR11,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 10. "CLR10,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 9. "CLR9,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 8. "CLR8,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 7. "CLR7,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 6. "CLR6,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 5. "CLR5,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 4. "CLR4,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 3. "CLR3,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 2. "CLR2,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 1. "CLR1,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 0. "CLR0,Clear register for error status ST[n] (n=0~31)." "0,1"
line.long 0x4 "ISPERR4_CLEAR_0,"
bitfld.long 0x4 31. "CLR31,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 30. "CLR30,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 29. "CLR29,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 28. "CLR28,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 27. "CLR27,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 26. "CLR26,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 25. "CLR25,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 24. "CLR24,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 23. "CLR23,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 22. "CLR22,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 21. "CLR21,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 20. "CLR20,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 19. "CLR19,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 18. "CLR18,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 17. "CLR17,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 16. "CLR16,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 15. "CLR15,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 14. "CLR14,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 13. "CLR13,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 12. "CLR12,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 11. "CLR11,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 10. "CLR10,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 9. "CLR9,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 8. "CLR8,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 7. "CLR7,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 6. "CLR6,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 5. "CLR5,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 4. "CLR4,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 3. "CLR3,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 2. "CLR2,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 1. "CLR1,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 0. "CLR0,Clear register for error status ST[n] (n=0~31)." "0,1"
group.long 0xA0++0x7
line.long 0x0 "ISPERR3_ENABLE_0,"
bitfld.long 0x0 31. "EN31,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 30. "EN30,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 29. "EN29,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 28. "EN28,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 27. "EN27,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 26. "EN26,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 25. "EN25,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 24. "EN24,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 23. "EN23,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 22. "EN22,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 21. "EN21,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 20. "EN20,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 19. "EN19,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 18. "EN18,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 17. "EN17,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 16. "EN16,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 15. "EN15,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 14. "EN14,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 13. "EN13,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 12. "EN12,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 11. "EN11,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 10. "EN10,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 9. "EN9,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 8. "EN8,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 7. "EN7,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 6. "EN6,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 5. "EN5,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 4. "EN4,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 3. "EN3,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 2. "EN2,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 1. "EN1,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 0. "EN0,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
line.long 0x4 "ISPERR4_ENABLE_0,"
bitfld.long 0x4 31. "EN31,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 30. "EN30,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 29. "EN29,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 28. "EN28,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 27. "EN27,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 26. "EN26,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 25. "EN25,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 24. "EN24,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 23. "EN23,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 22. "EN22,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 21. "EN21,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 20. "EN20,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 19. "EN19,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 18. "EN18,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 17. "EN17,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 16. "EN16,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 15. "EN15,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 14. "EN14,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 13. "EN13,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 12. "EN12,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 11. "EN11,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 10. "EN10,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 9. "EN9,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 8. "EN8,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 7. "EN7,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 6. "EN6,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 5. "EN5,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 4. "EN4,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 3. "EN3,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 2. "EN2,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 1. "EN1,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 0. "EN0,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
group.long 0xC0++0x3
line.long 0x0 "ISP_PADDING_CTRL_0,"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved bits. Do not write any different value from its initial value."
newline
hexmask.long.word 0x0 0.--11. 1. "PADDING_NUM,Number of cycles for padding to push into CSI FIFO at the last cycle of each long packet"
group.long 0x100++0x3
line.long 0x0 "ISPWP_CTRL_0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x0 0.--15. 1. "UNLOCK_CODE_L,Write protection control of ISP_PADDING_CTRL register"
group.long 0x1010++0x1F
line.long 0x0 "ISPPROC_CUSTOM_FORMAT0_CTRL_0,"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x0 24.--29. 1. "LUT_LENGTH_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
rbitfld.long 0x0 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--21. 1. "LUT_START_ADDRESS,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x0 0.--3. 1. "POPNUM_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4 "ISPPROC_CUSTOM_FORMAT1_CTRL_0,"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4 24.--29. 1. "LUT_LENGTH_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
rbitfld.long 0x4 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4 16.--21. 1. "LUT_START_ADDRESS,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4 4.--15. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x4 0.--3. 1. "POPNUM_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x8 "ISPPROC_CUSTOM_FORMAT2_CTRL_0,"
rbitfld.long 0x8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 24.--29. 1. "LUT_LENGTH_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
rbitfld.long 0x8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 16.--21. 1. "LUT_START_ADDRESS,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x8 4.--15. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
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hexmask.long.byte 0x8 0.--3. 1. "POPNUM_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xC "ISPPROC_CUSTOM_FORMAT3_CTRL_0,"
rbitfld.long 0xC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC 24.--29. 1. "LUT_LENGTH_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
rbitfld.long 0xC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC 16.--21. 1. "LUT_START_ADDRESS,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xC 4.--15. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0xC 0.--3. 1. "POPNUM_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x10 "ISPPROC_CUSTOM_FORMAT4_CTRL_0,"
rbitfld.long 0x10 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x10 24.--29. 1. "LUT_LENGTH_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
rbitfld.long 0x10 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x10 16.--21. 1. "LUT_START_ADDRESS,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x10 4.--15. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x10 0.--3. 1. "POPNUM_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x14 "ISPPROC_CUSTOM_FORMAT5_CTRL_0,"
rbitfld.long 0x14 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x14 24.--29. 1. "LUT_LENGTH_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
rbitfld.long 0x14 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x14 16.--21. 1. "LUT_START_ADDRESS,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x14 4.--15. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x14 0.--3. 1. "POPNUM_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x18 "ISPPROC_CUSTOM_FORMAT6_CTRL_0,"
rbitfld.long 0x18 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x18 24.--29. 1. "LUT_LENGTH_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
rbitfld.long 0x18 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x18 16.--21. 1. "LUT_START_ADDRESS,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x18 4.--15. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x18 0.--3. 1. "POPNUM_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1C "ISPPROC_CUSTOM_FORMAT7_CTRL_0,"
rbitfld.long 0x1C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x1C 24.--29. 1. "LUT_LENGTH_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
rbitfld.long 0x1C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x1C 16.--21. 1. "LUT_START_ADDRESS,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1C 4.--15. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x1C 0.--3. 1. "POPNUM_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
group.long 0x1100++0xFF
line.long 0x0 "ISPPROCMODE_DT0_0,"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x0 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x0 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
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hexmask.long.byte 0x0 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
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rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
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hexmask.long.byte 0x0 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
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hexmask.long.byte 0x0 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x4 "ISPPROCMODE_DT1_0,"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x4 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
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rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x4 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
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hexmask.long.byte 0x4 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x8 "ISPPROCMODE_DT2_0,"
rbitfld.long 0x8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xC "ISPPROCMODE_DT3_0,"
rbitfld.long 0xC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x10 "ISPPROCMODE_DT4_0,"
rbitfld.long 0x10 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x10 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x10 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x10 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x10 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x10 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x10 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x14 "ISPPROCMODE_DT5_0,"
rbitfld.long 0x14 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x14 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x14 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x14 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x14 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x14 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x14 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x18 "ISPPROCMODE_DT6_0,"
rbitfld.long 0x18 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x18 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x18 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x18 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x18 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x18 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x18 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x1C "ISPPROCMODE_DT7_0,"
rbitfld.long 0x1C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x1C 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x1C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x1C 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x1C 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x1C 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x1C 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x20 "ISPPROCMODE_DT8_0,"
rbitfld.long 0x20 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x20 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x20 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x20 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x20 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x20 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x20 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x20 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x24 "ISPPROCMODE_DT9_0,"
rbitfld.long 0x24 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x24 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x24 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x24 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x24 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x24 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x24 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x24 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x28 "ISPPROCMODE_DT10_0,"
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x28 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x28 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x28 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x28 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x28 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x28 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x2C "ISPPROCMODE_DT11_0,"
rbitfld.long 0x2C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x2C 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x2C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x2C 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x2C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x2C 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x2C 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x2C 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x30 "ISPPROCMODE_DT12_0,"
rbitfld.long 0x30 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x30 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x30 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x30 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x30 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x30 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x30 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x30 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x34 "ISPPROCMODE_DT13_0,"
rbitfld.long 0x34 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x34 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x34 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x34 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x34 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x34 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x34 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x34 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x38 "ISPPROCMODE_DT14_0,"
rbitfld.long 0x38 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x38 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x38 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x38 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x38 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x38 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x38 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x38 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x3C "ISPPROCMODE_DT15_0,"
rbitfld.long 0x3C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x3C 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x3C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x3C 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x3C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x3C 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x3C 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x3C 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x40 "ISPPROCMODE_DT16_0,"
rbitfld.long 0x40 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x40 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x40 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x40 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x40 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x40 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x40 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x40 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x44 "ISPPROCMODE_DT17_0,"
rbitfld.long 0x44 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x44 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x44 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x44 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x44 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x44 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x44 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x44 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x48 "ISPPROCMODE_DT18_0,"
rbitfld.long 0x48 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x48 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x48 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x48 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x48 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x48 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x48 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x48 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x4C "ISPPROCMODE_DT19_0,"
rbitfld.long 0x4C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4C 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x4C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4C 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x4C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4C 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x4C 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4C 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x50 "ISPPROCMODE_DT20_0,"
rbitfld.long 0x50 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x50 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x50 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x50 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x50 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x50 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x50 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x50 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x54 "ISPPROCMODE_DT21_0,"
rbitfld.long 0x54 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x54 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x54 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x54 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x54 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x54 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x54 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x54 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x58 "ISPPROCMODE_DT22_0,"
rbitfld.long 0x58 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x58 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x58 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x58 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x58 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x58 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x58 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x58 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x5C "ISPPROCMODE_DT23_0,"
rbitfld.long 0x5C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x5C 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x5C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x5C 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x5C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x5C 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x5C 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x5C 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x60 "ISPPROCMODE_DT24_0,"
rbitfld.long 0x60 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x60 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x60 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x60 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x60 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x60 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x60 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x60 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x64 "ISPPROCMODE_DT25_0,"
rbitfld.long 0x64 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x64 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x64 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x64 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x64 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x64 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x64 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x64 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x68 "ISPPROCMODE_DT26_0,"
rbitfld.long 0x68 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x68 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x68 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x68 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x68 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x68 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x68 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x68 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x6C "ISPPROCMODE_DT27_0,"
rbitfld.long 0x6C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x6C 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x6C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x6C 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x6C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x6C 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x6C 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x6C 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x70 "ISPPROCMODE_DT28_0,"
rbitfld.long 0x70 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x70 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x70 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x70 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x70 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x70 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x70 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x70 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x74 "ISPPROCMODE_DT29_0,"
rbitfld.long 0x74 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x74 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x74 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x74 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x74 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x74 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x74 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x74 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x78 "ISPPROCMODE_DT30_0,"
rbitfld.long 0x78 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x78 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x78 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x78 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x78 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x78 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x78 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x78 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x7C "ISPPROCMODE_DT31_0,"
rbitfld.long 0x7C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x7C 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x7C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x7C 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x7C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x7C 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x7C 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x7C 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x80 "ISPPROCMODE_DT32_0,"
rbitfld.long 0x80 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x80 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x80 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x80 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x80 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x80 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x80 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x80 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x84 "ISPPROCMODE_DT33_0,"
rbitfld.long 0x84 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x84 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x84 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x84 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x84 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x84 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x84 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x84 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x88 "ISPPROCMODE_DT34_0,"
rbitfld.long 0x88 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x88 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x88 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x88 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x88 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x88 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x88 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x88 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x8C "ISPPROCMODE_DT35_0,"
rbitfld.long 0x8C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8C 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x8C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8C 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x8C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8C 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x8C 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8C 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x90 "ISPPROCMODE_DT36_0,"
rbitfld.long 0x90 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x90 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x90 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x90 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x90 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x90 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x90 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x90 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x94 "ISPPROCMODE_DT37_0,"
rbitfld.long 0x94 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x94 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x94 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x94 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x94 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x94 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x94 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x94 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x98 "ISPPROCMODE_DT38_0,"
rbitfld.long 0x98 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x98 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x98 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x98 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x98 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x98 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x98 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x98 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x9C "ISPPROCMODE_DT39_0,"
rbitfld.long 0x9C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x9C 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x9C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x9C 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x9C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x9C 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x9C 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x9C 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xA0 "ISPPROCMODE_DT40_0,"
rbitfld.long 0xA0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA0 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xA0 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA0 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xA0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA0 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xA0 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA0 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xA4 "ISPPROCMODE_DT41_0,"
rbitfld.long 0xA4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA4 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xA4 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA4 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xA4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA4 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xA4 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA4 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xA8 "ISPPROCMODE_DT42_0,"
rbitfld.long 0xA8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA8 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xA8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA8 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xA8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA8 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xA8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA8 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xAC "ISPPROCMODE_DT43_0,"
rbitfld.long 0xAC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xAC 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xAC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xAC 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xAC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xAC 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xAC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xAC 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xB0 "ISPPROCMODE_DT44_0,"
rbitfld.long 0xB0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB0 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xB0 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB0 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xB0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB0 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xB0 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB0 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xB4 "ISPPROCMODE_DT45_0,"
rbitfld.long 0xB4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB4 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xB4 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB4 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xB4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB4 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xB4 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB4 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xB8 "ISPPROCMODE_DT46_0,"
rbitfld.long 0xB8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB8 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xB8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB8 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xB8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB8 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xB8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB8 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xBC "ISPPROCMODE_DT47_0,"
rbitfld.long 0xBC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xBC 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xBC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xBC 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xBC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xBC 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xBC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xBC 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xC0 "ISPPROCMODE_DT48_0,"
rbitfld.long 0xC0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC0 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xC0 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC0 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xC0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC0 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xC0 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC0 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xC4 "ISPPROCMODE_DT49_0,"
rbitfld.long 0xC4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC4 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xC4 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC4 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xC4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC4 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xC4 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC4 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xC8 "ISPPROCMODE_DT50_0,"
rbitfld.long 0xC8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC8 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xC8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC8 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xC8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC8 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xC8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC8 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xCC "ISPPROCMODE_DT51_0,"
rbitfld.long 0xCC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xCC 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xCC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xCC 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xCC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xCC 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xCC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xCC 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xD0 "ISPPROCMODE_DT52_0,"
rbitfld.long 0xD0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD0 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xD0 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD0 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xD0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD0 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xD0 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD0 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xD4 "ISPPROCMODE_DT53_0,"
rbitfld.long 0xD4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD4 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xD4 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD4 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xD4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD4 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xD4 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD4 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xD8 "ISPPROCMODE_DT54_0,"
rbitfld.long 0xD8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD8 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xD8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD8 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xD8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD8 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xD8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD8 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xDC "ISPPROCMODE_DT55_0,"
rbitfld.long 0xDC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xDC 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xDC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xDC 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xDC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xDC 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xDC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xDC 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xE0 "ISPPROCMODE_DT56_0,"
rbitfld.long 0xE0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE0 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xE0 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE0 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xE0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE0 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xE0 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE0 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xE4 "ISPPROCMODE_DT57_0,"
rbitfld.long 0xE4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE4 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xE4 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE4 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xE4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE4 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xE4 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE4 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xE8 "ISPPROCMODE_DT58_0,"
rbitfld.long 0xE8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE8 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xE8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE8 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xE8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE8 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xE8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE8 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xEC "ISPPROCMODE_DT59_0,"
rbitfld.long 0xEC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xEC 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xEC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xEC 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xEC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xEC 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xEC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xEC 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xF0 "ISPPROCMODE_DT60_0,"
rbitfld.long 0xF0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF0 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xF0 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF0 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xF0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF0 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xF0 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF0 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xF4 "ISPPROCMODE_DT61_0,"
rbitfld.long 0xF4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF4 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xF4 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF4 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xF4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF4 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xF4 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF4 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xF8 "ISPPROCMODE_DT62_0,"
rbitfld.long 0xF8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF8 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xF8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF8 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xF8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF8 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xF8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF8 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xFC "ISPPROCMODE_DT63_0,"
rbitfld.long 0xFC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xFC 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xFC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xFC 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xFC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xFC 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xFC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xFC 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
group.long 0x2000++0x3
line.long 0x0 "ISPCORE_WUP_ENABLE_CHANNELS_0,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,Reserved bits. Do not write any different value from its initial value."
newline
hexmask.long.byte 0x0 8.--13. 1. "WUP_ENABLE_CHANNELS,Enable control register whether IMR channel receives WUP pulse from ISP. Each bit corresponds to each IMR channel."
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved bits. Do not write any different value from its initial value."
group.long 0x2100++0x7
line.long 0x0 "ISP_STREAMER_CONFIG_DMA_CONTROL1_0,"
bitfld.long 0x0 31. "ENABLE1,Enabling config DMA. In addition to set 1 to ENABLE0  this register should be set to 1 in order to enable Config DMA." "0: Config DMA is disabled [default],1: Config DMA is enabled"
newline
hexmask.long.word 0x0 16.--30. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x0 0.--15. 1. "CONFIG_DATA_START_REG_ADDRESS,The lower 16 bit value of the address of the first (address  write data) pair in the Config Data"
line.long 0x4 "ISP_STREAMER_CONFIG_DMA_CONTROL2_0,"
hexmask.long 0x4 0.--31. 1. "CONFIG_DATA_START_REG_DATA,The write data value of the first (address  write data) pair in the Config Data"
group.long 0x3000++0x13
line.long 0x0 "ISPCS_FILER_ID_CH0_0,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH0_0,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH0_0,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH0_0,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH0_0,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3020++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH0_0,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH0_0,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH0_0,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH0_0,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH0_0,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH0_0,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH0_0,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH0_0,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH0_0,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3080++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH0_0,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH0_0,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH0_0,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH0_0,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH0_0,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH0_0,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH0_0,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH0_0,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH0_0,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH0_0,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH0_0,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH0_0,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH0_0,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH0_0,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH0_0,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH0_0,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3100++0x13
line.long 0x0 "ISPCS_FILER_ID_CH1_0,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH1_0,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH1_0,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH1_0,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH1_0,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3120++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH1_0,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH1_0,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH1_0,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH1_0,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH1_0,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH1_0,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH1_0,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH1_0,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH1_0,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3180++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH1_0,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH1_0,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH1_0,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH1_0,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH1_0,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH1_0,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH1_0,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH1_0,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH1_0,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH1_0,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH1_0,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH1_0,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH1_0,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH1_0,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH1_0,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH1_0,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3200++0x13
line.long 0x0 "ISPCS_FILER_ID_CH2_0,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH2_0,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH2_0,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH2_0,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH2_0,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3220++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH2_0,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH2_0,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH2_0,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH2_0,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
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hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH2_0,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
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hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
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hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH2_0,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
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hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
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hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH2_0,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
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hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
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hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH2_0,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
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hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH2_0,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3280++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH2_0,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH2_0,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH2_0,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH2_0,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH2_0,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH2_0,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH2_0,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH2_0,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH2_0,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH2_0,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH2_0,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH2_0,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH2_0,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH2_0,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH2_0,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH2_0,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3300++0x13
line.long 0x0 "ISPCS_FILER_ID_CH3_0,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
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hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH3_0,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH3_0,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
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hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
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hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH3_0,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH3_0,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3320++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH3_0,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
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hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
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hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH3_0,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH3_0,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH3_0,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH3_0,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH3_0,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH3_0,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH3_0,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH3_0,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3380++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH3_0,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH3_0,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH3_0,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH3_0,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH3_0,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH3_0,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH3_0,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH3_0,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH3_0,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH3_0,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH3_0,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH3_0,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH3_0,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH3_0,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH3_0,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH3_0,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3400++0x13
line.long 0x0 "ISPCS_FILER_ID_CH4_0,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH4_0,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH4_0,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH4_0,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH4_0,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3420++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH4_0,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH4_0,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH4_0,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH4_0,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH4_0,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH4_0,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH4_0,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH4_0,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH4_0,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3480++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH4_0,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH4_0,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH4_0,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH4_0,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH4_0,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH4_0,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH4_0,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH4_0,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH4_0,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH4_0,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH4_0,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH4_0,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH4_0,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH4_0,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH4_0,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH4_0,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3500++0x13
line.long 0x0 "ISPCS_FILER_ID_CH5_0,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH5_0,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH5_0,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH5_0,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH5_0,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3520++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH5_0,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH5_0,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH5_0,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH5_0,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH5_0,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH5_0,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH5_0,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH5_0,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH5_0,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3580++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH5_0,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH5_0,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH5_0,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH5_0,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH5_0,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH5_0,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH5_0,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH5_0,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH5_0,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH5_0,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH5_0,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH5_0,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH5_0,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH5_0,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH5_0,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH5_0,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3600++0x13
line.long 0x0 "ISPCS_FILER_ID_CH6_0,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH6_0,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH6_0,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH6_0,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH6_0,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3620++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH6_0,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH6_0,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH6_0,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH6_0,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH6_0,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH6_0,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH6_0,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH6_0,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH6_0,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3680++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH6_0,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH6_0,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH6_0,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH6_0,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH6_0,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH6_0,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH6_0,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH6_0,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH6_0,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH6_0,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH6_0,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH6_0,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH6_0,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH6_0,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH6_0,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH6_0,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3700++0x13
line.long 0x0 "ISPCS_FILER_ID_CH7_0,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH7_0,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH7_0,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH7_0,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH7_0,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3720++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH7_0,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH7_0,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH7_0,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH7_0,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH7_0,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH7_0,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH7_0,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH7_0,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH7_0,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3780++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH7_0,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH7_0,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH7_0,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH7_0,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH7_0,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH7_0,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH7_0,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH7_0,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH7_0,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH7_0,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH7_0,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH7_0,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH7_0,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH7_0,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH7_0,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH7_0,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3800++0x13
line.long 0x0 "ISPCS_FILER_ID_CH8_0,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH8_0,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH8_0,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH8_0,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH8_0,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3820++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH8_0,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH8_0,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH8_0,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH8_0,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH8_0,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH8_0,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH8_0,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH8_0,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH8_0,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3880++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH8_0,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH8_0,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH8_0,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH8_0,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH8_0,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH8_0,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH8_0,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH8_0,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH8_0,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH8_0,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH8_0,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH8_0,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH8_0,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH8_0,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH8_0,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH8_0,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3900++0x13
line.long 0x0 "ISPCS_FILER_ID_CH9_0,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH9_0,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH9_0,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH9_0,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH9_0,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3920++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH9_0,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH9_0,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH9_0,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH9_0,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH9_0,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH9_0,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH9_0,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH9_0,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH9_0,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3980++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH9_0,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH9_0,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH9_0,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH9_0,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH9_0,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH9_0,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH9_0,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH9_0,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH9_0,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH9_0,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH9_0,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH9_0,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH9_0,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH9_0,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH9_0,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH9_0,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3A00++0x13
line.long 0x0 "ISPCS_FILER_ID_CH10_0,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH10_0,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH10_0,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH10_0,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH10_0,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3A20++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH10_0,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH10_0,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH10_0,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH10_0,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH10_0,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH10_0,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH10_0,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH10_0,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH10_0,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3A80++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH10_0,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH10_0,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH10_0,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH10_0,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH10_0,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH10_0,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH10_0,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH10_0,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH10_0,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH10_0,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH10_0,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH10_0,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH10_0,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH10_0,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH10_0,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH10_0,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3B00++0x13
line.long 0x0 "ISPCS_FILER_ID_CH11_0,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH11_0,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH11_0,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH11_0,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH11_0,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3B20++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH11_0,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH11_0,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH11_0,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH11_0,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH11_0,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH11_0,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH11_0,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH11_0,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH11_0,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3B80++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH11_0,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH11_0,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH11_0,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH11_0,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH11_0,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH11_0,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH11_0,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH11_0,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH11_0,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH11_0,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH11_0,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH11_0,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH11_0,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH11_0,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH11_0,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH11_0,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x4000++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH0_0,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH0_0,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH0_0,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4010++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH1_0,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH1_0,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH1_0,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4020++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH2_0,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH2_0,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH2_0,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4030++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH3_0,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH3_0,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH3_0,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4040++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH4_0,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH4_0,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH4_0,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4050++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH5_0,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH5_0,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH5_0,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4060++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH6_0,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH6_0,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH6_0,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4070++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH7_0,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH7_0,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH7_0,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4080++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH8_0,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH8_0,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH8_0,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4090++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH9_0,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH9_0,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH9_0,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x40A0++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH10_0,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH10_0,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH10_0,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x40B0++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH11_0,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH11_0,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH11_0,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4800++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC0_0,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC0_0,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC0_0,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC0_0,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC0_0,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC0_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC0_0,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC0_0,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC0_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC0_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x4900++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC1_0,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC1_0,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC1_0,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC1_0,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC1_0,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC1_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC1_0,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC1_0,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC1_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC1_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x4A00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC2_0,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC2_0,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC2_0,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC2_0,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC2_0,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC2_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC2_0,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC2_0,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC2_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC2_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x4B00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC3_0,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC3_0,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC3_0,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC3_0,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC3_0,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC3_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC3_0,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC3_0,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC3_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC3_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x4C00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC4_0,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC4_0,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC4_0,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC4_0,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC4_0,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC4_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC4_0,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC4_0,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC4_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC4_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x4D00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC5_0,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC5_0,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC5_0,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC5_0,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC5_0,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC5_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC5_0,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC5_0,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC5_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC5_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x4E00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC6_0,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC6_0,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC6_0,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC6_0,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC6_0,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC6_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC6_0,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC6_0,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC6_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC6_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x4F00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC7_0,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC7_0,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC7_0,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC7_0,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC7_0,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC7_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC7_0,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC7_0,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC7_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC7_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x6800++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC8_0,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC8_0,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC8_0,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC8_0,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC8_0,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC8_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC8_0,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC8_0,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC8_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC8_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x6900++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC9_0,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC9_0,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC9_0,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC9_0,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC9_0,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC9_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC9_0,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC9_0,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC9_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC9_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x6A00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC10_0,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC10_0,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC10_0,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC10_0,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC10_0,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC10_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC10_0,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC10_0,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC10_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC10_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x6B00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC11_0,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC11_0,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC11_0,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC11_0,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC11_0,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC11_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC11_0,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC11_0,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC11_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC11_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x6C00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC12_0,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC12_0,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC12_0,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC12_0,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC12_0,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC12_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC12_0,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC12_0,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC12_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC12_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x6D00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC13_0,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC13_0,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC13_0,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC13_0,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC13_0,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC13_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC13_0,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC13_0,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC13_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC13_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x6E00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC14_0,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC14_0,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC14_0,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC14_0,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC14_0,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC14_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC14_0,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC14_0,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC14_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC14_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x6F00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC15_0,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC15_0,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC15_0,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC15_0,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC15_0,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC15_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC15_0,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC15_0,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC15_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC15_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x7000++0xB
line.long 0x0 "ISP_STREAMER_MODE_0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x0 0.--3. 1. "STREAMER_ENABLE,On/OFF control of steaming from VSPX."
line.long 0x4 "ISP_STREAMER_V_BLANK_0,"
hexmask.long 0x4 0.--31. 1. "STREAMER_V_BLANK,Number of cycles of vertical blanking period per one frame for input pixel stream which is provided to ISP core from in streaming mode from VSPX."
line.long 0x8 "ISP_STREAMER_H_BLANK_0,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x8 0.--15. 1. "STREAMER_H_BLANK,Number of cycles of horizontal blanking period per line for input pixel stream which is provided to ISP core from in streaming mode from VSPX."
group.long 0x7100++0x3
line.long 0x0 "ISP_STREAMER_CONFIG_DMA_CONTROL_0,"
hexmask.long.byte 0x0 24.--31. 1. "REG_ADDRESS_UPPER_8BIT,Specifies the upper 8-bit value of the register address to be written to ISP Core. This register is meaningful only when REG_ADDRESS_FILTERING_ENABLE=1."
newline
bitfld.long 0x0 23. "REG_ADDRESS_FILTERING_ENABLE,and#12539;Setting whether or nor REG_ADDRESS_UPPER_8BIT is matched with the upper 8bits of the register address." "0,1"
newline
hexmask.long.tbyte 0x0 6.--22. 1. "Reserved_6,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 4.--5. "BYTE_PER_WORD,Data format of config data" "0: 4 byte/word [default],?,?,?"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "ENABLE0,Enabling config DMA" "0: Config DMA is disabled [default],1: Config DMA is enabled"
rgroup.long 0x7804++0x3
line.long 0x0 "ISP_STREAMER_CONFIG_DMA_STATUS_0,"
bitfld.long 0x0 31. "CONFIG_DMA_READY_BUSY,Transfer status of Config DMA" "0: Busy,1: Ready"
newline
hexmask.long 0x0 0.--30. 1. "Reserved_0,Reserved. (These bits are always read as 0.)"
group.long 0x8000++0x7FF
line.long 0x0 "ISPPROC_CUSTOM_FORMAT_LUT0_W0_B0_0,"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4 "ISPPROC_CUSTOM_FORMAT_LUT0_W0_B1_0,"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x8 "ISPPROC_CUSTOM_FORMAT_LUT0_W0_B2_0,"
rbitfld.long 0x8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xC "ISPPROC_CUSTOM_FORMAT_LUT0_W0_B3_0,"
rbitfld.long 0xC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x10 "ISPPROC_CUSTOM_FORMAT_LUT0_W0_B4_0,"
rbitfld.long 0x10 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x10 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x10 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x14 "ISPPROC_CUSTOM_FORMAT_LUT0_W0_B5_0,"
rbitfld.long 0x14 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x14 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x14 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x18 "ISPPROC_CUSTOM_FORMAT_LUT0_W0_B6_0,"
rbitfld.long 0x18 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x18 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x18 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1C "ISPPROC_CUSTOM_FORMAT_LUT0_W0_B7_0,"
rbitfld.long 0x1C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x20 "ISPPROC_CUSTOM_FORMAT_LUT0_W1_B0_0,"
rbitfld.long 0x20 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x20 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x20 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x20 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x24 "ISPPROC_CUSTOM_FORMAT_LUT0_W1_B1_0,"
rbitfld.long 0x24 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x24 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x24 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x24 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x28 "ISPPROC_CUSTOM_FORMAT_LUT0_W1_B2_0,"
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x28 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x28 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x28 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2C "ISPPROC_CUSTOM_FORMAT_LUT0_W1_B3_0,"
rbitfld.long 0x2C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x30 "ISPPROC_CUSTOM_FORMAT_LUT0_W1_B4_0,"
rbitfld.long 0x30 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x30 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x30 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x30 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x34 "ISPPROC_CUSTOM_FORMAT_LUT0_W1_B5_0,"
rbitfld.long 0x34 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x34 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x34 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x34 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x38 "ISPPROC_CUSTOM_FORMAT_LUT0_W1_B6_0,"
rbitfld.long 0x38 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x38 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x38 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x38 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3C "ISPPROC_CUSTOM_FORMAT_LUT0_W1_B7_0,"
rbitfld.long 0x3C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x40 "ISPPROC_CUSTOM_FORMAT_LUT0_W2_B0_0,"
rbitfld.long 0x40 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x40 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x40 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x40 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x44 "ISPPROC_CUSTOM_FORMAT_LUT0_W2_B1_0,"
rbitfld.long 0x44 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x44 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x44 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x44 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x48 "ISPPROC_CUSTOM_FORMAT_LUT0_W2_B2_0,"
rbitfld.long 0x48 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x48 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x48 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x48 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4C "ISPPROC_CUSTOM_FORMAT_LUT0_W2_B3_0,"
rbitfld.long 0x4C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x50 "ISPPROC_CUSTOM_FORMAT_LUT0_W2_B4_0,"
rbitfld.long 0x50 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x50 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x50 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x50 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x54 "ISPPROC_CUSTOM_FORMAT_LUT0_W2_B5_0,"
rbitfld.long 0x54 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x54 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x54 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x54 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x58 "ISPPROC_CUSTOM_FORMAT_LUT0_W2_B6_0,"
rbitfld.long 0x58 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x58 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x58 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x58 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5C "ISPPROC_CUSTOM_FORMAT_LUT0_W2_B7_0,"
rbitfld.long 0x5C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x60 "ISPPROC_CUSTOM_FORMAT_LUT0_W3_B0_0,"
rbitfld.long 0x60 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x60 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x60 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x60 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x64 "ISPPROC_CUSTOM_FORMAT_LUT0_W3_B1_0,"
rbitfld.long 0x64 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x64 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x64 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x64 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x68 "ISPPROC_CUSTOM_FORMAT_LUT0_W3_B2_0,"
rbitfld.long 0x68 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x68 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x68 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x68 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6C "ISPPROC_CUSTOM_FORMAT_LUT0_W3_B3_0,"
rbitfld.long 0x6C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x70 "ISPPROC_CUSTOM_FORMAT_LUT0_W3_B4_0,"
rbitfld.long 0x70 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x70 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x70 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x70 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x74 "ISPPROC_CUSTOM_FORMAT_LUT0_W3_B5_0,"
rbitfld.long 0x74 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x74 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x74 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x74 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x78 "ISPPROC_CUSTOM_FORMAT_LUT0_W3_B6_0,"
rbitfld.long 0x78 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x78 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x78 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x78 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7C "ISPPROC_CUSTOM_FORMAT_LUT0_W3_B7_0,"
rbitfld.long 0x7C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x80 "ISPPROC_CUSTOM_FORMAT_LUT0_W4_B0_0,"
rbitfld.long 0x80 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x80 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x80 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x80 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x84 "ISPPROC_CUSTOM_FORMAT_LUT0_W4_B1_0,"
rbitfld.long 0x84 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x84 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x84 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x84 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x88 "ISPPROC_CUSTOM_FORMAT_LUT0_W4_B2_0,"
rbitfld.long 0x88 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x88 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x88 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x88 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x8C "ISPPROC_CUSTOM_FORMAT_LUT0_W4_B3_0,"
rbitfld.long 0x8C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x8C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x8C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x90 "ISPPROC_CUSTOM_FORMAT_LUT0_W4_B4_0,"
rbitfld.long 0x90 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x90 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x90 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x90 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x94 "ISPPROC_CUSTOM_FORMAT_LUT0_W4_B5_0,"
rbitfld.long 0x94 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x94 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x94 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x94 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x98 "ISPPROC_CUSTOM_FORMAT_LUT0_W4_B6_0,"
rbitfld.long 0x98 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x98 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x98 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x98 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x9C "ISPPROC_CUSTOM_FORMAT_LUT0_W4_B7_0,"
rbitfld.long 0x9C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x9C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x9C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x9C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xA0 "ISPPROC_CUSTOM_FORMAT_LUT0_W5_B0_0,"
rbitfld.long 0xA0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xA0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xA0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xA0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xA4 "ISPPROC_CUSTOM_FORMAT_LUT0_W5_B1_0,"
rbitfld.long 0xA4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xA4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xA4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xA4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xA8 "ISPPROC_CUSTOM_FORMAT_LUT0_W5_B2_0,"
rbitfld.long 0xA8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xA8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xA8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xA8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xAC "ISPPROC_CUSTOM_FORMAT_LUT0_W5_B3_0,"
rbitfld.long 0xAC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xAC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xAC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xAC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xB0 "ISPPROC_CUSTOM_FORMAT_LUT0_W5_B4_0,"
rbitfld.long 0xB0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xB0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xB0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xB0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xB4 "ISPPROC_CUSTOM_FORMAT_LUT0_W5_B5_0,"
rbitfld.long 0xB4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xB4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xB4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xB4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xB8 "ISPPROC_CUSTOM_FORMAT_LUT0_W5_B6_0,"
rbitfld.long 0xB8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xB8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xB8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xB8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xBC "ISPPROC_CUSTOM_FORMAT_LUT0_W5_B7_0,"
rbitfld.long 0xBC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xBC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xBC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xBC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xC0 "ISPPROC_CUSTOM_FORMAT_LUT0_W6_B0_0,"
rbitfld.long 0xC0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xC0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xC0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xC4 "ISPPROC_CUSTOM_FORMAT_LUT0_W6_B1_0,"
rbitfld.long 0xC4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xC4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xC4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xC8 "ISPPROC_CUSTOM_FORMAT_LUT0_W6_B2_0,"
rbitfld.long 0xC8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xC8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xC8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xCC "ISPPROC_CUSTOM_FORMAT_LUT0_W6_B3_0,"
rbitfld.long 0xCC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xCC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xCC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xCC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xD0 "ISPPROC_CUSTOM_FORMAT_LUT0_W6_B4_0,"
rbitfld.long 0xD0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xD0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xD0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xD0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xD4 "ISPPROC_CUSTOM_FORMAT_LUT0_W6_B5_0,"
rbitfld.long 0xD4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xD4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xD4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xD4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xD8 "ISPPROC_CUSTOM_FORMAT_LUT0_W6_B6_0,"
rbitfld.long 0xD8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xD8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xD8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xD8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xDC "ISPPROC_CUSTOM_FORMAT_LUT0_W6_B7_0,"
rbitfld.long 0xDC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xDC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xDC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xDC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xE0 "ISPPROC_CUSTOM_FORMAT_LUT0_W7_B0_0,"
rbitfld.long 0xE0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xE0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xE0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xE0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xE4 "ISPPROC_CUSTOM_FORMAT_LUT0_W7_B1_0,"
rbitfld.long 0xE4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xE4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xE4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xE4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xE8 "ISPPROC_CUSTOM_FORMAT_LUT0_W7_B2_0,"
rbitfld.long 0xE8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xE8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xE8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xE8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xEC "ISPPROC_CUSTOM_FORMAT_LUT0_W7_B3_0,"
rbitfld.long 0xEC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xEC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xEC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xEC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xF0 "ISPPROC_CUSTOM_FORMAT_LUT0_W7_B4_0,"
rbitfld.long 0xF0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xF0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xF0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xF0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xF4 "ISPPROC_CUSTOM_FORMAT_LUT0_W7_B5_0,"
rbitfld.long 0xF4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xF4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xF4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xF4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xF8 "ISPPROC_CUSTOM_FORMAT_LUT0_W7_B6_0,"
rbitfld.long 0xF8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xF8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xF8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xF8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xFC "ISPPROC_CUSTOM_FORMAT_LUT0_W7_B7_0,"
rbitfld.long 0xFC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xFC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xFC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xFC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x100 "ISPPROC_CUSTOM_FORMAT_LUT0_W8_B0_0,"
rbitfld.long 0x100 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x100 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x100 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x100 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x104 "ISPPROC_CUSTOM_FORMAT_LUT0_W8_B1_0,"
rbitfld.long 0x104 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x104 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x104 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x104 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x108 "ISPPROC_CUSTOM_FORMAT_LUT0_W8_B2_0,"
rbitfld.long 0x108 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x108 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x108 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x108 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x10C "ISPPROC_CUSTOM_FORMAT_LUT0_W8_B3_0,"
rbitfld.long 0x10C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x10C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x10C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x110 "ISPPROC_CUSTOM_FORMAT_LUT0_W8_B4_0,"
rbitfld.long 0x110 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x110 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x110 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x110 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x114 "ISPPROC_CUSTOM_FORMAT_LUT0_W8_B5_0,"
rbitfld.long 0x114 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x114 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x114 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x114 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x118 "ISPPROC_CUSTOM_FORMAT_LUT0_W8_B6_0,"
rbitfld.long 0x118 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x118 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x118 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x118 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x11C "ISPPROC_CUSTOM_FORMAT_LUT0_W8_B7_0,"
rbitfld.long 0x11C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x11C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x11C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x11C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x120 "ISPPROC_CUSTOM_FORMAT_LUT0_W9_B0_0,"
rbitfld.long 0x120 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x120 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x120 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x120 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x124 "ISPPROC_CUSTOM_FORMAT_LUT0_W9_B1_0,"
rbitfld.long 0x124 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x124 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x124 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x124 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x128 "ISPPROC_CUSTOM_FORMAT_LUT0_W9_B2_0,"
rbitfld.long 0x128 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x128 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x128 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x128 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x12C "ISPPROC_CUSTOM_FORMAT_LUT0_W9_B3_0,"
rbitfld.long 0x12C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x12C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x12C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x12C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x130 "ISPPROC_CUSTOM_FORMAT_LUT0_W9_B4_0,"
rbitfld.long 0x130 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x130 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x130 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x130 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x134 "ISPPROC_CUSTOM_FORMAT_LUT0_W9_B5_0,"
rbitfld.long 0x134 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x134 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x134 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x134 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x138 "ISPPROC_CUSTOM_FORMAT_LUT0_W9_B6_0,"
rbitfld.long 0x138 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x138 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x138 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x138 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x13C "ISPPROC_CUSTOM_FORMAT_LUT0_W9_B7_0,"
rbitfld.long 0x13C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x13C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x13C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x13C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x140 "ISPPROC_CUSTOM_FORMAT_LUT0_W10_B0_0,"
rbitfld.long 0x140 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x140 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x140 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x140 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x144 "ISPPROC_CUSTOM_FORMAT_LUT0_W10_B1_0,"
rbitfld.long 0x144 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x144 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x144 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x144 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x148 "ISPPROC_CUSTOM_FORMAT_LUT0_W10_B2_0,"
rbitfld.long 0x148 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x148 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x148 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x148 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x14C "ISPPROC_CUSTOM_FORMAT_LUT0_W10_B3_0,"
rbitfld.long 0x14C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x14C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x14C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x150 "ISPPROC_CUSTOM_FORMAT_LUT0_W10_B4_0,"
rbitfld.long 0x150 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x150 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x150 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x150 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x154 "ISPPROC_CUSTOM_FORMAT_LUT0_W10_B5_0,"
rbitfld.long 0x154 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x154 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x154 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x154 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x158 "ISPPROC_CUSTOM_FORMAT_LUT0_W10_B6_0,"
rbitfld.long 0x158 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x158 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x158 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x158 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x15C "ISPPROC_CUSTOM_FORMAT_LUT0_W10_B7_0,"
rbitfld.long 0x15C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x15C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x15C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x15C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x160 "ISPPROC_CUSTOM_FORMAT_LUT0_W11_B0_0,"
rbitfld.long 0x160 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x160 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x160 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x160 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x164 "ISPPROC_CUSTOM_FORMAT_LUT0_W11_B1_0,"
rbitfld.long 0x164 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x164 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x164 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x164 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x168 "ISPPROC_CUSTOM_FORMAT_LUT0_W11_B2_0,"
rbitfld.long 0x168 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x168 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x168 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x168 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x16C "ISPPROC_CUSTOM_FORMAT_LUT0_W11_B3_0,"
rbitfld.long 0x16C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x16C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x16C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x16C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x170 "ISPPROC_CUSTOM_FORMAT_LUT0_W11_B4_0,"
rbitfld.long 0x170 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x170 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x170 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x170 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x174 "ISPPROC_CUSTOM_FORMAT_LUT0_W11_B5_0,"
rbitfld.long 0x174 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x174 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x174 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x174 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x178 "ISPPROC_CUSTOM_FORMAT_LUT0_W11_B6_0,"
rbitfld.long 0x178 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x178 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x178 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x178 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x17C "ISPPROC_CUSTOM_FORMAT_LUT0_W11_B7_0,"
rbitfld.long 0x17C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x17C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x17C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x17C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x180 "ISPPROC_CUSTOM_FORMAT_LUT0_W12_B0_0,"
rbitfld.long 0x180 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x180 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x180 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x180 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x184 "ISPPROC_CUSTOM_FORMAT_LUT0_W12_B1_0,"
rbitfld.long 0x184 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x184 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x184 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x184 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x188 "ISPPROC_CUSTOM_FORMAT_LUT0_W12_B2_0,"
rbitfld.long 0x188 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x188 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x188 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x188 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x18C "ISPPROC_CUSTOM_FORMAT_LUT0_W12_B3_0,"
rbitfld.long 0x18C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x18C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x18C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x190 "ISPPROC_CUSTOM_FORMAT_LUT0_W12_B4_0,"
rbitfld.long 0x190 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x190 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x190 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x190 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x194 "ISPPROC_CUSTOM_FORMAT_LUT0_W12_B5_0,"
rbitfld.long 0x194 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x194 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x194 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x194 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x198 "ISPPROC_CUSTOM_FORMAT_LUT0_W12_B6_0,"
rbitfld.long 0x198 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x198 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x198 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x198 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x19C "ISPPROC_CUSTOM_FORMAT_LUT0_W12_B7_0,"
rbitfld.long 0x19C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x19C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x19C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x19C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1A0 "ISPPROC_CUSTOM_FORMAT_LUT0_W13_B0_0,"
rbitfld.long 0x1A0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1A0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1A0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1A0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1A4 "ISPPROC_CUSTOM_FORMAT_LUT0_W13_B1_0,"
rbitfld.long 0x1A4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1A4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1A4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1A4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1A8 "ISPPROC_CUSTOM_FORMAT_LUT0_W13_B2_0,"
rbitfld.long 0x1A8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1A8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1A8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1A8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1AC "ISPPROC_CUSTOM_FORMAT_LUT0_W13_B3_0,"
rbitfld.long 0x1AC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1AC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1AC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1AC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1B0 "ISPPROC_CUSTOM_FORMAT_LUT0_W13_B4_0,"
rbitfld.long 0x1B0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1B0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1B0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1B0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1B4 "ISPPROC_CUSTOM_FORMAT_LUT0_W13_B5_0,"
rbitfld.long 0x1B4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1B4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1B4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1B4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1B8 "ISPPROC_CUSTOM_FORMAT_LUT0_W13_B6_0,"
rbitfld.long 0x1B8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1B8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1B8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1B8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1BC "ISPPROC_CUSTOM_FORMAT_LUT0_W13_B7_0,"
rbitfld.long 0x1BC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1BC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1BC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1BC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1C0 "ISPPROC_CUSTOM_FORMAT_LUT0_W14_B0_0,"
rbitfld.long 0x1C0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1C0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1C0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1C4 "ISPPROC_CUSTOM_FORMAT_LUT0_W14_B1_0,"
rbitfld.long 0x1C4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1C4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1C4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1C8 "ISPPROC_CUSTOM_FORMAT_LUT0_W14_B2_0,"
rbitfld.long 0x1C8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1C8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1C8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1CC "ISPPROC_CUSTOM_FORMAT_LUT0_W14_B3_0,"
rbitfld.long 0x1CC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1CC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1CC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1CC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1D0 "ISPPROC_CUSTOM_FORMAT_LUT0_W14_B4_0,"
rbitfld.long 0x1D0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1D0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1D0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1D0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1D4 "ISPPROC_CUSTOM_FORMAT_LUT0_W14_B5_0,"
rbitfld.long 0x1D4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1D4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1D4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1D4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1D8 "ISPPROC_CUSTOM_FORMAT_LUT0_W14_B6_0,"
rbitfld.long 0x1D8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1D8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1D8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1D8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1DC "ISPPROC_CUSTOM_FORMAT_LUT0_W14_B7_0,"
rbitfld.long 0x1DC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1DC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1DC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1DC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1E0 "ISPPROC_CUSTOM_FORMAT_LUT0_W15_B0_0,"
rbitfld.long 0x1E0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1E0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1E0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1E0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1E4 "ISPPROC_CUSTOM_FORMAT_LUT0_W15_B1_0,"
rbitfld.long 0x1E4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1E4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1E4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1E4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1E8 "ISPPROC_CUSTOM_FORMAT_LUT0_W15_B2_0,"
rbitfld.long 0x1E8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1E8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1E8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1E8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1EC "ISPPROC_CUSTOM_FORMAT_LUT0_W15_B3_0,"
rbitfld.long 0x1EC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1EC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1EC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1EC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1F0 "ISPPROC_CUSTOM_FORMAT_LUT0_W15_B4_0,"
rbitfld.long 0x1F0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1F0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1F0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1F0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1F4 "ISPPROC_CUSTOM_FORMAT_LUT0_W15_B5_0,"
rbitfld.long 0x1F4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1F4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1F4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1F4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1F8 "ISPPROC_CUSTOM_FORMAT_LUT0_W15_B6_0,"
rbitfld.long 0x1F8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1F8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1F8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1F8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1FC "ISPPROC_CUSTOM_FORMAT_LUT0_W15_B7_0,"
rbitfld.long 0x1FC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1FC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1FC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1FC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x200 "ISPPROC_CUSTOM_FORMAT_LUT0_W16_B0_0,"
rbitfld.long 0x200 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x200 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x200 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x200 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x204 "ISPPROC_CUSTOM_FORMAT_LUT0_W16_B1_0,"
rbitfld.long 0x204 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x204 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x204 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x204 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x208 "ISPPROC_CUSTOM_FORMAT_LUT0_W16_B2_0,"
rbitfld.long 0x208 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x208 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x208 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x208 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x20C "ISPPROC_CUSTOM_FORMAT_LUT0_W16_B3_0,"
rbitfld.long 0x20C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x20C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x20C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x20C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x210 "ISPPROC_CUSTOM_FORMAT_LUT0_W16_B4_0,"
rbitfld.long 0x210 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x210 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x210 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x210 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x214 "ISPPROC_CUSTOM_FORMAT_LUT0_W16_B5_0,"
rbitfld.long 0x214 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x214 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x214 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x214 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x218 "ISPPROC_CUSTOM_FORMAT_LUT0_W16_B6_0,"
rbitfld.long 0x218 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x218 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x218 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x218 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x21C "ISPPROC_CUSTOM_FORMAT_LUT0_W16_B7_0,"
rbitfld.long 0x21C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x21C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x21C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x21C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x220 "ISPPROC_CUSTOM_FORMAT_LUT0_W17_B0_0,"
rbitfld.long 0x220 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x220 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x220 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x220 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x224 "ISPPROC_CUSTOM_FORMAT_LUT0_W17_B1_0,"
rbitfld.long 0x224 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x224 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x224 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x224 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x228 "ISPPROC_CUSTOM_FORMAT_LUT0_W17_B2_0,"
rbitfld.long 0x228 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x228 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x228 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x228 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x22C "ISPPROC_CUSTOM_FORMAT_LUT0_W17_B3_0,"
rbitfld.long 0x22C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x22C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x22C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x22C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x230 "ISPPROC_CUSTOM_FORMAT_LUT0_W17_B4_0,"
rbitfld.long 0x230 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x230 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x230 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x230 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x234 "ISPPROC_CUSTOM_FORMAT_LUT0_W17_B5_0,"
rbitfld.long 0x234 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x234 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x234 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x234 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x238 "ISPPROC_CUSTOM_FORMAT_LUT0_W17_B6_0,"
rbitfld.long 0x238 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x238 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x238 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x238 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x23C "ISPPROC_CUSTOM_FORMAT_LUT0_W17_B7_0,"
rbitfld.long 0x23C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x23C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x23C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x23C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x240 "ISPPROC_CUSTOM_FORMAT_LUT0_W18_B0_0,"
rbitfld.long 0x240 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x240 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x240 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x240 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x244 "ISPPROC_CUSTOM_FORMAT_LUT0_W18_B1_0,"
rbitfld.long 0x244 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x244 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x244 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x244 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x248 "ISPPROC_CUSTOM_FORMAT_LUT0_W18_B2_0,"
rbitfld.long 0x248 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x248 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x248 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x248 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x24C "ISPPROC_CUSTOM_FORMAT_LUT0_W18_B3_0,"
rbitfld.long 0x24C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x24C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x24C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x24C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x250 "ISPPROC_CUSTOM_FORMAT_LUT0_W18_B4_0,"
rbitfld.long 0x250 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x250 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x250 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x250 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x254 "ISPPROC_CUSTOM_FORMAT_LUT0_W18_B5_0,"
rbitfld.long 0x254 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x254 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x254 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x254 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x258 "ISPPROC_CUSTOM_FORMAT_LUT0_W18_B6_0,"
rbitfld.long 0x258 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x258 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x258 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x258 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x25C "ISPPROC_CUSTOM_FORMAT_LUT0_W18_B7_0,"
rbitfld.long 0x25C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x25C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x25C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x25C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x260 "ISPPROC_CUSTOM_FORMAT_LUT0_W19_B0_0,"
rbitfld.long 0x260 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x260 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x260 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x260 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x264 "ISPPROC_CUSTOM_FORMAT_LUT0_W19_B1_0,"
rbitfld.long 0x264 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x264 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x264 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x264 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x268 "ISPPROC_CUSTOM_FORMAT_LUT0_W19_B2_0,"
rbitfld.long 0x268 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x268 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x268 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x268 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x26C "ISPPROC_CUSTOM_FORMAT_LUT0_W19_B3_0,"
rbitfld.long 0x26C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x26C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x26C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x26C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x270 "ISPPROC_CUSTOM_FORMAT_LUT0_W19_B4_0,"
rbitfld.long 0x270 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x270 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x270 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x270 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x274 "ISPPROC_CUSTOM_FORMAT_LUT0_W19_B5_0,"
rbitfld.long 0x274 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x274 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x274 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x274 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x278 "ISPPROC_CUSTOM_FORMAT_LUT0_W19_B6_0,"
rbitfld.long 0x278 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x278 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x278 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x278 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x27C "ISPPROC_CUSTOM_FORMAT_LUT0_W19_B7_0,"
rbitfld.long 0x27C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x27C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x27C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x27C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x280 "ISPPROC_CUSTOM_FORMAT_LUT0_W20_B0_0,"
rbitfld.long 0x280 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x280 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x280 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x280 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x284 "ISPPROC_CUSTOM_FORMAT_LUT0_W20_B1_0,"
rbitfld.long 0x284 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x284 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x284 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x284 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x288 "ISPPROC_CUSTOM_FORMAT_LUT0_W20_B2_0,"
rbitfld.long 0x288 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x288 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x288 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x288 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x28C "ISPPROC_CUSTOM_FORMAT_LUT0_W20_B3_0,"
rbitfld.long 0x28C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x28C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x28C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x28C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x290 "ISPPROC_CUSTOM_FORMAT_LUT0_W20_B4_0,"
rbitfld.long 0x290 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x290 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x290 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x290 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x294 "ISPPROC_CUSTOM_FORMAT_LUT0_W20_B5_0,"
rbitfld.long 0x294 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x294 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x294 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x294 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x298 "ISPPROC_CUSTOM_FORMAT_LUT0_W20_B6_0,"
rbitfld.long 0x298 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x298 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x298 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x298 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x29C "ISPPROC_CUSTOM_FORMAT_LUT0_W20_B7_0,"
rbitfld.long 0x29C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x29C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x29C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x29C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2A0 "ISPPROC_CUSTOM_FORMAT_LUT0_W21_B0_0,"
rbitfld.long 0x2A0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2A0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2A0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2A0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2A4 "ISPPROC_CUSTOM_FORMAT_LUT0_W21_B1_0,"
rbitfld.long 0x2A4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2A4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2A4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2A4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2A8 "ISPPROC_CUSTOM_FORMAT_LUT0_W21_B2_0,"
rbitfld.long 0x2A8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2A8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2A8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2A8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2AC "ISPPROC_CUSTOM_FORMAT_LUT0_W21_B3_0,"
rbitfld.long 0x2AC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2AC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2AC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2AC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2B0 "ISPPROC_CUSTOM_FORMAT_LUT0_W21_B4_0,"
rbitfld.long 0x2B0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2B0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2B0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2B0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2B4 "ISPPROC_CUSTOM_FORMAT_LUT0_W21_B5_0,"
rbitfld.long 0x2B4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2B4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2B4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2B4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2B8 "ISPPROC_CUSTOM_FORMAT_LUT0_W21_B6_0,"
rbitfld.long 0x2B8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2B8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2B8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2B8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2BC "ISPPROC_CUSTOM_FORMAT_LUT0_W21_B7_0,"
rbitfld.long 0x2BC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2BC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2BC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2BC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2C0 "ISPPROC_CUSTOM_FORMAT_LUT0_W22_B0_0,"
rbitfld.long 0x2C0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2C0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2C0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2C0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2C4 "ISPPROC_CUSTOM_FORMAT_LUT0_W22_B1_0,"
rbitfld.long 0x2C4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2C4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2C4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2C4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2C8 "ISPPROC_CUSTOM_FORMAT_LUT0_W22_B2_0,"
rbitfld.long 0x2C8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2C8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2C8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2C8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2CC "ISPPROC_CUSTOM_FORMAT_LUT0_W22_B3_0,"
rbitfld.long 0x2CC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2CC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2CC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2CC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2D0 "ISPPROC_CUSTOM_FORMAT_LUT0_W22_B4_0,"
rbitfld.long 0x2D0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2D0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2D0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2D0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2D4 "ISPPROC_CUSTOM_FORMAT_LUT0_W22_B5_0,"
rbitfld.long 0x2D4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2D4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2D4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2D4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2D8 "ISPPROC_CUSTOM_FORMAT_LUT0_W22_B6_0,"
rbitfld.long 0x2D8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2D8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2D8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2D8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2DC "ISPPROC_CUSTOM_FORMAT_LUT0_W22_B7_0,"
rbitfld.long 0x2DC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2DC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2DC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2DC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2E0 "ISPPROC_CUSTOM_FORMAT_LUT0_W23_B0_0,"
rbitfld.long 0x2E0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2E0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2E0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2E0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2E4 "ISPPROC_CUSTOM_FORMAT_LUT0_W23_B1_0,"
rbitfld.long 0x2E4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2E4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2E4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2E4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2E8 "ISPPROC_CUSTOM_FORMAT_LUT0_W23_B2_0,"
rbitfld.long 0x2E8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2E8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2E8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2E8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2EC "ISPPROC_CUSTOM_FORMAT_LUT0_W23_B3_0,"
rbitfld.long 0x2EC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2EC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2EC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2EC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2F0 "ISPPROC_CUSTOM_FORMAT_LUT0_W23_B4_0,"
rbitfld.long 0x2F0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2F0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2F0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2F0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2F4 "ISPPROC_CUSTOM_FORMAT_LUT0_W23_B5_0,"
rbitfld.long 0x2F4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2F4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2F4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2F4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2F8 "ISPPROC_CUSTOM_FORMAT_LUT0_W23_B6_0,"
rbitfld.long 0x2F8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2F8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2F8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2F8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2FC "ISPPROC_CUSTOM_FORMAT_LUT0_W23_B7_0,"
rbitfld.long 0x2FC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2FC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2FC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2FC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x300 "ISPPROC_CUSTOM_FORMAT_LUT0_W24_B0_0,"
rbitfld.long 0x300 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x300 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x300 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x300 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x304 "ISPPROC_CUSTOM_FORMAT_LUT0_W24_B1_0,"
rbitfld.long 0x304 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x304 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x304 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x304 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x308 "ISPPROC_CUSTOM_FORMAT_LUT0_W24_B2_0,"
rbitfld.long 0x308 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x308 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x308 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x308 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x30C "ISPPROC_CUSTOM_FORMAT_LUT0_W24_B3_0,"
rbitfld.long 0x30C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x30C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x30C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x30C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x310 "ISPPROC_CUSTOM_FORMAT_LUT0_W24_B4_0,"
rbitfld.long 0x310 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x310 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x310 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x310 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x314 "ISPPROC_CUSTOM_FORMAT_LUT0_W24_B5_0,"
rbitfld.long 0x314 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x314 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x314 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x314 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x318 "ISPPROC_CUSTOM_FORMAT_LUT0_W24_B6_0,"
rbitfld.long 0x318 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x318 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x318 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x318 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x31C "ISPPROC_CUSTOM_FORMAT_LUT0_W24_B7_0,"
rbitfld.long 0x31C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x31C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x31C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x31C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x320 "ISPPROC_CUSTOM_FORMAT_LUT0_W25_B0_0,"
rbitfld.long 0x320 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x320 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x320 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x320 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x324 "ISPPROC_CUSTOM_FORMAT_LUT0_W25_B1_0,"
rbitfld.long 0x324 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x324 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x324 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x324 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x328 "ISPPROC_CUSTOM_FORMAT_LUT0_W25_B2_0,"
rbitfld.long 0x328 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x328 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x328 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x328 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x32C "ISPPROC_CUSTOM_FORMAT_LUT0_W25_B3_0,"
rbitfld.long 0x32C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x32C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x32C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x32C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x330 "ISPPROC_CUSTOM_FORMAT_LUT0_W25_B4_0,"
rbitfld.long 0x330 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x330 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x330 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x330 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x334 "ISPPROC_CUSTOM_FORMAT_LUT0_W25_B5_0,"
rbitfld.long 0x334 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x334 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x334 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x334 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x338 "ISPPROC_CUSTOM_FORMAT_LUT0_W25_B6_0,"
rbitfld.long 0x338 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x338 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x338 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x338 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x33C "ISPPROC_CUSTOM_FORMAT_LUT0_W25_B7_0,"
rbitfld.long 0x33C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x33C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x33C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x33C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x340 "ISPPROC_CUSTOM_FORMAT_LUT0_W26_B0_0,"
rbitfld.long 0x340 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x340 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x340 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x340 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x344 "ISPPROC_CUSTOM_FORMAT_LUT0_W26_B1_0,"
rbitfld.long 0x344 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x344 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x344 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x344 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x348 "ISPPROC_CUSTOM_FORMAT_LUT0_W26_B2_0,"
rbitfld.long 0x348 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x348 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x348 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x348 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x34C "ISPPROC_CUSTOM_FORMAT_LUT0_W26_B3_0,"
rbitfld.long 0x34C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x34C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x34C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x34C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x350 "ISPPROC_CUSTOM_FORMAT_LUT0_W26_B4_0,"
rbitfld.long 0x350 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x350 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x350 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x350 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x354 "ISPPROC_CUSTOM_FORMAT_LUT0_W26_B5_0,"
rbitfld.long 0x354 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x354 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x354 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x354 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x358 "ISPPROC_CUSTOM_FORMAT_LUT0_W26_B6_0,"
rbitfld.long 0x358 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x358 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x358 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x358 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x35C "ISPPROC_CUSTOM_FORMAT_LUT0_W26_B7_0,"
rbitfld.long 0x35C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x35C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x35C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x35C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x360 "ISPPROC_CUSTOM_FORMAT_LUT0_W27_B0_0,"
rbitfld.long 0x360 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x360 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x360 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x360 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x364 "ISPPROC_CUSTOM_FORMAT_LUT0_W27_B1_0,"
rbitfld.long 0x364 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x364 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x364 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x364 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x368 "ISPPROC_CUSTOM_FORMAT_LUT0_W27_B2_0,"
rbitfld.long 0x368 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x368 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x368 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x368 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x36C "ISPPROC_CUSTOM_FORMAT_LUT0_W27_B3_0,"
rbitfld.long 0x36C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x36C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x36C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x36C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x370 "ISPPROC_CUSTOM_FORMAT_LUT0_W27_B4_0,"
rbitfld.long 0x370 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x370 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x370 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x370 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x374 "ISPPROC_CUSTOM_FORMAT_LUT0_W27_B5_0,"
rbitfld.long 0x374 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x374 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x374 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x374 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x378 "ISPPROC_CUSTOM_FORMAT_LUT0_W27_B6_0,"
rbitfld.long 0x378 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x378 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x378 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x378 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x37C "ISPPROC_CUSTOM_FORMAT_LUT0_W27_B7_0,"
rbitfld.long 0x37C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x37C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x37C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x37C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x380 "ISPPROC_CUSTOM_FORMAT_LUT0_W28_B0_0,"
rbitfld.long 0x380 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x380 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x380 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x380 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x384 "ISPPROC_CUSTOM_FORMAT_LUT0_W28_B1_0,"
rbitfld.long 0x384 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x384 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x384 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x384 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x388 "ISPPROC_CUSTOM_FORMAT_LUT0_W28_B2_0,"
rbitfld.long 0x388 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x388 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x388 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x388 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x38C "ISPPROC_CUSTOM_FORMAT_LUT0_W28_B3_0,"
rbitfld.long 0x38C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x38C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x38C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x38C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x390 "ISPPROC_CUSTOM_FORMAT_LUT0_W28_B4_0,"
rbitfld.long 0x390 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x390 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x390 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x390 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x394 "ISPPROC_CUSTOM_FORMAT_LUT0_W28_B5_0,"
rbitfld.long 0x394 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x394 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x394 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x394 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x398 "ISPPROC_CUSTOM_FORMAT_LUT0_W28_B6_0,"
rbitfld.long 0x398 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x398 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x398 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x398 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x39C "ISPPROC_CUSTOM_FORMAT_LUT0_W28_B7_0,"
rbitfld.long 0x39C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x39C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x39C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x39C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3A0 "ISPPROC_CUSTOM_FORMAT_LUT0_W29_B0_0,"
rbitfld.long 0x3A0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3A0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3A0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3A0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3A4 "ISPPROC_CUSTOM_FORMAT_LUT0_W29_B1_0,"
rbitfld.long 0x3A4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3A4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3A4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3A4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3A8 "ISPPROC_CUSTOM_FORMAT_LUT0_W29_B2_0,"
rbitfld.long 0x3A8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3A8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3A8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3A8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3AC "ISPPROC_CUSTOM_FORMAT_LUT0_W29_B3_0,"
rbitfld.long 0x3AC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3AC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3AC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3AC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3B0 "ISPPROC_CUSTOM_FORMAT_LUT0_W29_B4_0,"
rbitfld.long 0x3B0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3B0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3B0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3B0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3B4 "ISPPROC_CUSTOM_FORMAT_LUT0_W29_B5_0,"
rbitfld.long 0x3B4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3B4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3B4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3B4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3B8 "ISPPROC_CUSTOM_FORMAT_LUT0_W29_B6_0,"
rbitfld.long 0x3B8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3B8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3B8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3B8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3BC "ISPPROC_CUSTOM_FORMAT_LUT0_W29_B7_0,"
rbitfld.long 0x3BC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3BC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3BC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3BC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3C0 "ISPPROC_CUSTOM_FORMAT_LUT0_W30_B0_0,"
rbitfld.long 0x3C0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3C0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3C0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3C0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3C4 "ISPPROC_CUSTOM_FORMAT_LUT0_W30_B1_0,"
rbitfld.long 0x3C4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3C4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3C4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3C4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3C8 "ISPPROC_CUSTOM_FORMAT_LUT0_W30_B2_0,"
rbitfld.long 0x3C8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3C8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3C8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3C8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3CC "ISPPROC_CUSTOM_FORMAT_LUT0_W30_B3_0,"
rbitfld.long 0x3CC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3CC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3CC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3CC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3D0 "ISPPROC_CUSTOM_FORMAT_LUT0_W30_B4_0,"
rbitfld.long 0x3D0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3D0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3D0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3D0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3D4 "ISPPROC_CUSTOM_FORMAT_LUT0_W30_B5_0,"
rbitfld.long 0x3D4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3D4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3D4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3D4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3D8 "ISPPROC_CUSTOM_FORMAT_LUT0_W30_B6_0,"
rbitfld.long 0x3D8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3D8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3D8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3D8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3DC "ISPPROC_CUSTOM_FORMAT_LUT0_W30_B7_0,"
rbitfld.long 0x3DC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3DC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3DC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3DC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3E0 "ISPPROC_CUSTOM_FORMAT_LUT0_W31_B0_0,"
rbitfld.long 0x3E0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3E0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3E0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3E0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3E4 "ISPPROC_CUSTOM_FORMAT_LUT0_W31_B1_0,"
rbitfld.long 0x3E4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3E4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3E4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3E4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3E8 "ISPPROC_CUSTOM_FORMAT_LUT0_W31_B2_0,"
rbitfld.long 0x3E8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3E8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3E8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3E8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3EC "ISPPROC_CUSTOM_FORMAT_LUT0_W31_B3_0,"
rbitfld.long 0x3EC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3EC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3EC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3EC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3F0 "ISPPROC_CUSTOM_FORMAT_LUT0_W31_B4_0,"
rbitfld.long 0x3F0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3F0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3F0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3F0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3F4 "ISPPROC_CUSTOM_FORMAT_LUT0_W31_B5_0,"
rbitfld.long 0x3F4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3F4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3F4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3F4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3F8 "ISPPROC_CUSTOM_FORMAT_LUT0_W31_B6_0,"
rbitfld.long 0x3F8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3F8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3F8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3F8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3FC "ISPPROC_CUSTOM_FORMAT_LUT0_W31_B7_0,"
rbitfld.long 0x3FC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3FC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3FC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3FC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x400 "ISPPROC_CUSTOM_FORMAT_LUT0_W32_B0_0,"
rbitfld.long 0x400 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x400 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x400 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x400 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x404 "ISPPROC_CUSTOM_FORMAT_LUT0_W32_B1_0,"
rbitfld.long 0x404 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x404 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x404 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x404 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x408 "ISPPROC_CUSTOM_FORMAT_LUT0_W32_B2_0,"
rbitfld.long 0x408 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x408 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x408 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x408 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x40C "ISPPROC_CUSTOM_FORMAT_LUT0_W32_B3_0,"
rbitfld.long 0x40C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x40C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x40C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x40C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x410 "ISPPROC_CUSTOM_FORMAT_LUT0_W32_B4_0,"
rbitfld.long 0x410 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x410 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x410 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x410 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x414 "ISPPROC_CUSTOM_FORMAT_LUT0_W32_B5_0,"
rbitfld.long 0x414 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x414 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x414 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x414 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x418 "ISPPROC_CUSTOM_FORMAT_LUT0_W32_B6_0,"
rbitfld.long 0x418 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x418 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x418 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x418 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x41C "ISPPROC_CUSTOM_FORMAT_LUT0_W32_B7_0,"
rbitfld.long 0x41C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x41C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x41C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x41C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x420 "ISPPROC_CUSTOM_FORMAT_LUT0_W33_B0_0,"
rbitfld.long 0x420 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x420 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x420 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x420 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x424 "ISPPROC_CUSTOM_FORMAT_LUT0_W33_B1_0,"
rbitfld.long 0x424 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x424 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x424 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x424 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x428 "ISPPROC_CUSTOM_FORMAT_LUT0_W33_B2_0,"
rbitfld.long 0x428 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x428 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x428 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x428 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x42C "ISPPROC_CUSTOM_FORMAT_LUT0_W33_B3_0,"
rbitfld.long 0x42C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x42C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x42C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x42C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x430 "ISPPROC_CUSTOM_FORMAT_LUT0_W33_B4_0,"
rbitfld.long 0x430 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x430 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x430 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x430 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x434 "ISPPROC_CUSTOM_FORMAT_LUT0_W33_B5_0,"
rbitfld.long 0x434 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x434 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x434 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x434 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x438 "ISPPROC_CUSTOM_FORMAT_LUT0_W33_B6_0,"
rbitfld.long 0x438 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x438 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x438 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x438 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x43C "ISPPROC_CUSTOM_FORMAT_LUT0_W33_B7_0,"
rbitfld.long 0x43C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x43C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x43C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x43C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x440 "ISPPROC_CUSTOM_FORMAT_LUT0_W34_B0_0,"
rbitfld.long 0x440 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x440 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x440 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x440 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x444 "ISPPROC_CUSTOM_FORMAT_LUT0_W34_B1_0,"
rbitfld.long 0x444 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x444 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x444 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x444 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x448 "ISPPROC_CUSTOM_FORMAT_LUT0_W34_B2_0,"
rbitfld.long 0x448 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x448 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x448 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x448 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x44C "ISPPROC_CUSTOM_FORMAT_LUT0_W34_B3_0,"
rbitfld.long 0x44C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x44C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x44C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x44C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x450 "ISPPROC_CUSTOM_FORMAT_LUT0_W34_B4_0,"
rbitfld.long 0x450 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x450 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x450 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x450 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x454 "ISPPROC_CUSTOM_FORMAT_LUT0_W34_B5_0,"
rbitfld.long 0x454 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x454 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x454 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x454 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x458 "ISPPROC_CUSTOM_FORMAT_LUT0_W34_B6_0,"
rbitfld.long 0x458 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x458 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x458 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x458 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x45C "ISPPROC_CUSTOM_FORMAT_LUT0_W34_B7_0,"
rbitfld.long 0x45C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x45C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x45C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x45C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x460 "ISPPROC_CUSTOM_FORMAT_LUT0_W35_B0_0,"
rbitfld.long 0x460 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x460 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x460 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x460 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x464 "ISPPROC_CUSTOM_FORMAT_LUT0_W35_B1_0,"
rbitfld.long 0x464 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x464 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x464 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x464 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x468 "ISPPROC_CUSTOM_FORMAT_LUT0_W35_B2_0,"
rbitfld.long 0x468 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x468 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x468 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x468 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x46C "ISPPROC_CUSTOM_FORMAT_LUT0_W35_B3_0,"
rbitfld.long 0x46C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x46C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x46C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x46C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x470 "ISPPROC_CUSTOM_FORMAT_LUT0_W35_B4_0,"
rbitfld.long 0x470 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x470 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x470 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x470 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x474 "ISPPROC_CUSTOM_FORMAT_LUT0_W35_B5_0,"
rbitfld.long 0x474 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x474 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x474 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x474 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x478 "ISPPROC_CUSTOM_FORMAT_LUT0_W35_B6_0,"
rbitfld.long 0x478 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x478 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x478 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x478 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x47C "ISPPROC_CUSTOM_FORMAT_LUT0_W35_B7_0,"
rbitfld.long 0x47C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x47C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x47C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x47C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x480 "ISPPROC_CUSTOM_FORMAT_LUT0_W36_B0_0,"
rbitfld.long 0x480 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x480 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x480 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x480 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x484 "ISPPROC_CUSTOM_FORMAT_LUT0_W36_B1_0,"
rbitfld.long 0x484 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x484 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x484 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x484 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x488 "ISPPROC_CUSTOM_FORMAT_LUT0_W36_B2_0,"
rbitfld.long 0x488 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x488 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x488 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x488 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x48C "ISPPROC_CUSTOM_FORMAT_LUT0_W36_B3_0,"
rbitfld.long 0x48C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x48C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x48C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x48C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x490 "ISPPROC_CUSTOM_FORMAT_LUT0_W36_B4_0,"
rbitfld.long 0x490 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x490 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x490 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x490 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x494 "ISPPROC_CUSTOM_FORMAT_LUT0_W36_B5_0,"
rbitfld.long 0x494 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x494 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x494 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x494 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x498 "ISPPROC_CUSTOM_FORMAT_LUT0_W36_B6_0,"
rbitfld.long 0x498 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x498 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x498 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x498 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x49C "ISPPROC_CUSTOM_FORMAT_LUT0_W36_B7_0,"
rbitfld.long 0x49C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x49C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x49C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x49C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4A0 "ISPPROC_CUSTOM_FORMAT_LUT0_W37_B0_0,"
rbitfld.long 0x4A0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4A0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4A0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4A0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4A4 "ISPPROC_CUSTOM_FORMAT_LUT0_W37_B1_0,"
rbitfld.long 0x4A4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4A4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4A4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4A4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4A8 "ISPPROC_CUSTOM_FORMAT_LUT0_W37_B2_0,"
rbitfld.long 0x4A8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4A8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4A8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4A8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4AC "ISPPROC_CUSTOM_FORMAT_LUT0_W37_B3_0,"
rbitfld.long 0x4AC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4AC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4AC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4AC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4B0 "ISPPROC_CUSTOM_FORMAT_LUT0_W37_B4_0,"
rbitfld.long 0x4B0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4B0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4B0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4B0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4B4 "ISPPROC_CUSTOM_FORMAT_LUT0_W37_B5_0,"
rbitfld.long 0x4B4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4B4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4B4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4B4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4B8 "ISPPROC_CUSTOM_FORMAT_LUT0_W37_B6_0,"
rbitfld.long 0x4B8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4B8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4B8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4B8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4BC "ISPPROC_CUSTOM_FORMAT_LUT0_W37_B7_0,"
rbitfld.long 0x4BC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4BC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4BC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4BC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4C0 "ISPPROC_CUSTOM_FORMAT_LUT0_W38_B0_0,"
rbitfld.long 0x4C0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4C0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4C0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4C0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4C4 "ISPPROC_CUSTOM_FORMAT_LUT0_W38_B1_0,"
rbitfld.long 0x4C4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4C4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4C4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4C4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4C8 "ISPPROC_CUSTOM_FORMAT_LUT0_W38_B2_0,"
rbitfld.long 0x4C8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4C8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4C8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4C8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4CC "ISPPROC_CUSTOM_FORMAT_LUT0_W38_B3_0,"
rbitfld.long 0x4CC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4CC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4CC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4CC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4D0 "ISPPROC_CUSTOM_FORMAT_LUT0_W38_B4_0,"
rbitfld.long 0x4D0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4D0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4D0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4D0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4D4 "ISPPROC_CUSTOM_FORMAT_LUT0_W38_B5_0,"
rbitfld.long 0x4D4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4D4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4D4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4D4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4D8 "ISPPROC_CUSTOM_FORMAT_LUT0_W38_B6_0,"
rbitfld.long 0x4D8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4D8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4D8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4D8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4DC "ISPPROC_CUSTOM_FORMAT_LUT0_W38_B7_0,"
rbitfld.long 0x4DC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4DC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4DC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4DC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4E0 "ISPPROC_CUSTOM_FORMAT_LUT0_W39_B0_0,"
rbitfld.long 0x4E0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4E0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4E0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4E0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4E4 "ISPPROC_CUSTOM_FORMAT_LUT0_W39_B1_0,"
rbitfld.long 0x4E4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4E4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4E4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4E4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4E8 "ISPPROC_CUSTOM_FORMAT_LUT0_W39_B2_0,"
rbitfld.long 0x4E8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4E8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4E8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4E8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4EC "ISPPROC_CUSTOM_FORMAT_LUT0_W39_B3_0,"
rbitfld.long 0x4EC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4EC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4EC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4EC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4F0 "ISPPROC_CUSTOM_FORMAT_LUT0_W39_B4_0,"
rbitfld.long 0x4F0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4F0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4F0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4F0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4F4 "ISPPROC_CUSTOM_FORMAT_LUT0_W39_B5_0,"
rbitfld.long 0x4F4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4F4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4F4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4F4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4F8 "ISPPROC_CUSTOM_FORMAT_LUT0_W39_B6_0,"
rbitfld.long 0x4F8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4F8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4F8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4F8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4FC "ISPPROC_CUSTOM_FORMAT_LUT0_W39_B7_0,"
rbitfld.long 0x4FC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4FC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4FC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4FC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x500 "ISPPROC_CUSTOM_FORMAT_LUT0_W40_B0_0,"
rbitfld.long 0x500 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x500 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x500 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x500 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x504 "ISPPROC_CUSTOM_FORMAT_LUT0_W40_B1_0,"
rbitfld.long 0x504 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x504 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x504 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x504 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x508 "ISPPROC_CUSTOM_FORMAT_LUT0_W40_B2_0,"
rbitfld.long 0x508 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x508 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x508 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x508 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x50C "ISPPROC_CUSTOM_FORMAT_LUT0_W40_B3_0,"
rbitfld.long 0x50C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x50C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x50C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x50C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x510 "ISPPROC_CUSTOM_FORMAT_LUT0_W40_B4_0,"
rbitfld.long 0x510 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x510 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x510 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x510 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x514 "ISPPROC_CUSTOM_FORMAT_LUT0_W40_B5_0,"
rbitfld.long 0x514 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x514 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x514 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x514 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x518 "ISPPROC_CUSTOM_FORMAT_LUT0_W40_B6_0,"
rbitfld.long 0x518 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x518 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x518 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x518 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x51C "ISPPROC_CUSTOM_FORMAT_LUT0_W40_B7_0,"
rbitfld.long 0x51C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x51C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x51C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x51C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x520 "ISPPROC_CUSTOM_FORMAT_LUT0_W41_B0_0,"
rbitfld.long 0x520 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x520 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x520 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x520 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x524 "ISPPROC_CUSTOM_FORMAT_LUT0_W41_B1_0,"
rbitfld.long 0x524 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x524 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x524 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x524 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x528 "ISPPROC_CUSTOM_FORMAT_LUT0_W41_B2_0,"
rbitfld.long 0x528 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x528 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x528 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x528 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x52C "ISPPROC_CUSTOM_FORMAT_LUT0_W41_B3_0,"
rbitfld.long 0x52C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x52C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x52C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x52C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x530 "ISPPROC_CUSTOM_FORMAT_LUT0_W41_B4_0,"
rbitfld.long 0x530 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x530 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x530 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x530 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x534 "ISPPROC_CUSTOM_FORMAT_LUT0_W41_B5_0,"
rbitfld.long 0x534 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x534 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x534 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x534 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x538 "ISPPROC_CUSTOM_FORMAT_LUT0_W41_B6_0,"
rbitfld.long 0x538 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x538 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x538 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x538 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x53C "ISPPROC_CUSTOM_FORMAT_LUT0_W41_B7_0,"
rbitfld.long 0x53C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x53C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x53C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x53C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x540 "ISPPROC_CUSTOM_FORMAT_LUT0_W42_B0_0,"
rbitfld.long 0x540 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x540 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x540 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x540 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x544 "ISPPROC_CUSTOM_FORMAT_LUT0_W42_B1_0,"
rbitfld.long 0x544 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x544 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x544 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x544 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x548 "ISPPROC_CUSTOM_FORMAT_LUT0_W42_B2_0,"
rbitfld.long 0x548 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x548 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x548 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x548 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x54C "ISPPROC_CUSTOM_FORMAT_LUT0_W42_B3_0,"
rbitfld.long 0x54C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x54C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x54C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x54C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x550 "ISPPROC_CUSTOM_FORMAT_LUT0_W42_B4_0,"
rbitfld.long 0x550 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x550 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x550 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x550 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x554 "ISPPROC_CUSTOM_FORMAT_LUT0_W42_B5_0,"
rbitfld.long 0x554 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x554 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x554 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x554 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x558 "ISPPROC_CUSTOM_FORMAT_LUT0_W42_B6_0,"
rbitfld.long 0x558 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x558 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x558 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x558 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x55C "ISPPROC_CUSTOM_FORMAT_LUT0_W42_B7_0,"
rbitfld.long 0x55C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x55C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x55C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x55C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x560 "ISPPROC_CUSTOM_FORMAT_LUT0_W43_B0_0,"
rbitfld.long 0x560 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x560 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x560 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x560 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x564 "ISPPROC_CUSTOM_FORMAT_LUT0_W43_B1_0,"
rbitfld.long 0x564 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x564 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x564 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x564 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x568 "ISPPROC_CUSTOM_FORMAT_LUT0_W43_B2_0,"
rbitfld.long 0x568 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x568 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x568 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x568 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x56C "ISPPROC_CUSTOM_FORMAT_LUT0_W43_B3_0,"
rbitfld.long 0x56C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x56C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x56C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x56C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x570 "ISPPROC_CUSTOM_FORMAT_LUT0_W43_B4_0,"
rbitfld.long 0x570 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x570 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x570 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x570 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x574 "ISPPROC_CUSTOM_FORMAT_LUT0_W43_B5_0,"
rbitfld.long 0x574 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x574 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x574 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x574 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x578 "ISPPROC_CUSTOM_FORMAT_LUT0_W43_B6_0,"
rbitfld.long 0x578 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x578 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x578 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x578 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x57C "ISPPROC_CUSTOM_FORMAT_LUT0_W43_B7_0,"
rbitfld.long 0x57C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x57C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x57C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x57C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x580 "ISPPROC_CUSTOM_FORMAT_LUT0_W44_B0_0,"
rbitfld.long 0x580 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x580 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x580 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x580 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x584 "ISPPROC_CUSTOM_FORMAT_LUT0_W44_B1_0,"
rbitfld.long 0x584 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x584 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x584 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x584 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x588 "ISPPROC_CUSTOM_FORMAT_LUT0_W44_B2_0,"
rbitfld.long 0x588 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x588 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x588 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x588 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x58C "ISPPROC_CUSTOM_FORMAT_LUT0_W44_B3_0,"
rbitfld.long 0x58C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x58C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x58C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x58C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x590 "ISPPROC_CUSTOM_FORMAT_LUT0_W44_B4_0,"
rbitfld.long 0x590 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x590 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x590 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x590 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x594 "ISPPROC_CUSTOM_FORMAT_LUT0_W44_B5_0,"
rbitfld.long 0x594 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x594 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x594 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x594 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x598 "ISPPROC_CUSTOM_FORMAT_LUT0_W44_B6_0,"
rbitfld.long 0x598 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x598 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x598 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x598 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x59C "ISPPROC_CUSTOM_FORMAT_LUT0_W44_B7_0,"
rbitfld.long 0x59C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x59C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x59C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x59C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5A0 "ISPPROC_CUSTOM_FORMAT_LUT0_W45_B0_0,"
rbitfld.long 0x5A0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5A0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5A0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5A0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5A4 "ISPPROC_CUSTOM_FORMAT_LUT0_W45_B1_0,"
rbitfld.long 0x5A4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5A4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5A4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5A4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5A8 "ISPPROC_CUSTOM_FORMAT_LUT0_W45_B2_0,"
rbitfld.long 0x5A8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5A8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5A8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5A8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5AC "ISPPROC_CUSTOM_FORMAT_LUT0_W45_B3_0,"
rbitfld.long 0x5AC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5AC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5AC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5AC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5B0 "ISPPROC_CUSTOM_FORMAT_LUT0_W45_B4_0,"
rbitfld.long 0x5B0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5B0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5B0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5B0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5B4 "ISPPROC_CUSTOM_FORMAT_LUT0_W45_B5_0,"
rbitfld.long 0x5B4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5B4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5B4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5B4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5B8 "ISPPROC_CUSTOM_FORMAT_LUT0_W45_B6_0,"
rbitfld.long 0x5B8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5B8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5B8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5B8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5BC "ISPPROC_CUSTOM_FORMAT_LUT0_W45_B7_0,"
rbitfld.long 0x5BC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5BC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5BC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5BC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5C0 "ISPPROC_CUSTOM_FORMAT_LUT0_W46_B0_0,"
rbitfld.long 0x5C0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5C0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5C0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5C0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5C4 "ISPPROC_CUSTOM_FORMAT_LUT0_W46_B1_0,"
rbitfld.long 0x5C4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5C4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5C4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5C4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5C8 "ISPPROC_CUSTOM_FORMAT_LUT0_W46_B2_0,"
rbitfld.long 0x5C8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5C8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5C8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5C8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5CC "ISPPROC_CUSTOM_FORMAT_LUT0_W46_B3_0,"
rbitfld.long 0x5CC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5CC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5CC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5CC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5D0 "ISPPROC_CUSTOM_FORMAT_LUT0_W46_B4_0,"
rbitfld.long 0x5D0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5D0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5D0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5D0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5D4 "ISPPROC_CUSTOM_FORMAT_LUT0_W46_B5_0,"
rbitfld.long 0x5D4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5D4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5D4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5D4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5D8 "ISPPROC_CUSTOM_FORMAT_LUT0_W46_B6_0,"
rbitfld.long 0x5D8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5D8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5D8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5D8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5DC "ISPPROC_CUSTOM_FORMAT_LUT0_W46_B7_0,"
rbitfld.long 0x5DC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5DC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5DC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5DC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5E0 "ISPPROC_CUSTOM_FORMAT_LUT0_W47_B0_0,"
rbitfld.long 0x5E0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5E0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5E0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5E0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5E4 "ISPPROC_CUSTOM_FORMAT_LUT0_W47_B1_0,"
rbitfld.long 0x5E4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5E4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5E4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5E4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5E8 "ISPPROC_CUSTOM_FORMAT_LUT0_W47_B2_0,"
rbitfld.long 0x5E8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5E8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5E8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5E8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5EC "ISPPROC_CUSTOM_FORMAT_LUT0_W47_B3_0,"
rbitfld.long 0x5EC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5EC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5EC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5EC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5F0 "ISPPROC_CUSTOM_FORMAT_LUT0_W47_B4_0,"
rbitfld.long 0x5F0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5F0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5F0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5F0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5F4 "ISPPROC_CUSTOM_FORMAT_LUT0_W47_B5_0,"
rbitfld.long 0x5F4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5F4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5F4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5F4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5F8 "ISPPROC_CUSTOM_FORMAT_LUT0_W47_B6_0,"
rbitfld.long 0x5F8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5F8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5F8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5F8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5FC "ISPPROC_CUSTOM_FORMAT_LUT0_W47_B7_0,"
rbitfld.long 0x5FC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5FC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5FC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5FC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x600 "ISPPROC_CUSTOM_FORMAT_LUT0_W48_B0_0,"
rbitfld.long 0x600 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x600 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x600 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x600 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x604 "ISPPROC_CUSTOM_FORMAT_LUT0_W48_B1_0,"
rbitfld.long 0x604 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x604 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x604 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x604 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x608 "ISPPROC_CUSTOM_FORMAT_LUT0_W48_B2_0,"
rbitfld.long 0x608 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x608 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x608 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x608 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x60C "ISPPROC_CUSTOM_FORMAT_LUT0_W48_B3_0,"
rbitfld.long 0x60C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x60C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x60C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x60C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x610 "ISPPROC_CUSTOM_FORMAT_LUT0_W48_B4_0,"
rbitfld.long 0x610 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x610 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x610 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x610 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x614 "ISPPROC_CUSTOM_FORMAT_LUT0_W48_B5_0,"
rbitfld.long 0x614 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x614 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x614 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x614 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x618 "ISPPROC_CUSTOM_FORMAT_LUT0_W48_B6_0,"
rbitfld.long 0x618 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x618 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x618 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x618 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x61C "ISPPROC_CUSTOM_FORMAT_LUT0_W48_B7_0,"
rbitfld.long 0x61C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x61C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x61C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x61C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x620 "ISPPROC_CUSTOM_FORMAT_LUT0_W49_B0_0,"
rbitfld.long 0x620 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x620 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x620 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x620 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x624 "ISPPROC_CUSTOM_FORMAT_LUT0_W49_B1_0,"
rbitfld.long 0x624 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x624 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x624 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x624 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x628 "ISPPROC_CUSTOM_FORMAT_LUT0_W49_B2_0,"
rbitfld.long 0x628 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x628 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x628 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x628 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x62C "ISPPROC_CUSTOM_FORMAT_LUT0_W49_B3_0,"
rbitfld.long 0x62C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x62C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x62C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x62C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x630 "ISPPROC_CUSTOM_FORMAT_LUT0_W49_B4_0,"
rbitfld.long 0x630 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x630 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x630 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x630 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x634 "ISPPROC_CUSTOM_FORMAT_LUT0_W49_B5_0,"
rbitfld.long 0x634 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x634 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x634 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x634 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x638 "ISPPROC_CUSTOM_FORMAT_LUT0_W49_B6_0,"
rbitfld.long 0x638 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x638 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x638 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x638 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x63C "ISPPROC_CUSTOM_FORMAT_LUT0_W49_B7_0,"
rbitfld.long 0x63C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x63C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x63C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x63C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x640 "ISPPROC_CUSTOM_FORMAT_LUT0_W50_B0_0,"
rbitfld.long 0x640 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x640 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x640 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x640 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x644 "ISPPROC_CUSTOM_FORMAT_LUT0_W50_B1_0,"
rbitfld.long 0x644 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x644 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x644 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x644 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x648 "ISPPROC_CUSTOM_FORMAT_LUT0_W50_B2_0,"
rbitfld.long 0x648 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x648 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x648 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x648 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x64C "ISPPROC_CUSTOM_FORMAT_LUT0_W50_B3_0,"
rbitfld.long 0x64C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x64C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x64C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x64C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x650 "ISPPROC_CUSTOM_FORMAT_LUT0_W50_B4_0,"
rbitfld.long 0x650 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x650 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x650 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x650 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x654 "ISPPROC_CUSTOM_FORMAT_LUT0_W50_B5_0,"
rbitfld.long 0x654 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x654 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x654 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x654 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x658 "ISPPROC_CUSTOM_FORMAT_LUT0_W50_B6_0,"
rbitfld.long 0x658 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x658 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x658 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x658 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x65C "ISPPROC_CUSTOM_FORMAT_LUT0_W50_B7_0,"
rbitfld.long 0x65C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x65C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x65C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x65C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x660 "ISPPROC_CUSTOM_FORMAT_LUT0_W51_B0_0,"
rbitfld.long 0x660 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x660 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x660 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x660 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x664 "ISPPROC_CUSTOM_FORMAT_LUT0_W51_B1_0,"
rbitfld.long 0x664 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x664 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x664 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x664 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x668 "ISPPROC_CUSTOM_FORMAT_LUT0_W51_B2_0,"
rbitfld.long 0x668 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x668 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x668 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x668 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x66C "ISPPROC_CUSTOM_FORMAT_LUT0_W51_B3_0,"
rbitfld.long 0x66C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x66C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x66C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x66C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x670 "ISPPROC_CUSTOM_FORMAT_LUT0_W51_B4_0,"
rbitfld.long 0x670 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x670 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x670 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x670 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x674 "ISPPROC_CUSTOM_FORMAT_LUT0_W51_B5_0,"
rbitfld.long 0x674 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x674 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x674 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x674 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x678 "ISPPROC_CUSTOM_FORMAT_LUT0_W51_B6_0,"
rbitfld.long 0x678 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x678 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x678 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x678 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x67C "ISPPROC_CUSTOM_FORMAT_LUT0_W51_B7_0,"
rbitfld.long 0x67C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x67C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x67C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x67C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x680 "ISPPROC_CUSTOM_FORMAT_LUT0_W52_B0_0,"
rbitfld.long 0x680 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x680 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x680 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x680 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x684 "ISPPROC_CUSTOM_FORMAT_LUT0_W52_B1_0,"
rbitfld.long 0x684 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x684 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x684 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x684 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x688 "ISPPROC_CUSTOM_FORMAT_LUT0_W52_B2_0,"
rbitfld.long 0x688 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x688 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x688 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x688 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x68C "ISPPROC_CUSTOM_FORMAT_LUT0_W52_B3_0,"
rbitfld.long 0x68C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x68C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x68C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x68C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x690 "ISPPROC_CUSTOM_FORMAT_LUT0_W52_B4_0,"
rbitfld.long 0x690 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x690 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x690 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x690 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x694 "ISPPROC_CUSTOM_FORMAT_LUT0_W52_B5_0,"
rbitfld.long 0x694 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x694 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x694 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x694 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x698 "ISPPROC_CUSTOM_FORMAT_LUT0_W52_B6_0,"
rbitfld.long 0x698 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x698 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x698 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x698 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x69C "ISPPROC_CUSTOM_FORMAT_LUT0_W52_B7_0,"
rbitfld.long 0x69C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x69C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x69C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x69C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6A0 "ISPPROC_CUSTOM_FORMAT_LUT0_W53_B0_0,"
rbitfld.long 0x6A0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6A0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6A0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6A0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6A4 "ISPPROC_CUSTOM_FORMAT_LUT0_W53_B1_0,"
rbitfld.long 0x6A4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6A4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6A4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6A4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6A8 "ISPPROC_CUSTOM_FORMAT_LUT0_W53_B2_0,"
rbitfld.long 0x6A8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6A8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6A8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6A8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6AC "ISPPROC_CUSTOM_FORMAT_LUT0_W53_B3_0,"
rbitfld.long 0x6AC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6AC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6AC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6AC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6B0 "ISPPROC_CUSTOM_FORMAT_LUT0_W53_B4_0,"
rbitfld.long 0x6B0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6B0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6B0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6B0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6B4 "ISPPROC_CUSTOM_FORMAT_LUT0_W53_B5_0,"
rbitfld.long 0x6B4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6B4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6B4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6B4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6B8 "ISPPROC_CUSTOM_FORMAT_LUT0_W53_B6_0,"
rbitfld.long 0x6B8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6B8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6B8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6B8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6BC "ISPPROC_CUSTOM_FORMAT_LUT0_W53_B7_0,"
rbitfld.long 0x6BC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6BC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6BC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6BC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6C0 "ISPPROC_CUSTOM_FORMAT_LUT0_W54_B0_0,"
rbitfld.long 0x6C0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6C0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6C0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6C0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6C4 "ISPPROC_CUSTOM_FORMAT_LUT0_W54_B1_0,"
rbitfld.long 0x6C4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6C4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6C4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6C4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6C8 "ISPPROC_CUSTOM_FORMAT_LUT0_W54_B2_0,"
rbitfld.long 0x6C8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6C8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6C8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6C8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6CC "ISPPROC_CUSTOM_FORMAT_LUT0_W54_B3_0,"
rbitfld.long 0x6CC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6CC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6CC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6CC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6D0 "ISPPROC_CUSTOM_FORMAT_LUT0_W54_B4_0,"
rbitfld.long 0x6D0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6D0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6D0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6D0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6D4 "ISPPROC_CUSTOM_FORMAT_LUT0_W54_B5_0,"
rbitfld.long 0x6D4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6D4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6D4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6D4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6D8 "ISPPROC_CUSTOM_FORMAT_LUT0_W54_B6_0,"
rbitfld.long 0x6D8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6D8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6D8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6D8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6DC "ISPPROC_CUSTOM_FORMAT_LUT0_W54_B7_0,"
rbitfld.long 0x6DC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6DC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6DC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6DC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6E0 "ISPPROC_CUSTOM_FORMAT_LUT0_W55_B0_0,"
rbitfld.long 0x6E0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6E0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6E0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6E0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6E4 "ISPPROC_CUSTOM_FORMAT_LUT0_W55_B1_0,"
rbitfld.long 0x6E4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6E4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6E4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6E4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6E8 "ISPPROC_CUSTOM_FORMAT_LUT0_W55_B2_0,"
rbitfld.long 0x6E8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6E8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6E8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6E8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6EC "ISPPROC_CUSTOM_FORMAT_LUT0_W55_B3_0,"
rbitfld.long 0x6EC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6EC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6EC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6EC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6F0 "ISPPROC_CUSTOM_FORMAT_LUT0_W55_B4_0,"
rbitfld.long 0x6F0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6F0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6F0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6F0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6F4 "ISPPROC_CUSTOM_FORMAT_LUT0_W55_B5_0,"
rbitfld.long 0x6F4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6F4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6F4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6F4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6F8 "ISPPROC_CUSTOM_FORMAT_LUT0_W55_B6_0,"
rbitfld.long 0x6F8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6F8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6F8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6F8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6FC "ISPPROC_CUSTOM_FORMAT_LUT0_W55_B7_0,"
rbitfld.long 0x6FC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6FC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6FC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6FC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x700 "ISPPROC_CUSTOM_FORMAT_LUT0_W56_B0_0,"
rbitfld.long 0x700 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x700 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x700 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x700 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x704 "ISPPROC_CUSTOM_FORMAT_LUT0_W56_B1_0,"
rbitfld.long 0x704 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x704 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x704 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x704 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x708 "ISPPROC_CUSTOM_FORMAT_LUT0_W56_B2_0,"
rbitfld.long 0x708 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x708 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x708 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x708 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x70C "ISPPROC_CUSTOM_FORMAT_LUT0_W56_B3_0,"
rbitfld.long 0x70C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x70C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x70C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x70C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x710 "ISPPROC_CUSTOM_FORMAT_LUT0_W56_B4_0,"
rbitfld.long 0x710 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x710 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x710 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x710 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x714 "ISPPROC_CUSTOM_FORMAT_LUT0_W56_B5_0,"
rbitfld.long 0x714 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x714 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x714 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x714 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x718 "ISPPROC_CUSTOM_FORMAT_LUT0_W56_B6_0,"
rbitfld.long 0x718 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x718 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x718 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x718 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x71C "ISPPROC_CUSTOM_FORMAT_LUT0_W56_B7_0,"
rbitfld.long 0x71C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x71C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x71C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x71C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x720 "ISPPROC_CUSTOM_FORMAT_LUT0_W57_B0_0,"
rbitfld.long 0x720 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x720 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x720 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x720 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x724 "ISPPROC_CUSTOM_FORMAT_LUT0_W57_B1_0,"
rbitfld.long 0x724 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x724 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x724 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x724 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x728 "ISPPROC_CUSTOM_FORMAT_LUT0_W57_B2_0,"
rbitfld.long 0x728 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x728 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x728 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x728 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x72C "ISPPROC_CUSTOM_FORMAT_LUT0_W57_B3_0,"
rbitfld.long 0x72C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x72C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x72C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x72C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x730 "ISPPROC_CUSTOM_FORMAT_LUT0_W57_B4_0,"
rbitfld.long 0x730 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x730 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x730 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x730 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x734 "ISPPROC_CUSTOM_FORMAT_LUT0_W57_B5_0,"
rbitfld.long 0x734 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x734 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x734 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x734 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x738 "ISPPROC_CUSTOM_FORMAT_LUT0_W57_B6_0,"
rbitfld.long 0x738 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x738 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x738 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x738 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x73C "ISPPROC_CUSTOM_FORMAT_LUT0_W57_B7_0,"
rbitfld.long 0x73C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x73C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x73C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x73C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x740 "ISPPROC_CUSTOM_FORMAT_LUT0_W58_B0_0,"
rbitfld.long 0x740 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x740 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x740 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x740 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x744 "ISPPROC_CUSTOM_FORMAT_LUT0_W58_B1_0,"
rbitfld.long 0x744 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x744 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x744 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x744 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x748 "ISPPROC_CUSTOM_FORMAT_LUT0_W58_B2_0,"
rbitfld.long 0x748 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x748 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x748 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x748 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x74C "ISPPROC_CUSTOM_FORMAT_LUT0_W58_B3_0,"
rbitfld.long 0x74C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x74C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x74C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x74C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x750 "ISPPROC_CUSTOM_FORMAT_LUT0_W58_B4_0,"
rbitfld.long 0x750 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x750 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x750 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x750 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x754 "ISPPROC_CUSTOM_FORMAT_LUT0_W58_B5_0,"
rbitfld.long 0x754 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x754 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x754 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x754 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x758 "ISPPROC_CUSTOM_FORMAT_LUT0_W58_B6_0,"
rbitfld.long 0x758 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x758 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x758 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x758 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x75C "ISPPROC_CUSTOM_FORMAT_LUT0_W58_B7_0,"
rbitfld.long 0x75C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x75C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x75C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x75C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x760 "ISPPROC_CUSTOM_FORMAT_LUT0_W59_B0_0,"
rbitfld.long 0x760 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x760 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x760 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x760 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x764 "ISPPROC_CUSTOM_FORMAT_LUT0_W59_B1_0,"
rbitfld.long 0x764 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x764 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x764 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x764 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x768 "ISPPROC_CUSTOM_FORMAT_LUT0_W59_B2_0,"
rbitfld.long 0x768 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x768 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x768 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x768 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x76C "ISPPROC_CUSTOM_FORMAT_LUT0_W59_B3_0,"
rbitfld.long 0x76C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x76C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x76C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x76C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x770 "ISPPROC_CUSTOM_FORMAT_LUT0_W59_B4_0,"
rbitfld.long 0x770 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x770 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x770 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x770 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x774 "ISPPROC_CUSTOM_FORMAT_LUT0_W59_B5_0,"
rbitfld.long 0x774 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x774 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x774 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x774 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x778 "ISPPROC_CUSTOM_FORMAT_LUT0_W59_B6_0,"
rbitfld.long 0x778 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x778 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x778 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x778 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x77C "ISPPROC_CUSTOM_FORMAT_LUT0_W59_B7_0,"
rbitfld.long 0x77C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x77C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x77C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x77C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x780 "ISPPROC_CUSTOM_FORMAT_LUT0_W60_B0_0,"
rbitfld.long 0x780 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x780 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x780 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x780 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x784 "ISPPROC_CUSTOM_FORMAT_LUT0_W60_B1_0,"
rbitfld.long 0x784 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x784 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x784 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x784 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x788 "ISPPROC_CUSTOM_FORMAT_LUT0_W60_B2_0,"
rbitfld.long 0x788 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x788 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x788 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x788 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x78C "ISPPROC_CUSTOM_FORMAT_LUT0_W60_B3_0,"
rbitfld.long 0x78C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x78C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x78C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x78C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x790 "ISPPROC_CUSTOM_FORMAT_LUT0_W60_B4_0,"
rbitfld.long 0x790 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x790 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x790 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x790 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x794 "ISPPROC_CUSTOM_FORMAT_LUT0_W60_B5_0,"
rbitfld.long 0x794 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x794 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x794 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x794 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x798 "ISPPROC_CUSTOM_FORMAT_LUT0_W60_B6_0,"
rbitfld.long 0x798 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x798 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x798 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x798 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x79C "ISPPROC_CUSTOM_FORMAT_LUT0_W60_B7_0,"
rbitfld.long 0x79C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x79C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x79C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x79C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7A0 "ISPPROC_CUSTOM_FORMAT_LUT0_W61_B0_0,"
rbitfld.long 0x7A0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7A0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7A0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7A0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7A4 "ISPPROC_CUSTOM_FORMAT_LUT0_W61_B1_0,"
rbitfld.long 0x7A4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7A4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7A4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7A4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7A8 "ISPPROC_CUSTOM_FORMAT_LUT0_W61_B2_0,"
rbitfld.long 0x7A8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7A8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7A8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7A8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7AC "ISPPROC_CUSTOM_FORMAT_LUT0_W61_B3_0,"
rbitfld.long 0x7AC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7AC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7AC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7AC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7B0 "ISPPROC_CUSTOM_FORMAT_LUT0_W61_B4_0,"
rbitfld.long 0x7B0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7B0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7B0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7B0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7B4 "ISPPROC_CUSTOM_FORMAT_LUT0_W61_B5_0,"
rbitfld.long 0x7B4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7B4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7B4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7B4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7B8 "ISPPROC_CUSTOM_FORMAT_LUT0_W61_B6_0,"
rbitfld.long 0x7B8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7B8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7B8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7B8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7BC "ISPPROC_CUSTOM_FORMAT_LUT0_W61_B7_0,"
rbitfld.long 0x7BC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7BC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7BC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7BC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7C0 "ISPPROC_CUSTOM_FORMAT_LUT0_W62_B0_0,"
rbitfld.long 0x7C0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7C0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7C0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7C0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7C4 "ISPPROC_CUSTOM_FORMAT_LUT0_W62_B1_0,"
rbitfld.long 0x7C4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7C4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7C4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7C4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7C8 "ISPPROC_CUSTOM_FORMAT_LUT0_W62_B2_0,"
rbitfld.long 0x7C8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7C8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7C8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7C8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7CC "ISPPROC_CUSTOM_FORMAT_LUT0_W62_B3_0,"
rbitfld.long 0x7CC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7CC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7CC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7CC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7D0 "ISPPROC_CUSTOM_FORMAT_LUT0_W62_B4_0,"
rbitfld.long 0x7D0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7D0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7D0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7D0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7D4 "ISPPROC_CUSTOM_FORMAT_LUT0_W62_B5_0,"
rbitfld.long 0x7D4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7D4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7D4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7D4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7D8 "ISPPROC_CUSTOM_FORMAT_LUT0_W62_B6_0,"
rbitfld.long 0x7D8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7D8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7D8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7D8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7DC "ISPPROC_CUSTOM_FORMAT_LUT0_W62_B7_0,"
rbitfld.long 0x7DC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7DC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7DC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7DC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7E0 "ISPPROC_CUSTOM_FORMAT_LUT0_W63_B0_0,"
rbitfld.long 0x7E0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7E0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7E0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7E0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7E4 "ISPPROC_CUSTOM_FORMAT_LUT0_W63_B1_0,"
rbitfld.long 0x7E4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7E4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7E4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7E4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7E8 "ISPPROC_CUSTOM_FORMAT_LUT0_W63_B2_0,"
rbitfld.long 0x7E8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7E8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7E8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7E8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7EC "ISPPROC_CUSTOM_FORMAT_LUT0_W63_B3_0,"
rbitfld.long 0x7EC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7EC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7EC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7EC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7F0 "ISPPROC_CUSTOM_FORMAT_LUT0_W63_B4_0,"
rbitfld.long 0x7F0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7F0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7F0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7F0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7F4 "ISPPROC_CUSTOM_FORMAT_LUT0_W63_B5_0,"
rbitfld.long 0x7F4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7F4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7F4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7F4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7F8 "ISPPROC_CUSTOM_FORMAT_LUT0_W63_B6_0,"
rbitfld.long 0x7F8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7F8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7F8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7F8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7FC "ISPPROC_CUSTOM_FORMAT_LUT0_W63_B7_0,"
rbitfld.long 0x7FC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7FC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7FC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7FC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
group.long 0x9000++0x63
line.long 0x0 "RAW_SCALER_COEFF0_M2_M2_0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x0 0.--15. 1. "COEFF_M2_M2,Convoution coefficient"
line.long 0x4 "RAW_SCALER_COEFF0_M2_M1_0,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x4 0.--15. 1. "COEFF_M2_M1,Convoution coefficient"
line.long 0x8 "RAW_SCALER_COEFF0_M2_00_0,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x8 0.--15. 1. "COEFF_M2_00,Convoution coefficient"
line.long 0xC "RAW_SCALER_COEFF0_M2_P1_0,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0xC 0.--15. 1. "COEFF_M2_P1,Convoution coefficient"
line.long 0x10 "RAW_SCALER_COEFF0_M2_P2_0,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "COEFF_M2_P2,Convoution coefficient"
line.long 0x14 "RAW_SCALER_COEFF0_M1_M2_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "COEFF_M1_M2,Convoution coefficient"
line.long 0x18 "RAW_SCALER_COEFF0_M1_M1_0,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x18 0.--15. 1. "COEFF_M1_M1,Convoution coefficient"
line.long 0x1C "RAW_SCALER_COEFF0_M1_00_0,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x1C 0.--15. 1. "COEFF_M1_00,Convoution coefficient"
line.long 0x20 "RAW_SCALER_COEFF0_M1_P1_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "COEFF_M1_P1,Convoution coefficient"
line.long 0x24 "RAW_SCALER_COEFF0_M1_P2_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "COEFF_M1_P2,Convoution coefficient"
line.long 0x28 "RAW_SCALER_COEFF0_00_M2_0,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x28 0.--15. 1. "COEFF_00_M2,Convoution coefficient"
line.long 0x2C "RAW_SCALER_COEFF0_00_M1_0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x2C 0.--15. 1. "COEFF_00_M1,Convoution coefficient"
line.long 0x30 "RAW_SCALER_COEFF0_00_00_0,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x30 0.--15. 1. "COEFF_00_00,Convoution coefficient"
line.long 0x34 "RAW_SCALER_COEFF0_00_P1_0,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x34 0.--15. 1. "COEFF_00_P1,Convoution coefficient"
line.long 0x38 "RAW_SCALER_COEFF0_00_P2_0,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x38 0.--15. 1. "COEFF_00_P2,Convoution coefficient"
line.long 0x3C "RAW_SCALER_COEFF0_P1_M2_0,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x3C 0.--15. 1. "COEFF_P1_M2,Convoution coefficient"
line.long 0x40 "RAW_SCALER_COEFF0_P1_M1_0,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x40 0.--15. 1. "COEFF_P1_M1,Convoution coefficient"
line.long 0x44 "RAW_SCALER_COEFF0_P1_00_0,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x44 0.--15. 1. "COEFF_P1_00,Convoution coefficient"
line.long 0x48 "RAW_SCALER_COEFF0_P1_P1_0,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x48 0.--15. 1. "COEFF_P1_P1,Convoution coefficient"
line.long 0x4C "RAW_SCALER_COEFF0_P1_P2_0,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x4C 0.--15. 1. "COEFF_P1_P2,Convoution coefficient"
line.long 0x50 "RAW_SCALER_COEFF0_P2_M2_0,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x50 0.--15. 1. "COEFF_P2_M2,Convoution coefficient"
line.long 0x54 "RAW_SCALER_COEFF0_P2_M1_0,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x54 0.--15. 1. "COEFF_P2_M1,Convoution coefficient"
line.long 0x58 "RAW_SCALER_COEFF0_P2_00_0,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x58 0.--15. 1. "COEFF_P2_00,Convoution coefficient"
line.long 0x5C "RAW_SCALER_COEFF0_P2_P1_0,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x5C 0.--15. 1. "COEFF_P2_P1,Convoution coefficient"
line.long 0x60 "RAW_SCALER_COEFF0_P2_P2_0,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x60 0.--15. 1. "COEFF_P2_P2,Convoution coefficient"
group.long 0x9100++0x63
line.long 0x0 "RAW_SCALER_COEFF1_M2_M2_0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x0 0.--15. 1. "COEFF_M2_M2,Convoution coefficient"
line.long 0x4 "RAW_SCALER_COEFF1_M2_M1_0,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x4 0.--15. 1. "COEFF_M2_M1,Convoution coefficient"
line.long 0x8 "RAW_SCALER_COEFF1_M2_00_0,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x8 0.--15. 1. "COEFF_M2_00,Convoution coefficient"
line.long 0xC "RAW_SCALER_COEFF1_M2_P1_0,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0xC 0.--15. 1. "COEFF_M2_P1,Convoution coefficient"
line.long 0x10 "RAW_SCALER_COEFF1_M2_P2_0,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "COEFF_M2_P2,Convoution coefficient"
line.long 0x14 "RAW_SCALER_COEFF1_M1_M2_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "COEFF_M1_M2,Convoution coefficient"
line.long 0x18 "RAW_SCALER_COEFF1_M1_M1_0,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x18 0.--15. 1. "COEFF_M1_M1,Convoution coefficient"
line.long 0x1C "RAW_SCALER_COEFF1_M1_00_0,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x1C 0.--15. 1. "COEFF_M1_00,Convoution coefficient"
line.long 0x20 "RAW_SCALER_COEFF1_M1_P1_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "COEFF_M1_P1,Convoution coefficient"
line.long 0x24 "RAW_SCALER_COEFF1_M1_P2_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "COEFF_M1_P2,Convoution coefficient"
line.long 0x28 "RAW_SCALER_COEFF1_00_M2_0,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x28 0.--15. 1. "COEFF_00_M2,Convoution coefficient"
line.long 0x2C "RAW_SCALER_COEFF1_00_M1_0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x2C 0.--15. 1. "COEFF_00_M1,Convoution coefficient"
line.long 0x30 "RAW_SCALER_COEFF1_00_00_0,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x30 0.--15. 1. "COEFF_00_00,Convoution coefficient"
line.long 0x34 "RAW_SCALER_COEFF1_00_P1_0,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x34 0.--15. 1. "COEFF_00_P1,Convoution coefficient"
line.long 0x38 "RAW_SCALER_COEFF1_00_P2_0,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x38 0.--15. 1. "COEFF_00_P2,Convoution coefficient"
line.long 0x3C "RAW_SCALER_COEFF1_P1_M2_0,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x3C 0.--15. 1. "COEFF_P1_M2,Convoution coefficient"
line.long 0x40 "RAW_SCALER_COEFF1_P1_M1_0,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x40 0.--15. 1. "COEFF_P1_M1,Convoution coefficient"
line.long 0x44 "RAW_SCALER_COEFF1_P1_00_0,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x44 0.--15. 1. "COEFF_P1_00,Convoution coefficient"
line.long 0x48 "RAW_SCALER_COEFF1_P1_P1_0,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x48 0.--15. 1. "COEFF_P1_P1,Convoution coefficient"
line.long 0x4C "RAW_SCALER_COEFF1_P1_P2_0,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x4C 0.--15. 1. "COEFF_P1_P2,Convoution coefficient"
line.long 0x50 "RAW_SCALER_COEFF1_P2_M2_0,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x50 0.--15. 1. "COEFF_P2_M2,Convoution coefficient"
line.long 0x54 "RAW_SCALER_COEFF1_P2_M1_0,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x54 0.--15. 1. "COEFF_P2_M1,Convoution coefficient"
line.long 0x58 "RAW_SCALER_COEFF1_P2_00_0,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x58 0.--15. 1. "COEFF_P2_00,Convoution coefficient"
line.long 0x5C "RAW_SCALER_COEFF1_P2_P1_0,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x5C 0.--15. 1. "COEFF_P2_P1,Convoution coefficient"
line.long 0x60 "RAW_SCALER_COEFF1_P2_P2_0,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x60 0.--15. 1. "COEFF_P2_P2,Convoution coefficient"
group.long 0x9200++0x63
line.long 0x0 "RAW_SCALER_COEFF2_M2_M2_0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x0 0.--15. 1. "COEFF_M2_M2,Convoution coefficient"
line.long 0x4 "RAW_SCALER_COEFF2_M2_M1_0,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x4 0.--15. 1. "COEFF_M2_M1,Convoution coefficient"
line.long 0x8 "RAW_SCALER_COEFF2_M2_00_0,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x8 0.--15. 1. "COEFF_M2_00,Convoution coefficient"
line.long 0xC "RAW_SCALER_COEFF2_M2_P1_0,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0xC 0.--15. 1. "COEFF_M2_P1,Convoution coefficient"
line.long 0x10 "RAW_SCALER_COEFF2_M2_P2_0,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "COEFF_M2_P2,Convoution coefficient"
line.long 0x14 "RAW_SCALER_COEFF2_M1_M2_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "COEFF_M1_M2,Convoution coefficient"
line.long 0x18 "RAW_SCALER_COEFF2_M1_M1_0,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x18 0.--15. 1. "COEFF_M1_M1,Convoution coefficient"
line.long 0x1C "RAW_SCALER_COEFF2_M1_00_0,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x1C 0.--15. 1. "COEFF_M1_00,Convoution coefficient"
line.long 0x20 "RAW_SCALER_COEFF2_M1_P1_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "COEFF_M1_P1,Convoution coefficient"
line.long 0x24 "RAW_SCALER_COEFF2_M1_P2_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "COEFF_M1_P2,Convoution coefficient"
line.long 0x28 "RAW_SCALER_COEFF2_00_M2_0,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x28 0.--15. 1. "COEFF_00_M2,Convoution coefficient"
line.long 0x2C "RAW_SCALER_COEFF2_00_M1_0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x2C 0.--15. 1. "COEFF_00_M1,Convoution coefficient"
line.long 0x30 "RAW_SCALER_COEFF2_00_00_0,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x30 0.--15. 1. "COEFF_00_00,Convoution coefficient"
line.long 0x34 "RAW_SCALER_COEFF2_00_P1_0,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x34 0.--15. 1. "COEFF_00_P1,Convoution coefficient"
line.long 0x38 "RAW_SCALER_COEFF2_00_P2_0,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x38 0.--15. 1. "COEFF_00_P2,Convoution coefficient"
line.long 0x3C "RAW_SCALER_COEFF2_P1_M2_0,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x3C 0.--15. 1. "COEFF_P1_M2,Convoution coefficient"
line.long 0x40 "RAW_SCALER_COEFF2_P1_M1_0,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x40 0.--15. 1. "COEFF_P1_M1,Convoution coefficient"
line.long 0x44 "RAW_SCALER_COEFF2_P1_00_0,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x44 0.--15. 1. "COEFF_P1_00,Convoution coefficient"
line.long 0x48 "RAW_SCALER_COEFF2_P1_P1_0,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x48 0.--15. 1. "COEFF_P1_P1,Convoution coefficient"
line.long 0x4C "RAW_SCALER_COEFF2_P1_P2_0,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x4C 0.--15. 1. "COEFF_P1_P2,Convoution coefficient"
line.long 0x50 "RAW_SCALER_COEFF2_P2_M2_0,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x50 0.--15. 1. "COEFF_P2_M2,Convoution coefficient"
line.long 0x54 "RAW_SCALER_COEFF2_P2_M1_0,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x54 0.--15. 1. "COEFF_P2_M1,Convoution coefficient"
line.long 0x58 "RAW_SCALER_COEFF2_P2_00_0,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x58 0.--15. 1. "COEFF_P2_00,Convoution coefficient"
line.long 0x5C "RAW_SCALER_COEFF2_P2_P1_0,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x5C 0.--15. 1. "COEFF_P2_P1,Convoution coefficient"
line.long 0x60 "RAW_SCALER_COEFF2_P2_P2_0,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x60 0.--15. 1. "COEFF_P2_P2,Convoution coefficient"
group.long 0x9300++0x63
line.long 0x0 "RAW_SCALER_COEFF3_M2_M2_0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x0 0.--15. 1. "COEFF_M2_M2,Convoution coefficient"
line.long 0x4 "RAW_SCALER_COEFF3_M2_M1_0,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x4 0.--15. 1. "COEFF_M2_M1,Convoution coefficient"
line.long 0x8 "RAW_SCALER_COEFF3_M2_00_0,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x8 0.--15. 1. "COEFF_M2_00,Convoution coefficient"
line.long 0xC "RAW_SCALER_COEFF3_M2_P1_0,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0xC 0.--15. 1. "COEFF_M2_P1,Convoution coefficient"
line.long 0x10 "RAW_SCALER_COEFF3_M2_P2_0,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "COEFF_M2_P2,Convoution coefficient"
line.long 0x14 "RAW_SCALER_COEFF3_M1_M2_0,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "COEFF_M1_M2,Convoution coefficient"
line.long 0x18 "RAW_SCALER_COEFF3_M1_M1_0,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x18 0.--15. 1. "COEFF_M1_M1,Convoution coefficient"
line.long 0x1C "RAW_SCALER_COEFF3_M1_00_0,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x1C 0.--15. 1. "COEFF_M1_00,Convoution coefficient"
line.long 0x20 "RAW_SCALER_COEFF3_M1_P1_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "COEFF_M1_P1,Convoution coefficient"
line.long 0x24 "RAW_SCALER_COEFF3_M1_P2_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "COEFF_M1_P2,Convoution coefficient"
line.long 0x28 "RAW_SCALER_COEFF3_00_M2_0,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x28 0.--15. 1. "COEFF_00_M2,Convoution coefficient"
line.long 0x2C "RAW_SCALER_COEFF3_00_M1_0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x2C 0.--15. 1. "COEFF_00_M1,Convoution coefficient"
line.long 0x30 "RAW_SCALER_COEFF3_00_00_0,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x30 0.--15. 1. "COEFF_00_00,Convoution coefficient"
line.long 0x34 "RAW_SCALER_COEFF3_00_P1_0,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x34 0.--15. 1. "COEFF_00_P1,Convoution coefficient"
line.long 0x38 "RAW_SCALER_COEFF3_00_P2_0,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x38 0.--15. 1. "COEFF_00_P2,Convoution coefficient"
line.long 0x3C "RAW_SCALER_COEFF3_P1_M2_0,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x3C 0.--15. 1. "COEFF_P1_M2,Convoution coefficient"
line.long 0x40 "RAW_SCALER_COEFF3_P1_M1_0,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x40 0.--15. 1. "COEFF_P1_M1,Convoution coefficient"
line.long 0x44 "RAW_SCALER_COEFF3_P1_00_0,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x44 0.--15. 1. "COEFF_P1_00,Convoution coefficient"
line.long 0x48 "RAW_SCALER_COEFF3_P1_P1_0,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x48 0.--15. 1. "COEFF_P1_P1,Convoution coefficient"
line.long 0x4C "RAW_SCALER_COEFF3_P1_P2_0,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x4C 0.--15. 1. "COEFF_P1_P2,Convoution coefficient"
line.long 0x50 "RAW_SCALER_COEFF3_P2_M2_0,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x50 0.--15. 1. "COEFF_P2_M2,Convoution coefficient"
line.long 0x54 "RAW_SCALER_COEFF3_P2_M1_0,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x54 0.--15. 1. "COEFF_P2_M1,Convoution coefficient"
line.long 0x58 "RAW_SCALER_COEFF3_P2_00_0,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x58 0.--15. 1. "COEFF_P2_00,Convoution coefficient"
line.long 0x5C "RAW_SCALER_COEFF3_P2_P1_0,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x5C 0.--15. 1. "COEFF_P2_P1,Convoution coefficient"
line.long 0x60 "RAW_SCALER_COEFF3_P2_P2_0,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x60 0.--15. 1. "COEFF_P2_P2,Convoution coefficient"
group.long 0x9800++0x1B
line.long 0x0 "RAW_SCALER_MODE_0,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved bits. Do not write any different value from its initial value."
newline
hexmask.long.byte 0x0 24.--27. 1. "TARGET_VC,Virtual channel (VC) number to input RAW scaler"
newline
bitfld.long 0x0 22.--23. "Reserved_22,Reserved bits. Do not write any different value from its initial value." "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--21. 1. "TARGET_DT_CODE,Data type (DT) code to input RAW scaler"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 0. "ENABLE,Enable RAW scaler" "0: RAW scaler is disabled [default],1: RAW sacaler is enabled"
line.long 0x4 "RAW_SCALER_OUT_VBLANK_0,"
hexmask.long.byte 0x4 24.--31. 1. "VBLANK_FS_CYCLE,Number of cycles of vertical blanking period at frame start timing of RAW scaler output image"
newline
hexmask.long.tbyte 0x4 0.--23. 1. "VBLANK_FE_CYCLE,Number of cycles of vertical blanking period at frame end timing of RAW scaler output image"
line.long 0x8 "RAW_SCALER_OUT_HBLANK_0,"
hexmask.long.byte 0x8 28.--31. 1. "Reserved_28,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x8 24.--27. 1. "BACK_PORCH_CYCLE,Number of cycles of back porch for each line of RAW scaler output image"
newline
hexmask.long.byte 0x8 20.--23. 1. "Reserved_20,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x8 16.--19. 1. "FRONT_PORCH_CYCLE,Number of cycles of front porch for each line of RAW scaler output image"
newline
hexmask.long.byte 0x8 12.--15. 1. "Reserved_12,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x8 0.--11. 1. "HBLANK_CYCLE,Number of cycles of horitontal blanking period for each line of RAW scaled image"
line.long 0xC "RAW_SCALER_OUT_VS_HS_0,"
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0xC 16.--23. 1. "VS_HS_FALL_CYCLE,Number of cycles from VSYNC fall timing to HSYNC fall timing of RAW scaler output image"
newline
hexmask.long.byte 0xC 8.--15. 1. "Reserved_8,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0xC 0.--7. 1. "VS_HS_RISE_CYCLE,Number of cycles from VSYNC rise timing to HSYNC rise timing of RAW scaler output image"
line.long 0x10 "RAW_SCALER_INPUT_LSHIFT_0,"
hexmask.long 0x10 5.--31. 1. "Reserved_5,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x10 0.--4. 1. "INPUT_LSHIFT,Left shift amount for RAW scaler input pixel before multiplying convolution coefficient"
line.long 0x14 "RAW_SCALER_IMAGE_SIZE_0,"
hexmask.long.word 0x14 16.--31. 1. "IMAGE_HEIGHT,Image height (number of lines in one frame) of RAW scaler input image"
newline
hexmask.long.word 0x14 0.--15. 1. "IMAGE_WIDTH,Image width (number of pixels per line) of RAW scaler input image"
line.long 0x18 "RAW_SCALER_CONV_RSHIFT_0,"
hexmask.long.byte 0x18 24.--31. 1. "CONV3_RSHIFT,Right shift amount after convolution operation when coeff_select_value(x%4 y%4) is 3. Setting value of conv_rshift(3)"
newline
hexmask.long.byte 0x18 16.--23. 1. "CONV2_RSHIFT,Right shift amount after convolution operation when coeff_select_value(x%4 y%4) is 2. Setting value fo conv_rshift(2)"
newline
hexmask.long.byte 0x18 8.--15. 1. "CONV1_RSHIFT,Right shift amount after convolution operation when coeff_select_value(x%4 y%4) is 1. Setting value of conv_rshift(1)"
newline
hexmask.long.byte 0x18 0.--7. 1. "CONV0_RSHIFT,Right shift amount after convolution operation when coeff_select_value(x%4 y%4) is 0. Setting value of conv_rshift(0)"
group.long 0x9820++0x2B
line.long 0x0 "RAW_SCALER_COEFF_SEL_ROW0_0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x0 12.--15. 1. "COEFF_SEL_0_3,Setting value of coeff_select_table(0 3). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(0 3)"
newline
hexmask.long.byte 0x0 8.--11. 1. "COEFF_SEL_0_2,Setting value of coeff_select_table(0 2). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(0 2)"
newline
hexmask.long.byte 0x0 4.--7. 1. "COEFF_SEL_0_1,Setting value of coeff_select_table(0 1). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(0 1)"
newline
hexmask.long.byte 0x0 0.--3. 1. "COEFF_SEL_0_0,Setting value of coeff_select_table(0 0). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(0 0)"
line.long 0x4 "RAW_SCALER_COEFF_SEL_ROW1_0,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x4 12.--15. 1. "COEFF_SEL_1_3,Setting value of coeff_select_table(1 3). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(1 3)"
newline
hexmask.long.byte 0x4 8.--11. 1. "COEFF_SEL_1_2,Setting value of coeff_select_table(1 2). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(1 2)"
newline
hexmask.long.byte 0x4 4.--7. 1. "COEFF_SEL_1_1,Setting value of coeff_select_table(1 1). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(1 1)"
newline
hexmask.long.byte 0x4 0.--3. 1. "COEFF_SEL_1_0,Setting value of coeff_select_table(1 0). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(1 0)"
line.long 0x8 "RAW_SCALER_COEFF_SEL_ROW2_0,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x8 12.--15. 1. "COEFF_SEL_2_3,Setting value of coeff_select_table(2 3). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(2 3)"
newline
hexmask.long.byte 0x8 8.--11. 1. "COEFF_SEL_2_2,Setting value of coeff_select_table(2 2). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(2 2)"
newline
hexmask.long.byte 0x8 4.--7. 1. "COEFF_SEL_2_1,Setting value of coeff_select_table(2 1). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(2 1)"
newline
hexmask.long.byte 0x8 0.--3. 1. "COEFF_SEL_2_0,Setting value of coeff_select_table(2 0). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(2 0)"
line.long 0xC "RAW_SCALER_COEFF_SEL_ROW3_0,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0xC 12.--15. 1. "COEFF_SEL_3_3,Setting value of coeff_select_table(3 3). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(3 3)"
newline
hexmask.long.byte 0xC 8.--11. 1. "COEFF_SEL_3_2,Setting value of coeff_select_table(3 2). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(3 2)"
newline
hexmask.long.byte 0xC 4.--7. 1. "COEFF_SEL_3_1,Setting value of coeff_select_table(3 1). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(3 1)"
newline
hexmask.long.byte 0xC 0.--3. 1. "COEFF_SEL_3_0,Setting value of coeff_select_table(3 0). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(3 0)"
line.long 0x10 "RAW_SCALER_ROUNDING0_0,"
hexmask.long 0x10 0.--31. 1. "ROUNDING0,Setting value of rounding(0)"
line.long 0x14 "RAW_SCALER_ROUNDING1_0,"
hexmask.long 0x14 0.--31. 1. "ROUNDING1,Setting value of rounding(1)"
line.long 0x18 "RAW_SCALER_ROUNDING2_0,"
hexmask.long 0x18 0.--31. 1. "ROUNDING2,Setting value of rounding(2)"
line.long 0x1C "RAW_SCALER_ROUNDING3_0,"
hexmask.long 0x1C 0.--31. 1. "ROUNDING3,Setting value of rounding(3)"
line.long 0x20 "RAW_SCALER_SAT_MIN_0,"
hexmask.long 0x20 0.--31. 1. "SATURATION_MIN,Minimum value of saturation operation after convolution"
line.long 0x24 "RAW_SCALER_SAT_MAX_0,"
hexmask.long.byte 0x24 24.--31. 1. "Reserved_24,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.tbyte 0x24 0.--23. 1. "SATURATION_MAX,Maximum value of saturation operation after convolution"
line.long 0x28 "RAW_SCALER_SAT_FINAL_LSHIFT_0,"
hexmask.long 0x28 5.--31. 1. "Reserved_5,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x28 0.--4. 1. "FINAL_LSHIFT,Left shift amount after convoution"
tree.end
tree "ISP_1"
base ad:0xFED20000
rgroup.long 0x0++0x3
line.long 0x0 "ISPVCR_1,The value to be read varies depending on the product"
hexmask.long 0x0 0.--31. 1. "ISPVCR,ISP Version Control Register"
group.long 0x4++0x7
line.long 0x0 "ISPFIFOCTRL_1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved"
newline
hexmask.long.byte 0x0 12.--15. 1. "TRACE_SEL3,Selection signal of channels to output to trace port 3"
newline
hexmask.long.byte 0x0 8.--11. 1. "TRACE_SEL2,Selection signal of channels to output to trace port 2"
newline
hexmask.long.byte 0x0 3.--7. 1. "Reserved_3,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 2. "FIFO_PUSH_CSI,FIFO ENABLE for CSI" "0: CSI FIFO disable,1: CSI FIFO enable [default]"
newline
rbitfld.long 0x0 0.--1. "Reserved_0,Reserved. (These bits are always read as 0.)" "0,1,2,3"
line.long 0x4 "ISPINPUTSEL0_1,"
bitfld.long 0x4 31. "SEL_CSI0,Select CSI input for Pixel Reconstructor" "0: CSI input 0 [default],1: CSI input 1"
newline
hexmask.long.word 0x4 16.--30. 1. "Reserved_16,Reserved bits. Do not write any different value from its initial value."
newline
hexmask.long.byte 0x4 12.--15. 1. "TRACE_SEL1,Selection signal of channels to output to trace port 1"
newline
hexmask.long.byte 0x4 8.--11. 1. "TRACE_SEL0,Selection signal of channels to output to trace port 0"
newline
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved. (These bits are always read as B'0100.)"
newline
hexmask.long.byte 0x4 0.--3. 1. "CSI_SEL,Select of ISP core"
group.long 0x14++0x3
line.long 0x0 "ISPSTART_1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x0 0.--15. 1. "START_ISP,Starting and stopping control of ISP"
rgroup.long 0x40++0xF
line.long 0x0 "ISPINT_STATUS_1,"
bitfld.long 0x0 31. "ST31,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 30. "ST30,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 29. "ST29,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 28. "ST28,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 27. "ST27,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 26. "ST26,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 25. "ST25,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 24. "ST24,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 23. "ST23,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 22. "ST22,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 21. "ST21,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 20. "ST20,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 19. "ST19,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 18. "ST18,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 17. "ST17,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 16. "ST16,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 15. "ST15,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 14. "ST14,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 13. "ST13,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 12. "ST12,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 11. "ST11,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 10. "ST10,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 9. "ST9,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 8. "ST8,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 7. "ST7,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 6. "ST6,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 5. "ST5,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 4. "ST4,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 3. "ST3,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 2. "ST2,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 1. "ST1,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
newline
bitfld.long 0x0 0. "ST0,Interrupt status." "0: Interrupt is not happened [default],1: Interrupt is happened"
line.long 0x4 "ISPERR0_STATUS_1,"
bitfld.long 0x4 31. "ST31,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 30. "ST30,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 29. "ST29,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 28. "ST28,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 27. "ST27,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 26. "ST26,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 25. "ST25,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 24. "ST24,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 23. "ST23,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 22. "ST22,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 21. "ST21,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 20. "ST20,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 19. "ST19,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 18. "ST18,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 17. "ST17,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 16. "ST16,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 15. "ST15,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 14. "ST14,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 13. "ST13,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 12. "ST12,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 11. "ST11,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 10. "ST10,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 9. "ST9,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 8. "ST8,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 7. "ST7,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 6. "ST6,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 5. "ST5,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 4. "ST4,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 3. "ST3,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 2. "ST2,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 1. "ST1,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 0. "ST0,Error status." "0: Error is not happened [default],1: Error is happened"
line.long 0x8 "ISPERR1_STATUS_1,"
bitfld.long 0x8 31. "ST31,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 30. "ST30,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 29. "ST29,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 28. "ST28,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 27. "ST27,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 26. "ST26,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 25. "ST25,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 24. "ST24,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 23. "ST23,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 22. "ST22,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 21. "ST21,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 20. "ST20,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 19. "ST19,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 18. "ST18,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 17. "ST17,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 16. "ST16,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 15. "ST15,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 14. "ST14,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 13. "ST13,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 12. "ST12,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 11. "ST11,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 10. "ST10,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 9. "ST9,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 8. "ST8,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 7. "ST7,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 6. "ST6,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 5. "ST5,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 4. "ST4,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 3. "ST3,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 2. "ST2,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 1. "ST1,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x8 0. "ST0,Error status." "0: Error is not happened [default],1: Error is happened"
line.long 0xC "ISPERR2_STATUS_1,"
bitfld.long 0xC 31. "ST31,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 30. "ST30,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 29. "ST29,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 28. "ST28,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 27. "ST27,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 26. "ST26,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 25. "ST25,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 24. "ST24,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 23. "ST23,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 22. "ST22,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 21. "ST21,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 20. "ST20,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 19. "ST19,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 18. "ST18,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 17. "ST17,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 16. "ST16,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 15. "ST15,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 14. "ST14,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 13. "ST13,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 12. "ST12,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 11. "ST11,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 10. "ST10,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 9. "ST9,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 8. "ST8,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 7. "ST7,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 6. "ST6,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 5. "ST5,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 4. "ST4,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 3. "ST3,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 2. "ST2,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 1. "ST1,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0xC 0. "ST0,Error status." "0: Error is not happened [default],1: Error is happened"
wgroup.long 0x50++0xF
line.long 0x0 "ISPINT_CLEAR_1,"
bitfld.long 0x0 31. "CLR31,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 30. "CLR30,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 29. "CLR29,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 28. "CLR28,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 27. "CLR27,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 26. "CLR26,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 25. "CLR25,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 24. "CLR24,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 23. "CLR23,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 22. "CLR22,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 21. "CLR21,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 20. "CLR20,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 19. "CLR19,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 18. "CLR18,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 17. "CLR17,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 16. "CLR16,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 15. "CLR15,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 14. "CLR14,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 13. "CLR13,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 12. "CLR12,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 11. "CLR11,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 10. "CLR10,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 9. "CLR9,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 8. "CLR8,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 7. "CLR7,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 6. "CLR6,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 5. "CLR5,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 4. "CLR4,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 3. "CLR3,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 2. "CLR2,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 1. "CLR1,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 0. "CLR0,Clear register for interrupt status ST[n] (n=0~31)." "0,1"
line.long 0x4 "ISPERR0_CLEAR_1,"
bitfld.long 0x4 31. "CLR31,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 30. "CLR30,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 29. "CLR29,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 28. "CLR28,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 27. "CLR27,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 26. "CLR26,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 25. "CLR25,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 24. "CLR24,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 23. "CLR23,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 22. "CLR22,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 21. "CLR21,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 20. "CLR20,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 19. "CLR19,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 18. "CLR18,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 17. "CLR17,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 16. "CLR16,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 15. "CLR15,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 14. "CLR14,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 13. "CLR13,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 12. "CLR12,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 11. "CLR11,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 10. "CLR10,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 9. "CLR9,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 8. "CLR8,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 7. "CLR7,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 6. "CLR6,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 5. "CLR5,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 4. "CLR4,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 3. "CLR3,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 2. "CLR2,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 1. "CLR1,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 0. "CLR0,Clear register for error status ST[n] (n=0~31)." "0,1"
line.long 0x8 "ISPERR1_CLEAR_1,"
bitfld.long 0x8 31. "CLR31,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 30. "CLR30,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 29. "CLR29,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 28. "CLR28,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 27. "CLR27,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 26. "CLR26,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 25. "CLR25,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 24. "CLR24,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 23. "CLR23,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 22. "CLR22,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 21. "CLR21,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 20. "CLR20,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 19. "CLR19,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 18. "CLR18,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 17. "CLR17,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 16. "CLR16,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 15. "CLR15,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 14. "CLR14,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 13. "CLR13,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 12. "CLR12,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 11. "CLR11,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 10. "CLR10,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 9. "CLR9,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 8. "CLR8,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 7. "CLR7,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 6. "CLR6,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 5. "CLR5,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 4. "CLR4,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 3. "CLR3,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 2. "CLR2,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 1. "CLR1,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x8 0. "CLR0,Clear register for error status ST[n] (n=0~31)." "0,1"
line.long 0xC "ISPERR2_CLEAR_1,"
bitfld.long 0xC 31. "CLR31,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 30. "CLR30,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 29. "CLR29,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 28. "CLR28,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 27. "CLR27,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 26. "CLR26,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 25. "CLR25,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 24. "CLR24,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 23. "CLR23,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 22. "CLR22,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 21. "CLR21,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 20. "CLR20,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 19. "CLR19,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 18. "CLR18,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 17. "CLR17,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 16. "CLR16,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 15. "CLR15,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 14. "CLR14,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 13. "CLR13,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 12. "CLR12,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 11. "CLR11,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 10. "CLR10,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 9. "CLR9,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 8. "CLR8,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 7. "CLR7,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 6. "CLR6,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 5. "CLR5,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 4. "CLR4,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 3. "CLR3,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 2. "CLR2,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 1. "CLR1,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0xC 0. "CLR0,Clear register for error status ST[n] (n=0~31)." "0,1"
group.long 0x60++0xF
line.long 0x0 "ISPINT_ENABLE_1,"
bitfld.long 0x0 31. "EN31,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 30. "EN30,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 29. "EN29,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 28. "EN28,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 27. "EN27,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 26. "EN26,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 25. "EN25,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 24. "EN24,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 23. "EN23,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 22. "EN22,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 21. "EN21,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 20. "EN20,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 19. "EN19,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 18. "EN18,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 17. "EN17,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 16. "EN16,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 15. "EN15,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 14. "EN14,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 13. "EN13,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 12. "EN12,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 11. "EN11,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 10. "EN10,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 9. "EN9,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 8. "EN8,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 7. "EN7,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 6. "EN6,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 5. "EN5,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 4. "EN4,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 3. "EN3,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 2. "EN2,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 1. "EN1,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
newline
bitfld.long 0x0 0. "EN0,Enable register of interrupt request notification to INTC" "0: Interrupt request is not notified [default],1: Interrupt request is notified to INTC"
line.long 0x4 "ISPERR0_ENABLE_1,"
bitfld.long 0x4 31. "EN31,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 30. "EN30,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 29. "EN29,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 28. "EN28,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 27. "EN27,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 26. "EN26,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 25. "EN25,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 24. "EN24,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 23. "EN23,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 22. "EN22,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 21. "EN21,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 20. "EN20,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 19. "EN19,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 18. "EN18,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 17. "EN17,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 16. "EN16,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 15. "EN15,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 14. "EN14,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 13. "EN13,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 12. "EN12,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 11. "EN11,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 10. "EN10,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 9. "EN9,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 8. "EN8,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 7. "EN7,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 6. "EN6,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 5. "EN5,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 4. "EN4,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 3. "EN3,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 2. "EN2,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 1. "EN1,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 0. "EN0,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
line.long 0x8 "ISPERR1_ENABLE_1,"
bitfld.long 0x8 31. "EN31,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 30. "EN30,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 29. "EN29,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 28. "EN28,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 27. "EN27,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 26. "EN26,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 25. "EN25,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 24. "EN24,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 23. "EN23,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 22. "EN22,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 21. "EN21,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 20. "EN20,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 19. "EN19,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 18. "EN18,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 17. "EN17,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 16. "EN16,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 15. "EN15,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 14. "EN14,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 13. "EN13,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 12. "EN12,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 11. "EN11,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 10. "EN10,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 9. "EN9,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 8. "EN8,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 7. "EN7,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 6. "EN6,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 5. "EN5,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 4. "EN4,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 3. "EN3,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 2. "EN2,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 1. "EN1,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x8 0. "EN0,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
line.long 0xC "ISPERR2_ENABLE_1,"
bitfld.long 0xC 31. "EN31,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 30. "EN30,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 29. "EN29,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 28. "EN28,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 27. "EN27,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 26. "EN26,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 25. "EN25,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 24. "EN24,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 23. "EN23,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 22. "EN22,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 21. "EN21,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 20. "EN20,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 19. "EN19,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 18. "EN18,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 17. "EN17,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 16. "EN16,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 15. "EN15,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 14. "EN14,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 13. "EN13,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 12. "EN12,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 11. "EN11,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 10. "EN10,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 9. "EN9,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 8. "EN8,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 7. "EN7,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 6. "EN6,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 5. "EN5,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 4. "EN4,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 3. "EN3,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 2. "EN2,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 1. "EN1,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0xC 0. "EN0,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
rgroup.long 0x80++0x7
line.long 0x0 "ISPERR3_STATUS_1,"
bitfld.long 0x0 31. "ST31,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 30. "ST30,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 29. "ST29,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 28. "ST28,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 27. "ST27,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 26. "ST26,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 25. "ST25,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 24. "ST24,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 23. "ST23,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 22. "ST22,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 21. "ST21,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 20. "ST20,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 19. "ST19,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 18. "ST18,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 17. "ST17,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 16. "ST16,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 15. "ST15,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 14. "ST14,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 13. "ST13,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 12. "ST12,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 11. "ST11,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 10. "ST10,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 9. "ST9,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 8. "ST8,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 7. "ST7,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 6. "ST6,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 5. "ST5,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 4. "ST4,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 3. "ST3,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 2. "ST2,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 1. "ST1,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x0 0. "ST0,Error status." "0: Error is not happened [default],1: Error is happened"
line.long 0x4 "ISPERR4_STATUS_1,"
bitfld.long 0x4 31. "ST31,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 30. "ST30,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 29. "ST29,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 28. "ST28,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 27. "ST27,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 26. "ST26,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 25. "ST25,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 24. "ST24,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 23. "ST23,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 22. "ST22,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 21. "ST21,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 20. "ST20,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 19. "ST19,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 18. "ST18,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 17. "ST17,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 16. "ST16,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 15. "ST15,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 14. "ST14,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 13. "ST13,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 12. "ST12,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 11. "ST11,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 10. "ST10,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 9. "ST9,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 8. "ST8,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 7. "ST7,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 6. "ST6,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 5. "ST5,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 4. "ST4,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 3. "ST3,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 2. "ST2,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 1. "ST1,Error status." "0: Error is not happened [default],1: Error is happened"
newline
bitfld.long 0x4 0. "ST0,Error status." "0: Error is not happened [default],1: Error is happened"
wgroup.long 0x90++0x7
line.long 0x0 "ISPERR3_CLEAR_1,"
bitfld.long 0x0 31. "CLR31,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 30. "CLR30,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 29. "CLR29,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 28. "CLR28,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 27. "CLR27,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 26. "CLR26,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 25. "CLR25,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 24. "CLR24,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 23. "CLR23,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 22. "CLR22,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 21. "CLR21,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 20. "CLR20,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 19. "CLR19,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 18. "CLR18,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 17. "CLR17,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 16. "CLR16,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 15. "CLR15,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 14. "CLR14,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 13. "CLR13,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 12. "CLR12,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 11. "CLR11,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 10. "CLR10,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 9. "CLR9,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 8. "CLR8,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 7. "CLR7,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 6. "CLR6,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 5. "CLR5,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 4. "CLR4,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 3. "CLR3,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 2. "CLR2,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 1. "CLR1,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x0 0. "CLR0,Clear register for error status ST[n] (n=0~31)." "0,1"
line.long 0x4 "ISPERR4_CLEAR_1,"
bitfld.long 0x4 31. "CLR31,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 30. "CLR30,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 29. "CLR29,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 28. "CLR28,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 27. "CLR27,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 26. "CLR26,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 25. "CLR25,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 24. "CLR24,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 23. "CLR23,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 22. "CLR22,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 21. "CLR21,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 20. "CLR20,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 19. "CLR19,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 18. "CLR18,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 17. "CLR17,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 16. "CLR16,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 15. "CLR15,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 14. "CLR14,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 13. "CLR13,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 12. "CLR12,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 11. "CLR11,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 10. "CLR10,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 9. "CLR9,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 8. "CLR8,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 7. "CLR7,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 6. "CLR6,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 5. "CLR5,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 4. "CLR4,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 3. "CLR3,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 2. "CLR2,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 1. "CLR1,Clear register for error status ST[n] (n=0~31)." "0,1"
newline
bitfld.long 0x4 0. "CLR0,Clear register for error status ST[n] (n=0~31)." "0,1"
group.long 0xA0++0x7
line.long 0x0 "ISPERR3_ENABLE_1,"
bitfld.long 0x0 31. "EN31,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 30. "EN30,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 29. "EN29,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 28. "EN28,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 27. "EN27,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 26. "EN26,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 25. "EN25,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 24. "EN24,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 23. "EN23,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 22. "EN22,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 21. "EN21,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 20. "EN20,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 19. "EN19,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 18. "EN18,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 17. "EN17,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 16. "EN16,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 15. "EN15,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 14. "EN14,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 13. "EN13,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 12. "EN12,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 11. "EN11,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 10. "EN10,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 9. "EN9,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 8. "EN8,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 7. "EN7,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 6. "EN6,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 5. "EN5,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 4. "EN4,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 3. "EN3,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 2. "EN2,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 1. "EN1,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x0 0. "EN0,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
line.long 0x4 "ISPERR4_ENABLE_1,"
bitfld.long 0x4 31. "EN31,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 30. "EN30,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 29. "EN29,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 28. "EN28,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 27. "EN27,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 26. "EN26,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 25. "EN25,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 24. "EN24,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 23. "EN23,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 22. "EN22,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 21. "EN21,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 20. "EN20,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 19. "EN19,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 18. "EN18,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 17. "EN17,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 16. "EN16,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 15. "EN15,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 14. "EN14,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 13. "EN13,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 12. "EN12,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 11. "EN11,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 10. "EN10,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 9. "EN9,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 8. "EN8,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 7. "EN7,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 6. "EN6,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 5. "EN5,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 4. "EN4,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 3. "EN3,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 2. "EN2,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 1. "EN1,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
newline
bitfld.long 0x4 0. "EN0,Enable register of error request notification to ECM" "0: Error request is not notified [default],1: Error request is notified to ECM"
group.long 0xC0++0x3
line.long 0x0 "ISP_PADDING_CTRL_1,"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved bits. Do not write any different value from its initial value."
newline
hexmask.long.word 0x0 0.--11. 1. "PADDING_NUM,Number of cycles for padding to push into CSI FIFO at the last cycle of each long packet"
group.long 0x100++0x3
line.long 0x0 "ISPWP_CTRL_1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x0 0.--15. 1. "UNLOCK_CODE_L,Write protection control of ISP_PADDING_CTRL register"
group.long 0x1010++0x1F
line.long 0x0 "ISPPROC_CUSTOM_FORMAT0_CTRL_1,"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x0 24.--29. 1. "LUT_LENGTH_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
rbitfld.long 0x0 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--21. 1. "LUT_START_ADDRESS,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x0 0.--3. 1. "POPNUM_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4 "ISPPROC_CUSTOM_FORMAT1_CTRL_1,"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4 24.--29. 1. "LUT_LENGTH_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
rbitfld.long 0x4 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4 16.--21. 1. "LUT_START_ADDRESS,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4 4.--15. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x4 0.--3. 1. "POPNUM_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x8 "ISPPROC_CUSTOM_FORMAT2_CTRL_1,"
rbitfld.long 0x8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 24.--29. 1. "LUT_LENGTH_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
rbitfld.long 0x8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 16.--21. 1. "LUT_START_ADDRESS,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x8 4.--15. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x8 0.--3. 1. "POPNUM_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xC "ISPPROC_CUSTOM_FORMAT3_CTRL_1,"
rbitfld.long 0xC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC 24.--29. 1. "LUT_LENGTH_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
rbitfld.long 0xC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC 16.--21. 1. "LUT_START_ADDRESS,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xC 4.--15. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0xC 0.--3. 1. "POPNUM_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x10 "ISPPROC_CUSTOM_FORMAT4_CTRL_1,"
rbitfld.long 0x10 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x10 24.--29. 1. "LUT_LENGTH_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
rbitfld.long 0x10 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x10 16.--21. 1. "LUT_START_ADDRESS,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x10 4.--15. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x10 0.--3. 1. "POPNUM_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x14 "ISPPROC_CUSTOM_FORMAT5_CTRL_1,"
rbitfld.long 0x14 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x14 24.--29. 1. "LUT_LENGTH_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
rbitfld.long 0x14 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x14 16.--21. 1. "LUT_START_ADDRESS,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x14 4.--15. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x14 0.--3. 1. "POPNUM_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x18 "ISPPROC_CUSTOM_FORMAT6_CTRL_1,"
rbitfld.long 0x18 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x18 24.--29. 1. "LUT_LENGTH_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
rbitfld.long 0x18 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x18 16.--21. 1. "LUT_START_ADDRESS,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x18 4.--15. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x18 0.--3. 1. "POPNUM_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1C "ISPPROC_CUSTOM_FORMAT7_CTRL_1,"
rbitfld.long 0x1C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x1C 24.--29. 1. "LUT_LENGTH_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
rbitfld.long 0x1C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x1C 16.--21. 1. "LUT_START_ADDRESS,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1C 4.--15. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x1C 0.--3. 1. "POPNUM_MINUS1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
group.long 0x1100++0xFF
line.long 0x0 "ISPPROCMODE_DT0_1,"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x0 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x0 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x0 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x4 "ISPPROCMODE_DT1_1,"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x4 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x4 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x8 "ISPPROCMODE_DT2_1,"
rbitfld.long 0x8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xC "ISPPROCMODE_DT3_1,"
rbitfld.long 0xC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x10 "ISPPROCMODE_DT4_1,"
rbitfld.long 0x10 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x10 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x10 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x10 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x10 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x10 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x10 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x14 "ISPPROCMODE_DT5_1,"
rbitfld.long 0x14 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x14 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x14 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x14 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x14 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x14 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x14 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x18 "ISPPROCMODE_DT6_1,"
rbitfld.long 0x18 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x18 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x18 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x18 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x18 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x18 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x18 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x1C "ISPPROCMODE_DT7_1,"
rbitfld.long 0x1C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x1C 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x1C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x1C 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x1C 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x1C 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x1C 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x20 "ISPPROCMODE_DT8_1,"
rbitfld.long 0x20 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x20 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x20 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x20 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x20 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x20 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x20 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x20 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x24 "ISPPROCMODE_DT9_1,"
rbitfld.long 0x24 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x24 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x24 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x24 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x24 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x24 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x24 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x24 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x28 "ISPPROCMODE_DT10_1,"
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x28 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x28 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x28 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x28 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x28 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x28 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x2C "ISPPROCMODE_DT11_1,"
rbitfld.long 0x2C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x2C 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x2C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x2C 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x2C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x2C 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x2C 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x2C 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x30 "ISPPROCMODE_DT12_1,"
rbitfld.long 0x30 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x30 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x30 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x30 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x30 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x30 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x30 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x30 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x34 "ISPPROCMODE_DT13_1,"
rbitfld.long 0x34 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x34 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x34 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x34 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x34 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x34 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x34 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x34 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x38 "ISPPROCMODE_DT14_1,"
rbitfld.long 0x38 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x38 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x38 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x38 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x38 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x38 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x38 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x38 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x3C "ISPPROCMODE_DT15_1,"
rbitfld.long 0x3C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x3C 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x3C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x3C 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x3C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x3C 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x3C 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x3C 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x40 "ISPPROCMODE_DT16_1,"
rbitfld.long 0x40 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x40 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x40 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x40 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x40 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x40 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x40 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x40 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x44 "ISPPROCMODE_DT17_1,"
rbitfld.long 0x44 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x44 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x44 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x44 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x44 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x44 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x44 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x44 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x48 "ISPPROCMODE_DT18_1,"
rbitfld.long 0x48 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x48 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x48 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x48 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x48 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x48 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x48 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x48 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x4C "ISPPROCMODE_DT19_1,"
rbitfld.long 0x4C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4C 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x4C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4C 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x4C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4C 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x4C 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x4C 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x50 "ISPPROCMODE_DT20_1,"
rbitfld.long 0x50 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x50 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x50 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x50 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x50 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x50 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x50 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x50 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x54 "ISPPROCMODE_DT21_1,"
rbitfld.long 0x54 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x54 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x54 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x54 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x54 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x54 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x54 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x54 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x58 "ISPPROCMODE_DT22_1,"
rbitfld.long 0x58 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x58 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x58 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x58 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x58 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x58 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x58 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x58 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x5C "ISPPROCMODE_DT23_1,"
rbitfld.long 0x5C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x5C 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x5C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x5C 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x5C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x5C 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x5C 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x5C 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x60 "ISPPROCMODE_DT24_1,"
rbitfld.long 0x60 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x60 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x60 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x60 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x60 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x60 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x60 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x60 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x64 "ISPPROCMODE_DT25_1,"
rbitfld.long 0x64 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x64 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x64 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x64 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x64 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x64 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x64 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x64 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x68 "ISPPROCMODE_DT26_1,"
rbitfld.long 0x68 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x68 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x68 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x68 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x68 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x68 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x68 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x68 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x6C "ISPPROCMODE_DT27_1,"
rbitfld.long 0x6C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x6C 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x6C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x6C 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x6C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x6C 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x6C 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x6C 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x70 "ISPPROCMODE_DT28_1,"
rbitfld.long 0x70 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x70 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x70 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x70 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x70 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x70 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x70 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x70 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x74 "ISPPROCMODE_DT29_1,"
rbitfld.long 0x74 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x74 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x74 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x74 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x74 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x74 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x74 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x74 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x78 "ISPPROCMODE_DT30_1,"
rbitfld.long 0x78 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x78 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x78 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x78 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x78 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x78 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x78 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x78 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x7C "ISPPROCMODE_DT31_1,"
rbitfld.long 0x7C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x7C 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x7C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x7C 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x7C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x7C 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x7C 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x7C 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x80 "ISPPROCMODE_DT32_1,"
rbitfld.long 0x80 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x80 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x80 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x80 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x80 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x80 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x80 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x80 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x84 "ISPPROCMODE_DT33_1,"
rbitfld.long 0x84 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x84 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x84 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x84 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x84 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x84 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x84 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x84 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x88 "ISPPROCMODE_DT34_1,"
rbitfld.long 0x88 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x88 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x88 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x88 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x88 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x88 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x88 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x88 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x8C "ISPPROCMODE_DT35_1,"
rbitfld.long 0x8C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8C 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x8C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8C 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x8C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8C 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x8C 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8C 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x90 "ISPPROCMODE_DT36_1,"
rbitfld.long 0x90 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x90 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x90 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x90 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x90 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x90 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x90 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x90 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x94 "ISPPROCMODE_DT37_1,"
rbitfld.long 0x94 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x94 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x94 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x94 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x94 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x94 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x94 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x94 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x98 "ISPPROCMODE_DT38_1,"
rbitfld.long 0x98 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x98 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x98 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x98 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x98 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x98 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x98 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x98 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0x9C "ISPPROCMODE_DT39_1,"
rbitfld.long 0x9C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x9C 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0x9C 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x9C 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0x9C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x9C 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0x9C 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x9C 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xA0 "ISPPROCMODE_DT40_1,"
rbitfld.long 0xA0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA0 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xA0 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA0 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xA0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA0 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xA0 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA0 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xA4 "ISPPROCMODE_DT41_1,"
rbitfld.long 0xA4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA4 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xA4 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA4 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xA4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA4 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xA4 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA4 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xA8 "ISPPROCMODE_DT42_1,"
rbitfld.long 0xA8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA8 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xA8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA8 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xA8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA8 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xA8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xA8 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xAC "ISPPROCMODE_DT43_1,"
rbitfld.long 0xAC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xAC 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xAC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xAC 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xAC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xAC 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xAC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xAC 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xB0 "ISPPROCMODE_DT44_1,"
rbitfld.long 0xB0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB0 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xB0 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB0 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xB0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB0 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xB0 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB0 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xB4 "ISPPROCMODE_DT45_1,"
rbitfld.long 0xB4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB4 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xB4 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB4 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xB4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB4 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xB4 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB4 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xB8 "ISPPROCMODE_DT46_1,"
rbitfld.long 0xB8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB8 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xB8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB8 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xB8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB8 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xB8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xB8 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xBC "ISPPROCMODE_DT47_1,"
rbitfld.long 0xBC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xBC 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xBC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xBC 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xBC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xBC 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xBC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xBC 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xC0 "ISPPROCMODE_DT48_1,"
rbitfld.long 0xC0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC0 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xC0 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC0 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xC0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC0 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xC0 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC0 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xC4 "ISPPROCMODE_DT49_1,"
rbitfld.long 0xC4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC4 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xC4 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC4 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xC4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC4 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xC4 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC4 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xC8 "ISPPROCMODE_DT50_1,"
rbitfld.long 0xC8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC8 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xC8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC8 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xC8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC8 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xC8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xC8 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xCC "ISPPROCMODE_DT51_1,"
rbitfld.long 0xCC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xCC 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xCC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xCC 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xCC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xCC 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xCC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xCC 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xD0 "ISPPROCMODE_DT52_1,"
rbitfld.long 0xD0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD0 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xD0 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD0 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xD0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD0 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xD0 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD0 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xD4 "ISPPROCMODE_DT53_1,"
rbitfld.long 0xD4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD4 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xD4 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD4 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xD4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD4 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xD4 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD4 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xD8 "ISPPROCMODE_DT54_1,"
rbitfld.long 0xD8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD8 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xD8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD8 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xD8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD8 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xD8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xD8 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xDC "ISPPROCMODE_DT55_1,"
rbitfld.long 0xDC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xDC 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xDC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xDC 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xDC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xDC 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xDC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xDC 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xE0 "ISPPROCMODE_DT56_1,"
rbitfld.long 0xE0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE0 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xE0 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE0 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xE0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE0 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xE0 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE0 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xE4 "ISPPROCMODE_DT57_1,"
rbitfld.long 0xE4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE4 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xE4 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE4 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xE4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE4 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xE4 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE4 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xE8 "ISPPROCMODE_DT58_1,"
rbitfld.long 0xE8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE8 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xE8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE8 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xE8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE8 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xE8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xE8 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xEC "ISPPROCMODE_DT59_1,"
rbitfld.long 0xEC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xEC 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xEC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xEC 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xEC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xEC 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xEC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xEC 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xF0 "ISPPROCMODE_DT60_1,"
rbitfld.long 0xF0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF0 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xF0 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF0 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xF0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF0 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xF0 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF0 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xF4 "ISPPROCMODE_DT61_1,"
rbitfld.long 0xF4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF4 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xF4 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF4 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xF4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF4 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xF4 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF4 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xF8 "ISPPROCMODE_DT62_1,"
rbitfld.long 0xF8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF8 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xF8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF8 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xF8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF8 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xF8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xF8 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
line.long 0xFC "ISPPROCMODE_DT63_1,"
rbitfld.long 0xFC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xFC 24.--29. 1. "PROC_MODE_VC3,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC3  VC7  VC11 and VC15"
newline
rbitfld.long 0xFC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xFC 16.--21. 1. "PROC_MODE_VC2,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC2  VC6  VC10 and VC14"
newline
rbitfld.long 0xFC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xFC 8.--13. 1. "PROC_MODE_VC1,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC1  VC5  VC9 and VC13"
newline
rbitfld.long 0xFC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0xFC 0.--5. 1. "PROC_MODE_VC0,Select the processing method of CSI packet with double_quotationDT_code = ndouble_quotation sent from VC0 VC4 VC8 and VC12."
group.long 0x2100++0x7
line.long 0x0 "ISP_STREAMER_CONFIG_DMA_CONTROL1_1,"
bitfld.long 0x0 31. "ENABLE1,Enabling config DMA. In addition to set 1 to ENABLE0  this register should be set to 1 in order to enable Config DMA." "0: Config DMA is disabled [default],1: Config DMA is enabled"
newline
hexmask.long.word 0x0 16.--30. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x0 0.--15. 1. "CONFIG_DATA_START_REG_ADDRESS,The lower 16 bit value of the address of the first (address  write data) pair in the Config Data"
line.long 0x4 "ISP_STREAMER_CONFIG_DMA_CONTROL2_1,"
hexmask.long 0x4 0.--31. 1. "CONFIG_DATA_START_REG_DATA,The write data value of the first (address  write data) pair in the Config Data"
group.long 0x3000++0x13
line.long 0x0 "ISPCS_FILER_ID_CH0_1,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH0_1,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH0_1,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH0_1,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH0_1,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3020++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH0_1,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH0_1,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH0_1,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH0_1,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH0_1,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH0_1,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH0_1,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH0_1,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH0_1,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3080++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH0_1,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH0_1,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH0_1,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH0_1,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH0_1,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH0_1,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH0_1,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH0_1,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH0_1,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH0_1,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH0_1,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH0_1,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH0_1,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH0_1,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH0_1,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH0_1,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3100++0x13
line.long 0x0 "ISPCS_FILER_ID_CH1_1,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH1_1,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH1_1,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH1_1,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH1_1,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3120++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH1_1,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH1_1,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH1_1,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH1_1,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH1_1,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH1_1,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH1_1,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH1_1,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH1_1,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3180++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH1_1,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH1_1,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH1_1,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH1_1,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH1_1,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH1_1,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH1_1,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH1_1,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH1_1,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH1_1,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH1_1,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH1_1,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH1_1,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH1_1,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH1_1,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH1_1,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3200++0x13
line.long 0x0 "ISPCS_FILER_ID_CH2_1,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH2_1,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH2_1,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH2_1,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH2_1,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3220++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH2_1,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH2_1,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH2_1,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH2_1,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH2_1,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH2_1,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH2_1,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH2_1,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH2_1,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3280++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH2_1,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH2_1,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH2_1,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH2_1,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH2_1,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH2_1,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH2_1,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH2_1,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH2_1,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH2_1,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH2_1,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH2_1,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH2_1,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH2_1,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH2_1,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH2_1,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3300++0x13
line.long 0x0 "ISPCS_FILER_ID_CH3_1,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH3_1,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH3_1,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH3_1,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH3_1,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3320++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH3_1,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH3_1,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH3_1,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH3_1,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH3_1,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH3_1,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH3_1,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH3_1,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH3_1,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3380++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH3_1,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH3_1,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH3_1,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH3_1,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH3_1,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH3_1,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH3_1,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH3_1,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH3_1,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH3_1,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH3_1,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH3_1,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH3_1,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH3_1,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH3_1,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH3_1,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3400++0x13
line.long 0x0 "ISPCS_FILER_ID_CH4_1,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH4_1,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH4_1,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH4_1,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH4_1,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3420++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH4_1,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH4_1,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH4_1,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH4_1,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH4_1,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH4_1,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH4_1,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH4_1,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH4_1,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3480++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH4_1,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH4_1,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH4_1,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH4_1,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH4_1,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH4_1,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH4_1,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH4_1,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH4_1,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH4_1,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH4_1,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH4_1,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH4_1,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH4_1,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH4_1,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH4_1,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3500++0x13
line.long 0x0 "ISPCS_FILER_ID_CH5_1,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH5_1,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH5_1,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH5_1,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH5_1,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3520++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH5_1,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH5_1,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH5_1,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH5_1,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH5_1,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH5_1,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH5_1,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH5_1,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH5_1,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3580++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH5_1,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH5_1,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH5_1,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH5_1,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH5_1,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH5_1,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH5_1,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH5_1,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH5_1,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH5_1,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH5_1,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH5_1,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH5_1,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH5_1,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH5_1,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH5_1,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3600++0x13
line.long 0x0 "ISPCS_FILER_ID_CH6_1,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH6_1,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH6_1,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH6_1,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH6_1,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3620++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH6_1,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH6_1,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH6_1,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH6_1,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH6_1,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH6_1,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH6_1,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH6_1,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH6_1,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3680++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH6_1,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH6_1,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH6_1,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH6_1,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH6_1,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH6_1,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH6_1,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH6_1,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH6_1,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH6_1,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH6_1,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH6_1,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH6_1,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH6_1,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH6_1,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH6_1,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3700++0x13
line.long 0x0 "ISPCS_FILER_ID_CH7_1,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH7_1,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH7_1,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH7_1,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH7_1,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3720++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH7_1,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH7_1,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH7_1,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH7_1,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH7_1,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH7_1,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH7_1,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH7_1,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH7_1,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3780++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH7_1,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH7_1,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH7_1,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH7_1,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH7_1,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH7_1,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH7_1,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH7_1,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH7_1,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH7_1,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH7_1,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH7_1,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH7_1,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH7_1,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH7_1,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH7_1,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3800++0x13
line.long 0x0 "ISPCS_FILER_ID_CH8_1,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH8_1,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH8_1,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH8_1,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH8_1,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3820++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH8_1,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH8_1,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH8_1,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH8_1,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH8_1,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH8_1,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH8_1,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH8_1,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH8_1,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3880++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH8_1,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH8_1,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH8_1,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH8_1,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH8_1,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH8_1,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH8_1,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH8_1,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH8_1,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH8_1,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH8_1,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH8_1,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH8_1,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH8_1,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH8_1,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH8_1,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3900++0x13
line.long 0x0 "ISPCS_FILER_ID_CH9_1,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH9_1,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH9_1,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH9_1,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH9_1,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3920++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH9_1,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH9_1,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH9_1,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH9_1,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH9_1,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH9_1,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH9_1,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH9_1,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH9_1,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3980++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH9_1,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH9_1,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH9_1,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH9_1,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH9_1,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH9_1,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH9_1,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH9_1,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH9_1,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH9_1,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH9_1,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH9_1,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH9_1,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH9_1,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH9_1,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH9_1,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3A00++0x13
line.long 0x0 "ISPCS_FILER_ID_CH10_1,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
newline
hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH10_1,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH10_1,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH10_1,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH10_1,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3A20++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH10_1,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH10_1,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH10_1,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH10_1,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH10_1,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
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rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
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hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
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rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
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hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH10_1,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
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rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
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hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
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rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
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hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH10_1,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
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rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
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hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
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rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
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hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH10_1,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
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rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
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hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
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hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH10_1,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
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hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
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hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3A80++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH10_1,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH10_1,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH10_1,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH10_1,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH10_1,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH10_1,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH10_1,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH10_1,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH10_1,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH10_1,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH10_1,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH10_1,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH10_1,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH10_1,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH10_1,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH10_1,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x3B00++0x13
line.long 0x0 "ISPCS_FILER_ID_CH11_1,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 28. "SEL_RAW_SCALED,A bit to specify the input pixel stream for filter chain to select RAW scaled image" "0: Not select the RAW scaled image [default],1: Selects RAW scaled image"
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hexmask.long.word 0x0 18.--27. 1. "Reserved_18,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 16.--17. "LC_FILTER_ID,Number of ID to pass at line count filter" "0,1,2,3"
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hexmask.long.word 0x0 0.--15. 1. "VC_EN,Virtual channel (VC) number to pass is specified at VC_Filter."
line.long 0x4 "ISPCS_LC_MODULO_CH11_1,"
rbitfld.long 0x4 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x4 28.--30. "MODULO_MINUS1_VC7,Divisor minus 1 for modulo calculation on the line number of the input frame (VC7) for calculating the line count ID" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x4 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x4 24.--26. "MODULO_MINUS1_VC3,Divisor minus 1 for modulo calculation on the line number of the input frame (VC3) for calculating the line count ID" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x4 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x4 20.--22. "MODULO_MINUS1_VC6,Divisor minus 1 for modulo calculation on the line number of the input frame (VC6) for calculating the line count ID" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x4 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x4 16.--18. "MODULO_MINUS1_VC2,Divisor minus 1 for modulo calculation on the line number of the input frame (VC2) for calculating the line count ID" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x4 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x4 12.--14. "MODULO_MINUS1_VC5,Divisor minus 1 for modulo calculation on the line number of the input frame (VC5) for calculating the line count ID" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x4 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x4 8.--10. "MODULO_MINUS1_VC1,Divisor minus 1 for modulo calculation on the line number of the input frame (VC1) for calculating the line count ID" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x4 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x4 4.--6. "MODULO_MINUS1_VC4,Divisor minus 1 for modulo calculation on the line number of the input frame (VC4) for calculating the line count ID" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x4 0.--2. "MODULO_MINUS1_VC0,Divisor minus 1 for modulo calculation on the line number of the input frame (VC0) for calculating the line count ID" "0,1,2,3,4,5,6,7"
line.long 0x8 "ISPCS_DT_CODE03_CH11_1,"
bitfld.long 0x8 31. "ENABLE3,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 30. "HOLD3,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
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hexmask.long.byte 0x8 24.--29. 1. "DT_CODE3,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 23. "ENABLE2,Enable bit for passing pixel to LC filter ." "0,1"
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bitfld.long 0x8 22. "HOLD2,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
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hexmask.long.byte 0x8 16.--21. 1. "DT_CODE2,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 15. "ENABLE1,Enable bit for passing pixel to LC filter ." "0,1"
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bitfld.long 0x8 14. "HOLD1,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
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hexmask.long.byte 0x8 8.--13. 1. "DT_CODE1,Number of DT_CODE at MD Filter"
newline
bitfld.long 0x8 7. "ENABLE0,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0x8 6. "HOLD0,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
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hexmask.long.byte 0x8 0.--5. 1. "DT_CODE0,Number of DT_CODE at MD Filter"
line.long 0xC "ISPCS_DT_CODE47_CH11_1,"
bitfld.long 0xC 31. "ENABLE7,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 30. "HOLD7,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 24.--29. 1. "DT_CODE7,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 23. "ENABLE6,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 22. "HOLD6,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
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hexmask.long.byte 0xC 16.--21. 1. "DT_CODE6,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 15. "ENABLE5,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 14. "HOLD5,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
newline
hexmask.long.byte 0xC 8.--13. 1. "DT_CODE5,Number of DT_CODE at MD Filter"
newline
bitfld.long 0xC 7. "ENABLE4,Enable bit for passing pixel to LC filter ." "0,1"
newline
bitfld.long 0xC 6. "HOLD4,Enable bit for increment counter at Line Count ID." "0: Line count is incremented [default],1: Line count is not incremented"
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hexmask.long.byte 0xC 0.--5. 1. "DT_CODE4,Number of DT_CODE at MD Filter"
line.long 0x10 "ISPCS_LC_MODULO1_CH11_1,"
rbitfld.long 0x10 31. "Reserved_31,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x10 28.--30. "MODULO_MINUS1_VC15,Divisor minus 1 for modulo calculation on the line number of the input frame (VC15) for calculating the line count ID" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x10 27. "Reserved_27,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x10 24.--26. "MODULO_MINUS1_VC11,Divisor minus 1 for modulo calculation on the line number of the input frame (VC11) for calculating the line count ID" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x10 23. "Reserved_23,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x10 20.--22. "MODULO_MINUS1_VC14,Divisor minus 1 for modulo calculation on the line number of the input frame (VC14) for calculating the line count ID" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x10 19. "Reserved_19,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x10 16.--18. "MODULO_MINUS1_VC10,Divisor minus 1 for modulo calculation on the line number of the input frame (VC10) for calculating the line count ID" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x10 15. "Reserved_15,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x10 12.--14. "MODULO_MINUS1_VC13,Divisor minus 1 for modulo calculation on the line number of the input frame (VC13) for calculating the line count ID" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x10 11. "Reserved_11,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x10 8.--10. "MODULO_MINUS1_VC9,Divisor minus 1 for modulo calculation on the line number of the input frame (VC9) for calculating the line count ID" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x10 7. "Reserved_7,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x10 4.--6. "MODULO_MINUS1_VC12,Divisor minus 1 for modulo calculation on the line number of the input frame (VC12) for calculating the line count ID" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x10 3. "Reserved_3,Reserved. (This bit is always read as 0.)" "0,1"
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bitfld.long 0x10 0.--2. "MODULO_MINUS1_VC8,Divisor minus 1 for modulo calculation on the line number of the input frame (VC8) for calculating the line count ID" "0,1,2,3,4,5,6,7"
group.long 0x3B20++0x23
line.long 0x0 "ISPCS_H_CLIP_DT_CODE0_CH11_1,"
bitfld.long 0x0 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
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rbitfld.long 0x0 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
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hexmask.long.word 0x0 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
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hexmask.long.word 0x0 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x4 "ISPCS_H_CLIP_DT_CODE1_CH11_1,"
bitfld.long 0x4 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x4 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
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hexmask.long.word 0x4 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
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hexmask.long.word 0x4 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x8 "ISPCS_H_CLIP_DT_CODE2_CH11_1,"
bitfld.long 0x8 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x8 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x8 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
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hexmask.long.word 0x8 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0xC "ISPCS_H_CLIP_DT_CODE3_CH11_1,"
bitfld.long 0xC 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0xC 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0xC 16.--29. 1. "APPENDED_PIXEL,This bit specifies the number of removing pixels at the right edge of one line."
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
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hexmask.long.word 0xC 0.--13. 1. "PREPENDED_PIXEL,This register specifies the number of removing pixels at the left edge of one line."
line.long 0x10 "ISPCS_V_CLIP_DT_CODE0_CH11_1,"
bitfld.long 0x10 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x10 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x10 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x10 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x14 "ISPCS_V_CLIP_DT_CODE1_CH11_1,"
bitfld.long 0x14 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x14 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x14 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x14 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x18 "ISPCS_V_CLIP_DT_CODE2_CH11_1,"
bitfld.long 0x18 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x18 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x18 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x18 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x1C "ISPCS_V_CLIP_DT_CODE3_CH11_1,"
bitfld.long 0x1C 31. "Reserved_31,Reserved bits. Do not write any different value from its initial value." "0,1"
newline
rbitfld.long 0x1C 30. "Reserved_30,Reserved. (This bit is always read as 0.)" "0,1"
newline
hexmask.long.word 0x1C 16.--29. 1. "APPENDED_LINE,This bit specifies the number of removed lines at the bottom edge of one frame"
newline
rbitfld.long 0x1C 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 0.--13. 1. "PREPENDED_LINE,This bit specifies the number of removed lines at the top edge"
line.long 0x20 "ISPCS_DI_FILTER_CTRL_CH11_1,"
bitfld.long 0x20 31. "CPLX,Enabling control of divisor of pixel counter in one line" "0: Pixel counter divisor is disabled [default],1: Pixel counter is divided by 2"
newline
hexmask.long.tbyte 0x20 9.--30. 1. "Reserved_9,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--8. 1. "LUT_LENGTH_MINUS1,Value of minus 1 of the number of available bit in de-interleaving filter LUT."
group.long 0x3B80++0x3F
line.long 0x0 "ISPCS_DI_FILTER_LUT0_CH11_1,"
hexmask.long 0x0 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x4 "ISPCS_DI_FILTER_LUT1_CH11_1,"
hexmask.long 0x4 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x8 "ISPCS_DI_FILTER_LUT2_CH11_1,"
hexmask.long 0x8 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0xC "ISPCS_DI_FILTER_LUT3_CH11_1,"
hexmask.long 0xC 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x10 "ISPCS_DI_FILTER_LUT4_CH11_1,"
hexmask.long 0x10 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x14 "ISPCS_DI_FILTER_LUT5_CH11_1,"
hexmask.long 0x14 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x18 "ISPCS_DI_FILTER_LUT6_CH11_1,"
hexmask.long 0x18 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x1C "ISPCS_DI_FILTER_LUT7_CH11_1,"
hexmask.long 0x1C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x20 "ISPCS_DI_FILTER_LUT8_CH11_1,"
hexmask.long 0x20 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x24 "ISPCS_DI_FILTER_LUT9_CH11_1,"
hexmask.long 0x24 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x28 "ISPCS_DI_FILTER_LUT10_CH11_1,"
hexmask.long 0x28 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x2C "ISPCS_DI_FILTER_LUT11_CH11_1,"
hexmask.long 0x2C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x30 "ISPCS_DI_FILTER_LUT12_CH11_1,"
hexmask.long 0x30 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x34 "ISPCS_DI_FILTER_LUT13_CH11_1,"
hexmask.long 0x34 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x38 "ISPCS_DI_FILTER_LUT14_CH11_1,"
hexmask.long 0x38 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
line.long 0x3C "ISPCS_DI_FILTER_LUT15_CH11_1,"
hexmask.long 0x3C 0.--31. 1. "DI_FILTER_LUT,Specify pass/drop control for each pixel in one packet. Each bit correspond to one pixel"
group.long 0x4000++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH0_1,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH0_1,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH0_1,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4010++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH1_1,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH1_1,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH1_1,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4020++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH2_1,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH2_1,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH2_1,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4030++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH3_1,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH3_1,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH3_1,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4040++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH4_1,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH4_1,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH4_1,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4050++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH5_1,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH5_1,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH5_1,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4060++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH6_1,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH6_1,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH6_1,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4070++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH7_1,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH7_1,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH7_1,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4080++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH8_1,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH8_1,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH8_1,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4090++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH9_1,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH9_1,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH9_1,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x40A0++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH10_1,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH10_1,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH10_1,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x40B0++0xB
line.long 0x0 "ISP_PIXEL_COUNT_MAX_CH11_1,"
bitfld.long 0x0 31. "CLEAR_SYNC,Selection of period to count pixels" "0: Number of pixels per line [default],1: Number of pixels per frame"
newline
hexmask.long.byte 0x0 26.--30. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x0 0.--25. 1. "MAX_PIXEL,Maximum number of pixels to asset the error status."
line.long 0x4 "ISP_PIXEL_COUNT_MIN_CH11_1,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x4 0.--25. 1. "MIN_PIXEL,Minimum number of pixels to assert the error status."
line.long 0x8 "ISP_PIXEL_COUNT_MONITOR_CH11_1,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved. (These bits are always read as 0.)"
newline
hexmask.long 0x8 0.--25. 1. "PIXEL_COUNT,Number of counted pixels"
group.long 0x4800++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC0_1,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC0_1,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC0_1,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC0_1,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC0_1,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC0_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC0_1,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC0_1,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC0_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC0_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x4900++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC1_1,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC1_1,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC1_1,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC1_1,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC1_1,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC1_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC1_1,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC1_1,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC1_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC1_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x4A00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC2_1,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC2_1,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC2_1,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC2_1,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC2_1,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC2_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC2_1,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC2_1,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC2_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC2_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x4B00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC3_1,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC3_1,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC3_1,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC3_1,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC3_1,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC3_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC3_1,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC3_1,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC3_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC3_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x4C00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC4_1,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC4_1,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC4_1,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC4_1,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC4_1,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC4_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC4_1,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC4_1,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC4_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC4_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x4D00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC5_1,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC5_1,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC5_1,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC5_1,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC5_1,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC5_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC5_1,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC5_1,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC5_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC5_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x4E00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC6_1,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC6_1,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC6_1,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC6_1,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC6_1,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC6_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC6_1,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC6_1,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC6_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC6_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x4F00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC7_1,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC7_1,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC7_1,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC7_1,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC7_1,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC7_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC7_1,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC7_1,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC7_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC7_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x6800++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC8_1,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC8_1,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC8_1,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC8_1,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC8_1,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC8_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC8_1,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC8_1,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC8_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC8_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x6900++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC9_1,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC9_1,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC9_1,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC9_1,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC9_1,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC9_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC9_1,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC9_1,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC9_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC9_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x6A00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC10_1,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC10_1,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC10_1,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC10_1,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC10_1,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC10_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC10_1,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC10_1,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC10_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC10_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x6B00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC11_1,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC11_1,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC11_1,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC11_1,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC11_1,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC11_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC11_1,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC11_1,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC11_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC11_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x6C00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC12_1,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC12_1,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC12_1,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC12_1,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC12_1,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC12_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC12_1,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC12_1,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC12_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC12_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x6D00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC13_1,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC13_1,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC13_1,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC13_1,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC13_1,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC13_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC13_1,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC13_1,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC13_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC13_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x6E00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC14_1,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC14_1,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC14_1,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC14_1,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC14_1,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC14_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC14_1,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC14_1,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC14_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC14_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x6F00++0x27
line.long 0x0 "ISP_SYNC_CHECK_FIELD_MAX_VC15_1,"
hexmask.long 0x0 0.--31. 1. "SYNC_CHECK_FIELD_MAX,Permitted maximum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x4 "ISP_SYNC_CHECK_FIELD_MIN_VC15_1,"
hexmask.long 0x4 0.--31. 1. "SYNC_CHECK_FIELD_MIN,Permitted minimum cycles which keeps the same value of the incoming FIELD signal."
line.long 0x8 "ISP_SYNC_CHECK_VSYNC_MAX_VC15_1,"
hexmask.long 0x8 0.--31. 1. "SYNC_CHECK_VSYNC_MAX,Permitted maximum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0xC "ISP_SYNC_CHECK_VSYNC_MIN_VC15_1,"
hexmask.long 0xC 0.--31. 1. "SYNC_CHECK_VSYNC_MIN,Permitted minimum cycles which keeps the same value of the incoming VSYNC signal."
line.long 0x10 "ISP_SYNC_CHECK_HSYNC_RISE_MAX_VC15_1,"
bitfld.long 0x10 30.--31. "FIELD_CHECK_EN,FIELD_CHECK_EN[1] : FIELD MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 28.--29. "VSYNC_CHECK_EN,VSYNC_CHECK_EN[1] : VSYNC MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 26.--27. "HSYNC_RISE_CHECK_EN,HSYNC_RISE_CHECK_EN[1] : HSYNC Rise MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 24.--25. "HSYNC_TOGGLE_CHECK_EN,HSYNC_TOGGLE_CHECK_EN[1] : HSYNC Toggle MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
bitfld.long 0x10 22.--23. "DE_CHECK_EN,DE_CHECK_EN[1] : DE MAX Check Enable" "0: disable[default],1: enable,?,?"
newline
rbitfld.long 0x10 21. "Reserved_21,Reserved. (This bit is always read as 0.)" "0,1"
newline
bitfld.long 0x10 20. "DEER_DM,0 : Error detection is disabled when counted value is 0 [default]" "0: Error detection is disabled when counted value..,1: Error detection is enabled when counted value is 0"
newline
hexmask.long.byte 0x10 16.--19. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MAX,Permitted maximum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x14 "ISP_SYNC_CHECK_HSYNC_RISE_MIN_VC15_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "SYNC_CHECK_HSYNC_RISE_MIN,Permitted minimum number of rising edge of incoming HSYNC signal in one frame."
line.long 0x18 "ISP_SYNC_CHECK_HSYNC_TOGGLE_MAX_VC15_1,"
hexmask.long 0x18 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MAX,Permitted maximum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x1C "ISP_SYNC_CHECK_HSYNC_TOGGLE_MIN_VC15_1,"
hexmask.long 0x1C 0.--31. 1. "SYNC_CHECK_HSYNC_TOGGLE_MIN,Permitted minimum cycles which keeps the same value of the incoming HSYNC signal."
line.long 0x20 "ISP_SYNC_CHECK_DE_MAX_VC15_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "SYNC_CHECK_DE_MAX,Permitted maximum cycles which keeps the same value of the incoming DE signal."
line.long 0x24 "ISP_SYNC_CHECK_DE_MIN_VC15_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "SYNC_CHECK_DE_MIN,Permitted minimum cycles which keeps the same value of the incoming DE signal."
group.long 0x7000++0xB
line.long 0x0 "ISP_STREAMER_MODE_1,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x0 0.--3. 1. "STREAMER_ENABLE,On/OFF control of steaming from VSPX."
line.long 0x4 "ISP_STREAMER_V_BLANK_1,"
hexmask.long 0x4 0.--31. 1. "STREAMER_V_BLANK,Number of cycles of vertical blanking period per one frame for input pixel stream which is provided to ISP core from in streaming mode from VSPX."
line.long 0x8 "ISP_STREAMER_H_BLANK_1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x8 0.--15. 1. "STREAMER_H_BLANK,Number of cycles of horizontal blanking period per line for input pixel stream which is provided to ISP core from in streaming mode from VSPX."
group.long 0x7100++0x3
line.long 0x0 "ISP_STREAMER_CONFIG_DMA_CONTROL_1,"
hexmask.long.byte 0x0 24.--31. 1. "REG_ADDRESS_UPPER_8BIT,Specifies the upper 8-bit value of the register address to be written to ISP Core. This register is meaningful only when REG_ADDRESS_FILTERING_ENABLE=1."
newline
bitfld.long 0x0 23. "REG_ADDRESS_FILTERING_ENABLE,and#12539;Setting whether or nor REG_ADDRESS_UPPER_8BIT is matched with the upper 8bits of the register address." "0,1"
newline
hexmask.long.tbyte 0x0 6.--22. 1. "Reserved_6,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 4.--5. "BYTE_PER_WORD,Data format of config data" "0: 4 byte/word [default],?,?,?"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved bits. Do not write any different value from its initial value." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "ENABLE0,Enabling config DMA" "0: Config DMA is disabled [default],1: Config DMA is enabled"
rgroup.long 0x7804++0x3
line.long 0x0 "ISP_STREAMER_CONFIG_DMA_STATUS_1,"
bitfld.long 0x0 31. "CONFIG_DMA_READY_BUSY,Transfer status of Config DMA" "0: Busy,1: Ready"
newline
hexmask.long 0x0 0.--30. 1. "Reserved_0,Reserved. (These bits are always read as 0.)"
group.long 0x8000++0x7FF
line.long 0x0 "ISPPROC_CUSTOM_FORMAT_LUT0_W0_B0_1,"
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4 "ISPPROC_CUSTOM_FORMAT_LUT0_W0_B1_1,"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x8 "ISPPROC_CUSTOM_FORMAT_LUT0_W0_B2_1,"
rbitfld.long 0x8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xC "ISPPROC_CUSTOM_FORMAT_LUT0_W0_B3_1,"
rbitfld.long 0xC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x10 "ISPPROC_CUSTOM_FORMAT_LUT0_W0_B4_1,"
rbitfld.long 0x10 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x10 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x10 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x14 "ISPPROC_CUSTOM_FORMAT_LUT0_W0_B5_1,"
rbitfld.long 0x14 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x14 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x14 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x18 "ISPPROC_CUSTOM_FORMAT_LUT0_W0_B6_1,"
rbitfld.long 0x18 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x18 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x18 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1C "ISPPROC_CUSTOM_FORMAT_LUT0_W0_B7_1,"
rbitfld.long 0x1C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x20 "ISPPROC_CUSTOM_FORMAT_LUT0_W1_B0_1,"
rbitfld.long 0x20 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x20 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x20 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x20 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x24 "ISPPROC_CUSTOM_FORMAT_LUT0_W1_B1_1,"
rbitfld.long 0x24 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x24 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x24 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x24 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x28 "ISPPROC_CUSTOM_FORMAT_LUT0_W1_B2_1,"
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x28 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x28 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x28 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2C "ISPPROC_CUSTOM_FORMAT_LUT0_W1_B3_1,"
rbitfld.long 0x2C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x30 "ISPPROC_CUSTOM_FORMAT_LUT0_W1_B4_1,"
rbitfld.long 0x30 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x30 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x30 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x30 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x34 "ISPPROC_CUSTOM_FORMAT_LUT0_W1_B5_1,"
rbitfld.long 0x34 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x34 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x34 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x34 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x38 "ISPPROC_CUSTOM_FORMAT_LUT0_W1_B6_1,"
rbitfld.long 0x38 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x38 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x38 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x38 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3C "ISPPROC_CUSTOM_FORMAT_LUT0_W1_B7_1,"
rbitfld.long 0x3C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x40 "ISPPROC_CUSTOM_FORMAT_LUT0_W2_B0_1,"
rbitfld.long 0x40 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x40 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x40 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x40 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x44 "ISPPROC_CUSTOM_FORMAT_LUT0_W2_B1_1,"
rbitfld.long 0x44 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x44 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x44 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x44 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x48 "ISPPROC_CUSTOM_FORMAT_LUT0_W2_B2_1,"
rbitfld.long 0x48 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x48 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x48 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x48 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4C "ISPPROC_CUSTOM_FORMAT_LUT0_W2_B3_1,"
rbitfld.long 0x4C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x50 "ISPPROC_CUSTOM_FORMAT_LUT0_W2_B4_1,"
rbitfld.long 0x50 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x50 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x50 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x50 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x54 "ISPPROC_CUSTOM_FORMAT_LUT0_W2_B5_1,"
rbitfld.long 0x54 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x54 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x54 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x54 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x58 "ISPPROC_CUSTOM_FORMAT_LUT0_W2_B6_1,"
rbitfld.long 0x58 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x58 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x58 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x58 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5C "ISPPROC_CUSTOM_FORMAT_LUT0_W2_B7_1,"
rbitfld.long 0x5C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x60 "ISPPROC_CUSTOM_FORMAT_LUT0_W3_B0_1,"
rbitfld.long 0x60 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x60 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x60 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x60 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x64 "ISPPROC_CUSTOM_FORMAT_LUT0_W3_B1_1,"
rbitfld.long 0x64 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x64 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x64 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x64 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x68 "ISPPROC_CUSTOM_FORMAT_LUT0_W3_B2_1,"
rbitfld.long 0x68 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x68 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x68 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x68 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6C "ISPPROC_CUSTOM_FORMAT_LUT0_W3_B3_1,"
rbitfld.long 0x6C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x70 "ISPPROC_CUSTOM_FORMAT_LUT0_W3_B4_1,"
rbitfld.long 0x70 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x70 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x70 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x70 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x74 "ISPPROC_CUSTOM_FORMAT_LUT0_W3_B5_1,"
rbitfld.long 0x74 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x74 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x74 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x74 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x78 "ISPPROC_CUSTOM_FORMAT_LUT0_W3_B6_1,"
rbitfld.long 0x78 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x78 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x78 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x78 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7C "ISPPROC_CUSTOM_FORMAT_LUT0_W3_B7_1,"
rbitfld.long 0x7C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x80 "ISPPROC_CUSTOM_FORMAT_LUT0_W4_B0_1,"
rbitfld.long 0x80 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x80 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x80 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x80 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x84 "ISPPROC_CUSTOM_FORMAT_LUT0_W4_B1_1,"
rbitfld.long 0x84 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x84 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x84 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x84 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x88 "ISPPROC_CUSTOM_FORMAT_LUT0_W4_B2_1,"
rbitfld.long 0x88 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x88 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x88 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x88 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x8C "ISPPROC_CUSTOM_FORMAT_LUT0_W4_B3_1,"
rbitfld.long 0x8C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x8C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x8C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x8C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x90 "ISPPROC_CUSTOM_FORMAT_LUT0_W4_B4_1,"
rbitfld.long 0x90 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x90 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x90 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x90 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x94 "ISPPROC_CUSTOM_FORMAT_LUT0_W4_B5_1,"
rbitfld.long 0x94 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x94 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x94 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x94 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x98 "ISPPROC_CUSTOM_FORMAT_LUT0_W4_B6_1,"
rbitfld.long 0x98 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x98 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x98 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x98 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x9C "ISPPROC_CUSTOM_FORMAT_LUT0_W4_B7_1,"
rbitfld.long 0x9C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x9C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x9C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x9C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xA0 "ISPPROC_CUSTOM_FORMAT_LUT0_W5_B0_1,"
rbitfld.long 0xA0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xA0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xA0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xA0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xA4 "ISPPROC_CUSTOM_FORMAT_LUT0_W5_B1_1,"
rbitfld.long 0xA4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xA4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xA4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xA4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xA8 "ISPPROC_CUSTOM_FORMAT_LUT0_W5_B2_1,"
rbitfld.long 0xA8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xA8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xA8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xA8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xAC "ISPPROC_CUSTOM_FORMAT_LUT0_W5_B3_1,"
rbitfld.long 0xAC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xAC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xAC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xAC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xB0 "ISPPROC_CUSTOM_FORMAT_LUT0_W5_B4_1,"
rbitfld.long 0xB0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xB0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xB0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xB0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xB4 "ISPPROC_CUSTOM_FORMAT_LUT0_W5_B5_1,"
rbitfld.long 0xB4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xB4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xB4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xB4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xB8 "ISPPROC_CUSTOM_FORMAT_LUT0_W5_B6_1,"
rbitfld.long 0xB8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xB8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xB8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xB8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xBC "ISPPROC_CUSTOM_FORMAT_LUT0_W5_B7_1,"
rbitfld.long 0xBC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xBC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xBC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xBC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xC0 "ISPPROC_CUSTOM_FORMAT_LUT0_W6_B0_1,"
rbitfld.long 0xC0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xC0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xC0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xC4 "ISPPROC_CUSTOM_FORMAT_LUT0_W6_B1_1,"
rbitfld.long 0xC4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xC4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xC4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xC8 "ISPPROC_CUSTOM_FORMAT_LUT0_W6_B2_1,"
rbitfld.long 0xC8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xC8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xC8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xC8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xCC "ISPPROC_CUSTOM_FORMAT_LUT0_W6_B3_1,"
rbitfld.long 0xCC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xCC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xCC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xCC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xD0 "ISPPROC_CUSTOM_FORMAT_LUT0_W6_B4_1,"
rbitfld.long 0xD0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xD0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xD0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xD0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xD4 "ISPPROC_CUSTOM_FORMAT_LUT0_W6_B5_1,"
rbitfld.long 0xD4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xD4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xD4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xD4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xD8 "ISPPROC_CUSTOM_FORMAT_LUT0_W6_B6_1,"
rbitfld.long 0xD8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xD8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xD8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xD8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xDC "ISPPROC_CUSTOM_FORMAT_LUT0_W6_B7_1,"
rbitfld.long 0xDC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xDC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xDC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xDC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xE0 "ISPPROC_CUSTOM_FORMAT_LUT0_W7_B0_1,"
rbitfld.long 0xE0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xE0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xE0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xE0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xE4 "ISPPROC_CUSTOM_FORMAT_LUT0_W7_B1_1,"
rbitfld.long 0xE4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xE4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xE4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xE4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xE8 "ISPPROC_CUSTOM_FORMAT_LUT0_W7_B2_1,"
rbitfld.long 0xE8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xE8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xE8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xE8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xEC "ISPPROC_CUSTOM_FORMAT_LUT0_W7_B3_1,"
rbitfld.long 0xEC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xEC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xEC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xEC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xF0 "ISPPROC_CUSTOM_FORMAT_LUT0_W7_B4_1,"
rbitfld.long 0xF0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xF0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xF0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xF0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xF4 "ISPPROC_CUSTOM_FORMAT_LUT0_W7_B5_1,"
rbitfld.long 0xF4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xF4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xF4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xF4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xF8 "ISPPROC_CUSTOM_FORMAT_LUT0_W7_B6_1,"
rbitfld.long 0xF8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xF8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xF8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xF8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0xFC "ISPPROC_CUSTOM_FORMAT_LUT0_W7_B7_1,"
rbitfld.long 0xFC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0xFC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xFC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0xFC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x100 "ISPPROC_CUSTOM_FORMAT_LUT0_W8_B0_1,"
rbitfld.long 0x100 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x100 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x100 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x100 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x104 "ISPPROC_CUSTOM_FORMAT_LUT0_W8_B1_1,"
rbitfld.long 0x104 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x104 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x104 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x104 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x108 "ISPPROC_CUSTOM_FORMAT_LUT0_W8_B2_1,"
rbitfld.long 0x108 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x108 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x108 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x108 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x10C "ISPPROC_CUSTOM_FORMAT_LUT0_W8_B3_1,"
rbitfld.long 0x10C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x10C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x10C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x10C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x110 "ISPPROC_CUSTOM_FORMAT_LUT0_W8_B4_1,"
rbitfld.long 0x110 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x110 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x110 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x110 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x114 "ISPPROC_CUSTOM_FORMAT_LUT0_W8_B5_1,"
rbitfld.long 0x114 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x114 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x114 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x114 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x118 "ISPPROC_CUSTOM_FORMAT_LUT0_W8_B6_1,"
rbitfld.long 0x118 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x118 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x118 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x118 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x11C "ISPPROC_CUSTOM_FORMAT_LUT0_W8_B7_1,"
rbitfld.long 0x11C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x11C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x11C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x11C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x120 "ISPPROC_CUSTOM_FORMAT_LUT0_W9_B0_1,"
rbitfld.long 0x120 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x120 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x120 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x120 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x124 "ISPPROC_CUSTOM_FORMAT_LUT0_W9_B1_1,"
rbitfld.long 0x124 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x124 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x124 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x124 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x128 "ISPPROC_CUSTOM_FORMAT_LUT0_W9_B2_1,"
rbitfld.long 0x128 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x128 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x128 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x128 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x12C "ISPPROC_CUSTOM_FORMAT_LUT0_W9_B3_1,"
rbitfld.long 0x12C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x12C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x12C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x12C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x130 "ISPPROC_CUSTOM_FORMAT_LUT0_W9_B4_1,"
rbitfld.long 0x130 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x130 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x130 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x130 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x134 "ISPPROC_CUSTOM_FORMAT_LUT0_W9_B5_1,"
rbitfld.long 0x134 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x134 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x134 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x134 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x138 "ISPPROC_CUSTOM_FORMAT_LUT0_W9_B6_1,"
rbitfld.long 0x138 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x138 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x138 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x138 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x13C "ISPPROC_CUSTOM_FORMAT_LUT0_W9_B7_1,"
rbitfld.long 0x13C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x13C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x13C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x13C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x140 "ISPPROC_CUSTOM_FORMAT_LUT0_W10_B0_1,"
rbitfld.long 0x140 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x140 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x140 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x140 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x144 "ISPPROC_CUSTOM_FORMAT_LUT0_W10_B1_1,"
rbitfld.long 0x144 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x144 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x144 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x144 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x148 "ISPPROC_CUSTOM_FORMAT_LUT0_W10_B2_1,"
rbitfld.long 0x148 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x148 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x148 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x148 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x14C "ISPPROC_CUSTOM_FORMAT_LUT0_W10_B3_1,"
rbitfld.long 0x14C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x14C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x14C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x14C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x150 "ISPPROC_CUSTOM_FORMAT_LUT0_W10_B4_1,"
rbitfld.long 0x150 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x150 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x150 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x150 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x154 "ISPPROC_CUSTOM_FORMAT_LUT0_W10_B5_1,"
rbitfld.long 0x154 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x154 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x154 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x154 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x158 "ISPPROC_CUSTOM_FORMAT_LUT0_W10_B6_1,"
rbitfld.long 0x158 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x158 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x158 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x158 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x15C "ISPPROC_CUSTOM_FORMAT_LUT0_W10_B7_1,"
rbitfld.long 0x15C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x15C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x15C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x15C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x160 "ISPPROC_CUSTOM_FORMAT_LUT0_W11_B0_1,"
rbitfld.long 0x160 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x160 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x160 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x160 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x164 "ISPPROC_CUSTOM_FORMAT_LUT0_W11_B1_1,"
rbitfld.long 0x164 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x164 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x164 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x164 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x168 "ISPPROC_CUSTOM_FORMAT_LUT0_W11_B2_1,"
rbitfld.long 0x168 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x168 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x168 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x168 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x16C "ISPPROC_CUSTOM_FORMAT_LUT0_W11_B3_1,"
rbitfld.long 0x16C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x16C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x16C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x16C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x170 "ISPPROC_CUSTOM_FORMAT_LUT0_W11_B4_1,"
rbitfld.long 0x170 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x170 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x170 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x170 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x174 "ISPPROC_CUSTOM_FORMAT_LUT0_W11_B5_1,"
rbitfld.long 0x174 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x174 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x174 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x174 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x178 "ISPPROC_CUSTOM_FORMAT_LUT0_W11_B6_1,"
rbitfld.long 0x178 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x178 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x178 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x178 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x17C "ISPPROC_CUSTOM_FORMAT_LUT0_W11_B7_1,"
rbitfld.long 0x17C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x17C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x17C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x17C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x180 "ISPPROC_CUSTOM_FORMAT_LUT0_W12_B0_1,"
rbitfld.long 0x180 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x180 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x180 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x180 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x184 "ISPPROC_CUSTOM_FORMAT_LUT0_W12_B1_1,"
rbitfld.long 0x184 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x184 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x184 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x184 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x188 "ISPPROC_CUSTOM_FORMAT_LUT0_W12_B2_1,"
rbitfld.long 0x188 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x188 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x188 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x188 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x18C "ISPPROC_CUSTOM_FORMAT_LUT0_W12_B3_1,"
rbitfld.long 0x18C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x18C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x18C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x18C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x190 "ISPPROC_CUSTOM_FORMAT_LUT0_W12_B4_1,"
rbitfld.long 0x190 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x190 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x190 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x190 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x194 "ISPPROC_CUSTOM_FORMAT_LUT0_W12_B5_1,"
rbitfld.long 0x194 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x194 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x194 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x194 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x198 "ISPPROC_CUSTOM_FORMAT_LUT0_W12_B6_1,"
rbitfld.long 0x198 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x198 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x198 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x198 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x19C "ISPPROC_CUSTOM_FORMAT_LUT0_W12_B7_1,"
rbitfld.long 0x19C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x19C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x19C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x19C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1A0 "ISPPROC_CUSTOM_FORMAT_LUT0_W13_B0_1,"
rbitfld.long 0x1A0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1A0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1A0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1A0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1A4 "ISPPROC_CUSTOM_FORMAT_LUT0_W13_B1_1,"
rbitfld.long 0x1A4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1A4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1A4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1A4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1A8 "ISPPROC_CUSTOM_FORMAT_LUT0_W13_B2_1,"
rbitfld.long 0x1A8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1A8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1A8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1A8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1AC "ISPPROC_CUSTOM_FORMAT_LUT0_W13_B3_1,"
rbitfld.long 0x1AC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1AC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1AC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1AC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1B0 "ISPPROC_CUSTOM_FORMAT_LUT0_W13_B4_1,"
rbitfld.long 0x1B0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1B0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1B0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1B0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1B4 "ISPPROC_CUSTOM_FORMAT_LUT0_W13_B5_1,"
rbitfld.long 0x1B4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1B4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1B4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1B4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1B8 "ISPPROC_CUSTOM_FORMAT_LUT0_W13_B6_1,"
rbitfld.long 0x1B8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1B8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1B8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1B8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1BC "ISPPROC_CUSTOM_FORMAT_LUT0_W13_B7_1,"
rbitfld.long 0x1BC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1BC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1BC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1BC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1C0 "ISPPROC_CUSTOM_FORMAT_LUT0_W14_B0_1,"
rbitfld.long 0x1C0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1C0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1C0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1C4 "ISPPROC_CUSTOM_FORMAT_LUT0_W14_B1_1,"
rbitfld.long 0x1C4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1C4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1C4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1C8 "ISPPROC_CUSTOM_FORMAT_LUT0_W14_B2_1,"
rbitfld.long 0x1C8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1C8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1C8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1C8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1CC "ISPPROC_CUSTOM_FORMAT_LUT0_W14_B3_1,"
rbitfld.long 0x1CC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1CC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1CC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1CC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1D0 "ISPPROC_CUSTOM_FORMAT_LUT0_W14_B4_1,"
rbitfld.long 0x1D0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1D0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1D0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1D0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1D4 "ISPPROC_CUSTOM_FORMAT_LUT0_W14_B5_1,"
rbitfld.long 0x1D4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1D4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1D4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1D4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1D8 "ISPPROC_CUSTOM_FORMAT_LUT0_W14_B6_1,"
rbitfld.long 0x1D8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1D8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1D8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1D8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1DC "ISPPROC_CUSTOM_FORMAT_LUT0_W14_B7_1,"
rbitfld.long 0x1DC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1DC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1DC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1DC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1E0 "ISPPROC_CUSTOM_FORMAT_LUT0_W15_B0_1,"
rbitfld.long 0x1E0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1E0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1E0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1E0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1E4 "ISPPROC_CUSTOM_FORMAT_LUT0_W15_B1_1,"
rbitfld.long 0x1E4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1E4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1E4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1E4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1E8 "ISPPROC_CUSTOM_FORMAT_LUT0_W15_B2_1,"
rbitfld.long 0x1E8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1E8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1E8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1E8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1EC "ISPPROC_CUSTOM_FORMAT_LUT0_W15_B3_1,"
rbitfld.long 0x1EC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1EC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1EC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1EC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1F0 "ISPPROC_CUSTOM_FORMAT_LUT0_W15_B4_1,"
rbitfld.long 0x1F0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1F0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1F0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1F0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1F4 "ISPPROC_CUSTOM_FORMAT_LUT0_W15_B5_1,"
rbitfld.long 0x1F4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1F4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1F4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1F4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1F8 "ISPPROC_CUSTOM_FORMAT_LUT0_W15_B6_1,"
rbitfld.long 0x1F8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1F8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1F8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1F8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x1FC "ISPPROC_CUSTOM_FORMAT_LUT0_W15_B7_1,"
rbitfld.long 0x1FC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x1FC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1FC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x1FC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x200 "ISPPROC_CUSTOM_FORMAT_LUT0_W16_B0_1,"
rbitfld.long 0x200 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x200 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x200 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x200 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x204 "ISPPROC_CUSTOM_FORMAT_LUT0_W16_B1_1,"
rbitfld.long 0x204 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x204 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x204 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x204 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x208 "ISPPROC_CUSTOM_FORMAT_LUT0_W16_B2_1,"
rbitfld.long 0x208 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x208 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x208 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x208 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x20C "ISPPROC_CUSTOM_FORMAT_LUT0_W16_B3_1,"
rbitfld.long 0x20C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x20C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x20C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x20C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x210 "ISPPROC_CUSTOM_FORMAT_LUT0_W16_B4_1,"
rbitfld.long 0x210 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x210 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x210 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x210 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x214 "ISPPROC_CUSTOM_FORMAT_LUT0_W16_B5_1,"
rbitfld.long 0x214 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x214 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x214 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x214 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x218 "ISPPROC_CUSTOM_FORMAT_LUT0_W16_B6_1,"
rbitfld.long 0x218 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x218 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x218 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x218 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x21C "ISPPROC_CUSTOM_FORMAT_LUT0_W16_B7_1,"
rbitfld.long 0x21C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x21C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x21C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x21C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x220 "ISPPROC_CUSTOM_FORMAT_LUT0_W17_B0_1,"
rbitfld.long 0x220 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x220 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x220 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x220 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x224 "ISPPROC_CUSTOM_FORMAT_LUT0_W17_B1_1,"
rbitfld.long 0x224 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x224 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x224 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x224 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x228 "ISPPROC_CUSTOM_FORMAT_LUT0_W17_B2_1,"
rbitfld.long 0x228 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x228 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x228 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x228 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x22C "ISPPROC_CUSTOM_FORMAT_LUT0_W17_B3_1,"
rbitfld.long 0x22C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x22C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x22C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x22C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x230 "ISPPROC_CUSTOM_FORMAT_LUT0_W17_B4_1,"
rbitfld.long 0x230 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x230 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x230 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x230 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x234 "ISPPROC_CUSTOM_FORMAT_LUT0_W17_B5_1,"
rbitfld.long 0x234 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x234 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x234 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x234 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x238 "ISPPROC_CUSTOM_FORMAT_LUT0_W17_B6_1,"
rbitfld.long 0x238 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x238 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x238 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x238 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x23C "ISPPROC_CUSTOM_FORMAT_LUT0_W17_B7_1,"
rbitfld.long 0x23C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x23C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x23C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x23C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x240 "ISPPROC_CUSTOM_FORMAT_LUT0_W18_B0_1,"
rbitfld.long 0x240 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x240 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x240 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x240 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x244 "ISPPROC_CUSTOM_FORMAT_LUT0_W18_B1_1,"
rbitfld.long 0x244 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x244 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x244 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x244 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x248 "ISPPROC_CUSTOM_FORMAT_LUT0_W18_B2_1,"
rbitfld.long 0x248 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x248 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x248 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x248 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x24C "ISPPROC_CUSTOM_FORMAT_LUT0_W18_B3_1,"
rbitfld.long 0x24C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x24C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x24C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x24C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x250 "ISPPROC_CUSTOM_FORMAT_LUT0_W18_B4_1,"
rbitfld.long 0x250 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x250 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x250 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x250 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x254 "ISPPROC_CUSTOM_FORMAT_LUT0_W18_B5_1,"
rbitfld.long 0x254 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x254 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x254 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x254 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x258 "ISPPROC_CUSTOM_FORMAT_LUT0_W18_B6_1,"
rbitfld.long 0x258 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x258 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x258 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x258 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x25C "ISPPROC_CUSTOM_FORMAT_LUT0_W18_B7_1,"
rbitfld.long 0x25C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x25C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x25C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x25C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x260 "ISPPROC_CUSTOM_FORMAT_LUT0_W19_B0_1,"
rbitfld.long 0x260 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x260 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x260 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x260 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x264 "ISPPROC_CUSTOM_FORMAT_LUT0_W19_B1_1,"
rbitfld.long 0x264 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x264 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x264 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x264 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x268 "ISPPROC_CUSTOM_FORMAT_LUT0_W19_B2_1,"
rbitfld.long 0x268 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x268 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x268 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x268 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x26C "ISPPROC_CUSTOM_FORMAT_LUT0_W19_B3_1,"
rbitfld.long 0x26C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x26C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x26C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x26C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x270 "ISPPROC_CUSTOM_FORMAT_LUT0_W19_B4_1,"
rbitfld.long 0x270 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x270 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x270 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x270 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x274 "ISPPROC_CUSTOM_FORMAT_LUT0_W19_B5_1,"
rbitfld.long 0x274 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x274 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x274 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x274 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x278 "ISPPROC_CUSTOM_FORMAT_LUT0_W19_B6_1,"
rbitfld.long 0x278 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x278 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x278 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x278 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x27C "ISPPROC_CUSTOM_FORMAT_LUT0_W19_B7_1,"
rbitfld.long 0x27C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x27C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x27C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x27C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x280 "ISPPROC_CUSTOM_FORMAT_LUT0_W20_B0_1,"
rbitfld.long 0x280 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x280 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x280 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x280 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x284 "ISPPROC_CUSTOM_FORMAT_LUT0_W20_B1_1,"
rbitfld.long 0x284 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x284 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x284 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x284 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x288 "ISPPROC_CUSTOM_FORMAT_LUT0_W20_B2_1,"
rbitfld.long 0x288 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x288 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x288 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x288 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x28C "ISPPROC_CUSTOM_FORMAT_LUT0_W20_B3_1,"
rbitfld.long 0x28C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x28C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x28C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x28C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x290 "ISPPROC_CUSTOM_FORMAT_LUT0_W20_B4_1,"
rbitfld.long 0x290 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x290 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x290 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x290 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x294 "ISPPROC_CUSTOM_FORMAT_LUT0_W20_B5_1,"
rbitfld.long 0x294 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x294 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x294 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x294 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x298 "ISPPROC_CUSTOM_FORMAT_LUT0_W20_B6_1,"
rbitfld.long 0x298 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x298 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x298 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x298 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x29C "ISPPROC_CUSTOM_FORMAT_LUT0_W20_B7_1,"
rbitfld.long 0x29C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x29C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x29C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x29C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2A0 "ISPPROC_CUSTOM_FORMAT_LUT0_W21_B0_1,"
rbitfld.long 0x2A0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2A0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2A0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2A0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2A4 "ISPPROC_CUSTOM_FORMAT_LUT0_W21_B1_1,"
rbitfld.long 0x2A4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2A4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2A4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2A4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2A8 "ISPPROC_CUSTOM_FORMAT_LUT0_W21_B2_1,"
rbitfld.long 0x2A8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2A8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2A8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2A8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2AC "ISPPROC_CUSTOM_FORMAT_LUT0_W21_B3_1,"
rbitfld.long 0x2AC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2AC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2AC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2AC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2B0 "ISPPROC_CUSTOM_FORMAT_LUT0_W21_B4_1,"
rbitfld.long 0x2B0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2B0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2B0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2B0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2B4 "ISPPROC_CUSTOM_FORMAT_LUT0_W21_B5_1,"
rbitfld.long 0x2B4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2B4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2B4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2B4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2B8 "ISPPROC_CUSTOM_FORMAT_LUT0_W21_B6_1,"
rbitfld.long 0x2B8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2B8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2B8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2B8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2BC "ISPPROC_CUSTOM_FORMAT_LUT0_W21_B7_1,"
rbitfld.long 0x2BC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2BC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2BC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2BC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2C0 "ISPPROC_CUSTOM_FORMAT_LUT0_W22_B0_1,"
rbitfld.long 0x2C0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2C0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2C0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2C0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2C4 "ISPPROC_CUSTOM_FORMAT_LUT0_W22_B1_1,"
rbitfld.long 0x2C4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2C4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2C4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2C4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2C8 "ISPPROC_CUSTOM_FORMAT_LUT0_W22_B2_1,"
rbitfld.long 0x2C8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2C8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2C8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2C8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2CC "ISPPROC_CUSTOM_FORMAT_LUT0_W22_B3_1,"
rbitfld.long 0x2CC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2CC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2CC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2CC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2D0 "ISPPROC_CUSTOM_FORMAT_LUT0_W22_B4_1,"
rbitfld.long 0x2D0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2D0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2D0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2D0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2D4 "ISPPROC_CUSTOM_FORMAT_LUT0_W22_B5_1,"
rbitfld.long 0x2D4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2D4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2D4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2D4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2D8 "ISPPROC_CUSTOM_FORMAT_LUT0_W22_B6_1,"
rbitfld.long 0x2D8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2D8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2D8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2D8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2DC "ISPPROC_CUSTOM_FORMAT_LUT0_W22_B7_1,"
rbitfld.long 0x2DC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2DC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2DC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2DC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2E0 "ISPPROC_CUSTOM_FORMAT_LUT0_W23_B0_1,"
rbitfld.long 0x2E0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2E0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2E0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2E0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2E4 "ISPPROC_CUSTOM_FORMAT_LUT0_W23_B1_1,"
rbitfld.long 0x2E4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2E4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2E4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2E4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2E8 "ISPPROC_CUSTOM_FORMAT_LUT0_W23_B2_1,"
rbitfld.long 0x2E8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2E8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2E8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2E8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2EC "ISPPROC_CUSTOM_FORMAT_LUT0_W23_B3_1,"
rbitfld.long 0x2EC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2EC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2EC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2EC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2F0 "ISPPROC_CUSTOM_FORMAT_LUT0_W23_B4_1,"
rbitfld.long 0x2F0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2F0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2F0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2F0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2F4 "ISPPROC_CUSTOM_FORMAT_LUT0_W23_B5_1,"
rbitfld.long 0x2F4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2F4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2F4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2F4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2F8 "ISPPROC_CUSTOM_FORMAT_LUT0_W23_B6_1,"
rbitfld.long 0x2F8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2F8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2F8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2F8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x2FC "ISPPROC_CUSTOM_FORMAT_LUT0_W23_B7_1,"
rbitfld.long 0x2FC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x2FC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2FC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x2FC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x300 "ISPPROC_CUSTOM_FORMAT_LUT0_W24_B0_1,"
rbitfld.long 0x300 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x300 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x300 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x300 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x304 "ISPPROC_CUSTOM_FORMAT_LUT0_W24_B1_1,"
rbitfld.long 0x304 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x304 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x304 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x304 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x308 "ISPPROC_CUSTOM_FORMAT_LUT0_W24_B2_1,"
rbitfld.long 0x308 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x308 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x308 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x308 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x30C "ISPPROC_CUSTOM_FORMAT_LUT0_W24_B3_1,"
rbitfld.long 0x30C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x30C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x30C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x30C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x310 "ISPPROC_CUSTOM_FORMAT_LUT0_W24_B4_1,"
rbitfld.long 0x310 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x310 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x310 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x310 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x314 "ISPPROC_CUSTOM_FORMAT_LUT0_W24_B5_1,"
rbitfld.long 0x314 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x314 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x314 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x314 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x318 "ISPPROC_CUSTOM_FORMAT_LUT0_W24_B6_1,"
rbitfld.long 0x318 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x318 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x318 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x318 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x31C "ISPPROC_CUSTOM_FORMAT_LUT0_W24_B7_1,"
rbitfld.long 0x31C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x31C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x31C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x31C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x320 "ISPPROC_CUSTOM_FORMAT_LUT0_W25_B0_1,"
rbitfld.long 0x320 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x320 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x320 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x320 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x324 "ISPPROC_CUSTOM_FORMAT_LUT0_W25_B1_1,"
rbitfld.long 0x324 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x324 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x324 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x324 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x328 "ISPPROC_CUSTOM_FORMAT_LUT0_W25_B2_1,"
rbitfld.long 0x328 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x328 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x328 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x328 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x32C "ISPPROC_CUSTOM_FORMAT_LUT0_W25_B3_1,"
rbitfld.long 0x32C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x32C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x32C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x32C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x330 "ISPPROC_CUSTOM_FORMAT_LUT0_W25_B4_1,"
rbitfld.long 0x330 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x330 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x330 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x330 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x334 "ISPPROC_CUSTOM_FORMAT_LUT0_W25_B5_1,"
rbitfld.long 0x334 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x334 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x334 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x334 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x338 "ISPPROC_CUSTOM_FORMAT_LUT0_W25_B6_1,"
rbitfld.long 0x338 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x338 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x338 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x338 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x33C "ISPPROC_CUSTOM_FORMAT_LUT0_W25_B7_1,"
rbitfld.long 0x33C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x33C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x33C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x33C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x340 "ISPPROC_CUSTOM_FORMAT_LUT0_W26_B0_1,"
rbitfld.long 0x340 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x340 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x340 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x340 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x344 "ISPPROC_CUSTOM_FORMAT_LUT0_W26_B1_1,"
rbitfld.long 0x344 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x344 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x344 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x344 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x348 "ISPPROC_CUSTOM_FORMAT_LUT0_W26_B2_1,"
rbitfld.long 0x348 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x348 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x348 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x348 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x34C "ISPPROC_CUSTOM_FORMAT_LUT0_W26_B3_1,"
rbitfld.long 0x34C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x34C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x34C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x34C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x350 "ISPPROC_CUSTOM_FORMAT_LUT0_W26_B4_1,"
rbitfld.long 0x350 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x350 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x350 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x350 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x354 "ISPPROC_CUSTOM_FORMAT_LUT0_W26_B5_1,"
rbitfld.long 0x354 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x354 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x354 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x354 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x358 "ISPPROC_CUSTOM_FORMAT_LUT0_W26_B6_1,"
rbitfld.long 0x358 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x358 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x358 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x358 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x35C "ISPPROC_CUSTOM_FORMAT_LUT0_W26_B7_1,"
rbitfld.long 0x35C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x35C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x35C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x35C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x360 "ISPPROC_CUSTOM_FORMAT_LUT0_W27_B0_1,"
rbitfld.long 0x360 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x360 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x360 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x360 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x364 "ISPPROC_CUSTOM_FORMAT_LUT0_W27_B1_1,"
rbitfld.long 0x364 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x364 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x364 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x364 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x368 "ISPPROC_CUSTOM_FORMAT_LUT0_W27_B2_1,"
rbitfld.long 0x368 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x368 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x368 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x368 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x36C "ISPPROC_CUSTOM_FORMAT_LUT0_W27_B3_1,"
rbitfld.long 0x36C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x36C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x36C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x36C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x370 "ISPPROC_CUSTOM_FORMAT_LUT0_W27_B4_1,"
rbitfld.long 0x370 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x370 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x370 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x370 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x374 "ISPPROC_CUSTOM_FORMAT_LUT0_W27_B5_1,"
rbitfld.long 0x374 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x374 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x374 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x374 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x378 "ISPPROC_CUSTOM_FORMAT_LUT0_W27_B6_1,"
rbitfld.long 0x378 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x378 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x378 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x378 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x37C "ISPPROC_CUSTOM_FORMAT_LUT0_W27_B7_1,"
rbitfld.long 0x37C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x37C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x37C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x37C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x380 "ISPPROC_CUSTOM_FORMAT_LUT0_W28_B0_1,"
rbitfld.long 0x380 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x380 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x380 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x380 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x384 "ISPPROC_CUSTOM_FORMAT_LUT0_W28_B1_1,"
rbitfld.long 0x384 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x384 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x384 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x384 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x388 "ISPPROC_CUSTOM_FORMAT_LUT0_W28_B2_1,"
rbitfld.long 0x388 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x388 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x388 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x388 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x38C "ISPPROC_CUSTOM_FORMAT_LUT0_W28_B3_1,"
rbitfld.long 0x38C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x38C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x38C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x38C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x390 "ISPPROC_CUSTOM_FORMAT_LUT0_W28_B4_1,"
rbitfld.long 0x390 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x390 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x390 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x390 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x394 "ISPPROC_CUSTOM_FORMAT_LUT0_W28_B5_1,"
rbitfld.long 0x394 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x394 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x394 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x394 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x398 "ISPPROC_CUSTOM_FORMAT_LUT0_W28_B6_1,"
rbitfld.long 0x398 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x398 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x398 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x398 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x39C "ISPPROC_CUSTOM_FORMAT_LUT0_W28_B7_1,"
rbitfld.long 0x39C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x39C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x39C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x39C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3A0 "ISPPROC_CUSTOM_FORMAT_LUT0_W29_B0_1,"
rbitfld.long 0x3A0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3A0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3A0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3A0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3A4 "ISPPROC_CUSTOM_FORMAT_LUT0_W29_B1_1,"
rbitfld.long 0x3A4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3A4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3A4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3A4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3A8 "ISPPROC_CUSTOM_FORMAT_LUT0_W29_B2_1,"
rbitfld.long 0x3A8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3A8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3A8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3A8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3AC "ISPPROC_CUSTOM_FORMAT_LUT0_W29_B3_1,"
rbitfld.long 0x3AC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3AC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3AC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3AC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3B0 "ISPPROC_CUSTOM_FORMAT_LUT0_W29_B4_1,"
rbitfld.long 0x3B0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3B0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3B0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3B0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3B4 "ISPPROC_CUSTOM_FORMAT_LUT0_W29_B5_1,"
rbitfld.long 0x3B4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3B4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3B4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3B4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3B8 "ISPPROC_CUSTOM_FORMAT_LUT0_W29_B6_1,"
rbitfld.long 0x3B8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3B8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3B8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3B8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3BC "ISPPROC_CUSTOM_FORMAT_LUT0_W29_B7_1,"
rbitfld.long 0x3BC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3BC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3BC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3BC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3C0 "ISPPROC_CUSTOM_FORMAT_LUT0_W30_B0_1,"
rbitfld.long 0x3C0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3C0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3C0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3C0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3C4 "ISPPROC_CUSTOM_FORMAT_LUT0_W30_B1_1,"
rbitfld.long 0x3C4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3C4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3C4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3C4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3C8 "ISPPROC_CUSTOM_FORMAT_LUT0_W30_B2_1,"
rbitfld.long 0x3C8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3C8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3C8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3C8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3CC "ISPPROC_CUSTOM_FORMAT_LUT0_W30_B3_1,"
rbitfld.long 0x3CC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3CC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3CC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3CC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3D0 "ISPPROC_CUSTOM_FORMAT_LUT0_W30_B4_1,"
rbitfld.long 0x3D0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3D0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3D0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3D0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3D4 "ISPPROC_CUSTOM_FORMAT_LUT0_W30_B5_1,"
rbitfld.long 0x3D4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3D4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3D4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3D4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3D8 "ISPPROC_CUSTOM_FORMAT_LUT0_W30_B6_1,"
rbitfld.long 0x3D8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3D8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3D8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3D8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3DC "ISPPROC_CUSTOM_FORMAT_LUT0_W30_B7_1,"
rbitfld.long 0x3DC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3DC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3DC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3DC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3E0 "ISPPROC_CUSTOM_FORMAT_LUT0_W31_B0_1,"
rbitfld.long 0x3E0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3E0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3E0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3E0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3E4 "ISPPROC_CUSTOM_FORMAT_LUT0_W31_B1_1,"
rbitfld.long 0x3E4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3E4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3E4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3E4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3E8 "ISPPROC_CUSTOM_FORMAT_LUT0_W31_B2_1,"
rbitfld.long 0x3E8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3E8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3E8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3E8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3EC "ISPPROC_CUSTOM_FORMAT_LUT0_W31_B3_1,"
rbitfld.long 0x3EC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3EC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3EC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3EC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3F0 "ISPPROC_CUSTOM_FORMAT_LUT0_W31_B4_1,"
rbitfld.long 0x3F0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3F0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3F0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3F0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3F4 "ISPPROC_CUSTOM_FORMAT_LUT0_W31_B5_1,"
rbitfld.long 0x3F4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3F4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3F4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3F4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3F8 "ISPPROC_CUSTOM_FORMAT_LUT0_W31_B6_1,"
rbitfld.long 0x3F8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3F8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3F8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3F8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x3FC "ISPPROC_CUSTOM_FORMAT_LUT0_W31_B7_1,"
rbitfld.long 0x3FC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x3FC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3FC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x3FC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x400 "ISPPROC_CUSTOM_FORMAT_LUT0_W32_B0_1,"
rbitfld.long 0x400 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x400 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x400 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x400 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x404 "ISPPROC_CUSTOM_FORMAT_LUT0_W32_B1_1,"
rbitfld.long 0x404 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x404 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x404 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x404 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x408 "ISPPROC_CUSTOM_FORMAT_LUT0_W32_B2_1,"
rbitfld.long 0x408 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x408 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x408 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x408 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x40C "ISPPROC_CUSTOM_FORMAT_LUT0_W32_B3_1,"
rbitfld.long 0x40C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x40C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x40C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x40C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x410 "ISPPROC_CUSTOM_FORMAT_LUT0_W32_B4_1,"
rbitfld.long 0x410 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x410 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x410 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x410 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x414 "ISPPROC_CUSTOM_FORMAT_LUT0_W32_B5_1,"
rbitfld.long 0x414 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x414 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x414 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x414 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x418 "ISPPROC_CUSTOM_FORMAT_LUT0_W32_B6_1,"
rbitfld.long 0x418 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x418 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x418 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x418 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x41C "ISPPROC_CUSTOM_FORMAT_LUT0_W32_B7_1,"
rbitfld.long 0x41C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x41C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x41C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x41C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x420 "ISPPROC_CUSTOM_FORMAT_LUT0_W33_B0_1,"
rbitfld.long 0x420 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x420 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x420 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x420 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x424 "ISPPROC_CUSTOM_FORMAT_LUT0_W33_B1_1,"
rbitfld.long 0x424 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x424 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x424 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x424 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x428 "ISPPROC_CUSTOM_FORMAT_LUT0_W33_B2_1,"
rbitfld.long 0x428 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x428 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x428 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x428 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x42C "ISPPROC_CUSTOM_FORMAT_LUT0_W33_B3_1,"
rbitfld.long 0x42C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x42C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x42C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x42C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x430 "ISPPROC_CUSTOM_FORMAT_LUT0_W33_B4_1,"
rbitfld.long 0x430 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x430 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x430 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x430 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x434 "ISPPROC_CUSTOM_FORMAT_LUT0_W33_B5_1,"
rbitfld.long 0x434 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x434 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x434 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x434 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x438 "ISPPROC_CUSTOM_FORMAT_LUT0_W33_B6_1,"
rbitfld.long 0x438 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x438 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x438 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x438 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x43C "ISPPROC_CUSTOM_FORMAT_LUT0_W33_B7_1,"
rbitfld.long 0x43C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x43C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x43C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x43C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x440 "ISPPROC_CUSTOM_FORMAT_LUT0_W34_B0_1,"
rbitfld.long 0x440 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x440 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x440 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x440 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x444 "ISPPROC_CUSTOM_FORMAT_LUT0_W34_B1_1,"
rbitfld.long 0x444 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x444 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x444 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x444 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x448 "ISPPROC_CUSTOM_FORMAT_LUT0_W34_B2_1,"
rbitfld.long 0x448 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x448 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x448 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x448 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x44C "ISPPROC_CUSTOM_FORMAT_LUT0_W34_B3_1,"
rbitfld.long 0x44C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x44C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x44C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x44C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x450 "ISPPROC_CUSTOM_FORMAT_LUT0_W34_B4_1,"
rbitfld.long 0x450 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x450 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x450 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x450 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x454 "ISPPROC_CUSTOM_FORMAT_LUT0_W34_B5_1,"
rbitfld.long 0x454 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x454 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x454 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x454 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x458 "ISPPROC_CUSTOM_FORMAT_LUT0_W34_B6_1,"
rbitfld.long 0x458 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x458 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x458 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x458 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x45C "ISPPROC_CUSTOM_FORMAT_LUT0_W34_B7_1,"
rbitfld.long 0x45C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x45C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x45C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x45C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x460 "ISPPROC_CUSTOM_FORMAT_LUT0_W35_B0_1,"
rbitfld.long 0x460 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x460 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x460 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x460 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x464 "ISPPROC_CUSTOM_FORMAT_LUT0_W35_B1_1,"
rbitfld.long 0x464 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x464 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x464 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x464 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x468 "ISPPROC_CUSTOM_FORMAT_LUT0_W35_B2_1,"
rbitfld.long 0x468 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x468 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x468 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x468 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x46C "ISPPROC_CUSTOM_FORMAT_LUT0_W35_B3_1,"
rbitfld.long 0x46C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x46C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x46C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x46C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x470 "ISPPROC_CUSTOM_FORMAT_LUT0_W35_B4_1,"
rbitfld.long 0x470 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x470 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x470 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x470 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x474 "ISPPROC_CUSTOM_FORMAT_LUT0_W35_B5_1,"
rbitfld.long 0x474 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x474 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x474 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x474 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x478 "ISPPROC_CUSTOM_FORMAT_LUT0_W35_B6_1,"
rbitfld.long 0x478 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x478 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x478 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x478 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x47C "ISPPROC_CUSTOM_FORMAT_LUT0_W35_B7_1,"
rbitfld.long 0x47C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x47C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x47C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x47C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x480 "ISPPROC_CUSTOM_FORMAT_LUT0_W36_B0_1,"
rbitfld.long 0x480 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x480 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x480 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x480 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x484 "ISPPROC_CUSTOM_FORMAT_LUT0_W36_B1_1,"
rbitfld.long 0x484 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x484 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x484 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x484 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x488 "ISPPROC_CUSTOM_FORMAT_LUT0_W36_B2_1,"
rbitfld.long 0x488 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x488 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x488 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x488 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x48C "ISPPROC_CUSTOM_FORMAT_LUT0_W36_B3_1,"
rbitfld.long 0x48C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x48C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x48C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x48C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x490 "ISPPROC_CUSTOM_FORMAT_LUT0_W36_B4_1,"
rbitfld.long 0x490 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x490 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x490 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x490 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x494 "ISPPROC_CUSTOM_FORMAT_LUT0_W36_B5_1,"
rbitfld.long 0x494 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x494 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x494 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x494 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x498 "ISPPROC_CUSTOM_FORMAT_LUT0_W36_B6_1,"
rbitfld.long 0x498 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x498 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x498 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x498 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x49C "ISPPROC_CUSTOM_FORMAT_LUT0_W36_B7_1,"
rbitfld.long 0x49C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x49C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x49C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x49C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4A0 "ISPPROC_CUSTOM_FORMAT_LUT0_W37_B0_1,"
rbitfld.long 0x4A0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4A0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4A0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4A0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4A4 "ISPPROC_CUSTOM_FORMAT_LUT0_W37_B1_1,"
rbitfld.long 0x4A4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4A4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4A4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4A4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4A8 "ISPPROC_CUSTOM_FORMAT_LUT0_W37_B2_1,"
rbitfld.long 0x4A8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4A8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4A8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4A8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4AC "ISPPROC_CUSTOM_FORMAT_LUT0_W37_B3_1,"
rbitfld.long 0x4AC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4AC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4AC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4AC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4B0 "ISPPROC_CUSTOM_FORMAT_LUT0_W37_B4_1,"
rbitfld.long 0x4B0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4B0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4B0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4B0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4B4 "ISPPROC_CUSTOM_FORMAT_LUT0_W37_B5_1,"
rbitfld.long 0x4B4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4B4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4B4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4B4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4B8 "ISPPROC_CUSTOM_FORMAT_LUT0_W37_B6_1,"
rbitfld.long 0x4B8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4B8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4B8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4B8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4BC "ISPPROC_CUSTOM_FORMAT_LUT0_W37_B7_1,"
rbitfld.long 0x4BC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4BC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4BC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4BC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4C0 "ISPPROC_CUSTOM_FORMAT_LUT0_W38_B0_1,"
rbitfld.long 0x4C0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4C0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4C0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4C0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4C4 "ISPPROC_CUSTOM_FORMAT_LUT0_W38_B1_1,"
rbitfld.long 0x4C4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4C4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4C4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4C4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4C8 "ISPPROC_CUSTOM_FORMAT_LUT0_W38_B2_1,"
rbitfld.long 0x4C8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4C8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4C8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4C8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4CC "ISPPROC_CUSTOM_FORMAT_LUT0_W38_B3_1,"
rbitfld.long 0x4CC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4CC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4CC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4CC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4D0 "ISPPROC_CUSTOM_FORMAT_LUT0_W38_B4_1,"
rbitfld.long 0x4D0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4D0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4D0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4D0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4D4 "ISPPROC_CUSTOM_FORMAT_LUT0_W38_B5_1,"
rbitfld.long 0x4D4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4D4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4D4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4D4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4D8 "ISPPROC_CUSTOM_FORMAT_LUT0_W38_B6_1,"
rbitfld.long 0x4D8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4D8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4D8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4D8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4DC "ISPPROC_CUSTOM_FORMAT_LUT0_W38_B7_1,"
rbitfld.long 0x4DC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4DC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4DC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4DC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4E0 "ISPPROC_CUSTOM_FORMAT_LUT0_W39_B0_1,"
rbitfld.long 0x4E0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4E0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4E0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4E0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4E4 "ISPPROC_CUSTOM_FORMAT_LUT0_W39_B1_1,"
rbitfld.long 0x4E4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4E4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4E4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4E4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4E8 "ISPPROC_CUSTOM_FORMAT_LUT0_W39_B2_1,"
rbitfld.long 0x4E8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4E8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4E8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4E8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4EC "ISPPROC_CUSTOM_FORMAT_LUT0_W39_B3_1,"
rbitfld.long 0x4EC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4EC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4EC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4EC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4F0 "ISPPROC_CUSTOM_FORMAT_LUT0_W39_B4_1,"
rbitfld.long 0x4F0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4F0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4F0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4F0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4F4 "ISPPROC_CUSTOM_FORMAT_LUT0_W39_B5_1,"
rbitfld.long 0x4F4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4F4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4F4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4F4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4F8 "ISPPROC_CUSTOM_FORMAT_LUT0_W39_B6_1,"
rbitfld.long 0x4F8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4F8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4F8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4F8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x4FC "ISPPROC_CUSTOM_FORMAT_LUT0_W39_B7_1,"
rbitfld.long 0x4FC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x4FC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4FC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x4FC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x500 "ISPPROC_CUSTOM_FORMAT_LUT0_W40_B0_1,"
rbitfld.long 0x500 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x500 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x500 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x500 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x504 "ISPPROC_CUSTOM_FORMAT_LUT0_W40_B1_1,"
rbitfld.long 0x504 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x504 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x504 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x504 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x508 "ISPPROC_CUSTOM_FORMAT_LUT0_W40_B2_1,"
rbitfld.long 0x508 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x508 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x508 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x508 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x50C "ISPPROC_CUSTOM_FORMAT_LUT0_W40_B3_1,"
rbitfld.long 0x50C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x50C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x50C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x50C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x510 "ISPPROC_CUSTOM_FORMAT_LUT0_W40_B4_1,"
rbitfld.long 0x510 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x510 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x510 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x510 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x514 "ISPPROC_CUSTOM_FORMAT_LUT0_W40_B5_1,"
rbitfld.long 0x514 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x514 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x514 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x514 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x518 "ISPPROC_CUSTOM_FORMAT_LUT0_W40_B6_1,"
rbitfld.long 0x518 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x518 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x518 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x518 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x51C "ISPPROC_CUSTOM_FORMAT_LUT0_W40_B7_1,"
rbitfld.long 0x51C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x51C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x51C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x51C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x520 "ISPPROC_CUSTOM_FORMAT_LUT0_W41_B0_1,"
rbitfld.long 0x520 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x520 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x520 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x520 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x524 "ISPPROC_CUSTOM_FORMAT_LUT0_W41_B1_1,"
rbitfld.long 0x524 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x524 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x524 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x524 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x528 "ISPPROC_CUSTOM_FORMAT_LUT0_W41_B2_1,"
rbitfld.long 0x528 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x528 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x528 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x528 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x52C "ISPPROC_CUSTOM_FORMAT_LUT0_W41_B3_1,"
rbitfld.long 0x52C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x52C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x52C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x52C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x530 "ISPPROC_CUSTOM_FORMAT_LUT0_W41_B4_1,"
rbitfld.long 0x530 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x530 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x530 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x530 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x534 "ISPPROC_CUSTOM_FORMAT_LUT0_W41_B5_1,"
rbitfld.long 0x534 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x534 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x534 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x534 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x538 "ISPPROC_CUSTOM_FORMAT_LUT0_W41_B6_1,"
rbitfld.long 0x538 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x538 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x538 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x538 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x53C "ISPPROC_CUSTOM_FORMAT_LUT0_W41_B7_1,"
rbitfld.long 0x53C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x53C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x53C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x53C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x540 "ISPPROC_CUSTOM_FORMAT_LUT0_W42_B0_1,"
rbitfld.long 0x540 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x540 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x540 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x540 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x544 "ISPPROC_CUSTOM_FORMAT_LUT0_W42_B1_1,"
rbitfld.long 0x544 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x544 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x544 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x544 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x548 "ISPPROC_CUSTOM_FORMAT_LUT0_W42_B2_1,"
rbitfld.long 0x548 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x548 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x548 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x548 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x54C "ISPPROC_CUSTOM_FORMAT_LUT0_W42_B3_1,"
rbitfld.long 0x54C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x54C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x54C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x54C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x550 "ISPPROC_CUSTOM_FORMAT_LUT0_W42_B4_1,"
rbitfld.long 0x550 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x550 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x550 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x550 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x554 "ISPPROC_CUSTOM_FORMAT_LUT0_W42_B5_1,"
rbitfld.long 0x554 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x554 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x554 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x554 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x558 "ISPPROC_CUSTOM_FORMAT_LUT0_W42_B6_1,"
rbitfld.long 0x558 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x558 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x558 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x558 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x55C "ISPPROC_CUSTOM_FORMAT_LUT0_W42_B7_1,"
rbitfld.long 0x55C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x55C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x55C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x55C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x560 "ISPPROC_CUSTOM_FORMAT_LUT0_W43_B0_1,"
rbitfld.long 0x560 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x560 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x560 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x560 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x564 "ISPPROC_CUSTOM_FORMAT_LUT0_W43_B1_1,"
rbitfld.long 0x564 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x564 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x564 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x564 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x568 "ISPPROC_CUSTOM_FORMAT_LUT0_W43_B2_1,"
rbitfld.long 0x568 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x568 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x568 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x568 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x56C "ISPPROC_CUSTOM_FORMAT_LUT0_W43_B3_1,"
rbitfld.long 0x56C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x56C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x56C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x56C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x570 "ISPPROC_CUSTOM_FORMAT_LUT0_W43_B4_1,"
rbitfld.long 0x570 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x570 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x570 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x570 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x574 "ISPPROC_CUSTOM_FORMAT_LUT0_W43_B5_1,"
rbitfld.long 0x574 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x574 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x574 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x574 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x578 "ISPPROC_CUSTOM_FORMAT_LUT0_W43_B6_1,"
rbitfld.long 0x578 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x578 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x578 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x578 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x57C "ISPPROC_CUSTOM_FORMAT_LUT0_W43_B7_1,"
rbitfld.long 0x57C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x57C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x57C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x57C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x580 "ISPPROC_CUSTOM_FORMAT_LUT0_W44_B0_1,"
rbitfld.long 0x580 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x580 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x580 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x580 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x584 "ISPPROC_CUSTOM_FORMAT_LUT0_W44_B1_1,"
rbitfld.long 0x584 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x584 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x584 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x584 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x588 "ISPPROC_CUSTOM_FORMAT_LUT0_W44_B2_1,"
rbitfld.long 0x588 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x588 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x588 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x588 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x58C "ISPPROC_CUSTOM_FORMAT_LUT0_W44_B3_1,"
rbitfld.long 0x58C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x58C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x58C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x58C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x590 "ISPPROC_CUSTOM_FORMAT_LUT0_W44_B4_1,"
rbitfld.long 0x590 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x590 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x590 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x590 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x594 "ISPPROC_CUSTOM_FORMAT_LUT0_W44_B5_1,"
rbitfld.long 0x594 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x594 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x594 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x594 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x598 "ISPPROC_CUSTOM_FORMAT_LUT0_W44_B6_1,"
rbitfld.long 0x598 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x598 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x598 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x598 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x59C "ISPPROC_CUSTOM_FORMAT_LUT0_W44_B7_1,"
rbitfld.long 0x59C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x59C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x59C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x59C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5A0 "ISPPROC_CUSTOM_FORMAT_LUT0_W45_B0_1,"
rbitfld.long 0x5A0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5A0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5A0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5A0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5A4 "ISPPROC_CUSTOM_FORMAT_LUT0_W45_B1_1,"
rbitfld.long 0x5A4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5A4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5A4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5A4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5A8 "ISPPROC_CUSTOM_FORMAT_LUT0_W45_B2_1,"
rbitfld.long 0x5A8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5A8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5A8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5A8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5AC "ISPPROC_CUSTOM_FORMAT_LUT0_W45_B3_1,"
rbitfld.long 0x5AC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5AC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5AC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5AC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5B0 "ISPPROC_CUSTOM_FORMAT_LUT0_W45_B4_1,"
rbitfld.long 0x5B0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5B0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5B0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5B0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5B4 "ISPPROC_CUSTOM_FORMAT_LUT0_W45_B5_1,"
rbitfld.long 0x5B4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5B4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5B4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5B4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5B8 "ISPPROC_CUSTOM_FORMAT_LUT0_W45_B6_1,"
rbitfld.long 0x5B8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5B8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5B8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5B8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5BC "ISPPROC_CUSTOM_FORMAT_LUT0_W45_B7_1,"
rbitfld.long 0x5BC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5BC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5BC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5BC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5C0 "ISPPROC_CUSTOM_FORMAT_LUT0_W46_B0_1,"
rbitfld.long 0x5C0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5C0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5C0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5C0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5C4 "ISPPROC_CUSTOM_FORMAT_LUT0_W46_B1_1,"
rbitfld.long 0x5C4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5C4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5C4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5C4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5C8 "ISPPROC_CUSTOM_FORMAT_LUT0_W46_B2_1,"
rbitfld.long 0x5C8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5C8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5C8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5C8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5CC "ISPPROC_CUSTOM_FORMAT_LUT0_W46_B3_1,"
rbitfld.long 0x5CC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5CC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5CC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5CC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5D0 "ISPPROC_CUSTOM_FORMAT_LUT0_W46_B4_1,"
rbitfld.long 0x5D0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5D0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5D0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5D0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5D4 "ISPPROC_CUSTOM_FORMAT_LUT0_W46_B5_1,"
rbitfld.long 0x5D4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5D4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5D4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5D4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5D8 "ISPPROC_CUSTOM_FORMAT_LUT0_W46_B6_1,"
rbitfld.long 0x5D8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5D8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5D8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5D8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5DC "ISPPROC_CUSTOM_FORMAT_LUT0_W46_B7_1,"
rbitfld.long 0x5DC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5DC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5DC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5DC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5E0 "ISPPROC_CUSTOM_FORMAT_LUT0_W47_B0_1,"
rbitfld.long 0x5E0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5E0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5E0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5E0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5E4 "ISPPROC_CUSTOM_FORMAT_LUT0_W47_B1_1,"
rbitfld.long 0x5E4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5E4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5E4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5E4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5E8 "ISPPROC_CUSTOM_FORMAT_LUT0_W47_B2_1,"
rbitfld.long 0x5E8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5E8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5E8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5E8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5EC "ISPPROC_CUSTOM_FORMAT_LUT0_W47_B3_1,"
rbitfld.long 0x5EC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5EC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5EC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5EC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5F0 "ISPPROC_CUSTOM_FORMAT_LUT0_W47_B4_1,"
rbitfld.long 0x5F0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5F0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5F0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5F0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5F4 "ISPPROC_CUSTOM_FORMAT_LUT0_W47_B5_1,"
rbitfld.long 0x5F4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5F4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5F4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5F4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5F8 "ISPPROC_CUSTOM_FORMAT_LUT0_W47_B6_1,"
rbitfld.long 0x5F8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5F8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5F8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5F8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x5FC "ISPPROC_CUSTOM_FORMAT_LUT0_W47_B7_1,"
rbitfld.long 0x5FC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x5FC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5FC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x5FC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x600 "ISPPROC_CUSTOM_FORMAT_LUT0_W48_B0_1,"
rbitfld.long 0x600 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x600 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x600 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x600 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x604 "ISPPROC_CUSTOM_FORMAT_LUT0_W48_B1_1,"
rbitfld.long 0x604 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x604 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x604 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x604 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x608 "ISPPROC_CUSTOM_FORMAT_LUT0_W48_B2_1,"
rbitfld.long 0x608 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x608 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x608 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x608 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x60C "ISPPROC_CUSTOM_FORMAT_LUT0_W48_B3_1,"
rbitfld.long 0x60C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x60C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x60C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x60C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x610 "ISPPROC_CUSTOM_FORMAT_LUT0_W48_B4_1,"
rbitfld.long 0x610 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x610 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x610 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x610 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x614 "ISPPROC_CUSTOM_FORMAT_LUT0_W48_B5_1,"
rbitfld.long 0x614 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x614 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x614 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x614 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x618 "ISPPROC_CUSTOM_FORMAT_LUT0_W48_B6_1,"
rbitfld.long 0x618 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x618 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x618 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x618 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x61C "ISPPROC_CUSTOM_FORMAT_LUT0_W48_B7_1,"
rbitfld.long 0x61C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x61C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x61C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x61C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x620 "ISPPROC_CUSTOM_FORMAT_LUT0_W49_B0_1,"
rbitfld.long 0x620 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x620 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x620 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x620 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x624 "ISPPROC_CUSTOM_FORMAT_LUT0_W49_B1_1,"
rbitfld.long 0x624 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x624 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x624 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x624 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x628 "ISPPROC_CUSTOM_FORMAT_LUT0_W49_B2_1,"
rbitfld.long 0x628 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x628 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x628 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x628 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x62C "ISPPROC_CUSTOM_FORMAT_LUT0_W49_B3_1,"
rbitfld.long 0x62C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x62C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x62C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x62C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x630 "ISPPROC_CUSTOM_FORMAT_LUT0_W49_B4_1,"
rbitfld.long 0x630 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x630 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x630 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x630 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x634 "ISPPROC_CUSTOM_FORMAT_LUT0_W49_B5_1,"
rbitfld.long 0x634 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x634 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x634 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x634 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x638 "ISPPROC_CUSTOM_FORMAT_LUT0_W49_B6_1,"
rbitfld.long 0x638 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x638 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x638 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x638 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x63C "ISPPROC_CUSTOM_FORMAT_LUT0_W49_B7_1,"
rbitfld.long 0x63C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x63C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x63C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x63C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x640 "ISPPROC_CUSTOM_FORMAT_LUT0_W50_B0_1,"
rbitfld.long 0x640 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x640 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x640 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x640 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x644 "ISPPROC_CUSTOM_FORMAT_LUT0_W50_B1_1,"
rbitfld.long 0x644 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x644 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x644 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x644 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x648 "ISPPROC_CUSTOM_FORMAT_LUT0_W50_B2_1,"
rbitfld.long 0x648 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x648 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x648 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x648 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x64C "ISPPROC_CUSTOM_FORMAT_LUT0_W50_B3_1,"
rbitfld.long 0x64C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x64C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x64C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x64C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x650 "ISPPROC_CUSTOM_FORMAT_LUT0_W50_B4_1,"
rbitfld.long 0x650 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x650 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x650 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x650 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x654 "ISPPROC_CUSTOM_FORMAT_LUT0_W50_B5_1,"
rbitfld.long 0x654 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x654 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x654 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x654 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x658 "ISPPROC_CUSTOM_FORMAT_LUT0_W50_B6_1,"
rbitfld.long 0x658 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x658 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x658 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x658 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x65C "ISPPROC_CUSTOM_FORMAT_LUT0_W50_B7_1,"
rbitfld.long 0x65C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x65C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x65C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x65C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x660 "ISPPROC_CUSTOM_FORMAT_LUT0_W51_B0_1,"
rbitfld.long 0x660 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x660 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x660 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x660 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x664 "ISPPROC_CUSTOM_FORMAT_LUT0_W51_B1_1,"
rbitfld.long 0x664 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x664 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x664 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x664 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x668 "ISPPROC_CUSTOM_FORMAT_LUT0_W51_B2_1,"
rbitfld.long 0x668 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x668 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x668 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x668 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x66C "ISPPROC_CUSTOM_FORMAT_LUT0_W51_B3_1,"
rbitfld.long 0x66C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x66C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x66C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x66C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x670 "ISPPROC_CUSTOM_FORMAT_LUT0_W51_B4_1,"
rbitfld.long 0x670 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x670 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x670 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x670 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x674 "ISPPROC_CUSTOM_FORMAT_LUT0_W51_B5_1,"
rbitfld.long 0x674 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x674 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x674 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x674 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x678 "ISPPROC_CUSTOM_FORMAT_LUT0_W51_B6_1,"
rbitfld.long 0x678 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x678 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x678 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x678 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x67C "ISPPROC_CUSTOM_FORMAT_LUT0_W51_B7_1,"
rbitfld.long 0x67C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x67C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x67C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x67C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x680 "ISPPROC_CUSTOM_FORMAT_LUT0_W52_B0_1,"
rbitfld.long 0x680 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x680 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x680 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x680 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x684 "ISPPROC_CUSTOM_FORMAT_LUT0_W52_B1_1,"
rbitfld.long 0x684 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x684 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x684 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x684 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x688 "ISPPROC_CUSTOM_FORMAT_LUT0_W52_B2_1,"
rbitfld.long 0x688 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x688 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x688 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x688 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x68C "ISPPROC_CUSTOM_FORMAT_LUT0_W52_B3_1,"
rbitfld.long 0x68C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x68C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x68C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x68C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x690 "ISPPROC_CUSTOM_FORMAT_LUT0_W52_B4_1,"
rbitfld.long 0x690 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x690 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x690 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x690 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x694 "ISPPROC_CUSTOM_FORMAT_LUT0_W52_B5_1,"
rbitfld.long 0x694 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x694 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x694 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x694 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x698 "ISPPROC_CUSTOM_FORMAT_LUT0_W52_B6_1,"
rbitfld.long 0x698 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x698 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x698 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x698 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x69C "ISPPROC_CUSTOM_FORMAT_LUT0_W52_B7_1,"
rbitfld.long 0x69C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x69C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x69C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x69C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6A0 "ISPPROC_CUSTOM_FORMAT_LUT0_W53_B0_1,"
rbitfld.long 0x6A0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6A0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6A0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6A0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6A4 "ISPPROC_CUSTOM_FORMAT_LUT0_W53_B1_1,"
rbitfld.long 0x6A4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6A4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6A4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6A4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6A8 "ISPPROC_CUSTOM_FORMAT_LUT0_W53_B2_1,"
rbitfld.long 0x6A8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6A8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6A8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6A8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6AC "ISPPROC_CUSTOM_FORMAT_LUT0_W53_B3_1,"
rbitfld.long 0x6AC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6AC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6AC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6AC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6B0 "ISPPROC_CUSTOM_FORMAT_LUT0_W53_B4_1,"
rbitfld.long 0x6B0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6B0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6B0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6B0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6B4 "ISPPROC_CUSTOM_FORMAT_LUT0_W53_B5_1,"
rbitfld.long 0x6B4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6B4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6B4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6B4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6B8 "ISPPROC_CUSTOM_FORMAT_LUT0_W53_B6_1,"
rbitfld.long 0x6B8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6B8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6B8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6B8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6BC "ISPPROC_CUSTOM_FORMAT_LUT0_W53_B7_1,"
rbitfld.long 0x6BC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6BC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6BC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6BC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6C0 "ISPPROC_CUSTOM_FORMAT_LUT0_W54_B0_1,"
rbitfld.long 0x6C0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6C0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6C0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6C0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6C4 "ISPPROC_CUSTOM_FORMAT_LUT0_W54_B1_1,"
rbitfld.long 0x6C4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6C4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6C4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6C4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6C8 "ISPPROC_CUSTOM_FORMAT_LUT0_W54_B2_1,"
rbitfld.long 0x6C8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6C8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6C8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6C8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6CC "ISPPROC_CUSTOM_FORMAT_LUT0_W54_B3_1,"
rbitfld.long 0x6CC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6CC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6CC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6CC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6D0 "ISPPROC_CUSTOM_FORMAT_LUT0_W54_B4_1,"
rbitfld.long 0x6D0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6D0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6D0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6D0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6D4 "ISPPROC_CUSTOM_FORMAT_LUT0_W54_B5_1,"
rbitfld.long 0x6D4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6D4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6D4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6D4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6D8 "ISPPROC_CUSTOM_FORMAT_LUT0_W54_B6_1,"
rbitfld.long 0x6D8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6D8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6D8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6D8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6DC "ISPPROC_CUSTOM_FORMAT_LUT0_W54_B7_1,"
rbitfld.long 0x6DC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6DC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6DC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6DC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6E0 "ISPPROC_CUSTOM_FORMAT_LUT0_W55_B0_1,"
rbitfld.long 0x6E0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6E0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6E0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6E0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6E4 "ISPPROC_CUSTOM_FORMAT_LUT0_W55_B1_1,"
rbitfld.long 0x6E4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6E4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6E4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6E4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6E8 "ISPPROC_CUSTOM_FORMAT_LUT0_W55_B2_1,"
rbitfld.long 0x6E8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6E8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6E8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6E8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6EC "ISPPROC_CUSTOM_FORMAT_LUT0_W55_B3_1,"
rbitfld.long 0x6EC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6EC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6EC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6EC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6F0 "ISPPROC_CUSTOM_FORMAT_LUT0_W55_B4_1,"
rbitfld.long 0x6F0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6F0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6F0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6F0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6F4 "ISPPROC_CUSTOM_FORMAT_LUT0_W55_B5_1,"
rbitfld.long 0x6F4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6F4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6F4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6F4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6F8 "ISPPROC_CUSTOM_FORMAT_LUT0_W55_B6_1,"
rbitfld.long 0x6F8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6F8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6F8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6F8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x6FC "ISPPROC_CUSTOM_FORMAT_LUT0_W55_B7_1,"
rbitfld.long 0x6FC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x6FC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6FC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x6FC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x700 "ISPPROC_CUSTOM_FORMAT_LUT0_W56_B0_1,"
rbitfld.long 0x700 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x700 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x700 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x700 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x704 "ISPPROC_CUSTOM_FORMAT_LUT0_W56_B1_1,"
rbitfld.long 0x704 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x704 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x704 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x704 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x708 "ISPPROC_CUSTOM_FORMAT_LUT0_W56_B2_1,"
rbitfld.long 0x708 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x708 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x708 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x708 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x70C "ISPPROC_CUSTOM_FORMAT_LUT0_W56_B3_1,"
rbitfld.long 0x70C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x70C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x70C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x70C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x710 "ISPPROC_CUSTOM_FORMAT_LUT0_W56_B4_1,"
rbitfld.long 0x710 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x710 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x710 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x710 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x714 "ISPPROC_CUSTOM_FORMAT_LUT0_W56_B5_1,"
rbitfld.long 0x714 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x714 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x714 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x714 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x718 "ISPPROC_CUSTOM_FORMAT_LUT0_W56_B6_1,"
rbitfld.long 0x718 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x718 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x718 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x718 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x71C "ISPPROC_CUSTOM_FORMAT_LUT0_W56_B7_1,"
rbitfld.long 0x71C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x71C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x71C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x71C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x720 "ISPPROC_CUSTOM_FORMAT_LUT0_W57_B0_1,"
rbitfld.long 0x720 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x720 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x720 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x720 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x724 "ISPPROC_CUSTOM_FORMAT_LUT0_W57_B1_1,"
rbitfld.long 0x724 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x724 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x724 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x724 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x728 "ISPPROC_CUSTOM_FORMAT_LUT0_W57_B2_1,"
rbitfld.long 0x728 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x728 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x728 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x728 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x72C "ISPPROC_CUSTOM_FORMAT_LUT0_W57_B3_1,"
rbitfld.long 0x72C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x72C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x72C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x72C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x730 "ISPPROC_CUSTOM_FORMAT_LUT0_W57_B4_1,"
rbitfld.long 0x730 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x730 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x730 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x730 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x734 "ISPPROC_CUSTOM_FORMAT_LUT0_W57_B5_1,"
rbitfld.long 0x734 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x734 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x734 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x734 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x738 "ISPPROC_CUSTOM_FORMAT_LUT0_W57_B6_1,"
rbitfld.long 0x738 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x738 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x738 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x738 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x73C "ISPPROC_CUSTOM_FORMAT_LUT0_W57_B7_1,"
rbitfld.long 0x73C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x73C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x73C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x73C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x740 "ISPPROC_CUSTOM_FORMAT_LUT0_W58_B0_1,"
rbitfld.long 0x740 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x740 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x740 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x740 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x744 "ISPPROC_CUSTOM_FORMAT_LUT0_W58_B1_1,"
rbitfld.long 0x744 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x744 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x744 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x744 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x748 "ISPPROC_CUSTOM_FORMAT_LUT0_W58_B2_1,"
rbitfld.long 0x748 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x748 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x748 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x748 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x74C "ISPPROC_CUSTOM_FORMAT_LUT0_W58_B3_1,"
rbitfld.long 0x74C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x74C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x74C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x74C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x750 "ISPPROC_CUSTOM_FORMAT_LUT0_W58_B4_1,"
rbitfld.long 0x750 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x750 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x750 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x750 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x754 "ISPPROC_CUSTOM_FORMAT_LUT0_W58_B5_1,"
rbitfld.long 0x754 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x754 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x754 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x754 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x758 "ISPPROC_CUSTOM_FORMAT_LUT0_W58_B6_1,"
rbitfld.long 0x758 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x758 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x758 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x758 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x75C "ISPPROC_CUSTOM_FORMAT_LUT0_W58_B7_1,"
rbitfld.long 0x75C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x75C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x75C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x75C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x760 "ISPPROC_CUSTOM_FORMAT_LUT0_W59_B0_1,"
rbitfld.long 0x760 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x760 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x760 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x760 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x764 "ISPPROC_CUSTOM_FORMAT_LUT0_W59_B1_1,"
rbitfld.long 0x764 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x764 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x764 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x764 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x768 "ISPPROC_CUSTOM_FORMAT_LUT0_W59_B2_1,"
rbitfld.long 0x768 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x768 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x768 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x768 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x76C "ISPPROC_CUSTOM_FORMAT_LUT0_W59_B3_1,"
rbitfld.long 0x76C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x76C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x76C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x76C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x770 "ISPPROC_CUSTOM_FORMAT_LUT0_W59_B4_1,"
rbitfld.long 0x770 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x770 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x770 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x770 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x774 "ISPPROC_CUSTOM_FORMAT_LUT0_W59_B5_1,"
rbitfld.long 0x774 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x774 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x774 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x774 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x778 "ISPPROC_CUSTOM_FORMAT_LUT0_W59_B6_1,"
rbitfld.long 0x778 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x778 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x778 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x778 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x77C "ISPPROC_CUSTOM_FORMAT_LUT0_W59_B7_1,"
rbitfld.long 0x77C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x77C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x77C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x77C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x780 "ISPPROC_CUSTOM_FORMAT_LUT0_W60_B0_1,"
rbitfld.long 0x780 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x780 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x780 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x780 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x784 "ISPPROC_CUSTOM_FORMAT_LUT0_W60_B1_1,"
rbitfld.long 0x784 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x784 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x784 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x784 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x788 "ISPPROC_CUSTOM_FORMAT_LUT0_W60_B2_1,"
rbitfld.long 0x788 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x788 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x788 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x788 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x78C "ISPPROC_CUSTOM_FORMAT_LUT0_W60_B3_1,"
rbitfld.long 0x78C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x78C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x78C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x78C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x790 "ISPPROC_CUSTOM_FORMAT_LUT0_W60_B4_1,"
rbitfld.long 0x790 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x790 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x790 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x790 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x794 "ISPPROC_CUSTOM_FORMAT_LUT0_W60_B5_1,"
rbitfld.long 0x794 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x794 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x794 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x794 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x798 "ISPPROC_CUSTOM_FORMAT_LUT0_W60_B6_1,"
rbitfld.long 0x798 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x798 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x798 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x798 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x79C "ISPPROC_CUSTOM_FORMAT_LUT0_W60_B7_1,"
rbitfld.long 0x79C 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x79C 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x79C 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x79C 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7A0 "ISPPROC_CUSTOM_FORMAT_LUT0_W61_B0_1,"
rbitfld.long 0x7A0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7A0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7A0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7A0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7A4 "ISPPROC_CUSTOM_FORMAT_LUT0_W61_B1_1,"
rbitfld.long 0x7A4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7A4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7A4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7A4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7A8 "ISPPROC_CUSTOM_FORMAT_LUT0_W61_B2_1,"
rbitfld.long 0x7A8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7A8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7A8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7A8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7AC "ISPPROC_CUSTOM_FORMAT_LUT0_W61_B3_1,"
rbitfld.long 0x7AC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7AC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7AC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7AC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7B0 "ISPPROC_CUSTOM_FORMAT_LUT0_W61_B4_1,"
rbitfld.long 0x7B0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7B0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7B0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7B0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7B4 "ISPPROC_CUSTOM_FORMAT_LUT0_W61_B5_1,"
rbitfld.long 0x7B4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7B4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7B4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7B4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7B8 "ISPPROC_CUSTOM_FORMAT_LUT0_W61_B6_1,"
rbitfld.long 0x7B8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7B8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7B8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7B8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7BC "ISPPROC_CUSTOM_FORMAT_LUT0_W61_B7_1,"
rbitfld.long 0x7BC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7BC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7BC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7BC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7C0 "ISPPROC_CUSTOM_FORMAT_LUT0_W62_B0_1,"
rbitfld.long 0x7C0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7C0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7C0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7C0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7C4 "ISPPROC_CUSTOM_FORMAT_LUT0_W62_B1_1,"
rbitfld.long 0x7C4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7C4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7C4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7C4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7C8 "ISPPROC_CUSTOM_FORMAT_LUT0_W62_B2_1,"
rbitfld.long 0x7C8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7C8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7C8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7C8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7CC "ISPPROC_CUSTOM_FORMAT_LUT0_W62_B3_1,"
rbitfld.long 0x7CC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7CC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7CC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7CC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7D0 "ISPPROC_CUSTOM_FORMAT_LUT0_W62_B4_1,"
rbitfld.long 0x7D0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7D0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7D0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7D0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7D4 "ISPPROC_CUSTOM_FORMAT_LUT0_W62_B5_1,"
rbitfld.long 0x7D4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7D4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7D4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7D4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7D8 "ISPPROC_CUSTOM_FORMAT_LUT0_W62_B6_1,"
rbitfld.long 0x7D8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7D8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7D8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7D8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7DC "ISPPROC_CUSTOM_FORMAT_LUT0_W62_B7_1,"
rbitfld.long 0x7DC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7DC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7DC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7DC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7E0 "ISPPROC_CUSTOM_FORMAT_LUT0_W63_B0_1,"
rbitfld.long 0x7E0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7E0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7E0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7E0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7E4 "ISPPROC_CUSTOM_FORMAT_LUT0_W63_B1_1,"
rbitfld.long 0x7E4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7E4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7E4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7E4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7E8 "ISPPROC_CUSTOM_FORMAT_LUT0_W63_B2_1,"
rbitfld.long 0x7E8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7E8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7E8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7E8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7EC "ISPPROC_CUSTOM_FORMAT_LUT0_W63_B3_1,"
rbitfld.long 0x7EC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7EC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7EC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7EC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7F0 "ISPPROC_CUSTOM_FORMAT_LUT0_W63_B4_1,"
rbitfld.long 0x7F0 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7F0 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7F0 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7F0 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7F4 "ISPPROC_CUSTOM_FORMAT_LUT0_W63_B5_1,"
rbitfld.long 0x7F4 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7F4 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7F4 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7F4 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7F8 "ISPPROC_CUSTOM_FORMAT_LUT0_W63_B6_1,"
rbitfld.long 0x7F8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7F8 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7F8 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7F8 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
line.long 0x7FC "ISPPROC_CUSTOM_FORMAT_LUT0_W63_B7_1,"
rbitfld.long 0x7FC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.word 0x7FC 20.--29. 1. "SEL_Wm_BIT_3s2,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7FC 10.--19. 1. "SEL_Wm_BIT_3s1,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
newline
hexmask.long.word 0x7FC 0.--9. 1. "SEL_Wm_BIT_3s0,Configuration register for LUT based pixel reconstructor. See the 54.4.2.3 for detail"
group.long 0x9000++0x63
line.long 0x0 "RAW_SCALER_COEFF0_M2_M2_1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x0 0.--15. 1. "COEFF_M2_M2,Convoution coefficient"
line.long 0x4 "RAW_SCALER_COEFF0_M2_M1_1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x4 0.--15. 1. "COEFF_M2_M1,Convoution coefficient"
line.long 0x8 "RAW_SCALER_COEFF0_M2_00_1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x8 0.--15. 1. "COEFF_M2_00,Convoution coefficient"
line.long 0xC "RAW_SCALER_COEFF0_M2_P1_1,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0xC 0.--15. 1. "COEFF_M2_P1,Convoution coefficient"
line.long 0x10 "RAW_SCALER_COEFF0_M2_P2_1,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "COEFF_M2_P2,Convoution coefficient"
line.long 0x14 "RAW_SCALER_COEFF0_M1_M2_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "COEFF_M1_M2,Convoution coefficient"
line.long 0x18 "RAW_SCALER_COEFF0_M1_M1_1,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x18 0.--15. 1. "COEFF_M1_M1,Convoution coefficient"
line.long 0x1C "RAW_SCALER_COEFF0_M1_00_1,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x1C 0.--15. 1. "COEFF_M1_00,Convoution coefficient"
line.long 0x20 "RAW_SCALER_COEFF0_M1_P1_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "COEFF_M1_P1,Convoution coefficient"
line.long 0x24 "RAW_SCALER_COEFF0_M1_P2_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "COEFF_M1_P2,Convoution coefficient"
line.long 0x28 "RAW_SCALER_COEFF0_00_M2_1,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x28 0.--15. 1. "COEFF_00_M2,Convoution coefficient"
line.long 0x2C "RAW_SCALER_COEFF0_00_M1_1,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x2C 0.--15. 1. "COEFF_00_M1,Convoution coefficient"
line.long 0x30 "RAW_SCALER_COEFF0_00_00_1,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x30 0.--15. 1. "COEFF_00_00,Convoution coefficient"
line.long 0x34 "RAW_SCALER_COEFF0_00_P1_1,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x34 0.--15. 1. "COEFF_00_P1,Convoution coefficient"
line.long 0x38 "RAW_SCALER_COEFF0_00_P2_1,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x38 0.--15. 1. "COEFF_00_P2,Convoution coefficient"
line.long 0x3C "RAW_SCALER_COEFF0_P1_M2_1,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x3C 0.--15. 1. "COEFF_P1_M2,Convoution coefficient"
line.long 0x40 "RAW_SCALER_COEFF0_P1_M1_1,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x40 0.--15. 1. "COEFF_P1_M1,Convoution coefficient"
line.long 0x44 "RAW_SCALER_COEFF0_P1_00_1,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x44 0.--15. 1. "COEFF_P1_00,Convoution coefficient"
line.long 0x48 "RAW_SCALER_COEFF0_P1_P1_1,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x48 0.--15. 1. "COEFF_P1_P1,Convoution coefficient"
line.long 0x4C "RAW_SCALER_COEFF0_P1_P2_1,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x4C 0.--15. 1. "COEFF_P1_P2,Convoution coefficient"
line.long 0x50 "RAW_SCALER_COEFF0_P2_M2_1,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x50 0.--15. 1. "COEFF_P2_M2,Convoution coefficient"
line.long 0x54 "RAW_SCALER_COEFF0_P2_M1_1,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x54 0.--15. 1. "COEFF_P2_M1,Convoution coefficient"
line.long 0x58 "RAW_SCALER_COEFF0_P2_00_1,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x58 0.--15. 1. "COEFF_P2_00,Convoution coefficient"
line.long 0x5C "RAW_SCALER_COEFF0_P2_P1_1,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x5C 0.--15. 1. "COEFF_P2_P1,Convoution coefficient"
line.long 0x60 "RAW_SCALER_COEFF0_P2_P2_1,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x60 0.--15. 1. "COEFF_P2_P2,Convoution coefficient"
group.long 0x9100++0x63
line.long 0x0 "RAW_SCALER_COEFF1_M2_M2_1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x0 0.--15. 1. "COEFF_M2_M2,Convoution coefficient"
line.long 0x4 "RAW_SCALER_COEFF1_M2_M1_1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x4 0.--15. 1. "COEFF_M2_M1,Convoution coefficient"
line.long 0x8 "RAW_SCALER_COEFF1_M2_00_1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x8 0.--15. 1. "COEFF_M2_00,Convoution coefficient"
line.long 0xC "RAW_SCALER_COEFF1_M2_P1_1,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0xC 0.--15. 1. "COEFF_M2_P1,Convoution coefficient"
line.long 0x10 "RAW_SCALER_COEFF1_M2_P2_1,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "COEFF_M2_P2,Convoution coefficient"
line.long 0x14 "RAW_SCALER_COEFF1_M1_M2_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "COEFF_M1_M2,Convoution coefficient"
line.long 0x18 "RAW_SCALER_COEFF1_M1_M1_1,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x18 0.--15. 1. "COEFF_M1_M1,Convoution coefficient"
line.long 0x1C "RAW_SCALER_COEFF1_M1_00_1,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x1C 0.--15. 1. "COEFF_M1_00,Convoution coefficient"
line.long 0x20 "RAW_SCALER_COEFF1_M1_P1_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "COEFF_M1_P1,Convoution coefficient"
line.long 0x24 "RAW_SCALER_COEFF1_M1_P2_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "COEFF_M1_P2,Convoution coefficient"
line.long 0x28 "RAW_SCALER_COEFF1_00_M2_1,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x28 0.--15. 1. "COEFF_00_M2,Convoution coefficient"
line.long 0x2C "RAW_SCALER_COEFF1_00_M1_1,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x2C 0.--15. 1. "COEFF_00_M1,Convoution coefficient"
line.long 0x30 "RAW_SCALER_COEFF1_00_00_1,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x30 0.--15. 1. "COEFF_00_00,Convoution coefficient"
line.long 0x34 "RAW_SCALER_COEFF1_00_P1_1,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x34 0.--15. 1. "COEFF_00_P1,Convoution coefficient"
line.long 0x38 "RAW_SCALER_COEFF1_00_P2_1,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x38 0.--15. 1. "COEFF_00_P2,Convoution coefficient"
line.long 0x3C "RAW_SCALER_COEFF1_P1_M2_1,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x3C 0.--15. 1. "COEFF_P1_M2,Convoution coefficient"
line.long 0x40 "RAW_SCALER_COEFF1_P1_M1_1,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x40 0.--15. 1. "COEFF_P1_M1,Convoution coefficient"
line.long 0x44 "RAW_SCALER_COEFF1_P1_00_1,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x44 0.--15. 1. "COEFF_P1_00,Convoution coefficient"
line.long 0x48 "RAW_SCALER_COEFF1_P1_P1_1,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x48 0.--15. 1. "COEFF_P1_P1,Convoution coefficient"
line.long 0x4C "RAW_SCALER_COEFF1_P1_P2_1,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x4C 0.--15. 1. "COEFF_P1_P2,Convoution coefficient"
line.long 0x50 "RAW_SCALER_COEFF1_P2_M2_1,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x50 0.--15. 1. "COEFF_P2_M2,Convoution coefficient"
line.long 0x54 "RAW_SCALER_COEFF1_P2_M1_1,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x54 0.--15. 1. "COEFF_P2_M1,Convoution coefficient"
line.long 0x58 "RAW_SCALER_COEFF1_P2_00_1,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x58 0.--15. 1. "COEFF_P2_00,Convoution coefficient"
line.long 0x5C "RAW_SCALER_COEFF1_P2_P1_1,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x5C 0.--15. 1. "COEFF_P2_P1,Convoution coefficient"
line.long 0x60 "RAW_SCALER_COEFF1_P2_P2_1,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x60 0.--15. 1. "COEFF_P2_P2,Convoution coefficient"
group.long 0x9200++0x63
line.long 0x0 "RAW_SCALER_COEFF2_M2_M2_1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x0 0.--15. 1. "COEFF_M2_M2,Convoution coefficient"
line.long 0x4 "RAW_SCALER_COEFF2_M2_M1_1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x4 0.--15. 1. "COEFF_M2_M1,Convoution coefficient"
line.long 0x8 "RAW_SCALER_COEFF2_M2_00_1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x8 0.--15. 1. "COEFF_M2_00,Convoution coefficient"
line.long 0xC "RAW_SCALER_COEFF2_M2_P1_1,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0xC 0.--15. 1. "COEFF_M2_P1,Convoution coefficient"
line.long 0x10 "RAW_SCALER_COEFF2_M2_P2_1,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "COEFF_M2_P2,Convoution coefficient"
line.long 0x14 "RAW_SCALER_COEFF2_M1_M2_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "COEFF_M1_M2,Convoution coefficient"
line.long 0x18 "RAW_SCALER_COEFF2_M1_M1_1,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x18 0.--15. 1. "COEFF_M1_M1,Convoution coefficient"
line.long 0x1C "RAW_SCALER_COEFF2_M1_00_1,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x1C 0.--15. 1. "COEFF_M1_00,Convoution coefficient"
line.long 0x20 "RAW_SCALER_COEFF2_M1_P1_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "COEFF_M1_P1,Convoution coefficient"
line.long 0x24 "RAW_SCALER_COEFF2_M1_P2_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "COEFF_M1_P2,Convoution coefficient"
line.long 0x28 "RAW_SCALER_COEFF2_00_M2_1,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x28 0.--15. 1. "COEFF_00_M2,Convoution coefficient"
line.long 0x2C "RAW_SCALER_COEFF2_00_M1_1,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x2C 0.--15. 1. "COEFF_00_M1,Convoution coefficient"
line.long 0x30 "RAW_SCALER_COEFF2_00_00_1,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x30 0.--15. 1. "COEFF_00_00,Convoution coefficient"
line.long 0x34 "RAW_SCALER_COEFF2_00_P1_1,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x34 0.--15. 1. "COEFF_00_P1,Convoution coefficient"
line.long 0x38 "RAW_SCALER_COEFF2_00_P2_1,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x38 0.--15. 1. "COEFF_00_P2,Convoution coefficient"
line.long 0x3C "RAW_SCALER_COEFF2_P1_M2_1,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x3C 0.--15. 1. "COEFF_P1_M2,Convoution coefficient"
line.long 0x40 "RAW_SCALER_COEFF2_P1_M1_1,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x40 0.--15. 1. "COEFF_P1_M1,Convoution coefficient"
line.long 0x44 "RAW_SCALER_COEFF2_P1_00_1,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x44 0.--15. 1. "COEFF_P1_00,Convoution coefficient"
line.long 0x48 "RAW_SCALER_COEFF2_P1_P1_1,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x48 0.--15. 1. "COEFF_P1_P1,Convoution coefficient"
line.long 0x4C "RAW_SCALER_COEFF2_P1_P2_1,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x4C 0.--15. 1. "COEFF_P1_P2,Convoution coefficient"
line.long 0x50 "RAW_SCALER_COEFF2_P2_M2_1,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x50 0.--15. 1. "COEFF_P2_M2,Convoution coefficient"
line.long 0x54 "RAW_SCALER_COEFF2_P2_M1_1,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x54 0.--15. 1. "COEFF_P2_M1,Convoution coefficient"
line.long 0x58 "RAW_SCALER_COEFF2_P2_00_1,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x58 0.--15. 1. "COEFF_P2_00,Convoution coefficient"
line.long 0x5C "RAW_SCALER_COEFF2_P2_P1_1,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x5C 0.--15. 1. "COEFF_P2_P1,Convoution coefficient"
line.long 0x60 "RAW_SCALER_COEFF2_P2_P2_1,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x60 0.--15. 1. "COEFF_P2_P2,Convoution coefficient"
group.long 0x9300++0x63
line.long 0x0 "RAW_SCALER_COEFF3_M2_M2_1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x0 0.--15. 1. "COEFF_M2_M2,Convoution coefficient"
line.long 0x4 "RAW_SCALER_COEFF3_M2_M1_1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x4 0.--15. 1. "COEFF_M2_M1,Convoution coefficient"
line.long 0x8 "RAW_SCALER_COEFF3_M2_00_1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x8 0.--15. 1. "COEFF_M2_00,Convoution coefficient"
line.long 0xC "RAW_SCALER_COEFF3_M2_P1_1,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0xC 0.--15. 1. "COEFF_M2_P1,Convoution coefficient"
line.long 0x10 "RAW_SCALER_COEFF3_M2_P2_1,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x10 0.--15. 1. "COEFF_M2_P2,Convoution coefficient"
line.long 0x14 "RAW_SCALER_COEFF3_M1_M2_1,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x14 0.--15. 1. "COEFF_M1_M2,Convoution coefficient"
line.long 0x18 "RAW_SCALER_COEFF3_M1_M1_1,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x18 0.--15. 1. "COEFF_M1_M1,Convoution coefficient"
line.long 0x1C "RAW_SCALER_COEFF3_M1_00_1,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x1C 0.--15. 1. "COEFF_M1_00,Convoution coefficient"
line.long 0x20 "RAW_SCALER_COEFF3_M1_P1_1,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "COEFF_M1_P1,Convoution coefficient"
line.long 0x24 "RAW_SCALER_COEFF3_M1_P2_1,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "COEFF_M1_P2,Convoution coefficient"
line.long 0x28 "RAW_SCALER_COEFF3_00_M2_1,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x28 0.--15. 1. "COEFF_00_M2,Convoution coefficient"
line.long 0x2C "RAW_SCALER_COEFF3_00_M1_1,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x2C 0.--15. 1. "COEFF_00_M1,Convoution coefficient"
line.long 0x30 "RAW_SCALER_COEFF3_00_00_1,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x30 0.--15. 1. "COEFF_00_00,Convoution coefficient"
line.long 0x34 "RAW_SCALER_COEFF3_00_P1_1,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x34 0.--15. 1. "COEFF_00_P1,Convoution coefficient"
line.long 0x38 "RAW_SCALER_COEFF3_00_P2_1,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x38 0.--15. 1. "COEFF_00_P2,Convoution coefficient"
line.long 0x3C "RAW_SCALER_COEFF3_P1_M2_1,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x3C 0.--15. 1. "COEFF_P1_M2,Convoution coefficient"
line.long 0x40 "RAW_SCALER_COEFF3_P1_M1_1,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x40 0.--15. 1. "COEFF_P1_M1,Convoution coefficient"
line.long 0x44 "RAW_SCALER_COEFF3_P1_00_1,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x44 0.--15. 1. "COEFF_P1_00,Convoution coefficient"
line.long 0x48 "RAW_SCALER_COEFF3_P1_P1_1,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x48 0.--15. 1. "COEFF_P1_P1,Convoution coefficient"
line.long 0x4C "RAW_SCALER_COEFF3_P1_P2_1,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x4C 0.--15. 1. "COEFF_P1_P2,Convoution coefficient"
line.long 0x50 "RAW_SCALER_COEFF3_P2_M2_1,"
hexmask.long.word 0x50 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x50 0.--15. 1. "COEFF_P2_M2,Convoution coefficient"
line.long 0x54 "RAW_SCALER_COEFF3_P2_M1_1,"
hexmask.long.word 0x54 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x54 0.--15. 1. "COEFF_P2_M1,Convoution coefficient"
line.long 0x58 "RAW_SCALER_COEFF3_P2_00_1,"
hexmask.long.word 0x58 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x58 0.--15. 1. "COEFF_P2_00,Convoution coefficient"
line.long 0x5C "RAW_SCALER_COEFF3_P2_P1_1,"
hexmask.long.word 0x5C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x5C 0.--15. 1. "COEFF_P2_P1,Convoution coefficient"
line.long 0x60 "RAW_SCALER_COEFF3_P2_P2_1,"
hexmask.long.word 0x60 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x60 0.--15. 1. "COEFF_P2_P2,Convoution coefficient"
group.long 0x9800++0x1B
line.long 0x0 "RAW_SCALER_MODE_1,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved bits. Do not write any different value from its initial value."
newline
hexmask.long.byte 0x0 24.--27. 1. "TARGET_VC,Virtual channel (VC) number to input RAW scaler"
newline
bitfld.long 0x0 22.--23. "Reserved_22,Reserved bits. Do not write any different value from its initial value." "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--21. 1. "TARGET_DT_CODE,Data type (DT) code to input RAW scaler"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x0 0. "ENABLE,Enable RAW scaler" "0: RAW scaler is disabled [default],1: RAW sacaler is enabled"
line.long 0x4 "RAW_SCALER_OUT_VBLANK_1,"
hexmask.long.byte 0x4 24.--31. 1. "VBLANK_FS_CYCLE,Number of cycles of vertical blanking period at frame start timing of RAW scaler output image"
newline
hexmask.long.tbyte 0x4 0.--23. 1. "VBLANK_FE_CYCLE,Number of cycles of vertical blanking period at frame end timing of RAW scaler output image"
line.long 0x8 "RAW_SCALER_OUT_HBLANK_1,"
hexmask.long.byte 0x8 28.--31. 1. "Reserved_28,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x8 24.--27. 1. "BACK_PORCH_CYCLE,Number of cycles of back porch for each line of RAW scaler output image"
newline
hexmask.long.byte 0x8 20.--23. 1. "Reserved_20,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x8 16.--19. 1. "FRONT_PORCH_CYCLE,Number of cycles of front porch for each line of RAW scaler output image"
newline
hexmask.long.byte 0x8 12.--15. 1. "Reserved_12,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x8 0.--11. 1. "HBLANK_CYCLE,Number of cycles of horitontal blanking period for each line of RAW scaled image"
line.long 0xC "RAW_SCALER_OUT_VS_HS_1,"
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0xC 16.--23. 1. "VS_HS_FALL_CYCLE,Number of cycles from VSYNC fall timing to HSYNC fall timing of RAW scaler output image"
newline
hexmask.long.byte 0xC 8.--15. 1. "Reserved_8,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0xC 0.--7. 1. "VS_HS_RISE_CYCLE,Number of cycles from VSYNC rise timing to HSYNC rise timing of RAW scaler output image"
line.long 0x10 "RAW_SCALER_INPUT_LSHIFT_1,"
hexmask.long 0x10 5.--31. 1. "Reserved_5,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x10 0.--4. 1. "INPUT_LSHIFT,Left shift amount for RAW scaler input pixel before multiplying convolution coefficient"
line.long 0x14 "RAW_SCALER_IMAGE_SIZE_1,"
hexmask.long.word 0x14 16.--31. 1. "IMAGE_HEIGHT,Image height (number of lines in one frame) of RAW scaler input image"
newline
hexmask.long.word 0x14 0.--15. 1. "IMAGE_WIDTH,Image width (number of pixels per line) of RAW scaler input image"
line.long 0x18 "RAW_SCALER_CONV_RSHIFT_1,"
hexmask.long.byte 0x18 24.--31. 1. "CONV3_RSHIFT,Right shift amount after convolution operation when coeff_select_value(x%4 y%4) is 3. Setting value of conv_rshift(3)"
newline
hexmask.long.byte 0x18 16.--23. 1. "CONV2_RSHIFT,Right shift amount after convolution operation when coeff_select_value(x%4 y%4) is 2. Setting value fo conv_rshift(2)"
newline
hexmask.long.byte 0x18 8.--15. 1. "CONV1_RSHIFT,Right shift amount after convolution operation when coeff_select_value(x%4 y%4) is 1. Setting value of conv_rshift(1)"
newline
hexmask.long.byte 0x18 0.--7. 1. "CONV0_RSHIFT,Right shift amount after convolution operation when coeff_select_value(x%4 y%4) is 0. Setting value of conv_rshift(0)"
group.long 0x9820++0x2B
line.long 0x0 "RAW_SCALER_COEFF_SEL_ROW0_1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x0 12.--15. 1. "COEFF_SEL_0_3,Setting value of coeff_select_table(0 3). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(0 3)"
newline
hexmask.long.byte 0x0 8.--11. 1. "COEFF_SEL_0_2,Setting value of coeff_select_table(0 2). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(0 2)"
newline
hexmask.long.byte 0x0 4.--7. 1. "COEFF_SEL_0_1,Setting value of coeff_select_table(0 1). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(0 1)"
newline
hexmask.long.byte 0x0 0.--3. 1. "COEFF_SEL_0_0,Setting value of coeff_select_table(0 0). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(0 0)"
line.long 0x4 "RAW_SCALER_COEFF_SEL_ROW1_1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x4 12.--15. 1. "COEFF_SEL_1_3,Setting value of coeff_select_table(1 3). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(1 3)"
newline
hexmask.long.byte 0x4 8.--11. 1. "COEFF_SEL_1_2,Setting value of coeff_select_table(1 2). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(1 2)"
newline
hexmask.long.byte 0x4 4.--7. 1. "COEFF_SEL_1_1,Setting value of coeff_select_table(1 1). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(1 1)"
newline
hexmask.long.byte 0x4 0.--3. 1. "COEFF_SEL_1_0,Setting value of coeff_select_table(1 0). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(1 0)"
line.long 0x8 "RAW_SCALER_COEFF_SEL_ROW2_1,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x8 12.--15. 1. "COEFF_SEL_2_3,Setting value of coeff_select_table(2 3). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(2 3)"
newline
hexmask.long.byte 0x8 8.--11. 1. "COEFF_SEL_2_2,Setting value of coeff_select_table(2 2). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(2 2)"
newline
hexmask.long.byte 0x8 4.--7. 1. "COEFF_SEL_2_1,Setting value of coeff_select_table(2 1). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(2 1)"
newline
hexmask.long.byte 0x8 0.--3. 1. "COEFF_SEL_2_0,Setting value of coeff_select_table(2 0). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(2 0)"
line.long 0xC "RAW_SCALER_COEFF_SEL_ROW3_1,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0xC 12.--15. 1. "COEFF_SEL_3_3,Setting value of coeff_select_table(3 3). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(3 3)"
newline
hexmask.long.byte 0xC 8.--11. 1. "COEFF_SEL_3_2,Setting value of coeff_select_table(3 2). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(3 2)"
newline
hexmask.long.byte 0xC 4.--7. 1. "COEFF_SEL_3_1,Setting value of coeff_select_table(3 1). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(3 1)"
newline
hexmask.long.byte 0xC 0.--3. 1. "COEFF_SEL_3_0,Setting value of coeff_select_table(3 0). Index of convolution coefficient when pixel coordinate is (x%4 y%4)=(3 0)"
line.long 0x10 "RAW_SCALER_ROUNDING0_1,"
hexmask.long 0x10 0.--31. 1. "ROUNDING0,Setting value of rounding(0)"
line.long 0x14 "RAW_SCALER_ROUNDING1_1,"
hexmask.long 0x14 0.--31. 1. "ROUNDING1,Setting value of rounding(1)"
line.long 0x18 "RAW_SCALER_ROUNDING2_1,"
hexmask.long 0x18 0.--31. 1. "ROUNDING2,Setting value of rounding(2)"
line.long 0x1C "RAW_SCALER_ROUNDING3_1,"
hexmask.long 0x1C 0.--31. 1. "ROUNDING3,Setting value of rounding(3)"
line.long 0x20 "RAW_SCALER_SAT_MIN_1,"
hexmask.long 0x20 0.--31. 1. "SATURATION_MIN,Minimum value of saturation operation after convolution"
line.long 0x24 "RAW_SCALER_SAT_MAX_1,"
hexmask.long.byte 0x24 24.--31. 1. "Reserved_24,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.tbyte 0x24 0.--23. 1. "SATURATION_MAX,Maximum value of saturation operation after convolution"
line.long 0x28 "RAW_SCALER_SAT_FINAL_LSHIFT_1,"
hexmask.long 0x28 5.--31. 1. "Reserved_5,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x28 0.--4. 1. "FINAL_LSHIFT,Left shift amount after convoution"
tree.end
tree "ISP_2"
base ad:0xFEC00000
rgroup.long 0x80000++0x3
line.long 0x0 "ISPCORE_INT_STATUS_0,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 19. "DPCC_PIXEL_COUNT_OVER_DPCC2,Asserted when number of detected defect pixel count is over than upper limitation specified in ISPCORE_DMA_DPCC[1]_PIXEL_COUNT_MAX register" "0,1"
newline
bitfld.long 0x0 18. "DPCC_PIXEL_COUNT_OVER_DPCC1,Asserted when number of detected defect pixel count is over than upper limitation specified in ISPCORE_DMA_DPCC[0]_PIXEL_COUNT_MAX register" "0,1"
newline
hexmask.long.tbyte 0x0 1.--17. 1. "Reserved_1,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 0. "ST0,Status of interrupt request signal from ISP core" "0,1"
group.long 0x80004++0x7
line.long 0x0 "ISPCORE_INT_ENABLE_0,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 19. "DPCC_PIXEL_COUNT_OVER_DPCC2,Interrupt enable of ISPCORE_INT_STATUS[19]" "0,1"
newline
bitfld.long 0x0 18. "DPCC_PIXEL_COUNT_OVER_DPCC1,Interrupt enable of ISPCORE_INT_STATUS[18]" "0,1"
newline
hexmask.long.tbyte 0x0 1.--17. 1. "Reserved_1,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 0. "EN0,Enable bit of interrupt request signal output from ISP core." "?,1: Interrupt is notified to INTC"
line.long 0x4 "ISPCORE_BACK_PRESSURE_0,"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved bits. Do not write any different value from its initial value."
newline
hexmask.long.byte 0x4 8.--11. 1. "BP_THRESHOLD,Watermak level of stopping threshold for back pressure stopping."
newline
hexmask.long.byte 0x4 1.--7. 1. "Reserved_1,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x4 0. "BP_STOP_MODE,Back pressure stopping mode. 0: Back pressure stopping is disabled. 1: Back pressure stopping is enabled(default)" "0: Back pressure stopping is disabled,1: Back pressure stopping is enabled"
group.long 0x84000++0x33
line.long 0x0 "ISPCORE_DMA_IMAGE0_FRAME0_MODE_0,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 16. "ENABLE_WUP,On/OFF control whether WUP signal is issued in synchronized system with IMR" "0: WUP signal is disabled,1: WUP signal is enabled"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 0.--1. "NUM_OF_COMPONENT_MINUS1,Number of components minus 1." "0,1,2,3"
line.long 0x4 "ISPCORE_DMA_IMAGE0_FRAME0_PIXEL_POSITION_0,"
hexmask.long.byte 0x4 24.--31. 1. "LSB_COMP3,Bit position of LSB bit of pixel in the output image component3"
newline
hexmask.long.byte 0x4 16.--23. 1. "LSB_COMP2,Bit position of LSB bit of pixel in the output image component2"
newline
hexmask.long.byte 0x4 8.--15. 1. "LSB_COMP1,Bit position of LSB bit of pixel in the output image component1"
newline
hexmask.long.byte 0x4 0.--7. 1. "LSB_COMP0,Bit position of LSB bit of pixel in the output image component0"
line.long 0x8 "ISPCORE_DMA_IMAGE0_FRAME0_PIXEL_BITWIDTH_MINUS1_0,"
rbitfld.long 0x8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 24.--29. 1. "BW_MINUS1_COMP3,Bit width minus 1 of pixel in the output image component 3"
newline
rbitfld.long 0x8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 16.--21. 1. "BW_MINUS1_COMP2,Bit width minus 1 of pixel in the output image component 2"
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 8.--13. 1. "BW_MINUS1_COMP1,Bit width minus 1 of pixel in the output image component 1"
newline
rbitfld.long 0x8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 0.--5. 1. "BW_MINUS1_COMP0,Bit width minus 1 of pixel in the output image component 0"
line.long 0xC "ISPCORE_DMA_IMAGE0_FRAME0_PIXEL_BPP_0,"
rbitfld.long 0xC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 28.--29. "LINE_EN_COMP3,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 3." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 26.--27. "Reserved_26,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 24.--25. "BPP_COMP3,Bit per pixel of output image component 3" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 20.--21. "LINE_EN_COMP2,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 2." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 18.--19. "Reserved_18,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 16.--17. "BPP_COMP2,Bit per pixel of output image component 2" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 12.--13. "LINE_EN_COMP1,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 1." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 10.--11. "Reserved_10,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 8.--9. "BPP_COMP1,Bit per pixel of output image component 1" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 4.--5. "LINE_EN_COMP0,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 0." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 2.--3. "Reserved_2,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 0.--1. "BPP_COMP0,Bit per pixel of output image component 0" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
line.long 0x10 "ISPCORE_DMA_IMAGE0_FRAME0_BASE_ADDRESS_COMP0_0,"
hexmask.long 0x10 0.--31. 1. "BASE_ADDRESS_COMP0,Start address ot output image component 0"
line.long 0x14 "ISPCORE_DMA_IMAGE0_FRAME0_BASE_ADDRESS_COMP1_0,"
hexmask.long 0x14 0.--31. 1. "BASE_ADDRESS_COMP1,Start address ot output image component 1"
line.long 0x18 "ISPCORE_DMA_IMAGE0_FRAME0_BASE_ADDRESS_COMP2_0,"
hexmask.long 0x18 0.--31. 1. "BASE_ADDRESS_COMP2,Start address ot output image component 2"
line.long 0x1C "ISPCORE_DMA_IMAGE0_FRAME0_BASE_ADDRESS_COMP3_0,"
hexmask.long 0x1C 0.--31. 1. "BASE_ADDRESS_COMP3,Start address ot output image component 3"
line.long 0x20 "ISPCORE_DMA_IMAGE0_FRAME0_STRIDE_COMP0_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "STRIDE_COMP0,Stride (line offset) of output image component 0. Unit is byte"
line.long 0x24 "ISPCORE_DMA_IMAGE0_FRAME0_STRIDE_COMP1_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "STRIDE_COMP1,Stride (line offset) of output image component 1. Unit is byte"
line.long 0x28 "ISPCORE_DMA_IMAGE0_FRAME0_STRIDE_COMP2_0,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x28 0.--15. 1. "STRIDE_COMP2,Stride (line offset) of output image component 2. Unit is byte"
line.long 0x2C "ISPCORE_DMA_IMAGE0_FRAME0_STRIDE_COMP3_0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x2C 0.--15. 1. "STRIDE_COMP3,Stride (line offset) of output image component 3. Unit is byte"
line.long 0x30 "ISPCORE_DMA_IMAGE0_FRAME0_AXI_ID_0,"
hexmask.long.byte 0x30 24.--31. 1. "AXI_ID_COMP3,AXI transaction ID of output image component 3"
newline
hexmask.long.byte 0x30 16.--23. 1. "AXI_ID_COMP2,AXI transaction ID of output image component 2"
newline
hexmask.long.byte 0x30 8.--15. 1. "AXI_ID_COMP1,AXI transaction ID of output image component 1"
newline
hexmask.long.byte 0x30 0.--7. 1. "AXI_ID_COMP0,AXI transaction ID of output image component 0"
group.long 0x84100++0x33
line.long 0x0 "ISPCORE_DMA_IMAGE0_FRAME1_MODE_0,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 16. "ENABLE_WUP,On/OFF control whether WUP signal is issued in synchronized system with IMR" "0: WUP signal is disabled,1: WUP signal is enabled"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 0.--1. "NUM_OF_COMPONENT_MINUS1,Number of components minus 1." "0,1,2,3"
line.long 0x4 "ISPCORE_DMA_IMAGE0_FRAME1_PIXEL_POSITION_0,"
hexmask.long.byte 0x4 24.--31. 1. "LSB_COMP3,Bit position of LSB bit of pixel in the output image component3"
newline
hexmask.long.byte 0x4 16.--23. 1. "LSB_COMP2,Bit position of LSB bit of pixel in the output image component2"
newline
hexmask.long.byte 0x4 8.--15. 1. "LSB_COMP1,Bit position of LSB bit of pixel in the output image component1"
newline
hexmask.long.byte 0x4 0.--7. 1. "LSB_COMP0,Bit position of LSB bit of pixel in the output image component0"
line.long 0x8 "ISPCORE_DMA_IMAGE0_FRAME1_PIXEL_BITWIDTH_MINUS1_0,"
rbitfld.long 0x8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 24.--29. 1. "BW_MINUS1_COMP3,Bit width minus 1 of pixel in the output image component 3"
newline
rbitfld.long 0x8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 16.--21. 1. "BW_MINUS1_COMP2,Bit width minus 1 of pixel in the output image component 2"
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 8.--13. 1. "BW_MINUS1_COMP1,Bit width minus 1 of pixel in the output image component 1"
newline
rbitfld.long 0x8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 0.--5. 1. "BW_MINUS1_COMP0,Bit width minus 1 of pixel in the output image component 0"
line.long 0xC "ISPCORE_DMA_IMAGE0_FRAME1_PIXEL_BPP_0,"
rbitfld.long 0xC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 28.--29. "LINE_EN_COMP3,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 3." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 26.--27. "Reserved_26,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 24.--25. "BPP_COMP3,Bit per pixel of output image component 3" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 20.--21. "LINE_EN_COMP2,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 2." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 18.--19. "Reserved_18,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 16.--17. "BPP_COMP2,Bit per pixel of output image component 2" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 12.--13. "LINE_EN_COMP1,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 1." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 10.--11. "Reserved_10,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 8.--9. "BPP_COMP1,Bit per pixel of output image component 1" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 4.--5. "LINE_EN_COMP0,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 0." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 2.--3. "Reserved_2,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 0.--1. "BPP_COMP0,Bit per pixel of output image component 0" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
line.long 0x10 "ISPCORE_DMA_IMAGE0_FRAME1_BASE_ADDRESS_COMP0_0,"
hexmask.long 0x10 0.--31. 1. "BASE_ADDRESS_COMP0,Start address ot output image component 0"
line.long 0x14 "ISPCORE_DMA_IMAGE0_FRAME1_BASE_ADDRESS_COMP1_0,"
hexmask.long 0x14 0.--31. 1. "BASE_ADDRESS_COMP1,Start address ot output image component 1"
line.long 0x18 "ISPCORE_DMA_IMAGE0_FRAME1_BASE_ADDRESS_COMP2_0,"
hexmask.long 0x18 0.--31. 1. "BASE_ADDRESS_COMP2,Start address ot output image component 2"
line.long 0x1C "ISPCORE_DMA_IMAGE0_FRAME1_BASE_ADDRESS_COMP3_0,"
hexmask.long 0x1C 0.--31. 1. "BASE_ADDRESS_COMP3,Start address ot output image component 3"
line.long 0x20 "ISPCORE_DMA_IMAGE0_FRAME1_STRIDE_COMP0_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "STRIDE_COMP0,Stride (line offset) of output image component 0. Unit is byte"
line.long 0x24 "ISPCORE_DMA_IMAGE0_FRAME1_STRIDE_COMP1_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "STRIDE_COMP1,Stride (line offset) of output image component 1. Unit is byte"
line.long 0x28 "ISPCORE_DMA_IMAGE0_FRAME1_STRIDE_COMP2_0,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x28 0.--15. 1. "STRIDE_COMP2,Stride (line offset) of output image component 2. Unit is byte"
line.long 0x2C "ISPCORE_DMA_IMAGE0_FRAME1_STRIDE_COMP3_0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x2C 0.--15. 1. "STRIDE_COMP3,Stride (line offset) of output image component 3. Unit is byte"
line.long 0x30 "ISPCORE_DMA_IMAGE0_FRAME1_AXI_ID_0,"
hexmask.long.byte 0x30 24.--31. 1. "AXI_ID_COMP3,AXI transaction ID of output image component 3"
newline
hexmask.long.byte 0x30 16.--23. 1. "AXI_ID_COMP2,AXI transaction ID of output image component 2"
newline
hexmask.long.byte 0x30 8.--15. 1. "AXI_ID_COMP1,AXI transaction ID of output image component 1"
newline
hexmask.long.byte 0x30 0.--7. 1. "AXI_ID_COMP0,AXI transaction ID of output image component 0"
group.long 0x84200++0x33
line.long 0x0 "ISPCORE_DMA_IMAGE0_FRAME2_MODE_0,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 16. "ENABLE_WUP,On/OFF control whether WUP signal is issued in synchronized system with IMR" "0: WUP signal is disabled,1: WUP signal is enabled"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 0.--1. "NUM_OF_COMPONENT_MINUS1,Number of components minus 1." "0,1,2,3"
line.long 0x4 "ISPCORE_DMA_IMAGE0_FRAME2_PIXEL_POSITION_0,"
hexmask.long.byte 0x4 24.--31. 1. "LSB_COMP3,Bit position of LSB bit of pixel in the output image component3"
newline
hexmask.long.byte 0x4 16.--23. 1. "LSB_COMP2,Bit position of LSB bit of pixel in the output image component2"
newline
hexmask.long.byte 0x4 8.--15. 1. "LSB_COMP1,Bit position of LSB bit of pixel in the output image component1"
newline
hexmask.long.byte 0x4 0.--7. 1. "LSB_COMP0,Bit position of LSB bit of pixel in the output image component0"
line.long 0x8 "ISPCORE_DMA_IMAGE0_FRAME2_PIXEL_BITWIDTH_MINUS1_0,"
rbitfld.long 0x8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 24.--29. 1. "BW_MINUS1_COMP3,Bit width minus 1 of pixel in the output image component 3"
newline
rbitfld.long 0x8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 16.--21. 1. "BW_MINUS1_COMP2,Bit width minus 1 of pixel in the output image component 2"
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 8.--13. 1. "BW_MINUS1_COMP1,Bit width minus 1 of pixel in the output image component 1"
newline
rbitfld.long 0x8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 0.--5. 1. "BW_MINUS1_COMP0,Bit width minus 1 of pixel in the output image component 0"
line.long 0xC "ISPCORE_DMA_IMAGE0_FRAME2_PIXEL_BPP_0,"
rbitfld.long 0xC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 28.--29. "LINE_EN_COMP3,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 3." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 26.--27. "Reserved_26,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 24.--25. "BPP_COMP3,Bit per pixel of output image component 3" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 20.--21. "LINE_EN_COMP2,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 2." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 18.--19. "Reserved_18,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 16.--17. "BPP_COMP2,Bit per pixel of output image component 2" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 12.--13. "LINE_EN_COMP1,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 1." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 10.--11. "Reserved_10,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 8.--9. "BPP_COMP1,Bit per pixel of output image component 1" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 4.--5. "LINE_EN_COMP0,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 0." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 2.--3. "Reserved_2,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 0.--1. "BPP_COMP0,Bit per pixel of output image component 0" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
line.long 0x10 "ISPCORE_DMA_IMAGE0_FRAME2_BASE_ADDRESS_COMP0_0,"
hexmask.long 0x10 0.--31. 1. "BASE_ADDRESS_COMP0,Start address ot output image component 0"
line.long 0x14 "ISPCORE_DMA_IMAGE0_FRAME2_BASE_ADDRESS_COMP1_0,"
hexmask.long 0x14 0.--31. 1. "BASE_ADDRESS_COMP1,Start address ot output image component 1"
line.long 0x18 "ISPCORE_DMA_IMAGE0_FRAME2_BASE_ADDRESS_COMP2_0,"
hexmask.long 0x18 0.--31. 1. "BASE_ADDRESS_COMP2,Start address ot output image component 2"
line.long 0x1C "ISPCORE_DMA_IMAGE0_FRAME2_BASE_ADDRESS_COMP3_0,"
hexmask.long 0x1C 0.--31. 1. "BASE_ADDRESS_COMP3,Start address ot output image component 3"
line.long 0x20 "ISPCORE_DMA_IMAGE0_FRAME2_STRIDE_COMP0_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "STRIDE_COMP0,Stride (line offset) of output image component 0. Unit is byte"
line.long 0x24 "ISPCORE_DMA_IMAGE0_FRAME2_STRIDE_COMP1_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "STRIDE_COMP1,Stride (line offset) of output image component 1. Unit is byte"
line.long 0x28 "ISPCORE_DMA_IMAGE0_FRAME2_STRIDE_COMP2_0,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x28 0.--15. 1. "STRIDE_COMP2,Stride (line offset) of output image component 2. Unit is byte"
line.long 0x2C "ISPCORE_DMA_IMAGE0_FRAME2_STRIDE_COMP3_0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x2C 0.--15. 1. "STRIDE_COMP3,Stride (line offset) of output image component 3. Unit is byte"
line.long 0x30 "ISPCORE_DMA_IMAGE0_FRAME2_AXI_ID_0,"
hexmask.long.byte 0x30 24.--31. 1. "AXI_ID_COMP3,AXI transaction ID of output image component 3"
newline
hexmask.long.byte 0x30 16.--23. 1. "AXI_ID_COMP2,AXI transaction ID of output image component 2"
newline
hexmask.long.byte 0x30 8.--15. 1. "AXI_ID_COMP1,AXI transaction ID of output image component 1"
newline
hexmask.long.byte 0x30 0.--7. 1. "AXI_ID_COMP0,AXI transaction ID of output image component 0"
group.long 0x84300++0x33
line.long 0x0 "ISPCORE_DMA_IMAGE0_FRAME3_MODE_0,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 16. "ENABLE_WUP,On/OFF control whether WUP signal is issued in synchronized system with IMR" "0: WUP signal is disabled,1: WUP signal is enabled"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 0.--1. "NUM_OF_COMPONENT_MINUS1,Number of components minus 1." "0,1,2,3"
line.long 0x4 "ISPCORE_DMA_IMAGE0_FRAME3_PIXEL_POSITION_0,"
hexmask.long.byte 0x4 24.--31. 1. "LSB_COMP3,Bit position of LSB bit of pixel in the output image component3"
newline
hexmask.long.byte 0x4 16.--23. 1. "LSB_COMP2,Bit position of LSB bit of pixel in the output image component2"
newline
hexmask.long.byte 0x4 8.--15. 1. "LSB_COMP1,Bit position of LSB bit of pixel in the output image component1"
newline
hexmask.long.byte 0x4 0.--7. 1. "LSB_COMP0,Bit position of LSB bit of pixel in the output image component0"
line.long 0x8 "ISPCORE_DMA_IMAGE0_FRAME3_PIXEL_BITWIDTH_MINUS1_0,"
rbitfld.long 0x8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 24.--29. 1. "BW_MINUS1_COMP3,Bit width minus 1 of pixel in the output image component 3"
newline
rbitfld.long 0x8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 16.--21. 1. "BW_MINUS1_COMP2,Bit width minus 1 of pixel in the output image component 2"
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 8.--13. 1. "BW_MINUS1_COMP1,Bit width minus 1 of pixel in the output image component 1"
newline
rbitfld.long 0x8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 0.--5. 1. "BW_MINUS1_COMP0,Bit width minus 1 of pixel in the output image component 0"
line.long 0xC "ISPCORE_DMA_IMAGE0_FRAME3_PIXEL_BPP_0,"
rbitfld.long 0xC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 28.--29. "LINE_EN_COMP3,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 3." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 26.--27. "Reserved_26,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 24.--25. "BPP_COMP3,Bit per pixel of output image component 3" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 20.--21. "LINE_EN_COMP2,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 2." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 18.--19. "Reserved_18,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 16.--17. "BPP_COMP2,Bit per pixel of output image component 2" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 12.--13. "LINE_EN_COMP1,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 1." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 10.--11. "Reserved_10,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 8.--9. "BPP_COMP1,Bit per pixel of output image component 1" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 4.--5. "LINE_EN_COMP0,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 0." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 2.--3. "Reserved_2,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 0.--1. "BPP_COMP0,Bit per pixel of output image component 0" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
line.long 0x10 "ISPCORE_DMA_IMAGE0_FRAME3_BASE_ADDRESS_COMP0_0,"
hexmask.long 0x10 0.--31. 1. "BASE_ADDRESS_COMP0,Start address ot output image component 0"
line.long 0x14 "ISPCORE_DMA_IMAGE0_FRAME3_BASE_ADDRESS_COMP1_0,"
hexmask.long 0x14 0.--31. 1. "BASE_ADDRESS_COMP1,Start address ot output image component 1"
line.long 0x18 "ISPCORE_DMA_IMAGE0_FRAME3_BASE_ADDRESS_COMP2_0,"
hexmask.long 0x18 0.--31. 1. "BASE_ADDRESS_COMP2,Start address ot output image component 2"
line.long 0x1C "ISPCORE_DMA_IMAGE0_FRAME3_BASE_ADDRESS_COMP3_0,"
hexmask.long 0x1C 0.--31. 1. "BASE_ADDRESS_COMP3,Start address ot output image component 3"
line.long 0x20 "ISPCORE_DMA_IMAGE0_FRAME3_STRIDE_COMP0_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "STRIDE_COMP0,Stride (line offset) of output image component 0. Unit is byte"
line.long 0x24 "ISPCORE_DMA_IMAGE0_FRAME3_STRIDE_COMP1_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "STRIDE_COMP1,Stride (line offset) of output image component 1. Unit is byte"
line.long 0x28 "ISPCORE_DMA_IMAGE0_FRAME3_STRIDE_COMP2_0,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x28 0.--15. 1. "STRIDE_COMP2,Stride (line offset) of output image component 2. Unit is byte"
line.long 0x2C "ISPCORE_DMA_IMAGE0_FRAME3_STRIDE_COMP3_0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x2C 0.--15. 1. "STRIDE_COMP3,Stride (line offset) of output image component 3. Unit is byte"
line.long 0x30 "ISPCORE_DMA_IMAGE0_FRAME3_AXI_ID_0,"
hexmask.long.byte 0x30 24.--31. 1. "AXI_ID_COMP3,AXI transaction ID of output image component 3"
newline
hexmask.long.byte 0x30 16.--23. 1. "AXI_ID_COMP2,AXI transaction ID of output image component 2"
newline
hexmask.long.byte 0x30 8.--15. 1. "AXI_ID_COMP1,AXI transaction ID of output image component 1"
newline
hexmask.long.byte 0x30 0.--7. 1. "AXI_ID_COMP0,AXI transaction ID of output image component 0"
group.long 0x84400++0x3
line.long 0x0 "ISPCORE_DMA_IMAGE0_FLUSH_OUT_0,"
hexmask.long.word 0x0 16.--31. 1. "PADDING_PIXEL_EOF,Number of pixels to be appended in the end of frame for flushing out the remained data of ISP output image in DMA pipeline."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved bits. Do not write any different value from its initial value."
group.long 0x84500++0x13
line.long 0x0 "ISPCORE_DMA_HISTOGRAM_BASE_ADDRESS_FRAME0_0,"
hexmask.long 0x0 0.--31. 1. "BASE_ADDRESS_HISTOGRAM0,Start Address of histogram data(frame 0 4 8...)"
line.long 0x4 "ISPCORE_DMA_HISTOGRAM_BASE_ADDRESS_FRAME1_0,"
hexmask.long 0x4 0.--31. 1. "BASE_ADDRESS_HISTOGRAM1,Start Address of histogram data(frame 1 5 9...)"
line.long 0x8 "ISPCORE_DMA_HISTOGRAM_BASE_ADDRESS_FRAME2_0,"
hexmask.long 0x8 0.--31. 1. "BASE_ADDRESS_HISTOGRAM2,Start Address of histogram data(frame 2 6 10...)"
line.long 0xC "ISPCORE_DMA_HISTOGRAM_BASE_ADDRESS_FRAME3_0,"
hexmask.long 0xC 0.--31. 1. "BASE_ADDRESS_HISTOGRAM3,Start Address of histogram data(frame 3 7 11...)"
line.long 0x10 "ISPCORE_DMA_HISTOGAM_AXI_ID_0,"
hexmask.long.byte 0x10 24.--31. 1. "AXI_ID_HIST_FRAME3,AXI transaction ID of histogram data (frame 3 7 11...)"
newline
hexmask.long.byte 0x10 16.--23. 1. "AXI_ID_HIST_FRAME2,AXI transaction ID of histogram data (frame 2 6 10...)"
newline
hexmask.long.byte 0x10 8.--15. 1. "AXI_ID_HIST_FRAME1,AXI transaction ID of histogram data (frame 1 5 9...)"
newline
hexmask.long.byte 0x10 0.--7. 1. "AXI_ID_HIST_FRAME0,AXI transaction ID of histogram data (frame 0 4 8...)"
group.long 0x84800++0x7
line.long 0x0 "ISPCORE_DMA_IMAGE0_AXI_CONFIG_0,"
bitfld.long 0x0 31. "DMA_ENABLE,Enabling image output DMA" "0: Disabled [default],1: Enabled"
newline
hexmask.long.tbyte 0x0 14.--30. 1. "Reserved_14,Reserved bits. Do not write any different value from its initial value."
newline
hexmask.long.byte 0x0 8.--13. 1. "OUTSTANDING,Maximum number of out standing count of AXI write transaction. Minus 1 value is set to this register"
newline
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved bits. Do not write any different value from its initial value."
newline
hexmask.long.byte 0x0 0.--3. 1. "BURST_LENGTH_MINUS1,Burst length of AXI write data transaction. Minus 1 value is set to this register"
line.long 0x4 "ISPCORE_WUP_CONFIG_0,"
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved bits. Do not write any different value from its initial value."
newline
bitfld.long 0x4 24.--26. "WUP_PULSE_LENGTH_MINUS1,Pulse length of WUP signal in synchronized system with IMR" "0,1,2,3,4,5,6,7"
newline
hexmask.long.tbyte 0x4 0.--23. 1. "Reserved_0,Reserved bits. Do not write any different value from its initial value."
group.long 0x84810++0xF
line.long 0x0 "ISPCORE_WUP_POS0_0,"
hexmask.long.word 0x0 16.--31. 1. "WUP_POS_Y0,Vertical coordinate of pixel which issues the WUP signal"
newline
hexmask.long.word 0x0 0.--15. 1. "WUP_POS_X0,Horizontal coordinate of pixel which issues the WUP signal"
line.long 0x4 "ISPCORE_WUP_POS1_0,"
hexmask.long.word 0x4 16.--31. 1. "WUP_POS_Y1,Vertical coordinate of pixel which issues the WUP signal"
newline
hexmask.long.word 0x4 0.--15. 1. "WUP_POS_X1,Horizontal coordinate of pixel which issues the WUP signal"
line.long 0x8 "ISPCORE_WUP_POS2_0,"
hexmask.long.word 0x8 16.--31. 1. "WUP_POS_Y2,Vertical coordinate of pixel which issues the WUP signal"
newline
hexmask.long.word 0x8 0.--15. 1. "WUP_POS_X2,Horizontal coordinate of pixel which issues the WUP signal"
line.long 0xC "ISPCORE_WUP_POS3_0,"
hexmask.long.word 0xC 16.--31. 1. "WUP_POS_Y3,Vertical coordinate of pixel which issues the WUP signal"
newline
hexmask.long.word 0xC 0.--15. 1. "WUP_POS_X3,Horizontal coordinate of pixel which issues the WUP signal"
rgroup.long 0x8490C++0x3
line.long 0x0 "ISPCORE_DMA_IMAGE0_FRAME_MONITOR_0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x0 0.--3. 1. "FRAME_COUNT,Frame count value. Incremented at frame by frame. Wrap around to H'0 after H'F"
group.long 0x85000++0x33
line.long 0x0 "ISPCORE_DMA_IMAGE1_FRAME0_MODE_0,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 16. "ENABLE_WUP,On/OFF control whether WUP signal is issued in synchronized system with IMR" "0: WUP signal is disabled,1: WUP signal is enabled"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 0.--1. "NUM_OF_COMPONENT_MINUS1,Number of components minus 1." "0,1,2,3"
line.long 0x4 "ISPCORE_DMA_IMAGE1_FRAME0_PIXEL_POSITION_0,"
hexmask.long.byte 0x4 24.--31. 1. "LSB_COMP3,Bit position of LSB bit of pixel in the output image component3"
newline
hexmask.long.byte 0x4 16.--23. 1. "LSB_COMP2,Bit position of LSB bit of pixel in the output image component2"
newline
hexmask.long.byte 0x4 8.--15. 1. "LSB_COMP1,Bit position of LSB bit of pixel in the output image component1"
newline
hexmask.long.byte 0x4 0.--7. 1. "LSB_COMP0,Bit position of LSB bit of pixel in the output image component0"
line.long 0x8 "ISPCORE_DMA_IMAGE1_FRAME0_PIXEL_BITWIDTH_MINUS1_0,"
rbitfld.long 0x8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 24.--29. 1. "BW_MINUS1_COMP3,Bit width minus 1 of pixel in the output image component 3"
newline
rbitfld.long 0x8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 16.--21. 1. "BW_MINUS1_COMP2,Bit width minus 1 of pixel in the output image component 2"
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 8.--13. 1. "BW_MINUS1_COMP1,Bit width minus 1 of pixel in the output image component 1"
newline
rbitfld.long 0x8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 0.--5. 1. "BW_MINUS1_COMP0,Bit width minus 1 of pixel in the output image component 0"
line.long 0xC "ISPCORE_DMA_IMAGE1_FRAME0_PIXEL_BPP_0,"
rbitfld.long 0xC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 28.--29. "LINE_EN_COMP3,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 3." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 26.--27. "Reserved_26,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 24.--25. "BPP_COMP3,Bit per pixel of output image component 3" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 20.--21. "LINE_EN_COMP2,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 2." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 18.--19. "Reserved_18,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 16.--17. "BPP_COMP2,Bit per pixel of output image component 2" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 12.--13. "LINE_EN_COMP1,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 1." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 10.--11. "Reserved_10,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 8.--9. "BPP_COMP1,Bit per pixel of output image component 1" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 4.--5. "LINE_EN_COMP0,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 0." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 2.--3. "Reserved_2,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 0.--1. "BPP_COMP0,Bit per pixel of output image component 0" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
line.long 0x10 "ISPCORE_DMA_IMAGE1_FRAME0_BASE_ADDRESS_COMP0_0,"
hexmask.long 0x10 0.--31. 1. "BASE_ADDRESS_COMP0,Start address ot output image component 0"
line.long 0x14 "ISPCORE_DMA_IMAGE1_FRAME0_BASE_ADDRESS_COMP1_0,"
hexmask.long 0x14 0.--31. 1. "BASE_ADDRESS_COMP1,Start address ot output image component 1"
line.long 0x18 "ISPCORE_DMA_IMAGE1_FRAME0_BASE_ADDRESS_COMP2_0,"
hexmask.long 0x18 0.--31. 1. "BASE_ADDRESS_COMP2,Start address ot output image component 2"
line.long 0x1C "ISPCORE_DMA_IMAGE1_FRAME0_BASE_ADDRESS_COMP3_0,"
hexmask.long 0x1C 0.--31. 1. "BASE_ADDRESS_COMP3,Start address ot output image component 3"
line.long 0x20 "ISPCORE_DMA_IMAGE1_FRAME0_STRIDE_COMP0_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "STRIDE_COMP0,Stride (line offset) of output image component 0. Unit is byte"
line.long 0x24 "ISPCORE_DMA_IMAGE1_FRAME0_STRIDE_COMP1_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "STRIDE_COMP1,Stride (line offset) of output image component 1. Unit is byte"
line.long 0x28 "ISPCORE_DMA_IMAGE1_FRAME0_STRIDE_COMP2_0,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x28 0.--15. 1. "STRIDE_COMP2,Stride (line offset) of output image component 2. Unit is byte"
line.long 0x2C "ISPCORE_DMA_IMAGE1_FRAME0_STRIDE_COMP3_0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x2C 0.--15. 1. "STRIDE_COMP3,Stride (line offset) of output image component 3. Unit is byte"
line.long 0x30 "ISPCORE_DMA_IMAGE1_FRAME0_AXI_ID_0,"
hexmask.long.byte 0x30 24.--31. 1. "AXI_ID_COMP3,AXI transaction ID of output image component 3"
newline
hexmask.long.byte 0x30 16.--23. 1. "AXI_ID_COMP2,AXI transaction ID of output image component 2"
newline
hexmask.long.byte 0x30 8.--15. 1. "AXI_ID_COMP1,AXI transaction ID of output image component 1"
newline
hexmask.long.byte 0x30 0.--7. 1. "AXI_ID_COMP0,AXI transaction ID of output image component 0"
group.long 0x85100++0x33
line.long 0x0 "ISPCORE_DMA_IMAGE1_FRAME1_MODE_0,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 16. "ENABLE_WUP,On/OFF control whether WUP signal is issued in synchronized system with IMR" "0: WUP signal is disabled,1: WUP signal is enabled"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 0.--1. "NUM_OF_COMPONENT_MINUS1,Number of components minus 1." "0,1,2,3"
line.long 0x4 "ISPCORE_DMA_IMAGE1_FRAME1_PIXEL_POSITION_0,"
hexmask.long.byte 0x4 24.--31. 1. "LSB_COMP3,Bit position of LSB bit of pixel in the output image component3"
newline
hexmask.long.byte 0x4 16.--23. 1. "LSB_COMP2,Bit position of LSB bit of pixel in the output image component2"
newline
hexmask.long.byte 0x4 8.--15. 1. "LSB_COMP1,Bit position of LSB bit of pixel in the output image component1"
newline
hexmask.long.byte 0x4 0.--7. 1. "LSB_COMP0,Bit position of LSB bit of pixel in the output image component0"
line.long 0x8 "ISPCORE_DMA_IMAGE1_FRAME1_PIXEL_BITWIDTH_MINUS1_0,"
rbitfld.long 0x8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 24.--29. 1. "BW_MINUS1_COMP3,Bit width minus 1 of pixel in the output image component 3"
newline
rbitfld.long 0x8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 16.--21. 1. "BW_MINUS1_COMP2,Bit width minus 1 of pixel in the output image component 2"
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 8.--13. 1. "BW_MINUS1_COMP1,Bit width minus 1 of pixel in the output image component 1"
newline
rbitfld.long 0x8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 0.--5. 1. "BW_MINUS1_COMP0,Bit width minus 1 of pixel in the output image component 0"
line.long 0xC "ISPCORE_DMA_IMAGE1_FRAME1_PIXEL_BPP_0,"
rbitfld.long 0xC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 28.--29. "LINE_EN_COMP3,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 3." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 26.--27. "Reserved_26,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 24.--25. "BPP_COMP3,Bit per pixel of output image component 3" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 20.--21. "LINE_EN_COMP2,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 2." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 18.--19. "Reserved_18,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 16.--17. "BPP_COMP2,Bit per pixel of output image component 2" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 12.--13. "LINE_EN_COMP1,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 1." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 10.--11. "Reserved_10,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 8.--9. "BPP_COMP1,Bit per pixel of output image component 1" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 4.--5. "LINE_EN_COMP0,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 0." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 2.--3. "Reserved_2,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 0.--1. "BPP_COMP0,Bit per pixel of output image component 0" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
line.long 0x10 "ISPCORE_DMA_IMAGE1_FRAME1_BASE_ADDRESS_COMP0_0,"
hexmask.long 0x10 0.--31. 1. "BASE_ADDRESS_COMP0,Start address ot output image component 0"
line.long 0x14 "ISPCORE_DMA_IMAGE1_FRAME1_BASE_ADDRESS_COMP1_0,"
hexmask.long 0x14 0.--31. 1. "BASE_ADDRESS_COMP1,Start address ot output image component 1"
line.long 0x18 "ISPCORE_DMA_IMAGE1_FRAME1_BASE_ADDRESS_COMP2_0,"
hexmask.long 0x18 0.--31. 1. "BASE_ADDRESS_COMP2,Start address ot output image component 2"
line.long 0x1C "ISPCORE_DMA_IMAGE1_FRAME1_BASE_ADDRESS_COMP3_0,"
hexmask.long 0x1C 0.--31. 1. "BASE_ADDRESS_COMP3,Start address ot output image component 3"
line.long 0x20 "ISPCORE_DMA_IMAGE1_FRAME1_STRIDE_COMP0_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "STRIDE_COMP0,Stride (line offset) of output image component 0. Unit is byte"
line.long 0x24 "ISPCORE_DMA_IMAGE1_FRAME1_STRIDE_COMP1_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "STRIDE_COMP1,Stride (line offset) of output image component 1. Unit is byte"
line.long 0x28 "ISPCORE_DMA_IMAGE1_FRAME1_STRIDE_COMP2_0,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x28 0.--15. 1. "STRIDE_COMP2,Stride (line offset) of output image component 2. Unit is byte"
line.long 0x2C "ISPCORE_DMA_IMAGE1_FRAME1_STRIDE_COMP3_0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x2C 0.--15. 1. "STRIDE_COMP3,Stride (line offset) of output image component 3. Unit is byte"
line.long 0x30 "ISPCORE_DMA_IMAGE1_FRAME1_AXI_ID_0,"
hexmask.long.byte 0x30 24.--31. 1. "AXI_ID_COMP3,AXI transaction ID of output image component 3"
newline
hexmask.long.byte 0x30 16.--23. 1. "AXI_ID_COMP2,AXI transaction ID of output image component 2"
newline
hexmask.long.byte 0x30 8.--15. 1. "AXI_ID_COMP1,AXI transaction ID of output image component 1"
newline
hexmask.long.byte 0x30 0.--7. 1. "AXI_ID_COMP0,AXI transaction ID of output image component 0"
group.long 0x85200++0x33
line.long 0x0 "ISPCORE_DMA_IMAGE1_FRAME2_MODE_0,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 16. "ENABLE_WUP,On/OFF control whether WUP signal is issued in synchronized system with IMR" "0: WUP signal is disabled,1: WUP signal is enabled"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 0.--1. "NUM_OF_COMPONENT_MINUS1,Number of components minus 1." "0,1,2,3"
line.long 0x4 "ISPCORE_DMA_IMAGE1_FRAME2_PIXEL_POSITION_0,"
hexmask.long.byte 0x4 24.--31. 1. "LSB_COMP3,Bit position of LSB bit of pixel in the output image component3"
newline
hexmask.long.byte 0x4 16.--23. 1. "LSB_COMP2,Bit position of LSB bit of pixel in the output image component2"
newline
hexmask.long.byte 0x4 8.--15. 1. "LSB_COMP1,Bit position of LSB bit of pixel in the output image component1"
newline
hexmask.long.byte 0x4 0.--7. 1. "LSB_COMP0,Bit position of LSB bit of pixel in the output image component0"
line.long 0x8 "ISPCORE_DMA_IMAGE1_FRAME2_PIXEL_BITWIDTH_MINUS1_0,"
rbitfld.long 0x8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 24.--29. 1. "BW_MINUS1_COMP3,Bit width minus 1 of pixel in the output image component 3"
newline
rbitfld.long 0x8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 16.--21. 1. "BW_MINUS1_COMP2,Bit width minus 1 of pixel in the output image component 2"
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 8.--13. 1. "BW_MINUS1_COMP1,Bit width minus 1 of pixel in the output image component 1"
newline
rbitfld.long 0x8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 0.--5. 1. "BW_MINUS1_COMP0,Bit width minus 1 of pixel in the output image component 0"
line.long 0xC "ISPCORE_DMA_IMAGE1_FRAME2_PIXEL_BPP_0,"
rbitfld.long 0xC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 28.--29. "LINE_EN_COMP3,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 3." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 26.--27. "Reserved_26,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 24.--25. "BPP_COMP3,Bit per pixel of output image component 3" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 20.--21. "LINE_EN_COMP2,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 2." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 18.--19. "Reserved_18,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 16.--17. "BPP_COMP2,Bit per pixel of output image component 2" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 12.--13. "LINE_EN_COMP1,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 1." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 10.--11. "Reserved_10,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 8.--9. "BPP_COMP1,Bit per pixel of output image component 1" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 4.--5. "LINE_EN_COMP0,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 0." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 2.--3. "Reserved_2,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 0.--1. "BPP_COMP0,Bit per pixel of output image component 0" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
line.long 0x10 "ISPCORE_DMA_IMAGE1_FRAME2_BASE_ADDRESS_COMP0_0,"
hexmask.long 0x10 0.--31. 1. "BASE_ADDRESS_COMP0,Start address ot output image component 0"
line.long 0x14 "ISPCORE_DMA_IMAGE1_FRAME2_BASE_ADDRESS_COMP1_0,"
hexmask.long 0x14 0.--31. 1. "BASE_ADDRESS_COMP1,Start address ot output image component 1"
line.long 0x18 "ISPCORE_DMA_IMAGE1_FRAME2_BASE_ADDRESS_COMP2_0,"
hexmask.long 0x18 0.--31. 1. "BASE_ADDRESS_COMP2,Start address ot output image component 2"
line.long 0x1C "ISPCORE_DMA_IMAGE1_FRAME2_BASE_ADDRESS_COMP3_0,"
hexmask.long 0x1C 0.--31. 1. "BASE_ADDRESS_COMP3,Start address ot output image component 3"
line.long 0x20 "ISPCORE_DMA_IMAGE1_FRAME2_STRIDE_COMP0_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "STRIDE_COMP0,Stride (line offset) of output image component 0. Unit is byte"
line.long 0x24 "ISPCORE_DMA_IMAGE1_FRAME2_STRIDE_COMP1_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "STRIDE_COMP1,Stride (line offset) of output image component 1. Unit is byte"
line.long 0x28 "ISPCORE_DMA_IMAGE1_FRAME2_STRIDE_COMP2_0,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x28 0.--15. 1. "STRIDE_COMP2,Stride (line offset) of output image component 2. Unit is byte"
line.long 0x2C "ISPCORE_DMA_IMAGE1_FRAME2_STRIDE_COMP3_0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x2C 0.--15. 1. "STRIDE_COMP3,Stride (line offset) of output image component 3. Unit is byte"
line.long 0x30 "ISPCORE_DMA_IMAGE1_FRAME2_AXI_ID_0,"
hexmask.long.byte 0x30 24.--31. 1. "AXI_ID_COMP3,AXI transaction ID of output image component 3"
newline
hexmask.long.byte 0x30 16.--23. 1. "AXI_ID_COMP2,AXI transaction ID of output image component 2"
newline
hexmask.long.byte 0x30 8.--15. 1. "AXI_ID_COMP1,AXI transaction ID of output image component 1"
newline
hexmask.long.byte 0x30 0.--7. 1. "AXI_ID_COMP0,AXI transaction ID of output image component 0"
group.long 0x85300++0x33
line.long 0x0 "ISPCORE_DMA_IMAGE1_FRAME3_MODE_0,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 16. "ENABLE_WUP,On/OFF control whether WUP signal is issued in synchronized system with IMR" "0: WUP signal is disabled,1: WUP signal is enabled"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 0.--1. "NUM_OF_COMPONENT_MINUS1,Number of components minus 1." "0,1,2,3"
line.long 0x4 "ISPCORE_DMA_IMAGE1_FRAME3_PIXEL_POSITION_0,"
hexmask.long.byte 0x4 24.--31. 1. "LSB_COMP3,Bit position of LSB bit of pixel in the output image component3"
newline
hexmask.long.byte 0x4 16.--23. 1. "LSB_COMP2,Bit position of LSB bit of pixel in the output image component2"
newline
hexmask.long.byte 0x4 8.--15. 1. "LSB_COMP1,Bit position of LSB bit of pixel in the output image component1"
newline
hexmask.long.byte 0x4 0.--7. 1. "LSB_COMP0,Bit position of LSB bit of pixel in the output image component0"
line.long 0x8 "ISPCORE_DMA_IMAGE1_FRAME3_PIXEL_BITWIDTH_MINUS1_0,"
rbitfld.long 0x8 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 24.--29. 1. "BW_MINUS1_COMP3,Bit width minus 1 of pixel in the output image component 3"
newline
rbitfld.long 0x8 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 16.--21. 1. "BW_MINUS1_COMP2,Bit width minus 1 of pixel in the output image component 2"
newline
rbitfld.long 0x8 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 8.--13. 1. "BW_MINUS1_COMP1,Bit width minus 1 of pixel in the output image component 1"
newline
rbitfld.long 0x8 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
hexmask.long.byte 0x8 0.--5. 1. "BW_MINUS1_COMP0,Bit width minus 1 of pixel in the output image component 0"
line.long 0xC "ISPCORE_DMA_IMAGE1_FRAME3_PIXEL_BPP_0,"
rbitfld.long 0xC 30.--31. "Reserved_30,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 28.--29. "LINE_EN_COMP3,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 3." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 26.--27. "Reserved_26,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 24.--25. "BPP_COMP3,Bit per pixel of output image component 3" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 22.--23. "Reserved_22,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 20.--21. "LINE_EN_COMP2,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 2." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 18.--19. "Reserved_18,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 16.--17. "BPP_COMP2,Bit per pixel of output image component 2" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 14.--15. "Reserved_14,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 12.--13. "LINE_EN_COMP1,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 1." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 10.--11. "Reserved_10,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 8.--9. "BPP_COMP1,Bit per pixel of output image component 1" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
newline
rbitfld.long 0xC 6.--7. "Reserved_6,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 4.--5. "LINE_EN_COMP0,Flags for ON/OFF control of output for each even/odd line of a frame for the output image component 0." "0: All lines are not output to AXI,1: Only the even-numbered lines are output to AXI,2: Only the odd-numbered lines are output to AXI,3: All lines are output to AXI"
newline
rbitfld.long 0xC 2.--3. "Reserved_2,Reserved. (These bits are always read as 0.)" "0,1,2,3"
newline
bitfld.long 0xC 0.--1. "BPP_COMP0,Bit per pixel of output image component 0" "0: 8bpp,1: 16bpp,2: 32bpp,3: Forbidden"
line.long 0x10 "ISPCORE_DMA_IMAGE1_FRAME3_BASE_ADDRESS_COMP0_0,"
hexmask.long 0x10 0.--31. 1. "BASE_ADDRESS_COMP0,Start address ot output image component 0"
line.long 0x14 "ISPCORE_DMA_IMAGE1_FRAME3_BASE_ADDRESS_COMP1_0,"
hexmask.long 0x14 0.--31. 1. "BASE_ADDRESS_COMP1,Start address ot output image component 1"
line.long 0x18 "ISPCORE_DMA_IMAGE1_FRAME3_BASE_ADDRESS_COMP2_0,"
hexmask.long 0x18 0.--31. 1. "BASE_ADDRESS_COMP2,Start address ot output image component 2"
line.long 0x1C "ISPCORE_DMA_IMAGE1_FRAME3_BASE_ADDRESS_COMP3_0,"
hexmask.long 0x1C 0.--31. 1. "BASE_ADDRESS_COMP3,Start address ot output image component 3"
line.long 0x20 "ISPCORE_DMA_IMAGE1_FRAME3_STRIDE_COMP0_0,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x20 0.--15. 1. "STRIDE_COMP0,Stride (line offset) of output image component 0. Unit is byte"
line.long 0x24 "ISPCORE_DMA_IMAGE1_FRAME3_STRIDE_COMP1_0,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x24 0.--15. 1. "STRIDE_COMP1,Stride (line offset) of output image component 1. Unit is byte"
line.long 0x28 "ISPCORE_DMA_IMAGE1_FRAME3_STRIDE_COMP2_0,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x28 0.--15. 1. "STRIDE_COMP2,Stride (line offset) of output image component 2. Unit is byte"
line.long 0x2C "ISPCORE_DMA_IMAGE1_FRAME3_STRIDE_COMP3_0,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.word 0x2C 0.--15. 1. "STRIDE_COMP3,Stride (line offset) of output image component 3. Unit is byte"
line.long 0x30 "ISPCORE_DMA_IMAGE1_FRAME3_AXI_ID_0,"
hexmask.long.byte 0x30 24.--31. 1. "AXI_ID_COMP3,AXI transaction ID of output image component 3"
newline
hexmask.long.byte 0x30 16.--23. 1. "AXI_ID_COMP2,AXI transaction ID of output image component 2"
newline
hexmask.long.byte 0x30 8.--15. 1. "AXI_ID_COMP1,AXI transaction ID of output image component 1"
newline
hexmask.long.byte 0x30 0.--7. 1. "AXI_ID_COMP0,AXI transaction ID of output image component 0"
group.long 0x85400++0x3
line.long 0x0 "ISPCORE_DMA_IMAGE1_FLUSH_OUT_0,"
hexmask.long.word 0x0 16.--31. 1. "PADDING_PIXEL_EOF,Number of pixels to be appended in the end of frame for flushing out the remained data of ISP output image in DMA pipeline."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved bits. Do not write any different value from its initial value."
group.long 0x85800++0x3
line.long 0x0 "ISPCORE_DMA_IMAGE1_AXI_CONFIG_0,"
bitfld.long 0x0 31. "DMA_ENABLE,Enabling image output DMA" "0: Disabled [default],1: Enabled"
newline
hexmask.long.tbyte 0x0 14.--30. 1. "Reserved_14,Reserved bits. Do not write any different value from its initial value."
newline
hexmask.long.byte 0x0 8.--13. 1. "OUTSTANDING,Maximum number of out standing count of AXI write transaction. Minus 1 value is set to this register"
newline
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved bits. Do not write any different value from its initial value."
newline
hexmask.long.byte 0x0 0.--3. 1. "BURST_LENGTH_MINUS1,Burst length of AXI write data transaction. Minus 1 value is set to this register"
rgroup.long 0x8590C++0x3
line.long 0x0 "ISPCORE_DMA_IMAGE1_FRAME_MONITOR_0,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved. (These bits are always read as 0.)"
newline
hexmask.long.byte 0x0 0.--3. 1. "FRAME_COUNT,Frame count value. Incremented at frame by frame. Wrap around to H'0 after H'F"
group.long 0x86010++0x3
line.long 0x0 "ISPCORE_DMA_DPCC0_FRAME0_BASE_ADDRESS_0,"
hexmask.long 0x0 0.--31. 1. "BASE_ADDRESS_DPCC,Start address of defect pixel information"
group.long 0x86110++0x3
line.long 0x0 "ISPCORE_DMA_DPCC0_FRAME1_BASE_ADDRESS_0,"
hexmask.long 0x0 0.--31. 1. "BASE_ADDRESS_DPCC,Start address of defect pixel information"
group.long 0x86210++0x3
line.long 0x0 "ISPCORE_DMA_DPCC0_FRAME2_BASE_ADDRESS_0,"
hexmask.long 0x0 0.--31. 1. "BASE_ADDRESS_DPCC,Start address of defect pixel information"
group.long 0x86310++0x3
line.long 0x0 "ISPCORE_DMA_DPCC0_FRAME3_BASE_ADDRESS_0,"
hexmask.long 0x0 0.--31. 1. "BASE_ADDRESS_DPCC,Start address of defect pixel information"
group.long 0x86400++0x3
line.long 0x0 "ISPCORE_DMA_DPCC0_FLUSH_OUT_0,"
hexmask.long.word 0x0 16.--31. 1. "DPCC_PADDING_EOF,Number of words to be appended in the end of frame for flushing out the remained data of defect pixel information."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved. (These bits are always read as 0.)"
group.long 0x86800++0x3
line.long 0x0 "ISPCORE_DMA_DPCC0_AXI_CONFIG_0,"
bitfld.long 0x0 31. "DMA_ENABLE_DPCC,Enabling defect pixel information DMA" "0: Disabled [default],1: Enabled"
newline
hexmask.long 0x0 4.--30. 1. "Reserved_4,Reserved bits. Do not write any different value from its initial value."
newline
hexmask.long.byte 0x0 0.--3. 1. "BURST_LENGTH_MINUS1_DPCC,Burst length of AXI write data transaction. Minus 1 value is set to this register"
rgroup.long 0x86918++0x3
line.long 0x0 "ISPCORE_DMA_DPCC0_PIXEL_COUNT_0,"
hexmask.long 0x0 0.--31. 1. "DPCC_PIXEL_COUNT,Monitor of the number of detected defect pixel count in previous frame."
group.long 0x8691C++0x3
line.long 0x0 "ISPCORE_DMA_DPCC0_PIXEL_COUNT_MAX_0,"
hexmask.long 0x0 0.--31. 1. "DPCC_PIXEL_COUNT_MAX,Upper limit of number of defect pixel count"
group.long 0x86A80++0x3
line.long 0x0 "ISPCORE_DMA_DPCC0_STATUS_0,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 16. "DPCC_COUNT_OVER,Asserted when number of detected defect pixel count is over than upper limitation specified in ISPCORE_DMA_DPCC[j]_PIXEL_COUNT_MAX register. By writing 0 to this register the status bit ISPCORE_INT_STATUS.DPCC_PIXEL_COUNT_OVER_DPCC[j-1].." "0,1"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved. (These bits are always read as 0.)"
group.long 0x87010++0x3
line.long 0x0 "ISPCORE_DMA_DPCC1_FRAME0_BASE_ADDRESS_0,"
hexmask.long 0x0 0.--31. 1. "BASE_ADDRESS_DPCC,Start address of defect pixel information"
group.long 0x87110++0x3
line.long 0x0 "ISPCORE_DMA_DPCC1_FRAME1_BASE_ADDRESS_0,"
hexmask.long 0x0 0.--31. 1. "BASE_ADDRESS_DPCC,Start address of defect pixel information"
group.long 0x87210++0x3
line.long 0x0 "ISPCORE_DMA_DPCC1_FRAME2_BASE_ADDRESS_0,"
hexmask.long 0x0 0.--31. 1. "BASE_ADDRESS_DPCC,Start address of defect pixel information"
group.long 0x87310++0x3
line.long 0x0 "ISPCORE_DMA_DPCC1_FRAME3_BASE_ADDRESS_0,"
hexmask.long 0x0 0.--31. 1. "BASE_ADDRESS_DPCC,Start address of defect pixel information"
group.long 0x87400++0x3
line.long 0x0 "ISPCORE_DMA_DPCC1_FLUSH_OUT_0,"
hexmask.long.word 0x0 16.--31. 1. "DPCC_PADDING_EOF,Number of words to be appended in the end of frame for flushing out the remained data of defect pixel information."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved. (These bits are always read as 0.)"
group.long 0x87800++0x3
line.long 0x0 "ISPCORE_DMA_DPCC1_AXI_CONFIG_0,"
bitfld.long 0x0 31. "DMA_ENABLE_DPCC,Enabling defect pixel information DMA" "0: Disabled [default],1: Enabled"
newline
hexmask.long 0x0 4.--30. 1. "Reserved_4,Reserved bits. Do not write any different value from its initial value."
newline
hexmask.long.byte 0x0 0.--3. 1. "BURST_LENGTH_MINUS1_DPCC,Burst length of AXI write data transaction. Minus 1 value is set to this register"
rgroup.long 0x87918++0x3
line.long 0x0 "ISPCORE_DMA_DPCC1_PIXEL_COUNT_0,"
hexmask.long 0x0 0.--31. 1. "DPCC_PIXEL_COUNT,Monitor of the number of detected defect pixel count in previous frame."
group.long 0x8791C++0x3
line.long 0x0 "ISPCORE_DMA_DPCC1_PIXEL_COUNT_MAX_0,"
hexmask.long 0x0 0.--31. 1. "DPCC_PIXEL_COUNT_MAX,Upper limit of number of defect pixel count"
group.long 0x87A80++0x3
line.long 0x0 "ISPCORE_DMA_DPCC1_STATUS_0,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved. (These bits are always read as 0.)"
newline
bitfld.long 0x0 16. "DPCC_COUNT_OVER,Asserted when number of detected defect pixel count is over than upper limitation specified in ISPCORE_DMA_DPCC[j]_PIXEL_COUNT_MAX register. By writing 0 to this register the status bit ISPCORE_INT_STATUS.DPCC_PIXEL_COUNT_OVER_DPCC[j-1].." "0,1"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved. (These bits are always read as 0.)"
tree.end
tree.end
tree "iVCP1E (Video Encoding Processor for Inter-Device Video Transfer)"
base ad:0xFEA00000
group.long 0x3A0++0x7
line.long 0x0 "VP_EDC_CTRL,This register controls the behavior of a SRAM EDC checking function and injecting dummy EDC error to test itself."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
bitfld.long 0x0 24. "FERRN,This bit forces the EDC error notification signal (errreq_iv1es_ecc_p) to be asserted." "0: Does not assert EDC error notification signal..,1: Asserts EDC error notification signal forcibly"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "EDCD,This bit specifies the disable flag of EDC checking function." "0: Enables SRAM-EDC checking function,1: Disables SRAM-EDC checking function"
line.long 0x4 "VP_EDC_STA,VP_EDC_STA indicates the status of a SRAM-EDC error. If EDC error occurs. the SRAM-EDC error status bit (EDC bit) is set to 1. iVCP1E issues the error notification signal to the external error controller if the VP_EDC_CTRL.EDCD is 0 and the.."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "EDC,This bit indicates SRAM-EDC error." "0: no error,1: error occurred"
tree.end
tree "LifeC (Life Cycle)"
base ad:0xE6110000
group.long 0x238++0x3
line.long 0x0 "DBSCRM,DBSCRM controls SDRAM write/read data scramble/de-scramble function."
hexmask.long 0x0 0.--31. 1. "DBSCRM_31_0,All 0: Disable scramble/descramble function."
tree.end
tree "MFIS (Multifunctional Interface)"
base ad:0x0
tree "MFIS_0"
base ad:0xE6260000
group.long 0xC0++0x1F
line.long 0x0 "MFISLCKR0,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x0 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x0 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x4 "MFISLCKR1,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x4 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x4 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x8 "MFISLCKR2,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x8 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x8 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0xC "MFISLCKR3,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0xC 1.--31. 1. "Reserved,Reserved"
bitfld.long 0xC 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x10 "MFISLCKR4,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x10 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x10 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x14 "MFISLCKR5,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x14 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x14 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x18 "MFISLCKR6,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x18 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x18 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x1C "MFISLCKR7,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x1C 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x1C 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
group.long 0x2C0++0x7
line.long 0x0 "MFIEDCSIDADDR,"
bitfld.long 0x0 31. "CLR,Clear SRC_ID which captured at EDC address check" "0: No effect,1: Clear SRC_ID"
hexmask.long.tbyte 0x0 8.--30. 1. "Reserved,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "SRC_ID,SRC_ID after EDC error detection"
line.long 0x4 "MFIEDCSIDWDATA,"
bitfld.long 0x4 31. "CLR,Clear SRC_ID which captured at EDC address check" "0: No effect,1: Clear SRC_ID"
hexmask.long.tbyte 0x4 8.--30. 1. "Reserved,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "SRC_ID,SRC_ID after EDC error detection"
rgroup.long 0x600++0x3
line.long 0x0 "MFISOFTMDR,This register indicate the value of input port SOFTMD[3:0]."
hexmask.long 0x0 4.--31. 1. "Reserved,Reserved."
hexmask.long.byte 0x0 0.--3. 1. "SOFTMD,Show double_quotationSOFTMD[3:0]double_quotation from FUSE module. Any CPU and USER can read."
group.long 0x604++0x3
line.long 0x0 "MFISBTSTSR,This register indicates the boot status and is used for software. No influence on the hardware operation."
hexmask.long 0x0 0.--31. 1. "Status_31_0,Update and monitor secure status"
group.long 0x724++0xDF
line.long 0x0 "MFISLCKR8,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x0 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x0 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x4 "MFISLCKR9,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x4 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x4 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x8 "MFISLCKR10,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x8 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x8 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0xC "MFISLCKR11,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0xC 1.--31. 1. "Reserved,Reserved"
bitfld.long 0xC 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x10 "MFISLCKR12,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x10 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x10 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x14 "MFISLCKR13,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x14 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x14 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x18 "MFISLCKR14,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x18 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x18 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x1C "MFISLCKR15,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x1C 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x1C 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x20 "MFISLCKR16,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x20 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x20 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x24 "MFISLCKR17,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x24 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x24 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x28 "MFISLCKR18,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x28 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x28 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x2C "MFISLCKR19,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x2C 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x2C 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x30 "MFISLCKR20,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x30 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x30 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x34 "MFISLCKR21,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x34 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x34 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x38 "MFISLCKR22,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x38 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x38 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x3C "MFISLCKR23,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x3C 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x3C 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x40 "MFISLCKR24,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x40 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x40 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x44 "MFISLCKR25,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x44 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x44 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x48 "MFISLCKR26,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x48 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x48 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x4C "MFISLCKR27,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x4C 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x4C 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x50 "MFISLCKR28,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x50 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x50 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x54 "MFISLCKR29,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x54 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x54 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x58 "MFISLCKR30,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x58 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x58 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x5C "MFISLCKR31,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x5C 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x5C 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x60 "MFISLCKR32,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x60 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x60 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x64 "MFISLCKR33,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x64 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x64 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x68 "MFISLCKR34,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x68 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x68 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x6C "MFISLCKR35,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x6C 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x6C 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x70 "MFISLCKR36,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x70 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x70 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x74 "MFISLCKR37,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x74 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x74 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x78 "MFISLCKR38,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x78 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x78 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x7C "MFISLCKR39,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x7C 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x7C 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x80 "MFISLCKR40,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x80 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x80 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x84 "MFISLCKR41,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x84 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x84 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x88 "MFISLCKR42,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x88 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x88 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x8C "MFISLCKR43,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x8C 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x8C 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x90 "MFISLCKR44,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x90 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x90 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x94 "MFISLCKR45,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x94 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x94 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x98 "MFISLCKR46,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x98 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x98 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0x9C "MFISLCKR47,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0x9C 1.--31. 1. "Reserved,Reserved"
bitfld.long 0x9C 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0xA0 "MFISLCKR48,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0xA0 1.--31. 1. "Reserved,Reserved"
bitfld.long 0xA0 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0xA4 "MFISLCKR49,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0xA4 1.--31. 1. "Reserved,Reserved"
bitfld.long 0xA4 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0xA8 "MFISLCKR50,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0xA8 1.--31. 1. "Reserved,Reserved"
bitfld.long 0xA8 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0xAC "MFISLCKR51,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0xAC 1.--31. 1. "Reserved,Reserved"
bitfld.long 0xAC 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0xB0 "MFISLCKR52,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0xB0 1.--31. 1. "Reserved,Reserved"
bitfld.long 0xB0 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0xB4 "MFISLCKR53,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0xB4 1.--31. 1. "Reserved,Reserved"
bitfld.long 0xB4 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0xB8 "MFISLCKR54,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0xB8 1.--31. 1. "Reserved,Reserved"
bitfld.long 0xB8 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0xBC "MFISLCKR55,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0xBC 1.--31. 1. "Reserved,Reserved"
bitfld.long 0xBC 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0xC0 "MFISLCKR56,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0xC0 1.--31. 1. "Reserved,Reserved"
bitfld.long 0xC0 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0xC4 "MFISLCKR57,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0xC4 1.--31. 1. "Reserved,Reserved"
bitfld.long 0xC4 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0xC8 "MFISLCKR58,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0xC8 1.--31. 1. "Reserved,Reserved"
bitfld.long 0xC8 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0xCC "MFISLCKR59,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0xCC 1.--31. 1. "Reserved,Reserved"
bitfld.long 0xCC 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0xD0 "MFISLCKR60,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0xD0 1.--31. 1. "Reserved,Reserved"
bitfld.long 0xD0 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0xD4 "MFISLCKR61,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0xD4 1.--31. 1. "Reserved,Reserved"
bitfld.long 0xD4 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0xD8 "MFISLCKR62,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0xD8 1.--31. 1. "Reserved,Reserved"
bitfld.long 0xD8 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
line.long 0xDC "MFISLCKR63,MFISLCKR is the dedicated register to realize the double_quotationmutexdouble_quotation function by use of LDR/STR instruction. If the value of the LCK bit is 0. this bit is automatically set to double_quotation1double_quotation in response to.."
hexmask.long 0xDC 1.--31. 1. "Reserved,Reserved"
bitfld.long 0xDC 0. "LCK,Mutex Control" "0: Releases the shared resources,1: Forbidden"
group.long 0x8B8++0x3
line.long 0x0 "MFISCMPERRSTSR,"
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.word 0x0 4.--15. 1. "CMPERRSTS,Error detection status"
hexmask.long.byte 0x0 0.--3. 1. "Reserved1,Reserved"
group.long 0x900++0x7
line.long 0x0 "MFISWPCNTR,This register is used to control write protection for all registers in ECM"
hexmask.long.word 0x0 16.--31. 1. "CodeValue_15_0,Code Value(H'ACCE)"
hexmask.long.word 0x0 1.--15. 1. "Reserved,Reserved"
bitfld.long 0x0 0. "WPD,Write Protection Disable" "0: Enable write protection,1: Disable write protection"
line.long 0x4 "MFISWACNTR,This register is used when write access for the target register is executed. Unless the target register address is written in this register. the contents of the target register cannot not be updated."
hexmask.long.word 0x4 16.--31. 1. "CodeValue_15_0,Code Value(H'ACCE)"
hexmask.long.word 0x4 0.--15. 1. "RegisterAddress_15_0,Lower 16-bits of the target register address"
group.long 0x944++0x3
line.long 0x0 "MFIERRINJ,"
hexmask.long 0x0 2.--31. 1. "Reserved,Reserved"
bitfld.long 0x0 1. "POS_INJ,Post-fault injection" "0: Normal Operation,1: Error asserted"
bitfld.long 0x0 0. "PRE_INJ,Pre-fault injection" "0: Normal Operation,1: Error asserted"
group.long 0x1400++0x3
line.long 0x0 "MFISARIICR00,MFISARIICR is a read/write register to generate the interrupt from ARM Application Core domain to ARM Realtime Core domain by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "IIC_14_0,Interrupt Source (from AP System core to Realtime Core)"
bitfld.long 0x0 0. "IIR,Internal Interrupt Request" "0,1"
group.long 0x1420++0x3
line.long 0x0 "MFISARIICR10,MFISARIICR is a read/write register to generate the interrupt from ARM Application Core domain to ARM Realtime Core domain by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "IIC_14_0,Interrupt Source (from AP System core to Realtime Core)"
bitfld.long 0x0 0. "IIR,Internal Interrupt Request" "0,1"
group.long 0x1440++0x3
line.long 0x0 "MFISARIMBR00,MFISARIMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x0 0.--31. 1. "IMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
group.long 0x1450++0x3
line.long 0x0 "MFISARIMBR10,MFISARIMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x0 0.--31. 1. "IMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
group.long 0x1460++0x3
line.long 0x0 "MFISARIMBR20,MFISARIMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x0 0.--31. 1. "IMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
group.long 0x1500++0x3
line.long 0x0 "MFISARIICR20,MFISARIICR is a read/write register to generate the interrupt from ARM Application Core domain to ARM Realtime Core domain by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "IIC_14_0,Interrupt Source (from AP System core to Realtime Core)"
bitfld.long 0x0 0. "IIR,Internal Interrupt Request" "0,1"
group.long 0x2408++0x3
line.long 0x0 "MFISARIICR01,MFISARIICR is a read/write register to generate the interrupt from ARM Application Core domain to ARM Realtime Core domain by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "IIC_14_0,Interrupt Source (from AP System core to Realtime Core)"
bitfld.long 0x0 0. "IIR,Internal Interrupt Request" "0,1"
group.long 0x2428++0x3
line.long 0x0 "MFISARIICR11,MFISARIICR is a read/write register to generate the interrupt from ARM Application Core domain to ARM Realtime Core domain by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "IIC_14_0,Interrupt Source (from AP System core to Realtime Core)"
bitfld.long 0x0 0. "IIR,Internal Interrupt Request" "0,1"
group.long 0x2444++0x3
line.long 0x0 "MFISARIMBR01,MFISARIMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x0 0.--31. 1. "IMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
group.long 0x2454++0x3
line.long 0x0 "MFISARIMBR11,MFISARIMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x0 0.--31. 1. "IMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
group.long 0x2464++0x3
line.long 0x0 "MFISARIMBR21,MFISARIMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x0 0.--31. 1. "IMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
group.long 0x2508++0x3
line.long 0x0 "MFISARIICR21,MFISARIICR is a read/write register to generate the interrupt from ARM Application Core domain to ARM Realtime Core domain by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "IIC_14_0,Interrupt Source (from AP System core to Realtime Core)"
bitfld.long 0x0 0. "IIR,Internal Interrupt Request" "0,1"
group.long 0x3410++0x3
line.long 0x0 "MFISARIICR02,MFISARIICR is a read/write register to generate the interrupt from ARM Application Core domain to ARM Realtime Core domain by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "IIC_14_0,Interrupt Source (from AP System core to Realtime Core)"
bitfld.long 0x0 0. "IIR,Internal Interrupt Request" "0,1"
group.long 0x3430++0x3
line.long 0x0 "MFISARIICR12,MFISARIICR is a read/write register to generate the interrupt from ARM Application Core domain to ARM Realtime Core domain by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "IIC_14_0,Interrupt Source (from AP System core to Realtime Core)"
bitfld.long 0x0 0. "IIR,Internal Interrupt Request" "0,1"
group.long 0x3448++0x3
line.long 0x0 "MFISARIMBR02,MFISARIMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x0 0.--31. 1. "IMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
group.long 0x3458++0x3
line.long 0x0 "MFISARIMBR12,MFISARIMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x0 0.--31. 1. "IMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
group.long 0x3468++0x3
line.long 0x0 "MFISARIMBR22,MFISARIMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x0 0.--31. 1. "IMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
group.long 0x3510++0x3
line.long 0x0 "MFISARIICR22,MFISARIICR is a read/write register to generate the interrupt from ARM Application Core domain to ARM Realtime Core domain by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "IIC_14_0,Interrupt Source (from AP System core to Realtime Core)"
bitfld.long 0x0 0. "IIR,Internal Interrupt Request" "0,1"
group.long 0x4418++0x3
line.long 0x0 "MFISARIICR03,MFISARIICR is a read/write register to generate the interrupt from ARM Application Core domain to ARM Realtime Core domain by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "IIC_14_0,Interrupt Source (from AP System core to Realtime Core)"
bitfld.long 0x0 0. "IIR,Internal Interrupt Request" "0,1"
group.long 0x4438++0x3
line.long 0x0 "MFISARIICR13,MFISARIICR is a read/write register to generate the interrupt from ARM Application Core domain to ARM Realtime Core domain by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "IIC_14_0,Interrupt Source (from AP System core to Realtime Core)"
bitfld.long 0x0 0. "IIR,Internal Interrupt Request" "0,1"
group.long 0x444C++0x3
line.long 0x0 "MFISARIMBR03,MFISARIMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x0 0.--31. 1. "IMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
group.long 0x445C++0x3
line.long 0x0 "MFISARIMBR13,MFISARIMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x0 0.--31. 1. "IMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
group.long 0x446C++0x3
line.long 0x0 "MFISARIMBR23,MFISARIMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x0 0.--31. 1. "IMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
group.long 0x4518++0x3
line.long 0x0 "MFISARIICR23,MFISARIICR is a read/write register to generate the interrupt from ARM Application Core domain to ARM Realtime Core domain by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "IIC_14_0,Interrupt Source (from AP System core to Realtime Core)"
bitfld.long 0x0 0. "IIR,Internal Interrupt Request" "0,1"
group.long 0x9404++0x3
line.long 0x0 "MFISAREICR00,MFISAREICR is a read/write register to generate the interrupt from ARM Realtime Core to ARM Application Core by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "EIC_14_0,Interrupt Source (from Realtime Core to AP System Core)"
bitfld.long 0x0 0. "EIR,Internal Interrupt Request" "0,1"
group.long 0x940C++0x3
line.long 0x0 "MFISAREICR01,MFISAREICR is a read/write register to generate the interrupt from ARM Realtime Core to ARM Application Core by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "EIC_14_0,Interrupt Source (from Realtime Core to AP System Core)"
bitfld.long 0x0 0. "EIR,Internal Interrupt Request" "0,1"
group.long 0x9414++0x3
line.long 0x0 "MFISAREICR02,MFISAREICR is a read/write register to generate the interrupt from ARM Realtime Core to ARM Application Core by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "EIC_14_0,Interrupt Source (from Realtime Core to AP System Core)"
bitfld.long 0x0 0. "EIR,Internal Interrupt Request" "0,1"
group.long 0x941C++0x3
line.long 0x0 "MFISAREICR03,MFISAREICR is a read/write register to generate the interrupt from ARM Realtime Core to ARM Application Core by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "EIC_14_0,Interrupt Source (from Realtime Core to AP System Core)"
bitfld.long 0x0 0. "EIR,Internal Interrupt Request" "0,1"
group.long 0x9424++0x3
line.long 0x0 "MFISRREICR01,MFISAREICR is a read/write register to generate the interrupt from ARM Realtime Core [m] to ARM Realtime Core [n] by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "EIC_14_0,Interrupt Source (from Realtime Core [m] to Realtime Core[n])"
bitfld.long 0x0 0. "EIR,Internal Interrupt Request" "0,1"
group.long 0x942C++0x3
line.long 0x0 "MFISRREICR02,MFISAREICR is a read/write register to generate the interrupt from ARM Realtime Core [m] to ARM Realtime Core [n] by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "EIC_14_0,Interrupt Source (from Realtime Core [m] to Realtime Core[n])"
bitfld.long 0x0 0. "EIR,Internal Interrupt Request" "0,1"
group.long 0x9460++0x17
line.long 0x0 "MFISAREMBR00,MFISAMEMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x0 0.--31. 1. "EMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
line.long 0x4 "MFISAREMBR01,MFISAMEMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x4 0.--31. 1. "EMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
line.long 0x8 "MFISAREMBR02,MFISAMEMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x8 0.--31. 1. "EMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
line.long 0xC "MFISAREMBR03,MFISAMEMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0xC 0.--31. 1. "EMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
line.long 0x10 "MFISRREMBR01,MFISRREMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x10 0.--31. 1. "EMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
line.long 0x14 "MFISRREMBR02,MFISRREMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x14 0.--31. 1. "EMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
group.long 0x9480++0x7
line.long 0x0 "MFISRREMBR10,MFISRREMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x0 0.--31. 1. "EMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
line.long 0x4 "MFISRREMBR12,MFISRREMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x4 0.--31. 1. "EMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
group.long 0x9490++0x7
line.long 0x0 "MFISRREMBR20,MFISRREMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x0 0.--31. 1. "EMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
line.long 0x4 "MFISRREMBR21,MFISRREMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x4 0.--31. 1. "EMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
group.long 0xA424++0x3
line.long 0x0 "MFISAREICR10,MFISAREICR is a read/write register to generate the interrupt from ARM Realtime Core to ARM Application Core by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "EIC_14_0,Interrupt Source (from Realtime Core to AP System Core)"
bitfld.long 0x0 0. "EIR,Internal Interrupt Request" "0,1"
group.long 0xA42C++0x3
line.long 0x0 "MFISAREICR11,MFISAREICR is a read/write register to generate the interrupt from ARM Realtime Core to ARM Application Core by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "EIC_14_0,Interrupt Source (from Realtime Core to AP System Core)"
bitfld.long 0x0 0. "EIR,Internal Interrupt Request" "0,1"
group.long 0xA434++0x3
line.long 0x0 "MFISAREICR12,MFISAREICR is a read/write register to generate the interrupt from ARM Realtime Core to ARM Application Core by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "EIC_14_0,Interrupt Source (from Realtime Core to AP System Core)"
bitfld.long 0x0 0. "EIR,Internal Interrupt Request" "0,1"
group.long 0xA43C++0x3
line.long 0x0 "MFISAREICR13,MFISAREICR is a read/write register to generate the interrupt from ARM Realtime Core to ARM Application Core by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "EIC_14_0,Interrupt Source (from Realtime Core to AP System Core)"
bitfld.long 0x0 0. "EIR,Internal Interrupt Request" "0,1"
group.long 0xA444++0x3
line.long 0x0 "MFISRREICR10,MFISAREICR is a read/write register to generate the interrupt from ARM Realtime Core [m] to ARM Realtime Core [n] by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "EIC_14_0,Interrupt Source (from Realtime Core [m] to Realtime Core[n])"
bitfld.long 0x0 0. "EIR,Internal Interrupt Request" "0,1"
group.long 0xA44C++0x3
line.long 0x0 "MFISRREICR12,MFISAREICR is a read/write register to generate the interrupt from ARM Realtime Core [m] to ARM Realtime Core [n] by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "EIC_14_0,Interrupt Source (from Realtime Core [m] to Realtime Core[n])"
bitfld.long 0x0 0. "EIR,Internal Interrupt Request" "0,1"
group.long 0xA470++0xF
line.long 0x0 "MFISAREMBR10,MFISAMEMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x0 0.--31. 1. "EMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
line.long 0x4 "MFISAREMBR11,MFISAMEMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x4 0.--31. 1. "EMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
line.long 0x8 "MFISAREMBR12,MFISAMEMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x8 0.--31. 1. "EMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
line.long 0xC "MFISAREMBR13,MFISAMEMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0xC 0.--31. 1. "EMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
group.long 0xB464++0x3
line.long 0x0 "MFISRREICR20,MFISAREICR is a read/write register to generate the interrupt from ARM Realtime Core [m] to ARM Realtime Core [n] by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "EIC_14_0,Interrupt Source (from Realtime Core [m] to Realtime Core[n])"
bitfld.long 0x0 0. "EIR,Internal Interrupt Request" "0,1"
group.long 0xB46C++0x3
line.long 0x0 "MFISRREICR21,MFISAREICR is a read/write register to generate the interrupt from ARM Realtime Core [m] to ARM Realtime Core [n] by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "EIC_14_0,Interrupt Source (from Realtime Core [m] to Realtime Core[n])"
bitfld.long 0x0 0. "EIR,Internal Interrupt Request" "0,1"
group.long 0xB480++0xF
line.long 0x0 "MFISAREMBR20,MFISAMEMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x0 0.--31. 1. "EMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
line.long 0x4 "MFISAREMBR21,MFISAMEMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x4 0.--31. 1. "EMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
line.long 0x8 "MFISAREMBR22,MFISAMEMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0x8 0.--31. 1. "EMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
line.long 0xC "MFISAREMBR23,MFISAMEMBR is a read/write register to inform the interrupt messages to the corresponding CPU. This register can also be used as the general purpose register."
hexmask.long 0xC 0.--31. 1. "EMSG_31_0,The message buffer for CPU communication or temporary buffer used for general purpose."
group.long 0xB504++0x3
line.long 0x0 "MFISAREICR20,MFISAREICR is a read/write register to generate the interrupt from ARM Realtime Core to ARM Application Core by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "EIC_14_0,Interrupt Source (from Realtime Core to AP System Core)"
bitfld.long 0x0 0. "EIR,Internal Interrupt Request" "0,1"
group.long 0xB50C++0x3
line.long 0x0 "MFISAREICR21,MFISAREICR is a read/write register to generate the interrupt from ARM Realtime Core to ARM Application Core by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "EIC_14_0,Interrupt Source (from Realtime Core to AP System Core)"
bitfld.long 0x0 0. "EIR,Internal Interrupt Request" "0,1"
group.long 0xB514++0x3
line.long 0x0 "MFISAREICR22,MFISAREICR is a read/write register to generate the interrupt from ARM Realtime Core to ARM Application Core by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "EIC_14_0,Interrupt Source (from Realtime Core to AP System Core)"
bitfld.long 0x0 0. "EIR,Internal Interrupt Request" "0,1"
group.long 0xB51C++0x3
line.long 0x0 "MFISAREICR23,MFISAREICR is a read/write register to generate the interrupt from ARM Realtime Core to ARM Application Core by software."
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved."
hexmask.long.word 0x0 1.--15. 1. "EIC_14_0,Interrupt Source (from Realtime Core to AP System Core)"
bitfld.long 0x0 0. "EIR,Internal Interrupt Request" "0,1"
tree.end
tree "MFIS_1"
base ad:0xFFF00000
rgroup.long 0x44++0x3
line.long 0x0 "PRR,"
hexmask.long.byte 0x0 25.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 20.--24. 1. "ENYO_00EN,Enyo Cluster 0 State"
bitfld.long 0x0 17.--19. "CR52EN,Cortex-R52" "0: The product has a Cortex-R52 CPU0,1: The product does not have Cortex-R52 CPU0,?,?,?,?,?,?"
bitfld.long 0x0 16. "Reserved1,Reserved" "0,1"
bitfld.long 0x0 15. "R_O,Chip Release" "0: Renesas,1: Other"
hexmask.long.byte 0x0 8.--14. 1. "Product,V4M: 0x5D"
newline
hexmask.long.byte 0x0 4.--7. 1. "CUT,CUT level"
hexmask.long.byte 0x0 0.--3. 1. "MASK,MASK level"
tree.end
tree.end
tree "MSIOF (Clock-Synchronized Serial Interface with FIFO)"
base ad:0x0
tree "MSIOF_0"
base ad:0xE6E90000
group.long 0x0++0xB
line.long 0x0 "SITMDR10,SITMDR1 is a 32-bit readable/writable register that specifies the MSIOF transmit mode."
bitfld.long 0x0 31. "TRMD,Transfer Mode" "0: Slave mode,1: Master mode"
bitfld.long 0x0 30. "PCON,Transfer Signal Connection" "0: Setting prohibited,1: MSIOF_SCK and MSIOF_SYNC are used as common.."
newline
bitfld.long 0x0 28.--29. "SYNCMD,SYNC Mode" "0: Frame start synchronization pulse,1: Reserved,?,?"
bitfld.long 0x0 26.--27. "SYNCCH,Synchronization Signal Channel Select" "0: The frame synchronization signal output at..,1: The frame synchronization signal output at..,?,?"
newline
bitfld.long 0x0 25. "SYNCAC,MSIOF_SYNC Polarity" "0: Active-high signal in synchronization pulse or..,1: Active-low signal in synchronization pulse or.."
bitfld.long 0x0 24. "BITLSB,MSB/LSB First" "0: MSB first,1: LSB first"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 20.--22. "DTDL,Data Pin Bit Delay for MSIOF_SYNC Pin" "0: No bit delay,1: 1-clock-cycle delay,?,?,?,?,?,?"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
bitfld.long 0x0 16.--18. "SYNCDL,Frame Synchronization Signal Timing Delay" "0: No bit delay,1: 1-clock-cycle delay,?,?,?,?,?,?"
newline
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
bitfld.long 0x0 2.--3. "FLD,Frame Synchronization Signal Interval" "0: 0-clock-cycle delay,1: 1-clock-cycle delay,?,?"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "TXSTP,Transmission Stop" "0: Setting prohibited,1: Stop a frame from starting to transmit until.."
line.long 0x4 "SITMDR20,SITMDR2 is a 32-bit readable/writable register that specifies the MSIOF transmit mode."
rbitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x4 30. "GRP,Group Count" "0: Group count 1,1: Group count 2"
newline
rbitfld.long 0x4 29. "Reserved_29,Reserved" "0,1"
hexmask.long.byte 0x4 24.--28. 1. "BITLEN1,Data Size (8 to 32 bits)"
newline
hexmask.long.byte 0x4 16.--23. 1. "WDLEN1,Word Count (1 to 256 words)"
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "SITMDR30,SITMDR3 is a 32-bit readable/writable register that specifies the MSIOF transmit mode."
rbitfld.long 0x8 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 24.--28. 1. "BITLEN2,Word Size (8 to 32 bits)"
newline
hexmask.long.byte 0x8 16.--23. 1. "WDLEN2,Word Count (1 to 256 words)"
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
group.long 0x10++0xB
line.long 0x0 "SIRMDR10,SIRMDR1 is a 32-bit readable/writable register that specifies the MSIOF receive mode."
bitfld.long 0x0 31. "TRMD,Transfer Mode" "0,1"
rbitfld.long 0x0 30. "Reserved_30,Reserved" "0,1"
newline
bitfld.long 0x0 28.--29. "SYNCMD,SYNC Mode" "0: Frame start synchronization pulse,1: Reserved,?,?"
rbitfld.long 0x0 26.--27. "Reserved_26,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 25. "SYNCAC,SYNC Polarity" "0: Active-high signal in synchronization pulse or..,1: Active-low signal in synchronization pulse or.."
bitfld.long 0x0 24. "BITLSB,MSB/LSB First" "0: MSB first,1: LSB first"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 20.--22. "DTDL,Data Pin Bit Delay for MSIOF_SYNC Pin" "0: No bit delay,1: 1-clock-cycle delay,?,?,?,?,?,?"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
bitfld.long 0x0 16.--18. "SYNCDL,MSIOF_SYNC Timing Delay" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
line.long 0x4 "SIRMDR20,SIRMDR2 is a 32-bit readable/writable register that specifies the MSIOF receive mode."
rbitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x4 30. "GRP,Group Count" "0: Group count 1,1: Group count 2"
newline
rbitfld.long 0x4 29. "Reserved_29,Reserved" "0,1"
hexmask.long.byte 0x4 24.--28. 1. "BITLEN1,Word Size (8 to 32 bits)"
newline
hexmask.long.byte 0x4 16.--23. 1. "WDLEN1,Word Count (1 to 256 words)"
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "SIRMDR30,SIRMDR3 is a 32-bit readable/writable register that specifies the MSIOF receive mode."
rbitfld.long 0x8 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 24.--28. 1. "BITLEN2,Word Size (8 to 32 bits)"
newline
hexmask.long.byte 0x8 16.--23. 1. "WDLEN2,Word Count (1 to 256 words)"
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
group.word 0x20++0x1
line.word 0x0 "SITSCR0,SITSCR is a 16-bit readable/writable register that specifies the conditions for generating transmit serial clock in master mode. SITSCR can be specified when the TRMD bit in SITMDR1 is set to B'1."
bitfld.word 0x0 14.--15. "MSSEL,Master Clock Source Select" "0: Selects module clock as the source of master clock,?,?,?"
bitfld.word 0x0 13. "MSIMM,Master Clock Direct Select" "0: Selects the clock output from the baud rate..,1: Setting prohibited"
newline
hexmask.word.byte 0x0 8.--12. 1. "BRPS,Prescaler Setting"
hexmask.word.byte 0x0 3.--7. 1. "Reserved_3,Reserved"
newline
bitfld.word 0x0 0.--2. "BRDV,Baud Rate Generator's Division Ratio" "0: Prescaler output and#65431,1: Prescaler output and#65431,?,?,?,?,?,?"
group.long 0x28++0x3
line.long 0x0 "SICTR0,SICTR is a 32-bit readable/writable register that specifies the MSIOF operating state."
bitfld.long 0x0 30.--31. "TSCKIZ,Transmit Clock Input/output Polarity Select in SPI Mode When Transmission is Disabled" "0: Inputs MSIOF_SCK when transmission is disabled,1: Setting prohibited,?,?"
bitfld.long 0x0 28.--29. "RSCKIZ,Receive Clock Polarity Select in SPI Mode" "0,1,2,3"
newline
bitfld.long 0x0 27. "TEDG,Transmit Timing" "0: Outputs transmit data at the rising edge of the..,1: Outputs transmit data at the falling edge of the.."
bitfld.long 0x0 26. "REDG,Receive Timing" "0: Samples receive data at the falling edge of the..,1: Samples receive data at the rising edge of the.."
newline
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
bitfld.long 0x0 22.--23. "TXDIZ,Pin Output When Transmission is Disabled" "0: Outputs 0,1: Outputs 1,?,?"
newline
hexmask.long.byte 0x0 16.--21. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "TSCKE,Transmit Serial Clock Output Enable" "0: Does not output MSIOF_SCK,1: Outputs MSIOF_SCK"
newline
bitfld.long 0x0 14. "TFSE,Transmit Frame Synchronization Signal Output Enable" "0: Does not output MSIOF_SYNC,1: Outputs MSIOF_SYNC"
bitfld.long 0x0 13. "RSCKE,Receive Serial Clock Output Enable" "0,1"
newline
bitfld.long 0x0 12. "RFSE,Receive Frame Synchronization Signal Output Enable" "0,1"
rbitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 9. "TXE,Transmit Enable" "0: Does not output MSIOF_TXD,1: Outputs MSIOF_TXD"
bitfld.long 0x0 8. "RXE,Receive Enable" "0: Data is not received through MSIOF_RXD,1: Data can be received through MSIOF_RXD"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "TXRST,Transmit Reset" "0: Transmit operation reset is completed,1: Transmit operation is being reset"
newline
bitfld.long 0x0 0. "RXRST,Receive Reset" "0: Receive operation reset is completed,1: Receive operation is being reset"
group.long 0x30++0x3
line.long 0x0 "SIFCTR0,SIFCTR is a 32-bit readable/writable register that indicates the area available for the transmit/receive FIFO transfer."
bitfld.long 0x0 29.--31. "TFWM,Transmit FIFO Watermark" "0: Issues a transfer request when 64 stages of the..,1: Issues a transfer request when 32 more stages of..,?,?,?,?,?,?"
hexmask.long.word 0x0 20.--28. 1. "TFUA,Transmit FIFO Usable Area"
newline
hexmask.long.byte 0x0 16.--19. 1. "Reserved_16,Reserved"
bitfld.long 0x0 13.--15. "RFWM,Receive FIFO Watermark" "0: Issues a transfer request when 1 stage or more..,1: Issues a transfer request when 4 or more stages..,?,?,?,?,?,?"
newline
hexmask.long.word 0x0 4.--12. 1. "RFUA,Receive FIFO Usable Area"
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved"
group.long 0x40++0x7
line.long 0x0 "SISTR0,Each bit in SISTR becomes an MSIOF interrupt source when the corresponding bit in SIIER is set to 1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 29. "TFEMP,Transmit FIFO Empty" "0: Transmit FIFO is not empty,1: Transmit FIFO is empty"
newline
rbitfld.long 0x0 28. "TDREQ,Transmit Data Transfer Request" "0: The size of empty space in the transmit FIFO has..,1: The size of empty space in the transmit FIFO has.."
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved"
newline
bitfld.long 0x0 23. "TEOF,Frame Transmission End" "0: One-frame transmission end is not detected,1: One-frame transmission end is detected"
rbitfld.long 0x0 22. "Reserved_22,Reserved" "0,1"
newline
bitfld.long 0x0 21. "TFSERR,Transmit Frame Synchronization Error" "0: No transmit frame synchronization error has..,1: A transmit frame synchronization error has.."
bitfld.long 0x0 20. "TFOVF,Transmit FIFO Overflow" "0: No transmit FIFO overflow has occurred,1: A transmit FIFO overflow has occurred"
newline
bitfld.long 0x0 19. "TFUDF,Transmit FIFO Underflow" "0: No transmit FIFO underflow has occurred,1: A transmit FIFO underflow has occurred"
hexmask.long.byte 0x0 14.--18. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 13. "RFFUL,Receive FIFO Full" "0: Receive FIFO is not full,1: Receive FIFO is full"
rbitfld.long 0x0 12. "RDREQ,Receive Data Transfer Request" "0: The size of valid data space in the receive FIFO..,1: The size of valid data space in the receive FIFO.."
newline
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "REOF,Frame Reception End" "0: One-frame reception end is not detected,1: One-frame reception end is detected"
newline
rbitfld.long 0x0 6. "Reserved_6,Reserved" "0,1"
bitfld.long 0x0 5. "RFSERR,Receive Frame Synchronization Error" "0: No receive frame synchronization error has..,1: A receive frame synchronization error has occurred"
newline
bitfld.long 0x0 4. "RFUDF,Receive FIFO Underflow" "0: No receive FIFO underflow has occurred,1: A receive FIFO underflow has occurred"
bitfld.long 0x0 3. "RFOVF,Receive FIFO Overflow" "0: No receive FIFO overflow has occurred,1: A receive FIFO overflow has occurred"
newline
eventfld.long 0x0 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4 "SIIER0,SIIER is a 32-bit readable/writable register that enables the issuance of MSIOF interrupts. When each bit in this register is set to 1 and the corresponding bit in SISTR is set to 1. the MSIOF issues an interrupt."
bitfld.long 0x4 31. "TDMAE,Transmit Data DMA Transfer Request Enable" "0: Sends an interrupt request to the CPU,1: Sends a DMA transfer request to the DMAC"
rbitfld.long 0x4 30. "Reserved_30,Reserved" "0,1"
newline
bitfld.long 0x4 29. "TFEMPE,Transmit FIFO Empty Enable" "0: Disables interrupts due to transmit FIFO empty,1: Enables interrupts due to transmit FIFO empty"
bitfld.long 0x4 28. "TDREQE,Transmit Data Transfer Request Enable" "0: Disables interrupts due to transmit data..,1: Enables interrupts due to transmit data transfer.."
newline
hexmask.long.byte 0x4 24.--27. 1. "Reserved_24,Reserved"
bitfld.long 0x4 23. "TEOFE,Frame Transmission End Enable" "0: Disables a frame transmission end interrupt,1: Enables a frame transmission end interrupt"
newline
rbitfld.long 0x4 22. "Reserved_22,Reserved" "0,1"
bitfld.long 0x4 21. "TFSERRE,Transmit Frame Synchronization Error Enable" "0: Disables interrupts due to transmit frame..,1: Enables interrupts due to transmit frame.."
newline
bitfld.long 0x4 20. "TFOVFE,Transmit FIFO Overflow Enable" "0: Disables interrupts due to transmit FIFO overflow,1: Enables interrupts due to transmit FIFO overflow"
bitfld.long 0x4 19. "TFUDFE,Transmit FIFO Underflow Enable" "0: Disables interrupts due to transmit FIFO underflow,1: Enables interrupts due to transmit FIFO underflow"
newline
rbitfld.long 0x4 16.--18. "Reserved_16,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 15. "RDMAE,Receive Data DMA Transfer Request Enable" "0: Sends an interrupt request to the CPU,1: Sends a DMA transfer request to the DMAC"
newline
rbitfld.long 0x4 14. "Reserved_14,Reserved" "0,1"
bitfld.long 0x4 13. "RFFULE,Receive FIFO Full Enable" "0: Disables interrupts due to receive FIFO full,1: Enables interrupts due to receive FIFO full"
newline
bitfld.long 0x4 12. "RDREQE,Receive Data Transfer Request Enable" "0: Disables interrupts due to receive data transfer..,1: Enables interrupts due to receive data transfer.."
hexmask.long.byte 0x4 8.--11. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "REOFE,Frame Reception End Enable" "0: Disables a frame reception end interrupt,1: Enables a frame reception end interrupt"
rbitfld.long 0x4 6. "Reserved_6,Reserved" "0,1"
newline
bitfld.long 0x4 5. "RFSERRE,Receive Frame Synchronization Error Enable" "0: Disables interrupts due to receive frame..,1: Enables interrupts due to receive frame.."
bitfld.long 0x4 4. "RFUDFE,Receive FIFO Underflow Enable" "0: Disables interrupts due to receive FIFO underflow,1: Enables interrupts due to receive FIFO underflow"
newline
bitfld.long 0x4 3. "RFOVFE,Receive FIFO Overflow Enable" "0: Disables interrupts due to receive FIFO overflow,1: Enables interrupts due to receive FIFO overflow"
rbitfld.long 0x4 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
wgroup.long 0x50++0x3
line.long 0x0 "SITFDR0,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
hexmask.long.word 0x0 0.--15. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
group.long 0x50++0x3
line.long 0x0 "SITFDR0__16_L,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.word 0x0 0.--15. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
group.long 0x50++0x3
line.long 0x0 "SITFDR0__16_H,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
group.long 0x50++0x3
line.long 0x0 "SITFDR0__8_LL,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "Reserved1,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
group.long 0x50++0x3
line.long 0x0 "SITFDR0__8_LH,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved1,Reserved"
group.long 0x50++0x3
line.long 0x0 "SITFDR0__8_HL,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 16.--23. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
group.long 0x50++0x3
line.long 0x0 "SITFDR0__8_HH,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
hexmask.long.byte 0x0 16.--23. 1. "Reserved0,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR0,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
hexmask.long.word 0x0 0.--15. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR0__16_L,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.word 0x0 0.--15. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR0__16_H,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR0__8_LL,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "Reserved1,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR0__8_LH,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR0__8_HL,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 16.--23. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR0__8_HH,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
hexmask.long.byte 0x0 16.--23. 1. "Reserved0,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
tree.end
tree "MSIOF_1"
base ad:0xE6EA0000
group.long 0x0++0xB
line.long 0x0 "SITMDR11,SITMDR1 is a 32-bit readable/writable register that specifies the MSIOF transmit mode."
bitfld.long 0x0 31. "TRMD,Transfer Mode" "0: Slave mode,1: Master mode"
bitfld.long 0x0 30. "PCON,Transfer Signal Connection" "0: Setting prohibited,1: MSIOF_SCK and MSIOF_SYNC are used as common.."
newline
bitfld.long 0x0 28.--29. "SYNCMD,SYNC Mode" "0: Frame start synchronization pulse,1: Reserved,?,?"
bitfld.long 0x0 26.--27. "SYNCCH,Synchronization Signal Channel Select" "0: The frame synchronization signal output at..,1: The frame synchronization signal output at..,?,?"
newline
bitfld.long 0x0 25. "SYNCAC,MSIOF_SYNC Polarity" "0: Active-high signal in synchronization pulse or..,1: Active-low signal in synchronization pulse or.."
bitfld.long 0x0 24. "BITLSB,MSB/LSB First" "0: MSB first,1: LSB first"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 20.--22. "DTDL,Data Pin Bit Delay for MSIOF_SYNC Pin" "0: No bit delay,1: 1-clock-cycle delay,?,?,?,?,?,?"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
bitfld.long 0x0 16.--18. "SYNCDL,Frame Synchronization Signal Timing Delay" "0: No bit delay,1: 1-clock-cycle delay,?,?,?,?,?,?"
newline
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
bitfld.long 0x0 2.--3. "FLD,Frame Synchronization Signal Interval" "0: 0-clock-cycle delay,1: 1-clock-cycle delay,?,?"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "TXSTP,Transmission Stop" "0: Setting prohibited,1: Stop a frame from starting to transmit until.."
line.long 0x4 "SITMDR21,SITMDR2 is a 32-bit readable/writable register that specifies the MSIOF transmit mode."
rbitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x4 30. "GRP,Group Count" "0: Group count 1,1: Group count 2"
newline
rbitfld.long 0x4 29. "Reserved_29,Reserved" "0,1"
hexmask.long.byte 0x4 24.--28. 1. "BITLEN1,Data Size (8 to 32 bits)"
newline
hexmask.long.byte 0x4 16.--23. 1. "WDLEN1,Word Count (1 to 256 words)"
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "SITMDR31,SITMDR3 is a 32-bit readable/writable register that specifies the MSIOF transmit mode."
rbitfld.long 0x8 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 24.--28. 1. "BITLEN2,Word Size (8 to 32 bits)"
newline
hexmask.long.byte 0x8 16.--23. 1. "WDLEN2,Word Count (1 to 256 words)"
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
group.long 0x10++0xB
line.long 0x0 "SIRMDR11,SIRMDR1 is a 32-bit readable/writable register that specifies the MSIOF receive mode."
bitfld.long 0x0 31. "TRMD,Transfer Mode" "0,1"
rbitfld.long 0x0 30. "Reserved_30,Reserved" "0,1"
newline
bitfld.long 0x0 28.--29. "SYNCMD,SYNC Mode" "0: Frame start synchronization pulse,1: Reserved,?,?"
rbitfld.long 0x0 26.--27. "Reserved_26,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 25. "SYNCAC,SYNC Polarity" "0: Active-high signal in synchronization pulse or..,1: Active-low signal in synchronization pulse or.."
bitfld.long 0x0 24. "BITLSB,MSB/LSB First" "0: MSB first,1: LSB first"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 20.--22. "DTDL,Data Pin Bit Delay for MSIOF_SYNC Pin" "0: No bit delay,1: 1-clock-cycle delay,?,?,?,?,?,?"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
bitfld.long 0x0 16.--18. "SYNCDL,MSIOF_SYNC Timing Delay" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
line.long 0x4 "SIRMDR21,SIRMDR2 is a 32-bit readable/writable register that specifies the MSIOF receive mode."
rbitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x4 30. "GRP,Group Count" "0: Group count 1,1: Group count 2"
newline
rbitfld.long 0x4 29. "Reserved_29,Reserved" "0,1"
hexmask.long.byte 0x4 24.--28. 1. "BITLEN1,Word Size (8 to 32 bits)"
newline
hexmask.long.byte 0x4 16.--23. 1. "WDLEN1,Word Count (1 to 256 words)"
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "SIRMDR31,SIRMDR3 is a 32-bit readable/writable register that specifies the MSIOF receive mode."
rbitfld.long 0x8 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 24.--28. 1. "BITLEN2,Word Size (8 to 32 bits)"
newline
hexmask.long.byte 0x8 16.--23. 1. "WDLEN2,Word Count (1 to 256 words)"
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
group.word 0x20++0x1
line.word 0x0 "SITSCR1,SITSCR is a 16-bit readable/writable register that specifies the conditions for generating transmit serial clock in master mode. SITSCR can be specified when the TRMD bit in SITMDR1 is set to B'1."
bitfld.word 0x0 14.--15. "MSSEL,Master Clock Source Select" "0: Selects module clock as the source of master clock,?,?,?"
bitfld.word 0x0 13. "MSIMM,Master Clock Direct Select" "0: Selects the clock output from the baud rate..,1: Setting prohibited"
newline
hexmask.word.byte 0x0 8.--12. 1. "BRPS,Prescaler Setting"
hexmask.word.byte 0x0 3.--7. 1. "Reserved_3,Reserved"
newline
bitfld.word 0x0 0.--2. "BRDV,Baud Rate Generator's Division Ratio" "0: Prescaler output and#65431,1: Prescaler output and#65431,?,?,?,?,?,?"
group.long 0x28++0x3
line.long 0x0 "SICTR1,SICTR is a 32-bit readable/writable register that specifies the MSIOF operating state."
bitfld.long 0x0 30.--31. "TSCKIZ,Transmit Clock Input/output Polarity Select in SPI Mode When Transmission is Disabled" "0: Inputs MSIOF_SCK when transmission is disabled,1: Setting prohibited,?,?"
bitfld.long 0x0 28.--29. "RSCKIZ,Receive Clock Polarity Select in SPI Mode" "0,1,2,3"
newline
bitfld.long 0x0 27. "TEDG,Transmit Timing" "0: Outputs transmit data at the rising edge of the..,1: Outputs transmit data at the falling edge of the.."
bitfld.long 0x0 26. "REDG,Receive Timing" "0: Samples receive data at the falling edge of the..,1: Samples receive data at the rising edge of the.."
newline
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
bitfld.long 0x0 22.--23. "TXDIZ,Pin Output When Transmission is Disabled" "0: Outputs 0,1: Outputs 1,?,?"
newline
hexmask.long.byte 0x0 16.--21. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "TSCKE,Transmit Serial Clock Output Enable" "0: Does not output MSIOF_SCK,1: Outputs MSIOF_SCK"
newline
bitfld.long 0x0 14. "TFSE,Transmit Frame Synchronization Signal Output Enable" "0: Does not output MSIOF_SYNC,1: Outputs MSIOF_SYNC"
bitfld.long 0x0 13. "RSCKE,Receive Serial Clock Output Enable" "0,1"
newline
bitfld.long 0x0 12. "RFSE,Receive Frame Synchronization Signal Output Enable" "0,1"
rbitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 9. "TXE,Transmit Enable" "0: Does not output MSIOF_TXD,1: Outputs MSIOF_TXD"
bitfld.long 0x0 8. "RXE,Receive Enable" "0: Data is not received through MSIOF_RXD,1: Data can be received through MSIOF_RXD"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "TXRST,Transmit Reset" "0: Transmit operation reset is completed,1: Transmit operation is being reset"
newline
bitfld.long 0x0 0. "RXRST,Receive Reset" "0: Receive operation reset is completed,1: Receive operation is being reset"
group.long 0x30++0x3
line.long 0x0 "SIFCTR1,SIFCTR is a 32-bit readable/writable register that indicates the area available for the transmit/receive FIFO transfer."
bitfld.long 0x0 29.--31. "TFWM,Transmit FIFO Watermark" "0: Issues a transfer request when 64 stages of the..,1: Issues a transfer request when 32 more stages of..,?,?,?,?,?,?"
hexmask.long.word 0x0 20.--28. 1. "TFUA,Transmit FIFO Usable Area"
newline
hexmask.long.byte 0x0 16.--19. 1. "Reserved_16,Reserved"
bitfld.long 0x0 13.--15. "RFWM,Receive FIFO Watermark" "0: Issues a transfer request when 1 stage or more..,1: Issues a transfer request when 4 or more stages..,?,?,?,?,?,?"
newline
hexmask.long.word 0x0 4.--12. 1. "RFUA,Receive FIFO Usable Area"
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved"
group.long 0x40++0x7
line.long 0x0 "SISTR1,Each bit in SISTR becomes an MSIOF interrupt source when the corresponding bit in SIIER is set to 1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 29. "TFEMP,Transmit FIFO Empty" "0: Transmit FIFO is not empty,1: Transmit FIFO is empty"
newline
rbitfld.long 0x0 28. "TDREQ,Transmit Data Transfer Request" "0: The size of empty space in the transmit FIFO has..,1: The size of empty space in the transmit FIFO has.."
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved"
newline
bitfld.long 0x0 23. "TEOF,Frame Transmission End" "0: One-frame transmission end is not detected,1: One-frame transmission end is detected"
rbitfld.long 0x0 22. "Reserved_22,Reserved" "0,1"
newline
bitfld.long 0x0 21. "TFSERR,Transmit Frame Synchronization Error" "0: No transmit frame synchronization error has..,1: A transmit frame synchronization error has.."
bitfld.long 0x0 20. "TFOVF,Transmit FIFO Overflow" "0: No transmit FIFO overflow has occurred,1: A transmit FIFO overflow has occurred"
newline
bitfld.long 0x0 19. "TFUDF,Transmit FIFO Underflow" "0: No transmit FIFO underflow has occurred,1: A transmit FIFO underflow has occurred"
hexmask.long.byte 0x0 14.--18. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 13. "RFFUL,Receive FIFO Full" "0: Receive FIFO is not full,1: Receive FIFO is full"
rbitfld.long 0x0 12. "RDREQ,Receive Data Transfer Request" "0: The size of valid data space in the receive FIFO..,1: The size of valid data space in the receive FIFO.."
newline
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "REOF,Frame Reception End" "0: One-frame reception end is not detected,1: One-frame reception end is detected"
newline
rbitfld.long 0x0 6. "Reserved_6,Reserved" "0,1"
bitfld.long 0x0 5. "RFSERR,Receive Frame Synchronization Error" "0: No receive frame synchronization error has..,1: A receive frame synchronization error has occurred"
newline
bitfld.long 0x0 4. "RFUDF,Receive FIFO Underflow" "0: No receive FIFO underflow has occurred,1: A receive FIFO underflow has occurred"
bitfld.long 0x0 3. "RFOVF,Receive FIFO Overflow" "0: No receive FIFO overflow has occurred,1: A receive FIFO overflow has occurred"
newline
eventfld.long 0x0 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4 "SIIER1,SIIER is a 32-bit readable/writable register that enables the issuance of MSIOF interrupts. When each bit in this register is set to 1 and the corresponding bit in SISTR is set to 1. the MSIOF issues an interrupt."
bitfld.long 0x4 31. "TDMAE,Transmit Data DMA Transfer Request Enable" "0: Sends an interrupt request to the CPU,1: Sends a DMA transfer request to the DMAC"
rbitfld.long 0x4 30. "Reserved_30,Reserved" "0,1"
newline
bitfld.long 0x4 29. "TFEMPE,Transmit FIFO Empty Enable" "0: Disables interrupts due to transmit FIFO empty,1: Enables interrupts due to transmit FIFO empty"
bitfld.long 0x4 28. "TDREQE,Transmit Data Transfer Request Enable" "0: Disables interrupts due to transmit data..,1: Enables interrupts due to transmit data transfer.."
newline
hexmask.long.byte 0x4 24.--27. 1. "Reserved_24,Reserved"
bitfld.long 0x4 23. "TEOFE,Frame Transmission End Enable" "0: Disables a frame transmission end interrupt,1: Enables a frame transmission end interrupt"
newline
rbitfld.long 0x4 22. "Reserved_22,Reserved" "0,1"
bitfld.long 0x4 21. "TFSERRE,Transmit Frame Synchronization Error Enable" "0: Disables interrupts due to transmit frame..,1: Enables interrupts due to transmit frame.."
newline
bitfld.long 0x4 20. "TFOVFE,Transmit FIFO Overflow Enable" "0: Disables interrupts due to transmit FIFO overflow,1: Enables interrupts due to transmit FIFO overflow"
bitfld.long 0x4 19. "TFUDFE,Transmit FIFO Underflow Enable" "0: Disables interrupts due to transmit FIFO underflow,1: Enables interrupts due to transmit FIFO underflow"
newline
rbitfld.long 0x4 16.--18. "Reserved_16,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 15. "RDMAE,Receive Data DMA Transfer Request Enable" "0: Sends an interrupt request to the CPU,1: Sends a DMA transfer request to the DMAC"
newline
rbitfld.long 0x4 14. "Reserved_14,Reserved" "0,1"
bitfld.long 0x4 13. "RFFULE,Receive FIFO Full Enable" "0: Disables interrupts due to receive FIFO full,1: Enables interrupts due to receive FIFO full"
newline
bitfld.long 0x4 12. "RDREQE,Receive Data Transfer Request Enable" "0: Disables interrupts due to receive data transfer..,1: Enables interrupts due to receive data transfer.."
hexmask.long.byte 0x4 8.--11. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "REOFE,Frame Reception End Enable" "0: Disables a frame reception end interrupt,1: Enables a frame reception end interrupt"
rbitfld.long 0x4 6. "Reserved_6,Reserved" "0,1"
newline
bitfld.long 0x4 5. "RFSERRE,Receive Frame Synchronization Error Enable" "0: Disables interrupts due to receive frame..,1: Enables interrupts due to receive frame.."
bitfld.long 0x4 4. "RFUDFE,Receive FIFO Underflow Enable" "0: Disables interrupts due to receive FIFO underflow,1: Enables interrupts due to receive FIFO underflow"
newline
bitfld.long 0x4 3. "RFOVFE,Receive FIFO Overflow Enable" "0: Disables interrupts due to receive FIFO overflow,1: Enables interrupts due to receive FIFO overflow"
rbitfld.long 0x4 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
wgroup.long 0x50++0x3
line.long 0x0 "SITFDR1,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
hexmask.long.word 0x0 0.--15. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
group.long 0x50++0x3
line.long 0x0 "SITFDR1__16_L,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.word 0x0 0.--15. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
group.long 0x50++0x3
line.long 0x0 "SITFDR1__16_H,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
group.long 0x50++0x3
line.long 0x0 "SITFDR1__8_LL,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "Reserved1,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
group.long 0x50++0x3
line.long 0x0 "SITFDR1__8_LH,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved1,Reserved"
group.long 0x50++0x3
line.long 0x0 "SITFDR1__8_HL,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 16.--23. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
group.long 0x50++0x3
line.long 0x0 "SITFDR1__8_HH,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
hexmask.long.byte 0x0 16.--23. 1. "Reserved0,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR1,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
hexmask.long.word 0x0 0.--15. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR1__16_L,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.word 0x0 0.--15. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR1__16_H,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR1__8_LL,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "Reserved1,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR1__8_LH,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR1__8_HL,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 16.--23. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR1__8_HH,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
hexmask.long.byte 0x0 16.--23. 1. "Reserved0,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
tree.end
tree "MSIOF_2"
base ad:0xE6C00000
group.long 0x0++0xB
line.long 0x0 "SITMDR12,SITMDR1 is a 32-bit readable/writable register that specifies the MSIOF transmit mode."
bitfld.long 0x0 31. "TRMD,Transfer Mode" "0: Slave mode,1: Master mode"
bitfld.long 0x0 30. "PCON,Transfer Signal Connection" "0: Setting prohibited,1: MSIOF_SCK and MSIOF_SYNC are used as common.."
newline
bitfld.long 0x0 28.--29. "SYNCMD,SYNC Mode" "0: Frame start synchronization pulse,1: Reserved,?,?"
bitfld.long 0x0 26.--27. "SYNCCH,Synchronization Signal Channel Select" "0: The frame synchronization signal output at..,1: The frame synchronization signal output at..,?,?"
newline
bitfld.long 0x0 25. "SYNCAC,MSIOF_SYNC Polarity" "0: Active-high signal in synchronization pulse or..,1: Active-low signal in synchronization pulse or.."
bitfld.long 0x0 24. "BITLSB,MSB/LSB First" "0: MSB first,1: LSB first"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 20.--22. "DTDL,Data Pin Bit Delay for MSIOF_SYNC Pin" "0: No bit delay,1: 1-clock-cycle delay,?,?,?,?,?,?"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
bitfld.long 0x0 16.--18. "SYNCDL,Frame Synchronization Signal Timing Delay" "0: No bit delay,1: 1-clock-cycle delay,?,?,?,?,?,?"
newline
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
bitfld.long 0x0 2.--3. "FLD,Frame Synchronization Signal Interval" "0: 0-clock-cycle delay,1: 1-clock-cycle delay,?,?"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "TXSTP,Transmission Stop" "0: Setting prohibited,1: Stop a frame from starting to transmit until.."
line.long 0x4 "SITMDR22,SITMDR2 is a 32-bit readable/writable register that specifies the MSIOF transmit mode."
rbitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x4 30. "GRP,Group Count" "0: Group count 1,1: Group count 2"
newline
rbitfld.long 0x4 29. "Reserved_29,Reserved" "0,1"
hexmask.long.byte 0x4 24.--28. 1. "BITLEN1,Data Size (8 to 32 bits)"
newline
hexmask.long.byte 0x4 16.--23. 1. "WDLEN1,Word Count (1 to 256 words)"
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "SITMDR32,SITMDR3 is a 32-bit readable/writable register that specifies the MSIOF transmit mode."
rbitfld.long 0x8 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 24.--28. 1. "BITLEN2,Word Size (8 to 32 bits)"
newline
hexmask.long.byte 0x8 16.--23. 1. "WDLEN2,Word Count (1 to 256 words)"
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
group.long 0x10++0xB
line.long 0x0 "SIRMDR12,SIRMDR1 is a 32-bit readable/writable register that specifies the MSIOF receive mode."
bitfld.long 0x0 31. "TRMD,Transfer Mode" "0,1"
rbitfld.long 0x0 30. "Reserved_30,Reserved" "0,1"
newline
bitfld.long 0x0 28.--29. "SYNCMD,SYNC Mode" "0: Frame start synchronization pulse,1: Reserved,?,?"
rbitfld.long 0x0 26.--27. "Reserved_26,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 25. "SYNCAC,SYNC Polarity" "0: Active-high signal in synchronization pulse or..,1: Active-low signal in synchronization pulse or.."
bitfld.long 0x0 24. "BITLSB,MSB/LSB First" "0: MSB first,1: LSB first"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 20.--22. "DTDL,Data Pin Bit Delay for MSIOF_SYNC Pin" "0: No bit delay,1: 1-clock-cycle delay,?,?,?,?,?,?"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
bitfld.long 0x0 16.--18. "SYNCDL,MSIOF_SYNC Timing Delay" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
line.long 0x4 "SIRMDR22,SIRMDR2 is a 32-bit readable/writable register that specifies the MSIOF receive mode."
rbitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x4 30. "GRP,Group Count" "0: Group count 1,1: Group count 2"
newline
rbitfld.long 0x4 29. "Reserved_29,Reserved" "0,1"
hexmask.long.byte 0x4 24.--28. 1. "BITLEN1,Word Size (8 to 32 bits)"
newline
hexmask.long.byte 0x4 16.--23. 1. "WDLEN1,Word Count (1 to 256 words)"
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "SIRMDR32,SIRMDR3 is a 32-bit readable/writable register that specifies the MSIOF receive mode."
rbitfld.long 0x8 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 24.--28. 1. "BITLEN2,Word Size (8 to 32 bits)"
newline
hexmask.long.byte 0x8 16.--23. 1. "WDLEN2,Word Count (1 to 256 words)"
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
group.word 0x20++0x1
line.word 0x0 "SITSCR2,SITSCR is a 16-bit readable/writable register that specifies the conditions for generating transmit serial clock in master mode. SITSCR can be specified when the TRMD bit in SITMDR1 is set to B'1."
bitfld.word 0x0 14.--15. "MSSEL,Master Clock Source Select" "0: Selects module clock as the source of master clock,?,?,?"
bitfld.word 0x0 13. "MSIMM,Master Clock Direct Select" "0: Selects the clock output from the baud rate..,1: Setting prohibited"
newline
hexmask.word.byte 0x0 8.--12. 1. "BRPS,Prescaler Setting"
hexmask.word.byte 0x0 3.--7. 1. "Reserved_3,Reserved"
newline
bitfld.word 0x0 0.--2. "BRDV,Baud Rate Generator's Division Ratio" "0: Prescaler output and#65431,1: Prescaler output and#65431,?,?,?,?,?,?"
group.long 0x28++0x3
line.long 0x0 "SICTR2,SICTR is a 32-bit readable/writable register that specifies the MSIOF operating state."
bitfld.long 0x0 30.--31. "TSCKIZ,Transmit Clock Input/output Polarity Select in SPI Mode When Transmission is Disabled" "0: Inputs MSIOF_SCK when transmission is disabled,1: Setting prohibited,?,?"
bitfld.long 0x0 28.--29. "RSCKIZ,Receive Clock Polarity Select in SPI Mode" "0,1,2,3"
newline
bitfld.long 0x0 27. "TEDG,Transmit Timing" "0: Outputs transmit data at the rising edge of the..,1: Outputs transmit data at the falling edge of the.."
bitfld.long 0x0 26. "REDG,Receive Timing" "0: Samples receive data at the falling edge of the..,1: Samples receive data at the rising edge of the.."
newline
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
bitfld.long 0x0 22.--23. "TXDIZ,Pin Output When Transmission is Disabled" "0: Outputs 0,1: Outputs 1,?,?"
newline
hexmask.long.byte 0x0 16.--21. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "TSCKE,Transmit Serial Clock Output Enable" "0: Does not output MSIOF_SCK,1: Outputs MSIOF_SCK"
newline
bitfld.long 0x0 14. "TFSE,Transmit Frame Synchronization Signal Output Enable" "0: Does not output MSIOF_SYNC,1: Outputs MSIOF_SYNC"
bitfld.long 0x0 13. "RSCKE,Receive Serial Clock Output Enable" "0,1"
newline
bitfld.long 0x0 12. "RFSE,Receive Frame Synchronization Signal Output Enable" "0,1"
rbitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 9. "TXE,Transmit Enable" "0: Does not output MSIOF_TXD,1: Outputs MSIOF_TXD"
bitfld.long 0x0 8. "RXE,Receive Enable" "0: Data is not received through MSIOF_RXD,1: Data can be received through MSIOF_RXD"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "TXRST,Transmit Reset" "0: Transmit operation reset is completed,1: Transmit operation is being reset"
newline
bitfld.long 0x0 0. "RXRST,Receive Reset" "0: Receive operation reset is completed,1: Receive operation is being reset"
group.long 0x30++0x3
line.long 0x0 "SIFCTR2,SIFCTR is a 32-bit readable/writable register that indicates the area available for the transmit/receive FIFO transfer."
bitfld.long 0x0 29.--31. "TFWM,Transmit FIFO Watermark" "0: Issues a transfer request when 64 stages of the..,1: Issues a transfer request when 32 more stages of..,?,?,?,?,?,?"
hexmask.long.word 0x0 20.--28. 1. "TFUA,Transmit FIFO Usable Area"
newline
hexmask.long.byte 0x0 16.--19. 1. "Reserved_16,Reserved"
bitfld.long 0x0 13.--15. "RFWM,Receive FIFO Watermark" "0: Issues a transfer request when 1 stage or more..,1: Issues a transfer request when 4 or more stages..,?,?,?,?,?,?"
newline
hexmask.long.word 0x0 4.--12. 1. "RFUA,Receive FIFO Usable Area"
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved"
group.long 0x40++0x7
line.long 0x0 "SISTR2,Each bit in SISTR becomes an MSIOF interrupt source when the corresponding bit in SIIER is set to 1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 29. "TFEMP,Transmit FIFO Empty" "0: Transmit FIFO is not empty,1: Transmit FIFO is empty"
newline
rbitfld.long 0x0 28. "TDREQ,Transmit Data Transfer Request" "0: The size of empty space in the transmit FIFO has..,1: The size of empty space in the transmit FIFO has.."
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved"
newline
bitfld.long 0x0 23. "TEOF,Frame Transmission End" "0: One-frame transmission end is not detected,1: One-frame transmission end is detected"
rbitfld.long 0x0 22. "Reserved_22,Reserved" "0,1"
newline
bitfld.long 0x0 21. "TFSERR,Transmit Frame Synchronization Error" "0: No transmit frame synchronization error has..,1: A transmit frame synchronization error has.."
bitfld.long 0x0 20. "TFOVF,Transmit FIFO Overflow" "0: No transmit FIFO overflow has occurred,1: A transmit FIFO overflow has occurred"
newline
bitfld.long 0x0 19. "TFUDF,Transmit FIFO Underflow" "0: No transmit FIFO underflow has occurred,1: A transmit FIFO underflow has occurred"
hexmask.long.byte 0x0 14.--18. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 13. "RFFUL,Receive FIFO Full" "0: Receive FIFO is not full,1: Receive FIFO is full"
rbitfld.long 0x0 12. "RDREQ,Receive Data Transfer Request" "0: The size of valid data space in the receive FIFO..,1: The size of valid data space in the receive FIFO.."
newline
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "REOF,Frame Reception End" "0: One-frame reception end is not detected,1: One-frame reception end is detected"
newline
rbitfld.long 0x0 6. "Reserved_6,Reserved" "0,1"
bitfld.long 0x0 5. "RFSERR,Receive Frame Synchronization Error" "0: No receive frame synchronization error has..,1: A receive frame synchronization error has occurred"
newline
bitfld.long 0x0 4. "RFUDF,Receive FIFO Underflow" "0: No receive FIFO underflow has occurred,1: A receive FIFO underflow has occurred"
bitfld.long 0x0 3. "RFOVF,Receive FIFO Overflow" "0: No receive FIFO overflow has occurred,1: A receive FIFO overflow has occurred"
newline
eventfld.long 0x0 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4 "SIIER2,SIIER is a 32-bit readable/writable register that enables the issuance of MSIOF interrupts. When each bit in this register is set to 1 and the corresponding bit in SISTR is set to 1. the MSIOF issues an interrupt."
bitfld.long 0x4 31. "TDMAE,Transmit Data DMA Transfer Request Enable" "0: Sends an interrupt request to the CPU,1: Sends a DMA transfer request to the DMAC"
rbitfld.long 0x4 30. "Reserved_30,Reserved" "0,1"
newline
bitfld.long 0x4 29. "TFEMPE,Transmit FIFO Empty Enable" "0: Disables interrupts due to transmit FIFO empty,1: Enables interrupts due to transmit FIFO empty"
bitfld.long 0x4 28. "TDREQE,Transmit Data Transfer Request Enable" "0: Disables interrupts due to transmit data..,1: Enables interrupts due to transmit data transfer.."
newline
hexmask.long.byte 0x4 24.--27. 1. "Reserved_24,Reserved"
bitfld.long 0x4 23. "TEOFE,Frame Transmission End Enable" "0: Disables a frame transmission end interrupt,1: Enables a frame transmission end interrupt"
newline
rbitfld.long 0x4 22. "Reserved_22,Reserved" "0,1"
bitfld.long 0x4 21. "TFSERRE,Transmit Frame Synchronization Error Enable" "0: Disables interrupts due to transmit frame..,1: Enables interrupts due to transmit frame.."
newline
bitfld.long 0x4 20. "TFOVFE,Transmit FIFO Overflow Enable" "0: Disables interrupts due to transmit FIFO overflow,1: Enables interrupts due to transmit FIFO overflow"
bitfld.long 0x4 19. "TFUDFE,Transmit FIFO Underflow Enable" "0: Disables interrupts due to transmit FIFO underflow,1: Enables interrupts due to transmit FIFO underflow"
newline
rbitfld.long 0x4 16.--18. "Reserved_16,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 15. "RDMAE,Receive Data DMA Transfer Request Enable" "0: Sends an interrupt request to the CPU,1: Sends a DMA transfer request to the DMAC"
newline
rbitfld.long 0x4 14. "Reserved_14,Reserved" "0,1"
bitfld.long 0x4 13. "RFFULE,Receive FIFO Full Enable" "0: Disables interrupts due to receive FIFO full,1: Enables interrupts due to receive FIFO full"
newline
bitfld.long 0x4 12. "RDREQE,Receive Data Transfer Request Enable" "0: Disables interrupts due to receive data transfer..,1: Enables interrupts due to receive data transfer.."
hexmask.long.byte 0x4 8.--11. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "REOFE,Frame Reception End Enable" "0: Disables a frame reception end interrupt,1: Enables a frame reception end interrupt"
rbitfld.long 0x4 6. "Reserved_6,Reserved" "0,1"
newline
bitfld.long 0x4 5. "RFSERRE,Receive Frame Synchronization Error Enable" "0: Disables interrupts due to receive frame..,1: Enables interrupts due to receive frame.."
bitfld.long 0x4 4. "RFUDFE,Receive FIFO Underflow Enable" "0: Disables interrupts due to receive FIFO underflow,1: Enables interrupts due to receive FIFO underflow"
newline
bitfld.long 0x4 3. "RFOVFE,Receive FIFO Overflow Enable" "0: Disables interrupts due to receive FIFO overflow,1: Enables interrupts due to receive FIFO overflow"
rbitfld.long 0x4 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
wgroup.long 0x50++0x3
line.long 0x0 "SITFDR2,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
hexmask.long.word 0x0 0.--15. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
group.long 0x50++0x3
line.long 0x0 "SITFDR2__16_L,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.word 0x0 0.--15. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
group.long 0x50++0x3
line.long 0x0 "SITFDR2__16_H,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
group.long 0x50++0x3
line.long 0x0 "SITFDR2__8_LL,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "Reserved1,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
group.long 0x50++0x3
line.long 0x0 "SITFDR2__8_LH,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved1,Reserved"
group.long 0x50++0x3
line.long 0x0 "SITFDR2__8_HL,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 16.--23. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
group.long 0x50++0x3
line.long 0x0 "SITFDR2__8_HH,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
hexmask.long.byte 0x0 16.--23. 1. "Reserved0,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR2,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
hexmask.long.word 0x0 0.--15. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR2__16_L,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.word 0x0 0.--15. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR2__16_H,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR2__8_LL,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "Reserved1,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR2__8_LH,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR2__8_HL,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 16.--23. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR2__8_HH,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
hexmask.long.byte 0x0 16.--23. 1. "Reserved0,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
tree.end
tree "MSIOF_3"
base ad:0xE6C10000
group.long 0x0++0xB
line.long 0x0 "SITMDR13,SITMDR1 is a 32-bit readable/writable register that specifies the MSIOF transmit mode."
bitfld.long 0x0 31. "TRMD,Transfer Mode" "0: Slave mode,1: Master mode"
bitfld.long 0x0 30. "PCON,Transfer Signal Connection" "0: Setting prohibited,1: MSIOF_SCK and MSIOF_SYNC are used as common.."
newline
bitfld.long 0x0 28.--29. "SYNCMD,SYNC Mode" "0: Frame start synchronization pulse,1: Reserved,?,?"
bitfld.long 0x0 26.--27. "SYNCCH,Synchronization Signal Channel Select" "0: The frame synchronization signal output at..,1: The frame synchronization signal output at..,?,?"
newline
bitfld.long 0x0 25. "SYNCAC,MSIOF_SYNC Polarity" "0: Active-high signal in synchronization pulse or..,1: Active-low signal in synchronization pulse or.."
bitfld.long 0x0 24. "BITLSB,MSB/LSB First" "0: MSB first,1: LSB first"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 20.--22. "DTDL,Data Pin Bit Delay for MSIOF_SYNC Pin" "0: No bit delay,1: 1-clock-cycle delay,?,?,?,?,?,?"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
bitfld.long 0x0 16.--18. "SYNCDL,Frame Synchronization Signal Timing Delay" "0: No bit delay,1: 1-clock-cycle delay,?,?,?,?,?,?"
newline
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
bitfld.long 0x0 2.--3. "FLD,Frame Synchronization Signal Interval" "0: 0-clock-cycle delay,1: 1-clock-cycle delay,?,?"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "TXSTP,Transmission Stop" "0: Setting prohibited,1: Stop a frame from starting to transmit until.."
line.long 0x4 "SITMDR23,SITMDR2 is a 32-bit readable/writable register that specifies the MSIOF transmit mode."
rbitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x4 30. "GRP,Group Count" "0: Group count 1,1: Group count 2"
newline
rbitfld.long 0x4 29. "Reserved_29,Reserved" "0,1"
hexmask.long.byte 0x4 24.--28. 1. "BITLEN1,Data Size (8 to 32 bits)"
newline
hexmask.long.byte 0x4 16.--23. 1. "WDLEN1,Word Count (1 to 256 words)"
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "SITMDR33,SITMDR3 is a 32-bit readable/writable register that specifies the MSIOF transmit mode."
rbitfld.long 0x8 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 24.--28. 1. "BITLEN2,Word Size (8 to 32 bits)"
newline
hexmask.long.byte 0x8 16.--23. 1. "WDLEN2,Word Count (1 to 256 words)"
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
group.long 0x10++0xB
line.long 0x0 "SIRMDR13,SIRMDR1 is a 32-bit readable/writable register that specifies the MSIOF receive mode."
bitfld.long 0x0 31. "TRMD,Transfer Mode" "0,1"
rbitfld.long 0x0 30. "Reserved_30,Reserved" "0,1"
newline
bitfld.long 0x0 28.--29. "SYNCMD,SYNC Mode" "0: Frame start synchronization pulse,1: Reserved,?,?"
rbitfld.long 0x0 26.--27. "Reserved_26,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 25. "SYNCAC,SYNC Polarity" "0: Active-high signal in synchronization pulse or..,1: Active-low signal in synchronization pulse or.."
bitfld.long 0x0 24. "BITLSB,MSB/LSB First" "0: MSB first,1: LSB first"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 20.--22. "DTDL,Data Pin Bit Delay for MSIOF_SYNC Pin" "0: No bit delay,1: 1-clock-cycle delay,?,?,?,?,?,?"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
bitfld.long 0x0 16.--18. "SYNCDL,MSIOF_SYNC Timing Delay" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
line.long 0x4 "SIRMDR23,SIRMDR2 is a 32-bit readable/writable register that specifies the MSIOF receive mode."
rbitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x4 30. "GRP,Group Count" "0: Group count 1,1: Group count 2"
newline
rbitfld.long 0x4 29. "Reserved_29,Reserved" "0,1"
hexmask.long.byte 0x4 24.--28. 1. "BITLEN1,Word Size (8 to 32 bits)"
newline
hexmask.long.byte 0x4 16.--23. 1. "WDLEN1,Word Count (1 to 256 words)"
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "SIRMDR33,SIRMDR3 is a 32-bit readable/writable register that specifies the MSIOF receive mode."
rbitfld.long 0x8 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 24.--28. 1. "BITLEN2,Word Size (8 to 32 bits)"
newline
hexmask.long.byte 0x8 16.--23. 1. "WDLEN2,Word Count (1 to 256 words)"
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
group.word 0x20++0x1
line.word 0x0 "SITSCR3,SITSCR is a 16-bit readable/writable register that specifies the conditions for generating transmit serial clock in master mode. SITSCR can be specified when the TRMD bit in SITMDR1 is set to B'1."
bitfld.word 0x0 14.--15. "MSSEL,Master Clock Source Select" "0: Selects module clock as the source of master clock,?,?,?"
bitfld.word 0x0 13. "MSIMM,Master Clock Direct Select" "0: Selects the clock output from the baud rate..,1: Setting prohibited"
newline
hexmask.word.byte 0x0 8.--12. 1. "BRPS,Prescaler Setting"
hexmask.word.byte 0x0 3.--7. 1. "Reserved_3,Reserved"
newline
bitfld.word 0x0 0.--2. "BRDV,Baud Rate Generator's Division Ratio" "0: Prescaler output and#65431,1: Prescaler output and#65431,?,?,?,?,?,?"
group.long 0x28++0x3
line.long 0x0 "SICTR3,SICTR is a 32-bit readable/writable register that specifies the MSIOF operating state."
bitfld.long 0x0 30.--31. "TSCKIZ,Transmit Clock Input/output Polarity Select in SPI Mode When Transmission is Disabled" "0: Inputs MSIOF_SCK when transmission is disabled,1: Setting prohibited,?,?"
bitfld.long 0x0 28.--29. "RSCKIZ,Receive Clock Polarity Select in SPI Mode" "0,1,2,3"
newline
bitfld.long 0x0 27. "TEDG,Transmit Timing" "0: Outputs transmit data at the rising edge of the..,1: Outputs transmit data at the falling edge of the.."
bitfld.long 0x0 26. "REDG,Receive Timing" "0: Samples receive data at the falling edge of the..,1: Samples receive data at the rising edge of the.."
newline
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
bitfld.long 0x0 22.--23. "TXDIZ,Pin Output When Transmission is Disabled" "0: Outputs 0,1: Outputs 1,?,?"
newline
hexmask.long.byte 0x0 16.--21. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "TSCKE,Transmit Serial Clock Output Enable" "0: Does not output MSIOF_SCK,1: Outputs MSIOF_SCK"
newline
bitfld.long 0x0 14. "TFSE,Transmit Frame Synchronization Signal Output Enable" "0: Does not output MSIOF_SYNC,1: Outputs MSIOF_SYNC"
bitfld.long 0x0 13. "RSCKE,Receive Serial Clock Output Enable" "0,1"
newline
bitfld.long 0x0 12. "RFSE,Receive Frame Synchronization Signal Output Enable" "0,1"
rbitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 9. "TXE,Transmit Enable" "0: Does not output MSIOF_TXD,1: Outputs MSIOF_TXD"
bitfld.long 0x0 8. "RXE,Receive Enable" "0: Data is not received through MSIOF_RXD,1: Data can be received through MSIOF_RXD"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "TXRST,Transmit Reset" "0: Transmit operation reset is completed,1: Transmit operation is being reset"
newline
bitfld.long 0x0 0. "RXRST,Receive Reset" "0: Receive operation reset is completed,1: Receive operation is being reset"
group.long 0x30++0x3
line.long 0x0 "SIFCTR3,SIFCTR is a 32-bit readable/writable register that indicates the area available for the transmit/receive FIFO transfer."
bitfld.long 0x0 29.--31. "TFWM,Transmit FIFO Watermark" "0: Issues a transfer request when 64 stages of the..,1: Issues a transfer request when 32 more stages of..,?,?,?,?,?,?"
hexmask.long.word 0x0 20.--28. 1. "TFUA,Transmit FIFO Usable Area"
newline
hexmask.long.byte 0x0 16.--19. 1. "Reserved_16,Reserved"
bitfld.long 0x0 13.--15. "RFWM,Receive FIFO Watermark" "0: Issues a transfer request when 1 stage or more..,1: Issues a transfer request when 4 or more stages..,?,?,?,?,?,?"
newline
hexmask.long.word 0x0 4.--12. 1. "RFUA,Receive FIFO Usable Area"
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved"
group.long 0x40++0x7
line.long 0x0 "SISTR3,Each bit in SISTR becomes an MSIOF interrupt source when the corresponding bit in SIIER is set to 1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 29. "TFEMP,Transmit FIFO Empty" "0: Transmit FIFO is not empty,1: Transmit FIFO is empty"
newline
rbitfld.long 0x0 28. "TDREQ,Transmit Data Transfer Request" "0: The size of empty space in the transmit FIFO has..,1: The size of empty space in the transmit FIFO has.."
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved"
newline
bitfld.long 0x0 23. "TEOF,Frame Transmission End" "0: One-frame transmission end is not detected,1: One-frame transmission end is detected"
rbitfld.long 0x0 22. "Reserved_22,Reserved" "0,1"
newline
bitfld.long 0x0 21. "TFSERR,Transmit Frame Synchronization Error" "0: No transmit frame synchronization error has..,1: A transmit frame synchronization error has.."
bitfld.long 0x0 20. "TFOVF,Transmit FIFO Overflow" "0: No transmit FIFO overflow has occurred,1: A transmit FIFO overflow has occurred"
newline
bitfld.long 0x0 19. "TFUDF,Transmit FIFO Underflow" "0: No transmit FIFO underflow has occurred,1: A transmit FIFO underflow has occurred"
hexmask.long.byte 0x0 14.--18. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 13. "RFFUL,Receive FIFO Full" "0: Receive FIFO is not full,1: Receive FIFO is full"
rbitfld.long 0x0 12. "RDREQ,Receive Data Transfer Request" "0: The size of valid data space in the receive FIFO..,1: The size of valid data space in the receive FIFO.."
newline
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "REOF,Frame Reception End" "0: One-frame reception end is not detected,1: One-frame reception end is detected"
newline
rbitfld.long 0x0 6. "Reserved_6,Reserved" "0,1"
bitfld.long 0x0 5. "RFSERR,Receive Frame Synchronization Error" "0: No receive frame synchronization error has..,1: A receive frame synchronization error has occurred"
newline
bitfld.long 0x0 4. "RFUDF,Receive FIFO Underflow" "0: No receive FIFO underflow has occurred,1: A receive FIFO underflow has occurred"
bitfld.long 0x0 3. "RFOVF,Receive FIFO Overflow" "0: No receive FIFO overflow has occurred,1: A receive FIFO overflow has occurred"
newline
eventfld.long 0x0 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4 "SIIER3,SIIER is a 32-bit readable/writable register that enables the issuance of MSIOF interrupts. When each bit in this register is set to 1 and the corresponding bit in SISTR is set to 1. the MSIOF issues an interrupt."
bitfld.long 0x4 31. "TDMAE,Transmit Data DMA Transfer Request Enable" "0: Sends an interrupt request to the CPU,1: Sends a DMA transfer request to the DMAC"
rbitfld.long 0x4 30. "Reserved_30,Reserved" "0,1"
newline
bitfld.long 0x4 29. "TFEMPE,Transmit FIFO Empty Enable" "0: Disables interrupts due to transmit FIFO empty,1: Enables interrupts due to transmit FIFO empty"
bitfld.long 0x4 28. "TDREQE,Transmit Data Transfer Request Enable" "0: Disables interrupts due to transmit data..,1: Enables interrupts due to transmit data transfer.."
newline
hexmask.long.byte 0x4 24.--27. 1. "Reserved_24,Reserved"
bitfld.long 0x4 23. "TEOFE,Frame Transmission End Enable" "0: Disables a frame transmission end interrupt,1: Enables a frame transmission end interrupt"
newline
rbitfld.long 0x4 22. "Reserved_22,Reserved" "0,1"
bitfld.long 0x4 21. "TFSERRE,Transmit Frame Synchronization Error Enable" "0: Disables interrupts due to transmit frame..,1: Enables interrupts due to transmit frame.."
newline
bitfld.long 0x4 20. "TFOVFE,Transmit FIFO Overflow Enable" "0: Disables interrupts due to transmit FIFO overflow,1: Enables interrupts due to transmit FIFO overflow"
bitfld.long 0x4 19. "TFUDFE,Transmit FIFO Underflow Enable" "0: Disables interrupts due to transmit FIFO underflow,1: Enables interrupts due to transmit FIFO underflow"
newline
rbitfld.long 0x4 16.--18. "Reserved_16,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 15. "RDMAE,Receive Data DMA Transfer Request Enable" "0: Sends an interrupt request to the CPU,1: Sends a DMA transfer request to the DMAC"
newline
rbitfld.long 0x4 14. "Reserved_14,Reserved" "0,1"
bitfld.long 0x4 13. "RFFULE,Receive FIFO Full Enable" "0: Disables interrupts due to receive FIFO full,1: Enables interrupts due to receive FIFO full"
newline
bitfld.long 0x4 12. "RDREQE,Receive Data Transfer Request Enable" "0: Disables interrupts due to receive data transfer..,1: Enables interrupts due to receive data transfer.."
hexmask.long.byte 0x4 8.--11. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "REOFE,Frame Reception End Enable" "0: Disables a frame reception end interrupt,1: Enables a frame reception end interrupt"
rbitfld.long 0x4 6. "Reserved_6,Reserved" "0,1"
newline
bitfld.long 0x4 5. "RFSERRE,Receive Frame Synchronization Error Enable" "0: Disables interrupts due to receive frame..,1: Enables interrupts due to receive frame.."
bitfld.long 0x4 4. "RFUDFE,Receive FIFO Underflow Enable" "0: Disables interrupts due to receive FIFO underflow,1: Enables interrupts due to receive FIFO underflow"
newline
bitfld.long 0x4 3. "RFOVFE,Receive FIFO Overflow Enable" "0: Disables interrupts due to receive FIFO overflow,1: Enables interrupts due to receive FIFO overflow"
rbitfld.long 0x4 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
wgroup.long 0x50++0x3
line.long 0x0 "SITFDR3,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
hexmask.long.word 0x0 0.--15. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
group.long 0x50++0x3
line.long 0x0 "SITFDR3__16_L,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.word 0x0 0.--15. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
group.long 0x50++0x3
line.long 0x0 "SITFDR3__16_H,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
group.long 0x50++0x3
line.long 0x0 "SITFDR3__8_LL,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "Reserved1,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
group.long 0x50++0x3
line.long 0x0 "SITFDR3__8_LH,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved1,Reserved"
group.long 0x50++0x3
line.long 0x0 "SITFDR3__8_HL,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 16.--23. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
group.long 0x50++0x3
line.long 0x0 "SITFDR3__8_HH,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
hexmask.long.byte 0x0 16.--23. 1. "Reserved0,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR3,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
hexmask.long.word 0x0 0.--15. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR3__16_L,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.word 0x0 0.--15. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR3__16_H,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR3__8_LL,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "Reserved1,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR3__8_LH,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR3__8_HL,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 16.--23. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR3__8_HH,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
hexmask.long.byte 0x0 16.--23. 1. "Reserved0,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
tree.end
tree "MSIOF_4"
base ad:0xE6C20000
group.long 0x0++0xB
line.long 0x0 "SITMDR14,SITMDR1 is a 32-bit readable/writable register that specifies the MSIOF transmit mode."
bitfld.long 0x0 31. "TRMD,Transfer Mode" "0: Slave mode,1: Master mode"
bitfld.long 0x0 30. "PCON,Transfer Signal Connection" "0: Setting prohibited,1: MSIOF_SCK and MSIOF_SYNC are used as common.."
newline
bitfld.long 0x0 28.--29. "SYNCMD,SYNC Mode" "0: Frame start synchronization pulse,1: Reserved,?,?"
bitfld.long 0x0 26.--27. "SYNCCH,Synchronization Signal Channel Select" "0: The frame synchronization signal output at..,1: The frame synchronization signal output at..,?,?"
newline
bitfld.long 0x0 25. "SYNCAC,MSIOF_SYNC Polarity" "0: Active-high signal in synchronization pulse or..,1: Active-low signal in synchronization pulse or.."
bitfld.long 0x0 24. "BITLSB,MSB/LSB First" "0: MSB first,1: LSB first"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 20.--22. "DTDL,Data Pin Bit Delay for MSIOF_SYNC Pin" "0: No bit delay,1: 1-clock-cycle delay,?,?,?,?,?,?"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
bitfld.long 0x0 16.--18. "SYNCDL,Frame Synchronization Signal Timing Delay" "0: No bit delay,1: 1-clock-cycle delay,?,?,?,?,?,?"
newline
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
bitfld.long 0x0 2.--3. "FLD,Frame Synchronization Signal Interval" "0: 0-clock-cycle delay,1: 1-clock-cycle delay,?,?"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "TXSTP,Transmission Stop" "0: Setting prohibited,1: Stop a frame from starting to transmit until.."
line.long 0x4 "SITMDR24,SITMDR2 is a 32-bit readable/writable register that specifies the MSIOF transmit mode."
rbitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x4 30. "GRP,Group Count" "0: Group count 1,1: Group count 2"
newline
rbitfld.long 0x4 29. "Reserved_29,Reserved" "0,1"
hexmask.long.byte 0x4 24.--28. 1. "BITLEN1,Data Size (8 to 32 bits)"
newline
hexmask.long.byte 0x4 16.--23. 1. "WDLEN1,Word Count (1 to 256 words)"
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "SITMDR34,SITMDR3 is a 32-bit readable/writable register that specifies the MSIOF transmit mode."
rbitfld.long 0x8 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 24.--28. 1. "BITLEN2,Word Size (8 to 32 bits)"
newline
hexmask.long.byte 0x8 16.--23. 1. "WDLEN2,Word Count (1 to 256 words)"
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
group.long 0x10++0xB
line.long 0x0 "SIRMDR14,SIRMDR1 is a 32-bit readable/writable register that specifies the MSIOF receive mode."
bitfld.long 0x0 31. "TRMD,Transfer Mode" "0,1"
rbitfld.long 0x0 30. "Reserved_30,Reserved" "0,1"
newline
bitfld.long 0x0 28.--29. "SYNCMD,SYNC Mode" "0: Frame start synchronization pulse,1: Reserved,?,?"
rbitfld.long 0x0 26.--27. "Reserved_26,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 25. "SYNCAC,SYNC Polarity" "0: Active-high signal in synchronization pulse or..,1: Active-low signal in synchronization pulse or.."
bitfld.long 0x0 24. "BITLSB,MSB/LSB First" "0: MSB first,1: LSB first"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 20.--22. "DTDL,Data Pin Bit Delay for MSIOF_SYNC Pin" "0: No bit delay,1: 1-clock-cycle delay,?,?,?,?,?,?"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
bitfld.long 0x0 16.--18. "SYNCDL,MSIOF_SYNC Timing Delay" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
line.long 0x4 "SIRMDR24,SIRMDR2 is a 32-bit readable/writable register that specifies the MSIOF receive mode."
rbitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x4 30. "GRP,Group Count" "0: Group count 1,1: Group count 2"
newline
rbitfld.long 0x4 29. "Reserved_29,Reserved" "0,1"
hexmask.long.byte 0x4 24.--28. 1. "BITLEN1,Word Size (8 to 32 bits)"
newline
hexmask.long.byte 0x4 16.--23. 1. "WDLEN1,Word Count (1 to 256 words)"
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "SIRMDR34,SIRMDR3 is a 32-bit readable/writable register that specifies the MSIOF receive mode."
rbitfld.long 0x8 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 24.--28. 1. "BITLEN2,Word Size (8 to 32 bits)"
newline
hexmask.long.byte 0x8 16.--23. 1. "WDLEN2,Word Count (1 to 256 words)"
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
group.word 0x20++0x1
line.word 0x0 "SITSCR4,SITSCR is a 16-bit readable/writable register that specifies the conditions for generating transmit serial clock in master mode. SITSCR can be specified when the TRMD bit in SITMDR1 is set to B'1."
bitfld.word 0x0 14.--15. "MSSEL,Master Clock Source Select" "0: Selects module clock as the source of master clock,?,?,?"
bitfld.word 0x0 13. "MSIMM,Master Clock Direct Select" "0: Selects the clock output from the baud rate..,1: Setting prohibited"
newline
hexmask.word.byte 0x0 8.--12. 1. "BRPS,Prescaler Setting"
hexmask.word.byte 0x0 3.--7. 1. "Reserved_3,Reserved"
newline
bitfld.word 0x0 0.--2. "BRDV,Baud Rate Generator's Division Ratio" "0: Prescaler output and#65431,1: Prescaler output and#65431,?,?,?,?,?,?"
group.long 0x28++0x3
line.long 0x0 "SICTR4,SICTR is a 32-bit readable/writable register that specifies the MSIOF operating state."
bitfld.long 0x0 30.--31. "TSCKIZ,Transmit Clock Input/output Polarity Select in SPI Mode When Transmission is Disabled" "0: Inputs MSIOF_SCK when transmission is disabled,1: Setting prohibited,?,?"
bitfld.long 0x0 28.--29. "RSCKIZ,Receive Clock Polarity Select in SPI Mode" "0,1,2,3"
newline
bitfld.long 0x0 27. "TEDG,Transmit Timing" "0: Outputs transmit data at the rising edge of the..,1: Outputs transmit data at the falling edge of the.."
bitfld.long 0x0 26. "REDG,Receive Timing" "0: Samples receive data at the falling edge of the..,1: Samples receive data at the rising edge of the.."
newline
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
bitfld.long 0x0 22.--23. "TXDIZ,Pin Output When Transmission is Disabled" "0: Outputs 0,1: Outputs 1,?,?"
newline
hexmask.long.byte 0x0 16.--21. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "TSCKE,Transmit Serial Clock Output Enable" "0: Does not output MSIOF_SCK,1: Outputs MSIOF_SCK"
newline
bitfld.long 0x0 14. "TFSE,Transmit Frame Synchronization Signal Output Enable" "0: Does not output MSIOF_SYNC,1: Outputs MSIOF_SYNC"
bitfld.long 0x0 13. "RSCKE,Receive Serial Clock Output Enable" "0,1"
newline
bitfld.long 0x0 12. "RFSE,Receive Frame Synchronization Signal Output Enable" "0,1"
rbitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 9. "TXE,Transmit Enable" "0: Does not output MSIOF_TXD,1: Outputs MSIOF_TXD"
bitfld.long 0x0 8. "RXE,Receive Enable" "0: Data is not received through MSIOF_RXD,1: Data can be received through MSIOF_RXD"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "TXRST,Transmit Reset" "0: Transmit operation reset is completed,1: Transmit operation is being reset"
newline
bitfld.long 0x0 0. "RXRST,Receive Reset" "0: Receive operation reset is completed,1: Receive operation is being reset"
group.long 0x30++0x3
line.long 0x0 "SIFCTR4,SIFCTR is a 32-bit readable/writable register that indicates the area available for the transmit/receive FIFO transfer."
bitfld.long 0x0 29.--31. "TFWM,Transmit FIFO Watermark" "0: Issues a transfer request when 64 stages of the..,1: Issues a transfer request when 32 more stages of..,?,?,?,?,?,?"
hexmask.long.word 0x0 20.--28. 1. "TFUA,Transmit FIFO Usable Area"
newline
hexmask.long.byte 0x0 16.--19. 1. "Reserved_16,Reserved"
bitfld.long 0x0 13.--15. "RFWM,Receive FIFO Watermark" "0: Issues a transfer request when 1 stage or more..,1: Issues a transfer request when 4 or more stages..,?,?,?,?,?,?"
newline
hexmask.long.word 0x0 4.--12. 1. "RFUA,Receive FIFO Usable Area"
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved"
group.long 0x40++0x7
line.long 0x0 "SISTR4,Each bit in SISTR becomes an MSIOF interrupt source when the corresponding bit in SIIER is set to 1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 29. "TFEMP,Transmit FIFO Empty" "0: Transmit FIFO is not empty,1: Transmit FIFO is empty"
newline
rbitfld.long 0x0 28. "TDREQ,Transmit Data Transfer Request" "0: The size of empty space in the transmit FIFO has..,1: The size of empty space in the transmit FIFO has.."
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved"
newline
bitfld.long 0x0 23. "TEOF,Frame Transmission End" "0: One-frame transmission end is not detected,1: One-frame transmission end is detected"
rbitfld.long 0x0 22. "Reserved_22,Reserved" "0,1"
newline
bitfld.long 0x0 21. "TFSERR,Transmit Frame Synchronization Error" "0: No transmit frame synchronization error has..,1: A transmit frame synchronization error has.."
bitfld.long 0x0 20. "TFOVF,Transmit FIFO Overflow" "0: No transmit FIFO overflow has occurred,1: A transmit FIFO overflow has occurred"
newline
bitfld.long 0x0 19. "TFUDF,Transmit FIFO Underflow" "0: No transmit FIFO underflow has occurred,1: A transmit FIFO underflow has occurred"
hexmask.long.byte 0x0 14.--18. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 13. "RFFUL,Receive FIFO Full" "0: Receive FIFO is not full,1: Receive FIFO is full"
rbitfld.long 0x0 12. "RDREQ,Receive Data Transfer Request" "0: The size of valid data space in the receive FIFO..,1: The size of valid data space in the receive FIFO.."
newline
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "REOF,Frame Reception End" "0: One-frame reception end is not detected,1: One-frame reception end is detected"
newline
rbitfld.long 0x0 6. "Reserved_6,Reserved" "0,1"
bitfld.long 0x0 5. "RFSERR,Receive Frame Synchronization Error" "0: No receive frame synchronization error has..,1: A receive frame synchronization error has occurred"
newline
bitfld.long 0x0 4. "RFUDF,Receive FIFO Underflow" "0: No receive FIFO underflow has occurred,1: A receive FIFO underflow has occurred"
bitfld.long 0x0 3. "RFOVF,Receive FIFO Overflow" "0: No receive FIFO overflow has occurred,1: A receive FIFO overflow has occurred"
newline
eventfld.long 0x0 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4 "SIIER4,SIIER is a 32-bit readable/writable register that enables the issuance of MSIOF interrupts. When each bit in this register is set to 1 and the corresponding bit in SISTR is set to 1. the MSIOF issues an interrupt."
bitfld.long 0x4 31. "TDMAE,Transmit Data DMA Transfer Request Enable" "0: Sends an interrupt request to the CPU,1: Sends a DMA transfer request to the DMAC"
rbitfld.long 0x4 30. "Reserved_30,Reserved" "0,1"
newline
bitfld.long 0x4 29. "TFEMPE,Transmit FIFO Empty Enable" "0: Disables interrupts due to transmit FIFO empty,1: Enables interrupts due to transmit FIFO empty"
bitfld.long 0x4 28. "TDREQE,Transmit Data Transfer Request Enable" "0: Disables interrupts due to transmit data..,1: Enables interrupts due to transmit data transfer.."
newline
hexmask.long.byte 0x4 24.--27. 1. "Reserved_24,Reserved"
bitfld.long 0x4 23. "TEOFE,Frame Transmission End Enable" "0: Disables a frame transmission end interrupt,1: Enables a frame transmission end interrupt"
newline
rbitfld.long 0x4 22. "Reserved_22,Reserved" "0,1"
bitfld.long 0x4 21. "TFSERRE,Transmit Frame Synchronization Error Enable" "0: Disables interrupts due to transmit frame..,1: Enables interrupts due to transmit frame.."
newline
bitfld.long 0x4 20. "TFOVFE,Transmit FIFO Overflow Enable" "0: Disables interrupts due to transmit FIFO overflow,1: Enables interrupts due to transmit FIFO overflow"
bitfld.long 0x4 19. "TFUDFE,Transmit FIFO Underflow Enable" "0: Disables interrupts due to transmit FIFO underflow,1: Enables interrupts due to transmit FIFO underflow"
newline
rbitfld.long 0x4 16.--18. "Reserved_16,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 15. "RDMAE,Receive Data DMA Transfer Request Enable" "0: Sends an interrupt request to the CPU,1: Sends a DMA transfer request to the DMAC"
newline
rbitfld.long 0x4 14. "Reserved_14,Reserved" "0,1"
bitfld.long 0x4 13. "RFFULE,Receive FIFO Full Enable" "0: Disables interrupts due to receive FIFO full,1: Enables interrupts due to receive FIFO full"
newline
bitfld.long 0x4 12. "RDREQE,Receive Data Transfer Request Enable" "0: Disables interrupts due to receive data transfer..,1: Enables interrupts due to receive data transfer.."
hexmask.long.byte 0x4 8.--11. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "REOFE,Frame Reception End Enable" "0: Disables a frame reception end interrupt,1: Enables a frame reception end interrupt"
rbitfld.long 0x4 6. "Reserved_6,Reserved" "0,1"
newline
bitfld.long 0x4 5. "RFSERRE,Receive Frame Synchronization Error Enable" "0: Disables interrupts due to receive frame..,1: Enables interrupts due to receive frame.."
bitfld.long 0x4 4. "RFUDFE,Receive FIFO Underflow Enable" "0: Disables interrupts due to receive FIFO underflow,1: Enables interrupts due to receive FIFO underflow"
newline
bitfld.long 0x4 3. "RFOVFE,Receive FIFO Overflow Enable" "0: Disables interrupts due to receive FIFO overflow,1: Enables interrupts due to receive FIFO overflow"
rbitfld.long 0x4 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
wgroup.long 0x50++0x3
line.long 0x0 "SITFDR4,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
hexmask.long.word 0x0 0.--15. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
group.long 0x50++0x3
line.long 0x0 "SITFDR4__16_L,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.word 0x0 0.--15. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
group.long 0x50++0x3
line.long 0x0 "SITFDR4__16_H,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
group.long 0x50++0x3
line.long 0x0 "SITFDR4__8_LL,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "Reserved1,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
group.long 0x50++0x3
line.long 0x0 "SITFDR4__8_LH,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved1,Reserved"
group.long 0x50++0x3
line.long 0x0 "SITFDR4__8_HL,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 16.--23. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
group.long 0x50++0x3
line.long 0x0 "SITFDR4__8_HH,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
hexmask.long.byte 0x0 16.--23. 1. "Reserved0,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR4,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
hexmask.long.word 0x0 0.--15. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR4__16_L,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.word 0x0 0.--15. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR4__16_H,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR4__8_LL,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "Reserved1,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR4__8_LH,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR4__8_HL,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 16.--23. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR4__8_HH,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
hexmask.long.byte 0x0 16.--23. 1. "Reserved0,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
tree.end
tree "MSIOF_5"
base ad:0xE6C28000
group.long 0x0++0xB
line.long 0x0 "SITMDR15,SITMDR1 is a 32-bit readable/writable register that specifies the MSIOF transmit mode."
bitfld.long 0x0 31. "TRMD,Transfer Mode" "0: Slave mode,1: Master mode"
bitfld.long 0x0 30. "PCON,Transfer Signal Connection" "0: Setting prohibited,1: MSIOF_SCK and MSIOF_SYNC are used as common.."
newline
bitfld.long 0x0 28.--29. "SYNCMD,SYNC Mode" "0: Frame start synchronization pulse,1: Reserved,?,?"
bitfld.long 0x0 26.--27. "SYNCCH,Synchronization Signal Channel Select" "0: The frame synchronization signal output at..,1: The frame synchronization signal output at..,?,?"
newline
bitfld.long 0x0 25. "SYNCAC,MSIOF_SYNC Polarity" "0: Active-high signal in synchronization pulse or..,1: Active-low signal in synchronization pulse or.."
bitfld.long 0x0 24. "BITLSB,MSB/LSB First" "0: MSB first,1: LSB first"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 20.--22. "DTDL,Data Pin Bit Delay for MSIOF_SYNC Pin" "0: No bit delay,1: 1-clock-cycle delay,?,?,?,?,?,?"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
bitfld.long 0x0 16.--18. "SYNCDL,Frame Synchronization Signal Timing Delay" "0: No bit delay,1: 1-clock-cycle delay,?,?,?,?,?,?"
newline
hexmask.long.word 0x0 4.--15. 1. "Reserved_4,Reserved"
bitfld.long 0x0 2.--3. "FLD,Frame Synchronization Signal Interval" "0: 0-clock-cycle delay,1: 1-clock-cycle delay,?,?"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "TXSTP,Transmission Stop" "0: Setting prohibited,1: Stop a frame from starting to transmit until.."
line.long 0x4 "SITMDR25,SITMDR2 is a 32-bit readable/writable register that specifies the MSIOF transmit mode."
rbitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x4 30. "GRP,Group Count" "0: Group count 1,1: Group count 2"
newline
rbitfld.long 0x4 29. "Reserved_29,Reserved" "0,1"
hexmask.long.byte 0x4 24.--28. 1. "BITLEN1,Data Size (8 to 32 bits)"
newline
hexmask.long.byte 0x4 16.--23. 1. "WDLEN1,Word Count (1 to 256 words)"
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "SITMDR35,SITMDR3 is a 32-bit readable/writable register that specifies the MSIOF transmit mode."
rbitfld.long 0x8 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 24.--28. 1. "BITLEN2,Word Size (8 to 32 bits)"
newline
hexmask.long.byte 0x8 16.--23. 1. "WDLEN2,Word Count (1 to 256 words)"
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
group.long 0x10++0xB
line.long 0x0 "SIRMDR15,SIRMDR1 is a 32-bit readable/writable register that specifies the MSIOF receive mode."
bitfld.long 0x0 31. "TRMD,Transfer Mode" "0,1"
rbitfld.long 0x0 30. "Reserved_30,Reserved" "0,1"
newline
bitfld.long 0x0 28.--29. "SYNCMD,SYNC Mode" "0: Frame start synchronization pulse,1: Reserved,?,?"
rbitfld.long 0x0 26.--27. "Reserved_26,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 25. "SYNCAC,SYNC Polarity" "0: Active-high signal in synchronization pulse or..,1: Active-low signal in synchronization pulse or.."
bitfld.long 0x0 24. "BITLSB,MSB/LSB First" "0: MSB first,1: LSB first"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 20.--22. "DTDL,Data Pin Bit Delay for MSIOF_SYNC Pin" "0: No bit delay,1: 1-clock-cycle delay,?,?,?,?,?,?"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
bitfld.long 0x0 16.--18. "SYNCDL,MSIOF_SYNC Timing Delay" "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved_0,Reserved"
line.long 0x4 "SIRMDR25,SIRMDR2 is a 32-bit readable/writable register that specifies the MSIOF receive mode."
rbitfld.long 0x4 31. "Reserved_31,Reserved" "0,1"
bitfld.long 0x4 30. "GRP,Group Count" "0: Group count 1,1: Group count 2"
newline
rbitfld.long 0x4 29. "Reserved_29,Reserved" "0,1"
hexmask.long.byte 0x4 24.--28. 1. "BITLEN1,Word Size (8 to 32 bits)"
newline
hexmask.long.byte 0x4 16.--23. 1. "WDLEN1,Word Count (1 to 256 words)"
hexmask.long.word 0x4 0.--15. 1. "Reserved_0,Reserved"
line.long 0x8 "SIRMDR35,SIRMDR3 is a 32-bit readable/writable register that specifies the MSIOF receive mode."
rbitfld.long 0x8 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 24.--28. 1. "BITLEN2,Word Size (8 to 32 bits)"
newline
hexmask.long.byte 0x8 16.--23. 1. "WDLEN2,Word Count (1 to 256 words)"
hexmask.long.word 0x8 0.--15. 1. "Reserved_0,Reserved"
group.word 0x20++0x1
line.word 0x0 "SITSCR5,SITSCR is a 16-bit readable/writable register that specifies the conditions for generating transmit serial clock in master mode. SITSCR can be specified when the TRMD bit in SITMDR1 is set to B'1."
bitfld.word 0x0 14.--15. "MSSEL,Master Clock Source Select" "0: Selects module clock as the source of master clock,?,?,?"
bitfld.word 0x0 13. "MSIMM,Master Clock Direct Select" "0: Selects the clock output from the baud rate..,1: Setting prohibited"
newline
hexmask.word.byte 0x0 8.--12. 1. "BRPS,Prescaler Setting"
hexmask.word.byte 0x0 3.--7. 1. "Reserved_3,Reserved"
newline
bitfld.word 0x0 0.--2. "BRDV,Baud Rate Generator's Division Ratio" "0: Prescaler output and#65431,1: Prescaler output and#65431,?,?,?,?,?,?"
group.long 0x28++0x3
line.long 0x0 "SICTR5,SICTR is a 32-bit readable/writable register that specifies the MSIOF operating state."
bitfld.long 0x0 30.--31. "TSCKIZ,Transmit Clock Input/output Polarity Select in SPI Mode When Transmission is Disabled" "0: Inputs MSIOF_SCK when transmission is disabled,1: Setting prohibited,?,?"
bitfld.long 0x0 28.--29. "RSCKIZ,Receive Clock Polarity Select in SPI Mode" "0,1,2,3"
newline
bitfld.long 0x0 27. "TEDG,Transmit Timing" "0: Outputs transmit data at the rising edge of the..,1: Outputs transmit data at the falling edge of the.."
bitfld.long 0x0 26. "REDG,Receive Timing" "0: Samples receive data at the falling edge of the..,1: Samples receive data at the rising edge of the.."
newline
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
bitfld.long 0x0 22.--23. "TXDIZ,Pin Output When Transmission is Disabled" "0: Outputs 0,1: Outputs 1,?,?"
newline
hexmask.long.byte 0x0 16.--21. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "TSCKE,Transmit Serial Clock Output Enable" "0: Does not output MSIOF_SCK,1: Outputs MSIOF_SCK"
newline
bitfld.long 0x0 14. "TFSE,Transmit Frame Synchronization Signal Output Enable" "0: Does not output MSIOF_SYNC,1: Outputs MSIOF_SYNC"
bitfld.long 0x0 13. "RSCKE,Receive Serial Clock Output Enable" "0,1"
newline
bitfld.long 0x0 12. "RFSE,Receive Frame Synchronization Signal Output Enable" "0,1"
rbitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 9. "TXE,Transmit Enable" "0: Does not output MSIOF_TXD,1: Outputs MSIOF_TXD"
bitfld.long 0x0 8. "RXE,Receive Enable" "0: Data is not received through MSIOF_RXD,1: Data can be received through MSIOF_RXD"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "TXRST,Transmit Reset" "0: Transmit operation reset is completed,1: Transmit operation is being reset"
newline
bitfld.long 0x0 0. "RXRST,Receive Reset" "0: Receive operation reset is completed,1: Receive operation is being reset"
group.long 0x30++0x3
line.long 0x0 "SIFCTR5,SIFCTR is a 32-bit readable/writable register that indicates the area available for the transmit/receive FIFO transfer."
bitfld.long 0x0 29.--31. "TFWM,Transmit FIFO Watermark" "0: Issues a transfer request when 64 stages of the..,1: Issues a transfer request when 32 more stages of..,?,?,?,?,?,?"
hexmask.long.word 0x0 20.--28. 1. "TFUA,Transmit FIFO Usable Area"
newline
hexmask.long.byte 0x0 16.--19. 1. "Reserved_16,Reserved"
bitfld.long 0x0 13.--15. "RFWM,Receive FIFO Watermark" "0: Issues a transfer request when 1 stage or more..,1: Issues a transfer request when 4 or more stages..,?,?,?,?,?,?"
newline
hexmask.long.word 0x0 4.--12. 1. "RFUA,Receive FIFO Usable Area"
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved"
group.long 0x40++0x7
line.long 0x0 "SISTR5,Each bit in SISTR becomes an MSIOF interrupt source when the corresponding bit in SIIER is set to 1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 29. "TFEMP,Transmit FIFO Empty" "0: Transmit FIFO is not empty,1: Transmit FIFO is empty"
newline
rbitfld.long 0x0 28. "TDREQ,Transmit Data Transfer Request" "0: The size of empty space in the transmit FIFO has..,1: The size of empty space in the transmit FIFO has.."
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved"
newline
bitfld.long 0x0 23. "TEOF,Frame Transmission End" "0: One-frame transmission end is not detected,1: One-frame transmission end is detected"
rbitfld.long 0x0 22. "Reserved_22,Reserved" "0,1"
newline
bitfld.long 0x0 21. "TFSERR,Transmit Frame Synchronization Error" "0: No transmit frame synchronization error has..,1: A transmit frame synchronization error has.."
bitfld.long 0x0 20. "TFOVF,Transmit FIFO Overflow" "0: No transmit FIFO overflow has occurred,1: A transmit FIFO overflow has occurred"
newline
bitfld.long 0x0 19. "TFUDF,Transmit FIFO Underflow" "0: No transmit FIFO underflow has occurred,1: A transmit FIFO underflow has occurred"
hexmask.long.byte 0x0 14.--18. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x0 13. "RFFUL,Receive FIFO Full" "0: Receive FIFO is not full,1: Receive FIFO is full"
rbitfld.long 0x0 12. "RDREQ,Receive Data Transfer Request" "0: The size of valid data space in the receive FIFO..,1: The size of valid data space in the receive FIFO.."
newline
hexmask.long.byte 0x0 8.--11. 1. "Reserved_8,Reserved"
bitfld.long 0x0 7. "REOF,Frame Reception End" "0: One-frame reception end is not detected,1: One-frame reception end is detected"
newline
rbitfld.long 0x0 6. "Reserved_6,Reserved" "0,1"
bitfld.long 0x0 5. "RFSERR,Receive Frame Synchronization Error" "0: No receive frame synchronization error has..,1: A receive frame synchronization error has occurred"
newline
bitfld.long 0x0 4. "RFUDF,Receive FIFO Underflow" "0: No receive FIFO underflow has occurred,1: A receive FIFO underflow has occurred"
bitfld.long 0x0 3. "RFOVF,Receive FIFO Overflow" "0: No receive FIFO overflow has occurred,1: A receive FIFO overflow has occurred"
newline
eventfld.long 0x0 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4 "SIIER5,SIIER is a 32-bit readable/writable register that enables the issuance of MSIOF interrupts. When each bit in this register is set to 1 and the corresponding bit in SISTR is set to 1. the MSIOF issues an interrupt."
bitfld.long 0x4 31. "TDMAE,Transmit Data DMA Transfer Request Enable" "0: Sends an interrupt request to the CPU,1: Sends a DMA transfer request to the DMAC"
rbitfld.long 0x4 30. "Reserved_30,Reserved" "0,1"
newline
bitfld.long 0x4 29. "TFEMPE,Transmit FIFO Empty Enable" "0: Disables interrupts due to transmit FIFO empty,1: Enables interrupts due to transmit FIFO empty"
bitfld.long 0x4 28. "TDREQE,Transmit Data Transfer Request Enable" "0: Disables interrupts due to transmit data..,1: Enables interrupts due to transmit data transfer.."
newline
hexmask.long.byte 0x4 24.--27. 1. "Reserved_24,Reserved"
bitfld.long 0x4 23. "TEOFE,Frame Transmission End Enable" "0: Disables a frame transmission end interrupt,1: Enables a frame transmission end interrupt"
newline
rbitfld.long 0x4 22. "Reserved_22,Reserved" "0,1"
bitfld.long 0x4 21. "TFSERRE,Transmit Frame Synchronization Error Enable" "0: Disables interrupts due to transmit frame..,1: Enables interrupts due to transmit frame.."
newline
bitfld.long 0x4 20. "TFOVFE,Transmit FIFO Overflow Enable" "0: Disables interrupts due to transmit FIFO overflow,1: Enables interrupts due to transmit FIFO overflow"
bitfld.long 0x4 19. "TFUDFE,Transmit FIFO Underflow Enable" "0: Disables interrupts due to transmit FIFO underflow,1: Enables interrupts due to transmit FIFO underflow"
newline
rbitfld.long 0x4 16.--18. "Reserved_16,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 15. "RDMAE,Receive Data DMA Transfer Request Enable" "0: Sends an interrupt request to the CPU,1: Sends a DMA transfer request to the DMAC"
newline
rbitfld.long 0x4 14. "Reserved_14,Reserved" "0,1"
bitfld.long 0x4 13. "RFFULE,Receive FIFO Full Enable" "0: Disables interrupts due to receive FIFO full,1: Enables interrupts due to receive FIFO full"
newline
bitfld.long 0x4 12. "RDREQE,Receive Data Transfer Request Enable" "0: Disables interrupts due to receive data transfer..,1: Enables interrupts due to receive data transfer.."
hexmask.long.byte 0x4 8.--11. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x4 7. "REOFE,Frame Reception End Enable" "0: Disables a frame reception end interrupt,1: Enables a frame reception end interrupt"
rbitfld.long 0x4 6. "Reserved_6,Reserved" "0,1"
newline
bitfld.long 0x4 5. "RFSERRE,Receive Frame Synchronization Error Enable" "0: Disables interrupts due to receive frame..,1: Enables interrupts due to receive frame.."
bitfld.long 0x4 4. "RFUDFE,Receive FIFO Underflow Enable" "0: Disables interrupts due to receive FIFO underflow,1: Enables interrupts due to receive FIFO underflow"
newline
bitfld.long 0x4 3. "RFOVFE,Receive FIFO Overflow Enable" "0: Disables interrupts due to receive FIFO overflow,1: Enables interrupts due to receive FIFO overflow"
rbitfld.long 0x4 0.--2. "Reserved_0,Reserved" "0,1,2,3,4,5,6,7"
wgroup.long 0x50++0x3
line.long 0x0 "SITFDR5,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
hexmask.long.word 0x0 0.--15. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
group.long 0x50++0x3
line.long 0x0 "SITFDR5__16_L,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.word 0x0 0.--15. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
group.long 0x50++0x3
line.long 0x0 "SITFDR5__16_H,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
group.long 0x50++0x3
line.long 0x0 "SITFDR5__8_LL,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "Reserved1,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
group.long 0x50++0x3
line.long 0x0 "SITFDR5__8_LH,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "SITFD2,These bits specify the lower 16 bits of the FIFO data to be output through MSIOF_TXD."
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved1,Reserved"
group.long 0x50++0x3
line.long 0x0 "SITFDR5__8_HL,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 16.--23. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
group.long 0x50++0x3
line.long 0x0 "SITFDR5__8_HH,SITFDR is a 32/16/8-bit write-only register that specifies the transmit FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "SITFD1,These bits specify the upper 16 bits of the FIFO data to be output through MSIOF_TXD."
hexmask.long.byte 0x0 16.--23. 1. "Reserved0,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR5,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
hexmask.long.word 0x0 0.--15. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR5__16_L,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.word 0x0 0.--15. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR5__16_H,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR5__8_LL,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "Reserved1,Reserved"
newline
hexmask.long.byte 0x0 0.--7. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR5__8_LH,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "SIRFD2,Store the lower 16 bits of the FIFO data received through MSIOF_RXD."
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR5__8_HL,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 16.--23. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.long 0x60++0x3
line.long 0x0 "SIRFDR5__8_HH,SIRFDR is a 32/16/8-bit read-only register that stores the receive FIFO data of the MSIOF."
hexmask.long.byte 0x0 24.--31. 1. "SIRFD1,Store the upper 16 bits of the FIFO data received through MSIOF_RXD."
hexmask.long.byte 0x0 16.--23. 1. "Reserved0,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
tree.end
tree.end
tree "MSSR (Module Standby/Software Reset)"
base ad:0xE6150000
tree.end
tree "MTI (Measurement Trace Interface)"
base ad:0xF8200000
group.long 0x0++0x1F
line.long 0x0 "MONI_ENABLE0_0,"
hexmask.long.byte 0x0 24.--31. 1. "M8_TAGEN0_7_0,ISP_ch0_ispin3 Monitoring Enable"
newline
hexmask.long.byte 0x0 16.--23. 1. "M7_TAGEN0_7_0,ISP_ch0_ispin2 Monitoring Enable"
newline
hexmask.long.byte 0x0 8.--15. 1. "M2_TAGEN0_7_0,ISP_ch0_ispin1 Monitoring Enable"
newline
hexmask.long.byte 0x0 0.--7. 1. "M1_TAGEN0_7_0,ISP_ch0_ispin0 Monitoring Enable"
line.long 0x4 "ISPIN_MONI_MODE0,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved"
newline
bitfld.long 0x4 24.--25. "M8_MONI_MODE0,ISP_ch0_ispin3 Monitoring Mode Setting" "0: 24-bit mode for data from ISP_ch0 ispin3,1: 12-bit mode for data from ISP_ch0 ispin3,2: 20-bit mode for data from ISP_ch0 ispin3,3: 8-bit made for data from ISP_ch0 ispin3"
newline
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 16.--17. "M7_MONI_MODE0,ISP_ch0_ispin2 Monitoring Mode Setting" "0: 24-bit mode for data from ISP_ch0 ispin2,1: 12-bit mode for data from ISP_ch0 ispin2,2: 20-bit mode for data from ISP_ch0 ispin2,3: 8-bit made for data from ISP_ch0 ispin2"
newline
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x4 8.--9. "M2_MONI_MODE0,ISP_ch0_ispin1 Monitoring Mode Setting" "0: 24-bit mode for data from ISP_ch0 ispin1,1: 12-bit mode for data from ISP_ch0 ispin1,2: 20-bit mode for data from ISP_ch0 ispin1,3: 8-bit made for data from ISP_ch0 ispin1"
newline
hexmask.long.byte 0x4 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x4 0.--1. "M1_MONI_MODE0,ISP_ch0_ispin0 Monitoring Mode Setting" "0: 24-bit mode for data from ISP_ch0 ispin0,1: 12-bit mode for data from ISP_ch0 ispin0,2: 20-bit mode for data from ISP_ch0 ispin0,3: 8-bit mode for data from ISP_ch0 ispin0"
line.long 0x8 "ISP_MONI_MODE0,"
hexmask.long.byte 0x8 26.--31. 1. "Reserved_26,Reserved"
newline
bitfld.long 0x8 24.--25. "M6_MONI_MODE0,ISP_ch0_ispout3 Monitoring Mode Setting" "0: 24-bit mode for data from ISP_ch0 ispout3,1: 12-bit mode for data from ISP_ch0 ispout3,2: 20-bit mode for data from ISP_ch0 ispout3,3: 8-bit made for data from ISP_ch0 ispout3"
newline
hexmask.long.byte 0x8 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x8 16.--17. "M5_MONI_MODE0,ISP_ch0_ispout2 Monitoring Mode Setting" "0: 24-bit mode for data from ISP_ch0 ispout2,1: 12-bit mode for data from ISP_ch0 ispout2,2: 20-bit mode for data from ISP_ch0 ispout2,3: 8-bit made for data from ISP_ch0 ispout2"
newline
hexmask.long.byte 0x8 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x8 8.--9. "M4_MONI_MODE0,ISP_ch0_ispout1 Monitoring Mode Setting" "0: 24-bit mode for data from ISP_ch0 ispout1,1: 12-bit mode for data from ISP_ch0 ispout1,2: 20-bit mode for data from ISP_ch0 ispout1,3: 8-bit made for data from ISP_ch0 ispout1"
newline
hexmask.long.byte 0x8 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x8 0.--1. "M3_MONI_MODE0,ISP_ch0_ispout0 Monitoring Mode Setting" "0: 24-bit mode for data from ISP_ch0 ispout0,1: 12-bit mode for data from ISP_ch0 ispout0,2: 20-bit mode for data from ISP_ch0 ispout0,3: 8-bit mode for data from ISP_ch0 ispout0"
line.long 0xC "MONI_ENABLE0_1,"
hexmask.long.byte 0xC 24.--31. 1. "M6_TAGEN0_7_0,ISP_ch0_ispout3 Monitoring Enable"
newline
hexmask.long.byte 0xC 16.--23. 1. "M5_TAGEN0_7_0,ISP_ch0_ispout2 Monitoring Enable"
newline
hexmask.long.byte 0xC 8.--15. 1. "M4_TAGEN0_7_0,ISP_ch0_ispout1 Monitoring Enable"
newline
hexmask.long.byte 0xC 0.--7. 1. "M3_TAGEN0_7_0,ISP_ch0_ispout0 Monitoring Enable"
line.long 0x10 "MONI_ENABLE1_0,"
hexmask.long.byte 0x10 24.--31. 1. "M8_TAGEN1_7_0,ISP_ch1_ispin3 Monitoring Enable"
newline
hexmask.long.byte 0x10 16.--23. 1. "M7_TAGEN1_7_0,ISP_ch1_ispin2 Monitoring Enable"
newline
hexmask.long.byte 0x10 8.--15. 1. "M2_TAGEN1_7_0,ISP_ch1_ispin1 Monitoring Enable"
newline
hexmask.long.byte 0x10 0.--7. 1. "M1_TAGEN1_7_0,ISP_ch1_ispin0 Monitoring Enable"
line.long 0x14 "ISPIN_MONI_MODE1,"
hexmask.long.byte 0x14 26.--31. 1. "Reserved_26,Reserved"
newline
bitfld.long 0x14 24.--25. "M8_MONI_MODE1,ISP_ch1_ispin3 Monitoring Mode Setting" "0: 24-bit mode for data from ISP_ch1 ispin3,1: 12-bit mode for data from ISP_ch1 ispin3,2: 20-bit mode for data from ISP_ch1 ispin3,3: 8-bit made for data from ISP_ch1 ispin3"
newline
hexmask.long.byte 0x14 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x14 16.--17. "M7_MONI_MODE1,ISP_ch1_ispin2 Monitoring Mode Setting" "0: 24-bit mode for data from ISP_ch1 ispin2,1: 12-bit mode for data from ISP_ch1 ispin2,2: 20-bit mode for data from ISP_ch1 ispin2,3: 8-bit made for data from ISP_ch1 ispin2"
newline
hexmask.long.byte 0x14 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x14 8.--9. "M2_MONI_MODE1,ISP_ch1_ispin1 Monitoring Mode Setting" "0: 24-bit mode for data from ISP_ch1 ispin1,1: 12-bit mode for data from ISP_ch1 ispin1,2: 20-bit mode for data from ISP_ch1 ispin1,3: 8-bit made for data from ISP_ch1 ispin1"
newline
hexmask.long.byte 0x14 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x14 0.--1. "M1_MONI_MODE1,ISP_ch1_ispin0 Monitoring Mode Setting" "0: 24-bit mode for data from ISP_ch1 ispin0,1: 12-bit mode for data from ISP_ch1 ispin0,2: 20-bit mode for data from ISP_ch1 ispin0,3: 8-bit mode for data from ISP_ch1 ispin0"
line.long 0x18 "ISP_MONI_MODE1,"
hexmask.long.byte 0x18 26.--31. 1. "Reserved_26,Reserved"
newline
bitfld.long 0x18 24.--25. "M6_MONI_MODE1,ISP_ch1_ispout3 Monitoring Mode Setting" "0: 24-bit mode for data from ISP_ch1 ispout3,1: 12-bit mode for data from ISP_ch1 ispout3,2: 20-bit mode for data from ISP_ch1 ispout3,3: 8-bit made for data from ISP_ch1 ispout3"
newline
hexmask.long.byte 0x18 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x18 16.--17. "M5_MONI_MODE1,ISP_ch1_ispout2 Monitoring Mode Setting" "0: 24-bit mode for data from ISP_ch1 ispout2,1: 12-bit mode for data from ISP_ch1 ispout2,2: 20-bit mode for data from ISP_ch1 ispout2,3: 8-bit made for data from ISP_ch1 ispout2"
newline
hexmask.long.byte 0x18 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x18 8.--9. "M4_MONI_MODE1,ISP_ch1_ispout1 Monitoring Mode Setting" "0: 24-bit mode for data from ISP_ch1 ispout1,1: 12-bit mode for data from ISP_ch1 ispout1,2: 20-bit mode for data from ISP_ch1 ispout1,3: 8-bit made for data from ISP_ch1 ispout1"
newline
hexmask.long.byte 0x18 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x18 0.--1. "M3_MONI_MODE1,ISP_ch1_ispout0 Monitoring Mode Setting" "0: 24-bit mode for data from ISP_ch1 ispout0,1: 12-bit mode for data from ISP_ch1 ispout0,2: 20-bit mode for data from ISP_ch1 ispout0,3: 8-bit mode for data from ISP_ch1 ispout0"
line.long 0x1C "MONI_ENABLE1_1,"
hexmask.long.byte 0x1C 24.--31. 1. "M6_TAGEN1_7_0,ISP_ch1_ispout3 Monitoring Enable"
newline
hexmask.long.byte 0x1C 16.--23. 1. "M5_TAGEN1_7_0,ISP_ch1_ispout2 Monitoring Enable"
newline
hexmask.long.byte 0x1C 8.--15. 1. "M4_TAGEN1_7_0,ISP_ch1_ispout1 Monitoring Enable"
newline
hexmask.long.byte 0x1C 0.--7. 1. "M3_TAGEN1_7_0,ISP_ch1_ispout0 Monitoring Enable"
rgroup.long 0x80++0x3
line.long 0x0 "INT_STATUS,"
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "INT_STATUS_17,Overflow of buffer holding data from ISP_ch1_ispin3" "0: No overflow,1: The buffer has overflowed"
newline
bitfld.long 0x0 16. "INT_STATUS_16,Overflow of buffer holding data from ISP_ch1_ispin2" "0: No overflow,1: The buffer has overflowed"
newline
bitfld.long 0x0 15. "INT_STATUS_15,Overflow of buffer holding data from ISP_ch0_ispin3" "0: No overflow,1: The buffer has overflowed"
newline
bitfld.long 0x0 14. "INT_STATUS_14,Overflow of buffer holding data from ISP_ch0_ispin2" "0: No overflow,1: The buffer has overflowed"
newline
bitfld.long 0x0 13. "INT_STATUS_13,Overflow of buffer holding data from ISP_ch1_ispout3" "0: No overflow,1: The buffer has overflowed"
newline
bitfld.long 0x0 12. "INT_STATUS_12,Overflow of buffer holding data from ISP_ch1_ispout2" "0: No overflow,1: The buffer has overflowed"
newline
bitfld.long 0x0 11. "INT_STATUS_11,Overflow of buffer holding data from ISP_ch1_ispout1" "0: No overflow,1: The buffer has overflowed"
newline
bitfld.long 0x0 10. "INT_STATUS_10,Overflow of buffer holding data from ISP_ch1_ispout0" "0: No overflow,1: The buffer has overflowed"
newline
bitfld.long 0x0 9. "INT_STATUS_9,Overflow of buffer holding data from ISP_ch1_ispin1" "0: No overflow,1: The buffer has overflowed"
newline
bitfld.long 0x0 8. "INT_STATUS_8,Overflow of buffer holding data from ISP_ch1_ispin0" "0: No overflow,1: The buffer has overflowed"
newline
bitfld.long 0x0 7. "INT_STATUS_7,Overflow of buffer holding data from ISP_ch0_ispout3" "0: No overflow,1: The buffer has overflowed"
newline
bitfld.long 0x0 6. "INT_STATUS_6,Overflow of buffer holding data from ISP_ch0_ispout2" "0: No overflow,1: The buffer has overflowed"
newline
bitfld.long 0x0 5. "INT_STATUS_5,Overflow of buffer holding data from ISP_ch0_ispout1" "0: No overflow,1: The buffer has overflowed"
newline
bitfld.long 0x0 4. "INT_STATUS_4,Overflow of buffer holding data from ISP_ch0_ispout0" "0: No overflow,1: The buffer has overflowed"
newline
bitfld.long 0x0 3. "INT_STATUS_3,Overflow of buffer holding data from ISP_ch0_ispin1" "0: No overflow,1: The buffer has overflowed"
newline
bitfld.long 0x0 2. "INT_STATUS_2,Overflow of buffer holding data from ISP_ch0_ispin0" "0: No overflow,1: The buffer has overflowed"
newline
bitfld.long 0x0 1. "INT_STATUS_1,Overflow of buffer in the MTIRI" "0: No overflow,1: The buffer has overflowed"
newline
bitfld.long 0x0 0. "INT_STATUS_0,bresp error (AXI slave error or AXI decoding error) in the MTIRI" "0: No error,1: An error has occurred"
group.long 0x84++0x3
line.long 0x0 "INT_ENABLE,"
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "INT_ENABLE_17,Overflow of buffer holding data from ISP_ch1_ispin3" "0: The interrupt request is masked,1: The interrupt request is not masked"
newline
bitfld.long 0x0 16. "INT_ENABLE_16,Overflow of buffer holding data from ISP_ch1_ispin2" "0: The interrupt request is masked,1: The interrupt request is not masked"
newline
bitfld.long 0x0 15. "INT_ENABLE_15,Overflow of buffer holding data from ISP_ch0_ispin3" "0: The interrupt request is masked,1: The interrupt request is not masked"
newline
bitfld.long 0x0 14. "INT_ENABLE_14,Overflow of buffer holding data from ISP_ch0_ispin2" "0: The interrupt request is masked,1: The interrupt request is not masked"
newline
bitfld.long 0x0 13. "INT_ENABLE_13,Overflow of buffer holding data from ISP_ch1_ispout3" "0: The interrupt request is masked,1: The interrupt request is not masked"
newline
bitfld.long 0x0 12. "INT_ENABLE_12,Overflow of buffer holding data from ISP_ch1_ispout2" "0: The interrupt request is masked,1: The interrupt request is not masked"
newline
bitfld.long 0x0 11. "INT_ENABLE_11,Overflow of buffer holding data from ISP_ch1_ispout1" "0: The interrupt request is masked,1: The interrupt request is not masked"
newline
bitfld.long 0x0 10. "INT_ENABLE_10,Overflow of buffer holding data from ISP_ch1_ispout0" "0: The interrupt request is masked,1: The interrupt request is not masked"
newline
bitfld.long 0x0 9. "INT_ENABLE_9,Overflow of buffer holding data from ISP_ch1_ispin1" "0: The interrupt request is masked,1: The interrupt request is not masked"
newline
bitfld.long 0x0 8. "INT_ENABLE_8,Overflow of buffer holding data from ISP_ch1_ispin0" "0: The interrupt request is masked,1: The interrupt request is not masked"
newline
bitfld.long 0x0 7. "INT_ENABLE_7,Overflow of buffer holding data from ISP_ch0_ispout3" "0: The interrupt request is masked,1: The interrupt request is not masked"
newline
bitfld.long 0x0 6. "INT_ENABLE_6,Overflow of buffer holding data from ISP_ch0_ispout2" "0: The interrupt request is masked,1: The interrupt request is not masked"
newline
bitfld.long 0x0 5. "INT_ENABLE_5,Overflow of buffer holding data from ISP_ch0_ispout1" "0: The interrupt request is masked,1: The interrupt request is not masked"
newline
bitfld.long 0x0 4. "INT_ENABLE_4,Overflow of buffer holding data from ISP_ch0_ispout0" "0: The interrupt request is masked,1: The interrupt request is not masked"
newline
bitfld.long 0x0 3. "INT_ENABLE_3,Overflow of buffer holding data from ISP_ch0_ispin1" "0: The interrupt request is masked,1: The interrupt request is not masked"
newline
bitfld.long 0x0 2. "INT_ENABLE_2,Overflow of buffer holding data from ISP_ch0_ispin0" "0: The interrupt request is masked,1: The interrupt request is not masked"
newline
bitfld.long 0x0 1. "INT_ENABLE_1,Overflow of buffer in the MTIRI" "0: The interrupt request is masked,1: The interrupt request is not masked"
newline
bitfld.long 0x0 0. "INT_ENABLE_0,bresp error in the MTIRI" "0: The interrupt request is masked,1: The interrupt request is not masked"
wgroup.long 0x88++0x3
line.long 0x0 "INT_CLEAR,"
hexmask.long.word 0x0 18.--31. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "INT_CLEAR_17,Overflow of buffer holding data from ISP_ch1_ispin3" "?,1: The corresponding bit in the interrupt status.."
newline
bitfld.long 0x0 16. "INT_CLEAR_16,Overflow of buffer holding data from ISP_ch1_ispin2" "?,1: The corresponding bit in the interrupt status.."
newline
bitfld.long 0x0 15. "INT_CLEAR_15,Overflow of buffer holding data from ISP_ch0_ispin3" "?,1: The corresponding bit in the interrupt status.."
newline
bitfld.long 0x0 14. "INT_CLEAR_14,Overflow of buffer holding data from ISP_ch0_ispin2" "?,1: The corresponding bit in the interrupt status.."
newline
bitfld.long 0x0 13. "INT_CLEAR_13,Overflow of buffer holding data from ISP_ch1_ispout3" "?,1: The corresponding bit in the interrupt status.."
newline
bitfld.long 0x0 12. "INT_CLEAR_12,Overflow of buffer holding data from ISP_ch1_ispout2" "?,1: The corresponding bit in the interrupt status.."
newline
bitfld.long 0x0 11. "INT_CLEAR_11,Overflow of buffer holding data from ISP_ch1_ispout1" "?,1: The corresponding bit in the interrupt status.."
newline
bitfld.long 0x0 10. "INT_CLEAR_10,Overflow of buffer holding data from ISP_ch1_ispout0" "?,1: The corresponding bit in the interrupt status.."
newline
bitfld.long 0x0 9. "INT_CLEAR_9,Overflow of buffer holding data from ISP_ch1_ispin1" "?,1: The corresponding bit in the interrupt status.."
newline
bitfld.long 0x0 8. "INT_CLEAR_8,Overflow of buffer holding data from ISP_ch1_ispin0" "?,1: The corresponding bit in the interrupt status.."
newline
bitfld.long 0x0 7. "INT_CLEAR_7,Overflow of buffer holding data from ISP_ch0_ispout3" "?,1: The corresponding bit in the interrupt status.."
newline
bitfld.long 0x0 6. "INT_CLEAR_6,Overflow of buffer holding data from ISP_ch0_ispout2" "?,1: The corresponding bit in the interrupt status.."
newline
bitfld.long 0x0 5. "INT_CLEAR_5,Overflow of buffer holding data from ISP_ch0_ispout1" "?,1: The corresponding bit in the interrupt status.."
newline
bitfld.long 0x0 4. "INT_CLEAR_4,Overflow of buffer holding data from ISP_ch0_ispout0" "?,1: The corresponding bit in the interrupt status.."
newline
bitfld.long 0x0 3. "INT_CLEAR_3,Overflow of buffer holding data from ISP_ch0_ispin1" "?,1: The corresponding bit in the interrupt status.."
newline
bitfld.long 0x0 2. "INT_CLEAR_2,Overflow of buffer holding data from ISP_ch0_ispin0" "?,1: The corresponding bit in the interrupt status.."
newline
bitfld.long 0x0 1. "INT_CLEAR_1,Overflow of buffer in the MTIRI1" "?,1: The corresponding bit in the interrupt status.."
newline
bitfld.long 0x0 0. "INT_CLEAR_0,bresp error in the MTIRI1" "?,1: The corresponding bit in the interrupt status.."
group.long 0x100++0x7
line.long 0x0 "AWADDR_SET_S,"
hexmask.long 0x0 0.--31. 1. "AWADDR_SET_S_31_0,AWADDR address for sync(VSYNC  HSYNC)"
line.long 0x4 "AWADDR_SET_D,"
hexmask.long 0x4 0.--31. 1. "AWADDR_SET_D_31_0,AWADDR address for data"
group.long 0x204++0x23
line.long 0x0 "MTIRI_REG_RESERVE,"
hexmask.long 0x0 0.--31. 1. "Reserved_0,Reserved"
line.long 0x4 "MONI_LEN1,"
hexmask.long.word 0x4 23.--31. 1. "Reserved_23,Reserved"
newline
hexmask.long.byte 0x4 16.--22. 1. "CH0_MON2_W_LEN_MAX_6_0,Data Storage Size Setting for ISP_ch0_ispin1"
newline
hexmask.long.word 0x4 7.--15. 1. "Reserved_7,Reserved"
newline
hexmask.long.byte 0x4 0.--6. 1. "CH0_MON1_W_LEN_MAX_6_0,Data Storage Size Setting for ISP_ch0_ispin0"
line.long 0x8 "MONI_LEN2,"
hexmask.long.word 0x8 23.--31. 1. "Reserved_23,Reserved"
newline
hexmask.long.byte 0x8 16.--22. 1. "CH0_MON4_W_LEN_MAX_6_0,Data Storage Size Setting for ISP_ch0_ispout1"
newline
hexmask.long.word 0x8 7.--15. 1. "Reserved_7,Reserved"
newline
hexmask.long.byte 0x8 0.--6. 1. "CH0_MON3_W_LEN_MAX_6_0,Data Storage Size Setting for ISP_ch0_ispout0"
line.long 0xC "MONI_LEN3,"
hexmask.long.word 0xC 23.--31. 1. "Reserved_23,Reserved"
newline
hexmask.long.byte 0xC 16.--22. 1. "CH0_MON6_W_LEN_MAX_6_0,Data Storage Size Setting for ISP_ch0_ispout3"
newline
hexmask.long.word 0xC 7.--15. 1. "Reserved_7,Reserved"
newline
hexmask.long.byte 0xC 0.--6. 1. "CH0_MON5_W_LEN_MAX_6_0,Data Storage Size Setting for ISP_ch0_ispout2"
line.long 0x10 "MONI_LEN4,"
hexmask.long.word 0x10 23.--31. 1. "Reserved_23,Reserved"
newline
hexmask.long.byte 0x10 16.--22. 1. "CH1_MON2_W_LEN_MAX_6_0,Data Storage Size Setting for ISP_ch1_ispin1"
newline
hexmask.long.word 0x10 7.--15. 1. "Reserved_7,Reserved"
newline
hexmask.long.byte 0x10 0.--6. 1. "CH1_MON1_W_LEN_MAX_6_0,Data Storage Size Setting for ISP_ch1_ispin0"
line.long 0x14 "MONI_LEN5,"
hexmask.long.word 0x14 23.--31. 1. "Reserved_23,Reserved"
newline
hexmask.long.byte 0x14 16.--22. 1. "CH1_MON4_W_LEN_MAX_6_0,Data Storage Size Setting for ISP_ch1_ispout1"
newline
hexmask.long.word 0x14 7.--15. 1. "Reserved_7,Reserved"
newline
hexmask.long.byte 0x14 0.--6. 1. "CH1_MON3_W_LEN_MAX_6_0,Data Storage Size Setting for ISP_ch1_ispout0"
line.long 0x18 "MONI_LEN6,"
hexmask.long.word 0x18 23.--31. 1. "Reserved_23,Reserved"
newline
hexmask.long.byte 0x18 16.--22. 1. "CH1_MON6_W_LEN_MAX_6_0,Data Storage Size Setting for ISP_ch1_ispout3"
newline
hexmask.long.word 0x18 7.--15. 1. "Reserved_7,Reserved"
newline
hexmask.long.byte 0x18 0.--6. 1. "CH1_MON5_W_LEN_MAX_6_0,Data Storage Size Setting for ISP_ch1_ispout2"
line.long 0x1C "MONI_LEN7,"
hexmask.long.word 0x1C 23.--31. 1. "Reserved_23,Reserved"
newline
hexmask.long.byte 0x1C 16.--22. 1. "CH0_MON8_W_LEN_MAX_6_0,Data Storage Size Setting for ISP_ch0_ispin3"
newline
hexmask.long.word 0x1C 7.--15. 1. "Reserved_7,Reserved"
newline
hexmask.long.byte 0x1C 0.--6. 1. "CH0_MON7_W_LEN_MAX_6_0,Data Storage Size Setting for ISP_ch0_ispin2"
line.long 0x20 "MONI_LEN8,"
hexmask.long.word 0x20 23.--31. 1. "Reserved_23,Reserved"
newline
hexmask.long.byte 0x20 16.--22. 1. "CH1_MON8_W_LEN_MAX_6_0,Data Storage Size Setting for ISP_ch1_ispin3"
newline
hexmask.long.word 0x20 7.--15. 1. "Reserved_7,Reserved"
newline
hexmask.long.byte 0x20 0.--6. 1. "CH1_MON7_W_LEN_MAX_6_0,Data Storage Size Setting for ISP_ch1_ispin2"
rgroup.long 0x300++0x4F
line.long 0x0 "SIG_COUNT1,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "SIG_COUNT1_15_0,Number of times data were transferred from ISP_ch0_ispin0"
line.long 0x4 "SIG_COUNT2,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x4 0.--15. 1. "SIG_COUNT2_15_0,Number of times data were transferred from ISP_ch0_ispin1"
line.long 0x8 "SIG_COUNT3,"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8 0.--15. 1. "SIG_COUNT3_15_0,Number of times data were transferred from ISP_ch0_ispout0"
line.long 0xC "SIG_COUNT4,"
hexmask.long.word 0xC 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0xC 0.--15. 1. "SIG_COUNT4_15_0,Number of times data were transferred from ISP_ch0_ispout1"
line.long 0x10 "SIG_COUNT5,"
hexmask.long.word 0x10 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x10 0.--15. 1. "SIG_COUNT5_15_0,Number of times data were transferred from ISP_ch0_ispout2"
line.long 0x14 "SIG_COUNT6,"
hexmask.long.word 0x14 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x14 0.--15. 1. "SIG_COUNT6_15_0,Number of times data were transferred from ISP_ch0_ispout3"
line.long 0x18 "SIG_COUNT7,"
hexmask.long.word 0x18 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x18 0.--15. 1. "SIG_COUNT7_15_0,Number of times data were transferred from ISP_ch1_ispin0"
line.long 0x1C "SIG_COUNT8,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x1C 0.--15. 1. "SIG_COUNT8_15_0,Number of times data were transferred from ISP_ch1_ispin1"
line.long 0x20 "SIG_COUNT9,"
hexmask.long.word 0x20 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x20 0.--15. 1. "SIG_COUNT9_15_0,Number of times data were transferred from ISP_ch1_ispout0"
line.long 0x24 "SIG_COUNT10,"
hexmask.long.word 0x24 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x24 0.--15. 1. "SIG_COUNT10_15_0,Number of times data were transferred from ISP_ch1_ispout1"
line.long 0x28 "SIG_COUNT11,"
hexmask.long.word 0x28 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x28 0.--15. 1. "SIG_COUNT11_15_0,Number of times data were transferred from ISP_ch1_ispout2"
line.long 0x2C "SIG_COUNT12,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x2C 0.--15. 1. "SIG_COUNT12_15_0,Number of times data were transferred from ISP_ch1_ispout3"
line.long 0x30 "SIG_COUNT13,"
hexmask.long.word 0x30 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x30 0.--15. 1. "SIG_COUNT13_15_0,Total number of times data were transferred to the MTI1 block"
line.long 0x34 "SIG_COUNT14,"
hexmask.long.word 0x34 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x34 0.--15. 1. "SIG_COUNT14_15_0,Number of times the MTIRI1 received data"
line.long 0x38 "SIG_COUNT15,"
hexmask.long.word 0x38 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x38 0.--15. 1. "SIG_COUNT15_15_0,Number of times the MTIRI1 transmitted data"
line.long 0x3C "SIG_COUNT16,"
hexmask.long 0x3C 0.--31. 1. "Reserved_0,Reserved"
line.long 0x40 "SIG_COUNT17,"
hexmask.long.word 0x40 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x40 0.--15. 1. "SIG_COUNT17_15_0,Number of times data were transferred from ISP_ch0_ispin2"
line.long 0x44 "SIG_COUNT18,"
hexmask.long.word 0x44 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x44 0.--15. 1. "SIG_COUNT18_15_0,Number of times data were transferred from ISP_ch0_ispin3"
line.long 0x48 "SIG_COUNT19,"
hexmask.long.word 0x48 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x48 0.--15. 1. "SIG_COUNT19_15_0,Number of times data were transferred from ISP_ch1_ispin2"
line.long 0x4C "SIG_COUNT20,"
hexmask.long.word 0x4C 16.--31. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x4C 0.--15. 1. "SIG_COUNT20_15_0,Number of times data were transferred from ISP_ch1_ispin3"
group.long 0x380++0x3
line.long 0x0 "SIG_COUNT_HOLD,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "HOLD,0:read value SIG_COUNT1-15 register" "0: read value SIG_COUNT1-15 register,1: hold value SIG_COUNT1-15 register"
group.long 0x400++0xF
line.long 0x0 "DEBUG_MODE,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "TVALID_FORCE,1: Sets the mti_tvalid1 signal to 1." "?,1: Sets the mti_tvalid1 signal to 1"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "OVF_FORCE,1: Sets the mti_common_ovf_err1 signal to 1." "?,1: Sets the mti_common_ovf_err1 signal to 1"
line.long 0x4 "DEBUG_DATA1,"
hexmask.long 0x4 0.--31. 1. "DEBUG_DATA1,Sets the mti_tdata1[31:0] signal."
line.long 0x8 "DEBUG_DATA2,"
hexmask.long 0x8 0.--31. 1. "DEBUG_DATA2,Sets the mti_tdata1[63:32] signal."
line.long 0xC "DEBUG_ADDR,"
hexmask.long.tbyte 0xC 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0xC 0.--7. 1. "DEBUG_ADDR_7_0,Sets the mti_taddr1[7:0] signal."
wgroup.long 0xFB0++0x3
line.long 0x0 "LOCKACCESS,"
hexmask.long 0x0 0.--31. 1. "LOCKACCESS,LOCKACCESS"
rgroup.long 0xFB4++0x3
line.long 0x0 "LOCKSTATUS,"
hexmask.long 0x0 0.--31. 1. "LOCKSTATUS,LOCKSTATUS"
rgroup.long 0xFD0++0x2F
line.long 0x0 "Peripheral_ID4,"
hexmask.long 0x0 0.--31. 1. "Peripheral_ID4,Peripheral_ID4 bit"
line.long 0x4 "Peripheral_ID5,"
hexmask.long 0x4 0.--31. 1. "Reserved_0,Reserved"
line.long 0x8 "Peripheral_ID6,"
hexmask.long 0x8 0.--31. 1. "Reserved_0,Reserved"
line.long 0xC "Peripheral_ID7,"
hexmask.long 0xC 0.--31. 1. "Reserved_0,Reserved"
line.long 0x10 "Peripheral_ID0,"
hexmask.long.tbyte 0x10 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x10 0.--7. 1. "Part_No0,-"
line.long 0x14 "Peripheral_ID1,"
hexmask.long.tbyte 0x14 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x14 4.--7. 1. "JEP106_ID_code_3_0,-"
newline
hexmask.long.byte 0x14 0.--3. 1. "Part_No1,-"
line.long 0x18 "Peripheral_ID2,"
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x18 4.--7. 1. "Rev,-"
newline
bitfld.long 0x18 3. "ID2_Bit3,-" "0,1"
newline
bitfld.long 0x18 0.--2. "JEP106_ID_code_6_4,-" "0,1,2,3,4,5,6,7"
line.long 0x1C "Peripheral_ID3,"
hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x1C 4.--7. 1. "RevAnd,-"
newline
hexmask.long.byte 0x1C 0.--3. 1. "CustomerModified,-"
line.long 0x20 "Component_ID0,"
hexmask.long.tbyte 0x20 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x20 0.--7. 1. "Preamble,-"
line.long 0x24 "Component_ID1,"
hexmask.long.tbyte 0x24 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x24 4.--7. 1. "Component_class,-"
newline
hexmask.long.byte 0x24 0.--3. 1. "Preamble,-"
line.long 0x28 "Component_ID2,"
hexmask.long.tbyte 0x28 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x28 0.--7. 1. "Preamble,-"
line.long 0x2C "Component_ID3,"
hexmask.long.tbyte 0x2C 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x2C 0.--7. 1. "Preamble,-"
tree.end
tree "OTP_MEM (One Time Programmable Memory)"
base ad:0x0
tree "OTP_MEM_0"
base ad:0xE61BE000
group.long 0x0++0xB
line.long 0x0 "OTPWCONF,This register controls the OTP_MEM writing sequence."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "write_start,Start to write OTP_MEM" "0: idle,1: start to write"
line.long 0x4 "OTPWADDR,This register sets write address of the OTP_MEM writing sequence."
hexmask.long 0x4 0.--31. 1. "write_address,OTP_MEM Write Address."
line.long 0x8 "OTPWDATA,This register sets write data of the OTP_MEM writing sequence."
hexmask.long 0x8 0.--31. 1. "write_data,OTP_MEM Write Data"
rgroup.long 0xC++0x3
line.long 0x0 "OTPWSTATUS,This register shows the status of the OTP_MEM writing sequence."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "blank_check_error,0 : no error" "0: no error,1: write data is not 1"
newline
bitfld.long 0x0 19. "keycode_error,Register double_quotationOTPKEYCODEdouble_quotation is not 0xA7141222. Register OTPKEYCODE should be 0xA7141222 before writing OTP_MEM." "0,1"
bitfld.long 0x0 18. "addr_check_error,Register double_quotationOTPWADDRdouble_quotation is not region from 0x00000000 to 0x000001FF." "0,1"
newline
bitfld.long 0x0 17. "MPR_error,This bit shows that MPR corresponding to write address has written or not." "0: MPR bit has not been written,1: MPR bit has been written"
bitfld.long 0x0 16. "double_write_error,0 : no error" "0: no error,1: write data has been already written to write.."
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "write_end,This bit shows that the write sequence is end" "0: not end,1: end of writing"
newline
bitfld.long 0x0 0. "write_busy,This bit shows that the write sequence is idle or not" "0: idle,1: under writing"
group.long 0x10++0x3
line.long 0x0 "OTPKEYCODE,This register sets write data of the OTP_MEM writing sequence."
hexmask.long 0x0 0.--31. 1. "keycode,Write 0xA7141222 to this register before starting to write OTP_MEM."
group.long 0x40++0x7
line.long 0x0 "OTPRCONF,This register controls the OTP_MEM reading sequence."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "read_start,Start to read OTP_MEM" "0: idle,1: start to read"
line.long 0x4 "OTPRADDR,This register sets read address of the OTP_MEM writing sequence."
hexmask.long 0x4 0.--31. 1. "read_address,OTP_MEM Read Address."
rgroup.long 0x48++0x7
line.long 0x0 "OTPRDATA,This register shows read data from OTP_MEM."
hexmask.long 0x0 0.--31. 1. "read_data,OTP_MEM Read Data"
line.long 0x4 "OTPRSTATUS,This register shows the status of the OTP_MEM reading sequence."
hexmask.long.word 0x4 19.--31. 1. "Reserved_19,Reserved"
bitfld.long 0x4 18. "addr_check_error,Register double_quotationOTPRADDRdouble_quotation is not region from 0x00000000 to 0x000001FF." "0,1"
newline
bitfld.long 0x4 17. "MPR_error,This bit shows that MPR corresponding to read address has written or not." "0: MPR bit has not been written,1: MPR bit has been written"
bitfld.long 0x4 16. "data_check_error,read data check error by ECC or TMR" "0: not corrupted,1: corrupted"
newline
hexmask.long.word 0x4 2.--15. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "read_end,This bit shows that the read sequence is end" "0: not end,1: end of reading"
newline
bitfld.long 0x4 0. "read_busy,This bit shows that the read sequence is idle or not" "0: idle,1: under reading"
group.long 0x80++0x3
line.long 0x0 "OTPTESTCONF,This register sets the condition of OTP_MEM test."
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.byte 0x0 8.--11. 1. "test_mode_sel,Set to OTP mode select for test"
newline
bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
bitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "Reserved_4,Reserved" "0,1"
bitfld.long 0x0 3. "test_margin_read_mode,Set to margin read mode" "0: no margin read mode,1: margin read mode"
newline
bitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
bitfld.long 0x0 1. "test_mode,Set to test mode" "0: no test mode,1: test mode"
newline
bitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x90++0x3
line.long 0x0 "OTPTESTRADDR,This register sets the condition of OTP_MEM test."
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
hexmask.long.word 0x0 0.--8. 1. "test_read_address,OTP_MEM Read Address for test."
rgroup.long 0x94++0xB
line.long 0x0 "OTPTESTRUDATA,This register sets the condition of OTP_MEM test."
hexmask.long 0x0 7.--31. 1. "Reserved_7,Reserved"
hexmask.long.byte 0x0 0.--6. 1. "test_read_upper_data,OTP_MEM Read upper Data for test."
line.long 0x4 "OTPTESTRLDATA,This register sets the condition of OTP_MEM test."
hexmask.long 0x4 0.--31. 1. "test_read_lower_data,OTP_MEM Read lower Data for test."
line.long 0x8 "OTPTESTSTATUS,Reserved"
hexmask.long 0x8 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0x8 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x8 2. "test_read_addr_check_error,Register double_quotationOTPTESTRADDRdouble_quotation is not region from 0x00000000 to 0x000001FF." "0,1"
bitfld.long 0x8 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.long 0x8 0. "Reserved_0,Reserved" "0,1"
tree.end
tree "OTP_MEM_1"
base ad:0xE61BF000
group.long 0x60++0x3
line.long 0x0 "OTPERRSTATUS,This register sets the condition of OTP error status for FuSa."
hexmask.long 0x0 7.--31. 1. "Reserved_7,Reserved"
bitfld.long 0x0 6. "DCLS_OTP_CNTRL,Error Status of DCLS comparator for OTP Controller." "0: No effect,1: Clear error"
newline
bitfld.long 0x0 5. "DCLS_APB,Error Status of DCLS comparator for APB I/F." "0: No effect,1: Clear error"
bitfld.long 0x0 4. "bit_chk_security,Error Status of copy bit check for security." "0: No effect,1: Clear error"
newline
bitfld.long 0x0 3. "bit_chk_safety,Error Status of copy bit check for safety." "0: No effect,1: Clear error"
bitfld.long 0x0 2. "Maj_check,Error Status of Majority check." "0: No effect,1: Clear error"
newline
bitfld.long 0x0 1. "ECC_uncorr,Error Status of ECC uncorrectable error." "0: No effect,1: Clear error"
bitfld.long 0x0 0. "ECC_corr,Error Status of ECC correctable error." "0: No effect,1: Clear error"
group.long 0x70++0x3
line.long 0x0 "OTPERRINJ,This register sets the condition of OTP error injection for FuSa."
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x0 10. "Reserved_10,Reserved" "0,1"
newline
bitfld.long 0x0 9. "Reserved_9,Reserved" "0,1"
bitfld.long 0x0 8. "Reserved_8,Reserved" "0,1"
newline
bitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
bitfld.long 0x0 6. "DCLS_OTP_CNTRL_inj,error Injection of DCLS comparator for OTP controller" "0: Disable Error Injection,1: Enable Error Injection"
newline
bitfld.long 0x0 5. "DCLS_APB_inj,error Injection of DCLS comparator for APB I/F" "0: Disable Error Injection,1: Enable Error Injection"
bitfld.long 0x0 4. "bit_chk_security_inj,error Injection of copy bit check for security" "0: Disable Error Injection,1: Enable Error Injection"
newline
bitfld.long 0x0 3. "bit_chk_safety_inj,error Injection of copy bit check for safety" "0: Disable Error Injection,1: Enable Error Injection"
bitfld.long 0x0 2. "Maj_check_inj,Error Injection of Majority check" "0: Disable Error Injection,1: Enable Error Injection"
newline
bitfld.long 0x0 1. "ECC_uncorr_inj,Error Injection of ECC uncorrectable error" "0: Disable Error Injection,1: Enable Error Injection"
bitfld.long 0x0 0. "ECC_corr_inj,Error Injection of ECC correctable error" "0: Disable Error Injection,1: Enable Error Injection"
rgroup.long 0x100++0x3
line.long 0x0 "OTPMONITOR0,Reserved"
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "otpmonitor0_9,This bit is always read as 0." "0,1"
newline
bitfld.long 0x0 8. "otpmonitor0_8,This bit is always read as 0." "0,1"
bitfld.long 0x0 7. "otpmonitor0_7,This bit is always read as 0." "0,1"
newline
bitfld.long 0x0 6. "otpmonitor0_6,GPU disable" "0: GPU function operation,1: GPU function stop"
bitfld.long 0x0 5. "otpmonitor0_5,This bit is always read as 0." "0,1"
newline
bitfld.long 0x0 4. "otpmonitor0_4,This bit is always read as 0." "0,1"
bitfld.long 0x0 3. "otpmonitor0_3,This bit is always read as 0." "0,1"
newline
bitfld.long 0x0 2. "otpmonitor0_2,This bit is always read as 0." "0,1"
bitfld.long 0x0 1. "otpmonitor0_1,This bit is always read as 0." "0,1"
newline
bitfld.long 0x0 0. "otpmonitor0_0,This bit is always read as 0." "0,1"
rgroup.long 0x10C++0x3
line.long 0x0 "OTPMONITOR3,Reserved"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
bitfld.long 0x0 5. "otpmonitor3_5,Control signal of external power supply IC. (copy_bit)" "0: Pull-down,1: Pull-up"
newline
bitfld.long 0x0 4. "otpmonitor3_4,Control signal of external power supply IC." "0: Pull-down,1: Pull-up"
bitfld.long 0x0 3. "otpmonitor3_3,Control signal of external power supply IC. (copy_bit)" "0: Pull-down,1: Pull-up"
newline
bitfld.long 0x0 2. "otpmonitor3_2,Control signal of external power supply IC." "0: Pull-down,1: Pull-up"
bitfld.long 0x0 1. "otpmonitor3_1,This bit is always read as 0." "0,1"
newline
bitfld.long 0x0 0. "otpmonitor3_0,This bit is always read as 0." "0,1"
rgroup.long 0x170++0x3
line.long 0x0 "OTPMONITOR28,This register reads the OTP bits for monitor."
hexmask.long 0x0 3.--31. 1. "otpmonitor28_31_3,Reserved"
bitfld.long 0x0 0.--2. "otpmonitor28_2_0,Key revocation code." "0,1,2,3,4,5,6,7"
rgroup.long 0x180++0x1F
line.long 0x0 "OTPMONITOR32,This register reads the OTP bits for monitor."
hexmask.long 0x0 0.--31. 1. "otpmonitor32_31_0,TFMV for the minimum version table[31:0]"
line.long 0x4 "OTPMONITOR33,This register reads the OTP bits for monitor."
hexmask.long 0x4 0.--31. 1. "otpmonitor33_31_0,TFMV for the minimum version table[63:32]"
line.long 0x8 "OTPMONITOR34,This register reads the OTP bits for monitor."
hexmask.long 0x8 0.--31. 1. "otpmonitor34_31_0,TFMV for the minimum version table[95:64]"
line.long 0xC "OTPMONITOR35,This register reads the OTP bits for monitor."
hexmask.long 0xC 0.--31. 1. "otpmonitor35_31_0,TFMV for the minimum version table[127:96]"
line.long 0x10 "OTPMONITOR36,This register reads the OTP bits for monitor."
hexmask.long 0x10 0.--31. 1. "otpmonitor36_31_0,NTFMV for the minimum version table[31:0]"
line.long 0x14 "OTPMONITOR37,This register reads the OTP bits for monitor."
hexmask.long 0x14 0.--31. 1. "otpmonitor37_31_0,NTFMV for the minimum version table[63:32]"
line.long 0x18 "OTPMONITOR38,This register reads the OTP bits for monitor."
hexmask.long 0x18 0.--31. 1. "otpmonitor38_31_0,NTFMV for the minimum version table[95:64]"
line.long 0x1C "OTPMONITOR39,This register reads the OTP bits for monitor."
hexmask.long 0x1C 0.--31. 1. "otpmonitor39_31_0,NTFMV for the minimum version table[127:96]"
tree.end
tree.end
tree "PCIE (PCIe Controller)"
base ad:0xE65D0000
group.long 0x6200++0x1F
line.long 0x0 "PCIEMSR0,"
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved0,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x0 7.--8. "ELBI_MODE,Handshake between lbc_ext_cs and ext_lbc_ack" "0: return an error response,1: do not return an error response,?,?"
newline
bitfld.long 0x0 6. "app_sris_mode,SRIS operating mode." "0: non-SRIS mode,1: SRIS mode"
newline
hexmask.long.byte 0x0 2.--5. 1. "device_type,Device/port type."
newline
bitfld.long 0x0 0.--1. "Reserved1,These bits are read as 0. The write value must be 0." "0,1,2,3"
line.long 0x4 "PCIEMSR1,"
hexmask.long 0x4 2.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x4 1. "tx_lane_flip_en,Performs manual lane reversal for transmit lanes." "0,1"
newline
bitfld.long 0x4 0. "rx_lane_flip_en,Performs manual lane reversal for receive lanes." "0,1"
line.long 0x8 "PCIEMSR2,"
hexmask.long 0x8 2.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x8 1. "app_dbi_ro_wr_disable,DBI Read-only Write Disable." "0: PRTLGC58,1: PRTLGC58"
newline
bitfld.long 0x8 0. "app_req_retry_en,Provides a capability to defer incoming configuration requests until initialization is complete." "0,1"
line.long 0xC "PCIEMSR3,"
hexmask.long 0xC 0.--31. 1. "APB2DBITOSET,APB2DBI timeout setting"
line.long 0x10 "PCIERSTCTRL0,"
hexmask.long.byte 0x10 25.--31. 1. "Reserved0,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x10 24. "refclk_share_prop_en,pcie_clkreq_dis_in propagation enable." "0: Disable,1: Enable"
newline
hexmask.long.byte 0x10 17.--23. 1. "Reserved1,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x10 16. "perst_n,Indicates when the main power supply is within its tolerated voltage range and is stable." "0,1"
newline
hexmask.long.byte 0x10 9.--15. 1. "Reserved2,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x10 8. "refclk_share,Reference clock share bit." "0: Not Shared,1: Shared"
newline
hexmask.long.byte 0x10 0.--7. 1. "Reserved3,These bits are read as 0. The write value must be 0."
line.long 0x14 "PCIERSTCTRL1,"
hexmask.long.word 0x14 17.--31. 1. "Reserved0,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x14 16. "app_hold_phy_rst,Set this signal to 1 during the power on reset sequence to hold the PHY in reset while the PHY is configured through the PHY viewport." "0,1"
newline
hexmask.long.word 0x14 1.--15. 1. "Reserved1,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x14 0. "app_ltssm_enable,To do otherwise (that is  de-assert it outside of the Detect LTSSM state) causes the controller to be reset and the LTSSM moves immediately back to the Detect state. This transition is outside of the PCIe Specification and it might cause.." "0,1"
line.long 0x18 "PCIERSTCTRL2,"
hexmask.long 0x18 1.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x18 0. "app_init_rst,Request from your application to send a hot reset to the upstream port." "0,1"
line.long 0x1C "PCIERSTCTRL3,After writting 1 during the PCIERSTSTS.cfg_flr_pf_active =1. do not write double_quotation0double_quotation until it changes to double_quotation0double_quotation by the automatic clear."
hexmask.long 0x1C 2.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x1C 0.--1. "app_flr_pf_done,Assert 1 when your application has stopped / reset the PFx application to initiate FLR of PFx." "0,1,2,3"
rgroup.long 0x6220++0x3
line.long 0x0 "PCIERSTSTS,"
hexmask.long 0x0 6.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x0 4.--5. "cfg_flr_pf_active,Set when the software initiates FLR a physical function by writing to the double_quotationInitiate FLRdouble_quotation register bit of that function. This signal is held asserted until reset of both the application and controller logic.." "0,1,2,3"
newline
bitfld.long 0x0 3. "training_rst_n,Hot reset from upstream component." "0,1"
newline
bitfld.long 0x0 2. "smlh_req_rst_not,Early version of the link_req_rst_not signal." "0,1"
newline
bitfld.long 0x0 1. "link_req_rst_not,Reset request because the link has gone down or the controller received a hot-reset request." "0,1"
newline
bitfld.long 0x0 0. "cfg_2nd_reset,Secondary Bus Reset." "0,1"
group.long 0x6224++0xF
line.long 0x0 "MSICTRL0,"
hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x0 0. "ven_msi_req,Request from your application to send an MSI when MSI is enabled." "0,1"
line.long 0x4 "MSICTRL1,"
hexmask.long.tbyte 0x4 11.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
hexmask.long.byte 0x4 6.--10. 1. "ven_msi_vector,Used to modulate the lower five bits of the MSI Data register when multiple message mode is enabled."
newline
bitfld.long 0x4 3.--5. "ven_msi_tc,Traffic Class of the MSI request  valid when ven_msi_req is asserted" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 0.--2. "ven_msi_func_num,The function number of the MSI request." "0,1,2,3,4,5,6,7"
line.long 0x8 "MSICTRL2,"
hexmask.long 0x8 0.--31. 1. "cfg_msi_pending_lo,Lower bits [31:0]. Indication from application about which functions have a pending associated message."
line.long 0xC "MSICTRL3,"
hexmask.long 0xC 0.--31. 1. "cfg_msi_pending_hi,Upper bits [63:32]. Indication from application about which functions have a pending associated message"
rgroup.long 0x6234++0x7
line.long 0x0 "MSICTRL4,"
hexmask.long.byte 0x0 26.--31. 1. "Reserved0,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x0 24.--25. "cfg_msi_en,Indicates that MSI is enabled (INTx message is not sent)  one bit per configured function." "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--23. 1. "msi_ctrl_int_vec,DSP AXI MSI Interrupt Vector."
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved1,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x0 0. "ven_msi_grant,Indicates that the controller has accepted the request to send an MSI." "0,1"
line.long 0x4 "MSICTRL5,"
hexmask.long 0x4 0.--31. 1. "msi_ctrl_io,DSP AXI iMRM: Integrated MSI Reception Module GPIO."
group.long 0x623C++0x3
line.long 0x0 "PCIEMSGTX,"
hexmask.long.word 0x0 22.--31. 1. "Reserved0,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x0 20.--21. "cfg_send_f_err,Sent Fatal Error." "0,1,2,3"
newline
bitfld.long 0x0 18.--19. "cfg_send_nf_err,Sent Non-Fatal Error." "0,1,2,3"
newline
bitfld.long 0x0 16.--17. "cfg_send_cor_err,Sent Correctable Error." "0,1,2,3"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved1,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x0 0. "apps_pm_xmt_turnoff,Request from your application to generate a PM_Turn_Off message." "0,1"
rgroup.long 0x6240++0xF
line.long 0x0 "PCIEMSGRX0,"
hexmask.long 0x0 0.--31. 1. "radm_msg_payload,Lower bits [31:0]."
line.long 0x4 "PCIEMSGRX1,"
hexmask.long 0x4 0.--31. 1. "radm_msg_payload,Upper bits [63:32]."
line.long 0x8 "PCIEMSGRX2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
hexmask.long.word 0x8 0.--15. 1. "radm_msg_req_id,The requester ID of the received Message."
line.long 0xC "PCIEMSGRCPSTS,"
hexmask.long.tbyte 0xC 9.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0xC 8. "radm_msg_unlock,Indicates that the controller received an Unlock message." "0,1"
newline
bitfld.long 0xC 7. "radm_vendor_msg,Indicates the controller received a vendor-defined message." "0,1"
newline
bitfld.long 0xC 6. "radm_pm_turnoff,Indicates that the controller received a PME Turnoff message." "0,1"
newline
bitfld.long 0xC 5. "radm_pm_to_ack,Indicates that the controller received a PME_TO_Ack message. Upstream port: Reserved." "0,1"
newline
bitfld.long 0xC 4. "radm_pm_pme,Indicates that the controller received a PM_PME message" "0,1"
newline
bitfld.long 0xC 3. "radm_fatal_err,Indicates that the controller received an ERR_FATAL message" "0,1"
newline
bitfld.long 0xC 2. "radm_nonfatal_err,Indicates that the controller received an ERR_NONFATAL message" "0,1"
newline
bitfld.long 0xC 1. "radm_correctable_err,Indicates that the controller received an ERR_COR message." "0,1"
newline
bitfld.long 0xC 0. "radm_msg_ltr,Indicates that the controller received an LTR message." "0,1"
group.long 0x6250++0x7
line.long 0x0 "PCIELTRMSGCTRL0,"
hexmask.long 0x0 5.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
rbitfld.long 0x0 4. "app_ltr_msg_grant,Indicates that the controller has accepted your request to send an LTR message." "0,1"
newline
bitfld.long 0x0 1.--3. "app_ltr_msg_func_num,Function number in your application that is requesting to send an LTR message." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0. "app_ltr_msg_req,Indicates that your application is requesting to send an LTR message." "0,1"
line.long 0x4 "PCIELTRMSGCTRL1,"
hexmask.long 0x4 0.--31. 1. "app_ltr_msg_latency,LTR message that your application is requesting to send."
group.long 0x6270++0x3
line.long 0x0 "PCIEPWRMNGCTRL,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved0,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x0 12. "app_l1sub_disable,The application can set this input to 1'b1 to prevent entry to L1" "0,1"
newline
bitfld.long 0x0 11. "app_clk_req_n,Indicates that the application logic is ready to have reference clock removed" "0,1"
newline
bitfld.long 0x0 10. "app_clk_pm_en,Clock PM feature enabled by application." "0,1"
newline
bitfld.long 0x0 9. "Reserved1,These bits are read as 0. The write value must be 0." "0,1"
newline
bitfld.long 0x0 8. "app_xfer_pending,Indicates that your application has transfers pending and prevents the controller from entering L1." "0,1"
newline
bitfld.long 0x0 7. "app_req_exit_l1,Application request to Exit L1." "0,1"
newline
bitfld.long 0x0 6. "app_ready_entr_l23,Application Ready to Enter L23." "0,1"
newline
bitfld.long 0x0 5. "app_req_entr_l1,Application request to Enter L1 ASPM state." "0,1"
newline
bitfld.long 0x0 4. "sys_aux_pwr_det,Auxiliary Power Detected." "0,1"
newline
bitfld.long 0x0 2.--3. "apps_pm_xmt_pme,Wake Up." "0,1,2,3"
newline
bitfld.long 0x0 0.--1. "outband_pwrup_cmd,Wake Up." "0,1,2,3"
rgroup.long 0x6274++0x13
line.long 0x0 "PCIEPWRMNGSTS0,"
hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x0 20. "pm_l1_entry_started,L1 entry process is in progress" "0,1"
newline
bitfld.long 0x0 19. "pm_linkst_l2_exit,Power management is exiting L2 state" "0,1"
newline
bitfld.long 0x0 18. "pm_linkst_in_l2,Power management is in L2 state" "0,1"
newline
bitfld.long 0x0 17. "pm_linkst_in_l1,Power management is in L1 state" "0,1"
newline
bitfld.long 0x0 16. "pm_linkst_in_l0s,Power management is in L0s state" "0,1"
newline
hexmask.long.byte 0x0 10.--15. 1. "pm_dstate,The current power management D-state of the function."
newline
bitfld.long 0x0 9. "wake,Wake Up." "0,1"
newline
hexmask.long.byte 0x0 3.--8. 1. "smlh_ltssm_state,Current state of the LTSSM."
newline
bitfld.long 0x0 0.--2. "pm_curnt_state,Indicates the current power state." "0,1,2,3,4,5,6,7"
line.long 0x4 "PCIEPWRMNGSTS1,"
hexmask.long.word 0x4 17.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x4 16. "cfg_l1sub_en,Indicates that any of the L1 Substates are enabled in the L1 Substates Control 1 Register." "0,1"
newline
bitfld.long 0x4 15. "pm_linkst_in_l1sub,Power management is in L1 substate." "0,1"
newline
bitfld.long 0x4 13.--14. "pm_status,PME Status bit from the PMCSR." "0,1,2,3"
newline
bitfld.long 0x4 10.--12. "pm_l1sub_state,Power management L1 sub-states FSM state" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 5.--9. 1. "pm_slave_state,Power management slave FSM state"
newline
hexmask.long.byte 0x4 0.--4. 1. "pm_master_state,Power management master FSM state"
line.long 0x8 "PCIEERRSTS0,"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x8 11. "if_timeout_status,Error Status if_timeout_status" "0,1"
newline
bitfld.long 0x8 9.--10. "cfg_sys_err_rc,Error Status cfg_sys_err_rc" "0,1,2,3"
newline
bitfld.long 0x8 6.--8. "app_parity_errs,Error Status app_parity_errs" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x8 5. "cfg_safety_uncorr,Error Status cfg_safety_uncorr" "0,1"
newline
bitfld.long 0x8 4. "cfg_safety_corr,Error Status cfg_safety_corr" "0,1"
newline
bitfld.long 0x8 2.--3. "surprise_down_err,Error Status surprise_down_err" "0,1,2,3"
newline
bitfld.long 0x8 1. "cdm_reg_chk_cmp_err,Error Status cdm_reg_chk_cmp_err" "0,1"
newline
bitfld.long 0x8 0. "cdm_reg_chk_logic_err,Error Status cdm_reg_chk_logic_err" "0,1"
line.long 0xC "PCIEERRSTS1,"
bitfld.long 0xC 30.--31. "Reserved,These bits are read as 0. The write value must be 0." "0,1,2,3"
newline
bitfld.long 0xC 29. "err_multpl_edma2ram_addra,Error Status edma2ram_addra" "0,1"
newline
bitfld.long 0xC 28. "err_multpl_edma2ram_addrb,Error Status edma2ram_addrb" "0,1"
newline
bitfld.long 0xC 27. "err_multpl_edmarbuff2ram_addra,Error Status edmarbuff2ram_addra" "0,1"
newline
bitfld.long 0xC 26. "err_multpl_edmarbuff2ram_addrb,Error Status edmarbuff2ram_addrb" "0,1"
newline
bitfld.long 0xC 25. "err_multpl_ib_mcpl_a2c_cdc_ram_addra,Error Status ib_mcpl_a2c_cdc_ram_addra" "0,1"
newline
bitfld.long 0xC 24. "err_multpl_ib_mcpl_a2c_cdc_ram_addrb,Error Status ib_mcpl_a2c_cdc_ram_addrb" "0,1"
newline
bitfld.long 0xC 23. "err_multpl_ib_mcpl_sb_ram_addra,Error Status ib_mcpl_sb_ram_addra" "0,1"
newline
bitfld.long 0xC 22. "err_multpl_ib_mcpl_sb_ram_addrb,Error Status ib_mcpl_sb_ram_addrb" "0,1"
newline
bitfld.long 0xC 21. "err_multpl_ib_rreq_c2a_cdc_ram_addra,Error Status ib_rreq_c2a_cdc_ram_addra" "0,1"
newline
bitfld.long 0xC 20. "err_multpl_ib_rreq_c2a_cdc_ram_addrb,Error Status ib_rreq_c2a_cdc_ram_addrb" "0,1"
newline
bitfld.long 0xC 19. "err_multpl_ib_rreq_ordr_ram_addra,Error Status ib_rreq_ordr_ram_addra" "0,1"
newline
bitfld.long 0xC 18. "err_multpl_ib_rreq_ordr_ram_addrb,Error Status ib_rreq_ordr_ram_addrb" "0,1"
newline
bitfld.long 0xC 17. "err_multpl_ib_wreq_c2a_cdc_ram_addra,Error Status ib_wreq_c2a_cdc_ram_addra" "0,1"
newline
bitfld.long 0xC 16. "err_multpl_ib_wreq_c2a_cdc_ram_addrb,Error Status ib_wreq_c2a_cdc_ram_addrb" "0,1"
newline
bitfld.long 0xC 15. "err_multpl_mstr_araddrp,Error Status mstr_araddrp" "0,1"
newline
bitfld.long 0xC 14. "err_multpl_mstr_awaddr,Error Status mstr_awaddr" "0,1"
newline
bitfld.long 0xC 13. "err_multpl_mstr_wdatap,Error Status mstr_wdatap" "0,1"
newline
bitfld.long 0xC 12. "err_multpl_ob_ccmp_data_ram_addra,Error Status ob_ccmp_data_ram_addra" "0,1"
newline
bitfld.long 0xC 11. "err_multpl_ob_ccmp_data_ram_addrb,Error Status ob_ccmp_data_ram_addrb" "0,1"
newline
bitfld.long 0xC 10. "err_multpl_ob_cpl_c2a_cdc_ram_addra,Error Status ob_cpl_c2a_cdc_ram_addra" "0,1"
newline
bitfld.long 0xC 9. "err_multpl_ob_cpl_c2a_cdc_ram_addrb,Error Status ob_cpl_c2a_cdc_ram_addrb" "0,1"
newline
bitfld.long 0xC 8. "err_multpl_ob_npdcmp_ram_addra,Error Status ob_npdcmp_ram_addra" "0,1"
newline
bitfld.long 0xC 7. "err_multpl_ob_npdcmp_ram_addrb,Error Status ob_npdcmp_ram_addrb" "0,1"
newline
bitfld.long 0xC 6. "err_multpl_ob_pdcmp_data_ram_addra,Error Status ob_pdcmp_data_ram_addra" "0,1"
newline
bitfld.long 0xC 5. "err_multpl_ob_pdcmp_data_ram_addrb,Error Status ob_pdcmp_data_ram_addrb" "0,1"
newline
bitfld.long 0xC 4. "err_multpl_ob_pdcmp_hdr_ram_addra,Error Status ob_pdcmp_hdr_ram_addra" "0,1"
newline
bitfld.long 0xC 3. "err_multpl_ob_pdcmp_hdr_ram_addrb,Error Status ob_pdcmp_hdr_ram_addrb" "0,1"
newline
bitfld.long 0xC 2. "err_multpl_slv_npw_sab_ram_addra,Error Status slv_npw_sab_ram_addra" "0,1"
newline
bitfld.long 0xC 1. "err_multpl_slv_npw_sab_ram_addrb,Error Status slv_npw_sab_ram_addrb" "0,1"
newline
bitfld.long 0xC 0. "err_multpl_slv_rdata,Error Status slv_rdata" "0,1"
line.long 0x10 "PCIEINTSTS0,"
bitfld.long 0x10 31. "Reserved,These bits are read as 0. The write value must be 0." "0,1"
newline
bitfld.long 0x10 29.--30. "cfg_aer_rc_err_msi,Interrupt Status cfg_aer_rc_err_msi" "0,1,2,3"
newline
bitfld.long 0x10 27.--28. "cfg_aer_rc_err_int,Interrupt Status cfg_aer_rc_err_int" "0,1,2,3"
newline
bitfld.long 0x10 26. "msi_ctrl_int,Interrupt Status msi_ctrl_int" "0,1"
newline
bitfld.long 0x10 25. "cfg_2nd_reset,Interrupt Status cfg_2nd_reset" "0,1"
newline
bitfld.long 0x10 24. "cfg_link_eq_req_int,Interrupt Status cfg_link_eq_req_int" "0,1"
newline
bitfld.long 0x10 23. "cfg_bw_mgt_msi,Interrupt Status cfg_bw_mgt_msi" "0,1"
newline
bitfld.long 0x10 22. "cfg_bw_mgt_int,Interrupt Status cfg_bw_mgt_int" "0,1"
newline
bitfld.long 0x10 21. "cfg_link_auto_bw_msi,Interrupt Status cfg_link_auto_bw_msi" "0,1"
newline
bitfld.long 0x10 20. "cfg_link_auto_bw_int,Interrupt Status cfg_link_auto_bw_int" "0,1"
newline
bitfld.long 0x10 18.--19. "hp_msi,Interrupt Status hp_msi" "0,1,2,3"
newline
bitfld.long 0x10 16.--17. "hp_int,Interrupt Status hp_int" "0,1,2,3"
newline
bitfld.long 0x10 14.--15. "hp_pme,Interrupt Status hp_pme" "0,1,2,3"
newline
bitfld.long 0x10 12.--13. "cfg_pme_msi,Interrupt Status cfg_pme_msi" "0,1,2,3"
newline
bitfld.long 0x10 10.--11. "cfg_pme_int,Interrupt Status cfg_pme_int" "0,1,2,3"
newline
bitfld.long 0x10 9. "radm_vendor_msg,Interrupt Status radm_vendor_msg" "0,1"
newline
bitfld.long 0x10 8. "radm_qoverflow,Interrupt Status radm_qoverflow" "0,1"
newline
bitfld.long 0x10 7. "smlh_link_up,Interrupt Status smlh_link_up" "0,1"
newline
bitfld.long 0x10 6. "rdlh_link_up,Interrupt Status rdlh_link_up" "0,1"
newline
bitfld.long 0x10 4.--5. "rbar_ctrl_update,Interrupt Status rbar_ctrl_update" "0,1,2,3"
newline
bitfld.long 0x10 2.--3. "cfg_mem_space_en,Interrupt Status cfg_mem_space_en" "0,1,2,3"
newline
bitfld.long 0x10 0.--1. "cfg_bus_master_en,Interrupt Status cfg_bus_master_en" "0,1,2,3"
rgroup.long 0x628C++0xB
line.long 0x0 "PCIEDMAINTSTS,"
hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
hexmask.long.word 0x0 0.--15. 1. "edma_int,Interrupt Status edma_int."
line.long 0x4 "PCIEINTXSTS,"
hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x4 15. "deassert_intd_grt,Interrupt Status deassert_intd_grt" "0,1"
newline
bitfld.long 0x4 14. "deassert_intc_grt,Interrupt Status deassert_intc_grt" "0,1"
newline
bitfld.long 0x4 13. "deassert_intb_grt,Interrupt Status deassert_intb_grt" "0,1"
newline
bitfld.long 0x4 12. "deassert_inta_grt,Interrupt Status deassert_inta_grt" "0,1"
newline
bitfld.long 0x4 11. "assert_intd_grt,Interrupt Status assert_intd_grt" "0,1"
newline
bitfld.long 0x4 10. "assert_intc_grt,Interrupt Status assert_intc_grt" "0,1"
newline
bitfld.long 0x4 9. "assert_intb_grt,Interrupt Status assert_intb_grt" "0,1"
newline
bitfld.long 0x4 8. "assert_inta_grt,Interrupt Status assert_inta_grt" "0,1"
newline
bitfld.long 0x4 7. "radm_intd_deasserted,Interrupt Status radm_intd_deasserted" "0,1"
newline
bitfld.long 0x4 6. "radm_intc_deasserted,Interrupt Status radm_intc_deasserted" "0,1"
newline
bitfld.long 0x4 5. "radm_intb_deasserted,Interrupt Status radm_intb_deasserted" "0,1"
newline
bitfld.long 0x4 4. "radm_inta_deasserted,Interrupt Status radm_inta_deasserted" "0,1"
newline
bitfld.long 0x4 3. "radm_intd_asserted,Interrupt Status radm_intd_asserted" "0,1"
newline
bitfld.long 0x4 2. "radm_intc_asserted,Interrupt Status radm_intc_asserted" "0,1"
newline
bitfld.long 0x4 1. "radm_intb_asserted,Interrupt Status radm_intb_asserted" "0,1"
newline
bitfld.long 0x4 0. "radm_inta_asserted,Interrupt Status radm_inta_asserted" "0,1"
line.long 0x8 "PCIEINTSTS1,"
hexmask.long.word 0x8 22.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x8 20.--21. "lbc_ext_cs,Interrupt Status lbc_ext_cs" "0,1,2,3"
newline
hexmask.long.word 0x8 10.--19. 1. "cfg_aer_int_msg_num,Interrupt Status cfg_aer_int_msg_num"
newline
hexmask.long.word 0x8 0.--9. 1. "cfg_pcie_cap_int_msg_num,Interrupt Status cfg_pcie_cap_int_msg_num"
group.long 0x6298++0x3
line.long 0x0 "PCIERASDESCTRL,"
hexmask.long 0x0 2.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
rbitfld.long 0x0 1. "cdm_reg_chk_cmplt,Signal to indicate that a Register Checking Sequence has Completed." "0,1"
newline
bitfld.long 0x0 0. "cdm_reg_chk_test_en,Signal to enter test mode in the Register Checking Logic." "0,1"
rgroup.long 0x629C++0x3
line.long 0x0 "PCIERCVCPLTOSTS,"
bitfld.long 0x0 31. "Reserved,These bits are read as 0. The write value must be 0." "0,1"
newline
bitfld.long 0x0 30. "radm_cpl_timeout,Indicates that the completion TLP for a request has not been received within the expected time window." "0,1"
newline
hexmask.long.word 0x0 20.--29. 1. "radm_timeout_cpl_tag,The Tag field of the timed out completion"
newline
hexmask.long.word 0x0 8.--19. 1. "radm_timeout_cpl_len,Length (in bytes) of the timed out completion."
newline
bitfld.long 0x0 6.--7. "radm_timeout_cpl_attr,The Attributes field of the timed out completion" "0,1,2,3"
newline
bitfld.long 0x0 3.--5. "radm_timeout_cpl_tc,The Traffic Class of the timed out completion" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0.--2. "radm_timeout_func_num,The function Number of the timed out completion." "0,1,2,3,4,5,6,7"
group.long 0x62A0++0x7
line.long 0x0 "PCIETXCNTRL0,"
hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x0 0. "app_hdr_valid,Indicates that the data app_hdr_log  app_err_bus  app_err_func_num  and app_tlp_prfx_log is valid." "0,1"
line.long 0x4 "PCIETXCNTRL1,"
hexmask.long.word 0x4 17.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x4 14.--16. "app_err_func_num,The number of the function that is reporting the error indicated app_err_bus  valid when app_hdr_valid is asserted." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 13. "app_err_advisory,Indicates that your application error is an advisory error.." "0,1"
newline
hexmask.long.word 0x4 0.--12. 1. "app_err_bus,The type of error that your application detected."
rgroup.long 0x62A8++0x7
line.long 0x0 "PCIETRGTCMPLUT0,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
hexmask.long.byte 0x0 20.--27. 1. "trgt_timeout_lookup_id,The target completion LUT lookup ID of the timed out completion."
newline
hexmask.long.word 0x0 8.--19. 1. "trgt_timeout_cpl_len,The Length of the timed out completion"
newline
bitfld.long 0x0 6.--7. "trgt_timeout_cpl_attr,The Attributes value of the timed out completion." "0,1,2,3"
newline
bitfld.long 0x0 3.--5. "trgt_timeout_cpl_tc,The TC of the timed out completion." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0.--2. "trgt_timeout_cpl_func_num,The function number of the timed out completion." "0,1,2,3,4,5,6,7"
line.long 0x4 "PCIETRGTCMPLUT1,"
hexmask.long.tbyte 0x4 10.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x4 9. "trgt_lookup_empty,When this signal is asserted with radm_trgt1_hv  it indicates that the target completion LUT is not full." "0,1"
newline
bitfld.long 0x4 8. "trgt_cpl_timeout,Indicates that the application has not generated a completion for an incoming request within the required time interval." "0,1"
newline
hexmask.long.byte 0x4 0.--7. 1. "trgt_lookup_id,The target completion LUT lookup ID for the incoming request TLP."
rgroup.long 0x62B4++0xB
line.long 0x0 "PCIEMODEINFO,"
hexmask.long 0x0 2.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x0 1. "slv_rasdp_err_mode,Indication (slv_aclk version) from the controller that it has entered RASDP error mode." "0,1"
newline
bitfld.long 0x0 0. "mstr_rasdp_err_mode,Indication (mstr_aclk version) from the controller that it has entered" "0,1"
line.long 0x4 "PCIECNFGINFO0,"
hexmask.long.tbyte 0x4 13.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
hexmask.long.byte 0x4 8.--12. 1. "cfg_pbus_dev_num,The device number assigned to the function."
newline
hexmask.long.byte 0x4 0.--7. 1. "cfg_pbus_num,The primary bus number assigned to the function."
line.long 0x8 "PCIECNFGINFO1,"
hexmask.long.word 0x8 16.--31. 1. "cfg_subbus_num,Configured Subordinate Bus Number."
newline
hexmask.long.word 0x8 0.--15. 1. "cfg_2ndbus_num,Configured Secondary Bus Number."
group.long 0x62C0++0x3
line.long 0x0 "PCIEMARGINGCTRL,"
hexmask.long 0x0 2.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x0 1. "app_margining_software_ready,Margining Software Ready." "0,1"
newline
bitfld.long 0x0 0. "app_margining_ready,Margining Ready." "0,1"
group.long 0x6500++0x23
line.long 0x0 "PCIERSTSTSEN,"
hexmask.long 0x0 6.--31. 1. "Reserved0,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x0 4.--5. "cfg_flr_pf_active,Status cfg_flr_pf_active enable" "0: Disable,1: Enable,?,?"
newline
rbitfld.long 0x0 3. "Reserved1,These bits are read as 0. The write value must be 0." "0,1"
newline
bitfld.long 0x0 2. "smlh_req_rst_not,Status smlh_req_rst_not enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "link_req_rst_not,Status link_req_rst_not enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 0. "cfg_2nd_reset,Status cfg_2nd_reset enable" "0: Disable,1: Enable"
line.long 0x4 "PCIEMSGRCPSTSEN,"
hexmask.long.tbyte 0x4 9.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x4 8. "radm_msg_unlock,Status radm_msg_unlock enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 7. "radm_vendor_msg,Status radm_vendor_msg enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 6. "radm_pm_turnoff,Status radm_pm_turnoff enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 5. "radm_pm_to_ack,Status radm_pm_to_ack enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 4. "radm_pm_pme,Status radm_p_pme enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 3. "radm_fatal_err,Status radm_fatal_err enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 2. "radm_nonfatal_err,Status radm_nonfatal_err enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 1. "radm_correctable_err,Status radm_correctable_err enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "radm_msg_ltr,Status radm_msg_ltr enable" "0: Disable,1: Enable"
line.long 0x8 "PCIEPWRMNGSTS0EN,"
hexmask.long.tbyte 0x8 10.--31. 1. "Reserved0,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x8 9. "wake,Status wake enable" "0: Disable,1: Enable"
newline
hexmask.long.word 0x8 0.--8. 1. "Reserved1,These bits are read as 0. The write value must be 0."
line.long 0xC "PCIEERRSTS0EN,"
hexmask.long.tbyte 0xC 11.--31. 1. "Reserved0,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0xC 9.--10. "cfg_sys_err_rc,Status cfg_sys_err_rc enable" "0: Disable,1: Enable,?,?"
newline
rbitfld.long 0xC 6.--8. "Reserved1,These bits are read as 0. The write value must be 0." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0xC 5. "cfg_safety_uncorr,Status cfg_safety_uncorr enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 4. "cfg_safety_corr,Status cfg_safety_corr enable" "0: Disable,1: Enable"
newline
hexmask.long.byte 0xC 0.--3. 1. "Reserved2,These bits are read as 0. The write value must be 0."
line.long 0x10 "PCIEINTSTS0EN,"
rbitfld.long 0x10 31. "Reserved0,These bits are read as 0. The write value must be 0." "0,1"
newline
bitfld.long 0x10 29.--30. "cfg_aer_rc_err_msi,Interrupt cfg_aer_rc_err_msi enable" "0: Disable,1: Enable,?,?"
newline
bitfld.long 0x10 27.--28. "cfg_aer_rc_err_int,Interrupt cfg_aer_rc_err_int enable" "0: Disable,1: Enable,?,?"
newline
bitfld.long 0x10 26. "msi_ctrl_int,Interrupt msi_ctrl_int enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x10 25. "Reserved1,These bits are read as 0. The write value must be 0." "0,1"
newline
bitfld.long 0x10 24. "cfg_link_eq_req_int,Interrupt cfg_link_eq_req_int enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 23. "cfg_bw_mgt_msi,Interrupt cfg_bw_mgt_msi enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 22. "cfg_bw_mgt_int,Interrupt cfg_bw_mgt_int enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 21. "cfg_link_auto_bw_msi,Interrupt cfg_link_auto_bw_msi enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 20. "cfg_link_auto_bw_int,Interrupt cfg_link_auto_bw_int enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 18.--19. "hp_msi,Interrupt hp_msi enable" "0: Disable,1: Enable,?,?"
newline
bitfld.long 0x10 16.--17. "hp_int,Interrupt hp_int enable" "0: Disable,1: Enable,?,?"
newline
bitfld.long 0x10 14.--15. "hp_pme,Interrupt hp_pme enable" "0: Disable,1: Enable,?,?"
newline
bitfld.long 0x10 12.--13. "cfg_pme_msi,Interrupt cfg_pme_msi enable" "0: Disable,1: Enable,?,?"
newline
bitfld.long 0x10 10.--11. "cfg_pme_int,Interrupt cfg_pme_int enable" "0: Disable,1: Enable,?,?"
newline
rbitfld.long 0x10 8.--9. "Reserved2,These bits are read as 0. The write value must be 0." "0,1,2,3"
newline
bitfld.long 0x10 7. "smlh_link_up,Interrupt smlh_link_up enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 6. "rdlh_link_up,Interrupt rdlh_link_up enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x10 4.--5. "Reserved3,These bits are read as 0. The write value must be 0." "0,1,2,3"
newline
bitfld.long 0x10 2.--3. "cfg_mem_space_en,Interrupt cfg_mem_space_en enable" "0: Disable,1: Enable,?,?"
newline
bitfld.long 0x10 0.--1. "cfg_bus_master_en,Interrupt cfg_bus_master_en enable" "0: Disable,1: Enable,?,?"
line.long 0x14 "PCIEDMAINTSTSEN,"
hexmask.long.word 0x14 16.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
hexmask.long.word 0x14 0.--15. 1. "edma_int,Interrupt edma_int enable"
line.long 0x18 "PCIEINTXSTSEN,"
hexmask.long.tbyte 0x18 8.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x18 7. "radm_intd_deasserted,Interrupt radm_intd_deasserted enable" "0: Disable,1: Enable"
newline
bitfld.long 0x18 6. "radm_intc_deasserted,Interrupt radm_intc_deasserted enable" "0: Disable,1: Enable"
newline
bitfld.long 0x18 5. "radm_intb_deasserted,Interrupt radm_intb_deasserted enable" "0: Disable,1: Enable"
newline
bitfld.long 0x18 4. "radm_inta_deasserted,Interrupt radm_inta_deasserted enable" "0: Disable,1: Enable"
newline
bitfld.long 0x18 3. "radm_intd_asserted,Interrupt radm_intd_asserted enable" "0: Disable,1: Enable"
newline
bitfld.long 0x18 2. "radm_intc_asserted,Interrupt radm_intc_asserted enable" "0: Disable,1: Enable"
newline
bitfld.long 0x18 1. "radm_intb_asserted,Interrupt radm_intb_asserted enable" "0: Disable,1: Enable"
newline
bitfld.long 0x18 0. "radm_inta_asserted,Interrupt radm_inta_asserted enable" "0: Disable,1: Enable"
line.long 0x1C "PCIEINTSTS1EN,"
hexmask.long.word 0x1C 22.--31. 1. "Reserved0,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x1C 20.--21. "lbc_ext_cs,Interrupt lbc_ext_cs enable" "0: Disable,1: Enable,?,?"
newline
hexmask.long.tbyte 0x1C 0.--19. 1. "Reserved1,These bits are read as 0. The write value must be 0."
line.long 0x20 "PCIETRGTCMPLUT1EN,"
hexmask.long.tbyte 0x20 9.--31. 1. "Reserved0,These bits are read as 0. The write value must be 0."
newline
bitfld.long 0x20 8. "trgt_cpl_timeout,Status trgt_cpl_timeout enable" "0: Disable,1: Enable"
newline
hexmask.long.byte 0x20 0.--7. 1. "Reserved1,These bits are read as 0. The write value must be 0."
group.long 0x6530++0x13
line.long 0x0 "PCIERSTSTSCLR,"
hexmask.long 0x0 4.--31. 1. "Reserved0,These bits are read as 0. The write value must be 0."
newline
eventfld.long 0x0 3. "training_rst_n,Status training_rst_n clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 2. "smlh_req_rst_not,Status smlh_req_rst_not clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 1. "link_req_rst_not,Status link_req_rst_not clear." "0: Ignored,1: Status is cleared"
newline
rbitfld.long 0x0 0. "Reserved1,These bits are read as 0. The write value must be 0." "0,1"
line.long 0x4 "PCIEMSGRCPSTSCLR,"
hexmask.long.tbyte 0x4 9.--31. 1. "Reserved,These bits are read as 0. The write value must be 0."
newline
eventfld.long 0x4 8. "radm_msg_unlock,Status radm_msg_unlock clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x4 7. "radm_vendor_msg,Status radm_vendor_msg clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x4 6. "radm_pm_turnoff,Status radm_pm_turnoff clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x4 5. "radm_pm_to_ack,Status radm_pm_to_ack clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x4 4. "radm_pm_pme,Status radm_pm_pme clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x4 3. "radm_fatal_err,Status radm_fatal_err clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x4 2. "radm_nonfatal_err,Status radm_nonfatal_err clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x4 1. "radm_correctable_err,Status radm_correctable_err clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x4 0. "radm_msg_ltr,Status radm_msg_ltr clear." "0: Ignored,1: Status is cleared"
line.long 0x8 "PCIEPWRMNGSTS0CLR,"
hexmask.long.tbyte 0x8 10.--31. 1. "Reserved0,These bits are read as 0. The write value must be 0."
newline
eventfld.long 0x8 9. "wake,Status wake clear." "0: Ignored,1: Status is cleared"
newline
hexmask.long.word 0x8 0.--8. 1. "Reserved1,These bits are read as 0. The write value must be 0."
line.long 0xC "PCIEERRSTS0CLR,"
hexmask.long.tbyte 0xC 11.--31. 1. "Reserved0,These bits are read as 0. The write value must be 0."
newline
eventfld.long 0xC 9.--10. "cfg_sys_err_rc,Status cfg_sys_err_rc clear." "0: Ignored,1: Status is cleared,?,?"
newline
eventfld.long 0xC 6.--8. "app_parity_errs,Status app_parity_errs clear." "0: Ignored,1: Status is cleared,?,?,?,?,?,?"
newline
hexmask.long.byte 0xC 0.--5. 1. "Reserved1,These bits are read as 0. The write value must be 0."
line.long 0x10 "PCIEINTSTS0CLR,"
rbitfld.long 0x10 31. "Reserved0,These bits are read as 0. The write value must be 0." "0,1"
newline
eventfld.long 0x10 29.--30. "cfg_aer_rc_err_msi,Interrupt cfg_aer_rc_err_msi clear" "0: Ignored,1: Status is cleared,?,?"
newline
hexmask.long.byte 0x10 24.--28. 1. "Reserved1,These bits are read as 0. The write value must be 0."
newline
eventfld.long 0x10 23. "cfg_bw_mgt_msi,Interrupt cfg_bw_mgt_msi clear" "0: Ignored,1: Interrupt is cleared"
newline
rbitfld.long 0x10 22. "Reserved2,These bits are read as 0. The write value must be 0." "0,1"
newline
eventfld.long 0x10 21. "cfg_link_auto_bw_msi,Interrupt cfg_link_auto_bw_msi clear" "0: Ignored,1: Interrupt is cleared"
newline
rbitfld.long 0x10 20. "Reserved3,These bits are read as 0. The write value must be 0." "0,1"
newline
eventfld.long 0x10 18.--19. "hp_msi,Interrupt hp_msi clear" "0: Ignored,1: Status is cleared,?,?"
newline
rbitfld.long 0x10 16.--17. "Reserved4,These bits are read as 0. The write value must be 0." "0,1,2,3"
newline
eventfld.long 0x10 14.--15. "hp_pme,Interrupt hp_pme clear" "0: Ignored,1: Status is cleared,?,?"
newline
eventfld.long 0x10 12.--13. "cfg_pme_msi,Interrupt cfg_pme_msi clear" "0: Ignored,1: Status is cleared,?,?"
newline
rbitfld.long 0x10 10.--11. "Reserved5,These bits are read as 0. The write value must be 0." "0,1,2,3"
newline
eventfld.long 0x10 9. "radm_vendor_msg,Interrupt radm_vendor_msg clear" "0: Ignored,1: Interrupt is cleared"
newline
eventfld.long 0x10 8. "radm_qoverflow,Interrupt radm_qoverflow clear" "0: Ignored,1: Interrupt is cleared"
newline
eventfld.long 0x10 7. "smlh_link_up,Interrupt smlh_link_up clear" "0: Ignored,1: Interrupt is cleared"
newline
eventfld.long 0x10 6. "rdlh_link_up,Interrupt rdlh_link_up clear" "0: Ignored,1: Interrupt is cleared"
newline
rbitfld.long 0x10 4.--5. "Reserved6,These bits are read as 0. The write value must be 0." "0,1,2,3"
newline
eventfld.long 0x10 2.--3. "cfg_mem_space_en,Interrupt cfg_mem_space_en clear" "0: Ignored,1: Status is cleared,?,?"
newline
eventfld.long 0x10 0.--1. "cfg_bus_master_en,Interrupt cfg_bus_master_en clear" "0: Ignored,1: Status is cleared,?,?"
group.long 0x6548++0xB
line.long 0x0 "PCIEINTXSTSCLR,Common to Header TYPE00/01"
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved"
newline
eventfld.long 0x0 15. "deassert_intd_grt,Interrupt deassert_intd_grt clear" "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 14. "deassert_intc_grt,Interrupt deassert_intc_grt clear" "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 13. "deassert_intb_grt,Interrupt deassert_intb_grt clear" "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 12. "deassert_inta_grt,Interrupt deassert_inta_grt clear" "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 11. "assert_intd_grt,Interrupt assert_intd_grt clear" "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 10. "assert_intc_grt,Interrupt assert_intc_grt clear" "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 9. "assert_intb_grt,Interrupt assert_intb_grt clear" "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 8. "assert_inta_grt,Interrupt assert_inta_grt clear" "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 7. "radm_intd_deasserted,Interrupt radm_intd_deasserted clear" "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 6. "radm_intc_deasserted,Interrupt radm_intc_deasserted clear" "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 5. "radm_intb_deasserted,Interrupt radm_intb_deasserted clear" "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 4. "radm_inta_deasserted,Interrupt radm_inta_deasserted clear" "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 3. "radm_intd_asserted,Interrupt radm_intd_asserted clear" "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 2. "radm_intc_asserted,Interrupt radm_intc_asserted clear" "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 1. "radm_intb_asserted,Interrupt radm_intb_asserted clear" "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 0. "radm_inta_asserted,Interrupt radm_inta_asserted clear" "0: Ignored,1: Status is cleared"
line.long 0x4 "PCIEINTSTS1CLR,Common to Header TYPE00/01"
hexmask.long.word 0x4 22.--31. 1. "Reserved0,Reserved"
newline
eventfld.long 0x4 20.--21. "lbc_ext_cs,Interrupt lbc_ext_cs clear" "0: Ignored,1: Status is cleared,?,?"
newline
hexmask.long.tbyte 0x4 0.--19. 1. "Reserved1,Reserved"
line.long 0x8 "PCIETRGTCMPLUT1CLR,Common to Header TYPE00/01"
hexmask.long.tbyte 0x8 9.--31. 1. "Reserved0,Reserved"
newline
eventfld.long 0x8 8. "trgt_cpl_timeout,Status trgt_cpl_timeout clear." "0: Ignored,1: Status is cleared"
newline
hexmask.long.byte 0x8 0.--7. 1. "Reserved1,Reserved"
rgroup.long 0x6558++0x3
line.long 0x0 "PCIEERRSTS2,Common to Header TYPE00/01"
hexmask.long 0x0 6.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x0 5. "err_multpl_xdlh_retryram_addr_par,Status err_multpl_xdlh_retryram_addr_par" "0,1"
newline
bitfld.long 0x0 4. "err_multpl_xdlh_retrysotram_waddr_par,Status err_multpl_xdlh_retrysotram_waddr_par" "0,1"
newline
bitfld.long 0x0 3. "err_multpl_p_dataq_addra_par,Status err_multpl_p_dataq_addra_par" "0,1"
newline
bitfld.long 0x0 2. "err_multpl_p_dataq_addrb_par,Status err_multpl_p_dataq_addrb_par" "0,1"
newline
bitfld.long 0x0 1. "err_multpl_p_hdrq_addra_par,Status err_multpl_p_hdrq_addra_par" "0,1"
newline
bitfld.long 0x0 0. "err_multpl_p_hdrq_addrb_par,Status err_multpl_p_hdrq_addrb_par" "0,1"
group.long 0x655C++0xB
line.long 0x0 "PCIEERRSTS1CLR,Common to Header TYPE00/01"
rbitfld.long 0x0 30.--31. "Reserved,Reserved" "0,1,2,3"
newline
eventfld.long 0x0 29. "err_multpl_edma2ram_addra_clr,Status err_multpl_edma2ram_addra clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 28. "err_multpl_edma2ram_addrb_clr,Status err_multpl_edma2ram_addrb clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 27. "err_multpl_edmarbuff2ram_addra_clr,Status err_multpl_edmarbuff2ram_addra clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 26. "err_multpl_edmarbuff2ram_addrb_clr,Status err_multpl_edmarbuff2ram_addrb clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 25. "err_multpl_ib_mcpl_a2c_cdc_ram_addra_clr,Status err_multpl_ib_mcpl_a2c_cdc_ram_addra clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 24. "err_multpl_ib_mcpl_a2c_cdc_ram_addrb_clr,Status err_multpl_ib_mcpl_a2c_cdc_ram_addrb clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 23. "err_multpl_ib_mcpl_sb_ram_addra_clr,Status err_multpl_ib_mcpl_sb_ram_addra clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 22. "err_multpl_ib_mcpl_sb_ram_addrb_clr,Status err_multpl_ib_mcpl_sb_ram_addrb clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 21. "err_multpl_ib_rreq_c2a_cdc_ram_addra_clr,Status err_multpl_ib_rreq_c2a_cdc_ram_addra clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 20. "err_multpl_ib_rreq_c2a_cdc_ram_addrb_clr,Status err_multpl_ib_rreq_c2a_cdc_ram_addrb clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 19. "err_multpl_ib_rreq_ordr_ram_addra_clr,Status err_multpl_ib_rreq_ordr_ram_addra clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 18. "err_multpl_ib_rreq_ordr_ram_addrb_clr,Status err_multpl_ib_rreq_ordr_ram_addrb clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 17. "err_multpl_ib_wreq_c2a_cdc_ram_addra_clr,Status err_multpl_ib_wreq_c2a_cdc_ram_addra clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 16. "err_multpl_ib_wreq_c2a_cdc_ram_addrb_clr,Status err_multpl_ib_wreq_c2a_cdc_ram_addrb clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 15. "err_multpl_mstr_araddrp_clr,Status err_multpl_mstr_araddrp clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 14. "err_multpl_mstr_awaddr_clr,Status err_multpl_mstr_awaddr clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 13. "err_multpl_mstr_wdatap_clr,Status err_multpl_mstr_wdatap clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 12. "err_multpl_ob_ccmp_data_ram_addra_clr,Status err_multpl_ob_ccmp_data_ram_addra clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 11. "err_multpl_ob_ccmp_data_ram_addrb_clr,Status err_multpl_ob_ccmp_data_ram_addrb clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 10. "err_multpl_ob_cpl_c2a_cdc_ram_addra_clr,Status err_multpl_ob_cpl_c2a_cdc_ram_addra clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 9. "err_multpl_ob_cpl_c2a_cdc_ram_addrb_clr,Status err_multpl_ob_cpl_c2a_cdc_ram_addrb clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 8. "err_multpl_ob_npdcmp_ram_addra_clr,Status err_multpl_ob_npdcmp_ram_addra clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 7. "err_multpl_ob_npdcmp_ram_addrb_clr,Status err_multpl_ob_npdcmp_ram_addrb clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 6. "err_multpl_ob_pdcmp_data_ram_addra_clr,Status err_multpl_ob_pdcmp_data_ram_addra clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 5. "err_multpl_ob_pdcmp_data_ram_addrb_clr,Status err_multpl_ob_pdcmp_data_ram_addrb clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 4. "err_multpl_ob_pdcmp_hdr_ram_addra_clr,Status err_multpl_ob_pdcmp_hdr_ram_addra clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 3. "err_multpl_ob_pdcmp_hdr_ram_addrb_clr,Status err_multpl_ob_pdcmp_hdr_ram_addrb clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 2. "err_multpl_slv_npw_sab_ram_addra_clr,Status err_multpl_slv_npw_sab_ram_addra clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 1. "err_multpl_slv_npw_sab_ram_addrb_clr,Status err_multpl_slv_npw_sab_ram_addrb clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x0 0. "err_multpl_slv_rdata_clr,Status err_multpl_slv_rdata clear." "0: Ignored,1: Status is cleared"
line.long 0x4 "PCIEERRSTS2CLR,Common to Header TYPE00/01"
hexmask.long 0x4 6.--31. 1. "Reserved,Reserved"
newline
eventfld.long 0x4 5. "err_multpl_xdlh_retryram_addr_par_clr,Status err_multpl_xdlh_retryram_addr_par clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x4 4. "err_multpl_xdlh_retrysotram_waddr_par_clr,Status err_multpl_xdlh_retrysotram_waddr_par clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x4 3. "err_multpl_p_dataq_addra_par_clr,Status err_multpl_p_dataq_addra_par clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x4 2. "err_multpl_p_dataq_addrb_par_clr,Status err_multpl_p_dataq_addrb_par clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x4 1. "err_multpl_p_hdrq_addra_par_clr,Status err_multpl_p_hdrq_addra_par clear." "0: Ignored,1: Status is cleared"
newline
eventfld.long 0x4 0. "err_multpl_p_hdrq_addrb_par_clr,Status err_multpl_p_hdrq_addrb_par clear." "0: Ignored,1: Status is cleared"
line.long 0x8 "PCIEMSGTXCLR,Common to Header TYPE00/01"
hexmask.long.word 0x8 22.--31. 1. "Reserved0,Reserved"
newline
eventfld.long 0x8 20.--21. "cfg_send_f_err,Status cfg_send_f_err clear." "0: Ignored,1: Status is cleared,?,?"
newline
eventfld.long 0x8 18.--19. "cfg_send_nf_err,Status cfg_send_nf_err clear." "0: Ignored,1: Status is cleared,?,?"
newline
eventfld.long 0x8 16.--17. "cfg_send_cor_err,Status cfg_send_cor_err clear." "0: Ignored,1: Status is cleared,?,?"
newline
hexmask.long.word 0x8 0.--15. 1. "Reserved1,Reserved"
rgroup.long 0x6600++0x3
line.long 0x0 "PMRATE,"
hexmask.long 0x0 3.--31. 1. "Reserved,Reserved"
newline
bitfld.long 0x0 0.--2. "pm_current_data_rate,The current link operating rate." "0,1,2,3,4,5,6,7"
group.long 0x6700++0x3
line.long 0x0 "SIIBDF,"
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
hexmask.long.byte 0x0 8.--15. 1. "app_bus_num,Bus number"
newline
bitfld.long 0x0 5.--7. "Reserved1,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--4. 1. "app_dev_num,Device number."
group.long 0x6900++0x3F
line.long 0x0 "CNVID0,"
bitfld.long 0x0 31. "cnv_en,Conversion enabled" "0,1"
newline
hexmask.long.word 0x0 20.--30. 1. "Reserved,Reserved"
newline
hexmask.long.byte 0x0 16.--19. 1. "cnv_to_osid,OSID value when matched"
newline
hexmask.long.word 0x0 0.--15. 1. "cnv_fm_bdf,Value to compare with BDF"
line.long 0x4 "CNVID1,"
bitfld.long 0x4 31. "cnv_en,Conversion enabled" "0,1"
newline
hexmask.long.word 0x4 20.--30. 1. "Reserved,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "cnv_to_osid,OSID value when matched"
newline
hexmask.long.word 0x4 0.--15. 1. "cnv_fm_bdf,Value to compare with BDF"
line.long 0x8 "CNVID2,"
bitfld.long 0x8 31. "cnv_en,Conversion enabled" "0,1"
newline
hexmask.long.word 0x8 20.--30. 1. "Reserved,Reserved"
newline
hexmask.long.byte 0x8 16.--19. 1. "cnv_to_osid,OSID value when matched"
newline
hexmask.long.word 0x8 0.--15. 1. "cnv_fm_bdf,Value to compare with BDF"
line.long 0xC "CNVID3,"
bitfld.long 0xC 31. "cnv_en,Conversion enabled" "0,1"
newline
hexmask.long.word 0xC 20.--30. 1. "Reserved,Reserved"
newline
hexmask.long.byte 0xC 16.--19. 1. "cnv_to_osid,OSID value when matched"
newline
hexmask.long.word 0xC 0.--15. 1. "cnv_fm_bdf,Value to compare with BDF"
line.long 0x10 "CNVID4,"
bitfld.long 0x10 31. "cnv_en,Conversion enabled" "0,1"
newline
hexmask.long.word 0x10 20.--30. 1. "Reserved,Reserved"
newline
hexmask.long.byte 0x10 16.--19. 1. "cnv_to_osid,OSID value when matched"
newline
hexmask.long.word 0x10 0.--15. 1. "cnv_fm_bdf,Value to compare with BDF"
line.long 0x14 "CNVID5,"
bitfld.long 0x14 31. "cnv_en,Conversion enabled" "0,1"
newline
hexmask.long.word 0x14 20.--30. 1. "Reserved,Reserved"
newline
hexmask.long.byte 0x14 16.--19. 1. "cnv_to_osid,OSID value when matched"
newline
hexmask.long.word 0x14 0.--15. 1. "cnv_fm_bdf,Value to compare with BDF"
line.long 0x18 "CNVID6,"
bitfld.long 0x18 31. "cnv_en,Conversion enabled" "0,1"
newline
hexmask.long.word 0x18 20.--30. 1. "Reserved,Reserved"
newline
hexmask.long.byte 0x18 16.--19. 1. "cnv_to_osid,OSID value when matched"
newline
hexmask.long.word 0x18 0.--15. 1. "cnv_fm_bdf,Value to compare with BDF"
line.long 0x1C "CNVID7,"
bitfld.long 0x1C 31. "cnv_en,Conversion enabled" "0,1"
newline
hexmask.long.word 0x1C 20.--30. 1. "Reserved,Reserved"
newline
hexmask.long.byte 0x1C 16.--19. 1. "cnv_to_osid,OSID value when matched"
newline
hexmask.long.word 0x1C 0.--15. 1. "cnv_fm_bdf,Value to compare with BDF"
line.long 0x20 "CNVID8,"
bitfld.long 0x20 31. "cnv_en,Conversion enabled" "0,1"
newline
hexmask.long.word 0x20 20.--30. 1. "Reserved,Reserved"
newline
hexmask.long.byte 0x20 16.--19. 1. "cnv_to_osid,OSID value when matched"
newline
hexmask.long.word 0x20 0.--15. 1. "cnv_fm_bdf,Value to compare with BDF"
line.long 0x24 "CNVID9,"
bitfld.long 0x24 31. "cnv_en,Conversion enabled" "0,1"
newline
hexmask.long.word 0x24 20.--30. 1. "Reserved,Reserved"
newline
hexmask.long.byte 0x24 16.--19. 1. "cnv_to_osid,OSID value when matched"
newline
hexmask.long.word 0x24 0.--15. 1. "cnv_fm_bdf,Value to compare with BDF"
line.long 0x28 "CNVID10,"
bitfld.long 0x28 31. "cnv_en,Conversion enabled" "0,1"
newline
hexmask.long.word 0x28 20.--30. 1. "Reserved,Reserved"
newline
hexmask.long.byte 0x28 16.--19. 1. "cnv_to_osid,OSID value when matched"
newline
hexmask.long.word 0x28 0.--15. 1. "cnv_fm_bdf,Value to compare with BDF"
line.long 0x2C "CNVID11,"
bitfld.long 0x2C 31. "cnv_en,Conversion enabled" "0,1"
newline
hexmask.long.word 0x2C 20.--30. 1. "Reserved,Reserved"
newline
hexmask.long.byte 0x2C 16.--19. 1. "cnv_to_osid,OSID value when matched"
newline
hexmask.long.word 0x2C 0.--15. 1. "cnv_fm_bdf,Value to compare with BDF"
line.long 0x30 "CNVID12,"
bitfld.long 0x30 31. "cnv_en,Conversion enabled" "0,1"
newline
hexmask.long.word 0x30 20.--30. 1. "Reserved,Reserved"
newline
hexmask.long.byte 0x30 16.--19. 1. "cnv_to_osid,OSID value when matched"
newline
hexmask.long.word 0x30 0.--15. 1. "cnv_fm_bdf,Value to compare with BDF"
line.long 0x34 "CNVID13,"
bitfld.long 0x34 31. "cnv_en,Conversion enabled" "0,1"
newline
hexmask.long.word 0x34 20.--30. 1. "Reserved,Reserved"
newline
hexmask.long.byte 0x34 16.--19. 1. "cnv_to_osid,OSID value when matched"
newline
hexmask.long.word 0x34 0.--15. 1. "cnv_fm_bdf,Value to compare with BDF"
line.long 0x38 "CNVID14,"
bitfld.long 0x38 31. "cnv_en,Conversion enabled" "0,1"
newline
hexmask.long.word 0x38 20.--30. 1. "Reserved,Reserved"
newline
hexmask.long.byte 0x38 16.--19. 1. "cnv_to_osid,OSID value when matched"
newline
hexmask.long.word 0x38 0.--15. 1. "cnv_fm_bdf,Value to compare with BDF"
line.long 0x3C "CNVID15,"
bitfld.long 0x3C 31. "cnv_en,Conversion enabled" "0,1"
newline
hexmask.long.word 0x3C 20.--30. 1. "Reserved,Reserved"
newline
hexmask.long.byte 0x3C 16.--19. 1. "cnv_to_osid,OSID value when matched"
newline
hexmask.long.word 0x3C 0.--15. 1. "cnv_fm_bdf,Value to compare with BDF"
group.long 0x6980++0x3F
line.long 0x0 "CNVIDMSK0,"
hexmask.long.word 0x0 16.--31. 1. "Reserved,Reserved"
newline
hexmask.long.word 0x0 0.--15. 1. "cnv_bdf_msk_,Mask used for matching"
line.long 0x4 "CNVIDMSK1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved,Reserved"
newline
hexmask.long.word 0x4 0.--15. 1. "cnv_bdf_msk_,Mask used for matching"
line.long 0x8 "CNVIDMSK2,"
hexmask.long.word 0x8 16.--31. 1. "Reserved,Reserved"
newline
hexmask.long.word 0x8 0.--15. 1. "cnv_bdf_msk_,Mask used for matching"
line.long 0xC "CNVIDMSK3,"
hexmask.long.word 0xC 16.--31. 1. "Reserved,Reserved"
newline
hexmask.long.word 0xC 0.--15. 1. "cnv_bdf_msk_,Mask used for matching"
line.long 0x10 "CNVIDMSK4,"
hexmask.long.word 0x10 16.--31. 1. "Reserved,Reserved"
newline
hexmask.long.word 0x10 0.--15. 1. "cnv_bdf_msk_,Mask used for matching"
line.long 0x14 "CNVIDMSK5,"
hexmask.long.word 0x14 16.--31. 1. "Reserved,Reserved"
newline
hexmask.long.word 0x14 0.--15. 1. "cnv_bdf_msk_,Mask used for matching"
line.long 0x18 "CNVIDMSK6,"
hexmask.long.word 0x18 16.--31. 1. "Reserved,Reserved"
newline
hexmask.long.word 0x18 0.--15. 1. "cnv_bdf_msk_,Mask used for matching"
line.long 0x1C "CNVIDMSK7,"
hexmask.long.word 0x1C 16.--31. 1. "Reserved,Reserved"
newline
hexmask.long.word 0x1C 0.--15. 1. "cnv_bdf_msk_,Mask used for matching"
line.long 0x20 "CNVIDMSK8,"
hexmask.long.word 0x20 16.--31. 1. "Reserved,Reserved"
newline
hexmask.long.word 0x20 0.--15. 1. "cnv_bdf_msk_,Mask used for matching"
line.long 0x24 "CNVIDMSK9,"
hexmask.long.word 0x24 16.--31. 1. "Reserved,Reserved"
newline
hexmask.long.word 0x24 0.--15. 1. "cnv_bdf_msk_,Mask used for matching"
line.long 0x28 "CNVIDMSK10,"
hexmask.long.word 0x28 16.--31. 1. "Reserved,Reserved"
newline
hexmask.long.word 0x28 0.--15. 1. "cnv_bdf_msk_,Mask used for matching"
line.long 0x2C "CNVIDMSK11,"
hexmask.long.word 0x2C 16.--31. 1. "Reserved,Reserved"
newline
hexmask.long.word 0x2C 0.--15. 1. "cnv_bdf_msk_,Mask used for matching"
line.long 0x30 "CNVIDMSK12,"
hexmask.long.word 0x30 16.--31. 1. "Reserved,Reserved"
newline
hexmask.long.word 0x30 0.--15. 1. "cnv_bdf_msk_,Mask used for matching"
line.long 0x34 "CNVIDMSK13,"
hexmask.long.word 0x34 16.--31. 1. "Reserved,Reserved"
newline
hexmask.long.word 0x34 0.--15. 1. "cnv_bdf_msk_,Mask used for matching"
line.long 0x38 "CNVIDMSK14,"
hexmask.long.word 0x38 16.--31. 1. "Reserved,Reserved"
newline
hexmask.long.word 0x38 0.--15. 1. "cnv_bdf_msk_,Mask used for matching"
line.long 0x3C "CNVIDMSK15,"
hexmask.long.word 0x3C 16.--31. 1. "Reserved,Reserved"
newline
hexmask.long.word 0x3C 0.--15. 1. "cnv_bdf_msk_,Mask used for matching"
group.long 0x6A00++0x3
line.long 0x0 "CNVOSIDCTRL,"
hexmask.long.word 0x0 20.--31. 1. "Reserved0,Reserved"
newline
hexmask.long.byte 0x0 16.--19. 1. "elsosid,OSID value to use when none hit"
newline
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
group.long 0x6C00++0x7
line.long 0x0 "AXIINTCADDR,"
hexmask.long 0x0 3.--31. 1. "intc_address,Address judged as INTC area"
newline
bitfld.long 0x0 0.--2. "Reserved,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4 "AXIINTCCONT,"
bitfld.long 0x4 31. "intc_enable,INTC judgment enable" "0,1"
newline
hexmask.long.tbyte 0x4 12.--30. 1. "Reserved0,Reserved"
newline
hexmask.long.word 0x4 3.--11. 1. "intc_mask,Mask used for INTC judgment"
newline
bitfld.long 0x4 0.--2. "Reserved1,Reserved" "0,1,2,3,4,5,6,7"
tree.end
tree "PFC_GPIO (Pin Function)"
base ad:0x0
tree "PFC_GPIO_for_GP0"
base ad:0xE6050000
group.long 0x0++0x7
line.long 0x0 "PMMR0_B0A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER0_B0A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x20++0xF
line.long 0x0 "DM0PR0_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR0_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR0_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR0_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x40++0x3
line.long 0x0 "GPSR0_B0A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x60++0xB
line.long 0x0 "IP0SR0_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR0_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR0_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x80++0xB
line.long 0x0 "DRV0CTRL0_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL0_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL0_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0xA0++0x3
line.long 0x0 "POC0_B0A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0xC0++0x3
line.long 0x0 "PUEN0_B0A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0xE0++0x3
line.long 0x0 "PUD0_B0A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x160++0xB
line.long 0x0 "PSER0_B0A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR0_B0A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR0_B0A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x180++0xB
line.long 0x0 "IOINTSEL0_B0A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL0_B0A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT0_B0A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x18C++0x7
line.long 0x0 "INDT0_B0A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT0_B0A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x194++0x1B
line.long 0x0 "INTCLR0_B0A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK0_B0A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR0_B0A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG0_B0A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL0_B0A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF0_B0A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL0_B0A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x1C0++0x13
line.long 0x0 "OUTDTSEL0_B0A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH0_B0A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL0_B0A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE0_B0A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN0_B0A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x200++0x7
line.long 0x0 "PMMR0_B0A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER0_B0A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x220++0xF
line.long 0x0 "DM0PR0_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR0_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR0_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR0_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x240++0x3
line.long 0x0 "GPSR0_B0A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x260++0xB
line.long 0x0 "IP0SR0_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR0_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR0_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x280++0xB
line.long 0x0 "DRV0CTRL0_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL0_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL0_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x2A0++0x3
line.long 0x0 "POC0_B0A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x2C0++0x3
line.long 0x0 "PUEN0_B0A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x2E0++0x3
line.long 0x0 "PUD0_B0A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x360++0xB
line.long 0x0 "PSER0_B0A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR0_B0A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR0_B0A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x380++0xB
line.long 0x0 "IOINTSEL0_B0A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL0_B0A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT0_B0A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x38C++0x7
line.long 0x0 "INDT0_B0A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT0_B0A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x394++0x1B
line.long 0x0 "INTCLR0_B0A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK0_B0A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR0_B0A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG0_B0A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL0_B0A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF0_B0A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL0_B0A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x3C0++0x13
line.long 0x0 "OUTDTSEL0_B0A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH0_B0A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL0_B0A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE0_B0A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN0_B0A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x400++0x7
line.long 0x0 "PMMR0_B0A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER0_B0A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x420++0xF
line.long 0x0 "DM0PR0_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR0_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR0_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR0_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x440++0x3
line.long 0x0 "GPSR0_B0A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x460++0xB
line.long 0x0 "IP0SR0_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR0_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR0_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x480++0xB
line.long 0x0 "DRV0CTRL0_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL0_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL0_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x4A0++0x3
line.long 0x0 "POC0_B0A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x4C0++0x3
line.long 0x0 "PUEN0_B0A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x4E0++0x3
line.long 0x0 "PUD0_B0A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x560++0xB
line.long 0x0 "PSER0_B0A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR0_B0A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR0_B0A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x580++0xB
line.long 0x0 "IOINTSEL0_B0A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL0_B0A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT0_B0A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x58C++0x7
line.long 0x0 "INDT0_B0A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT0_B0A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x594++0x1B
line.long 0x0 "INTCLR0_B0A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK0_B0A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR0_B0A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG0_B0A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL0_B0A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF0_B0A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL0_B0A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x5C0++0x13
line.long 0x0 "OUTDTSEL0_B0A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH0_B0A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL0_B0A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE0_B0A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN0_B0A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2000++0x7
line.long 0x0 "PMMR0_B1A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER0_B1A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2020++0xF
line.long 0x0 "DM0PR0_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR0_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR0_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR0_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2040++0x3
line.long 0x0 "GPSR0_B1A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2060++0xB
line.long 0x0 "IP0SR0_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR0_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR0_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2080++0xB
line.long 0x0 "DRV0CTRL0_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL0_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL0_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x20A0++0x3
line.long 0x0 "POC0_B1A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x20C0++0x3
line.long 0x0 "PUEN0_B1A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x20E0++0x3
line.long 0x0 "PUD0_B1A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2160++0xB
line.long 0x0 "PSER0_B1A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR0_B1A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR0_B1A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2180++0xB
line.long 0x0 "IOINTSEL0_B1A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL0_B1A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT0_B1A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x218C++0x7
line.long 0x0 "INDT0_B1A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT0_B1A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2194++0x1B
line.long 0x0 "INTCLR0_B1A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK0_B1A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR0_B1A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG0_B1A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL0_B1A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF0_B1A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL0_B1A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x21C0++0x13
line.long 0x0 "OUTDTSEL0_B1A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH0_B1A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL0_B1A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE0_B1A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN0_B1A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2200++0x7
line.long 0x0 "PMMR0_B1A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER0_B1A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2220++0xF
line.long 0x0 "DM0PR0_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR0_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR0_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR0_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2240++0x3
line.long 0x0 "GPSR0_B1A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2260++0xB
line.long 0x0 "IP0SR0_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR0_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR0_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2280++0xB
line.long 0x0 "DRV0CTRL0_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL0_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL0_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x22A0++0x3
line.long 0x0 "POC0_B1A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x22C0++0x3
line.long 0x0 "PUEN0_B1A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x22E0++0x3
line.long 0x0 "PUD0_B1A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2360++0xB
line.long 0x0 "PSER0_B1A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR0_B1A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR0_B1A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2380++0xB
line.long 0x0 "IOINTSEL0_B1A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL0_B1A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT0_B1A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x238C++0x7
line.long 0x0 "INDT0_B1A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT0_B1A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2394++0x1B
line.long 0x0 "INTCLR0_B1A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK0_B1A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR0_B1A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG0_B1A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL0_B1A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF0_B1A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL0_B1A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x23C0++0x13
line.long 0x0 "OUTDTSEL0_B1A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH0_B1A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL0_B1A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE0_B1A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN0_B1A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2400++0x7
line.long 0x0 "PMMR0_B1A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER0_B1A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2420++0xF
line.long 0x0 "DM0PR0_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR0_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR0_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR0_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2440++0x3
line.long 0x0 "GPSR0_B1A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2460++0xB
line.long 0x0 "IP0SR0_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR0_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR0_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2480++0xB
line.long 0x0 "DRV0CTRL0_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL0_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL0_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x24A0++0x3
line.long 0x0 "POC0_B1A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x24C0++0x3
line.long 0x0 "PUEN0_B1A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x24E0++0x3
line.long 0x0 "PUD0_B1A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2560++0xB
line.long 0x0 "PSER0_B1A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR0_B1A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR0_B1A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2580++0xB
line.long 0x0 "IOINTSEL0_B1A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL0_B1A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT0_B1A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x258C++0x7
line.long 0x0 "INDT0_B1A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT0_B1A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2594++0x1B
line.long 0x0 "INTCLR0_B1A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK0_B1A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR0_B1A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG0_B1A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL0_B1A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF0_B1A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL0_B1A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x25C0++0x13
line.long 0x0 "OUTDTSEL0_B1A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH0_B1A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL0_B1A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE0_B1A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN0_B1A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4000++0x7
line.long 0x0 "PMMR0_B2A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER0_B2A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4020++0xF
line.long 0x0 "DM0PR0_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR0_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR0_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR0_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4040++0x3
line.long 0x0 "GPSR0_B2A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4060++0xB
line.long 0x0 "IP0SR0_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR0_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR0_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4080++0xB
line.long 0x0 "DRV0CTRL0_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL0_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL0_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x40A0++0x3
line.long 0x0 "POC0_B2A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x40C0++0x3
line.long 0x0 "PUEN0_B2A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x40E0++0x3
line.long 0x0 "PUD0_B2A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4160++0xB
line.long 0x0 "PSER0_B2A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR0_B2A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR0_B2A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4180++0xB
line.long 0x0 "IOINTSEL0_B2A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL0_B2A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT0_B2A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x418C++0x7
line.long 0x0 "INDT0_B2A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT0_B2A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4194++0x1B
line.long 0x0 "INTCLR0_B2A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK0_B2A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR0_B2A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG0_B2A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL0_B2A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF0_B2A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL0_B2A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x41C0++0x13
line.long 0x0 "OUTDTSEL0_B2A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH0_B2A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL0_B2A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE0_B2A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN0_B2A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4200++0x7
line.long 0x0 "PMMR0_B2A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER0_B2A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4220++0xF
line.long 0x0 "DM0PR0_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR0_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR0_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR0_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4240++0x3
line.long 0x0 "GPSR0_B2A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4260++0xB
line.long 0x0 "IP0SR0_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR0_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR0_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4280++0xB
line.long 0x0 "DRV0CTRL0_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL0_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL0_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x42A0++0x3
line.long 0x0 "POC0_B2A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x42C0++0x3
line.long 0x0 "PUEN0_B2A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x42E0++0x3
line.long 0x0 "PUD0_B2A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4360++0xB
line.long 0x0 "PSER0_B2A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR0_B2A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR0_B2A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4380++0xB
line.long 0x0 "IOINTSEL0_B2A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL0_B2A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT0_B2A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x438C++0x7
line.long 0x0 "INDT0_B2A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT0_B2A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4394++0x1B
line.long 0x0 "INTCLR0_B2A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK0_B2A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR0_B2A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG0_B2A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL0_B2A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF0_B2A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL0_B2A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x43C0++0x13
line.long 0x0 "OUTDTSEL0_B2A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH0_B2A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL0_B2A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE0_B2A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN0_B2A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4400++0x7
line.long 0x0 "PMMR0_B2A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER0_B2A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4420++0xF
line.long 0x0 "DM0PR0_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR0_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR0_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR0_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4440++0x3
line.long 0x0 "GPSR0_B2A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4460++0xB
line.long 0x0 "IP0SR0_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR0_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR0_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4480++0xB
line.long 0x0 "DRV0CTRL0_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL0_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL0_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x44A0++0x3
line.long 0x0 "POC0_B2A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x44C0++0x3
line.long 0x0 "PUEN0_B2A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x44E0++0x3
line.long 0x0 "PUD0_B2A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4560++0xB
line.long 0x0 "PSER0_B2A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR0_B2A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR0_B2A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4580++0xB
line.long 0x0 "IOINTSEL0_B2A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL0_B2A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT0_B2A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x458C++0x7
line.long 0x0 "INDT0_B2A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT0_B2A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4594++0x1B
line.long 0x0 "INTCLR0_B2A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK0_B2A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR0_B2A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG0_B2A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL0_B2A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF0_B2A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL0_B2A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x45C0++0x13
line.long 0x0 "OUTDTSEL0_B2A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH0_B2A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL0_B2A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE0_B2A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN0_B2A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6000++0x7
line.long 0x0 "PMMR0_B3A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER0_B3A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6020++0xF
line.long 0x0 "DM0PR0_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR0_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR0_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR0_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6040++0x3
line.long 0x0 "GPSR0_B3A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6060++0xB
line.long 0x0 "IP0SR0_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR0_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR0_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6080++0xB
line.long 0x0 "DRV0CTRL0_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL0_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL0_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x60A0++0x3
line.long 0x0 "POC0_B3A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x60C0++0x3
line.long 0x0 "PUEN0_B3A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x60E0++0x3
line.long 0x0 "PUD0_B3A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6160++0xB
line.long 0x0 "PSER0_B3A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR0_B3A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR0_B3A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6180++0xB
line.long 0x0 "IOINTSEL0_B3A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL0_B3A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT0_B3A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x618C++0x7
line.long 0x0 "INDT0_B3A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT0_B3A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6194++0x1B
line.long 0x0 "INTCLR0_B3A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK0_B3A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR0_B3A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG0_B3A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL0_B3A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF0_B3A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL0_B3A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x61C0++0x13
line.long 0x0 "OUTDTSEL0_B3A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH0_B3A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL0_B3A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE0_B3A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN0_B3A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6200++0x7
line.long 0x0 "PMMR0_B3A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER0_B3A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6220++0xF
line.long 0x0 "DM0PR0_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR0_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR0_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR0_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6240++0x3
line.long 0x0 "GPSR0_B3A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6260++0xB
line.long 0x0 "IP0SR0_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR0_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR0_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6280++0xB
line.long 0x0 "DRV0CTRL0_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL0_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL0_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x62A0++0x3
line.long 0x0 "POC0_B3A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x62C0++0x3
line.long 0x0 "PUEN0_B3A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x62E0++0x3
line.long 0x0 "PUD0_B3A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6360++0xB
line.long 0x0 "PSER0_B3A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR0_B3A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR0_B3A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6380++0xB
line.long 0x0 "IOINTSEL0_B3A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL0_B3A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT0_B3A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x638C++0x7
line.long 0x0 "INDT0_B3A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT0_B3A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6394++0x1B
line.long 0x0 "INTCLR0_B3A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK0_B3A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR0_B3A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG0_B3A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL0_B3A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF0_B3A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL0_B3A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x63C0++0x13
line.long 0x0 "OUTDTSEL0_B3A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH0_B3A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL0_B3A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE0_B3A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN0_B3A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6400++0x7
line.long 0x0 "PMMR0_B3A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER0_B3A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6420++0xF
line.long 0x0 "DM0PR0_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR0_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR0_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR0_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6440++0x3
line.long 0x0 "GPSR0_B3A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6460++0xB
line.long 0x0 "IP0SR0_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR0_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR0_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6480++0xB
line.long 0x0 "DRV0CTRL0_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL0_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL0_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x64A0++0x3
line.long 0x0 "POC0_B3A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x64C0++0x3
line.long 0x0 "PUEN0_B3A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x64E0++0x3
line.long 0x0 "PUD0_B3A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6560++0xB
line.long 0x0 "PSER0_B3A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR0_B3A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR0_B3A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6580++0xB
line.long 0x0 "IOINTSEL0_B3A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL0_B3A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT0_B3A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x658C++0x7
line.long 0x0 "INDT0_B3A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT0_B3A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6594++0x1B
line.long 0x0 "INTCLR0_B3A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK0_B3A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR0_B3A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG0_B3A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL0_B3A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF0_B3A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL0_B3A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x65C0++0x13
line.long 0x0 "OUTDTSEL0_B3A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH0_B3A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL0_B3A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE0_B3A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN0_B3A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
tree.end
tree "PFC_GPIO_for_GP1"
base ad:0xE6050800
group.long 0x0++0x7
line.long 0x0 "PMMR1_B0A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER1_B0A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x20++0xF
line.long 0x0 "DM0PR1_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR1_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR1_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR1_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x40++0x3
line.long 0x0 "GPSR1_B0A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x60++0xF
line.long 0x0 "IP0SR1_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR1_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR1_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0xC "IP3SR1_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0xC 0.--31. 1. "IP3SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x80++0xF
line.long 0x0 "DRV0CTRL1_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL1_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL1_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL1_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0xA0++0x3
line.long 0x0 "POC1_B0A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0xC0++0x3
line.long 0x0 "PUEN1_B0A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0xE0++0x3
line.long 0x0 "PUD1_B0A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x160++0xB
line.long 0x0 "PSER1_B0A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR1_B0A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR1_B0A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x180++0xB
line.long 0x0 "IOINTSEL1_B0A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL1_B0A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT1_B0A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x18C++0x7
line.long 0x0 "INDT1_B0A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT1_B0A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x194++0x1B
line.long 0x0 "INTCLR1_B0A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK1_B0A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR1_B0A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG1_B0A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL1_B0A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF1_B0A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL1_B0A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x1C0++0x13
line.long 0x0 "OUTDTSEL1_B0A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH1_B0A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL1_B0A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE1_B0A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN1_B0A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x200++0x7
line.long 0x0 "PMMR1_B0A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER1_B0A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x220++0xF
line.long 0x0 "DM0PR1_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR1_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR1_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR1_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x240++0x3
line.long 0x0 "GPSR1_B0A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x260++0xF
line.long 0x0 "IP0SR1_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR1_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR1_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0xC "IP3SR1_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0xC 0.--31. 1. "IP3SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x280++0xF
line.long 0x0 "DRV0CTRL1_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL1_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL1_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL1_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x2A0++0x3
line.long 0x0 "POC1_B0A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x2C0++0x3
line.long 0x0 "PUEN1_B0A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x2E0++0x3
line.long 0x0 "PUD1_B0A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x360++0xB
line.long 0x0 "PSER1_B0A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR1_B0A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR1_B0A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x380++0xB
line.long 0x0 "IOINTSEL1_B0A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL1_B0A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT1_B0A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x38C++0x7
line.long 0x0 "INDT1_B0A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT1_B0A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x394++0x1B
line.long 0x0 "INTCLR1_B0A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK1_B0A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR1_B0A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG1_B0A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL1_B0A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF1_B0A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL1_B0A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x3C0++0x13
line.long 0x0 "OUTDTSEL1_B0A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH1_B0A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL1_B0A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE1_B0A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN1_B0A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x400++0x7
line.long 0x0 "PMMR1_B0A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER1_B0A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x420++0xF
line.long 0x0 "DM0PR1_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR1_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR1_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR1_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x440++0x3
line.long 0x0 "GPSR1_B0A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x460++0xF
line.long 0x0 "IP0SR1_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR1_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR1_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0xC "IP3SR1_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0xC 0.--31. 1. "IP3SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x480++0xF
line.long 0x0 "DRV0CTRL1_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL1_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL1_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL1_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x4A0++0x3
line.long 0x0 "POC1_B0A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x4C0++0x3
line.long 0x0 "PUEN1_B0A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x4E0++0x3
line.long 0x0 "PUD1_B0A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x560++0xB
line.long 0x0 "PSER1_B0A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR1_B0A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR1_B0A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x580++0xB
line.long 0x0 "IOINTSEL1_B0A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL1_B0A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT1_B0A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x58C++0x7
line.long 0x0 "INDT1_B0A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT1_B0A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x594++0x1B
line.long 0x0 "INTCLR1_B0A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK1_B0A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR1_B0A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG1_B0A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL1_B0A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF1_B0A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL1_B0A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x5C0++0x13
line.long 0x0 "OUTDTSEL1_B0A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH1_B0A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL1_B0A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE1_B0A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN1_B0A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2000++0x7
line.long 0x0 "PMMR1_B1A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER1_B1A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2020++0xF
line.long 0x0 "DM0PR1_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR1_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR1_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR1_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2040++0x3
line.long 0x0 "GPSR1_B1A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2060++0xF
line.long 0x0 "IP0SR1_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR1_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR1_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0xC "IP3SR1_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0xC 0.--31. 1. "IP3SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2080++0xF
line.long 0x0 "DRV0CTRL1_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL1_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL1_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL1_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x20A0++0x3
line.long 0x0 "POC1_B1A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x20C0++0x3
line.long 0x0 "PUEN1_B1A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x20E0++0x3
line.long 0x0 "PUD1_B1A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2160++0xB
line.long 0x0 "PSER1_B1A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR1_B1A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR1_B1A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2180++0xB
line.long 0x0 "IOINTSEL1_B1A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL1_B1A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT1_B1A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x218C++0x7
line.long 0x0 "INDT1_B1A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT1_B1A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2194++0x1B
line.long 0x0 "INTCLR1_B1A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK1_B1A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR1_B1A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG1_B1A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL1_B1A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF1_B1A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL1_B1A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x21C0++0x13
line.long 0x0 "OUTDTSEL1_B1A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH1_B1A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL1_B1A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE1_B1A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN1_B1A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2200++0x7
line.long 0x0 "PMMR1_B1A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER1_B1A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2220++0xF
line.long 0x0 "DM0PR1_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR1_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR1_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR1_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2240++0x3
line.long 0x0 "GPSR1_B1A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2260++0xF
line.long 0x0 "IP0SR1_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR1_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR1_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0xC "IP3SR1_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0xC 0.--31. 1. "IP3SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2280++0xF
line.long 0x0 "DRV0CTRL1_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL1_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL1_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL1_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x22A0++0x3
line.long 0x0 "POC1_B1A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x22C0++0x3
line.long 0x0 "PUEN1_B1A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x22E0++0x3
line.long 0x0 "PUD1_B1A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2360++0xB
line.long 0x0 "PSER1_B1A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR1_B1A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR1_B1A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2380++0xB
line.long 0x0 "IOINTSEL1_B1A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL1_B1A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT1_B1A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x238C++0x7
line.long 0x0 "INDT1_B1A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT1_B1A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2394++0x1B
line.long 0x0 "INTCLR1_B1A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK1_B1A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR1_B1A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG1_B1A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL1_B1A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF1_B1A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL1_B1A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x23C0++0x13
line.long 0x0 "OUTDTSEL1_B1A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH1_B1A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL1_B1A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE1_B1A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN1_B1A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2400++0x7
line.long 0x0 "PMMR1_B1A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER1_B1A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2420++0xF
line.long 0x0 "DM0PR1_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR1_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR1_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR1_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2440++0x3
line.long 0x0 "GPSR1_B1A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2460++0xF
line.long 0x0 "IP0SR1_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR1_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR1_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0xC "IP3SR1_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0xC 0.--31. 1. "IP3SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2480++0xF
line.long 0x0 "DRV0CTRL1_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL1_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL1_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL1_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x24A0++0x3
line.long 0x0 "POC1_B1A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x24C0++0x3
line.long 0x0 "PUEN1_B1A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x24E0++0x3
line.long 0x0 "PUD1_B1A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2560++0xB
line.long 0x0 "PSER1_B1A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR1_B1A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR1_B1A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2580++0xB
line.long 0x0 "IOINTSEL1_B1A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL1_B1A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT1_B1A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x258C++0x7
line.long 0x0 "INDT1_B1A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT1_B1A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2594++0x1B
line.long 0x0 "INTCLR1_B1A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK1_B1A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR1_B1A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG1_B1A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL1_B1A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF1_B1A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL1_B1A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x25C0++0x13
line.long 0x0 "OUTDTSEL1_B1A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH1_B1A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL1_B1A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE1_B1A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN1_B1A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4000++0x7
line.long 0x0 "PMMR1_B2A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER1_B2A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4020++0xF
line.long 0x0 "DM0PR1_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR1_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR1_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR1_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4040++0x3
line.long 0x0 "GPSR1_B2A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4060++0xF
line.long 0x0 "IP0SR1_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR1_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR1_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0xC "IP3SR1_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0xC 0.--31. 1. "IP3SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4080++0xF
line.long 0x0 "DRV0CTRL1_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL1_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL1_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL1_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x40A0++0x3
line.long 0x0 "POC1_B2A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x40C0++0x3
line.long 0x0 "PUEN1_B2A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x40E0++0x3
line.long 0x0 "PUD1_B2A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4160++0xB
line.long 0x0 "PSER1_B2A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR1_B2A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR1_B2A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4180++0xB
line.long 0x0 "IOINTSEL1_B2A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL1_B2A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT1_B2A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x418C++0x7
line.long 0x0 "INDT1_B2A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT1_B2A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4194++0x1B
line.long 0x0 "INTCLR1_B2A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK1_B2A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR1_B2A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG1_B2A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL1_B2A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF1_B2A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL1_B2A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x41C0++0x13
line.long 0x0 "OUTDTSEL1_B2A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH1_B2A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL1_B2A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE1_B2A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN1_B2A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4200++0x7
line.long 0x0 "PMMR1_B2A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER1_B2A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4220++0xF
line.long 0x0 "DM0PR1_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR1_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR1_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR1_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4240++0x3
line.long 0x0 "GPSR1_B2A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4260++0xF
line.long 0x0 "IP0SR1_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR1_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR1_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0xC "IP3SR1_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0xC 0.--31. 1. "IP3SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4280++0xF
line.long 0x0 "DRV0CTRL1_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL1_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL1_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL1_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x42A0++0x3
line.long 0x0 "POC1_B2A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x42C0++0x3
line.long 0x0 "PUEN1_B2A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x42E0++0x3
line.long 0x0 "PUD1_B2A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4360++0xB
line.long 0x0 "PSER1_B2A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR1_B2A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR1_B2A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4380++0xB
line.long 0x0 "IOINTSEL1_B2A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL1_B2A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT1_B2A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x438C++0x7
line.long 0x0 "INDT1_B2A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT1_B2A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4394++0x1B
line.long 0x0 "INTCLR1_B2A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK1_B2A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR1_B2A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG1_B2A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL1_B2A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF1_B2A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL1_B2A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x43C0++0x13
line.long 0x0 "OUTDTSEL1_B2A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH1_B2A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL1_B2A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE1_B2A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN1_B2A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4400++0x7
line.long 0x0 "PMMR1_B2A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER1_B2A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4420++0xF
line.long 0x0 "DM0PR1_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR1_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR1_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR1_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4440++0x3
line.long 0x0 "GPSR1_B2A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4460++0xF
line.long 0x0 "IP0SR1_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR1_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR1_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0xC "IP3SR1_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0xC 0.--31. 1. "IP3SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4480++0xF
line.long 0x0 "DRV0CTRL1_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL1_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL1_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL1_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x44A0++0x3
line.long 0x0 "POC1_B2A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x44C0++0x3
line.long 0x0 "PUEN1_B2A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x44E0++0x3
line.long 0x0 "PUD1_B2A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4560++0xB
line.long 0x0 "PSER1_B2A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR1_B2A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR1_B2A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4580++0xB
line.long 0x0 "IOINTSEL1_B2A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL1_B2A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT1_B2A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x458C++0x7
line.long 0x0 "INDT1_B2A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT1_B2A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4594++0x1B
line.long 0x0 "INTCLR1_B2A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK1_B2A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR1_B2A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG1_B2A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL1_B2A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF1_B2A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL1_B2A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x45C0++0x13
line.long 0x0 "OUTDTSEL1_B2A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH1_B2A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL1_B2A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE1_B2A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN1_B2A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6000++0x7
line.long 0x0 "PMMR1_B3A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER1_B3A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6020++0xF
line.long 0x0 "DM0PR1_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR1_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR1_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR1_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6040++0x3
line.long 0x0 "GPSR1_B3A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6060++0xF
line.long 0x0 "IP0SR1_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR1_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR1_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0xC "IP3SR1_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0xC 0.--31. 1. "IP3SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6080++0xF
line.long 0x0 "DRV0CTRL1_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL1_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL1_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL1_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x60A0++0x3
line.long 0x0 "POC1_B3A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x60C0++0x3
line.long 0x0 "PUEN1_B3A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x60E0++0x3
line.long 0x0 "PUD1_B3A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6160++0xB
line.long 0x0 "PSER1_B3A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR1_B3A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR1_B3A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6180++0xB
line.long 0x0 "IOINTSEL1_B3A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL1_B3A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT1_B3A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x618C++0x7
line.long 0x0 "INDT1_B3A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT1_B3A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6194++0x1B
line.long 0x0 "INTCLR1_B3A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK1_B3A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR1_B3A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG1_B3A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL1_B3A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF1_B3A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL1_B3A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x61C0++0x13
line.long 0x0 "OUTDTSEL1_B3A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH1_B3A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL1_B3A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE1_B3A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN1_B3A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6200++0x7
line.long 0x0 "PMMR1_B3A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER1_B3A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6220++0xF
line.long 0x0 "DM0PR1_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR1_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR1_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR1_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6240++0x3
line.long 0x0 "GPSR1_B3A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6260++0xF
line.long 0x0 "IP0SR1_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR1_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR1_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0xC "IP3SR1_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0xC 0.--31. 1. "IP3SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6280++0xF
line.long 0x0 "DRV0CTRL1_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL1_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL1_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL1_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x62A0++0x3
line.long 0x0 "POC1_B3A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x62C0++0x3
line.long 0x0 "PUEN1_B3A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x62E0++0x3
line.long 0x0 "PUD1_B3A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6360++0xB
line.long 0x0 "PSER1_B3A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR1_B3A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR1_B3A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6380++0xB
line.long 0x0 "IOINTSEL1_B3A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL1_B3A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT1_B3A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x638C++0x7
line.long 0x0 "INDT1_B3A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT1_B3A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6394++0x1B
line.long 0x0 "INTCLR1_B3A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK1_B3A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR1_B3A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG1_B3A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL1_B3A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF1_B3A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL1_B3A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x63C0++0x13
line.long 0x0 "OUTDTSEL1_B3A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH1_B3A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL1_B3A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE1_B3A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN1_B3A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6400++0x7
line.long 0x0 "PMMR1_B3A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER1_B3A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6420++0xF
line.long 0x0 "DM0PR1_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR1_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR1_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR1_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6440++0x3
line.long 0x0 "GPSR1_B3A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6460++0xF
line.long 0x0 "IP0SR1_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR1_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR1_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0xC "IP3SR1_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0xC 0.--31. 1. "IP3SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6480++0xF
line.long 0x0 "DRV0CTRL1_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL1_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL1_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL1_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x64A0++0x3
line.long 0x0 "POC1_B3A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x64C0++0x3
line.long 0x0 "PUEN1_B3A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x64E0++0x3
line.long 0x0 "PUD1_B3A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6560++0xB
line.long 0x0 "PSER1_B3A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR1_B3A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR1_B3A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6580++0xB
line.long 0x0 "IOINTSEL1_B3A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL1_B3A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT1_B3A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x658C++0x7
line.long 0x0 "INDT1_B3A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT1_B3A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6594++0x1B
line.long 0x0 "INTCLR1_B3A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK1_B3A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR1_B3A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG1_B3A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL1_B3A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF1_B3A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL1_B3A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x65C0++0x13
line.long 0x0 "OUTDTSEL1_B3A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH1_B3A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL1_B3A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE1_B3A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN1_B3A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
tree.end
tree "PFC_GPIO_for_GP2"
base ad:0xE6058000
group.long 0x0++0x7
line.long 0x0 "PMMR2_B0A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER2_B0A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x20++0xF
line.long 0x0 "DM0PR2_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR2_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR2_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR2_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x40++0x3
line.long 0x0 "GPSR2_B0A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x60++0xB
line.long 0x0 "IP0SR2_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR2_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR2_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x80++0xB
line.long 0x0 "DRV0CTRL2_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL2_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL2_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0xC0++0x3
line.long 0x0 "PUEN2_B0A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0xE0++0x3
line.long 0x0 "PUD2_B0A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x160++0xB
line.long 0x0 "PSER2_B0A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR2_B0A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR2_B0A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x180++0xB
line.long 0x0 "IOINTSEL2_B0A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL2_B0A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT2_B0A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x18C++0x7
line.long 0x0 "INDT2_B0A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT2_B0A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x194++0x1B
line.long 0x0 "INTCLR2_B0A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK2_B0A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR2_B0A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG2_B0A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL2_B0A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF2_B0A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL2_B0A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x1C0++0x13
line.long 0x0 "OUTDTSEL2_B0A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH2_B0A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL2_B0A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE2_B0A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN2_B0A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x200++0x7
line.long 0x0 "PMMR2_B0A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER2_B0A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x220++0xF
line.long 0x0 "DM0PR2_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR2_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR2_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR2_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x240++0x3
line.long 0x0 "GPSR2_B0A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x260++0xB
line.long 0x0 "IP0SR2_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR2_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR2_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x280++0xB
line.long 0x0 "DRV0CTRL2_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL2_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL2_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x2C0++0x3
line.long 0x0 "PUEN2_B0A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x2E0++0x3
line.long 0x0 "PUD2_B0A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x360++0xB
line.long 0x0 "PSER2_B0A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR2_B0A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR2_B0A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x380++0xB
line.long 0x0 "IOINTSEL2_B0A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL2_B0A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT2_B0A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x38C++0x7
line.long 0x0 "INDT2_B0A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT2_B0A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x394++0x1B
line.long 0x0 "INTCLR2_B0A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK2_B0A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR2_B0A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG2_B0A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL2_B0A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF2_B0A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL2_B0A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x3C0++0x13
line.long 0x0 "OUTDTSEL2_B0A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH2_B0A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL2_B0A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE2_B0A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN2_B0A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x400++0x7
line.long 0x0 "PMMR2_B0A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER2_B0A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x420++0xF
line.long 0x0 "DM0PR2_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR2_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR2_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR2_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x440++0x3
line.long 0x0 "GPSR2_B0A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x460++0xB
line.long 0x0 "IP0SR2_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR2_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR2_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x480++0xB
line.long 0x0 "DRV0CTRL2_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL2_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL2_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x4C0++0x3
line.long 0x0 "PUEN2_B0A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x4E0++0x3
line.long 0x0 "PUD2_B0A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x560++0xB
line.long 0x0 "PSER2_B0A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR2_B0A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR2_B0A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x580++0xB
line.long 0x0 "IOINTSEL2_B0A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL2_B0A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT2_B0A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x58C++0x7
line.long 0x0 "INDT2_B0A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT2_B0A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x594++0x1B
line.long 0x0 "INTCLR2_B0A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK2_B0A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR2_B0A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG2_B0A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL2_B0A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF2_B0A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL2_B0A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x5C0++0x13
line.long 0x0 "OUTDTSEL2_B0A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH2_B0A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL2_B0A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE2_B0A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN2_B0A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2000++0x7
line.long 0x0 "PMMR2_B1A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER2_B1A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2020++0xF
line.long 0x0 "DM0PR2_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR2_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR2_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR2_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2040++0x3
line.long 0x0 "GPSR2_B1A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2060++0xB
line.long 0x0 "IP0SR2_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR2_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR2_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2080++0xB
line.long 0x0 "DRV0CTRL2_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL2_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL2_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x20C0++0x3
line.long 0x0 "PUEN2_B1A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x20E0++0x3
line.long 0x0 "PUD2_B1A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2160++0xB
line.long 0x0 "PSER2_B1A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR2_B1A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR2_B1A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2180++0xB
line.long 0x0 "IOINTSEL2_B1A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL2_B1A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT2_B1A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x218C++0x7
line.long 0x0 "INDT2_B1A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT2_B1A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2194++0x1B
line.long 0x0 "INTCLR2_B1A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK2_B1A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR2_B1A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG2_B1A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL2_B1A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF2_B1A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL2_B1A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x21C0++0x13
line.long 0x0 "OUTDTSEL2_B1A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH2_B1A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL2_B1A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE2_B1A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN2_B1A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2200++0x7
line.long 0x0 "PMMR2_B1A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER2_B1A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2220++0xF
line.long 0x0 "DM0PR2_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR2_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR2_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR2_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2240++0x3
line.long 0x0 "GPSR2_B1A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2260++0xB
line.long 0x0 "IP0SR2_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR2_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR2_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2280++0xB
line.long 0x0 "DRV0CTRL2_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL2_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL2_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x22C0++0x3
line.long 0x0 "PUEN2_B1A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x22E0++0x3
line.long 0x0 "PUD2_B1A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2360++0xB
line.long 0x0 "PSER2_B1A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR2_B1A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR2_B1A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2380++0xB
line.long 0x0 "IOINTSEL2_B1A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL2_B1A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT2_B1A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x238C++0x7
line.long 0x0 "INDT2_B1A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT2_B1A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2394++0x1B
line.long 0x0 "INTCLR2_B1A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK2_B1A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR2_B1A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG2_B1A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL2_B1A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF2_B1A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL2_B1A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x23C0++0x13
line.long 0x0 "OUTDTSEL2_B1A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH2_B1A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL2_B1A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE2_B1A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN2_B1A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2400++0x7
line.long 0x0 "PMMR2_B1A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER2_B1A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2420++0xF
line.long 0x0 "DM0PR2_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR2_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR2_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR2_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2440++0x3
line.long 0x0 "GPSR2_B1A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2460++0xB
line.long 0x0 "IP0SR2_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR2_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR2_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2480++0xB
line.long 0x0 "DRV0CTRL2_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL2_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL2_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x24C0++0x3
line.long 0x0 "PUEN2_B1A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x24E0++0x3
line.long 0x0 "PUD2_B1A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2560++0xB
line.long 0x0 "PSER2_B1A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR2_B1A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR2_B1A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2580++0xB
line.long 0x0 "IOINTSEL2_B1A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL2_B1A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT2_B1A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x258C++0x7
line.long 0x0 "INDT2_B1A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT2_B1A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2594++0x1B
line.long 0x0 "INTCLR2_B1A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK2_B1A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR2_B1A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG2_B1A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL2_B1A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF2_B1A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL2_B1A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x25C0++0x13
line.long 0x0 "OUTDTSEL2_B1A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH2_B1A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL2_B1A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE2_B1A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN2_B1A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4000++0x7
line.long 0x0 "PMMR2_B2A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER2_B2A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4020++0xF
line.long 0x0 "DM0PR2_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR2_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR2_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR2_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4040++0x3
line.long 0x0 "GPSR2_B2A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4060++0xB
line.long 0x0 "IP0SR2_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR2_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR2_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4080++0xB
line.long 0x0 "DRV0CTRL2_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL2_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL2_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x40C0++0x3
line.long 0x0 "PUEN2_B2A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x40E0++0x3
line.long 0x0 "PUD2_B2A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4160++0xB
line.long 0x0 "PSER2_B2A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR2_B2A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR2_B2A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4180++0xB
line.long 0x0 "IOINTSEL2_B2A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL2_B2A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT2_B2A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x418C++0x7
line.long 0x0 "INDT2_B2A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT2_B2A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4194++0x1B
line.long 0x0 "INTCLR2_B2A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK2_B2A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR2_B2A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG2_B2A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL2_B2A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF2_B2A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL2_B2A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x41C0++0x13
line.long 0x0 "OUTDTSEL2_B2A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH2_B2A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL2_B2A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE2_B2A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN2_B2A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4200++0x7
line.long 0x0 "PMMR2_B2A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER2_B2A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4220++0xF
line.long 0x0 "DM0PR2_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR2_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR2_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR2_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4240++0x3
line.long 0x0 "GPSR2_B2A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4260++0xB
line.long 0x0 "IP0SR2_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR2_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR2_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4280++0xB
line.long 0x0 "DRV0CTRL2_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL2_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL2_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x42C0++0x3
line.long 0x0 "PUEN2_B2A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x42E0++0x3
line.long 0x0 "PUD2_B2A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4360++0xB
line.long 0x0 "PSER2_B2A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR2_B2A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR2_B2A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4380++0xB
line.long 0x0 "IOINTSEL2_B2A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL2_B2A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT2_B2A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x438C++0x7
line.long 0x0 "INDT2_B2A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT2_B2A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4394++0x1B
line.long 0x0 "INTCLR2_B2A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK2_B2A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR2_B2A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG2_B2A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL2_B2A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF2_B2A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL2_B2A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x43C0++0x13
line.long 0x0 "OUTDTSEL2_B2A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH2_B2A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL2_B2A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE2_B2A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN2_B2A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4400++0x7
line.long 0x0 "PMMR2_B2A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER2_B2A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4420++0xF
line.long 0x0 "DM0PR2_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR2_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR2_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR2_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4440++0x3
line.long 0x0 "GPSR2_B2A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4460++0xB
line.long 0x0 "IP0SR2_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR2_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR2_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4480++0xB
line.long 0x0 "DRV0CTRL2_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL2_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL2_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x44C0++0x3
line.long 0x0 "PUEN2_B2A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x44E0++0x3
line.long 0x0 "PUD2_B2A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4560++0xB
line.long 0x0 "PSER2_B2A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR2_B2A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR2_B2A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4580++0xB
line.long 0x0 "IOINTSEL2_B2A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL2_B2A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT2_B2A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x458C++0x7
line.long 0x0 "INDT2_B2A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT2_B2A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4594++0x1B
line.long 0x0 "INTCLR2_B2A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK2_B2A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR2_B2A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG2_B2A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL2_B2A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF2_B2A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL2_B2A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x45C0++0x13
line.long 0x0 "OUTDTSEL2_B2A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH2_B2A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL2_B2A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE2_B2A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN2_B2A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6000++0x7
line.long 0x0 "PMMR2_B3A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER2_B3A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6020++0xF
line.long 0x0 "DM0PR2_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR2_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR2_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR2_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6040++0x3
line.long 0x0 "GPSR2_B3A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6060++0xB
line.long 0x0 "IP0SR2_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR2_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR2_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6080++0xB
line.long 0x0 "DRV0CTRL2_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL2_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL2_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x60C0++0x3
line.long 0x0 "PUEN2_B3A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x60E0++0x3
line.long 0x0 "PUD2_B3A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6160++0xB
line.long 0x0 "PSER2_B3A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR2_B3A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR2_B3A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6180++0xB
line.long 0x0 "IOINTSEL2_B3A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL2_B3A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT2_B3A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x618C++0x7
line.long 0x0 "INDT2_B3A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT2_B3A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6194++0x1B
line.long 0x0 "INTCLR2_B3A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK2_B3A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR2_B3A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG2_B3A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL2_B3A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF2_B3A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL2_B3A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x61C0++0x13
line.long 0x0 "OUTDTSEL2_B3A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH2_B3A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL2_B3A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE2_B3A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN2_B3A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6200++0x7
line.long 0x0 "PMMR2_B3A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER2_B3A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6220++0xF
line.long 0x0 "DM0PR2_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR2_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR2_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR2_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6240++0x3
line.long 0x0 "GPSR2_B3A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6260++0xB
line.long 0x0 "IP0SR2_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR2_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR2_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6280++0xB
line.long 0x0 "DRV0CTRL2_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL2_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL2_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x62C0++0x3
line.long 0x0 "PUEN2_B3A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x62E0++0x3
line.long 0x0 "PUD2_B3A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6360++0xB
line.long 0x0 "PSER2_B3A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR2_B3A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR2_B3A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6380++0xB
line.long 0x0 "IOINTSEL2_B3A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL2_B3A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT2_B3A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x638C++0x7
line.long 0x0 "INDT2_B3A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT2_B3A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6394++0x1B
line.long 0x0 "INTCLR2_B3A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK2_B3A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR2_B3A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG2_B3A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL2_B3A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF2_B3A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL2_B3A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x63C0++0x13
line.long 0x0 "OUTDTSEL2_B3A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH2_B3A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL2_B3A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE2_B3A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN2_B3A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6400++0x7
line.long 0x0 "PMMR2_B3A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER2_B3A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6420++0xF
line.long 0x0 "DM0PR2_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR2_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR2_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR2_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6440++0x3
line.long 0x0 "GPSR2_B3A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6460++0xB
line.long 0x0 "IP0SR2_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR2_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR2_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6480++0xB
line.long 0x0 "DRV0CTRL2_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL2_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL2_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x64C0++0x3
line.long 0x0 "PUEN2_B3A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x64E0++0x3
line.long 0x0 "PUD2_B3A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6560++0xB
line.long 0x0 "PSER2_B3A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR2_B3A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR2_B3A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6580++0xB
line.long 0x0 "IOINTSEL2_B3A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL2_B3A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT2_B3A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x658C++0x7
line.long 0x0 "INDT2_B3A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT2_B3A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6594++0x1B
line.long 0x0 "INTCLR2_B3A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK2_B3A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR2_B3A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG2_B3A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL2_B3A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF2_B3A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL2_B3A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x65C0++0x13
line.long 0x0 "OUTDTSEL2_B3A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH2_B3A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL2_B3A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE2_B3A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN2_B3A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
tree.end
tree "PFC_GPIO_for_GP3"
base ad:0xE6058800
group.long 0x0++0x7
line.long 0x0 "PMMR3_B0A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER3_B0A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x20++0xF
line.long 0x0 "DM0PR3_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR3_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR3_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR3_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x40++0x3
line.long 0x0 "GPSR3_B0A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x64++0x3
line.long 0x0 "IP1SR3_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x80++0xF
line.long 0x0 "DRV0CTRL3_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL3_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL3_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL3_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0xA0++0x3
line.long 0x0 "POC3_B0A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0xC0++0x3
line.long 0x0 "PUEN3_B0A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0xE0++0x3
line.long 0x0 "PUD3_B0A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x120++0x3
line.long 0x0 "TD0SEL3_B0A0,TD*SELn / TD*SELSYS controls the driving abilities of pins in use for the SDHI."
hexmask.long 0x0 0.--31. 1. "TD0SEL_31_0,This function is delay adjustment of the SDHI clock return path for the LSI inside."
group.long 0x160++0xB
line.long 0x0 "PSER3_B0A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR3_B0A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR3_B0A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x180++0xB
line.long 0x0 "IOINTSEL3_B0A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL3_B0A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT3_B0A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x18C++0x7
line.long 0x0 "INDT3_B0A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT3_B0A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x194++0x1B
line.long 0x0 "INTCLR3_B0A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK3_B0A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR3_B0A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG3_B0A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL3_B0A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF3_B0A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL3_B0A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x1C0++0x13
line.long 0x0 "OUTDTSEL3_B0A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH3_B0A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL3_B0A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE3_B0A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN3_B0A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x200++0x7
line.long 0x0 "PMMR3_B0A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER3_B0A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x220++0xF
line.long 0x0 "DM0PR3_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR3_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR3_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR3_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x240++0x3
line.long 0x0 "GPSR3_B0A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x264++0x3
line.long 0x0 "IP1SR3_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x280++0xF
line.long 0x0 "DRV0CTRL3_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL3_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL3_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL3_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x2A0++0x3
line.long 0x0 "POC3_B0A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x2C0++0x3
line.long 0x0 "PUEN3_B0A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x2E0++0x3
line.long 0x0 "PUD3_B0A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x320++0x3
line.long 0x0 "TD0SEL3_B0A1,TD*SELn / TD*SELSYS controls the driving abilities of pins in use for the SDHI."
hexmask.long 0x0 0.--31. 1. "TD0SEL_31_0,This function is delay adjustment of the SDHI clock return path for the LSI inside."
group.long 0x360++0xB
line.long 0x0 "PSER3_B0A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR3_B0A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR3_B0A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x380++0xB
line.long 0x0 "IOINTSEL3_B0A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL3_B0A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT3_B0A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x38C++0x7
line.long 0x0 "INDT3_B0A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT3_B0A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x394++0x1B
line.long 0x0 "INTCLR3_B0A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK3_B0A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR3_B0A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG3_B0A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL3_B0A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF3_B0A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL3_B0A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x3C0++0x13
line.long 0x0 "OUTDTSEL3_B0A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH3_B0A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL3_B0A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE3_B0A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN3_B0A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x400++0x7
line.long 0x0 "PMMR3_B0A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER3_B0A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x420++0xF
line.long 0x0 "DM0PR3_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR3_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR3_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR3_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x440++0x3
line.long 0x0 "GPSR3_B0A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x464++0x3
line.long 0x0 "IP1SR3_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x480++0xF
line.long 0x0 "DRV0CTRL3_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL3_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL3_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL3_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x4A0++0x3
line.long 0x0 "POC3_B0A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x4C0++0x3
line.long 0x0 "PUEN3_B0A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x4E0++0x3
line.long 0x0 "PUD3_B0A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x520++0x3
line.long 0x0 "TD0SEL3_B0A2,TD*SELn / TD*SELSYS controls the driving abilities of pins in use for the SDHI."
hexmask.long 0x0 0.--31. 1. "TD0SEL_31_0,This function is delay adjustment of the SDHI clock return path for the LSI inside."
group.long 0x560++0xB
line.long 0x0 "PSER3_B0A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR3_B0A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR3_B0A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x580++0xB
line.long 0x0 "IOINTSEL3_B0A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL3_B0A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT3_B0A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x58C++0x7
line.long 0x0 "INDT3_B0A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT3_B0A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x594++0x1B
line.long 0x0 "INTCLR3_B0A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK3_B0A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR3_B0A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG3_B0A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL3_B0A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF3_B0A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL3_B0A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x5C0++0x13
line.long 0x0 "OUTDTSEL3_B0A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH3_B0A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL3_B0A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE3_B0A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN3_B0A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2000++0x7
line.long 0x0 "PMMR3_B1A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER3_B1A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2020++0xF
line.long 0x0 "DM0PR3_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR3_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR3_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR3_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2040++0x3
line.long 0x0 "GPSR3_B1A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2064++0x3
line.long 0x0 "IP1SR3_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2080++0xF
line.long 0x0 "DRV0CTRL3_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL3_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL3_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL3_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x20A0++0x3
line.long 0x0 "POC3_B1A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x20C0++0x3
line.long 0x0 "PUEN3_B1A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x20E0++0x3
line.long 0x0 "PUD3_B1A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2120++0x3
line.long 0x0 "TD0SEL3_B1A0,TD*SELn / TD*SELSYS controls the driving abilities of pins in use for the SDHI."
hexmask.long 0x0 0.--31. 1. "TD0SEL_31_0,This function is delay adjustment of the SDHI clock return path for the LSI inside."
group.long 0x2160++0xB
line.long 0x0 "PSER3_B1A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR3_B1A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR3_B1A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2180++0xB
line.long 0x0 "IOINTSEL3_B1A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL3_B1A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT3_B1A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x218C++0x7
line.long 0x0 "INDT3_B1A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT3_B1A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2194++0x1B
line.long 0x0 "INTCLR3_B1A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK3_B1A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR3_B1A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG3_B1A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL3_B1A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF3_B1A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL3_B1A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x21C0++0x13
line.long 0x0 "OUTDTSEL3_B1A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH3_B1A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL3_B1A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE3_B1A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN3_B1A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2200++0x7
line.long 0x0 "PMMR3_B1A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER3_B1A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2220++0xF
line.long 0x0 "DM0PR3_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR3_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR3_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR3_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2240++0x3
line.long 0x0 "GPSR3_B1A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2264++0x3
line.long 0x0 "IP1SR3_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2280++0xF
line.long 0x0 "DRV0CTRL3_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL3_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL3_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL3_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x22A0++0x3
line.long 0x0 "POC3_B1A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x22C0++0x3
line.long 0x0 "PUEN3_B1A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x22E0++0x3
line.long 0x0 "PUD3_B1A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2320++0x3
line.long 0x0 "TD0SEL3_B1A1,TD*SELn / TD*SELSYS controls the driving abilities of pins in use for the SDHI."
hexmask.long 0x0 0.--31. 1. "TD0SEL_31_0,This function is delay adjustment of the SDHI clock return path for the LSI inside."
group.long 0x2360++0xB
line.long 0x0 "PSER3_B1A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR3_B1A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR3_B1A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2380++0xB
line.long 0x0 "IOINTSEL3_B1A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL3_B1A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT3_B1A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x238C++0x7
line.long 0x0 "INDT3_B1A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT3_B1A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2394++0x1B
line.long 0x0 "INTCLR3_B1A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK3_B1A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR3_B1A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG3_B1A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL3_B1A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF3_B1A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL3_B1A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x23C0++0x13
line.long 0x0 "OUTDTSEL3_B1A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH3_B1A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL3_B1A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE3_B1A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN3_B1A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2400++0x7
line.long 0x0 "PMMR3_B1A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER3_B1A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2420++0xF
line.long 0x0 "DM0PR3_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR3_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR3_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR3_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2440++0x3
line.long 0x0 "GPSR3_B1A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2464++0x3
line.long 0x0 "IP1SR3_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2480++0xF
line.long 0x0 "DRV0CTRL3_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL3_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL3_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL3_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x24A0++0x3
line.long 0x0 "POC3_B1A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x24C0++0x3
line.long 0x0 "PUEN3_B1A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x24E0++0x3
line.long 0x0 "PUD3_B1A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2520++0x3
line.long 0x0 "TD0SEL3_B1A2,TD*SELn / TD*SELSYS controls the driving abilities of pins in use for the SDHI."
hexmask.long 0x0 0.--31. 1. "TD0SEL_31_0,This function is delay adjustment of the SDHI clock return path for the LSI inside."
group.long 0x2560++0xB
line.long 0x0 "PSER3_B1A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR3_B1A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR3_B1A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2580++0xB
line.long 0x0 "IOINTSEL3_B1A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL3_B1A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT3_B1A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x258C++0x7
line.long 0x0 "INDT3_B1A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT3_B1A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2594++0x1B
line.long 0x0 "INTCLR3_B1A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK3_B1A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR3_B1A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG3_B1A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL3_B1A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF3_B1A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL3_B1A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x25C0++0x13
line.long 0x0 "OUTDTSEL3_B1A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH3_B1A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL3_B1A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE3_B1A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN3_B1A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4000++0x7
line.long 0x0 "PMMR3_B2A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER3_B2A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4020++0xF
line.long 0x0 "DM0PR3_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR3_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR3_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR3_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4040++0x3
line.long 0x0 "GPSR3_B2A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4064++0x3
line.long 0x0 "IP1SR3_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4080++0xF
line.long 0x0 "DRV0CTRL3_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL3_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL3_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL3_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x40A0++0x3
line.long 0x0 "POC3_B2A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x40C0++0x3
line.long 0x0 "PUEN3_B2A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x40E0++0x3
line.long 0x0 "PUD3_B2A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4120++0x3
line.long 0x0 "TD0SEL3_B2A0,TD*SELn / TD*SELSYS controls the driving abilities of pins in use for the SDHI."
hexmask.long 0x0 0.--31. 1. "TD0SEL_31_0,This function is delay adjustment of the SDHI clock return path for the LSI inside."
group.long 0x4160++0xB
line.long 0x0 "PSER3_B2A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR3_B2A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR3_B2A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4180++0xB
line.long 0x0 "IOINTSEL3_B2A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL3_B2A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT3_B2A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x418C++0x7
line.long 0x0 "INDT3_B2A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT3_B2A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4194++0x1B
line.long 0x0 "INTCLR3_B2A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK3_B2A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR3_B2A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG3_B2A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL3_B2A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF3_B2A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL3_B2A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x41C0++0x13
line.long 0x0 "OUTDTSEL3_B2A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH3_B2A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL3_B2A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE3_B2A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN3_B2A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4200++0x7
line.long 0x0 "PMMR3_B2A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER3_B2A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4220++0xF
line.long 0x0 "DM0PR3_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR3_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR3_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR3_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4240++0x3
line.long 0x0 "GPSR3_B2A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4264++0x3
line.long 0x0 "IP1SR3_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4280++0xF
line.long 0x0 "DRV0CTRL3_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL3_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL3_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL3_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x42A0++0x3
line.long 0x0 "POC3_B2A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x42C0++0x3
line.long 0x0 "PUEN3_B2A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x42E0++0x3
line.long 0x0 "PUD3_B2A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4320++0x3
line.long 0x0 "TD0SEL3_B2A1,TD*SELn / TD*SELSYS controls the driving abilities of pins in use for the SDHI."
hexmask.long 0x0 0.--31. 1. "TD0SEL_31_0,This function is delay adjustment of the SDHI clock return path for the LSI inside."
group.long 0x4360++0xB
line.long 0x0 "PSER3_B2A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR3_B2A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR3_B2A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4380++0xB
line.long 0x0 "IOINTSEL3_B2A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL3_B2A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT3_B2A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x438C++0x7
line.long 0x0 "INDT3_B2A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT3_B2A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4394++0x1B
line.long 0x0 "INTCLR3_B2A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK3_B2A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR3_B2A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG3_B2A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL3_B2A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF3_B2A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL3_B2A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x43C0++0x13
line.long 0x0 "OUTDTSEL3_B2A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH3_B2A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL3_B2A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE3_B2A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN3_B2A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4400++0x7
line.long 0x0 "PMMR3_B2A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER3_B2A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4420++0xF
line.long 0x0 "DM0PR3_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR3_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR3_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR3_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4440++0x3
line.long 0x0 "GPSR3_B2A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4464++0x3
line.long 0x0 "IP1SR3_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4480++0xF
line.long 0x0 "DRV0CTRL3_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL3_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL3_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL3_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x44A0++0x3
line.long 0x0 "POC3_B2A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x44C0++0x3
line.long 0x0 "PUEN3_B2A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x44E0++0x3
line.long 0x0 "PUD3_B2A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4520++0x3
line.long 0x0 "TD0SEL3_B2A2,TD*SELn / TD*SELSYS controls the driving abilities of pins in use for the SDHI."
hexmask.long 0x0 0.--31. 1. "TD0SEL_31_0,This function is delay adjustment of the SDHI clock return path for the LSI inside."
group.long 0x4560++0xB
line.long 0x0 "PSER3_B2A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR3_B2A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR3_B2A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4580++0xB
line.long 0x0 "IOINTSEL3_B2A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL3_B2A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT3_B2A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x458C++0x7
line.long 0x0 "INDT3_B2A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT3_B2A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4594++0x1B
line.long 0x0 "INTCLR3_B2A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK3_B2A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR3_B2A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG3_B2A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL3_B2A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF3_B2A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL3_B2A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x45C0++0x13
line.long 0x0 "OUTDTSEL3_B2A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH3_B2A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL3_B2A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE3_B2A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN3_B2A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6000++0x7
line.long 0x0 "PMMR3_B3A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER3_B3A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6020++0xF
line.long 0x0 "DM0PR3_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR3_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR3_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR3_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6040++0x3
line.long 0x0 "GPSR3_B3A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6064++0x3
line.long 0x0 "IP1SR3_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6080++0xF
line.long 0x0 "DRV0CTRL3_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL3_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL3_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL3_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x60A0++0x3
line.long 0x0 "POC3_B3A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x60C0++0x3
line.long 0x0 "PUEN3_B3A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x60E0++0x3
line.long 0x0 "PUD3_B3A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6120++0x3
line.long 0x0 "TD0SEL3_B3A0,TD*SELn / TD*SELSYS controls the driving abilities of pins in use for the SDHI."
hexmask.long 0x0 0.--31. 1. "TD0SEL_31_0,This function is delay adjustment of the SDHI clock return path for the LSI inside."
group.long 0x6160++0xB
line.long 0x0 "PSER3_B3A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR3_B3A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR3_B3A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6180++0xB
line.long 0x0 "IOINTSEL3_B3A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL3_B3A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT3_B3A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x618C++0x7
line.long 0x0 "INDT3_B3A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT3_B3A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6194++0x1B
line.long 0x0 "INTCLR3_B3A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK3_B3A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR3_B3A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG3_B3A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL3_B3A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF3_B3A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL3_B3A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x61C0++0x13
line.long 0x0 "OUTDTSEL3_B3A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH3_B3A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL3_B3A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE3_B3A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN3_B3A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6200++0x7
line.long 0x0 "PMMR3_B3A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER3_B3A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6220++0xF
line.long 0x0 "DM0PR3_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR3_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR3_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR3_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6240++0x3
line.long 0x0 "GPSR3_B3A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6264++0x3
line.long 0x0 "IP1SR3_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6280++0xF
line.long 0x0 "DRV0CTRL3_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL3_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL3_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL3_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x62A0++0x3
line.long 0x0 "POC3_B3A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x62C0++0x3
line.long 0x0 "PUEN3_B3A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x62E0++0x3
line.long 0x0 "PUD3_B3A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6320++0x3
line.long 0x0 "TD0SEL3_B3A1,TD*SELn / TD*SELSYS controls the driving abilities of pins in use for the SDHI."
hexmask.long 0x0 0.--31. 1. "TD0SEL_31_0,This function is delay adjustment of the SDHI clock return path for the LSI inside."
group.long 0x6360++0xB
line.long 0x0 "PSER3_B3A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR3_B3A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR3_B3A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6380++0xB
line.long 0x0 "IOINTSEL3_B3A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL3_B3A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT3_B3A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x638C++0x7
line.long 0x0 "INDT3_B3A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT3_B3A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6394++0x1B
line.long 0x0 "INTCLR3_B3A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK3_B3A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR3_B3A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG3_B3A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL3_B3A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF3_B3A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL3_B3A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x63C0++0x13
line.long 0x0 "OUTDTSEL3_B3A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH3_B3A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL3_B3A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE3_B3A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN3_B3A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6400++0x7
line.long 0x0 "PMMR3_B3A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER3_B3A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6420++0xF
line.long 0x0 "DM0PR3_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR3_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR3_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR3_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6440++0x3
line.long 0x0 "GPSR3_B3A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6464++0x3
line.long 0x0 "IP1SR3_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6480++0xF
line.long 0x0 "DRV0CTRL3_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL3_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL3_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL3_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x64A0++0x3
line.long 0x0 "POC3_B3A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x64C0++0x3
line.long 0x0 "PUEN3_B3A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x64E0++0x3
line.long 0x0 "PUD3_B3A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6520++0x3
line.long 0x0 "TD0SEL3_B3A2,TD*SELn / TD*SELSYS controls the driving abilities of pins in use for the SDHI."
hexmask.long 0x0 0.--31. 1. "TD0SEL_31_0,This function is delay adjustment of the SDHI clock return path for the LSI inside."
group.long 0x6560++0xB
line.long 0x0 "PSER3_B3A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR3_B3A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR3_B3A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6580++0xB
line.long 0x0 "IOINTSEL3_B3A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL3_B3A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT3_B3A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x658C++0x7
line.long 0x0 "INDT3_B3A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT3_B3A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6594++0x1B
line.long 0x0 "INTCLR3_B3A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK3_B3A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR3_B3A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG3_B3A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL3_B3A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF3_B3A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL3_B3A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x65C0++0x13
line.long 0x0 "OUTDTSEL3_B3A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH3_B3A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL3_B3A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE3_B3A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN3_B3A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
tree.end
tree "PFC_GPIO_for_GP4"
base ad:0xE6060000
group.long 0x0++0x7
line.long 0x0 "PMMR4_B0A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER4_B0A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x20++0xF
line.long 0x0 "DM0PR4_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR4_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR4_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR4_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x40++0x3
line.long 0x0 "GPSR4_B0A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x60++0x7
line.long 0x0 "IP0SR4_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR4_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x80++0xF
line.long 0x0 "DRV0CTRL4_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL4_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL4_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL4_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0xA0++0x3
line.long 0x0 "POC4_B0A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0xC0++0x3
line.long 0x0 "PUEN4_B0A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0xE0++0x3
line.long 0x0 "PUD4_B0A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x100++0x3
line.long 0x0 "MODSEL4_B0A0,MODSELn selects the group for multiple LSI pins with multiplexed pin functions."
hexmask.long 0x0 0.--31. 1. "MODSEL_31_0,0 : GPIO mode"
group.long 0x160++0xB
line.long 0x0 "PSER4_B0A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR4_B0A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR4_B0A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x180++0xB
line.long 0x0 "IOINTSEL4_B0A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL4_B0A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT4_B0A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x18C++0x7
line.long 0x0 "INDT4_B0A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT4_B0A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x194++0x1B
line.long 0x0 "INTCLR4_B0A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK4_B0A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR4_B0A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG4_B0A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL4_B0A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF4_B0A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL4_B0A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x1C0++0x13
line.long 0x0 "OUTDTSEL4_B0A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH4_B0A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL4_B0A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE4_B0A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN4_B0A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x200++0x7
line.long 0x0 "PMMR4_B0A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER4_B0A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x220++0xF
line.long 0x0 "DM0PR4_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR4_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR4_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR4_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x240++0x3
line.long 0x0 "GPSR4_B0A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x260++0x7
line.long 0x0 "IP0SR4_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR4_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x280++0xF
line.long 0x0 "DRV0CTRL4_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL4_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL4_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL4_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x2A0++0x3
line.long 0x0 "POC4_B0A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x2C0++0x3
line.long 0x0 "PUEN4_B0A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x2E0++0x3
line.long 0x0 "PUD4_B0A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x300++0x3
line.long 0x0 "MODSEL4_B0A1,MODSELn selects the group for multiple LSI pins with multiplexed pin functions."
hexmask.long 0x0 0.--31. 1. "MODSEL_31_0,0 : GPIO mode"
group.long 0x360++0xB
line.long 0x0 "PSER4_B0A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR4_B0A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR4_B0A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x380++0xB
line.long 0x0 "IOINTSEL4_B0A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL4_B0A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT4_B0A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x38C++0x7
line.long 0x0 "INDT4_B0A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT4_B0A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x394++0x1B
line.long 0x0 "INTCLR4_B0A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK4_B0A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR4_B0A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG4_B0A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL4_B0A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF4_B0A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL4_B0A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x3C0++0x13
line.long 0x0 "OUTDTSEL4_B0A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH4_B0A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL4_B0A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE4_B0A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN4_B0A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x400++0x7
line.long 0x0 "PMMR4_B0A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER4_B0A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x420++0xF
line.long 0x0 "DM0PR4_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR4_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR4_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR4_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x440++0x3
line.long 0x0 "GPSR4_B0A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x460++0x7
line.long 0x0 "IP0SR4_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR4_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x480++0xF
line.long 0x0 "DRV0CTRL4_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL4_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL4_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL4_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x4A0++0x3
line.long 0x0 "POC4_B0A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x4C0++0x3
line.long 0x0 "PUEN4_B0A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x4E0++0x3
line.long 0x0 "PUD4_B0A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x500++0x3
line.long 0x0 "MODSEL4_B0A2,MODSELn selects the group for multiple LSI pins with multiplexed pin functions."
hexmask.long 0x0 0.--31. 1. "MODSEL_31_0,0 : GPIO mode"
group.long 0x560++0xB
line.long 0x0 "PSER4_B0A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR4_B0A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR4_B0A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x580++0xB
line.long 0x0 "IOINTSEL4_B0A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL4_B0A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT4_B0A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x58C++0x7
line.long 0x0 "INDT4_B0A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT4_B0A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x594++0x1B
line.long 0x0 "INTCLR4_B0A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK4_B0A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR4_B0A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG4_B0A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL4_B0A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF4_B0A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL4_B0A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x5C0++0x13
line.long 0x0 "OUTDTSEL4_B0A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH4_B0A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL4_B0A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE4_B0A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN4_B0A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2000++0x7
line.long 0x0 "PMMR4_B1A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER4_B1A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2020++0xF
line.long 0x0 "DM0PR4_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR4_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR4_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR4_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2040++0x3
line.long 0x0 "GPSR4_B1A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2060++0x7
line.long 0x0 "IP0SR4_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR4_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2080++0xF
line.long 0x0 "DRV0CTRL4_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL4_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL4_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL4_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x20A0++0x3
line.long 0x0 "POC4_B1A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x20C0++0x3
line.long 0x0 "PUEN4_B1A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x20E0++0x3
line.long 0x0 "PUD4_B1A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2100++0x3
line.long 0x0 "MODSEL4_B1A0,MODSELn selects the group for multiple LSI pins with multiplexed pin functions."
hexmask.long 0x0 0.--31. 1. "MODSEL_31_0,0 : GPIO mode"
group.long 0x2160++0xB
line.long 0x0 "PSER4_B1A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR4_B1A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR4_B1A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2180++0xB
line.long 0x0 "IOINTSEL4_B1A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL4_B1A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT4_B1A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x218C++0x7
line.long 0x0 "INDT4_B1A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT4_B1A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2194++0x1B
line.long 0x0 "INTCLR4_B1A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK4_B1A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR4_B1A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG4_B1A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL4_B1A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF4_B1A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL4_B1A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x21C0++0x13
line.long 0x0 "OUTDTSEL4_B1A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH4_B1A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL4_B1A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE4_B1A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN4_B1A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2200++0x7
line.long 0x0 "PMMR4_B1A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER4_B1A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2220++0xF
line.long 0x0 "DM0PR4_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR4_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR4_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR4_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2240++0x3
line.long 0x0 "GPSR4_B1A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2260++0x7
line.long 0x0 "IP0SR4_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR4_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2280++0xF
line.long 0x0 "DRV0CTRL4_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL4_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL4_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL4_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x22A0++0x3
line.long 0x0 "POC4_B1A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x22C0++0x3
line.long 0x0 "PUEN4_B1A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x22E0++0x3
line.long 0x0 "PUD4_B1A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2300++0x3
line.long 0x0 "MODSEL4_B1A1,MODSELn selects the group for multiple LSI pins with multiplexed pin functions."
hexmask.long 0x0 0.--31. 1. "MODSEL_31_0,0 : GPIO mode"
group.long 0x2360++0xB
line.long 0x0 "PSER4_B1A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR4_B1A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR4_B1A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2380++0xB
line.long 0x0 "IOINTSEL4_B1A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL4_B1A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT4_B1A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x238C++0x7
line.long 0x0 "INDT4_B1A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT4_B1A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2394++0x1B
line.long 0x0 "INTCLR4_B1A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK4_B1A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR4_B1A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG4_B1A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL4_B1A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF4_B1A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL4_B1A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x23C0++0x13
line.long 0x0 "OUTDTSEL4_B1A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH4_B1A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL4_B1A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE4_B1A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN4_B1A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2400++0x7
line.long 0x0 "PMMR4_B1A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER4_B1A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2420++0xF
line.long 0x0 "DM0PR4_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR4_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR4_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR4_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2440++0x3
line.long 0x0 "GPSR4_B1A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2460++0x7
line.long 0x0 "IP0SR4_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR4_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2480++0xF
line.long 0x0 "DRV0CTRL4_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL4_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL4_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL4_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x24A0++0x3
line.long 0x0 "POC4_B1A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x24C0++0x3
line.long 0x0 "PUEN4_B1A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x24E0++0x3
line.long 0x0 "PUD4_B1A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2500++0x3
line.long 0x0 "MODSEL4_B1A2,MODSELn selects the group for multiple LSI pins with multiplexed pin functions."
hexmask.long 0x0 0.--31. 1. "MODSEL_31_0,0 : GPIO mode"
group.long 0x2560++0xB
line.long 0x0 "PSER4_B1A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR4_B1A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR4_B1A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2580++0xB
line.long 0x0 "IOINTSEL4_B1A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL4_B1A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT4_B1A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x258C++0x7
line.long 0x0 "INDT4_B1A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT4_B1A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2594++0x1B
line.long 0x0 "INTCLR4_B1A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK4_B1A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR4_B1A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG4_B1A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL4_B1A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF4_B1A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL4_B1A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x25C0++0x13
line.long 0x0 "OUTDTSEL4_B1A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH4_B1A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL4_B1A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE4_B1A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN4_B1A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4000++0x7
line.long 0x0 "PMMR4_B2A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER4_B2A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4020++0xF
line.long 0x0 "DM0PR4_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR4_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR4_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR4_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4040++0x3
line.long 0x0 "GPSR4_B2A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4060++0x7
line.long 0x0 "IP0SR4_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR4_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4080++0xF
line.long 0x0 "DRV0CTRL4_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL4_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL4_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL4_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x40A0++0x3
line.long 0x0 "POC4_B2A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x40C0++0x3
line.long 0x0 "PUEN4_B2A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x40E0++0x3
line.long 0x0 "PUD4_B2A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4100++0x3
line.long 0x0 "MODSEL4_B2A0,MODSELn selects the group for multiple LSI pins with multiplexed pin functions."
hexmask.long 0x0 0.--31. 1. "MODSEL_31_0,0 : GPIO mode"
group.long 0x4160++0xB
line.long 0x0 "PSER4_B2A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR4_B2A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR4_B2A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4180++0xB
line.long 0x0 "IOINTSEL4_B2A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL4_B2A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT4_B2A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x418C++0x7
line.long 0x0 "INDT4_B2A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT4_B2A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4194++0x1B
line.long 0x0 "INTCLR4_B2A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK4_B2A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR4_B2A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG4_B2A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL4_B2A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF4_B2A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL4_B2A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x41C0++0x13
line.long 0x0 "OUTDTSEL4_B2A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH4_B2A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL4_B2A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE4_B2A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN4_B2A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4200++0x7
line.long 0x0 "PMMR4_B2A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER4_B2A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4220++0xF
line.long 0x0 "DM0PR4_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR4_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR4_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR4_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4240++0x3
line.long 0x0 "GPSR4_B2A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4260++0x7
line.long 0x0 "IP0SR4_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR4_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4280++0xF
line.long 0x0 "DRV0CTRL4_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL4_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL4_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL4_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x42A0++0x3
line.long 0x0 "POC4_B2A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x42C0++0x3
line.long 0x0 "PUEN4_B2A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x42E0++0x3
line.long 0x0 "PUD4_B2A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4300++0x3
line.long 0x0 "MODSEL4_B2A1,MODSELn selects the group for multiple LSI pins with multiplexed pin functions."
hexmask.long 0x0 0.--31. 1. "MODSEL_31_0,0 : GPIO mode"
group.long 0x4360++0xB
line.long 0x0 "PSER4_B2A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR4_B2A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR4_B2A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4380++0xB
line.long 0x0 "IOINTSEL4_B2A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL4_B2A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT4_B2A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x438C++0x7
line.long 0x0 "INDT4_B2A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT4_B2A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4394++0x1B
line.long 0x0 "INTCLR4_B2A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK4_B2A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR4_B2A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG4_B2A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL4_B2A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF4_B2A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL4_B2A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x43C0++0x13
line.long 0x0 "OUTDTSEL4_B2A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH4_B2A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL4_B2A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE4_B2A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN4_B2A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4400++0x7
line.long 0x0 "PMMR4_B2A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER4_B2A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4420++0xF
line.long 0x0 "DM0PR4_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR4_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR4_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR4_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4440++0x3
line.long 0x0 "GPSR4_B2A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4460++0x7
line.long 0x0 "IP0SR4_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR4_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4480++0xF
line.long 0x0 "DRV0CTRL4_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL4_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL4_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL4_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x44A0++0x3
line.long 0x0 "POC4_B2A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x44C0++0x3
line.long 0x0 "PUEN4_B2A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x44E0++0x3
line.long 0x0 "PUD4_B2A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4500++0x3
line.long 0x0 "MODSEL4_B2A2,MODSELn selects the group for multiple LSI pins with multiplexed pin functions."
hexmask.long 0x0 0.--31. 1. "MODSEL_31_0,0 : GPIO mode"
group.long 0x4560++0xB
line.long 0x0 "PSER4_B2A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR4_B2A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR4_B2A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4580++0xB
line.long 0x0 "IOINTSEL4_B2A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL4_B2A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT4_B2A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x458C++0x7
line.long 0x0 "INDT4_B2A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT4_B2A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4594++0x1B
line.long 0x0 "INTCLR4_B2A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK4_B2A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR4_B2A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG4_B2A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL4_B2A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF4_B2A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL4_B2A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x45C0++0x13
line.long 0x0 "OUTDTSEL4_B2A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH4_B2A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL4_B2A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE4_B2A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN4_B2A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6000++0x7
line.long 0x0 "PMMR4_B3A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER4_B3A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6020++0xF
line.long 0x0 "DM0PR4_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR4_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR4_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR4_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6040++0x3
line.long 0x0 "GPSR4_B3A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6060++0x7
line.long 0x0 "IP0SR4_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR4_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6080++0xF
line.long 0x0 "DRV0CTRL4_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL4_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL4_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL4_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x60A0++0x3
line.long 0x0 "POC4_B3A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x60C0++0x3
line.long 0x0 "PUEN4_B3A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x60E0++0x3
line.long 0x0 "PUD4_B3A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6100++0x3
line.long 0x0 "MODSEL4_B3A0,MODSELn selects the group for multiple LSI pins with multiplexed pin functions."
hexmask.long 0x0 0.--31. 1. "MODSEL_31_0,0 : GPIO mode"
group.long 0x6160++0xB
line.long 0x0 "PSER4_B3A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR4_B3A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR4_B3A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6180++0xB
line.long 0x0 "IOINTSEL4_B3A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL4_B3A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT4_B3A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x618C++0x7
line.long 0x0 "INDT4_B3A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT4_B3A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6194++0x1B
line.long 0x0 "INTCLR4_B3A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK4_B3A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR4_B3A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG4_B3A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL4_B3A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF4_B3A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL4_B3A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x61C0++0x13
line.long 0x0 "OUTDTSEL4_B3A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH4_B3A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL4_B3A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE4_B3A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN4_B3A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6200++0x7
line.long 0x0 "PMMR4_B3A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER4_B3A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6220++0xF
line.long 0x0 "DM0PR4_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR4_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR4_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR4_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6240++0x3
line.long 0x0 "GPSR4_B3A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6260++0x7
line.long 0x0 "IP0SR4_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR4_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6280++0xF
line.long 0x0 "DRV0CTRL4_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL4_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL4_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL4_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x62A0++0x3
line.long 0x0 "POC4_B3A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x62C0++0x3
line.long 0x0 "PUEN4_B3A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x62E0++0x3
line.long 0x0 "PUD4_B3A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6300++0x3
line.long 0x0 "MODSEL4_B3A1,MODSELn selects the group for multiple LSI pins with multiplexed pin functions."
hexmask.long 0x0 0.--31. 1. "MODSEL_31_0,0 : GPIO mode"
group.long 0x6360++0xB
line.long 0x0 "PSER4_B3A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR4_B3A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR4_B3A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6380++0xB
line.long 0x0 "IOINTSEL4_B3A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL4_B3A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT4_B3A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x638C++0x7
line.long 0x0 "INDT4_B3A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT4_B3A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6394++0x1B
line.long 0x0 "INTCLR4_B3A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK4_B3A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR4_B3A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG4_B3A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL4_B3A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF4_B3A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL4_B3A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x63C0++0x13
line.long 0x0 "OUTDTSEL4_B3A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH4_B3A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL4_B3A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE4_B3A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN4_B3A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6400++0x7
line.long 0x0 "PMMR4_B3A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER4_B3A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6420++0xF
line.long 0x0 "DM0PR4_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR4_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR4_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR4_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6440++0x3
line.long 0x0 "GPSR4_B3A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6460++0x7
line.long 0x0 "IP0SR4_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR4_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6480++0xF
line.long 0x0 "DRV0CTRL4_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL4_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL4_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0xC "DRV3CTRL4_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0xC 0.--31. 1. "DRV3CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x64A0++0x3
line.long 0x0 "POC4_B3A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x64C0++0x3
line.long 0x0 "PUEN4_B3A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x64E0++0x3
line.long 0x0 "PUD4_B3A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6500++0x3
line.long 0x0 "MODSEL4_B3A2,MODSELn selects the group for multiple LSI pins with multiplexed pin functions."
hexmask.long 0x0 0.--31. 1. "MODSEL_31_0,0 : GPIO mode"
group.long 0x6560++0xB
line.long 0x0 "PSER4_B3A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR4_B3A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR4_B3A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6580++0xB
line.long 0x0 "IOINTSEL4_B3A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL4_B3A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT4_B3A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x658C++0x7
line.long 0x0 "INDT4_B3A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT4_B3A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6594++0x1B
line.long 0x0 "INTCLR4_B3A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK4_B3A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR4_B3A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG4_B3A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL4_B3A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF4_B3A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL4_B3A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x65C0++0x13
line.long 0x0 "OUTDTSEL4_B3A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH4_B3A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL4_B3A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE4_B3A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN4_B3A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
tree.end
tree "PFC_GPIO_for_GP5"
base ad:0xE6060800
group.long 0x0++0x7
line.long 0x0 "PMMR5_B0A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER5_B0A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x20++0xF
line.long 0x0 "DM0PR5_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR5_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR5_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR5_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x40++0x3
line.long 0x0 "GPSR5_B0A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x60++0x3
line.long 0x0 "IP0SR5_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x80++0xB
line.long 0x0 "DRV0CTRL5_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL5_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL5_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0xA0++0x3
line.long 0x0 "POC5_B0A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0xC0++0x3
line.long 0x0 "PUEN5_B0A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0xE0++0x3
line.long 0x0 "PUD5_B0A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x160++0xB
line.long 0x0 "PSER5_B0A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR5_B0A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR5_B0A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x180++0xB
line.long 0x0 "IOINTSEL5_B0A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL5_B0A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT5_B0A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x18C++0x7
line.long 0x0 "INDT5_B0A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT5_B0A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x194++0x1B
line.long 0x0 "INTCLR5_B0A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK5_B0A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR5_B0A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG5_B0A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL5_B0A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF5_B0A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL5_B0A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x1C0++0x13
line.long 0x0 "OUTDTSEL5_B0A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH5_B0A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL5_B0A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE5_B0A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN5_B0A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x200++0x7
line.long 0x0 "PMMR5_B0A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER5_B0A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x220++0xF
line.long 0x0 "DM0PR5_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR5_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR5_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR5_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x240++0x3
line.long 0x0 "GPSR5_B0A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x260++0x3
line.long 0x0 "IP0SR5_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x280++0xB
line.long 0x0 "DRV0CTRL5_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL5_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL5_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x2A0++0x3
line.long 0x0 "POC5_B0A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x2C0++0x3
line.long 0x0 "PUEN5_B0A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x2E0++0x3
line.long 0x0 "PUD5_B0A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x360++0xB
line.long 0x0 "PSER5_B0A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR5_B0A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR5_B0A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x380++0xB
line.long 0x0 "IOINTSEL5_B0A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL5_B0A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT5_B0A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x38C++0x7
line.long 0x0 "INDT5_B0A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT5_B0A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x394++0x1B
line.long 0x0 "INTCLR5_B0A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK5_B0A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR5_B0A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG5_B0A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL5_B0A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF5_B0A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL5_B0A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x3C0++0x13
line.long 0x0 "OUTDTSEL5_B0A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH5_B0A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL5_B0A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE5_B0A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN5_B0A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x400++0x7
line.long 0x0 "PMMR5_B0A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER5_B0A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x420++0xF
line.long 0x0 "DM0PR5_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR5_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR5_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR5_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x440++0x3
line.long 0x0 "GPSR5_B0A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x460++0x3
line.long 0x0 "IP0SR5_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x480++0xB
line.long 0x0 "DRV0CTRL5_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL5_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL5_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x4A0++0x3
line.long 0x0 "POC5_B0A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x4C0++0x3
line.long 0x0 "PUEN5_B0A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x4E0++0x3
line.long 0x0 "PUD5_B0A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x560++0xB
line.long 0x0 "PSER5_B0A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR5_B0A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR5_B0A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x580++0xB
line.long 0x0 "IOINTSEL5_B0A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL5_B0A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT5_B0A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x58C++0x7
line.long 0x0 "INDT5_B0A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT5_B0A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x594++0x1B
line.long 0x0 "INTCLR5_B0A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK5_B0A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR5_B0A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG5_B0A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL5_B0A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF5_B0A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL5_B0A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x5C0++0x13
line.long 0x0 "OUTDTSEL5_B0A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH5_B0A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL5_B0A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE5_B0A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN5_B0A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2000++0x7
line.long 0x0 "PMMR5_B1A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER5_B1A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2020++0xF
line.long 0x0 "DM0PR5_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR5_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR5_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR5_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2040++0x3
line.long 0x0 "GPSR5_B1A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2060++0x3
line.long 0x0 "IP0SR5_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2080++0xB
line.long 0x0 "DRV0CTRL5_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL5_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL5_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x20A0++0x3
line.long 0x0 "POC5_B1A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x20C0++0x3
line.long 0x0 "PUEN5_B1A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x20E0++0x3
line.long 0x0 "PUD5_B1A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2160++0xB
line.long 0x0 "PSER5_B1A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR5_B1A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR5_B1A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2180++0xB
line.long 0x0 "IOINTSEL5_B1A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL5_B1A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT5_B1A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x218C++0x7
line.long 0x0 "INDT5_B1A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT5_B1A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2194++0x1B
line.long 0x0 "INTCLR5_B1A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK5_B1A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR5_B1A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG5_B1A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL5_B1A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF5_B1A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL5_B1A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x21C0++0x13
line.long 0x0 "OUTDTSEL5_B1A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH5_B1A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL5_B1A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE5_B1A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN5_B1A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2200++0x7
line.long 0x0 "PMMR5_B1A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER5_B1A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2220++0xF
line.long 0x0 "DM0PR5_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR5_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR5_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR5_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2240++0x3
line.long 0x0 "GPSR5_B1A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2260++0x3
line.long 0x0 "IP0SR5_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2280++0xB
line.long 0x0 "DRV0CTRL5_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL5_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL5_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x22A0++0x3
line.long 0x0 "POC5_B1A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x22C0++0x3
line.long 0x0 "PUEN5_B1A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x22E0++0x3
line.long 0x0 "PUD5_B1A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2360++0xB
line.long 0x0 "PSER5_B1A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR5_B1A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR5_B1A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2380++0xB
line.long 0x0 "IOINTSEL5_B1A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL5_B1A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT5_B1A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x238C++0x7
line.long 0x0 "INDT5_B1A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT5_B1A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2394++0x1B
line.long 0x0 "INTCLR5_B1A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK5_B1A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR5_B1A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG5_B1A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL5_B1A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF5_B1A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL5_B1A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x23C0++0x13
line.long 0x0 "OUTDTSEL5_B1A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH5_B1A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL5_B1A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE5_B1A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN5_B1A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2400++0x7
line.long 0x0 "PMMR5_B1A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER5_B1A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2420++0xF
line.long 0x0 "DM0PR5_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR5_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR5_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR5_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2440++0x3
line.long 0x0 "GPSR5_B1A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2460++0x3
line.long 0x0 "IP0SR5_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2480++0xB
line.long 0x0 "DRV0CTRL5_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL5_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL5_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x24A0++0x3
line.long 0x0 "POC5_B1A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x24C0++0x3
line.long 0x0 "PUEN5_B1A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x24E0++0x3
line.long 0x0 "PUD5_B1A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2560++0xB
line.long 0x0 "PSER5_B1A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR5_B1A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR5_B1A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2580++0xB
line.long 0x0 "IOINTSEL5_B1A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL5_B1A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT5_B1A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x258C++0x7
line.long 0x0 "INDT5_B1A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT5_B1A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2594++0x1B
line.long 0x0 "INTCLR5_B1A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK5_B1A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR5_B1A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG5_B1A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL5_B1A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF5_B1A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL5_B1A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x25C0++0x13
line.long 0x0 "OUTDTSEL5_B1A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH5_B1A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL5_B1A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE5_B1A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN5_B1A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4000++0x7
line.long 0x0 "PMMR5_B2A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER5_B2A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4020++0xF
line.long 0x0 "DM0PR5_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR5_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR5_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR5_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4040++0x3
line.long 0x0 "GPSR5_B2A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4060++0x3
line.long 0x0 "IP0SR5_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4080++0xB
line.long 0x0 "DRV0CTRL5_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL5_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL5_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x40A0++0x3
line.long 0x0 "POC5_B2A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x40C0++0x3
line.long 0x0 "PUEN5_B2A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x40E0++0x3
line.long 0x0 "PUD5_B2A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4160++0xB
line.long 0x0 "PSER5_B2A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR5_B2A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR5_B2A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4180++0xB
line.long 0x0 "IOINTSEL5_B2A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL5_B2A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT5_B2A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x418C++0x7
line.long 0x0 "INDT5_B2A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT5_B2A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4194++0x1B
line.long 0x0 "INTCLR5_B2A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK5_B2A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR5_B2A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG5_B2A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL5_B2A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF5_B2A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL5_B2A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x41C0++0x13
line.long 0x0 "OUTDTSEL5_B2A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH5_B2A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL5_B2A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE5_B2A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN5_B2A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4200++0x7
line.long 0x0 "PMMR5_B2A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER5_B2A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4220++0xF
line.long 0x0 "DM0PR5_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR5_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR5_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR5_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4240++0x3
line.long 0x0 "GPSR5_B2A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4260++0x3
line.long 0x0 "IP0SR5_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4280++0xB
line.long 0x0 "DRV0CTRL5_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL5_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL5_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x42A0++0x3
line.long 0x0 "POC5_B2A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x42C0++0x3
line.long 0x0 "PUEN5_B2A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x42E0++0x3
line.long 0x0 "PUD5_B2A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4360++0xB
line.long 0x0 "PSER5_B2A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR5_B2A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR5_B2A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4380++0xB
line.long 0x0 "IOINTSEL5_B2A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL5_B2A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT5_B2A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x438C++0x7
line.long 0x0 "INDT5_B2A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT5_B2A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4394++0x1B
line.long 0x0 "INTCLR5_B2A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK5_B2A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR5_B2A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG5_B2A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL5_B2A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF5_B2A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL5_B2A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x43C0++0x13
line.long 0x0 "OUTDTSEL5_B2A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH5_B2A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL5_B2A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE5_B2A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN5_B2A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4400++0x7
line.long 0x0 "PMMR5_B2A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER5_B2A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4420++0xF
line.long 0x0 "DM0PR5_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR5_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR5_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR5_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4440++0x3
line.long 0x0 "GPSR5_B2A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4460++0x3
line.long 0x0 "IP0SR5_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4480++0xB
line.long 0x0 "DRV0CTRL5_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL5_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL5_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x44A0++0x3
line.long 0x0 "POC5_B2A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x44C0++0x3
line.long 0x0 "PUEN5_B2A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x44E0++0x3
line.long 0x0 "PUD5_B2A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4560++0xB
line.long 0x0 "PSER5_B2A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR5_B2A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR5_B2A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4580++0xB
line.long 0x0 "IOINTSEL5_B2A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL5_B2A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT5_B2A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x458C++0x7
line.long 0x0 "INDT5_B2A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT5_B2A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4594++0x1B
line.long 0x0 "INTCLR5_B2A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK5_B2A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR5_B2A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG5_B2A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL5_B2A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF5_B2A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL5_B2A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x45C0++0x13
line.long 0x0 "OUTDTSEL5_B2A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH5_B2A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL5_B2A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE5_B2A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN5_B2A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6000++0x7
line.long 0x0 "PMMR5_B3A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER5_B3A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6020++0xF
line.long 0x0 "DM0PR5_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR5_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR5_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR5_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6040++0x3
line.long 0x0 "GPSR5_B3A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6060++0x3
line.long 0x0 "IP0SR5_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6080++0xB
line.long 0x0 "DRV0CTRL5_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL5_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL5_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x60A0++0x3
line.long 0x0 "POC5_B3A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x60C0++0x3
line.long 0x0 "PUEN5_B3A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x60E0++0x3
line.long 0x0 "PUD5_B3A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6160++0xB
line.long 0x0 "PSER5_B3A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR5_B3A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR5_B3A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6180++0xB
line.long 0x0 "IOINTSEL5_B3A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL5_B3A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT5_B3A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x618C++0x7
line.long 0x0 "INDT5_B3A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT5_B3A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6194++0x1B
line.long 0x0 "INTCLR5_B3A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK5_B3A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR5_B3A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG5_B3A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL5_B3A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF5_B3A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL5_B3A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x61C0++0x13
line.long 0x0 "OUTDTSEL5_B3A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH5_B3A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL5_B3A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE5_B3A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN5_B3A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6200++0x7
line.long 0x0 "PMMR5_B3A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER5_B3A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6220++0xF
line.long 0x0 "DM0PR5_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR5_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR5_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR5_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6240++0x3
line.long 0x0 "GPSR5_B3A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6260++0x3
line.long 0x0 "IP0SR5_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6280++0xB
line.long 0x0 "DRV0CTRL5_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL5_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL5_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x62A0++0x3
line.long 0x0 "POC5_B3A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x62C0++0x3
line.long 0x0 "PUEN5_B3A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x62E0++0x3
line.long 0x0 "PUD5_B3A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6360++0xB
line.long 0x0 "PSER5_B3A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR5_B3A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR5_B3A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6380++0xB
line.long 0x0 "IOINTSEL5_B3A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL5_B3A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT5_B3A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x638C++0x7
line.long 0x0 "INDT5_B3A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT5_B3A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6394++0x1B
line.long 0x0 "INTCLR5_B3A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK5_B3A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR5_B3A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG5_B3A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL5_B3A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF5_B3A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL5_B3A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x63C0++0x13
line.long 0x0 "OUTDTSEL5_B3A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH5_B3A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL5_B3A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE5_B3A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN5_B3A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6400++0x7
line.long 0x0 "PMMR5_B3A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER5_B3A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6420++0xF
line.long 0x0 "DM0PR5_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR5_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR5_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR5_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6440++0x3
line.long 0x0 "GPSR5_B3A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6460++0x3
line.long 0x0 "IP0SR5_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6480++0xB
line.long 0x0 "DRV0CTRL5_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL5_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL5_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x64A0++0x3
line.long 0x0 "POC5_B3A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x64C0++0x3
line.long 0x0 "PUEN5_B3A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x64E0++0x3
line.long 0x0 "PUD5_B3A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6560++0xB
line.long 0x0 "PSER5_B3A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR5_B3A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR5_B3A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6580++0xB
line.long 0x0 "IOINTSEL5_B3A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL5_B3A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT5_B3A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x658C++0x7
line.long 0x0 "INDT5_B3A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT5_B3A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6594++0x1B
line.long 0x0 "INTCLR5_B3A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK5_B3A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR5_B3A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG5_B3A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL5_B3A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF5_B3A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL5_B3A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x65C0++0x13
line.long 0x0 "OUTDTSEL5_B3A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH5_B3A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL5_B3A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE5_B3A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN5_B3A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
tree.end
tree "PFC_GPIO_for_GP6"
base ad:0xE6061000
group.long 0x0++0x7
line.long 0x0 "PMMR6_B0A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER6_B0A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x20++0xF
line.long 0x0 "DM0PR6_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR6_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR6_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR6_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x40++0x3
line.long 0x0 "GPSR6_B0A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x60++0xB
line.long 0x0 "IP0SR6_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR6_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR6_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x80++0xB
line.long 0x0 "DRV0CTRL6_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL6_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL6_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0xA0++0x3
line.long 0x0 "POC6_B0A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0xC0++0x3
line.long 0x0 "PUEN6_B0A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0xE0++0x3
line.long 0x0 "PUD6_B0A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x160++0xB
line.long 0x0 "PSER6_B0A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR6_B0A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR6_B0A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x180++0xB
line.long 0x0 "IOINTSEL6_B0A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL6_B0A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT6_B0A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x18C++0x7
line.long 0x0 "INDT6_B0A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT6_B0A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x194++0x1B
line.long 0x0 "INTCLR6_B0A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK6_B0A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR6_B0A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG6_B0A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL6_B0A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF6_B0A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL6_B0A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x1C0++0x13
line.long 0x0 "OUTDTSEL6_B0A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH6_B0A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL6_B0A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE6_B0A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN6_B0A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x200++0x7
line.long 0x0 "PMMR6_B0A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER6_B0A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x220++0xF
line.long 0x0 "DM0PR6_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR6_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR6_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR6_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x240++0x3
line.long 0x0 "GPSR6_B0A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x260++0xB
line.long 0x0 "IP0SR6_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR6_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR6_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x280++0xB
line.long 0x0 "DRV0CTRL6_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL6_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL6_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x2A0++0x3
line.long 0x0 "POC6_B0A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x2C0++0x3
line.long 0x0 "PUEN6_B0A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x2E0++0x3
line.long 0x0 "PUD6_B0A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x360++0xB
line.long 0x0 "PSER6_B0A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR6_B0A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR6_B0A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x380++0xB
line.long 0x0 "IOINTSEL6_B0A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL6_B0A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT6_B0A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x38C++0x7
line.long 0x0 "INDT6_B0A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT6_B0A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x394++0x1B
line.long 0x0 "INTCLR6_B0A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK6_B0A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR6_B0A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG6_B0A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL6_B0A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF6_B0A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL6_B0A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x3C0++0x13
line.long 0x0 "OUTDTSEL6_B0A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH6_B0A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL6_B0A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE6_B0A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN6_B0A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x400++0x7
line.long 0x0 "PMMR6_B0A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER6_B0A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x420++0xF
line.long 0x0 "DM0PR6_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR6_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR6_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR6_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x440++0x3
line.long 0x0 "GPSR6_B0A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x460++0xB
line.long 0x0 "IP0SR6_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR6_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR6_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x480++0xB
line.long 0x0 "DRV0CTRL6_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL6_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL6_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x4A0++0x3
line.long 0x0 "POC6_B0A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x4C0++0x3
line.long 0x0 "PUEN6_B0A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x4E0++0x3
line.long 0x0 "PUD6_B0A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x560++0xB
line.long 0x0 "PSER6_B0A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR6_B0A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR6_B0A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x580++0xB
line.long 0x0 "IOINTSEL6_B0A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL6_B0A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT6_B0A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x58C++0x7
line.long 0x0 "INDT6_B0A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT6_B0A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x594++0x1B
line.long 0x0 "INTCLR6_B0A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK6_B0A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR6_B0A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG6_B0A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL6_B0A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF6_B0A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL6_B0A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x5C0++0x13
line.long 0x0 "OUTDTSEL6_B0A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH6_B0A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL6_B0A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE6_B0A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN6_B0A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2000++0x7
line.long 0x0 "PMMR6_B1A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER6_B1A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2020++0xF
line.long 0x0 "DM0PR6_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR6_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR6_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR6_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2040++0x3
line.long 0x0 "GPSR6_B1A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2060++0xB
line.long 0x0 "IP0SR6_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR6_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR6_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2080++0xB
line.long 0x0 "DRV0CTRL6_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL6_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL6_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x20A0++0x3
line.long 0x0 "POC6_B1A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x20C0++0x3
line.long 0x0 "PUEN6_B1A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x20E0++0x3
line.long 0x0 "PUD6_B1A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2160++0xB
line.long 0x0 "PSER6_B1A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR6_B1A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR6_B1A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2180++0xB
line.long 0x0 "IOINTSEL6_B1A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL6_B1A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT6_B1A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x218C++0x7
line.long 0x0 "INDT6_B1A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT6_B1A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2194++0x1B
line.long 0x0 "INTCLR6_B1A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK6_B1A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR6_B1A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG6_B1A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL6_B1A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF6_B1A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL6_B1A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x21C0++0x13
line.long 0x0 "OUTDTSEL6_B1A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH6_B1A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL6_B1A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE6_B1A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN6_B1A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2200++0x7
line.long 0x0 "PMMR6_B1A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER6_B1A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2220++0xF
line.long 0x0 "DM0PR6_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR6_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR6_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR6_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2240++0x3
line.long 0x0 "GPSR6_B1A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2260++0xB
line.long 0x0 "IP0SR6_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR6_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR6_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2280++0xB
line.long 0x0 "DRV0CTRL6_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL6_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL6_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x22A0++0x3
line.long 0x0 "POC6_B1A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x22C0++0x3
line.long 0x0 "PUEN6_B1A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x22E0++0x3
line.long 0x0 "PUD6_B1A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2360++0xB
line.long 0x0 "PSER6_B1A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR6_B1A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR6_B1A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2380++0xB
line.long 0x0 "IOINTSEL6_B1A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL6_B1A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT6_B1A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x238C++0x7
line.long 0x0 "INDT6_B1A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT6_B1A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2394++0x1B
line.long 0x0 "INTCLR6_B1A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK6_B1A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR6_B1A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG6_B1A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL6_B1A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF6_B1A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL6_B1A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x23C0++0x13
line.long 0x0 "OUTDTSEL6_B1A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH6_B1A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL6_B1A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE6_B1A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN6_B1A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2400++0x7
line.long 0x0 "PMMR6_B1A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER6_B1A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2420++0xF
line.long 0x0 "DM0PR6_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR6_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR6_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR6_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2440++0x3
line.long 0x0 "GPSR6_B1A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2460++0xB
line.long 0x0 "IP0SR6_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR6_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR6_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2480++0xB
line.long 0x0 "DRV0CTRL6_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL6_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL6_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x24A0++0x3
line.long 0x0 "POC6_B1A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x24C0++0x3
line.long 0x0 "PUEN6_B1A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x24E0++0x3
line.long 0x0 "PUD6_B1A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2560++0xB
line.long 0x0 "PSER6_B1A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR6_B1A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR6_B1A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2580++0xB
line.long 0x0 "IOINTSEL6_B1A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL6_B1A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT6_B1A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x258C++0x7
line.long 0x0 "INDT6_B1A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT6_B1A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2594++0x1B
line.long 0x0 "INTCLR6_B1A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK6_B1A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR6_B1A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG6_B1A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL6_B1A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF6_B1A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL6_B1A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x25C0++0x13
line.long 0x0 "OUTDTSEL6_B1A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH6_B1A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL6_B1A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE6_B1A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN6_B1A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4000++0x7
line.long 0x0 "PMMR6_B2A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER6_B2A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4020++0xF
line.long 0x0 "DM0PR6_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR6_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR6_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR6_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4040++0x3
line.long 0x0 "GPSR6_B2A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4060++0xB
line.long 0x0 "IP0SR6_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR6_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR6_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4080++0xB
line.long 0x0 "DRV0CTRL6_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL6_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL6_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x40A0++0x3
line.long 0x0 "POC6_B2A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x40C0++0x3
line.long 0x0 "PUEN6_B2A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x40E0++0x3
line.long 0x0 "PUD6_B2A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4160++0xB
line.long 0x0 "PSER6_B2A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR6_B2A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR6_B2A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4180++0xB
line.long 0x0 "IOINTSEL6_B2A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL6_B2A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT6_B2A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x418C++0x7
line.long 0x0 "INDT6_B2A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT6_B2A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4194++0x1B
line.long 0x0 "INTCLR6_B2A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK6_B2A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR6_B2A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG6_B2A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL6_B2A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF6_B2A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL6_B2A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x41C0++0x13
line.long 0x0 "OUTDTSEL6_B2A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH6_B2A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL6_B2A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE6_B2A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN6_B2A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4200++0x7
line.long 0x0 "PMMR6_B2A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER6_B2A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4220++0xF
line.long 0x0 "DM0PR6_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR6_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR6_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR6_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4240++0x3
line.long 0x0 "GPSR6_B2A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4260++0xB
line.long 0x0 "IP0SR6_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR6_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR6_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4280++0xB
line.long 0x0 "DRV0CTRL6_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL6_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL6_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x42A0++0x3
line.long 0x0 "POC6_B2A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x42C0++0x3
line.long 0x0 "PUEN6_B2A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x42E0++0x3
line.long 0x0 "PUD6_B2A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4360++0xB
line.long 0x0 "PSER6_B2A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR6_B2A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR6_B2A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4380++0xB
line.long 0x0 "IOINTSEL6_B2A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL6_B2A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT6_B2A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x438C++0x7
line.long 0x0 "INDT6_B2A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT6_B2A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4394++0x1B
line.long 0x0 "INTCLR6_B2A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK6_B2A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR6_B2A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG6_B2A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL6_B2A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF6_B2A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL6_B2A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x43C0++0x13
line.long 0x0 "OUTDTSEL6_B2A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH6_B2A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL6_B2A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE6_B2A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN6_B2A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4400++0x7
line.long 0x0 "PMMR6_B2A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER6_B2A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4420++0xF
line.long 0x0 "DM0PR6_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR6_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR6_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR6_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4440++0x3
line.long 0x0 "GPSR6_B2A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4460++0xB
line.long 0x0 "IP0SR6_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR6_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR6_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4480++0xB
line.long 0x0 "DRV0CTRL6_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL6_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL6_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x44A0++0x3
line.long 0x0 "POC6_B2A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x44C0++0x3
line.long 0x0 "PUEN6_B2A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x44E0++0x3
line.long 0x0 "PUD6_B2A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4560++0xB
line.long 0x0 "PSER6_B2A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR6_B2A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR6_B2A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4580++0xB
line.long 0x0 "IOINTSEL6_B2A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL6_B2A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT6_B2A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x458C++0x7
line.long 0x0 "INDT6_B2A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT6_B2A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4594++0x1B
line.long 0x0 "INTCLR6_B2A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK6_B2A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR6_B2A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG6_B2A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL6_B2A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF6_B2A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL6_B2A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x45C0++0x13
line.long 0x0 "OUTDTSEL6_B2A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH6_B2A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL6_B2A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE6_B2A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN6_B2A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6000++0x7
line.long 0x0 "PMMR6_B3A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER6_B3A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6020++0xF
line.long 0x0 "DM0PR6_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR6_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR6_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR6_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6040++0x3
line.long 0x0 "GPSR6_B3A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6060++0xB
line.long 0x0 "IP0SR6_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR6_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR6_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6080++0xB
line.long 0x0 "DRV0CTRL6_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL6_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL6_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x60A0++0x3
line.long 0x0 "POC6_B3A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x60C0++0x3
line.long 0x0 "PUEN6_B3A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x60E0++0x3
line.long 0x0 "PUD6_B3A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6160++0xB
line.long 0x0 "PSER6_B3A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR6_B3A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR6_B3A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6180++0xB
line.long 0x0 "IOINTSEL6_B3A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL6_B3A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT6_B3A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x618C++0x7
line.long 0x0 "INDT6_B3A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT6_B3A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6194++0x1B
line.long 0x0 "INTCLR6_B3A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK6_B3A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR6_B3A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG6_B3A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL6_B3A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF6_B3A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL6_B3A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x61C0++0x13
line.long 0x0 "OUTDTSEL6_B3A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH6_B3A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL6_B3A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE6_B3A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN6_B3A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6200++0x7
line.long 0x0 "PMMR6_B3A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER6_B3A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6220++0xF
line.long 0x0 "DM0PR6_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR6_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR6_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR6_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6240++0x3
line.long 0x0 "GPSR6_B3A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6260++0xB
line.long 0x0 "IP0SR6_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR6_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR6_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6280++0xB
line.long 0x0 "DRV0CTRL6_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL6_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL6_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x62A0++0x3
line.long 0x0 "POC6_B3A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x62C0++0x3
line.long 0x0 "PUEN6_B3A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x62E0++0x3
line.long 0x0 "PUD6_B3A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6360++0xB
line.long 0x0 "PSER6_B3A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR6_B3A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR6_B3A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6380++0xB
line.long 0x0 "IOINTSEL6_B3A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL6_B3A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT6_B3A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x638C++0x7
line.long 0x0 "INDT6_B3A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT6_B3A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6394++0x1B
line.long 0x0 "INTCLR6_B3A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK6_B3A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR6_B3A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG6_B3A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL6_B3A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF6_B3A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL6_B3A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x63C0++0x13
line.long 0x0 "OUTDTSEL6_B3A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH6_B3A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL6_B3A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE6_B3A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN6_B3A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6400++0x7
line.long 0x0 "PMMR6_B3A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER6_B3A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6420++0xF
line.long 0x0 "DM0PR6_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR6_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR6_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR6_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6440++0x3
line.long 0x0 "GPSR6_B3A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6460++0xB
line.long 0x0 "IP0SR6_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR6_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR6_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6480++0xB
line.long 0x0 "DRV0CTRL6_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL6_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL6_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x64A0++0x3
line.long 0x0 "POC6_B3A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x64C0++0x3
line.long 0x0 "PUEN6_B3A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x64E0++0x3
line.long 0x0 "PUD6_B3A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6560++0xB
line.long 0x0 "PSER6_B3A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR6_B3A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR6_B3A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6580++0xB
line.long 0x0 "IOINTSEL6_B3A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL6_B3A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT6_B3A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x658C++0x7
line.long 0x0 "INDT6_B3A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT6_B3A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6594++0x1B
line.long 0x0 "INTCLR6_B3A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK6_B3A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR6_B3A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG6_B3A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL6_B3A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF6_B3A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL6_B3A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x65C0++0x13
line.long 0x0 "OUTDTSEL6_B3A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH6_B3A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL6_B3A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE6_B3A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN6_B3A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
tree.end
tree "PFC_GPIO_for_GP7"
base ad:0xE6061800
group.long 0x0++0x7
line.long 0x0 "PMMR7_B0A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER7_B0A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x20++0xF
line.long 0x0 "DM0PR7_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR7_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR7_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR7_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x40++0x3
line.long 0x0 "GPSR7_B0A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x60++0xB
line.long 0x0 "IP0SR7_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR7_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR7_B0A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x80++0xB
line.long 0x0 "DRV0CTRL7_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL7_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL7_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0xA0++0x3
line.long 0x0 "POC7_B0A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0xC0++0x3
line.long 0x0 "PUEN7_B0A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0xE0++0x3
line.long 0x0 "PUD7_B0A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x160++0xB
line.long 0x0 "PSER7_B0A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR7_B0A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR7_B0A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x180++0xB
line.long 0x0 "IOINTSEL7_B0A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL7_B0A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT7_B0A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x18C++0x7
line.long 0x0 "INDT7_B0A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT7_B0A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x194++0x1B
line.long 0x0 "INTCLR7_B0A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK7_B0A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR7_B0A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG7_B0A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL7_B0A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF7_B0A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL7_B0A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x1C0++0x13
line.long 0x0 "OUTDTSEL7_B0A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH7_B0A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL7_B0A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE7_B0A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN7_B0A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x200++0x7
line.long 0x0 "PMMR7_B0A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER7_B0A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x220++0xF
line.long 0x0 "DM0PR7_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR7_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR7_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR7_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x240++0x3
line.long 0x0 "GPSR7_B0A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x260++0xB
line.long 0x0 "IP0SR7_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR7_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR7_B0A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x280++0xB
line.long 0x0 "DRV0CTRL7_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL7_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL7_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x2A0++0x3
line.long 0x0 "POC7_B0A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x2C0++0x3
line.long 0x0 "PUEN7_B0A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x2E0++0x3
line.long 0x0 "PUD7_B0A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x360++0xB
line.long 0x0 "PSER7_B0A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR7_B0A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR7_B0A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x380++0xB
line.long 0x0 "IOINTSEL7_B0A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL7_B0A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT7_B0A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x38C++0x7
line.long 0x0 "INDT7_B0A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT7_B0A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x394++0x1B
line.long 0x0 "INTCLR7_B0A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK7_B0A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR7_B0A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG7_B0A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL7_B0A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF7_B0A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL7_B0A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x3C0++0x13
line.long 0x0 "OUTDTSEL7_B0A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH7_B0A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL7_B0A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE7_B0A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN7_B0A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x400++0x7
line.long 0x0 "PMMR7_B0A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER7_B0A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x420++0xF
line.long 0x0 "DM0PR7_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR7_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR7_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR7_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x440++0x3
line.long 0x0 "GPSR7_B0A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x460++0xB
line.long 0x0 "IP0SR7_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR7_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR7_B0A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x480++0xB
line.long 0x0 "DRV0CTRL7_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL7_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL7_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x4A0++0x3
line.long 0x0 "POC7_B0A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x4C0++0x3
line.long 0x0 "PUEN7_B0A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x4E0++0x3
line.long 0x0 "PUD7_B0A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x560++0xB
line.long 0x0 "PSER7_B0A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR7_B0A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR7_B0A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x580++0xB
line.long 0x0 "IOINTSEL7_B0A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL7_B0A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT7_B0A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x58C++0x7
line.long 0x0 "INDT7_B0A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT7_B0A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x594++0x1B
line.long 0x0 "INTCLR7_B0A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK7_B0A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR7_B0A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG7_B0A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL7_B0A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF7_B0A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL7_B0A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x5C0++0x13
line.long 0x0 "OUTDTSEL7_B0A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH7_B0A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL7_B0A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE7_B0A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN7_B0A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2000++0x7
line.long 0x0 "PMMR7_B1A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER7_B1A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2020++0xF
line.long 0x0 "DM0PR7_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR7_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR7_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR7_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2040++0x3
line.long 0x0 "GPSR7_B1A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2060++0xB
line.long 0x0 "IP0SR7_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR7_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR7_B1A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2080++0xB
line.long 0x0 "DRV0CTRL7_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL7_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL7_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x20A0++0x3
line.long 0x0 "POC7_B1A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x20C0++0x3
line.long 0x0 "PUEN7_B1A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x20E0++0x3
line.long 0x0 "PUD7_B1A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2160++0xB
line.long 0x0 "PSER7_B1A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR7_B1A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR7_B1A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2180++0xB
line.long 0x0 "IOINTSEL7_B1A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL7_B1A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT7_B1A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x218C++0x7
line.long 0x0 "INDT7_B1A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT7_B1A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2194++0x1B
line.long 0x0 "INTCLR7_B1A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK7_B1A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR7_B1A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG7_B1A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL7_B1A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF7_B1A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL7_B1A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x21C0++0x13
line.long 0x0 "OUTDTSEL7_B1A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH7_B1A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL7_B1A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE7_B1A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN7_B1A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2200++0x7
line.long 0x0 "PMMR7_B1A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER7_B1A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2220++0xF
line.long 0x0 "DM0PR7_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR7_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR7_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR7_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2240++0x3
line.long 0x0 "GPSR7_B1A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2260++0xB
line.long 0x0 "IP0SR7_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR7_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR7_B1A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2280++0xB
line.long 0x0 "DRV0CTRL7_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL7_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL7_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x22A0++0x3
line.long 0x0 "POC7_B1A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x22C0++0x3
line.long 0x0 "PUEN7_B1A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x22E0++0x3
line.long 0x0 "PUD7_B1A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2360++0xB
line.long 0x0 "PSER7_B1A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR7_B1A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR7_B1A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2380++0xB
line.long 0x0 "IOINTSEL7_B1A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL7_B1A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT7_B1A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x238C++0x7
line.long 0x0 "INDT7_B1A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT7_B1A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2394++0x1B
line.long 0x0 "INTCLR7_B1A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK7_B1A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR7_B1A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG7_B1A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL7_B1A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF7_B1A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL7_B1A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x23C0++0x13
line.long 0x0 "OUTDTSEL7_B1A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH7_B1A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL7_B1A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE7_B1A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN7_B1A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x2400++0x7
line.long 0x0 "PMMR7_B1A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER7_B1A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2420++0xF
line.long 0x0 "DM0PR7_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR7_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR7_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR7_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2440++0x3
line.long 0x0 "GPSR7_B1A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x2460++0xB
line.long 0x0 "IP0SR7_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR7_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR7_B1A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x2480++0xB
line.long 0x0 "DRV0CTRL7_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL7_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL7_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x24A0++0x3
line.long 0x0 "POC7_B1A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x24C0++0x3
line.long 0x0 "PUEN7_B1A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x24E0++0x3
line.long 0x0 "PUD7_B1A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2560++0xB
line.long 0x0 "PSER7_B1A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR7_B1A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR7_B1A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x2580++0xB
line.long 0x0 "IOINTSEL7_B1A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL7_B1A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT7_B1A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x258C++0x7
line.long 0x0 "INDT7_B1A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT7_B1A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x2594++0x1B
line.long 0x0 "INTCLR7_B1A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK7_B1A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR7_B1A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG7_B1A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL7_B1A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF7_B1A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL7_B1A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x25C0++0x13
line.long 0x0 "OUTDTSEL7_B1A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH7_B1A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL7_B1A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE7_B1A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN7_B1A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4000++0x7
line.long 0x0 "PMMR7_B2A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER7_B2A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4020++0xF
line.long 0x0 "DM0PR7_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR7_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR7_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR7_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4040++0x3
line.long 0x0 "GPSR7_B2A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4060++0xB
line.long 0x0 "IP0SR7_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR7_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR7_B2A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4080++0xB
line.long 0x0 "DRV0CTRL7_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL7_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL7_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x40A0++0x3
line.long 0x0 "POC7_B2A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x40C0++0x3
line.long 0x0 "PUEN7_B2A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x40E0++0x3
line.long 0x0 "PUD7_B2A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4160++0xB
line.long 0x0 "PSER7_B2A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR7_B2A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR7_B2A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4180++0xB
line.long 0x0 "IOINTSEL7_B2A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL7_B2A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT7_B2A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x418C++0x7
line.long 0x0 "INDT7_B2A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT7_B2A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4194++0x1B
line.long 0x0 "INTCLR7_B2A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK7_B2A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR7_B2A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG7_B2A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL7_B2A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF7_B2A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL7_B2A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x41C0++0x13
line.long 0x0 "OUTDTSEL7_B2A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH7_B2A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL7_B2A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE7_B2A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN7_B2A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4200++0x7
line.long 0x0 "PMMR7_B2A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER7_B2A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4220++0xF
line.long 0x0 "DM0PR7_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR7_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR7_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR7_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4240++0x3
line.long 0x0 "GPSR7_B2A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4260++0xB
line.long 0x0 "IP0SR7_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR7_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR7_B2A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4280++0xB
line.long 0x0 "DRV0CTRL7_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL7_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL7_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x42A0++0x3
line.long 0x0 "POC7_B2A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x42C0++0x3
line.long 0x0 "PUEN7_B2A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x42E0++0x3
line.long 0x0 "PUD7_B2A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4360++0xB
line.long 0x0 "PSER7_B2A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR7_B2A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR7_B2A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4380++0xB
line.long 0x0 "IOINTSEL7_B2A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL7_B2A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT7_B2A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x438C++0x7
line.long 0x0 "INDT7_B2A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT7_B2A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4394++0x1B
line.long 0x0 "INTCLR7_B2A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK7_B2A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR7_B2A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG7_B2A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL7_B2A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF7_B2A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL7_B2A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x43C0++0x13
line.long 0x0 "OUTDTSEL7_B2A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH7_B2A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL7_B2A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE7_B2A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN7_B2A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x4400++0x7
line.long 0x0 "PMMR7_B2A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER7_B2A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4420++0xF
line.long 0x0 "DM0PR7_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR7_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR7_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR7_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4440++0x3
line.long 0x0 "GPSR7_B2A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x4460++0xB
line.long 0x0 "IP0SR7_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR7_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR7_B2A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x4480++0xB
line.long 0x0 "DRV0CTRL7_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL7_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL7_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x44A0++0x3
line.long 0x0 "POC7_B2A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x44C0++0x3
line.long 0x0 "PUEN7_B2A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x44E0++0x3
line.long 0x0 "PUD7_B2A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4560++0xB
line.long 0x0 "PSER7_B2A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR7_B2A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR7_B2A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x4580++0xB
line.long 0x0 "IOINTSEL7_B2A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL7_B2A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT7_B2A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x458C++0x7
line.long 0x0 "INDT7_B2A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT7_B2A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x4594++0x1B
line.long 0x0 "INTCLR7_B2A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK7_B2A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR7_B2A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG7_B2A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL7_B2A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF7_B2A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL7_B2A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x45C0++0x13
line.long 0x0 "OUTDTSEL7_B2A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH7_B2A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL7_B2A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE7_B2A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN7_B2A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6000++0x7
line.long 0x0 "PMMR7_B3A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER7_B3A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6020++0xF
line.long 0x0 "DM0PR7_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR7_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR7_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR7_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6040++0x3
line.long 0x0 "GPSR7_B3A0,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6060++0xB
line.long 0x0 "IP0SR7_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR7_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR7_B3A0,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6080++0xB
line.long 0x0 "DRV0CTRL7_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL7_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL7_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x60A0++0x3
line.long 0x0 "POC7_B3A0,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x60C0++0x3
line.long 0x0 "PUEN7_B3A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x60E0++0x3
line.long 0x0 "PUD7_B3A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6160++0xB
line.long 0x0 "PSER7_B3A0,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR7_B3A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR7_B3A0,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6180++0xB
line.long 0x0 "IOINTSEL7_B3A0,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL7_B3A0,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT7_B3A0,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x618C++0x7
line.long 0x0 "INDT7_B3A0,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT7_B3A0,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6194++0x1B
line.long 0x0 "INTCLR7_B3A0,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK7_B3A0,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR7_B3A0,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG7_B3A0,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL7_B3A0,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF7_B3A0,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL7_B3A0,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x61C0++0x13
line.long 0x0 "OUTDTSEL7_B3A0,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH7_B3A0,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL7_B3A0,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE7_B3A0,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN7_B3A0,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6200++0x7
line.long 0x0 "PMMR7_B3A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER7_B3A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6220++0xF
line.long 0x0 "DM0PR7_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR7_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR7_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR7_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6240++0x3
line.long 0x0 "GPSR7_B3A1,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6260++0xB
line.long 0x0 "IP0SR7_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR7_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR7_B3A1,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6280++0xB
line.long 0x0 "DRV0CTRL7_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL7_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL7_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x62A0++0x3
line.long 0x0 "POC7_B3A1,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x62C0++0x3
line.long 0x0 "PUEN7_B3A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x62E0++0x3
line.long 0x0 "PUD7_B3A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6360++0xB
line.long 0x0 "PSER7_B3A1,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR7_B3A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR7_B3A1,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6380++0xB
line.long 0x0 "IOINTSEL7_B3A1,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL7_B3A1,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT7_B3A1,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x638C++0x7
line.long 0x0 "INDT7_B3A1,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT7_B3A1,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6394++0x1B
line.long 0x0 "INTCLR7_B3A1,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK7_B3A1,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR7_B3A1,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG7_B3A1,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL7_B3A1,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF7_B3A1,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL7_B3A1,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x63C0++0x13
line.long 0x0 "OUTDTSEL7_B3A1,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH7_B3A1,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL7_B3A1,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE7_B3A1,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN7_B3A1,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
group.long 0x6400++0x7
line.long 0x0 "PMMR7_B3A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMER7_B3A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6420++0xF
line.long 0x0 "DM0PR7_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PR7_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PR7_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PR7_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6440++0x3
line.long 0x0 "GPSR7_B3A2,GPSRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "GPSR_31_0,0: GPIO"
group.long 0x6460++0xB
line.long 0x0 "IP0SR7_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x0 0.--31. 1. "IP0SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x4 "IP1SR7_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x4 0.--31. 1. "IP1SR_31_0,The functions of the LSI pins are selected according to the table below."
line.long 0x8 "IP2SR7_B3A2,IP*SRn selects the functions of the multiplexed LSI pins."
hexmask.long 0x8 0.--31. 1. "IP2SR_31_0,The functions of the LSI pins are selected according to the table below."
group.long 0x6480++0xB
line.long 0x0 "DRV0CTRL7_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRL7_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x8 "DRV2CTRL7_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x8 0.--31. 1. "DRV2CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x64A0++0x3
line.long 0x0 "POC7_B3A2,Each bit in POCn / POCSYS must be set according to IO voltage level that is supplied to the pin."
hexmask.long 0x0 0.--31. 1. "POC_31_0,- For 1.8V/3.3 V"
group.long 0x64C0++0x3
line.long 0x0 "PUEN7_B3A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x64E0++0x3
line.long 0x0 "PUD7_B3A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6560++0xB
line.long 0x0 "PSER7_B3A2,The register (PSERn) to enable / disable PSS Rregister."
hexmask.long 0x0 0.--31. 1. "PSER_31_0,0: PSSR disable."
line.long 0x4 "PS0SR7_B3A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x4 0.--31. 1. "PS0SR_31_0,b'00=initial state"
line.long 0x8 "PS1SR7_B3A2,Registers (PS*SRn) that select 4 types of Port Safe State (initial state or HiZ or Pull-Down or Pull-Up) with 2 bits."
hexmask.long 0x8 0.--31. 1. "PS1SR_31_0,b'00=initial state"
group.long 0x6580++0xB
line.long 0x0 "IOINTSEL7_B3A2,IOINTSELn selects either general input/output mode or interrupt input mode for each of the port pins 0 to 31 of the GPIO group. When general input / output mode is selected for a port. it is also necessary to select either input or output.."
hexmask.long 0x0 0.--31. 1. "IOINTSEL_31_0,Selects either general input/output mode or interrupt input mode for each port using the bits corresponding to the port numbers."
line.long 0x4 "INOUTSEL7_B3A2,INOUTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register. Specifically. INOUTSEL selects either general input or general output mode for a port using the bit.."
hexmask.long 0x4 0.--31. 1. "INOUTSEL_31_0,Selects either general input mode or general output mode for each port using the bits corresponding to the port numbers."
line.long 0x8 "OUTDT7_B3A2,OUTDTn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. Specifically. the value.."
hexmask.long 0x8 0.--31. 1. "OUTDT_31_0,Allows the port to output the value set in the bit corresponding to the port number when the port is appropriately set by IOINTSEL  INOUTSEL and OUTDTSEL."
rgroup.long 0x658C++0x7
line.long 0x0 "INDT7_B3A2,INDTn is a register that can read the status of General-Purpose Input / Output Ports."
hexmask.long 0x0 0.--31. 1. "INDT_31_0,Each bit reflects the value received through the corresponding port pin."
line.long 0x4 "INTDT7_B3A2,INTDTn is valid only when interrupt input mode is selected by the general IO/interrupt switching register. Specifically. when an interrupt is input via a port pin when INTDTn is valid. the bit in INTDTn corresponding to the port indicates.."
hexmask.long 0x4 0.--31. 1. "INTDT_31_0,Each bit indicates the input of an interrupt signal on the corresponding port pin."
group.long 0x6594++0x1B
line.long 0x0 "INTCLR7_B3A2,When the interrupt display register is currently indicates the reception of the interrupt input on the port for which the edge detection is selected by the edge/level select register (with configuring for one edge/both edge select register).."
hexmask.long 0x0 0.--31. 1. "INTCLR_31_0,Writing 1 to bits corresponding to port numbers clears the corresponding bits in the interrupt display register."
line.long 0x4 "INTMSK7_B3A2,INTMSKn masks the interrupt requests indicated by the interrupt display register of GPIO.ch. Interrupts can be separately masked using the corresponding bits in INTMSKn. When all the bits currently indicating the reception of the interrupt.."
hexmask.long 0x4 0.--31. 1. "INTMSK_31_0,Setting a mask to the bit disables the corresponding interrupt signal to be output to the interrupt control block."
line.long 0x8 "MSKCLR7_B3A2,MSKCLRn cancels masks that are set by the interrupt mask register of GPIO.ch*A. Each mask can be canceled (cleared) by writing 1 to the corresponding bit in MSKCLRn. Only writing 1 to MSKCLRn is effective; MSKCLRn is always read as 0."
hexmask.long 0x8 0.--31. 1. "MSKCLR_31_0,Setting a mask to the bit disables the corresponding alternative interrupt signal to be output to the interrupt control block."
line.long 0xC "POSNEG7_B3A2,POSNEGn selects the polarity (positive or negative logic) of each port pin in general input mode. general output mode. or interrupt input mode. POSNEGn should be set before mode selection."
hexmask.long 0xC 0.--31. 1. "POSNEG_31_0,Selects the polarity (positive or negative logic) of each port pin."
line.long 0x10 "EDGLEVEL7_B3A2,EDGLEVELn is valid only for the ports for which interrupt input mode is selected by the general IO/interrupt switching register. Specifically. EDGLEVELn selects the detection conditions (edge or level) of the interrupt input signal on each.."
hexmask.long 0x10 0.--31. 1. "EDGLEVEL_31_0,Selects the level or edge as detection conditions of the interrupt input signal on each port pin for which interrupt input mode is selected."
line.long 0x14 "FILONOFF7_B3A2,FILONOFFn prevents chattering input to the port pins of each GPIO group. For details. refer to section 7.3.6. Handling of Input Signals on Port Pins."
hexmask.long 0x14 0.--31. 1. "FILONOFF_31_0,Enables or disables the chattering prevention function."
line.long 0x18 "FILCLKSEL7_B3A2,FILCLKSELn controls the division ratio of clock CPphy for prevent chattering input to the port pin GPIO group."
hexmask.long 0x18 0.--31. 1. "FILCLKSEL_31_0,Set the division ratio of filter CLOCK."
group.long 0x65C0++0x13
line.long 0x0 "OUTDTSEL7_B3A2,OUTDTSELn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. OUTDTSELn selects.."
hexmask.long 0x0 0.--31. 1. "OUTDTSEL_31_0,Choosing whether output data is output by general output register OUTDTn or output data high register OUTDTHn / output data low register OUTDTLn."
line.long 0x4 "OUTDTH7_B3A2,OUTDTHn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x4 0.--31. 1. "OUTDTH_31_0,Outputting high value data."
line.long 0x8 "OUTDTL7_B3A2,OUTDTLn is valid only for the ports for which general input/output mode is selected by the general IO/interrupt switching register and then general output mode is selected by the general input/output switching register. and the output data.."
hexmask.long 0x8 0.--31. 1. "OUTDTL_31_0,Outputting low value data."
line.long 0xC "BOTHEDGE7_B3A2,BOTHEDGEn is valid only when the edge detection mode is selected by the edge/level select registers. Specially. BOTHEDGEn selects the detection condition (one edge or both edges) of the interrupt input signal on each port pin for which.."
hexmask.long 0xC 0.--31. 1. "BOTHEDGE_31_0,Selecting one edge or both edge detection condition of the interrupt input signal on each port pin for which interrupt input mode and edge detection mode are selected."
line.long 0x10 "INEN7_B3A2,Create registers that can control IE in GPIO."
hexmask.long 0x10 0.--31. 1. "INEN_31_0,0: Input disable."
tree.end
tree "PFC_GPIO_for_SYS"
base ad:0xE6078000
group.long 0x0++0x7
line.long 0x0 "PMMRSYS_B0A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMERSYS_B0A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x20++0xF
line.long 0x0 "DM0PRSYS_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PRSYS_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PRSYS_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PRSYS_B0A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x80++0x7
line.long 0x0 "DRV0CTRLSYS_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRLSYS_B0A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0xC0++0x3
line.long 0x0 "PUENSYS_B0A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0xE0++0x3
line.long 0x0 "PUDSYS_B0A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x200++0x7
line.long 0x0 "PMMRSYS_B0A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMERSYS_B0A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x220++0xF
line.long 0x0 "DM0PRSYS_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PRSYS_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PRSYS_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PRSYS_B0A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x280++0x7
line.long 0x0 "DRV0CTRLSYS_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRLSYS_B0A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x2C0++0x3
line.long 0x0 "PUENSYS_B0A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x2E0++0x3
line.long 0x0 "PUDSYS_B0A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x400++0x7
line.long 0x0 "PMMRSYS_B0A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMERSYS_B0A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x420++0xF
line.long 0x0 "DM0PRSYS_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PRSYS_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PRSYS_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PRSYS_B0A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x480++0x7
line.long 0x0 "DRV0CTRLSYS_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRLSYS_B0A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x4C0++0x3
line.long 0x0 "PUENSYS_B0A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x4E0++0x3
line.long 0x0 "PUDSYS_B0A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2000++0x7
line.long 0x0 "PMMRSYS_B1A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMERSYS_B1A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2020++0xF
line.long 0x0 "DM0PRSYS_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PRSYS_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PRSYS_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PRSYS_B1A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2080++0x7
line.long 0x0 "DRV0CTRLSYS_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRLSYS_B1A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x20C0++0x3
line.long 0x0 "PUENSYS_B1A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x20E0++0x3
line.long 0x0 "PUDSYS_B1A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2200++0x7
line.long 0x0 "PMMRSYS_B1A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMERSYS_B1A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2220++0xF
line.long 0x0 "DM0PRSYS_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PRSYS_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PRSYS_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PRSYS_B1A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2280++0x7
line.long 0x0 "DRV0CTRLSYS_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRLSYS_B1A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x22C0++0x3
line.long 0x0 "PUENSYS_B1A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x22E0++0x3
line.long 0x0 "PUDSYS_B1A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x2400++0x7
line.long 0x0 "PMMRSYS_B1A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMERSYS_B1A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x2420++0xF
line.long 0x0 "DM0PRSYS_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PRSYS_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PRSYS_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PRSYS_B1A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x2480++0x7
line.long 0x0 "DRV0CTRLSYS_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRLSYS_B1A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x24C0++0x3
line.long 0x0 "PUENSYS_B1A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x24E0++0x3
line.long 0x0 "PUDSYS_B1A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4000++0x7
line.long 0x0 "PMMRSYS_B2A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMERSYS_B2A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4020++0xF
line.long 0x0 "DM0PRSYS_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PRSYS_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PRSYS_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PRSYS_B2A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4080++0x7
line.long 0x0 "DRV0CTRLSYS_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRLSYS_B2A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x40C0++0x3
line.long 0x0 "PUENSYS_B2A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x40E0++0x3
line.long 0x0 "PUDSYS_B2A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4200++0x7
line.long 0x0 "PMMRSYS_B2A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMERSYS_B2A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4220++0xF
line.long 0x0 "DM0PRSYS_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PRSYS_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PRSYS_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PRSYS_B2A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4280++0x7
line.long 0x0 "DRV0CTRLSYS_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRLSYS_B2A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x42C0++0x3
line.long 0x0 "PUENSYS_B2A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x42E0++0x3
line.long 0x0 "PUDSYS_B2A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x4400++0x7
line.long 0x0 "PMMRSYS_B2A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMERSYS_B2A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x4420++0xF
line.long 0x0 "DM0PRSYS_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PRSYS_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PRSYS_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PRSYS_B2A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x4480++0x7
line.long 0x0 "DRV0CTRLSYS_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRLSYS_B2A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x44C0++0x3
line.long 0x0 "PUENSYS_B2A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x44E0++0x3
line.long 0x0 "PUDSYS_B2A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6000++0x7
line.long 0x0 "PMMRSYS_B3A0,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMERSYS_B3A0,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6020++0xF
line.long 0x0 "DM0PRSYS_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PRSYS_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PRSYS_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PRSYS_B3A0,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6080++0x7
line.long 0x0 "DRV0CTRLSYS_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRLSYS_B3A0,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x60C0++0x3
line.long 0x0 "PUENSYS_B3A0,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x60E0++0x3
line.long 0x0 "PUDSYS_B3A0,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6200++0x7
line.long 0x0 "PMMRSYS_B3A1,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMERSYS_B3A1,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6220++0xF
line.long 0x0 "DM0PRSYS_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PRSYS_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PRSYS_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PRSYS_B3A1,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6280++0x7
line.long 0x0 "DRV0CTRLSYS_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRLSYS_B3A1,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x62C0++0x3
line.long 0x0 "PUENSYS_B3A1,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x62E0++0x3
line.long 0x0 "PUDSYS_B3A1,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
group.long 0x6400++0x7
line.long 0x0 "PMMRSYS_B3A2,PMMRn / PMMRSYS enables / disables writing to the multiplexed pin setting registers."
hexmask.long 0x0 0.--31. 1. "PMMR_31_0,Multiplexed Pin Setting Mask"
line.long 0x4 "PMMERSYS_B3A2,PMMERn / PMMERSYS performs enables / disables control of the PMMR."
hexmask.long 0x4 0.--31. 1. "PMMER_31_0,Multiplexed Pin Setting Mask Enable"
group.long 0x6420++0xF
line.long 0x0 "DM0PRSYS_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x0 0.--31. 1. "DM0PR_31_0,Bus Domain Protection"
line.long 0x4 "DM1PRSYS_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x4 0.--31. 1. "DM1PR_31_0,Bus Domain Protection"
line.long 0x8 "DM2PRSYS_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0x8 0.--31. 1. "DM2PR_31_0,Bus Domain Protection"
line.long 0xC "DM3PRSYS_B3A2,DM*PRn / DM*PRSYS enables / disables writing to the registers from bus domain."
hexmask.long 0xC 0.--31. 1. "DM3PR_31_0,Bus Domain Protection"
group.long 0x6480++0x7
line.long 0x0 "DRV0CTRLSYS_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x0 0.--31. 1. "DRV0CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
line.long 0x4 "DRV1CTRLSYS_B3A2,DRV*CTRLn / DRV**CTRLSYS controls the driving abilities of pins. This setting is related to only the output."
hexmask.long 0x4 0.--31. 1. "DRV1CTRL_31_0,- Drive capability of pins with voltage type 1.8V/3.3V  2.5V/3.3V  3.3V based on value of DRV3/DRV2/DRV1 as below:"
group.long 0x64C0++0x3
line.long 0x0 "PUENSYS_B3A2,PUENn / PUENSYS performs on / off control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUEN_31_0,0: Pull-up / down function is disabled."
group.long 0x64E0++0x3
line.long 0x0 "PUDSYS_B3A2,PUDn / PUDSYS performs pull-up / pull-down control of the pull resistors."
hexmask.long 0x0 0.--31. 1. "PUD_31_0,0: Pull-down is enabled."
tree.end
tree.end
tree "POST (Power On Self Test and Runtime Test)"
base ad:0x0
tree "Functional_Safety_POST_RTT_0"
base ad:0xFF820000
group.long 0x0++0xF
line.long 0x0 "RTTEX1,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI11,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI21,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR11,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC1,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC1,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_1,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_1,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_1,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_1,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_1,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_1,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_1,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_1,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_1,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_1,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_1,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_1,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_1,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_1,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_1,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT1,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT1,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT1,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT1,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS1,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST1,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET1,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_1"
base ad:0xFEAC0000
group.long 0x0++0xF
line.long 0x0 "RTTEX2,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI12,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI22,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR12,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC2,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC2,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_2,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_2,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_2,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_2,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_2,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_2,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_2,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_2,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_2,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_2,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_2,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_2,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_2,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_2,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_2,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT2,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT2,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT2,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT2,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS2,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST2,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET2,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_2"
base ad:0xFEAC1000
group.long 0x0++0xF
line.long 0x0 "RTTEX3,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI13,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI23,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR13,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC3,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC3,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_3,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_3,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_3,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_3,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_3,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_3,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_3,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_3,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_3,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_3,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_3,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_3,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_3,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_3,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_3,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT3,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT3,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT3,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT3,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS3,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST3,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET3,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_3"
base ad:0xFE600000
group.long 0x0++0xF
line.long 0x0 "RTTEX4,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI14,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI24,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR14,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC4,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC4,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_4,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_4,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_4,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_4,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_4,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_4,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_4,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_4,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_4,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_4,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_4,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_4,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_4,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_4,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_4,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT4,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT4,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT4,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT4,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS4,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST4,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET4,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_4"
base ad:0xFE601000
group.long 0x0++0xF
line.long 0x0 "RTTEX5,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI15,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI25,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR15,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC5,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC5,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_5,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_5,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_5,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_5,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_5,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_5,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_5,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_5,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_5,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_5,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_5,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_5,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_5,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_5,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_5,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT5,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT5,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT5,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT5,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS5,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST5,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET5,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_5"
base ad:0xFE602000
group.long 0x0++0xF
line.long 0x0 "RTTEX6,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI16,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI26,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR16,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC6,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC6,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_6,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_6,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_6,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_6,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_6,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_6,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_6,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_6,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_6,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_6,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_6,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_6,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_6,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_6,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_6,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT6,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT6,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT6,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT6,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS6,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST6,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET6,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_6"
base ad:0xFE605000
group.long 0x0++0xF
line.long 0x0 "RTTEX7,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI17,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI27,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR17,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC7,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC7,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_7,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_7,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_7,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_7,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_7,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_7,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_7,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_7,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_7,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_7,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_7,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_7,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_7,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_7,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_7,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT7,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT7,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT7,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT7,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS7,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST7,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET7,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_7"
base ad:0xFE606000
group.long 0x0++0xF
line.long 0x0 "RTTEX8,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI18,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI28,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR18,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC8,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC8,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_8,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_8,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_8,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_8,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_8,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_8,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_8,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_8,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_8,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_8,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_8,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_8,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_8,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_8,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_8,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT8,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT8,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT8,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT8,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS8,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST8,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET8,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_8"
base ad:0xE67A0000
group.long 0x0++0xF
line.long 0x0 "RTTEX9,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI19,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI29,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR19,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC9,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC9,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_9,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_9,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_9,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_9,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_9,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_9,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_9,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_9,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_9,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_9,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_9,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_9,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_9,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_9,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_9,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT9,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT9,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT9,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT9,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS9,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST9,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET9,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_9"
base ad:0xE67A1000
group.long 0x0++0xF
line.long 0x0 "RTTEX10,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI110,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI210,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR110,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC10,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC10,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_10,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_10,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_10,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_10,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_10,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_10,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_10,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_10,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_10,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_10,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_10,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_10,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_10,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_10,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_10,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT10,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT10,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT10,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT10,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS10,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST10,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET10,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_10"
base ad:0xE67FF000
group.long 0x0++0xF
line.long 0x0 "RTTEX11,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI111,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI211,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR111,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC11,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC11,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_11,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_11,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_11,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_11,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_11,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_11,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_11,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_11,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_11,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_11,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_11,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_11,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_11,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_11,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_11,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT11,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT11,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT11,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT11,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS11,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST11,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET11,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_11"
base ad:0xFF8C8000
group.long 0x0++0xF
line.long 0x0 "RTTEX12,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI112,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI212,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR112,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC12,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC12,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_12,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_12,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_12,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_12,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_12,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_12,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_12,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_12,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_12,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_12,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_12,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_12,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_12,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_12,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_12,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT12,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT12,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT12,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT12,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS12,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST12,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET12,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_12"
base ad:0xFF8C9000
group.long 0x0++0xF
line.long 0x0 "RTTEX13,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI113,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI213,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR113,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC13,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC13,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_13,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_13,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_13,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_13,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_13,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_13,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_13,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_13,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_13,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_13,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_13,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_13,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_13,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_13,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_13,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT13,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT13,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT13,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT13,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS13,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST13,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET13,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_13"
base ad:0xFF8C0000
group.long 0x0++0xF
line.long 0x0 "RTTEX14,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI114,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI214,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR114,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC14,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC14,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_14,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_14,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_14,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_14,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_14,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_14,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_14,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_14,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_14,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_14,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_14,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_14,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_14,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_14,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_14,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT14,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT14,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT14,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT14,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS14,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST14,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET14,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_14"
base ad:0xFF8C1000
group.long 0x0++0xF
line.long 0x0 "RTTEX15,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI115,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI215,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR115,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC15,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC15,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_15,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_15,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_15,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_15,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_15,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_15,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_15,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_15,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_15,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_15,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_15,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_15,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_15,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_15,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_15,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT15,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT15,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT15,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT15,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS15,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST15,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET15,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_15"
base ad:0xFF8C4000
group.long 0x0++0xF
line.long 0x0 "RTTEX16,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI116,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI216,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR116,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC16,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC16,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_16,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_16,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_16,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_16,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_16,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_16,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_16,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_16,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_16,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_16,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_16,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_16,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_16,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_16,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_16,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT16,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT16,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT16,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT16,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS16,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST16,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET16,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_16"
base ad:0xFF8C5000
group.long 0x0++0xF
line.long 0x0 "RTTEX17,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI117,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI217,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR117,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC17,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC17,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_17,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_17,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_17,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_17,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_17,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_17,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_17,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_17,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_17,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_17,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_17,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_17,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_17,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_17,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_17,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT17,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT17,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT17,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT17,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS17,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST17,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET17,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_17"
base ad:0xFF8C6000
group.long 0x0++0xF
line.long 0x0 "RTTEX18,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI118,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI218,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR118,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC18,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC18,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_18,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_18,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_18,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_18,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_18,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_18,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_18,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_18,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_18,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_18,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_18,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_18,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_18,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_18,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_18,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT18,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT18,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT18,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT18,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS18,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST18,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET18,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_18"
base ad:0xFF8C7000
group.long 0x0++0xF
line.long 0x0 "RTTEX19,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI119,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI219,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR119,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC19,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC19,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_19,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_19,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_19,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_19,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_19,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_19,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_19,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_19,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_19,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_19,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_19,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_19,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_19,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_19,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_19,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT19,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT19,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT19,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT19,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS19,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST19,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET19,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_19"
base ad:0xFFF56000
group.long 0x0++0xF
line.long 0x0 "RTTEX20,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI120,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI220,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR120,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC20,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC20,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_20,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_20,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_20,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_20,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_20,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_20,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_20,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_20,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_20,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_20,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_20,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_20,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_20,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_20,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_20,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT20,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT20,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT20,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT20,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS20,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST20,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET20,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_20"
base ad:0xFFF57000
group.long 0x0++0xF
line.long 0x0 "RTTEX21,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI121,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI221,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR121,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC21,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC21,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_21,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_21,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_21,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_21,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_21,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_21,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_21,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_21,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_21,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_21,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_21,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_21,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_21,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_21,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_21,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT21,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT21,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT21,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT21,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS21,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST21,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET21,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_21"
base ad:0xFFF50000
group.long 0x0++0xF
line.long 0x0 "RTTEX22,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI122,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI222,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR122,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC22,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC22,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_22,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_22,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_22,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_22,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_22,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_22,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_22,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_22,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_22,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_22,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_22,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_22,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_22,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_22,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_22,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT22,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT22,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT22,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT22,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS22,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST22,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET22,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_22"
base ad:0xFFF64000
group.long 0x0++0xF
line.long 0x0 "RTTEX23,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI123,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI223,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR123,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC23,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC23,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_23,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_23,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_23,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_23,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_23,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_23,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_23,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_23,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_23,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_23,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_23,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_23,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_23,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_23,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_23,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT23,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT23,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT23,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT23,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS23,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST23,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET23,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_23"
base ad:0xFFF65000
group.long 0x0++0xF
line.long 0x0 "RTTEX24,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI124,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI224,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR124,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC24,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC24,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_24,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_24,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_24,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_24,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_24,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_24,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_24,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_24,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_24,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_24,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_24,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_24,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_24,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_24,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_24,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT24,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT24,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT24,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT24,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS24,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST24,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET24,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_24"
base ad:0xFFF55000
group.long 0x0++0xF
line.long 0x0 "RTTEX25,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI125,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI225,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR125,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC25,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC25,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_25,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_25,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_25,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_25,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_25,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_25,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_25,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_25,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_25,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_25,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_25,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_25,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_25,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_25,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_25,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT25,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT25,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT25,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT25,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS25,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST25,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET25,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_25"
base ad:0xFFF76000
group.long 0x0++0xF
line.long 0x0 "RTTEX26,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI126,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI226,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR126,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC26,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC26,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_26,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_26,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_26,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_26,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_26,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_26,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_26,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_26,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_26,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_26,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_26,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_26,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_26,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_26,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_26,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT26,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT26,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT26,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT26,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS26,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST26,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET26,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_26"
base ad:0xFFFE0000
group.long 0x0++0xF
line.long 0x0 "RTTEX27,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI127,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI227,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR127,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC27,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC27,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_27,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_27,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_27,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_27,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_27,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_27,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_27,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_27,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_27,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_27,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_27,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_27,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_27,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_27,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_27,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT27,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT27,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT27,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT27,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS27,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST27,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET27,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_27"
base ad:0xFFFC0000
group.long 0x0++0xF
line.long 0x0 "RTTEX28,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI128,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI228,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR128,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC28,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC28,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_28,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_28,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_28,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_28,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_28,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_28,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_28,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_28,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_28,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_28,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_28,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_28,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_28,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_28,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_28,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT28,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT28,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT28,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT28,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS28,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST28,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET28,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_28"
base ad:0xFF878000
group.long 0x0++0xF
line.long 0x0 "RTTEX29,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI129,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI229,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR129,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC29,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC29,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_29,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_29,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_29,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_29,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_29,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_29,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_29,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_29,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_29,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_29,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_29,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_29,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_29,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_29,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_29,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT29,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT29,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT29,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT29,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS29,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST29,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET29,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_29"
base ad:0xFF870000
group.long 0x0++0xF
line.long 0x0 "RTTEX30,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI130,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI230,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR130,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC30,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC30,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_30,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_30,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_30,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_30,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_30,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_30,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_30,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_30,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_30,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_30,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_30,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_30,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_30,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_30,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_30,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT30,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT30,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT30,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT30,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS30,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST30,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET30,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_30"
base ad:0xFF871000
group.long 0x0++0xF
line.long 0x0 "RTTEX31,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI131,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI231,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR131,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC31,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC31,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_31,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_31,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_31,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_31,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_31,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_31,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_31,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_31,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_31,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_31,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_31,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_31,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_31,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_31,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_31,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT31,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT31,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT31,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT31,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS31,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST31,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET31,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_31"
base ad:0xFF872000
group.long 0x0++0xF
line.long 0x0 "RTTEX32,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI132,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI232,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR132,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC32,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC32,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_32,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_32,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_32,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_32,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_32,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_32,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_32,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_32,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_32,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_32,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_32,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_32,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_32,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_32,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_32,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT32,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT32,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT32,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT32,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS32,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST32,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET32,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_32"
base ad:0xFF874000
group.long 0x0++0xF
line.long 0x0 "RTTEX33,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI133,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI233,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR133,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC33,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC33,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_33,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_33,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_33,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_33,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_33,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_33,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_33,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_33,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_33,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_33,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_33,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_33,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_33,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_33,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_33,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT33,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT33,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT33,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT33,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS33,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST33,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET33,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_33"
base ad:0xFF875000
group.long 0x0++0xF
line.long 0x0 "RTTEX34,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI134,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI234,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR134,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC34,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC34,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_34,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_34,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_34,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_34,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_34,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_34,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_34,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_34,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_34,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_34,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_34,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_34,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_34,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_34,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_34,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT34,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT34,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT34,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT34,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS34,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST34,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET34,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_34"
base ad:0xE6680000
group.long 0x0++0xF
line.long 0x0 "RTTEX35,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI135,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI235,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR135,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC35,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC35,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_35,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_35,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_35,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_35,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_35,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_35,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_35,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_35,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_35,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_35,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_35,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_35,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_35,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_35,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_35,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT35,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT35,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT35,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT35,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS35,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST35,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET35,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_35"
base ad:0xE6450000
group.long 0x0++0xF
line.long 0x0 "RTTEX36,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI136,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI236,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR136,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC36,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC36,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_36,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_36,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_36,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_36,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_36,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_36,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_36,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_36,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_36,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_36,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_36,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_36,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_36,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_36,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_36,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT36,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT36,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT36,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT36,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS36,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST36,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET36,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_36"
base ad:0xFD900000
group.long 0x0++0xF
line.long 0x0 "RTTEX37,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI137,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI237,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR137,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC37,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC37,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_37,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_37,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_37,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_37,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_37,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_37,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_37,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_37,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_37,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_37,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_37,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_37,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_37,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_37,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_37,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT37,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT37,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT37,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT37,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS37,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST37,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET37,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_37"
base ad:0xFD910000
group.long 0x0++0xF
line.long 0x0 "RTTEX38,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI138,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI238,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR138,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC38,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC38,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_38,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_38,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_38,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_38,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_38,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_38,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_38,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_38,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_38,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_38,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_38,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_38,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_38,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_38,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_38,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT38,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT38,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT38,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT38,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS38,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST38,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET38,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_38"
base ad:0xFD920000
group.long 0x0++0xF
line.long 0x0 "RTTEX39,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI139,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI239,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR139,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC39,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC39,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_39,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_39,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_39,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_39,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_39,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_39,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_39,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_39,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_39,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_39,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_39,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_39,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_39,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_39,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_39,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT39,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT39,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT39,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT39,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS39,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST39,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET39,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_39"
base ad:0xFD930000
group.long 0x0++0xF
line.long 0x0 "RTTEX40,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI140,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI240,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR140,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC40,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC40,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_40,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_40,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_40,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_40,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_40,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_40,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_40,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_40,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_40,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_40,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_40,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_40,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_40,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_40,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_40,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT40,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT40,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT40,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT40,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS40,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST40,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET40,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_40"
base ad:0xFD940000
group.long 0x0++0xF
line.long 0x0 "RTTEX41,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI141,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI241,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR141,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC41,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC41,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_41,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_41,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_41,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_41,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_41,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_41,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_41,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_41,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_41,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_41,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_41,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_41,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_41,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_41,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_41,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT41,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT41,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT41,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT41,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS41,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST41,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET41,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_41"
base ad:0xE7B60000
group.long 0x0++0xF
line.long 0x0 "RTTEX42,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI142,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI242,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR142,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC42,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC42,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_42,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_42,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_42,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_42,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_42,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_42,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_42,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_42,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_42,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_42,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_42,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_42,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_42,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_42,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_42,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT42,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT42,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT42,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT42,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS42,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST42,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET42,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_42"
base ad:0xE7B61000
group.long 0x0++0xF
line.long 0x0 "RTTEX43,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI143,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI243,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR143,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC43,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC43,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_43,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_43,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_43,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_43,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_43,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_43,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_43,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_43,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_43,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_43,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_43,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_43,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_43,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_43,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_43,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT43,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT43,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT43,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT43,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS43,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST43,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET43,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_43"
base ad:0xE7B64000
group.long 0x0++0xF
line.long 0x0 "RTTEX44,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI144,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI244,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR144,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC44,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC44,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_44,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_44,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_44,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_44,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_44,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_44,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_44,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_44,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_44,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_44,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_44,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_44,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_44,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_44,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_44,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT44,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT44,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT44,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT44,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS44,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST44,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET44,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_44"
base ad:0xE7B63000
group.long 0x0++0xF
line.long 0x0 "RTTEX45,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI145,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI245,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR145,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC45,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC45,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_45,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_45,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_45,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_45,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_45,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_45,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_45,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_45,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_45,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_45,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_45,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_45,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_45,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_45,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_45,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT45,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT45,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT45,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT45,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS45,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST45,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET45,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_45"
base ad:0xE7B62000
group.long 0x0++0xF
line.long 0x0 "RTTEX46,Note *1: SLFR and SLFE bit of the RTTEX are effective only when KCD bit is H'F1."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved." "0,1,2,3"
bitfld.long 0x0 29. "SLFR,Self-Check Counter Reset for field BIST activator." "0: Counter Reset,1: Counter not Reset"
newline
bitfld.long 0x0 28. "SLFE,Execution of Self-Check for Field BIST activator." "0: Not Execution of Self-Check for Field BIST..,1: Execution of Self-Check for Field BIST activator"
hexmask.long.byte 0x0 24.--27. 1. "Reserved_24,Reserved."
newline
hexmask.long.byte 0x0 16.--23. 1. "KCD,Key Code"
hexmask.long.byte 0x0 11.--15. 1. "Reserved_11,Reserved."
newline
bitfld.long 0x0 8.--10. "STM,Single Step Test Mode." "?,1: LBIST,?,?,?,?,?,?"
bitfld.long 0x0 6.--7. "INTM,Interrupt mask" "0: non mask,?,?,?"
newline
bitfld.long 0x0 5. "SSZ,SCAN Pattern size" "0: 32bit mode,1: 16bit mode"
bitfld.long 0x0 4. "TR,Select the value of the timer" "0: ROM,1: register"
newline
bitfld.long 0x0 3. "WM,Wfi mask" "0: not mask,1: mask"
bitfld.long 0x0 2. "TM,Mask the judgment of timer" "0: not mask,1: mask"
newline
bitfld.long 0x0 1. "STP,Single Step Mode." "0: ROM batch mode,1: Single Step Mode"
bitfld.long 0x0 0. "EX,Execution of Runtime Test." "0: Not Execution of Runtime Test,1: Execution of Runtime Test"
line.long 0x4 "RTTMI146,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved."
bitfld.long 0x4 24.--26. "RPROT,Protection type of MEMORY." "0: Unprivileged access,1: Privileged access,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 16.--23. 1. "MADDR_upper,Memory upper address[39:32] that stores the SCAN pattern."
hexmask.long.word 0x4 0.--15. 1. "MUNIT,Number of units (1 unit = 128 Byte)."
line.long 0x8 "RTTMI246,"
hexmask.long 0x8 0.--31. 1. "MADDR,Memory address that stores the SCAN pattern."
line.long 0xC "RTTSISR146,The packed result (SISR)"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0xC 0.--19. 1. "SISR1,SISR-TEST#1 Expected value."
group.long 0x14++0x7
line.long 0x0 "RTTUC46,This register is used to detect timeout in the runtime test."
hexmask.long 0x0 0.--31. 1. "U_WDT,Upper counter of Watchdog Timer."
line.long 0x4 "RTTDC46,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved."
hexmask.long.word 0x4 0.--15. 1. "L_WDT,Lower counter of Watchdog Timer."
group.long 0x80++0x7
line.long 0x0 "RTTSET0_46,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "test_clock,Test setting input. (Test clock selection for user domain)"
line.long 0x4 "RTTSET1_46,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved."
bitfld.long 0x4 1. "reset,Test setting input. (Reset test enable)" "0: Reset test disabled,1: Reset test enabled"
newline
bitfld.long 0x4 0. "tt,Test setting input. (Test clock selection for test domain)" "0: Selected other clock,1: Selected test clock for test Domain"
group.long 0x100++0x33
line.long 0x0 "RTTSET32_46,Write the values separately provided by Renesas Electronics."
hexmask.long 0x0 0.--31. 1. "clknum_31_0,Test setting input. (Test cycle of MBIST)"
line.long 0x4 "RTTSET33_46,Write the values separately provided by Renesas Electronics."
hexmask.long 0x4 0.--31. 1. "Testmat_31_0,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x8 "RTTSET34_46,Write the values separately provided by Renesas Electronics."
hexmask.long 0x8 0.--31. 1. "Testmat_63_32,Test setting input. (Test target bridge selection of MBIST)"
line.long 0xC "RTTSET35_46,Write the values separately provided by Renesas Electronics."
hexmask.long 0xC 0.--31. 1. "Testmat_95_64,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x10 "RTTSET36_46,Write the values separately provided by Renesas Electronics."
hexmask.long 0x10 0.--31. 1. "Testmat_127_96,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x14 "RTTSET37_46,Write the values separately provided by Renesas Electronics."
hexmask.long 0x14 0.--31. 1. "Testmat_159_128,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x18 "RTTSET38_46,Write the values separately provided by Renesas Electronics."
hexmask.long 0x18 0.--31. 1. "Testmat_191_160,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x1C "RTTSET39_46,Write the values separately provided by Renesas Electronics."
hexmask.long 0x1C 0.--31. 1. "Testmat_223_192,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x20 "RTTSET40_46,Write the values separately provided by Renesas Electronics."
hexmask.long 0x20 0.--31. 1. "Testmat_255_224,Test setting input. (Test target bridge selection of MBIST)"
line.long 0x24 "RTTSET41_46,Write the values separately provided by Renesas Electronics."
hexmask.long.word 0x24 18.--31. 1. "Reserved_18,Reserved"
hexmask.long.byte 0x24 10.--17. 1. "apbsel,Test setting input. (Test target APG selection of MBIST)"
newline
hexmask.long.byte 0x24 6.--9. 1. "mbsel,Test setting input. (Test domain selection of MBIST)"
hexmask.long.byte 0x24 0.--5. 1. "coreselect,Test setting input. (MBIST target CORE selection)"
line.long 0x28 "RTTSET42_46,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x28 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x28 16.--29. 1. "Y_address,Test setting input. (Y address of MBIST)"
newline
rbitfld.long 0x28 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x28 0.--13. 1. "X_address,Test setting input. (X address of MBIST)"
line.long 0x2C "RTTSET43_46,Write the values separately provided by Renesas Electronics."
rbitfld.long 0x2C 31. "Reserved_31,Reserved" "0,1"
hexmask.long.tbyte 0x2C 14.--30. 1. "XY,Test setting input. (XY of multiplication of MBIST)"
newline
hexmask.long.word 0x2C 0.--13. 1. "Z_address,Test setting input. (Z address of MBIST)"
line.long 0x30 "RTTSET44_46,Write the values separately provided by Renesas Electronics."
hexmask.long.byte 0x30 26.--31. 1. "Reserved_26,Reserved."
hexmask.long.word 0x30 16.--25. 1. "scanchain,Test setting input for hardware-SCAN. (Chain length)"
newline
hexmask.long.word 0x30 0.--15. 1. "scanpat,Test setting input for hardware-SCAN. (Pattern count)"
rgroup.long 0x400++0x3
line.long 0x0 "PSTRSTT46,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved."
bitfld.long 0x0 12. "R_rst_T,BIST Redundant result. (Safety function)" "0: pass,1: fail"
newline
bitfld.long 0x0 11. "Reserved_11,Reserved." "0,1"
bitfld.long 0x0 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x0 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x0 2.--3. "status_R,BIST Redundant status (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x0 0.--1. "status_T,BIST status." "0: unexec,1: wait,?,?"
rgroup.long 0x440++0x7
line.long 0x0 "PSTCNT46,FieldBIST internal WDT is made of a down counter."
hexmask.long 0x0 0.--31. 1. "Stop,FieldBIST internal WDT (high counter) stop value."
line.long 0x4 "RTTRSTT46,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "IL_flag3,Runtime Test Illegal suspension flag-3" "0,1"
newline
bitfld.long 0x4 29. "IL_flag2,Runtime Test Illegal suspension flag-2" "0,1"
bitfld.long 0x4 28. "IL_flag1,Runtime Test Illegal suspension flag-1" "0,1"
newline
bitfld.long 0x4 27. "CONDF,Debug monitor of FieldBIST condition." "0: not response,1: responded"
bitfld.long 0x4 24.--26. "BUS_cond,Debug code of BUS condition." "0,1,2,3,4,5,6,7"
newline
hexmask.long.word 0x4 13.--23. 1. "Reserved_13,Reserved."
bitfld.long 0x4 12. "R_rst_T,BIST Redundant result (Safety function)" "0: Pass,1: Fail"
newline
bitfld.long 0x4 11. "Achk,Debug code of address check." "0: normal,1: warning"
bitfld.long 0x4 8.--10. "error_T,BIST error." "0: Pass,1: Fail,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 4.--7. 1. "testnum_T,Number of tests."
bitfld.long 0x4 2.--3. "R_status_T,BIST redundant status. (Safety function)" "0: unexec,1: wait,?,?"
newline
bitfld.long 0x4 0.--1. "status_T,BIST status." "0: unexec,1: wait or,?,?"
rgroup.long 0x458++0x3
line.long 0x0 "RTTCNT46,"
hexmask.long 0x0 0.--31. 1. "Stop,WDT (high counter) stop value."
group.long 0x4A0++0x3
line.long 0x0 "SLFRVS46,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved."
hexmask.long.tbyte 0x0 0.--19. 1. "REVERS,Expected value reverse for Self-Check SISR"
rgroup.long 0x4A4++0x3
line.long 0x0 "SLFRST46,In case of the SLFR bits of the RTTEX register is 1B'1. SCNT bit returns to 1."
hexmask.long.byte 0x0 26.--31. 1. "SCNT,Self-Check counter"
bitfld.long 0x0 24.--25. "STS,Self-Check status" "0: unexec,1: exec,?,?"
newline
hexmask.long.tbyte 0x0 1.--23. 1. "Reserved_1,Reserved."
bitfld.long 0x0 0. "STR,Self -Check Result" "0: Pass,1: Fail"
group.long 0x4C0++0x3
line.long 0x0 "ERRSET46,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved."
bitfld.long 0x0 2. "DSB,Dummy set BUS-Error (set of fbc_rt_safetyerr)" "0,1"
newline
bitfld.long 0x0 1. "DST,Dummy set Time out (set of fbc_rt_overerr)" "0,1"
bitfld.long 0x0 0. "DSF,Dummy set Fail (set of fbc_rt_fail)" "0,1"
tree.end
tree "Functional_Safety_POST_RTT_46"
base ad:0xFF830000
rgroup.long 0x100++0xB
line.long 0x0 "RTTFINISH1,"
bitfld.long 0x0 31. "IMR0_IMR0,finish interrupt observation Video Codec Hierarchy (IMR0(IMR0))" "0,1"
hexmask.long.byte 0x0 27.--30. 1. "Reserved_27,Reserved.These bits are always read as 0. The write value should always be 0."
bitfld.long 0x0 26. "ISP0,finish interrupt observation Video IO Hierarchy (ISP0)" "0,1"
hexmask.long.word 0x0 15.--25. 1. "Reserved_15,Reserved.These bits are always read as 0. The write value should always be 0."
bitfld.long 0x0 14. "CA76SS0_Core3,finish interrupt observation Cortex-A76 CPU Core 3 Hierarchy (A1 domain)" "0,1"
bitfld.long 0x0 13. "CA76SS0_Core2,finish interrupt observation Cortex-A76 CPU Core 2 Hierarchy (A1 domain)" "0,1"
newline
bitfld.long 0x0 12. "CA76SS0_Core1,finish interrupt observation Cortex-A76 CPU Core 1 Hierarchy (A1 domain)" "0,1"
bitfld.long 0x0 11. "CA76SS0_Core0,finish interrupt observation Cortex-A76 CPU Core 0 Hierarchy (A1 domain)" "0,1"
bitfld.long 0x0 10. "Reserved_10,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x0 9. "CA76SS0_Cluster0,finish interrupt observation Cortex-A76 CPU Cluster 0 Hierarchy (A2 domain)" "0,1"
hexmask.long.word 0x0 0.--8. 1. "Reserved_0,Reserved.These bits are always read as 0. The write value should always be 0."
line.long 0x4 "RTTFINISH2,"
bitfld.long 0x4 31. "Reserved_31,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 30. "OCV3,finish interrupt observation Image Recognition Hierarchy (OCV core3)" "0,1"
bitfld.long 0x4 29. "OCV2,finish interrupt observation Image Recognition Hierarchy (OCV core2)" "0,1"
bitfld.long 0x4 28. "OCV1,finish interrupt observation Image Recognition Hierarchy (OCV core1)" "0,1"
bitfld.long 0x4 27. "OCV0,finish interrupt observation Image Recognition Hierarchy (OCV core0)" "0,1"
bitfld.long 0x4 26. "DP1,finish interrupt observation Image Recognition Hierarchy (IMP DMAC1  IMP PSC1)" "0,1"
newline
bitfld.long 0x4 25. "DP0,finish interrupt observation Image Recognition Hierarchy (IMP DMAC0  IMP PSC0)" "0,1"
bitfld.long 0x4 23.--24. "Reserved_23,Reserved.These bits are always read as 0. The write value should always be 0." "0,1,2,3"
bitfld.long 0x4 22. "IMP1,finish interrupt observation Image Recognition Hierarchy (IMP core1)" "0,1"
bitfld.long 0x4 21. "IMP0,finish interrupt observation Image Recognition Hierarchy (IMP core0)" "0,1"
hexmask.long.byte 0x4 16.--20. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0."
bitfld.long 0x4 15. "SMPO,finish interrupt observation Vision IP Hierarchy (SMPO)" "0,1"
newline
bitfld.long 0x4 12.--14. "Reserved_12,Reserved.These bits are always read as 0. The write value should always be 0." "0,1,2,3,4,5,6,7"
bitfld.long 0x4 11. "SMPS,finish interrupt observation Vision IP Hierarchy (SMPS)" "0,1"
bitfld.long 0x4 10. "Reserved_10,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 9. "UMFL,finish interrupt observation Vision IP Hierarchy (Optical Flow)" "0,1"
bitfld.long 0x4 8. "Reserved_8,Reserved.The bit is always read as 0. The write value should always be 0." "0,1"
bitfld.long 0x4 7. "PAP,finish interrupt observation Vision IP Hierarchy (DUL)" "0,1"
newline
bitfld.long 0x4 5.--6. "Reserved_5,Reserved.These bits are always read as 0. The write value should always be 0." "0,1,2,3"
bitfld.long 0x4 4. "IMR3_IMS1,finish interrupt observation Video Codec Hierarchy (IMR3(IMS1))" "0,1"
bitfld.long 0x4 3. "IMR2_IMS0,finish interrupt observation Video Codec Hierarchy (IMR2(IMS0))" "0,1"
bitfld.long 0x4 1.--2. "Reserved_1,Reserved.These bits are always read as 0. The write value should always be 0." "0,1,2,3"
bitfld.long 0x4 0. "IMR1_IMR1,finish interrupt observation Video Codec Hierarchy (IMR1(IMR1))" "0,1"
line.long 0x8 "RTTFINISH3,"
hexmask.long.word 0x8 21.--31. 1. "Reserved_21,Reserved.These bits are always read as 0. The write value should always be 0."
bitfld.long 0x8 20. "CNRAM,finish interrupt observation Image Recognition Hierarchy (CNRAM)" "0,1"
hexmask.long.byte 0x8 16.--19. 1. "Reserved_16,Reserved.These bits are always read as 0. The write value should always be 0."
bitfld.long 0x8 15. "DSP1,finish interrupt observation Image Recognition Hierarchy (DSP1)" "0,1"
bitfld.long 0x8 14. "DSP0,finish interrupt observation Image Recognition Hierarchy (DSP0)" "0,1"
hexmask.long.word 0x8 4.--13. 1. "Reserved_4,Reserved.These bits are always read as 0. The write value should always be 0."
newline
bitfld.long 0x8 3. "CNN,finish interrupt observation Image Recognition Hierarchy (IMP CNN)" "0,1"
bitfld.long 0x8 0.--2. "Reserved_0,Reserved.These bits are always read as 0. The write value should always be 0." "0,1,2,3,4,5,6,7"
tree.end
tree.end
tree "PWM"
base ad:0x0
tree "PWM_0"
base ad:0xE6E30000
group.long 0x0++0x7
line.long 0x0 "PWMCR0,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
hexmask.long.byte 0x0 16.--19. 1. "CC0,Clock Control"
newline
bitfld.long 0x0 15. "CCMD,CC0 Frequency Division Mode" "0: f MHz/2,1: f MHz/23"
rbitfld.long 0x0 12.--14. "Reserved_12,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "SYNC,Specifies whether to allow the set values in the PWM Count Register[n] (PWMCNT[n]) to be reflected in the timer operation synchronously with setting the PWM Control Register[n] (PWMCR[n])." "0: Allows the PWMCNT[n] set values to be reflected..,1: Allows the PWMCNT[n] set values to be reflected.."
hexmask.long.byte 0x0 7.--10. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 5.--6. "FS,Frequency Selection for Deglitcher function." "0: f MHz/333,1: f MHz/166,?,?"
bitfld.long 0x0 4. "SS0,Single Pulse Output" "0: The timer operates in continuous pulse output mode,1: The timer operates only for a single cycle and.."
newline
bitfld.long 0x0 3. "ECEN,Error Check Enable." "0: Disable deglitcher function,1: Enable deglitcher function"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "EN0,Channel Enable" "0: The channel is held in the idle state,1: The channel outputs high and low levels in a.."
line.long 0x4 "PWMCNT0,For the CYC0 and PH0 bits. set the number of cycles to be counted of the PWM clock signal whose frequency has been set by the CC0 and CCMD bits in the PWM control register."
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved"
hexmask.long.word 0x4 16.--25. 1. "CYC0,PWM Cycle"
newline
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
hexmask.long.word 0x4 0.--9. 1. "PH0,PWM High-Level Period"
group.long 0xC++0x3
line.long 0x0 "PWMEI0,PWMEI[n] is a 32-bit readable/writable register that controls Error Injection. This error injection is used in test of connection between PWM and ECM."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWMEI,PWM Error Injection" "0: Normal operation,1: PWM loopback function check detection error is.."
tree.end
tree "PWM_1"
base ad:0xE6E31000
group.long 0x0++0x7
line.long 0x0 "PWMCR1,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
hexmask.long.byte 0x0 16.--19. 1. "CC0,Clock Control"
newline
bitfld.long 0x0 15. "CCMD,CC0 Frequency Division Mode" "0: f MHz/2,1: f MHz/23"
rbitfld.long 0x0 12.--14. "Reserved_12,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "SYNC,Specifies whether to allow the set values in the PWM Count Register[n] (PWMCNT[n]) to be reflected in the timer operation synchronously with setting the PWM Control Register[n] (PWMCR[n])." "0: Allows the PWMCNT[n] set values to be reflected..,1: Allows the PWMCNT[n] set values to be reflected.."
hexmask.long.byte 0x0 7.--10. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 5.--6. "FS,Frequency Selection for Deglitcher function." "0: f MHz/333,1: f MHz/166,?,?"
bitfld.long 0x0 4. "SS0,Single Pulse Output" "0: The timer operates in continuous pulse output mode,1: The timer operates only for a single cycle and.."
newline
bitfld.long 0x0 3. "ECEN,Error Check Enable." "0: Disable deglitcher function,1: Enable deglitcher function"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "EN0,Channel Enable" "0: The channel is held in the idle state,1: The channel outputs high and low levels in a.."
line.long 0x4 "PWMCNT1,For the CYC0 and PH0 bits. set the number of cycles to be counted of the PWM clock signal whose frequency has been set by the CC0 and CCMD bits in the PWM control register."
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved"
hexmask.long.word 0x4 16.--25. 1. "CYC0,PWM Cycle"
newline
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
hexmask.long.word 0x4 0.--9. 1. "PH0,PWM High-Level Period"
group.long 0xC++0x3
line.long 0x0 "PWMEI1,PWMEI[n] is a 32-bit readable/writable register that controls Error Injection. This error injection is used in test of connection between PWM and ECM."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWMEI,PWM Error Injection" "0: Normal operation,1: PWM loopback function check detection error is.."
tree.end
tree "PWM_2"
base ad:0xE6E32000
group.long 0x0++0x7
line.long 0x0 "PWMCR2,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
hexmask.long.byte 0x0 16.--19. 1. "CC0,Clock Control"
newline
bitfld.long 0x0 15. "CCMD,CC0 Frequency Division Mode" "0: f MHz/2,1: f MHz/23"
rbitfld.long 0x0 12.--14. "Reserved_12,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "SYNC,Specifies whether to allow the set values in the PWM Count Register[n] (PWMCNT[n]) to be reflected in the timer operation synchronously with setting the PWM Control Register[n] (PWMCR[n])." "0: Allows the PWMCNT[n] set values to be reflected..,1: Allows the PWMCNT[n] set values to be reflected.."
hexmask.long.byte 0x0 7.--10. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 5.--6. "FS,Frequency Selection for Deglitcher function." "0: f MHz/333,1: f MHz/166,?,?"
bitfld.long 0x0 4. "SS0,Single Pulse Output" "0: The timer operates in continuous pulse output mode,1: The timer operates only for a single cycle and.."
newline
bitfld.long 0x0 3. "ECEN,Error Check Enable." "0: Disable deglitcher function,1: Enable deglitcher function"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "EN0,Channel Enable" "0: The channel is held in the idle state,1: The channel outputs high and low levels in a.."
line.long 0x4 "PWMCNT2,For the CYC0 and PH0 bits. set the number of cycles to be counted of the PWM clock signal whose frequency has been set by the CC0 and CCMD bits in the PWM control register."
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved"
hexmask.long.word 0x4 16.--25. 1. "CYC0,PWM Cycle"
newline
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
hexmask.long.word 0x4 0.--9. 1. "PH0,PWM High-Level Period"
group.long 0xC++0x3
line.long 0x0 "PWMEI2,PWMEI[n] is a 32-bit readable/writable register that controls Error Injection. This error injection is used in test of connection between PWM and ECM."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWMEI,PWM Error Injection" "0: Normal operation,1: PWM loopback function check detection error is.."
tree.end
tree "PWM_3"
base ad:0xE6E33000
group.long 0x0++0x7
line.long 0x0 "PWMCR3,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
hexmask.long.byte 0x0 16.--19. 1. "CC0,Clock Control"
newline
bitfld.long 0x0 15. "CCMD,CC0 Frequency Division Mode" "0: f MHz/2,1: f MHz/23"
rbitfld.long 0x0 12.--14. "Reserved_12,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "SYNC,Specifies whether to allow the set values in the PWM Count Register[n] (PWMCNT[n]) to be reflected in the timer operation synchronously with setting the PWM Control Register[n] (PWMCR[n])." "0: Allows the PWMCNT[n] set values to be reflected..,1: Allows the PWMCNT[n] set values to be reflected.."
hexmask.long.byte 0x0 7.--10. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 5.--6. "FS,Frequency Selection for Deglitcher function." "0: f MHz/333,1: f MHz/166,?,?"
bitfld.long 0x0 4. "SS0,Single Pulse Output" "0: The timer operates in continuous pulse output mode,1: The timer operates only for a single cycle and.."
newline
bitfld.long 0x0 3. "ECEN,Error Check Enable." "0: Disable deglitcher function,1: Enable deglitcher function"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "EN0,Channel Enable" "0: The channel is held in the idle state,1: The channel outputs high and low levels in a.."
line.long 0x4 "PWMCNT3,For the CYC0 and PH0 bits. set the number of cycles to be counted of the PWM clock signal whose frequency has been set by the CC0 and CCMD bits in the PWM control register."
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved"
hexmask.long.word 0x4 16.--25. 1. "CYC0,PWM Cycle"
newline
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
hexmask.long.word 0x4 0.--9. 1. "PH0,PWM High-Level Period"
group.long 0xC++0x3
line.long 0x0 "PWMEI3,PWMEI[n] is a 32-bit readable/writable register that controls Error Injection. This error injection is used in test of connection between PWM and ECM."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWMEI,PWM Error Injection" "0: Normal operation,1: PWM loopback function check detection error is.."
tree.end
tree "PWM_4"
base ad:0xE6E34000
group.long 0x0++0x7
line.long 0x0 "PWMCR4,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
hexmask.long.byte 0x0 16.--19. 1. "CC0,Clock Control"
newline
bitfld.long 0x0 15. "CCMD,CC0 Frequency Division Mode" "0: f MHz/2,1: f MHz/23"
rbitfld.long 0x0 12.--14. "Reserved_12,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "SYNC,Specifies whether to allow the set values in the PWM Count Register[n] (PWMCNT[n]) to be reflected in the timer operation synchronously with setting the PWM Control Register[n] (PWMCR[n])." "0: Allows the PWMCNT[n] set values to be reflected..,1: Allows the PWMCNT[n] set values to be reflected.."
hexmask.long.byte 0x0 7.--10. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 5.--6. "FS,Frequency Selection for Deglitcher function." "0: f MHz/333,1: f MHz/166,?,?"
bitfld.long 0x0 4. "SS0,Single Pulse Output" "0: The timer operates in continuous pulse output mode,1: The timer operates only for a single cycle and.."
newline
bitfld.long 0x0 3. "ECEN,Error Check Enable." "0: Disable deglitcher function,1: Enable deglitcher function"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "EN0,Channel Enable" "0: The channel is held in the idle state,1: The channel outputs high and low levels in a.."
line.long 0x4 "PWMCNT4,For the CYC0 and PH0 bits. set the number of cycles to be counted of the PWM clock signal whose frequency has been set by the CC0 and CCMD bits in the PWM control register."
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved"
hexmask.long.word 0x4 16.--25. 1. "CYC0,PWM Cycle"
newline
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
hexmask.long.word 0x4 0.--9. 1. "PH0,PWM High-Level Period"
group.long 0xC++0x3
line.long 0x0 "PWMEI4,PWMEI[n] is a 32-bit readable/writable register that controls Error Injection. This error injection is used in test of connection between PWM and ECM."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWMEI,PWM Error Injection" "0: Normal operation,1: PWM loopback function check detection error is.."
tree.end
tree.end
tree "RC (Realtime Core)"
base ad:0xF0200000
group.long 0x0++0x3
line.long 0x0 "WBCTLR,WBCTLR is the register to enable the write buffer function."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "EN,Write Buffer Enable" "0: disable write buffer,1: enable write buffer"
group.long 0x200++0x3
line.long 0x0 "WBIMSKR,WBIMSKR is the register to enable interrupt when bus error is detected."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "DECERR,DECERR interrupt mask" "0: enable interrupt,1: disable interrupt"
newline
bitfld.long 0x0 0. "SLVERR,SLVERR interrupt mask" "0: enable interrupt,1: disable interrupt"
rgroup.long 0x204++0x7
line.long 0x0 "WBIMSKSTSR,WBIMSKSTSR is the register to hold the error status after being masked by WBIMSKR."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "DECERRSTS,DECERR interrupt status" "0: interrupt is not asserted or is being masked,1: interrupt is asserted"
newline
bitfld.long 0x0 0. "SLVERRSTS,SLVERR interrupt status" "0: interrupt is not asserted or is being masked,1: interrupt is asserted"
line.long 0x4 "WBERRSTSR,WBERRSTSR is the register to hold the error status before being masked by WBIMSKR."
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x4 1. "DECERRSTS,DECERR status" "0: no DECERR happened,1: DECERR happened"
newline
bitfld.long 0x4 0. "SLVERRSTS,SLVERR status" "0: no SLVERR happened,1: SLVERR happened"
group.long 0x20C++0x3
line.long 0x0 "WBICLRR,WBICLRR is the register to clear error status."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
eventfld.long 0x0 1. "DECERR,Clear DECERR interrupt status" "0,1"
newline
eventfld.long 0x0 0. "SLVERR,Clear SLVERR interrupt status" "0,1"
rgroup.long 0x210++0x7
line.long 0x0 "WBSERRADDR,WBSERRADDR is the register to hold the address at which SLVERR is detected. The value of this register is valid only when SLVERRSTS bit in WBERRSTSR register is set to 1."
hexmask.long 0x0 7.--31. 1. "Slave_Error_Address,Error address"
hexmask.long.byte 0x0 0.--6. 1. "Reserved_0,Reserved"
line.long 0x4 "WBDERRADDR,WBDERRADDR is the register to hold the address at which DECERR is detected. The value of this register is valid only when DECERRSTS bit in WBERRSTSR register is set to 1."
hexmask.long 0x4 7.--31. 1. "Decode_Error_Address,Error address"
hexmask.long.byte 0x4 0.--6. 1. "Reserved_0,Reserved"
group.long 0x730++0x3
line.long 0x0 "WBSYNCR,WBSYNCR is the register to execute memory barrier operation accompanied with the data eviction from write buffer. This register is automatically cleared by hardware when all the responses from the target module are returned."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "SYNC,Enable memory barrier" "0,1"
group.long 0xF80++0x3
line.long 0x0 "WBPWRCTLR,WBPWRCTLR is the register to control the dynamic module stop function"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "DMSEN,Enable dynamic module stop." "0: disable,1: enable"
tree.end
tree "RFSO (Failure Self-Detection Output)"
base ad:0x0
tree "RFSO_0"
base ad:0xFFE80000
group.long 0x0++0x13
line.long 0x0 "CNT0_CYC0,CNT0_CYC[m] sets the periodical cycle value to the interval timer."
hexmask.long 0x0 0.--31. 1. "CNT0_CYC,Specify the periodical cycle value to the interval timer."
line.long 0x4 "CNT1_CYC0,CNT1_CYC[m] sets the periodical cycle value to the time-out detection timer."
hexmask.long 0x4 0.--31. 1. "CNT1_CYC,Specify the periodical cycle value to the time-out detection timer."
line.long 0x8 "FSO_CTL0,FSO_CTL[m] is a control register of this module."
hexmask.long.word 0x8 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.byte 0x8 10.--15. 1. "Reserved_10,Reserved."
rbitfld.long 0x8 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x8 8. "ITE,Enables or disables an interval timer (CNT0) interrupt request." "0: Disables the interrupt,1: Enables the interrupt"
rbitfld.long 0x8 7. "TOCUNF,Indicates whether a time-out detection timer (CNT1) has stopped when the value of a time-out detection timer (CNT1) is below the lower limit (CNT1_UNS[m])" "0: A time-out detection timer,1: A time-out detection timer"
rbitfld.long 0x8 6. "TOI,Indicates whether a time-out detection timer (CNT1) has stopped under the condition that the value of a time-out detection timer (CNT1) is equal to the upper limit (CNT1_CYC[m]) or whether a time-out detection timer (CNT1) has stopped under the.." "0: There is no interrupt,1: There is an interrupt"
newline
rbitfld.long 0x8 5. "ITI,Indicates whether there is an interval timer (CNT0) interrupt request." "0: There is no interrupt,1: There is an interrupt"
rbitfld.long 0x8 4. "TOES,Indicates that time-out error status is appropriately output to the ECM module." "0,1"
rbitfld.long 0x8 3. "CFES_1,Indicates that the CFEO_1 bit status is appropriately output to the ECM module." "0,1"
newline
bitfld.long 0x8 2. "CFEO_1,Sets the expected value verification result during test routine when the CFEO_0 bit is 1." "0,1"
bitfld.long 0x8 1. "CFEO_0,Sets the expected value verification result during test routine." "0,1"
rbitfld.long 0x8 0. "CFES_0,Indicates that the CFEO_0 bit status is appropriately output to the ECM module." "0,1"
line.long 0xC "CNT_DIV0,CNT_DIV[m] sets the interval timer/time-out detection timer counter clock frequency divisor."
hexmask.long 0xC 0.--31. 1. "CNT_DIV,Set the timer counter clock frequency divisor."
line.long 0x10 "FSO_CMD0,FSO_CMD[m] activates this module and clears the interrupts."
hexmask.long.word 0x10 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.word 0x10 4.--15. 1. "Reserved_4,Reserved."
bitfld.long 0x10 3. "TOC,Clears a time-out detection timer (CNT1) interrupt." "0,1"
newline
bitfld.long 0x10 2. "ITC,Clears an interval timer (CNT0) interrupt." "0,1"
bitfld.long 0x10 1. "CNTS1,Activates or stops the time-out detection timer (CNT1)." "0,1"
bitfld.long 0x10 0. "CNTS0,Activates or stops the interval timer (CNT0)." "0,1"
rgroup.long 0x14++0x7
line.long 0x0 "CNT0_STS0,CNT0_STS[m] indicates the interval timer value."
hexmask.long 0x0 0.--31. 1. "CNT0_STS,Indicates the interval timer value."
line.long 0x4 "CNT1_STS0,CNT1_STS[m] indicates the time-out detection timer value."
hexmask.long 0x4 0.--31. 1. "CNT1_STS,Indicates the time-out detection timer value."
group.long 0x1C++0x3
line.long 0x0 "CNT1_UNS0,Set time-out detection timer operation minimum cycle register."
hexmask.long 0x0 0.--31. 1. "CNT1_UNS,Set minimum cycle value to stop Time-out detection timer."
tree.end
tree "RFSO_1"
base ad:0xFFE81000
group.long 0x0++0x13
line.long 0x0 "CNT0_CYC1,CNT0_CYC[m] sets the periodical cycle value to the interval timer."
hexmask.long 0x0 0.--31. 1. "CNT0_CYC,Specify the periodical cycle value to the interval timer."
line.long 0x4 "CNT1_CYC1,CNT1_CYC[m] sets the periodical cycle value to the time-out detection timer."
hexmask.long 0x4 0.--31. 1. "CNT1_CYC,Specify the periodical cycle value to the time-out detection timer."
line.long 0x8 "FSO_CTL1,FSO_CTL[m] is a control register of this module."
hexmask.long.word 0x8 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.byte 0x8 10.--15. 1. "Reserved_10,Reserved."
rbitfld.long 0x8 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x8 8. "ITE,Enables or disables an interval timer (CNT0) interrupt request." "0: Disables the interrupt,1: Enables the interrupt"
rbitfld.long 0x8 7. "TOCUNF,Indicates whether a time-out detection timer (CNT1) has stopped when the value of a time-out detection timer (CNT1) is below the lower limit (CNT1_UNS[m])" "0: A time-out detection timer,1: A time-out detection timer"
rbitfld.long 0x8 6. "TOI,Indicates whether a time-out detection timer (CNT1) has stopped under the condition that the value of a time-out detection timer (CNT1) is equal to the upper limit (CNT1_CYC[m]) or whether a time-out detection timer (CNT1) has stopped under the.." "0: There is no interrupt,1: There is an interrupt"
newline
rbitfld.long 0x8 5. "ITI,Indicates whether there is an interval timer (CNT0) interrupt request." "0: There is no interrupt,1: There is an interrupt"
rbitfld.long 0x8 4. "TOES,Indicates that time-out error status is appropriately output to the ECM module." "0,1"
rbitfld.long 0x8 3. "CFES_1,Indicates that the CFEO_1 bit status is appropriately output to the ECM module." "0,1"
newline
bitfld.long 0x8 2. "CFEO_1,Sets the expected value verification result during test routine when the CFEO_0 bit is 1." "0,1"
bitfld.long 0x8 1. "CFEO_0,Sets the expected value verification result during test routine." "0,1"
rbitfld.long 0x8 0. "CFES_0,Indicates that the CFEO_0 bit status is appropriately output to the ECM module." "0,1"
line.long 0xC "CNT_DIV1,CNT_DIV[m] sets the interval timer/time-out detection timer counter clock frequency divisor."
hexmask.long 0xC 0.--31. 1. "CNT_DIV,Set the timer counter clock frequency divisor."
line.long 0x10 "FSO_CMD1,FSO_CMD[m] activates this module and clears the interrupts."
hexmask.long.word 0x10 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.word 0x10 4.--15. 1. "Reserved_4,Reserved."
bitfld.long 0x10 3. "TOC,Clears a time-out detection timer (CNT1) interrupt." "0,1"
newline
bitfld.long 0x10 2. "ITC,Clears an interval timer (CNT0) interrupt." "0,1"
bitfld.long 0x10 1. "CNTS1,Activates or stops the time-out detection timer (CNT1)." "0,1"
bitfld.long 0x10 0. "CNTS0,Activates or stops the interval timer (CNT0)." "0,1"
rgroup.long 0x14++0x7
line.long 0x0 "CNT0_STS1,CNT0_STS[m] indicates the interval timer value."
hexmask.long 0x0 0.--31. 1. "CNT0_STS,Indicates the interval timer value."
line.long 0x4 "CNT1_STS1,CNT1_STS[m] indicates the time-out detection timer value."
hexmask.long 0x4 0.--31. 1. "CNT1_STS,Indicates the time-out detection timer value."
group.long 0x1C++0x3
line.long 0x0 "CNT1_UNS1,Set time-out detection timer operation minimum cycle register."
hexmask.long 0x0 0.--31. 1. "CNT1_UNS,Set minimum cycle value to stop Time-out detection timer."
tree.end
tree "RFSO_2"
base ad:0xFFE82000
group.long 0x0++0x13
line.long 0x0 "CNT0_CYC2,CNT0_CYC[m] sets the periodical cycle value to the interval timer."
hexmask.long 0x0 0.--31. 1. "CNT0_CYC,Specify the periodical cycle value to the interval timer."
line.long 0x4 "CNT1_CYC2,CNT1_CYC[m] sets the periodical cycle value to the time-out detection timer."
hexmask.long 0x4 0.--31. 1. "CNT1_CYC,Specify the periodical cycle value to the time-out detection timer."
line.long 0x8 "FSO_CTL2,FSO_CTL[m] is a control register of this module."
hexmask.long.word 0x8 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.byte 0x8 10.--15. 1. "Reserved_10,Reserved."
rbitfld.long 0x8 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x8 8. "ITE,Enables or disables an interval timer (CNT0) interrupt request." "0: Disables the interrupt,1: Enables the interrupt"
rbitfld.long 0x8 7. "TOCUNF,Indicates whether a time-out detection timer (CNT1) has stopped when the value of a time-out detection timer (CNT1) is below the lower limit (CNT1_UNS[m])" "0: A time-out detection timer,1: A time-out detection timer"
rbitfld.long 0x8 6. "TOI,Indicates whether a time-out detection timer (CNT1) has stopped under the condition that the value of a time-out detection timer (CNT1) is equal to the upper limit (CNT1_CYC[m]) or whether a time-out detection timer (CNT1) has stopped under the.." "0: There is no interrupt,1: There is an interrupt"
newline
rbitfld.long 0x8 5. "ITI,Indicates whether there is an interval timer (CNT0) interrupt request." "0: There is no interrupt,1: There is an interrupt"
rbitfld.long 0x8 4. "TOES,Indicates that time-out error status is appropriately output to the ECM module." "0,1"
rbitfld.long 0x8 3. "CFES_1,Indicates that the CFEO_1 bit status is appropriately output to the ECM module." "0,1"
newline
bitfld.long 0x8 2. "CFEO_1,Sets the expected value verification result during test routine when the CFEO_0 bit is 1." "0,1"
bitfld.long 0x8 1. "CFEO_0,Sets the expected value verification result during test routine." "0,1"
rbitfld.long 0x8 0. "CFES_0,Indicates that the CFEO_0 bit status is appropriately output to the ECM module." "0,1"
line.long 0xC "CNT_DIV2,CNT_DIV[m] sets the interval timer/time-out detection timer counter clock frequency divisor."
hexmask.long 0xC 0.--31. 1. "CNT_DIV,Set the timer counter clock frequency divisor."
line.long 0x10 "FSO_CMD2,FSO_CMD[m] activates this module and clears the interrupts."
hexmask.long.word 0x10 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.word 0x10 4.--15. 1. "Reserved_4,Reserved."
bitfld.long 0x10 3. "TOC,Clears a time-out detection timer (CNT1) interrupt." "0,1"
newline
bitfld.long 0x10 2. "ITC,Clears an interval timer (CNT0) interrupt." "0,1"
bitfld.long 0x10 1. "CNTS1,Activates or stops the time-out detection timer (CNT1)." "0,1"
bitfld.long 0x10 0. "CNTS0,Activates or stops the interval timer (CNT0)." "0,1"
rgroup.long 0x14++0x7
line.long 0x0 "CNT0_STS2,CNT0_STS[m] indicates the interval timer value."
hexmask.long 0x0 0.--31. 1. "CNT0_STS,Indicates the interval timer value."
line.long 0x4 "CNT1_STS2,CNT1_STS[m] indicates the time-out detection timer value."
hexmask.long 0x4 0.--31. 1. "CNT1_STS,Indicates the time-out detection timer value."
group.long 0x1C++0x3
line.long 0x0 "CNT1_UNS2,Set time-out detection timer operation minimum cycle register."
hexmask.long 0x0 0.--31. 1. "CNT1_UNS,Set minimum cycle value to stop Time-out detection timer."
tree.end
tree "RFSO_3"
base ad:0xFFE83000
group.long 0x0++0x13
line.long 0x0 "CNT0_CYC3,CNT0_CYC[m] sets the periodical cycle value to the interval timer."
hexmask.long 0x0 0.--31. 1. "CNT0_CYC,Specify the periodical cycle value to the interval timer."
line.long 0x4 "CNT1_CYC3,CNT1_CYC[m] sets the periodical cycle value to the time-out detection timer."
hexmask.long 0x4 0.--31. 1. "CNT1_CYC,Specify the periodical cycle value to the time-out detection timer."
line.long 0x8 "FSO_CTL3,FSO_CTL[m] is a control register of this module."
hexmask.long.word 0x8 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.byte 0x8 10.--15. 1. "Reserved_10,Reserved."
rbitfld.long 0x8 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x8 8. "ITE,Enables or disables an interval timer (CNT0) interrupt request." "0: Disables the interrupt,1: Enables the interrupt"
rbitfld.long 0x8 7. "TOCUNF,Indicates whether a time-out detection timer (CNT1) has stopped when the value of a time-out detection timer (CNT1) is below the lower limit (CNT1_UNS[m])" "0: A time-out detection timer,1: A time-out detection timer"
rbitfld.long 0x8 6. "TOI,Indicates whether a time-out detection timer (CNT1) has stopped under the condition that the value of a time-out detection timer (CNT1) is equal to the upper limit (CNT1_CYC[m]) or whether a time-out detection timer (CNT1) has stopped under the.." "0: There is no interrupt,1: There is an interrupt"
newline
rbitfld.long 0x8 5. "ITI,Indicates whether there is an interval timer (CNT0) interrupt request." "0: There is no interrupt,1: There is an interrupt"
rbitfld.long 0x8 4. "TOES,Indicates that time-out error status is appropriately output to the ECM module." "0,1"
rbitfld.long 0x8 3. "CFES_1,Indicates that the CFEO_1 bit status is appropriately output to the ECM module." "0,1"
newline
bitfld.long 0x8 2. "CFEO_1,Sets the expected value verification result during test routine when the CFEO_0 bit is 1." "0,1"
bitfld.long 0x8 1. "CFEO_0,Sets the expected value verification result during test routine." "0,1"
rbitfld.long 0x8 0. "CFES_0,Indicates that the CFEO_0 bit status is appropriately output to the ECM module." "0,1"
line.long 0xC "CNT_DIV3,CNT_DIV[m] sets the interval timer/time-out detection timer counter clock frequency divisor."
hexmask.long 0xC 0.--31. 1. "CNT_DIV,Set the timer counter clock frequency divisor."
line.long 0x10 "FSO_CMD3,FSO_CMD[m] activates this module and clears the interrupts."
hexmask.long.word 0x10 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.word 0x10 4.--15. 1. "Reserved_4,Reserved."
bitfld.long 0x10 3. "TOC,Clears a time-out detection timer (CNT1) interrupt." "0,1"
newline
bitfld.long 0x10 2. "ITC,Clears an interval timer (CNT0) interrupt." "0,1"
bitfld.long 0x10 1. "CNTS1,Activates or stops the time-out detection timer (CNT1)." "0,1"
bitfld.long 0x10 0. "CNTS0,Activates or stops the interval timer (CNT0)." "0,1"
rgroup.long 0x14++0x7
line.long 0x0 "CNT0_STS3,CNT0_STS[m] indicates the interval timer value."
hexmask.long 0x0 0.--31. 1. "CNT0_STS,Indicates the interval timer value."
line.long 0x4 "CNT1_STS3,CNT1_STS[m] indicates the time-out detection timer value."
hexmask.long 0x4 0.--31. 1. "CNT1_STS,Indicates the time-out detection timer value."
group.long 0x1C++0x3
line.long 0x0 "CNT1_UNS3,Set time-out detection timer operation minimum cycle register."
hexmask.long 0x0 0.--31. 1. "CNT1_UNS,Set minimum cycle value to stop Time-out detection timer."
tree.end
tree "RFSO_4"
base ad:0xFFE84000
group.long 0x0++0x13
line.long 0x0 "CNT0_CYC4,CNT0_CYC[m] sets the periodical cycle value to the interval timer."
hexmask.long 0x0 0.--31. 1. "CNT0_CYC,Specify the periodical cycle value to the interval timer."
line.long 0x4 "CNT1_CYC4,CNT1_CYC[m] sets the periodical cycle value to the time-out detection timer."
hexmask.long 0x4 0.--31. 1. "CNT1_CYC,Specify the periodical cycle value to the time-out detection timer."
line.long 0x8 "FSO_CTL4,FSO_CTL[m] is a control register of this module."
hexmask.long.word 0x8 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.byte 0x8 10.--15. 1. "Reserved_10,Reserved."
rbitfld.long 0x8 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x8 8. "ITE,Enables or disables an interval timer (CNT0) interrupt request." "0: Disables the interrupt,1: Enables the interrupt"
rbitfld.long 0x8 7. "TOCUNF,Indicates whether a time-out detection timer (CNT1) has stopped when the value of a time-out detection timer (CNT1) is below the lower limit (CNT1_UNS[m])" "0: A time-out detection timer,1: A time-out detection timer"
rbitfld.long 0x8 6. "TOI,Indicates whether a time-out detection timer (CNT1) has stopped under the condition that the value of a time-out detection timer (CNT1) is equal to the upper limit (CNT1_CYC[m]) or whether a time-out detection timer (CNT1) has stopped under the.." "0: There is no interrupt,1: There is an interrupt"
newline
rbitfld.long 0x8 5. "ITI,Indicates whether there is an interval timer (CNT0) interrupt request." "0: There is no interrupt,1: There is an interrupt"
rbitfld.long 0x8 4. "TOES,Indicates that time-out error status is appropriately output to the ECM module." "0,1"
rbitfld.long 0x8 3. "CFES_1,Indicates that the CFEO_1 bit status is appropriately output to the ECM module." "0,1"
newline
bitfld.long 0x8 2. "CFEO_1,Sets the expected value verification result during test routine when the CFEO_0 bit is 1." "0,1"
bitfld.long 0x8 1. "CFEO_0,Sets the expected value verification result during test routine." "0,1"
rbitfld.long 0x8 0. "CFES_0,Indicates that the CFEO_0 bit status is appropriately output to the ECM module." "0,1"
line.long 0xC "CNT_DIV4,CNT_DIV[m] sets the interval timer/time-out detection timer counter clock frequency divisor."
hexmask.long 0xC 0.--31. 1. "CNT_DIV,Set the timer counter clock frequency divisor."
line.long 0x10 "FSO_CMD4,FSO_CMD[m] activates this module and clears the interrupts."
hexmask.long.word 0x10 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.word 0x10 4.--15. 1. "Reserved_4,Reserved."
bitfld.long 0x10 3. "TOC,Clears a time-out detection timer (CNT1) interrupt." "0,1"
newline
bitfld.long 0x10 2. "ITC,Clears an interval timer (CNT0) interrupt." "0,1"
bitfld.long 0x10 1. "CNTS1,Activates or stops the time-out detection timer (CNT1)." "0,1"
bitfld.long 0x10 0. "CNTS0,Activates or stops the interval timer (CNT0)." "0,1"
rgroup.long 0x14++0x7
line.long 0x0 "CNT0_STS4,CNT0_STS[m] indicates the interval timer value."
hexmask.long 0x0 0.--31. 1. "CNT0_STS,Indicates the interval timer value."
line.long 0x4 "CNT1_STS4,CNT1_STS[m] indicates the time-out detection timer value."
hexmask.long 0x4 0.--31. 1. "CNT1_STS,Indicates the time-out detection timer value."
group.long 0x1C++0x3
line.long 0x0 "CNT1_UNS4,Set time-out detection timer operation minimum cycle register."
hexmask.long 0x0 0.--31. 1. "CNT1_UNS,Set minimum cycle value to stop Time-out detection timer."
tree.end
tree "RFSO_5"
base ad:0xFFE85000
group.long 0x0++0x13
line.long 0x0 "CNT0_CYC5,CNT0_CYC[m] sets the periodical cycle value to the interval timer."
hexmask.long 0x0 0.--31. 1. "CNT0_CYC,Specify the periodical cycle value to the interval timer."
line.long 0x4 "CNT1_CYC5,CNT1_CYC[m] sets the periodical cycle value to the time-out detection timer."
hexmask.long 0x4 0.--31. 1. "CNT1_CYC,Specify the periodical cycle value to the time-out detection timer."
line.long 0x8 "FSO_CTL5,FSO_CTL[m] is a control register of this module."
hexmask.long.word 0x8 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.byte 0x8 10.--15. 1. "Reserved_10,Reserved."
rbitfld.long 0x8 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x8 8. "ITE,Enables or disables an interval timer (CNT0) interrupt request." "0: Disables the interrupt,1: Enables the interrupt"
rbitfld.long 0x8 7. "TOCUNF,Indicates whether a time-out detection timer (CNT1) has stopped when the value of a time-out detection timer (CNT1) is below the lower limit (CNT1_UNS[m])" "0: A time-out detection timer,1: A time-out detection timer"
rbitfld.long 0x8 6. "TOI,Indicates whether a time-out detection timer (CNT1) has stopped under the condition that the value of a time-out detection timer (CNT1) is equal to the upper limit (CNT1_CYC[m]) or whether a time-out detection timer (CNT1) has stopped under the.." "0: There is no interrupt,1: There is an interrupt"
newline
rbitfld.long 0x8 5. "ITI,Indicates whether there is an interval timer (CNT0) interrupt request." "0: There is no interrupt,1: There is an interrupt"
rbitfld.long 0x8 4. "TOES,Indicates that time-out error status is appropriately output to the ECM module." "0,1"
rbitfld.long 0x8 3. "CFES_1,Indicates that the CFEO_1 bit status is appropriately output to the ECM module." "0,1"
newline
bitfld.long 0x8 2. "CFEO_1,Sets the expected value verification result during test routine when the CFEO_0 bit is 1." "0,1"
bitfld.long 0x8 1. "CFEO_0,Sets the expected value verification result during test routine." "0,1"
rbitfld.long 0x8 0. "CFES_0,Indicates that the CFEO_0 bit status is appropriately output to the ECM module." "0,1"
line.long 0xC "CNT_DIV5,CNT_DIV[m] sets the interval timer/time-out detection timer counter clock frequency divisor."
hexmask.long 0xC 0.--31. 1. "CNT_DIV,Set the timer counter clock frequency divisor."
line.long 0x10 "FSO_CMD5,FSO_CMD[m] activates this module and clears the interrupts."
hexmask.long.word 0x10 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.word 0x10 4.--15. 1. "Reserved_4,Reserved."
bitfld.long 0x10 3. "TOC,Clears a time-out detection timer (CNT1) interrupt." "0,1"
newline
bitfld.long 0x10 2. "ITC,Clears an interval timer (CNT0) interrupt." "0,1"
bitfld.long 0x10 1. "CNTS1,Activates or stops the time-out detection timer (CNT1)." "0,1"
bitfld.long 0x10 0. "CNTS0,Activates or stops the interval timer (CNT0)." "0,1"
rgroup.long 0x14++0x7
line.long 0x0 "CNT0_STS5,CNT0_STS[m] indicates the interval timer value."
hexmask.long 0x0 0.--31. 1. "CNT0_STS,Indicates the interval timer value."
line.long 0x4 "CNT1_STS5,CNT1_STS[m] indicates the time-out detection timer value."
hexmask.long 0x4 0.--31. 1. "CNT1_STS,Indicates the time-out detection timer value."
group.long 0x1C++0x3
line.long 0x0 "CNT1_UNS5,Set time-out detection timer operation minimum cycle register."
hexmask.long 0x0 0.--31. 1. "CNT1_UNS,Set minimum cycle value to stop Time-out detection timer."
tree.end
tree "RFSO_6"
base ad:0xFFE86000
group.long 0x0++0x13
line.long 0x0 "CNT0_CYC6,CNT0_CYC[m] sets the periodical cycle value to the interval timer."
hexmask.long 0x0 0.--31. 1. "CNT0_CYC,Specify the periodical cycle value to the interval timer."
line.long 0x4 "CNT1_CYC6,CNT1_CYC[m] sets the periodical cycle value to the time-out detection timer."
hexmask.long 0x4 0.--31. 1. "CNT1_CYC,Specify the periodical cycle value to the time-out detection timer."
line.long 0x8 "FSO_CTL6,FSO_CTL[m] is a control register of this module."
hexmask.long.word 0x8 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.byte 0x8 10.--15. 1. "Reserved_10,Reserved."
rbitfld.long 0x8 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x8 8. "ITE,Enables or disables an interval timer (CNT0) interrupt request." "0: Disables the interrupt,1: Enables the interrupt"
rbitfld.long 0x8 7. "TOCUNF,Indicates whether a time-out detection timer (CNT1) has stopped when the value of a time-out detection timer (CNT1) is below the lower limit (CNT1_UNS[m])" "0: A time-out detection timer,1: A time-out detection timer"
rbitfld.long 0x8 6. "TOI,Indicates whether a time-out detection timer (CNT1) has stopped under the condition that the value of a time-out detection timer (CNT1) is equal to the upper limit (CNT1_CYC[m]) or whether a time-out detection timer (CNT1) has stopped under the.." "0: There is no interrupt,1: There is an interrupt"
newline
rbitfld.long 0x8 5. "ITI,Indicates whether there is an interval timer (CNT0) interrupt request." "0: There is no interrupt,1: There is an interrupt"
rbitfld.long 0x8 4. "TOES,Indicates that time-out error status is appropriately output to the ECM module." "0,1"
rbitfld.long 0x8 3. "CFES_1,Indicates that the CFEO_1 bit status is appropriately output to the ECM module." "0,1"
newline
bitfld.long 0x8 2. "CFEO_1,Sets the expected value verification result during test routine when the CFEO_0 bit is 1." "0,1"
bitfld.long 0x8 1. "CFEO_0,Sets the expected value verification result during test routine." "0,1"
rbitfld.long 0x8 0. "CFES_0,Indicates that the CFEO_0 bit status is appropriately output to the ECM module." "0,1"
line.long 0xC "CNT_DIV6,CNT_DIV[m] sets the interval timer/time-out detection timer counter clock frequency divisor."
hexmask.long 0xC 0.--31. 1. "CNT_DIV,Set the timer counter clock frequency divisor."
line.long 0x10 "FSO_CMD6,FSO_CMD[m] activates this module and clears the interrupts."
hexmask.long.word 0x10 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.word 0x10 4.--15. 1. "Reserved_4,Reserved."
bitfld.long 0x10 3. "TOC,Clears a time-out detection timer (CNT1) interrupt." "0,1"
newline
bitfld.long 0x10 2. "ITC,Clears an interval timer (CNT0) interrupt." "0,1"
bitfld.long 0x10 1. "CNTS1,Activates or stops the time-out detection timer (CNT1)." "0,1"
bitfld.long 0x10 0. "CNTS0,Activates or stops the interval timer (CNT0)." "0,1"
rgroup.long 0x14++0x7
line.long 0x0 "CNT0_STS6,CNT0_STS[m] indicates the interval timer value."
hexmask.long 0x0 0.--31. 1. "CNT0_STS,Indicates the interval timer value."
line.long 0x4 "CNT1_STS6,CNT1_STS[m] indicates the time-out detection timer value."
hexmask.long 0x4 0.--31. 1. "CNT1_STS,Indicates the time-out detection timer value."
group.long 0x1C++0x3
line.long 0x0 "CNT1_UNS6,Set time-out detection timer operation minimum cycle register."
hexmask.long 0x0 0.--31. 1. "CNT1_UNS,Set minimum cycle value to stop Time-out detection timer."
tree.end
tree "RFSO_7"
base ad:0xFFE87000
group.long 0x0++0x13
line.long 0x0 "CNT0_CYC7,CNT0_CYC[m] sets the periodical cycle value to the interval timer."
hexmask.long 0x0 0.--31. 1. "CNT0_CYC,Specify the periodical cycle value to the interval timer."
line.long 0x4 "CNT1_CYC7,CNT1_CYC[m] sets the periodical cycle value to the time-out detection timer."
hexmask.long 0x4 0.--31. 1. "CNT1_CYC,Specify the periodical cycle value to the time-out detection timer."
line.long 0x8 "FSO_CTL7,FSO_CTL[m] is a control register of this module."
hexmask.long.word 0x8 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.byte 0x8 10.--15. 1. "Reserved_10,Reserved."
rbitfld.long 0x8 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x8 8. "ITE,Enables or disables an interval timer (CNT0) interrupt request." "0: Disables the interrupt,1: Enables the interrupt"
rbitfld.long 0x8 7. "TOCUNF,Indicates whether a time-out detection timer (CNT1) has stopped when the value of a time-out detection timer (CNT1) is below the lower limit (CNT1_UNS[m])" "0: A time-out detection timer,1: A time-out detection timer"
rbitfld.long 0x8 6. "TOI,Indicates whether a time-out detection timer (CNT1) has stopped under the condition that the value of a time-out detection timer (CNT1) is equal to the upper limit (CNT1_CYC[m]) or whether a time-out detection timer (CNT1) has stopped under the.." "0: There is no interrupt,1: There is an interrupt"
newline
rbitfld.long 0x8 5. "ITI,Indicates whether there is an interval timer (CNT0) interrupt request." "0: There is no interrupt,1: There is an interrupt"
rbitfld.long 0x8 4. "TOES,Indicates that time-out error status is appropriately output to the ECM module." "0,1"
rbitfld.long 0x8 3. "CFES_1,Indicates that the CFEO_1 bit status is appropriately output to the ECM module." "0,1"
newline
bitfld.long 0x8 2. "CFEO_1,Sets the expected value verification result during test routine when the CFEO_0 bit is 1." "0,1"
bitfld.long 0x8 1. "CFEO_0,Sets the expected value verification result during test routine." "0,1"
rbitfld.long 0x8 0. "CFES_0,Indicates that the CFEO_0 bit status is appropriately output to the ECM module." "0,1"
line.long 0xC "CNT_DIV7,CNT_DIV[m] sets the interval timer/time-out detection timer counter clock frequency divisor."
hexmask.long 0xC 0.--31. 1. "CNT_DIV,Set the timer counter clock frequency divisor."
line.long 0x10 "FSO_CMD7,FSO_CMD[m] activates this module and clears the interrupts."
hexmask.long.word 0x10 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.word 0x10 4.--15. 1. "Reserved_4,Reserved."
bitfld.long 0x10 3. "TOC,Clears a time-out detection timer (CNT1) interrupt." "0,1"
newline
bitfld.long 0x10 2. "ITC,Clears an interval timer (CNT0) interrupt." "0,1"
bitfld.long 0x10 1. "CNTS1,Activates or stops the time-out detection timer (CNT1)." "0,1"
bitfld.long 0x10 0. "CNTS0,Activates or stops the interval timer (CNT0)." "0,1"
rgroup.long 0x14++0x7
line.long 0x0 "CNT0_STS7,CNT0_STS[m] indicates the interval timer value."
hexmask.long 0x0 0.--31. 1. "CNT0_STS,Indicates the interval timer value."
line.long 0x4 "CNT1_STS7,CNT1_STS[m] indicates the time-out detection timer value."
hexmask.long 0x4 0.--31. 1. "CNT1_STS,Indicates the time-out detection timer value."
group.long 0x1C++0x3
line.long 0x0 "CNT1_UNS7,Set time-out detection timer operation minimum cycle register."
hexmask.long 0x0 0.--31. 1. "CNT1_UNS,Set minimum cycle value to stop Time-out detection timer."
tree.end
tree "RFSO_8"
base ad:0xFFE88000
group.long 0x0++0x13
line.long 0x0 "CNT0_CYC8,CNT0_CYC[m] sets the periodical cycle value to the interval timer."
hexmask.long 0x0 0.--31. 1. "CNT0_CYC,Specify the periodical cycle value to the interval timer."
line.long 0x4 "CNT1_CYC8,CNT1_CYC[m] sets the periodical cycle value to the time-out detection timer."
hexmask.long 0x4 0.--31. 1. "CNT1_CYC,Specify the periodical cycle value to the time-out detection timer."
line.long 0x8 "FSO_CTL8,FSO_CTL[m] is a control register of this module."
hexmask.long.word 0x8 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.byte 0x8 10.--15. 1. "Reserved_10,Reserved."
rbitfld.long 0x8 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x8 8. "ITE,Enables or disables an interval timer (CNT0) interrupt request." "0: Disables the interrupt,1: Enables the interrupt"
rbitfld.long 0x8 7. "TOCUNF,Indicates whether a time-out detection timer (CNT1) has stopped when the value of a time-out detection timer (CNT1) is below the lower limit (CNT1_UNS[m])" "0: A time-out detection timer,1: A time-out detection timer"
rbitfld.long 0x8 6. "TOI,Indicates whether a time-out detection timer (CNT1) has stopped under the condition that the value of a time-out detection timer (CNT1) is equal to the upper limit (CNT1_CYC[m]) or whether a time-out detection timer (CNT1) has stopped under the.." "0: There is no interrupt,1: There is an interrupt"
newline
rbitfld.long 0x8 5. "ITI,Indicates whether there is an interval timer (CNT0) interrupt request." "0: There is no interrupt,1: There is an interrupt"
rbitfld.long 0x8 4. "TOES,Indicates that time-out error status is appropriately output to the ECM module." "0,1"
rbitfld.long 0x8 3. "CFES_1,Indicates that the CFEO_1 bit status is appropriately output to the ECM module." "0,1"
newline
bitfld.long 0x8 2. "CFEO_1,Sets the expected value verification result during test routine when the CFEO_0 bit is 1." "0,1"
bitfld.long 0x8 1. "CFEO_0,Sets the expected value verification result during test routine." "0,1"
rbitfld.long 0x8 0. "CFES_0,Indicates that the CFEO_0 bit status is appropriately output to the ECM module." "0,1"
line.long 0xC "CNT_DIV8,CNT_DIV[m] sets the interval timer/time-out detection timer counter clock frequency divisor."
hexmask.long 0xC 0.--31. 1. "CNT_DIV,Set the timer counter clock frequency divisor."
line.long 0x10 "FSO_CMD8,FSO_CMD[m] activates this module and clears the interrupts."
hexmask.long.word 0x10 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.word 0x10 4.--15. 1. "Reserved_4,Reserved."
bitfld.long 0x10 3. "TOC,Clears a time-out detection timer (CNT1) interrupt." "0,1"
newline
bitfld.long 0x10 2. "ITC,Clears an interval timer (CNT0) interrupt." "0,1"
bitfld.long 0x10 1. "CNTS1,Activates or stops the time-out detection timer (CNT1)." "0,1"
bitfld.long 0x10 0. "CNTS0,Activates or stops the interval timer (CNT0)." "0,1"
rgroup.long 0x14++0x7
line.long 0x0 "CNT0_STS8,CNT0_STS[m] indicates the interval timer value."
hexmask.long 0x0 0.--31. 1. "CNT0_STS,Indicates the interval timer value."
line.long 0x4 "CNT1_STS8,CNT1_STS[m] indicates the time-out detection timer value."
hexmask.long 0x4 0.--31. 1. "CNT1_STS,Indicates the time-out detection timer value."
group.long 0x1C++0x3
line.long 0x0 "CNT1_UNS8,Set time-out detection timer operation minimum cycle register."
hexmask.long 0x0 0.--31. 1. "CNT1_UNS,Set minimum cycle value to stop Time-out detection timer."
tree.end
tree "RFSO_9"
base ad:0xFFE89000
group.long 0x0++0x13
line.long 0x0 "CNT0_CYC9,CNT0_CYC[m] sets the periodical cycle value to the interval timer."
hexmask.long 0x0 0.--31. 1. "CNT0_CYC,Specify the periodical cycle value to the interval timer."
line.long 0x4 "CNT1_CYC9,CNT1_CYC[m] sets the periodical cycle value to the time-out detection timer."
hexmask.long 0x4 0.--31. 1. "CNT1_CYC,Specify the periodical cycle value to the time-out detection timer."
line.long 0x8 "FSO_CTL9,FSO_CTL[m] is a control register of this module."
hexmask.long.word 0x8 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.byte 0x8 10.--15. 1. "Reserved_10,Reserved."
rbitfld.long 0x8 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x8 8. "ITE,Enables or disables an interval timer (CNT0) interrupt request." "0: Disables the interrupt,1: Enables the interrupt"
rbitfld.long 0x8 7. "TOCUNF,Indicates whether a time-out detection timer (CNT1) has stopped when the value of a time-out detection timer (CNT1) is below the lower limit (CNT1_UNS[m])" "0: A time-out detection timer,1: A time-out detection timer"
rbitfld.long 0x8 6. "TOI,Indicates whether a time-out detection timer (CNT1) has stopped under the condition that the value of a time-out detection timer (CNT1) is equal to the upper limit (CNT1_CYC[m]) or whether a time-out detection timer (CNT1) has stopped under the.." "0: There is no interrupt,1: There is an interrupt"
newline
rbitfld.long 0x8 5. "ITI,Indicates whether there is an interval timer (CNT0) interrupt request." "0: There is no interrupt,1: There is an interrupt"
rbitfld.long 0x8 4. "TOES,Indicates that time-out error status is appropriately output to the ECM module." "0,1"
rbitfld.long 0x8 3. "CFES_1,Indicates that the CFEO_1 bit status is appropriately output to the ECM module." "0,1"
newline
bitfld.long 0x8 2. "CFEO_1,Sets the expected value verification result during test routine when the CFEO_0 bit is 1." "0,1"
bitfld.long 0x8 1. "CFEO_0,Sets the expected value verification result during test routine." "0,1"
rbitfld.long 0x8 0. "CFES_0,Indicates that the CFEO_0 bit status is appropriately output to the ECM module." "0,1"
line.long 0xC "CNT_DIV9,CNT_DIV[m] sets the interval timer/time-out detection timer counter clock frequency divisor."
hexmask.long 0xC 0.--31. 1. "CNT_DIV,Set the timer counter clock frequency divisor."
line.long 0x10 "FSO_CMD9,FSO_CMD[m] activates this module and clears the interrupts."
hexmask.long.word 0x10 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.word 0x10 4.--15. 1. "Reserved_4,Reserved."
bitfld.long 0x10 3. "TOC,Clears a time-out detection timer (CNT1) interrupt." "0,1"
newline
bitfld.long 0x10 2. "ITC,Clears an interval timer (CNT0) interrupt." "0,1"
bitfld.long 0x10 1. "CNTS1,Activates or stops the time-out detection timer (CNT1)." "0,1"
bitfld.long 0x10 0. "CNTS0,Activates or stops the interval timer (CNT0)." "0,1"
rgroup.long 0x14++0x7
line.long 0x0 "CNT0_STS9,CNT0_STS[m] indicates the interval timer value."
hexmask.long 0x0 0.--31. 1. "CNT0_STS,Indicates the interval timer value."
line.long 0x4 "CNT1_STS9,CNT1_STS[m] indicates the time-out detection timer value."
hexmask.long 0x4 0.--31. 1. "CNT1_STS,Indicates the time-out detection timer value."
group.long 0x1C++0x3
line.long 0x0 "CNT1_UNS9,Set time-out detection timer operation minimum cycle register."
hexmask.long 0x0 0.--31. 1. "CNT1_UNS,Set minimum cycle value to stop Time-out detection timer."
tree.end
tree "RFSO_10"
base ad:0xFFE8A000
group.long 0x0++0x13
line.long 0x0 "CNT0_CYC10,CNT0_CYC[m] sets the periodical cycle value to the interval timer."
hexmask.long 0x0 0.--31. 1. "CNT0_CYC,Specify the periodical cycle value to the interval timer."
line.long 0x4 "CNT1_CYC10,CNT1_CYC[m] sets the periodical cycle value to the time-out detection timer."
hexmask.long 0x4 0.--31. 1. "CNT1_CYC,Specify the periodical cycle value to the time-out detection timer."
line.long 0x8 "FSO_CTL10,FSO_CTL[m] is a control register of this module."
hexmask.long.word 0x8 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.byte 0x8 10.--15. 1. "Reserved_10,Reserved."
rbitfld.long 0x8 9. "Reserved_9,Reserved." "0,1"
newline
bitfld.long 0x8 8. "ITE,Enables or disables an interval timer (CNT0) interrupt request." "0: Disables the interrupt,1: Enables the interrupt"
rbitfld.long 0x8 7. "TOCUNF,Indicates whether a time-out detection timer (CNT1) has stopped when the value of a time-out detection timer (CNT1) is below the lower limit (CNT1_UNS[m])" "0: A time-out detection timer,1: A time-out detection timer"
rbitfld.long 0x8 6. "TOI,Indicates whether a time-out detection timer (CNT1) has stopped under the condition that the value of a time-out detection timer (CNT1) is equal to the upper limit (CNT1_CYC[m]) or whether a time-out detection timer (CNT1) has stopped under the.." "0: There is no interrupt,1: There is an interrupt"
newline
rbitfld.long 0x8 5. "ITI,Indicates whether there is an interval timer (CNT0) interrupt request." "0: There is no interrupt,1: There is an interrupt"
rbitfld.long 0x8 4. "TOES,Indicates that time-out error status is appropriately output to the ECM module." "0,1"
rbitfld.long 0x8 3. "CFES_1,Indicates that the CFEO_1 bit status is appropriately output to the ECM module." "0,1"
newline
bitfld.long 0x8 2. "CFEO_1,Sets the expected value verification result during test routine when the CFEO_0 bit is 1." "0,1"
bitfld.long 0x8 1. "CFEO_0,Sets the expected value verification result during test routine." "0,1"
rbitfld.long 0x8 0. "CFES_0,Indicates that the CFEO_0 bit status is appropriately output to the ECM module." "0,1"
line.long 0xC "CNT_DIV10,CNT_DIV[m] sets the interval timer/time-out detection timer counter clock frequency divisor."
hexmask.long 0xC 0.--31. 1. "CNT_DIV,Set the timer counter clock frequency divisor."
line.long 0x10 "FSO_CMD10,FSO_CMD[m] activates this module and clears the interrupts."
hexmask.long.word 0x10 16.--31. 1. "KEYCODE,Register write enable code."
hexmask.long.word 0x10 4.--15. 1. "Reserved_4,Reserved."
bitfld.long 0x10 3. "TOC,Clears a time-out detection timer (CNT1) interrupt." "0,1"
newline
bitfld.long 0x10 2. "ITC,Clears an interval timer (CNT0) interrupt." "0,1"
bitfld.long 0x10 1. "CNTS1,Activates or stops the time-out detection timer (CNT1)." "0,1"
bitfld.long 0x10 0. "CNTS0,Activates or stops the interval timer (CNT0)." "0,1"
rgroup.long 0x14++0x7
line.long 0x0 "CNT0_STS10,CNT0_STS[m] indicates the interval timer value."
hexmask.long 0x0 0.--31. 1. "CNT0_STS,Indicates the interval timer value."
line.long 0x4 "CNT1_STS10,CNT1_STS[m] indicates the time-out detection timer value."
hexmask.long 0x4 0.--31. 1. "CNT1_STS,Indicates the time-out detection timer value."
group.long 0x1C++0x3
line.long 0x0 "CNT1_UNS10,Set time-out detection timer operation minimum cycle register."
hexmask.long 0x0 0.--31. 1. "CNT1_UNS,Set minimum cycle value to stop Time-out detection timer."
tree.end
tree.end
tree "ROM"
base ad:0xEB120000
rgroup.long 0xD000++0x7
line.long 0x0 "ACCERRSTS1,This register indicates the status of access error to ICUMX code area from ICUP code access I/F in ICUMX."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "err,0 : No access error from ICUP code access I/F in ICUMX." "0: No access error from ICUP code access I/F in ICUMX,1: Access error occurs from ICUP code access I/F in.."
line.long 0x4 "ACCERRSTS2,This register indicates the status of access error to ICUMX code area fromother than ICUP code access I/F."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "err,0 : No access error from other than ICUP code access I/F in ICUMX." "0: No access error from other than ICUP code access..,1: Access error occurs from other than ICUP code.."
rgroup.long 0xE000++0xF
line.long 0x0 "INJ_ERR_S2,Access read to this register will trigger error injection for EDC single bit error2"
hexmask.long 0x0 0.--31. 1. "err_inj,trigger of error injection for EDC single bit error2."
line.long 0x4 "INJ_ERR_M2,Access read to this register will trigger error injection for EDC multiple bit error2"
hexmask.long 0x4 0.--31. 1. "err_inj,trigger of error injection for EDC single and multi bit error2."
line.long 0x8 "INJ_ERR_S,Access read to this register will trigger error injection for EDC single error"
hexmask.long 0x8 0.--31. 1. "err_inj,trigger of error injection for EDC single bit error."
line.long 0xC "INJ_ERR_M,Access read to this register will trigger error injection for EDC multiple error"
hexmask.long 0xC 0.--31. 1. "err_inj,trigger of error injection for EDC single and multi bit error."
rgroup.long 0xF000++0x3
line.long 0x0 "INJ_ERR_CTR0,These registers control the enable of error injection."
hexmask.long 0x0 0.--31. 1. "err_inj_ctr,error injection enable control."
rgroup.long 0xF100++0x3
line.long 0x0 "INJ_ERR_CTR2,These registers control the enable of error injection."
hexmask.long 0x0 0.--31. 1. "err_inj_ctr,error injection enable control."
rgroup.long 0xF300++0x3
line.long 0x0 "INJ_ERR_CTR3,These registers control the enable of error injection."
hexmask.long 0x0 0.--31. 1. "err_inj_ctr,error injection enable control."
rgroup.long 0xF800++0x3
line.long 0x0 "INJ_ERR_CTR1,These registers control the enable of error injection."
hexmask.long 0x0 0.--31. 1. "err_inj_ctr,error injection enable control."
tree.end
tree "RPC-IF (SPI Multi I/O Bus Controller)"
base ad:0x8000000
group.long 0x0++0x7
line.long 0x0 "CMNCR,CMNCR is a 32-bit register that controls the SPI multi I/O bus controller. The settings of this register are reflected both in external address space read mode and manual operating mode."
bitfld.long 0x0 31. "MD,Operating Mode Switch" "0: External address space read mode,1: Manual mode"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
rbitfld.long 0x0 24. "Reserved_24,Reserved" "0,1"
bitfld.long 0x0 22.--23. "MOIIO3,QSPIn_SSL Output Idle Value Fix QSPIn_IO3" "0: 0,1: 1,?,?"
newline
bitfld.long 0x0 20.--21. "MOIIO2,QSPIn_SSL Output Idle Value Fix QSPIn_IO2" "0: Output value 0,1: Output value 1,?,?"
bitfld.long 0x0 18.--19. "MOIIO1,QSPIn_SSL Output Idle Value Fix QSPIn_IO1" "0: Output value 0,1: Output value 1,?,?"
newline
bitfld.long 0x0 16.--17. "MOIIO0,QSPIn_SSL Output Idle Value Fix QSPIn_IO0" "0: Output value 0,1: Output value 1,?,?"
hexmask.long.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x0 8.--9. "IO0FV,QSPIn_IO0 Fixed Value for 1-bit Size Input" "0: Output value 0,1: Output value 1,?,?"
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 0.--1. "BSZ,Data Bus Size" "0: Serial flash memory x 1,1: Serial flash memory x 2 or HyperFlash x 1 or..,?,?"
line.long 0x4 "SSLDR,SSLDR is a 32-bit register that adjusts the timing between the QSPIn_SSL signal and the QSPIn_SPCLK signal."
hexmask.long.word 0x4 19.--31. 1. "Reserved_19,Reserved"
bitfld.long 0x4 16.--18. "SPNDL,Next Access Delay" "0: 1 cycle of QSPIn_SPCLK,1: 2 cycles of QSPIn_SPCLK,?,?,?,?,?,?"
newline
hexmask.long.byte 0x4 11.--15. 1. "Reserved_11,Reserved"
bitfld.long 0x4 8.--10. "SLNDL,QSPIn_SSL Negation Delay" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 3.--7. 1. "Reserved_3,Reserved"
bitfld.long 0x4 0.--2. "SCKDL,Clock Delay" "0: 1 cycle of QSPIn_SPCLK,1: 2 cycles of QSPIn_SPCLK,?,?,?,?,?,?"
group.long 0xC++0x27
line.long 0x0 "DRCR,DRCR is a 32-bit register that sets the operation in the external address space read mode."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
bitfld.long 0x0 24. "SSLN,QSPIn_SSL Negation" "0,1"
newline
rbitfld.long 0x0 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 16.--20. 1. "RBURST,Read Data Burst Length"
newline
hexmask.long.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "RCF,Read Cache Flush" "0,1"
newline
bitfld.long 0x0 8. "RBE,Read Burst" "0: Normal read,1: Burst read"
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "SSLE,QSPIn_SSL Negation Setting" "0: QSPIn_SSL is negated after transfer of data set..,1: QSPIn_SSL is negated when the accessed address.."
line.long 0x4 "DRCMR,DRCMR is a 32-bit register that sets the commands issued in external address space read mode."
hexmask.long.byte 0x4 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x4 16.--23. 1. "CMD,Command"
newline
hexmask.long.byte 0x4 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "OCMD,Optional Command"
line.long 0x8 "DREAR,DREAR is a 32-bit register that sets the address when the serial flash address is output in 32-bit mode."
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x8 16.--23. 1. "EAV,32-Bit Extended Upper Address Fixed Value"
newline
hexmask.long.word 0x8 3.--15. 1. "Reserved_3,Reserved"
bitfld.long 0x8 0.--2. "EAC,32-Bit Extended External Address Valid Range" "0: External address bits [24:0] enabled,1: External address bits [25:0] enabled,?,?,?,?,?,?"
line.long 0xC "DROPR,DROPR is a 32-bit register that sets the option data in external address space read mode."
hexmask.long.byte 0xC 24.--31. 1. "OPD3,Option Data 3"
hexmask.long.byte 0xC 16.--23. 1. "OPD2,Option Data 2"
newline
hexmask.long.byte 0xC 8.--15. 1. "OPD1,Option Data 1"
hexmask.long.byte 0xC 0.--7. 1. "OPD0,Option Data 0"
line.long 0x10 "DRENR,DRENR is a 32-bit register that sets the bit size of the command. optional command. address. option data. and read data in external address space read mode and enables output of data other than read data. When connecting to HyperFlash. refer to.."
bitfld.long 0x10 30.--31. "CDB,Command Bit Size" "0: 1 bit,?,?,?"
bitfld.long 0x10 28.--29. "OCDB,Optional Command Bit Size" "0: 1 bit,?,?,?"
newline
rbitfld.long 0x10 26.--27. "Reserved_26,Reserved" "0,1,2,3"
bitfld.long 0x10 24.--25. "ADB,Address Bit Size" "0: 1 bit,?,?,?"
newline
rbitfld.long 0x10 22.--23. "Reserved_22,Reserved" "0,1,2,3"
bitfld.long 0x10 20.--21. "OPDB,Option Data Bit Size" "0: 1 bit,?,?,?"
newline
rbitfld.long 0x10 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x10 16.--17. "DRDB,Data Read Size in Bit Units" "0: 1 bit,?,?,?"
newline
bitfld.long 0x10 15. "DME,Dummy Cycle Enable" "0: Insertion of a dummy cycle is disabled,1: Insertion of a dummy cycle is enabled"
bitfld.long 0x10 14. "CDE,Command Enable" "0: Output disabled,1: Output enabled"
newline
rbitfld.long 0x10 13. "Reserved_13,Reserved" "0,1"
bitfld.long 0x10 12. "OCDE,Optional Command Enable" "0: Output disabled,1: Optional command output enabled"
newline
hexmask.long.byte 0x10 8.--11. 1. "ADE,Address Enable"
hexmask.long.byte 0x10 4.--7. 1. "OPDE,Option Data Enable"
newline
hexmask.long.byte 0x10 0.--3. 1. "Reserved_0,Reserved"
line.long 0x14 "SMCR,SMCR is a 32-bit register that sets the operation in manual mode."
hexmask.long.tbyte 0x14 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x14 8. "SSLKP,QSPIn_SSL Signal Level" "0: QSPIn_SSL signal is negated at the end of transfer,1: QSPIn_SSL signal level is maintained from the.."
newline
hexmask.long.byte 0x14 3.--7. 1. "Reserved_3,Reserved"
bitfld.long 0x14 2. "SPIRE,Data Read Enable" "0: Data reading disabled,1: Data reading enabled"
newline
bitfld.long 0x14 1. "SPIWE,Data Write Enable" "0: Data writing disabled,1: Data writing enabled"
bitfld.long 0x14 0. "SPIE,SPI Data Transfer Enable" "0,1"
line.long 0x18 "SMCMR,SMCMR is a 32-bit register that sets the commands issued in manual mode."
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
hexmask.long.byte 0x18 16.--23. 1. "CMD,Command"
newline
hexmask.long.byte 0x18 8.--15. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x18 0.--7. 1. "OCMD,Optional Command"
line.long 0x1C "SMADR,SMADR is a 32-bit register that sets the addresses in manual mode."
hexmask.long.byte 0x1C 24.--31. 1. "ADR0,Address"
hexmask.long.tbyte 0x1C 0.--23. 1. "ADR1,Address"
line.long 0x20 "SMOPR,SMOPR is a 32-bit register that sets the option data in manual mode."
hexmask.long.byte 0x20 24.--31. 1. "OPD3,Option Data 3"
hexmask.long.byte 0x20 16.--23. 1. "OPD2,Option Data 2"
newline
hexmask.long.byte 0x20 8.--15. 1. "OPD1,Option Data 1"
hexmask.long.byte 0x20 0.--7. 1. "OPD0,Option Data 0"
line.long 0x24 "SMENR,SMENR is a 32-bit register that sets the bit size of the command. optional command. address. option data. and transfer data in manual mode and enables their output. SMENR also enables dummy cycle insertion. Disabling all of the command. optional.."
bitfld.long 0x24 30.--31. "CDB,Command Bit Size" "0: 1 bit,?,?,?"
bitfld.long 0x24 28.--29. "OCDB,Optional Command Bit Size" "0: 1 bit,?,?,?"
newline
rbitfld.long 0x24 26.--27. "Reserved_26,Reserved" "0,1,2,3"
bitfld.long 0x24 24.--25. "ADB,Address Bit Size" "0: 1 bit,?,?,?"
newline
rbitfld.long 0x24 22.--23. "Reserved_22,Reserved" "0,1,2,3"
bitfld.long 0x24 20.--21. "OPDB,Option Data Bit Size" "0: 1 bit,?,?,?"
newline
rbitfld.long 0x24 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x24 16.--17. "SPIDB,Transfer Data Bit Size" "0: 1 bit,?,?,?"
newline
bitfld.long 0x24 15. "DME,Dummy Cycle Enable" "0: Dummy cycle insertion disabled,1: Dummy cycle insertion enabled"
bitfld.long 0x24 14. "CDE,Command Enable" "0: Output disabled,1: Output enabled"
newline
rbitfld.long 0x24 13. "Reserved_13,Reserved" "0,1"
bitfld.long 0x24 12. "OCDE,Optional Command Enable" "0: Optional command output disabled,1: Optional command output enabled"
newline
hexmask.long.byte 0x24 8.--11. 1. "ADE,Address Enable"
hexmask.long.byte 0x24 4.--7. 1. "OPDE,Option Data Enable"
newline
hexmask.long.byte 0x24 0.--3. 1. "SPIDE,Transfer Data Enable"
rgroup.long 0x38++0x7
line.long 0x0 "SMRDR0,SMRDR0 is a 32-bit register that holds the read data in manual mode."
hexmask.long 0x0 0.--31. 1. "RDATA0,Read Data"
line.long 0x4 "SMRDR1,SMRDR1 is a 32-bit register that holds the read data in manual mode."
hexmask.long 0x4 0.--31. 1. "RDATA1,Read Data"
group.long 0x40++0x7
line.long 0x0 "SMWDR0,SMWDR0 is a 32-bit register that sets the write data in manual mode."
hexmask.long 0x0 0.--31. 1. "WDATA0,Write Data"
line.long 0x4 "SMWDR1,SMWDR1 is a 32-bit register that sets the write data in manual mode."
hexmask.long 0x4 0.--31. 1. "WDATA1,Write Data"
rgroup.long 0x48++0x3
line.long 0x0 "CMNSR,CMNSR is a 32-bit register that holds flags indicating the operating state."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "SSLF,QSPIn_SSL Pin State Monitor" "0: QSPIn_SSL pin is negated,1: QSPIn_SSL pin is asserted"
newline
bitfld.long 0x0 0. "TEND,Transfer End Flag" "0: Indicates that data transfer is in progress,1: Indicates that data transfer has ended"
group.long 0x58++0xF
line.long 0x0 "DRDMCR,DRDMCR is a 32-bit register that sets the size and number of dummy cycles to be inserted in external address space read mode."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x0 0.--4. 1. "DMCYC,Number of Dummy Cycles Setting"
line.long 0x4 "DRDRENR,DRDRENR is a 32-bit register that specifies the SDR or DDR transfer of the address. option data. and read data in external address space read mode."
hexmask.long.tbyte 0x4 15.--31. 1. "Reserved_15,Reserved"
bitfld.long 0x4 12.--14. "HYPE,HyperFlash or Octal-SPI flash in DDR mode Enable" "0: SPI flash mode,?,?,?,?,?,?,?"
newline
rbitfld.long 0x4 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 8. "ADDRE,Address DDR Enable" "0: SDR transfer,1: DDR transfer"
newline
rbitfld.long 0x4 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4. "OPDRE,Option Data DDR Enable" "0: SDR transfer,1: DDR transfer"
newline
rbitfld.long 0x4 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0. "DRDRE,Data Read DDR Enable" "0: SDR transfer,1: DDR transfer"
line.long 0x8 "SMDMCR,SMDMCR is a 32-bit register that sets the size and number of dummy cycles to be inserted in manual mode."
hexmask.long 0x8 5.--31. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x8 0.--4. 1. "DMCYC,Number of Dummy Cycles Setting"
line.long 0xC "SMDRENR,SMDRENR is a 32-bit register that specifies the SDR or DDR transfer of the address. option data. and data for transfer in manual mode."
hexmask.long.tbyte 0xC 15.--31. 1. "Reserved_15,Reserved"
bitfld.long 0xC 12.--14. "HYPE,HyperFlash or Octal-SPI flash in DDR mode Enable" "0: SPI flash mode,?,?,?,?,?,?,?"
newline
rbitfld.long 0xC 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 8. "ADDRE,Address DDR Enable" "0: SDR transfer,1: DDR transfer"
newline
rbitfld.long 0xC 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 4. "OPDRE,Option Data DDR Enable" "0: SDR transfer,1: DDR transfer"
newline
rbitfld.long 0xC 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 0. "SPIDRE,Transfer Data DDR Enable" "0: SDR transfer,1: DDR transfer"
group.long 0x7C++0xF
line.long 0x0 "PHYCNT,PHYCNT is a 32-bit register that sets the PHY operating mode."
bitfld.long 0x0 31. "CAL,PHY Calibration" "0: Calibration is not executed,1: Calibration is executed"
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
bitfld.long 0x0 22.--23. "OCTA,Octal-SPI flash alignment" "0: HyperFlash or serial flash memory x 1ch or 2ch..,1: Support alternate alignment,?,?"
bitfld.long 0x0 21. "EXDS,External Data Strobe" "0: Not use external Data Strobe signal,1: Use external Data Strobe signal"
newline
bitfld.long 0x0 20. "OCT,Octal-SPI flash protocol mode" "0: Specify 0 in the other than above mode,1: Use Octal-SPI DDR/SDR protocol mode"
bitfld.long 0x0 19. "DDRCAL,This bit is specified to 1 in SW calibration for DDR transfer of" "0,1"
newline
bitfld.long 0x0 18. "HS,High Speed response mode" "0: The read data is output to bus master after the..,1: The read data is output to bus master in.."
bitfld.long 0x0 15.--17. "STRTIM,Strobe Timing Adjustment bit" "0: The delay is biggest,1: The delay is 2nd biggest,?,?,?,?,?,?"
newline
hexmask.long.word 0x0 5.--14. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "WBUF2,Write Buffer Enable2" "0: The write buffer is not used,1: The write buffer is used to write data to the.."
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.long 0x0 2. "WBUF,Write Buffer Enable" "0: The write buffer is not used,1: The write buffer is used to write data to the.."
newline
bitfld.long 0x0 0.--1. "PHYMEM,Device Selection" "0: Serial flash in SDR mode,1: Serial flash in DDR mode,?,?"
line.long 0x4 "PHYOFFSET1,PHYOFFSET1 is a 32-bit register that sets the timing adjustment in DDR operation."
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x4 28.--29. "DDRTMG,DDR Operation Timing Register" "0,1,2,3"
newline
hexmask.long 0x4 0.--27. 1. "Reserved_0,Reserved"
line.long 0x8 "PHYOFFSET2,PHYOFFSET2 is a 32-bit register that sets the timing adjustment in DDR operation."
hexmask.long.tbyte 0x8 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x8 8.--10. "OCTTMG,Octal-SPI flash Operation Timing" "0: Write Buffer Operation of serial flash with..,?,?,?,?,?,?,?"
newline
hexmask.long.byte 0x8 0.--7. 1. "Reserved_0,Reserved"
line.long 0xC "PHYINT,PHYINT is a 32-bit register that sets the interrupt signal and the pins for HyperFlash."
hexmask.long.byte 0xC 25.--31. 1. "Reserved_25,Reserved"
bitfld.long 0xC 24. "INTIE,RPC_INT# Pin Input Enable" "0: The RPC_INT# pin input is disabled,1: The RPC_INT# pin input is enabled"
newline
hexmask.long.byte 0xC 19.--23. 1. "Reserved_19,Reserved"
bitfld.long 0xC 18. "RSTEN,RPC_RESET# Pin Enable" "0: The RPC_RESET# pin is disabled,1: The RPC_RESET# pin is enabled"
newline
bitfld.long 0xC 17. "WPEN,[H3  M3-W  V3M  V3H and M3-N]" "0: The RPC_WP# pin is disabled,1: The RPC_WP# pin is enabled"
bitfld.long 0xC 16. "INTEN,RPC_INT# Pin Enable" "0: The RPC_INT# pin is disabled,1: The RPC_INT# pin is enabled"
newline
hexmask.long.word 0xC 3.--15. 1. "Reserved_3,Reserved"
bitfld.long 0xC 2. "RSTVAL,RPC_RESET# Pin Output Value" "0: RPC_RESET# = H,1: RPC_RESET# = L"
newline
bitfld.long 0xC 1. "WPVAL,[H3  M3-W  V3M  V3H and M3-N]" "0: RPC_WP# = H,1: RPC_WP# = L"
rbitfld.long 0xC 0. "INT,Interrupt Status" "0,1"
group.long 0xAC++0x93
line.long 0x0 "ADD_DIV1,ADD_DIV1 is a 32-bit register that specifies the address which divides the RPC area for security domain."
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
hexmask.long.tbyte 0x0 0.--19. 1. "ADD_DIV1,Address Division bit 1"
line.long 0x4 "ADD_DIV2,ADD_DIV2 is a 32-bit register that specifies the address which divides the RPC area for security domain."
hexmask.long.word 0x4 20.--31. 1. "Reserved_20,Reserved"
hexmask.long.tbyte 0x4 0.--19. 1. "ADD_DIV2,Address Division bit 2"
line.long 0x8 "ADD_DIV3,ADD_DIV3 is a 32-bit register that specifies the address which divides the RPC area for security domain."
hexmask.long.word 0x8 20.--31. 1. "Reserved_20,Reserved"
hexmask.long.tbyte 0x8 0.--19. 1. "ADD_DIV3,Address Division bit 3"
line.long 0xC "SEC_CONF,SEC_CNF is a 32-bit register that specifies the attribution of each domain which is divided by ADD_DIVn (n=1.2.3)."
hexmask.long.tbyte 0xC 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0xC 8. "SECEN,Secure function enable bit" "0: secure,1: non-secure"
newline
bitfld.long 0xC 6.--7. "AREA3,Area Attribution 3" "0: secure,1: non-secure,?,?"
bitfld.long 0xC 4.--5. "AREA2,Area Attribution 2" "0: secure,1: non-secure,?,?"
newline
bitfld.long 0xC 2.--3. "AREA1,Area Attribution 1" "0: secure,1: non-secure,?,?"
bitfld.long 0xC 0.--1. "AREA0,Area Attribution 0" "0: secure,1: non-secure,?,?"
line.long 0x10 "ARIGHT,AWRITE is a 32-bit register that specifies the semaphore function which limits the access to the register of this controller."
hexmask.long 0x10 4.--31. 1. "Reserved_4,Reserved"
rbitfld.long 0x10 3. "RIGHT_NONS,Right Bit for Non-Secure" "0: Non-Secure CPU doesnsingle_quotationt have a..,1: Non-Secure CPU has a right to access"
newline
rbitfld.long 0x10 2. "Reserved_2,Reserved" "0,1"
rbitfld.long 0x10 1. "RIGHT_SEC,Right Bit for Secure" "0: Secure CPU doesnsingle_quotationt have a right..,1: Secure CPU has a right to access"
newline
bitfld.long 0x10 0. "RIGHT_EN,Access Right Enable" "0: Not use access right function,1: Use access right function"
line.long 0x14 "SEC_CMD0,SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Secure CPU."
bitfld.long 0x14 31. "LIMEN,Command Limitation Enable for Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x14 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x14 0.--15. 1. "LIMCMD,Limited Command for Secure CPU"
line.long 0x18 "SEC_CMD1,SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Secure CPU."
bitfld.long 0x18 31. "LIMEN,Command Limitation Enable for Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x18 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x18 0.--15. 1. "LIMCMD,Limited Command for Secure CPU"
line.long 0x1C "SEC_CMD2,SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Secure CPU."
bitfld.long 0x1C 31. "LIMEN,Command Limitation Enable for Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x1C 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x1C 0.--15. 1. "LIMCMD,Limited Command for Secure CPU"
line.long 0x20 "SEC_CMD3,SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Secure CPU."
bitfld.long 0x20 31. "LIMEN,Command Limitation Enable for Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x20 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x20 0.--15. 1. "LIMCMD,Limited Command for Secure CPU"
line.long 0x24 "SEC_CMD4,SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Secure CPU."
bitfld.long 0x24 31. "LIMEN,Command Limitation Enable for Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x24 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x24 0.--15. 1. "LIMCMD,Limited Command for Secure CPU"
line.long 0x28 "SEC_CMD5,SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Secure CPU."
bitfld.long 0x28 31. "LIMEN,Command Limitation Enable for Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x28 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x28 0.--15. 1. "LIMCMD,Limited Command for Secure CPU"
line.long 0x2C "SEC_CMD6,SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Secure CPU."
bitfld.long 0x2C 31. "LIMEN,Command Limitation Enable for Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x2C 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x2C 0.--15. 1. "LIMCMD,Limited Command for Secure CPU"
line.long 0x30 "SEC_CMD7,SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Secure CPU."
bitfld.long 0x30 31. "LIMEN,Command Limitation Enable for Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x30 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x30 0.--15. 1. "LIMCMD,Limited Command for Secure CPU"
line.long 0x34 "SEC_CMD8,SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Secure CPU."
bitfld.long 0x34 31. "LIMEN,Command Limitation Enable for Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x34 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x34 0.--15. 1. "LIMCMD,Limited Command for Secure CPU"
line.long 0x38 "SEC_CMD9,SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Secure CPU."
bitfld.long 0x38 31. "LIMEN,Command Limitation Enable for Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x38 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x38 0.--15. 1. "LIMCMD,Limited Command for Secure CPU"
line.long 0x3C "SEC_CMD10,SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Secure CPU."
bitfld.long 0x3C 31. "LIMEN,Command Limitation Enable for Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x3C 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x3C 0.--15. 1. "LIMCMD,Limited Command for Secure CPU"
line.long 0x40 "SEC_CMD11,SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Secure CPU."
bitfld.long 0x40 31. "LIMEN,Command Limitation Enable for Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x40 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x40 0.--15. 1. "LIMCMD,Limited Command for Secure CPU"
line.long 0x44 "SEC_CMD12,SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Secure CPU."
bitfld.long 0x44 31. "LIMEN,Command Limitation Enable for Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x44 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x44 0.--15. 1. "LIMCMD,Limited Command for Secure CPU"
line.long 0x48 "SEC_CMD13,SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Secure CPU."
bitfld.long 0x48 31. "LIMEN,Command Limitation Enable for Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x48 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x48 0.--15. 1. "LIMCMD,Limited Command for Secure CPU"
line.long 0x4C "SEC_CMD14,SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Secure CPU."
bitfld.long 0x4C 31. "LIMEN,Command Limitation Enable for Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x4C 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x4C 0.--15. 1. "LIMCMD,Limited Command for Secure CPU"
line.long 0x50 "SEC_CMD15,SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Secure CPU."
bitfld.long 0x50 31. "LIMEN,Command Limitation Enable for Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x50 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x50 0.--15. 1. "LIMCMD,Limited Command for Secure CPU"
line.long 0x54 "NON_SEC_CMD0,NON_SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Non-Secure CPU."
bitfld.long 0x54 31. "LIMEN,Command Limitation Enable for Non-Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x54 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x54 0.--15. 1. "LIMCMD,Limited Command for Non-Secure CPU"
line.long 0x58 "NON_SEC_CMD1,NON_SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Non-Secure CPU."
bitfld.long 0x58 31. "LIMEN,Command Limitation Enable for Non-Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x58 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x58 0.--15. 1. "LIMCMD,Limited Command for Non-Secure CPU"
line.long 0x5C "NON_SEC_CMD2,NON_SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Non-Secure CPU."
bitfld.long 0x5C 31. "LIMEN,Command Limitation Enable for Non-Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x5C 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x5C 0.--15. 1. "LIMCMD,Limited Command for Non-Secure CPU"
line.long 0x60 "NON_SEC_CMD3,NON_SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Non-Secure CPU."
bitfld.long 0x60 31. "LIMEN,Command Limitation Enable for Non-Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x60 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x60 0.--15. 1. "LIMCMD,Limited Command for Non-Secure CPU"
line.long 0x64 "NON_SEC_CMD4,NON_SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Non-Secure CPU."
bitfld.long 0x64 31. "LIMEN,Command Limitation Enable for Non-Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x64 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x64 0.--15. 1. "LIMCMD,Limited Command for Non-Secure CPU"
line.long 0x68 "NON_SEC_CMD5,NON_SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Non-Secure CPU."
bitfld.long 0x68 31. "LIMEN,Command Limitation Enable for Non-Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x68 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x68 0.--15. 1. "LIMCMD,Limited Command for Non-Secure CPU"
line.long 0x6C "NON_SEC_CMD6,NON_SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Non-Secure CPU."
bitfld.long 0x6C 31. "LIMEN,Command Limitation Enable for Non-Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x6C 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x6C 0.--15. 1. "LIMCMD,Limited Command for Non-Secure CPU"
line.long 0x70 "NON_SEC_CMD7,NON_SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Non-Secure CPU."
bitfld.long 0x70 31. "LIMEN,Command Limitation Enable for Non-Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x70 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x70 0.--15. 1. "LIMCMD,Limited Command for Non-Secure CPU"
line.long 0x74 "NON_SEC_CMD8,NON_SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Non-Secure CPU."
bitfld.long 0x74 31. "LIMEN,Command Limitation Enable for Non-Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x74 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x74 0.--15. 1. "LIMCMD,Limited Command for Non-Secure CPU"
line.long 0x78 "NON_SEC_CMD9,NON_SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Non-Secure CPU."
bitfld.long 0x78 31. "LIMEN,Command Limitation Enable for Non-Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x78 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x78 0.--15. 1. "LIMCMD,Limited Command for Non-Secure CPU"
line.long 0x7C "NON_SEC_CMD10,NON_SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Non-Secure CPU."
bitfld.long 0x7C 31. "LIMEN,Command Limitation Enable for Non-Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x7C 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x7C 0.--15. 1. "LIMCMD,Limited Command for Non-Secure CPU"
line.long 0x80 "NON_SEC_CMD11,NON_SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Non-Secure CPU."
bitfld.long 0x80 31. "LIMEN,Command Limitation Enable for Non-Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x80 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x80 0.--15. 1. "LIMCMD,Limited Command for Non-Secure CPU"
line.long 0x84 "NON_SEC_CMD12,NON_SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Non-Secure CPU."
bitfld.long 0x84 31. "LIMEN,Command Limitation Enable for Non-Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x84 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x84 0.--15. 1. "LIMCMD,Limited Command for Non-Secure CPU"
line.long 0x88 "NON_SEC_CMD13,NON_SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Non-Secure CPU."
bitfld.long 0x88 31. "LIMEN,Command Limitation Enable for Non-Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x88 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x88 0.--15. 1. "LIMCMD,Limited Command for Non-Secure CPU"
line.long 0x8C "NON_SEC_CMD14,NON_SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Non-Secure CPU."
bitfld.long 0x8C 31. "LIMEN,Command Limitation Enable for Non-Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x8C 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x8C 0.--15. 1. "LIMCMD,Limited Command for Non-Secure CPU"
line.long 0x90 "NON_SEC_CMD15,NON_SEC_CMD0 is a 32-bit register that specifies the command which is prohibited for Non-Secure CPU."
bitfld.long 0x90 31. "LIMEN,Command Limitation Enable for Non-Secure CPU" "0: The command specified in LIMCMD[15:0] is not..,1: The command specified in LIMCMD[15:0] is limited"
hexmask.long.word 0x90 16.--30. 1. "Reserved_16,Reserved"
newline
hexmask.long.word 0x90 0.--15. 1. "LIMCMD,Limited Command for Non-Secure CPU"
group.long 0x1E0++0xF
line.long 0x0 "ERASELIST1,ERASELIST1 is a 32-bit register that specifies Erase Command to limit."
bitfld.long 0x0 31. "ECMDEN1,Erase Command 1 Enable" "0,1"
hexmask.long.byte 0x0 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x0 16.--23. 1. "ECMD1,Erase Command 1"
bitfld.long 0x0 15. "ECMDEN2,Erase Command 2 Enable" "0,1"
newline
hexmask.long.byte 0x0 8.--14. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x0 0.--7. 1. "ECMD2,Erase Command 2"
line.long 0x4 "ERASELIST2,ERASELIST1 is a 32-bit register that specifies Erase Command to limit."
bitfld.long 0x4 31. "ECMDEN1,Erase Command 1 Enable" "0,1"
hexmask.long.byte 0x4 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x4 16.--23. 1. "ECMD1,Erase Command 1"
bitfld.long 0x4 15. "ECMDEN2,Erase Command 2 Enable" "0,1"
newline
hexmask.long.byte 0x4 8.--14. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x4 0.--7. 1. "ECMD2,Erase Command 2"
line.long 0x8 "WRITELIST1,WRITELIST1 is a 32-bit register that specifies Write Command to limit."
bitfld.long 0x8 31. "WCMDEN1,Write Command 1 Enable" "0: Disable to limit the Write command which is..,1: Enable to limit the Write command which is.."
hexmask.long.byte 0x8 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0x8 16.--23. 1. "WCMD1,Write Command 1"
bitfld.long 0x8 15. "WCMDEN2,Write Command 2 Enable" "0: Disable to limit the Write command which is..,1: Enable to limit the Write command which is.."
newline
hexmask.long.byte 0x8 8.--14. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 0.--7. 1. "WCMD2,Write Command 2"
line.long 0xC "WRITELIST2,WRITELIST1 is a 32-bit register that specifies Write Command to limit."
bitfld.long 0xC 31. "WCMDEN1,Write Command 1 Enable" "0: Disable to limit the Write command which is..,1: Enable to limit the Write command which is.."
hexmask.long.byte 0xC 24.--30. 1. "Reserved_24,Reserved"
newline
hexmask.long.byte 0xC 16.--23. 1. "WCMD1,Write Command 1"
bitfld.long 0xC 15. "WCMDEN2,Write Command 2 Enable" "0: Disable to limit the Write command which is..,1: Enable to limit the Write command which is.."
newline
hexmask.long.byte 0xC 8.--14. 1. "Reserved_8,Reserved"
hexmask.long.byte 0xC 0.--7. 1. "WCMD2,Write Command 2"
tree.end
tree "RST (Reset)"
base ad:0x0
tree "RST_0"
base ad:0xE6160000
rgroup.long 0x0++0x7
line.long 0x0 "MODEMR0,MODEMR0 is a 32-bit read-only register. which can be accessed only in longwords."
bitfld.long 0x0 31. "MD31,The value of MD31" "0,1"
bitfld.long 0x0 30. "Reserved_30,Reserved. When read  returns 0." "0,1"
newline
bitfld.long 0x0 29. "MD29,The value of MD29" "0,1"
bitfld.long 0x0 28. "Reserved_28,Reserved. When read  returns 0." "0,1"
newline
bitfld.long 0x0 27. "MD27,The value of MD27" "0,1"
bitfld.long 0x0 26. "Reserved_26,Reserved. When read  returns 0." "0,1"
newline
bitfld.long 0x0 25. "MD25,The value of MD25" "0,1"
bitfld.long 0x0 24. "Reserved_24,Reserved. When read  returns 0." "0,1"
newline
bitfld.long 0x0 23. "Reserved_23,Reserved. When read  returns 0." "0,1"
bitfld.long 0x0 22. "MD22,The value of MD22" "0,1"
newline
bitfld.long 0x0 21. "MD21,The value of MD21" "0,1"
bitfld.long 0x0 20. "MD20,The value of MD20" "0,1"
newline
bitfld.long 0x0 19. "MD19,The value of MD19" "0,1"
bitfld.long 0x0 18. "Reserved_18,Reserved. When read  returns 0." "0,1"
newline
bitfld.long 0x0 17. "MD17,The value of MD17" "0,1"
bitfld.long 0x0 16. "Reserved_16,Reserved. When read  returns 0." "0,1"
newline
bitfld.long 0x0 15. "Reserved_15,Reserved. When read  returns 0." "0,1"
bitfld.long 0x0 14. "MD14,The value of MD14" "0,1"
newline
bitfld.long 0x0 13. "MD13,The value of MD13" "0,1"
bitfld.long 0x0 12. "Reserved_12,Reserved. When read  returns 0." "0,1"
newline
bitfld.long 0x0 11. "MD11,The value of MD11" "0,1"
bitfld.long 0x0 10. "MD10,The value of MD10" "0,1"
newline
bitfld.long 0x0 9. "MD9,The value of MD9" "0,1"
bitfld.long 0x0 8. "Reserved_8,Reserved. When read  returns 0." "0,1"
newline
bitfld.long 0x0 7. "MD7,The value of MD7" "0,1"
bitfld.long 0x0 6. "MD6,The value of MD6" "0,1"
newline
bitfld.long 0x0 5. "MD5,The value of MD5" "0,1"
bitfld.long 0x0 4. "MD4,The value of MD4" "0,1"
newline
bitfld.long 0x0 3. "MD3,The value of MD3" "0,1"
bitfld.long 0x0 2. "MD2,The value of MD2" "0,1"
newline
bitfld.long 0x0 1. "MD1,The value of MD1" "0,1"
bitfld.long 0x0 0. "MD0,The value of MD0" "0,1"
line.long 0x4 "MODEMR1,MODEMR1 is a 32-bit read-only register. which can be accessed only in longwords."
bitfld.long 0x4 30.--31. "Reserved_30,Reserved. When read  returns 0." "0,1,2,3"
bitfld.long 0x4 28.--29. "MDT_1_0,The value of MDT[1:0]" "0,1,2,3"
newline
hexmask.long.tbyte 0x4 6.--27. 1. "Reserved_6,Reserved. When read  returns 0."
bitfld.long 0x4 5. "MD37,The value of MD37" "0,1"
newline
bitfld.long 0x4 4. "MD36,The value of MD36" "0,1"
bitfld.long 0x4 3. "Reserved_3,Reserved. When read  returns 0." "0,1"
newline
bitfld.long 0x4 2. "Reserved_2,Reserved. When read  returns 0." "0,1"
bitfld.long 0x4 1. "Reserved_1,Reserved. When read  returns 0." "0,1"
newline
bitfld.long 0x4 0. "MD32,The value of MD32" "0,1"
group.long 0x10++0xB
line.long 0x0 "WDTRSTCR,WDTRSTCR is a 32-bit readable/writable register. which can be accessed only in longwords. This register specifies whether the watchdog timer overflow should be masked or not as a reset trigger. The upper word of the write value should always be.."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Code value(Hsingle_quotationA55A)"
bitfld.long 0x0 15. "RESBAR2S,Select BAR2 registers reset condition" "0: ICUMXBAR and ICUMXCPCR are initialized only by..,1: ICUMXBAR and ICUMXCPCR are initialized by PRESET#"
newline
hexmask.long.word 0x0 2.--14. 1. "Reserved_2,Reserved. When read  returns 0. The write value should always be 0."
bitfld.long 0x0 1. "SWDT_RSTMSK,System WatchDog Reset Mask" "0: Reset request,1: Not reset request"
newline
bitfld.long 0x0 0. "RWDT_RSTMSK,RWDT Reset Mask" "0: Reset request,1: Not reset request"
line.long 0x4 "RSTOUTCR,This register controls the output level of external LSI pin RESETOUT# by software."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved. When read  returns 0. The write value should always be 0."
bitfld.long 0x4 0. "RESOUT,PRESETOUT# control by software" "0: PRESETOUT# is asserted,1: PRESETOUT# is negated"
line.long 0x8 "SRESCR0,This register is initialized only by PRESET#."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Code value(Hsingle_quotation5AA5)"
bitfld.long 0x8 15. "SPRES,Soft Power On Reset" "0: ;Ignored,1: ;Soft Power On Reset is asserted"
newline
hexmask.long.word 0x8 0.--14. 1. "Reserved_0,Reserved. When read  returns 0. The write value should always be 0."
group.long 0x20++0x3B
line.long 0x0 "RSTFR0,This register is initialized only by PRESET#."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved. When read  returns 0. The write value should always be 0."
bitfld.long 0x0 3. "RCPRES,Soft Power On Reset Factor Bit" "0: ;SRESCR,1: ;SRESCR"
newline
bitfld.long 0x0 2. "RCSWDT,Soft Power On Reset Factor Bit" "0: ;System-WDT is not Soft Power On Reset factor,1: ;System-WDT is Soft Power On Reset factor"
bitfld.long 0x0 1. "RCRWDT,Soft Power On Reset Factor Bit" "0: ;RWDT is not Soft Power On Reset factor,1: ;RWDT is Soft Power On Reset factor"
newline
bitfld.long 0x0 0. "RPF,Soft Power On Reset detection bit" "0: ;Soft Power On Reset is not detected,1: ;Soft Power On Reset is detected"
line.long 0x4 "RSTFR1,This register is initialized only by PRESET#."
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved. When read  returns 0. The write value should always be 0."
bitfld.long 0x4 3. "RCPRES,Soft Power On Reset Factor Bit" "0: ;SRESCR,1: ;SRESCR"
newline
bitfld.long 0x4 2. "RCSWDT,Soft Power On Reset Factor Bit" "0: ;System-WDT is not Soft Power On Reset factor,1: ;System-WDT is Soft Power On Reset factor"
bitfld.long 0x4 1. "RCRWDT,Soft Power On Reset Factor Bit" "0: ;RWDT is not Soft Power On Reset factor,1: ;RWDT is Soft Power On Reset factor"
newline
bitfld.long 0x4 0. "RPF,Soft Power On Reset detection bit" "0: ;Soft Power On Reset is not detected,1: ;Soft Power On Reset is detected"
line.long 0x8 "RSTFR2,This register is initialized only by PRESET#."
hexmask.long 0x8 4.--31. 1. "Reserved_4,Reserved. When read  returns 0. The write value should always be 0."
bitfld.long 0x8 3. "RCPRES,Soft Power On Reset Factor Bit" "0: ;SRESCR,1: ;SRESCR"
newline
bitfld.long 0x8 2. "RCSWDT,Soft Power On Reset Factor Bit" "0: ;System-WDT is not Soft Power On Reset factor,1: ;System-WDT is Soft Power On Reset factor"
bitfld.long 0x8 1. "RCRWDT,Soft Power On Reset Factor Bit" "0: ;RWDT is not Soft Power On Reset factor,1: ;RWDT is Soft Power On Reset factor"
newline
bitfld.long 0x8 0. "RPF,Soft Power On Reset detection bit" "0: ;Soft Power On Reset is not detected,1: ;Soft Power On Reset is detected"
line.long 0xC "RSTFR3,This register is initialized only by PRESET#."
hexmask.long 0xC 4.--31. 1. "Reserved_4,Reserved. When read  returns 0. The write value should always be 0."
bitfld.long 0xC 3. "RCPRES,Soft Power On Reset Factor Bit" "0: ;SRESCR,1: ;SRESCR"
newline
bitfld.long 0xC 2. "RCSWDT,Soft Power On Reset Factor Bit" "0: ;System-WDT is not Soft Power On Reset factor,1: ;System-WDT is Soft Power On Reset factor"
bitfld.long 0xC 1. "RCRWDT,Soft Power On Reset Factor Bit" "0: ;RWDT is not Soft Power On Reset factor,1: ;RWDT is Soft Power On Reset factor"
newline
bitfld.long 0xC 0. "RPF,Soft Power On Reset detection bit" "0: ;Soft Power On Reset is not detected,1: ;Soft Power On Reset is detected"
line.long 0x10 "STBCHR0,STBCHRn are 32-bit readable/writable registers. which can be accessed only in longwords. These registers are defined purely for software purpose. Setting these registers doesnsingle_quotationt influence the LSI operation. As these bits are.."
hexmask.long 0x10 0.--31. 1. "STBm_31_0,defined purely for software purpose"
line.long 0x14 "STBCHR1,STBCHRn are 32-bit readable/writable registers. which can be accessed only in longwords. These registers are defined purely for software purpose. Setting these registers doesnsingle_quotationt influence the LSI operation. As these bits are.."
hexmask.long 0x14 0.--31. 1. "STBm_31_0,defined purely for software purpose"
line.long 0x18 "STBCHR2,STBCHRn are 32-bit readable/writable registers. which can be accessed only in longwords. These registers are defined purely for software purpose. Setting these registers doesnsingle_quotationt influence the LSI operation. As these bits are.."
hexmask.long 0x18 0.--31. 1. "STBm_31_0,defined purely for software purpose"
line.long 0x1C "STBCHR3,STBCHRn are 32-bit readable/writable registers. which can be accessed only in longwords. These registers are defined purely for software purpose. Setting these registers doesnsingle_quotationt influence the LSI operation. As these bits are.."
hexmask.long 0x1C 0.--31. 1. "STBm_31_0,defined purely for software purpose"
line.long 0x20 "STBCHR4,STBCHRn are 32-bit readable/writable registers. which can be accessed only in longwords. These registers are defined purely for software purpose. Setting these registers doesnsingle_quotationt influence the LSI operation. As these bits are.."
hexmask.long 0x20 0.--31. 1. "STBm_31_0,defined purely for software purpose"
line.long 0x24 "STBCHR5,STBCHRn are 32-bit readable/writable registers. which can be accessed only in longwords. These registers are defined purely for software purpose. Setting these registers doesnsingle_quotationt influence the LSI operation. As these bits are.."
hexmask.long 0x24 0.--31. 1. "STBm_31_0,defined purely for software purpose"
line.long 0x28 "STBCHR6,STBCHRn are 32-bit readable/writable registers. which can be accessed only in longwords. These registers are defined purely for software purpose. Setting these registers doesnsingle_quotationt influence the LSI operation. As these bits are.."
hexmask.long 0x28 0.--31. 1. "STBm_31_0,defined purely for software purpose"
line.long 0x2C "STBCHR7,STBCHRn are 32-bit readable/writable registers. which can be accessed only in longwords. These registers are defined purely for software purpose. Setting these registers doesnsingle_quotationt influence the LSI operation. As these bits are.."
hexmask.long 0x2C 0.--31. 1. "STBm_31_0,defined purely for software purpose"
line.long 0x30 "APBSFTYCHKR,APBSFTYCHKR is a 32-bit readable/writable register."
hexmask.long 0x30 0.--31. 1. "CHK_31_0,This register is functional safety use only. Keep initial value."
line.long 0x34 "ICUMXBAR,This register is initialized by PRESET# when WDTRSTCR.RESBAR2S=0. This register is initialized by PRESET# and Soft Power On Reset(WDT reset or SRESCR0.SPRES=1) when WDTRSTCR.RESBAR2S=1."
hexmask.long.tbyte 0x34 9.--31. 1. "RBAR2_31_9,ICUMXA Boot Address2"
hexmask.long.byte 0x34 5.--8. 1. "Reserved_5,Reserved. When read  returns 0. The write value should always be 0."
newline
bitfld.long 0x34 4. "BAREN,BAREN bit" "0: RBAR2 is not valid,1: RBAR2 is valid"
rbitfld.long 0x34 2.--3. "Reserved_2,Reserved. When read  returns 0. The write value should always be 0." "0,1,2,3"
newline
bitfld.long 0x34 0.--1. "BTMD_1_0,Specifies the Boot area of ICUMXA" "0: RBAR2[31:9] is assigned-Boot address,1: Prohibited,?,?"
line.long 0x38 "ICUMXCPCR,This register is initialized by PRESET# and Soft Power On Reset(WDT reset or SRESCR0.SPRES=1) when WDTRSTCR.RESBAR2S=1."
hexmask.long 0x38 1.--31. 1. "Reserved_1,Reserved. When read  returns 0. The write value should always be 0."
bitfld.long 0x38 0. "ICUMXCPINIT,0: Reset-ICUMXA is asserted. ICUMXA is not booted." "0: Reset-ICUMXA is asserted,1: Reset-ICUMXA is de-asserted"
group.long 0x68++0x7
line.long 0x0 "RSTPTCSR,This register is initialized by PRESET# and Soft Power On Reset(WDT reset or SRESCR0.SPRES=1)."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved. When read  returns 0. The write value should always be 0."
bitfld.long 0x0 1. "EIE,Enable error interrupt request of write access protection" "0: Disable error interrupt request,1: Enable error interrupt request"
newline
eventfld.long 0x0 0. "ERR,Display the status of error detection on secure access protection" "0: Not detect error,1: Detect error of write access.."
line.long 0x4 "RSTPTERADR,This register is initialized by PRESET# and Soft Power On Reset(WDT reset or SRESCR0.SPRES=1)."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved. When read  returns 0. The write value should always be 0."
hexmask.long.word 0x4 1.--15. 1. "ADDR_15_1,Offset address[15:1] of the first illegal write access-the protected registers."
newline
eventfld.long 0x4 0. "ADDR_0,Offset address[0] of the first illegal write access-the protected registers." "0,1"
group.long 0x3800++0x3
line.long 0x0 "RSTD0WACR,This register is initialized by PRESET# and Soft Power On Reset(WDT reset or SRESCR.SPRES=1)."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved. These bits are always read as 1. The write value should always be 1."
bitfld.long 0x0 27. "RSTPTERADR,Write permission-RSTPTERADR register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 26. "RSTPTCSR,Write permission-RSTPTCSR register from domain n." "0: Prohibit write access,1: Permit write access"
rbitfld.long 0x0 23.--25. "Reserved_23,Reserved. These bits are always read as 1. The write value should always be 1." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 22. "ICUMXCPCR,Write permission-ICUMXCPCR register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 21. "ICUMXBAR,Write permission-ICUMXBAR register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 20. "APBSFTYCHKR,Write permission-APBSFTYCHKR register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 19. "STBCHR7,Write permission-STBCHR7 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 18. "STBCHR6,Write permission-STBCHR6 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 17. "STBCHR5,Write permission-STBCHR5 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 16. "STBCHR4,Write permission-STBCHR4 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 15. "STBCHR3,Write permission-STBCHR3 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 14. "STBCHR2,Write permission-STBCHR2 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 13. "STBCHR1,Write permission-STBCHR1 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 12. "STBCHR0,Write permission-STBCHR0 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 11. "RSTFR3,Write permission-RSTFR3 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 10. "RSTFR2,Write permission-RSTFR2 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 9. "RSTFR1,Write permission-RSTFR1 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 8. "RSTFR0,Write permission-RSTFR0 register from domain n." "0: Prohibit write access,1: Permit write access"
rbitfld.long 0x0 7. "Reserved_7,Reserved. These bits are always read as 1. The write value should always be 1." "0,1"
newline
bitfld.long 0x0 6. "SRESCR0,Write permission-SRESCR0 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 5. "RSTOUTCR,Write permission-RSTOUTCR register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 4. "WDTRSTCR,Write permission-WDTRSTCR register from domain n." "0: Prohibit write access,1: Permit write access"
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved. These bits are always read as 1. The write value should always be 1."
tree.end
tree "RST_1"
base ad:0xE6164000
group.long 0x3A00++0x3
line.long 0x0 "RSTD1WACR,This register is initialized by PRESET# and Soft Power On Reset(WDT reset or SRESCR.SPRES=1)."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x0 27. "RSTPTERADR,Write permission-RSTPTERADR register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 26. "RSTPTCSR,Write permission-RSTPTCSR register from domain n." "0: Prohibit write access,1: Permit write access"
newline
rbitfld.long 0x0 23.--25. "Reserved_23,Reserved. These bits are always read as 0. The write value should always be 0." "0,1,2,3,4,5,6,7"
bitfld.long 0x0 22. "ICUMXCPCR,Write permission-ICUMXCPCR register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 21. "ICUMXBAR,Write permission-ICUMXBAR register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 20. "APBSFTYCHKR,Write permission-APBSFTYCHKR register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 19. "STBCHR7,Write permission-STBCHR7 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 18. "STBCHR6,Write permission-STBCHR6 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 17. "STBCHR5,Write permission-STBCHR5 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 16. "STBCHR4,Write permission-STBCHR4 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 15. "STBCHR3,Write permission-STBCHR3 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 14. "STBCHR2,Write permission-STBCHR2 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 13. "STBCHR1,Write permission-STBCHR1 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 12. "STBCHR0,Write permission-STBCHR0 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 11. "RSTFR3,Write permission-RSTFR3 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 10. "RSTFR2,Write permission-RSTFR2 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 9. "RSTFR1,Write permission-RSTFR1 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 8. "RSTFR0,Write permission-RSTFR0 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 7. "SRESCR1,Write permission-SRESCR1 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 6. "SRESCR0,Write permission-SRESCR0 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 5. "RSTOUTCR,Write permission-RSTOUTCR register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 4. "WDTRSTCR,Write permission-WDTRSTCR register from domain n." "0: Prohibit write access,1: Permit write access"
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved. These bits are always read as 0. The write value should always be 0."
tree.end
tree "RST_2"
base ad:0xE6168000
group.long 0x3C00++0x3
line.long 0x0 "RSTD2WACR,This register is initialized by PRESET# and Soft Power On Reset(WDT reset or SRESCR.SPRES=1)."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x0 27. "RSTPTERADR,Write permission-RSTPTERADR register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 26. "RSTPTCSR,Write permission-RSTPTCSR register from domain n." "0: Prohibit write access,1: Permit write access"
newline
rbitfld.long 0x0 23.--25. "Reserved_23,Reserved. These bits are always read as 0. The write value should always be 0." "0,1,2,3,4,5,6,7"
bitfld.long 0x0 22. "ICUMXCPCR,Write permission-ICUMXCPCR register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 21. "ICUMXBAR,Write permission-ICUMXBAR register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 20. "APBSFTYCHKR,Write permission-APBSFTYCHKR register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 19. "STBCHR7,Write permission-STBCHR7 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 18. "STBCHR6,Write permission-STBCHR6 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 17. "STBCHR5,Write permission-STBCHR5 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 16. "STBCHR4,Write permission-STBCHR4 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 15. "STBCHR3,Write permission-STBCHR3 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 14. "STBCHR2,Write permission-STBCHR2 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 13. "STBCHR1,Write permission-STBCHR1 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 12. "STBCHR0,Write permission-STBCHR0 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 11. "RSTFR3,Write permission-RSTFR3 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 10. "RSTFR2,Write permission-RSTFR2 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 9. "RSTFR1,Write permission-RSTFR1 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 8. "RSTFR0,Write permission-RSTFR0 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 7. "SRESCR1,Write permission-SRESCR1 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 6. "SRESCR0,Write permission-SRESCR0 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 5. "RSTOUTCR,Write permission-RSTOUTCR register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 4. "WDTRSTCR,Write permission-WDTRSTCR register from domain n." "0: Prohibit write access,1: Permit write access"
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved. These bits are always read as 0. The write value should always be 0."
tree.end
tree "RST_3"
base ad:0xE616C000
group.long 0x3E00++0x3
line.long 0x0 "RSTD3WACR,This register is initialized by PRESET# and Soft Power On Reset(WDT reset or SRESCR.SPRES=1)."
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved. These bits are always read as 0. The write value should always be 0."
bitfld.long 0x0 27. "RSTPTERADR,Write permission-RSTPTERADR register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 26. "RSTPTCSR,Write permission-RSTPTCSR register from domain n." "0: Prohibit write access,1: Permit write access"
newline
rbitfld.long 0x0 23.--25. "Reserved_23,Reserved. These bits are always read as 0. The write value should always be 0." "0,1,2,3,4,5,6,7"
bitfld.long 0x0 22. "ICUMXCPCR,Write permission-ICUMXCPCR register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 21. "ICUMXBAR,Write permission-ICUMXBAR register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 20. "APBSFTYCHKR,Write permission-APBSFTYCHKR register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 19. "STBCHR7,Write permission-STBCHR7 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 18. "STBCHR6,Write permission-STBCHR6 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 17. "STBCHR5,Write permission-STBCHR5 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 16. "STBCHR4,Write permission-STBCHR4 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 15. "STBCHR3,Write permission-STBCHR3 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 14. "STBCHR2,Write permission-STBCHR2 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 13. "STBCHR1,Write permission-STBCHR1 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 12. "STBCHR0,Write permission-STBCHR0 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 11. "RSTFR3,Write permission-RSTFR3 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 10. "RSTFR2,Write permission-RSTFR2 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 9. "RSTFR1,Write permission-RSTFR1 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 8. "RSTFR0,Write permission-RSTFR0 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 7. "SRESCR1,Write permission-SRESCR1 register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 6. "SRESCR0,Write permission-SRESCR0 register from domain n." "0: Prohibit write access,1: Permit write access"
newline
bitfld.long 0x0 5. "RSTOUTCR,Write permission-RSTOUTCR register from domain n." "0: Prohibit write access,1: Permit write access"
bitfld.long 0x0 4. "WDTRSTCR,Write permission-WDTRSTCR register from domain n." "0: Prohibit write access,1: Permit write access"
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved. These bits are always read as 0. The write value should always be 0."
tree.end
tree.end
tree "RTVRAM (1M byte RAM on Real Time domain)"
base ad:0x0
tree "RTVRAM_0"
base ad:0xFFE90000
group.long 0x0++0x3B
line.long 0x0 "SECDIV0D_0,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x0 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x4 "SECDIV1D_0,"
hexmask.long.word 0x4 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x4 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x8 "SECDIV2D_0,"
hexmask.long.word 0x8 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x8 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0xC "SECDIV3D_0,"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0xC 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x10 "SECDIV4D_0,"
hexmask.long.word 0x10 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x10 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x14 "SECDIV5D_0,"
hexmask.long.word 0x14 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x14 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x18 "SECDIV6D_0,"
hexmask.long.word 0x18 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x18 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x1C "SECDIV7D_0,"
hexmask.long.word 0x1C 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x1C 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x20 "SECDIV8D_0,"
hexmask.long.word 0x20 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x20 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x24 "SECDIV9D_0,"
hexmask.long.word 0x24 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x24 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x28 "SECDIV10D_0,"
hexmask.long.word 0x28 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x28 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x2C "SECDIV11D_0,"
hexmask.long.word 0x2C 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x2C 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x30 "SECDIV12D_0,"
hexmask.long.word 0x30 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x30 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x34 "SECDIV13D_0,"
hexmask.long.word 0x34 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x34 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x38 "SECDIV14D_0,"
hexmask.long.word 0x38 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x38 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
group.long 0x40++0x3F
line.long 0x0 "SECCTRR0D_0,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x0 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x0 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x4 "SECCTRR1D_0,"
hexmask.long.word 0x4 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x4 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x4 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x4 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x8 "SECCTRR2D_0,"
hexmask.long.word 0x8 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x8 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x8 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x8 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x8 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0xC "SECCTRR3D_0,"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0xC 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0xC 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0xC 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0xC 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x10 "SECCTRR4D_0,"
hexmask.long.word 0x10 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x10 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x10 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x10 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x14 "SECCTRR5D_0,"
hexmask.long.word 0x14 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x14 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x14 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x14 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x14 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x18 "SECCTRR6D_0,"
hexmask.long.word 0x18 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x18 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x18 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x18 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x18 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x1C "SECCTRR7D_0,"
hexmask.long.word 0x1C 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x1C 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x1C 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x1C 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x1C 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x20 "SECCTRR8D_0,"
hexmask.long.word 0x20 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x20 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x20 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x20 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x20 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x24 "SECCTRR9D_0,"
hexmask.long.word 0x24 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x24 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x24 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x24 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x24 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x28 "SECCTRR10D_0,"
hexmask.long.word 0x28 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x28 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x28 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x28 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x28 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x2C "SECCTRR11D_0,"
hexmask.long.word 0x2C 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x2C 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x2C 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x2C 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x2C 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x30 "SECCTRR12D_0,"
hexmask.long.word 0x30 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x30 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x30 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x30 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x30 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x34 "SECCTRR13D_0,"
hexmask.long.word 0x34 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x34 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x34 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x34 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x34 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x38 "SECCTRR14D_0,"
hexmask.long.word 0x38 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x38 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x38 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x38 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x38 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x3C "SECCTRR15D_0,"
hexmask.long.word 0x3C 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x3C 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x3C 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x3C 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x3C 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
group.long 0x340++0x3F
line.long 0x0 "SECCTRW0D_0,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x0 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x0 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x0 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x4 "SECCTRW1D_0,"
hexmask.long.word 0x4 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x4 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x4 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x4 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x4 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x8 "SECCTRW2D_0,"
hexmask.long.word 0x8 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x8 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x8 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x8 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x8 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x8 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0xC "SECCTRW3D_0,"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0xC 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0xC 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0xC 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0xC 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0xC 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x10 "SECCTRW4D_0,"
hexmask.long.word 0x10 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x10 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x10 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x10 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x10 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x14 "SECCTRW5D_0,"
hexmask.long.word 0x14 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x14 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x14 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x14 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x14 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x14 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x18 "SECCTRW6D_0,"
hexmask.long.word 0x18 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x18 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x18 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x18 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x18 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x18 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x1C "SECCTRW7D_0,"
hexmask.long.word 0x1C 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x1C 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x1C 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x1C 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x1C 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x1C 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x20 "SECCTRW8D_0,"
hexmask.long.word 0x20 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x20 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x20 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x20 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x20 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x20 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x24 "SECCTRW9D_0,"
hexmask.long.word 0x24 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x24 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x24 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x24 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x24 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x24 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x28 "SECCTRW10D_0,"
hexmask.long.word 0x28 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x28 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x28 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x28 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x28 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x28 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x2C "SECCTRW11D_0,"
hexmask.long.word 0x2C 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x2C 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x2C 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x2C 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x2C 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x2C 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x30 "SECCTRW12D_0,"
hexmask.long.word 0x30 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x30 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x30 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x30 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x30 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x30 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x34 "SECCTRW13D_0,"
hexmask.long.word 0x34 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x34 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x34 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x34 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x34 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x34 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x38 "SECCTRW14D_0,"
hexmask.long.word 0x38 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x38 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x38 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x38 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x38 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x38 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x3C "SECCTRW15D_0,"
hexmask.long.word 0x3C 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x3C 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x3C 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x3C 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x3C 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x3C 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
group.long 0x20A0++0x7
line.long 0x0 "ICUSECCAUSE_0,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "LOCK,If secure error is detected  this bit is set to 1." "0,1"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "SECERR_R,If secure error of read port is detected  this bit is set to 1." "0,1"
newline
bitfld.long 0x0 0. "SECERR_W,If secure error of write port is detected  this bit is set to 1." "0,1"
line.long 0x4 "ICUSAFCAUSE_0,"
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x4 16. "LOCK,If safety error is detected  this bit is set to 1." "0,1"
newline
hexmask.long.word 0x4 2.--15. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x4 1. "SAFERR_R,If safety error of read port is detected  this bit is set to 1." "0,1"
newline
bitfld.long 0x4 0. "SAFERR_W,If safety error of write port is detected  this bit is set to 1." "0,1"
rgroup.long 0x20A8++0xF
line.long 0x0 "ICUSECERRINF0_0,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long 0x0 0.--28. 1. "SECERRID,Secure error axid"
line.long 0x4 "ICUSECERRINF1_0,"
hexmask.long 0x4 0.--31. 1. "SECERRADDR,Secure error axaddr [31:0]"
line.long 0x8 "ICUSAFERRINF0_0,"
bitfld.long 0x8 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long 0x8 0.--28. 1. "SAFERRID,Transaction ID that caused safety error."
line.long 0xC "ICUSAFERRINF1_0,"
hexmask.long 0xC 0.--31. 1. "SAFERRADDR,Address offset of transaction that caused safety error."
group.long 0x2104++0x3
line.long 0x0 "ICUERRBUSCAUSE_0,"
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x0 9. "EDC_RD_TAGRAM_DBIT,1:EDC dual bits error of read data of TAGRAM" "?,1: EDC dual bits error of read data of TAGRAM"
newline
bitfld.long 0x0 8. "EDC_RD_SRAMBANK_DBIT,1:EDC dual bits error of read data of SRAMBANK" "?,1: EDC dual bits error of read data of SRAMBANK"
newline
bitfld.long 0x0 7. "EDC_REGIF,1:EDC error of signals between APB_CLK and AXI_CLK domain in REGIF" "?,1: EDC error of signals between APB_CLK and AXI_CLK.."
newline
bitfld.long 0x0 6. "EDC_RD_TAGRAM,1:EDC error of read data of TAGRAM" "?,1: EDC error of read data of TAGRAM"
newline
bitfld.long 0x0 5. "EDC_RD_SRAMBANK,1:EDC error of read data of SRAMBANK" "?,1: EDC error of read data of SRAMBANK"
newline
bitfld.long 0x0 4. "EDC_PW,1:BUS EDC error of APB write data" "?,1: BUS EDC error of APB write data"
newline
bitfld.long 0x0 3. "EDC_PA,1:BUS EDC error of APB address" "?,1: BUS EDC error of APB address"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x2200++0x3
line.long 0x0 "MEM_INIT_0,Note-1: if CPG.RTSRAMCR.INRAM is set to 1. the memory initialization process also runs at the negate of the reset for RT-SRAM(CPG.SRST2[15] is set to 1. then SRSTCLR2[15] is set to 1)."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "INIT,(*1)" "0: idle,1: running initialization"
group.long 0x2314++0x3
line.long 0x0 "ICUDUPERRCAUSE_0,"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "ERR_INTER_CON,1:DCLS error at APB~AXI domain connection or SRAM connection" "?,1: DCLS error at APB~AXI domain connection or SRAM.."
newline
bitfld.long 0x0 3. "ERR_OTHER_PORTS,1:DCLS error at other I/F signals" "?,1: DCLS error at other I/F signals"
newline
bitfld.long 0x0 2. "ERR_AXI_INI,1:DCLS error at AXI initiator I/F signals" "?,1: DCLS error at AXI initiator I/F signals"
newline
bitfld.long 0x0 1. "ERR_AXI_TGT,1:DCLS error at AXI target I/F signals" "?,1: DCLS error at AXI target I/F signals"
newline
bitfld.long 0x0 0. "ERR_APB,1:DCLS error at APB I/F signals" "?,1: DCLS error at APB I/F signals"
group.long 0x2334++0x3
line.long 0x0 "ICUTIMEOUT_ERR_0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "TOERR,If timeout error is detected  this bit is set to 1." "0,1"
group.long 0x2348++0x3
line.long 0x0 "ICUCRC_ERRCAUSE_0,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "Lock,If CRC error is detected  this bit is set to 1." "0,1"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "CRCERR,If CRC error is detected  this bit is set to 1." "0,1"
rgroup.long 0x234C++0x3
line.long 0x0 "ICUCRC_ERRVADDR_0,"
hexmask.long 0x0 0.--31. 1. "ERR_VADDR_31_0,Address[39:8] of transaction that caused CRC error."
group.long 0x2404++0x3
line.long 0x0 "ICUDUMMY_ERROR_0,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "DUPLEX,Forced ERR_STRAM_ICU_DUPLEX notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 4. "SEC,Forced ERR_STRAM_ICU_SEC notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 3. "SAFE,Forced ERR_STRAM_ICU_SAFE notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 2. "EDC_RAM_DBIT,Forced ERR_STRAM_ICU_EDC_RAM_DBIT notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 1. "EDC_RAM,Forced ERR_STRAM_ICU_EDC_RAM notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 0. "EDC_BUS,Forced ERR_STRAM_ICU_EDC_BUS notification signal assertion" "0: disable,1: enable"
group.long 0x250C++0x3
line.long 0x0 "SCRAMBLE_CFG_0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x0 7. "AREA7EN,It shall be set to 0." "0,1"
newline
bitfld.long 0x0 6. "AREA6EN,Specifies scramble enable for 7th 4M-byte area " "0: disable,1: enable"
newline
bitfld.long 0x0 5. "AREA5EN,Specifies scramble enable for 6th 4M-byte area " "0: disable,1: enable"
newline
bitfld.long 0x0 4. "AREA4EN,Specifies scramble enable for 5th 4M-byte area " "0: disable,1: enable"
newline
bitfld.long 0x0 3. "AREA3EN,Specifies scramble enable for 4th 4M-byte area " "0: disable,1: enable"
newline
bitfld.long 0x0 2. "AREA2EN,Specifies scramble enable for 3rd 4M-byte area " "0: disable,1: enable"
newline
bitfld.long 0x0 1. "AREA1EN,Specifies scramble enable for 2nd 4M-byte area " "0: disable,1: enable"
newline
bitfld.long 0x0 0. "AREA0EN,Specifies scramble enable for 1st 4M-byte area " "0: disable,1: enable"
wgroup.long 0x2510++0x17
line.long 0x0 "SCRAMBLE_KEY0_0,"
hexmask.long 0x0 0.--31. 1. "KEY0,Specifies private key [31:0]"
line.long 0x4 "SCRAMBLE_KEY1_0,"
hexmask.long 0x4 0.--31. 1. "KEY1,Specifies private key [63:32]"
line.long 0x8 "SCRAMBLE_KEY2_0,"
hexmask.long 0x8 0.--31. 1. "KEY2,Specifies private key [95:64]"
line.long 0xC "SCRAMBLE_KEY3_0,"
hexmask.long 0xC 0.--31. 1. "KEY3,Specifies private key [127:96]"
line.long 0x10 "SCRAMBLE_NONCE0_0,"
hexmask.long 0x10 0.--31. 1. "NONCE0,Specifies Nonce [31:0]"
line.long 0x14 "SCRAMBLE_NONCE1_0,"
hexmask.long 0x14 0.--31. 1. "NONCE1,Specifies Nonce [63:32]"
group.long 0x4080++0x7
line.long 0x0 "SECCAUSE_0,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "LOCK,If secure error is detected  this bit is set to 1." "0,1"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "SECERR_R,If secure error of read port is detected  this bit is set to 1." "0,1"
newline
bitfld.long 0x0 0. "SECERR_W,If secure error of write port is detected  this bit is set to 1." "0,1"
line.long 0x4 "SAFCAUSE_0,"
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x4 16. "LOCK,If safety error is detected  this bit is set to 1." "0,1"
newline
hexmask.long.word 0x4 2.--15. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x4 1. "SAFERR_R,If safety error of read port is detected  this bit is set to 1." "0,1"
newline
bitfld.long 0x4 0. "SAFERR_W,If safety error of write port is detected  this bit is set to 1." "0,1"
rgroup.long 0x4088++0xF
line.long 0x0 "SECERRINF0_0,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long 0x0 0.--28. 1. "SECERRID,Transaction ID that caused secure error."
line.long 0x4 "SECERRINF1_0,"
hexmask.long 0x4 0.--31. 1. "SECERRADDR,Address offset of transaction that caused secure error."
line.long 0x8 "SAFERRINF0_0,"
bitfld.long 0x8 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long 0x8 0.--28. 1. "SAFERRID,Transaction ID that caused safety error."
line.long 0xC "SAFERRINF1_0,"
hexmask.long 0xC 0.--31. 1. "SAFERRADDR,Address offset of transaction that caused safety error."
group.long 0x4100++0x3
line.long 0x0 "ERRBUSCAUSE_0,"
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x0 9. "EDC_RD_TAGRAM_DBIT,1:EDC dual bits error of read data of TAGRAM" "?,1: EDC dual bits error of read data of TAGRAM"
newline
bitfld.long 0x0 8. "EDC_RD_SRAMBANK_DBIT,1:EDC dual bits error of read data of SRAMBANK" "?,1: EDC dual bits error of read data of SRAMBANK"
newline
bitfld.long 0x0 7. "EDC_REGIF,1:EDC error of signals between APB_CLK and AXI_CLK domain in REGIF" "?,1: EDC error of signals between APB_CLK and AXI_CLK.."
newline
bitfld.long 0x0 6. "EDC_RD_TAGRAM,1:EDC error of read data of TAGRAM" "?,1: EDC error of read data of TAGRAM"
newline
bitfld.long 0x0 5. "EDC_RD_SRAMBANK,1:EDC error of read data of SRAMBANK" "?,1: EDC error of read data of SRAMBANK"
newline
bitfld.long 0x0 4. "EDC_PW,1:BUS EDC error of APB write data" "?,1: BUS EDC error of APB write data"
newline
bitfld.long 0x0 3. "EDC_PA,1:BUS EDC error of APB address" "?,1: BUS EDC error of APB address"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x4110++0x3
line.long 0x0 "EDC_CFG_0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "EN_DETECT,1: enable EDC detection" "0: Disable EDC detection,1: enable EDC detection"
group.long 0x4210++0x7
line.long 0x0 "EX_ADR_MASKL_0,"
hexmask.long 0x0 0.--31. 1. "EXADRMSKL,Address compare mask of exclusive access(1: compare)"
line.long 0x4 "EX_ADR_MASKU_0,"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "EXADRMSKH,Address compare mask of exclusive access(1: compare)"
group.long 0x4300++0x3
line.long 0x0 "DUPERRCONT_0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "EN_DETECT,1: enable DCLS comparison" "0: Disable DCLS comparison,1: enable DCLS comparison"
group.long 0x4310++0x3
line.long 0x0 "DUPERRCAUSE_0,"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "ERR_INTER_CON,1:DCLS error at APB~AXI domain connection or SRAM connection" "?,1: DCLS error at APB~AXI domain connection or SRAM.."
newline
bitfld.long 0x0 3. "ERR_OTHER_PORTS,1:DCLS error at other I/F signals" "?,1: DCLS error at other I/F signals"
newline
bitfld.long 0x0 2. "ERR_AXI_INI,1:DCLS error at AXI initiator I/F signals" "?,1: DCLS error at AXI initiator I/F signals"
newline
bitfld.long 0x0 1. "ERR_AXI_TGT,1:DCLS error at AXI target I/F signals" "?,1: DCLS error at AXI target I/F signals"
newline
bitfld.long 0x0 0. "ERR_APB,1:DCLS error at APB I/F signals" "?,1: DCLS error at APB I/F signals"
group.long 0x4330++0x3
line.long 0x0 "TIMEOUT_ERR_0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "TOERR,If timeout error is detected  this bit is set to 1." "0,1"
group.long 0x4340++0x3
line.long 0x0 "CRC_ERRCAUSE_0,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "Lock,If CRC error is detected  this bit is set to 1." "0,1"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "CRCERR,If CRC error is detected  this bit is set to 1." "0,1"
rgroup.long 0x4344++0x3
line.long 0x0 "CRC_ERRVADDR_0,"
hexmask.long 0x0 0.--31. 1. "ERR_VADDR_31_0,Address[39:8] of transaction that caused CRC error."
group.long 0x4350++0x3
line.long 0x0 "AXIINI_ERRCAUSE_0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "UNKNOWNID,If RT-SRAM receives unknown ID which RT-SRAM doesn't issue  this bit is set to 1." "0,1"
newline
bitfld.long 0x0 0. "ERRRESP,If RT-SRAM receives error response from ANMM  this bit is set to 1." "0,1"
group.long 0x4400++0x3
line.long 0x0 "DUMMY_ERROR_0,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x0 7. "TIMEOUT,Forced ERR_RTSRAM_TIMEOUT notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 6. "EXT,Forced ERR_RTSRAM_EXT notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 5. "DUPLEX,Forced ERR_RTSRAM_DUPLEX notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 4. "SEC,Forced ERR_RTSRAM_SEC notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 3. "SAFE,Forced ERR_RTSRAM_SAFE notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 2. "EDC_RAM_DBIT,Forced ERR_RTSRAM_EDC_RAM_DBIT notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 1. "EDC_RAM,Forced ERR_RTSRAM_EDC_RAM notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 0. "EDC_BUS,Forced ERR_RTSRAM_EDC_BUS notification signal assertion" "0: disable,1: enable"
group.long 0x4408++0x3
line.long 0x0 "FAULT_INJECTION_0,"
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x0 18. "DMY_ERR_AXIINI_ERRRSP,1:fault injection to detect error response from ANMM" "0: fault injection disable,1: fault injection to detect error response from ANMM"
newline
bitfld.long 0x0 17. "DMY_EDC_RD_TAGRAM_DBIT,1:fault injection to EDC dual bits error checker of TAGRAM" "0: fault injection disable,1: fault injection to EDC dual bits error checker.."
newline
bitfld.long 0x0 16. "DMY_EDC_RD_SRAMBANK_DBIT,1:fault injection to EDC dual bits error checker of SRAMBANK" "0: fault injection disable,1: fault injection to EDC dual bits error checker.."
newline
bitfld.long 0x0 15. "DMY_ERR_AXIINI_UNKID,1:fault injection to detect unknown ID" "0: fault injection disable,1: fault injection to detect unknown ID"
newline
bitfld.long 0x0 14. "DMY_ERR_TIMEOUT_TOERR,1:fault injection to timeout detection" "0: fault injection disable,1: fault injection to timeout detection"
newline
bitfld.long 0x0 13. "DMY_ERR_CRC_CRCERR,1:fault injection to CRC checker of CRCERR" "0: fault injection disable,1: fault injection to CRC checker of CRCERR"
newline
bitfld.long 0x0 12. "DMY_ERR_INTER_CON,1:fault injection to DCLS comparator of ERR_INTER_CON" "0: fault injection disable,1: fault injection to DCLS comparator of.."
newline
bitfld.long 0x0 11. "DMY_ERR_OTHER_PORTS,1:fault injection to DCLS comparator of ERR_OTHER_PORTS" "0: fault injection disable,1: fault injection to DCLS comparator of.."
newline
bitfld.long 0x0 10. "DMY_ERR_AXI_INI,1:fault injection to DCLS comparator of ERR_AXI_INI" "0: fault injection disable,1: fault injection to DCLS comparator of ERR_AXI_INI"
newline
bitfld.long 0x0 9. "DMY_ERR_AXI_TGT,1:fault injection to DCLS comparator of ERR_AXI_TGT" "0: fault injection disable,1: fault injection to DCLS comparator of ERR_AXI_TGT"
newline
bitfld.long 0x0 8. "DMY_ERR_APB,1:fault injection to DCLS comparator of DUPERRCAUSE.ERR_APB" "0: fault injection disable,1: fault injection to DCLS comparator of DUPERRCAUSE"
newline
bitfld.long 0x0 7. "DMY_EDC_REGIF,1:fault injection to EDC checker of signals between APB_CLK and AXI_CLK domain in REGIF" "0: fault injection disable,1: fault injection to EDC checker of signals.."
newline
bitfld.long 0x0 6. "DMY_EDC_RD_TAGRAM,1:fault injection to EDC checker of TAGRAM" "0: fault injection disable,1: fault injection to EDC checker of TAGRAM"
newline
bitfld.long 0x0 5. "DMY_EDC_RD_SRAMBANK,1:fault injection to EDC checker of SRAMBANK" "0: fault injection disable,1: fault injection to EDC checker of SRAMBANK"
newline
bitfld.long 0x0 4. "DMY_EDC_PW,1:fault injection to EDC checker of APB write data" "0: fault injection disable,1: fault injection to EDC checker of APB write data"
newline
bitfld.long 0x0 3. "DMY_EDC_PA,1:fault injection to EDC checker of APB address" "0: fault injection disable,1: fault injection to EDC checker of APB address"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x4528++0xB
line.long 0x0 "TIMEOUT_CFG_0,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.word 0x0 8.--23. 1. "THRESHOLD,Specifies a threshold of timeout detection [15:0]."
newline
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "EN_DETECT,Specifies timeout detection enable " "0: disable,1: enable"
line.long 0x4 "AXIINI_CFG_0,"
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "EN_ERRDETECT,AXI initiator related error detection enable(receive error response or unknown ID)" "0: disable,1: enable"
line.long 0x8 "CACHE_FLUSH_0,"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x8 8.--11. 1. "AREA_IDX,Index of protection area where flush operation is performed. The area is specified by SECDIV[n]D registers."
newline
hexmask.long.byte 0x8 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x8 0. "FLUSH,(*1)" "0,1"
group.long 0x6504++0x7
line.long 0x0 "VBUF_CFG_0,"
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "CACHE_MODE,Specifies the number of way " "0: 4-way,1: 8-way"
newline
hexmask.long.byte 0x0 3.--7. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 0.--2. "VBUF_SIZE_2_0,Specifies size of the virtual buffer " "0: 4M,1: 8M,2: 12M,3: 16M,4: 20M,5: 24M,6: 28M,7: setting prohibited"
line.long 0x4 "CRC_CFG_0,"
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "EN_CRC,Specifies CRC enable " "0: disable,1: enable"
group.long 0x8500++0x3
line.long 0x0 "EXT_MODE_0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "MODE,Specifies buffer mode " "0: compatible mode,1: extended mode"
group.long 0xA534++0x3
line.long 0x0 "CACHE_DEGRADE_0,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "TAGINVLD,(*1)" "0,1"
group.long 0xC580++0x1B
line.long 0x0 "VBUF_BADDR0_0,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x0 0.--23. 1. "BASE_ADDR_23_0,Base address of 1st 4M-byte area of virtual buffer[39:16]"
line.long 0x4 "VBUF_BADDR1_0,"
hexmask.long.byte 0x4 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x4 0.--23. 1. "BASE_ADDR_23_0,Base address of 2nd 4M-byte area of virtual buffer[39:16]"
line.long 0x8 "VBUF_BADDR2_0,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x8 0.--23. 1. "BASE_ADDR_23_0,Base address of 3rd 4M-byte area of virtual buffer[39:16]"
line.long 0xC "VBUF_BADDR3_0,"
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0xC 0.--23. 1. "BASE_ADDR_23_0,Base address of 4th 4M-byte area of virtual buffer[39:16]"
line.long 0x10 "VBUF_BADDR4_0,"
hexmask.long.byte 0x10 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x10 0.--23. 1. "BASE_ADDR_23_0,Base address of 5th 4M-byte area of virtual buffer[39:16]"
line.long 0x14 "VBUF_BADDR5_0,"
hexmask.long.byte 0x14 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x14 0.--23. 1. "BASE_ADDR_23_0,Base address of 6th 4M-byte area of virtual buffer[39:16]"
line.long 0x18 "VBUF_BADDR6_0,"
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x18 0.--23. 1. "BASE_ADDR_23_0,Base address of 7th 4M-byte area of virtual buffer[39:16]"
tree.end
tree "RTVRAM_1"
base ad:0xFFEC0000
group.long 0x0++0x3B
line.long 0x0 "SECDIV0D_1,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x0 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x4 "SECDIV1D_1,"
hexmask.long.word 0x4 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x4 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x8 "SECDIV2D_1,"
hexmask.long.word 0x8 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x8 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0xC "SECDIV3D_1,"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0xC 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x10 "SECDIV4D_1,"
hexmask.long.word 0x10 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x10 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x14 "SECDIV5D_1,"
hexmask.long.word 0x14 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x14 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x18 "SECDIV6D_1,"
hexmask.long.word 0x18 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x18 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x1C "SECDIV7D_1,"
hexmask.long.word 0x1C 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x1C 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x20 "SECDIV8D_1,"
hexmask.long.word 0x20 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x20 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x24 "SECDIV9D_1,"
hexmask.long.word 0x24 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x24 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x28 "SECDIV10D_1,"
hexmask.long.word 0x28 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x28 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x2C "SECDIV11D_1,"
hexmask.long.word 0x2C 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x2C 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x30 "SECDIV12D_1,"
hexmask.long.word 0x30 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x30 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x34 "SECDIV13D_1,"
hexmask.long.word 0x34 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x34 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
line.long 0x38 "SECDIV14D_1,"
hexmask.long.word 0x38 20.--31. 1. "Reserved_20,Reserved"
newline
hexmask.long.tbyte 0x38 0.--19. 1. "DIVADDR_31_12,Protection division address offset [31:12] is set."
group.long 0x40++0x3F
line.long 0x0 "SECCTRR0D_1,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x0 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x0 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x4 "SECCTRR1D_1,"
hexmask.long.word 0x4 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x4 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x4 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x4 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x8 "SECCTRR2D_1,"
hexmask.long.word 0x8 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x8 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x8 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x8 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x8 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0xC "SECCTRR3D_1,"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0xC 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0xC 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0xC 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0xC 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x10 "SECCTRR4D_1,"
hexmask.long.word 0x10 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x10 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x10 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x10 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x14 "SECCTRR5D_1,"
hexmask.long.word 0x14 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x14 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x14 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x14 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x14 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x18 "SECCTRR6D_1,"
hexmask.long.word 0x18 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x18 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x18 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x18 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x18 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x1C "SECCTRR7D_1,"
hexmask.long.word 0x1C 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x1C 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x1C 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x1C 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x1C 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x20 "SECCTRR8D_1,"
hexmask.long.word 0x20 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x20 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x20 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x20 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x20 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x24 "SECCTRR9D_1,"
hexmask.long.word 0x24 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x24 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x24 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x24 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x24 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x28 "SECCTRR10D_1,"
hexmask.long.word 0x28 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x28 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x28 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x28 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x28 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x2C "SECCTRR11D_1,"
hexmask.long.word 0x2C 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x2C 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x2C 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x2C 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x2C 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x30 "SECCTRR12D_1,"
hexmask.long.word 0x30 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x30 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x30 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x30 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x30 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x34 "SECCTRR13D_1,"
hexmask.long.word 0x34 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x34 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x34 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x34 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x34 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x38 "SECCTRR14D_1,"
hexmask.long.word 0x38 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x38 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x38 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x38 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x38 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x3C "SECCTRR15D_1,"
hexmask.long.word 0x3C 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x3C 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x3C 18. "SECG1RP,Public Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
rbitfld.long 0x3C 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x3C 16. "SECG3RP,Secure Group Read Privilege Setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 15. "SAFG0RP,Region15 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 14. "SAFG1RP,Region14 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 13. "SAFG2RP,Region13 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 12. "SAFG3RP,Region12 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 11. "SAFG4RP,Region11 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 10. "SAFG5RP,Region10 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 9. "SAFG6RP,Region9 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 8. "SAFG7RP,Region8 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 7. "SAFG8RP,Region7 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 6. "SAFG9RP,Region6 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 5. "SAFG10RP,Region5 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 4. "SAFG11RP,Region4 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 3. "SAFG12RP,Region3 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 2. "SAFG13RP,Region2 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 1. "SAFG14RP,Region1 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 0. "SAFG15RP,Region0 Group Register Read Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
group.long 0x340++0x3F
line.long 0x0 "SECCTRW0D_1,"
hexmask.long.word 0x0 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x0 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x0 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x0 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x0 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x0 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x4 "SECCTRW1D_1,"
hexmask.long.word 0x4 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x4 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x4 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x4 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x4 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x4 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x4 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x8 "SECCTRW2D_1,"
hexmask.long.word 0x8 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x8 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x8 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x8 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x8 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x8 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x8 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0xC "SECCTRW3D_1,"
hexmask.long.word 0xC 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0xC 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0xC 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0xC 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0xC 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0xC 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0xC 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x10 "SECCTRW4D_1,"
hexmask.long.word 0x10 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x10 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x10 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x10 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x10 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x10 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x10 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x14 "SECCTRW5D_1,"
hexmask.long.word 0x14 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x14 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x14 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x14 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x14 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x14 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x14 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x18 "SECCTRW6D_1,"
hexmask.long.word 0x18 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x18 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x18 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x18 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x18 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x18 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x18 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x1C "SECCTRW7D_1,"
hexmask.long.word 0x1C 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x1C 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x1C 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x1C 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x1C 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x1C 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x1C 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x20 "SECCTRW8D_1,"
hexmask.long.word 0x20 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x20 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x20 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x20 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x20 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x20 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x20 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x24 "SECCTRW9D_1,"
hexmask.long.word 0x24 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x24 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x24 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x24 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x24 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x24 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x24 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x28 "SECCTRW10D_1,"
hexmask.long.word 0x28 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x28 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x28 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x28 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x28 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x28 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x28 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x2C "SECCTRW11D_1,"
hexmask.long.word 0x2C 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x2C 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x2C 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x2C 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x2C 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x2C 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x2C 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x30 "SECCTRW12D_1,"
hexmask.long.word 0x30 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x30 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x30 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x30 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x30 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x30 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x30 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x34 "SECCTRW13D_1,"
hexmask.long.word 0x34 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x34 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x34 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x34 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x34 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x34 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x34 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x38 "SECCTRW14D_1,"
hexmask.long.word 0x38 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x38 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x38 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x38 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x38 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x38 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x38 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
line.long 0x3C "SECCTRW15D_1,"
hexmask.long.word 0x3C 20.--31. 1. "Reserved_20,Reserved"
newline
rbitfld.long 0x3C 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x3C 18. "SECG1WP,Public Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
rbitfld.long 0x3C 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.long 0x3C 16. "SECG3WP,Secure Group Write Privilege Setting" "0: Has the privilege to Write to the relevant..,1: Does not have the privilege Write to the.."
newline
bitfld.long 0x3C 15. "SAFG0WP,Region15 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 14. "SAFG1WP,Region14 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 13. "SAFG2WP,Region13 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 12. "SAFG3WP,Region12 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 11. "SAFG4WP,Region11 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 10. "SAFG5WP,Region10 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 9. "SAFG6WP,Region9 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 8. "SAFG7WP,Region8 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 7. "SAFG8WP,Region7 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 6. "SAFG9WP,Region6 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 5. "SAFG10WP,Region5 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 4. "SAFG11WP,Region4 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 3. "SAFG12WP,Region3 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 2. "SAFG13WP,Region2 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 1. "SAFG14WP,Region1 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
newline
bitfld.long 0x3C 0. "SAFG15WP,Region0 Group Register Write Privilege setting" "0: Has the privilege to read to the relevant..,1: Does not have the privilege read to the relevant.."
group.long 0x20A0++0x7
line.long 0x0 "ICUSECCAUSE_1,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "LOCK,If secure error is detected  this bit is set to 1." "0,1"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "SECERR_R,If secure error of read port is detected  this bit is set to 1." "0,1"
newline
bitfld.long 0x0 0. "SECERR_W,If secure error of write port is detected  this bit is set to 1." "0,1"
line.long 0x4 "ICUSAFCAUSE_1,"
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x4 16. "LOCK,If safety error is detected  this bit is set to 1." "0,1"
newline
hexmask.long.word 0x4 2.--15. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x4 1. "SAFERR_R,If safety error of read port is detected  this bit is set to 1." "0,1"
newline
bitfld.long 0x4 0. "SAFERR_W,If safety error of write port is detected  this bit is set to 1." "0,1"
rgroup.long 0x20A8++0xF
line.long 0x0 "ICUSECERRINF0_1,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long 0x0 0.--28. 1. "SECERRID,Secure error axid"
line.long 0x4 "ICUSECERRINF1_1,"
hexmask.long 0x4 0.--31. 1. "SECERRADDR,Secure error axaddr [31:0]"
line.long 0x8 "ICUSAFERRINF0_1,"
bitfld.long 0x8 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long 0x8 0.--28. 1. "SAFERRID,Transaction ID that caused safety error."
line.long 0xC "ICUSAFERRINF1_1,"
hexmask.long 0xC 0.--31. 1. "SAFERRADDR,Address offset of transaction that caused safety error."
group.long 0x2104++0x3
line.long 0x0 "ICUERRBUSCAUSE_1,"
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x0 9. "EDC_RD_TAGRAM_DBIT,1:EDC dual bits error of read data of TAGRAM" "?,1: EDC dual bits error of read data of TAGRAM"
newline
bitfld.long 0x0 8. "EDC_RD_SRAMBANK_DBIT,1:EDC dual bits error of read data of SRAMBANK" "?,1: EDC dual bits error of read data of SRAMBANK"
newline
bitfld.long 0x0 7. "EDC_REGIF,1:EDC error of signals between APB_CLK and AXI_CLK domain in REGIF" "?,1: EDC error of signals between APB_CLK and AXI_CLK.."
newline
bitfld.long 0x0 6. "EDC_RD_TAGRAM,1:EDC error of read data of TAGRAM" "?,1: EDC error of read data of TAGRAM"
newline
bitfld.long 0x0 5. "EDC_RD_SRAMBANK,1:EDC error of read data of SRAMBANK" "?,1: EDC error of read data of SRAMBANK"
newline
bitfld.long 0x0 4. "EDC_PW,1:BUS EDC error of APB write data" "?,1: BUS EDC error of APB write data"
newline
bitfld.long 0x0 3. "EDC_PA,1:BUS EDC error of APB address" "?,1: BUS EDC error of APB address"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x2200++0x3
line.long 0x0 "MEM_INIT_1,Note-1: if CPG.RTSRAMCR.INRAM is set to 1. the memory initialization process also runs at the negate of the reset for RT-SRAM(CPG.SRST2[15] is set to 1. then SRSTCLR2[15] is set to 1)."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "INIT,(*1)" "0: idle,1: running initialization"
group.long 0x2314++0x3
line.long 0x0 "ICUDUPERRCAUSE_1,"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "ERR_INTER_CON,1:DCLS error at APB~AXI domain connection or SRAM connection" "?,1: DCLS error at APB~AXI domain connection or SRAM.."
newline
bitfld.long 0x0 3. "ERR_OTHER_PORTS,1:DCLS error at other I/F signals" "?,1: DCLS error at other I/F signals"
newline
bitfld.long 0x0 2. "ERR_AXI_INI,1:DCLS error at AXI initiator I/F signals" "?,1: DCLS error at AXI initiator I/F signals"
newline
bitfld.long 0x0 1. "ERR_AXI_TGT,1:DCLS error at AXI target I/F signals" "?,1: DCLS error at AXI target I/F signals"
newline
bitfld.long 0x0 0. "ERR_APB,1:DCLS error at APB I/F signals" "?,1: DCLS error at APB I/F signals"
group.long 0x2334++0x3
line.long 0x0 "ICUTIMEOUT_ERR_1,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "TOERR,If timeout error is detected  this bit is set to 1." "0,1"
group.long 0x2348++0x3
line.long 0x0 "ICUCRC_ERRCAUSE_1,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "Lock,If CRC error is detected  this bit is set to 1." "0,1"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "CRCERR,If CRC error is detected  this bit is set to 1." "0,1"
rgroup.long 0x234C++0x3
line.long 0x0 "ICUCRC_ERRVADDR_1,"
hexmask.long 0x0 0.--31. 1. "ERR_VADDR_31_0,Address[39:8] of transaction that caused CRC error."
group.long 0x2404++0x3
line.long 0x0 "ICUDUMMY_ERROR_1,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "DUPLEX,Forced ERR_STRAM_ICU_DUPLEX notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 4. "SEC,Forced ERR_STRAM_ICU_SEC notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 3. "SAFE,Forced ERR_STRAM_ICU_SAFE notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 2. "EDC_RAM_DBIT,Forced ERR_STRAM_ICU_EDC_RAM_DBIT notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 1. "EDC_RAM,Forced ERR_STRAM_ICU_EDC_RAM notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 0. "EDC_BUS,Forced ERR_STRAM_ICU_EDC_BUS notification signal assertion" "0: disable,1: enable"
group.long 0x250C++0x3
line.long 0x0 "SCRAMBLE_CFG_1,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x0 7. "AREA7EN,It shall be set to 0." "0,1"
newline
bitfld.long 0x0 6. "AREA6EN,Specifies scramble enable for 7th 4M-byte area " "0: disable,1: enable"
newline
bitfld.long 0x0 5. "AREA5EN,Specifies scramble enable for 6th 4M-byte area " "0: disable,1: enable"
newline
bitfld.long 0x0 4. "AREA4EN,Specifies scramble enable for 5th 4M-byte area " "0: disable,1: enable"
newline
bitfld.long 0x0 3. "AREA3EN,Specifies scramble enable for 4th 4M-byte area " "0: disable,1: enable"
newline
bitfld.long 0x0 2. "AREA2EN,Specifies scramble enable for 3rd 4M-byte area " "0: disable,1: enable"
newline
bitfld.long 0x0 1. "AREA1EN,Specifies scramble enable for 2nd 4M-byte area " "0: disable,1: enable"
newline
bitfld.long 0x0 0. "AREA0EN,Specifies scramble enable for 1st 4M-byte area " "0: disable,1: enable"
wgroup.long 0x2510++0x17
line.long 0x0 "SCRAMBLE_KEY0_1,"
hexmask.long 0x0 0.--31. 1. "KEY0,Specifies private key [31:0]"
line.long 0x4 "SCRAMBLE_KEY1_1,"
hexmask.long 0x4 0.--31. 1. "KEY1,Specifies private key [63:32]"
line.long 0x8 "SCRAMBLE_KEY2_1,"
hexmask.long 0x8 0.--31. 1. "KEY2,Specifies private key [95:64]"
line.long 0xC "SCRAMBLE_KEY3_1,"
hexmask.long 0xC 0.--31. 1. "KEY3,Specifies private key [127:96]"
line.long 0x10 "SCRAMBLE_NONCE0_1,"
hexmask.long 0x10 0.--31. 1. "NONCE0,Specifies Nonce [31:0]"
line.long 0x14 "SCRAMBLE_NONCE1_1,"
hexmask.long 0x14 0.--31. 1. "NONCE1,Specifies Nonce [63:32]"
group.long 0x4080++0x7
line.long 0x0 "SECCAUSE_1,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "LOCK,If secure error is detected  this bit is set to 1." "0,1"
newline
hexmask.long.word 0x0 2.--15. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "SECERR_R,If secure error of read port is detected  this bit is set to 1." "0,1"
newline
bitfld.long 0x0 0. "SECERR_W,If secure error of write port is detected  this bit is set to 1." "0,1"
line.long 0x4 "SAFCAUSE_1,"
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x4 16. "LOCK,If safety error is detected  this bit is set to 1." "0,1"
newline
hexmask.long.word 0x4 2.--15. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x4 1. "SAFERR_R,If safety error of read port is detected  this bit is set to 1." "0,1"
newline
bitfld.long 0x4 0. "SAFERR_W,If safety error of write port is detected  this bit is set to 1." "0,1"
rgroup.long 0x4088++0xF
line.long 0x0 "SECERRINF0_1,"
bitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long 0x0 0.--28. 1. "SECERRID,Transaction ID that caused secure error."
line.long 0x4 "SECERRINF1_1,"
hexmask.long 0x4 0.--31. 1. "SECERRADDR,Address offset of transaction that caused secure error."
line.long 0x8 "SAFERRINF0_1,"
bitfld.long 0x8 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
hexmask.long 0x8 0.--28. 1. "SAFERRID,Transaction ID that caused safety error."
line.long 0xC "SAFERRINF1_1,"
hexmask.long 0xC 0.--31. 1. "SAFERRADDR,Address offset of transaction that caused safety error."
group.long 0x4100++0x3
line.long 0x0 "ERRBUSCAUSE_1,"
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x0 9. "EDC_RD_TAGRAM_DBIT,1:EDC dual bits error of read data of TAGRAM" "?,1: EDC dual bits error of read data of TAGRAM"
newline
bitfld.long 0x0 8. "EDC_RD_SRAMBANK_DBIT,1:EDC dual bits error of read data of SRAMBANK" "?,1: EDC dual bits error of read data of SRAMBANK"
newline
bitfld.long 0x0 7. "EDC_REGIF,1:EDC error of signals between APB_CLK and AXI_CLK domain in REGIF" "?,1: EDC error of signals between APB_CLK and AXI_CLK.."
newline
bitfld.long 0x0 6. "EDC_RD_TAGRAM,1:EDC error of read data of TAGRAM" "?,1: EDC error of read data of TAGRAM"
newline
bitfld.long 0x0 5. "EDC_RD_SRAMBANK,1:EDC error of read data of SRAMBANK" "?,1: EDC error of read data of SRAMBANK"
newline
bitfld.long 0x0 4. "EDC_PW,1:BUS EDC error of APB write data" "?,1: BUS EDC error of APB write data"
newline
bitfld.long 0x0 3. "EDC_PA,1:BUS EDC error of APB address" "?,1: BUS EDC error of APB address"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x4110++0x3
line.long 0x0 "EDC_CFG_1,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "EN_DETECT,1: enable EDC detection" "0: Disable EDC detection,1: enable EDC detection"
group.long 0x4210++0x7
line.long 0x0 "EX_ADR_MASKL_1,"
hexmask.long 0x0 0.--31. 1. "EXADRMSKL,Address compare mask of exclusive access(1: compare)"
line.long 0x4 "EX_ADR_MASKU_1,"
hexmask.long.tbyte 0x4 8.--31. 1. "Reserved_8,Reserved"
newline
hexmask.long.byte 0x4 0.--7. 1. "EXADRMSKH,Address compare mask of exclusive access(1: compare)"
group.long 0x4300++0x3
line.long 0x0 "DUPERRCONT_1,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "EN_DETECT,1: enable DCLS comparison" "0: Disable DCLS comparison,1: enable DCLS comparison"
group.long 0x4310++0x3
line.long 0x0 "DUPERRCAUSE_1,"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
newline
bitfld.long 0x0 4. "ERR_INTER_CON,1:DCLS error at APB~AXI domain connection or SRAM connection" "?,1: DCLS error at APB~AXI domain connection or SRAM.."
newline
bitfld.long 0x0 3. "ERR_OTHER_PORTS,1:DCLS error at other I/F signals" "?,1: DCLS error at other I/F signals"
newline
bitfld.long 0x0 2. "ERR_AXI_INI,1:DCLS error at AXI initiator I/F signals" "?,1: DCLS error at AXI initiator I/F signals"
newline
bitfld.long 0x0 1. "ERR_AXI_TGT,1:DCLS error at AXI target I/F signals" "?,1: DCLS error at AXI target I/F signals"
newline
bitfld.long 0x0 0. "ERR_APB,1:DCLS error at APB I/F signals" "?,1: DCLS error at APB I/F signals"
group.long 0x4330++0x3
line.long 0x0 "TIMEOUT_ERR_1,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "TOERR,If timeout error is detected  this bit is set to 1." "0,1"
group.long 0x4340++0x3
line.long 0x0 "CRC_ERRCAUSE_1,"
hexmask.long.word 0x0 17.--31. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "Lock,If CRC error is detected  this bit is set to 1." "0,1"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "CRCERR,If CRC error is detected  this bit is set to 1." "0,1"
rgroup.long 0x4344++0x3
line.long 0x0 "CRC_ERRVADDR_1,"
hexmask.long 0x0 0.--31. 1. "ERR_VADDR_31_0,Address[39:8] of transaction that caused CRC error."
group.long 0x4350++0x3
line.long 0x0 "AXIINI_ERRCAUSE_1,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x0 1. "UNKNOWNID,If RT-SRAM receives unknown ID which RT-SRAM doesn't issue  this bit is set to 1." "0,1"
newline
bitfld.long 0x0 0. "ERRRESP,If RT-SRAM receives error response from ANMM  this bit is set to 1." "0,1"
group.long 0x4400++0x3
line.long 0x0 "DUMMY_ERROR_1,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x0 7. "TIMEOUT,Forced ERR_RTSRAM_TIMEOUT notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 6. "EXT,Forced ERR_RTSRAM_EXT notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 5. "DUPLEX,Forced ERR_RTSRAM_DUPLEX notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 4. "SEC,Forced ERR_RTSRAM_SEC notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 3. "SAFE,Forced ERR_RTSRAM_SAFE notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 2. "EDC_RAM_DBIT,Forced ERR_RTSRAM_EDC_RAM_DBIT notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 1. "EDC_RAM,Forced ERR_RTSRAM_EDC_RAM notification signal assertion" "0: disable,1: enable"
newline
bitfld.long 0x0 0. "EDC_BUS,Forced ERR_RTSRAM_EDC_BUS notification signal assertion" "0: disable,1: enable"
group.long 0x4408++0x3
line.long 0x0 "FAULT_INJECTION_1,"
hexmask.long.word 0x0 19.--31. 1. "Reserved_19,Reserved"
newline
bitfld.long 0x0 18. "DMY_ERR_AXIINI_ERRRSP,1:fault injection to detect error response from ANMM" "0: fault injection disable,1: fault injection to detect error response from ANMM"
newline
bitfld.long 0x0 17. "DMY_EDC_RD_TAGRAM_DBIT,1:fault injection to EDC dual bits error checker of TAGRAM" "0: fault injection disable,1: fault injection to EDC dual bits error checker.."
newline
bitfld.long 0x0 16. "DMY_EDC_RD_SRAMBANK_DBIT,1:fault injection to EDC dual bits error checker of SRAMBANK" "0: fault injection disable,1: fault injection to EDC dual bits error checker.."
newline
bitfld.long 0x0 15. "DMY_ERR_AXIINI_UNKID,1:fault injection to detect unknown ID" "0: fault injection disable,1: fault injection to detect unknown ID"
newline
bitfld.long 0x0 14. "DMY_ERR_TIMEOUT_TOERR,1:fault injection to timeout detection" "0: fault injection disable,1: fault injection to timeout detection"
newline
bitfld.long 0x0 13. "DMY_ERR_CRC_CRCERR,1:fault injection to CRC checker of CRCERR" "0: fault injection disable,1: fault injection to CRC checker of CRCERR"
newline
bitfld.long 0x0 12. "DMY_ERR_INTER_CON,1:fault injection to DCLS comparator of ERR_INTER_CON" "0: fault injection disable,1: fault injection to DCLS comparator of.."
newline
bitfld.long 0x0 11. "DMY_ERR_OTHER_PORTS,1:fault injection to DCLS comparator of ERR_OTHER_PORTS" "0: fault injection disable,1: fault injection to DCLS comparator of.."
newline
bitfld.long 0x0 10. "DMY_ERR_AXI_INI,1:fault injection to DCLS comparator of ERR_AXI_INI" "0: fault injection disable,1: fault injection to DCLS comparator of ERR_AXI_INI"
newline
bitfld.long 0x0 9. "DMY_ERR_AXI_TGT,1:fault injection to DCLS comparator of ERR_AXI_TGT" "0: fault injection disable,1: fault injection to DCLS comparator of ERR_AXI_TGT"
newline
bitfld.long 0x0 8. "DMY_ERR_APB,1:fault injection to DCLS comparator of DUPERRCAUSE.ERR_APB" "0: fault injection disable,1: fault injection to DCLS comparator of DUPERRCAUSE"
newline
bitfld.long 0x0 7. "DMY_EDC_REGIF,1:fault injection to EDC checker of signals between APB_CLK and AXI_CLK domain in REGIF" "0: fault injection disable,1: fault injection to EDC checker of signals.."
newline
bitfld.long 0x0 6. "DMY_EDC_RD_TAGRAM,1:fault injection to EDC checker of TAGRAM" "0: fault injection disable,1: fault injection to EDC checker of TAGRAM"
newline
bitfld.long 0x0 5. "DMY_EDC_RD_SRAMBANK,1:fault injection to EDC checker of SRAMBANK" "0: fault injection disable,1: fault injection to EDC checker of SRAMBANK"
newline
bitfld.long 0x0 4. "DMY_EDC_PW,1:fault injection to EDC checker of APB write data" "0: fault injection disable,1: fault injection to EDC checker of APB write data"
newline
bitfld.long 0x0 3. "DMY_EDC_PA,1:fault injection to EDC checker of APB address" "0: fault injection disable,1: fault injection to EDC checker of APB address"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0x4528++0xB
line.long 0x0 "TIMEOUT_CFG_1,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.word 0x0 8.--23. 1. "THRESHOLD,Specifies a threshold of timeout detection [15:0]."
newline
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "EN_DETECT,Specifies timeout detection enable " "0: disable,1: enable"
line.long 0x4 "AXIINI_CFG_1,"
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "EN_ERRDETECT,AXI initiator related error detection enable(receive error response or unknown ID)" "0: disable,1: enable"
line.long 0x8 "CACHE_FLUSH_1,"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
newline
hexmask.long.byte 0x8 8.--11. 1. "AREA_IDX,Index of protection area where flush operation is performed. The area is specified by SECDIV[n]D registers."
newline
hexmask.long.byte 0x8 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x8 0. "FLUSH,(*1)" "0,1"
group.long 0x6504++0x7
line.long 0x0 "VBUF_CFG_1,"
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "CACHE_MODE,Specifies the number of way " "0: 4-way,1: 8-way"
newline
hexmask.long.byte 0x0 3.--7. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 0.--2. "VBUF_SIZE_2_0,Specifies size of the virtual buffer " "0: 4M,1: 8M,2: 12M,3: 16M,4: 20M,5: 24M,6: 28M,7: setting prohibited"
line.long 0x4 "CRC_CFG_1,"
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "EN_CRC,Specifies CRC enable " "0: disable,1: enable"
group.long 0x8500++0x3
line.long 0x0 "EXT_MODE_1,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "MODE,Specifies buffer mode " "0: compatible mode,1: extended mode"
group.long 0xA534++0x3
line.long 0x0 "CACHE_DEGRADE_1,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "TAGINVLD,(*1)" "0,1"
group.long 0xC580++0x1B
line.long 0x0 "VBUF_BADDR0_1,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x0 0.--23. 1. "BASE_ADDR_23_0,Base address of 1st 4M-byte area of virtual buffer[39:16]"
line.long 0x4 "VBUF_BADDR1_1,"
hexmask.long.byte 0x4 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x4 0.--23. 1. "BASE_ADDR_23_0,Base address of 2nd 4M-byte area of virtual buffer[39:16]"
line.long 0x8 "VBUF_BADDR2_1,"
hexmask.long.byte 0x8 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x8 0.--23. 1. "BASE_ADDR_23_0,Base address of 3rd 4M-byte area of virtual buffer[39:16]"
line.long 0xC "VBUF_BADDR3_1,"
hexmask.long.byte 0xC 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0xC 0.--23. 1. "BASE_ADDR_23_0,Base address of 4th 4M-byte area of virtual buffer[39:16]"
line.long 0x10 "VBUF_BADDR4_1,"
hexmask.long.byte 0x10 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x10 0.--23. 1. "BASE_ADDR_23_0,Base address of 5th 4M-byte area of virtual buffer[39:16]"
line.long 0x14 "VBUF_BADDR5_1,"
hexmask.long.byte 0x14 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x14 0.--23. 1. "BASE_ADDR_23_0,Base address of 6th 4M-byte area of virtual buffer[39:16]"
line.long 0x18 "VBUF_BADDR6_1,"
hexmask.long.byte 0x18 24.--31. 1. "Reserved_24,Reserved"
newline
hexmask.long.tbyte 0x18 0.--23. 1. "BASE_ADDR_23_0,Base address of 7th 4M-byte area of virtual buffer[39:16]"
tree.end
tree.end
tree "SDHI (SD Card/MMC Interface)"
base ad:0x0
tree "SDHI_0"
base ad:0xEE140000
group.quad 0x0++0x7
line.quad 0x0 "SD_CMD,1.0"
hexmask.quad 0x0 16.--63. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "MD7,Multiple Block Transfer Mode (enabled at multiple block transfer)" "0: CMD12 is automatically issued at multiple block..,1: CMD12 is not automatically issued at multiple.."
newline
bitfld.quad 0x0 14. "MD6,Refer to MD7 Bit Description" "0,1"
newline
bitfld.quad 0x0 13. "MD5,Single/Multiple Block Transfer (enabled when the command with data is handled)" "0: Single block transfer,1: Multi block transfer"
newline
bitfld.quad 0x0 12. "MD4,Write/Read Mode (enabled when the command with data is handled)" "0: Write,1: Read"
newline
bitfld.quad 0x0 11. "MD3,Data Mode (Command Type)" "0: Command without data transfer,1: Command with data transfer"
newline
bitfld.quad 0x0 10. "MD2,Mode/Response Type" "0: Normal mode,1: Setting prohibited"
newline
bitfld.quad 0x0 9. "MD1,Refer to MD2 Bit Description" "0,1"
newline
bitfld.quad 0x0 8. "MD0,Refer to MD2 Bit Description" "0,1"
newline
bitfld.quad 0x0 7. "C1,{C1 C0}" "0: CMD,1: ACMD"
newline
bitfld.quad 0x0 6. "C0,Refer to C1 Bit Description" "0,1"
newline
bitfld.quad 0x0 5. "CF45,Command Index" "0,1"
newline
bitfld.quad 0x0 4. "CF44,Refer to CF45 Bit Description" "0,1"
newline
bitfld.quad 0x0 3. "CF43,Refer to CF45 Bit Description" "0,1"
newline
bitfld.quad 0x0 2. "CF42,Refer to CF45 Bit Description" "0,1"
newline
bitfld.quad 0x0 1. "CF41,Refer to CF45 Bit Description" "0,1"
newline
bitfld.quad 0x0 0. "CF40,Refer to CF45 Bit Description" "0,1"
group.quad 0x0++0x7
line.quad 0x0 "SD_CMD__16_LL,1.0"
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "MD7,Multiple Block Transfer Mode (enabled at multiple block transfer)" "0: CMD12 is automatically issued at multiple block..,1: CMD12 is not automatically issued at multiple.."
newline
bitfld.quad 0x0 14. "MD6,Refer to MD7 Bit Description" "0,1"
newline
bitfld.quad 0x0 13. "MD5,Single/Multiple Block Transfer (enabled when the command with data is handled)" "0: Single block transfer,1: Multi block transfer"
newline
bitfld.quad 0x0 12. "MD4,Write/Read Mode (enabled when the command with data is handled)" "0: Write,1: Read"
newline
bitfld.quad 0x0 11. "MD3,Data Mode (Command Type)" "0: Command without data transfer,1: Command with data transfer"
newline
bitfld.quad 0x0 10. "MD2,Mode/Response Type" "0: Normal mode,1: Setting prohibited"
newline
bitfld.quad 0x0 9. "MD1,Refer to MD2 Bit Description" "0,1"
newline
bitfld.quad 0x0 8. "MD0,Refer to MD2 Bit Description" "0,1"
newline
bitfld.quad 0x0 7. "C1,{C1 C0}" "0: CMD,1: ACMD"
newline
bitfld.quad 0x0 6. "C0,Refer to C1 Bit Description" "0,1"
newline
bitfld.quad 0x0 5. "CF45,Command Index" "0,1"
newline
bitfld.quad 0x0 4. "CF44,Refer to CF45 Bit Description" "0,1"
newline
bitfld.quad 0x0 3. "CF43,Refer to CF45 Bit Description" "0,1"
newline
bitfld.quad 0x0 2. "CF42,Refer to CF45 Bit Description" "0,1"
newline
bitfld.quad 0x0 1. "CF41,Refer to CF45 Bit Description" "0,1"
newline
bitfld.quad 0x0 0. "CF40,Refer to CF45 Bit Description" "0,1"
rgroup.quad 0x0++0x7
line.quad 0x0 "SD_CMD__16_LH,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 13. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 12. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 11. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 10. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved14,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved15,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved16,Reserved" "0,1"
rgroup.quad 0x0++0x7
line.quad 0x0 "SD_CMD__16_HL,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 13. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 12. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 11. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 10. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved14,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved15,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved16,Reserved" "0,1"
rgroup.quad 0x0++0x7
line.quad 0x0 "SD_CMD__16_HH,1.0"
hexmask.quad.word 0x0 48.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.long 0x0 16.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 13. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 12. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 11. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 10. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved14,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved15,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved16,Reserved" "0,1"
group.quad 0x0++0x7
line.quad 0x0 "SD_CMD__32_L,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "MD7,Multiple Block Transfer Mode (enabled at multiple block transfer)" "0: CMD12 is automatically issued at multiple block..,1: CMD12 is not automatically issued at multiple.."
newline
bitfld.quad 0x0 14. "MD6,Refer to MD7 Bit Description" "0,1"
newline
bitfld.quad 0x0 13. "MD5,Single/Multiple Block Transfer (enabled when the command with data is handled)" "0: Single block transfer,1: Multi block transfer"
newline
bitfld.quad 0x0 12. "MD4,Write/Read Mode (enabled when the command with data is handled)" "0: Write,1: Read"
newline
bitfld.quad 0x0 11. "MD3,Data Mode (Command Type)" "0: Command without data transfer,1: Command with data transfer"
newline
bitfld.quad 0x0 10. "MD2,Mode/Response Type" "0: Normal mode,1: Setting prohibited"
newline
bitfld.quad 0x0 9. "MD1,Refer to MD2 Bit Description" "0,1"
newline
bitfld.quad 0x0 8. "MD0,Refer to MD2 Bit Description" "0,1"
newline
bitfld.quad 0x0 7. "C1,{C1 C0}" "0: CMD,1: ACMD"
newline
bitfld.quad 0x0 6. "C0,Refer to C1 Bit Description" "0,1"
newline
bitfld.quad 0x0 5. "CF45,Command Index" "0,1"
newline
bitfld.quad 0x0 4. "CF44,Refer to CF45 Bit Description" "0,1"
newline
bitfld.quad 0x0 3. "CF43,Refer to CF45 Bit Description" "0,1"
newline
bitfld.quad 0x0 2. "CF42,Refer to CF45 Bit Description" "0,1"
newline
bitfld.quad 0x0 1. "CF41,Refer to CF45 Bit Description" "0,1"
newline
bitfld.quad 0x0 0. "CF40,Refer to CF45 Bit Description" "0,1"
rgroup.quad 0x0++0x7
line.quad 0x0 "SD_CMD__32_H,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 13. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 12. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 11. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 10. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved14,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved15,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved16,Reserved" "0,1"
group.quad 0x8++0x7
line.quad 0x0 "SD_PORTSEL,The port select register (SD_PORTSEL) selects the ports for SD cards."
hexmask.quad 0x0 12.--63. 1. "Reserved_12,Reserved bits"
newline
rbitfld.quad 0x0 10.--11. "Reserved_10,Reserved bits" "0,1,2,3"
newline
rbitfld.quad 0x0 9. "NP1,Number of ports supported for SD cards" "?,1: One port"
newline
rbitfld.quad 0x0 8. "NP0,Refer to NP1 Bit Description" "0,1"
newline
hexmask.quad.byte 0x0 4.--7. 1. "Reserved_4,Reserved bits"
newline
hexmask.quad.byte 0x0 0.--3. 1. "Reserved_0,Reserved"
group.quad 0x8++0x7
line.quad 0x0 "SD_PORTSEL__16_LL,The port select register (SD_PORTSEL) selects the ports for SD cards."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.byte 0x0 12.--15. 1. "Reserved_12,Reserved bits"
newline
rbitfld.quad 0x0 10.--11. "Reserved_10,Reserved bits" "0,1,2,3"
newline
rbitfld.quad 0x0 9. "NP1,Number of ports supported for SD cards" "?,1: One port"
newline
rbitfld.quad 0x0 8. "NP0,Refer to NP1 Bit Description" "0,1"
newline
hexmask.quad.byte 0x0 4.--7. 1. "Reserved_4,Reserved bits"
newline
hexmask.quad.byte 0x0 0.--3. 1. "Reserved_0,Reserved"
rgroup.quad 0x8++0x7
line.quad 0x0 "SD_PORTSEL__16_LH,The port select register (SD_PORTSEL) selects the ports for SD cards."
hexmask.quad.long 0x0 32.--63. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_12,Reserved bits"
newline
hexmask.quad.byte 0x0 12.--15. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 10.--11. "Reserved2,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 9. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved4,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 4.--7. 1. "Reserved5,Reserved"
newline
hexmask.quad.byte 0x0 0.--3. 1. "Reserved6,Reserved"
rgroup.quad 0x8++0x7
line.quad 0x0 "SD_PORTSEL__16_HL,The port select register (SD_PORTSEL) selects the ports for SD cards."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_12,Reserved bits"
newline
hexmask.quad.tbyte 0x0 12.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 10.--11. "Reserved1,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 9. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved3,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 4.--7. 1. "Reserved4,Reserved"
newline
hexmask.quad.byte 0x0 0.--3. 1. "Reserved5,Reserved"
rgroup.quad 0x8++0x7
line.quad 0x0 "SD_PORTSEL__16_HH,The port select register (SD_PORTSEL) selects the ports for SD cards."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_12,Reserved bits"
newline
hexmask.quad 0x0 12.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 10.--11. "Reserved1,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 9. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved3,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 4.--7. 1. "Reserved4,Reserved"
newline
hexmask.quad.byte 0x0 0.--3. 1. "Reserved5,Reserved"
group.quad 0x8++0x7
line.quad 0x0 "SD_PORTSEL__32_L,The port select register (SD_PORTSEL) selects the ports for SD cards."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved bits"
newline
rbitfld.quad 0x0 10.--11. "Reserved_10,Reserved bits" "0,1,2,3"
newline
rbitfld.quad 0x0 9. "NP1,Number of ports supported for SD cards" "?,1: One port"
newline
rbitfld.quad 0x0 8. "NP0,Refer to NP1 Bit Description" "0,1"
newline
hexmask.quad.byte 0x0 4.--7. 1. "Reserved_4,Reserved bits"
newline
hexmask.quad.byte 0x0 0.--3. 1. "Reserved_0,Reserved"
rgroup.quad 0x8++0x7
line.quad 0x0 "SD_PORTSEL__32_H,The port select register (SD_PORTSEL) selects the ports for SD cards."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_12,Reserved bits"
newline
hexmask.quad.tbyte 0x0 12.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 10.--11. "Reserved1,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 9. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved3,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 4.--7. 1. "Reserved4,Reserved"
newline
hexmask.quad.byte 0x0 0.--3. 1. "Reserved5,Reserved"
group.quad 0x10++0xF
line.quad 0x0 "SD_ARG,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Fixed 0"
newline
hexmask.quad.long 0x0 0.--31. 1. "CF,Set command format[39:8] (argument)."
line.quad 0x8 "SD_ARG1,1.0"
hexmask.quad 0x8 16.--63. 1. "Reserved_16,Fixed 0"
newline
hexmask.quad.word 0x8 0.--15. 1. "CF,Set command format[39:24] (argument)."
group.quad 0x18++0x7
line.quad 0x0 "SD_ARG1__16_LL,1.0"
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "CF,Set command format[39:24] (argument)."
rgroup.quad 0x18++0x7
line.quad 0x0 "SD_ARG1__16_LH,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Fixed 0"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x18++0x7
line.quad 0x0 "SD_ARG1__16_HL,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Fixed 0"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x18++0x7
line.quad 0x0 "SD_ARG1__16_HH,1.0"
hexmask.quad.word 0x0 48.--63. 1. "Reserved_16,Fixed 0"
newline
hexmask.quad.long 0x0 16.--47. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
group.quad 0x18++0x7
line.quad 0x0 "SD_ARG1__32_L,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Fixed 0"
newline
hexmask.quad.word 0x0 0.--15. 1. "CF,Set command format[39:24] (argument)."
rgroup.quad 0x18++0x7
line.quad 0x0 "SD_ARG1__32_H,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Fixed 0"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
group.quad 0x18++0x7
line.quad 0x0 "SD_ARG__16_LL,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "CF,Set command format[39:8] (argument)."
group.quad 0x18++0x7
line.quad 0x0 "SD_ARG__16_LH,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "CF,Set command format[39:8] (argument)."
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x18++0x7
line.quad 0x0 "SD_ARG__16_HL,1.0"
hexmask.quad.word 0x0 48.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved_32,Fixed 0"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
rgroup.quad 0x18++0x7
line.quad 0x0 "SD_ARG__16_HH,1.0"
hexmask.quad.word 0x0 48.--63. 1. "Reserved_32,Fixed 0"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
group.quad 0x18++0x7
line.quad 0x0 "SD_ARG__32_L,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 0.--31. 1. "CF,Set command format[39:8] (argument)."
rgroup.quad 0x18++0x7
line.quad 0x0 "SD_ARG__32_H,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Fixed 0"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
group.quad 0x20++0x7
line.quad 0x0 "SD_STOP,The data stop register (SD_STOP) is used to enable or disable block counting at multiple block transfer. and to control the issuing of CMD12 within command sequences."
hexmask.quad 0x0 19.--63. 1. "Reserved_19,Reserved bits"
newline
bitfld.quad 0x0 18. "Reserved_18,Reserved" "0,1"
newline
bitfld.quad 0x0 17. "HPIMODE,HPI Mode Enable" "0: Disables HPI mode,1: Enables HPI mode"
newline
bitfld.quad 0x0 16. "HPICMD,HPI Command Issue" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved_9,Reserved bits"
newline
bitfld.quad 0x0 8. "SEC,Block Count Enable" "0: Disables SD_SECCNT setting value,1: Enables SD_SECCNT setting value"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "STP,Stop" "0,1"
group.quad 0x20++0x7
line.quad 0x0 "SD_STOP__16_LL,The data stop register (SD_STOP) is used to enable or disable block counting at multiple block transfer. and to control the issuing of CMD12 within command sequences."
hexmask.quad 0x0 19.--63. 1. "Reserved0,Reserved"
newline
rbitfld.quad 0x0 18. "Reserved1,Reserved" "0,1"
newline
rbitfld.quad 0x0 17. "Reserved2,Reserved" "0,1"
newline
rbitfld.quad 0x0 16. "Reserved3,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved_9,Reserved bits"
newline
bitfld.quad 0x0 8. "SEC,Block Count Enable" "0: Disables SD_SECCNT setting value,1: Enables SD_SECCNT setting value"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "STP,Stop" "0,1"
group.quad 0x20++0x7
line.quad 0x0 "SD_STOP__16_LH,The data stop register (SD_STOP) is used to enable or disable block counting at multiple block transfer. and to control the issuing of CMD12 within command sequences."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 19.--31. 1. "Reserved_19,Reserved bits"
newline
bitfld.quad 0x0 18. "Reserved_18,Reserved" "0,1"
newline
bitfld.quad 0x0 17. "HPIMODE,HPI Mode Enable" "0: Disables HPI mode,1: Enables HPI mode"
newline
bitfld.quad 0x0 16. "HPICMD,HPI Command Issue" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved4,Reserved"
newline
rbitfld.quad 0x0 8. "Reserved5,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved6,Reserved"
newline
rbitfld.quad 0x0 0. "Reserved7,Reserved" "0,1"
rgroup.quad 0x20++0x7
line.quad 0x0 "SD_STOP__16_HL,The data stop register (SD_STOP) is used to enable or disable block counting at multiple block transfer. and to control the issuing of CMD12 within command sequences."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_19,Reserved bits"
newline
hexmask.quad.word 0x0 19.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 18. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 17. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "Reserved3,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved4,Reserved"
newline
bitfld.quad 0x0 8. "Reserved5,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved6,Reserved"
newline
bitfld.quad 0x0 0. "Reserved7,Reserved" "0,1"
rgroup.quad 0x20++0x7
line.quad 0x0 "SD_STOP__16_HH,The data stop register (SD_STOP) is used to enable or disable block counting at multiple block transfer. and to control the issuing of CMD12 within command sequences."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_19,Reserved bits"
newline
hexmask.quad.long 0x0 19.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 18. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 17. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "Reserved3,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved4,Reserved"
newline
bitfld.quad 0x0 8. "Reserved5,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved6,Reserved"
newline
bitfld.quad 0x0 0. "Reserved7,Reserved" "0,1"
group.quad 0x20++0x7
line.quad 0x0 "SD_STOP__32_L,The data stop register (SD_STOP) is used to enable or disable block counting at multiple block transfer. and to control the issuing of CMD12 within command sequences."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 19.--31. 1. "Reserved_19,Reserved bits"
newline
bitfld.quad 0x0 18. "Reserved_18,Reserved" "0,1"
newline
bitfld.quad 0x0 17. "HPIMODE,HPI Mode Enable" "0: Disables HPI mode,1: Enables HPI mode"
newline
bitfld.quad 0x0 16. "HPICMD,HPI Command Issue" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved_9,Reserved bits"
newline
bitfld.quad 0x0 8. "SEC,Block Count Enable" "0: Disables SD_SECCNT setting value,1: Enables SD_SECCNT setting value"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "STP,Stop" "0,1"
rgroup.quad 0x20++0x7
line.quad 0x0 "SD_STOP__32_H,The data stop register (SD_STOP) is used to enable or disable block counting at multiple block transfer. and to control the issuing of CMD12 within command sequences."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_19,Reserved bits"
newline
hexmask.quad.word 0x0 19.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 18. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 17. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "Reserved3,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved4,Reserved"
newline
bitfld.quad 0x0 8. "Reserved5,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved6,Reserved"
newline
bitfld.quad 0x0 0. "Reserved7,Reserved" "0,1"
group.quad 0x28++0x7
line.quad 0x0 "SD_SECCNT,The block count register (SD_SECCNT) is used to specify the number of transfer blocks at multiple block transfer."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "CNT,Number of Transfer Blocks"
group.quad 0x28++0x7
line.quad 0x0 "SD_SECCNT__16_LL,The block count register (SD_SECCNT) is used to specify the number of transfer blocks at multiple block transfer."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "CNT,Number of Transfer Blocks"
group.quad 0x28++0x7
line.quad 0x0 "SD_SECCNT__16_LH,The block count register (SD_SECCNT) is used to specify the number of transfer blocks at multiple block transfer."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "CNT,Number of Transfer Blocks"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x28++0x7
line.quad 0x0 "SD_SECCNT__16_HL,The block count register (SD_SECCNT) is used to specify the number of transfer blocks at multiple block transfer."
hexmask.quad.word 0x0 48.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
rgroup.quad 0x28++0x7
line.quad 0x0 "SD_SECCNT__16_HH,The block count register (SD_SECCNT) is used to specify the number of transfer blocks at multiple block transfer."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
group.quad 0x28++0x7
line.quad 0x0 "SD_SECCNT__32_L,The block count register (SD_SECCNT) is used to specify the number of transfer blocks at multiple block transfer."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 0.--31. 1. "CNT,Number of Transfer Blocks"
rgroup.quad 0x28++0xF
line.quad 0x0 "SD_SECCNT__32_H,The block count register (SD_SECCNT) is used to specify the number of transfer blocks at multiple block transfer."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
line.quad 0x8 "SD_RSP10,The SD card response registers (SD_RSP) hold the response from the SD card."
hexmask.quad 0x8 0.--63. 1. "R,Hold the response from the SD card"
rgroup.quad 0x30++0x7
line.quad 0x0 "SD_RSP10__16_LL,The SD card response registers (SD_RSP) hold the response from the SD card."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "R,Hold the response from the SD card"
rgroup.quad 0x30++0x7
line.quad 0x0 "SD_RSP10__16_LH,The SD card response registers (SD_RSP) hold the response from the SD card."
hexmask.quad.long 0x0 32.--63. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "R,Hold the response from the SD card"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved0,Reserved"
rgroup.quad 0x30++0x7
line.quad 0x0 "SD_RSP10__16_HL,The SD card response registers (SD_RSP) hold the response from the SD card."
hexmask.quad.long 0x0 32.--63. 1. "R,Hold the response from the SD card"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved0,Reserved"
rgroup.quad 0x30++0x7
line.quad 0x0 "SD_RSP10__16_HH,The SD card response registers (SD_RSP) hold the response from the SD card."
hexmask.quad.word 0x0 48.--63. 1. "R,Hold the response from the SD card"
newline
hexmask.quad 0x0 0.--47. 1. "Reserved0,Reserved"
rgroup.quad 0x30++0x7
line.quad 0x0 "SD_RSP10__32_L,The SD card response registers (SD_RSP) hold the response from the SD card."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 0.--31. 1. "R,Hold the response from the SD card"
rgroup.quad 0x30++0xF
line.quad 0x0 "SD_RSP10__32_H,The SD card response registers (SD_RSP) hold the response from the SD card."
hexmask.quad.long 0x0 32.--63. 1. "R,Hold the response from the SD card"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved0,Reserved"
line.quad 0x8 "SD_RSP1,The SD card response registers (SD_RSP) hold the response from the SD card. (Mirror of SD_RSP10[31:16])"
hexmask.quad 0x8 16.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x8 0.--15. 1. "R,Hold the response from the SD card"
rgroup.quad 0x38++0x7
line.quad 0x0 "SD_RSP1__16_LL,The SD card response registers (SD_RSP) hold the response from the SD card. (Mirror of SD_RSP10[31:16])"
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "R,Hold the response from the SD card"
rgroup.quad 0x38++0x7
line.quad 0x0 "SD_RSP1__16_LH,The SD card response registers (SD_RSP) hold the response from the SD card. (Mirror of SD_RSP10[31:16])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x38++0x7
line.quad 0x0 "SD_RSP1__16_HL,The SD card response registers (SD_RSP) hold the response from the SD card. (Mirror of SD_RSP10[31:16])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x38++0x7
line.quad 0x0 "SD_RSP1__16_HH,The SD card response registers (SD_RSP) hold the response from the SD card. (Mirror of SD_RSP10[31:16])"
hexmask.quad.word 0x0 48.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.long 0x0 16.--47. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x38++0x7
line.quad 0x0 "SD_RSP1__32_L,The SD card response registers (SD_RSP) hold the response from the SD card. (Mirror of SD_RSP10[31:16])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 0.--15. 1. "R,Hold the response from the SD card"
rgroup.quad 0x38++0xF
line.quad 0x0 "SD_RSP1__32_H,The SD card response registers (SD_RSP) hold the response from the SD card. (Mirror of SD_RSP10[31:16])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
line.quad 0x8 "SD_RSP32,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP10[63:32])"
hexmask.quad.long 0x8 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x8 0.--31. 1. "R,Hold the response from the SD card"
rgroup.quad 0x40++0x7
line.quad 0x0 "SD_RSP32__16_LL,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP10[63:32])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "R,Hold the response from the SD card"
rgroup.quad 0x40++0x7
line.quad 0x0 "SD_RSP32__16_LH,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP10[63:32])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "R,Hold the response from the SD card"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x40++0x7
line.quad 0x0 "SD_RSP32__16_HL,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP10[63:32])"
hexmask.quad.word 0x0 48.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
rgroup.quad 0x40++0x7
line.quad 0x0 "SD_RSP32__16_HH,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP10[63:32])"
hexmask.quad.word 0x0 48.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
rgroup.quad 0x40++0x7
line.quad 0x0 "SD_RSP32__32_L,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP10[63:32])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 0.--31. 1. "R,Hold the response from the SD card"
rgroup.quad 0x40++0xF
line.quad 0x0 "SD_RSP32__32_H,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP10[63:32])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
line.quad 0x8 "SD_RSP3,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP32[31:16])"
hexmask.quad 0x8 16.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x8 0.--15. 1. "R,Hold the response from the SD card"
rgroup.quad 0x48++0x7
line.quad 0x0 "SD_RSP3__16_LL,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP32[31:16])"
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "R,Hold the response from the SD card"
rgroup.quad 0x48++0x7
line.quad 0x0 "SD_RSP3__16_LH,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP32[31:16])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x48++0x7
line.quad 0x0 "SD_RSP3__16_HL,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP32[31:16])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x48++0x7
line.quad 0x0 "SD_RSP3__16_HH,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP32[31:16])"
hexmask.quad.word 0x0 48.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.long 0x0 16.--47. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x48++0x7
line.quad 0x0 "SD_RSP3__32_L,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP32[31:16])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 0.--15. 1. "R,Hold the response from the SD card"
rgroup.quad 0x48++0xF
line.quad 0x0 "SD_RSP3__32_H,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP32[31:16])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
line.quad 0x8 "SD_RSP54,The SD card response registers (SD_RSP) hold the response from the SD card."
hexmask.quad.byte 0x8 56.--63. 1. "Reserved_56,Reserved bits"
newline
hexmask.quad 0x8 0.--55. 1. "R,Hold the response from the SD card"
rgroup.quad 0x50++0x7
line.quad 0x0 "SD_RSP54__16_LL,The SD card response registers (SD_RSP) hold the response from the SD card."
hexmask.quad.byte 0x0 56.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad 0x0 16.--55. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "R,Hold the response from the SD card"
rgroup.quad 0x50++0x7
line.quad 0x0 "SD_RSP54__16_LH,The SD card response registers (SD_RSP) hold the response from the SD card."
hexmask.quad.byte 0x0 56.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.tbyte 0x0 32.--55. 1. "Reserved2,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "R,Hold the response from the SD card"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x50++0x7
line.quad 0x0 "SD_RSP54__16_HL,The SD card response registers (SD_RSP) hold the response from the SD card."
hexmask.quad.byte 0x0 56.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.tbyte 0x0 32.--55. 1. "R,Hold the response from the SD card"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
rgroup.quad 0x50++0x7
line.quad 0x0 "SD_RSP54__16_HH,The SD card response registers (SD_RSP) hold the response from the SD card."
hexmask.quad.byte 0x0 56.--63. 1. "Reserved_56,Reserved bits"
newline
hexmask.quad.byte 0x0 48.--55. 1. "R,Hold the response from the SD card"
newline
hexmask.quad 0x0 0.--47. 1. "Reserved1,Reserved"
rgroup.quad 0x50++0x7
line.quad 0x0 "SD_RSP54__32_L,The SD card response registers (SD_RSP) hold the response from the SD card."
hexmask.quad.byte 0x0 56.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.tbyte 0x0 32.--55. 1. "Reserved1,Reserved"
newline
hexmask.quad.long 0x0 0.--31. 1. "R,Hold the response from the SD card"
rgroup.quad 0x50++0xF
line.quad 0x0 "SD_RSP54__32_H,The SD card response registers (SD_RSP) hold the response from the SD card."
hexmask.quad.byte 0x0 56.--63. 1. "Reserved_56,Reserved bits"
newline
hexmask.quad.tbyte 0x0 32.--55. 1. "R,Hold the response from the SD card"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
line.quad 0x8 "SD_RSP5,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP54[31:16])"
hexmask.quad 0x8 16.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x8 0.--15. 1. "R,Hold the response from the SD card"
rgroup.quad 0x58++0x7
line.quad 0x0 "SD_RSP5__16_LL,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP54[31:16])"
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "R,Hold the response from the SD card"
rgroup.quad 0x58++0x7
line.quad 0x0 "SD_RSP5__16_LH,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP54[31:16])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x58++0x7
line.quad 0x0 "SD_RSP5__16_HL,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP54[31:16])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x58++0x7
line.quad 0x0 "SD_RSP5__16_HH,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP54[31:16])"
hexmask.quad.word 0x0 48.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.long 0x0 16.--47. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x58++0x7
line.quad 0x0 "SD_RSP5__32_L,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP54[31:16])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 0.--15. 1. "R,Hold the response from the SD card"
rgroup.quad 0x58++0xF
line.quad 0x0 "SD_RSP5__32_H,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP54[31:16])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
line.quad 0x8 "SD_RSP76,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP54[63:32])"
hexmask.quad 0x8 24.--63. 1. "Reserved_24,Reserved bits"
newline
hexmask.quad.tbyte 0x8 0.--23. 1. "R,Hold the response from the SD card"
rgroup.quad 0x60++0x7
line.quad 0x0 "SD_RSP76__16_LL,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP54[63:32])"
hexmask.quad 0x0 24.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.byte 0x0 16.--23. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "R,Hold the response from the SD card"
rgroup.quad 0x60++0x7
line.quad 0x0 "SD_RSP76__16_LH,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP54[63:32])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.byte 0x0 24.--31. 1. "Reserved_24,Reserved bits"
newline
hexmask.quad.byte 0x0 16.--23. 1. "R,Hold the response from the SD card"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x60++0x7
line.quad 0x0 "SD_RSP76__16_HL,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP54[63:32])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_24,Reserved bits"
newline
hexmask.quad.byte 0x0 24.--31. 1. "Reserved0,Reserved"
newline
hexmask.quad.tbyte 0x0 0.--23. 1. "Reserved1,Reserved"
rgroup.quad 0x60++0x7
line.quad 0x0 "SD_RSP76__16_HH,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP54[63:32])"
hexmask.quad.word 0x0 48.--63. 1. "Reserved_24,Reserved bits"
newline
hexmask.quad.tbyte 0x0 24.--47. 1. "Reserved0,Reserved"
newline
hexmask.quad.tbyte 0x0 0.--23. 1. "Reserved1,Reserved"
rgroup.quad 0x60++0x7
line.quad 0x0 "SD_RSP76__32_L,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP54[63:32])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.byte 0x0 24.--31. 1. "Reserved_24,Reserved bits"
newline
hexmask.quad.tbyte 0x0 0.--23. 1. "R,Hold the response from the SD card"
rgroup.quad 0x60++0xF
line.quad 0x0 "SD_RSP76__32_H,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP54[63:32])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_24,Reserved bits"
newline
hexmask.quad.byte 0x0 24.--31. 1. "Reserved0,Reserved"
newline
hexmask.quad.tbyte 0x0 0.--23. 1. "Reserved1,Reserved"
line.quad 0x8 "SD_RSP7,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP76[31:16])"
hexmask.quad 0x8 8.--63. 1. "Reserved_8,Reserved bits"
newline
hexmask.quad.byte 0x8 0.--7. 1. "R,Hold the response from the SD card"
rgroup.quad 0x68++0x7
line.quad 0x0 "SD_RSP7__16_LL,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP76[31:16])"
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.byte 0x0 8.--15. 1. "Reserved_8,Reserved bits"
newline
hexmask.quad.byte 0x0 0.--7. 1. "R,Hold the response from the SD card"
rgroup.quad 0x68++0x7
line.quad 0x0 "SD_RSP7__16_LH,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP76[31:16])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_8,Reserved bits"
newline
hexmask.quad.byte 0x0 8.--15. 1. "Reserved0,Reserved"
newline
hexmask.quad.byte 0x0 0.--7. 1. "Reserved2,Reserved"
rgroup.quad 0x68++0x7
line.quad 0x0 "SD_RSP7__16_HL,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP76[31:16])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_8,Reserved bits"
newline
hexmask.quad.tbyte 0x0 8.--31. 1. "Reserved0,Reserved"
newline
hexmask.quad.byte 0x0 0.--7. 1. "Reserved1,Reserved"
rgroup.quad 0x68++0x7
line.quad 0x0 "SD_RSP7__16_HH,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP76[31:16])"
hexmask.quad.word 0x0 48.--63. 1. "Reserved_8,Reserved bits"
newline
hexmask.quad 0x0 8.--47. 1. "Reserved0,Reserved"
newline
hexmask.quad.byte 0x0 0.--7. 1. "Reserved1,Reserved"
rgroup.quad 0x68++0x7
line.quad 0x0 "SD_RSP7__32_L,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP76[31:16])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved bits"
newline
hexmask.quad.byte 0x0 0.--7. 1. "R,Hold the response from the SD card"
rgroup.quad 0x68++0x7
line.quad 0x0 "SD_RSP7__32_H,The SD card response registers (SD_RSP) hold the response from the SD card.(Mirror of SD_RSP76[31:16])"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_8,Reserved bits"
newline
hexmask.quad.tbyte 0x0 8.--31. 1. "Reserved0,Reserved"
newline
hexmask.quad.byte 0x0 0.--7. 1. "Reserved1,Reserved"
group.quad 0x70++0x7
line.quad 0x0 "SD_INFO1,The SD card interrupt flag register 1 (SD_INFO1) indicates the response end and access end in the command sequence. This register also indicates the card detect/write protect state."
hexmask.quad 0x0 17.--63. 1. "Reserved_17,Reserved bits"
newline
bitfld.quad 0x0 16. "INFO90,Response Reception Completion" "0,1"
newline
hexmask.quad.byte 0x0 11.--15. 1. "Reserved_11,Reserved bits"
newline
rbitfld.quad 0x0 10. "INFO10,Indicates the SDDAT3 state." "0: SDDAT3 is set to 0,1: SDDAT3 is set to 1"
newline
bitfld.quad 0x0 9. "INFO91,SDDAT3 Card Insertion" "0,1"
newline
bitfld.quad 0x0 8. "INFO8,SDDAT3 Card Removal" "0,1"
newline
rbitfld.quad 0x0 7. "INFO7,Write Protect" "0: ISDWP is set to 1,1: ISDWP is set to 0"
newline
rbitfld.quad 0x0 6. "Reserved_6,Reserved bits" "0,1"
newline
rbitfld.quad 0x0 5. "INFO5,Indicates the ISDCD state." "0: Indicates that Mcycle has elapsed with ISDCD..,1: Indicates that Mcycle has elapsed with ISDCD.."
newline
bitfld.quad 0x0 4. "INFO4,ISDCD Card Insertion" "0,1"
newline
bitfld.quad 0x0 3. "INFO3,ISDCD Card Removal" "0,1"
newline
bitfld.quad 0x0 2. "INFO2,Access End" "0,1"
newline
rbitfld.quad 0x0 1. "Reserved_1,Reserved bits" "0,1"
newline
bitfld.quad 0x0 0. "INFO0,Response End" "0,1"
group.quad 0x70++0x7
line.quad 0x0 "SD_INFO1__16_LL,The SD card interrupt flag register 1 (SD_INFO1) indicates the response end and access end in the command sequence. This register also indicates the card detect/write protect state."
hexmask.quad 0x0 17.--63. 1. "Reserved0,Reserved"
newline
rbitfld.quad 0x0 16. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 11.--15. 1. "Reserved_11,Reserved bits"
newline
rbitfld.quad 0x0 10. "INFO10,Indicates the SDDAT3 state." "0: SDDAT3 is set to 0,1: SDDAT3 is set to 1"
newline
bitfld.quad 0x0 9. "INFO91,SDDAT3 Card Insertion" "0,1"
newline
bitfld.quad 0x0 8. "INFO8,SDDAT3 Card Removal" "0,1"
newline
rbitfld.quad 0x0 7. "INFO7,Write Protect" "0: ISDWP is set to 1,1: ISDWP is set to 0"
newline
rbitfld.quad 0x0 6. "Reserved_6,Reserved bits" "0,1"
newline
rbitfld.quad 0x0 5. "INFO5,Indicates the ISDCD state." "0: Indicates that Mcycle has elapsed with ISDCD..,1: Indicates that Mcycle has elapsed with ISDCD.."
newline
bitfld.quad 0x0 4. "INFO4,ISDCD Card Insertion" "0,1"
newline
bitfld.quad 0x0 3. "INFO3,ISDCD Card Removal" "0,1"
newline
bitfld.quad 0x0 2. "INFO2,Access End" "0,1"
newline
rbitfld.quad 0x0 1. "Reserved_1,Reserved bits" "0,1"
newline
bitfld.quad 0x0 0. "INFO0,Response End" "0,1"
group.quad 0x70++0x7
line.quad 0x0 "SD_INFO1__16_LH,The SD card interrupt flag register 1 (SD_INFO1) indicates the response end and access end in the command sequence. This register also indicates the card detect/write protect state."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 17.--31. 1. "Reserved_17,Reserved bits"
newline
bitfld.quad 0x0 16. "INFO90,Response Reception Completion" "0,1"
newline
hexmask.quad.byte 0x0 11.--15. 1. "Reserved2,Reserved"
newline
rbitfld.quad 0x0 10. "Reserved3,Reserved" "0,1"
newline
rbitfld.quad 0x0 9. "Reserved4,Reserved" "0,1"
newline
rbitfld.quad 0x0 8. "Reserved5,Reserved" "0,1"
newline
rbitfld.quad 0x0 7. "Reserved6,Reserved" "0,1"
newline
rbitfld.quad 0x0 6. "Reserved7,Reserved" "0,1"
newline
rbitfld.quad 0x0 5. "Reserved8,Reserved" "0,1"
newline
rbitfld.quad 0x0 4. "Reserved9,Reserved" "0,1"
newline
rbitfld.quad 0x0 3. "Reserved10,Reserved" "0,1"
newline
rbitfld.quad 0x0 2. "Reserved11,Reserved" "0,1"
newline
rbitfld.quad 0x0 1. "Reserved12,Reserved" "0,1"
newline
rbitfld.quad 0x0 0. "Reserved13,Reserved" "0,1"
rgroup.quad 0x70++0x7
line.quad 0x0 "SD_INFO1__16_HL,The SD card interrupt flag register 1 (SD_INFO1) indicates the response end and access end in the command sequence. This register also indicates the card detect/write protect state."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_17,Reserved bits"
newline
hexmask.quad.word 0x0 17.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 16. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 11.--15. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 10. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved13,Reserved" "0,1"
rgroup.quad 0x70++0x7
line.quad 0x0 "SD_INFO1__16_HH,The SD card interrupt flag register 1 (SD_INFO1) indicates the response end and access end in the command sequence. This register also indicates the card detect/write protect state."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_17,Reserved bits"
newline
hexmask.quad.long 0x0 17.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 16. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 11.--15. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 10. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved13,Reserved" "0,1"
group.quad 0x70++0x7
line.quad 0x0 "SD_INFO1__32_L,The SD card interrupt flag register 1 (SD_INFO1) indicates the response end and access end in the command sequence. This register also indicates the card detect/write protect state."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 17.--31. 1. "Reserved_17,Reserved bits"
newline
bitfld.quad 0x0 16. "INFO90,Response Reception Completion" "0,1"
newline
hexmask.quad.byte 0x0 11.--15. 1. "Reserved_11,Reserved bits"
newline
rbitfld.quad 0x0 10. "INFO10,Indicates the SDDAT3 state." "0: SDDAT3 is set to 0,1: SDDAT3 is set to 1"
newline
bitfld.quad 0x0 9. "INFO91,SDDAT3 Card Insertion" "0,1"
newline
bitfld.quad 0x0 8. "INFO8,SDDAT3 Card Removal" "0,1"
newline
rbitfld.quad 0x0 7. "INFO7,Write Protect" "0: ISDWP is set to 1,1: ISDWP is set to 0"
newline
rbitfld.quad 0x0 6. "Reserved_6,Reserved bits" "0,1"
newline
rbitfld.quad 0x0 5. "INFO5,Indicates the ISDCD state." "0: Indicates that Mcycle has elapsed with ISDCD..,1: Indicates that Mcycle has elapsed with ISDCD.."
newline
bitfld.quad 0x0 4. "INFO4,ISDCD Card Insertion" "0,1"
newline
bitfld.quad 0x0 3. "INFO3,ISDCD Card Removal" "0,1"
newline
bitfld.quad 0x0 2. "INFO2,Access End" "0,1"
newline
rbitfld.quad 0x0 1. "Reserved_1,Reserved bits" "0,1"
newline
bitfld.quad 0x0 0. "INFO0,Response End" "0,1"
rgroup.quad 0x70++0x7
line.quad 0x0 "SD_INFO1__32_H,The SD card interrupt flag register 1 (SD_INFO1) indicates the response end and access end in the command sequence. This register also indicates the card detect/write protect state."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_17,Reserved bits"
newline
hexmask.quad.word 0x0 17.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 16. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 11.--15. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 10. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved13,Reserved" "0,1"
group.quad 0x78++0x7
line.quad 0x0 "SD_INFO2,The SD card interrupt flag register 2 (SD_INFO2) indicates the access status of the SD buffer (SD_BUF) and SD card. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad 0x0 16.--63. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "ILA,Illegal Access Error" "0,1"
newline
rbitfld.quad 0x0 14. "CBSY,Command Type Register Busy" "0: A command sequence has been completed,1: A command sequence is being executed"
newline
rbitfld.quad 0x0 13. "SCLKDIVEN,0: The SD bus (CMD  DAT) is busy. Writing to the SCLKEN and DIV bits in SD_CLK_CTRL is not possible." "0: The SD bus,1: The SD bus"
newline
rbitfld.quad 0x0 12. "Reserved_12,Reserved bits" "0,1"
newline
bitfld.quad 0x0 11. "Reserved_11,Reserved" "0,1"
newline
rbitfld.quad 0x0 10. "Reserved_10,Reserved bits" "0,1"
newline
bitfld.quad 0x0 9. "BWE,SD_BUF Write Enable" "0: Data cannot be written in SD_BUF0,1: Data can be written in SD_BUF0"
newline
bitfld.quad 0x0 8. "BRE,SD_BUF Read Enable" "0: Data cannot be read from SD_BUF0,1: Data can be read from SD_BUF0"
newline
rbitfld.quad 0x0 7. "DAT0,SDDAT0" "0: SDDAT0 is set to 0,1: SDDAT0 is set to 1"
newline
bitfld.quad 0x0 6. "ERR6,Response Timeout" "0,1"
newline
bitfld.quad 0x0 5. "ERR5,SD_BUF Illegal Read Access" "0,1"
newline
bitfld.quad 0x0 4. "ERR4,SD_BUF Illegal Write Access" "0,1"
newline
bitfld.quad 0x0 3. "ERR3,Data Timeout (except response timeout)" "0,1"
newline
bitfld.quad 0x0 2. "ERR2,END Error" "0,1"
newline
bitfld.quad 0x0 1. "ERR1,CRC Error" "0,1"
newline
bitfld.quad 0x0 0. "ERR0,CMD Error" "0,1"
group.quad 0x78++0x7
line.quad 0x0 "SD_INFO2__16_LL,The SD card interrupt flag register 2 (SD_INFO2) indicates the access status of the SD buffer (SD_BUF) and SD card. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "ILA,Illegal Access Error" "0,1"
newline
rbitfld.quad 0x0 14. "CBSY,Command Type Register Busy" "0: A command sequence has been completed,1: A command sequence is being executed"
newline
rbitfld.quad 0x0 13. "SCLKDIVEN,0: The SD bus (CMD  DAT) is busy. Writing to the SCLKEN and DIV bits in SD_CLK_CTRL is not possible." "0: The SD bus,1: The SD bus"
newline
rbitfld.quad 0x0 12. "Reserved_12,Reserved bits" "0,1"
newline
bitfld.quad 0x0 11. "Reserved_11,Reserved" "0,1"
newline
rbitfld.quad 0x0 10. "Reserved_10,Reserved bits" "0,1"
newline
bitfld.quad 0x0 9. "BWE,SD_BUF Write Enable" "0: Data cannot be written in SD_BUF0,1: Data can be written in SD_BUF0"
newline
bitfld.quad 0x0 8. "BRE,SD_BUF Read Enable" "0: Data cannot be read from SD_BUF0,1: Data can be read from SD_BUF0"
newline
rbitfld.quad 0x0 7. "DAT0,SDDAT0" "0: SDDAT0 is set to 0,1: SDDAT0 is set to 1"
newline
bitfld.quad 0x0 6. "ERR6,Response Timeout" "0,1"
newline
bitfld.quad 0x0 5. "ERR5,SD_BUF Illegal Read Access" "0,1"
newline
bitfld.quad 0x0 4. "ERR4,SD_BUF Illegal Write Access" "0,1"
newline
bitfld.quad 0x0 3. "ERR3,Data Timeout (except response timeout)" "0,1"
newline
bitfld.quad 0x0 2. "ERR2,END Error" "0,1"
newline
bitfld.quad 0x0 1. "ERR1,CRC Error" "0,1"
newline
bitfld.quad 0x0 0. "ERR0,CMD Error" "0,1"
rgroup.quad 0x78++0x7
line.quad 0x0 "SD_INFO2__16_LH,The SD card interrupt flag register 2 (SD_INFO2) indicates the access status of the SD buffer (SD_BUF) and SD card. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 13. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 12. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 11. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 10. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved14,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved15,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved16,Reserved" "0,1"
rgroup.quad 0x78++0x7
line.quad 0x0 "SD_INFO2__16_HL,The SD card interrupt flag register 2 (SD_INFO2) indicates the access status of the SD buffer (SD_BUF) and SD card. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 13. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 12. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 11. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 10. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved14,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved15,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved16,Reserved" "0,1"
rgroup.quad 0x78++0x7
line.quad 0x0 "SD_INFO2__16_HH,The SD card interrupt flag register 2 (SD_INFO2) indicates the access status of the SD buffer (SD_BUF) and SD card. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.long 0x0 16.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 13. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 12. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 11. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 10. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved14,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved15,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved16,Reserved" "0,1"
group.quad 0x78++0x7
line.quad 0x0 "SD_INFO2__32_L,The SD card interrupt flag register 2 (SD_INFO2) indicates the access status of the SD buffer (SD_BUF) and SD card. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "ILA,Illegal Access Error" "0,1"
newline
rbitfld.quad 0x0 14. "CBSY,Command Type Register Busy" "0: A command sequence has been completed,1: A command sequence is being executed"
newline
rbitfld.quad 0x0 13. "SCLKDIVEN,0: The SD bus (CMD  DAT) is busy. Writing to the SCLKEN and DIV bits in SD_CLK_CTRL is not possible." "0: The SD bus,1: The SD bus"
newline
rbitfld.quad 0x0 12. "Reserved_12,Reserved bits" "0,1"
newline
bitfld.quad 0x0 11. "Reserved_11,Reserved" "0,1"
newline
rbitfld.quad 0x0 10. "Reserved_10,Reserved bits" "0,1"
newline
bitfld.quad 0x0 9. "BWE,SD_BUF Write Enable" "0: Data cannot be written in SD_BUF0,1: Data can be written in SD_BUF0"
newline
bitfld.quad 0x0 8. "BRE,SD_BUF Read Enable" "0: Data cannot be read from SD_BUF0,1: Data can be read from SD_BUF0"
newline
rbitfld.quad 0x0 7. "DAT0,SDDAT0" "0: SDDAT0 is set to 0,1: SDDAT0 is set to 1"
newline
bitfld.quad 0x0 6. "ERR6,Response Timeout" "0,1"
newline
bitfld.quad 0x0 5. "ERR5,SD_BUF Illegal Read Access" "0,1"
newline
bitfld.quad 0x0 4. "ERR4,SD_BUF Illegal Write Access" "0,1"
newline
bitfld.quad 0x0 3. "ERR3,Data Timeout (except response timeout)" "0,1"
newline
bitfld.quad 0x0 2. "ERR2,END Error" "0,1"
newline
bitfld.quad 0x0 1. "ERR1,CRC Error" "0,1"
newline
bitfld.quad 0x0 0. "ERR0,CMD Error" "0,1"
rgroup.quad 0x78++0x7
line.quad 0x0 "SD_INFO2__32_H,The SD card interrupt flag register 2 (SD_INFO2) indicates the access status of the SD buffer (SD_BUF) and SD card. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 13. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 12. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 11. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 10. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved14,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved15,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved16,Reserved" "0,1"
group.quad 0x80++0x7
line.quad 0x0 "SD_INFO1_MASK,The SD_INFO1 interrupt mask register (SD_INFO1_MASK) is used to enable or disable the SD_INFO1 interrupt. When 0 is set in SD_INFO1_MASK while the corresponding flag in SD_INFO1 is set. an interrupt occurs."
hexmask.quad 0x0 17.--63. 1. "Reserved_17,Reserved bits"
newline
bitfld.quad 0x0 16. "IMASK16,HPIRES interrupt masked" "0,1"
newline
hexmask.quad.byte 0x0 10.--15. 1. "Reserved_10,Reserved bits"
newline
bitfld.quad 0x0 9. "IMASK9,INFO9 interrupt masked" "0,1"
newline
bitfld.quad 0x0 8. "IMASK8,INFO8 interrupt masked" "0,1"
newline
rbitfld.quad 0x0 5.--7. "Reserved_5,Reserved bits" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 4. "IMASK4,INFO4 interrupt masked" "0,1"
newline
bitfld.quad 0x0 3. "IMASK3,INFO3 interrupt masked" "0,1"
newline
bitfld.quad 0x0 2. "IMASK2,INFO2 interrupt masked" "0,1"
newline
rbitfld.quad 0x0 1. "Reserved_1,Reserved bits" "0,1"
newline
bitfld.quad 0x0 0. "IMASK0,INFO0 interrupt masked" "0,1"
group.quad 0x80++0x7
line.quad 0x0 "SD_INFO1_MASK__16_LL,The SD_INFO1 interrupt mask register (SD_INFO1_MASK) is used to enable or disable the SD_INFO1 interrupt. When 0 is set in SD_INFO1_MASK while the corresponding flag in SD_INFO1 is set. an interrupt occurs."
hexmask.quad 0x0 17.--63. 1. "Reserved0,Reserved"
newline
rbitfld.quad 0x0 16. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 10.--15. 1. "Reserved_10,Reserved bits"
newline
bitfld.quad 0x0 9. "IMASK9,INFO9 interrupt masked" "0,1"
newline
bitfld.quad 0x0 8. "IMASK8,INFO8 interrupt masked" "0,1"
newline
rbitfld.quad 0x0 5.--7. "Reserved_5,Reserved bits" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 4. "IMASK4,INFO4 interrupt masked" "0,1"
newline
bitfld.quad 0x0 3. "IMASK3,INFO3 interrupt masked" "0,1"
newline
bitfld.quad 0x0 2. "IMASK2,INFO2 interrupt masked" "0,1"
newline
rbitfld.quad 0x0 1. "Reserved_1,Reserved bits" "0,1"
newline
bitfld.quad 0x0 0. "IMASK0,INFO0 interrupt masked" "0,1"
group.quad 0x80++0x7
line.quad 0x0 "SD_INFO1_MASK__16_LH,The SD_INFO1 interrupt mask register (SD_INFO1_MASK) is used to enable or disable the SD_INFO1 interrupt. When 0 is set in SD_INFO1_MASK while the corresponding flag in SD_INFO1 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 17.--31. 1. "Reserved_17,Reserved bits"
newline
bitfld.quad 0x0 16. "IMASK16,HPIRES interrupt masked" "0,1"
newline
hexmask.quad.byte 0x0 10.--15. 1. "Reserved2,Reserved"
newline
rbitfld.quad 0x0 9. "Reserved3,Reserved" "0,1"
newline
rbitfld.quad 0x0 8. "Reserved4,Reserved" "0,1"
newline
rbitfld.quad 0x0 5.--7. "Reserved5,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.quad 0x0 4. "Reserved6,Reserved" "0,1"
newline
rbitfld.quad 0x0 3. "Reserved7,Reserved" "0,1"
newline
rbitfld.quad 0x0 2. "Reserved8,Reserved" "0,1"
newline
rbitfld.quad 0x0 1. "Reserved9,Reserved" "0,1"
newline
rbitfld.quad 0x0 0. "Reserved10,Reserved" "0,1"
rgroup.quad 0x80++0x7
line.quad 0x0 "SD_INFO1_MASK__16_HL,The SD_INFO1 interrupt mask register (SD_INFO1_MASK) is used to enable or disable the SD_INFO1 interrupt. When 0 is set in SD_INFO1_MASK while the corresponding flag in SD_INFO1 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_17,Reserved bits"
newline
hexmask.quad.word 0x0 17.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 16. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 10.--15. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 9. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 5.--7. "Reserved5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 4. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved10,Reserved" "0,1"
rgroup.quad 0x80++0x7
line.quad 0x0 "SD_INFO1_MASK__16_HH,The SD_INFO1 interrupt mask register (SD_INFO1_MASK) is used to enable or disable the SD_INFO1 interrupt. When 0 is set in SD_INFO1_MASK while the corresponding flag in SD_INFO1 is set. an interrupt occurs."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_17,Reserved bits"
newline
hexmask.quad.long 0x0 17.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 16. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 10.--15. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 9. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 5.--7. "Reserved5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 4. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved10,Reserved" "0,1"
group.quad 0x80++0x7
line.quad 0x0 "SD_INFO1_MASK__32_L,The SD_INFO1 interrupt mask register (SD_INFO1_MASK) is used to enable or disable the SD_INFO1 interrupt. When 0 is set in SD_INFO1_MASK while the corresponding flag in SD_INFO1 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 17.--31. 1. "Reserved_17,Reserved bits"
newline
bitfld.quad 0x0 16. "IMASK16,HPIRES interrupt masked" "0,1"
newline
hexmask.quad.byte 0x0 10.--15. 1. "Reserved_10,Reserved bits"
newline
bitfld.quad 0x0 9. "IMASK9,INFO9 interrupt masked" "0,1"
newline
bitfld.quad 0x0 8. "IMASK8,INFO8 interrupt masked" "0,1"
newline
rbitfld.quad 0x0 5.--7. "Reserved_5,Reserved bits" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 4. "IMASK4,INFO4 interrupt masked" "0,1"
newline
bitfld.quad 0x0 3. "IMASK3,INFO3 interrupt masked" "0,1"
newline
bitfld.quad 0x0 2. "IMASK2,INFO2 interrupt masked" "0,1"
newline
rbitfld.quad 0x0 1. "Reserved_1,Reserved bits" "0,1"
newline
bitfld.quad 0x0 0. "IMASK0,INFO0 interrupt masked" "0,1"
rgroup.quad 0x80++0x7
line.quad 0x0 "SD_INFO1_MASK__32_H,The SD_INFO1 interrupt mask register (SD_INFO1_MASK) is used to enable or disable the SD_INFO1 interrupt. When 0 is set in SD_INFO1_MASK while the corresponding flag in SD_INFO1 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_17,Reserved bits"
newline
hexmask.quad.word 0x0 17.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 16. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 10.--15. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 9. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 5.--7. "Reserved5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 4. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved10,Reserved" "0,1"
group.quad 0x88++0x7
line.quad 0x0 "SD_INFO2_MASK,The SD_INFO2 interrupt mask register (SD_INFO2_MASK) is used to enable or disable the SD_INFO2 interrupt. When 0 is set in SD_INFO2_MASK while the corresponding flag in SD_INFO2 is set. an interrupt occurs."
hexmask.quad 0x0 16.--63. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "IMASK,ILA interrupt masked" "0,1"
newline
rbitfld.quad 0x0 12.--14. "Reserved_12,Reserved bits" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 11. "Reserved_11,Reserved" "0,1"
newline
rbitfld.quad 0x0 10. "Reserved_10,Reserved bits" "0,1"
newline
bitfld.quad 0x0 9. "BMASK1,BWE interrupt masked" "0,1"
newline
bitfld.quad 0x0 8. "BMASK0,BRE interrupt masked" "0,1"
newline
rbitfld.quad 0x0 7. "Reserved_7,Reserved bits" "0,1"
newline
bitfld.quad 0x0 6. "EMASK6,ERR6 interrupt masked" "0,1"
newline
bitfld.quad 0x0 5. "EMASK5,ERR5 interrupt masked" "0,1"
newline
bitfld.quad 0x0 4. "EMASK4,ERR4 interrupt masked" "0,1"
newline
bitfld.quad 0x0 3. "EMASK3,ERR3 interrupt masked" "0,1"
newline
bitfld.quad 0x0 2. "EMASK2,ERR2 interrupt masked" "0,1"
newline
bitfld.quad 0x0 1. "EMASK1,ERR1 interrupt masked" "0,1"
newline
bitfld.quad 0x0 0. "EMASK0,ERR0 interrupt masked" "0,1"
group.quad 0x88++0x7
line.quad 0x0 "SD_INFO2_MASK__16_LL,The SD_INFO2 interrupt mask register (SD_INFO2_MASK) is used to enable or disable the SD_INFO2 interrupt. When 0 is set in SD_INFO2_MASK while the corresponding flag in SD_INFO2 is set. an interrupt occurs."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "IMASK,ILA interrupt masked" "0,1"
newline
rbitfld.quad 0x0 12.--14. "Reserved_12,Reserved bits" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 11. "Reserved_11,Reserved" "0,1"
newline
rbitfld.quad 0x0 10. "Reserved_10,Reserved bits" "0,1"
newline
bitfld.quad 0x0 9. "BMASK1,BWE interrupt masked" "0,1"
newline
bitfld.quad 0x0 8. "BMASK0,BRE interrupt masked" "0,1"
newline
rbitfld.quad 0x0 7. "Reserved_7,Reserved bits" "0,1"
newline
bitfld.quad 0x0 6. "EMASK6,ERR6 interrupt masked" "0,1"
newline
bitfld.quad 0x0 5. "EMASK5,ERR5 interrupt masked" "0,1"
newline
bitfld.quad 0x0 4. "EMASK4,ERR4 interrupt masked" "0,1"
newline
bitfld.quad 0x0 3. "EMASK3,ERR3 interrupt masked" "0,1"
newline
bitfld.quad 0x0 2. "EMASK2,ERR2 interrupt masked" "0,1"
newline
bitfld.quad 0x0 1. "EMASK1,ERR1 interrupt masked" "0,1"
newline
bitfld.quad 0x0 0. "EMASK0,ERR0 interrupt masked" "0,1"
rgroup.quad 0x88++0x7
line.quad 0x0 "SD_INFO2_MASK__16_LH,The SD_INFO2 interrupt mask register (SD_INFO2_MASK) is used to enable or disable the SD_INFO2 interrupt. When 0 is set in SD_INFO2_MASK while the corresponding flag in SD_INFO2 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 12.--14. "Reserved2,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 11. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 10. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved14,Reserved" "0,1"
rgroup.quad 0x88++0x7
line.quad 0x0 "SD_INFO2_MASK__16_HL,The SD_INFO2 interrupt mask register (SD_INFO2_MASK) is used to enable or disable the SD_INFO2 interrupt. When 0 is set in SD_INFO2_MASK while the corresponding flag in SD_INFO2 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 12.--14. "Reserved2,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 11. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 10. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved14,Reserved" "0,1"
rgroup.quad 0x88++0x7
line.quad 0x0 "SD_INFO2_MASK__16_HH,The SD_INFO2 interrupt mask register (SD_INFO2_MASK) is used to enable or disable the SD_INFO2 interrupt. When 0 is set in SD_INFO2_MASK while the corresponding flag in SD_INFO2 is set. an interrupt occurs."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.long 0x0 16.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 12.--14. "Reserved2,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 11. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 10. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved14,Reserved" "0,1"
group.quad 0x88++0x7
line.quad 0x0 "SD_INFO2_MASK__32_L,The SD_INFO2 interrupt mask register (SD_INFO2_MASK) is used to enable or disable the SD_INFO2 interrupt. When 0 is set in SD_INFO2_MASK while the corresponding flag in SD_INFO2 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "IMASK,ILA interrupt masked" "0,1"
newline
rbitfld.quad 0x0 12.--14. "Reserved_12,Reserved bits" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 11. "Reserved_11,Reserved" "0,1"
newline
rbitfld.quad 0x0 10. "Reserved_10,Reserved bits" "0,1"
newline
bitfld.quad 0x0 9. "BMASK1,BWE interrupt masked" "0,1"
newline
bitfld.quad 0x0 8. "BMASK0,BRE interrupt masked" "0,1"
newline
rbitfld.quad 0x0 7. "Reserved_7,Reserved bits" "0,1"
newline
bitfld.quad 0x0 6. "EMASK6,ERR6 interrupt masked" "0,1"
newline
bitfld.quad 0x0 5. "EMASK5,ERR5 interrupt masked" "0,1"
newline
bitfld.quad 0x0 4. "EMASK4,ERR4 interrupt masked" "0,1"
newline
bitfld.quad 0x0 3. "EMASK3,ERR3 interrupt masked" "0,1"
newline
bitfld.quad 0x0 2. "EMASK2,ERR2 interrupt masked" "0,1"
newline
bitfld.quad 0x0 1. "EMASK1,ERR1 interrupt masked" "0,1"
newline
bitfld.quad 0x0 0. "EMASK0,ERR0 interrupt masked" "0,1"
rgroup.quad 0x88++0x7
line.quad 0x0 "SD_INFO2_MASK__32_H,The SD_INFO2 interrupt mask register (SD_INFO2_MASK) is used to enable or disable the SD_INFO2 interrupt. When 0 is set in SD_INFO2_MASK while the corresponding flag in SD_INFO2 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 12.--14. "Reserved2,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 11. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 10. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved14,Reserved" "0,1"
group.quad 0x90++0x7
line.quad 0x0 "SD_CLK_CTRL,1.0"
hexmask.quad 0x0 17.--63. 1. "Reserved_17,Reserved bits"
newline
bitfld.quad 0x0 16. "Reserved_16,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 11.--15. 1. "Reserved_11,Reserved bits"
newline
bitfld.quad 0x0 10. "Reserved_10,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "SDCLKOFFEN,SD Clock (SD_CLK) Output Automatic Control Enable" "0: Automatic control for SD clock,1: Automatic control for SD clock"
newline
bitfld.quad 0x0 8. "SCLKEN,SD Clock (SD_CLK) Output Control Enable" "0: SD clock,1: SD clock"
newline
bitfld.quad 0x0 7. "DIV7,SD Clock (SD_CLK)" "0: SDphy/2,1: SDphy/4"
newline
bitfld.quad 0x0 6. "DIV6,Refer to DIV7 Bit Description" "0,1"
newline
bitfld.quad 0x0 5. "DIV5,Refer to DIV7 Bit Description" "0,1"
newline
bitfld.quad 0x0 4. "DIV4,Refer to DIV7 Bit Description" "0,1"
newline
bitfld.quad 0x0 3. "DIV3,Refer to DIV7 Bit Description" "0,1"
newline
bitfld.quad 0x0 2. "DIV2,Refer to DIV7 Bit Description" "0,1"
newline
bitfld.quad 0x0 1. "DIV1,Refer to DIV7 Bit Description" "0,1"
newline
bitfld.quad 0x0 0. "DIV0,Refer to DIV7 Bit Description" "0,1"
group.quad 0x90++0x7
line.quad 0x0 "SD_CLK_CTRL__16_LL,1.0"
hexmask.quad 0x0 17.--63. 1. "Reserved0,Reserved"
newline
rbitfld.quad 0x0 16. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 11.--15. 1. "Reserved_11,Reserved bits"
newline
bitfld.quad 0x0 10. "Reserved_10,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "SDCLKOFFEN,SD Clock (SD_CLK) Output Automatic Control Enable" "0: Automatic control for SD clock,1: Automatic control for SD clock"
newline
bitfld.quad 0x0 8. "SCLKEN,SD Clock (SD_CLK) Output Control Enable" "0: SD clock,1: SD clock"
newline
bitfld.quad 0x0 7. "DIV7,SD Clock (SD_CLK)" "0: SDphy/2,1: SDphy/4"
newline
bitfld.quad 0x0 6. "DIV6,Refer to DIV7 Bit Description" "0,1"
newline
bitfld.quad 0x0 5. "DIV5,Refer to DIV7 Bit Description" "0,1"
newline
bitfld.quad 0x0 4. "DIV4,Refer to DIV7 Bit Description" "0,1"
newline
bitfld.quad 0x0 3. "DIV3,Refer to DIV7 Bit Description" "0,1"
newline
bitfld.quad 0x0 2. "DIV2,Refer to DIV7 Bit Description" "0,1"
newline
bitfld.quad 0x0 1. "DIV1,Refer to DIV7 Bit Description" "0,1"
newline
bitfld.quad 0x0 0. "DIV0,Refer to DIV7 Bit Description" "0,1"
group.quad 0x90++0x7
line.quad 0x0 "SD_CLK_CTRL__16_LH,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 17.--31. 1. "Reserved_17,Reserved bits"
newline
bitfld.quad 0x0 16. "Reserved_16,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 11.--15. 1. "Reserved2,Reserved"
newline
rbitfld.quad 0x0 10. "Reserved3,Reserved" "0,1"
newline
rbitfld.quad 0x0 9. "Reserved4,Reserved" "0,1"
newline
rbitfld.quad 0x0 8. "Reserved5,Reserved" "0,1"
newline
rbitfld.quad 0x0 7. "Reserved6,Reserved" "0,1"
newline
rbitfld.quad 0x0 6. "Reserved7,Reserved" "0,1"
newline
rbitfld.quad 0x0 5. "Reserved8,Reserved" "0,1"
newline
rbitfld.quad 0x0 4. "Reserved9,Reserved" "0,1"
newline
rbitfld.quad 0x0 3. "Reserved10,Reserved" "0,1"
newline
rbitfld.quad 0x0 2. "Reserved11,Reserved" "0,1"
newline
rbitfld.quad 0x0 1. "Reserved12,Reserved" "0,1"
newline
rbitfld.quad 0x0 0. "Reserved13,Reserved" "0,1"
rgroup.quad 0x90++0x7
line.quad 0x0 "SD_CLK_CTRL__16_HL,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_17,Reserved bits"
newline
hexmask.quad.word 0x0 17.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 16. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 11.--15. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 10. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved13,Reserved" "0,1"
rgroup.quad 0x90++0x7
line.quad 0x0 "SD_CLK_CTRL__16_HH,1.0"
hexmask.quad.word 0x0 48.--63. 1. "Reserved_17,Reserved bits"
newline
hexmask.quad.long 0x0 17.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 16. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 11.--15. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 10. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved13,Reserved" "0,1"
group.quad 0x90++0x7
line.quad 0x0 "SD_CLK_CTRL__32_L,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 17.--31. 1. "Reserved_17,Reserved bits"
newline
bitfld.quad 0x0 16. "Reserved_16,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 11.--15. 1. "Reserved_11,Reserved bits"
newline
bitfld.quad 0x0 10. "Reserved_10,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "SDCLKOFFEN,SD Clock (SD_CLK) Output Automatic Control Enable" "0: Automatic control for SD clock,1: Automatic control for SD clock"
newline
bitfld.quad 0x0 8. "SCLKEN,SD Clock (SD_CLK) Output Control Enable" "0: SD clock,1: SD clock"
newline
bitfld.quad 0x0 7. "DIV7,SD Clock (SD_CLK)" "0: SDphy/2,1: SDphy/4"
newline
bitfld.quad 0x0 6. "DIV6,Refer to DIV7 Bit Description" "0,1"
newline
bitfld.quad 0x0 5. "DIV5,Refer to DIV7 Bit Description" "0,1"
newline
bitfld.quad 0x0 4. "DIV4,Refer to DIV7 Bit Description" "0,1"
newline
bitfld.quad 0x0 3. "DIV3,Refer to DIV7 Bit Description" "0,1"
newline
bitfld.quad 0x0 2. "DIV2,Refer to DIV7 Bit Description" "0,1"
newline
bitfld.quad 0x0 1. "DIV1,Refer to DIV7 Bit Description" "0,1"
newline
bitfld.quad 0x0 0. "DIV0,Refer to DIV7 Bit Description" "0,1"
rgroup.quad 0x90++0x7
line.quad 0x0 "SD_CLK_CTRL__32_H,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_17,Reserved bits"
newline
hexmask.quad.word 0x0 17.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 16. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 11.--15. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 10. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved13,Reserved" "0,1"
group.quad 0x98++0x7
line.quad 0x0 "SD_SIZE,The transfer data length register (SD_SIZE) is used to specify the transfer data size."
hexmask.quad 0x0 12.--63. 1. "Reserved_12,Reserved bits"
newline
rbitfld.quad 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
newline
hexmask.quad.word 0x0 0.--9. 1. "LEN,Transfer Data Size"
group.quad 0x98++0x7
line.quad 0x0 "SD_SIZE__16_LL,The transfer data length register (SD_SIZE) is used to specify the transfer data size."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.byte 0x0 12.--15. 1. "Reserved_12,Reserved bits"
newline
rbitfld.quad 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
newline
hexmask.quad.word 0x0 0.--9. 1. "LEN,Transfer Data Size"
rgroup.quad 0x98++0x7
line.quad 0x0 "SD_SIZE__16_LH,The transfer data length register (SD_SIZE) is used to specify the transfer data size."
hexmask.quad.long 0x0 32.--63. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_12,Reserved bits"
newline
hexmask.quad.byte 0x0 12.--15. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 10.--11. "Reserved2,Reserved" "0,1,2,3"
newline
hexmask.quad.word 0x0 0.--9. 1. "Reserved3,Reserved"
rgroup.quad 0x98++0x7
line.quad 0x0 "SD_SIZE__16_HL,The transfer data length register (SD_SIZE) is used to specify the transfer data size."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_12,Reserved bits"
newline
hexmask.quad.tbyte 0x0 12.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 10.--11. "Reserved1,Reserved" "0,1,2,3"
newline
hexmask.quad.word 0x0 0.--9. 1. "Reserved2,Reserved"
rgroup.quad 0x98++0x7
line.quad 0x0 "SD_SIZE__16_HH,The transfer data length register (SD_SIZE) is used to specify the transfer data size."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_12,Reserved bits"
newline
hexmask.quad 0x0 12.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 10.--11. "Reserved1,Reserved" "0,1,2,3"
newline
hexmask.quad.word 0x0 0.--9. 1. "Reserved2,Reserved"
group.quad 0x98++0x7
line.quad 0x0 "SD_SIZE__32_L,The transfer data length register (SD_SIZE) is used to specify the transfer data size."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved bits"
newline
rbitfld.quad 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
newline
hexmask.quad.word 0x0 0.--9. 1. "LEN,Transfer Data Size"
rgroup.quad 0x98++0x7
line.quad 0x0 "SD_SIZE__32_H,The transfer data length register (SD_SIZE) is used to specify the transfer data size."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_12,Reserved bits"
newline
hexmask.quad.tbyte 0x0 12.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 10.--11. "Reserved1,Reserved" "0,1,2,3"
newline
hexmask.quad.word 0x0 0.--9. 1. "Reserved2,Reserved"
group.quad 0xA0++0x7
line.quad 0x0 "SD_OPTION,The SD card access control option register (SD_OPTION) is used to set the bus width and timeout counter."
hexmask.quad 0x0 16.--63. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "WIDTH,Bus width" "0: 4-bit width,1: 8-bit width"
newline
rbitfld.quad 0x0 14. "Reserved_14,Reserved bits" "0,1"
newline
bitfld.quad 0x0 13. "WIDTH8,Bus width" "0,1"
newline
rbitfld.quad 0x0 10.--12. "Reserved_10,Reserved bits" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 9. "EXTOP,Timeout Mode Select" "0: Bits TOP27 to TOP24 specify the timeout count..,1: Bits TOP27 to TOP24 specify the timeout count.."
newline
bitfld.quad 0x0 8. "TOUTMASK,Timeout Mask" "0: Enables timeout,1: Disables timeout"
newline
bitfld.quad 0x0 7. "TOP27,Timeout Counter" "0: SDCLK*213,1: SDCLK*214"
newline
bitfld.quad 0x0 6. "TOP26,Refer to TOP27 Bit Description" "0,1"
newline
bitfld.quad 0x0 5. "TOP25,Refer to TOP27 Bit Description" "0,1"
newline
bitfld.quad 0x0 4. "TOP24,Refer to TOP27 Bit Description" "0,1"
newline
bitfld.quad 0x0 3. "CTOP24,Card Detect Time Counter" "0: SDphy *210,1: SDphy *211"
newline
bitfld.quad 0x0 2. "CTOP23,Refer to CTOP24 Bit Description" "0,1"
newline
bitfld.quad 0x0 1. "CTOP22,Refer to CTOP24 Bit Description" "0,1"
newline
bitfld.quad 0x0 0. "CTOP21,Refer to CTOP24 Bit Description" "0,1"
group.quad 0xA0++0x7
line.quad 0x0 "SD_OPTION__16_LL,The SD card access control option register (SD_OPTION) is used to set the bus width and timeout counter."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "WIDTH,Bus width" "0: 4-bit width,1: 8-bit width"
newline
rbitfld.quad 0x0 14. "Reserved_14,Reserved bits" "0,1"
newline
bitfld.quad 0x0 13. "WIDTH8,Bus width" "0,1"
newline
rbitfld.quad 0x0 10.--12. "Reserved_10,Reserved bits" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 9. "EXTOP,Timeout Mode Select" "0: Bits TOP27 to TOP24 specify the timeout count..,1: Bits TOP27 to TOP24 specify the timeout count.."
newline
bitfld.quad 0x0 8. "TOUTMASK,Timeout Mask" "0: Enables timeout,1: Disables timeout"
newline
bitfld.quad 0x0 7. "TOP27,Timeout Counter" "0: SDCLK*213,1: SDCLK*214"
newline
bitfld.quad 0x0 6. "TOP26,Refer to TOP27 Bit Description" "0,1"
newline
bitfld.quad 0x0 5. "TOP25,Refer to TOP27 Bit Description" "0,1"
newline
bitfld.quad 0x0 4. "TOP24,Refer to TOP27 Bit Description" "0,1"
newline
bitfld.quad 0x0 3. "CTOP24,Card Detect Time Counter" "0: SDphy *210,1: SDphy *211"
newline
bitfld.quad 0x0 2. "CTOP23,Refer to CTOP24 Bit Description" "0,1"
newline
bitfld.quad 0x0 1. "CTOP22,Refer to CTOP24 Bit Description" "0,1"
newline
bitfld.quad 0x0 0. "CTOP21,Refer to CTOP24 Bit Description" "0,1"
rgroup.quad 0xA0++0x7
line.quad 0x0 "SD_OPTION__16_LH,The SD card access control option register (SD_OPTION) is used to set the bus width and timeout counter."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 13. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 10.--12. "Reserved4,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 9. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved14,Reserved" "0,1"
rgroup.quad 0xA0++0x7
line.quad 0x0 "SD_OPTION__16_HL,The SD card access control option register (SD_OPTION) is used to set the bus width and timeout counter."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 13. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 10.--12. "Reserved4,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 9. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved14,Reserved" "0,1"
rgroup.quad 0xA0++0x7
line.quad 0x0 "SD_OPTION__16_HH,The SD card access control option register (SD_OPTION) is used to set the bus width and timeout counter."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.long 0x0 16.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 13. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 10.--12. "Reserved4,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 9. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved14,Reserved" "0,1"
group.quad 0xA0++0x7
line.quad 0x0 "SD_OPTION__32_L,The SD card access control option register (SD_OPTION) is used to set the bus width and timeout counter."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "WIDTH,Bus width" "0: 4-bit width,1: 8-bit width"
newline
rbitfld.quad 0x0 14. "Reserved_14,Reserved bits" "0,1"
newline
bitfld.quad 0x0 13. "WIDTH8,Bus width" "0,1"
newline
rbitfld.quad 0x0 10.--12. "Reserved_10,Reserved bits" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 9. "EXTOP,Timeout Mode Select" "0: Bits TOP27 to TOP24 specify the timeout count..,1: Bits TOP27 to TOP24 specify the timeout count.."
newline
bitfld.quad 0x0 8. "TOUTMASK,Timeout Mask" "0: Enables timeout,1: Disables timeout"
newline
bitfld.quad 0x0 7. "TOP27,Timeout Counter" "0: SDCLK*213,1: SDCLK*214"
newline
bitfld.quad 0x0 6. "TOP26,Refer to TOP27 Bit Description" "0,1"
newline
bitfld.quad 0x0 5. "TOP25,Refer to TOP27 Bit Description" "0,1"
newline
bitfld.quad 0x0 4. "TOP24,Refer to TOP27 Bit Description" "0,1"
newline
bitfld.quad 0x0 3. "CTOP24,Card Detect Time Counter" "0: SDphy *210,1: SDphy *211"
newline
bitfld.quad 0x0 2. "CTOP23,Refer to CTOP24 Bit Description" "0,1"
newline
bitfld.quad 0x0 1. "CTOP22,Refer to CTOP24 Bit Description" "0,1"
newline
bitfld.quad 0x0 0. "CTOP21,Refer to CTOP24 Bit Description" "0,1"
rgroup.quad 0xA0++0x7
line.quad 0x0 "SD_OPTION__32_H,The SD card access control option register (SD_OPTION) is used to set the bus width and timeout counter."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 13. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 10.--12. "Reserved4,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 9. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 7. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved14,Reserved" "0,1"
rgroup.quad 0xB0++0x7
line.quad 0x0 "SD_ERR_STS1,The SD error status register 1 (SD_ERR_STS1) indicates the CRC status. CRC error. End error. and CMD error."
hexmask.quad 0x0 15.--63. 1. "Reserved_15,Reserved bits"
newline
bitfld.quad 0x0 14. "E14,These bits hold the CRC status. (normal: 010)" "0,1"
newline
bitfld.quad 0x0 13. "E13,Refer to E14 Bit Description" "0,1"
newline
bitfld.quad 0x0 12. "E12,Refer to E14 Bit Description" "0,1"
newline
bitfld.quad 0x0 11. "E11,Set to 1 when an error occurs in the CRC status." "0,1"
newline
bitfld.quad 0x0 10. "E10,Set to 1 when a CRC error occurs in the read data." "0,1"
newline
bitfld.quad 0x0 9. "E9,Set to 1 when a CRC error occurs in the response to a command issued within a command sequence. In cases where CMD12 is issued by setting a command index in SD_CMD  this is indicated in E8." "0,1"
newline
bitfld.quad 0x0 8. "E8,Set to 1 when a CRC error occurs in a response (other than a response to a command issued within a command sequence)." "0,1"
newline
bitfld.quad 0x0 6.--7. "Reserved_6,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 5. "E5,Set to 1 when an error occurs in the CRC status length (and the end bit has not been detected)." "0,1"
newline
bitfld.quad 0x0 4. "E4,Set to 1 when an error occurs in the read data length (and the end bit has not been detected among the valid bits)." "0,1"
newline
bitfld.quad 0x0 3. "E3,Set to 1 when an error occurs in the response length to a command issued within a command sequence. In cases where CMD12 is issued by setting a command index in SD_CMD  this is indicated in E2." "0,1"
newline
bitfld.quad 0x0 2. "E2,Set to 1 when an error occurs in the response length (other than a response to a command issued within a command sequence)." "0,1"
newline
bitfld.quad 0x0 1. "E1,Set to 1 when an error occurs in the command index of the response to a command issued within a command sequence. In cases where CMD12 is issued by setting a command index in SD_CMD  this is Indicated in E0." "0,1"
newline
bitfld.quad 0x0 0. "E0,Set to 1 when an error occurs in the command index of a response (other than a response to a command issued within a command sequence)." "0,1"
rgroup.quad 0xB0++0x7
line.quad 0x0 "SD_ERR_STS1__16_LL,The SD error status register 1 (SD_ERR_STS1) indicates the CRC status. CRC error. End error. and CMD error."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved_15,Reserved bits" "0,1"
newline
bitfld.quad 0x0 14. "E14,These bits hold the CRC status. (normal: 010)" "0,1"
newline
bitfld.quad 0x0 13. "E13,Refer to E14 Bit Description" "0,1"
newline
bitfld.quad 0x0 12. "E12,Refer to E14 Bit Description" "0,1"
newline
bitfld.quad 0x0 11. "E11,Set to 1 when an error occurs in the CRC status." "0,1"
newline
bitfld.quad 0x0 10. "E10,Set to 1 when a CRC error occurs in the read data." "0,1"
newline
bitfld.quad 0x0 9. "E9,Set to 1 when a CRC error occurs in the response to a command issued within a command sequence. In cases where CMD12 is issued by setting a command index in SD_CMD  this is indicated in E8." "0,1"
newline
bitfld.quad 0x0 8. "E8,Set to 1 when a CRC error occurs in a response (other than a response to a command issued within a command sequence)." "0,1"
newline
bitfld.quad 0x0 6.--7. "Reserved_6,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 5. "E5,Set to 1 when an error occurs in the CRC status length (and the end bit has not been detected)." "0,1"
newline
bitfld.quad 0x0 4. "E4,Set to 1 when an error occurs in the read data length (and the end bit has not been detected among the valid bits)." "0,1"
newline
bitfld.quad 0x0 3. "E3,Set to 1 when an error occurs in the response length to a command issued within a command sequence. In cases where CMD12 is issued by setting a command index in SD_CMD  this is indicated in E2." "0,1"
newline
bitfld.quad 0x0 2. "E2,Set to 1 when an error occurs in the response length (other than a response to a command issued within a command sequence)." "0,1"
newline
bitfld.quad 0x0 1. "E1,Set to 1 when an error occurs in the command index of the response to a command issued within a command sequence. In cases where CMD12 is issued by setting a command index in SD_CMD  this is Indicated in E0." "0,1"
newline
bitfld.quad 0x0 0. "E0,Set to 1 when an error occurs in the command index of a response (other than a response to a command issued within a command sequence)." "0,1"
rgroup.quad 0xB0++0x7
line.quad 0x0 "SD_ERR_STS1__16_LH,The SD error status register 1 (SD_ERR_STS1) indicates the CRC status. CRC error. End error. and CMD error."
hexmask.quad.long 0x0 32.--63. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_15,Reserved bits"
newline
bitfld.quad 0x0 15. "Reserved0,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 13. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 12. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 11. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 10. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 6.--7. "Reserved9,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 5. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved14,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved15,Reserved" "0,1"
rgroup.quad 0xB0++0x7
line.quad 0x0 "SD_ERR_STS1__16_HL,The SD error status register 1 (SD_ERR_STS1) indicates the CRC status. CRC error. End error. and CMD error."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_15,Reserved bits"
newline
hexmask.quad.tbyte 0x0 15.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 14. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 13. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 12. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 11. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 10. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 6.--7. "Reserved8,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 5. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved14,Reserved" "0,1"
rgroup.quad 0xB0++0x7
line.quad 0x0 "SD_ERR_STS1__16_HH,The SD error status register 1 (SD_ERR_STS1) indicates the CRC status. CRC error. End error. and CMD error."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_15,Reserved bits"
newline
hexmask.quad 0x0 15.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 14. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 13. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 12. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 11. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 10. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 6.--7. "Reserved8,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 5. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved14,Reserved" "0,1"
rgroup.quad 0xB0++0x7
line.quad 0x0 "SD_ERR_STS1__32_L,The SD error status register 1 (SD_ERR_STS1) indicates the CRC status. CRC error. End error. and CMD error."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.tbyte 0x0 15.--31. 1. "Reserved_15,Reserved bits"
newline
bitfld.quad 0x0 14. "E14,These bits hold the CRC status. (normal: 010)" "0,1"
newline
bitfld.quad 0x0 13. "E13,Refer to E14 Bit Description" "0,1"
newline
bitfld.quad 0x0 12. "E12,Refer to E14 Bit Description" "0,1"
newline
bitfld.quad 0x0 11. "E11,Set to 1 when an error occurs in the CRC status." "0,1"
newline
bitfld.quad 0x0 10. "E10,Set to 1 when a CRC error occurs in the read data." "0,1"
newline
bitfld.quad 0x0 9. "E9,Set to 1 when a CRC error occurs in the response to a command issued within a command sequence. In cases where CMD12 is issued by setting a command index in SD_CMD  this is indicated in E8." "0,1"
newline
bitfld.quad 0x0 8. "E8,Set to 1 when a CRC error occurs in a response (other than a response to a command issued within a command sequence)." "0,1"
newline
bitfld.quad 0x0 6.--7. "Reserved_6,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 5. "E5,Set to 1 when an error occurs in the CRC status length (and the end bit has not been detected)." "0,1"
newline
bitfld.quad 0x0 4. "E4,Set to 1 when an error occurs in the read data length (and the end bit has not been detected among the valid bits)." "0,1"
newline
bitfld.quad 0x0 3. "E3,Set to 1 when an error occurs in the response length to a command issued within a command sequence. In cases where CMD12 is issued by setting a command index in SD_CMD  this is indicated in E2." "0,1"
newline
bitfld.quad 0x0 2. "E2,Set to 1 when an error occurs in the response length (other than a response to a command issued within a command sequence)." "0,1"
newline
bitfld.quad 0x0 1. "E1,Set to 1 when an error occurs in the command index of the response to a command issued within a command sequence. In cases where CMD12 is issued by setting a command index in SD_CMD  this is Indicated in E0." "0,1"
newline
bitfld.quad 0x0 0. "E0,Set to 1 when an error occurs in the command index of a response (other than a response to a command issued within a command sequence)." "0,1"
rgroup.quad 0xB0++0xF
line.quad 0x0 "SD_ERR_STS1__32_H,The SD error status register 1 (SD_ERR_STS1) indicates the CRC status. CRC error. End error. and CMD error."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_15,Reserved bits"
newline
hexmask.quad.tbyte 0x0 15.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 14. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 13. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 12. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 11. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 10. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 9. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 6.--7. "Reserved8,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 5. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved12,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved14,Reserved" "0,1"
line.quad 0x8 "SD_ERR_STS2,The SD error status register 2 (SD_ERR_STS2) indicates the timeout state. Ncycle is set by bits 7 to 4 in SD_OPTION."
hexmask.quad 0x8 7.--63. 1. "Reserved_7,Reserved bits"
newline
bitfld.quad 0x8 6. "E6,Set to 1 when the busy state continues for longer than Ncycle after the CRC status" "0,1"
newline
bitfld.quad 0x8 5. "E5,Set to 1 when the CRC status is not received though a longer time than Ncycle has elapsed after data writing" "0,1"
newline
bitfld.quad 0x8 4. "E4,Set to 1 when read data is not received though a longer time than Ncycle has elapsed after read command." "0,1"
newline
bitfld.quad 0x8 3. "E3,Set to 1 when the busy state for longer than Ncycle continues after CMD12 has been issued within a command sequence. In cases where CMD12 is issued by setting a command index in SD_CMD  this is indicated in E2." "0,1"
newline
bitfld.quad 0x8 2. "E2,Set to 1 when the busy state for longer than Ncycle continues after R1b response." "0,1"
newline
bitfld.quad 0x8 1. "E1,Set to 1 when the response to a command issued within a command sequence is not received though a longer time than 640 cycles of SDCLK have elapsed. In cases where CMD12 is issued by setting a command index in SD_CMD  this is indicated in E0." "0,1"
newline
bitfld.quad 0x8 0. "E0,Set to 1 when the response (other than a response to a command issued within a command sequence) is not received though a longer time than 640 cycles of SDCLK have elapsed." "0,1"
rgroup.quad 0xB8++0x7
line.quad 0x0 "SD_ERR_STS2__16_LL,The SD error status register 2 (SD_ERR_STS2) indicates the timeout state. Ncycle is set by bits 7 to 4 in SD_OPTION."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 7.--15. 1. "Reserved_7,Reserved bits"
newline
bitfld.quad 0x0 6. "E6,Set to 1 when the busy state continues for longer than Ncycle after the CRC status" "0,1"
newline
bitfld.quad 0x0 5. "E5,Set to 1 when the CRC status is not received though a longer time than Ncycle has elapsed after data writing" "0,1"
newline
bitfld.quad 0x0 4. "E4,Set to 1 when read data is not received though a longer time than Ncycle has elapsed after read command." "0,1"
newline
bitfld.quad 0x0 3. "E3,Set to 1 when the busy state for longer than Ncycle continues after CMD12 has been issued within a command sequence. In cases where CMD12 is issued by setting a command index in SD_CMD  this is indicated in E2." "0,1"
newline
bitfld.quad 0x0 2. "E2,Set to 1 when the busy state for longer than Ncycle continues after R1b response." "0,1"
newline
bitfld.quad 0x0 1. "E1,Set to 1 when the response to a command issued within a command sequence is not received though a longer time than 640 cycles of SDCLK have elapsed. In cases where CMD12 is issued by setting a command index in SD_CMD  this is indicated in E0." "0,1"
newline
bitfld.quad 0x0 0. "E0,Set to 1 when the response (other than a response to a command issued within a command sequence) is not received though a longer time than 640 cycles of SDCLK have elapsed." "0,1"
rgroup.quad 0xB8++0x7
line.quad 0x0 "SD_ERR_STS2__16_LH,The SD error status register 2 (SD_ERR_STS2) indicates the timeout state. Ncycle is set by bits 7 to 4 in SD_OPTION."
hexmask.quad.long 0x0 32.--63. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_7,Reserved bits"
newline
hexmask.quad.word 0x0 7.--15. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 6. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved8,Reserved" "0,1"
rgroup.quad 0xB8++0x7
line.quad 0x0 "SD_ERR_STS2__16_HL,The SD error status register 2 (SD_ERR_STS2) indicates the timeout state. Ncycle is set by bits 7 to 4 in SD_OPTION."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_7,Reserved bits"
newline
hexmask.quad.long 0x0 7.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 6. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved7,Reserved" "0,1"
rgroup.quad 0xB8++0x7
line.quad 0x0 "SD_ERR_STS2__16_HH,The SD error status register 2 (SD_ERR_STS2) indicates the timeout state. Ncycle is set by bits 7 to 4 in SD_OPTION."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_7,Reserved bits"
newline
hexmask.quad 0x0 7.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 6. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved7,Reserved" "0,1"
rgroup.quad 0xB8++0x7
line.quad 0x0 "SD_ERR_STS2__32_L,The SD error status register 2 (SD_ERR_STS2) indicates the timeout state. Ncycle is set by bits 7 to 4 in SD_OPTION."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 7.--31. 1. "Reserved_7,Reserved bits"
newline
bitfld.quad 0x0 6. "E6,Set to 1 when the busy state continues for longer than Ncycle after the CRC status" "0,1"
newline
bitfld.quad 0x0 5. "E5,Set to 1 when the CRC status is not received though a longer time than Ncycle has elapsed after data writing" "0,1"
newline
bitfld.quad 0x0 4. "E4,Set to 1 when read data is not received though a longer time than Ncycle has elapsed after read command." "0,1"
newline
bitfld.quad 0x0 3. "E3,Set to 1 when the busy state for longer than Ncycle continues after CMD12 has been issued within a command sequence. In cases where CMD12 is issued by setting a command index in SD_CMD  this is indicated in E2." "0,1"
newline
bitfld.quad 0x0 2. "E2,Set to 1 when the busy state for longer than Ncycle continues after R1b response." "0,1"
newline
bitfld.quad 0x0 1. "E1,Set to 1 when the response to a command issued within a command sequence is not received though a longer time than 640 cycles of SDCLK have elapsed. In cases where CMD12 is issued by setting a command index in SD_CMD  this is indicated in E0." "0,1"
newline
bitfld.quad 0x0 0. "E0,Set to 1 when the response (other than a response to a command issued within a command sequence) is not received though a longer time than 640 cycles of SDCLK have elapsed." "0,1"
rgroup.quad 0xB8++0x7
line.quad 0x0 "SD_ERR_STS2__32_H,The SD error status register 2 (SD_ERR_STS2) indicates the timeout state. Ncycle is set by bits 7 to 4 in SD_OPTION."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_7,Reserved bits"
newline
hexmask.quad.long 0x0 7.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 6. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 5. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 3. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved7,Reserved" "0,1"
group.quad 0xC0++0x7
line.quad 0x0 "SD_BUF0,1.0"
hexmask.quad 0x0 0.--63. 1. "BUF,When writing to the SD card  the write data is written to this register."
group.quad 0xC0++0x7
line.quad 0x0 "SD_BUF0__16_LL,1.0"
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "BUF,When writing to the SD card  the write data is written to this register."
group.quad 0xC0++0x7
line.quad 0x0 "SD_BUF0__16_LH,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "BUF,When writing to the SD card  the write data is written to this register."
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved0,Reserved"
group.quad 0xC0++0x7
line.quad 0x0 "SD_BUF0__16_HL,1.0"
hexmask.quad.long 0x0 32.--63. 1. "BUF,When writing to the SD card  the write data is written to this register."
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved0,Reserved"
group.quad 0xC0++0x7
line.quad 0x0 "SD_BUF0__16_HH,1.0"
hexmask.quad.word 0x0 48.--63. 1. "BUF,When writing to the SD card  the write data is written to this register."
newline
hexmask.quad 0x0 0.--47. 1. "Reserved0,Reserved"
group.quad 0xC0++0x7
line.quad 0x0 "SD_BUF0__32_L,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 0.--31. 1. "BUF,When writing to the SD card  the write data is written to this register."
group.quad 0xC0++0x7
line.quad 0x0 "SD_BUF0__32_H,1.0"
hexmask.quad.long 0x0 32.--63. 1. "BUF,When writing to the SD card  the write data is written to this register."
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved0,Reserved"
group.quad 0xD0++0x7
line.quad 0x0 "SDIO_MODE,The SDIO mode control register (SDIO_MODE) controls the CMD52 issuance and the read wait state at multiple block transfer. and the reception of SDIO interrupt. C52PUB and IOABT should not be set to 1 simultaneously."
hexmask.quad 0x0 10.--63. 1. "Reserved_10,Reserved bits"
newline
bitfld.quad 0x0 9. "C52PUB,SDIO None Abort" "0,1"
newline
bitfld.quad 0x0 8. "IOABT,SDIO Abort" "0,1"
newline
hexmask.quad.byte 0x0 3.--7. 1. "Reserved_3,Reserved bits"
newline
bitfld.quad 0x0 2. "RWREQ,Read Wait Request" "0,1"
newline
rbitfld.quad 0x0 1. "Reserved_1,Reserved bits" "0,1"
newline
bitfld.quad 0x0 0. "IOMOD,SDIO Mode" "0: Disables the SD host interface to receive SDIO..,1: Enables the SD host interface to receive SDIO.."
group.quad 0xD0++0x7
line.quad 0x0 "SDIO_MODE__16_LL,The SDIO mode control register (SDIO_MODE) controls the CMD52 issuance and the read wait state at multiple block transfer. and the reception of SDIO interrupt. C52PUB and IOABT should not be set to 1 simultaneously."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.byte 0x0 10.--15. 1. "Reserved_10,Reserved bits"
newline
bitfld.quad 0x0 9. "C52PUB,SDIO None Abort" "0,1"
newline
bitfld.quad 0x0 8. "IOABT,SDIO Abort" "0,1"
newline
hexmask.quad.byte 0x0 3.--7. 1. "Reserved_3,Reserved bits"
newline
bitfld.quad 0x0 2. "RWREQ,Read Wait Request" "0,1"
newline
rbitfld.quad 0x0 1. "Reserved_1,Reserved bits" "0,1"
newline
bitfld.quad 0x0 0. "IOMOD,SDIO Mode" "0: Disables the SD host interface to receive SDIO..,1: Enables the SD host interface to receive SDIO.."
rgroup.quad 0xD0++0x7
line.quad 0x0 "SDIO_MODE__16_LH,The SDIO mode control register (SDIO_MODE) controls the CMD52 issuance and the read wait state at multiple block transfer. and the reception of SDIO interrupt. C52PUB and IOABT should not be set to 1 simultaneously."
hexmask.quad.long 0x0 32.--63. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_10,Reserved bits"
newline
hexmask.quad.byte 0x0 10.--15. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 9. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved3,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 3.--7. 1. "Reserved4,Reserved"
newline
bitfld.quad 0x0 2. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved7,Reserved" "0,1"
rgroup.quad 0xD0++0x7
line.quad 0x0 "SDIO_MODE__16_HL,The SDIO mode control register (SDIO_MODE) controls the CMD52 issuance and the read wait state at multiple block transfer. and the reception of SDIO interrupt. C52PUB and IOABT should not be set to 1 simultaneously."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_10,Reserved bits"
newline
hexmask.quad.tbyte 0x0 10.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 9. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved2,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 3.--7. 1. "Reserved3,Reserved"
newline
bitfld.quad 0x0 2. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved6,Reserved" "0,1"
rgroup.quad 0xD0++0x7
line.quad 0x0 "SDIO_MODE__16_HH,The SDIO mode control register (SDIO_MODE) controls the CMD52 issuance and the read wait state at multiple block transfer. and the reception of SDIO interrupt. C52PUB and IOABT should not be set to 1 simultaneously."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_10,Reserved bits"
newline
hexmask.quad 0x0 10.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 9. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved2,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 3.--7. 1. "Reserved3,Reserved"
newline
bitfld.quad 0x0 2. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved6,Reserved" "0,1"
group.quad 0xD0++0x7
line.quad 0x0 "SDIO_MODE__32_L,The SDIO mode control register (SDIO_MODE) controls the CMD52 issuance and the read wait state at multiple block transfer. and the reception of SDIO interrupt. C52PUB and IOABT should not be set to 1 simultaneously."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved bits"
newline
bitfld.quad 0x0 9. "C52PUB,SDIO None Abort" "0,1"
newline
bitfld.quad 0x0 8. "IOABT,SDIO Abort" "0,1"
newline
hexmask.quad.byte 0x0 3.--7. 1. "Reserved_3,Reserved bits"
newline
bitfld.quad 0x0 2. "RWREQ,Read Wait Request" "0,1"
newline
rbitfld.quad 0x0 1. "Reserved_1,Reserved bits" "0,1"
newline
bitfld.quad 0x0 0. "IOMOD,SDIO Mode" "0: Disables the SD host interface to receive SDIO..,1: Enables the SD host interface to receive SDIO.."
rgroup.quad 0xD0++0x7
line.quad 0x0 "SDIO_MODE__32_H,The SDIO mode control register (SDIO_MODE) controls the CMD52 issuance and the read wait state at multiple block transfer. and the reception of SDIO interrupt. C52PUB and IOABT should not be set to 1 simultaneously."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_10,Reserved bits"
newline
hexmask.quad.tbyte 0x0 10.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 9. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved2,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 3.--7. 1. "Reserved3,Reserved"
newline
bitfld.quad 0x0 2. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved6,Reserved" "0,1"
group.quad 0xD8++0x7
line.quad 0x0 "SDIO_INFO1,The SDIO interrupt flag register (SDIO_INFO1) indicates the status regarding to the SDIO card access. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad 0x0 16.--63. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "EXWT,[Setting condition]" "0,1"
newline
bitfld.quad 0x0 14. "EXPUB52,[Setting conditions]" "0,1"
newline
hexmask.quad.word 0x0 3.--13. 1. "Reserved_3,Reserved bits"
newline
bitfld.quad 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 0. "IOIRQ,[Setting condition]" "0,1"
group.quad 0xD8++0x7
line.quad 0x0 "SDIO_INFO1__16_LL,The SDIO interrupt flag register (SDIO_INFO1) indicates the status regarding to the SDIO card access. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "EXWT,[Setting condition]" "0,1"
newline
bitfld.quad 0x0 14. "EXPUB52,[Setting conditions]" "0,1"
newline
hexmask.quad.word 0x0 3.--13. 1. "Reserved_3,Reserved bits"
newline
bitfld.quad 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 0. "IOIRQ,[Setting condition]" "0,1"
rgroup.quad 0xD8++0x7
line.quad 0x0 "SDIO_INFO1__16_LH,The SDIO interrupt flag register (SDIO_INFO1) indicates the status regarding to the SDIO card access. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
hexmask.quad.word 0x0 3.--13. 1. "Reserved3,Reserved"
newline
bitfld.quad 0x0 1.--2. "Reserved4,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 0. "Reserved5,Reserved" "0,1"
rgroup.quad 0xD8++0x7
line.quad 0x0 "SDIO_INFO1__16_HL,The SDIO interrupt flag register (SDIO_INFO1) indicates the status regarding to the SDIO card access. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
hexmask.quad.word 0x0 3.--13. 1. "Reserved3,Reserved"
newline
bitfld.quad 0x0 1.--2. "Reserved4,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 0. "Reserved5,Reserved" "0,1"
rgroup.quad 0xD8++0x7
line.quad 0x0 "SDIO_INFO1__16_HH,The SDIO interrupt flag register (SDIO_INFO1) indicates the status regarding to the SDIO card access. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.long 0x0 16.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
hexmask.quad.word 0x0 3.--13. 1. "Reserved3,Reserved"
newline
bitfld.quad 0x0 1.--2. "Reserved4,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 0. "Reserved5,Reserved" "0,1"
group.quad 0xD8++0x7
line.quad 0x0 "SDIO_INFO1__32_L,The SDIO interrupt flag register (SDIO_INFO1) indicates the status regarding to the SDIO card access. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "EXWT,[Setting condition]" "0,1"
newline
bitfld.quad 0x0 14. "EXPUB52,[Setting conditions]" "0,1"
newline
hexmask.quad.word 0x0 3.--13. 1. "Reserved_3,Reserved bits"
newline
bitfld.quad 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 0. "IOIRQ,[Setting condition]" "0,1"
rgroup.quad 0xD8++0x7
line.quad 0x0 "SDIO_INFO1__32_H,The SDIO interrupt flag register (SDIO_INFO1) indicates the status regarding to the SDIO card access. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
hexmask.quad.word 0x0 3.--13. 1. "Reserved3,Reserved"
newline
bitfld.quad 0x0 1.--2. "Reserved4,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 0. "Reserved5,Reserved" "0,1"
group.quad 0xE0++0x7
line.quad 0x0 "SDIO_INFO1_MASK,The SDIO_INFO1 interrupt mask register (SDIO_INFO1_MASK) enables or disables the SD_INFO1 interrupt. When 0 is set in SDIO_INFO1_MASK while the corresponding flag in SD_INFO1 is set. an interrupt occurs."
hexmask.quad 0x0 16.--63. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "MEXWT,EXWT interrupt masked" "0,1"
newline
bitfld.quad 0x0 14. "MEXPUB52,EXPUB52 interrupt masked" "0,1"
newline
hexmask.quad.word 0x0 3.--13. 1. "Reserved_3,Reserved bits"
newline
bitfld.quad 0x0 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "IOMSK,IOIRQ interrupt masked" "0,1"
group.quad 0xE0++0x7
line.quad 0x0 "SDIO_INFO1_MASK__16_LL,The SDIO_INFO1 interrupt mask register (SDIO_INFO1_MASK) enables or disables the SD_INFO1 interrupt. When 0 is set in SDIO_INFO1_MASK while the corresponding flag in SD_INFO1 is set. an interrupt occurs."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "MEXWT,EXWT interrupt masked" "0,1"
newline
bitfld.quad 0x0 14. "MEXPUB52,EXPUB52 interrupt masked" "0,1"
newline
hexmask.quad.word 0x0 3.--13. 1. "Reserved_3,Reserved bits"
newline
bitfld.quad 0x0 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "IOMSK,IOIRQ interrupt masked" "0,1"
rgroup.quad 0xE0++0x7
line.quad 0x0 "SDIO_INFO1_MASK__16_LH,The SDIO_INFO1 interrupt mask register (SDIO_INFO1_MASK) enables or disables the SD_INFO1 interrupt. When 0 is set in SDIO_INFO1_MASK while the corresponding flag in SD_INFO1 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
hexmask.quad.word 0x0 3.--13. 1. "Reserved3,Reserved"
newline
bitfld.quad 0x0 2. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved6,Reserved" "0,1"
rgroup.quad 0xE0++0x7
line.quad 0x0 "SDIO_INFO1_MASK__16_HL,The SDIO_INFO1 interrupt mask register (SDIO_INFO1_MASK) enables or disables the SD_INFO1 interrupt. When 0 is set in SDIO_INFO1_MASK while the corresponding flag in SD_INFO1 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
hexmask.quad.word 0x0 3.--13. 1. "Reserved3,Reserved"
newline
bitfld.quad 0x0 2. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved6,Reserved" "0,1"
rgroup.quad 0xE0++0x7
line.quad 0x0 "SDIO_INFO1_MASK__16_HH,The SDIO_INFO1 interrupt mask register (SDIO_INFO1_MASK) enables or disables the SD_INFO1 interrupt. When 0 is set in SDIO_INFO1_MASK while the corresponding flag in SD_INFO1 is set. an interrupt occurs."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.long 0x0 16.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
hexmask.quad.word 0x0 3.--13. 1. "Reserved3,Reserved"
newline
bitfld.quad 0x0 2. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved6,Reserved" "0,1"
group.quad 0xE0++0x7
line.quad 0x0 "SDIO_INFO1_MASK__32_L,The SDIO_INFO1 interrupt mask register (SDIO_INFO1_MASK) enables or disables the SD_INFO1 interrupt. When 0 is set in SDIO_INFO1_MASK while the corresponding flag in SD_INFO1 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "MEXWT,EXWT interrupt masked" "0,1"
newline
bitfld.quad 0x0 14. "MEXPUB52,EXPUB52 interrupt masked" "0,1"
newline
hexmask.quad.word 0x0 3.--13. 1. "Reserved_3,Reserved bits"
newline
bitfld.quad 0x0 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved_1,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "IOMSK,IOIRQ interrupt masked" "0,1"
rgroup.quad 0xE0++0x7
line.quad 0x0 "SDIO_INFO1_MASK__32_H,The SDIO_INFO1 interrupt mask register (SDIO_INFO1_MASK) enables or disables the SD_INFO1 interrupt. When 0 is set in SDIO_INFO1_MASK while the corresponding flag in SD_INFO1 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
hexmask.quad.word 0x0 3.--13. 1. "Reserved3,Reserved"
newline
bitfld.quad 0x0 2. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved6,Reserved" "0,1"
group.quad 0x360++0x7
line.quad 0x0 "CC_EXT_MODE,The DMA mode enable register (CC_EXT_MODE) enables the DMA transfer."
hexmask.quad 0x0 13.--63. 1. "Reserved_13,Reserved bits"
newline
rbitfld.quad 0x0 12. "Reserved_12,Reserved bits" "0,1"
newline
rbitfld.quad 0x0 10.--11. "Reserved_10,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
newline
rbitfld.quad 0x0 6.--7. "Reserved_6,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 5. "Reserved_5,Reserved" "0,1"
newline
rbitfld.quad 0x0 4. "Reserved_4,Reserved bits" "0,1"
newline
rbitfld.quad 0x0 2.--3. "Reserved_2,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 1. "DMASDRW,SD_BUF Read/Write DMA Transfer" "0: The SD_BUF read/write DMA transfer is disabled,1: The SD_BUF read/write DMA transfer is enabled"
newline
bitfld.quad 0x0 0. "Reserved_0,Reserved" "0,1"
group.quad 0x360++0x7
line.quad 0x0 "CC_EXT_MODE__16_LL,The DMA mode enable register (CC_EXT_MODE) enables the DMA transfer."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
rbitfld.quad 0x0 13.--15. "Reserved_13,Reserved bits" "0,1,2,3,4,5,6,7"
newline
rbitfld.quad 0x0 12. "Reserved_12,Reserved bits" "0,1"
newline
rbitfld.quad 0x0 10.--11. "Reserved_10,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
newline
rbitfld.quad 0x0 6.--7. "Reserved_6,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 5. "Reserved_5,Reserved" "0,1"
newline
rbitfld.quad 0x0 4. "Reserved_4,Reserved bits" "0,1"
newline
rbitfld.quad 0x0 2.--3. "Reserved_2,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 1. "DMASDRW,SD_BUF Read/Write DMA Transfer" "0: The SD_BUF read/write DMA transfer is disabled,1: The SD_BUF read/write DMA transfer is enabled"
newline
bitfld.quad 0x0 0. "Reserved_0,Reserved" "0,1"
rgroup.quad 0x360++0x7
line.quad 0x0 "CC_EXT_MODE__16_LH,The DMA mode enable register (CC_EXT_MODE) enables the DMA transfer."
hexmask.quad.long 0x0 32.--63. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_13,Reserved bits"
newline
bitfld.quad 0x0 13.--15. "Reserved0,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 12. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 10.--11. "Reserved3,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 8.--9. "Reserved4,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 6.--7. "Reserved5,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 5. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 2.--3. "Reserved8,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 1. "Reserved9,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved10,Reserved" "0,1"
rgroup.quad 0x360++0x7
line.quad 0x0 "CC_EXT_MODE__16_HL,The DMA mode enable register (CC_EXT_MODE) enables the DMA transfer."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_13,Reserved bits"
newline
hexmask.quad.tbyte 0x0 13.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 12. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 10.--11. "Reserved2,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 8.--9. "Reserved3,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 6.--7. "Reserved4,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 5. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 2.--3. "Reserved7,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 1. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved9,Reserved" "0,1"
rgroup.quad 0x360++0x7
line.quad 0x0 "CC_EXT_MODE__16_HH,The DMA mode enable register (CC_EXT_MODE) enables the DMA transfer."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_13,Reserved bits"
newline
hexmask.quad 0x0 13.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 12. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 10.--11. "Reserved2,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 8.--9. "Reserved3,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 6.--7. "Reserved4,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 5. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 2.--3. "Reserved7,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 1. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved9,Reserved" "0,1"
group.quad 0x360++0x7
line.quad 0x0 "CC_EXT_MODE__32_L,The DMA mode enable register (CC_EXT_MODE) enables the DMA transfer."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved bits"
newline
rbitfld.quad 0x0 12. "Reserved_12,Reserved bits" "0,1"
newline
rbitfld.quad 0x0 10.--11. "Reserved_10,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
newline
rbitfld.quad 0x0 6.--7. "Reserved_6,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 5. "Reserved_5,Reserved" "0,1"
newline
rbitfld.quad 0x0 4. "Reserved_4,Reserved bits" "0,1"
newline
rbitfld.quad 0x0 2.--3. "Reserved_2,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 1. "DMASDRW,SD_BUF Read/Write DMA Transfer" "0: The SD_BUF read/write DMA transfer is disabled,1: The SD_BUF read/write DMA transfer is enabled"
newline
bitfld.quad 0x0 0. "Reserved_0,Reserved" "0,1"
rgroup.quad 0x360++0x7
line.quad 0x0 "CC_EXT_MODE__32_H,The DMA mode enable register (CC_EXT_MODE) enables the DMA transfer."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_13,Reserved bits"
newline
hexmask.quad.tbyte 0x0 13.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 12. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 10.--11. "Reserved2,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 8.--9. "Reserved3,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 6.--7. "Reserved4,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 5. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 4. "Reserved6,Reserved" "0,1"
newline
bitfld.quad 0x0 2.--3. "Reserved7,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 1. "Reserved8,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved9,Reserved" "0,1"
group.quad 0x380++0x7
line.quad 0x0 "SOFT_RST,The software reset register (SOFT_RST) sets a software reset. Also use this register to check that release from the reset state has been completed before attempting to use the SD host interface and before attempting access to the other registers."
hexmask.quad 0x0 3.--63. 1. "Reserved_3,Reserved bits"
newline
rbitfld.quad 0x0 2. "Reserved_2,Reserved bits" "0,1"
newline
rbitfld.quad 0x0 1. "Reserved_1,Reserved bits" "0,1"
newline
bitfld.quad 0x0 0. "SDRST,Software Reset of SD Interface Unit" "0: Reset,1: Reset released"
group.quad 0x380++0x7
line.quad 0x0 "SOFT_RST__16_LL,The software reset register (SOFT_RST) sets a software reset. Also use this register to check that release from the reset state has been completed before attempting to use the SD host interface and before attempting access to the other.."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 3.--15. 1. "Reserved_3,Reserved bits"
newline
rbitfld.quad 0x0 2. "Reserved_2,Reserved bits" "0,1"
newline
rbitfld.quad 0x0 1. "Reserved_1,Reserved bits" "0,1"
newline
bitfld.quad 0x0 0. "SDRST,Software Reset of SD Interface Unit" "0: Reset,1: Reset released"
rgroup.quad 0x380++0x7
line.quad 0x0 "SOFT_RST__16_LH,The software reset register (SOFT_RST) sets a software reset. Also use this register to check that release from the reset state has been completed before attempting to use the SD host interface and before attempting access to the other.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_3,Reserved bits"
newline
hexmask.quad.word 0x0 3.--15. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 2. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved4,Reserved" "0,1"
rgroup.quad 0x380++0x7
line.quad 0x0 "SOFT_RST__16_HL,The software reset register (SOFT_RST) sets a software reset. Also use this register to check that release from the reset state has been completed before attempting to use the SD host interface and before attempting access to the other.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_3,Reserved bits"
newline
hexmask.quad.long 0x0 3.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 2. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved3,Reserved" "0,1"
rgroup.quad 0x380++0x7
line.quad 0x0 "SOFT_RST__16_HH,The software reset register (SOFT_RST) sets a software reset. Also use this register to check that release from the reset state has been completed before attempting to use the SD host interface and before attempting access to the other.."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_3,Reserved bits"
newline
hexmask.quad 0x0 3.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 2. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved3,Reserved" "0,1"
group.quad 0x380++0x7
line.quad 0x0 "SOFT_RST__32_L,The software reset register (SOFT_RST) sets a software reset. Also use this register to check that release from the reset state has been completed before attempting to use the SD host interface and before attempting access to the other.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 3.--31. 1. "Reserved_3,Reserved bits"
newline
rbitfld.quad 0x0 2. "Reserved_2,Reserved bits" "0,1"
newline
rbitfld.quad 0x0 1. "Reserved_1,Reserved bits" "0,1"
newline
bitfld.quad 0x0 0. "SDRST,Software Reset of SD Interface Unit" "0: Reset,1: Reset released"
rgroup.quad 0x380++0xF
line.quad 0x0 "SOFT_RST__32_H,The software reset register (SOFT_RST) sets a software reset. Also use this register to check that release from the reset state has been completed before attempting to use the SD host interface and before attempting access to the other.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_3,Reserved bits"
newline
hexmask.quad.long 0x0 3.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 2. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved3,Reserved" "0,1"
line.quad 0x8 "VERSION,The version register (VERSION) indicates the version of the SD host interface."
hexmask.quad 0x8 16.--63. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x8 15. "UR0,Reserved bits" "0,1"
newline
bitfld.quad 0x8 14. "UR1,Reserved bits" "0,1"
newline
bitfld.quad 0x8 12.--13. "UR2,Reserved bits" "0,1,2,3"
newline
hexmask.quad.byte 0x8 8.--11. 1. "UR3,Version of Renesassingle_quotation IP"
newline
hexmask.quad.byte 0x8 0.--7. 1. "IP,Version of introductory IP"
rgroup.quad 0x388++0x7
line.quad 0x0 "VERSION__16_LL,The version register (VERSION) indicates the version of the SD host interface."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "UR0,Reserved bits" "0,1"
newline
bitfld.quad 0x0 14. "UR1,Reserved bits" "0,1"
newline
bitfld.quad 0x0 12.--13. "UR2,Reserved bits" "0,1,2,3"
newline
hexmask.quad.byte 0x0 8.--11. 1. "UR3,Version of Renesassingle_quotation IP"
newline
hexmask.quad.byte 0x0 0.--7. 1. "IP,Version of introductory IP"
rgroup.quad 0x388++0x7
line.quad 0x0 "VERSION__16_LH,The version register (VERSION) indicates the version of the SD host interface."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 12.--13. "Reserved3,Reserved" "0,1,2,3"
newline
hexmask.quad.byte 0x0 8.--11. 1. "Reserved4,Reserved"
newline
hexmask.quad.byte 0x0 0.--7. 1. "Reserved5,Reserved"
rgroup.quad 0x388++0x7
line.quad 0x0 "VERSION__16_HL,The version register (VERSION) indicates the version of the SD host interface."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 12.--13. "Reserved3,Reserved" "0,1,2,3"
newline
hexmask.quad.byte 0x0 8.--11. 1. "Reserved4,Reserved"
newline
hexmask.quad.byte 0x0 0.--7. 1. "Reserved5,Reserved"
rgroup.quad 0x388++0x7
line.quad 0x0 "VERSION__16_HH,The version register (VERSION) indicates the version of the SD host interface."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.long 0x0 16.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 12.--13. "Reserved3,Reserved" "0,1,2,3"
newline
hexmask.quad.byte 0x0 8.--11. 1. "Reserved4,Reserved"
newline
hexmask.quad.byte 0x0 0.--7. 1. "Reserved5,Reserved"
rgroup.quad 0x388++0x7
line.quad 0x0 "VERSION__32_L,The version register (VERSION) indicates the version of the SD host interface."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
newline
bitfld.quad 0x0 15. "UR0,Reserved bits" "0,1"
newline
bitfld.quad 0x0 14. "UR1,Reserved bits" "0,1"
newline
bitfld.quad 0x0 12.--13. "UR2,Reserved bits" "0,1,2,3"
newline
hexmask.quad.byte 0x0 8.--11. 1. "UR3,Version of Renesassingle_quotation IP"
newline
hexmask.quad.byte 0x0 0.--7. 1. "IP,Version of introductory IP"
rgroup.quad 0x388++0x7
line.quad 0x0 "VERSION__32_H,The version register (VERSION) indicates the version of the SD host interface."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_16,Reserved bits"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 15. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 12.--13. "Reserved3,Reserved" "0,1,2,3"
newline
hexmask.quad.byte 0x0 8.--11. 1. "Reserved4,Reserved"
newline
hexmask.quad.byte 0x0 0.--7. 1. "Reserved5,Reserved"
group.quad 0x390++0x7
line.quad 0x0 "HOST_MODE,The host interface mode setting register (HOST_MODE) selects the width for access to the data bus."
hexmask.quad 0x0 9.--63. 1. "Reserved_9,Reserved bits"
newline
bitfld.quad 0x0 8. "BUSWIDTH,Width for Access to SD_BUF" "0: 16-bit access,1: 32-bit access"
newline
hexmask.quad.byte 0x0 2.--7. 1. "Reserved_2,Reserved bits"
newline
bitfld.quad 0x0 1. "ENDIAN,SD_BUF0 data swap" "0,1"
newline
bitfld.quad 0x0 0. "WMODE,Width for Access to SD_BUF" "0: 64-bit access,1: 16-bit or 32-bit access"
group.quad 0x390++0x7
line.quad 0x0 "HOST_MODE__16_LL,The host interface mode setting register (HOST_MODE) selects the width for access to the data bus."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved_9,Reserved bits"
newline
bitfld.quad 0x0 8. "BUSWIDTH,Width for Access to SD_BUF" "0: 16-bit access,1: 32-bit access"
newline
hexmask.quad.byte 0x0 2.--7. 1. "Reserved_2,Reserved bits"
newline
bitfld.quad 0x0 1. "ENDIAN,SD_BUF0 data swap" "0,1"
newline
bitfld.quad 0x0 0. "WMODE,Width for Access to SD_BUF" "0: 64-bit access,1: 16-bit or 32-bit access"
rgroup.quad 0x390++0x7
line.quad 0x0 "HOST_MODE__16_LH,The host interface mode setting register (HOST_MODE) selects the width for access to the data bus."
hexmask.quad.long 0x0 32.--63. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_9,Reserved bits"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 8. "Reserved2,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 2.--7. 1. "Reserved3,Reserved"
newline
bitfld.quad 0x0 1. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved5,Reserved" "0,1"
rgroup.quad 0x390++0x7
line.quad 0x0 "HOST_MODE__16_HL,The host interface mode setting register (HOST_MODE) selects the width for access to the data bus."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_9,Reserved bits"
newline
hexmask.quad.tbyte 0x0 9.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 8. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 2.--7. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 1. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved4,Reserved" "0,1"
rgroup.quad 0x390++0x7
line.quad 0x0 "HOST_MODE__16_HH,The host interface mode setting register (HOST_MODE) selects the width for access to the data bus."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_9,Reserved bits"
newline
hexmask.quad 0x0 9.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 8. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 2.--7. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 1. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved4,Reserved" "0,1"
group.quad 0x390++0x7
line.quad 0x0 "HOST_MODE__32_L,The host interface mode setting register (HOST_MODE) selects the width for access to the data bus."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved bits"
newline
bitfld.quad 0x0 8. "BUSWIDTH,Width for Access to SD_BUF" "0: 16-bit access,1: 32-bit access"
newline
hexmask.quad.byte 0x0 2.--7. 1. "Reserved_2,Reserved bits"
newline
bitfld.quad 0x0 1. "ENDIAN,SD_BUF0 data swap" "0,1"
newline
bitfld.quad 0x0 0. "WMODE,Width for Access to SD_BUF" "0: 64-bit access,1: 16-bit or 32-bit access"
rgroup.quad 0x390++0x7
line.quad 0x0 "HOST_MODE__32_H,The host interface mode setting register (HOST_MODE) selects the width for access to the data bus."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_9,Reserved bits"
newline
hexmask.quad.tbyte 0x0 9.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 8. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 2.--7. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 1. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved4,Reserved" "0,1"
group.quad 0x398++0x7
line.quad 0x0 "SDIF_MODE,The SD interface mode setting register (SDIF_MODE) specifies HS400 mode."
hexmask.quad 0x0 10.--63. 1. "Reserved_10,Reserved bits"
newline
bitfld.quad 0x0 9. "Reserved_9,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "NOCHKCR,CRC Check Mask (test command for MMC supported)" "0: Enables the CRC check,1: Disables the CRC check"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "HS400,HS400 Mode Select*2" "0: Normal mode,1: 1"
group.quad 0x398++0x7
line.quad 0x0 "SDIF_MODE__16_LL,The SD interface mode setting register (SDIF_MODE) specifies HS400 mode."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.byte 0x0 10.--15. 1. "Reserved_10,Reserved bits"
newline
bitfld.quad 0x0 9. "Reserved_9,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "NOCHKCR,CRC Check Mask (test command for MMC supported)" "0: Enables the CRC check,1: Disables the CRC check"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "HS400,HS400 Mode Select*2" "0: Normal mode,1: 1"
rgroup.quad 0x398++0x7
line.quad 0x0 "SDIF_MODE__16_LH,The SD interface mode setting register (SDIF_MODE) specifies HS400 mode."
hexmask.quad.long 0x0 32.--63. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_10,Reserved bits"
newline
hexmask.quad.byte 0x0 10.--15. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 9. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved3,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved4,Reserved"
newline
bitfld.quad 0x0 0. "Reserved5,Reserved" "0,1"
rgroup.quad 0x398++0x7
line.quad 0x0 "SDIF_MODE__16_HL,The SD interface mode setting register (SDIF_MODE) specifies HS400 mode."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_10,Reserved bits"
newline
hexmask.quad.tbyte 0x0 10.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 9. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved2,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved3,Reserved"
newline
bitfld.quad 0x0 0. "Reserved4,Reserved" "0,1"
rgroup.quad 0x398++0x7
line.quad 0x0 "SDIF_MODE__16_HH,The SD interface mode setting register (SDIF_MODE) specifies HS400 mode."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_10,Reserved bits"
newline
hexmask.quad 0x0 10.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 9. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved2,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved3,Reserved"
newline
bitfld.quad 0x0 0. "Reserved4,Reserved" "0,1"
group.quad 0x398++0x7
line.quad 0x0 "SDIF_MODE__32_L,The SD interface mode setting register (SDIF_MODE) specifies HS400 mode."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved bits"
newline
bitfld.quad 0x0 9. "Reserved_9,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "NOCHKCR,CRC Check Mask (test command for MMC supported)" "0: Enables the CRC check,1: Disables the CRC check"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "HS400,HS400 Mode Select*2" "0: Normal mode,1: 1"
rgroup.quad 0x398++0x7
line.quad 0x0 "SDIF_MODE__32_H,The SD interface mode setting register (SDIF_MODE) specifies HS400 mode."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_10,Reserved bits"
newline
hexmask.quad.tbyte 0x0 10.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 9. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 8. "Reserved2,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved3,Reserved"
newline
bitfld.quad 0x0 0. "Reserved4,Reserved" "0,1"
group.quad 0x800++0x7
line.quad 0x0 "DM_CM_SEQ_REGSET,This register indicates a DMAC(SEQ) context. table setting register."
hexmask.quad 0x0 9.--63. 1. "Reserved_9,Reserved bits"
newline
bitfld.quad 0x0 8. "TABLE_NUM,Sequencer Table number" "0: sequencer table 0,1: sequencer table 1"
newline
hexmask.quad.byte 0x0 2.--7. 1. "Reserved_2,Reserved bits"
newline
bitfld.quad 0x0 0.--1. "CTXT_NUM,Context number (0~3)" "0,1,2,3"
group.quad 0x800++0x7
line.quad 0x0 "DM_CM_SEQ_REGSET__16_LL,This register indicates a DMAC(SEQ) context. table setting register."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved_9,Reserved bits"
newline
bitfld.quad 0x0 8. "TABLE_NUM,Sequencer Table number" "0: sequencer table 0,1: sequencer table 1"
newline
hexmask.quad.byte 0x0 2.--7. 1. "Reserved_2,Reserved bits"
newline
bitfld.quad 0x0 0.--1. "CTXT_NUM,Context number (0~3)" "0,1,2,3"
rgroup.quad 0x800++0x7
line.quad 0x0 "DM_CM_SEQ_REGSET__16_LH,This register indicates a DMAC(SEQ) context. table setting register."
hexmask.quad.long 0x0 32.--63. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_9,Reserved bits"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 8. "Reserved2,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 2.--7. 1. "Reserved3,Reserved"
newline
bitfld.quad 0x0 0.--1. "Reserved4,Reserved" "0,1,2,3"
rgroup.quad 0x800++0x7
line.quad 0x0 "DM_CM_SEQ_REGSET__16_HL,This register indicates a DMAC(SEQ) context. table setting register."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_9,Reserved bits"
newline
hexmask.quad.tbyte 0x0 9.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 8. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 2.--7. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 0.--1. "Reserved3,Reserved" "0,1,2,3"
rgroup.quad 0x800++0x7
line.quad 0x0 "DM_CM_SEQ_REGSET__16_HH,This register indicates a DMAC(SEQ) context. table setting register."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_9,Reserved bits"
newline
hexmask.quad 0x0 9.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 8. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 2.--7. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 0.--1. "Reserved3,Reserved" "0,1,2,3"
group.quad 0x800++0x7
line.quad 0x0 "DM_CM_SEQ_REGSET__32_L,This register indicates a DMAC(SEQ) context. table setting register."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved bits"
newline
bitfld.quad 0x0 8. "TABLE_NUM,Sequencer Table number" "0: sequencer table 0,1: sequencer table 1"
newline
hexmask.quad.byte 0x0 2.--7. 1. "Reserved_2,Reserved bits"
newline
bitfld.quad 0x0 0.--1. "CTXT_NUM,Context number (0~3)" "0,1,2,3"
rgroup.quad 0x800++0x7
line.quad 0x0 "DM_CM_SEQ_REGSET__32_H,This register indicates a DMAC(SEQ) context. table setting register."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_9,Reserved bits"
newline
hexmask.quad.tbyte 0x0 9.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 8. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 2.--7. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 0.--1. "Reserved3,Reserved" "0,1,2,3"
group.quad 0x810++0x7
line.quad 0x0 "DM_CM_SEQ_CTRL,This register indicates a DMAC(SEQ) control register."
hexmask.quad 0x0 29.--63. 1. "Reserved_29,Reserved bits"
newline
bitfld.quad 0x0 28. "SEQ_TABLE,This bit indicates sequencer table number for queuing command." "0,1"
newline
rbitfld.quad 0x0 25.--27. "Reserved_25,Reserved bits" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 24. "T_NUM,Maximum Table number for SDmultiple command stack" "0,1"
newline
hexmask.quad.byte 0x0 18.--23. 1. "Reserved_18,Reserved bits"
newline
bitfld.quad 0x0 16.--17. "SEQ_TYPE,Sequencer mode selector" "0: Not use Sequencer,1: SD multiple command stack,?,?"
newline
rbitfld.quad 0x0 14.--15. "Reserved_14,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 12.--13. "START_NUM,These bits indicate start number of context for queuing command (0-3)." "0,1,2,3"
newline
rbitfld.quad 0x0 10.--11. "Reserved_10,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 8.--9. "END_NUM,These bits indicate end number of context for queuing command (0-3)." "0,1,2,3"
newline
rbitfld.quad 0x0 7. "Reserved_7,Reserved bits" "0,1"
newline
bitfld.quad 0x0 6. "PRIORITY_MODE,Priority control mode selector for SD multiple command stack *1" "0: SDIP executes in order,1: SDIP executes in order of priority"
newline
rbitfld.quad 0x0 4.--5. "Reserved_4,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 3. "SEQ_SUSPEND,This bit triggers to suspend sequencer process" "0,1"
newline
bitfld.quad 0x0 2. "SEQ_RESUME,This bit triggers to resume sequencer process" "0,1"
newline
rbitfld.quad 0x0 1. "Reserved_1,Reserved bits" "0,1"
newline
bitfld.quad 0x0 0. "SEQ_START,This bit triggers to queuing command." "0,1"
group.quad 0x810++0x7
line.quad 0x0 "DM_CM_SEQ_CTRL__16_LL,This register indicates a DMAC(SEQ) control register."
hexmask.quad 0x0 29.--63. 1. "Reserved0,Reserved"
newline
rbitfld.quad 0x0 28. "Reserved1,Reserved" "0,1"
newline
rbitfld.quad 0x0 25.--27. "Reserved2,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.quad 0x0 24. "Reserved3,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 18.--23. 1. "Reserved4,Reserved"
newline
rbitfld.quad 0x0 16.--17. "Reserved5,Reserved" "0,1,2,3"
newline
rbitfld.quad 0x0 14.--15. "Reserved_14,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 12.--13. "START_NUM,These bits indicate start number of context for queuing command (0-3)." "0,1,2,3"
newline
rbitfld.quad 0x0 10.--11. "Reserved_10,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 8.--9. "END_NUM,These bits indicate end number of context for queuing command (0-3)." "0,1,2,3"
newline
rbitfld.quad 0x0 7. "Reserved_7,Reserved bits" "0,1"
newline
bitfld.quad 0x0 6. "PRIORITY_MODE,Priority control mode selector for SD multiple command stack *1" "0: SDIP executes in order,1: SDIP executes in order of priority"
newline
rbitfld.quad 0x0 4.--5. "Reserved_4,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 3. "SEQ_SUSPEND,This bit triggers to suspend sequencer process" "0,1"
newline
bitfld.quad 0x0 2. "SEQ_RESUME,This bit triggers to resume sequencer process" "0,1"
newline
rbitfld.quad 0x0 1. "Reserved_1,Reserved bits" "0,1"
newline
bitfld.quad 0x0 0. "SEQ_START,This bit triggers to queuing command." "0,1"
group.quad 0x810++0x7
line.quad 0x0 "DM_CM_SEQ_CTRL__16_LH,This register indicates a DMAC(SEQ) control register."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
rbitfld.quad 0x0 29.--31. "Reserved_29,Reserved bits" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 28. "SEQ_TABLE,This bit indicates sequencer table number for queuing command." "0,1"
newline
rbitfld.quad 0x0 25.--27. "Reserved_25,Reserved bits" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 24. "T_NUM,Maximum Table number for SDmultiple command stack" "0,1"
newline
hexmask.quad.byte 0x0 18.--23. 1. "Reserved_18,Reserved bits"
newline
bitfld.quad 0x0 16.--17. "SEQ_TYPE,Sequencer mode selector" "0: Not use Sequencer,1: SD multiple command stack,?,?"
newline
rbitfld.quad 0x0 14.--15. "Reserved6,Reserved" "0,1,2,3"
newline
rbitfld.quad 0x0 12.--13. "Reserved7,Reserved" "0,1,2,3"
newline
rbitfld.quad 0x0 10.--11. "Reserved8,Reserved" "0,1,2,3"
newline
rbitfld.quad 0x0 8.--9. "Reserved9,Reserved" "0,1,2,3"
newline
rbitfld.quad 0x0 7. "Reserved10,Reserved" "0,1"
newline
rbitfld.quad 0x0 6. "Reserved11,Reserved" "0,1"
newline
rbitfld.quad 0x0 4.--5. "Reserved12,Reserved" "0,1,2,3"
newline
rbitfld.quad 0x0 3. "Reserved13,Reserved" "0,1"
newline
rbitfld.quad 0x0 2. "Reserved14,Reserved" "0,1"
newline
rbitfld.quad 0x0 1. "Reserved15,Reserved" "0,1"
newline
rbitfld.quad 0x0 0. "Reserved16,Reserved" "0,1"
rgroup.quad 0x810++0x7
line.quad 0x0 "DM_CM_SEQ_CTRL__16_HL,This register indicates a DMAC(SEQ) control register."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_29,Reserved bits"
newline
bitfld.quad 0x0 29.--31. "Reserved0,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 28. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 25.--27. "Reserved2,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 24. "Reserved3,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 18.--23. 1. "Reserved4,Reserved"
newline
bitfld.quad 0x0 16.--17. "Reserved5,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 14.--15. "Reserved6,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 12.--13. "Reserved7,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 10.--11. "Reserved8,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 8.--9. "Reserved9,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 7. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 4.--5. "Reserved12,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 3. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved14,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved15,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved16,Reserved" "0,1"
rgroup.quad 0x810++0x7
line.quad 0x0 "DM_CM_SEQ_CTRL__16_HH,This register indicates a DMAC(SEQ) control register."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_29,Reserved bits"
newline
hexmask.quad.tbyte 0x0 29.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 28. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 25.--27. "Reserved2,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 24. "Reserved3,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 18.--23. 1. "Reserved4,Reserved"
newline
bitfld.quad 0x0 16.--17. "Reserved5,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 14.--15. "Reserved6,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 12.--13. "Reserved7,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 10.--11. "Reserved8,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 8.--9. "Reserved9,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 7. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 4.--5. "Reserved12,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 3. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved14,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved15,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved16,Reserved" "0,1"
group.quad 0x810++0x7
line.quad 0x0 "DM_CM_SEQ_CTRL__32_L,This register indicates a DMAC(SEQ) control register."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
rbitfld.quad 0x0 29.--31. "Reserved_29,Reserved bits" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 28. "SEQ_TABLE,This bit indicates sequencer table number for queuing command." "0,1"
newline
rbitfld.quad 0x0 25.--27. "Reserved_25,Reserved bits" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 24. "T_NUM,Maximum Table number for SDmultiple command stack" "0,1"
newline
hexmask.quad.byte 0x0 18.--23. 1. "Reserved_18,Reserved bits"
newline
bitfld.quad 0x0 16.--17. "SEQ_TYPE,Sequencer mode selector" "0: Not use Sequencer,1: SD multiple command stack,?,?"
newline
rbitfld.quad 0x0 14.--15. "Reserved_14,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 12.--13. "START_NUM,These bits indicate start number of context for queuing command (0-3)." "0,1,2,3"
newline
rbitfld.quad 0x0 10.--11. "Reserved_10,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 8.--9. "END_NUM,These bits indicate end number of context for queuing command (0-3)." "0,1,2,3"
newline
rbitfld.quad 0x0 7. "Reserved_7,Reserved bits" "0,1"
newline
bitfld.quad 0x0 6. "PRIORITY_MODE,Priority control mode selector for SD multiple command stack *1" "0: SDIP executes in order,1: SDIP executes in order of priority"
newline
rbitfld.quad 0x0 4.--5. "Reserved_4,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 3. "SEQ_SUSPEND,This bit triggers to suspend sequencer process" "0,1"
newline
bitfld.quad 0x0 2. "SEQ_RESUME,This bit triggers to resume sequencer process" "0,1"
newline
rbitfld.quad 0x0 1. "Reserved_1,Reserved bits" "0,1"
newline
bitfld.quad 0x0 0. "SEQ_START,This bit triggers to queuing command." "0,1"
rgroup.quad 0x810++0x7
line.quad 0x0 "DM_CM_SEQ_CTRL__32_H,This register indicates a DMAC(SEQ) control register."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_29,Reserved bits"
newline
bitfld.quad 0x0 29.--31. "Reserved0,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 28. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 25.--27. "Reserved2,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 24. "Reserved3,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 18.--23. 1. "Reserved4,Reserved"
newline
bitfld.quad 0x0 16.--17. "Reserved5,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 14.--15. "Reserved6,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 12.--13. "Reserved7,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 10.--11. "Reserved8,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 8.--9. "Reserved9,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 7. "Reserved10,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved11,Reserved" "0,1"
newline
bitfld.quad 0x0 4.--5. "Reserved12,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 3. "Reserved13,Reserved" "0,1"
newline
bitfld.quad 0x0 2. "Reserved14,Reserved" "0,1"
newline
bitfld.quad 0x0 1. "Reserved15,Reserved" "0,1"
newline
bitfld.quad 0x0 0. "Reserved16,Reserved" "0,1"
group.quad 0x820++0x7
line.quad 0x0 "DM_CM_DTRAN_MODE,This register indicates a DMAC(DTRAN) mode select register.Black_circleHigh 32 bits (bit 63-32) are read only 0."
hexmask.quad 0x0 18.--63. 1. "Reserved_18,Reserved bits"
newline
bitfld.quad 0x0 16.--17. "CH_NUM,DMAC channel selector" "?,1: SD up stream,?,?"
newline
hexmask.quad.word 0x0 6.--15. 1. "Reserved_6,Reserved bits"
newline
bitfld.quad 0x0 4.--5. "BUS_WIDTH,Bus width selector" "0: -,1: -,?,?"
newline
rbitfld.quad 0x0 1.--3. "Reserved_1,Reserved bits" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 0. "ADDR_MODE,System address mode selector" "0: fixed address,1: address increment"
group.quad 0x820++0x7
line.quad 0x0 "DM_CM_DTRAN_MODE__16_LL,This register indicates a DMAC(DTRAN) mode select register.Black_circleHigh 32 bits (bit 63-32) are read only 0."
hexmask.quad 0x0 18.--63. 1. "Reserved0,Reserved"
newline
rbitfld.quad 0x0 16.--17. "Reserved1,Reserved" "0,1,2,3"
newline
hexmask.quad.word 0x0 6.--15. 1. "Reserved_6,Reserved bits"
newline
bitfld.quad 0x0 4.--5. "BUS_WIDTH,Bus width selector" "0: -,1: -,?,?"
newline
rbitfld.quad 0x0 1.--3. "Reserved_1,Reserved bits" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 0. "ADDR_MODE,System address mode selector" "0: fixed address,1: address increment"
group.quad 0x820++0x7
line.quad 0x0 "DM_CM_DTRAN_MODE__16_LH,This register indicates a DMAC(DTRAN) mode select register.Black_circleHigh 32 bits (bit 63-32) are read only 0."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 18.--31. 1. "Reserved_18,Reserved bits"
newline
bitfld.quad 0x0 16.--17. "CH_NUM,DMAC channel selector" "?,1: SD up stream,?,?"
newline
hexmask.quad.word 0x0 6.--15. 1. "Reserved2,Reserved"
newline
rbitfld.quad 0x0 4.--5. "Reserved3,Reserved" "0,1,2,3"
newline
rbitfld.quad 0x0 1.--3. "Reserved4,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.quad 0x0 0. "Reserved5,Reserved" "0,1"
rgroup.quad 0x820++0x7
line.quad 0x0 "DM_CM_DTRAN_MODE__16_HL,This register indicates a DMAC(DTRAN) mode select register.Black_circleHigh 32 bits (bit 63-32) are read only 0."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_18,Reserved bits"
newline
hexmask.quad.word 0x0 18.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 16.--17. "Reserved1,Reserved" "0,1,2,3"
newline
hexmask.quad.word 0x0 6.--15. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 4.--5. "Reserved3,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 1.--3. "Reserved4,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 0. "Reserved5,Reserved" "0,1"
rgroup.quad 0x820++0x7
line.quad 0x0 "DM_CM_DTRAN_MODE__16_HH,This register indicates a DMAC(DTRAN) mode select register.Black_circleHigh 32 bits (bit 63-32) are read only 0."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_18,Reserved bits"
newline
hexmask.quad.long 0x0 18.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 16.--17. "Reserved1,Reserved" "0,1,2,3"
newline
hexmask.quad.word 0x0 6.--15. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 4.--5. "Reserved3,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 1.--3. "Reserved4,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 0. "Reserved5,Reserved" "0,1"
group.quad 0x820++0x7
line.quad 0x0 "DM_CM_DTRAN_MODE__32_L,This register indicates a DMAC(DTRAN) mode select register.Black_circleHigh 32 bits (bit 63-32) are read only 0."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 18.--31. 1. "Reserved_18,Reserved bits"
newline
bitfld.quad 0x0 16.--17. "CH_NUM,DMAC channel selector" "?,1: SD up stream,?,?"
newline
hexmask.quad.word 0x0 6.--15. 1. "Reserved_6,Reserved bits"
newline
bitfld.quad 0x0 4.--5. "BUS_WIDTH,Bus width selector" "0: -,1: -,?,?"
newline
rbitfld.quad 0x0 1.--3. "Reserved_1,Reserved bits" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 0. "ADDR_MODE,System address mode selector" "0: fixed address,1: address increment"
rgroup.quad 0x820++0x7
line.quad 0x0 "DM_CM_DTRAN_MODE__32_H,This register indicates a DMAC(DTRAN) mode select register.Black_circleHigh 32 bits (bit 63-32) are read only 0."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_18,Reserved bits"
newline
hexmask.quad.word 0x0 18.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 16.--17. "Reserved1,Reserved" "0,1,2,3"
newline
hexmask.quad.word 0x0 6.--15. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 4.--5. "Reserved3,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 1.--3. "Reserved4,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 0. "Reserved5,Reserved" "0,1"
group.quad 0x828++0x7
line.quad 0x0 "DM_CM_DTRAN_CTRL,This register indicates a DMAC(DTRAN) control register. High 32 bits (bit 63-32) are read only 0."
hexmask.quad 0x0 9.--63. 1. "Reserved_9,Reserved bits"
newline
bitfld.quad 0x0 8. "Reserved_8,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "DM_START,DMAC Start" "0,1"
group.quad 0x828++0x7
line.quad 0x0 "DM_CM_DTRAN_CTRL__16_LL,This register indicates a DMAC(DTRAN) control register. High 32 bits (bit 63-32) are read only 0."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved_9,Reserved bits"
newline
bitfld.quad 0x0 8. "Reserved_8,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "DM_START,DMAC Start" "0,1"
rgroup.quad 0x828++0x7
line.quad 0x0 "DM_CM_DTRAN_CTRL__16_LH,This register indicates a DMAC(DTRAN) control register. High 32 bits (bit 63-32) are read only 0."
hexmask.quad.long 0x0 32.--63. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_9,Reserved bits"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 8. "Reserved2,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved3,Reserved"
newline
bitfld.quad 0x0 0. "Reserved4,Reserved" "0,1"
rgroup.quad 0x828++0x7
line.quad 0x0 "DM_CM_DTRAN_CTRL__16_HL,This register indicates a DMAC(DTRAN) control register. High 32 bits (bit 63-32) are read only 0."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_9,Reserved bits"
newline
hexmask.quad.tbyte 0x0 9.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 8. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 0. "Reserved3,Reserved" "0,1"
rgroup.quad 0x828++0x7
line.quad 0x0 "DM_CM_DTRAN_CTRL__16_HH,This register indicates a DMAC(DTRAN) control register. High 32 bits (bit 63-32) are read only 0."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_9,Reserved bits"
newline
hexmask.quad 0x0 9.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 8. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 0. "Reserved3,Reserved" "0,1"
group.quad 0x828++0x7
line.quad 0x0 "DM_CM_DTRAN_CTRL__32_L,This register indicates a DMAC(DTRAN) control register. High 32 bits (bit 63-32) are read only 0."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved bits"
newline
bitfld.quad 0x0 8. "Reserved_8,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "DM_START,DMAC Start" "0,1"
rgroup.quad 0x828++0x7
line.quad 0x0 "DM_CM_DTRAN_CTRL__32_H,This register indicates a DMAC(DTRAN) control register. High 32 bits (bit 63-32) are read only 0."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_9,Reserved bits"
newline
hexmask.quad.tbyte 0x0 9.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 8. "Reserved1,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 0. "Reserved3,Reserved" "0,1"
group.quad 0x830++0x7
line.quad 0x0 "DM_CM_RST,High 32 bits (bit 63-32) are read only 0."
hexmask.quad 0x0 10.--63. 1. "Reserved_10,Reserved bits"
newline
bitfld.quad 0x0 8.--9. "DTRANRST,When software sets this bit to 0  SDIP executes soft reset to control FF of each channel. When software sets this bit to 1  SDIP releases soft reset." "0,1,2,3"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "SEQRST,When software sets this bit to 0  SDIP executes soft reset to control FF of sequencer. When software sets this bit to 1  SDIP releases soft reset." "0,1"
group.quad 0x830++0x7
line.quad 0x0 "DM_CM_RST__16_LL,High 32 bits (bit 63-32) are read only 0."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.byte 0x0 10.--15. 1. "Reserved_10,Reserved bits"
newline
bitfld.quad 0x0 8.--9. "DTRANRST,When software sets this bit to 0  SDIP executes soft reset to control FF of each channel. When software sets this bit to 1  SDIP releases soft reset." "0,1,2,3"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "SEQRST,When software sets this bit to 0  SDIP executes soft reset to control FF of sequencer. When software sets this bit to 1  SDIP releases soft reset." "0,1"
rgroup.quad 0x830++0x7
line.quad 0x0 "DM_CM_RST__16_LH,High 32 bits (bit 63-32) are read only 0."
hexmask.quad.long 0x0 32.--63. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_10,Reserved bits"
newline
hexmask.quad.byte 0x0 10.--15. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 8.--9. "Reserved2,Reserved" "0,1,2,3"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved3,Reserved"
newline
bitfld.quad 0x0 0. "Reserved4,Reserved" "0,1"
rgroup.quad 0x830++0x7
line.quad 0x0 "DM_CM_RST__16_HL,High 32 bits (bit 63-32) are read only 0."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_10,Reserved bits"
newline
hexmask.quad.tbyte 0x0 10.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 8.--9. "Reserved1,Reserved" "0,1,2,3"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 0. "Reserved3,Reserved" "0,1"
rgroup.quad 0x830++0x7
line.quad 0x0 "DM_CM_RST__16_HH,High 32 bits (bit 63-32) are read only 0."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_10,Reserved bits"
newline
hexmask.quad 0x0 10.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 8.--9. "Reserved1,Reserved" "0,1,2,3"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 0. "Reserved3,Reserved" "0,1"
group.quad 0x830++0x7
line.quad 0x0 "DM_CM_RST__32_L,High 32 bits (bit 63-32) are read only 0."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved bits"
newline
bitfld.quad 0x0 8.--9. "DTRANRST,When software sets this bit to 0  SDIP executes soft reset to control FF of each channel. When software sets this bit to 1  SDIP releases soft reset." "0,1,2,3"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "SEQRST,When software sets this bit to 0  SDIP executes soft reset to control FF of sequencer. When software sets this bit to 1  SDIP releases soft reset." "0,1"
rgroup.quad 0x830++0x7
line.quad 0x0 "DM_CM_RST__32_H,High 32 bits (bit 63-32) are read only 0."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_10,Reserved bits"
newline
hexmask.quad.tbyte 0x0 10.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 8.--9. "Reserved1,Reserved" "0,1,2,3"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved2,Reserved"
newline
bitfld.quad 0x0 0. "Reserved3,Reserved" "0,1"
group.quad 0x840++0x7
line.quad 0x0 "DM_CM_INFO1,The DMAC interrupt register 1 (DM_CM_INFO1) indicates the status of DMAC and a sequencer. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad 0x0 21.--63. 1. "Reserved_21,Reserved bits"
newline
bitfld.quad 0x0 20. "DTRANEND1,DMAC Channel 1 Transfer End" "0,1"
newline
rbitfld.quad 0x0 18.--19. "Reserved_18,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "DTRANEND0,DMAC Channel 0 Transfer End" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved_9,Reserved bits"
newline
bitfld.quad 0x0 8. "SEQSUSPEND,Interrupt of command sequencer process suspend" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "SEQEND,Sequencer Operation End" "0,1"
group.quad 0x840++0x7
line.quad 0x0 "DM_CM_INFO1__16_LL,The DMAC interrupt register 1 (DM_CM_INFO1) indicates the status of DMAC and a sequencer. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad 0x0 21.--63. 1. "Reserved0,Reserved"
newline
rbitfld.quad 0x0 20. "Reserved1,Reserved" "0,1"
newline
rbitfld.quad 0x0 18.--19. "Reserved2,Reserved" "0,1,2,3"
newline
rbitfld.quad 0x0 17. "Reserved3,Reserved" "0,1"
newline
rbitfld.quad 0x0 16. "Reserved4,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved_9,Reserved bits"
newline
bitfld.quad 0x0 8. "SEQSUSPEND,Interrupt of command sequencer process suspend" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "SEQEND,Sequencer Operation End" "0,1"
group.quad 0x840++0x7
line.quad 0x0 "DM_CM_INFO1__16_LH,The DMAC interrupt register 1 (DM_CM_INFO1) indicates the status of DMAC and a sequencer. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 21.--31. 1. "Reserved_21,Reserved bits"
newline
bitfld.quad 0x0 20. "DTRANEND1,DMAC Channel 1 Transfer End" "0,1"
newline
rbitfld.quad 0x0 18.--19. "Reserved_18,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "DTRANEND0,DMAC Channel 0 Transfer End" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved5,Reserved"
newline
rbitfld.quad 0x0 8. "Reserved6,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved7,Reserved"
newline
rbitfld.quad 0x0 0. "Reserved8,Reserved" "0,1"
rgroup.quad 0x840++0x7
line.quad 0x0 "DM_CM_INFO1__16_HL,The DMAC interrupt register 1 (DM_CM_INFO1) indicates the status of DMAC and a sequencer. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_21,Reserved bits"
newline
hexmask.quad.word 0x0 21.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 20. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 18.--19. "Reserved2,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "Reserved4,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved5,Reserved"
newline
bitfld.quad 0x0 8. "Reserved6,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved7,Reserved"
newline
bitfld.quad 0x0 0. "Reserved8,Reserved" "0,1"
rgroup.quad 0x840++0x7
line.quad 0x0 "DM_CM_INFO1__16_HH,The DMAC interrupt register 1 (DM_CM_INFO1) indicates the status of DMAC and a sequencer. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_21,Reserved bits"
newline
hexmask.quad.long 0x0 21.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 20. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 18.--19. "Reserved2,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "Reserved4,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved5,Reserved"
newline
bitfld.quad 0x0 8. "Reserved6,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved7,Reserved"
newline
bitfld.quad 0x0 0. "Reserved8,Reserved" "0,1"
group.quad 0x840++0x7
line.quad 0x0 "DM_CM_INFO1__32_L,The DMAC interrupt register 1 (DM_CM_INFO1) indicates the status of DMAC and a sequencer. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 21.--31. 1. "Reserved_21,Reserved bits"
newline
bitfld.quad 0x0 20. "DTRANEND1,DMAC Channel 1 Transfer End" "0,1"
newline
rbitfld.quad 0x0 18.--19. "Reserved_18,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "DTRANEND0,DMAC Channel 0 Transfer End" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved_9,Reserved bits"
newline
bitfld.quad 0x0 8. "SEQSUSPEND,Interrupt of command sequencer process suspend" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "SEQEND,Sequencer Operation End" "0,1"
rgroup.quad 0x840++0x7
line.quad 0x0 "DM_CM_INFO1__32_H,The DMAC interrupt register 1 (DM_CM_INFO1) indicates the status of DMAC and a sequencer. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_21,Reserved bits"
newline
hexmask.quad.word 0x0 21.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 20. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 18.--19. "Reserved2,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "Reserved4,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved5,Reserved"
newline
bitfld.quad 0x0 8. "Reserved6,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved7,Reserved"
newline
bitfld.quad 0x0 0. "Reserved8,Reserved" "0,1"
group.quad 0x848++0x7
line.quad 0x0 "DM_CM_INFO1_MASK,The DM_CM_INFO1 interrupt mask register (DM_CM_INFO1_MASK) enables or disables the DM_CM_INFO1 interrupt. When 0 is set in DM_CM_INFO1_MASK while the corresponding flag in DM_CM_INFO1 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.word 0x0 21.--31. 1. "Reserved_21,Reserved bits"
newline
bitfld.quad 0x0 20. "DTRANEND1_MASK,DTRANEND1 interrupt masked" "0,1"
newline
bitfld.quad 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "DTRANEND0_MASK,DTRANEND0 interrupt masked" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved_9,Reserved bits"
newline
bitfld.quad 0x0 8. "SEQSUSPEND_MASK,Interrupt mask for DM_CM_INFO1.SEQSUSPEND" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "SEQEND_MASK,SEQEND interrupt masked" "0,1"
group.quad 0x848++0x7
line.quad 0x0 "DM_CM_INFO1_MASK__16_LL,The DM_CM_INFO1 interrupt mask register (DM_CM_INFO1_MASK) enables or disables the DM_CM_INFO1 interrupt. When 0 is set in DM_CM_INFO1_MASK while the corresponding flag in DM_CM_INFO1 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 21.--31. 1. "Reserved1,Reserved"
newline
rbitfld.quad 0x0 20. "Reserved2,Reserved" "0,1"
newline
rbitfld.quad 0x0 18.--19. "Reserved3,Reserved" "0,1,2,3"
newline
rbitfld.quad 0x0 17. "Reserved4,Reserved" "0,1"
newline
rbitfld.quad 0x0 16. "Reserved5,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved_9,Reserved bits"
newline
bitfld.quad 0x0 8. "SEQSUSPEND_MASK,Interrupt mask for DM_CM_INFO1.SEQSUSPEND" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "SEQEND_MASK,SEQEND interrupt masked" "0,1"
group.quad 0x848++0x7
line.quad 0x0 "DM_CM_INFO1_MASK__16_LH,The DM_CM_INFO1 interrupt mask register (DM_CM_INFO1_MASK) enables or disables the DM_CM_INFO1 interrupt. When 0 is set in DM_CM_INFO1_MASK while the corresponding flag in DM_CM_INFO1 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 21.--31. 1. "Reserved_21,Reserved bits"
newline
bitfld.quad 0x0 20. "DTRANEND1_MASK,DTRANEND1 interrupt masked" "0,1"
newline
bitfld.quad 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "DTRANEND0_MASK,DTRANEND0 interrupt masked" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved6,Reserved"
newline
rbitfld.quad 0x0 8. "Reserved7,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved8,Reserved"
newline
rbitfld.quad 0x0 0. "Reserved9,Reserved" "0,1"
rgroup.quad 0x848++0x7
line.quad 0x0 "DM_CM_INFO1_MASK__16_HL,The DM_CM_INFO1 interrupt mask register (DM_CM_INFO1_MASK) enables or disables the DM_CM_INFO1 interrupt. When 0 is set in DM_CM_INFO1_MASK while the corresponding flag in DM_CM_INFO1 is set. an interrupt occurs."
hexmask.quad.word 0x0 48.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.word 0x0 21.--31. 1. "Reserved1,Reserved"
newline
bitfld.quad 0x0 20. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 18.--19. "Reserved3,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "Reserved5,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved6,Reserved"
newline
bitfld.quad 0x0 8. "Reserved7,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved8,Reserved"
newline
bitfld.quad 0x0 0. "Reserved9,Reserved" "0,1"
rgroup.quad 0x848++0x7
line.quad 0x0 "DM_CM_INFO1_MASK__16_HH,The DM_CM_INFO1 interrupt mask register (DM_CM_INFO1_MASK) enables or disables the DM_CM_INFO1 interrupt. When 0 is set in DM_CM_INFO1_MASK while the corresponding flag in DM_CM_INFO1 is set. an interrupt occurs."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 21.--31. 1. "Reserved1,Reserved"
newline
bitfld.quad 0x0 20. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 18.--19. "Reserved3,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "Reserved5,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved6,Reserved"
newline
bitfld.quad 0x0 8. "Reserved7,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved8,Reserved"
newline
bitfld.quad 0x0 0. "Reserved9,Reserved" "0,1"
group.quad 0x848++0x7
line.quad 0x0 "DM_CM_INFO1_MASK__32_L,The DM_CM_INFO1 interrupt mask register (DM_CM_INFO1_MASK) enables or disables the DM_CM_INFO1 interrupt. When 0 is set in DM_CM_INFO1_MASK while the corresponding flag in DM_CM_INFO1 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 21.--31. 1. "Reserved_21,Reserved bits"
newline
bitfld.quad 0x0 20. "DTRANEND1_MASK,DTRANEND1 interrupt masked" "0,1"
newline
bitfld.quad 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "Reserved_17,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "DTRANEND0_MASK,DTRANEND0 interrupt masked" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved_9,Reserved bits"
newline
bitfld.quad 0x0 8. "SEQSUSPEND_MASK,Interrupt mask for DM_CM_INFO1.SEQSUSPEND" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "SEQEND_MASK,SEQEND interrupt masked" "0,1"
rgroup.quad 0x848++0x7
line.quad 0x0 "DM_CM_INFO1_MASK__32_H,The DM_CM_INFO1 interrupt mask register (DM_CM_INFO1_MASK) enables or disables the DM_CM_INFO1 interrupt. When 0 is set in DM_CM_INFO1_MASK while the corresponding flag in DM_CM_INFO1 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.word 0x0 21.--31. 1. "Reserved1,Reserved"
newline
bitfld.quad 0x0 20. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 18.--19. "Reserved3,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "Reserved5,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 9.--15. 1. "Reserved6,Reserved"
newline
bitfld.quad 0x0 8. "Reserved7,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 1.--7. 1. "Reserved8,Reserved"
newline
bitfld.quad 0x0 0. "Reserved9,Reserved" "0,1"
group.quad 0x850++0x7
line.quad 0x0 "DM_CM_INFO2,The DMAC interrupt register 2 (DM_CM_INFO2) indicates the status of DMAC and a sequencer. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad 0x0 20.--63. 1. "Reserved_20,Reserved bits"
newline
rbitfld.quad 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "DTRANERR1,DMAC Channel 1 Error" "0,1"
newline
bitfld.quad 0x0 16. "DTRANERR0,DMAC Channel 0 Error" "0,1"
newline
hexmask.quad.word 0x0 1.--15. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "SEQERR,Sequencer error" "0,1"
group.quad 0x850++0x7
line.quad 0x0 "DM_CM_INFO2__16_LL,The DMAC interrupt register 2 (DM_CM_INFO2) indicates the status of DMAC and a sequencer. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad 0x0 20.--63. 1. "Reserved0,Reserved"
newline
rbitfld.quad 0x0 18.--19. "Reserved1,Reserved" "0,1,2,3"
newline
rbitfld.quad 0x0 17. "Reserved2,Reserved" "0,1"
newline
rbitfld.quad 0x0 16. "Reserved3,Reserved" "0,1"
newline
hexmask.quad.word 0x0 1.--15. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "SEQERR,Sequencer error" "0,1"
group.quad 0x850++0x7
line.quad 0x0 "DM_CM_INFO2__16_LH,The DMAC interrupt register 2 (DM_CM_INFO2) indicates the status of DMAC and a sequencer. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 20.--31. 1. "Reserved_20,Reserved bits"
newline
rbitfld.quad 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "DTRANERR1,DMAC Channel 1 Error" "0,1"
newline
bitfld.quad 0x0 16. "DTRANERR0,DMAC Channel 0 Error" "0,1"
newline
hexmask.quad.word 0x0 1.--15. 1. "Reserved4,Reserved"
newline
rbitfld.quad 0x0 0. "Reserved5,Reserved" "0,1"
rgroup.quad 0x850++0x7
line.quad 0x0 "DM_CM_INFO2__16_HL,The DMAC interrupt register 2 (DM_CM_INFO2) indicates the status of DMAC and a sequencer. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_20,Reserved bits"
newline
hexmask.quad.word 0x0 20.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 18.--19. "Reserved1,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "Reserved3,Reserved" "0,1"
newline
hexmask.quad.word 0x0 1.--15. 1. "Reserved4,Reserved"
newline
bitfld.quad 0x0 0. "Reserved5,Reserved" "0,1"
rgroup.quad 0x850++0x7
line.quad 0x0 "DM_CM_INFO2__16_HH,The DMAC interrupt register 2 (DM_CM_INFO2) indicates the status of DMAC and a sequencer. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_20,Reserved bits"
newline
hexmask.quad.long 0x0 20.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 18.--19. "Reserved1,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "Reserved3,Reserved" "0,1"
newline
hexmask.quad.word 0x0 1.--15. 1. "Reserved4,Reserved"
newline
bitfld.quad 0x0 0. "Reserved5,Reserved" "0,1"
group.quad 0x850++0x7
line.quad 0x0 "DM_CM_INFO2__32_L,The DMAC interrupt register 2 (DM_CM_INFO2) indicates the status of DMAC and a sequencer. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 20.--31. 1. "Reserved_20,Reserved bits"
newline
rbitfld.quad 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "DTRANERR1,DMAC Channel 1 Error" "0,1"
newline
bitfld.quad 0x0 16. "DTRANERR0,DMAC Channel 0 Error" "0,1"
newline
hexmask.quad.word 0x0 1.--15. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "SEQERR,Sequencer error" "0,1"
rgroup.quad 0x850++0x7
line.quad 0x0 "DM_CM_INFO2__32_H,The DMAC interrupt register 2 (DM_CM_INFO2) indicates the status of DMAC and a sequencer. To clear a flag. write 0 to the bit to be cleared and 1 to the other bits."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_20,Reserved bits"
newline
hexmask.quad.word 0x0 20.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 18.--19. "Reserved1,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "Reserved2,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "Reserved3,Reserved" "0,1"
newline
hexmask.quad.word 0x0 1.--15. 1. "Reserved4,Reserved"
newline
bitfld.quad 0x0 0. "Reserved5,Reserved" "0,1"
group.quad 0x858++0x7
line.quad 0x0 "DM_CM_INFO2_MASK,The DM_CM_INFO2 interrupt mask register (DM_CM_INFO2_MASK) enables or disables the DM_CM_INFO2 interrupt. When 0 is set in DM_CM_INFO2_MASK while the corresponding flag in DM_CM_INFO2 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.word 0x0 20.--31. 1. "Reserved_20,Reserved bits"
newline
rbitfld.quad 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "DTRANERR1_MASK,DTRANERR1 interrupt masked" "0,1"
newline
bitfld.quad 0x0 16. "DTRANERR0_MASK,DTRANERR0 interrupt masked" "0,1"
newline
hexmask.quad.word 0x0 1.--15. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "SEQERR_MASK,SEQERR interrupt masked" "0,1"
group.quad 0x858++0x7
line.quad 0x0 "DM_CM_INFO2_MASK__16_LL,The DM_CM_INFO2 interrupt mask register (DM_CM_INFO2_MASK) enables or disables the DM_CM_INFO2 interrupt. When 0 is set in DM_CM_INFO2_MASK while the corresponding flag in DM_CM_INFO2 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 20.--31. 1. "Reserved1,Reserved"
newline
rbitfld.quad 0x0 18.--19. "Reserved2,Reserved" "0,1,2,3"
newline
rbitfld.quad 0x0 17. "Reserved3,Reserved" "0,1"
newline
rbitfld.quad 0x0 16. "Reserved4,Reserved" "0,1"
newline
hexmask.quad.word 0x0 1.--15. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "SEQERR_MASK,SEQERR interrupt masked" "0,1"
group.quad 0x858++0x7
line.quad 0x0 "DM_CM_INFO2_MASK__16_LH,The DM_CM_INFO2 interrupt mask register (DM_CM_INFO2_MASK) enables or disables the DM_CM_INFO2 interrupt. When 0 is set in DM_CM_INFO2_MASK while the corresponding flag in DM_CM_INFO2 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 20.--31. 1. "Reserved_20,Reserved bits"
newline
rbitfld.quad 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "DTRANERR1_MASK,DTRANERR1 interrupt masked" "0,1"
newline
bitfld.quad 0x0 16. "DTRANERR0_MASK,DTRANERR0 interrupt masked" "0,1"
newline
hexmask.quad.word 0x0 1.--15. 1. "Reserved5,Reserved"
newline
rbitfld.quad 0x0 0. "Reserved6,Reserved" "0,1"
rgroup.quad 0x858++0x7
line.quad 0x0 "DM_CM_INFO2_MASK__16_HL,The DM_CM_INFO2 interrupt mask register (DM_CM_INFO2_MASK) enables or disables the DM_CM_INFO2 interrupt. When 0 is set in DM_CM_INFO2_MASK while the corresponding flag in DM_CM_INFO2 is set. an interrupt occurs."
hexmask.quad.word 0x0 48.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.word 0x0 20.--31. 1. "Reserved1,Reserved"
newline
bitfld.quad 0x0 18.--19. "Reserved2,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "Reserved4,Reserved" "0,1"
newline
hexmask.quad.word 0x0 1.--15. 1. "Reserved5,Reserved"
newline
bitfld.quad 0x0 0. "Reserved6,Reserved" "0,1"
rgroup.quad 0x858++0x7
line.quad 0x0 "DM_CM_INFO2_MASK__16_HH,The DM_CM_INFO2 interrupt mask register (DM_CM_INFO2_MASK) enables or disables the DM_CM_INFO2 interrupt. When 0 is set in DM_CM_INFO2_MASK while the corresponding flag in DM_CM_INFO2 is set. an interrupt occurs."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 20.--31. 1. "Reserved1,Reserved"
newline
bitfld.quad 0x0 18.--19. "Reserved2,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "Reserved4,Reserved" "0,1"
newline
hexmask.quad.word 0x0 1.--15. 1. "Reserved5,Reserved"
newline
bitfld.quad 0x0 0. "Reserved6,Reserved" "0,1"
group.quad 0x858++0x7
line.quad 0x0 "DM_CM_INFO2_MASK__32_L,The DM_CM_INFO2 interrupt mask register (DM_CM_INFO2_MASK) enables or disables the DM_CM_INFO2 interrupt. When 0 is set in DM_CM_INFO2_MASK while the corresponding flag in DM_CM_INFO2 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 20.--31. 1. "Reserved_20,Reserved bits"
newline
rbitfld.quad 0x0 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "DTRANERR1_MASK,DTRANERR1 interrupt masked" "0,1"
newline
bitfld.quad 0x0 16. "DTRANERR0_MASK,DTRANERR0 interrupt masked" "0,1"
newline
hexmask.quad.word 0x0 1.--15. 1. "Reserved_1,Reserved bits"
newline
bitfld.quad 0x0 0. "SEQERR_MASK,SEQERR interrupt masked" "0,1"
rgroup.quad 0x858++0x7
line.quad 0x0 "DM_CM_INFO2_MASK__32_H,The DM_CM_INFO2 interrupt mask register (DM_CM_INFO2_MASK) enables or disables the DM_CM_INFO2 interrupt. When 0 is set in DM_CM_INFO2_MASK while the corresponding flag in DM_CM_INFO2 is set. an interrupt occurs."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.word 0x0 20.--31. 1. "Reserved1,Reserved"
newline
bitfld.quad 0x0 18.--19. "Reserved2,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 17. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 16. "Reserved4,Reserved" "0,1"
newline
hexmask.quad.word 0x0 1.--15. 1. "Reserved5,Reserved"
newline
bitfld.quad 0x0 0. "Reserved6,Reserved" "0,1"
group.quad 0x868++0x7
line.quad 0x0 "DM_CM_SEQ_STAT,This register outputs the status register of sequencer process. High 32 bits (bit 63-32) are read only 0."
hexmask.quad 0x0 2.--63. 1. "Reserved_2,Reserved bits"
newline
bitfld.quad 0x0 0.--1. "SEQTBSTS,busy flag of sequencer process" "0: not busy,1: busy,?,?"
group.quad 0x868++0x7
line.quad 0x0 "DM_CM_SEQ_STAT__16_LL,This register outputs the status register of sequencer process. High 32 bits (bit 63-32) are read only 0."
hexmask.quad 0x0 16.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 2.--15. 1. "Reserved_2,Reserved bits"
newline
bitfld.quad 0x0 0.--1. "SEQTBSTS,busy flag of sequencer process" "0: not busy,1: busy,?,?"
rgroup.quad 0x868++0x7
line.quad 0x0 "DM_CM_SEQ_STAT__16_LH,This register outputs the status register of sequencer process. High 32 bits (bit 63-32) are read only 0."
hexmask.quad.long 0x0 32.--63. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved_2,Reserved bits"
newline
hexmask.quad.word 0x0 2.--15. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 0.--1. "Reserved2,Reserved" "0,1,2,3"
rgroup.quad 0x868++0x7
line.quad 0x0 "DM_CM_SEQ_STAT__16_HL,This register outputs the status register of sequencer process. High 32 bits (bit 63-32) are read only 0."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_2,Reserved bits"
newline
hexmask.quad.long 0x0 2.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 0.--1. "Reserved1,Reserved" "0,1,2,3"
rgroup.quad 0x868++0x7
line.quad 0x0 "DM_CM_SEQ_STAT__16_HH,This register outputs the status register of sequencer process. High 32 bits (bit 63-32) are read only 0."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_2,Reserved bits"
newline
hexmask.quad 0x0 2.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 0.--1. "Reserved1,Reserved" "0,1,2,3"
group.quad 0x868++0x7
line.quad 0x0 "DM_CM_SEQ_STAT__32_L,This register outputs the status register of sequencer process. High 32 bits (bit 63-32) are read only 0."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 2.--31. 1. "Reserved_2,Reserved bits"
newline
bitfld.quad 0x0 0.--1. "SEQTBSTS,busy flag of sequencer process" "0: not busy,1: busy,?,?"
rgroup.quad 0x868++0x7
line.quad 0x0 "DM_CM_SEQ_STAT__32_H,This register outputs the status register of sequencer process. High 32 bits (bit 63-32) are read only 0."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_2,Reserved bits"
newline
hexmask.quad.long 0x0 2.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 0.--1. "Reserved1,Reserved" "0,1,2,3"
group.quad 0x880++0x7
line.quad 0x0 "DM_DTRAN_ADDR,This register indicates system memory address(forwarding/source). This register is indirect register. SDIP stores in context indicated by DM_CM_DTRAN_MODE.CH_NUM. when software sets this register. SDIP outputs the value of context indicated.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 7.--31. 1. "DADDR,destination address / source address (128 byte unit)"
newline
hexmask.quad.byte 0x0 0.--6. 1. "Reserved_0,Reserved bits"
group.quad 0x880++0x7
line.quad 0x0 "DM_DTRAN_ADDR__16_LL,This register indicates system memory address(forwarding/source). This register is indirect register. SDIP stores in context indicated by DM_CM_DTRAN_MODE.CH_NUM. when software sets this register. SDIP outputs the value of context.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 7.--15. 1. "DADDR,destination address / source address (128 byte unit)"
newline
hexmask.quad.byte 0x0 0.--6. 1. "Reserved_0,Reserved bits"
group.quad 0x880++0x7
line.quad 0x0 "DM_DTRAN_ADDR__16_LH,This register indicates system memory address(forwarding/source). This register is indirect register. SDIP stores in context indicated by DM_CM_DTRAN_MODE.CH_NUM. when software sets this register. SDIP outputs the value of context.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "DADDR,destination address / source address (128 byte unit)"
newline
hexmask.quad.word 0x0 7.--15. 1. "Reserved1,Reserved"
newline
hexmask.quad.byte 0x0 0.--6. 1. "Reserved2,Reserved"
rgroup.quad 0x880++0x7
line.quad 0x0 "DM_DTRAN_ADDR__16_HL,This register indicates system memory address(forwarding/source). This register is indirect register. SDIP stores in context indicated by DM_CM_DTRAN_MODE.CH_NUM. when software sets this register. SDIP outputs the value of context.."
hexmask.quad.word 0x0 48.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 7.--31. 1. "Reserved1,Reserved"
newline
hexmask.quad.byte 0x0 0.--6. 1. "Reserved2,Reserved"
rgroup.quad 0x880++0x7
line.quad 0x0 "DM_DTRAN_ADDR__16_HH,This register indicates system memory address(forwarding/source). This register is indirect register. SDIP stores in context indicated by DM_CM_DTRAN_MODE.CH_NUM. when software sets this register. SDIP outputs the value of context.."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 7.--31. 1. "Reserved1,Reserved"
newline
hexmask.quad.byte 0x0 0.--6. 1. "Reserved2,Reserved"
group.quad 0x880++0x7
line.quad 0x0 "DM_DTRAN_ADDR__32_L,This register indicates system memory address(forwarding/source). This register is indirect register. SDIP stores in context indicated by DM_CM_DTRAN_MODE.CH_NUM. when software sets this register. SDIP outputs the value of context.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 7.--31. 1. "DADDR,destination address / source address (128 byte unit)"
newline
hexmask.quad.byte 0x0 0.--6. 1. "Reserved_0,Reserved bits"
rgroup.quad 0x880++0x7
line.quad 0x0 "DM_DTRAN_ADDR__32_H,This register indicates system memory address(forwarding/source). This register is indirect register. SDIP stores in context indicated by DM_CM_DTRAN_MODE.CH_NUM. when software sets this register. SDIP outputs the value of context.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 7.--31. 1. "Reserved1,Reserved"
newline
hexmask.quad.byte 0x0 0.--6. 1. "Reserved2,Reserved"
group.quad 0x8A0++0x7
line.quad 0x0 "DM_SEQ_CMD,This register indicates a command controller register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYEP=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software sets this.."
hexmask.quad 0x0 17.--63. 1. "Reserved_17,Reserved bits"
newline
bitfld.quad 0x0 16. "PRIORITY_MASK,Priority Mask for SD multiple command stack" "0,1"
newline
rbitfld.quad 0x0 14.--15. "Reserved_14,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 13. "MULTI,Selects Single or Multiple block transfer" "0: single block transfer,1: multiple block transfer"
newline
bitfld.quad 0x0 12. "DIO,Selects Write or Read transfer" "0: write transfer,1: read transfer"
newline
bitfld.quad 0x0 11. "CMDTYP,Selects the command with data or without data." "0: without data,1: with data"
newline
bitfld.quad 0x0 8.--10. "RESTYP,Response Type" "0: Not Specified,?,?,?,?,?,?,?"
newline
bitfld.quad 0x0 7. "NONAUTOSTP,UHS-I only" "0: issue Auto CMD12,1: not issue Auto CMD12"
newline
bitfld.quad 0x0 6. "APP,indicator for application command" "0: regular command,1: application command"
newline
hexmask.quad.byte 0x0 0.--5. 1. "INDEX,Command Index"
group.quad 0x8A0++0x7
line.quad 0x0 "DM_SEQ_CMD__16_LL,This register indicates a command controller register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYEP=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software sets this.."
hexmask.quad 0x0 17.--63. 1. "Reserved0,Reserved"
newline
rbitfld.quad 0x0 16. "Reserved1,Reserved" "0,1"
newline
rbitfld.quad 0x0 14.--15. "Reserved_14,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 13. "MULTI,Selects Single or Multiple block transfer" "0: single block transfer,1: multiple block transfer"
newline
bitfld.quad 0x0 12. "DIO,Selects Write or Read transfer" "0: write transfer,1: read transfer"
newline
bitfld.quad 0x0 11. "CMDTYP,Selects the command with data or without data." "0: without data,1: with data"
newline
bitfld.quad 0x0 8.--10. "RESTYP,Response Type" "0: Not Specified,?,?,?,?,?,?,?"
newline
bitfld.quad 0x0 7. "NONAUTOSTP,UHS-I only" "0: issue Auto CMD12,1: not issue Auto CMD12"
newline
bitfld.quad 0x0 6. "APP,indicator for application command" "0: regular command,1: application command"
newline
hexmask.quad.byte 0x0 0.--5. 1. "INDEX,Command Index"
group.quad 0x8A0++0x7
line.quad 0x0 "DM_SEQ_CMD__16_LH,This register indicates a command controller register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYEP=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software sets this.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 17.--31. 1. "Reserved_17,Reserved bits"
newline
bitfld.quad 0x0 16. "PRIORITY_MASK,Priority Mask for SD multiple command stack" "0,1"
newline
rbitfld.quad 0x0 14.--15. "Reserved2,Reserved" "0,1,2,3"
newline
rbitfld.quad 0x0 13. "Reserved3,Reserved" "0,1"
newline
rbitfld.quad 0x0 12. "Reserved4,Reserved" "0,1"
newline
rbitfld.quad 0x0 11. "Reserved5,Reserved" "0,1"
newline
rbitfld.quad 0x0 8.--10. "Reserved6,Reserved" "0,1,2,3,4,5,6,7"
newline
rbitfld.quad 0x0 7. "Reserved7,Reserved" "0,1"
newline
rbitfld.quad 0x0 6. "Reserved8,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 0.--5. 1. "Reserved9,Reserved"
rgroup.quad 0x8A0++0x7
line.quad 0x0 "DM_SEQ_CMD__16_HL,This register indicates a command controller register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYEP=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software sets this.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_17,Reserved bits"
newline
hexmask.quad.word 0x0 17.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 16. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14.--15. "Reserved2,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 13. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 12. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 11. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 8.--10. "Reserved6,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 7. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved8,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 0.--5. 1. "Reserved9,Reserved"
rgroup.quad 0x8A0++0x7
line.quad 0x0 "DM_SEQ_CMD__16_HH,This register indicates a command controller register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYEP=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software sets this.."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_17,Reserved bits"
newline
hexmask.quad.long 0x0 17.--47. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 16. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14.--15. "Reserved2,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 13. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 12. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 11. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 8.--10. "Reserved6,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 7. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved8,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 0.--5. 1. "Reserved9,Reserved"
group.quad 0x8A0++0x7
line.quad 0x0 "DM_SEQ_CMD__32_L,This register indicates a command controller register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYEP=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software sets this.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 17.--31. 1. "Reserved_17,Reserved bits"
newline
bitfld.quad 0x0 16. "PRIORITY_MASK,Priority Mask for SD multiple command stack" "0,1"
newline
rbitfld.quad 0x0 14.--15. "Reserved_14,Reserved bits" "0,1,2,3"
newline
bitfld.quad 0x0 13. "MULTI,Selects Single or Multiple block transfer" "0: single block transfer,1: multiple block transfer"
newline
bitfld.quad 0x0 12. "DIO,Selects Write or Read transfer" "0: write transfer,1: read transfer"
newline
bitfld.quad 0x0 11. "CMDTYP,Selects the command with data or without data." "0: without data,1: with data"
newline
bitfld.quad 0x0 8.--10. "RESTYP,Response Type" "0: Not Specified,?,?,?,?,?,?,?"
newline
bitfld.quad 0x0 7. "NONAUTOSTP,UHS-I only" "0: issue Auto CMD12,1: not issue Auto CMD12"
newline
bitfld.quad 0x0 6. "APP,indicator for application command" "0: regular command,1: application command"
newline
hexmask.quad.byte 0x0 0.--5. 1. "INDEX,Command Index"
rgroup.quad 0x8A0++0x7
line.quad 0x0 "DM_SEQ_CMD__32_H,This register indicates a command controller register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYEP=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software sets this.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_17,Reserved bits"
newline
hexmask.quad.word 0x0 17.--31. 1. "Reserved0,Reserved"
newline
bitfld.quad 0x0 16. "Reserved1,Reserved" "0,1"
newline
bitfld.quad 0x0 14.--15. "Reserved2,Reserved" "0,1,2,3"
newline
bitfld.quad 0x0 13. "Reserved3,Reserved" "0,1"
newline
bitfld.quad 0x0 12. "Reserved4,Reserved" "0,1"
newline
bitfld.quad 0x0 11. "Reserved5,Reserved" "0,1"
newline
bitfld.quad 0x0 8.--10. "Reserved6,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x0 7. "Reserved7,Reserved" "0,1"
newline
bitfld.quad 0x0 6. "Reserved8,Reserved" "0,1"
newline
hexmask.quad.byte 0x0 0.--5. 1. "Reserved9,Reserved"
group.quad 0x8A8++0x7
line.quad 0x0 "DM_SEQ_ARG,This register indicates a command argument register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software sets this register."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "ARG,command argument"
group.quad 0x8A8++0x7
line.quad 0x0 "DM_SEQ_ARG__16_LL,This register indicates a command argument register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software sets this.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "ARG,command argument"
group.quad 0x8A8++0x7
line.quad 0x0 "DM_SEQ_ARG__16_LH,This register indicates a command argument register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software sets this.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "ARG,command argument"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x8A8++0x7
line.quad 0x0 "DM_SEQ_ARG__16_HL,This register indicates a command argument register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software sets this.."
hexmask.quad.word 0x0 48.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
rgroup.quad 0x8A8++0x7
line.quad 0x0 "DM_SEQ_ARG__16_HH,This register indicates a command argument register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software sets this.."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
group.quad 0x8A8++0x7
line.quad 0x0 "DM_SEQ_ARG__32_L,This register indicates a command argument register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software sets this.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 0.--31. 1. "ARG,command argument"
rgroup.quad 0x8A8++0x7
line.quad 0x0 "DM_SEQ_ARG__32_H,This register indicates a command argument register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software sets this.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
group.quad 0x8B0++0x7
line.quad 0x0 "DM_SEQ_SIZE,This register indicates the number of bytes per sector register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software sets.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "SIZE,Number of bytes per sector (byte unit)"
group.quad 0x8B0++0x7
line.quad 0x0 "DM_SEQ_SIZE__16_LL,This register indicates the number of bytes per sector register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "SIZE,Number of bytes per sector (byte unit)"
group.quad 0x8B0++0x7
line.quad 0x0 "DM_SEQ_SIZE__16_LH,This register indicates the number of bytes per sector register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "SIZE,Number of bytes per sector (byte unit)"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x8B0++0x7
line.quad 0x0 "DM_SEQ_SIZE__16_HL,This register indicates the number of bytes per sector register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software.."
hexmask.quad.word 0x0 48.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
rgroup.quad 0x8B0++0x7
line.quad 0x0 "DM_SEQ_SIZE__16_HH,This register indicates the number of bytes per sector register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software.."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
group.quad 0x8B0++0x7
line.quad 0x0 "DM_SEQ_SIZE__32_L,This register indicates the number of bytes per sector register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 0.--31. 1. "SIZE,Number of bytes per sector (byte unit)"
rgroup.quad 0x8B0++0x7
line.quad 0x0 "DM_SEQ_SIZE__32_H,This register indicates the number of bytes per sector register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
group.quad 0x8B8++0x7
line.quad 0x0 "DM_SEQ_SECCNT,This register indicates the number of sector counts register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software sets.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "CNT,The number of sector counts"
group.quad 0x8B8++0x7
line.quad 0x0 "DM_SEQ_SECCNT__16_LL,This register indicates the number of sector counts register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "CNT,The number of sector counts"
group.quad 0x8B8++0x7
line.quad 0x0 "DM_SEQ_SECCNT__16_LH,This register indicates the number of sector counts register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "CNT,The number of sector counts"
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x8B8++0x7
line.quad 0x0 "DM_SEQ_SECCNT__16_HL,This register indicates the number of sector counts register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software.."
hexmask.quad.word 0x0 48.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
rgroup.quad 0x8B8++0x7
line.quad 0x0 "DM_SEQ_SECCNT__16_HH,This register indicates the number of sector counts register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software.."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
group.quad 0x8B8++0x7
line.quad 0x0 "DM_SEQ_SECCNT__32_L,This register indicates the number of sector counts register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 0.--31. 1. "CNT,The number of sector counts"
rgroup.quad 0x8B8++0x7
line.quad 0x0 "DM_SEQ_SECCNT__32_H,This register indicates the number of sector counts register for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
group.quad 0x8C0++0x7
line.quad 0x0 "DM_SEQ_RSP,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "RSP,The expected value for the argument of response."
group.quad 0x8C0++0x7
line.quad 0x0 "DM_SEQ_RSP__16_LL,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "RSP,The expected value for the argument of response."
group.quad 0x8C0++0x7
line.quad 0x0 "DM_SEQ_RSP__16_LH,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "RSP,The expected value for the argument of response."
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x8C0++0x7
line.quad 0x0 "DM_SEQ_RSP__16_HL,1.0"
hexmask.quad.word 0x0 48.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
rgroup.quad 0x8C0++0x7
line.quad 0x0 "DM_SEQ_RSP__16_HH,1.0"
hexmask.quad.word 0x0 48.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
group.quad 0x8C0++0x7
line.quad 0x0 "DM_SEQ_RSP__32_L,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 0.--31. 1. "RSP,The expected value for the argument of response."
rgroup.quad 0x8C0++0x7
line.quad 0x0 "DM_SEQ_RSP__32_H,1.0"
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
group.quad 0x8C8++0x7
line.quad 0x0 "DM_SEQ_RSP_CHK,This register indicates the bit of comparing expected value of argument of command response for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM..."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "RSP_CHK,This register indicates the bit which performs comparison with expected value for the argument of response."
group.quad 0x8C8++0x7
line.quad 0x0 "DM_SEQ_RSP_CHK__16_LL,This register indicates the bit of comparing expected value of argument of command response for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 0.--15. 1. "RSP_CHK,This register indicates the bit which performs comparison with expected value for the argument of response."
group.quad 0x8C8++0x7
line.quad 0x0 "DM_SEQ_RSP_CHK__16_LH,This register indicates the bit of comparing expected value of argument of command response for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "RSP_CHK,This register indicates the bit which performs comparison with expected value for the argument of response."
newline
hexmask.quad.word 0x0 0.--15. 1. "Reserved1,Reserved"
rgroup.quad 0x8C8++0x7
line.quad 0x0 "DM_SEQ_RSP_CHK__16_HL,This register indicates the bit of comparing expected value of argument of command response for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by.."
hexmask.quad.word 0x0 48.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
rgroup.quad 0x8C8++0x7
line.quad 0x0 "DM_SEQ_RSP_CHK__16_HH,This register indicates the bit of comparing expected value of argument of command response for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by.."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
group.quad 0x8C8++0x7
line.quad 0x0 "DM_SEQ_RSP_CHK__32_L,This register indicates the bit of comparing expected value of argument of command response for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 0.--31. 1. "RSP_CHK,This register indicates the bit which performs comparison with expected value for the argument of response."
rgroup.quad 0x8C8++0x7
line.quad 0x0 "DM_SEQ_RSP_CHK__32_H,This register indicates the bit of comparing expected value of argument of command response for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 0.--31. 1. "Reserved1,Reserved"
group.quad 0x8D0++0x7
line.quad 0x0 "DM_SEQ_ADDR,This register indicates system memory address (forwarding/source) for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software sets.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 7.--31. 1. "SADDR,destination address / source address (128 byte unit)"
newline
hexmask.quad.byte 0x0 0.--6. 1. "Reserved_0,Reserved bits"
group.quad 0x8D0++0x7
line.quad 0x0 "DM_SEQ_ADDR__16_LL,This register indicates system memory address (forwarding/source) for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "Reserved1,Reserved"
newline
hexmask.quad.word 0x0 7.--15. 1. "SADDR,destination address / source address (128 byte unit)"
newline
hexmask.quad.byte 0x0 0.--6. 1. "Reserved_0,Reserved bits"
group.quad 0x8D0++0x7
line.quad 0x0 "DM_SEQ_ADDR__16_LH,This register indicates system memory address (forwarding/source) for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 16.--31. 1. "SADDR,destination address / source address (128 byte unit)"
newline
hexmask.quad.word 0x0 7.--15. 1. "Reserved1,Reserved"
newline
hexmask.quad.byte 0x0 0.--6. 1. "Reserved2,Reserved"
rgroup.quad 0x8D0++0x7
line.quad 0x0 "DM_SEQ_ADDR__16_HL,This register indicates system memory address (forwarding/source) for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when.."
hexmask.quad.word 0x0 48.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 7.--31. 1. "Reserved1,Reserved"
newline
hexmask.quad.byte 0x0 0.--6. 1. "Reserved2,Reserved"
rgroup.quad 0x8D0++0x7
line.quad 0x0 "DM_SEQ_ADDR__16_HH,This register indicates system memory address (forwarding/source) for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when.."
hexmask.quad.word 0x0 48.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.word 0x0 32.--47. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 7.--31. 1. "Reserved1,Reserved"
newline
hexmask.quad.byte 0x0 0.--6. 1. "Reserved2,Reserved"
group.quad 0x8D0++0x7
line.quad 0x0 "DM_SEQ_ADDR__32_L,This register indicates system memory address (forwarding/source) for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved0,Reserved"
newline
hexmask.quad.long 0x0 7.--31. 1. "SADDR,destination address / source address (128 byte unit)"
newline
hexmask.quad.byte 0x0 0.--6. 1. "Reserved_0,Reserved bits"
rgroup.quad 0x8D0++0x7
line.quad 0x0 "DM_SEQ_ADDR__32_H,This register indicates system memory address (forwarding/source) for sequencer in DM_CM_SEQ_CTRL.SEQ_TYPE=01. This register is indirect register. SDIP stores in context indicated by DM_CM_SEQ_REGSET.{TABLE_NUM. CTXT_NUM}. when software.."
hexmask.quad.long 0x0 32.--63. 1. "Reserved_32,Reserved bits"
newline
hexmask.quad.long 0x0 7.--31. 1. "Reserved1,Reserved"
newline
hexmask.quad.byte 0x0 0.--6. 1. "Reserved2,Reserved"
tree.end
tree "SDHI_1"
base ad:0xEE141000
group.long 0x0++0x3
line.long 0x0 "SCC_DTCNTL,"
hexmask.long.byte 0x0 24.--31. 1. "Reserved_24,Reserved bits"
hexmask.long.byte 0x0 16.--23. 1. "TAPNUM,SCC Sampling Clock Selection Width"
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved bits"
bitfld.long 0x0 0. "TAPEN,SCC Sampling Clock Operation Enable" "0: SCC sampling clock operation is disabled,1: SCC sampling clock operation is enabled"
group.long 0x8++0x3
line.long 0x0 "SCC_TAPSET,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved bits"
hexmask.long.byte 0x0 0.--7. 1. "TAPSET,SCC Sampling Clock Position"
group.long 0x10++0x3
line.long 0x0 "SCC_DT2FF,This register makes a setting that SD_DATA. which has been fetched by the sampling clock at each TAP position. is used in the appropriate timing."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
hexmask.long.byte 0x0 8.--15. 1. "DT2NESET,Hardware Adjustment 1"
newline
hexmask.long.byte 0x0 0.--7. 1. "DT2NSSET,Hardware Adjustment 2"
group.long 0x18++0x3
line.long 0x0 "SCC_CKSEL,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved bits"
bitfld.long 0x0 0. "DTSEL,Sampling Clock Selection" "0: An SCC sampling clock is not used,1: 1 mode"
group.long 0x20++0x3
line.long 0x0 "SCC_RVSCNTL,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved bits"
hexmask.long.byte 0x0 8.--15. 1. "TAPSEL,SCC Sampling Clock Position Display"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved bits"
bitfld.long 0x0 1. "RVSW,This bit is read as 0. The write value should be 0." "0,1"
newline
bitfld.long 0x0 0. "RVSEN,SCC Sampling Clock Position Correction Enable" "0: SCC sampling clock position correction is disabled,1: SCC sampling clock position correction is enabled"
group.long 0x28++0x3
line.long 0x0 "SCC_RVSREQ,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved bits"
bitfld.long 0x0 2. "RVSERR,SCC Sampling Clock Position Correction Error" "0: There is no correction error,1: There is a correction error"
newline
bitfld.long 0x0 1. "REQTAPUP,SCC Sampling Clock Position Positive Direction Correction Request" "0: There is no correction request,1: There is a correction request"
bitfld.long 0x0 0. "REQTAPDWN,SCC Sampling Clock Position Negative Direction Correction Request" "0: There is no correction request,1: There is a correction request"
group.long 0x30++0x3
line.long 0x0 "SCC_SMPCMP,Data comparison register indicates the result of the comparison of the sampling data. The subject of the comparison is the before and the behind TAP."
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved bits"
hexmask.long.word 0x0 16.--24. 1. "CMPNGU,Comparison of sampling data with the previous TAP Clock. Bit 16-23 is the comparison result of data 0-7. Bit 24 is the comparison result of CMD."
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved bits"
hexmask.long.word 0x0 0.--8. 1. "CMPNGD,Comparison of sampling data with the after TAP Clock. Bit 0-7 is the comparison result of data 0-7. Bit 8 is the comparison result of CMD."
group.long 0x38++0x3
line.long 0x0 "SCC_TMPPORT2,"
bitfld.long 0x0 31. "HS400EN,Set this bit to 1 to select operation of this module in HS400 mode." "0: Disables HS400 mode,1: Enables HS400 mode"
hexmask.long 0x0 5.--30. 1. "Reserved_5,Reserved bits"
newline
bitfld.long 0x0 4. "HS400OSEL,Set this bit to 1 to select operation of this module in HS400 mode." "0: Disables HS400 data output timing,1: Enables HS400 data output timing"
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved bits"
group.long 0x50++0x3
line.long 0x0 "SCC_TMPPORT3,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved bits"
bitfld.long 0x0 0.--1. "ofsel,Select offset value of 90 degree phase shifter for HS4000: Match" "0: ;min,?,?,?"
group.long 0x58++0x3
line.long 0x0 "SCC_TMPPORT4,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved bits"
bitfld.long 0x0 0. "dll_acc_start,DLL(90 degree phase shifter) register Access Start" "0: ;register access stop,1: ;register access start"
group.long 0x60++0x3
line.long 0x0 "SCC_TMPPORT5,"
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved bits"
bitfld.long 0x0 8. "dll_rw_sel,DLL(90 degree phase shifter) register read/write select" "0: ;Write,1: ;Read"
newline
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved bits" "0,1,2,3"
hexmask.long.byte 0x0 0.--5. 1. "dll_addr,DLL(90 degree phase shifter) register address"
group.long 0x68++0x3
line.long 0x0 "SCC_TMPPORT6,"
hexmask.long 0x0 0.--31. 1. "dll_wdata,DLL(90 degree phase shifter) register write data"
group.long 0x70++0x3
line.long 0x0 "SCC_TMPPORT7,"
hexmask.long 0x0 0.--31. 1. "dll_rdata,DLL(90 degree phase shifter) register read data"
tree.end
tree.end
tree "SSI (Serial Sound Interface)"
base ad:0xEC541000
group.long 0x0++0xB
line.long 0x0 "SSICR0,Note: n = 0"
bitfld.long 0x0 31. "FORCE,Fixed" "0,1"
rbitfld.long 0x0 30. "Reserved_30,Reserved" "0,1"
newline
bitfld.long 0x0 29. "FIEN,Frequency Switching Detection Interrupt Enable" "0: Frequency switching detection interrupt is..,1: Frequency switching detection interrupt is enabled"
bitfld.long 0x0 28. "DMEN,DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
newline
bitfld.long 0x0 27. "UIEN,Underflow Interrupt Enable" "0: Underflow interrupt is disabled,1: Underflow Interrupt is enabled"
bitfld.long 0x0 26. "OIEN,Overflow Interrupt Enable" "0: Overflow interrupt is disabled,1: Overflow interrupt is enabled"
newline
bitfld.long 0x0 25. "IIEN,Idle Mode Interrupt Enable" "0: Idle mode interrupt is disabled,1: Idle mode interrupt is enabled"
bitfld.long 0x0 24. "DIEN,Data Interrupt Enable" "0: Data interrupt is disabled,1: Data interrupt is enabled"
newline
bitfld.long 0x0 22.--23. "CHNL_1_0,Channels" "0: A monaural frame consists of one system word,1: Setting prohibited,?,?"
bitfld.long 0x0 19.--21. "DWL_2_0,Data Word Length" "0: 8 bits,1: 16 bits,?,?,?,?,?,?"
newline
bitfld.long 0x0 16.--18. "SWL_2_0,System Word Length" "0: 16 bits,1: 32 bits,?,?,?,?,?,?"
bitfld.long 0x0 15. "SCKD,Serial Bit Clock Direction" "0: Serial bit clock is input,1: Serial bit clock is output"
newline
bitfld.long 0x0 14. "SWSD,Serial WS Direction" "0: Serial word select is input,1: Serial word select is output"
bitfld.long 0x0 13. "SCKP,Serial Bit Clock Polarity" "0: SSI_WS and SSI_SDATA change at the SSI_SCK..,1: SSI_WS and SSI_SDATA change at the SSI_SCK.."
newline
bitfld.long 0x0 12. "SWSP,Serial WS Polarity" "0: WS pulse is high over the period specified with..,1: WS pulse is low over the period specified with.."
bitfld.long 0x0 11. "SPDP,Serial Padding Polarity" "0: Padding bits are low,1: Padding bits are high"
newline
bitfld.long 0x0 10. "SDTA,Serial Data Alignment" "0: Transmitting and receiving in the order of..,1: Transmitting and receiving in the order of.."
bitfld.long 0x0 9. "PDTA,Parallel Data Alignment" "0: Parallel data,1: Parallel data"
newline
bitfld.long 0x0 8. "DEL,Serial Data Delay" "0: One clock cycle delay between SSI_WS and SSI_SDATA,1: No delay between SSI_WS and SSI_SDATA"
rbitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.long 0x0 4.--6. "CKDV_2_0,Serial Oversampling Clock Division Ratio" "0: Serial bit clock frequency = oversampling clock..,1: Serial bit clock frequency = oversampling clock..,?,?,?,?,?,?"
bitfld.long 0x0 3. "MUEN,Serial Data Output Disable" "0: Module is not muted,1: Module is muted"
newline
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
bitfld.long 0x0 1. "TRMD,Transmit/Receive Mode Select" "0: Module is in receive mode,1: Module is in transmit mode"
newline
bitfld.long 0x0 0. "EN,SSI Module Enable" "0: Module is disabled,1: Module is enabled"
line.long 0x4 "SSISR0,Note: n = 0"
rbitfld.long 0x4 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
rbitfld.long 0x4 28. "DMRQ,DMA Request Status Flag" "0,1"
newline
bitfld.long 0x4 27. "UIRQ,Underflow Error Interrupt Status Flag" "0,1"
bitfld.long 0x4 26. "OIRQ,Overflow Error Interrupt Status Flag" "0,1"
newline
rbitfld.long 0x4 25. "IIRQ,Idle Mode Interrupt Status Flag" "0: The SSI module is not in idle state,1: The SSI module is in idle state"
rbitfld.long 0x4 24. "DIRQ,Data Interrupt Status Flag" "0: Transmit buffer is full,1: Transmit buffer is empty and requires data to be.."
newline
hexmask.long.tbyte 0x4 4.--23. 1. "Reserved_4,Reserved"
rbitfld.long 0x4 2.--3. "CHNO_1_0,Channel Number" "0: 1st channel,1: 2nd channel,?,?"
newline
rbitfld.long 0x4 1. "SWNO,System Word Number" "0,1"
rbitfld.long 0x4 0. "IDST,Idle Mode Status Flag" "0,1"
line.long 0x8 "SSITDR0,Note: n = 0"
hexmask.long 0x8 0.--31. 1. "SSITDR_31_0,Transmit Data"
rgroup.long 0xC++0x3
line.long 0x0 "SSIRDR0,Note: n = 0"
hexmask.long 0x0 0.--31. 1. "SSIRDR_31_0,Receive Data"
group.long 0x20++0xB
line.long 0x0 "SSIWSR0,Note: n = 0"
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x0 16.--20. 1. "WIDTH_4_0,SYNC Pulse Width Change"
newline
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "CONT,WS Continue Function" "0: WS continue function is disabled,1: WS continue function is enabled"
newline
hexmask.long.byte 0x0 2.--7. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "MONO,TDM Format/Monaural Format" "0: TDM format,1: Monaural format"
newline
bitfld.long 0x0 0. "WS_MODE,WS Mode" "0: Stereo format,1: TDM format"
line.long 0x4 "SSIFMR0,Note: n = 0"
hexmask.long.word 0x4 22.--31. 1. "Reserved_22,Reserved"
hexmask.long.byte 0x4 16.--21. 1. "DTCT_5_0,Frequency Switching Detection Range Set"
newline
hexmask.long.word 0x4 6.--15. 1. "Reserved_6,Reserved"
bitfld.long 0x4 4.--5. "CTDV_1_0,Bus Clock Division Ratio" "0: Setting prohibited,1: Setting prohibited,?,?"
newline
rbitfld.long 0x4 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0. "FSEN,Frequency Switching Detection Function Enable" "0: The frequency switching detection function is..,1: The frequency switching detection function is.."
line.long 0x8 "SSIFSR0,Note: n = 0"
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x8 15. "FCST,WS Stopped Status Flag" "0,1"
newline
bitfld.long 0x8 14. "DTST,Frequency Switching Detection Status Flag" "0,1"
rbitfld.long 0x8 12.--13. "Reserved_12,Reserved" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--11. 1. "FCNT_11_0,Frequency Count Monitor"
group.long 0x30++0x3
line.long 0x0 "SSICRE0,CHNL2 is an extension bit of SSICRn.CHNL[1:0]. This bit should be set 0 except SSIq_MODE2.ex_func in SSIU is 1 and TDM format is not selected (SSIWSRn.WS_MODE = 1 and SSIWSRn.MONO = 0)."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CHNL2,Extension bit of SSICRn.CHNL[1:0]" "0: Default value,1: A TDM frame consists of sixteen system words"
tree.end
tree "SSIU (Serial Sound Interface Unit)"
base ad:0x0
tree "SSIU_0"
base ad:0xEC540000
group.long 0x0++0x13
line.long 0x0 "SSI0_0_BUSIF_MODE,Function: SSIn_BUSIF_MODE determines the initial settings of the bus interface."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "sft_dir,ssin_busif_shift_dir" "0: Shift to left,1: Shift to right"
newline
hexmask.long.byte 0x0 16.--19. 1. "sft_num,ssin_busif_shift_num"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "word_swap,word_swap_en" "0: Word order is not swapped,1: Word order is swapped"
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "dma,ssin_dma" "0: PIO access,1: DMA access"
line.long 0x4 "SSI0_0_BUSIF_ADINR,Function: SSIm_BUSIF_ADINR is a 32-bit readable/writable register that selects channel number and bit length of output audio data."
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x4 16.--20. 1. "OTBL_4_0,Bit Length of Output Audio Data."
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x4 0.--4. 1. "CHNUM_4_0,Channel Number"
line.long 0x8 "SSI0_0_BUSIF_DALIGN,Function: SSIq_BUSIF_DALIGN determines the initial settings of the SSIq route."
hexmask.long.byte 0x8 28.--31. 1. "place7,Changes the stream data order. These bits are used for the 8- or more channel setting. For the 6- or less channel setting or TDM split mode setting (tdm_split = 1  ex_func = 0)  the initial value should not be changed."
hexmask.long.byte 0x8 24.--27. 1. "place6,Changes the stream data order. These bits are used for the 8- or more channel setting. For the 6- or less channel setting or TDM split mode setting (tdm_split = 1  ex_func = 0)  the initial value should not be changed."
newline
hexmask.long.byte 0x8 20.--23. 1. "place5,Changes the stream data order. These bits are used for the 6- or more channel setting. For the 4- or less channel setting or TDM split mode setting (tdm_split = 1  ex_func = 0)  the initial value should not be changed."
hexmask.long.byte 0x8 16.--19. 1. "place4,Changes the stream data order. These bits are used for the 6- or more channel setting. For the 4- or less channel setting or TDM split mode setting (tdm_split = 1  ex_func = 0)  the initial value should not be changed."
newline
hexmask.long.byte 0x8 12.--15. 1. "place3,Changes the stream data order. These bits are used for the 4- or more channel setting. For the 2- or less channel setting or TDM split mode setting (tdm_split = 1  ex_func = 0)  the initial value should not be changed."
hexmask.long.byte 0x8 8.--11. 1. "place2,Changes the stream data order. These bits are used for the 4- or more channel setting. For the 2- or less channel setting or TDM split mode setting (tdm_split = 1  ex_func = 0)  the initial value should not be changed."
newline
hexmask.long.byte 0x8 4.--7. 1. "place1,Changes the stream data order. The data order is changed between the SSI and bus interface."
hexmask.long.byte 0x8 0.--3. 1. "place0,Changes the stream data order. The data order is changed between the SSI and bus interface."
line.long 0xC "SSI0_0_MODE,Function: SSIq_MODE determines the initial settings of the SSIq route."
hexmask.long.tbyte 0xC 14.--31. 1. "Reserved_14,Reserved"
bitfld.long 0xC 13. "fs_mode,ssii_fs_mode (i = 0)" "0: ssii TDM split mode is used with 256 fs,1: ssii TDM split mode is used with 128 fs"
newline
hexmask.long.byte 0xC 9.--12. 1. "Reserved_9,Reserved"
bitfld.long 0xC 8. "tdm_split,ssii_tdm_split (i = 0)" "0: TDM split mode is not used for ssii,1: TDM split mode is used for ssii"
newline
hexmask.long.byte 0xC 1.--7. 1. "Reserved_1,Reserved"
bitfld.long 0xC 0. "tdm_ext,ssii_tdm_ext (i = 0)" "0: ssii TDM extend mode is not used,1: ssii TDM extend mode is used"
line.long 0x10 "SSI0_0_CONTROL,Function: SSIq_CONTROL controls the start and stop of data transfer."
rbitfld.long 0x10 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 28. "start_7,SSIi-7_start_flag (i = 0)" "0: Transfer is stopped,1: Transfer is started"
newline
rbitfld.long 0x10 25.--27. "Reserved_25,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 24. "start_6,SSIi-6_start_flag (i = 0)" "0: Transfer is stopped,1: Transfer is started"
newline
rbitfld.long 0x10 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 20. "start_5,SSIi-5_start_flag (i = 0)" "0: Transfer is stopped,1: Transfer is started"
newline
rbitfld.long 0x10 17.--19. "Reserved_17,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 16. "start_4,SSIi-4_start_flag (i = 0)" "0: Transfer is stopped,1: Transfer is started"
newline
rbitfld.long 0x10 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 12. "start_3,SSIi-3_start_flag (i = 0)" "0: Transfer is stopped,1: Transfer is started"
newline
rbitfld.long 0x10 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 8. "start_2,SSIi-2_start_flag (i = 0)" "0: Transfer is stopped,1: Transfer is started"
newline
rbitfld.long 0x10 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 4. "start_1,SSIi-1_start_flag (i = 0)" "0: Transfer is stopped,1: Transfer is started"
newline
rbitfld.long 0x10 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 0. "start_0,SSIi-0_start_flag (i = 0)" "0: Transfer is stopped,1: Transfer is started"
rgroup.long 0x14++0x3
line.long 0x0 "SSI0_0_STATUS,Function: SSIq_STATUS indicates the internal buffer state. When a bit in this register is set. its status is indicated by the corresponding interrupt signal. However. when the interrupt output is masked by the SSIq Interrupt Enable.."
bitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 29. "FCST,SSIi_FCST (i = 0)" "0: -,1: The WS signal has stopped"
newline
bitfld.long 0x0 28. "DTST,SSIi_DTST (i = 0)" "0: -,1: The frequency switching has been detected"
bitfld.long 0x0 27. "UIRQ,SSIi_UIRQ (i = 0)" "0: -,1: An underflow has occurred"
newline
bitfld.long 0x0 26. "OIRQ,SSIi_OIRQ (i = 0)" "0: -,1: An overflow has occurred"
bitfld.long 0x0 25. "IIRQ,SSIi_IIRQ (i = 0)" "0: -,1: Idle state"
newline
bitfld.long 0x0 24. "DIRQ,SSIi_DIRQ (i = 0)" "0: -,1: When SSICRi"
hexmask.long.byte 0x0 16.--23. 1. "Reserved_16,Reserved"
newline
bitfld.long 0x0 15. "uf_3,buf_under_flowi-3 (i = 0)" "0: -,1: An underflow has occurred"
bitfld.long 0x0 14. "uf_2,buf_under_flowi-2 (i = 0)" "0: -,1: An underflow has occurred"
newline
bitfld.long 0x0 13. "uf_1,buf_under_flowi-1 (i = 0)" "0: -,1: An underflow has occurred"
bitfld.long 0x0 12. "uf_0,buf_under_flowi-0 (i = 0)" "0: -,1: An underflow has occurred"
newline
bitfld.long 0x0 11. "of_3,buf_over_flowi-3 (i = 0)" "0: -,1: An overflow has occurred"
bitfld.long 0x0 10. "of_2,buf_over_flowi-2 (i = 0)" "0: -,1: An overflow has occurred"
newline
bitfld.long 0x0 9. "of_1,buf_over_flowi-1 (i = 0)" "0: -,1: An overflow has occurred"
bitfld.long 0x0 8. "of_0,buf_over_flowi-0 (i = 0)" "0: -,1: An overflow has occurred"
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
group.long 0x18++0x3
line.long 0x0 "SSI0_0_INT_ENABLE_MAIN,Function: SSIq_INT_ENABLE_MAIN enables or disables output of interrupts corresponding to the states indicated in the SSIq Status Register (refer to Section 81.2.13 and Section 81.3.8)."
rbitfld.long 0x0 30.--31. "Reserved_30,Reserved" "0,1,2,3"
bitfld.long 0x0 29. "FCST_ie,SSIi_FCST_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
newline
bitfld.long 0x0 28. "DTST_ie,SSIi_DTST_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
bitfld.long 0x0 27. "UIRQ_ie,SSIi_UIRQ_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
newline
bitfld.long 0x0 26. "OIRQ_ie,SSIi_OIRQ_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
bitfld.long 0x0 25. "IIRQ_ie,SSIi_IIRQ_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
newline
bitfld.long 0x0 24. "DIRQ_ie,SSIi_DIRQ_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
hexmask.long.byte 0x0 16.--23. 1. "Reserved_16,Reserved"
newline
bitfld.long 0x0 15. "uf_3_ie,buf_under_flowi-3_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
bitfld.long 0x0 14. "uf_2_ie,buf_under_flowi-2_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
newline
bitfld.long 0x0 13. "uf_1_ie,buf_under_flowi-1_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
bitfld.long 0x0 12. "uf_0_ie,buf_under_flowi-0_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
newline
bitfld.long 0x0 11. "of_3_ie,buf_over_flowi-3_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
bitfld.long 0x0 10. "of_2_ie,buf_over_flowi-2_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
newline
bitfld.long 0x0 9. "of_1_ie,buf_ over_flowi-1_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
bitfld.long 0x0 8. "of_0_ie,buf_over_flowi-0_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
group.long 0x20++0xB
line.long 0x0 "SSI0_1_BUSIF_MODE,Function: SSIn_BUSIF_MODE determines the initial settings of the bus interface."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "sft_dir,ssin_busif_shift_dir" "0: Shift to left,1: Shift to right"
newline
hexmask.long.byte 0x0 16.--19. 1. "sft_num,ssin_busif_shift_num"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "word_swap,word_swap_en" "0: Word order is not swapped,1: Word order is swapped"
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "dma,ssin_dma" "0: PIO access,1: DMA access"
line.long 0x4 "SSI0_1_BUSIF_ADINR,Function: SSIm_BUSIF_ADINR is a 32-bit readable/writable register that selects channel number and bit length of output audio data."
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x4 16.--20. 1. "OTBL_4_0,Bit Length of Output Audio Data."
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x4 0.--4. 1. "CHNUM_4_0,Channel Number"
line.long 0x8 "SSI0_1_BUSIF_DALIGN,Function: SSIs_BUSIF_DALIGN determines the initial settings of the SSIs route."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 4.--7. 1. "place3,Changes the stream data order."
newline
hexmask.long.byte 0x8 0.--3. 1. "place2,Changes the stream data order."
group.long 0x40++0xB
line.long 0x0 "SSI0_2_BUSIF_MODE,Function: SSIn_BUSIF_MODE determines the initial settings of the bus interface."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "sft_dir,ssin_busif_shift_dir" "0: Shift to left,1: Shift to right"
newline
hexmask.long.byte 0x0 16.--19. 1. "sft_num,ssin_busif_shift_num"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "word_swap,word_swap_en" "0: Word order is not swapped,1: Word order is swapped"
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "dma,ssin_dma" "0: PIO access,1: DMA access"
line.long 0x4 "SSI0_2_BUSIF_ADINR,Function: SSIm_BUSIF_ADINR is a 32-bit readable/writable register that selects channel number and bit length of output audio data."
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x4 16.--20. 1. "OTBL_4_0,Bit Length of Output Audio Data."
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x4 0.--4. 1. "CHNUM_4_0,Channel Number"
line.long 0x8 "SSI0_2_BUSIF_DALIGN,Function: SSIt_BUSIF_DALIGN determines the initial settings of the SSIt route."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x8 12.--15. 1. "place7,Changes the stream data order."
newline
hexmask.long.byte 0x8 8.--11. 1. "place6,Changes the stream data order."
hexmask.long.byte 0x8 4.--7. 1. "place5,Changes the stream data order."
newline
hexmask.long.byte 0x8 0.--3. 1. "place4,Changes the stream data order."
group.long 0x60++0xB
line.long 0x0 "SSI0_3_BUSIF_MODE,Function: SSIn_BUSIF_MODE determines the initial settings of the bus interface."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "sft_dir,ssin_busif_shift_dir" "0: Shift to left,1: Shift to right"
newline
hexmask.long.byte 0x0 16.--19. 1. "sft_num,ssin_busif_shift_num"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "word_swap,word_swap_en" "0: Word order is not swapped,1: Word order is swapped"
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "dma,ssin_dma" "0: PIO access,1: DMA access"
line.long 0x4 "SSI0_3_BUSIF_ADINR,Function: SSIm_BUSIF_ADINR is a 32-bit readable/writable register that selects channel number and bit length of output audio data."
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x4 16.--20. 1. "OTBL_4_0,Bit Length of Output Audio Data."
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x4 0.--4. 1. "CHNUM_4_0,Channel Number"
line.long 0x8 "SSI0_3_BUSIF_DALIGN,Function: SSIu_BUSIF_DALIGN determines the initial settings of the SSIu route."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 4.--7. 1. "place7,Changes the stream data order."
newline
hexmask.long.byte 0x8 0.--3. 1. "place6,Changes the stream data order."
group.long 0x500++0xB
line.long 0x0 "SSI0_4_BUSIF_MODE,Function: SSIn_BUSIF_MODE determines the initial settings of the bus interface."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "sft_dir,ssin_busif_shift_dir" "0: Shift to left,1: Shift to right"
newline
hexmask.long.byte 0x0 16.--19. 1. "sft_num,ssin_busif_shift_num"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "word_swap,word_swap_en" "0: Word order is not swapped,1: Word order is swapped"
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "dma,ssin_dma" "0: PIO access,1: DMA access"
line.long 0x4 "SSI0_4_BUSIF_ADINR,Function: SSIm_BUSIF_ADINR is a 32-bit readable/writable register that selects channel number and bit length of output audio data."
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x4 16.--20. 1. "OTBL_4_0,Bit Length of Output Audio Data."
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x4 0.--4. 1. "CHNUM_4_0,Channel Number"
line.long 0x8 "SSI0_4_BUSIF_DALIGN,Function: SSIv_BUSIF_DALIGN determines the initial settings of the SSIv route."
hexmask.long.byte 0x8 28.--31. 1. "place15,Changes the stream data order."
hexmask.long.byte 0x8 24.--27. 1. "place14,Changes the stream data order."
newline
hexmask.long.byte 0x8 20.--23. 1. "place13,Changes the stream data order."
hexmask.long.byte 0x8 16.--19. 1. "place12,Changes the stream data order."
newline
hexmask.long.byte 0x8 12.--15. 1. "place11,Changes the stream data order."
hexmask.long.byte 0x8 8.--11. 1. "place10,Changes the stream data order."
newline
hexmask.long.byte 0x8 4.--7. 1. "place9,Changes the stream data order."
hexmask.long.byte 0x8 0.--3. 1. "place8,Changes the stream data order."
group.long 0x520++0xB
line.long 0x0 "SSI0_5_BUSIF_MODE,Function: SSIn_BUSIF_MODE determines the initial settings of the bus interface."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "sft_dir,ssin_busif_shift_dir" "0: Shift to left,1: Shift to right"
newline
hexmask.long.byte 0x0 16.--19. 1. "sft_num,ssin_busif_shift_num"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "word_swap,word_swap_en" "0: Word order is not swapped,1: Word order is swapped"
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "dma,ssin_dma" "0: PIO access,1: DMA access"
line.long 0x4 "SSI0_5_BUSIF_ADINR,Function: SSIm_BUSIF_ADINR is a 32-bit readable/writable register that selects channel number and bit length of output audio data."
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x4 16.--20. 1. "OTBL_4_0,Bit Length of Output Audio Data."
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x4 0.--4. 1. "CHNUM_4_0,Channel Number"
line.long 0x8 "SSI0_5_BUSIF_DALIGN,Function: SSIw_BUSIF_DALIGN determines the initial settings of the SSIw route."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 4.--7. 1. "place11,Changes the stream data order."
newline
hexmask.long.byte 0x8 0.--3. 1. "place10,Changes the stream data order."
group.long 0x540++0xB
line.long 0x0 "SSI0_6_BUSIF_MODE,Function: SSIn_BUSIF_MODE determines the initial settings of the bus interface."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "sft_dir,ssin_busif_shift_dir" "0: Shift to left,1: Shift to right"
newline
hexmask.long.byte 0x0 16.--19. 1. "sft_num,ssin_busif_shift_num"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "word_swap,word_swap_en" "0: Word order is not swapped,1: Word order is swapped"
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "dma,ssin_dma" "0: PIO access,1: DMA access"
line.long 0x4 "SSI0_6_BUSIF_ADINR,Function: SSIm_BUSIF_ADINR is a 32-bit readable/writable register that selects channel number and bit length of output audio data."
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x4 16.--20. 1. "OTBL_4_0,Bit Length of Output Audio Data."
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x4 0.--4. 1. "CHNUM_4_0,Channel Number"
line.long 0x8 "SSI0_6_BUSIF_DALIGN,Function: SSIx_BUSIF_DALIGN determines the initial settings of the SSIx route."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x8 12.--15. 1. "place15,Changes the stream data order."
newline
hexmask.long.byte 0x8 8.--11. 1. "place14,Changes the stream data order."
hexmask.long.byte 0x8 4.--7. 1. "place13,Changes the stream data order."
newline
hexmask.long.byte 0x8 0.--3. 1. "place12,Changes the stream data order."
group.long 0x560++0xB
line.long 0x0 "SSI0_7_BUSIF_MODE,Function: SSIn_BUSIF_MODE determines the initial settings of the bus interface."
hexmask.long.word 0x0 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x0 20. "sft_dir,ssin_busif_shift_dir" "0: Shift to left,1: Shift to right"
newline
hexmask.long.byte 0x0 16.--19. 1. "sft_num,ssin_busif_shift_num"
hexmask.long.byte 0x0 9.--15. 1. "Reserved_9,Reserved"
newline
bitfld.long 0x0 8. "word_swap,word_swap_en" "0: Word order is not swapped,1: Word order is swapped"
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "dma,ssin_dma" "0: PIO access,1: DMA access"
line.long 0x4 "SSI0_7_BUSIF_ADINR,Function: SSIm_BUSIF_ADINR is a 32-bit readable/writable register that selects channel number and bit length of output audio data."
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
hexmask.long.byte 0x4 16.--20. 1. "OTBL_4_0,Bit Length of Output Audio Data."
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
hexmask.long.byte 0x4 0.--4. 1. "CHNUM_4_0,Channel Number"
line.long 0x8 "SSI0_7_BUSIF_DALIGN,Function: SSIy_BUSIF_DALIGN determines the initial settings of the SSIy route."
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved"
hexmask.long.byte 0x8 4.--7. 1. "place15,Changes the stream data order."
newline
hexmask.long.byte 0x8 0.--3. 1. "place14,Changes the stream data order."
group.long 0x840++0x3
line.long 0x0 "SSI_SYSTEM_STATUS0,Function: SSI_SYSTEM_STATUS0 indicates the internal buffer state. When a bit in this register is set. its status is indicated by the corresponding interrupt signal. However. when the interrupt output is masked by the SSI_SYSTEM.."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
eventfld.long 0x0 3. "of0_3,buf_over_flow0-3" "0: Normal operation,1: An overflow has occurred"
newline
eventfld.long 0x0 2. "of0_2,buf_over_flow0-2" "0: Normal operation,1: An overflow has occurred"
eventfld.long 0x0 1. "of0_1,buf_over_flow0-1" "0: Normal operation,1: An overflow has occurred"
newline
eventfld.long 0x0 0. "of0_0,buf_over_flow0-0" "0: Normal operation,1: An overflow has occurred"
group.long 0x848++0x3
line.long 0x0 "SSI_SYSTEM_STATUS2,Function: SSI_SYSTEM_STATUS2 indicates the internal buffer state. When a bit in this register is set. its status is indicated by the corresponding interrupt signal. However. when the interrupt output is masked by the SSI_SYSTEM.."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
eventfld.long 0x0 3. "uf0_3,buf_under_flow0-3" "0: Normal operation,1: An underflow has occurred"
newline
eventfld.long 0x0 2. "uf0_2,buf_under_flow0-2" "0: Normal operation,1: An underflow has occurred"
eventfld.long 0x0 1. "uf0_1,buf_under_flow0-1" "0: Normal operation,1: An underflow has occurred"
newline
eventfld.long 0x0 0. "uf0_0,buf_under_flow0-0" "0: Normal operation,1: An underflow has occurred"
group.long 0x850++0x3
line.long 0x0 "SSI_SYSTEM_INT_ENABLE0,Function: SSI_SYSTEM_INT_ENABLE0 enables or disables output of interrupts corresponding to the states indicated in the SSI SYSTEM Status Register 0 (refer to Section 81.2.15 and Section 81.3.8)."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0x0 3. "of0_3_ie,buf_over_flow0-3_int_enable" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
newline
bitfld.long 0x0 2. "of0_2_ie,buf_over_flow0-2_int_enable" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
bitfld.long 0x0 1. "of0_1_ie,buf_over_flow0-1_int_enable" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
newline
bitfld.long 0x0 0. "of0_0_ie,buf_over_flow0-0_int_enable" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
group.long 0x858++0x3
line.long 0x0 "SSI_SYSTEM_INT_ENABLE2,Function: SSI_SYSTEM_INT_ENABLE2 enables or disables output of interrupts corresponding to the states indicated in the SSI SYSTEM Status Register 2 (refer to Section 81.2.16 and Section 81.3.8)."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0x0 3. "uf0_3_ie,buf_under_flow0-3_int_enable" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
newline
bitfld.long 0x0 2. "uf0_2_ie,buf_under_flow0-2_int_enable" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
bitfld.long 0x0 1. "uf0_1_ie,buf_under_flow0-1_int_enable" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
newline
bitfld.long 0x0 0. "uf0_0_ie,buf_under_flow0-0_int_enable" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
group.long 0x880++0x3
line.long 0x0 "SSI_SYSTEM_STATUS4,Function: SSI_SYSTEM_STATUS4 indicates the internal buffer state. When a bit in this register is set. its status is indicated by the corresponding interrupt signal. However. when the interrupt output is masked by the SSI_SYSTEM.."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
eventfld.long 0x0 3. "of0_7,buf_over_flow0-7" "0: Normal operation,1: An overflow has occurred"
newline
eventfld.long 0x0 2. "of0_6,buf_over_flow0-6" "0: Normal operation,1: An overflow has occurred"
eventfld.long 0x0 1. "of0_5,buf_over_flow0-5" "0: Normal operation,1: An overflow has occurred"
newline
eventfld.long 0x0 0. "of0_4,buf_over_flow0-4" "0: Normal operation,1: An overflow has occurred"
group.long 0x888++0x3
line.long 0x0 "SSI_SYSTEM_STATUS6,Function: SSI_SYSTEM_STATUS6 indicates the internal buffer state. When a bit in this register is set. its status is indicated by the corresponding interrupt signal. However. when the interrupt output is masked by the SSI_SYSTEM.."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
eventfld.long 0x0 3. "uf0_7,buf_under_flow0-7" "0: Normal operation,1: An underflow has occurred"
newline
eventfld.long 0x0 2. "uf0_6,buf_under_flow0-6" "0: Normal operation,1: An underflow has occurred"
eventfld.long 0x0 1. "uf0_5,buf_under_flow0-5" "0: Normal operation,1: An underflow has occurred"
newline
eventfld.long 0x0 0. "uf0_4,buf_under_flow0-4" "0: Normal operation,1: An underflow has occurred"
group.long 0x890++0x3
line.long 0x0 "SSI_SYSTEM_INT_ENABLE4,Function: SSI_SYSTEM_INT_ENABLE4 enables or disables output of interrupts corresponding to the states indicated in the SSI SYSTEM Status Register 4 (refer to Section 81.2.19 and Section 81.3.8)."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0x0 3. "of0_7_ie,buf_over_flow0-7_int_enable" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
newline
bitfld.long 0x0 2. "of0_6_ie,buf_over_flow0-6_int_enable" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
bitfld.long 0x0 1. "of0_5_ie,buf_over_flow0-5_int_enable" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
newline
bitfld.long 0x0 0. "of0_4_ie,buf_over_flow0-4_int_enable" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
group.long 0x898++0x3
line.long 0x0 "SSI_SYSTEM_INT_ENABLE6,Function: SSI_SYSTEM_INT_ENABLE6 enables or disables output of interrupts corresponding to the states indicated in the SSI SYSTEM Status Register 6 (refer to Section 81.2.20 and Section 81.3.8)."
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
bitfld.long 0x0 3. "uf0_7_ie,buf_under_flow0-7_int_enable" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
newline
bitfld.long 0x0 2. "uf0_6_ie,buf_under_flow0-6_int_enable" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
bitfld.long 0x0 1. "uf0_5_ie,buf_under_flow0-5_int_enable" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
newline
bitfld.long 0x0 0. "uf0_4_ie,buf_under_flow0-4_int_enable" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
group.long 0xA08++0x7
line.long 0x0 "SSI0_0_BUSIF_DALIGN2,Function: SSIm_BUSIF_DALIGN2 determines the initial settings of the SSIm route"
hexmask.long.byte 0x0 28.--31. 1. "place15,Changes the stream data order. These bits are used for the TDM-16ch mode (tdm_split = 0  ex_func = 1  chnum = 10000). Other setting  the initial value should not be changed."
hexmask.long.byte 0x0 24.--27. 1. "place14,Changes the stream data order. These bits are used for the TDM-16ch mode (tdm_split = 0  ex_func = 1  chnum = 10000). Other setting  the initial value should not be changed."
newline
hexmask.long.byte 0x0 20.--23. 1. "place13,Changes the stream data order. These bits are used for the TDM-16ch mode (tdm_split = 0  ex_func = 1  chnum = 10000). Other setting  the initial value should not be changed."
hexmask.long.byte 0x0 16.--19. 1. "place12,Changes the stream data order. These bits are used for the TDM-16ch mode (tdm_split = 0  ex_func = 1  chnum = 10000). Other setting  the initial value should not be changed."
newline
hexmask.long.byte 0x0 12.--15. 1. "place11,Changes the stream data order. These bits are used for the TDM-16ch mode (tdm_split = 0  ex_func = 1  chnum = 10000). Other setting  the initial value should not be changed."
hexmask.long.byte 0x0 8.--11. 1. "place10,Changes the stream data order. These bits are used for the TDM-16ch mode (tdm_split = 0  ex_func = 1  chnum = 10000). Other setting  the initial value should not be changed."
newline
hexmask.long.byte 0x0 4.--7. 1. "place9,Changes the stream data order. These bits are used for the TDM-16ch mode (tdm_split = 0  ex_func = 1  chnum = 10000). or TDM Ex Split Mode (tdm_split = 0  ex_func = 1)"
hexmask.long.byte 0x0 0.--3. 1. "place8,Changes the stream data order. These bits are used for the TDM-16ch mode (tdm_split = 0  ex_func = 1  chnum = 10000). or TDM Ex Split Mode (tdm_split = 0  ex_func = 1)"
line.long 0x4 "SSI0_0_MODE2,Function: SSIq_MODE2 determines the initial settings of the SSIq route"
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "ex_func,Enable TDM Ex Func Mode and TDM-16ch mode" "0: TDM ex-split mode/TDM-16ch mode Disable,1: TDM ex-split mode/TDM-16ch mode Enable"
rgroup.long 0xA14++0x3
line.long 0x0 "SSI0_0_STATUS2,Function: SSIq_STATUS2 indicates the internal buffer state. When a bit in this register is set. its status is indicated by the corresponding interrupt signal. However. when the interrupt output is masked by the SSIq Interrupt Enable2.."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "uf_7,buf_under_flowi-7 (i = 0)" "0: -,1: An underflow has occurred"
newline
bitfld.long 0x0 14. "uf_6,buf_under_flowi-6 (i = 0)" "0: -,1: An underflow has occurred"
bitfld.long 0x0 13. "uf_5,buf_under_flowi-5 (i = 0)" "0: -,1: An underflow has occurred"
newline
bitfld.long 0x0 12. "uf_4,buf_under_flowi-4 (i = 0)" "0: -,1: An underflow has occurred"
bitfld.long 0x0 11. "of_7,buf_over_flowi-7 (i = 0)" "0: -,1: An overflow has occurred"
newline
bitfld.long 0x0 10. "of_6,buf_over_flowi-6 (i = 0)" "0: -,1: An overflow has occurred"
bitfld.long 0x0 9. "of_5,buf_over_flowi-5 (i = 0)" "0: -,1: An overflow has occurred"
newline
bitfld.long 0x0 8. "of_4,buf_over_flowi-4 (i = 0)" "0: -,1: An overflow has occurred"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
group.long 0xA18++0x3
line.long 0x0 "SSI0_0_INT_ENABLE_MAIN2,Function: SSIq_INT_ENABLE_MAIN2 enables or disables output of interrupts corresponding to the states indicated in the SSIq Status Register2 (refer to Section 81.2.25 and Section 81.3.8)."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "uf_7_ie,buf_under_flowi-7_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
newline
bitfld.long 0x0 14. "uf_6_ie,buf_under_flowi-6_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
bitfld.long 0x0 13. "uf_5_ie,buf_under_flowi-5_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
newline
bitfld.long 0x0 12. "uf_4_ie,buf_under_flowi-4_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
bitfld.long 0x0 11. "of_7_ie,buf_over_flowi-7_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
newline
bitfld.long 0x0 10. "of_6_ie,buf_over_flowi-6_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
bitfld.long 0x0 9. "of_5_ie,buf_ over_flowi-5_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
newline
bitfld.long 0x0 8. "of_4_ie,buf_over_flowi-4_int_enable (i = 0)" "0: Interrupt outputs are disabled,1: Interrupt outputs are enabled"
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
tree.end
tree "SSIU_1"
base ad:0xEC400000
group.long 0x0++0x3
line.long 0x0 "SSI0_0_BUSIF,Function: SSIn_BUSIF is a window register in which data is stored during data transfer via SSIn_BUSIF. These registers are used for both transmission and reception."
hexmask.long 0x0 0.--31. 1. "busifn,These bits are used to hold the data during data transfer via SSIn_BUSIFn. This register is used for both transmission and reception. This register can only be written to during transmission and only be read from during reception."
group.long 0x8000++0x3
line.long 0x0 "SSI0_1_BUSIF,Function: SSIn_BUSIF is a window register in which data is stored during data transfer via SSIn_BUSIF. These registers are used for both transmission and reception."
hexmask.long 0x0 0.--31. 1. "busifn,These bits are used to hold the data during data transfer via SSIn_BUSIFn. This register is used for both transmission and reception. This register can only be written to during transmission and only be read from during reception."
group.long 0x10000++0x3
line.long 0x0 "SSI0_2_BUSIF,Function: SSIn_BUSIF is a window register in which data is stored during data transfer via SSIn_BUSIF. These registers are used for both transmission and reception."
hexmask.long 0x0 0.--31. 1. "busifn,These bits are used to hold the data during data transfer via SSIn_BUSIFn. This register is used for both transmission and reception. This register can only be written to during transmission and only be read from during reception."
group.long 0x18000++0x3
line.long 0x0 "SSI0_3_BUSIF,Function: SSIn_BUSIF is a window register in which data is stored during data transfer via SSIn_BUSIF. These registers are used for both transmission and reception."
hexmask.long 0x0 0.--31. 1. "busifn,These bits are used to hold the data during data transfer via SSIn_BUSIFn. This register is used for both transmission and reception. This register can only be written to during transmission and only be read from during reception."
group.long 0x20000++0x3
line.long 0x0 "SSI0_4_BUSIF,Function: SSIn_BUSIF is a window register in which data is stored during data transfer via SSIn_BUSIF. These registers are used for both transmission and reception."
hexmask.long 0x0 0.--31. 1. "busifn,These bits are used to hold the data during data transfer via SSIn_BUSIFn. This register is used for both transmission and reception. This register can only be written to during transmission and only be read from during reception."
group.long 0x28000++0x3
line.long 0x0 "SSI0_5_BUSIF,Function: SSIn_BUSIF is a window register in which data is stored during data transfer via SSIn_BUSIF. These registers are used for both transmission and reception."
hexmask.long 0x0 0.--31. 1. "busifn,These bits are used to hold the data during data transfer via SSIn_BUSIFn. This register is used for both transmission and reception. This register can only be written to during transmission and only be read from during reception."
group.long 0x30000++0x3
line.long 0x0 "SSI0_6_BUSIF,Function: SSIn_BUSIF is a window register in which data is stored during data transfer via SSIn_BUSIF. These registers are used for both transmission and reception."
hexmask.long 0x0 0.--31. 1. "busifn,These bits are used to hold the data during data transfer via SSIn_BUSIFn. This register is used for both transmission and reception. This register can only be written to during transmission and only be read from during reception."
group.long 0x38000++0x3
line.long 0x0 "SSI0_7_BUSIF,Function: SSIn_BUSIF is a window register in which data is stored during data transfer via SSIn_BUSIF. These registers are used for both transmission and reception."
hexmask.long 0x0 0.--31. 1. "busifn,These bits are used to hold the data during data transfer via SSIn_BUSIFn. This register is used for both transmission and reception. This register can only be written to during transmission and only be read from during reception."
tree.end
tree.end
tree "SYSC (System Controller)"
base ad:0x0
tree "SYSC_0"
base ad:0xE6180000
rgroup.long 0x0++0x3
line.long 0x0 "SYSCSR0,In Reserved. read value is always initial value and write value must be initial value."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "BUSY_1_0,Indicates whether the SYSC is processing Power-ON or Power-OFF sequence." "0: Processing Power-ON or OFF sequence,?,?,?"
group.long 0x10++0x7
line.long 0x0 "SYSCPTCSR0,In Reserved. read value is always initial value and write value must be initial value."
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved"
bitfld.long 0x0 2. "EIEI,Write access protection Error Interrupt request Enable for INTC." "0: Disable error interrupt request for INTC,1: Enable error interrupt request for INTC"
newline
bitfld.long 0x0 1. "EIE,Write access protection Error Interrupt request Enable for ECM (FuSa)." "0: Disable error interrupt request for ECM,1: Enable error interrupt request for ECM"
eventfld.long 0x0 0. "ERR,Indicates Write access protection Error status." "0: Not detected Write access protection error,1: Detected Write access protection error"
line.long 0x4 "SYSCPTERADR0,In Reserved bits. read value is always initial value and write value must be initial value."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
eventfld.long 0x4 16. "CLR,Write access protection error address clear" "0,1"
newline
hexmask.long.word 0x4 0.--15. 1. "ADR_15_0,First Write access protection error address."
group.long 0x20++0x7
line.long 0x0 "SYSCRDNCSR0,"
hexmask.long.word 0x0 16.--31. 1. "EIE_15_0,HW Redundant Error Interrupt Enable"
hexmask.long.word 0x0 0.--15. 1. "ERR_15_0,HW Redundant Error Status"
line.long 0x4 "SYSCRDNIR0,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,These bits are always read as 0. The write value should always be 0."
hexmask.long.word 0x4 0.--15. 1. "ERIN_15_0,Injects HW Redundant Error"
group.long 0x30++0x7
line.long 0x0 "SYSCAPBACR0,"
hexmask.long 0x0 0.--31. 1. "VAL_31_0,APB BUS Access Check Register for FuSa"
line.long 0x4 "SYSCEFCR0,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x4 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x4 10. "ADE,All requests Done interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 9. "ADM,All requests Done interrupt Mask" "0: not mask All request Done interrupt,1: Mask All request Done interrupt"
eventfld.long 0x4 8. "AD,All requests Done interrupt status/clear" "0: Non-detected All request Done interrupt,1: Detected All request Done interrupt"
newline
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
rgroup.long 0x800++0xF
line.long 0x0 "SYSCPONSR00,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Power-ON status for PDR00-31 power domains."
line.long 0x4 "SYSCPONSR10,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Power-ON status for PDR32-63 power domains."
line.long 0x8 "SYSCPOFFSR00,"
hexmask.long 0x8 0.--31. 1. "PDR_31_0,Power-OFF Status for PDR31-00 power domains."
line.long 0xC "SYSCPOFFSR10,"
hexmask.long 0xC 0.--31. 1. "PDR_63_32,Power-OFF Status for PDR63-32 power domains."
group.long 0x810++0x7
line.long 0x0 "SYSCISCR00,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Power-ON or OFF process complete interrupt status for PDR00-31 power domains."
line.long 0x4 "SYSCISCR10,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Power-ON or OFF process complete interrupt status for PDR32-63 power domains."
group.long 0x820++0x7
line.long 0x0 "SYSCIER00,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Power-ON or OFF process complete interrupt Enable for PDR00-31 power domains."
line.long 0x4 "SYSCIER10,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Power-ON or OFF process complete interrupt Enable for PDR32-63 power domains."
group.long 0x830++0x7
line.long 0x0 "SYSCIMR00,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Mask complete interrupt request to INTC for PDR00-31 power domains."
line.long 0x4 "SYSCIMR10,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Mask complete interrupt request to INTC for PDR32-63 power domains."
group.long 0x860++0x1F
line.long 0x0 "SYSCISOEHSR00,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Isolation Error High Status/Clear"
line.long 0x4 "SYSCISOEHSR10,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Isolation Error High Status/Clear"
line.long 0x8 "SYSCISOELSR00,"
hexmask.long 0x8 0.--31. 1. "PDR_31_0,Isolation Error Low Status/Clear"
line.long 0xC "SYSCISOELSR10,"
hexmask.long 0xC 0.--31. 1. "PDR_63_32,Isolation Error Low Status/Clear"
line.long 0x10 "SYSCISOEHIR00,"
hexmask.long 0x10 0.--31. 1. "PDR_31_0,Isolation Error High Injection for PDR00-31"
line.long 0x14 "SYSCISOEHIR10,"
hexmask.long 0x14 0.--31. 1. "PDR_63_32,Isolation Error High Injection for PDR32-63"
line.long 0x18 "SYSCISOELIR00,"
hexmask.long 0x18 0.--31. 1. "PDR_31_0,Isolation Error Low Injection for PDR00-31"
line.long 0x1C "SYSCISOELIR10,"
hexmask.long 0x1C 0.--31. 1. "PDR_63_32,Isolation Error Low Injection for PDR32-63"
group.long 0xC00++0xF
line.long 0x0 "SYSCISOEHMR00,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Isolation Error High Mask Status/Clear"
line.long 0x4 "SYSCISOEHMR10,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Isolation Error High Mask Status/Clear"
line.long 0x8 "SYSCISOELMR00,"
hexmask.long 0x8 0.--31. 1. "PDR_31_0,Isolation Error High Mask Status/Clear"
line.long 0xC "SYSCISOELMR10,"
hexmask.long 0xC 0.--31. 1. "PDR_63_32,Isolation Error High Mask Status/Clear"
rgroup.long 0x1000++0x3
line.long 0x0 "PDRSR00,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1004++0x7
line.long 0x0 "PDRONCR00,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR00,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1040++0x3
line.long 0x0 "PDRSR01,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1044++0x7
line.long 0x0 "PDRONCR01,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR01,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1080++0x3
line.long 0x0 "PDRSR02,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1084++0x7
line.long 0x0 "PDRONCR02,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR02,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x10C0++0x3
line.long 0x0 "PDRSR03,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x10C4++0x7
line.long 0x0 "PDRONCR03,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR03,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1100++0x3
line.long 0x0 "PDRSR04,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1104++0x7
line.long 0x0 "PDRONCR04,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR04,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1140++0x3
line.long 0x0 "PDRSR05,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1144++0x7
line.long 0x0 "PDRONCR05,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR05,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1180++0x3
line.long 0x0 "PDRSR06,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1184++0x7
line.long 0x0 "PDRONCR06,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR06,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x11C0++0x3
line.long 0x0 "PDRSR07,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x11C4++0x7
line.long 0x0 "PDRONCR07,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR07,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1200++0x3
line.long 0x0 "PDRSR08,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1204++0x7
line.long 0x0 "PDRONCR08,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR08,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1240++0x3
line.long 0x0 "PDRSR09,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1244++0x7
line.long 0x0 "PDRONCR09,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR09,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1280++0x3
line.long 0x0 "PDRSR010,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1284++0x7
line.long 0x0 "PDRONCR010,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR010,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x12C0++0x3
line.long 0x0 "PDRSR011,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x12C4++0x7
line.long 0x0 "PDRONCR011,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR011,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1300++0x3
line.long 0x0 "PDRSR012,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1304++0x7
line.long 0x0 "PDRONCR012,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR012,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1340++0x3
line.long 0x0 "PDRSR013,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1344++0x7
line.long 0x0 "PDRONCR013,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR013,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1380++0x3
line.long 0x0 "PDRSR014,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1384++0x7
line.long 0x0 "PDRONCR014,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR014,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x13C0++0x3
line.long 0x0 "PDRSR015,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x13C4++0x7
line.long 0x0 "PDRONCR015,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR015,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1400++0x3
line.long 0x0 "PDRSR016,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1404++0x7
line.long 0x0 "PDRONCR016,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR016,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1440++0x3
line.long 0x0 "PDRSR017,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1444++0x7
line.long 0x0 "PDRONCR017,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR017,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1480++0x3
line.long 0x0 "PDRSR018,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1484++0x7
line.long 0x0 "PDRONCR018,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR018,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x14C0++0x3
line.long 0x0 "PDRSR019,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x14C4++0x7
line.long 0x0 "PDRONCR019,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR019,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1500++0x3
line.long 0x0 "PDRSR020,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1504++0x7
line.long 0x0 "PDRONCR020,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR020,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1540++0x3
line.long 0x0 "PDRSR021,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1544++0x7
line.long 0x0 "PDRONCR021,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR021,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1580++0x3
line.long 0x0 "PDRSR022,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1584++0x7
line.long 0x0 "PDRONCR022,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR022,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x15C0++0x3
line.long 0x0 "PDRSR023,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x15C4++0x7
line.long 0x0 "PDRONCR023,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR023,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1600++0x3
line.long 0x0 "PDRSR024,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1604++0x7
line.long 0x0 "PDRONCR024,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR024,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1640++0x3
line.long 0x0 "PDRSR025,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1644++0x7
line.long 0x0 "PDRONCR025,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR025,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1680++0x3
line.long 0x0 "PDRSR026,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1684++0x7
line.long 0x0 "PDRONCR026,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR026,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x16C0++0x3
line.long 0x0 "PDRSR027,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x16C4++0x7
line.long 0x0 "PDRONCR027,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR027,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1700++0x3
line.long 0x0 "PDRSR028,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1704++0x7
line.long 0x0 "PDRONCR028,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR028,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1740++0x3
line.long 0x0 "PDRSR029,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1744++0x7
line.long 0x0 "PDRONCR029,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR029,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1780++0x3
line.long 0x0 "PDRSR030,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1784++0x7
line.long 0x0 "PDRONCR030,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR030,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x17C0++0x3
line.long 0x0 "PDRSR031,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x17C4++0x7
line.long 0x0 "PDRONCR031,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR031,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1800++0x3
line.long 0x0 "PDRSR032,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1804++0x7
line.long 0x0 "PDRONCR032,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR032,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1840++0x3
line.long 0x0 "PDRSR033,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1844++0x7
line.long 0x0 "PDRONCR033,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR033,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1880++0x3
line.long 0x0 "PDRSR034,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1884++0x7
line.long 0x0 "PDRONCR034,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR034,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x18C0++0x3
line.long 0x0 "PDRSR035,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x18C4++0x7
line.long 0x0 "PDRONCR035,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR035,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1900++0x3
line.long 0x0 "PDRSR036,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1904++0x7
line.long 0x0 "PDRONCR036,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR036,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1940++0x3
line.long 0x0 "PDRSR037,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1944++0x7
line.long 0x0 "PDRONCR037,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR037,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1980++0x3
line.long 0x0 "PDRSR038,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1984++0x7
line.long 0x0 "PDRONCR038,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR038,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x19C0++0x3
line.long 0x0 "PDRSR039,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x19C4++0x7
line.long 0x0 "PDRONCR039,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR039,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1A00++0x3
line.long 0x0 "PDRSR040,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1A04++0x7
line.long 0x0 "PDRONCR040,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR040,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1A40++0x3
line.long 0x0 "PDRSR041,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1A44++0x7
line.long 0x0 "PDRONCR041,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR041,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1A80++0x3
line.long 0x0 "PDRSR042,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1A84++0x7
line.long 0x0 "PDRONCR042,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR042,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1AC0++0x3
line.long 0x0 "PDRSR043,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1AC4++0x7
line.long 0x0 "PDRONCR043,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR043,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1B00++0x3
line.long 0x0 "PDRSR044,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1B04++0x7
line.long 0x0 "PDRONCR044,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR044,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1B40++0x3
line.long 0x0 "PDRSR045,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1B44++0x7
line.long 0x0 "PDRONCR045,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR045,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1B80++0x3
line.long 0x0 "PDRSR046,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1B84++0x7
line.long 0x0 "PDRONCR046,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR046,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1BC0++0x3
line.long 0x0 "PDRSR047,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1BC4++0x7
line.long 0x0 "PDRONCR047,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR047,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1C00++0x3
line.long 0x0 "PDRSR048,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1C04++0x7
line.long 0x0 "PDRONCR048,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR048,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1C40++0x3
line.long 0x0 "PDRSR049,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1C44++0x7
line.long 0x0 "PDRONCR049,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR049,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1C80++0x3
line.long 0x0 "PDRSR050,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1C84++0x7
line.long 0x0 "PDRONCR050,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR050,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1CC0++0x3
line.long 0x0 "PDRSR051,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1CC4++0x7
line.long 0x0 "PDRONCR051,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR051,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1D00++0x3
line.long 0x0 "PDRSR052,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1D04++0x7
line.long 0x0 "PDRONCR052,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR052,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1D40++0x3
line.long 0x0 "PDRSR053,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1D44++0x7
line.long 0x0 "PDRONCR053,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR053,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1D80++0x3
line.long 0x0 "PDRSR054,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1D84++0x7
line.long 0x0 "PDRONCR054,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR054,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1DC0++0x3
line.long 0x0 "PDRSR055,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1DC4++0x7
line.long 0x0 "PDRONCR055,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR055,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1E00++0x3
line.long 0x0 "PDRSR056,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1E04++0x7
line.long 0x0 "PDRONCR056,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR056,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1E40++0x3
line.long 0x0 "PDRSR057,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1E44++0x7
line.long 0x0 "PDRONCR057,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR057,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1E80++0x3
line.long 0x0 "PDRSR058,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1E84++0x7
line.long 0x0 "PDRONCR058,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR058,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1EC0++0x3
line.long 0x0 "PDRSR059,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1EC4++0x7
line.long 0x0 "PDRONCR059,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR059,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1F00++0x3
line.long 0x0 "PDRSR060,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1F04++0x7
line.long 0x0 "PDRONCR060,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR060,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1F40++0x3
line.long 0x0 "PDRSR061,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1F44++0x7
line.long 0x0 "PDRONCR061,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR061,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1F80++0x3
line.long 0x0 "PDRSR062,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1F84++0x7
line.long 0x0 "PDRONCR062,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR062,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1FC0++0x3
line.long 0x0 "PDRSR063,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1FC4++0x7
line.long 0x0 "PDRONCR063,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR063,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
group.long 0x3000++0x17
line.long 0x0 "SYSCD0WACR00,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x0 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x4 "SYSCD0WACR10,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x4 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x8 "SYSCD0WACR20,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x8 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0xC "SYSCD0WACR30,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0xC 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x10 "SYSCD0WACR40,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x10 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
line.long 0x14 "SYSCD0WACR50,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x14 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
group.long 0x3020++0x17
line.long 0x0 "SYSCD1WACR00,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x0 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x4 "SYSCD1WACR10,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x4 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x8 "SYSCD1WACR20,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x8 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0xC "SYSCD1WACR30,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0xC 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x10 "SYSCD1WACR40,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x10 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
line.long 0x14 "SYSCD1WACR50,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x14 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
group.long 0x3040++0x17
line.long 0x0 "SYSCD2WACR00,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x0 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x4 "SYSCD2WACR10,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x4 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x8 "SYSCD2WACR20,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x8 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0xC "SYSCD2WACR30,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0xC 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x10 "SYSCD2WACR40,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x10 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
line.long 0x14 "SYSCD2WACR50,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x14 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
group.long 0x3060++0x17
line.long 0x0 "SYSCD3WACR00,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x0 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x4 "SYSCD3WACR10,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x4 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x8 "SYSCD3WACR20,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x8 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0xC "SYSCD3WACR30,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0xC 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x10 "SYSCD3WACR40,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x10 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
line.long 0x14 "SYSCD3WACR50,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x14 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
tree.end
tree "SYSC_1"
base ad:0xE6184000
rgroup.long 0x0++0x3
line.long 0x0 "SYSCSR1,In Reserved. read value is always initial value and write value must be initial value."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "BUSY_1_0,Indicates whether the SYSC is processing Power-ON or Power-OFF sequence." "0: Processing Power-ON or OFF sequence,?,?,?"
group.long 0x10++0x7
line.long 0x0 "SYSCPTCSR1,In Reserved. read value is always initial value and write value must be initial value."
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved"
bitfld.long 0x0 2. "EIEI,Write access protection Error Interrupt request Enable for INTC." "0: Disable error interrupt request for INTC,1: Enable error interrupt request for INTC"
newline
bitfld.long 0x0 1. "EIE,Write access protection Error Interrupt request Enable for ECM (FuSa)." "0: Disable error interrupt request for ECM,1: Enable error interrupt request for ECM"
eventfld.long 0x0 0. "ERR,Indicates Write access protection Error status." "0: Not detected Write access protection error,1: Detected Write access protection error"
line.long 0x4 "SYSCPTERADR1,In Reserved bits. read value is always initial value and write value must be initial value."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
eventfld.long 0x4 16. "CLR,Write access protection error address clear" "0,1"
newline
hexmask.long.word 0x4 0.--15. 1. "ADR_15_0,First Write access protection error address."
group.long 0x20++0x7
line.long 0x0 "SYSCRDNCSR1,"
hexmask.long.word 0x0 16.--31. 1. "EIE_15_0,HW Redundant Error Interrupt Enable"
hexmask.long.word 0x0 0.--15. 1. "ERR_15_0,HW Redundant Error Status"
line.long 0x4 "SYSCRDNIR1,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,These bits are always read as 0. The write value should always be 0."
hexmask.long.word 0x4 0.--15. 1. "ERIN_15_0,Injects HW Redundant Error"
group.long 0x30++0x7
line.long 0x0 "SYSCAPBACR1,"
hexmask.long 0x0 0.--31. 1. "VAL_31_0,APB BUS Access Check Register for FuSa"
line.long 0x4 "SYSCEFCR1,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x4 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x4 10. "ADE,All requests Done interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 9. "ADM,All requests Done interrupt Mask" "0: not mask All request Done interrupt,1: Mask All request Done interrupt"
eventfld.long 0x4 8. "AD,All requests Done interrupt status/clear" "0: Non-detected All request Done interrupt,1: Detected All request Done interrupt"
newline
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
rgroup.long 0x800++0xF
line.long 0x0 "SYSCPONSR01,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Power-ON status for PDR00-31 power domains."
line.long 0x4 "SYSCPONSR11,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Power-ON status for PDR32-63 power domains."
line.long 0x8 "SYSCPOFFSR01,"
hexmask.long 0x8 0.--31. 1. "PDR_31_0,Power-OFF Status for PDR31-00 power domains."
line.long 0xC "SYSCPOFFSR11,"
hexmask.long 0xC 0.--31. 1. "PDR_63_32,Power-OFF Status for PDR63-32 power domains."
group.long 0x810++0x7
line.long 0x0 "SYSCISCR01,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Power-ON or OFF process complete interrupt status for PDR00-31 power domains."
line.long 0x4 "SYSCISCR11,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Power-ON or OFF process complete interrupt status for PDR32-63 power domains."
group.long 0x820++0x7
line.long 0x0 "SYSCIER01,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Power-ON or OFF process complete interrupt Enable for PDR00-31 power domains."
line.long 0x4 "SYSCIER11,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Power-ON or OFF process complete interrupt Enable for PDR32-63 power domains."
group.long 0x830++0x7
line.long 0x0 "SYSCIMR01,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Mask complete interrupt request to INTC for PDR00-31 power domains."
line.long 0x4 "SYSCIMR11,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Mask complete interrupt request to INTC for PDR32-63 power domains."
group.long 0x860++0x1F
line.long 0x0 "SYSCISOEHSR01,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Isolation Error High Status/Clear"
line.long 0x4 "SYSCISOEHSR11,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Isolation Error High Status/Clear"
line.long 0x8 "SYSCISOELSR01,"
hexmask.long 0x8 0.--31. 1. "PDR_31_0,Isolation Error Low Status/Clear"
line.long 0xC "SYSCISOELSR11,"
hexmask.long 0xC 0.--31. 1. "PDR_63_32,Isolation Error Low Status/Clear"
line.long 0x10 "SYSCISOEHIR01,"
hexmask.long 0x10 0.--31. 1. "PDR_31_0,Isolation Error High Injection for PDR00-31"
line.long 0x14 "SYSCISOEHIR11,"
hexmask.long 0x14 0.--31. 1. "PDR_63_32,Isolation Error High Injection for PDR32-63"
line.long 0x18 "SYSCISOELIR01,"
hexmask.long 0x18 0.--31. 1. "PDR_31_0,Isolation Error Low Injection for PDR00-31"
line.long 0x1C "SYSCISOELIR11,"
hexmask.long 0x1C 0.--31. 1. "PDR_63_32,Isolation Error Low Injection for PDR32-63"
group.long 0xC00++0xF
line.long 0x0 "SYSCISOEHMR01,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Isolation Error High Mask Status/Clear"
line.long 0x4 "SYSCISOEHMR11,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Isolation Error High Mask Status/Clear"
line.long 0x8 "SYSCISOELMR01,"
hexmask.long 0x8 0.--31. 1. "PDR_31_0,Isolation Error High Mask Status/Clear"
line.long 0xC "SYSCISOELMR11,"
hexmask.long 0xC 0.--31. 1. "PDR_63_32,Isolation Error High Mask Status/Clear"
rgroup.long 0x1000++0x3
line.long 0x0 "PDRSR10,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1004++0x7
line.long 0x0 "PDRONCR10,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR10,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1040++0x3
line.long 0x0 "PDRSR11,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1044++0x7
line.long 0x0 "PDRONCR11,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR11,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1080++0x3
line.long 0x0 "PDRSR12,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1084++0x7
line.long 0x0 "PDRONCR12,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR12,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x10C0++0x3
line.long 0x0 "PDRSR13,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x10C4++0x7
line.long 0x0 "PDRONCR13,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR13,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1100++0x3
line.long 0x0 "PDRSR14,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1104++0x7
line.long 0x0 "PDRONCR14,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR14,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1140++0x3
line.long 0x0 "PDRSR15,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1144++0x7
line.long 0x0 "PDRONCR15,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR15,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1180++0x3
line.long 0x0 "PDRSR16,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1184++0x7
line.long 0x0 "PDRONCR16,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR16,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x11C0++0x3
line.long 0x0 "PDRSR17,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x11C4++0x7
line.long 0x0 "PDRONCR17,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR17,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1200++0x3
line.long 0x0 "PDRSR18,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1204++0x7
line.long 0x0 "PDRONCR18,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR18,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1240++0x3
line.long 0x0 "PDRSR19,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1244++0x7
line.long 0x0 "PDRONCR19,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR19,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1280++0x3
line.long 0x0 "PDRSR110,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1284++0x7
line.long 0x0 "PDRONCR110,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR110,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x12C0++0x3
line.long 0x0 "PDRSR111,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x12C4++0x7
line.long 0x0 "PDRONCR111,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR111,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1300++0x3
line.long 0x0 "PDRSR112,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1304++0x7
line.long 0x0 "PDRONCR112,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR112,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1340++0x3
line.long 0x0 "PDRSR113,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1344++0x7
line.long 0x0 "PDRONCR113,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR113,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1380++0x3
line.long 0x0 "PDRSR114,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1384++0x7
line.long 0x0 "PDRONCR114,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR114,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x13C0++0x3
line.long 0x0 "PDRSR115,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x13C4++0x7
line.long 0x0 "PDRONCR115,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR115,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1400++0x3
line.long 0x0 "PDRSR116,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1404++0x7
line.long 0x0 "PDRONCR116,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR116,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1440++0x3
line.long 0x0 "PDRSR117,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1444++0x7
line.long 0x0 "PDRONCR117,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR117,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1480++0x3
line.long 0x0 "PDRSR118,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1484++0x7
line.long 0x0 "PDRONCR118,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR118,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x14C0++0x3
line.long 0x0 "PDRSR119,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x14C4++0x7
line.long 0x0 "PDRONCR119,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR119,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1500++0x3
line.long 0x0 "PDRSR120,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1504++0x7
line.long 0x0 "PDRONCR120,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR120,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1540++0x3
line.long 0x0 "PDRSR121,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1544++0x7
line.long 0x0 "PDRONCR121,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR121,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1580++0x3
line.long 0x0 "PDRSR122,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1584++0x7
line.long 0x0 "PDRONCR122,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR122,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x15C0++0x3
line.long 0x0 "PDRSR123,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x15C4++0x7
line.long 0x0 "PDRONCR123,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR123,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1600++0x3
line.long 0x0 "PDRSR124,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1604++0x7
line.long 0x0 "PDRONCR124,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR124,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1640++0x3
line.long 0x0 "PDRSR125,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1644++0x7
line.long 0x0 "PDRONCR125,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR125,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1680++0x3
line.long 0x0 "PDRSR126,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1684++0x7
line.long 0x0 "PDRONCR126,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR126,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x16C0++0x3
line.long 0x0 "PDRSR127,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x16C4++0x7
line.long 0x0 "PDRONCR127,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR127,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1700++0x3
line.long 0x0 "PDRSR128,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1704++0x7
line.long 0x0 "PDRONCR128,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR128,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1740++0x3
line.long 0x0 "PDRSR129,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1744++0x7
line.long 0x0 "PDRONCR129,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR129,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1780++0x3
line.long 0x0 "PDRSR130,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1784++0x7
line.long 0x0 "PDRONCR130,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR130,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x17C0++0x3
line.long 0x0 "PDRSR131,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x17C4++0x7
line.long 0x0 "PDRONCR131,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR131,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1800++0x3
line.long 0x0 "PDRSR132,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1804++0x7
line.long 0x0 "PDRONCR132,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR132,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1840++0x3
line.long 0x0 "PDRSR133,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1844++0x7
line.long 0x0 "PDRONCR133,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR133,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1880++0x3
line.long 0x0 "PDRSR134,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1884++0x7
line.long 0x0 "PDRONCR134,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR134,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x18C0++0x3
line.long 0x0 "PDRSR135,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x18C4++0x7
line.long 0x0 "PDRONCR135,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR135,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1900++0x3
line.long 0x0 "PDRSR136,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1904++0x7
line.long 0x0 "PDRONCR136,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR136,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1940++0x3
line.long 0x0 "PDRSR137,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1944++0x7
line.long 0x0 "PDRONCR137,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR137,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1980++0x3
line.long 0x0 "PDRSR138,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1984++0x7
line.long 0x0 "PDRONCR138,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR138,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x19C0++0x3
line.long 0x0 "PDRSR139,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x19C4++0x7
line.long 0x0 "PDRONCR139,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR139,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1A00++0x3
line.long 0x0 "PDRSR140,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1A04++0x7
line.long 0x0 "PDRONCR140,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR140,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1A40++0x3
line.long 0x0 "PDRSR141,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1A44++0x7
line.long 0x0 "PDRONCR141,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR141,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1A80++0x3
line.long 0x0 "PDRSR142,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1A84++0x7
line.long 0x0 "PDRONCR142,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR142,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1AC0++0x3
line.long 0x0 "PDRSR143,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1AC4++0x7
line.long 0x0 "PDRONCR143,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR143,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1B00++0x3
line.long 0x0 "PDRSR144,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1B04++0x7
line.long 0x0 "PDRONCR144,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR144,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1B40++0x3
line.long 0x0 "PDRSR145,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1B44++0x7
line.long 0x0 "PDRONCR145,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR145,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1B80++0x3
line.long 0x0 "PDRSR146,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1B84++0x7
line.long 0x0 "PDRONCR146,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR146,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1BC0++0x3
line.long 0x0 "PDRSR147,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1BC4++0x7
line.long 0x0 "PDRONCR147,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR147,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1C00++0x3
line.long 0x0 "PDRSR148,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1C04++0x7
line.long 0x0 "PDRONCR148,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR148,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1C40++0x3
line.long 0x0 "PDRSR149,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1C44++0x7
line.long 0x0 "PDRONCR149,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR149,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1C80++0x3
line.long 0x0 "PDRSR150,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1C84++0x7
line.long 0x0 "PDRONCR150,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR150,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1CC0++0x3
line.long 0x0 "PDRSR151,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1CC4++0x7
line.long 0x0 "PDRONCR151,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR151,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1D00++0x3
line.long 0x0 "PDRSR152,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1D04++0x7
line.long 0x0 "PDRONCR152,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR152,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1D40++0x3
line.long 0x0 "PDRSR153,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1D44++0x7
line.long 0x0 "PDRONCR153,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR153,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1D80++0x3
line.long 0x0 "PDRSR154,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1D84++0x7
line.long 0x0 "PDRONCR154,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR154,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1DC0++0x3
line.long 0x0 "PDRSR155,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1DC4++0x7
line.long 0x0 "PDRONCR155,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR155,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1E00++0x3
line.long 0x0 "PDRSR156,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1E04++0x7
line.long 0x0 "PDRONCR156,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR156,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1E40++0x3
line.long 0x0 "PDRSR157,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1E44++0x7
line.long 0x0 "PDRONCR157,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR157,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1E80++0x3
line.long 0x0 "PDRSR158,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1E84++0x7
line.long 0x0 "PDRONCR158,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR158,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1EC0++0x3
line.long 0x0 "PDRSR159,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1EC4++0x7
line.long 0x0 "PDRONCR159,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR159,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1F00++0x3
line.long 0x0 "PDRSR160,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1F04++0x7
line.long 0x0 "PDRONCR160,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR160,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1F40++0x3
line.long 0x0 "PDRSR161,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1F44++0x7
line.long 0x0 "PDRONCR161,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR161,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1F80++0x3
line.long 0x0 "PDRSR162,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1F84++0x7
line.long 0x0 "PDRONCR162,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR162,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1FC0++0x3
line.long 0x0 "PDRSR163,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1FC4++0x7
line.long 0x0 "PDRONCR163,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR163,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
group.long 0x3000++0x17
line.long 0x0 "SYSCD0WACR01,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x0 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x4 "SYSCD0WACR11,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x4 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x8 "SYSCD0WACR21,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x8 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0xC "SYSCD0WACR31,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0xC 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x10 "SYSCD0WACR41,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x10 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
line.long 0x14 "SYSCD0WACR51,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x14 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
group.long 0x3020++0x17
line.long 0x0 "SYSCD1WACR01,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x0 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x4 "SYSCD1WACR11,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x4 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x8 "SYSCD1WACR21,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x8 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0xC "SYSCD1WACR31,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0xC 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x10 "SYSCD1WACR41,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x10 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
line.long 0x14 "SYSCD1WACR51,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x14 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
group.long 0x3040++0x17
line.long 0x0 "SYSCD2WACR01,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x0 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x4 "SYSCD2WACR11,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x4 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x8 "SYSCD2WACR21,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x8 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0xC "SYSCD2WACR31,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0xC 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x10 "SYSCD2WACR41,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x10 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
line.long 0x14 "SYSCD2WACR51,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x14 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
group.long 0x3060++0x17
line.long 0x0 "SYSCD3WACR01,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x0 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x4 "SYSCD3WACR11,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x4 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x8 "SYSCD3WACR21,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x8 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0xC "SYSCD3WACR31,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0xC 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x10 "SYSCD3WACR41,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x10 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
line.long 0x14 "SYSCD3WACR51,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x14 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
tree.end
tree "SYSC_2"
base ad:0xE6188000
rgroup.long 0x0++0x3
line.long 0x0 "SYSCSR2,In Reserved. read value is always initial value and write value must be initial value."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "BUSY_1_0,Indicates whether the SYSC is processing Power-ON or Power-OFF sequence." "0: Processing Power-ON or OFF sequence,?,?,?"
group.long 0x10++0x7
line.long 0x0 "SYSCPTCSR2,In Reserved. read value is always initial value and write value must be initial value."
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved"
bitfld.long 0x0 2. "EIEI,Write access protection Error Interrupt request Enable for INTC." "0: Disable error interrupt request for INTC,1: Enable error interrupt request for INTC"
newline
bitfld.long 0x0 1. "EIE,Write access protection Error Interrupt request Enable for ECM (FuSa)." "0: Disable error interrupt request for ECM,1: Enable error interrupt request for ECM"
eventfld.long 0x0 0. "ERR,Indicates Write access protection Error status." "0: Not detected Write access protection error,1: Detected Write access protection error"
line.long 0x4 "SYSCPTERADR2,In Reserved bits. read value is always initial value and write value must be initial value."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
eventfld.long 0x4 16. "CLR,Write access protection error address clear" "0,1"
newline
hexmask.long.word 0x4 0.--15. 1. "ADR_15_0,First Write access protection error address."
group.long 0x20++0x7
line.long 0x0 "SYSCRDNCSR2,"
hexmask.long.word 0x0 16.--31. 1. "EIE_15_0,HW Redundant Error Interrupt Enable"
hexmask.long.word 0x0 0.--15. 1. "ERR_15_0,HW Redundant Error Status"
line.long 0x4 "SYSCRDNIR2,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,These bits are always read as 0. The write value should always be 0."
hexmask.long.word 0x4 0.--15. 1. "ERIN_15_0,Injects HW Redundant Error"
group.long 0x30++0x7
line.long 0x0 "SYSCAPBACR2,"
hexmask.long 0x0 0.--31. 1. "VAL_31_0,APB BUS Access Check Register for FuSa"
line.long 0x4 "SYSCEFCR2,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x4 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x4 10. "ADE,All requests Done interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 9. "ADM,All requests Done interrupt Mask" "0: not mask All request Done interrupt,1: Mask All request Done interrupt"
eventfld.long 0x4 8. "AD,All requests Done interrupt status/clear" "0: Non-detected All request Done interrupt,1: Detected All request Done interrupt"
newline
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
rgroup.long 0x800++0xF
line.long 0x0 "SYSCPONSR02,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Power-ON status for PDR00-31 power domains."
line.long 0x4 "SYSCPONSR12,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Power-ON status for PDR32-63 power domains."
line.long 0x8 "SYSCPOFFSR02,"
hexmask.long 0x8 0.--31. 1. "PDR_31_0,Power-OFF Status for PDR31-00 power domains."
line.long 0xC "SYSCPOFFSR12,"
hexmask.long 0xC 0.--31. 1. "PDR_63_32,Power-OFF Status for PDR63-32 power domains."
group.long 0x810++0x7
line.long 0x0 "SYSCISCR02,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Power-ON or OFF process complete interrupt status for PDR00-31 power domains."
line.long 0x4 "SYSCISCR12,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Power-ON or OFF process complete interrupt status for PDR32-63 power domains."
group.long 0x820++0x7
line.long 0x0 "SYSCIER02,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Power-ON or OFF process complete interrupt Enable for PDR00-31 power domains."
line.long 0x4 "SYSCIER12,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Power-ON or OFF process complete interrupt Enable for PDR32-63 power domains."
group.long 0x830++0x7
line.long 0x0 "SYSCIMR02,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Mask complete interrupt request to INTC for PDR00-31 power domains."
line.long 0x4 "SYSCIMR12,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Mask complete interrupt request to INTC for PDR32-63 power domains."
group.long 0x860++0x1F
line.long 0x0 "SYSCISOEHSR02,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Isolation Error High Status/Clear"
line.long 0x4 "SYSCISOEHSR12,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Isolation Error High Status/Clear"
line.long 0x8 "SYSCISOELSR02,"
hexmask.long 0x8 0.--31. 1. "PDR_31_0,Isolation Error Low Status/Clear"
line.long 0xC "SYSCISOELSR12,"
hexmask.long 0xC 0.--31. 1. "PDR_63_32,Isolation Error Low Status/Clear"
line.long 0x10 "SYSCISOEHIR02,"
hexmask.long 0x10 0.--31. 1. "PDR_31_0,Isolation Error High Injection for PDR00-31"
line.long 0x14 "SYSCISOEHIR12,"
hexmask.long 0x14 0.--31. 1. "PDR_63_32,Isolation Error High Injection for PDR32-63"
line.long 0x18 "SYSCISOELIR02,"
hexmask.long 0x18 0.--31. 1. "PDR_31_0,Isolation Error Low Injection for PDR00-31"
line.long 0x1C "SYSCISOELIR12,"
hexmask.long 0x1C 0.--31. 1. "PDR_63_32,Isolation Error Low Injection for PDR32-63"
group.long 0xC00++0xF
line.long 0x0 "SYSCISOEHMR02,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Isolation Error High Mask Status/Clear"
line.long 0x4 "SYSCISOEHMR12,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Isolation Error High Mask Status/Clear"
line.long 0x8 "SYSCISOELMR02,"
hexmask.long 0x8 0.--31. 1. "PDR_31_0,Isolation Error High Mask Status/Clear"
line.long 0xC "SYSCISOELMR12,"
hexmask.long 0xC 0.--31. 1. "PDR_63_32,Isolation Error High Mask Status/Clear"
rgroup.long 0x1000++0x3
line.long 0x0 "PDRSR20,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1004++0x7
line.long 0x0 "PDRONCR20,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR20,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1040++0x3
line.long 0x0 "PDRSR21,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1044++0x7
line.long 0x0 "PDRONCR21,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR21,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1080++0x3
line.long 0x0 "PDRSR22,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1084++0x7
line.long 0x0 "PDRONCR22,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR22,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x10C0++0x3
line.long 0x0 "PDRSR23,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x10C4++0x7
line.long 0x0 "PDRONCR23,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR23,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1100++0x3
line.long 0x0 "PDRSR24,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1104++0x7
line.long 0x0 "PDRONCR24,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR24,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1140++0x3
line.long 0x0 "PDRSR25,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1144++0x7
line.long 0x0 "PDRONCR25,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR25,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1180++0x3
line.long 0x0 "PDRSR26,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1184++0x7
line.long 0x0 "PDRONCR26,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR26,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x11C0++0x3
line.long 0x0 "PDRSR27,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x11C4++0x7
line.long 0x0 "PDRONCR27,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR27,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1200++0x3
line.long 0x0 "PDRSR28,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1204++0x7
line.long 0x0 "PDRONCR28,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR28,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1240++0x3
line.long 0x0 "PDRSR29,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1244++0x7
line.long 0x0 "PDRONCR29,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR29,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1280++0x3
line.long 0x0 "PDRSR210,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1284++0x7
line.long 0x0 "PDRONCR210,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR210,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x12C0++0x3
line.long 0x0 "PDRSR211,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x12C4++0x7
line.long 0x0 "PDRONCR211,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR211,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1300++0x3
line.long 0x0 "PDRSR212,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1304++0x7
line.long 0x0 "PDRONCR212,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR212,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1340++0x3
line.long 0x0 "PDRSR213,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1344++0x7
line.long 0x0 "PDRONCR213,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR213,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1380++0x3
line.long 0x0 "PDRSR214,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1384++0x7
line.long 0x0 "PDRONCR214,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR214,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x13C0++0x3
line.long 0x0 "PDRSR215,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x13C4++0x7
line.long 0x0 "PDRONCR215,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR215,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1400++0x3
line.long 0x0 "PDRSR216,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1404++0x7
line.long 0x0 "PDRONCR216,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR216,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1440++0x3
line.long 0x0 "PDRSR217,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1444++0x7
line.long 0x0 "PDRONCR217,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR217,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1480++0x3
line.long 0x0 "PDRSR218,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1484++0x7
line.long 0x0 "PDRONCR218,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR218,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x14C0++0x3
line.long 0x0 "PDRSR219,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x14C4++0x7
line.long 0x0 "PDRONCR219,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR219,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1500++0x3
line.long 0x0 "PDRSR220,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1504++0x7
line.long 0x0 "PDRONCR220,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR220,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1540++0x3
line.long 0x0 "PDRSR221,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1544++0x7
line.long 0x0 "PDRONCR221,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR221,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1580++0x3
line.long 0x0 "PDRSR222,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1584++0x7
line.long 0x0 "PDRONCR222,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR222,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x15C0++0x3
line.long 0x0 "PDRSR223,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x15C4++0x7
line.long 0x0 "PDRONCR223,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR223,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1600++0x3
line.long 0x0 "PDRSR224,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1604++0x7
line.long 0x0 "PDRONCR224,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR224,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1640++0x3
line.long 0x0 "PDRSR225,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1644++0x7
line.long 0x0 "PDRONCR225,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR225,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1680++0x3
line.long 0x0 "PDRSR226,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1684++0x7
line.long 0x0 "PDRONCR226,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR226,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x16C0++0x3
line.long 0x0 "PDRSR227,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x16C4++0x7
line.long 0x0 "PDRONCR227,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR227,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1700++0x3
line.long 0x0 "PDRSR228,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1704++0x7
line.long 0x0 "PDRONCR228,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR228,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1740++0x3
line.long 0x0 "PDRSR229,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1744++0x7
line.long 0x0 "PDRONCR229,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR229,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1780++0x3
line.long 0x0 "PDRSR230,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1784++0x7
line.long 0x0 "PDRONCR230,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR230,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x17C0++0x3
line.long 0x0 "PDRSR231,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x17C4++0x7
line.long 0x0 "PDRONCR231,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR231,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1800++0x3
line.long 0x0 "PDRSR232,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1804++0x7
line.long 0x0 "PDRONCR232,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR232,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1840++0x3
line.long 0x0 "PDRSR233,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1844++0x7
line.long 0x0 "PDRONCR233,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR233,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1880++0x3
line.long 0x0 "PDRSR234,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1884++0x7
line.long 0x0 "PDRONCR234,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR234,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x18C0++0x3
line.long 0x0 "PDRSR235,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x18C4++0x7
line.long 0x0 "PDRONCR235,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR235,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1900++0x3
line.long 0x0 "PDRSR236,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1904++0x7
line.long 0x0 "PDRONCR236,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR236,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1940++0x3
line.long 0x0 "PDRSR237,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1944++0x7
line.long 0x0 "PDRONCR237,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR237,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1980++0x3
line.long 0x0 "PDRSR238,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1984++0x7
line.long 0x0 "PDRONCR238,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR238,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x19C0++0x3
line.long 0x0 "PDRSR239,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x19C4++0x7
line.long 0x0 "PDRONCR239,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR239,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1A00++0x3
line.long 0x0 "PDRSR240,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1A04++0x7
line.long 0x0 "PDRONCR240,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR240,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1A40++0x3
line.long 0x0 "PDRSR241,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1A44++0x7
line.long 0x0 "PDRONCR241,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR241,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1A80++0x3
line.long 0x0 "PDRSR242,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1A84++0x7
line.long 0x0 "PDRONCR242,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR242,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1AC0++0x3
line.long 0x0 "PDRSR243,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1AC4++0x7
line.long 0x0 "PDRONCR243,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR243,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1B00++0x3
line.long 0x0 "PDRSR244,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1B04++0x7
line.long 0x0 "PDRONCR244,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR244,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1B40++0x3
line.long 0x0 "PDRSR245,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1B44++0x7
line.long 0x0 "PDRONCR245,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR245,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1B80++0x3
line.long 0x0 "PDRSR246,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1B84++0x7
line.long 0x0 "PDRONCR246,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR246,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1BC0++0x3
line.long 0x0 "PDRSR247,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1BC4++0x7
line.long 0x0 "PDRONCR247,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR247,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1C00++0x3
line.long 0x0 "PDRSR248,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1C04++0x7
line.long 0x0 "PDRONCR248,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR248,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1C40++0x3
line.long 0x0 "PDRSR249,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1C44++0x7
line.long 0x0 "PDRONCR249,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR249,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1C80++0x3
line.long 0x0 "PDRSR250,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1C84++0x7
line.long 0x0 "PDRONCR250,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR250,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1CC0++0x3
line.long 0x0 "PDRSR251,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1CC4++0x7
line.long 0x0 "PDRONCR251,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR251,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1D00++0x3
line.long 0x0 "PDRSR252,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1D04++0x7
line.long 0x0 "PDRONCR252,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR252,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1D40++0x3
line.long 0x0 "PDRSR253,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1D44++0x7
line.long 0x0 "PDRONCR253,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR253,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1D80++0x3
line.long 0x0 "PDRSR254,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1D84++0x7
line.long 0x0 "PDRONCR254,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR254,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1DC0++0x3
line.long 0x0 "PDRSR255,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1DC4++0x7
line.long 0x0 "PDRONCR255,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR255,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1E00++0x3
line.long 0x0 "PDRSR256,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1E04++0x7
line.long 0x0 "PDRONCR256,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR256,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1E40++0x3
line.long 0x0 "PDRSR257,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1E44++0x7
line.long 0x0 "PDRONCR257,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR257,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1E80++0x3
line.long 0x0 "PDRSR258,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1E84++0x7
line.long 0x0 "PDRONCR258,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR258,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1EC0++0x3
line.long 0x0 "PDRSR259,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1EC4++0x7
line.long 0x0 "PDRONCR259,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR259,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1F00++0x3
line.long 0x0 "PDRSR260,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1F04++0x7
line.long 0x0 "PDRONCR260,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR260,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1F40++0x3
line.long 0x0 "PDRSR261,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1F44++0x7
line.long 0x0 "PDRONCR261,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR261,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1F80++0x3
line.long 0x0 "PDRSR262,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1F84++0x7
line.long 0x0 "PDRONCR262,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR262,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1FC0++0x3
line.long 0x0 "PDRSR263,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1FC4++0x7
line.long 0x0 "PDRONCR263,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR263,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
group.long 0x3000++0x17
line.long 0x0 "SYSCD0WACR02,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x0 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x4 "SYSCD0WACR12,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x4 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x8 "SYSCD0WACR22,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x8 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0xC "SYSCD0WACR32,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0xC 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x10 "SYSCD0WACR42,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x10 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
line.long 0x14 "SYSCD0WACR52,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x14 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
group.long 0x3020++0x17
line.long 0x0 "SYSCD1WACR02,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x0 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x4 "SYSCD1WACR12,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x4 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x8 "SYSCD1WACR22,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x8 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0xC "SYSCD1WACR32,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0xC 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x10 "SYSCD1WACR42,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x10 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
line.long 0x14 "SYSCD1WACR52,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x14 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
group.long 0x3040++0x17
line.long 0x0 "SYSCD2WACR02,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x0 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x4 "SYSCD2WACR12,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x4 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x8 "SYSCD2WACR22,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x8 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0xC "SYSCD2WACR32,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0xC 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x10 "SYSCD2WACR42,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x10 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
line.long 0x14 "SYSCD2WACR52,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x14 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
group.long 0x3060++0x17
line.long 0x0 "SYSCD3WACR02,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x0 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x4 "SYSCD3WACR12,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x4 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x8 "SYSCD3WACR22,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x8 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0xC "SYSCD3WACR32,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0xC 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x10 "SYSCD3WACR42,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x10 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
line.long 0x14 "SYSCD3WACR52,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x14 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
tree.end
tree "SYSC_3"
base ad:0xE618C000
rgroup.long 0x0++0x3
line.long 0x0 "SYSCSR3,In Reserved. read value is always initial value and write value must be initial value."
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "BUSY_1_0,Indicates whether the SYSC is processing Power-ON or Power-OFF sequence." "0: Processing Power-ON or OFF sequence,?,?,?"
group.long 0x10++0x7
line.long 0x0 "SYSCPTCSR3,In Reserved. read value is always initial value and write value must be initial value."
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved"
bitfld.long 0x0 2. "EIEI,Write access protection Error Interrupt request Enable for INTC." "0: Disable error interrupt request for INTC,1: Enable error interrupt request for INTC"
newline
bitfld.long 0x0 1. "EIE,Write access protection Error Interrupt request Enable for ECM (FuSa)." "0: Disable error interrupt request for ECM,1: Enable error interrupt request for ECM"
eventfld.long 0x0 0. "ERR,Indicates Write access protection Error status." "0: Not detected Write access protection error,1: Detected Write access protection error"
line.long 0x4 "SYSCPTERADR3,In Reserved bits. read value is always initial value and write value must be initial value."
hexmask.long.word 0x4 17.--31. 1. "Reserved_17,Reserved"
eventfld.long 0x4 16. "CLR,Write access protection error address clear" "0,1"
newline
hexmask.long.word 0x4 0.--15. 1. "ADR_15_0,First Write access protection error address."
group.long 0x20++0x7
line.long 0x0 "SYSCRDNCSR3,"
hexmask.long.word 0x0 16.--31. 1. "EIE_15_0,HW Redundant Error Interrupt Enable"
hexmask.long.word 0x0 0.--15. 1. "ERR_15_0,HW Redundant Error Status"
line.long 0x4 "SYSCRDNIR3,"
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,These bits are always read as 0. The write value should always be 0."
hexmask.long.word 0x4 0.--15. 1. "ERIN_15_0,Injects HW Redundant Error"
group.long 0x30++0x7
line.long 0x0 "SYSCAPBACR3,"
hexmask.long 0x0 0.--31. 1. "VAL_31_0,APB BUS Access Check Register for FuSa"
line.long 0x4 "SYSCEFCR3,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x4 11.--31. 1. "Reserved_11,Reserved"
bitfld.long 0x4 10. "ADE,All requests Done interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 9. "ADM,All requests Done interrupt Mask" "0: not mask All request Done interrupt,1: Mask All request Done interrupt"
eventfld.long 0x4 8. "AD,All requests Done interrupt status/clear" "0: Non-detected All request Done interrupt,1: Detected All request Done interrupt"
newline
hexmask.long.byte 0x4 0.--7. 1. "Reserved_0,Reserved"
rgroup.long 0x800++0xF
line.long 0x0 "SYSCPONSR03,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Power-ON status for PDR00-31 power domains."
line.long 0x4 "SYSCPONSR13,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Power-ON status for PDR32-63 power domains."
line.long 0x8 "SYSCPOFFSR03,"
hexmask.long 0x8 0.--31. 1. "PDR_31_0,Power-OFF Status for PDR31-00 power domains."
line.long 0xC "SYSCPOFFSR13,"
hexmask.long 0xC 0.--31. 1. "PDR_63_32,Power-OFF Status for PDR63-32 power domains."
group.long 0x810++0x7
line.long 0x0 "SYSCISCR03,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Power-ON or OFF process complete interrupt status for PDR00-31 power domains."
line.long 0x4 "SYSCISCR13,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Power-ON or OFF process complete interrupt status for PDR32-63 power domains."
group.long 0x820++0x7
line.long 0x0 "SYSCIER03,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Power-ON or OFF process complete interrupt Enable for PDR00-31 power domains."
line.long 0x4 "SYSCIER13,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Power-ON or OFF process complete interrupt Enable for PDR32-63 power domains."
group.long 0x830++0x7
line.long 0x0 "SYSCIMR03,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Mask complete interrupt request to INTC for PDR00-31 power domains."
line.long 0x4 "SYSCIMR13,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Mask complete interrupt request to INTC for PDR32-63 power domains."
group.long 0x860++0x1F
line.long 0x0 "SYSCISOEHSR03,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Isolation Error High Status/Clear"
line.long 0x4 "SYSCISOEHSR13,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Isolation Error High Status/Clear"
line.long 0x8 "SYSCISOELSR03,"
hexmask.long 0x8 0.--31. 1. "PDR_31_0,Isolation Error Low Status/Clear"
line.long 0xC "SYSCISOELSR13,"
hexmask.long 0xC 0.--31. 1. "PDR_63_32,Isolation Error Low Status/Clear"
line.long 0x10 "SYSCISOEHIR03,"
hexmask.long 0x10 0.--31. 1. "PDR_31_0,Isolation Error High Injection for PDR00-31"
line.long 0x14 "SYSCISOEHIR13,"
hexmask.long 0x14 0.--31. 1. "PDR_63_32,Isolation Error High Injection for PDR32-63"
line.long 0x18 "SYSCISOELIR03,"
hexmask.long 0x18 0.--31. 1. "PDR_31_0,Isolation Error Low Injection for PDR00-31"
line.long 0x1C "SYSCISOELIR13,"
hexmask.long 0x1C 0.--31. 1. "PDR_63_32,Isolation Error Low Injection for PDR32-63"
group.long 0xC00++0xF
line.long 0x0 "SYSCISOEHMR03,"
hexmask.long 0x0 0.--31. 1. "PDR_31_0,Isolation Error High Mask Status/Clear"
line.long 0x4 "SYSCISOEHMR13,"
hexmask.long 0x4 0.--31. 1. "PDR_63_32,Isolation Error High Mask Status/Clear"
line.long 0x8 "SYSCISOELMR03,"
hexmask.long 0x8 0.--31. 1. "PDR_31_0,Isolation Error High Mask Status/Clear"
line.long 0xC "SYSCISOELMR13,"
hexmask.long 0xC 0.--31. 1. "PDR_63_32,Isolation Error High Mask Status/Clear"
rgroup.long 0x1000++0x3
line.long 0x0 "PDRSR30,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1004++0x7
line.long 0x0 "PDRONCR30,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR30,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1040++0x3
line.long 0x0 "PDRSR31,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1044++0x7
line.long 0x0 "PDRONCR31,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR31,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1080++0x3
line.long 0x0 "PDRSR32,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1084++0x7
line.long 0x0 "PDRONCR32,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR32,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x10C0++0x3
line.long 0x0 "PDRSR33,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x10C4++0x7
line.long 0x0 "PDRONCR33,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR33,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1100++0x3
line.long 0x0 "PDRSR34,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1104++0x7
line.long 0x0 "PDRONCR34,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR34,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1140++0x3
line.long 0x0 "PDRSR35,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1144++0x7
line.long 0x0 "PDRONCR35,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR35,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1180++0x3
line.long 0x0 "PDRSR36,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1184++0x7
line.long 0x0 "PDRONCR36,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR36,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x11C0++0x3
line.long 0x0 "PDRSR37,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x11C4++0x7
line.long 0x0 "PDRONCR37,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR37,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1200++0x3
line.long 0x0 "PDRSR38,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1204++0x7
line.long 0x0 "PDRONCR38,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR38,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1240++0x3
line.long 0x0 "PDRSR39,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1244++0x7
line.long 0x0 "PDRONCR39,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR39,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1280++0x3
line.long 0x0 "PDRSR310,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1284++0x7
line.long 0x0 "PDRONCR310,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR310,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x12C0++0x3
line.long 0x0 "PDRSR311,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x12C4++0x7
line.long 0x0 "PDRONCR311,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR311,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1300++0x3
line.long 0x0 "PDRSR312,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1304++0x7
line.long 0x0 "PDRONCR312,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR312,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1340++0x3
line.long 0x0 "PDRSR313,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1344++0x7
line.long 0x0 "PDRONCR313,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR313,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1380++0x3
line.long 0x0 "PDRSR314,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1384++0x7
line.long 0x0 "PDRONCR314,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR314,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x13C0++0x3
line.long 0x0 "PDRSR315,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x13C4++0x7
line.long 0x0 "PDRONCR315,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR315,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1400++0x3
line.long 0x0 "PDRSR316,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1404++0x7
line.long 0x0 "PDRONCR316,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR316,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1440++0x3
line.long 0x0 "PDRSR317,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1444++0x7
line.long 0x0 "PDRONCR317,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR317,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1480++0x3
line.long 0x0 "PDRSR318,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1484++0x7
line.long 0x0 "PDRONCR318,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR318,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x14C0++0x3
line.long 0x0 "PDRSR319,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x14C4++0x7
line.long 0x0 "PDRONCR319,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR319,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1500++0x3
line.long 0x0 "PDRSR320,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1504++0x7
line.long 0x0 "PDRONCR320,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR320,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1540++0x3
line.long 0x0 "PDRSR321,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1544++0x7
line.long 0x0 "PDRONCR321,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR321,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1580++0x3
line.long 0x0 "PDRSR322,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1584++0x7
line.long 0x0 "PDRONCR322,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR322,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x15C0++0x3
line.long 0x0 "PDRSR323,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x15C4++0x7
line.long 0x0 "PDRONCR323,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR323,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1600++0x3
line.long 0x0 "PDRSR324,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1604++0x7
line.long 0x0 "PDRONCR324,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR324,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1640++0x3
line.long 0x0 "PDRSR325,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1644++0x7
line.long 0x0 "PDRONCR325,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR325,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1680++0x3
line.long 0x0 "PDRSR326,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1684++0x7
line.long 0x0 "PDRONCR326,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR326,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x16C0++0x3
line.long 0x0 "PDRSR327,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x16C4++0x7
line.long 0x0 "PDRONCR327,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR327,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1700++0x3
line.long 0x0 "PDRSR328,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1704++0x7
line.long 0x0 "PDRONCR328,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR328,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1740++0x3
line.long 0x0 "PDRSR329,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1744++0x7
line.long 0x0 "PDRONCR329,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR329,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1780++0x3
line.long 0x0 "PDRSR330,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1784++0x7
line.long 0x0 "PDRONCR330,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR330,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x17C0++0x3
line.long 0x0 "PDRSR331,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x17C4++0x7
line.long 0x0 "PDRONCR331,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR331,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1800++0x3
line.long 0x0 "PDRSR332,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1804++0x7
line.long 0x0 "PDRONCR332,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR332,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1840++0x3
line.long 0x0 "PDRSR333,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1844++0x7
line.long 0x0 "PDRONCR333,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR333,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1880++0x3
line.long 0x0 "PDRSR334,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1884++0x7
line.long 0x0 "PDRONCR334,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR334,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x18C0++0x3
line.long 0x0 "PDRSR335,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x18C4++0x7
line.long 0x0 "PDRONCR335,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR335,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1900++0x3
line.long 0x0 "PDRSR336,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1904++0x7
line.long 0x0 "PDRONCR336,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR336,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1940++0x3
line.long 0x0 "PDRSR337,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1944++0x7
line.long 0x0 "PDRONCR337,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR337,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1980++0x3
line.long 0x0 "PDRSR338,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1984++0x7
line.long 0x0 "PDRONCR338,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR338,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x19C0++0x3
line.long 0x0 "PDRSR339,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x19C4++0x7
line.long 0x0 "PDRONCR339,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR339,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1A00++0x3
line.long 0x0 "PDRSR340,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1A04++0x7
line.long 0x0 "PDRONCR340,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR340,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1A40++0x3
line.long 0x0 "PDRSR341,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1A44++0x7
line.long 0x0 "PDRONCR341,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR341,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1A80++0x3
line.long 0x0 "PDRSR342,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1A84++0x7
line.long 0x0 "PDRONCR342,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR342,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1AC0++0x3
line.long 0x0 "PDRSR343,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1AC4++0x7
line.long 0x0 "PDRONCR343,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR343,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1B00++0x3
line.long 0x0 "PDRSR344,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1B04++0x7
line.long 0x0 "PDRONCR344,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR344,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1B40++0x3
line.long 0x0 "PDRSR345,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1B44++0x7
line.long 0x0 "PDRONCR345,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR345,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1B80++0x3
line.long 0x0 "PDRSR346,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1B84++0x7
line.long 0x0 "PDRONCR346,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR346,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1BC0++0x3
line.long 0x0 "PDRSR347,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1BC4++0x7
line.long 0x0 "PDRONCR347,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR347,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1C00++0x3
line.long 0x0 "PDRSR348,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1C04++0x7
line.long 0x0 "PDRONCR348,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR348,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1C40++0x3
line.long 0x0 "PDRSR349,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1C44++0x7
line.long 0x0 "PDRONCR349,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR349,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1C80++0x3
line.long 0x0 "PDRSR350,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1C84++0x7
line.long 0x0 "PDRONCR350,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR350,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1CC0++0x3
line.long 0x0 "PDRSR351,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1CC4++0x7
line.long 0x0 "PDRONCR351,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR351,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1D00++0x3
line.long 0x0 "PDRSR352,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1D04++0x7
line.long 0x0 "PDRONCR352,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR352,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1D40++0x3
line.long 0x0 "PDRSR353,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1D44++0x7
line.long 0x0 "PDRONCR353,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR353,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1D80++0x3
line.long 0x0 "PDRSR354,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1D84++0x7
line.long 0x0 "PDRONCR354,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR354,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1DC0++0x3
line.long 0x0 "PDRSR355,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1DC4++0x7
line.long 0x0 "PDRONCR355,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR355,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1E00++0x3
line.long 0x0 "PDRSR356,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1E04++0x7
line.long 0x0 "PDRONCR356,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR356,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1E40++0x3
line.long 0x0 "PDRSR357,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1E44++0x7
line.long 0x0 "PDRONCR357,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR357,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1E80++0x3
line.long 0x0 "PDRSR358,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1E84++0x7
line.long 0x0 "PDRONCR358,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR358,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1EC0++0x3
line.long 0x0 "PDRSR359,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1EC4++0x7
line.long 0x0 "PDRONCR359,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR359,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1F00++0x3
line.long 0x0 "PDRSR360,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1F04++0x7
line.long 0x0 "PDRONCR360,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR360,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1F40++0x3
line.long 0x0 "PDRSR361,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1F44++0x7
line.long 0x0 "PDRONCR361,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR361,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1F80++0x3
line.long 0x0 "PDRSR362,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1F84++0x7
line.long 0x0 "PDRONCR362,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR362,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
rgroup.long 0x1FC0++0x3
line.long 0x0 "PDRSR363,In Reserved. read value is always initial value."
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
bitfld.long 0x0 12. "ON_STATE,Indicates status of Power-ON sequence." "0: Not processing Power-ON sequence,1: Processing Power ON sequence"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 8. "OFF_STATE,Indicates status of Power-OFF sequence." "0: Not processing Power-OFF sequence,1: Processing Power OFF sequence"
newline
bitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ON,Indicates Power-ON state." "0: Not Power-ON state,1: Power-ON state"
newline
bitfld.long 0x0 1.--3. "Reserved_1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "OFF,Indicates Power-OFF state." "0: Not Power-OFF state,1: Power-OFF state"
group.long 0x1FC4++0x7
line.long 0x0 "PDRONCR363,In Reserved. write value must be 0."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "PWRON,Power-ON request." "0,1"
line.long 0x4 "PDROFFCR363,In Reserved. write value must be 0."
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x4 0. "PWROFF,Power-OFF request." "0,1"
group.long 0x3000++0x17
line.long 0x0 "SYSCD0WACR03,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x0 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x4 "SYSCD0WACR13,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x4 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x8 "SYSCD0WACR23,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x8 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0xC "SYSCD0WACR33,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0xC 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x10 "SYSCD0WACR43,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x10 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
line.long 0x14 "SYSCD0WACR53,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x14 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
group.long 0x3020++0x17
line.long 0x0 "SYSCD1WACR03,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x0 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x4 "SYSCD1WACR13,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x4 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x8 "SYSCD1WACR23,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x8 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0xC "SYSCD1WACR33,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0xC 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x10 "SYSCD1WACR43,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x10 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
line.long 0x14 "SYSCD1WACR53,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x14 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
group.long 0x3040++0x17
line.long 0x0 "SYSCD2WACR03,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x0 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x4 "SYSCD2WACR13,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x4 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x8 "SYSCD2WACR23,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x8 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0xC "SYSCD2WACR33,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0xC 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x10 "SYSCD2WACR43,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x10 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
line.long 0x14 "SYSCD2WACR53,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x14 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
group.long 0x3060++0x17
line.long 0x0 "SYSCD3WACR03,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x0 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x4 "SYSCD3WACR13,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x4 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x8 "SYSCD3WACR23,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x8 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0xC "SYSCD3WACR33,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0xC 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Common Registers."
line.long 0x10 "SYSCD3WACR43,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x10 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
line.long 0x14 "SYSCD3WACR53,This register can be written by only Domain0 address. (H'E618_0000- H'E618_3FFC)"
hexmask.long 0x14 0.--31. 1. "DnWACRm_31_0,Domain[n] Write access control for Power domain register."
tree.end
tree.end
tree "THS_CIVM_CVM (Thermal Sensor/Chip Internal Voltage Monitor/Core Voltage Monitor)"
base ad:0x0
tree "THS_CIVM_CVM_0"
base ad:0xE6198000
group.long 0x4++0x7
line.long 0x0 "IRQSTR1,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "TEMPD3_STR,TEMPD3 Detection Status" "0: Not detected,1: TEMP_CODE [11:0] bits detect that it falls below.."
newline
bitfld.long 0x0 4. "TEMPD2_STR,TEMPD2 Detection Status" "0: Not detected,1: TEMP_CODE [11:0] bits detect that it falls below.."
newline
bitfld.long 0x0 3. "TEMPD1_STR,TEMPD1 Detection Status" "0: Not detected,1: TEMP_CODE [11:0] bits detect that it falls below.."
newline
bitfld.long 0x0 2. "TEMP3_STR,TEMP3 Detection Status" "0: Not detected,1: TEMP_CODE [11:0] bits detect that it exceeds the.."
newline
bitfld.long 0x0 1. "TEMP2_STR,TEMP2 Detection Status" "0: Not detected,1: TEMP_CODE [11:0] bits detect that it exceeds the.."
newline
bitfld.long 0x0 0. "TEMP1_STR,TEMP1 Detection Status" "0: Not detected,1: TEMP_CODE [11:0] bits detect that it exceeds the.."
line.long 0x4 "IRQMSK1,"
hexmask.long 0x4 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x4 5. "TEMPD3_MSK,This bit selects masking or non-masking of TEMPD3 error requests." "0: Errors are masked,1: The mask is cleared"
newline
bitfld.long 0x4 4. "TEMPD2_MSK,This bit selects masking or non-masking of TEMPD2 error requests." "0: Errors are masked,1: The mask is cleared"
newline
bitfld.long 0x4 3. "TEMPD1_MSK,This bit selects masking or non-masking of TEMPD1 error requests." "0: Errors are masked,1: The mask is cleared"
newline
bitfld.long 0x4 2. "TEMP3_MSK,This bit selects masking or non-masking of TEMP3 error requests." "0: Errors are masked,1: The mask is cleared"
newline
bitfld.long 0x4 1. "TEMP2_MSK,This bit selects masking or non-masking of TEMP2 error requests." "0: Errors are masked,1: The mask is cleared"
newline
bitfld.long 0x4 0. "TEMP1_MSK,This bit selects masking or non-masking of TEMP1 error requests." "0: Errors are masked,1: The mask is cleared"
group.long 0x10++0x13
line.long 0x0 "IRQEN1,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "TEMPD3_EN,This bit enables or disables TEMPD3 errors." "0: TEMPD3 errors are disabled,1: TEMPD3 errors are enabled"
newline
bitfld.long 0x0 4. "TEMPD2_EN,This bit enables or disables TEMPD2 errors." "0: TEMPD2 errors are disabled,1: TEMPD2 errors are enabled"
newline
bitfld.long 0x0 3. "TEMPD1_EN,This bit enables or disables TEMPD1 errors." "0: TEMPD1 errors are disabled,1: TEMPD1 errors are enabled"
newline
bitfld.long 0x0 2. "TEMP3_EN,This bit enables or disables TEMP3 errors." "0: TEMP3 errors are disabled,1: TEMP3 errors are enabled"
newline
bitfld.long 0x0 1. "TEMP2_EN,This bit enables or disables TEMP2 errors." "0: TEMP2 errors are disabled,1: TEMP2 errors are enabled"
newline
bitfld.long 0x0 0. "TEMP1_EN,This bit enables or disables TEMP1 errors." "0: TEMP1 errors are disabled,1: TEMP1 errors are enabled"
line.long 0x4 "IRQTEMP11,"
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
rbitfld.long 0x4 12.--13. "Reserved_12,Reserved" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--11. 1. "IRQTEMP1_11_0,These bits set the first threshold value of the temperature for TEMP1 and TEMPD1 errors."
line.long 0x8 "IRQTEMP21,"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
newline
rbitfld.long 0x8 12.--13. "Reserved_12,Reserved" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--11. 1. "IRQTEMP2_11_0,These bits set the second threshold value of the temperature for TEMP2 and TEMPD2 errors."
line.long 0xC "IRQTEMP31,"
hexmask.long.tbyte 0xC 14.--31. 1. "Reserved_14,Reserved"
newline
rbitfld.long 0xC 12.--13. "Reserved_12,Reserved" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--11. 1. "IRQTEMP3_11_0,These bits set the third threshold value of the temperature for TEMP3 and TEMPD3 errors."
line.long 0x10 "THCTR1,"
hexmask.long.byte 0x10 25.--31. 1. "Reserved_25,Reserved"
newline
rbitfld.long 0x10 24. "Reserved_24,Reserved" "0,1"
newline
rbitfld.long 0x10 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 20. "CIVMTST,THS/CIVM failure check mode" "0: Normal mode,1: THS/CIVM failure check mode"
newline
rbitfld.long 0x10 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
rbitfld.long 0x10 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x10 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x10 8.--9. "SENSSEL_1_0,Select the use sensor" "0: THS,1: THS ON only,?,?"
newline
rbitfld.long 0x10 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x10 5. "TH_EN_B,THS/CIVM enable" "0: Enabled,1: Disabled"
newline
hexmask.long.byte 0x10 1.--4. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x10 0. "THSST,Enabling/disabling of the A/D converter for the thermal sensor" "0: Disabled,1: Enabled"
rgroup.long 0x24++0xB
line.long 0x0 "THSTR1,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x0 3. "THACKMON,THACK signal monitor" "0: Not detected,1: THCODE was generated"
newline
bitfld.long 0x0 2. "THCNTOV_MON,THCNTOV signal monitor" "0: Not detected,1: Detected overflow"
newline
bitfld.long 0x0 1. "THFAIL1,This bit is set to 1 when all of the THCODE bits are 1" "0: Normal operation,1: All of the THCODE bits are all 1"
newline
bitfld.long 0x0 0. "THFAIL0,This bit is set to 1 when all of the THCODE bits are 0" "0: Normal operation,1: All of the THCODE bits are all 0"
line.long 0x4 "TEMP1,"
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 12.--13. "Reserved_12,Reserved" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--11. 1. "TEMP_CODE_11_0,These bits indicate the digital value for the temperature detected by the thermal sensor."
line.long 0x8 "VOLT1,"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
newline
hexmask.long.byte 0x8 10.--13. 1. "Reserved_10,Reserved"
newline
hexmask.long.word 0x8 0.--9. 1. "VOLT_CODE_9_0,These bits indicate the digital value for the voltage detected by the chip internal voltage monitor."
rgroup.long 0x68++0x3
line.long 0x0 "THSCP,"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
newline
bitfld.long 0x0 14.--15. "COR_PARA_VLD_1_0,Shows whether trimming parameter in FUSE is valid." "0,1,2,3"
newline
hexmask.long.word 0x0 0.--13. 1. "Reserved_0,Reserved"
group.long 0x6C++0x3
line.long 0x0 "IRQ_INJECTION1,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "TEMPD3_INJ,TEMPD3 Error Injection" "0: IRQTEMP3 Error Injection Disable,1: IRQTEMP3 Error Injection Enable"
newline
bitfld.long 0x0 4. "TEMPD2_INJ,TEMPD2 Error Injection" "0: IRQTEMP2 Error Injection Disable,1: IRQTEMP2 Error Injection Enable"
newline
bitfld.long 0x0 3. "TEMPD1_INJ,TEMPD1 Error Injection" "0: IRQTEMP1 Error Injection Disable,1: IRQTEMP1 Error Injection Enable"
newline
bitfld.long 0x0 2. "TEMP3_INJ,TEMP3 Error Injection" "0: IRQTEMP3 Error Injection Disable,1: IRQTEMP3 Error Injection Enable"
newline
bitfld.long 0x0 1. "TEMP2_INJ,TEMP2 Error Injection" "0: IRQTEMP2 Error Injection Disable,1: IRQTEMP2 Error Injection Enable"
newline
bitfld.long 0x0 0. "TEMP1_INJ,TEMP1 Error Injection" "0: IRQTEMP1 Error Injection Disable,1: IRQTEMP1 Error Injection Enable"
group.long 0x74++0x3
line.long 0x0 "TSC_ERROR_CTL1,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "TSC_ERR_CTL,TSC error injection" "0: Error injection off,1: Error injection on"
group.long 0x7C++0x3
line.long 0x0 "SEQ_RESET1,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "SEQ_RESET,This bit initializes the sequence and error value." "0,1"
rgroup.long 0x8C++0x3
line.long 0x0 "CIVMTST_VOLT11,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,These bits are fixed to 0."
newline
hexmask.long.word 0x0 0.--13. 1. "CIVMTST_VOLT1_CODE_YN_13_0,These bits indicate the digital value detected by the chip internal voltage monitor during CIVM test mode1."
rgroup.long 0x98++0x7
line.long 0x0 "CIVMTST_VOLT41,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,These bits are fixed to 0."
newline
hexmask.long.word 0x0 0.--13. 1. "CIVMTST_VOLT4_CODE_YN_13_0,These bits indicate the digital value detected by the chip internal voltage monitor during CIVM test mode4."
line.long 0x4 "MANTST_VOLT1,"
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,These bits are fixed to 0."
newline
hexmask.long.word 0x4 0.--13. 1. "MANTST_VOLT_CODE_YN_13_0,These bits indicate the digital value detected by the chip internal voltage monitor during Manual test mode."
group.long 0xC0++0x3
line.long 0x0 "THS_MANUAL_SET1,"
bitfld.long 0x0 31. "CTRSEL,Select control of THS/CIVM" "0: THS/CVM is controlled by Finite State Machine,1: THS/CVM is controlled by THS_MANUAL_SET registers"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
rbitfld.long 0x0 24. "Reserved_24,Reserved" "0,1"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x0 20.--22. "CTR_THVF0SEL_2_0,ADC InV[A] select" "0: Vref,?,?,?,?,?,?,?"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x0 16.--18. "CTR_THVF1SEL_2_0,ADC InV[B] select" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
newline
rbitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
newline
rbitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
group.long 0xF8++0x3
line.long 0x0 "CVM_LOCK,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "VM_LOCK,This bit is implemented for only TSC1" "0: ;Updatable,1: ;Lock status"
rgroup.long 0xFC++0x7
line.long 0x0 "CVM_LOCK_BK,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "R_VM_LOCK,This bit can monitor the readback value of VM_LOCK register" "0,1"
line.long 0x4 "CVM_LATCH_BK1,"
hexmask.long 0x4 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x4 0. "R_VMLATCH,Status of configuration lock" "0: CVM_CTRL,1: CVM_CTRL"
group.long 0x104++0x3
line.long 0x0 "CVM_CTRL1,"
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
newline
rbitfld.long 0x0 24. "Reserved_24,Reserved" "0,1"
newline
hexmask.long.byte 0x0 17.--23. 1. "Reserved_17,Reserved"
newline
rbitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
rbitfld.long 0x0 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "THBGREN_N,BGR enable" "0: Enabled,1: Disabled"
newline
rbitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 8. "OUTPC,This bit is a switching signal for CVM function" "0: Idle mode,1: CVM mode"
newline
bitfld.long 0x0 6.--7. "VMFLTFC_1_0,CVM digital output filter function control" "0: see Section 200,1: see Section 200,?,?"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
rbitfld.long 0x0 4. "Reserved_4,Reserved" "0,1"
newline
hexmask.long.byte 0x0 0.--3. 1. "CHOICE_PLACE_3_0,These bits can select the enable/disable of CVM function at each thermal sensor module."
rgroup.long 0x108++0x7
line.long 0x0 "CVM_CTRL_BK1,"
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x0 24. "Reserved_24,Reserved" "0,1"
newline
hexmask.long.byte 0x0 17.--23. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "R_THBGREN_N,This bit can monitor the readback value of THBGREN_N in CVM_CTRL register." "0,1"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 8. "OUTPC_BK,This bit can monitor the readback value of OUTPC in CVM_CTRL register." "0,1"
newline
bitfld.long 0x0 6.--7. "R_VMFLTFC_1_0,This bit can monitor the readback value of VMFITFC in CVM_CTRL register." "0,1,2,3"
newline
bitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "Reserved_4,Reserved" "0,1"
newline
hexmask.long.byte 0x0 0.--3. 1. "CHOICE_PLACE_BK_3_0,These bits can monitor the readback value of CHOICE_PLACE [3:0] in CVM_CTRL register."
line.long 0x4 "CVM_DETECT_MON1,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved"
newline
bitfld.long 0x4 24.--25. "MODE_MAX_MON_1_0,Golden reference value for MODE_MAX" "0,1,2,3"
newline
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "TRIM_MAX_MON_3_0,Golden reference value for TRIM_MAX"
newline
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x4 8.--9. "MODE_MIN_MON_1_0,Golden reference value for MODE_MIN" "0,1,2,3"
newline
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "TRIM_MIN_MON_3_0,Golden reference value for TRIM_MIN"
group.long 0x110++0x3
line.long 0x0 "CVM_DETECT_MANUAL_SET1,"
rbitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "CVM_DETECT_SEL_MAX,This bit selects either CVM_DETECT_MON register or CVM_MANUAL_SET register." "0: The values of bits 25 to 24 and bits 18 to 16 in..,1: The values of bits 25 to 24 and bits 18 to 16 in.."
newline
rbitfld.long 0x0 26.--27. "Reserved_26,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 24.--25. "MODE_MAX_1_0,Coase grain overvoltage threshold setting." "0,1,2,3"
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x0 16.--19. 1. "TRIM_MAX_3_0,Fine grain overvoltage threshold setting"
newline
rbitfld.long 0x0 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "CVM_DETECT_SEL_MIN,This bit selects either CVM_DETECT_MON register or CVM_MANUAL_SET register." "0: The values of bits 9 to 8 and bits 2 to 0 in..,1: The values of bits 9 to 8 and bits 2 to 0 in.."
newline
rbitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "MODE_MIN_1_0,Coase grain undervoltage threshold setting." "0,1,2,3"
newline
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "TRIM_MIN_3_0,Fine grain undervoltage threshold setting"
rgroup.long 0x114++0x7
line.long 0x0 "CVM_DETECT_SET_BK1,"
hexmask.long.byte 0x0 26.--31. 1. "Reserved_26,Reserved"
newline
bitfld.long 0x0 24.--25. "MODE_MAX_BK_1_0,These bits can monitor the readback value of MODE_MAX[1:0]." "0,1,2,3"
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x0 16.--19. 1. "TRIM_MAX_BK_3_0,These bits can monitor the readback value of TRIM_MAX[3:0]."
newline
hexmask.long.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x0 8.--9. "MODE_MIN_BK_1_0,These bits can monitor the readback value of MODE_MIN[1:0]." "0,1,2,3"
newline
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "TRIM_MIN_BK_3_0,These bits can monitor the readback value of TRIM_MIN[3:0]."
line.long 0x4 "CVM_TOFF_MON1,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "TOFF_MON_3_0,Golden reference value for TOFF"
group.long 0x11C++0x3
line.long 0x0 "CVM_TOFF_MANUAL_SET1,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
newline
bitfld.long 0x0 12. "TOFF_SEL,This bit selects either CVM_TOFF_MON register or CVM_TOFF_MANUAL_SET register." "0: Select value that bit 3 to 0 in CVM_TOFF_MON..,1: Select value that bit 3 to 0 in.."
newline
hexmask.long.byte 0x0 4.--11. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "TOFF_3_0,CVM temperature compensation setting"
rgroup.long 0x120++0x7
line.long 0x0 "CVM_TOFF_BK1,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "TOFF_BK_3_0,These bits can monitor the readback value of TOFF[3:0]."
line.long 0x4 "CVM_VMOUT_BK,"
hexmask.long 0x4 2.--31. 1. "Reserved_2,Reserved"
newline
bitfld.long 0x4 0.--1. "VMOUT_BK_1_0,These bits can monitor the switch signal of analog voltage." "0: Undervoltage,1: Normal,?,?"
rgroup.long 0x130++0x3
line.long 0x0 "TSC_ERROR_MON1,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x0 7. "ERR_ACKTOV,THACK timeout error status" "0: no error,1: THACK timeout error"
newline
bitfld.long 0x0 6. "Reserved_6,Reserved" "0,1"
newline
bitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "ERR_THCODE,THCODE error status" "0: no error,1: THCODE error"
newline
bitfld.long 0x0 3. "ERR_THCNTOV,THCNTOV error status" "0: no error,1: THCNTOV error"
newline
bitfld.long 0x0 2. "THFAIL1,This bit is set to 1 when all of the THCODE bits are 1" "0: Normal operation,1: All of the THCODE bits are all 1"
newline
bitfld.long 0x0 1. "THFAIL0,This bit is set to 1 when all of the THCODE bits are 0" "0: Normal operation,1: All of the THCODE bits are all 0"
newline
bitfld.long 0x0 0. "TSC_ERROR,TSC error status" "0: no error,1: TSC error"
group.long 0x138++0x3
line.long 0x0 "MANTST_SET_DT1,"
rbitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "MANTST,Manual test mode" "0: Normal mode,1: Manual test mode"
newline
hexmask.long.byte 0x0 23.--27. 1. "Reserved_23,Reserved"
newline
bitfld.long 0x0 20.--22. "MAN_THVF0SEL_2_0,ADC InV[A] select for manual test" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x0 16.--18. "MAN_THVF1SEL_2_0,ADC InV[B] select for manual test" "0: Vref,?,?,?,?,?,?,?"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
newline
rbitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
newline
rbitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
rgroup.long 0x140++0x3
line.long 0x0 "SEQ_ACT_MON1,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "SEQ_ACT_3_0,Sequence Act Flag monitor"
group.long 0x144++0x3
line.long 0x0 "VMMSK_CTRL,"
hexmask.long 0x0 3.--31. 1. "Reserved_3,Reserved"
newline
bitfld.long 0x0 2. "CVMC_MSK_CTL_N,This bit selects masking or non-masking of CVM error at thermal sensor #3 module" "0: CVM error is masked,1: The mask is cleared"
newline
bitfld.long 0x0 1. "CVMB_MSKCTL_N,This bit selects masking or non-masking of CVM error at thermal sensor #2 module" "0: CVM error is masked,1: The mask is cleared"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x180++0xB
line.long 0x0 "THSFMON001,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
newline
hexmask.long.word 0x0 16.--27. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x0 0.--11. 1. "THCODE_L_SR1_11_0,Parameter to be used in adjusting the characteristics"
line.long 0x4 "THSFMON011,"
hexmask.long.byte 0x4 28.--31. 1. "Reserved_28,Reserved"
newline
hexmask.long.word 0x4 16.--27. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "THCODE_U_SR1_11_0,Parameter to be used in adjusting the characteristics"
line.long 0x8 "THSFMON021,"
hexmask.long.byte 0x8 28.--31. 1. "Reserved_28,Reserved"
newline
hexmask.long.word 0x8 16.--27. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x8 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x8 0.--11. 1. "THCODE_R_SR1_11_0,Parameter to be used in adjusting the characteristics"
rgroup.long 0x1BC++0xB
line.long 0x0 "THSFMON15,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
newline
hexmask.long.word 0x0 16.--27. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x0 0.--11. 1. "PTAT_PF_L_SR1_11_0,Parameter to be used in adjusting the characteristics"
line.long 0x4 "THSFMON16,"
hexmask.long.byte 0x4 28.--31. 1. "Reserved_28,Reserved"
newline
hexmask.long.word 0x4 16.--27. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "PTAT_PF_U_SR1_11_0,Parameter to be used in adjusting the characteristics"
line.long 0x8 "THSFMON17,"
hexmask.long.byte 0x8 28.--31. 1. "Reserved_28,Reserved"
newline
hexmask.long.word 0x8 16.--27. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x8 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x8 0.--11. 1. "PTAT_PF_R_SR1_11_0,Parameter to be used in adjusting the characteristics"
tree.end
tree "THS_CIVM_CVM_1"
base ad:0xE61A0000
group.long 0x4++0x7
line.long 0x0 "IRQSTR2,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "TEMPD3_STR,TEMPD3 Detection Status" "0: Not detected,1: TEMP_CODE [11:0] bits detect that it falls below.."
newline
bitfld.long 0x0 4. "TEMPD2_STR,TEMPD2 Detection Status" "0: Not detected,1: TEMP_CODE [11:0] bits detect that it falls below.."
newline
bitfld.long 0x0 3. "TEMPD1_STR,TEMPD1 Detection Status" "0: Not detected,1: TEMP_CODE [11:0] bits detect that it falls below.."
newline
bitfld.long 0x0 2. "TEMP3_STR,TEMP3 Detection Status" "0: Not detected,1: TEMP_CODE [11:0] bits detect that it exceeds the.."
newline
bitfld.long 0x0 1. "TEMP2_STR,TEMP2 Detection Status" "0: Not detected,1: TEMP_CODE [11:0] bits detect that it exceeds the.."
newline
bitfld.long 0x0 0. "TEMP1_STR,TEMP1 Detection Status" "0: Not detected,1: TEMP_CODE [11:0] bits detect that it exceeds the.."
line.long 0x4 "IRQMSK2,"
hexmask.long 0x4 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x4 5. "TEMPD3_MSK,This bit selects masking or non-masking of TEMPD3 error requests." "0: Errors are masked,1: The mask is cleared"
newline
bitfld.long 0x4 4. "TEMPD2_MSK,This bit selects masking or non-masking of TEMPD2 error requests." "0: Errors are masked,1: The mask is cleared"
newline
bitfld.long 0x4 3. "TEMPD1_MSK,This bit selects masking or non-masking of TEMPD1 error requests." "0: Errors are masked,1: The mask is cleared"
newline
bitfld.long 0x4 2. "TEMP3_MSK,This bit selects masking or non-masking of TEMP3 error requests." "0: Errors are masked,1: The mask is cleared"
newline
bitfld.long 0x4 1. "TEMP2_MSK,This bit selects masking or non-masking of TEMP2 error requests." "0: Errors are masked,1: The mask is cleared"
newline
bitfld.long 0x4 0. "TEMP1_MSK,This bit selects masking or non-masking of TEMP1 error requests." "0: Errors are masked,1: The mask is cleared"
group.long 0x10++0x13
line.long 0x0 "IRQEN2,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "TEMPD3_EN,This bit enables or disables TEMPD3 errors." "0: TEMPD3 errors are disabled,1: TEMPD3 errors are enabled"
newline
bitfld.long 0x0 4. "TEMPD2_EN,This bit enables or disables TEMPD2 errors." "0: TEMPD2 errors are disabled,1: TEMPD2 errors are enabled"
newline
bitfld.long 0x0 3. "TEMPD1_EN,This bit enables or disables TEMPD1 errors." "0: TEMPD1 errors are disabled,1: TEMPD1 errors are enabled"
newline
bitfld.long 0x0 2. "TEMP3_EN,This bit enables or disables TEMP3 errors." "0: TEMP3 errors are disabled,1: TEMP3 errors are enabled"
newline
bitfld.long 0x0 1. "TEMP2_EN,This bit enables or disables TEMP2 errors." "0: TEMP2 errors are disabled,1: TEMP2 errors are enabled"
newline
bitfld.long 0x0 0. "TEMP1_EN,This bit enables or disables TEMP1 errors." "0: TEMP1 errors are disabled,1: TEMP1 errors are enabled"
line.long 0x4 "IRQTEMP12,"
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
rbitfld.long 0x4 12.--13. "Reserved_12,Reserved" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--11. 1. "IRQTEMP1_11_0,These bits set the first threshold value of the temperature for TEMP1 and TEMPD1 errors."
line.long 0x8 "IRQTEMP22,"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
newline
rbitfld.long 0x8 12.--13. "Reserved_12,Reserved" "0,1,2,3"
newline
hexmask.long.word 0x8 0.--11. 1. "IRQTEMP2_11_0,These bits set the second threshold value of the temperature for TEMP2 and TEMPD2 errors."
line.long 0xC "IRQTEMP32,"
hexmask.long.tbyte 0xC 14.--31. 1. "Reserved_14,Reserved"
newline
rbitfld.long 0xC 12.--13. "Reserved_12,Reserved" "0,1,2,3"
newline
hexmask.long.word 0xC 0.--11. 1. "IRQTEMP3_11_0,These bits set the third threshold value of the temperature for TEMP3 and TEMPD3 errors."
line.long 0x10 "THCTR2,"
hexmask.long.byte 0x10 25.--31. 1. "Reserved_25,Reserved"
newline
rbitfld.long 0x10 24. "Reserved_24,Reserved" "0,1"
newline
rbitfld.long 0x10 21.--23. "Reserved_21,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x10 20. "CIVMTST,THS/CIVM failure check mode" "0: Normal mode,1: THS/CIVM failure check mode"
newline
rbitfld.long 0x10 18.--19. "Reserved_18,Reserved" "0,1,2,3"
newline
rbitfld.long 0x10 16.--17. "Reserved_16,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x10 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x10 8.--9. "SENSSEL_1_0,Select the use sensor" "0: THS,1: THS ON only,?,?"
newline
rbitfld.long 0x10 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x10 5. "TH_EN_B,THS/CIVM enable" "0: Enabled,1: Disabled"
newline
hexmask.long.byte 0x10 1.--4. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x10 0. "THSST,Enabling/disabling of the A/D converter for the thermal sensor" "0: Disabled,1: Enabled"
rgroup.long 0x24++0xB
line.long 0x0 "THSTR2,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
bitfld.long 0x0 3. "THACKMON,THACK signal monitor" "0: Not detected,1: THCODE was generated"
newline
bitfld.long 0x0 2. "THCNTOV_MON,THCNTOV signal monitor" "0: Not detected,1: Detected overflow"
newline
bitfld.long 0x0 1. "THFAIL1,This bit is set to 1 when all of the THCODE bits are 1" "0: Normal operation,1: All of the THCODE bits are all 1"
newline
bitfld.long 0x0 0. "THFAIL0,This bit is set to 1 when all of the THCODE bits are 0" "0: Normal operation,1: All of the THCODE bits are all 0"
line.long 0x4 "TEMP2,"
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,Reserved"
newline
bitfld.long 0x4 12.--13. "Reserved_12,Reserved" "0,1,2,3"
newline
hexmask.long.word 0x4 0.--11. 1. "TEMP_CODE_11_0,These bits indicate the digital value for the temperature detected by the thermal sensor."
line.long 0x8 "VOLT2,"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
newline
hexmask.long.byte 0x8 10.--13. 1. "Reserved_10,Reserved"
newline
hexmask.long.word 0x8 0.--9. 1. "VOLT_CODE_9_0,These bits indicate the digital value for the voltage detected by the chip internal voltage monitor."
group.long 0x6C++0x3
line.long 0x0 "IRQ_INJECTION2,"
hexmask.long 0x0 6.--31. 1. "Reserved_6,Reserved"
newline
bitfld.long 0x0 5. "TEMPD3_INJ,TEMPD3 Error Injection" "0: IRQTEMP3 Error Injection Disable,1: IRQTEMP3 Error Injection Enable"
newline
bitfld.long 0x0 4. "TEMPD2_INJ,TEMPD2 Error Injection" "0: IRQTEMP2 Error Injection Disable,1: IRQTEMP2 Error Injection Enable"
newline
bitfld.long 0x0 3. "TEMPD1_INJ,TEMPD1 Error Injection" "0: IRQTEMP1 Error Injection Disable,1: IRQTEMP1 Error Injection Enable"
newline
bitfld.long 0x0 2. "TEMP3_INJ,TEMP3 Error Injection" "0: IRQTEMP3 Error Injection Disable,1: IRQTEMP3 Error Injection Enable"
newline
bitfld.long 0x0 1. "TEMP2_INJ,TEMP2 Error Injection" "0: IRQTEMP2 Error Injection Disable,1: IRQTEMP2 Error Injection Enable"
newline
bitfld.long 0x0 0. "TEMP1_INJ,TEMP1 Error Injection" "0: IRQTEMP1 Error Injection Disable,1: IRQTEMP1 Error Injection Enable"
group.long 0x74++0x3
line.long 0x0 "TSC_ERROR_CTL2,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "TSC_ERR_CTL,TSC error injection" "0: Error injection off,1: Error injection on"
group.long 0x7C++0x3
line.long 0x0 "SEQ_RESET2,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "SEQ_RESET,This bit initializes the sequence and error value." "0,1"
rgroup.long 0x8C++0x3
line.long 0x0 "CIVMTST_VOLT12,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,These bits are fixed to 0."
newline
hexmask.long.word 0x0 0.--13. 1. "CIVMTST_VOLT1_CODE_YN_13_0,These bits indicate the digital value detected by the chip internal voltage monitor during CIVM test mode1."
rgroup.long 0x98++0x7
line.long 0x0 "CIVMTST_VOLT42,"
hexmask.long.tbyte 0x0 14.--31. 1. "Reserved_14,These bits are fixed to 0."
newline
hexmask.long.word 0x0 0.--13. 1. "CIVMTST_VOLT4_CODE_YN_13_0,These bits indicate the digital value detected by the chip internal voltage monitor during CIVM test mode4."
line.long 0x4 "MANTST_VOLT2,"
hexmask.long.tbyte 0x4 14.--31. 1. "Reserved_14,These bits are fixed to 0."
newline
hexmask.long.word 0x4 0.--13. 1. "MANTST_VOLT_CODE_YN_13_0,These bits indicate the digital value detected by the chip internal voltage monitor during Manual test mode."
group.long 0xC0++0x3
line.long 0x0 "THS_MANUAL_SET2,"
bitfld.long 0x0 31. "CTRSEL,Select control of THS/CIVM" "0: THS/CVM is controlled by Finite State Machine,1: THS/CVM is controlled by THS_MANUAL_SET registers"
newline
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
rbitfld.long 0x0 24. "Reserved_24,Reserved" "0,1"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x0 20.--22. "CTR_THVF0SEL_2_0,ADC InV[A] select" "0: Vref,?,?,?,?,?,?,?"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x0 16.--18. "CTR_THVF1SEL_2_0,ADC InV[B] select" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
newline
rbitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
newline
rbitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
newline
rbitfld.long 0x0 0. "Reserved_0,Reserved" "0,1"
rgroup.long 0x100++0x3
line.long 0x0 "CVM_LATCH_BK2,"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
newline
bitfld.long 0x0 0. "R_VMLATCH,Status of configuration lock" "0: CVM_CTRL,1: CVM_CTRL"
group.long 0x104++0x3
line.long 0x0 "CVM_CTRL2,"
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
newline
rbitfld.long 0x0 24. "Reserved_24,Reserved" "0,1"
newline
hexmask.long.byte 0x0 17.--23. 1. "Reserved_17,Reserved"
newline
rbitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
rbitfld.long 0x0 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "THBGREN_N,BGR enable" "0: Enabled,1: Disabled"
newline
rbitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 8. "OUTPC,This bit is a switching signal for CVM function" "0: Idle mode,1: CVM mode"
newline
bitfld.long 0x0 6.--7. "VMFLTFC_1_0,CVM digital output filter function control" "0: see Section 200,1: see Section 200,?,?"
newline
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
rbitfld.long 0x0 4. "Reserved_4,Reserved" "0,1"
newline
hexmask.long.byte 0x0 0.--3. 1. "CHOICE_PLACE_3_0,These bits can select the enable/disable of CVM function at each thermal sensor module."
rgroup.long 0x108++0x7
line.long 0x0 "CVM_CTRL_BK2,"
hexmask.long.byte 0x0 25.--31. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x0 24. "Reserved_24,Reserved" "0,1"
newline
hexmask.long.byte 0x0 17.--23. 1. "Reserved_17,Reserved"
newline
bitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
bitfld.long 0x0 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "R_THBGREN_N,This bit can monitor the readback value of THBGREN_N in CVM_CTRL register." "0,1"
newline
bitfld.long 0x0 9.--11. "Reserved_9,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 8. "OUTPC_BK,This bit can monitor the readback value of OUTPC in CVM_CTRL register." "0,1"
newline
bitfld.long 0x0 6.--7. "R_VMFLTFC_1_0,This bit can monitor the readback value of VMFITFC in CVM_CTRL register." "0,1,2,3"
newline
bitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "Reserved_4,Reserved" "0,1"
newline
hexmask.long.byte 0x0 0.--3. 1. "CHOICE_PLACE_BK_3_0,These bits can monitor the readback value of CHOICE_PLACE [3:0] in CVM_CTRL register."
line.long 0x4 "CVM_DETECT_MON2,"
hexmask.long.byte 0x4 26.--31. 1. "Reserved_26,Reserved"
newline
bitfld.long 0x4 24.--25. "MODE_MAX_MON_1_0,Golden reference value for MODE_MAX" "0,1,2,3"
newline
hexmask.long.byte 0x4 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x4 16.--19. 1. "TRIM_MAX_MON_3_0,Golden reference value for TRIM_MAX"
newline
hexmask.long.byte 0x4 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x4 8.--9. "MODE_MIN_MON_1_0,Golden reference value for MODE_MIN" "0,1,2,3"
newline
hexmask.long.byte 0x4 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "TRIM_MIN_MON_3_0,Golden reference value for TRIM_MIN"
group.long 0x110++0x3
line.long 0x0 "CVM_DETECT_MANUAL_SET2,"
rbitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "CVM_DETECT_SEL_MAX,This bit selects either CVM_DETECT_MON register or CVM_MANUAL_SET register." "0: The values of bits 25 to 24 and bits 18 to 16 in..,1: The values of bits 25 to 24 and bits 18 to 16 in.."
newline
rbitfld.long 0x0 26.--27. "Reserved_26,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 24.--25. "MODE_MAX_1_0,Coase grain overvoltage threshold setting." "0,1,2,3"
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x0 16.--19. 1. "TRIM_MAX_3_0,Fine grain overvoltage threshold setting"
newline
rbitfld.long 0x0 13.--15. "Reserved_13,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "CVM_DETECT_SEL_MIN,This bit selects either CVM_DETECT_MON register or CVM_MANUAL_SET register." "0: The values of bits 9 to 8 and bits 2 to 0 in..,1: The values of bits 9 to 8 and bits 2 to 0 in.."
newline
rbitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "MODE_MIN_1_0,Coase grain undervoltage threshold setting." "0,1,2,3"
newline
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "TRIM_MIN_3_0,Fine grain undervoltage threshold setting"
rgroup.long 0x114++0x7
line.long 0x0 "CVM_DETECT_SET_BK2,"
hexmask.long.byte 0x0 26.--31. 1. "Reserved_26,Reserved"
newline
bitfld.long 0x0 24.--25. "MODE_MAX_BK_1_0,These bits can monitor the readback value of MODE_MAX[1:0]." "0,1,2,3"
newline
hexmask.long.byte 0x0 20.--23. 1. "Reserved_20,Reserved"
newline
hexmask.long.byte 0x0 16.--19. 1. "TRIM_MAX_BK_3_0,These bits can monitor the readback value of TRIM_MAX[3:0]."
newline
hexmask.long.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
newline
bitfld.long 0x0 8.--9. "MODE_MIN_BK_1_0,These bits can monitor the readback value of MODE_MIN[1:0]." "0,1,2,3"
newline
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "TRIM_MIN_BK_3_0,These bits can monitor the readback value of TRIM_MIN[3:0]."
line.long 0x4 "CVM_TOFF_MON2,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x4 0.--3. 1. "TOFF_MON_3_0,Golden reference value for TOFF"
group.long 0x11C++0x3
line.long 0x0 "CVM_TOFF_MANUAL_SET2,"
hexmask.long.tbyte 0x0 13.--31. 1. "Reserved_13,Reserved"
newline
bitfld.long 0x0 12. "TOFF_SEL,This bit selects either CVM_TOFF_MON register or CVM_TOFF_MANUAL_SET register." "0: Select value that bit 3 to 0 in CVM_TOFF_MON..,1: Select value that bit 3 to 0 in.."
newline
hexmask.long.byte 0x0 4.--11. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "TOFF_3_0,CVM temperature compensation setting"
rgroup.long 0x120++0x3
line.long 0x0 "CVM_TOFF_BK2,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "TOFF_BK_3_0,These bits can monitor the readback value of TOFF[3:0]."
rgroup.long 0x130++0x3
line.long 0x0 "TSC_ERROR_MON2,"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x0 7. "ERR_ACKTOV,THACK timeout error status" "0: no error,1: THACK timeout error"
newline
bitfld.long 0x0 6. "Reserved_6,Reserved" "0,1"
newline
bitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 4. "ERR_THCODE,THCODE error status" "0: no error,1: THCODE error"
newline
bitfld.long 0x0 3. "ERR_THCNTOV,THCNTOV error status" "0: no error,1: THCNTOV error"
newline
bitfld.long 0x0 2. "THFAIL1,This bit is set to 1 when all of the THCODE bits are 1" "0: Normal operation,1: All of the THCODE bits are all 1"
newline
bitfld.long 0x0 1. "THFAIL0,This bit is set to 1 when all of the THCODE bits are 0" "0: Normal operation,1: All of the THCODE bits are all 0"
newline
bitfld.long 0x0 0. "TSC_ERROR,TSC error status" "0: no error,1: TSC error"
group.long 0x138++0x3
line.long 0x0 "MANTST_SET_DT2,"
rbitfld.long 0x0 29.--31. "Reserved_29,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 28. "MANTST,Manual test mode" "0: Normal mode,1: Manual test mode"
newline
hexmask.long.byte 0x0 23.--27. 1. "Reserved_23,Reserved"
newline
bitfld.long 0x0 20.--22. "MAN_THVF0SEL_2_0,ADC InV[A] select for manual test" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x0 19. "Reserved_19,Reserved" "0,1"
newline
bitfld.long 0x0 16.--18. "MAN_THVF1SEL_2_0,ADC InV[B] select for manual test" "0: Vref,?,?,?,?,?,?,?"
newline
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
newline
rbitfld.long 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
newline
rbitfld.long 0x0 8.--9. "Reserved_8,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--7. 1. "Reserved_0,Reserved"
rgroup.long 0x140++0x3
line.long 0x0 "SEQ_ACT_MON2,"
hexmask.long 0x0 4.--31. 1. "Reserved_4,Reserved"
newline
hexmask.long.byte 0x0 0.--3. 1. "SEQ_ACT_3_0,Sequence Act Flag monitor"
rgroup.long 0x180++0xB
line.long 0x0 "THSFMON002,"
hexmask.long.byte 0x0 28.--31. 1. "Reserved_28,Reserved"
newline
hexmask.long.word 0x0 16.--27. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x0 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x0 0.--11. 1. "THCODE_L_SR1_11_0,Parameter to be used in adjusting the characteristics"
line.long 0x4 "THSFMON012,"
hexmask.long.byte 0x4 28.--31. 1. "Reserved_28,Reserved"
newline
hexmask.long.word 0x4 16.--27. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x4 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x4 0.--11. 1. "THCODE_U_SR1_11_0,Parameter to be used in adjusting the characteristics"
line.long 0x8 "THSFMON022,"
hexmask.long.byte 0x8 28.--31. 1. "Reserved_28,Reserved"
newline
hexmask.long.word 0x8 16.--27. 1. "Reserved_16,Reserved"
newline
hexmask.long.byte 0x8 12.--15. 1. "Reserved_12,Reserved"
newline
hexmask.long.word 0x8 0.--11. 1. "THCODE_R_SR1_11_0,Parameter to be used in adjusting the characteristics"
tree.end
tree.end
tree "TU (Timer Unit)"
base ad:0x0
tree "CMT0 (Compare Match Timer Type0)"
base ad:0xE60F0000
group.long 0x500++0x3
line.long 0x0 "CMSTR0,CMSTRn (n = 0 and 1) is a 32-bit register which specifies the operation of compare match timer counters (CMCNTn)"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start" "0: CMCNTn halts,1: CMCNTn starts counting"
group.long 0x510++0xB
line.long 0x0 "CMCSR0,CMCSRn (n = 0 and 1) is a 32-bit register that indicates the occurrence of compare matches. enables interrupts. and sets the counter input clocks."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CMCNTn and CMCORn values have not matched,1: CMCNTn and CMCORn values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CMCNTn has not overflowed,1: CMCNTn has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables an internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debug mode,1: Enables the counter operation even in debug mode"
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0: Setting prohibited,1: Setting prohibited,?,?,?,?,?,?"
line.long 0x4 "CMCNT0,CMCNTn (n = 0 and 1) is a 32-bit register that is used as an up-counter."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CMCOR0,CMCORn (n = 0 and 1) is a 32-bit register that sets the compare match period with CMCNTn."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x600++0x3
line.long 0x0 "CMSTR1,CMSTRn (n = 0 and 1) is a 32-bit register which specifies the operation of compare match timer counters (CMCNTn)"
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start" "0: CMCNTn halts,1: CMCNTn starts counting"
group.long 0x610++0xB
line.long 0x0 "CMCSR1,CMCSRn (n = 0 and 1) is a 32-bit register that indicates the occurrence of compare matches. enables interrupts. and sets the counter input clocks."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CMCNTn and CMCORn values have not matched,1: CMCNTn and CMCORn values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CMCNTn has not overflowed,1: CMCNTn has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables an internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debug mode,1: Enables the counter operation even in debug mode"
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0: Setting prohibited,1: Setting prohibited,?,?,?,?,?,?"
line.long 0x4 "CMCNT1,CMCNTn (n = 0 and 1) is a 32-bit register that is used as an up-counter."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CMCOR1,CMCORn (n = 0 and 1) is a 32-bit register that sets the compare match period with CMCNTn."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x1000++0x3
line.long 0x0 "CMCLKE,CMCLKE is a 32-bit register. which specifies clock supply to each channel. When there are unused channels. set 0 to this register. for stop supplying clock to the channel. It is prohibited to stop clock supply. while counter is working."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 7.--15. 1. "Reserved_7,Reserved"
newline
bitfld.long 0x0 6. "Ch1clke,0: Clock isnsingle_quotationt supplied to ch1." "0: Clock isnsingle_quotationt supplied to ch1,1: Clock is supplied to ch1"
bitfld.long 0x0 5. "Ch0clke,0: Clock isnsingle_quotationt supplied to ch0." "0: Clock isnsingle_quotationt supplied to ch0,1: Clock is supplied to ch0"
newline
hexmask.long.byte 0x0 0.--4. 1. "Reserved_0,Reserved"
tree.end
base ad:0x0
tree "CMT1 (Compare Match Timer Type1)"
tree "CMT1_0"
base ad:0xE6130000
group.long 0x0++0x3
line.long 0x0 "CM1STR0,CM[n]STR[m] (n=1-3)(m=0) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "STR0RS,RCLK-Synchronous Counter Start/Stop Mode Select" "0: Normal operation,1: RCLK-synchronous counter start/stop mode"
newline
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]CNT0 halts,1: CM[n]CNT0 start counting"
group.long 0x10++0xB
line.long 0x0 "CM1CSR0,CM[n]CSR[m](n=1-3)(m=0) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT0 and CM[n]COR0 values have not matched,1: CM[n]CNT0 and CM[n]COR0 values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT0 has not overflowed,1: CM[n]CNT0 has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
bitfld.long 0x0 12. "CH0STTF,Channel 0 Start Flag" "0: Channel 0 counter has not started,1: Channel 0 counter has started"
bitfld.long 0x0 11. "CH0STPF,Channel 0 Stop Flag" "0: Channel 0 counter has not stopped,1: Channel 0 counter has stopped"
newline
bitfld.long 0x0 10. "CH0SSIE,Channel 0 Start/Stop Interrupt Enable" "0: Disables an interrupt due to start or stop of..,1: Enables an interrupt due to start or stop of.."
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
newline
rbitfld.long 0x0 6. "Reserved_6,Reserved" "0,1"
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
newline
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0,1,2,3,4,5,6,7"
line.long 0x4 "CM1CNT0,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM1COR0,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x20++0xB
line.long 0x0 "CM1CSRH0,CM[n]CSRH[m] is a 32-bit register which specify the counter size and input clocks."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "CMSH,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
hexmask.long.byte 0x0 1.--8. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CKSH,Clock Select" "0,1"
line.long 0x4 "CM1CNTH0,CM[n]CNTH[m](n=1-3)(m=0-4) is a 32-bit register which is used as an up-counter for channel0 to 4."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "CMCNTH_15_0,Compare match timer counter H bit15 to 0"
line.long 0x8 "CM1CORH0,CM[n]CORH[m] is a 32-bit register which specify the compare match period with CM[n]CNTH[m] for channel0 to 4."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "CMCORH_15_0,Compare match timer constant register H bit15 to 0"
group.long 0x40++0x3
line.long 0x0 "CM1CSRM0,CM[n]CSRM[m] is a 32-bit register which resets to compare match timer match counter. and sets the counter start/halt. This register is only present in channels [m]."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
rbitfld.long 0x0 15. "WRFLG,Write state flag." "0: CPEXphy,1: RCLK"
newline
hexmask.long.word 0x0 2.--14. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CMPCLR,Counter Clear" "0: No operation,1: Clears counter"
newline
bitfld.long 0x0 0. "CMPSTART,Count Start" "0: CM[n]CNTM[m] Halts,1: CM[n]CNTM[m] Starts counting"
rgroup.long 0x44++0x3
line.long 0x0 "CM1CNTM0,CM[n]CNTM[m] is a 32-bit register which is used as an up-counter. This register is only present in channels [m]."
hexmask.long 0x0 0.--31. 1. "CMCNTM_31_0,Compare match timer match counter bit31 to 0"
group.long 0x100++0x3
line.long 0x0 "CM1STR1,CM[n]STR[m] (n=1-3)(m=1-4) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x110++0xB
line.long 0x0 "CM1CSR1,CM[n]CSR[m](n=1-3)(m=1-4) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0,1,2,3,4,5,6,7"
line.long 0x4 "CM1CNT1,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM1COR1,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x120++0xB
line.long 0x0 "CM1CSRH1,CM[n]CSRH[m] is a 32-bit register which specify the counter size and input clocks."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "CMSH,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
hexmask.long.byte 0x0 1.--8. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CKSH,Clock Select" "0,1"
line.long 0x4 "CM1CNTH1,CM[n]CNTH[m](n=1-3)(m=0-4) is a 32-bit register which is used as an up-counter for channel0 to 4."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "CMCNTH_15_0,Compare match timer counter H bit15 to 0"
line.long 0x8 "CM1CORH1,CM[n]CORH[m] is a 32-bit register which specify the compare match period with CM[n]CNTH[m] for channel0 to 4."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "CMCORH_15_0,Compare match timer constant register H bit15 to 0"
group.long 0x200++0x3
line.long 0x0 "CM1STR2,CM[n]STR[m] (n=1-3)(m=1-4) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x210++0xB
line.long 0x0 "CM1CSR2,CM[n]CSR[m](n=1-3)(m=1-4) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0,1,2,3,4,5,6,7"
line.long 0x4 "CM1CNT2,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM1COR2,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x220++0xB
line.long 0x0 "CM1CSRH2,CM[n]CSRH[m] is a 32-bit register which specify the counter size and input clocks."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "CMSH,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
hexmask.long.byte 0x0 1.--8. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CKSH,Clock Select" "0,1"
line.long 0x4 "CM1CNTH2,CM[n]CNTH[m](n=1-3)(m=0-4) is a 32-bit register which is used as an up-counter for channel0 to 4."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "CMCNTH_15_0,Compare match timer counter H bit15 to 0"
line.long 0x8 "CM1CORH2,CM[n]CORH[m] is a 32-bit register which specify the compare match period with CM[n]CNTH[m] for channel0 to 4."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "CMCORH_15_0,Compare match timer constant register H bit15 to 0"
group.long 0x300++0x3
line.long 0x0 "CM1STR3,CM[n]STR[m] (n=1-3)(m=1-4) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x310++0xB
line.long 0x0 "CM1CSR3,CM[n]CSR[m](n=1-3)(m=1-4) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0,1,2,3,4,5,6,7"
line.long 0x4 "CM1CNT3,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM1COR3,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x320++0xB
line.long 0x0 "CM1CSRH3,CM[n]CSRH[m] is a 32-bit register which specify the counter size and input clocks."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "CMSH,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
hexmask.long.byte 0x0 1.--8. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CKSH,Clock Select" "0,1"
line.long 0x4 "CM1CNTH3,CM[n]CNTH[m](n=1-3)(m=0-4) is a 32-bit register which is used as an up-counter for channel0 to 4."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "CMCNTH_15_0,Compare match timer counter H bit15 to 0"
line.long 0x8 "CM1CORH3,CM[n]CORH[m] is a 32-bit register which specify the compare match period with CM[n]CNTH[m] for channel0 to 4."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "CMCORH_15_0,Compare match timer constant register H bit15 to 0"
rgroup.long 0x330++0x7
line.long 0x0 "CM1CNT3BK0,CM[n]CNT[m]BK0 is a 32-bit register which stores a copy of the CM[n]CNT[m] value immediately after the counter in channel 0 stops in RCLK-synchronous channel 0 counter start/stop mode."
hexmask.long 0x0 0.--31. 1. "CMCNT3BK0_31_0,Compare match timer counter 3 backup 0 bit31 to 0"
line.long 0x4 "CM1CNT3BK1,CM[n]CNT[m]BK1 is a 32-bit register which stores a copy of the CM[n]CNT[m] value immediately after the counter in channel 0 starts in RCLK-synchronous channel 0 counter start/stop mode."
hexmask.long 0x4 0.--31. 1. "CMCNT3BK1_31_0,Compare match timer counter 3 backup 1 bit31 to 0"
group.long 0x340++0x3
line.long 0x0 "CM1CSRM3,CM[n]CSRM[m] is a 32-bit register which resets to compare match timer match counter. and sets the counter start/halt. This register is only present in channels [m]."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
rbitfld.long 0x0 15. "WRFLG,Write state flag." "0: CPEXphy,1: RCLK"
newline
hexmask.long.word 0x0 2.--14. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CMPCLR,Counter Clear" "0: No operation,1: Clears counter"
newline
bitfld.long 0x0 0. "CMPSTART,Count Start" "0: CM[n]CNTM[m] Halts,1: CM[n]CNTM[m] Starts counting"
rgroup.long 0x344++0x3
line.long 0x0 "CM1CNTM3,CM[n]CNTM[m] is a 32-bit register which is used as an up-counter. This register is only present in channels [m]."
hexmask.long 0x0 0.--31. 1. "CMCNTM_31_0,Compare match timer match counter bit31 to 0"
group.long 0x400++0x3
line.long 0x0 "CM1STR4,CM[n]STR[m] (n=1-3)(m=1-4) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x410++0xB
line.long 0x0 "CM1CSR4,CM[n]CSR[m](n=1-3)(m=1-4) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0,1,2,3,4,5,6,7"
line.long 0x4 "CM1CNT4,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM1COR4,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x420++0xB
line.long 0x0 "CM1CSRH4,CM[n]CSRH[m] is a 32-bit register which specify the counter size and input clocks."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "CMSH,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
hexmask.long.byte 0x0 1.--8. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CKSH,Clock Select" "0,1"
line.long 0x4 "CM1CNTH4,CM[n]CNTH[m](n=1-3)(m=0-4) is a 32-bit register which is used as an up-counter for channel0 to 4."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "CMCNTH_15_0,Compare match timer counter H bit15 to 0"
line.long 0x8 "CM1CORH4,CM[n]CORH[m] is a 32-bit register which specify the compare match period with CM[n]CNTH[m] for channel0 to 4."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "CMCORH_15_0,Compare match timer constant register H bit15 to 0"
group.long 0x500++0x3
line.long 0x0 "CM1STR5,CM[n]STR[m] (n=1-3)(m=5-7) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x510++0xB
line.long 0x0 "CM1CSR5,CM[n]CSR[m](n=1-3)(m=5-7) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0: Setting prohibited,1: Setting prohibited,?,?,?,?,?,?"
line.long 0x4 "CM1CNT5,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM1COR5,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x600++0x3
line.long 0x0 "CM1STR6,CM[n]STR[m] (n=1-3)(m=5-7) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x610++0xB
line.long 0x0 "CM1CSR6,CM[n]CSR[m](n=1-3)(m=5-7) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0: Setting prohibited,1: Setting prohibited,?,?,?,?,?,?"
line.long 0x4 "CM1CNT6,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM1COR6,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x700++0x3
line.long 0x0 "CM1STR7,CM[n]STR[m] (n=1-3)(m=5-7) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x710++0xB
line.long 0x0 "CM1CSR7,CM[n]CSR[m](n=1-3)(m=5-7) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0: Setting prohibited,1: Setting prohibited,?,?,?,?,?,?"
line.long 0x4 "CM1CNT7,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM1COR7,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x1000++0x3
line.long 0x0 "CM1CLKE,CM[n]CLKE is a 32bits register. which specify clock supply to each channel. When there are unused channels. set single_quotation0single_quotation as this register. to stop supplying clock to the channel. It is prohibited to stop clock supply..."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x0 7. "Ch7clke,0: Clock isnsingle_quotationt supplied to ch7" "0: Clock isnsingle_quotationt supplied to ch7,1: Clock is supplied to ch7"
bitfld.long 0x0 6. "Ch6clke,0: Clock isnsingle_quotationt supplied to ch6" "0: Clock isnsingle_quotationt supplied to ch6,1: Clock is supplied to ch6"
newline
bitfld.long 0x0 5. "Ch5clke,0: Clock isnsingle_quotationt supplied to ch5" "0: Clock isnsingle_quotationt supplied to ch5,1: Clock is supplied to ch5"
bitfld.long 0x0 4. "Ch4clke,0: Clock isnsingle_quotationt supplied to ch4" "0: Clock isnsingle_quotationt supplied to ch4,1: Clock is supplied to ch4"
newline
bitfld.long 0x0 3. "Ch3clke,0: Clock isnsingle_quotationt supplied to ch3" "0: Clock isnsingle_quotationt supplied to ch3,1: Clock is supplied to ch3"
bitfld.long 0x0 2. "Ch2clke,0: Clock isnsingle_quotationt supplied to ch2" "0: Clock isnsingle_quotationt supplied to ch2,1: Clock is supplied to ch2"
newline
bitfld.long 0x0 1. "Ch1clke,0: Clock isnsingle_quotationt supplied to ch1" "0: Clock isnsingle_quotationt supplied to ch1,1: Clock is supplied to ch1"
bitfld.long 0x0 0. "Ch0clke,0: Clock isnsingle_quotationt supplied to ch0" "0: Clock isnsingle_quotationt supplied to ch0,1: Clock is supplied to ch0"
tree.end
tree "CMT1_1"
base ad:0xE6140000
group.long 0x0++0x3
line.long 0x0 "CM2STR0,CM[n]STR[m] (n=1-3)(m=0) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "STR0RS,RCLK-Synchronous Counter Start/Stop Mode Select" "0: Normal operation,1: RCLK-synchronous counter start/stop mode"
newline
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]CNT0 halts,1: CM[n]CNT0 start counting"
group.long 0x10++0xB
line.long 0x0 "CM2CSR0,CM[n]CSR[m](n=1-3)(m=0) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT0 and CM[n]COR0 values have not matched,1: CM[n]CNT0 and CM[n]COR0 values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT0 has not overflowed,1: CM[n]CNT0 has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
bitfld.long 0x0 12. "CH0STTF,Channel 0 Start Flag" "0: Channel 0 counter has not started,1: Channel 0 counter has started"
bitfld.long 0x0 11. "CH0STPF,Channel 0 Stop Flag" "0: Channel 0 counter has not stopped,1: Channel 0 counter has stopped"
newline
bitfld.long 0x0 10. "CH0SSIE,Channel 0 Start/Stop Interrupt Enable" "0: Disables an interrupt due to start or stop of..,1: Enables an interrupt due to start or stop of.."
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
newline
rbitfld.long 0x0 6. "Reserved_6,Reserved" "0,1"
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
newline
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0,1,2,3,4,5,6,7"
line.long 0x4 "CM2CNT0,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM2COR0,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x20++0xB
line.long 0x0 "CM2CSRH0,CM[n]CSRH[m] is a 32-bit register which specify the counter size and input clocks."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "CMSH,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
hexmask.long.byte 0x0 1.--8. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CKSH,Clock Select" "0,1"
line.long 0x4 "CM2CNTH0,CM[n]CNTH[m](n=1-3)(m=0-4) is a 32-bit register which is used as an up-counter for channel0 to 4."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "CMCNTH_15_0,Compare match timer counter H bit15 to 0"
line.long 0x8 "CM2CORH0,CM[n]CORH[m] is a 32-bit register which specify the compare match period with CM[n]CNTH[m] for channel0 to 4."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "CMCORH_15_0,Compare match timer constant register H bit15 to 0"
group.long 0x40++0x3
line.long 0x0 "CM2CSRM0,CM[n]CSRM[m] is a 32-bit register which resets to compare match timer match counter. and sets the counter start/halt. This register is only present in channels [m]."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
rbitfld.long 0x0 15. "WRFLG,Write state flag." "0: CPEXphy,1: RCLK"
newline
hexmask.long.word 0x0 2.--14. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CMPCLR,Counter Clear" "0: No operation,1: Clears counter"
newline
bitfld.long 0x0 0. "CMPSTART,Count Start" "0: CM[n]CNTM[m] Halts,1: CM[n]CNTM[m] Starts counting"
rgroup.long 0x44++0x3
line.long 0x0 "CM2CNTM0,CM[n]CNTM[m] is a 32-bit register which is used as an up-counter. This register is only present in channels [m]."
hexmask.long 0x0 0.--31. 1. "CMCNTM_31_0,Compare match timer match counter bit31 to 0"
group.long 0x100++0x3
line.long 0x0 "CM2STR1,CM[n]STR[m] (n=1-3)(m=1-4) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x110++0xB
line.long 0x0 "CM2CSR1,CM[n]CSR[m](n=1-3)(m=1-4) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0,1,2,3,4,5,6,7"
line.long 0x4 "CM2CNT1,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM2COR1,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x120++0xB
line.long 0x0 "CM2CSRH1,CM[n]CSRH[m] is a 32-bit register which specify the counter size and input clocks."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "CMSH,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
hexmask.long.byte 0x0 1.--8. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CKSH,Clock Select" "0,1"
line.long 0x4 "CM2CNTH1,CM[n]CNTH[m](n=1-3)(m=0-4) is a 32-bit register which is used as an up-counter for channel0 to 4."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "CMCNTH_15_0,Compare match timer counter H bit15 to 0"
line.long 0x8 "CM2CORH1,CM[n]CORH[m] is a 32-bit register which specify the compare match period with CM[n]CNTH[m] for channel0 to 4."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "CMCORH_15_0,Compare match timer constant register H bit15 to 0"
group.long 0x200++0x3
line.long 0x0 "CM2STR2,CM[n]STR[m] (n=1-3)(m=1-4) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x210++0xB
line.long 0x0 "CM2CSR2,CM[n]CSR[m](n=1-3)(m=1-4) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0,1,2,3,4,5,6,7"
line.long 0x4 "CM2CNT2,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM2COR2,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x220++0xB
line.long 0x0 "CM2CSRH2,CM[n]CSRH[m] is a 32-bit register which specify the counter size and input clocks."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "CMSH,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
hexmask.long.byte 0x0 1.--8. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CKSH,Clock Select" "0,1"
line.long 0x4 "CM2CNTH2,CM[n]CNTH[m](n=1-3)(m=0-4) is a 32-bit register which is used as an up-counter for channel0 to 4."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "CMCNTH_15_0,Compare match timer counter H bit15 to 0"
line.long 0x8 "CM2CORH2,CM[n]CORH[m] is a 32-bit register which specify the compare match period with CM[n]CNTH[m] for channel0 to 4."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "CMCORH_15_0,Compare match timer constant register H bit15 to 0"
group.long 0x300++0x3
line.long 0x0 "CM2STR3,CM[n]STR[m] (n=1-3)(m=1-4) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x310++0xB
line.long 0x0 "CM2CSR3,CM[n]CSR[m](n=1-3)(m=1-4) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0,1,2,3,4,5,6,7"
line.long 0x4 "CM2CNT3,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM2COR3,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x320++0xB
line.long 0x0 "CM2CSRH3,CM[n]CSRH[m] is a 32-bit register which specify the counter size and input clocks."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "CMSH,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
hexmask.long.byte 0x0 1.--8. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CKSH,Clock Select" "0,1"
line.long 0x4 "CM2CNTH3,CM[n]CNTH[m](n=1-3)(m=0-4) is a 32-bit register which is used as an up-counter for channel0 to 4."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "CMCNTH_15_0,Compare match timer counter H bit15 to 0"
line.long 0x8 "CM2CORH3,CM[n]CORH[m] is a 32-bit register which specify the compare match period with CM[n]CNTH[m] for channel0 to 4."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "CMCORH_15_0,Compare match timer constant register H bit15 to 0"
rgroup.long 0x330++0x7
line.long 0x0 "CM2CNT3BK0,CM[n]CNT[m]BK0 is a 32-bit register which stores a copy of the CM[n]CNT[m] value immediately after the counter in channel 0 stops in RCLK-synchronous channel 0 counter start/stop mode."
hexmask.long 0x0 0.--31. 1. "CMCNT3BK0_31_0,Compare match timer counter 3 backup 0 bit31 to 0"
line.long 0x4 "CM2CNT3BK1,CM[n]CNT[m]BK1 is a 32-bit register which stores a copy of the CM[n]CNT[m] value immediately after the counter in channel 0 starts in RCLK-synchronous channel 0 counter start/stop mode."
hexmask.long 0x4 0.--31. 1. "CMCNT3BK1_31_0,Compare match timer counter 3 backup 1 bit31 to 0"
group.long 0x340++0x3
line.long 0x0 "CM2CSRM3,CM[n]CSRM[m] is a 32-bit register which resets to compare match timer match counter. and sets the counter start/halt. This register is only present in channels [m]."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
rbitfld.long 0x0 15. "WRFLG,Write state flag." "0: CPEXphy,1: RCLK"
newline
hexmask.long.word 0x0 2.--14. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CMPCLR,Counter Clear" "0: No operation,1: Clears counter"
newline
bitfld.long 0x0 0. "CMPSTART,Count Start" "0: CM[n]CNTM[m] Halts,1: CM[n]CNTM[m] Starts counting"
rgroup.long 0x344++0x3
line.long 0x0 "CM2CNTM3,CM[n]CNTM[m] is a 32-bit register which is used as an up-counter. This register is only present in channels [m]."
hexmask.long 0x0 0.--31. 1. "CMCNTM_31_0,Compare match timer match counter bit31 to 0"
group.long 0x400++0x3
line.long 0x0 "CM2STR4,CM[n]STR[m] (n=1-3)(m=1-4) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x410++0xB
line.long 0x0 "CM2CSR4,CM[n]CSR[m](n=1-3)(m=1-4) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0,1,2,3,4,5,6,7"
line.long 0x4 "CM2CNT4,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM2COR4,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x420++0xB
line.long 0x0 "CM2CSRH4,CM[n]CSRH[m] is a 32-bit register which specify the counter size and input clocks."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "CMSH,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
hexmask.long.byte 0x0 1.--8. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CKSH,Clock Select" "0,1"
line.long 0x4 "CM2CNTH4,CM[n]CNTH[m](n=1-3)(m=0-4) is a 32-bit register which is used as an up-counter for channel0 to 4."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "CMCNTH_15_0,Compare match timer counter H bit15 to 0"
line.long 0x8 "CM2CORH4,CM[n]CORH[m] is a 32-bit register which specify the compare match period with CM[n]CNTH[m] for channel0 to 4."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "CMCORH_15_0,Compare match timer constant register H bit15 to 0"
group.long 0x500++0x3
line.long 0x0 "CM2STR5,CM[n]STR[m] (n=1-3)(m=5-7) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x510++0xB
line.long 0x0 "CM2CSR5,CM[n]CSR[m](n=1-3)(m=5-7) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0: Setting prohibited,1: Setting prohibited,?,?,?,?,?,?"
line.long 0x4 "CM2CNT5,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM2COR5,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x600++0x3
line.long 0x0 "CM2STR6,CM[n]STR[m] (n=1-3)(m=5-7) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x610++0xB
line.long 0x0 "CM2CSR6,CM[n]CSR[m](n=1-3)(m=5-7) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0: Setting prohibited,1: Setting prohibited,?,?,?,?,?,?"
line.long 0x4 "CM2CNT6,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM2COR6,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x700++0x3
line.long 0x0 "CM2STR7,CM[n]STR[m] (n=1-3)(m=5-7) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x710++0xB
line.long 0x0 "CM2CSR7,CM[n]CSR[m](n=1-3)(m=5-7) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0: Setting prohibited,1: Setting prohibited,?,?,?,?,?,?"
line.long 0x4 "CM2CNT7,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM2COR7,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x1000++0x3
line.long 0x0 "CM2CLKE,CM[n]CLKE is a 32bits register. which specify clock supply to each channel. When there are unused channels. set single_quotation0single_quotation as this register. to stop supplying clock to the channel. It is prohibited to stop clock supply..."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x0 7. "Ch7clke,0: Clock isnsingle_quotationt supplied to ch7" "0: Clock isnsingle_quotationt supplied to ch7,1: Clock is supplied to ch7"
bitfld.long 0x0 6. "Ch6clke,0: Clock isnsingle_quotationt supplied to ch6" "0: Clock isnsingle_quotationt supplied to ch6,1: Clock is supplied to ch6"
newline
bitfld.long 0x0 5. "Ch5clke,0: Clock isnsingle_quotationt supplied to ch5" "0: Clock isnsingle_quotationt supplied to ch5,1: Clock is supplied to ch5"
bitfld.long 0x0 4. "Ch4clke,0: Clock isnsingle_quotationt supplied to ch4" "0: Clock isnsingle_quotationt supplied to ch4,1: Clock is supplied to ch4"
newline
bitfld.long 0x0 3. "Ch3clke,0: Clock isnsingle_quotationt supplied to ch3" "0: Clock isnsingle_quotationt supplied to ch3,1: Clock is supplied to ch3"
bitfld.long 0x0 2. "Ch2clke,0: Clock isnsingle_quotationt supplied to ch2" "0: Clock isnsingle_quotationt supplied to ch2,1: Clock is supplied to ch2"
newline
bitfld.long 0x0 1. "Ch1clke,0: Clock isnsingle_quotationt supplied to ch1" "0: Clock isnsingle_quotationt supplied to ch1,1: Clock is supplied to ch1"
bitfld.long 0x0 0. "Ch0clke,0: Clock isnsingle_quotationt supplied to ch0" "0: Clock isnsingle_quotationt supplied to ch0,1: Clock is supplied to ch0"
tree.end
tree "CMT1_2"
base ad:0xE6148000
group.long 0x0++0x3
line.long 0x0 "CM3STR0,CM[n]STR[m] (n=1-3)(m=0) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long.tbyte 0x0 9.--31. 1. "Reserved_9,Reserved"
bitfld.long 0x0 8. "STR0RS,RCLK-Synchronous Counter Start/Stop Mode Select" "0: Normal operation,1: RCLK-synchronous counter start/stop mode"
newline
hexmask.long.byte 0x0 1.--7. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]CNT0 halts,1: CM[n]CNT0 start counting"
group.long 0x10++0xB
line.long 0x0 "CM3CSR0,CM[n]CSR[m](n=1-3)(m=0) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT0 and CM[n]COR0 values have not matched,1: CM[n]CNT0 and CM[n]COR0 values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT0 has not overflowed,1: CM[n]CNT0 has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
bitfld.long 0x0 12. "CH0STTF,Channel 0 Start Flag" "0: Channel 0 counter has not started,1: Channel 0 counter has started"
bitfld.long 0x0 11. "CH0STPF,Channel 0 Stop Flag" "0: Channel 0 counter has not stopped,1: Channel 0 counter has stopped"
newline
bitfld.long 0x0 10. "CH0SSIE,Channel 0 Start/Stop Interrupt Enable" "0: Disables an interrupt due to start or stop of..,1: Enables an interrupt due to start or stop of.."
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 7. "Reserved_7,Reserved" "0,1"
newline
rbitfld.long 0x0 6. "Reserved_6,Reserved" "0,1"
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
newline
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0,1,2,3,4,5,6,7"
line.long 0x4 "CM3CNT0,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM3COR0,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x20++0xB
line.long 0x0 "CM3CSRH0,CM[n]CSRH[m] is a 32-bit register which specify the counter size and input clocks."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "CMSH,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
hexmask.long.byte 0x0 1.--8. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CKSH,Clock Select" "0,1"
line.long 0x4 "CM3CNTH0,CM[n]CNTH[m](n=1-3)(m=0-4) is a 32-bit register which is used as an up-counter for channel0 to 4."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "CMCNTH_15_0,Compare match timer counter H bit15 to 0"
line.long 0x8 "CM3CORH0,CM[n]CORH[m] is a 32-bit register which specify the compare match period with CM[n]CNTH[m] for channel0 to 4."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "CMCORH_15_0,Compare match timer constant register H bit15 to 0"
group.long 0x40++0x3
line.long 0x0 "CM3CSRM0,CM[n]CSRM[m] is a 32-bit register which resets to compare match timer match counter. and sets the counter start/halt. This register is only present in channels [m]."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
rbitfld.long 0x0 15. "WRFLG,Write state flag." "0: CPEXphy,1: RCLK"
newline
hexmask.long.word 0x0 2.--14. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CMPCLR,Counter Clear" "0: No operation,1: Clears counter"
newline
bitfld.long 0x0 0. "CMPSTART,Count Start" "0: CM[n]CNTM[m] Halts,1: CM[n]CNTM[m] Starts counting"
rgroup.long 0x44++0x3
line.long 0x0 "CM3CNTM0,CM[n]CNTM[m] is a 32-bit register which is used as an up-counter. This register is only present in channels [m]."
hexmask.long 0x0 0.--31. 1. "CMCNTM_31_0,Compare match timer match counter bit31 to 0"
group.long 0x100++0x3
line.long 0x0 "CM3STR1,CM[n]STR[m] (n=1-3)(m=1-4) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x110++0xB
line.long 0x0 "CM3CSR1,CM[n]CSR[m](n=1-3)(m=1-4) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0,1,2,3,4,5,6,7"
line.long 0x4 "CM3CNT1,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM3COR1,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x120++0xB
line.long 0x0 "CM3CSRH1,CM[n]CSRH[m] is a 32-bit register which specify the counter size and input clocks."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "CMSH,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
hexmask.long.byte 0x0 1.--8. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CKSH,Clock Select" "0,1"
line.long 0x4 "CM3CNTH1,CM[n]CNTH[m](n=1-3)(m=0-4) is a 32-bit register which is used as an up-counter for channel0 to 4."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "CMCNTH_15_0,Compare match timer counter H bit15 to 0"
line.long 0x8 "CM3CORH1,CM[n]CORH[m] is a 32-bit register which specify the compare match period with CM[n]CNTH[m] for channel0 to 4."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "CMCORH_15_0,Compare match timer constant register H bit15 to 0"
group.long 0x200++0x3
line.long 0x0 "CM3STR2,CM[n]STR[m] (n=1-3)(m=1-4) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x210++0xB
line.long 0x0 "CM3CSR2,CM[n]CSR[m](n=1-3)(m=1-4) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0,1,2,3,4,5,6,7"
line.long 0x4 "CM3CNT2,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM3COR2,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x220++0xB
line.long 0x0 "CM3CSRH2,CM[n]CSRH[m] is a 32-bit register which specify the counter size and input clocks."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "CMSH,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
hexmask.long.byte 0x0 1.--8. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CKSH,Clock Select" "0,1"
line.long 0x4 "CM3CNTH2,CM[n]CNTH[m](n=1-3)(m=0-4) is a 32-bit register which is used as an up-counter for channel0 to 4."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "CMCNTH_15_0,Compare match timer counter H bit15 to 0"
line.long 0x8 "CM3CORH2,CM[n]CORH[m] is a 32-bit register which specify the compare match period with CM[n]CNTH[m] for channel0 to 4."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "CMCORH_15_0,Compare match timer constant register H bit15 to 0"
group.long 0x300++0x3
line.long 0x0 "CM3STR3,CM[n]STR[m] (n=1-3)(m=1-4) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x310++0xB
line.long 0x0 "CM3CSR3,CM[n]CSR[m](n=1-3)(m=1-4) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0,1,2,3,4,5,6,7"
line.long 0x4 "CM3CNT3,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM3COR3,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x320++0xB
line.long 0x0 "CM3CSRH3,CM[n]CSRH[m] is a 32-bit register which specify the counter size and input clocks."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "CMSH,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
hexmask.long.byte 0x0 1.--8. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CKSH,Clock Select" "0,1"
line.long 0x4 "CM3CNTH3,CM[n]CNTH[m](n=1-3)(m=0-4) is a 32-bit register which is used as an up-counter for channel0 to 4."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "CMCNTH_15_0,Compare match timer counter H bit15 to 0"
line.long 0x8 "CM3CORH3,CM[n]CORH[m] is a 32-bit register which specify the compare match period with CM[n]CNTH[m] for channel0 to 4."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "CMCORH_15_0,Compare match timer constant register H bit15 to 0"
rgroup.long 0x330++0x7
line.long 0x0 "CM3CNT3BK0,CM[n]CNT[m]BK0 is a 32-bit register which stores a copy of the CM[n]CNT[m] value immediately after the counter in channel 0 stops in RCLK-synchronous channel 0 counter start/stop mode."
hexmask.long 0x0 0.--31. 1. "CMCNT3BK0_31_0,Compare match timer counter 3 backup 0 bit31 to 0"
line.long 0x4 "CM3CNT3BK1,CM[n]CNT[m]BK1 is a 32-bit register which stores a copy of the CM[n]CNT[m] value immediately after the counter in channel 0 starts in RCLK-synchronous channel 0 counter start/stop mode."
hexmask.long 0x4 0.--31. 1. "CMCNT3BK1_31_0,Compare match timer counter 3 backup 1 bit31 to 0"
group.long 0x340++0x3
line.long 0x0 "CM3CSRM3,CM[n]CSRM[m] is a 32-bit register which resets to compare match timer match counter. and sets the counter start/halt. This register is only present in channels [m]."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
rbitfld.long 0x0 15. "WRFLG,Write state flag." "0: CPEXphy,1: RCLK"
newline
hexmask.long.word 0x0 2.--14. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CMPCLR,Counter Clear" "0: No operation,1: Clears counter"
newline
bitfld.long 0x0 0. "CMPSTART,Count Start" "0: CM[n]CNTM[m] Halts,1: CM[n]CNTM[m] Starts counting"
rgroup.long 0x344++0x3
line.long 0x0 "CM3CNTM3,CM[n]CNTM[m] is a 32-bit register which is used as an up-counter. This register is only present in channels [m]."
hexmask.long 0x0 0.--31. 1. "CMCNTM_31_0,Compare match timer match counter bit31 to 0"
group.long 0x400++0x3
line.long 0x0 "CM3STR4,CM[n]STR[m] (n=1-3)(m=1-4) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x410++0xB
line.long 0x0 "CM3CSR4,CM[n]CSR[m](n=1-3)(m=1-4) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0,1,2,3,4,5,6,7"
line.long 0x4 "CM3CNT4,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM3COR4,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x420++0xB
line.long 0x0 "CM3CSRH4,CM[n]CSRH[m] is a 32-bit register which specify the counter size and input clocks."
hexmask.long.tbyte 0x0 10.--31. 1. "Reserved_10,Reserved"
bitfld.long 0x0 9. "CMSH,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
hexmask.long.byte 0x0 1.--8. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "CKSH,Clock Select" "0,1"
line.long 0x4 "CM3CNTH4,CM[n]CNTH[m](n=1-3)(m=0-4) is a 32-bit register which is used as an up-counter for channel0 to 4."
hexmask.long.word 0x4 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x4 0.--15. 1. "CMCNTH_15_0,Compare match timer counter H bit15 to 0"
line.long 0x8 "CM3CORH4,CM[n]CORH[m] is a 32-bit register which specify the compare match period with CM[n]CNTH[m] for channel0 to 4."
hexmask.long.word 0x8 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x8 0.--15. 1. "CMCORH_15_0,Compare match timer constant register H bit15 to 0"
group.long 0x500++0x3
line.long 0x0 "CM3STR5,CM[n]STR[m] (n=1-3)(m=5-7) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x510++0xB
line.long 0x0 "CM3CSR5,CM[n]CSR[m](n=1-3)(m=5-7) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0: Setting prohibited,1: Setting prohibited,?,?,?,?,?,?"
line.long 0x4 "CM3CNT5,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM3COR5,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x600++0x3
line.long 0x0 "CM3STR6,CM[n]STR[m] (n=1-3)(m=5-7) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x610++0xB
line.long 0x0 "CM3CSR6,CM[n]CSR[m](n=1-3)(m=5-7) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0: Setting prohibited,1: Setting prohibited,?,?,?,?,?,?"
line.long 0x4 "CM3CNT6,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM3COR6,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x700++0x3
line.long 0x0 "CM3STR7,CM[n]STR[m] (n=1-3)(m=5-7) is a 32-bit register which specify the operation of compare match timer counter (CM[n]CNT[m]). Refer to section 155.2.3.5. Register Access. for register value update timing."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "STR0,Count Start 0" "0: CM[n]STR[m] halts,1: CM[n]STR[m] starts counting"
group.long 0x710++0xB
line.long 0x0 "CM3CSR7,CM[n]CSR[m](n=1-3)(m=5-7) is a 32-bit register that indicates the occurrence of compare match. enable interrupt and set the counter input clock."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
bitfld.long 0x0 15. "CMF,Compare Match Flag" "0: CM[n]CNT[m] and CM[n]COR[m] values have not..,1: CM[n]CNT[m] and CM[n]COR[m] values have matched"
newline
bitfld.long 0x0 14. "OVF,Overflow Flag" "0: CM[n]CNT[m] has not overflowed,1: CM[n]CNT[m] has overflowed"
rbitfld.long 0x0 13. "WRFLG,Write State Flag" "0,1"
newline
rbitfld.long 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.long 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables internal interrupt request,1: Setting prohibited,?,?"
bitfld.long 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops the counter operation in debugging mode,1: Continues the counter operation even in.."
newline
bitfld.long 0x0 0.--2. "CKS_2_0,Clock Select" "0: Setting prohibited,1: Setting prohibited,?,?,?,?,?,?"
line.long 0x4 "CM3CNT7,CM[n]CNT[m](n=1-3)(m=0-7) is a 32-bit register which is used as an up-counter of each channel."
hexmask.long 0x4 0.--31. 1. "CMCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x8 "CM3COR7,CM[n]COR[m] is a 32-bit register which specify the compare match period of CM[n]CNT[m] for each channel."
hexmask.long 0x8 0.--31. 1. "CMCOR_31_0,Compare match timer constant register bit31 to 0"
group.long 0x1000++0x3
line.long 0x0 "CM3CLKE,CM[n]CLKE is a 32bits register. which specify clock supply to each channel. When there are unused channels. set single_quotation0single_quotation as this register. to stop supplying clock to the channel. It is prohibited to stop clock supply..."
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
newline
bitfld.long 0x0 7. "Ch7clke,0: Clock isnsingle_quotationt supplied to ch7" "0: Clock isnsingle_quotationt supplied to ch7,1: Clock is supplied to ch7"
bitfld.long 0x0 6. "Ch6clke,0: Clock isnsingle_quotationt supplied to ch6" "0: Clock isnsingle_quotationt supplied to ch6,1: Clock is supplied to ch6"
newline
bitfld.long 0x0 5. "Ch5clke,0: Clock isnsingle_quotationt supplied to ch5" "0: Clock isnsingle_quotationt supplied to ch5,1: Clock is supplied to ch5"
bitfld.long 0x0 4. "Ch4clke,0: Clock isnsingle_quotationt supplied to ch4" "0: Clock isnsingle_quotationt supplied to ch4,1: Clock is supplied to ch4"
newline
bitfld.long 0x0 3. "Ch3clke,0: Clock isnsingle_quotationt supplied to ch3" "0: Clock isnsingle_quotationt supplied to ch3,1: Clock is supplied to ch3"
bitfld.long 0x0 2. "Ch2clke,0: Clock isnsingle_quotationt supplied to ch2" "0: Clock isnsingle_quotationt supplied to ch2,1: Clock is supplied to ch2"
newline
bitfld.long 0x0 1. "Ch1clke,0: Clock isnsingle_quotationt supplied to ch1" "0: Clock isnsingle_quotationt supplied to ch1,1: Clock is supplied to ch1"
bitfld.long 0x0 0. "Ch0clke,0: Clock isnsingle_quotationt supplied to ch0" "0: Clock isnsingle_quotationt supplied to ch0,1: Clock is supplied to ch0"
tree.end
tree.end
tree "SCMT (System Timer)"
base ad:0xE6040000
group.word 0x0++0x1
line.word 0x0 "CMSSTR,CMSSTR is a 16-bit register which specify whether the compare match timer counter (CMSCNT) is operated or halted."
hexmask.word 0x0 6.--15. 1. "Reserved_6,Reserved"
bitfld.word 0x0 5. "STR5,Count Start" "0: CMSCNT Halts,1: CMSCNT starts counting"
newline
hexmask.word.byte 0x0 0.--4. 1. "Reserved_0,Reserved"
group.word 0x40++0x1
line.word 0x0 "CMSCSR,CMSCSR is a 16-bit register that indicates the occurrence of compare matches. enables interrupts. and sets the counter input clocks."
bitfld.word 0x0 15. "CMF,Compare Match Flag" "0: CMSCNT and CMSCOR values have not matched,1: CMSCNT and CMSCOR values have matched"
bitfld.word 0x0 14. "OVF,Overflow Flag" "0: CMSCNT has not overflowed,1: CMSCNT has overflowed"
newline
rbitfld.word 0x0 13. "WRFLG,Write State Flag" "0,1"
rbitfld.word 0x0 10.--12. "Reserved_10,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
bitfld.word 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
newline
rbitfld.word 0x0 7. "Reserved_7,Reserved" "0,1"
rbitfld.word 0x0 6. "Reserved_6,Reserved" "0,1"
newline
bitfld.word 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables an internal interrupt request,1: Setting prohibited,?,?"
bitfld.word 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops counter operation when in debug mode,1: Enables counter operation even when in debug mode"
newline
bitfld.word 0x0 0.--2. "CKS_2_0,Clock Select" "0: Setting prohibited,1: Setting prohibited,?,?,?,?,?,?"
group.long 0x44++0x7
line.long 0x0 "CMSCNT,CMSCNT is a 32-bit register which is used as an up-counter."
hexmask.long 0x0 0.--31. 1. "CMSCNT_31_0,Compare match timer counter bit 31 to 0"
line.long 0x4 "CMSCOR,CMSCOR is a 32-bit register which specify the compare match period with the compare match timer counter (CMSCNT)."
hexmask.long 0x4 0.--31. 1. "CMSCOR_31_0,Compare match timer constant register bit31 to 0"
tree.end
tree "SUCMT (System Up-Time Clock)"
base ad:0xE61D0000
group.word 0x0++0x1
line.word 0x0 "CMUSTR,CMUSTR is a 16-bit register that selects whether the compare match timer counter (CMUCNT) is operated or halted."
hexmask.word 0x0 6.--15. 1. "Reserved_6,Reserved"
bitfld.word 0x0 5. "STR5,Count Start" "0: CMUCNT halts,1: CMUCNT starts counting"
newline
hexmask.word.byte 0x0 0.--4. 1. "Reserved_0,Reserved"
group.word 0x40++0x1
line.word 0x0 "CMUCSR,CMUCSR is a 16-bit register which indicates the occurrence of compare matches. enables interrupts. and sets the counter input clocks."
bitfld.word 0x0 15. "CMF,Compare Match Flag" "0: CMUCNT and CMUCOR values have not matched,1: CMUCNT and CMUCOR values have matched"
bitfld.word 0x0 14. "OVF,Overflow Flag" "0: CMUCNT has not overflowed,1: CMUCNT has overflowed"
newline
rbitfld.word 0x0 13. "WRFLG,Write State Flag" "0,1"
rbitfld.word 0x0 12. "WERR,Write Access Error Flag" "0: Public domain has not Write access,1: Public domain has Write access"
newline
rbitfld.word 0x0 10.--11. "Reserved_10,Reserved" "0,1,2,3"
bitfld.word 0x0 9. "CMS,Compare Match Timer Counter Size" "0: Operates as a 32-bit counter,1: Operates as a 16-bit counter"
newline
bitfld.word 0x0 8. "CMM,Compare Match Mode" "0: One-shot operation,1: Free-running operation"
rbitfld.word 0x0 7. "Reserved_7,Reserved" "0,1"
newline
bitfld.word 0x0 6. "WER,Write Access Error Request" "0: Disables an internal interrupt request,1: Enables an internal interrupt request"
bitfld.word 0x0 4.--5. "CMR_1_0,Compare Match Request" "0: Disables an internal interrupt request,1: Setting prohibited,?,?"
newline
bitfld.word 0x0 3. "DBGIVD,Debug Mode Operation Select" "0: Stops counter operation when in debug mode,1: Enables counter operation even when in debug mode"
bitfld.word 0x0 0.--2. "CKS_2_0,Clock Select" "0: Setting prohibited,1: Setting prohibited,?,?,?,?,?,?"
group.long 0x44++0x7
line.long 0x0 "CMUCNT,CMUCNT is a 32-bit register which is used as an up-counter."
hexmask.long 0x0 0.--31. 1. "CMUCNT_31_0,Compare match timer counter bit31 to 0"
line.long 0x4 "CMUCOR,CMUCOR is a 32-bit register which specify the compare match period with the compare match timer counter (CMUCNT)."
hexmask.long 0x4 0.--31. 1. "CMUCOR_31_0,Compare match timer counter bit31 to 0"
tree.end
base ad:0x0
tree "TMU (Timer Unit)"
tree "TMU_0"
base ad:0xE61E0000
group.byte 0x4++0x0
line.byte 0x0 "TSTR0,TSTR are 8-bit readable/writable registers that select whether to run or halt the TCNT."
hexmask.byte 0x0 3.--7. 1. "Reserved_3,Reserved"
bitfld.byte 0x0 2. "STR2,Counter Start 2" "0: TCNT2 count halted,1: TCNT2 counts"
bitfld.byte 0x0 1. "STR1,Counter Start 1" "0: TCNT1 count halted,1: TCNT1 counts"
newline
bitfld.byte 0x0 0. "STR0,Counter Start 0" "0: TCNT0 count halted,1: TCNT0 counts"
group.long 0x8++0x7
line.long 0x0 "TCOR00,TCOR are 32-bit readable/writable registers. After underflow has been generated according to the result of the TCNT countdown. the value of TCOR is set to TCNT and TCNT continues countdown from the value."
hexmask.long 0x0 0.--31. 1. "TCOR,Timer constant register"
line.long 0x4 "TCNT00,TCNT are 32-bit readable/writable registers that count down upon the input clock selected using the bits TPSC2 to TPSC0 in TCR."
hexmask.long 0x4 0.--31. 1. "TCNT,Timer counter"
group.word 0x10++0x1
line.word 0x0 "TCR00,TCR are 16-bit readable/writable registers that select a count clock and edge when an external clock is selected. and control an interrupt generation when the flag that indicates the generation of a TCNT is set to 1."
hexmask.word.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
rbitfld.word 0x0 9. "Reserved_9,Reserved" "0,1"
bitfld.word 0x0 8. "UNF,Underflow Flag" "0: TCNT has not underflowed,1: TCNT has underflowed"
newline
rbitfld.word 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
bitfld.word 0x0 5. "UNIE,Underflow Interrupt Control" "0: Interrupt due to underflow,1: Interrupt due to underflow"
bitfld.word 0x0 3.--4. "CKEG,Clock Edge" "0: Count/capture register set on rising edge,1: Count/capture register set on falling edge,?,?"
newline
bitfld.word 0x0 0.--2. "TPSC,Timer Pre-scaler 2 to 0" "0: Count on,1: Count on,?,?,?,?,?,?"
group.long 0x14++0x7
line.long 0x0 "TCOR01,TCOR are 32-bit readable/writable registers. After underflow has been generated according to the result of the TCNT countdown. the value of TCOR is set to TCNT and TCNT continues countdown from the value."
hexmask.long 0x0 0.--31. 1. "TCOR,Timer constant register"
line.long 0x4 "TCNT01,TCNT are 32-bit readable/writable registers that count down upon the input clock selected using the bits TPSC2 to TPSC0 in TCR."
hexmask.long 0x4 0.--31. 1. "TCNT,Timer counter"
group.word 0x1C++0x1
line.word 0x0 "TCR01,TCR are 16-bit readable/writable registers that select a count clock and edge when an external clock is selected. and control an interrupt generation when the flag that indicates the generation of a TCNT is set to 1."
hexmask.word.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
rbitfld.word 0x0 9. "Reserved_9,Reserved" "0,1"
bitfld.word 0x0 8. "UNF,Underflow Flag" "0: TCNT has not underflowed,1: TCNT has underflowed"
newline
rbitfld.word 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
bitfld.word 0x0 5. "UNIE,Underflow Interrupt Control" "0: Interrupt due to underflow,1: Interrupt due to underflow"
bitfld.word 0x0 3.--4. "CKEG,Clock Edge" "0: Count/capture register set on rising edge,1: Count/capture register set on falling edge,?,?"
newline
bitfld.word 0x0 0.--2. "TPSC,Timer Pre-scaler 2 to 0" "0: Count on,1: Count on,?,?,?,?,?,?"
group.long 0x20++0x7
line.long 0x0 "TCOR02,TCOR are 32-bit readable/writable registers. After underflow has been generated according to the result of the TCNT countdown. the value of TCOR is set to TCNT and TCNT continues countdown from the value."
hexmask.long 0x0 0.--31. 1. "TCOR,Timer constant register"
line.long 0x4 "TCNT02,TCNT are 32-bit readable/writable registers that count down upon the input clock selected using the bits TPSC2 to TPSC0 in TCR."
hexmask.long 0x4 0.--31. 1. "TCNT,Timer counter"
group.word 0x28++0x1
line.word 0x0 "TCR02,TCR are 16-bit readable/writable registers that select a count clock and edge when an external clock is selected. and control an interrupt generation when the flag that indicates the generation of a TCNT is set to 1."
hexmask.word.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
rbitfld.word 0x0 9. "Reserved_9,Reserved" "0,1"
bitfld.word 0x0 8. "UNF,Underflow Flag" "0: TCNT has not underflowed,1: TCNT has underflowed"
newline
rbitfld.word 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
bitfld.word 0x0 5. "UNIE,Underflow Interrupt Control" "0: Interrupt due to underflow,1: Interrupt due to underflow"
bitfld.word 0x0 3.--4. "CKEG,Clock Edge" "0: Count/capture register set on rising edge,1: Count/capture register set on falling edge,?,?"
newline
bitfld.word 0x0 0.--2. "TPSC,Timer Pre-scaler 2 to 0" "0: Count on,1: Count on,?,?,?,?,?,?"
tree.end
tree "TMU_1"
base ad:0xE6FC0000
group.byte 0x4++0x0
line.byte 0x0 "TSTR1,TSTR are 8-bit readable/writable registers that select whether to run or halt the TCNT."
hexmask.byte 0x0 3.--7. 1. "Reserved_3,Reserved"
bitfld.byte 0x0 2. "STR2,Counter Start 2" "0: TCNT2 count halted,1: TCNT2 counts"
newline
bitfld.byte 0x0 1. "STR1,Counter Start 1" "0: TCNT1 count halted,1: TCNT1 counts"
bitfld.byte 0x0 0. "STR0,Counter Start 0" "0: TCNT0 count halted,1: TCNT0 counts"
group.long 0x8++0x7
line.long 0x0 "TCOR10,TCOR are 32-bit readable/writable registers. After underflow has been generated according to the result of the TCNT countdown. the value of TCOR is set to TCNT and TCNT continues countdown from the value."
hexmask.long 0x0 0.--31. 1. "TCOR,Timer constant register"
line.long 0x4 "TCNT10,TCNT are 32-bit readable/writable registers that count down upon the input clock selected using the bits TPSC2 to TPSC0 in TCR."
hexmask.long 0x4 0.--31. 1. "TCNT,Timer counter"
group.word 0x10++0x1
line.word 0x0 "TCR10,TCR are 16-bit readable/writable registers that select a count clock and edge when an external clock is selected. and control an interrupt generation when the flag that indicates the generation of a TCNT is set to 1."
hexmask.word.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
rbitfld.word 0x0 9. "Reserved_9,Reserved" "0,1"
newline
bitfld.word 0x0 8. "UNF,Underflow Flag" "0: TCNT has not underflowed,1: TCNT has underflowed"
rbitfld.word 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.word 0x0 5. "UNIE,Underflow Interrupt Control" "0: Interrupt due to underflow,1: Interrupt due to underflow"
bitfld.word 0x0 3.--4. "CKEG,Clock Edge" "0: Count/capture register set on rising edge,1: Count/capture register set on falling edge,?,?"
newline
bitfld.word 0x0 0.--2. "TPSC,Timer Pre-scaler 2 to 0" "0: Count on,1: Count on,?,?,?,?,?,?"
group.long 0x14++0x7
line.long 0x0 "TCOR11,TCOR are 32-bit readable/writable registers. After underflow has been generated according to the result of the TCNT countdown. the value of TCOR is set to TCNT and TCNT continues countdown from the value."
hexmask.long 0x0 0.--31. 1. "TCOR,Timer constant register"
line.long 0x4 "TCNT11,TCNT are 32-bit readable/writable registers that count down upon the input clock selected using the bits TPSC2 to TPSC0 in TCR."
hexmask.long 0x4 0.--31. 1. "TCNT,Timer counter"
group.word 0x1C++0x1
line.word 0x0 "TCR11,TCR are 16-bit readable/writable registers that select a count clock and edge when an external clock is selected. and control an interrupt generation when the flag that indicates the generation of a TCNT is set to 1."
hexmask.word.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
rbitfld.word 0x0 9. "Reserved_9,Reserved" "0,1"
newline
bitfld.word 0x0 8. "UNF,Underflow Flag" "0: TCNT has not underflowed,1: TCNT has underflowed"
rbitfld.word 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.word 0x0 5. "UNIE,Underflow Interrupt Control" "0: Interrupt due to underflow,1: Interrupt due to underflow"
bitfld.word 0x0 3.--4. "CKEG,Clock Edge" "0: Count/capture register set on rising edge,1: Count/capture register set on falling edge,?,?"
newline
bitfld.word 0x0 0.--2. "TPSC,Timer Pre-scaler 2 to 0" "0: Count on,1: Count on,?,?,?,?,?,?"
group.long 0x20++0x7
line.long 0x0 "TCOR12,TCOR are 32-bit readable/writable registers. After underflow has been generated according to the result of the TCNT countdown. the value of TCOR is set to TCNT and TCNT continues countdown from the value."
hexmask.long 0x0 0.--31. 1. "TCOR,Timer constant register"
line.long 0x4 "TCNT12,TCNT are 32-bit readable/writable registers that count down upon the input clock selected using the bits TPSC2 to TPSC0 in TCR."
hexmask.long 0x4 0.--31. 1. "TCNT,Timer counter"
group.word 0x28++0x1
line.word 0x0 "TCR12,TCR are 16-bit readable/writable registers that select a count clock and edge when an external clock is selected. and control an interrupt generation when the flag that indicates the generation of a TCNT is set to 1."
hexmask.word.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
bitfld.word 0x0 9. "ICPF,Input Capture Interrupt Flag" "0: No input capture has occurred,1: Input capture has occurred"
newline
bitfld.word 0x0 8. "UNF,Underflow Flag" "0: TCNT has not underflowed,1: TCNT has underflowed"
bitfld.word 0x0 6.--7. "ICPE,Input Capture Control" "0: Input capture function is not used,1: Reserved,?,?"
newline
bitfld.word 0x0 5. "UNIE,Underflow Interrupt Control" "0: Interrupt due to underflow,1: Interrupt due to underflow"
bitfld.word 0x0 3.--4. "CKEG,Clock Edge" "0: Count/capture register set on rising edge,1: Count/capture register set on falling edge,?,?"
newline
bitfld.word 0x0 0.--2. "TPSC,Timer Pre-scaler 2 to 0" "0: Count on,1: Count on,?,?,?,?,?,?"
rgroup.long 0x2C++0x3
line.long 0x0 "TCPR12,TCPR12. TCPR22. TCPR32 and TCPR42 are read-only 32-bit registers used for the input capture function provided only in channels 5. 8. 11 and 14. The ICPE and CKEG bits in TCR12. TCR22. TCR32 and TCR42 control the input capture function. When an.."
hexmask.long 0x0 0.--31. 1. "TCPR,Input capture register"
tree.end
tree "TMU_2"
base ad:0xE6FD0000
group.byte 0x4++0x0
line.byte 0x0 "TSTR2,TSTR are 8-bit readable/writable registers that select whether to run or halt the TCNT."
hexmask.byte 0x0 3.--7. 1. "Reserved_3,Reserved"
bitfld.byte 0x0 2. "STR2,Counter Start 2" "0: TCNT2 count halted,1: TCNT2 counts"
newline
bitfld.byte 0x0 1. "STR1,Counter Start 1" "0: TCNT1 count halted,1: TCNT1 counts"
bitfld.byte 0x0 0. "STR0,Counter Start 0" "0: TCNT0 count halted,1: TCNT0 counts"
group.long 0x8++0x7
line.long 0x0 "TCOR20,TCOR are 32-bit readable/writable registers. After underflow has been generated according to the result of the TCNT countdown. the value of TCOR is set to TCNT and TCNT continues countdown from the value."
hexmask.long 0x0 0.--31. 1. "TCOR,Timer constant register"
line.long 0x4 "TCNT20,TCNT are 32-bit readable/writable registers that count down upon the input clock selected using the bits TPSC2 to TPSC0 in TCR."
hexmask.long 0x4 0.--31. 1. "TCNT,Timer counter"
group.word 0x10++0x1
line.word 0x0 "TCR20,TCR are 16-bit readable/writable registers that select a count clock and edge when an external clock is selected. and control an interrupt generation when the flag that indicates the generation of a TCNT is set to 1."
hexmask.word.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
rbitfld.word 0x0 9. "Reserved_9,Reserved" "0,1"
newline
bitfld.word 0x0 8. "UNF,Underflow Flag" "0: TCNT has not underflowed,1: TCNT has underflowed"
rbitfld.word 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.word 0x0 5. "UNIE,Underflow Interrupt Control" "0: Interrupt due to underflow,1: Interrupt due to underflow"
bitfld.word 0x0 3.--4. "CKEG,Clock Edge" "0: Count/capture register set on rising edge,1: Count/capture register set on falling edge,?,?"
newline
bitfld.word 0x0 0.--2. "TPSC,Timer Pre-scaler 2 to 0" "0: Count on,1: Count on,?,?,?,?,?,?"
group.long 0x14++0x7
line.long 0x0 "TCOR21,TCOR are 32-bit readable/writable registers. After underflow has been generated according to the result of the TCNT countdown. the value of TCOR is set to TCNT and TCNT continues countdown from the value."
hexmask.long 0x0 0.--31. 1. "TCOR,Timer constant register"
line.long 0x4 "TCNT21,TCNT are 32-bit readable/writable registers that count down upon the input clock selected using the bits TPSC2 to TPSC0 in TCR."
hexmask.long 0x4 0.--31. 1. "TCNT,Timer counter"
group.word 0x1C++0x1
line.word 0x0 "TCR21,TCR are 16-bit readable/writable registers that select a count clock and edge when an external clock is selected. and control an interrupt generation when the flag that indicates the generation of a TCNT is set to 1."
hexmask.word.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
rbitfld.word 0x0 9. "Reserved_9,Reserved" "0,1"
newline
bitfld.word 0x0 8. "UNF,Underflow Flag" "0: TCNT has not underflowed,1: TCNT has underflowed"
rbitfld.word 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.word 0x0 5. "UNIE,Underflow Interrupt Control" "0: Interrupt due to underflow,1: Interrupt due to underflow"
bitfld.word 0x0 3.--4. "CKEG,Clock Edge" "0: Count/capture register set on rising edge,1: Count/capture register set on falling edge,?,?"
newline
bitfld.word 0x0 0.--2. "TPSC,Timer Pre-scaler 2 to 0" "0: Count on,1: Count on,?,?,?,?,?,?"
group.long 0x20++0x7
line.long 0x0 "TCOR22,TCOR are 32-bit readable/writable registers. After underflow has been generated according to the result of the TCNT countdown. the value of TCOR is set to TCNT and TCNT continues countdown from the value."
hexmask.long 0x0 0.--31. 1. "TCOR,Timer constant register"
line.long 0x4 "TCNT22,TCNT are 32-bit readable/writable registers that count down upon the input clock selected using the bits TPSC2 to TPSC0 in TCR."
hexmask.long 0x4 0.--31. 1. "TCNT,Timer counter"
group.word 0x28++0x1
line.word 0x0 "TCR22,TCR are 16-bit readable/writable registers that select a count clock and edge when an external clock is selected. and control an interrupt generation when the flag that indicates the generation of a TCNT is set to 1."
hexmask.word.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
bitfld.word 0x0 9. "ICPF,Input Capture Interrupt Flag" "0: No input capture has occurred,1: Input capture has occurred"
newline
bitfld.word 0x0 8. "UNF,Underflow Flag" "0: TCNT has not underflowed,1: TCNT has underflowed"
bitfld.word 0x0 6.--7. "ICPE,Input Capture Control" "0: Input capture function is not used,1: Reserved,?,?"
newline
bitfld.word 0x0 5. "UNIE,Underflow Interrupt Control" "0: Interrupt due to underflow,1: Interrupt due to underflow"
bitfld.word 0x0 3.--4. "CKEG,Clock Edge" "0: Count/capture register set on rising edge,1: Count/capture register set on falling edge,?,?"
newline
bitfld.word 0x0 0.--2. "TPSC,Timer Pre-scaler 2 to 0" "0: Count on,1: Count on,?,?,?,?,?,?"
rgroup.long 0x2C++0x3
line.long 0x0 "TCPR22,TCPR12. TCPR22. TCPR32 and TCPR42 are read-only 32-bit registers used for the input capture function provided only in channels 5. 8. 11 and 14. The ICPE and CKEG bits in TCR12. TCR22. TCR32 and TCR42 control the input capture function. When an.."
hexmask.long 0x0 0.--31. 1. "TCPR,Input capture register"
tree.end
tree "TMU_3"
base ad:0xE6FE0000
group.byte 0x4++0x0
line.byte 0x0 "TSTR3,TSTR are 8-bit readable/writable registers that select whether to run or halt the TCNT."
hexmask.byte 0x0 3.--7. 1. "Reserved_3,Reserved"
bitfld.byte 0x0 2. "STR2,Counter Start 2" "0: TCNT2 count halted,1: TCNT2 counts"
newline
bitfld.byte 0x0 1. "STR1,Counter Start 1" "0: TCNT1 count halted,1: TCNT1 counts"
bitfld.byte 0x0 0. "STR0,Counter Start 0" "0: TCNT0 count halted,1: TCNT0 counts"
group.long 0x8++0x7
line.long 0x0 "TCOR30,TCOR are 32-bit readable/writable registers. After underflow has been generated according to the result of the TCNT countdown. the value of TCOR is set to TCNT and TCNT continues countdown from the value."
hexmask.long 0x0 0.--31. 1. "TCOR,Timer constant register"
line.long 0x4 "TCNT30,TCNT are 32-bit readable/writable registers that count down upon the input clock selected using the bits TPSC2 to TPSC0 in TCR."
hexmask.long 0x4 0.--31. 1. "TCNT,Timer counter"
group.word 0x10++0x1
line.word 0x0 "TCR30,TCR are 16-bit readable/writable registers that select a count clock and edge when an external clock is selected. and control an interrupt generation when the flag that indicates the generation of a TCNT is set to 1."
hexmask.word.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
rbitfld.word 0x0 9. "Reserved_9,Reserved" "0,1"
newline
bitfld.word 0x0 8. "UNF,Underflow Flag" "0: TCNT has not underflowed,1: TCNT has underflowed"
rbitfld.word 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.word 0x0 5. "UNIE,Underflow Interrupt Control" "0: Interrupt due to underflow,1: Interrupt due to underflow"
bitfld.word 0x0 3.--4. "CKEG,Clock Edge" "0: Count/capture register set on rising edge,1: Count/capture register set on falling edge,?,?"
newline
bitfld.word 0x0 0.--2. "TPSC,Timer Pre-scaler 2 to 0" "0: Count on,1: Count on,?,?,?,?,?,?"
group.long 0x14++0x7
line.long 0x0 "TCOR31,TCOR are 32-bit readable/writable registers. After underflow has been generated according to the result of the TCNT countdown. the value of TCOR is set to TCNT and TCNT continues countdown from the value."
hexmask.long 0x0 0.--31. 1. "TCOR,Timer constant register"
line.long 0x4 "TCNT31,TCNT are 32-bit readable/writable registers that count down upon the input clock selected using the bits TPSC2 to TPSC0 in TCR."
hexmask.long 0x4 0.--31. 1. "TCNT,Timer counter"
group.word 0x1C++0x1
line.word 0x0 "TCR31,TCR are 16-bit readable/writable registers that select a count clock and edge when an external clock is selected. and control an interrupt generation when the flag that indicates the generation of a TCNT is set to 1."
hexmask.word.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
rbitfld.word 0x0 9. "Reserved_9,Reserved" "0,1"
newline
bitfld.word 0x0 8. "UNF,Underflow Flag" "0: TCNT has not underflowed,1: TCNT has underflowed"
rbitfld.word 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.word 0x0 5. "UNIE,Underflow Interrupt Control" "0: Interrupt due to underflow,1: Interrupt due to underflow"
bitfld.word 0x0 3.--4. "CKEG,Clock Edge" "0: Count/capture register set on rising edge,1: Count/capture register set on falling edge,?,?"
newline
bitfld.word 0x0 0.--2. "TPSC,Timer Pre-scaler 2 to 0" "0: Count on,1: Count on,?,?,?,?,?,?"
group.long 0x20++0x7
line.long 0x0 "TCOR32,TCOR are 32-bit readable/writable registers. After underflow has been generated according to the result of the TCNT countdown. the value of TCOR is set to TCNT and TCNT continues countdown from the value."
hexmask.long 0x0 0.--31. 1. "TCOR,Timer constant register"
line.long 0x4 "TCNT32,TCNT are 32-bit readable/writable registers that count down upon the input clock selected using the bits TPSC2 to TPSC0 in TCR."
hexmask.long 0x4 0.--31. 1. "TCNT,Timer counter"
group.word 0x28++0x1
line.word 0x0 "TCR32,TCR are 16-bit readable/writable registers that select a count clock and edge when an external clock is selected. and control an interrupt generation when the flag that indicates the generation of a TCNT is set to 1."
hexmask.word.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
bitfld.word 0x0 9. "ICPF,Input Capture Interrupt Flag" "0: No input capture has occurred,1: Input capture has occurred"
newline
bitfld.word 0x0 8. "UNF,Underflow Flag" "0: TCNT has not underflowed,1: TCNT has underflowed"
bitfld.word 0x0 6.--7. "ICPE,Input Capture Control" "0: Input capture function is not used,1: Reserved,?,?"
newline
bitfld.word 0x0 5. "UNIE,Underflow Interrupt Control" "0: Interrupt due to underflow,1: Interrupt due to underflow"
bitfld.word 0x0 3.--4. "CKEG,Clock Edge" "0: Count/capture register set on rising edge,1: Count/capture register set on falling edge,?,?"
newline
bitfld.word 0x0 0.--2. "TPSC,Timer Pre-scaler 2 to 0" "0: Count on,1: Count on,?,?,?,?,?,?"
rgroup.long 0x2C++0x3
line.long 0x0 "TCPR32,TCPR12. TCPR22. TCPR32 and TCPR42 are read-only 32-bit registers used for the input capture function provided only in channels 5. 8. 11 and 14. The ICPE and CKEG bits in TCR12. TCR22. TCR32 and TCR42 control the input capture function. When an.."
hexmask.long 0x0 0.--31. 1. "TCPR,Input capture register"
tree.end
tree "TMU_4"
base ad:0xFFC00000
group.byte 0x4++0x0
line.byte 0x0 "TSTR4,TSTR are 8-bit readable/writable registers that select whether to run or halt the TCNT."
hexmask.byte 0x0 3.--7. 1. "Reserved_3,Reserved"
bitfld.byte 0x0 2. "STR2,Counter Start 2" "0: TCNT2 count halted,1: TCNT2 counts"
newline
bitfld.byte 0x0 1. "STR1,Counter Start 1" "0: TCNT1 count halted,1: TCNT1 counts"
bitfld.byte 0x0 0. "STR0,Counter Start 0" "0: TCNT0 count halted,1: TCNT0 counts"
group.long 0x8++0x7
line.long 0x0 "TCOR40,TCOR are 32-bit readable/writable registers. After underflow has been generated according to the result of the TCNT countdown. the value of TCOR is set to TCNT and TCNT continues countdown from the value."
hexmask.long 0x0 0.--31. 1. "TCOR,Timer constant register"
line.long 0x4 "TCNT40,TCNT are 32-bit readable/writable registers that count down upon the input clock selected using the bits TPSC2 to TPSC0 in TCR."
hexmask.long 0x4 0.--31. 1. "TCNT,Timer counter"
group.word 0x10++0x1
line.word 0x0 "TCR40,TCR are 16-bit readable/writable registers that select a count clock and edge when an external clock is selected. and control an interrupt generation when the flag that indicates the generation of a TCNT is set to 1."
hexmask.word.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
rbitfld.word 0x0 9. "Reserved_9,Reserved" "0,1"
newline
bitfld.word 0x0 8. "UNF,Underflow Flag" "0: TCNT has not underflowed,1: TCNT has underflowed"
rbitfld.word 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.word 0x0 5. "UNIE,Underflow Interrupt Control" "0: Interrupt due to underflow,1: Interrupt due to underflow"
bitfld.word 0x0 3.--4. "CKEG,Clock Edge" "0: Count/capture register set on rising edge,1: Count/capture register set on falling edge,?,?"
newline
bitfld.word 0x0 0.--2. "TPSC,Timer Pre-scaler 2 to 0" "0: Count on,1: Count on,?,?,?,?,?,?"
group.long 0x14++0x7
line.long 0x0 "TCOR41,TCOR are 32-bit readable/writable registers. After underflow has been generated according to the result of the TCNT countdown. the value of TCOR is set to TCNT and TCNT continues countdown from the value."
hexmask.long 0x0 0.--31. 1. "TCOR,Timer constant register"
line.long 0x4 "TCNT41,TCNT are 32-bit readable/writable registers that count down upon the input clock selected using the bits TPSC2 to TPSC0 in TCR."
hexmask.long 0x4 0.--31. 1. "TCNT,Timer counter"
group.word 0x1C++0x1
line.word 0x0 "TCR41,TCR are 16-bit readable/writable registers that select a count clock and edge when an external clock is selected. and control an interrupt generation when the flag that indicates the generation of a TCNT is set to 1."
hexmask.word.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
rbitfld.word 0x0 9. "Reserved_9,Reserved" "0,1"
newline
bitfld.word 0x0 8. "UNF,Underflow Flag" "0: TCNT has not underflowed,1: TCNT has underflowed"
rbitfld.word 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
bitfld.word 0x0 5. "UNIE,Underflow Interrupt Control" "0: Interrupt due to underflow,1: Interrupt due to underflow"
bitfld.word 0x0 3.--4. "CKEG,Clock Edge" "0: Count/capture register set on rising edge,1: Count/capture register set on falling edge,?,?"
newline
bitfld.word 0x0 0.--2. "TPSC,Timer Pre-scaler 2 to 0" "0: Count on,1: Count on,?,?,?,?,?,?"
group.long 0x20++0x7
line.long 0x0 "TCOR42,TCOR are 32-bit readable/writable registers. After underflow has been generated according to the result of the TCNT countdown. the value of TCOR is set to TCNT and TCNT continues countdown from the value."
hexmask.long 0x0 0.--31. 1. "TCOR,Timer constant register"
line.long 0x4 "TCNT42,TCNT are 32-bit readable/writable registers that count down upon the input clock selected using the bits TPSC2 to TPSC0 in TCR."
hexmask.long 0x4 0.--31. 1. "TCNT,Timer counter"
group.word 0x28++0x1
line.word 0x0 "TCR42,TCR are 16-bit readable/writable registers that select a count clock and edge when an external clock is selected. and control an interrupt generation when the flag that indicates the generation of a TCNT is set to 1."
hexmask.word.byte 0x0 10.--15. 1. "Reserved_10,Reserved"
bitfld.word 0x0 9. "ICPF,Input Capture Interrupt Flag" "0: No input capture has occurred,1: Input capture has occurred"
newline
bitfld.word 0x0 8. "UNF,Underflow Flag" "0: TCNT has not underflowed,1: TCNT has underflowed"
bitfld.word 0x0 6.--7. "ICPE,Input Capture Control" "0: Input capture function is not used,1: Reserved,?,?"
newline
bitfld.word 0x0 5. "UNIE,Underflow Interrupt Control" "0: Interrupt due to underflow,1: Interrupt due to underflow"
bitfld.word 0x0 3.--4. "CKEG,Clock Edge" "0: Count/capture register set on rising edge,1: Count/capture register set on falling edge,?,?"
newline
bitfld.word 0x0 0.--2. "TPSC,Timer Pre-scaler 2 to 0" "0: Count on,1: Count on,?,?,?,?,?,?"
rgroup.long 0x2C++0x3
line.long 0x0 "TCPR42,TCPR12. TCPR22. TCPR32 and TCPR42 are read-only 32-bit registers used for the input capture function provided only in channels 5. 8. 11 and 14. The ICPE and CKEG bits in TCR12. TCR22. TCR32 and TCR42 control the input capture function. When an.."
hexmask.long 0x0 0.--31. 1. "TCPR,Input capture register"
tree.end
tree.end
tree "TPU (16-Bit Timer Pulse Unit)"
base ad:0xE6E80000
group.word 0x0++0x1
line.word 0x0 "TSTR,TSTR is used to start or stop the timer counter (TCNT[n]) of timers 0 to 3."
hexmask.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.word 0x0 4. "TMST,Motor Control Sequence Start" "0: Stops motor control sequence,1: Starts motor control sequence"
newline
bitfld.word 0x0 3. "CST3,Counter Start" "0: Stops the TCNT3 counting operation,1: Starts the TCNT3 counting operation"
bitfld.word 0x0 2. "CST2,Counter Start" "0: Stops the TCNT2 counting operation,1: Starts the TCNT2 counting operation"
newline
bitfld.word 0x0 1. "CST1,Counter Start" "0: Stops the TCNT1 counting operation,1: Starts the TCNT1 counting operation"
bitfld.word 0x0 0. "CST0,Counter Start" "0: Stops the TCNT0 counting operation,1: Starts the TCNT0 counting operation"
group.word 0x10++0x1
line.word 0x0 "TCR0,TCR[n] is provided for each of timers 0 to 3 and is used to control TCNT[n]. TCR is initialized to H'0000 by a reset."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
bitfld.word 0x0 5.--7. "CCLR_2_0,Counter Clear" "0: TCNT[n] clearing disabled,1: TCNT[n] cleared in response to TGRA[n] compare..,?,?,?,?,?,?"
newline
bitfld.word 0x0 3.--4. "CKEG_1_0,Clock Edge" "0: Count rising edges,1: Count falling edges*,?,?"
bitfld.word 0x0 0.--2. "TPSC_2_0,Timer Prescaler" "0,1,2,3,4,5,6,7"
group.word 0x14++0x1
line.word 0x0 "TMDR0,TMDR[n] is provided for each of timers 0 to 3. and is used to specify the operating mode of the corresponding timer. TMDR[n] is initialized to H'0000 by a reset."
hexmask.word 0x0 7.--15. 1. "Reserved_7,Reserved"
bitfld.word 0x0 6. "BFWT,Buffer Write Timing" "0: TGRA[n] and TGRB[n] are rewritten on a compare..,1: TGRA[n] and TGRB[n] are rewritten on clearing of.."
newline
bitfld.word 0x0 5. "BFB,Buffer Operation B" "0: TGRB[n] is in normal operation,1: TGRB[n] and TGRD[n] are used for buffered.."
bitfld.word 0x0 4. "BFA,Buffer Operation A" "0: TGRA[n] normal operation,1: TGRA[n] and TGRC[n] are used for buffered.."
newline
rbitfld.word 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.word 0x0 0.--2. "MD_2_0,Timer Operating Mode" "0: Normal operation,1: Setting prohibited,?,?,?,?,?,?"
group.word 0x18++0x1
line.word 0x0 "TIOR0,TIOR[n] is provided for each of timers 0 to 3. and is used to control the corresponding TPUTO0 to TPUTO3 pins. TIOR[n] is initialized to H'0000 by a reset."
hexmask.word 0x0 3.--15. 1. "Reserved_3,Reserved"
bitfld.word 0x0 0.--2. "IOA_2_0,I/O Control" "0,1,2,3,4,5,6,7"
group.word 0x1C++0x1
line.word 0x0 "TIER0,TIER[n] is provided for each of timers 0 to 3 and is used to enable or disable the sources of interrupt requests for the corresponding timer. TIER[n] is initialized to H'0000 by a reset. Bits 8 to 13 are only present in timer 0."
rbitfld.word 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.word 0x0 13. "TMDOFE,Motor Control Data Transfer Overflow Detection Enable" "0: Interrupt request in response to the TMDOFS flag..,1: Interrupt request in response to the TMDOFS flag.."
newline
bitfld.word 0x0 12. "TMDRFE,Motor Control Data Transfer Request Detection Enable" "0: Interrupt request in response to the TMDRFS flag..,1: Interrupt request in response to the TMDRFS flag.."
bitfld.word 0x0 11. "TMS1ER,Motor Control Deceleration Transition Detection Enable" "0: Interrupt request in response to the TMCFR flag..,1: Interrupt request in response to the TMCFR flag.."
newline
bitfld.word 0x0 10. "TMS1ET,Motor Control Normal Transition Detection Enable" "0: Interrupt request in response to the TMCFT flag..,1: Interrupt request in response to the TMCFT flag.."
bitfld.word 0x0 9. "TMS1EA,Motor Control Acceleration Transition Detection Enable" "0: Interrupt request in response to the TMCFA flag..,1: Interrupt request in response to the TMCFA flag.."
newline
bitfld.word 0x0 8. "TMS1ES,Motor Control Stop Transition Detection Enable" "0: Interrupt request in response to the TMCFS flag..,1: Interrupt request in response to the TMCFS flag.."
rbitfld.word 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 4. "TC1EV,Overflow Interrupt Enable" "0: Interrupt request in response to the TCFV flag..,1: Interrupt request in response to the TCFV flag.."
bitfld.word 0x0 3. "TG1ED,TGR Interrupt Enable D." "0: Interrupt request in response to the TGFD bit..,1: Interrupt request in response to the TGFD bit.."
newline
bitfld.word 0x0 2. "TG1EC,TGR Interrupt Enable C" "0: Interrupt request in response to the TGFC bit..,1: Interrupt request in response to the TGFC bit.."
bitfld.word 0x0 1. "TG1EB,TGR Interrupt Enable B" "0: Interrupt request in response to the TGFB bit..,1: Interrupt request in response to the TGFB bit.."
newline
bitfld.word 0x0 0. "TG1EA,TGR Interrupt Enable A" "0: Interrupt request in response to the TGFA bit..,1: Interrupt request in response to the TGFA bit.."
group.word 0x20++0x1
line.word 0x0 "TSR0,TSR[n] is provided for each of timers 0 to 3 and indicates the state of the corresponding timer. TSR[n] is initialized to H'0000 by a reset."
rbitfld.word 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.word 0x0 13. "TMDOFS,Motor Control Data Transfer Overflow Detection" "0,1"
newline
bitfld.word 0x0 12. "TMDRFS,Motor Control Data Transfer Request Detection" "0,1"
bitfld.word 0x0 11. "TMCFR,Motor Control Deceleration Transition Detection" "0,1"
newline
bitfld.word 0x0 10. "TMCFT,Motor Control Normal Transition Detection" "0,1"
bitfld.word 0x0 9. "TMCFA,Motor Control Acceleration Transition Detection" "0,1"
newline
bitfld.word 0x0 8. "TMCFS,Motor Control Stop Transition Detection" "0,1"
rbitfld.word 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 4. "TCFV,Overflow" "0,1"
bitfld.word 0x0 3. "TGFD,Compare Flag D" "0,1"
newline
bitfld.word 0x0 2. "TGFC,Compare Flag C" "0,1"
bitfld.word 0x0 1. "TGFB,Compare Flag B" "0,1"
newline
bitfld.word 0x0 0. "TGFA,Output Compare Flag A" "0,1"
group.word 0x24++0x1
line.word 0x0 "TCNT0,TCN[n]T is a 16-bit counter. and is provided for each of timers 0 to 3."
hexmask.word 0x0 0.--15. 1. "TCNT,Timer Counter Bits"
group.word 0x28++0x1
line.word 0x0 "TGRA0,TGRA[n] is 16 bits general registers that are provided for each of timers 0 to 3. TGRA[n] is initialized to H'FFFF by a reset."
hexmask.word 0x0 0.--15. 1. "TGRA_n,Timer General Register Bits"
group.word 0x2C++0x1
line.word 0x0 "TGRB0,TGRB[n] is 16 bits general registers that are provided for each of timers 0 to 3. TGRB[n] is initialized to H'FFFF by a reset."
hexmask.word 0x0 0.--15. 1. "TGRB_n,Timer General Register Bits"
group.word 0x30++0x1
line.word 0x0 "TGRC0,TGRC[n] is 16 bits general registers that are provided for each of timers 0 to 3. TGRC[n] can be designated for operation as buffer registers*. TGRC[n] is initialized to H'FFFF by a reset."
hexmask.word 0x0 0.--15. 1. "TGRC_n,Timer General Register Bits"
group.word 0x34++0x1
line.word 0x0 "TGRD0,TGRD[n] is 16 bits general registers that are provided for each of timers 0 to 3. TGRD[n] can be designated for operation as buffer registers*. TGRD[n] is initialized to H'FFFF by a reset."
hexmask.word 0x0 0.--15. 1. "TGRD_n,Timer General Register Bits"
group.word 0x50++0x1
line.word 0x0 "TCR1,TCR[n] is provided for each of timers 0 to 3 and is used to control TCNT[n]. TCR is initialized to H'0000 by a reset."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
bitfld.word 0x0 5.--7. "CCLR_2_0,Counter Clear" "0: TCNT[n] clearing disabled,1: TCNT[n] cleared in response to TGRA[n] compare..,?,?,?,?,?,?"
newline
bitfld.word 0x0 3.--4. "CKEG_1_0,Clock Edge" "0: Count rising edges,1: Count falling edges*,?,?"
bitfld.word 0x0 0.--2. "TPSC_2_0,Timer Prescaler" "0,1,2,3,4,5,6,7"
group.word 0x54++0x1
line.word 0x0 "TMDR1,TMDR[n] is provided for each of timers 0 to 3. and is used to specify the operating mode of the corresponding timer. TMDR[n] is initialized to H'0000 by a reset."
hexmask.word 0x0 7.--15. 1. "Reserved_7,Reserved"
bitfld.word 0x0 6. "BFWT,Buffer Write Timing" "0: TGRA[n] and TGRB[n] are rewritten on a compare..,1: TGRA[n] and TGRB[n] are rewritten on clearing of.."
newline
bitfld.word 0x0 5. "BFB,Buffer Operation B" "0: TGRB[n] is in normal operation,1: TGRB[n] and TGRD[n] are used for buffered.."
bitfld.word 0x0 4. "BFA,Buffer Operation A" "0: TGRA[n] normal operation,1: TGRA[n] and TGRC[n] are used for buffered.."
newline
rbitfld.word 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.word 0x0 0.--2. "MD_2_0,Timer Operating Mode" "0: Normal operation,1: Setting prohibited,?,?,?,?,?,?"
group.word 0x58++0x1
line.word 0x0 "TIOR1,TIOR[n] is provided for each of timers 0 to 3. and is used to control the corresponding TPUTO0 to TPUTO3 pins. TIOR[n] is initialized to H'0000 by a reset."
hexmask.word 0x0 3.--15. 1. "Reserved_3,Reserved"
bitfld.word 0x0 0.--2. "IOA_2_0,I/O Control" "0,1,2,3,4,5,6,7"
group.word 0x5C++0x1
line.word 0x0 "TIER1,TIER[n] is provided for each of timers 0 to 3 and is used to enable or disable the sources of interrupt requests for the corresponding timer. TIER[n] is initialized to H'0000 by a reset. Bits 8 to 13 are only present in timer 0."
rbitfld.word 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.word 0x0 13. "TMDOFE,Motor Control Data Transfer Overflow Detection Enable" "0: Interrupt request in response to the TMDOFS flag..,1: Interrupt request in response to the TMDOFS flag.."
newline
bitfld.word 0x0 12. "TMDRFE,Motor Control Data Transfer Request Detection Enable" "0: Interrupt request in response to the TMDRFS flag..,1: Interrupt request in response to the TMDRFS flag.."
bitfld.word 0x0 11. "TMS1ER,Motor Control Deceleration Transition Detection Enable" "0: Interrupt request in response to the TMCFR flag..,1: Interrupt request in response to the TMCFR flag.."
newline
bitfld.word 0x0 10. "TMS1ET,Motor Control Normal Transition Detection Enable" "0: Interrupt request in response to the TMCFT flag..,1: Interrupt request in response to the TMCFT flag.."
bitfld.word 0x0 9. "TMS1EA,Motor Control Acceleration Transition Detection Enable" "0: Interrupt request in response to the TMCFA flag..,1: Interrupt request in response to the TMCFA flag.."
newline
bitfld.word 0x0 8. "TMS1ES,Motor Control Stop Transition Detection Enable" "0: Interrupt request in response to the TMCFS flag..,1: Interrupt request in response to the TMCFS flag.."
rbitfld.word 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 4. "TC1EV,Overflow Interrupt Enable" "0: Interrupt request in response to the TCFV flag..,1: Interrupt request in response to the TCFV flag.."
bitfld.word 0x0 3. "TG1ED,TGR Interrupt Enable D." "0: Interrupt request in response to the TGFD bit..,1: Interrupt request in response to the TGFD bit.."
newline
bitfld.word 0x0 2. "TG1EC,TGR Interrupt Enable C" "0: Interrupt request in response to the TGFC bit..,1: Interrupt request in response to the TGFC bit.."
bitfld.word 0x0 1. "TG1EB,TGR Interrupt Enable B" "0: Interrupt request in response to the TGFB bit..,1: Interrupt request in response to the TGFB bit.."
newline
bitfld.word 0x0 0. "TG1EA,TGR Interrupt Enable A" "0: Interrupt request in response to the TGFA bit..,1: Interrupt request in response to the TGFA bit.."
group.word 0x60++0x1
line.word 0x0 "TSR1,TSR[n] is provided for each of timers 0 to 3 and indicates the state of the corresponding timer. TSR[n] is initialized to H'0000 by a reset."
rbitfld.word 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.word 0x0 13. "TMDOFS,Motor Control Data Transfer Overflow Detection" "0,1"
newline
bitfld.word 0x0 12. "TMDRFS,Motor Control Data Transfer Request Detection" "0,1"
bitfld.word 0x0 11. "TMCFR,Motor Control Deceleration Transition Detection" "0,1"
newline
bitfld.word 0x0 10. "TMCFT,Motor Control Normal Transition Detection" "0,1"
bitfld.word 0x0 9. "TMCFA,Motor Control Acceleration Transition Detection" "0,1"
newline
bitfld.word 0x0 8. "TMCFS,Motor Control Stop Transition Detection" "0,1"
rbitfld.word 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 4. "TCFV,Overflow" "0,1"
bitfld.word 0x0 3. "TGFD,Compare Flag D" "0,1"
newline
bitfld.word 0x0 2. "TGFC,Compare Flag C" "0,1"
bitfld.word 0x0 1. "TGFB,Compare Flag B" "0,1"
newline
bitfld.word 0x0 0. "TGFA,Output Compare Flag A" "0,1"
group.word 0x64++0x1
line.word 0x0 "TCNT1,TCN[n]T is a 16-bit counter. and is provided for each of timers 0 to 3."
hexmask.word 0x0 0.--15. 1. "TCNT,Timer Counter Bits"
group.word 0x68++0x1
line.word 0x0 "TGRA1,TGRA[n] is 16 bits general registers that are provided for each of timers 0 to 3. TGRA[n] is initialized to H'FFFF by a reset."
hexmask.word 0x0 0.--15. 1. "TGRA_n,Timer General Register Bits"
group.word 0x6C++0x1
line.word 0x0 "TGRB1,TGRB[n] is 16 bits general registers that are provided for each of timers 0 to 3. TGRB[n] is initialized to H'FFFF by a reset."
hexmask.word 0x0 0.--15. 1. "TGRB_n,Timer General Register Bits"
group.word 0x70++0x1
line.word 0x0 "TGRC1,TGRC[n] is 16 bits general registers that are provided for each of timers 0 to 3. TGRC[n] can be designated for operation as buffer registers*. TGRC[n] is initialized to H'FFFF by a reset."
hexmask.word 0x0 0.--15. 1. "TGRC_n,Timer General Register Bits"
group.word 0x74++0x1
line.word 0x0 "TGRD1,TGRD[n] is 16 bits general registers that are provided for each of timers 0 to 3. TGRD[n] can be designated for operation as buffer registers*. TGRD[n] is initialized to H'FFFF by a reset."
hexmask.word 0x0 0.--15. 1. "TGRD_n,Timer General Register Bits"
group.word 0x90++0x1
line.word 0x0 "TCR2,TCR[n] is provided for each of timers 0 to 3 and is used to control TCNT[n]. TCR is initialized to H'0000 by a reset."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
bitfld.word 0x0 5.--7. "CCLR_2_0,Counter Clear" "0: TCNT[n] clearing disabled,1: TCNT[n] cleared in response to TGRA[n] compare..,?,?,?,?,?,?"
newline
bitfld.word 0x0 3.--4. "CKEG_1_0,Clock Edge" "0: Count rising edges,1: Count falling edges*,?,?"
bitfld.word 0x0 0.--2. "TPSC_2_0,Timer Prescaler" "0,1,2,3,4,5,6,7"
group.word 0x94++0x1
line.word 0x0 "TMDR2,TMDR[n] is provided for each of timers 0 to 3. and is used to specify the operating mode of the corresponding timer. TMDR[n] is initialized to H'0000 by a reset."
hexmask.word 0x0 7.--15. 1. "Reserved_7,Reserved"
bitfld.word 0x0 6. "BFWT,Buffer Write Timing" "0: TGRA[n] and TGRB[n] are rewritten on a compare..,1: TGRA[n] and TGRB[n] are rewritten on clearing of.."
newline
bitfld.word 0x0 5. "BFB,Buffer Operation B" "0: TGRB[n] is in normal operation,1: TGRB[n] and TGRD[n] are used for buffered.."
bitfld.word 0x0 4. "BFA,Buffer Operation A" "0: TGRA[n] normal operation,1: TGRA[n] and TGRC[n] are used for buffered.."
newline
rbitfld.word 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.word 0x0 0.--2. "MD_2_0,Timer Operating Mode" "0: Normal operation,1: Setting prohibited,?,?,?,?,?,?"
group.word 0x98++0x1
line.word 0x0 "TIOR2,TIOR[n] is provided for each of timers 0 to 3. and is used to control the corresponding TPUTO0 to TPUTO3 pins. TIOR[n] is initialized to H'0000 by a reset."
hexmask.word 0x0 3.--15. 1. "Reserved_3,Reserved"
bitfld.word 0x0 0.--2. "IOA_2_0,I/O Control" "0,1,2,3,4,5,6,7"
group.word 0x9C++0x1
line.word 0x0 "TIER2,TIER[n] is provided for each of timers 0 to 3 and is used to enable or disable the sources of interrupt requests for the corresponding timer. TIER[n] is initialized to H'0000 by a reset. Bits 8 to 13 are only present in timer 0."
rbitfld.word 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.word 0x0 13. "TMDOFE,Motor Control Data Transfer Overflow Detection Enable" "0: Interrupt request in response to the TMDOFS flag..,1: Interrupt request in response to the TMDOFS flag.."
newline
bitfld.word 0x0 12. "TMDRFE,Motor Control Data Transfer Request Detection Enable" "0: Interrupt request in response to the TMDRFS flag..,1: Interrupt request in response to the TMDRFS flag.."
bitfld.word 0x0 11. "TMS1ER,Motor Control Deceleration Transition Detection Enable" "0: Interrupt request in response to the TMCFR flag..,1: Interrupt request in response to the TMCFR flag.."
newline
bitfld.word 0x0 10. "TMS1ET,Motor Control Normal Transition Detection Enable" "0: Interrupt request in response to the TMCFT flag..,1: Interrupt request in response to the TMCFT flag.."
bitfld.word 0x0 9. "TMS1EA,Motor Control Acceleration Transition Detection Enable" "0: Interrupt request in response to the TMCFA flag..,1: Interrupt request in response to the TMCFA flag.."
newline
bitfld.word 0x0 8. "TMS1ES,Motor Control Stop Transition Detection Enable" "0: Interrupt request in response to the TMCFS flag..,1: Interrupt request in response to the TMCFS flag.."
rbitfld.word 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
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bitfld.word 0x0 4. "TC1EV,Overflow Interrupt Enable" "0: Interrupt request in response to the TCFV flag..,1: Interrupt request in response to the TCFV flag.."
bitfld.word 0x0 3. "TG1ED,TGR Interrupt Enable D." "0: Interrupt request in response to the TGFD bit..,1: Interrupt request in response to the TGFD bit.."
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bitfld.word 0x0 2. "TG1EC,TGR Interrupt Enable C" "0: Interrupt request in response to the TGFC bit..,1: Interrupt request in response to the TGFC bit.."
bitfld.word 0x0 1. "TG1EB,TGR Interrupt Enable B" "0: Interrupt request in response to the TGFB bit..,1: Interrupt request in response to the TGFB bit.."
newline
bitfld.word 0x0 0. "TG1EA,TGR Interrupt Enable A" "0: Interrupt request in response to the TGFA bit..,1: Interrupt request in response to the TGFA bit.."
group.word 0xA0++0x1
line.word 0x0 "TSR2,TSR[n] is provided for each of timers 0 to 3 and indicates the state of the corresponding timer. TSR[n] is initialized to H'0000 by a reset."
rbitfld.word 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.word 0x0 13. "TMDOFS,Motor Control Data Transfer Overflow Detection" "0,1"
newline
bitfld.word 0x0 12. "TMDRFS,Motor Control Data Transfer Request Detection" "0,1"
bitfld.word 0x0 11. "TMCFR,Motor Control Deceleration Transition Detection" "0,1"
newline
bitfld.word 0x0 10. "TMCFT,Motor Control Normal Transition Detection" "0,1"
bitfld.word 0x0 9. "TMCFA,Motor Control Acceleration Transition Detection" "0,1"
newline
bitfld.word 0x0 8. "TMCFS,Motor Control Stop Transition Detection" "0,1"
rbitfld.word 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 4. "TCFV,Overflow" "0,1"
bitfld.word 0x0 3. "TGFD,Compare Flag D" "0,1"
newline
bitfld.word 0x0 2. "TGFC,Compare Flag C" "0,1"
bitfld.word 0x0 1. "TGFB,Compare Flag B" "0,1"
newline
bitfld.word 0x0 0. "TGFA,Output Compare Flag A" "0,1"
group.word 0xA4++0x1
line.word 0x0 "TCNT2,TCN[n]T is a 16-bit counter. and is provided for each of timers 0 to 3."
hexmask.word 0x0 0.--15. 1. "TCNT,Timer Counter Bits"
group.word 0xA8++0x1
line.word 0x0 "TGRA2,TGRA[n] is 16 bits general registers that are provided for each of timers 0 to 3. TGRA[n] is initialized to H'FFFF by a reset."
hexmask.word 0x0 0.--15. 1. "TGRA_n,Timer General Register Bits"
group.word 0xAC++0x1
line.word 0x0 "TGRB2,TGRB[n] is 16 bits general registers that are provided for each of timers 0 to 3. TGRB[n] is initialized to H'FFFF by a reset."
hexmask.word 0x0 0.--15. 1. "TGRB_n,Timer General Register Bits"
group.word 0xB0++0x1
line.word 0x0 "TGRC2,TGRC[n] is 16 bits general registers that are provided for each of timers 0 to 3. TGRC[n] can be designated for operation as buffer registers*. TGRC[n] is initialized to H'FFFF by a reset."
hexmask.word 0x0 0.--15. 1. "TGRC_n,Timer General Register Bits"
group.word 0xB4++0x1
line.word 0x0 "TGRD2,TGRD[n] is 16 bits general registers that are provided for each of timers 0 to 3. TGRD[n] can be designated for operation as buffer registers*. TGRD[n] is initialized to H'FFFF by a reset."
hexmask.word 0x0 0.--15. 1. "TGRD_n,Timer General Register Bits"
group.word 0xD0++0x1
line.word 0x0 "TCR3,TCR[n] is provided for each of timers 0 to 3 and is used to control TCNT[n]. TCR is initialized to H'0000 by a reset."
hexmask.word.byte 0x0 8.--15. 1. "Reserved_8,Reserved"
bitfld.word 0x0 5.--7. "CCLR_2_0,Counter Clear" "0: TCNT[n] clearing disabled,1: TCNT[n] cleared in response to TGRA[n] compare..,?,?,?,?,?,?"
newline
bitfld.word 0x0 3.--4. "CKEG_1_0,Clock Edge" "0: Count rising edges,1: Count falling edges*,?,?"
bitfld.word 0x0 0.--2. "TPSC_2_0,Timer Prescaler" "0,1,2,3,4,5,6,7"
group.word 0xD4++0x1
line.word 0x0 "TMDR3,TMDR[n] is provided for each of timers 0 to 3. and is used to specify the operating mode of the corresponding timer. TMDR[n] is initialized to H'0000 by a reset."
hexmask.word 0x0 7.--15. 1. "Reserved_7,Reserved"
bitfld.word 0x0 6. "BFWT,Buffer Write Timing" "0: TGRA[n] and TGRB[n] are rewritten on a compare..,1: TGRA[n] and TGRB[n] are rewritten on clearing of.."
newline
bitfld.word 0x0 5. "BFB,Buffer Operation B" "0: TGRB[n] is in normal operation,1: TGRB[n] and TGRD[n] are used for buffered.."
bitfld.word 0x0 4. "BFA,Buffer Operation A" "0: TGRA[n] normal operation,1: TGRA[n] and TGRC[n] are used for buffered.."
newline
rbitfld.word 0x0 3. "Reserved_3,Reserved" "0,1"
bitfld.word 0x0 0.--2. "MD_2_0,Timer Operating Mode" "0: Normal operation,1: Setting prohibited,?,?,?,?,?,?"
group.word 0xD8++0x1
line.word 0x0 "TIOR3,TIOR[n] is provided for each of timers 0 to 3. and is used to control the corresponding TPUTO0 to TPUTO3 pins. TIOR[n] is initialized to H'0000 by a reset."
hexmask.word 0x0 3.--15. 1. "Reserved_3,Reserved"
bitfld.word 0x0 0.--2. "IOA_2_0,I/O Control" "0,1,2,3,4,5,6,7"
group.word 0xDC++0x1
line.word 0x0 "TIER3,TIER[n] is provided for each of timers 0 to 3 and is used to enable or disable the sources of interrupt requests for the corresponding timer. TIER[n] is initialized to H'0000 by a reset. Bits 8 to 13 are only present in timer 0."
rbitfld.word 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.word 0x0 13. "TMDOFE,Motor Control Data Transfer Overflow Detection Enable" "0: Interrupt request in response to the TMDOFS flag..,1: Interrupt request in response to the TMDOFS flag.."
newline
bitfld.word 0x0 12. "TMDRFE,Motor Control Data Transfer Request Detection Enable" "0: Interrupt request in response to the TMDRFS flag..,1: Interrupt request in response to the TMDRFS flag.."
bitfld.word 0x0 11. "TMS1ER,Motor Control Deceleration Transition Detection Enable" "0: Interrupt request in response to the TMCFR flag..,1: Interrupt request in response to the TMCFR flag.."
newline
bitfld.word 0x0 10. "TMS1ET,Motor Control Normal Transition Detection Enable" "0: Interrupt request in response to the TMCFT flag..,1: Interrupt request in response to the TMCFT flag.."
bitfld.word 0x0 9. "TMS1EA,Motor Control Acceleration Transition Detection Enable" "0: Interrupt request in response to the TMCFA flag..,1: Interrupt request in response to the TMCFA flag.."
newline
bitfld.word 0x0 8. "TMS1ES,Motor Control Stop Transition Detection Enable" "0: Interrupt request in response to the TMCFS flag..,1: Interrupt request in response to the TMCFS flag.."
rbitfld.word 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 4. "TC1EV,Overflow Interrupt Enable" "0: Interrupt request in response to the TCFV flag..,1: Interrupt request in response to the TCFV flag.."
bitfld.word 0x0 3. "TG1ED,TGR Interrupt Enable D." "0: Interrupt request in response to the TGFD bit..,1: Interrupt request in response to the TGFD bit.."
newline
bitfld.word 0x0 2. "TG1EC,TGR Interrupt Enable C" "0: Interrupt request in response to the TGFC bit..,1: Interrupt request in response to the TGFC bit.."
bitfld.word 0x0 1. "TG1EB,TGR Interrupt Enable B" "0: Interrupt request in response to the TGFB bit..,1: Interrupt request in response to the TGFB bit.."
newline
bitfld.word 0x0 0. "TG1EA,TGR Interrupt Enable A" "0: Interrupt request in response to the TGFA bit..,1: Interrupt request in response to the TGFA bit.."
group.word 0xE0++0x1
line.word 0x0 "TSR3,TSR[n] is provided for each of timers 0 to 3 and indicates the state of the corresponding timer. TSR[n] is initialized to H'0000 by a reset."
rbitfld.word 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
bitfld.word 0x0 13. "TMDOFS,Motor Control Data Transfer Overflow Detection" "0,1"
newline
bitfld.word 0x0 12. "TMDRFS,Motor Control Data Transfer Request Detection" "0,1"
bitfld.word 0x0 11. "TMCFR,Motor Control Deceleration Transition Detection" "0,1"
newline
bitfld.word 0x0 10. "TMCFT,Motor Control Normal Transition Detection" "0,1"
bitfld.word 0x0 9. "TMCFA,Motor Control Acceleration Transition Detection" "0,1"
newline
bitfld.word 0x0 8. "TMCFS,Motor Control Stop Transition Detection" "0,1"
rbitfld.word 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 4. "TCFV,Overflow" "0,1"
bitfld.word 0x0 3. "TGFD,Compare Flag D" "0,1"
newline
bitfld.word 0x0 2. "TGFC,Compare Flag C" "0,1"
bitfld.word 0x0 1. "TGFB,Compare Flag B" "0,1"
newline
bitfld.word 0x0 0. "TGFA,Output Compare Flag A" "0,1"
group.word 0xE4++0x1
line.word 0x0 "TCNT3,TCN[n]T is a 16-bit counter. and is provided for each of timers 0 to 3."
hexmask.word 0x0 0.--15. 1. "TCNT,Timer Counter Bits"
group.word 0xE8++0x1
line.word 0x0 "TGRA3,TGRA[n] is 16 bits general registers that are provided for each of timers 0 to 3. TGRA[n] is initialized to H'FFFF by a reset."
hexmask.word 0x0 0.--15. 1. "TGRA_n,Timer General Register Bits"
group.word 0xEC++0x1
line.word 0x0 "TGRB3,TGRB[n] is 16 bits general registers that are provided for each of timers 0 to 3. TGRB[n] is initialized to H'FFFF by a reset."
hexmask.word 0x0 0.--15. 1. "TGRB_n,Timer General Register Bits"
group.word 0xF0++0x1
line.word 0x0 "TGRC3,TGRC[n] is 16 bits general registers that are provided for each of timers 0 to 3. TGRC[n] can be designated for operation as buffer registers*. TGRC[n] is initialized to H'FFFF by a reset."
hexmask.word 0x0 0.--15. 1. "TGRC_n,Timer General Register Bits"
group.word 0xF4++0x1
line.word 0x0 "TGRD3,TGRD[n] is 16 bits general registers that are provided for each of timers 0 to 3. TGRD[n] can be designated for operation as buffer registers*. TGRD[n] is initialized to H'FFFF by a reset."
hexmask.word 0x0 0.--15. 1. "TGRD_n,Timer General Register Bits"
group.word 0x100++0x1
line.word 0x0 "TMIR,TMIR is used to configure operation in the motor control mode."
hexmask.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.word 0x0 4. "TDMAE,Selection of DMA Use" "0: DMA is not used,1: DMA is used"
newline
bitfld.word 0x0 3. "MTRPATDOWN,Operation and Stop Patterns Transition Ascending/Descending Select" "0: Ascending,1: Descending"
bitfld.word 0x0 1.--2. "MTRPATKIND_1_0,Operation and Stop Pattern Type Select" "0: Four,1: Eight,?,?"
newline
bitfld.word 0x0 0. "MTRON,TPU Mode/Stepping Motor Control Mode Select" "0: TPU mode,1: Stepping motor control mode"
group.word 0x104++0x1
line.word 0x0 "TMRR,TMRR is used to place timer 0 in to the deceleration state from the normal state. in the motor control mode."
hexmask.word 0x0 2.--15. 1. "Reserved_2,Reserved"
bitfld.word 0x0 1. "REDUON0,This bit is used to force a transition of timer 0 to the deceleration (or stop) state from the normal state in motor control mode. Note that the state transition only proceeds when pattern 0 is the currently specified pattern. Setting this bit.." "0: No operation,1: Timer 0 is forcibly placed in the deceleration"
newline
bitfld.word 0x0 0. "REDUON,This bit is used to force a transition of timer 0 to the deceleration (or stop) state from the normal state in motor control mode. Setting this bit has no effect if timer 0 is not in the normal state. This bit is automatically cleared to 0 when.." "0: No operation,1: Timer 0 is forcibly placed in the deceleration"
rgroup.word 0x108++0x1
line.word 0x0 "TMSR,TMSR is a read-only register that indicates the sequence state in motor control mode."
hexmask.word 0x0 4.--15. 1. "Reserved_4,Reserved"
bitfld.word 0x0 3. "SITR,This bit indicates the sequence state in motor control mode." "0: The sequence state is not deceleration,1: The sequence state is deceleration"
newline
bitfld.word 0x0 2. "SITT,This bit indicates the sequence state in motor control mode." "0: The sequence state is not normal,1: The sequence state is normal"
bitfld.word 0x0 1. "SITA,This bit indicates the sequence state in motor control mode." "0: The sequence state is not acceleration,1: The sequence state is acceleration"
newline
bitfld.word 0x0 0. "SITS,This bit indicates the sequence state in motor control mode." "0: The sequence state is not stop,1: The sequence state is stop"
group.word 0x110++0x1
line.word 0x0 "TMMPR0,TMMPR0 is used to set motor operation patterns [3] to [0] in motor control mode."
bitfld.word 0x0 15. "MP33,Motor Operation Pattern [3] in Motor Control Mode" "0,1"
bitfld.word 0x0 14. "MP32,Motor Operation Pattern [3] in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 13. "MP31,Motor Operation Pattern [3] in Motor Control Mode" "0,1"
bitfld.word 0x0 12. "MP30,Motor Operation Pattern [3] in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 11. "MP23,Motor Operation Pattern [2] in Motor Control Mode" "0,1"
bitfld.word 0x0 10. "MP22,Motor Operation Pattern [2] in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 9. "MP21,Motor Operation Pattern [2] in Motor Control Mode" "0,1"
bitfld.word 0x0 8. "MP20,Motor Operation Pattern [2] in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 7. "MP13,Motor Operation Pattern [1] in Motor Control Mode" "0,1"
bitfld.word 0x0 6. "MP12,Motor Operation Pattern [1] in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 5. "MP11,Motor Operation Pattern [1] in Motor Control Mode" "0,1"
bitfld.word 0x0 4. "MP10,Motor Operation Pattern [1] in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 3. "MP03,Motor Operation Pattern [0] in Motor Control Mode" "0,1"
bitfld.word 0x0 2. "MP02,Motor Operation Pattern [0] in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 1. "MP01,Motor Operation Pattern [0] in Motor Control Mode" "0,1"
bitfld.word 0x0 0. "MP00,Motor Operation Pattern [0] in Motor Control Mode" "0,1"
group.word 0x114++0x1
line.word 0x0 "TMMPR1,TMMPR1 is used to set motor operation pattern [7] to [4] in motor control mode."
bitfld.word 0x0 15. "MP73,Motor Operation Pattern [7] in Motor Control Mode" "0,1"
bitfld.word 0x0 14. "MP72,Motor Operation Pattern [7] in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 13. "MP71,Motor Operation Pattern [7] in Motor Control Mode" "0,1"
bitfld.word 0x0 12. "MP70,Motor Operation Pattern [7] in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 11. "MP63,Motor Operation Pattern [6] in Motor Control Mode" "0,1"
bitfld.word 0x0 10. "MP62,Motor Operation Pattern [6] in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 9. "MP61,Motor Operation Pattern [6] in Motor Control Mode" "0,1"
bitfld.word 0x0 8. "MP60,Motor Operation Pattern [6] in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 7. "MP53,Motor Operation Pattern [5] in Motor Control Mode" "0,1"
bitfld.word 0x0 6. "MP52,Motor Operation Pattern [5] in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 5. "MP51,Motor Operation Pattern [5] in Motor Control Mode" "0,1"
bitfld.word 0x0 4. "MP50,Motor Operation Pattern [5] in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 3. "MP43,Motor Operation Pattern [4] in Motor Control Mode" "0,1"
bitfld.word 0x0 2. "MP42,Motor Operation Pattern [4] in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 1. "MP41,Motor Operation Pattern [4] in Motor Control Mode" "0,1"
bitfld.word 0x0 0. "MP40,Motor Operation Pattern [4] in Motor Control Mode" "0,1"
group.word 0x118++0x1
line.word 0x0 "TMSPR0,TMSPR0 is used to set motor stop pattern (3) to (0) in motor control mode."
bitfld.word 0x0 15. "SP33,Motor Stop Pattern (3) in Motor Control Mode" "0,1"
bitfld.word 0x0 14. "SP32,Motor Stop Pattern (3) in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 13. "SP31,Motor Stop Pattern (3) in Motor Control Mode" "0,1"
bitfld.word 0x0 12. "SP30,Motor Stop Pattern (3) in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 11. "SP23,Motor Stop Pattern (2) in Motor Control Mode" "0,1"
bitfld.word 0x0 10. "SP22,Motor Stop Pattern (2) in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 9. "SP21,Motor Stop Pattern (2) in Motor Control Mode" "0,1"
bitfld.word 0x0 8. "SP20,Motor Stop Pattern (2) in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 7. "SP13,Motor Stop Pattern (1) in Motor Control Mode" "0,1"
bitfld.word 0x0 6. "SP12,Motor Stop Pattern (1) in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 5. "SP11,Motor Stop Pattern (1) in Motor Control Mode" "0,1"
bitfld.word 0x0 4. "SP10,Motor Stop Pattern (1) in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 3. "SP03,Motor Stop Pattern (0) in Motor Control Mode" "0,1"
bitfld.word 0x0 2. "SP02,Motor Stop Pattern (0) in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 1. "SP01,Motor Stop Pattern (0) in Motor Control Mode" "0,1"
bitfld.word 0x0 0. "SP00,Motor Stop Pattern (0) in Motor Control Mode" "0,1"
group.word 0x11C++0x1
line.word 0x0 "TMSPR1,TMSPR1 is used to set motor stop pattern (7) to (4) in motor control mode."
bitfld.word 0x0 15. "SP73,Motor Stop Pattern (7) in Motor Control Mode" "0,1"
bitfld.word 0x0 14. "SP72,Motor Stop Pattern (7) in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 13. "SP71,Motor Stop Pattern (7) in Motor Control Mode" "0,1"
bitfld.word 0x0 12. "SP70,Motor Stop Pattern (7) in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 11. "SP63,Motor Stop Pattern (6) in Motor Control Mode" "0,1"
bitfld.word 0x0 10. "SP62,Motor Stop Pattern (6) in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 9. "SP61,Motor Stop Pattern (6) in Motor Control Mode" "0,1"
bitfld.word 0x0 8. "SP60,Motor Stop Pattern (6) in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 7. "SP53,Motor Stop Pattern (5) in Motor Control Mode" "0,1"
bitfld.word 0x0 6. "SP52,Motor Stop Pattern (5) in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 5. "SP51,Motor Stop Pattern (5) in Motor Control Mode" "0,1"
bitfld.word 0x0 4. "SP50,Motor Stop Pattern (5) in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 3. "SP43,Motor Stop Pattern (4) in Motor Control Mode" "0,1"
bitfld.word 0x0 2. "SP42,Motor Stop Pattern (4) in Motor Control Mode" "0,1"
newline
bitfld.word 0x0 1. "SP41,Motor Stop Pattern (4) in Motor Control Mode" "0,1"
bitfld.word 0x0 0. "SP40,Motor Stop Pattern (4) in Motor Control Mode" "0,1"
group.word 0x120++0x1
line.word 0x0 "TMOPR,TMOPR is used to specify the motor output pattern in motor control mode. When read. it indicates the pattern currently being output. Writing to this register while the sequence is in the stop state leads to output of the pattern with the.."
hexmask.word 0x0 3.--15. 1. "Reserved_3,Reserved"
bitfld.word 0x0 0.--2. "NOWPAT_2_0,In motor control mode " "0,1,2,3,4,5,6,7"
group.word 0x130++0x1
line.word 0x0 "TMASR,TMASR is used to set the number of steps in the acceleration state of motor control mode. TMASR is initialized to H'0000 by a reset."
hexmask.word 0x0 0.--15. 1. "AS_15_0,Specify the number of steps in the acceleration state of motor control mode."
group.word 0x134++0x1
line.word 0x0 "TMTSR,TMTSR is used to set the number of steps in the normal state of motor control mode. TMTSR is initialized to H'0000 by a reset."
hexmask.word 0x0 0.--15. 1. "TS_15_0,Specify the number of steps in the normal state of motor control mode."
group.word 0x138++0x1
line.word 0x0 "TMRSR,TMRSR is used to set the number of steps in the deceleration state of motor control mode. TMRSR is initialized to H'0000 by a reset."
hexmask.word 0x0 0.--15. 1. "RS_15_0,Specify the number of steps in the deceleration state of motor control mode."
group.word 0x140++0x1
line.word 0x0 "TMSCR,TMSCR indicates or controls the value of the sequence counter in motor control mode. Writing to this register is only allowed when the motor control mode is in use and the current state is the normal state."
hexmask.word 0x0 0.--15. 1. "SC_15_0,Value of Sequence Counter in Motor Control Mode"
rgroup.word 0x144++0x1
line.word 0x0 "TMTCR,TMTCR is a read-only register that indicates the number of steps in the normal state of motor control mode. TMTCR is initialized to H'0000 by a reset."
hexmask.word 0x0 0.--15. 1. "TCR_15_0,Indicate the number of steps in the normal state of motor control mode."
tree.end
tree.end
tree "VDSP (Vision DSP)"
base ad:0x0
tree "VDSP_0"
base ad:0xF1400000
group.long 0xC0000++0x23
line.long 0x0 "IEV0,"
hexmask.long 0x0 0.--31. 1. "ICU_VEC_ADDR,External interrupt vector address register."
line.long 0x4 "IAL0,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved. The read value is always 0. The write value should always be 0."
bitfld.long 0x4 3. "ACU_SLV_LOCK,When asserted  the external masters only can change the DACU/IACU configuration." "0,1"
bitfld.long 0x4 2. "ACU_LOCK,DACU and IACU lock indication register." "0,1"
bitfld.long 0x4 1. "ICU_SLV_LOCK,When asserted  only the external masters can change the ICU configuration." "0,1"
newline
bitfld.long 0x4 0. "ICU_LOCK,ICU lock indication register." "0,1"
line.long 0x8 "TC0,"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved. The read value is always 0. The write value should always be 0."
bitfld.long 0x8 7. "TIMER3_EN,Timer3 event enable register." "0,1"
bitfld.long 0x8 6. "TIMER2_EN,Timer2 event enable register." "0,1"
bitfld.long 0x8 5. "TIMER1_EN,Timer1 event enable register." "0,1"
newline
bitfld.long 0x8 4. "TIMER0_EN,Timer0 event enable register." "0,1"
bitfld.long 0x8 3. "TIMER3_RESET,Timer3 reset signal register." "0,1"
bitfld.long 0x8 2. "TIMER2_RESET,Timer2 reset signal register." "0,1"
bitfld.long 0x8 1. "TIMER1_RESET,Timer1 reset signal register." "0,1"
newline
bitfld.long 0x8 0. "TIMER0_RESET,Timer0 reset signal register." "0,1"
line.long 0xC "PC0,Restrictions when changing settings are described in double_quotationSensProandtrade; Architecture Specification Volume III (MSS)double_quotation 4.6.6 AXI Low-Power Interface.."
hexmask.long 0xC 1.--31. 1. "Reserved_1,Reserved. The read value is always 0. The write value should always be 0."
bitfld.long 0xC 0. "AXI_LOWPWR_REQ,AXI Low Power Request to switch Light Sleep to Standby and vice versa." "0,1"
line.long 0x10 "RV0,Restrictions when changing settings are described in U39.4.7 VDSP startup method."
hexmask.long 0x10 0.--31. 1. "RST_VEC_ADDR,External input - strapped for reset initial pc address."
line.long 0x14 "GPIOI0,"
hexmask.long 0x14 0.--31. 1. "GP_IN,General-Purpose Inputs."
line.long 0x18 "COREID0,Restrictions when changing settings are described in U39.4.7 VDSP startup method."
hexmask.long 0x18 0.--31. 1. "DSP_ID,The user can define the ID number of the core."
line.long 0x1C "DMACNT0,Restrictions when changing settings are described in U39.3.1Data DMA Debug Match for Breakpoint Generation."
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved. The read value is always 0. The write value should always be 0."
bitfld.long 0x1C 1. "DDMA_EXT_ACK,External Acknowledge for DDMA debug match." "0,1"
rbitfld.long 0x1C 0. "Reserved_0,Reserved. The write value should always be 0." "0,1"
line.long 0x20 "MCACHIVL0,Restrictions when changing settings are described in U39.3.2 Program Memory Cache Invalidate Strap."
hexmask.long 0x20 1.--31. 1. "Reserved_1,Reserved. The read value is always 0. The write value should always be 0."
bitfld.long 0x20 0. "MCACHE_INVLD_STRAP,Memory Cache Invalidate Strap." "0,1"
group.long 0xC0038++0x13
line.long 0x0 "DSPCNT0,Must be set to double_quotation0double_quotation before the global reset is released."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved. The read value is always 0. The write value should always be 0."
bitfld.long 0x0 0. "PLOAD_STOP,Suppress DSPIP program loading." "0,1"
line.long 0x4 "JTBYME0,Setting change prohibited while using JTAG."
hexmask.long 0x4 5.--31. 1. "Reserved_5,Reserved. The read value is always 0. The write value should always be 0."
bitfld.long 0x4 4. "JTAG_METHOD,JTAG method selection" "0: ;Cascade connection,1: ;Parallel connection"
rbitfld.long 0x4 3. "Reserved_3,Reserved. The read value is always 0. The write value should always be 0." "0,1"
bitfld.long 0x4 0.--2. "JTAG_BYPASS,VDSP Bypass mode" "0,1,2,3,4,5,6,7"
line.long 0x8 "OIE_I0,Must be set before the global reset is released."
hexmask.long 0x8 5.--31. 1. "Reserved_5,Reserved. The write value should always be 0."
bitfld.long 0x8 4. "OIE_I_DDMA_DBG_MATCH,DMA_MATCH Interrupt Enable (for INTC)" "0,1"
bitfld.long 0x8 3. "OIE_I_TIMER03,timer3_out Interrupt Enable (for INTC)" "0,1"
bitfld.long 0x8 2. "OIE_I_TIMER02,timer2_out Interrupt Enable (for INTC)" "0,1"
newline
bitfld.long 0x8 1. "OIE_I_TIMER01,timer1_out Interrupt Enable (for INTC)" "0,1"
bitfld.long 0x8 0. "OIE_I_TIMER00,timer0_out Interrupt Enable (for INTC)" "0,1"
line.long 0xC "OIC_I0,"
hexmask.long 0xC 5.--31. 1. "Reserved_5,Reserved. The write value should always be 0."
bitfld.long 0xC 4. "OIC_I_DDMA_DBG_MATCH,DMA_MATCH Interrupt Clear (for INTC)" "0,1"
bitfld.long 0xC 3. "OIC_I_TIMER03,timer3_out Interrupt Clear (for INTC)" "0,1"
bitfld.long 0xC 2. "OIC_I_TIMER02,timer2_out Interrupt Clear (for INTC)" "0,1"
newline
bitfld.long 0xC 1. "OIC_I_TIMER01,timer1_out Interrupt Clear (for INTC)" "0,1"
bitfld.long 0xC 0. "OIC_I_TIMER00,timer0_out Interrupt Clear (for INTC)" "0,1"
line.long 0x10 "OIM_I0,Must be set before the global reset is released."
hexmask.long 0x10 5.--31. 1. "Reserved_5,Reserved. The write value should always be 0."
bitfld.long 0x10 4. "OIM_I_DDMA_DBG_MATCH,DMA_MATCH Interrupt Mask (for INTC)" "0,1"
bitfld.long 0x10 3. "OIM_I_TIMER03,timer3_out Interrupt Mask (for INTC)" "0,1"
bitfld.long 0x10 2. "OIM_I_TIMER02,timer2_out Interrupt Mask (for INTC)" "0,1"
newline
bitfld.long 0x10 1. "OIM_I_TIMER01,timer1_out Interrupt Mask (for INTC)" "0,1"
bitfld.long 0x10 0. "OIM_I_TIMER00,timer0_out Interrupt Mask (for INTC)" "0,1"
rgroup.long 0xC004C++0x3
line.long 0x0 "OIS_I0,"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved. The read value is always 0."
bitfld.long 0x0 4. "OIS_I_DDMA_DBG_MATCH,DMA_MATCH Status (for INTC)" "0,1"
bitfld.long 0x0 3. "OIS_I_TIMER03,timer3_out Status (for INTC)" "0,1"
bitfld.long 0x0 2. "OIS_I_TIMER02,timer2_out Status (for INTC)" "0,1"
newline
bitfld.long 0x0 1. "OIS_I_TIMER01,timer1_out Status (for INTC)" "0,1"
bitfld.long 0x0 0. "OIS_I_TIMER00,timer0_out Status (for INTC)" "0,1"
group.long 0xC0050++0xB
line.long 0x0 "OIE_D0,Must be set before the global reset is released."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved. The write value should always be 0."
bitfld.long 0x0 4. "OIE_D_DDMA_DBG_MATCH,DMA_MATCH Interrupt Enable (for other VDSP)" "0,1"
bitfld.long 0x0 3. "OIE_D_TIMER03,timer3_out Interrupt Enable (for other VDSP)" "0,1"
bitfld.long 0x0 2. "OIE_D_TIMER02,timer2_out Interrupt Enable (for other VDSP)" "0,1"
newline
bitfld.long 0x0 1. "OIE_D_TIMER01,timer1_out Interrupt Enable (for other VDSP)" "0,1"
bitfld.long 0x0 0. "OIE_D_TIMER00,timer0_out Interrupt Enable (for other VDSP)" "0,1"
line.long 0x4 "OIC_D0,"
hexmask.long 0x4 5.--31. 1. "Reserved_5,Reserved. The write value should always be 0."
bitfld.long 0x4 4. "OIC_D_DDMA_DBG_MATCH,DMA_MATCH Interrupt Clear (for other VDSP)" "0,1"
bitfld.long 0x4 3. "OIC_D_TIMER03,timer3_out Interrupt Clear (for other VDSP)" "0,1"
bitfld.long 0x4 2. "OIC_D_TIMER02,timer2_out Interrupt Clear (for other VDSP)" "0,1"
newline
bitfld.long 0x4 1. "OIC_D_TIMER01,timer1_out Interrupt Clear (for other VDSP)" "0,1"
bitfld.long 0x4 0. "OIC_D_TIMER00,timer0_out Interrupt Clear (for other VDSP)" "0,1"
line.long 0x8 "OIM_D0,Must be set before the global reset is released."
hexmask.long 0x8 5.--31. 1. "Reserved_5,Reserved. The write value should always be 0."
bitfld.long 0x8 4. "OIM_D_DDMA_DBG_MATCH,DMA_MATCH Interrupt Mask (for other VDSP)" "0,1"
bitfld.long 0x8 3. "OIM_D_TIMER03,timer3_out Interrupt Mask (for other VDSP)" "0,1"
bitfld.long 0x8 2. "OIM_D_TIMER02,timer2_out Interrupt Mask (for other VDSP)" "0,1"
newline
bitfld.long 0x8 1. "OIM_D_TIMER01,timer1_out Interrupt Mask (for other VDSP)" "0,1"
bitfld.long 0x8 0. "OIM_D_TIMER00,timer0_out Interrupt Mask (for other VDSP)" "0,1"
rgroup.long 0xC005C++0x3
line.long 0x0 "OIS_D0,"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved. The read value is always 0."
bitfld.long 0x0 4. "OIS_D_DDMA_DBG_MATCH,DMA_MATCH Status (for other VDSP)" "0,1"
bitfld.long 0x0 3. "OIS_D_TIMER03,timer3_out Status (for other VDSP)" "0,1"
bitfld.long 0x0 2. "OIS_D_TIMER02,timer2_out Status (for other VDSP)" "0,1"
newline
bitfld.long 0x0 1. "OIS_D_TIMER01,timer1_out Status (for other VDSP)" "0,1"
bitfld.long 0x0 0. "OIS_D_TIMER00,timer0_out Status (for other VDSP)" "0,1"
rgroup.long 0xC0070++0x3
line.long 0x0 "FUNCTST0,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved. The read value is always 0."
bitfld.long 0x0 1. "FUNC_TEST_END,End of Test bit  set when a functional test is finished" "0,1"
bitfld.long 0x0 0. "FUNC_TEST_FAIL,Verification error bit  set if a functional test fails." "0,1"
rgroup.long 0xC0078++0xB
line.long 0x0 "OCMSTS0,"
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved. The read value is always 0."
bitfld.long 0x0 10. "DEBUG,OCEM debug mode indication" "0,1"
bitfld.long 0x0 9. "CORE_RST,OCEM reset signal to the core  active high" "0,1"
bitfld.long 0x0 8. "PSU_RTCK,Return Test Clock (tck synchronized to ceva_free_clk)" "0,1"
newline
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved. The read value is always 0."
hexmask.long.byte 0x0 0.--3. 1. "JTAG_STATE,JTAG state register."
line.long 0x4 "PSUSTS0,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved. The read value is always 0."
bitfld.long 0x4 3. "LIGHT_SLP_MD,light sleep mode indicaiton" "0,1"
bitfld.long 0x4 2. "STANDBY_MD,stanby mode indication" "0,1"
bitfld.long 0x4 1. "AXI_LOWPWR_ACK,AXI Low Power Acknowledge" "0,1"
newline
bitfld.long 0x4 0. "AXI_LOWPWR_INDI,AXI Low Power Active indication" "0,1"
line.long 0x8 "GPIOO0,"
hexmask.long 0x8 0.--31. 1. "GP_OUT,General-Purpose Outputs register."
rgroup.long 0xC0094++0x3
line.long 0x0 "VER10,"
hexmask.long 0x0 0.--31. 1. "RTL_REV,RTL Revision :0xYYMMDDHH"
tree.end
tree "VDSP_1"
base ad:0xF1600000
group.long 0xC0000++0x23
line.long 0x0 "IEV1,"
hexmask.long 0x0 0.--31. 1. "ICU_VEC_ADDR,External interrupt vector address register."
line.long 0x4 "IAL1,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved. The read value is always 0. The write value should always be 0."
bitfld.long 0x4 3. "ACU_SLV_LOCK,When asserted  the external masters only can change the DACU/IACU configuration." "0,1"
bitfld.long 0x4 2. "ACU_LOCK,DACU and IACU lock indication register." "0,1"
bitfld.long 0x4 1. "ICU_SLV_LOCK,When asserted  only the external masters can change the ICU configuration." "0,1"
newline
bitfld.long 0x4 0. "ICU_LOCK,ICU lock indication register." "0,1"
line.long 0x8 "TC1,"
hexmask.long.tbyte 0x8 8.--31. 1. "Reserved_8,Reserved. The read value is always 0. The write value should always be 0."
bitfld.long 0x8 7. "TIMER3_EN,Timer3 event enable register." "0,1"
bitfld.long 0x8 6. "TIMER2_EN,Timer2 event enable register." "0,1"
bitfld.long 0x8 5. "TIMER1_EN,Timer1 event enable register." "0,1"
newline
bitfld.long 0x8 4. "TIMER0_EN,Timer0 event enable register." "0,1"
bitfld.long 0x8 3. "TIMER3_RESET,Timer3 reset signal register." "0,1"
bitfld.long 0x8 2. "TIMER2_RESET,Timer2 reset signal register." "0,1"
bitfld.long 0x8 1. "TIMER1_RESET,Timer1 reset signal register." "0,1"
newline
bitfld.long 0x8 0. "TIMER0_RESET,Timer0 reset signal register." "0,1"
line.long 0xC "PC1,Restrictions when changing settings are described in double_quotationSensProandtrade; Architecture Specification Volume III (MSS)double_quotation 4.6.6 AXI Low-Power Interface.."
hexmask.long 0xC 1.--31. 1. "Reserved_1,Reserved. The read value is always 0. The write value should always be 0."
bitfld.long 0xC 0. "AXI_LOWPWR_REQ,AXI Low Power Request to switch Light Sleep to Standby and vice versa." "0,1"
line.long 0x10 "RV1,Restrictions when changing settings are described in U39.4.7 VDSP startup method."
hexmask.long 0x10 0.--31. 1. "RST_VEC_ADDR,External input - strapped for reset initial pc address."
line.long 0x14 "GPIOI1,"
hexmask.long 0x14 0.--31. 1. "GP_IN,General-Purpose Inputs."
line.long 0x18 "COREID1,Restrictions when changing settings are described in U39.4.7 VDSP startup method."
hexmask.long 0x18 0.--31. 1. "DSP_ID,The user can define the ID number of the core."
line.long 0x1C "DMACNT1,Restrictions when changing settings are described in U39.3.1Data DMA Debug Match for Breakpoint Generation."
hexmask.long 0x1C 2.--31. 1. "Reserved_2,Reserved. The read value is always 0. The write value should always be 0."
bitfld.long 0x1C 1. "DDMA_EXT_ACK,External Acknowledge for DDMA debug match." "0,1"
rbitfld.long 0x1C 0. "Reserved_0,Reserved. The write value should always be 0." "0,1"
line.long 0x20 "MCACHIVL1,Restrictions when changing settings are described in U39.3.2 Program Memory Cache Invalidate Strap."
hexmask.long 0x20 1.--31. 1. "Reserved_1,Reserved. The read value is always 0. The write value should always be 0."
bitfld.long 0x20 0. "MCACHE_INVLD_STRAP,Memory Cache Invalidate Strap." "0,1"
group.long 0xC0038++0x13
line.long 0x0 "DSPCNT1,Must be set to double_quotation0double_quotation before the global reset is released."
hexmask.long 0x0 1.--31. 1. "Reserved_1,Reserved. The read value is always 0. The write value should always be 0."
bitfld.long 0x0 0. "PLOAD_STOP,Suppress DSPIP program loading." "0,1"
line.long 0x4 "JTBYME1,Setting change prohibited while using JTAG."
hexmask.long 0x4 5.--31. 1. "Reserved_5,Reserved. The read value is always 0. The write value should always be 0."
bitfld.long 0x4 4. "JTAG_METHOD,JTAG method selection" "0: ;Cascade connection,1: ;Parallel connection"
rbitfld.long 0x4 3. "Reserved_3,Reserved. The read value is always 0. The write value should always be 0." "0,1"
bitfld.long 0x4 0.--2. "JTAG_BYPASS,VDSP Bypass mode" "0,1,2,3,4,5,6,7"
line.long 0x8 "OIE_I1,Must be set before the global reset is released."
hexmask.long 0x8 5.--31. 1. "Reserved_5,Reserved. The write value should always be 0."
bitfld.long 0x8 4. "OIE_I_DDMA_DBG_MATCH,DMA_MATCH Interrupt Enable (for INTC)" "0,1"
bitfld.long 0x8 3. "OIE_I_TIMER03,timer3_out Interrupt Enable (for INTC)" "0,1"
bitfld.long 0x8 2. "OIE_I_TIMER02,timer2_out Interrupt Enable (for INTC)" "0,1"
newline
bitfld.long 0x8 1. "OIE_I_TIMER01,timer1_out Interrupt Enable (for INTC)" "0,1"
bitfld.long 0x8 0. "OIE_I_TIMER00,timer0_out Interrupt Enable (for INTC)" "0,1"
line.long 0xC "OIC_I1,"
hexmask.long 0xC 5.--31. 1. "Reserved_5,Reserved. The write value should always be 0."
bitfld.long 0xC 4. "OIC_I_DDMA_DBG_MATCH,DMA_MATCH Interrupt Clear (for INTC)" "0,1"
bitfld.long 0xC 3. "OIC_I_TIMER03,timer3_out Interrupt Clear (for INTC)" "0,1"
bitfld.long 0xC 2. "OIC_I_TIMER02,timer2_out Interrupt Clear (for INTC)" "0,1"
newline
bitfld.long 0xC 1. "OIC_I_TIMER01,timer1_out Interrupt Clear (for INTC)" "0,1"
bitfld.long 0xC 0. "OIC_I_TIMER00,timer0_out Interrupt Clear (for INTC)" "0,1"
line.long 0x10 "OIM_I1,Must be set before the global reset is released."
hexmask.long 0x10 5.--31. 1. "Reserved_5,Reserved. The write value should always be 0."
bitfld.long 0x10 4. "OIM_I_DDMA_DBG_MATCH,DMA_MATCH Interrupt Mask (for INTC)" "0,1"
bitfld.long 0x10 3. "OIM_I_TIMER03,timer3_out Interrupt Mask (for INTC)" "0,1"
bitfld.long 0x10 2. "OIM_I_TIMER02,timer2_out Interrupt Mask (for INTC)" "0,1"
newline
bitfld.long 0x10 1. "OIM_I_TIMER01,timer1_out Interrupt Mask (for INTC)" "0,1"
bitfld.long 0x10 0. "OIM_I_TIMER00,timer0_out Interrupt Mask (for INTC)" "0,1"
rgroup.long 0xC004C++0x3
line.long 0x0 "OIS_I1,"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved. The read value is always 0."
bitfld.long 0x0 4. "OIS_I_DDMA_DBG_MATCH,DMA_MATCH Status (for INTC)" "0,1"
bitfld.long 0x0 3. "OIS_I_TIMER03,timer3_out Status (for INTC)" "0,1"
bitfld.long 0x0 2. "OIS_I_TIMER02,timer2_out Status (for INTC)" "0,1"
newline
bitfld.long 0x0 1. "OIS_I_TIMER01,timer1_out Status (for INTC)" "0,1"
bitfld.long 0x0 0. "OIS_I_TIMER00,timer0_out Status (for INTC)" "0,1"
group.long 0xC0050++0xB
line.long 0x0 "OIE_D1,Must be set before the global reset is released."
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved. The write value should always be 0."
bitfld.long 0x0 4. "OIE_D_DDMA_DBG_MATCH,DMA_MATCH Interrupt Enable (for other VDSP)" "0,1"
bitfld.long 0x0 3. "OIE_D_TIMER03,timer3_out Interrupt Enable (for other VDSP)" "0,1"
bitfld.long 0x0 2. "OIE_D_TIMER02,timer2_out Interrupt Enable (for other VDSP)" "0,1"
newline
bitfld.long 0x0 1. "OIE_D_TIMER01,timer1_out Interrupt Enable (for other VDSP)" "0,1"
bitfld.long 0x0 0. "OIE_D_TIMER00,timer0_out Interrupt Enable (for other VDSP)" "0,1"
line.long 0x4 "OIC_D1,"
hexmask.long 0x4 5.--31. 1. "Reserved_5,Reserved. The write value should always be 0."
bitfld.long 0x4 4. "OIC_D_DDMA_DBG_MATCH,DMA_MATCH Interrupt Clear (for other VDSP)" "0,1"
bitfld.long 0x4 3. "OIC_D_TIMER03,timer3_out Interrupt Clear (for other VDSP)" "0,1"
bitfld.long 0x4 2. "OIC_D_TIMER02,timer2_out Interrupt Clear (for other VDSP)" "0,1"
newline
bitfld.long 0x4 1. "OIC_D_TIMER01,timer1_out Interrupt Clear (for other VDSP)" "0,1"
bitfld.long 0x4 0. "OIC_D_TIMER00,timer0_out Interrupt Clear (for other VDSP)" "0,1"
line.long 0x8 "OIM_D1,Must be set before the global reset is released."
hexmask.long 0x8 5.--31. 1. "Reserved_5,Reserved. The write value should always be 0."
bitfld.long 0x8 4. "OIM_D_DDMA_DBG_MATCH,DMA_MATCH Interrupt Mask (for other VDSP)" "0,1"
bitfld.long 0x8 3. "OIM_D_TIMER03,timer3_out Interrupt Mask (for other VDSP)" "0,1"
bitfld.long 0x8 2. "OIM_D_TIMER02,timer2_out Interrupt Mask (for other VDSP)" "0,1"
newline
bitfld.long 0x8 1. "OIM_D_TIMER01,timer1_out Interrupt Mask (for other VDSP)" "0,1"
bitfld.long 0x8 0. "OIM_D_TIMER00,timer0_out Interrupt Mask (for other VDSP)" "0,1"
rgroup.long 0xC005C++0x3
line.long 0x0 "OIS_D1,"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved. The read value is always 0."
bitfld.long 0x0 4. "OIS_D_DDMA_DBG_MATCH,DMA_MATCH Status (for other VDSP)" "0,1"
bitfld.long 0x0 3. "OIS_D_TIMER03,timer3_out Status (for other VDSP)" "0,1"
bitfld.long 0x0 2. "OIS_D_TIMER02,timer2_out Status (for other VDSP)" "0,1"
newline
bitfld.long 0x0 1. "OIS_D_TIMER01,timer1_out Status (for other VDSP)" "0,1"
bitfld.long 0x0 0. "OIS_D_TIMER00,timer0_out Status (for other VDSP)" "0,1"
rgroup.long 0xC0070++0x3
line.long 0x0 "FUNCTST1,"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved. The read value is always 0."
bitfld.long 0x0 1. "FUNC_TEST_END,End of Test bit  set when a functional test is finished" "0,1"
bitfld.long 0x0 0. "FUNC_TEST_FAIL,Verification error bit  set if a functional test fails." "0,1"
rgroup.long 0xC0078++0xB
line.long 0x0 "OCMSTS1,"
hexmask.long.tbyte 0x0 11.--31. 1. "Reserved_11,Reserved. The read value is always 0."
bitfld.long 0x0 10. "DEBUG,OCEM debug mode indication" "0,1"
bitfld.long 0x0 9. "CORE_RST,OCEM reset signal to the core  active high" "0,1"
bitfld.long 0x0 8. "PSU_RTCK,Return Test Clock (tck synchronized to ceva_free_clk)" "0,1"
newline
hexmask.long.byte 0x0 4.--7. 1. "Reserved_4,Reserved. The read value is always 0."
hexmask.long.byte 0x0 0.--3. 1. "JTAG_STATE,JTAG state register."
line.long 0x4 "PSUSTS1,"
hexmask.long 0x4 4.--31. 1. "Reserved_4,Reserved. The read value is always 0."
bitfld.long 0x4 3. "LIGHT_SLP_MD,light sleep mode indicaiton" "0,1"
bitfld.long 0x4 2. "STANDBY_MD,stanby mode indication" "0,1"
bitfld.long 0x4 1. "AXI_LOWPWR_ACK,AXI Low Power Acknowledge" "0,1"
newline
bitfld.long 0x4 0. "AXI_LOWPWR_INDI,AXI Low Power Active indication" "0,1"
line.long 0x8 "GPIOO1,"
hexmask.long 0x8 0.--31. 1. "GP_OUT,General-Purpose Outputs register."
rgroup.long 0xC0094++0x3
line.long 0x0 "VER11,"
hexmask.long 0x0 0.--31. 1. "RTL_REV,RTL Revision :0xYYMMDDHH"
tree.end
tree.end
tree "VIN (Video Input Module)"
base ad:0x0
tree "VIN_0"
base ad:0xE6EF0000
group.long 0x0++0x3
line.long 0x0 "V0MC,Notes: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WLCEN,Write Line Counter Enable" "0: Disables the write line count,1: Enables the write line count"
hexmask.long.word 0x0 22.--30. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "FOC,Field Order Control" "0: Top field = Odd field,1: Top field = Even field"
rbitfld.long 0x0 19.--20. "Reserved_19,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 16.--18. "INF_2_0,Input Interface Format" "0: Setting prohibited,1: YUV422 8-bit or YUV420 8-bit input*1,?,?,?,?,?,?"
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "EXINF_1_0,Extension Interface Select" "0,1,2,3"
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "VUP,VIN Register Update Control" "0: The register contents are updated immediately..,1: The register contents are updated after a valid.."
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 6. "EN,Endian Type" "0: Image data is packed and allocated in little..,1: Image data is packed and allocated in big endian"
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 3.--4. "IM_1_0,Interlace Mode" "0: Odd-field,1: Odd-/even-field capture mode,?,?"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "ME,Module Enable" "0: The module operation is stopped,1: The module operation is enabled"
rgroup.long 0x4++0x3
line.long 0x0 "V0MS,Notes: Availability of channels: n = 0 to 15"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 3.--4. "FBS_1_0,Frame Buffer Status" "0: The latest valid frame buffer has the base..,1: The latest valid frame buffer has the base..,?,?"
newline
bitfld.long 0x0 2. "FS,Field Status" "0: The current field is an odd field,1: The current field is an even field"
bitfld.long 0x0 1. "AV,Active Video Status" "0: The current field is not in the active video area,1: The current field is in the active video area"
newline
bitfld.long 0x0 0. "CA,Video Capture Active Status" "0: Video capture is not operating,1: Video capture is operating"
group.long 0x8++0x13
line.long 0x0 "V0FC,Note: Availability of channels: n=0 to 15"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CC,Continuous Frame Capture Mode" "0: The continuous frame capture mode is not set,1: The continuous frame capture mode is set"
newline
bitfld.long 0x0 0. "SC,Single Frame Capture Mode" "0: The single frame capture mode is not set,1: The single frame capture mode is set"
line.long 0x4 "V0SLPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x4 0.--11. 1. "SLPrC_11_0,Start Line Pre-Clip"
line.long 0x8 "V0ELPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x8 0.--11. 1. "ELPrC_11_0,End Line Pre-Clip"
line.long 0xC "V0SPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0xC 0.--11. 1. "SPPrC_11_0,Start Pixel Pre-Clip"
line.long 0x10 "V0EPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x10 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x10 0.--11. 1. "EPPrC_11_0,End Pixel Pre-Clip"
group.long 0x2C++0xF
line.long 0x0 "V0IS,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 4.--15. 1. "IS_11_0,Image Stride"
newline
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved bits that indicate the lower-order four bits of the image stride."
line.long 0x4 "V0MB1,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 7.--31. 1. "MB1_24_0,Memory Base Address 1"
hexmask.long.byte 0x4 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 1 (a multiple of 128 bytes)."
line.long 0x8 "V0MB2,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "MB2_24_0,Memory Base Address 2"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 2 (a multiple of 128 bytes)."
line.long 0xC "V0MB3,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 7.--31. 1. "MB3_24_0,Memory Base Address 3"
hexmask.long.byte 0xC 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 3 (a multiple of 128 bytes)."
rgroup.long 0x3C++0x3
line.long 0x0 "V0LC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x0 0.--11. 1. "LC_11_0,Line Count"
group.long 0x40++0x7
line.long 0x0 "V0IE,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "FIE2,Field Interrupt Enable 2" "0: Field interrupts are disabled,1: Field interrupts are enabled"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x0 24. "WUE,Wake-up Notification Interrupt Enable" "0: Wake-up notification interrupts are disabled,1: Wake-up notification interrupts are enabled"
hexmask.long.byte 0x0 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "VFE,VSYNC Falling Edge Detect Interrupt Enable" "0: VSYNC falling edge detect interrupts are disabled,1: VSYNC falling edge detect interrupts are enabled"
bitfld.long 0x0 16. "VRE,VSYNC Rising Edge Detect Interrupt Enable" "0: VSYNC rising edge detect interrupts are disabled,1: VSYNC rising edge detect interrupts are enabled"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "FIE,Field Interrupt Enable" "0: Field-switching interrupts are disabled,1: Field-switching interrupts are enabled"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x0 1. "EFE,End of Frame Interrupt Enable" "0: End of frame interrupts are disabled,1: End of frame interrupts are enabled"
bitfld.long 0x0 0. "FOE,FIFO Overflow Interrupt Enable" "0: FIFO overflow interrupts are disabled,1: FIFO overflow interrupts are enabled"
line.long 0x4 "V0INTS,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x4 31. "FIS2,Field Interrupt Status 2" "0,1"
hexmask.long.byte 0x4 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x4 24. "WUS,Wake-up Notification Interrupt Status" "0,1"
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "VFS,VSYNC Falling Edge Detect Interrupt Status" "0,1"
bitfld.long 0x4 16. "VRS,VSYNC Rising Edge Detect Interrupt Status" "0,1"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "FIS,Field Interrupt Status" "0,1"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x4 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x4 1. "EFS,End of Frame Interrupt Status" "0,1"
bitfld.long 0x4 0. "FOS,FIFO Overflow Interrupt Status" "0,1"
group.long 0x58++0xB
line.long 0x0 "V0DMR,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "A8BIT_7_0,Alpha 8"
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x0 22. "FDS,Fill Data Select" "0: Fill data is 0,1: Fill data is sign data"
bitfld.long 0x0 19.--21. "RMODE_2_0,RAW Data Transfer Mode" "0: 8-bit RAW data,1: Setting prohibited,?,?,?,?,?,?"
newline
rbitfld.long 0x0 17.--18. "Reserved_17,Reserved" "0,1,2,3"
bitfld.long 0x0 16. "EVA,Even Field Address Offset" "0: Data are stored from the base address in..,1: Data are stored from the base address plus the.."
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 12.--14. "YMODE_2_0,YC Data Transfer Mode" "0: Both Y and CbCr data are transferred to memory,1: Only Y data is transferred to memory as 8-bit data,?,?,?,?,?,?"
newline
bitfld.long 0x0 11. "YC_THR,YC Data Through Mode" "0: Y and CbCr data are transferred to memory..,1: Y and CbCr data are transferred to memory as.."
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "EXRGB,Extension RGB Conversion Mode" "0: RGB data extension processing is not performed,1: Data is extended to 32-bit RGB conversion when.."
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "BPSM,Output Data Byte Swap Mode" "0: Bytes are not swapped in output data,1: Bytes are swapped in output data"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 2. "ABIT,Alpha Bit" "0: The alpha value is set to 0,1: The alpha value is set to 1"
bitfld.long 0x0 0.--1. "DTMD_1_0,Data Conversion Mode" "0: Data is not converted,1: RGB is converted to ARGB before output,?,?"
line.long 0x4 "V0DMR2,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "MFC,Multi Frame Capture Mode" "0: Disables multi frame capture mode,1: Enables multi frame capture mode"
newline
rbitfld.long 0x4 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x4 17. "FTEV,VSYNC Field Toggle Mode Enable" "0: The field toggle function according to the VSYNC..,1: The field toggle function according to the VSYNC.."
newline
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "VLV_3_0,VSYNC Field Toggle Mode Transition Period"
newline
hexmask.long.word 0x4 0.--11. 1. "Reserved_0,Reserved"
line.long 0x8 "V0UVAOF,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "UVAOF_24_0,UV Data Address Offset"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the 128-byte boundary of the UVAOF value."
rgroup.long 0xD4++0x3
line.long 0x0 "V0WLC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 30.--31. "SWFBS_1_0,Smallest Writing Frame Buffer Status" "0,1,2,3"
hexmask.long.word 0x0 16.--29. 1. "SWLC_13_0,Smallest Write Line Count"
newline
bitfld.long 0x0 14.--15. "WFBS_1_0,Writing Frame Buffer Status" "0: Frame buffer under writing has the base address..,1: Frame buffer under writing has the base address..,?,?"
hexmask.long.word 0x0 0.--13. 1. "WLC_13_0,Write Line Count"
group.long 0xF0++0xB
line.long 0x0 "V0IMWUCH,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WUMD,Wake Up Mode" "0: The WLC[13:0] bits value in the VnWLC,1: The SWLC[13:0] bits value in the VnWLC"
bitfld.long 0x0 30. "SVMD,Smallest Value Mode" "0: The SWLC[13:0] bits value between video channel..,1: The SWLC[13:0] bits value between the below.."
newline
hexmask.long.word 0x0 19.--29. 1. "Reserved_19,Reserved"
bitfld.long 0x0 18. "WUE3,Wake Up Enable 3" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
bitfld.long 0x0 17. "WUE2,Wake Up Enable 2" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
bitfld.long 0x0 16. "WUE1,Wake Up Enable 1" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "WUCH,Wake Up Enable" "0: Disables wake up notification to IMRn and VSPXn,1: Enables wake up notification to IMRn and VSPXn"
line.long 0x4 "V0IMWUL,Note: Availability of channels: n = 0 to 15"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "WUL2_13_0,Wake Up Line 2"
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "WUL1_13_0,Wake Up Line 1"
line.long 0x8 "V0IMWUL2,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x8 0.--13. 1. "WUL3_13_0,Wake Up Line 3"
group.long 0x320++0x1B
line.long 0x0 "V0FNSC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "HRCHK,HW Redundancy Error check" "0: Disable error of HW Redundancy detection,1: Enable error of HW Redundancy detection"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 26.--27. "HCEN_1_0,Enable Hsync Rise Time Measurement" "0: Disable Hsync rise time measurement,1: Enable minimum Hsync rise time measurement,?,?"
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 23. "CRM,CRC Calculation Mode" "0: Only calculate CRC,1: Input expected value and compare the CRC.."
rbitfld.long 0x0 21.--22. "Reserved_21,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 19.--20. "EDID_1_0,EDC ID" "0: Channel Selector,1: Prohibit,?,?"
bitfld.long 0x0 18. "FED_EN,FIFO EDC Enable" "0: Disable EDC error of Write FIFO detection,1: Enable EDC error of Write FIFO detection"
newline
bitfld.long 0x0 17. "CED_EN,Channel Selector EDC Enable" "0: Disable EDC error of channel selector detection,1: Enable EDC error of channel selector detection"
rbitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
bitfld.long 0x0 15. "EDCDEI,EDC Dummy Error Injection" "0: Not issue dummy EDC error,1: Issue dummy EDC error"
bitfld.long 0x0 14. "DEI,Dummy Error Injection" "0: Not issue dummy error,1: Issue dummy error"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
bitfld.long 0x0 11. "DEER_DM,Data Enable Assert Cycle Error Detection Mode" "0: Data enable assert cycle error is not detected,1: Data enable assert cycle error is detected"
newline
bitfld.long 0x0 9.--10. "DECE_1_0,Enable CLKENB Assert Cycle Measurement" "0: Disable Data enable assert cycle measurement,1: Enable minimum Data enable assert cycle..,?,?"
rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4.--5. "VSCE_1_0,Enable VSYNC Toggle Cycle Measurement" "0: Disable VSYNC toggle cycle measurement,1: Enable minimum VSYNC toggle cycle measurement,?,?"
bitfld.long 0x0 2.--3. "HSCE_1_0,Enable HSYNC Toggle Cycle Measurement" "0: Disable HSYNC toggle cycle measurement,1: Enable minimum HSYNC toggle cycle measurement,?,?"
newline
bitfld.long 0x0 0.--1. "FLCE_1_0,Enable FIELD Toggle Cycle Measurement" "0: Disable FIELD toggle cycle measurement,1: Enable minimum FIELD toggle cycle measurement,?,?"
line.long 0x4 "V0FTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "FLD_CNT_MIN_31_0,FIELD Toggle Cycle Minimum Value"
line.long 0x8 "V0FTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "FLD_CNT_MAX_31_0,FIELD Toggle Cycle Maximum Value"
line.long 0xC "V0HSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "HS_CNT_MIN_31_0,HSYNC Toggle Cycle Minimum Value"
line.long 0x10 "V0HSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x10 0.--31. 1. "HS_CNT_MAX_31_0,HSYNC Toggle Cycle Maximum Value"
line.long 0x14 "V0VSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x14 0.--31. 1. "VS_CNT_MIN_31_0,VSYNC Toggle Cycle Minimum Value"
line.long 0x18 "V0VSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x18 0.--31. 1. "VS_CNT_MAX_31_0,VSYNC Toggle Cycle Maximum Value"
group.long 0x344++0x3
line.long 0x0 "V0DET,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "DE_CNT_MAX_15_0,CLKENB Enable Cycle Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "DE_CNT_MIN_15_0,CLKENB Enable Cycle Minimum Value"
rgroup.long 0x354++0x3
line.long 0x0 "V0VCRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x0 0.--31. 1. "VCRC_31_0,VCRC Code"
group.long 0x36C++0x3
line.long 0x0 "V0HRT,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "HR_CNT_MAX_15_0,Hsync Rise Time Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "HR_CNT_MIN_15_0,Hsync Rise Time Minimum Value"
group.long 0x380++0xF
line.long 0x0 "V0CRCC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 29.--31. "IDBOE_2_0,Input Data Byte Order of Even line" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 26.--28. "Reserved_26,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 25. "Y420MD,YUV420 Mode" "0: Not YCbCr-420,1: YCbCr-420"
bitfld.long 0x0 24. "INSEL,Input Data Select" "0: Before image size clip,1: After image size clip"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 22. "IDRE,Input Data Reflection of Even line" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 18.--21. 1. "Reserved_18,Reserved"
bitfld.long 0x0 16.--17. "IDBLE_1_0,Input Data Byte length of Even line" "0: 1-byte data,1: 2-byte data,?,?"
newline
bitfld.long 0x0 13.--15. "IDBO_2_0,Input Data Byte Order" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 8.--12. 1. "PDBL_4_0,Polynomial Equation Coefficient Data Bit Length"
newline
bitfld.long 0x0 7. "ROR,Remainder Output Reflection" "0: No reflection,1: Apply reflection"
bitfld.long 0x0 6. "IDR,Input Data Reflection" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 2.--5. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "IDBL_1_0,Input Data Byte length" "0: 1-byte data,1: 2-byte data,?,?"
line.long 0x4 "V0CRPEC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "CPLYEC_31_0,CRC Polynomial Equation Coefficient"
line.long 0x8 "V0CRIR,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "CIR_31_0,CRC Initial Remainder"
line.long 0xC "V0CRXRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "CXORC_31_0,CRC Final XOR Coefficient"
group.long 0x3F0++0x7
line.long 0x0 "V0EE,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x0 16.--26. 1. "HREE_10_0,HW Redundancy Error Detection Interrupt Enable"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "CCEE,ECRC Comparison Error Detection Interrupt Enable" "0: ECRC comparison error detection interrupts are..,1: ECRC comparison error detection interrupts are.."
newline
bitfld.long 0x0 3. "EFEE,EDC of FIFO Error Detection Interrupt Enable" "0: EDC error of Write FIFO detection interrupts are..,1: EDC error of Write FIFO detection interrupts are.."
bitfld.long 0x0 2. "ECEE,EDC of Channel Selector Conversion Error Detection Interrupt Enable" "0: EDC error of Channel Selector conversion logic..,1: EDC error of Channel Selector conversion logic.."
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "SEE,Sync Interval Checker Error Detect Interrupt Enable" "0: Sync Interval Checker error detect interrupts..,1: Sync Interval Checker error detect interrupts.."
line.long 0x4 "V0ERS,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x4 16.--26. 1. "HRER_10_0,HW Redundancy Error Detection Interrupt Status"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "CCER,ECRC Comparison Error Detection Interrupt Status" "0,1"
newline
bitfld.long 0x4 3. "EFER,EDC of FIFO Error Detection Interrupt Status" "0,1"
bitfld.long 0x4 2. "ECER,EDC of Channel Selector Conversion Error Detection Interrupt Status" "0,1"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x4 0. "SER,Sync Interval Checker Error Detect Interrupt Status" "0,1"
tree.end
tree "VIN_1"
base ad:0xE6EF1000
group.long 0x0++0x3
line.long 0x0 "V1MC,Notes: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WLCEN,Write Line Counter Enable" "0: Disables the write line count,1: Enables the write line count"
hexmask.long.word 0x0 22.--30. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "FOC,Field Order Control" "0: Top field = Odd field,1: Top field = Even field"
rbitfld.long 0x0 19.--20. "Reserved_19,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 16.--18. "INF_2_0,Input Interface Format" "0: Setting prohibited,1: YUV422 8-bit or YUV420 8-bit input*1,?,?,?,?,?,?"
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "EXINF_1_0,Extension Interface Select" "0,1,2,3"
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "VUP,VIN Register Update Control" "0: The register contents are updated immediately..,1: The register contents are updated after a valid.."
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 6. "EN,Endian Type" "0: Image data is packed and allocated in little..,1: Image data is packed and allocated in big endian"
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 3.--4. "IM_1_0,Interlace Mode" "0: Odd-field,1: Odd-/even-field capture mode,?,?"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "ME,Module Enable" "0: The module operation is stopped,1: The module operation is enabled"
rgroup.long 0x4++0x3
line.long 0x0 "V1MS,Notes: Availability of channels: n = 0 to 15"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 3.--4. "FBS_1_0,Frame Buffer Status" "0: The latest valid frame buffer has the base..,1: The latest valid frame buffer has the base..,?,?"
newline
bitfld.long 0x0 2. "FS,Field Status" "0: The current field is an odd field,1: The current field is an even field"
bitfld.long 0x0 1. "AV,Active Video Status" "0: The current field is not in the active video area,1: The current field is in the active video area"
newline
bitfld.long 0x0 0. "CA,Video Capture Active Status" "0: Video capture is not operating,1: Video capture is operating"
group.long 0x8++0x13
line.long 0x0 "V1FC,Note: Availability of channels: n=0 to 15"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CC,Continuous Frame Capture Mode" "0: The continuous frame capture mode is not set,1: The continuous frame capture mode is set"
newline
bitfld.long 0x0 0. "SC,Single Frame Capture Mode" "0: The single frame capture mode is not set,1: The single frame capture mode is set"
line.long 0x4 "V1SLPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x4 0.--11. 1. "SLPrC_11_0,Start Line Pre-Clip"
line.long 0x8 "V1ELPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x8 0.--11. 1. "ELPrC_11_0,End Line Pre-Clip"
line.long 0xC "V1SPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0xC 0.--11. 1. "SPPrC_11_0,Start Pixel Pre-Clip"
line.long 0x10 "V1EPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x10 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x10 0.--11. 1. "EPPrC_11_0,End Pixel Pre-Clip"
group.long 0x2C++0xF
line.long 0x0 "V1IS,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 4.--15. 1. "IS_11_0,Image Stride"
newline
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved bits that indicate the lower-order four bits of the image stride."
line.long 0x4 "V1MB1,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 7.--31. 1. "MB1_24_0,Memory Base Address 1"
hexmask.long.byte 0x4 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 1 (a multiple of 128 bytes)."
line.long 0x8 "V1MB2,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "MB2_24_0,Memory Base Address 2"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 2 (a multiple of 128 bytes)."
line.long 0xC "V1MB3,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 7.--31. 1. "MB3_24_0,Memory Base Address 3"
hexmask.long.byte 0xC 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 3 (a multiple of 128 bytes)."
rgroup.long 0x3C++0x3
line.long 0x0 "V1LC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x0 0.--11. 1. "LC_11_0,Line Count"
group.long 0x40++0x7
line.long 0x0 "V1IE,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "FIE2,Field Interrupt Enable 2" "0: Field interrupts are disabled,1: Field interrupts are enabled"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x0 24. "WUE,Wake-up Notification Interrupt Enable" "0: Wake-up notification interrupts are disabled,1: Wake-up notification interrupts are enabled"
hexmask.long.byte 0x0 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "VFE,VSYNC Falling Edge Detect Interrupt Enable" "0: VSYNC falling edge detect interrupts are disabled,1: VSYNC falling edge detect interrupts are enabled"
bitfld.long 0x0 16. "VRE,VSYNC Rising Edge Detect Interrupt Enable" "0: VSYNC rising edge detect interrupts are disabled,1: VSYNC rising edge detect interrupts are enabled"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "FIE,Field Interrupt Enable" "0: Field-switching interrupts are disabled,1: Field-switching interrupts are enabled"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x0 1. "EFE,End of Frame Interrupt Enable" "0: End of frame interrupts are disabled,1: End of frame interrupts are enabled"
bitfld.long 0x0 0. "FOE,FIFO Overflow Interrupt Enable" "0: FIFO overflow interrupts are disabled,1: FIFO overflow interrupts are enabled"
line.long 0x4 "V1INTS,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x4 31. "FIS2,Field Interrupt Status 2" "0,1"
hexmask.long.byte 0x4 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x4 24. "WUS,Wake-up Notification Interrupt Status" "0,1"
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "VFS,VSYNC Falling Edge Detect Interrupt Status" "0,1"
bitfld.long 0x4 16. "VRS,VSYNC Rising Edge Detect Interrupt Status" "0,1"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "FIS,Field Interrupt Status" "0,1"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x4 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x4 1. "EFS,End of Frame Interrupt Status" "0,1"
bitfld.long 0x4 0. "FOS,FIFO Overflow Interrupt Status" "0,1"
group.long 0x58++0xB
line.long 0x0 "V1DMR,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "A8BIT_7_0,Alpha 8"
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x0 22. "FDS,Fill Data Select" "0: Fill data is 0,1: Fill data is sign data"
bitfld.long 0x0 19.--21. "RMODE_2_0,RAW Data Transfer Mode" "0: 8-bit RAW data,1: Setting prohibited,?,?,?,?,?,?"
newline
rbitfld.long 0x0 17.--18. "Reserved_17,Reserved" "0,1,2,3"
bitfld.long 0x0 16. "EVA,Even Field Address Offset" "0: Data are stored from the base address in..,1: Data are stored from the base address plus the.."
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 12.--14. "YMODE_2_0,YC Data Transfer Mode" "0: Both Y and CbCr data are transferred to memory,1: Only Y data is transferred to memory as 8-bit data,?,?,?,?,?,?"
newline
bitfld.long 0x0 11. "YC_THR,YC Data Through Mode" "0: Y and CbCr data are transferred to memory..,1: Y and CbCr data are transferred to memory as.."
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "EXRGB,Extension RGB Conversion Mode" "0: RGB data extension processing is not performed,1: Data is extended to 32-bit RGB conversion when.."
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "BPSM,Output Data Byte Swap Mode" "0: Bytes are not swapped in output data,1: Bytes are swapped in output data"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 2. "ABIT,Alpha Bit" "0: The alpha value is set to 0,1: The alpha value is set to 1"
bitfld.long 0x0 0.--1. "DTMD_1_0,Data Conversion Mode" "0: Data is not converted,1: RGB is converted to ARGB before output,?,?"
line.long 0x4 "V1DMR2,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "MFC,Multi Frame Capture Mode" "0: Disables multi frame capture mode,1: Enables multi frame capture mode"
newline
rbitfld.long 0x4 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x4 17. "FTEV,VSYNC Field Toggle Mode Enable" "0: The field toggle function according to the VSYNC..,1: The field toggle function according to the VSYNC.."
newline
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "VLV_3_0,VSYNC Field Toggle Mode Transition Period"
newline
hexmask.long.word 0x4 0.--11. 1. "Reserved_0,Reserved"
line.long 0x8 "V1UVAOF,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "UVAOF_24_0,UV Data Address Offset"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the 128-byte boundary of the UVAOF value."
rgroup.long 0xD4++0x3
line.long 0x0 "V1WLC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 30.--31. "SWFBS_1_0,Smallest Writing Frame Buffer Status" "0,1,2,3"
hexmask.long.word 0x0 16.--29. 1. "SWLC_13_0,Smallest Write Line Count"
newline
bitfld.long 0x0 14.--15. "WFBS_1_0,Writing Frame Buffer Status" "0: Frame buffer under writing has the base address..,1: Frame buffer under writing has the base address..,?,?"
hexmask.long.word 0x0 0.--13. 1. "WLC_13_0,Write Line Count"
group.long 0xF0++0xB
line.long 0x0 "V1IMWUCH,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WUMD,Wake Up Mode" "0: The WLC[13:0] bits value in the VnWLC,1: The SWLC[13:0] bits value in the VnWLC"
bitfld.long 0x0 30. "SVMD,Smallest Value Mode" "0: The SWLC[13:0] bits value between video channel..,1: The SWLC[13:0] bits value between the below.."
newline
hexmask.long.word 0x0 19.--29. 1. "Reserved_19,Reserved"
bitfld.long 0x0 18. "WUE3,Wake Up Enable 3" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
bitfld.long 0x0 17. "WUE2,Wake Up Enable 2" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
bitfld.long 0x0 16. "WUE1,Wake Up Enable 1" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "WUCH,Wake Up Enable" "0: Disables wake up notification to IMRn and VSPXn,1: Enables wake up notification to IMRn and VSPXn"
line.long 0x4 "V1IMWUL,Note: Availability of channels: n = 0 to 15"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "WUL2_13_0,Wake Up Line 2"
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "WUL1_13_0,Wake Up Line 1"
line.long 0x8 "V1IMWUL2,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x8 0.--13. 1. "WUL3_13_0,Wake Up Line 3"
group.long 0x320++0x1B
line.long 0x0 "V1FNSC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "HRCHK,HW Redundancy Error check" "0: Disable error of HW Redundancy detection,1: Enable error of HW Redundancy detection"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 26.--27. "HCEN_1_0,Enable Hsync Rise Time Measurement" "0: Disable Hsync rise time measurement,1: Enable minimum Hsync rise time measurement,?,?"
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 23. "CRM,CRC Calculation Mode" "0: Only calculate CRC,1: Input expected value and compare the CRC.."
rbitfld.long 0x0 21.--22. "Reserved_21,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 19.--20. "EDID_1_0,EDC ID" "0: Channel Selector,1: Prohibit,?,?"
bitfld.long 0x0 18. "FED_EN,FIFO EDC Enable" "0: Disable EDC error of Write FIFO detection,1: Enable EDC error of Write FIFO detection"
newline
bitfld.long 0x0 17. "CED_EN,Channel Selector EDC Enable" "0: Disable EDC error of channel selector detection,1: Enable EDC error of channel selector detection"
rbitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
bitfld.long 0x0 15. "EDCDEI,EDC Dummy Error Injection" "0: Not issue dummy EDC error,1: Issue dummy EDC error"
bitfld.long 0x0 14. "DEI,Dummy Error Injection" "0: Not issue dummy error,1: Issue dummy error"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
bitfld.long 0x0 11. "DEER_DM,Data Enable Assert Cycle Error Detection Mode" "0: Data enable assert cycle error is not detected,1: Data enable assert cycle error is detected"
newline
bitfld.long 0x0 9.--10. "DECE_1_0,Enable CLKENB Assert Cycle Measurement" "0: Disable Data enable assert cycle measurement,1: Enable minimum Data enable assert cycle..,?,?"
rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4.--5. "VSCE_1_0,Enable VSYNC Toggle Cycle Measurement" "0: Disable VSYNC toggle cycle measurement,1: Enable minimum VSYNC toggle cycle measurement,?,?"
bitfld.long 0x0 2.--3. "HSCE_1_0,Enable HSYNC Toggle Cycle Measurement" "0: Disable HSYNC toggle cycle measurement,1: Enable minimum HSYNC toggle cycle measurement,?,?"
newline
bitfld.long 0x0 0.--1. "FLCE_1_0,Enable FIELD Toggle Cycle Measurement" "0: Disable FIELD toggle cycle measurement,1: Enable minimum FIELD toggle cycle measurement,?,?"
line.long 0x4 "V1FTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "FLD_CNT_MIN_31_0,FIELD Toggle Cycle Minimum Value"
line.long 0x8 "V1FTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "FLD_CNT_MAX_31_0,FIELD Toggle Cycle Maximum Value"
line.long 0xC "V1HSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "HS_CNT_MIN_31_0,HSYNC Toggle Cycle Minimum Value"
line.long 0x10 "V1HSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x10 0.--31. 1. "HS_CNT_MAX_31_0,HSYNC Toggle Cycle Maximum Value"
line.long 0x14 "V1VSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x14 0.--31. 1. "VS_CNT_MIN_31_0,VSYNC Toggle Cycle Minimum Value"
line.long 0x18 "V1VSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x18 0.--31. 1. "VS_CNT_MAX_31_0,VSYNC Toggle Cycle Maximum Value"
group.long 0x344++0x3
line.long 0x0 "V1DET,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "DE_CNT_MAX_15_0,CLKENB Enable Cycle Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "DE_CNT_MIN_15_0,CLKENB Enable Cycle Minimum Value"
rgroup.long 0x354++0x3
line.long 0x0 "V1VCRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x0 0.--31. 1. "VCRC_31_0,VCRC Code"
group.long 0x36C++0x3
line.long 0x0 "V1HRT,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "HR_CNT_MAX_15_0,Hsync Rise Time Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "HR_CNT_MIN_15_0,Hsync Rise Time Minimum Value"
group.long 0x380++0xF
line.long 0x0 "V1CRCC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 29.--31. "IDBOE_2_0,Input Data Byte Order of Even line" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 26.--28. "Reserved_26,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 25. "Y420MD,YUV420 Mode" "0: Not YCbCr-420,1: YCbCr-420"
bitfld.long 0x0 24. "INSEL,Input Data Select" "0: Before image size clip,1: After image size clip"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 22. "IDRE,Input Data Reflection of Even line" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 18.--21. 1. "Reserved_18,Reserved"
bitfld.long 0x0 16.--17. "IDBLE_1_0,Input Data Byte length of Even line" "0: 1-byte data,1: 2-byte data,?,?"
newline
bitfld.long 0x0 13.--15. "IDBO_2_0,Input Data Byte Order" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 8.--12. 1. "PDBL_4_0,Polynomial Equation Coefficient Data Bit Length"
newline
bitfld.long 0x0 7. "ROR,Remainder Output Reflection" "0: No reflection,1: Apply reflection"
bitfld.long 0x0 6. "IDR,Input Data Reflection" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 2.--5. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "IDBL_1_0,Input Data Byte length" "0: 1-byte data,1: 2-byte data,?,?"
line.long 0x4 "V1CRPEC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "CPLYEC_31_0,CRC Polynomial Equation Coefficient"
line.long 0x8 "V1CRIR,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "CIR_31_0,CRC Initial Remainder"
line.long 0xC "V1CRXRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "CXORC_31_0,CRC Final XOR Coefficient"
group.long 0x3F0++0x7
line.long 0x0 "V1EE,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x0 16.--26. 1. "HREE_10_0,HW Redundancy Error Detection Interrupt Enable"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "CCEE,ECRC Comparison Error Detection Interrupt Enable" "0: ECRC comparison error detection interrupts are..,1: ECRC comparison error detection interrupts are.."
newline
bitfld.long 0x0 3. "EFEE,EDC of FIFO Error Detection Interrupt Enable" "0: EDC error of Write FIFO detection interrupts are..,1: EDC error of Write FIFO detection interrupts are.."
bitfld.long 0x0 2. "ECEE,EDC of Channel Selector Conversion Error Detection Interrupt Enable" "0: EDC error of Channel Selector conversion logic..,1: EDC error of Channel Selector conversion logic.."
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "SEE,Sync Interval Checker Error Detect Interrupt Enable" "0: Sync Interval Checker error detect interrupts..,1: Sync Interval Checker error detect interrupts.."
line.long 0x4 "V1ERS,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x4 16.--26. 1. "HRER_10_0,HW Redundancy Error Detection Interrupt Status"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "CCER,ECRC Comparison Error Detection Interrupt Status" "0,1"
newline
bitfld.long 0x4 3. "EFER,EDC of FIFO Error Detection Interrupt Status" "0,1"
bitfld.long 0x4 2. "ECER,EDC of Channel Selector Conversion Error Detection Interrupt Status" "0,1"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x4 0. "SER,Sync Interval Checker Error Detect Interrupt Status" "0,1"
tree.end
tree "VIN_2"
base ad:0xE6EF2000
group.long 0x0++0x3
line.long 0x0 "V2MC,Notes: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WLCEN,Write Line Counter Enable" "0: Disables the write line count,1: Enables the write line count"
hexmask.long.word 0x0 22.--30. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "FOC,Field Order Control" "0: Top field = Odd field,1: Top field = Even field"
rbitfld.long 0x0 19.--20. "Reserved_19,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 16.--18. "INF_2_0,Input Interface Format" "0: Setting prohibited,1: YUV422 8-bit or YUV420 8-bit input*1,?,?,?,?,?,?"
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "EXINF_1_0,Extension Interface Select" "0,1,2,3"
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "VUP,VIN Register Update Control" "0: The register contents are updated immediately..,1: The register contents are updated after a valid.."
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 6. "EN,Endian Type" "0: Image data is packed and allocated in little..,1: Image data is packed and allocated in big endian"
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 3.--4. "IM_1_0,Interlace Mode" "0: Odd-field,1: Odd-/even-field capture mode,?,?"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "ME,Module Enable" "0: The module operation is stopped,1: The module operation is enabled"
rgroup.long 0x4++0x3
line.long 0x0 "V2MS,Notes: Availability of channels: n = 0 to 15"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 3.--4. "FBS_1_0,Frame Buffer Status" "0: The latest valid frame buffer has the base..,1: The latest valid frame buffer has the base..,?,?"
newline
bitfld.long 0x0 2. "FS,Field Status" "0: The current field is an odd field,1: The current field is an even field"
bitfld.long 0x0 1. "AV,Active Video Status" "0: The current field is not in the active video area,1: The current field is in the active video area"
newline
bitfld.long 0x0 0. "CA,Video Capture Active Status" "0: Video capture is not operating,1: Video capture is operating"
group.long 0x8++0x13
line.long 0x0 "V2FC,Note: Availability of channels: n=0 to 15"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CC,Continuous Frame Capture Mode" "0: The continuous frame capture mode is not set,1: The continuous frame capture mode is set"
newline
bitfld.long 0x0 0. "SC,Single Frame Capture Mode" "0: The single frame capture mode is not set,1: The single frame capture mode is set"
line.long 0x4 "V2SLPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x4 0.--11. 1. "SLPrC_11_0,Start Line Pre-Clip"
line.long 0x8 "V2ELPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x8 0.--11. 1. "ELPrC_11_0,End Line Pre-Clip"
line.long 0xC "V2SPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0xC 0.--11. 1. "SPPrC_11_0,Start Pixel Pre-Clip"
line.long 0x10 "V2EPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x10 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x10 0.--11. 1. "EPPrC_11_0,End Pixel Pre-Clip"
group.long 0x2C++0xF
line.long 0x0 "V2IS,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 4.--15. 1. "IS_11_0,Image Stride"
newline
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved bits that indicate the lower-order four bits of the image stride."
line.long 0x4 "V2MB1,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 7.--31. 1. "MB1_24_0,Memory Base Address 1"
hexmask.long.byte 0x4 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 1 (a multiple of 128 bytes)."
line.long 0x8 "V2MB2,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "MB2_24_0,Memory Base Address 2"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 2 (a multiple of 128 bytes)."
line.long 0xC "V2MB3,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 7.--31. 1. "MB3_24_0,Memory Base Address 3"
hexmask.long.byte 0xC 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 3 (a multiple of 128 bytes)."
rgroup.long 0x3C++0x3
line.long 0x0 "V2LC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x0 0.--11. 1. "LC_11_0,Line Count"
group.long 0x40++0x7
line.long 0x0 "V2IE,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "FIE2,Field Interrupt Enable 2" "0: Field interrupts are disabled,1: Field interrupts are enabled"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x0 24. "WUE,Wake-up Notification Interrupt Enable" "0: Wake-up notification interrupts are disabled,1: Wake-up notification interrupts are enabled"
hexmask.long.byte 0x0 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "VFE,VSYNC Falling Edge Detect Interrupt Enable" "0: VSYNC falling edge detect interrupts are disabled,1: VSYNC falling edge detect interrupts are enabled"
bitfld.long 0x0 16. "VRE,VSYNC Rising Edge Detect Interrupt Enable" "0: VSYNC rising edge detect interrupts are disabled,1: VSYNC rising edge detect interrupts are enabled"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "FIE,Field Interrupt Enable" "0: Field-switching interrupts are disabled,1: Field-switching interrupts are enabled"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x0 1. "EFE,End of Frame Interrupt Enable" "0: End of frame interrupts are disabled,1: End of frame interrupts are enabled"
bitfld.long 0x0 0. "FOE,FIFO Overflow Interrupt Enable" "0: FIFO overflow interrupts are disabled,1: FIFO overflow interrupts are enabled"
line.long 0x4 "V2INTS,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x4 31. "FIS2,Field Interrupt Status 2" "0,1"
hexmask.long.byte 0x4 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x4 24. "WUS,Wake-up Notification Interrupt Status" "0,1"
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "VFS,VSYNC Falling Edge Detect Interrupt Status" "0,1"
bitfld.long 0x4 16. "VRS,VSYNC Rising Edge Detect Interrupt Status" "0,1"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "FIS,Field Interrupt Status" "0,1"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x4 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x4 1. "EFS,End of Frame Interrupt Status" "0,1"
bitfld.long 0x4 0. "FOS,FIFO Overflow Interrupt Status" "0,1"
group.long 0x58++0xB
line.long 0x0 "V2DMR,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "A8BIT_7_0,Alpha 8"
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x0 22. "FDS,Fill Data Select" "0: Fill data is 0,1: Fill data is sign data"
bitfld.long 0x0 19.--21. "RMODE_2_0,RAW Data Transfer Mode" "0: 8-bit RAW data,1: Setting prohibited,?,?,?,?,?,?"
newline
rbitfld.long 0x0 17.--18. "Reserved_17,Reserved" "0,1,2,3"
bitfld.long 0x0 16. "EVA,Even Field Address Offset" "0: Data are stored from the base address in..,1: Data are stored from the base address plus the.."
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 12.--14. "YMODE_2_0,YC Data Transfer Mode" "0: Both Y and CbCr data are transferred to memory,1: Only Y data is transferred to memory as 8-bit data,?,?,?,?,?,?"
newline
bitfld.long 0x0 11. "YC_THR,YC Data Through Mode" "0: Y and CbCr data are transferred to memory..,1: Y and CbCr data are transferred to memory as.."
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "EXRGB,Extension RGB Conversion Mode" "0: RGB data extension processing is not performed,1: Data is extended to 32-bit RGB conversion when.."
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "BPSM,Output Data Byte Swap Mode" "0: Bytes are not swapped in output data,1: Bytes are swapped in output data"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 2. "ABIT,Alpha Bit" "0: The alpha value is set to 0,1: The alpha value is set to 1"
bitfld.long 0x0 0.--1. "DTMD_1_0,Data Conversion Mode" "0: Data is not converted,1: RGB is converted to ARGB before output,?,?"
line.long 0x4 "V2DMR2,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "MFC,Multi Frame Capture Mode" "0: Disables multi frame capture mode,1: Enables multi frame capture mode"
newline
rbitfld.long 0x4 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x4 17. "FTEV,VSYNC Field Toggle Mode Enable" "0: The field toggle function according to the VSYNC..,1: The field toggle function according to the VSYNC.."
newline
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "VLV_3_0,VSYNC Field Toggle Mode Transition Period"
newline
hexmask.long.word 0x4 0.--11. 1. "Reserved_0,Reserved"
line.long 0x8 "V2UVAOF,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "UVAOF_24_0,UV Data Address Offset"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the 128-byte boundary of the UVAOF value."
rgroup.long 0xD4++0x3
line.long 0x0 "V2WLC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 30.--31. "SWFBS_1_0,Smallest Writing Frame Buffer Status" "0,1,2,3"
hexmask.long.word 0x0 16.--29. 1. "SWLC_13_0,Smallest Write Line Count"
newline
bitfld.long 0x0 14.--15. "WFBS_1_0,Writing Frame Buffer Status" "0: Frame buffer under writing has the base address..,1: Frame buffer under writing has the base address..,?,?"
hexmask.long.word 0x0 0.--13. 1. "WLC_13_0,Write Line Count"
group.long 0xF0++0xB
line.long 0x0 "V2IMWUCH,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WUMD,Wake Up Mode" "0: The WLC[13:0] bits value in the VnWLC,1: The SWLC[13:0] bits value in the VnWLC"
bitfld.long 0x0 30. "SVMD,Smallest Value Mode" "0: The SWLC[13:0] bits value between video channel..,1: The SWLC[13:0] bits value between the below.."
newline
hexmask.long.word 0x0 19.--29. 1. "Reserved_19,Reserved"
bitfld.long 0x0 18. "WUE3,Wake Up Enable 3" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
bitfld.long 0x0 17. "WUE2,Wake Up Enable 2" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
bitfld.long 0x0 16. "WUE1,Wake Up Enable 1" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "WUCH,Wake Up Enable" "0: Disables wake up notification to IMRn and VSPXn,1: Enables wake up notification to IMRn and VSPXn"
line.long 0x4 "V2IMWUL,Note: Availability of channels: n = 0 to 15"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "WUL2_13_0,Wake Up Line 2"
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "WUL1_13_0,Wake Up Line 1"
line.long 0x8 "V2IMWUL2,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x8 0.--13. 1. "WUL3_13_0,Wake Up Line 3"
group.long 0x320++0x1B
line.long 0x0 "V2FNSC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "HRCHK,HW Redundancy Error check" "0: Disable error of HW Redundancy detection,1: Enable error of HW Redundancy detection"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 26.--27. "HCEN_1_0,Enable Hsync Rise Time Measurement" "0: Disable Hsync rise time measurement,1: Enable minimum Hsync rise time measurement,?,?"
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 23. "CRM,CRC Calculation Mode" "0: Only calculate CRC,1: Input expected value and compare the CRC.."
rbitfld.long 0x0 21.--22. "Reserved_21,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 19.--20. "EDID_1_0,EDC ID" "0: Channel Selector,1: Prohibit,?,?"
bitfld.long 0x0 18. "FED_EN,FIFO EDC Enable" "0: Disable EDC error of Write FIFO detection,1: Enable EDC error of Write FIFO detection"
newline
bitfld.long 0x0 17. "CED_EN,Channel Selector EDC Enable" "0: Disable EDC error of channel selector detection,1: Enable EDC error of channel selector detection"
rbitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
bitfld.long 0x0 15. "EDCDEI,EDC Dummy Error Injection" "0: Not issue dummy EDC error,1: Issue dummy EDC error"
bitfld.long 0x0 14. "DEI,Dummy Error Injection" "0: Not issue dummy error,1: Issue dummy error"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
bitfld.long 0x0 11. "DEER_DM,Data Enable Assert Cycle Error Detection Mode" "0: Data enable assert cycle error is not detected,1: Data enable assert cycle error is detected"
newline
bitfld.long 0x0 9.--10. "DECE_1_0,Enable CLKENB Assert Cycle Measurement" "0: Disable Data enable assert cycle measurement,1: Enable minimum Data enable assert cycle..,?,?"
rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4.--5. "VSCE_1_0,Enable VSYNC Toggle Cycle Measurement" "0: Disable VSYNC toggle cycle measurement,1: Enable minimum VSYNC toggle cycle measurement,?,?"
bitfld.long 0x0 2.--3. "HSCE_1_0,Enable HSYNC Toggle Cycle Measurement" "0: Disable HSYNC toggle cycle measurement,1: Enable minimum HSYNC toggle cycle measurement,?,?"
newline
bitfld.long 0x0 0.--1. "FLCE_1_0,Enable FIELD Toggle Cycle Measurement" "0: Disable FIELD toggle cycle measurement,1: Enable minimum FIELD toggle cycle measurement,?,?"
line.long 0x4 "V2FTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "FLD_CNT_MIN_31_0,FIELD Toggle Cycle Minimum Value"
line.long 0x8 "V2FTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "FLD_CNT_MAX_31_0,FIELD Toggle Cycle Maximum Value"
line.long 0xC "V2HSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "HS_CNT_MIN_31_0,HSYNC Toggle Cycle Minimum Value"
line.long 0x10 "V2HSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x10 0.--31. 1. "HS_CNT_MAX_31_0,HSYNC Toggle Cycle Maximum Value"
line.long 0x14 "V2VSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x14 0.--31. 1. "VS_CNT_MIN_31_0,VSYNC Toggle Cycle Minimum Value"
line.long 0x18 "V2VSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x18 0.--31. 1. "VS_CNT_MAX_31_0,VSYNC Toggle Cycle Maximum Value"
group.long 0x344++0x3
line.long 0x0 "V2DET,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "DE_CNT_MAX_15_0,CLKENB Enable Cycle Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "DE_CNT_MIN_15_0,CLKENB Enable Cycle Minimum Value"
rgroup.long 0x354++0x3
line.long 0x0 "V2VCRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x0 0.--31. 1. "VCRC_31_0,VCRC Code"
group.long 0x36C++0x3
line.long 0x0 "V2HRT,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "HR_CNT_MAX_15_0,Hsync Rise Time Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "HR_CNT_MIN_15_0,Hsync Rise Time Minimum Value"
group.long 0x380++0xF
line.long 0x0 "V2CRCC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 29.--31. "IDBOE_2_0,Input Data Byte Order of Even line" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 26.--28. "Reserved_26,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 25. "Y420MD,YUV420 Mode" "0: Not YCbCr-420,1: YCbCr-420"
bitfld.long 0x0 24. "INSEL,Input Data Select" "0: Before image size clip,1: After image size clip"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 22. "IDRE,Input Data Reflection of Even line" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 18.--21. 1. "Reserved_18,Reserved"
bitfld.long 0x0 16.--17. "IDBLE_1_0,Input Data Byte length of Even line" "0: 1-byte data,1: 2-byte data,?,?"
newline
bitfld.long 0x0 13.--15. "IDBO_2_0,Input Data Byte Order" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 8.--12. 1. "PDBL_4_0,Polynomial Equation Coefficient Data Bit Length"
newline
bitfld.long 0x0 7. "ROR,Remainder Output Reflection" "0: No reflection,1: Apply reflection"
bitfld.long 0x0 6. "IDR,Input Data Reflection" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 2.--5. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "IDBL_1_0,Input Data Byte length" "0: 1-byte data,1: 2-byte data,?,?"
line.long 0x4 "V2CRPEC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "CPLYEC_31_0,CRC Polynomial Equation Coefficient"
line.long 0x8 "V2CRIR,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "CIR_31_0,CRC Initial Remainder"
line.long 0xC "V2CRXRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "CXORC_31_0,CRC Final XOR Coefficient"
group.long 0x3F0++0x7
line.long 0x0 "V2EE,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x0 16.--26. 1. "HREE_10_0,HW Redundancy Error Detection Interrupt Enable"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "CCEE,ECRC Comparison Error Detection Interrupt Enable" "0: ECRC comparison error detection interrupts are..,1: ECRC comparison error detection interrupts are.."
newline
bitfld.long 0x0 3. "EFEE,EDC of FIFO Error Detection Interrupt Enable" "0: EDC error of Write FIFO detection interrupts are..,1: EDC error of Write FIFO detection interrupts are.."
bitfld.long 0x0 2. "ECEE,EDC of Channel Selector Conversion Error Detection Interrupt Enable" "0: EDC error of Channel Selector conversion logic..,1: EDC error of Channel Selector conversion logic.."
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "SEE,Sync Interval Checker Error Detect Interrupt Enable" "0: Sync Interval Checker error detect interrupts..,1: Sync Interval Checker error detect interrupts.."
line.long 0x4 "V2ERS,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x4 16.--26. 1. "HRER_10_0,HW Redundancy Error Detection Interrupt Status"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "CCER,ECRC Comparison Error Detection Interrupt Status" "0,1"
newline
bitfld.long 0x4 3. "EFER,EDC of FIFO Error Detection Interrupt Status" "0,1"
bitfld.long 0x4 2. "ECER,EDC of Channel Selector Conversion Error Detection Interrupt Status" "0,1"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x4 0. "SER,Sync Interval Checker Error Detect Interrupt Status" "0,1"
tree.end
tree "VIN_3"
base ad:0xE6EF3000
group.long 0x0++0x3
line.long 0x0 "V3MC,Notes: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WLCEN,Write Line Counter Enable" "0: Disables the write line count,1: Enables the write line count"
hexmask.long.word 0x0 22.--30. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "FOC,Field Order Control" "0: Top field = Odd field,1: Top field = Even field"
rbitfld.long 0x0 19.--20. "Reserved_19,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 16.--18. "INF_2_0,Input Interface Format" "0: Setting prohibited,1: YUV422 8-bit or YUV420 8-bit input*1,?,?,?,?,?,?"
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "EXINF_1_0,Extension Interface Select" "0,1,2,3"
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "VUP,VIN Register Update Control" "0: The register contents are updated immediately..,1: The register contents are updated after a valid.."
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 6. "EN,Endian Type" "0: Image data is packed and allocated in little..,1: Image data is packed and allocated in big endian"
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 3.--4. "IM_1_0,Interlace Mode" "0: Odd-field,1: Odd-/even-field capture mode,?,?"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "ME,Module Enable" "0: The module operation is stopped,1: The module operation is enabled"
rgroup.long 0x4++0x3
line.long 0x0 "V3MS,Notes: Availability of channels: n = 0 to 15"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 3.--4. "FBS_1_0,Frame Buffer Status" "0: The latest valid frame buffer has the base..,1: The latest valid frame buffer has the base..,?,?"
newline
bitfld.long 0x0 2. "FS,Field Status" "0: The current field is an odd field,1: The current field is an even field"
bitfld.long 0x0 1. "AV,Active Video Status" "0: The current field is not in the active video area,1: The current field is in the active video area"
newline
bitfld.long 0x0 0. "CA,Video Capture Active Status" "0: Video capture is not operating,1: Video capture is operating"
group.long 0x8++0x13
line.long 0x0 "V3FC,Note: Availability of channels: n=0 to 15"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CC,Continuous Frame Capture Mode" "0: The continuous frame capture mode is not set,1: The continuous frame capture mode is set"
newline
bitfld.long 0x0 0. "SC,Single Frame Capture Mode" "0: The single frame capture mode is not set,1: The single frame capture mode is set"
line.long 0x4 "V3SLPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x4 0.--11. 1. "SLPrC_11_0,Start Line Pre-Clip"
line.long 0x8 "V3ELPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x8 0.--11. 1. "ELPrC_11_0,End Line Pre-Clip"
line.long 0xC "V3SPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0xC 0.--11. 1. "SPPrC_11_0,Start Pixel Pre-Clip"
line.long 0x10 "V3EPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x10 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x10 0.--11. 1. "EPPrC_11_0,End Pixel Pre-Clip"
group.long 0x2C++0xF
line.long 0x0 "V3IS,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 4.--15. 1. "IS_11_0,Image Stride"
newline
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved bits that indicate the lower-order four bits of the image stride."
line.long 0x4 "V3MB1,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 7.--31. 1. "MB1_24_0,Memory Base Address 1"
hexmask.long.byte 0x4 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 1 (a multiple of 128 bytes)."
line.long 0x8 "V3MB2,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "MB2_24_0,Memory Base Address 2"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 2 (a multiple of 128 bytes)."
line.long 0xC "V3MB3,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 7.--31. 1. "MB3_24_0,Memory Base Address 3"
hexmask.long.byte 0xC 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 3 (a multiple of 128 bytes)."
rgroup.long 0x3C++0x3
line.long 0x0 "V3LC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x0 0.--11. 1. "LC_11_0,Line Count"
group.long 0x40++0x7
line.long 0x0 "V3IE,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "FIE2,Field Interrupt Enable 2" "0: Field interrupts are disabled,1: Field interrupts are enabled"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x0 24. "WUE,Wake-up Notification Interrupt Enable" "0: Wake-up notification interrupts are disabled,1: Wake-up notification interrupts are enabled"
hexmask.long.byte 0x0 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "VFE,VSYNC Falling Edge Detect Interrupt Enable" "0: VSYNC falling edge detect interrupts are disabled,1: VSYNC falling edge detect interrupts are enabled"
bitfld.long 0x0 16. "VRE,VSYNC Rising Edge Detect Interrupt Enable" "0: VSYNC rising edge detect interrupts are disabled,1: VSYNC rising edge detect interrupts are enabled"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "FIE,Field Interrupt Enable" "0: Field-switching interrupts are disabled,1: Field-switching interrupts are enabled"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x0 1. "EFE,End of Frame Interrupt Enable" "0: End of frame interrupts are disabled,1: End of frame interrupts are enabled"
bitfld.long 0x0 0. "FOE,FIFO Overflow Interrupt Enable" "0: FIFO overflow interrupts are disabled,1: FIFO overflow interrupts are enabled"
line.long 0x4 "V3INTS,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x4 31. "FIS2,Field Interrupt Status 2" "0,1"
hexmask.long.byte 0x4 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x4 24. "WUS,Wake-up Notification Interrupt Status" "0,1"
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "VFS,VSYNC Falling Edge Detect Interrupt Status" "0,1"
bitfld.long 0x4 16. "VRS,VSYNC Rising Edge Detect Interrupt Status" "0,1"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "FIS,Field Interrupt Status" "0,1"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x4 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x4 1. "EFS,End of Frame Interrupt Status" "0,1"
bitfld.long 0x4 0. "FOS,FIFO Overflow Interrupt Status" "0,1"
group.long 0x58++0xB
line.long 0x0 "V3DMR,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "A8BIT_7_0,Alpha 8"
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x0 22. "FDS,Fill Data Select" "0: Fill data is 0,1: Fill data is sign data"
bitfld.long 0x0 19.--21. "RMODE_2_0,RAW Data Transfer Mode" "0: 8-bit RAW data,1: Setting prohibited,?,?,?,?,?,?"
newline
rbitfld.long 0x0 17.--18. "Reserved_17,Reserved" "0,1,2,3"
bitfld.long 0x0 16. "EVA,Even Field Address Offset" "0: Data are stored from the base address in..,1: Data are stored from the base address plus the.."
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 12.--14. "YMODE_2_0,YC Data Transfer Mode" "0: Both Y and CbCr data are transferred to memory,1: Only Y data is transferred to memory as 8-bit data,?,?,?,?,?,?"
newline
bitfld.long 0x0 11. "YC_THR,YC Data Through Mode" "0: Y and CbCr data are transferred to memory..,1: Y and CbCr data are transferred to memory as.."
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "EXRGB,Extension RGB Conversion Mode" "0: RGB data extension processing is not performed,1: Data is extended to 32-bit RGB conversion when.."
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "BPSM,Output Data Byte Swap Mode" "0: Bytes are not swapped in output data,1: Bytes are swapped in output data"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 2. "ABIT,Alpha Bit" "0: The alpha value is set to 0,1: The alpha value is set to 1"
bitfld.long 0x0 0.--1. "DTMD_1_0,Data Conversion Mode" "0: Data is not converted,1: RGB is converted to ARGB before output,?,?"
line.long 0x4 "V3DMR2,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "MFC,Multi Frame Capture Mode" "0: Disables multi frame capture mode,1: Enables multi frame capture mode"
newline
rbitfld.long 0x4 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x4 17. "FTEV,VSYNC Field Toggle Mode Enable" "0: The field toggle function according to the VSYNC..,1: The field toggle function according to the VSYNC.."
newline
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "VLV_3_0,VSYNC Field Toggle Mode Transition Period"
newline
hexmask.long.word 0x4 0.--11. 1. "Reserved_0,Reserved"
line.long 0x8 "V3UVAOF,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "UVAOF_24_0,UV Data Address Offset"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the 128-byte boundary of the UVAOF value."
rgroup.long 0xD4++0x3
line.long 0x0 "V3WLC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 30.--31. "SWFBS_1_0,Smallest Writing Frame Buffer Status" "0,1,2,3"
hexmask.long.word 0x0 16.--29. 1. "SWLC_13_0,Smallest Write Line Count"
newline
bitfld.long 0x0 14.--15. "WFBS_1_0,Writing Frame Buffer Status" "0: Frame buffer under writing has the base address..,1: Frame buffer under writing has the base address..,?,?"
hexmask.long.word 0x0 0.--13. 1. "WLC_13_0,Write Line Count"
group.long 0xF0++0xB
line.long 0x0 "V3IMWUCH,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WUMD,Wake Up Mode" "0: The WLC[13:0] bits value in the VnWLC,1: The SWLC[13:0] bits value in the VnWLC"
bitfld.long 0x0 30. "SVMD,Smallest Value Mode" "0: The SWLC[13:0] bits value between video channel..,1: The SWLC[13:0] bits value between the below.."
newline
hexmask.long.word 0x0 19.--29. 1. "Reserved_19,Reserved"
bitfld.long 0x0 18. "WUE3,Wake Up Enable 3" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
bitfld.long 0x0 17. "WUE2,Wake Up Enable 2" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
bitfld.long 0x0 16. "WUE1,Wake Up Enable 1" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "WUCH,Wake Up Enable" "0: Disables wake up notification to IMRn and VSPXn,1: Enables wake up notification to IMRn and VSPXn"
line.long 0x4 "V3IMWUL,Note: Availability of channels: n = 0 to 15"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "WUL2_13_0,Wake Up Line 2"
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "WUL1_13_0,Wake Up Line 1"
line.long 0x8 "V3IMWUL2,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x8 0.--13. 1. "WUL3_13_0,Wake Up Line 3"
group.long 0x320++0x1B
line.long 0x0 "V3FNSC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "HRCHK,HW Redundancy Error check" "0: Disable error of HW Redundancy detection,1: Enable error of HW Redundancy detection"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 26.--27. "HCEN_1_0,Enable Hsync Rise Time Measurement" "0: Disable Hsync rise time measurement,1: Enable minimum Hsync rise time measurement,?,?"
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 23. "CRM,CRC Calculation Mode" "0: Only calculate CRC,1: Input expected value and compare the CRC.."
rbitfld.long 0x0 21.--22. "Reserved_21,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 19.--20. "EDID_1_0,EDC ID" "0: Channel Selector,1: Prohibit,?,?"
bitfld.long 0x0 18. "FED_EN,FIFO EDC Enable" "0: Disable EDC error of Write FIFO detection,1: Enable EDC error of Write FIFO detection"
newline
bitfld.long 0x0 17. "CED_EN,Channel Selector EDC Enable" "0: Disable EDC error of channel selector detection,1: Enable EDC error of channel selector detection"
rbitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
bitfld.long 0x0 15. "EDCDEI,EDC Dummy Error Injection" "0: Not issue dummy EDC error,1: Issue dummy EDC error"
bitfld.long 0x0 14. "DEI,Dummy Error Injection" "0: Not issue dummy error,1: Issue dummy error"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
bitfld.long 0x0 11. "DEER_DM,Data Enable Assert Cycle Error Detection Mode" "0: Data enable assert cycle error is not detected,1: Data enable assert cycle error is detected"
newline
bitfld.long 0x0 9.--10. "DECE_1_0,Enable CLKENB Assert Cycle Measurement" "0: Disable Data enable assert cycle measurement,1: Enable minimum Data enable assert cycle..,?,?"
rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4.--5. "VSCE_1_0,Enable VSYNC Toggle Cycle Measurement" "0: Disable VSYNC toggle cycle measurement,1: Enable minimum VSYNC toggle cycle measurement,?,?"
bitfld.long 0x0 2.--3. "HSCE_1_0,Enable HSYNC Toggle Cycle Measurement" "0: Disable HSYNC toggle cycle measurement,1: Enable minimum HSYNC toggle cycle measurement,?,?"
newline
bitfld.long 0x0 0.--1. "FLCE_1_0,Enable FIELD Toggle Cycle Measurement" "0: Disable FIELD toggle cycle measurement,1: Enable minimum FIELD toggle cycle measurement,?,?"
line.long 0x4 "V3FTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "FLD_CNT_MIN_31_0,FIELD Toggle Cycle Minimum Value"
line.long 0x8 "V3FTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "FLD_CNT_MAX_31_0,FIELD Toggle Cycle Maximum Value"
line.long 0xC "V3HSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "HS_CNT_MIN_31_0,HSYNC Toggle Cycle Minimum Value"
line.long 0x10 "V3HSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x10 0.--31. 1. "HS_CNT_MAX_31_0,HSYNC Toggle Cycle Maximum Value"
line.long 0x14 "V3VSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x14 0.--31. 1. "VS_CNT_MIN_31_0,VSYNC Toggle Cycle Minimum Value"
line.long 0x18 "V3VSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x18 0.--31. 1. "VS_CNT_MAX_31_0,VSYNC Toggle Cycle Maximum Value"
group.long 0x344++0x3
line.long 0x0 "V3DET,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "DE_CNT_MAX_15_0,CLKENB Enable Cycle Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "DE_CNT_MIN_15_0,CLKENB Enable Cycle Minimum Value"
rgroup.long 0x354++0x3
line.long 0x0 "V3VCRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x0 0.--31. 1. "VCRC_31_0,VCRC Code"
group.long 0x36C++0x3
line.long 0x0 "V3HRT,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "HR_CNT_MAX_15_0,Hsync Rise Time Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "HR_CNT_MIN_15_0,Hsync Rise Time Minimum Value"
group.long 0x380++0xF
line.long 0x0 "V3CRCC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 29.--31. "IDBOE_2_0,Input Data Byte Order of Even line" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 26.--28. "Reserved_26,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 25. "Y420MD,YUV420 Mode" "0: Not YCbCr-420,1: YCbCr-420"
bitfld.long 0x0 24. "INSEL,Input Data Select" "0: Before image size clip,1: After image size clip"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 22. "IDRE,Input Data Reflection of Even line" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 18.--21. 1. "Reserved_18,Reserved"
bitfld.long 0x0 16.--17. "IDBLE_1_0,Input Data Byte length of Even line" "0: 1-byte data,1: 2-byte data,?,?"
newline
bitfld.long 0x0 13.--15. "IDBO_2_0,Input Data Byte Order" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 8.--12. 1. "PDBL_4_0,Polynomial Equation Coefficient Data Bit Length"
newline
bitfld.long 0x0 7. "ROR,Remainder Output Reflection" "0: No reflection,1: Apply reflection"
bitfld.long 0x0 6. "IDR,Input Data Reflection" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 2.--5. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "IDBL_1_0,Input Data Byte length" "0: 1-byte data,1: 2-byte data,?,?"
line.long 0x4 "V3CRPEC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "CPLYEC_31_0,CRC Polynomial Equation Coefficient"
line.long 0x8 "V3CRIR,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "CIR_31_0,CRC Initial Remainder"
line.long 0xC "V3CRXRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "CXORC_31_0,CRC Final XOR Coefficient"
group.long 0x3F0++0x7
line.long 0x0 "V3EE,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x0 16.--26. 1. "HREE_10_0,HW Redundancy Error Detection Interrupt Enable"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "CCEE,ECRC Comparison Error Detection Interrupt Enable" "0: ECRC comparison error detection interrupts are..,1: ECRC comparison error detection interrupts are.."
newline
bitfld.long 0x0 3. "EFEE,EDC of FIFO Error Detection Interrupt Enable" "0: EDC error of Write FIFO detection interrupts are..,1: EDC error of Write FIFO detection interrupts are.."
bitfld.long 0x0 2. "ECEE,EDC of Channel Selector Conversion Error Detection Interrupt Enable" "0: EDC error of Channel Selector conversion logic..,1: EDC error of Channel Selector conversion logic.."
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "SEE,Sync Interval Checker Error Detect Interrupt Enable" "0: Sync Interval Checker error detect interrupts..,1: Sync Interval Checker error detect interrupts.."
line.long 0x4 "V3ERS,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x4 16.--26. 1. "HRER_10_0,HW Redundancy Error Detection Interrupt Status"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "CCER,ECRC Comparison Error Detection Interrupt Status" "0,1"
newline
bitfld.long 0x4 3. "EFER,EDC of FIFO Error Detection Interrupt Status" "0,1"
bitfld.long 0x4 2. "ECER,EDC of Channel Selector Conversion Error Detection Interrupt Status" "0,1"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x4 0. "SER,Sync Interval Checker Error Detect Interrupt Status" "0,1"
tree.end
tree "VIN_4"
base ad:0xE6EF4000
group.long 0x0++0x3
line.long 0x0 "V4MC,Notes: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WLCEN,Write Line Counter Enable" "0: Disables the write line count,1: Enables the write line count"
hexmask.long.word 0x0 22.--30. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "FOC,Field Order Control" "0: Top field = Odd field,1: Top field = Even field"
rbitfld.long 0x0 19.--20. "Reserved_19,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 16.--18. "INF_2_0,Input Interface Format" "0: Setting prohibited,1: YUV422 8-bit or YUV420 8-bit input*1,?,?,?,?,?,?"
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "EXINF_1_0,Extension Interface Select" "0,1,2,3"
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "VUP,VIN Register Update Control" "0: The register contents are updated immediately..,1: The register contents are updated after a valid.."
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 6. "EN,Endian Type" "0: Image data is packed and allocated in little..,1: Image data is packed and allocated in big endian"
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 3.--4. "IM_1_0,Interlace Mode" "0: Odd-field,1: Odd-/even-field capture mode,?,?"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "ME,Module Enable" "0: The module operation is stopped,1: The module operation is enabled"
rgroup.long 0x4++0x3
line.long 0x0 "V4MS,Notes: Availability of channels: n = 0 to 15"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 3.--4. "FBS_1_0,Frame Buffer Status" "0: The latest valid frame buffer has the base..,1: The latest valid frame buffer has the base..,?,?"
newline
bitfld.long 0x0 2. "FS,Field Status" "0: The current field is an odd field,1: The current field is an even field"
bitfld.long 0x0 1. "AV,Active Video Status" "0: The current field is not in the active video area,1: The current field is in the active video area"
newline
bitfld.long 0x0 0. "CA,Video Capture Active Status" "0: Video capture is not operating,1: Video capture is operating"
group.long 0x8++0x13
line.long 0x0 "V4FC,Note: Availability of channels: n=0 to 15"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CC,Continuous Frame Capture Mode" "0: The continuous frame capture mode is not set,1: The continuous frame capture mode is set"
newline
bitfld.long 0x0 0. "SC,Single Frame Capture Mode" "0: The single frame capture mode is not set,1: The single frame capture mode is set"
line.long 0x4 "V4SLPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x4 0.--11. 1. "SLPrC_11_0,Start Line Pre-Clip"
line.long 0x8 "V4ELPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x8 0.--11. 1. "ELPrC_11_0,End Line Pre-Clip"
line.long 0xC "V4SPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0xC 0.--11. 1. "SPPrC_11_0,Start Pixel Pre-Clip"
line.long 0x10 "V4EPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x10 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x10 0.--11. 1. "EPPrC_11_0,End Pixel Pre-Clip"
group.long 0x2C++0xF
line.long 0x0 "V4IS,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 4.--15. 1. "IS_11_0,Image Stride"
newline
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved bits that indicate the lower-order four bits of the image stride."
line.long 0x4 "V4MB1,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 7.--31. 1. "MB1_24_0,Memory Base Address 1"
hexmask.long.byte 0x4 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 1 (a multiple of 128 bytes)."
line.long 0x8 "V4MB2,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "MB2_24_0,Memory Base Address 2"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 2 (a multiple of 128 bytes)."
line.long 0xC "V4MB3,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 7.--31. 1. "MB3_24_0,Memory Base Address 3"
hexmask.long.byte 0xC 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 3 (a multiple of 128 bytes)."
rgroup.long 0x3C++0x3
line.long 0x0 "V4LC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x0 0.--11. 1. "LC_11_0,Line Count"
group.long 0x40++0x7
line.long 0x0 "V4IE,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "FIE2,Field Interrupt Enable 2" "0: Field interrupts are disabled,1: Field interrupts are enabled"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x0 24. "WUE,Wake-up Notification Interrupt Enable" "0: Wake-up notification interrupts are disabled,1: Wake-up notification interrupts are enabled"
hexmask.long.byte 0x0 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "VFE,VSYNC Falling Edge Detect Interrupt Enable" "0: VSYNC falling edge detect interrupts are disabled,1: VSYNC falling edge detect interrupts are enabled"
bitfld.long 0x0 16. "VRE,VSYNC Rising Edge Detect Interrupt Enable" "0: VSYNC rising edge detect interrupts are disabled,1: VSYNC rising edge detect interrupts are enabled"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "FIE,Field Interrupt Enable" "0: Field-switching interrupts are disabled,1: Field-switching interrupts are enabled"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x0 1. "EFE,End of Frame Interrupt Enable" "0: End of frame interrupts are disabled,1: End of frame interrupts are enabled"
bitfld.long 0x0 0. "FOE,FIFO Overflow Interrupt Enable" "0: FIFO overflow interrupts are disabled,1: FIFO overflow interrupts are enabled"
line.long 0x4 "V4INTS,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x4 31. "FIS2,Field Interrupt Status 2" "0,1"
hexmask.long.byte 0x4 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x4 24. "WUS,Wake-up Notification Interrupt Status" "0,1"
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "VFS,VSYNC Falling Edge Detect Interrupt Status" "0,1"
bitfld.long 0x4 16. "VRS,VSYNC Rising Edge Detect Interrupt Status" "0,1"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "FIS,Field Interrupt Status" "0,1"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x4 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x4 1. "EFS,End of Frame Interrupt Status" "0,1"
bitfld.long 0x4 0. "FOS,FIFO Overflow Interrupt Status" "0,1"
group.long 0x58++0xB
line.long 0x0 "V4DMR,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "A8BIT_7_0,Alpha 8"
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x0 22. "FDS,Fill Data Select" "0: Fill data is 0,1: Fill data is sign data"
bitfld.long 0x0 19.--21. "RMODE_2_0,RAW Data Transfer Mode" "0: 8-bit RAW data,1: Setting prohibited,?,?,?,?,?,?"
newline
rbitfld.long 0x0 17.--18. "Reserved_17,Reserved" "0,1,2,3"
bitfld.long 0x0 16. "EVA,Even Field Address Offset" "0: Data are stored from the base address in..,1: Data are stored from the base address plus the.."
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 12.--14. "YMODE_2_0,YC Data Transfer Mode" "0: Both Y and CbCr data are transferred to memory,1: Only Y data is transferred to memory as 8-bit data,?,?,?,?,?,?"
newline
bitfld.long 0x0 11. "YC_THR,YC Data Through Mode" "0: Y and CbCr data are transferred to memory..,1: Y and CbCr data are transferred to memory as.."
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "EXRGB,Extension RGB Conversion Mode" "0: RGB data extension processing is not performed,1: Data is extended to 32-bit RGB conversion when.."
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "BPSM,Output Data Byte Swap Mode" "0: Bytes are not swapped in output data,1: Bytes are swapped in output data"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 2. "ABIT,Alpha Bit" "0: The alpha value is set to 0,1: The alpha value is set to 1"
bitfld.long 0x0 0.--1. "DTMD_1_0,Data Conversion Mode" "0: Data is not converted,1: RGB is converted to ARGB before output,?,?"
line.long 0x4 "V4DMR2,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "MFC,Multi Frame Capture Mode" "0: Disables multi frame capture mode,1: Enables multi frame capture mode"
newline
rbitfld.long 0x4 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x4 17. "FTEV,VSYNC Field Toggle Mode Enable" "0: The field toggle function according to the VSYNC..,1: The field toggle function according to the VSYNC.."
newline
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "VLV_3_0,VSYNC Field Toggle Mode Transition Period"
newline
hexmask.long.word 0x4 0.--11. 1. "Reserved_0,Reserved"
line.long 0x8 "V4UVAOF,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "UVAOF_24_0,UV Data Address Offset"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the 128-byte boundary of the UVAOF value."
rgroup.long 0xD4++0x3
line.long 0x0 "V4WLC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 30.--31. "SWFBS_1_0,Smallest Writing Frame Buffer Status" "0,1,2,3"
hexmask.long.word 0x0 16.--29. 1. "SWLC_13_0,Smallest Write Line Count"
newline
bitfld.long 0x0 14.--15. "WFBS_1_0,Writing Frame Buffer Status" "0: Frame buffer under writing has the base address..,1: Frame buffer under writing has the base address..,?,?"
hexmask.long.word 0x0 0.--13. 1. "WLC_13_0,Write Line Count"
group.long 0xF0++0xB
line.long 0x0 "V4IMWUCH,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WUMD,Wake Up Mode" "0: The WLC[13:0] bits value in the VnWLC,1: The SWLC[13:0] bits value in the VnWLC"
bitfld.long 0x0 30. "SVMD,Smallest Value Mode" "0: The SWLC[13:0] bits value between video channel..,1: The SWLC[13:0] bits value between the below.."
newline
hexmask.long.word 0x0 19.--29. 1. "Reserved_19,Reserved"
bitfld.long 0x0 18. "WUE3,Wake Up Enable 3" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
bitfld.long 0x0 17. "WUE2,Wake Up Enable 2" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
bitfld.long 0x0 16. "WUE1,Wake Up Enable 1" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "WUCH,Wake Up Enable" "0: Disables wake up notification to IMRn and VSPXn,1: Enables wake up notification to IMRn and VSPXn"
line.long 0x4 "V4IMWUL,Note: Availability of channels: n = 0 to 15"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "WUL2_13_0,Wake Up Line 2"
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "WUL1_13_0,Wake Up Line 1"
line.long 0x8 "V4IMWUL2,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x8 0.--13. 1. "WUL3_13_0,Wake Up Line 3"
group.long 0x320++0x1B
line.long 0x0 "V4FNSC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "HRCHK,HW Redundancy Error check" "0: Disable error of HW Redundancy detection,1: Enable error of HW Redundancy detection"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 26.--27. "HCEN_1_0,Enable Hsync Rise Time Measurement" "0: Disable Hsync rise time measurement,1: Enable minimum Hsync rise time measurement,?,?"
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 23. "CRM,CRC Calculation Mode" "0: Only calculate CRC,1: Input expected value and compare the CRC.."
rbitfld.long 0x0 21.--22. "Reserved_21,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 19.--20. "EDID_1_0,EDC ID" "0: Channel Selector,1: Prohibit,?,?"
bitfld.long 0x0 18. "FED_EN,FIFO EDC Enable" "0: Disable EDC error of Write FIFO detection,1: Enable EDC error of Write FIFO detection"
newline
bitfld.long 0x0 17. "CED_EN,Channel Selector EDC Enable" "0: Disable EDC error of channel selector detection,1: Enable EDC error of channel selector detection"
rbitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
bitfld.long 0x0 15. "EDCDEI,EDC Dummy Error Injection" "0: Not issue dummy EDC error,1: Issue dummy EDC error"
bitfld.long 0x0 14. "DEI,Dummy Error Injection" "0: Not issue dummy error,1: Issue dummy error"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
bitfld.long 0x0 11. "DEER_DM,Data Enable Assert Cycle Error Detection Mode" "0: Data enable assert cycle error is not detected,1: Data enable assert cycle error is detected"
newline
bitfld.long 0x0 9.--10. "DECE_1_0,Enable CLKENB Assert Cycle Measurement" "0: Disable Data enable assert cycle measurement,1: Enable minimum Data enable assert cycle..,?,?"
rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4.--5. "VSCE_1_0,Enable VSYNC Toggle Cycle Measurement" "0: Disable VSYNC toggle cycle measurement,1: Enable minimum VSYNC toggle cycle measurement,?,?"
bitfld.long 0x0 2.--3. "HSCE_1_0,Enable HSYNC Toggle Cycle Measurement" "0: Disable HSYNC toggle cycle measurement,1: Enable minimum HSYNC toggle cycle measurement,?,?"
newline
bitfld.long 0x0 0.--1. "FLCE_1_0,Enable FIELD Toggle Cycle Measurement" "0: Disable FIELD toggle cycle measurement,1: Enable minimum FIELD toggle cycle measurement,?,?"
line.long 0x4 "V4FTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "FLD_CNT_MIN_31_0,FIELD Toggle Cycle Minimum Value"
line.long 0x8 "V4FTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "FLD_CNT_MAX_31_0,FIELD Toggle Cycle Maximum Value"
line.long 0xC "V4HSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "HS_CNT_MIN_31_0,HSYNC Toggle Cycle Minimum Value"
line.long 0x10 "V4HSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x10 0.--31. 1. "HS_CNT_MAX_31_0,HSYNC Toggle Cycle Maximum Value"
line.long 0x14 "V4VSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x14 0.--31. 1. "VS_CNT_MIN_31_0,VSYNC Toggle Cycle Minimum Value"
line.long 0x18 "V4VSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x18 0.--31. 1. "VS_CNT_MAX_31_0,VSYNC Toggle Cycle Maximum Value"
group.long 0x344++0x3
line.long 0x0 "V4DET,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "DE_CNT_MAX_15_0,CLKENB Enable Cycle Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "DE_CNT_MIN_15_0,CLKENB Enable Cycle Minimum Value"
rgroup.long 0x354++0x3
line.long 0x0 "V4VCRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x0 0.--31. 1. "VCRC_31_0,VCRC Code"
group.long 0x36C++0x3
line.long 0x0 "V4HRT,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "HR_CNT_MAX_15_0,Hsync Rise Time Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "HR_CNT_MIN_15_0,Hsync Rise Time Minimum Value"
group.long 0x380++0xF
line.long 0x0 "V4CRCC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 29.--31. "IDBOE_2_0,Input Data Byte Order of Even line" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 26.--28. "Reserved_26,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 25. "Y420MD,YUV420 Mode" "0: Not YCbCr-420,1: YCbCr-420"
bitfld.long 0x0 24. "INSEL,Input Data Select" "0: Before image size clip,1: After image size clip"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 22. "IDRE,Input Data Reflection of Even line" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 18.--21. 1. "Reserved_18,Reserved"
bitfld.long 0x0 16.--17. "IDBLE_1_0,Input Data Byte length of Even line" "0: 1-byte data,1: 2-byte data,?,?"
newline
bitfld.long 0x0 13.--15. "IDBO_2_0,Input Data Byte Order" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 8.--12. 1. "PDBL_4_0,Polynomial Equation Coefficient Data Bit Length"
newline
bitfld.long 0x0 7. "ROR,Remainder Output Reflection" "0: No reflection,1: Apply reflection"
bitfld.long 0x0 6. "IDR,Input Data Reflection" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 2.--5. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "IDBL_1_0,Input Data Byte length" "0: 1-byte data,1: 2-byte data,?,?"
line.long 0x4 "V4CRPEC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "CPLYEC_31_0,CRC Polynomial Equation Coefficient"
line.long 0x8 "V4CRIR,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "CIR_31_0,CRC Initial Remainder"
line.long 0xC "V4CRXRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "CXORC_31_0,CRC Final XOR Coefficient"
group.long 0x3F0++0x7
line.long 0x0 "V4EE,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x0 16.--26. 1. "HREE_10_0,HW Redundancy Error Detection Interrupt Enable"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "CCEE,ECRC Comparison Error Detection Interrupt Enable" "0: ECRC comparison error detection interrupts are..,1: ECRC comparison error detection interrupts are.."
newline
bitfld.long 0x0 3. "EFEE,EDC of FIFO Error Detection Interrupt Enable" "0: EDC error of Write FIFO detection interrupts are..,1: EDC error of Write FIFO detection interrupts are.."
bitfld.long 0x0 2. "ECEE,EDC of Channel Selector Conversion Error Detection Interrupt Enable" "0: EDC error of Channel Selector conversion logic..,1: EDC error of Channel Selector conversion logic.."
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "SEE,Sync Interval Checker Error Detect Interrupt Enable" "0: Sync Interval Checker error detect interrupts..,1: Sync Interval Checker error detect interrupts.."
line.long 0x4 "V4ERS,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x4 16.--26. 1. "HRER_10_0,HW Redundancy Error Detection Interrupt Status"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "CCER,ECRC Comparison Error Detection Interrupt Status" "0,1"
newline
bitfld.long 0x4 3. "EFER,EDC of FIFO Error Detection Interrupt Status" "0,1"
bitfld.long 0x4 2. "ECER,EDC of Channel Selector Conversion Error Detection Interrupt Status" "0,1"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x4 0. "SER,Sync Interval Checker Error Detect Interrupt Status" "0,1"
tree.end
tree "VIN_5"
base ad:0xE6EF5000
group.long 0x0++0x3
line.long 0x0 "V5MC,Notes: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WLCEN,Write Line Counter Enable" "0: Disables the write line count,1: Enables the write line count"
hexmask.long.word 0x0 22.--30. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "FOC,Field Order Control" "0: Top field = Odd field,1: Top field = Even field"
rbitfld.long 0x0 19.--20. "Reserved_19,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 16.--18. "INF_2_0,Input Interface Format" "0: Setting prohibited,1: YUV422 8-bit or YUV420 8-bit input*1,?,?,?,?,?,?"
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "EXINF_1_0,Extension Interface Select" "0,1,2,3"
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "VUP,VIN Register Update Control" "0: The register contents are updated immediately..,1: The register contents are updated after a valid.."
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 6. "EN,Endian Type" "0: Image data is packed and allocated in little..,1: Image data is packed and allocated in big endian"
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 3.--4. "IM_1_0,Interlace Mode" "0: Odd-field,1: Odd-/even-field capture mode,?,?"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "ME,Module Enable" "0: The module operation is stopped,1: The module operation is enabled"
rgroup.long 0x4++0x3
line.long 0x0 "V5MS,Notes: Availability of channels: n = 0 to 15"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 3.--4. "FBS_1_0,Frame Buffer Status" "0: The latest valid frame buffer has the base..,1: The latest valid frame buffer has the base..,?,?"
newline
bitfld.long 0x0 2. "FS,Field Status" "0: The current field is an odd field,1: The current field is an even field"
bitfld.long 0x0 1. "AV,Active Video Status" "0: The current field is not in the active video area,1: The current field is in the active video area"
newline
bitfld.long 0x0 0. "CA,Video Capture Active Status" "0: Video capture is not operating,1: Video capture is operating"
group.long 0x8++0x13
line.long 0x0 "V5FC,Note: Availability of channels: n=0 to 15"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CC,Continuous Frame Capture Mode" "0: The continuous frame capture mode is not set,1: The continuous frame capture mode is set"
newline
bitfld.long 0x0 0. "SC,Single Frame Capture Mode" "0: The single frame capture mode is not set,1: The single frame capture mode is set"
line.long 0x4 "V5SLPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x4 0.--11. 1. "SLPrC_11_0,Start Line Pre-Clip"
line.long 0x8 "V5ELPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x8 0.--11. 1. "ELPrC_11_0,End Line Pre-Clip"
line.long 0xC "V5SPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0xC 0.--11. 1. "SPPrC_11_0,Start Pixel Pre-Clip"
line.long 0x10 "V5EPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x10 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x10 0.--11. 1. "EPPrC_11_0,End Pixel Pre-Clip"
group.long 0x2C++0xF
line.long 0x0 "V5IS,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 4.--15. 1. "IS_11_0,Image Stride"
newline
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved bits that indicate the lower-order four bits of the image stride."
line.long 0x4 "V5MB1,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 7.--31. 1. "MB1_24_0,Memory Base Address 1"
hexmask.long.byte 0x4 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 1 (a multiple of 128 bytes)."
line.long 0x8 "V5MB2,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "MB2_24_0,Memory Base Address 2"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 2 (a multiple of 128 bytes)."
line.long 0xC "V5MB3,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 7.--31. 1. "MB3_24_0,Memory Base Address 3"
hexmask.long.byte 0xC 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 3 (a multiple of 128 bytes)."
rgroup.long 0x3C++0x3
line.long 0x0 "V5LC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x0 0.--11. 1. "LC_11_0,Line Count"
group.long 0x40++0x7
line.long 0x0 "V5IE,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "FIE2,Field Interrupt Enable 2" "0: Field interrupts are disabled,1: Field interrupts are enabled"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x0 24. "WUE,Wake-up Notification Interrupt Enable" "0: Wake-up notification interrupts are disabled,1: Wake-up notification interrupts are enabled"
hexmask.long.byte 0x0 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "VFE,VSYNC Falling Edge Detect Interrupt Enable" "0: VSYNC falling edge detect interrupts are disabled,1: VSYNC falling edge detect interrupts are enabled"
bitfld.long 0x0 16. "VRE,VSYNC Rising Edge Detect Interrupt Enable" "0: VSYNC rising edge detect interrupts are disabled,1: VSYNC rising edge detect interrupts are enabled"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "FIE,Field Interrupt Enable" "0: Field-switching interrupts are disabled,1: Field-switching interrupts are enabled"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x0 1. "EFE,End of Frame Interrupt Enable" "0: End of frame interrupts are disabled,1: End of frame interrupts are enabled"
bitfld.long 0x0 0. "FOE,FIFO Overflow Interrupt Enable" "0: FIFO overflow interrupts are disabled,1: FIFO overflow interrupts are enabled"
line.long 0x4 "V5INTS,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x4 31. "FIS2,Field Interrupt Status 2" "0,1"
hexmask.long.byte 0x4 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x4 24. "WUS,Wake-up Notification Interrupt Status" "0,1"
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "VFS,VSYNC Falling Edge Detect Interrupt Status" "0,1"
bitfld.long 0x4 16. "VRS,VSYNC Rising Edge Detect Interrupt Status" "0,1"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "FIS,Field Interrupt Status" "0,1"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x4 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x4 1. "EFS,End of Frame Interrupt Status" "0,1"
bitfld.long 0x4 0. "FOS,FIFO Overflow Interrupt Status" "0,1"
group.long 0x58++0xB
line.long 0x0 "V5DMR,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "A8BIT_7_0,Alpha 8"
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x0 22. "FDS,Fill Data Select" "0: Fill data is 0,1: Fill data is sign data"
bitfld.long 0x0 19.--21. "RMODE_2_0,RAW Data Transfer Mode" "0: 8-bit RAW data,1: Setting prohibited,?,?,?,?,?,?"
newline
rbitfld.long 0x0 17.--18. "Reserved_17,Reserved" "0,1,2,3"
bitfld.long 0x0 16. "EVA,Even Field Address Offset" "0: Data are stored from the base address in..,1: Data are stored from the base address plus the.."
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 12.--14. "YMODE_2_0,YC Data Transfer Mode" "0: Both Y and CbCr data are transferred to memory,1: Only Y data is transferred to memory as 8-bit data,?,?,?,?,?,?"
newline
bitfld.long 0x0 11. "YC_THR,YC Data Through Mode" "0: Y and CbCr data are transferred to memory..,1: Y and CbCr data are transferred to memory as.."
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "EXRGB,Extension RGB Conversion Mode" "0: RGB data extension processing is not performed,1: Data is extended to 32-bit RGB conversion when.."
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "BPSM,Output Data Byte Swap Mode" "0: Bytes are not swapped in output data,1: Bytes are swapped in output data"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 2. "ABIT,Alpha Bit" "0: The alpha value is set to 0,1: The alpha value is set to 1"
bitfld.long 0x0 0.--1. "DTMD_1_0,Data Conversion Mode" "0: Data is not converted,1: RGB is converted to ARGB before output,?,?"
line.long 0x4 "V5DMR2,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "MFC,Multi Frame Capture Mode" "0: Disables multi frame capture mode,1: Enables multi frame capture mode"
newline
rbitfld.long 0x4 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x4 17. "FTEV,VSYNC Field Toggle Mode Enable" "0: The field toggle function according to the VSYNC..,1: The field toggle function according to the VSYNC.."
newline
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "VLV_3_0,VSYNC Field Toggle Mode Transition Period"
newline
hexmask.long.word 0x4 0.--11. 1. "Reserved_0,Reserved"
line.long 0x8 "V5UVAOF,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "UVAOF_24_0,UV Data Address Offset"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the 128-byte boundary of the UVAOF value."
rgroup.long 0xD4++0x3
line.long 0x0 "V5WLC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 30.--31. "SWFBS_1_0,Smallest Writing Frame Buffer Status" "0,1,2,3"
hexmask.long.word 0x0 16.--29. 1. "SWLC_13_0,Smallest Write Line Count"
newline
bitfld.long 0x0 14.--15. "WFBS_1_0,Writing Frame Buffer Status" "0: Frame buffer under writing has the base address..,1: Frame buffer under writing has the base address..,?,?"
hexmask.long.word 0x0 0.--13. 1. "WLC_13_0,Write Line Count"
group.long 0xF0++0xB
line.long 0x0 "V5IMWUCH,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WUMD,Wake Up Mode" "0: The WLC[13:0] bits value in the VnWLC,1: The SWLC[13:0] bits value in the VnWLC"
bitfld.long 0x0 30. "SVMD,Smallest Value Mode" "0: The SWLC[13:0] bits value between video channel..,1: The SWLC[13:0] bits value between the below.."
newline
hexmask.long.word 0x0 19.--29. 1. "Reserved_19,Reserved"
bitfld.long 0x0 18. "WUE3,Wake Up Enable 3" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
bitfld.long 0x0 17. "WUE2,Wake Up Enable 2" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
bitfld.long 0x0 16. "WUE1,Wake Up Enable 1" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "WUCH,Wake Up Enable" "0: Disables wake up notification to IMRn and VSPXn,1: Enables wake up notification to IMRn and VSPXn"
line.long 0x4 "V5IMWUL,Note: Availability of channels: n = 0 to 15"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "WUL2_13_0,Wake Up Line 2"
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "WUL1_13_0,Wake Up Line 1"
line.long 0x8 "V5IMWUL2,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x8 0.--13. 1. "WUL3_13_0,Wake Up Line 3"
group.long 0x320++0x1B
line.long 0x0 "V5FNSC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "HRCHK,HW Redundancy Error check" "0: Disable error of HW Redundancy detection,1: Enable error of HW Redundancy detection"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 26.--27. "HCEN_1_0,Enable Hsync Rise Time Measurement" "0: Disable Hsync rise time measurement,1: Enable minimum Hsync rise time measurement,?,?"
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 23. "CRM,CRC Calculation Mode" "0: Only calculate CRC,1: Input expected value and compare the CRC.."
rbitfld.long 0x0 21.--22. "Reserved_21,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 19.--20. "EDID_1_0,EDC ID" "0: Channel Selector,1: Prohibit,?,?"
bitfld.long 0x0 18. "FED_EN,FIFO EDC Enable" "0: Disable EDC error of Write FIFO detection,1: Enable EDC error of Write FIFO detection"
newline
bitfld.long 0x0 17. "CED_EN,Channel Selector EDC Enable" "0: Disable EDC error of channel selector detection,1: Enable EDC error of channel selector detection"
rbitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
bitfld.long 0x0 15. "EDCDEI,EDC Dummy Error Injection" "0: Not issue dummy EDC error,1: Issue dummy EDC error"
bitfld.long 0x0 14. "DEI,Dummy Error Injection" "0: Not issue dummy error,1: Issue dummy error"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
bitfld.long 0x0 11. "DEER_DM,Data Enable Assert Cycle Error Detection Mode" "0: Data enable assert cycle error is not detected,1: Data enable assert cycle error is detected"
newline
bitfld.long 0x0 9.--10. "DECE_1_0,Enable CLKENB Assert Cycle Measurement" "0: Disable Data enable assert cycle measurement,1: Enable minimum Data enable assert cycle..,?,?"
rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4.--5. "VSCE_1_0,Enable VSYNC Toggle Cycle Measurement" "0: Disable VSYNC toggle cycle measurement,1: Enable minimum VSYNC toggle cycle measurement,?,?"
bitfld.long 0x0 2.--3. "HSCE_1_0,Enable HSYNC Toggle Cycle Measurement" "0: Disable HSYNC toggle cycle measurement,1: Enable minimum HSYNC toggle cycle measurement,?,?"
newline
bitfld.long 0x0 0.--1. "FLCE_1_0,Enable FIELD Toggle Cycle Measurement" "0: Disable FIELD toggle cycle measurement,1: Enable minimum FIELD toggle cycle measurement,?,?"
line.long 0x4 "V5FTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "FLD_CNT_MIN_31_0,FIELD Toggle Cycle Minimum Value"
line.long 0x8 "V5FTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "FLD_CNT_MAX_31_0,FIELD Toggle Cycle Maximum Value"
line.long 0xC "V5HSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "HS_CNT_MIN_31_0,HSYNC Toggle Cycle Minimum Value"
line.long 0x10 "V5HSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x10 0.--31. 1. "HS_CNT_MAX_31_0,HSYNC Toggle Cycle Maximum Value"
line.long 0x14 "V5VSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x14 0.--31. 1. "VS_CNT_MIN_31_0,VSYNC Toggle Cycle Minimum Value"
line.long 0x18 "V5VSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x18 0.--31. 1. "VS_CNT_MAX_31_0,VSYNC Toggle Cycle Maximum Value"
group.long 0x344++0x3
line.long 0x0 "V5DET,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "DE_CNT_MAX_15_0,CLKENB Enable Cycle Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "DE_CNT_MIN_15_0,CLKENB Enable Cycle Minimum Value"
rgroup.long 0x354++0x3
line.long 0x0 "V5VCRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x0 0.--31. 1. "VCRC_31_0,VCRC Code"
group.long 0x36C++0x3
line.long 0x0 "V5HRT,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "HR_CNT_MAX_15_0,Hsync Rise Time Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "HR_CNT_MIN_15_0,Hsync Rise Time Minimum Value"
group.long 0x380++0xF
line.long 0x0 "V5CRCC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 29.--31. "IDBOE_2_0,Input Data Byte Order of Even line" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 26.--28. "Reserved_26,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 25. "Y420MD,YUV420 Mode" "0: Not YCbCr-420,1: YCbCr-420"
bitfld.long 0x0 24. "INSEL,Input Data Select" "0: Before image size clip,1: After image size clip"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 22. "IDRE,Input Data Reflection of Even line" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 18.--21. 1. "Reserved_18,Reserved"
bitfld.long 0x0 16.--17. "IDBLE_1_0,Input Data Byte length of Even line" "0: 1-byte data,1: 2-byte data,?,?"
newline
bitfld.long 0x0 13.--15. "IDBO_2_0,Input Data Byte Order" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 8.--12. 1. "PDBL_4_0,Polynomial Equation Coefficient Data Bit Length"
newline
bitfld.long 0x0 7. "ROR,Remainder Output Reflection" "0: No reflection,1: Apply reflection"
bitfld.long 0x0 6. "IDR,Input Data Reflection" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 2.--5. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "IDBL_1_0,Input Data Byte length" "0: 1-byte data,1: 2-byte data,?,?"
line.long 0x4 "V5CRPEC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "CPLYEC_31_0,CRC Polynomial Equation Coefficient"
line.long 0x8 "V5CRIR,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "CIR_31_0,CRC Initial Remainder"
line.long 0xC "V5CRXRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "CXORC_31_0,CRC Final XOR Coefficient"
group.long 0x3F0++0x7
line.long 0x0 "V5EE,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x0 16.--26. 1. "HREE_10_0,HW Redundancy Error Detection Interrupt Enable"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "CCEE,ECRC Comparison Error Detection Interrupt Enable" "0: ECRC comparison error detection interrupts are..,1: ECRC comparison error detection interrupts are.."
newline
bitfld.long 0x0 3. "EFEE,EDC of FIFO Error Detection Interrupt Enable" "0: EDC error of Write FIFO detection interrupts are..,1: EDC error of Write FIFO detection interrupts are.."
bitfld.long 0x0 2. "ECEE,EDC of Channel Selector Conversion Error Detection Interrupt Enable" "0: EDC error of Channel Selector conversion logic..,1: EDC error of Channel Selector conversion logic.."
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "SEE,Sync Interval Checker Error Detect Interrupt Enable" "0: Sync Interval Checker error detect interrupts..,1: Sync Interval Checker error detect interrupts.."
line.long 0x4 "V5ERS,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x4 16.--26. 1. "HRER_10_0,HW Redundancy Error Detection Interrupt Status"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "CCER,ECRC Comparison Error Detection Interrupt Status" "0,1"
newline
bitfld.long 0x4 3. "EFER,EDC of FIFO Error Detection Interrupt Status" "0,1"
bitfld.long 0x4 2. "ECER,EDC of Channel Selector Conversion Error Detection Interrupt Status" "0,1"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x4 0. "SER,Sync Interval Checker Error Detect Interrupt Status" "0,1"
tree.end
tree "VIN_6"
base ad:0xE6EF6000
group.long 0x0++0x3
line.long 0x0 "V6MC,Notes: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WLCEN,Write Line Counter Enable" "0: Disables the write line count,1: Enables the write line count"
hexmask.long.word 0x0 22.--30. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "FOC,Field Order Control" "0: Top field = Odd field,1: Top field = Even field"
rbitfld.long 0x0 19.--20. "Reserved_19,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 16.--18. "INF_2_0,Input Interface Format" "0: Setting prohibited,1: YUV422 8-bit or YUV420 8-bit input*1,?,?,?,?,?,?"
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "EXINF_1_0,Extension Interface Select" "0,1,2,3"
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "VUP,VIN Register Update Control" "0: The register contents are updated immediately..,1: The register contents are updated after a valid.."
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 6. "EN,Endian Type" "0: Image data is packed and allocated in little..,1: Image data is packed and allocated in big endian"
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 3.--4. "IM_1_0,Interlace Mode" "0: Odd-field,1: Odd-/even-field capture mode,?,?"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "ME,Module Enable" "0: The module operation is stopped,1: The module operation is enabled"
rgroup.long 0x4++0x3
line.long 0x0 "V6MS,Notes: Availability of channels: n = 0 to 15"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 3.--4. "FBS_1_0,Frame Buffer Status" "0: The latest valid frame buffer has the base..,1: The latest valid frame buffer has the base..,?,?"
newline
bitfld.long 0x0 2. "FS,Field Status" "0: The current field is an odd field,1: The current field is an even field"
bitfld.long 0x0 1. "AV,Active Video Status" "0: The current field is not in the active video area,1: The current field is in the active video area"
newline
bitfld.long 0x0 0. "CA,Video Capture Active Status" "0: Video capture is not operating,1: Video capture is operating"
group.long 0x8++0x13
line.long 0x0 "V6FC,Note: Availability of channels: n=0 to 15"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CC,Continuous Frame Capture Mode" "0: The continuous frame capture mode is not set,1: The continuous frame capture mode is set"
newline
bitfld.long 0x0 0. "SC,Single Frame Capture Mode" "0: The single frame capture mode is not set,1: The single frame capture mode is set"
line.long 0x4 "V6SLPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x4 0.--11. 1. "SLPrC_11_0,Start Line Pre-Clip"
line.long 0x8 "V6ELPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x8 0.--11. 1. "ELPrC_11_0,End Line Pre-Clip"
line.long 0xC "V6SPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0xC 0.--11. 1. "SPPrC_11_0,Start Pixel Pre-Clip"
line.long 0x10 "V6EPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x10 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x10 0.--11. 1. "EPPrC_11_0,End Pixel Pre-Clip"
group.long 0x2C++0xF
line.long 0x0 "V6IS,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 4.--15. 1. "IS_11_0,Image Stride"
newline
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved bits that indicate the lower-order four bits of the image stride."
line.long 0x4 "V6MB1,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 7.--31. 1. "MB1_24_0,Memory Base Address 1"
hexmask.long.byte 0x4 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 1 (a multiple of 128 bytes)."
line.long 0x8 "V6MB2,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "MB2_24_0,Memory Base Address 2"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 2 (a multiple of 128 bytes)."
line.long 0xC "V6MB3,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 7.--31. 1. "MB3_24_0,Memory Base Address 3"
hexmask.long.byte 0xC 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 3 (a multiple of 128 bytes)."
rgroup.long 0x3C++0x3
line.long 0x0 "V6LC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x0 0.--11. 1. "LC_11_0,Line Count"
group.long 0x40++0x7
line.long 0x0 "V6IE,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "FIE2,Field Interrupt Enable 2" "0: Field interrupts are disabled,1: Field interrupts are enabled"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x0 24. "WUE,Wake-up Notification Interrupt Enable" "0: Wake-up notification interrupts are disabled,1: Wake-up notification interrupts are enabled"
hexmask.long.byte 0x0 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "VFE,VSYNC Falling Edge Detect Interrupt Enable" "0: VSYNC falling edge detect interrupts are disabled,1: VSYNC falling edge detect interrupts are enabled"
bitfld.long 0x0 16. "VRE,VSYNC Rising Edge Detect Interrupt Enable" "0: VSYNC rising edge detect interrupts are disabled,1: VSYNC rising edge detect interrupts are enabled"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "FIE,Field Interrupt Enable" "0: Field-switching interrupts are disabled,1: Field-switching interrupts are enabled"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x0 1. "EFE,End of Frame Interrupt Enable" "0: End of frame interrupts are disabled,1: End of frame interrupts are enabled"
bitfld.long 0x0 0. "FOE,FIFO Overflow Interrupt Enable" "0: FIFO overflow interrupts are disabled,1: FIFO overflow interrupts are enabled"
line.long 0x4 "V6INTS,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x4 31. "FIS2,Field Interrupt Status 2" "0,1"
hexmask.long.byte 0x4 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x4 24. "WUS,Wake-up Notification Interrupt Status" "0,1"
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "VFS,VSYNC Falling Edge Detect Interrupt Status" "0,1"
bitfld.long 0x4 16. "VRS,VSYNC Rising Edge Detect Interrupt Status" "0,1"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "FIS,Field Interrupt Status" "0,1"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x4 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x4 1. "EFS,End of Frame Interrupt Status" "0,1"
bitfld.long 0x4 0. "FOS,FIFO Overflow Interrupt Status" "0,1"
group.long 0x58++0xB
line.long 0x0 "V6DMR,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "A8BIT_7_0,Alpha 8"
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x0 22. "FDS,Fill Data Select" "0: Fill data is 0,1: Fill data is sign data"
bitfld.long 0x0 19.--21. "RMODE_2_0,RAW Data Transfer Mode" "0: 8-bit RAW data,1: Setting prohibited,?,?,?,?,?,?"
newline
rbitfld.long 0x0 17.--18. "Reserved_17,Reserved" "0,1,2,3"
bitfld.long 0x0 16. "EVA,Even Field Address Offset" "0: Data are stored from the base address in..,1: Data are stored from the base address plus the.."
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 12.--14. "YMODE_2_0,YC Data Transfer Mode" "0: Both Y and CbCr data are transferred to memory,1: Only Y data is transferred to memory as 8-bit data,?,?,?,?,?,?"
newline
bitfld.long 0x0 11. "YC_THR,YC Data Through Mode" "0: Y and CbCr data are transferred to memory..,1: Y and CbCr data are transferred to memory as.."
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "EXRGB,Extension RGB Conversion Mode" "0: RGB data extension processing is not performed,1: Data is extended to 32-bit RGB conversion when.."
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "BPSM,Output Data Byte Swap Mode" "0: Bytes are not swapped in output data,1: Bytes are swapped in output data"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 2. "ABIT,Alpha Bit" "0: The alpha value is set to 0,1: The alpha value is set to 1"
bitfld.long 0x0 0.--1. "DTMD_1_0,Data Conversion Mode" "0: Data is not converted,1: RGB is converted to ARGB before output,?,?"
line.long 0x4 "V6DMR2,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "MFC,Multi Frame Capture Mode" "0: Disables multi frame capture mode,1: Enables multi frame capture mode"
newline
rbitfld.long 0x4 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x4 17. "FTEV,VSYNC Field Toggle Mode Enable" "0: The field toggle function according to the VSYNC..,1: The field toggle function according to the VSYNC.."
newline
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "VLV_3_0,VSYNC Field Toggle Mode Transition Period"
newline
hexmask.long.word 0x4 0.--11. 1. "Reserved_0,Reserved"
line.long 0x8 "V6UVAOF,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "UVAOF_24_0,UV Data Address Offset"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the 128-byte boundary of the UVAOF value."
rgroup.long 0xD4++0x3
line.long 0x0 "V6WLC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 30.--31. "SWFBS_1_0,Smallest Writing Frame Buffer Status" "0,1,2,3"
hexmask.long.word 0x0 16.--29. 1. "SWLC_13_0,Smallest Write Line Count"
newline
bitfld.long 0x0 14.--15. "WFBS_1_0,Writing Frame Buffer Status" "0: Frame buffer under writing has the base address..,1: Frame buffer under writing has the base address..,?,?"
hexmask.long.word 0x0 0.--13. 1. "WLC_13_0,Write Line Count"
group.long 0xF0++0xB
line.long 0x0 "V6IMWUCH,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WUMD,Wake Up Mode" "0: The WLC[13:0] bits value in the VnWLC,1: The SWLC[13:0] bits value in the VnWLC"
bitfld.long 0x0 30. "SVMD,Smallest Value Mode" "0: The SWLC[13:0] bits value between video channel..,1: The SWLC[13:0] bits value between the below.."
newline
hexmask.long.word 0x0 19.--29. 1. "Reserved_19,Reserved"
bitfld.long 0x0 18. "WUE3,Wake Up Enable 3" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
bitfld.long 0x0 17. "WUE2,Wake Up Enable 2" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
bitfld.long 0x0 16. "WUE1,Wake Up Enable 1" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "WUCH,Wake Up Enable" "0: Disables wake up notification to IMRn and VSPXn,1: Enables wake up notification to IMRn and VSPXn"
line.long 0x4 "V6IMWUL,Note: Availability of channels: n = 0 to 15"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "WUL2_13_0,Wake Up Line 2"
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "WUL1_13_0,Wake Up Line 1"
line.long 0x8 "V6IMWUL2,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x8 0.--13. 1. "WUL3_13_0,Wake Up Line 3"
group.long 0x320++0x1B
line.long 0x0 "V6FNSC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "HRCHK,HW Redundancy Error check" "0: Disable error of HW Redundancy detection,1: Enable error of HW Redundancy detection"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 26.--27. "HCEN_1_0,Enable Hsync Rise Time Measurement" "0: Disable Hsync rise time measurement,1: Enable minimum Hsync rise time measurement,?,?"
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 23. "CRM,CRC Calculation Mode" "0: Only calculate CRC,1: Input expected value and compare the CRC.."
rbitfld.long 0x0 21.--22. "Reserved_21,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 19.--20. "EDID_1_0,EDC ID" "0: Channel Selector,1: Prohibit,?,?"
bitfld.long 0x0 18. "FED_EN,FIFO EDC Enable" "0: Disable EDC error of Write FIFO detection,1: Enable EDC error of Write FIFO detection"
newline
bitfld.long 0x0 17. "CED_EN,Channel Selector EDC Enable" "0: Disable EDC error of channel selector detection,1: Enable EDC error of channel selector detection"
rbitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
bitfld.long 0x0 15. "EDCDEI,EDC Dummy Error Injection" "0: Not issue dummy EDC error,1: Issue dummy EDC error"
bitfld.long 0x0 14. "DEI,Dummy Error Injection" "0: Not issue dummy error,1: Issue dummy error"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
bitfld.long 0x0 11. "DEER_DM,Data Enable Assert Cycle Error Detection Mode" "0: Data enable assert cycle error is not detected,1: Data enable assert cycle error is detected"
newline
bitfld.long 0x0 9.--10. "DECE_1_0,Enable CLKENB Assert Cycle Measurement" "0: Disable Data enable assert cycle measurement,1: Enable minimum Data enable assert cycle..,?,?"
rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4.--5. "VSCE_1_0,Enable VSYNC Toggle Cycle Measurement" "0: Disable VSYNC toggle cycle measurement,1: Enable minimum VSYNC toggle cycle measurement,?,?"
bitfld.long 0x0 2.--3. "HSCE_1_0,Enable HSYNC Toggle Cycle Measurement" "0: Disable HSYNC toggle cycle measurement,1: Enable minimum HSYNC toggle cycle measurement,?,?"
newline
bitfld.long 0x0 0.--1. "FLCE_1_0,Enable FIELD Toggle Cycle Measurement" "0: Disable FIELD toggle cycle measurement,1: Enable minimum FIELD toggle cycle measurement,?,?"
line.long 0x4 "V6FTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "FLD_CNT_MIN_31_0,FIELD Toggle Cycle Minimum Value"
line.long 0x8 "V6FTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "FLD_CNT_MAX_31_0,FIELD Toggle Cycle Maximum Value"
line.long 0xC "V6HSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "HS_CNT_MIN_31_0,HSYNC Toggle Cycle Minimum Value"
line.long 0x10 "V6HSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x10 0.--31. 1. "HS_CNT_MAX_31_0,HSYNC Toggle Cycle Maximum Value"
line.long 0x14 "V6VSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x14 0.--31. 1. "VS_CNT_MIN_31_0,VSYNC Toggle Cycle Minimum Value"
line.long 0x18 "V6VSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x18 0.--31. 1. "VS_CNT_MAX_31_0,VSYNC Toggle Cycle Maximum Value"
group.long 0x344++0x3
line.long 0x0 "V6DET,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "DE_CNT_MAX_15_0,CLKENB Enable Cycle Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "DE_CNT_MIN_15_0,CLKENB Enable Cycle Minimum Value"
rgroup.long 0x354++0x3
line.long 0x0 "V6VCRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x0 0.--31. 1. "VCRC_31_0,VCRC Code"
group.long 0x36C++0x3
line.long 0x0 "V6HRT,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "HR_CNT_MAX_15_0,Hsync Rise Time Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "HR_CNT_MIN_15_0,Hsync Rise Time Minimum Value"
group.long 0x380++0xF
line.long 0x0 "V6CRCC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 29.--31. "IDBOE_2_0,Input Data Byte Order of Even line" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 26.--28. "Reserved_26,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 25. "Y420MD,YUV420 Mode" "0: Not YCbCr-420,1: YCbCr-420"
bitfld.long 0x0 24. "INSEL,Input Data Select" "0: Before image size clip,1: After image size clip"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 22. "IDRE,Input Data Reflection of Even line" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 18.--21. 1. "Reserved_18,Reserved"
bitfld.long 0x0 16.--17. "IDBLE_1_0,Input Data Byte length of Even line" "0: 1-byte data,1: 2-byte data,?,?"
newline
bitfld.long 0x0 13.--15. "IDBO_2_0,Input Data Byte Order" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 8.--12. 1. "PDBL_4_0,Polynomial Equation Coefficient Data Bit Length"
newline
bitfld.long 0x0 7. "ROR,Remainder Output Reflection" "0: No reflection,1: Apply reflection"
bitfld.long 0x0 6. "IDR,Input Data Reflection" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 2.--5. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "IDBL_1_0,Input Data Byte length" "0: 1-byte data,1: 2-byte data,?,?"
line.long 0x4 "V6CRPEC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "CPLYEC_31_0,CRC Polynomial Equation Coefficient"
line.long 0x8 "V6CRIR,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "CIR_31_0,CRC Initial Remainder"
line.long 0xC "V6CRXRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "CXORC_31_0,CRC Final XOR Coefficient"
group.long 0x3F0++0x7
line.long 0x0 "V6EE,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x0 16.--26. 1. "HREE_10_0,HW Redundancy Error Detection Interrupt Enable"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "CCEE,ECRC Comparison Error Detection Interrupt Enable" "0: ECRC comparison error detection interrupts are..,1: ECRC comparison error detection interrupts are.."
newline
bitfld.long 0x0 3. "EFEE,EDC of FIFO Error Detection Interrupt Enable" "0: EDC error of Write FIFO detection interrupts are..,1: EDC error of Write FIFO detection interrupts are.."
bitfld.long 0x0 2. "ECEE,EDC of Channel Selector Conversion Error Detection Interrupt Enable" "0: EDC error of Channel Selector conversion logic..,1: EDC error of Channel Selector conversion logic.."
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "SEE,Sync Interval Checker Error Detect Interrupt Enable" "0: Sync Interval Checker error detect interrupts..,1: Sync Interval Checker error detect interrupts.."
line.long 0x4 "V6ERS,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x4 16.--26. 1. "HRER_10_0,HW Redundancy Error Detection Interrupt Status"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "CCER,ECRC Comparison Error Detection Interrupt Status" "0,1"
newline
bitfld.long 0x4 3. "EFER,EDC of FIFO Error Detection Interrupt Status" "0,1"
bitfld.long 0x4 2. "ECER,EDC of Channel Selector Conversion Error Detection Interrupt Status" "0,1"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x4 0. "SER,Sync Interval Checker Error Detect Interrupt Status" "0,1"
tree.end
tree "VIN_7"
base ad:0xE6EF7000
group.long 0x0++0x3
line.long 0x0 "V7MC,Notes: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WLCEN,Write Line Counter Enable" "0: Disables the write line count,1: Enables the write line count"
hexmask.long.word 0x0 22.--30. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "FOC,Field Order Control" "0: Top field = Odd field,1: Top field = Even field"
rbitfld.long 0x0 19.--20. "Reserved_19,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 16.--18. "INF_2_0,Input Interface Format" "0: Setting prohibited,1: YUV422 8-bit or YUV420 8-bit input*1,?,?,?,?,?,?"
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "EXINF_1_0,Extension Interface Select" "0,1,2,3"
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "VUP,VIN Register Update Control" "0: The register contents are updated immediately..,1: The register contents are updated after a valid.."
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 6. "EN,Endian Type" "0: Image data is packed and allocated in little..,1: Image data is packed and allocated in big endian"
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 3.--4. "IM_1_0,Interlace Mode" "0: Odd-field,1: Odd-/even-field capture mode,?,?"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "ME,Module Enable" "0: The module operation is stopped,1: The module operation is enabled"
rgroup.long 0x4++0x3
line.long 0x0 "V7MS,Notes: Availability of channels: n = 0 to 15"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 3.--4. "FBS_1_0,Frame Buffer Status" "0: The latest valid frame buffer has the base..,1: The latest valid frame buffer has the base..,?,?"
newline
bitfld.long 0x0 2. "FS,Field Status" "0: The current field is an odd field,1: The current field is an even field"
bitfld.long 0x0 1. "AV,Active Video Status" "0: The current field is not in the active video area,1: The current field is in the active video area"
newline
bitfld.long 0x0 0. "CA,Video Capture Active Status" "0: Video capture is not operating,1: Video capture is operating"
group.long 0x8++0x13
line.long 0x0 "V7FC,Note: Availability of channels: n=0 to 15"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CC,Continuous Frame Capture Mode" "0: The continuous frame capture mode is not set,1: The continuous frame capture mode is set"
newline
bitfld.long 0x0 0. "SC,Single Frame Capture Mode" "0: The single frame capture mode is not set,1: The single frame capture mode is set"
line.long 0x4 "V7SLPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x4 0.--11. 1. "SLPrC_11_0,Start Line Pre-Clip"
line.long 0x8 "V7ELPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x8 0.--11. 1. "ELPrC_11_0,End Line Pre-Clip"
line.long 0xC "V7SPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0xC 0.--11. 1. "SPPrC_11_0,Start Pixel Pre-Clip"
line.long 0x10 "V7EPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x10 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x10 0.--11. 1. "EPPrC_11_0,End Pixel Pre-Clip"
group.long 0x2C++0xF
line.long 0x0 "V7IS,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 4.--15. 1. "IS_11_0,Image Stride"
newline
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved bits that indicate the lower-order four bits of the image stride."
line.long 0x4 "V7MB1,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 7.--31. 1. "MB1_24_0,Memory Base Address 1"
hexmask.long.byte 0x4 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 1 (a multiple of 128 bytes)."
line.long 0x8 "V7MB2,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "MB2_24_0,Memory Base Address 2"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 2 (a multiple of 128 bytes)."
line.long 0xC "V7MB3,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 7.--31. 1. "MB3_24_0,Memory Base Address 3"
hexmask.long.byte 0xC 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 3 (a multiple of 128 bytes)."
rgroup.long 0x3C++0x3
line.long 0x0 "V7LC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x0 0.--11. 1. "LC_11_0,Line Count"
group.long 0x40++0x7
line.long 0x0 "V7IE,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "FIE2,Field Interrupt Enable 2" "0: Field interrupts are disabled,1: Field interrupts are enabled"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x0 24. "WUE,Wake-up Notification Interrupt Enable" "0: Wake-up notification interrupts are disabled,1: Wake-up notification interrupts are enabled"
hexmask.long.byte 0x0 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "VFE,VSYNC Falling Edge Detect Interrupt Enable" "0: VSYNC falling edge detect interrupts are disabled,1: VSYNC falling edge detect interrupts are enabled"
bitfld.long 0x0 16. "VRE,VSYNC Rising Edge Detect Interrupt Enable" "0: VSYNC rising edge detect interrupts are disabled,1: VSYNC rising edge detect interrupts are enabled"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "FIE,Field Interrupt Enable" "0: Field-switching interrupts are disabled,1: Field-switching interrupts are enabled"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x0 1. "EFE,End of Frame Interrupt Enable" "0: End of frame interrupts are disabled,1: End of frame interrupts are enabled"
bitfld.long 0x0 0. "FOE,FIFO Overflow Interrupt Enable" "0: FIFO overflow interrupts are disabled,1: FIFO overflow interrupts are enabled"
line.long 0x4 "V7INTS,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x4 31. "FIS2,Field Interrupt Status 2" "0,1"
hexmask.long.byte 0x4 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x4 24. "WUS,Wake-up Notification Interrupt Status" "0,1"
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "VFS,VSYNC Falling Edge Detect Interrupt Status" "0,1"
bitfld.long 0x4 16. "VRS,VSYNC Rising Edge Detect Interrupt Status" "0,1"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "FIS,Field Interrupt Status" "0,1"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x4 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x4 1. "EFS,End of Frame Interrupt Status" "0,1"
bitfld.long 0x4 0. "FOS,FIFO Overflow Interrupt Status" "0,1"
group.long 0x58++0xB
line.long 0x0 "V7DMR,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "A8BIT_7_0,Alpha 8"
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x0 22. "FDS,Fill Data Select" "0: Fill data is 0,1: Fill data is sign data"
bitfld.long 0x0 19.--21. "RMODE_2_0,RAW Data Transfer Mode" "0: 8-bit RAW data,1: Setting prohibited,?,?,?,?,?,?"
newline
rbitfld.long 0x0 17.--18. "Reserved_17,Reserved" "0,1,2,3"
bitfld.long 0x0 16. "EVA,Even Field Address Offset" "0: Data are stored from the base address in..,1: Data are stored from the base address plus the.."
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 12.--14. "YMODE_2_0,YC Data Transfer Mode" "0: Both Y and CbCr data are transferred to memory,1: Only Y data is transferred to memory as 8-bit data,?,?,?,?,?,?"
newline
bitfld.long 0x0 11. "YC_THR,YC Data Through Mode" "0: Y and CbCr data are transferred to memory..,1: Y and CbCr data are transferred to memory as.."
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "EXRGB,Extension RGB Conversion Mode" "0: RGB data extension processing is not performed,1: Data is extended to 32-bit RGB conversion when.."
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "BPSM,Output Data Byte Swap Mode" "0: Bytes are not swapped in output data,1: Bytes are swapped in output data"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 2. "ABIT,Alpha Bit" "0: The alpha value is set to 0,1: The alpha value is set to 1"
bitfld.long 0x0 0.--1. "DTMD_1_0,Data Conversion Mode" "0: Data is not converted,1: RGB is converted to ARGB before output,?,?"
line.long 0x4 "V7DMR2,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "MFC,Multi Frame Capture Mode" "0: Disables multi frame capture mode,1: Enables multi frame capture mode"
newline
rbitfld.long 0x4 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x4 17. "FTEV,VSYNC Field Toggle Mode Enable" "0: The field toggle function according to the VSYNC..,1: The field toggle function according to the VSYNC.."
newline
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "VLV_3_0,VSYNC Field Toggle Mode Transition Period"
newline
hexmask.long.word 0x4 0.--11. 1. "Reserved_0,Reserved"
line.long 0x8 "V7UVAOF,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "UVAOF_24_0,UV Data Address Offset"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the 128-byte boundary of the UVAOF value."
rgroup.long 0xD4++0x3
line.long 0x0 "V7WLC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 30.--31. "SWFBS_1_0,Smallest Writing Frame Buffer Status" "0,1,2,3"
hexmask.long.word 0x0 16.--29. 1. "SWLC_13_0,Smallest Write Line Count"
newline
bitfld.long 0x0 14.--15. "WFBS_1_0,Writing Frame Buffer Status" "0: Frame buffer under writing has the base address..,1: Frame buffer under writing has the base address..,?,?"
hexmask.long.word 0x0 0.--13. 1. "WLC_13_0,Write Line Count"
group.long 0xF0++0xB
line.long 0x0 "V7IMWUCH,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WUMD,Wake Up Mode" "0: The WLC[13:0] bits value in the VnWLC,1: The SWLC[13:0] bits value in the VnWLC"
bitfld.long 0x0 30. "SVMD,Smallest Value Mode" "0: The SWLC[13:0] bits value between video channel..,1: The SWLC[13:0] bits value between the below.."
newline
hexmask.long.word 0x0 19.--29. 1. "Reserved_19,Reserved"
bitfld.long 0x0 18. "WUE3,Wake Up Enable 3" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
bitfld.long 0x0 17. "WUE2,Wake Up Enable 2" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
bitfld.long 0x0 16. "WUE1,Wake Up Enable 1" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "WUCH,Wake Up Enable" "0: Disables wake up notification to IMRn and VSPXn,1: Enables wake up notification to IMRn and VSPXn"
line.long 0x4 "V7IMWUL,Note: Availability of channels: n = 0 to 15"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "WUL2_13_0,Wake Up Line 2"
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "WUL1_13_0,Wake Up Line 1"
line.long 0x8 "V7IMWUL2,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x8 0.--13. 1. "WUL3_13_0,Wake Up Line 3"
group.long 0x320++0x1B
line.long 0x0 "V7FNSC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "HRCHK,HW Redundancy Error check" "0: Disable error of HW Redundancy detection,1: Enable error of HW Redundancy detection"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 26.--27. "HCEN_1_0,Enable Hsync Rise Time Measurement" "0: Disable Hsync rise time measurement,1: Enable minimum Hsync rise time measurement,?,?"
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 23. "CRM,CRC Calculation Mode" "0: Only calculate CRC,1: Input expected value and compare the CRC.."
rbitfld.long 0x0 21.--22. "Reserved_21,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 19.--20. "EDID_1_0,EDC ID" "0: Channel Selector,1: Prohibit,?,?"
bitfld.long 0x0 18. "FED_EN,FIFO EDC Enable" "0: Disable EDC error of Write FIFO detection,1: Enable EDC error of Write FIFO detection"
newline
bitfld.long 0x0 17. "CED_EN,Channel Selector EDC Enable" "0: Disable EDC error of channel selector detection,1: Enable EDC error of channel selector detection"
rbitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
bitfld.long 0x0 15. "EDCDEI,EDC Dummy Error Injection" "0: Not issue dummy EDC error,1: Issue dummy EDC error"
bitfld.long 0x0 14. "DEI,Dummy Error Injection" "0: Not issue dummy error,1: Issue dummy error"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
bitfld.long 0x0 11. "DEER_DM,Data Enable Assert Cycle Error Detection Mode" "0: Data enable assert cycle error is not detected,1: Data enable assert cycle error is detected"
newline
bitfld.long 0x0 9.--10. "DECE_1_0,Enable CLKENB Assert Cycle Measurement" "0: Disable Data enable assert cycle measurement,1: Enable minimum Data enable assert cycle..,?,?"
rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4.--5. "VSCE_1_0,Enable VSYNC Toggle Cycle Measurement" "0: Disable VSYNC toggle cycle measurement,1: Enable minimum VSYNC toggle cycle measurement,?,?"
bitfld.long 0x0 2.--3. "HSCE_1_0,Enable HSYNC Toggle Cycle Measurement" "0: Disable HSYNC toggle cycle measurement,1: Enable minimum HSYNC toggle cycle measurement,?,?"
newline
bitfld.long 0x0 0.--1. "FLCE_1_0,Enable FIELD Toggle Cycle Measurement" "0: Disable FIELD toggle cycle measurement,1: Enable minimum FIELD toggle cycle measurement,?,?"
line.long 0x4 "V7FTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "FLD_CNT_MIN_31_0,FIELD Toggle Cycle Minimum Value"
line.long 0x8 "V7FTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "FLD_CNT_MAX_31_0,FIELD Toggle Cycle Maximum Value"
line.long 0xC "V7HSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "HS_CNT_MIN_31_0,HSYNC Toggle Cycle Minimum Value"
line.long 0x10 "V7HSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x10 0.--31. 1. "HS_CNT_MAX_31_0,HSYNC Toggle Cycle Maximum Value"
line.long 0x14 "V7VSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x14 0.--31. 1. "VS_CNT_MIN_31_0,VSYNC Toggle Cycle Minimum Value"
line.long 0x18 "V7VSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x18 0.--31. 1. "VS_CNT_MAX_31_0,VSYNC Toggle Cycle Maximum Value"
group.long 0x344++0x3
line.long 0x0 "V7DET,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "DE_CNT_MAX_15_0,CLKENB Enable Cycle Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "DE_CNT_MIN_15_0,CLKENB Enable Cycle Minimum Value"
rgroup.long 0x354++0x3
line.long 0x0 "V7VCRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x0 0.--31. 1. "VCRC_31_0,VCRC Code"
group.long 0x36C++0x3
line.long 0x0 "V7HRT,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "HR_CNT_MAX_15_0,Hsync Rise Time Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "HR_CNT_MIN_15_0,Hsync Rise Time Minimum Value"
group.long 0x380++0xF
line.long 0x0 "V7CRCC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 29.--31. "IDBOE_2_0,Input Data Byte Order of Even line" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 26.--28. "Reserved_26,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 25. "Y420MD,YUV420 Mode" "0: Not YCbCr-420,1: YCbCr-420"
bitfld.long 0x0 24. "INSEL,Input Data Select" "0: Before image size clip,1: After image size clip"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 22. "IDRE,Input Data Reflection of Even line" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 18.--21. 1. "Reserved_18,Reserved"
bitfld.long 0x0 16.--17. "IDBLE_1_0,Input Data Byte length of Even line" "0: 1-byte data,1: 2-byte data,?,?"
newline
bitfld.long 0x0 13.--15. "IDBO_2_0,Input Data Byte Order" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 8.--12. 1. "PDBL_4_0,Polynomial Equation Coefficient Data Bit Length"
newline
bitfld.long 0x0 7. "ROR,Remainder Output Reflection" "0: No reflection,1: Apply reflection"
bitfld.long 0x0 6. "IDR,Input Data Reflection" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 2.--5. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "IDBL_1_0,Input Data Byte length" "0: 1-byte data,1: 2-byte data,?,?"
line.long 0x4 "V7CRPEC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "CPLYEC_31_0,CRC Polynomial Equation Coefficient"
line.long 0x8 "V7CRIR,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "CIR_31_0,CRC Initial Remainder"
line.long 0xC "V7CRXRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "CXORC_31_0,CRC Final XOR Coefficient"
group.long 0x3F0++0x7
line.long 0x0 "V7EE,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x0 16.--26. 1. "HREE_10_0,HW Redundancy Error Detection Interrupt Enable"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "CCEE,ECRC Comparison Error Detection Interrupt Enable" "0: ECRC comparison error detection interrupts are..,1: ECRC comparison error detection interrupts are.."
newline
bitfld.long 0x0 3. "EFEE,EDC of FIFO Error Detection Interrupt Enable" "0: EDC error of Write FIFO detection interrupts are..,1: EDC error of Write FIFO detection interrupts are.."
bitfld.long 0x0 2. "ECEE,EDC of Channel Selector Conversion Error Detection Interrupt Enable" "0: EDC error of Channel Selector conversion logic..,1: EDC error of Channel Selector conversion logic.."
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "SEE,Sync Interval Checker Error Detect Interrupt Enable" "0: Sync Interval Checker error detect interrupts..,1: Sync Interval Checker error detect interrupts.."
line.long 0x4 "V7ERS,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x4 16.--26. 1. "HRER_10_0,HW Redundancy Error Detection Interrupt Status"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "CCER,ECRC Comparison Error Detection Interrupt Status" "0,1"
newline
bitfld.long 0x4 3. "EFER,EDC of FIFO Error Detection Interrupt Status" "0,1"
bitfld.long 0x4 2. "ECER,EDC of Channel Selector Conversion Error Detection Interrupt Status" "0,1"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x4 0. "SER,Sync Interval Checker Error Detect Interrupt Status" "0,1"
tree.end
tree "VIN_8"
base ad:0xE6EF8000
group.long 0x0++0x3
line.long 0x0 "V8MC,Notes: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WLCEN,Write Line Counter Enable" "0: Disables the write line count,1: Enables the write line count"
hexmask.long.word 0x0 22.--30. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "FOC,Field Order Control" "0: Top field = Odd field,1: Top field = Even field"
rbitfld.long 0x0 19.--20. "Reserved_19,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 16.--18. "INF_2_0,Input Interface Format" "0: Setting prohibited,1: YUV422 8-bit or YUV420 8-bit input*1,?,?,?,?,?,?"
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "EXINF_1_0,Extension Interface Select" "0,1,2,3"
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "VUP,VIN Register Update Control" "0: The register contents are updated immediately..,1: The register contents are updated after a valid.."
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 6. "EN,Endian Type" "0: Image data is packed and allocated in little..,1: Image data is packed and allocated in big endian"
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 3.--4. "IM_1_0,Interlace Mode" "0: Odd-field,1: Odd-/even-field capture mode,?,?"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "ME,Module Enable" "0: The module operation is stopped,1: The module operation is enabled"
rgroup.long 0x4++0x3
line.long 0x0 "V8MS,Notes: Availability of channels: n = 0 to 15"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 3.--4. "FBS_1_0,Frame Buffer Status" "0: The latest valid frame buffer has the base..,1: The latest valid frame buffer has the base..,?,?"
newline
bitfld.long 0x0 2. "FS,Field Status" "0: The current field is an odd field,1: The current field is an even field"
bitfld.long 0x0 1. "AV,Active Video Status" "0: The current field is not in the active video area,1: The current field is in the active video area"
newline
bitfld.long 0x0 0. "CA,Video Capture Active Status" "0: Video capture is not operating,1: Video capture is operating"
group.long 0x8++0x13
line.long 0x0 "V8FC,Note: Availability of channels: n=0 to 15"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CC,Continuous Frame Capture Mode" "0: The continuous frame capture mode is not set,1: The continuous frame capture mode is set"
newline
bitfld.long 0x0 0. "SC,Single Frame Capture Mode" "0: The single frame capture mode is not set,1: The single frame capture mode is set"
line.long 0x4 "V8SLPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x4 0.--11. 1. "SLPrC_11_0,Start Line Pre-Clip"
line.long 0x8 "V8ELPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x8 0.--11. 1. "ELPrC_11_0,End Line Pre-Clip"
line.long 0xC "V8SPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0xC 0.--11. 1. "SPPrC_11_0,Start Pixel Pre-Clip"
line.long 0x10 "V8EPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x10 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x10 0.--11. 1. "EPPrC_11_0,End Pixel Pre-Clip"
group.long 0x2C++0xF
line.long 0x0 "V8IS,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 4.--15. 1. "IS_11_0,Image Stride"
newline
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved bits that indicate the lower-order four bits of the image stride."
line.long 0x4 "V8MB1,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 7.--31. 1. "MB1_24_0,Memory Base Address 1"
hexmask.long.byte 0x4 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 1 (a multiple of 128 bytes)."
line.long 0x8 "V8MB2,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "MB2_24_0,Memory Base Address 2"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 2 (a multiple of 128 bytes)."
line.long 0xC "V8MB3,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 7.--31. 1. "MB3_24_0,Memory Base Address 3"
hexmask.long.byte 0xC 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 3 (a multiple of 128 bytes)."
rgroup.long 0x3C++0x3
line.long 0x0 "V8LC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x0 0.--11. 1. "LC_11_0,Line Count"
group.long 0x40++0x7
line.long 0x0 "V8IE,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "FIE2,Field Interrupt Enable 2" "0: Field interrupts are disabled,1: Field interrupts are enabled"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x0 24. "WUE,Wake-up Notification Interrupt Enable" "0: Wake-up notification interrupts are disabled,1: Wake-up notification interrupts are enabled"
hexmask.long.byte 0x0 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "VFE,VSYNC Falling Edge Detect Interrupt Enable" "0: VSYNC falling edge detect interrupts are disabled,1: VSYNC falling edge detect interrupts are enabled"
bitfld.long 0x0 16. "VRE,VSYNC Rising Edge Detect Interrupt Enable" "0: VSYNC rising edge detect interrupts are disabled,1: VSYNC rising edge detect interrupts are enabled"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "FIE,Field Interrupt Enable" "0: Field-switching interrupts are disabled,1: Field-switching interrupts are enabled"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x0 1. "EFE,End of Frame Interrupt Enable" "0: End of frame interrupts are disabled,1: End of frame interrupts are enabled"
bitfld.long 0x0 0. "FOE,FIFO Overflow Interrupt Enable" "0: FIFO overflow interrupts are disabled,1: FIFO overflow interrupts are enabled"
line.long 0x4 "V8INTS,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x4 31. "FIS2,Field Interrupt Status 2" "0,1"
hexmask.long.byte 0x4 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x4 24. "WUS,Wake-up Notification Interrupt Status" "0,1"
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "VFS,VSYNC Falling Edge Detect Interrupt Status" "0,1"
bitfld.long 0x4 16. "VRS,VSYNC Rising Edge Detect Interrupt Status" "0,1"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "FIS,Field Interrupt Status" "0,1"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x4 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x4 1. "EFS,End of Frame Interrupt Status" "0,1"
bitfld.long 0x4 0. "FOS,FIFO Overflow Interrupt Status" "0,1"
group.long 0x58++0xB
line.long 0x0 "V8DMR,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "A8BIT_7_0,Alpha 8"
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x0 22. "FDS,Fill Data Select" "0: Fill data is 0,1: Fill data is sign data"
bitfld.long 0x0 19.--21. "RMODE_2_0,RAW Data Transfer Mode" "0: 8-bit RAW data,1: Setting prohibited,?,?,?,?,?,?"
newline
rbitfld.long 0x0 17.--18. "Reserved_17,Reserved" "0,1,2,3"
bitfld.long 0x0 16. "EVA,Even Field Address Offset" "0: Data are stored from the base address in..,1: Data are stored from the base address plus the.."
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 12.--14. "YMODE_2_0,YC Data Transfer Mode" "0: Both Y and CbCr data are transferred to memory,1: Only Y data is transferred to memory as 8-bit data,?,?,?,?,?,?"
newline
bitfld.long 0x0 11. "YC_THR,YC Data Through Mode" "0: Y and CbCr data are transferred to memory..,1: Y and CbCr data are transferred to memory as.."
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "EXRGB,Extension RGB Conversion Mode" "0: RGB data extension processing is not performed,1: Data is extended to 32-bit RGB conversion when.."
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "BPSM,Output Data Byte Swap Mode" "0: Bytes are not swapped in output data,1: Bytes are swapped in output data"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 2. "ABIT,Alpha Bit" "0: The alpha value is set to 0,1: The alpha value is set to 1"
bitfld.long 0x0 0.--1. "DTMD_1_0,Data Conversion Mode" "0: Data is not converted,1: RGB is converted to ARGB before output,?,?"
line.long 0x4 "V8DMR2,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "MFC,Multi Frame Capture Mode" "0: Disables multi frame capture mode,1: Enables multi frame capture mode"
newline
rbitfld.long 0x4 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x4 17. "FTEV,VSYNC Field Toggle Mode Enable" "0: The field toggle function according to the VSYNC..,1: The field toggle function according to the VSYNC.."
newline
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "VLV_3_0,VSYNC Field Toggle Mode Transition Period"
newline
hexmask.long.word 0x4 0.--11. 1. "Reserved_0,Reserved"
line.long 0x8 "V8UVAOF,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "UVAOF_24_0,UV Data Address Offset"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the 128-byte boundary of the UVAOF value."
rgroup.long 0xD4++0x3
line.long 0x0 "V8WLC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 30.--31. "SWFBS_1_0,Smallest Writing Frame Buffer Status" "0,1,2,3"
hexmask.long.word 0x0 16.--29. 1. "SWLC_13_0,Smallest Write Line Count"
newline
bitfld.long 0x0 14.--15. "WFBS_1_0,Writing Frame Buffer Status" "0: Frame buffer under writing has the base address..,1: Frame buffer under writing has the base address..,?,?"
hexmask.long.word 0x0 0.--13. 1. "WLC_13_0,Write Line Count"
group.long 0xF0++0xB
line.long 0x0 "V8IMWUCH,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WUMD,Wake Up Mode" "0: The WLC[13:0] bits value in the VnWLC,1: The SWLC[13:0] bits value in the VnWLC"
bitfld.long 0x0 30. "SVMD,Smallest Value Mode" "0: The SWLC[13:0] bits value between video channel..,1: The SWLC[13:0] bits value between the below.."
newline
hexmask.long.word 0x0 19.--29. 1. "Reserved_19,Reserved"
bitfld.long 0x0 18. "WUE3,Wake Up Enable 3" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
bitfld.long 0x0 17. "WUE2,Wake Up Enable 2" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
bitfld.long 0x0 16. "WUE1,Wake Up Enable 1" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "WUCH,Wake Up Enable" "0: Disables wake up notification to IMRn and VSPXn,1: Enables wake up notification to IMRn and VSPXn"
line.long 0x4 "V8IMWUL,Note: Availability of channels: n = 0 to 15"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "WUL2_13_0,Wake Up Line 2"
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "WUL1_13_0,Wake Up Line 1"
line.long 0x8 "V8IMWUL2,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x8 0.--13. 1. "WUL3_13_0,Wake Up Line 3"
group.long 0x320++0x1B
line.long 0x0 "V8FNSC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "HRCHK,HW Redundancy Error check" "0: Disable error of HW Redundancy detection,1: Enable error of HW Redundancy detection"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 26.--27. "HCEN_1_0,Enable Hsync Rise Time Measurement" "0: Disable Hsync rise time measurement,1: Enable minimum Hsync rise time measurement,?,?"
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 23. "CRM,CRC Calculation Mode" "0: Only calculate CRC,1: Input expected value and compare the CRC.."
rbitfld.long 0x0 21.--22. "Reserved_21,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 19.--20. "EDID_1_0,EDC ID" "0: Channel Selector,1: Prohibit,?,?"
bitfld.long 0x0 18. "FED_EN,FIFO EDC Enable" "0: Disable EDC error of Write FIFO detection,1: Enable EDC error of Write FIFO detection"
newline
bitfld.long 0x0 17. "CED_EN,Channel Selector EDC Enable" "0: Disable EDC error of channel selector detection,1: Enable EDC error of channel selector detection"
rbitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
bitfld.long 0x0 15. "EDCDEI,EDC Dummy Error Injection" "0: Not issue dummy EDC error,1: Issue dummy EDC error"
bitfld.long 0x0 14. "DEI,Dummy Error Injection" "0: Not issue dummy error,1: Issue dummy error"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
bitfld.long 0x0 11. "DEER_DM,Data Enable Assert Cycle Error Detection Mode" "0: Data enable assert cycle error is not detected,1: Data enable assert cycle error is detected"
newline
bitfld.long 0x0 9.--10. "DECE_1_0,Enable CLKENB Assert Cycle Measurement" "0: Disable Data enable assert cycle measurement,1: Enable minimum Data enable assert cycle..,?,?"
rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4.--5. "VSCE_1_0,Enable VSYNC Toggle Cycle Measurement" "0: Disable VSYNC toggle cycle measurement,1: Enable minimum VSYNC toggle cycle measurement,?,?"
bitfld.long 0x0 2.--3. "HSCE_1_0,Enable HSYNC Toggle Cycle Measurement" "0: Disable HSYNC toggle cycle measurement,1: Enable minimum HSYNC toggle cycle measurement,?,?"
newline
bitfld.long 0x0 0.--1. "FLCE_1_0,Enable FIELD Toggle Cycle Measurement" "0: Disable FIELD toggle cycle measurement,1: Enable minimum FIELD toggle cycle measurement,?,?"
line.long 0x4 "V8FTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "FLD_CNT_MIN_31_0,FIELD Toggle Cycle Minimum Value"
line.long 0x8 "V8FTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "FLD_CNT_MAX_31_0,FIELD Toggle Cycle Maximum Value"
line.long 0xC "V8HSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "HS_CNT_MIN_31_0,HSYNC Toggle Cycle Minimum Value"
line.long 0x10 "V8HSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x10 0.--31. 1. "HS_CNT_MAX_31_0,HSYNC Toggle Cycle Maximum Value"
line.long 0x14 "V8VSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x14 0.--31. 1. "VS_CNT_MIN_31_0,VSYNC Toggle Cycle Minimum Value"
line.long 0x18 "V8VSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x18 0.--31. 1. "VS_CNT_MAX_31_0,VSYNC Toggle Cycle Maximum Value"
group.long 0x344++0x3
line.long 0x0 "V8DET,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "DE_CNT_MAX_15_0,CLKENB Enable Cycle Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "DE_CNT_MIN_15_0,CLKENB Enable Cycle Minimum Value"
rgroup.long 0x354++0x3
line.long 0x0 "V8VCRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x0 0.--31. 1. "VCRC_31_0,VCRC Code"
group.long 0x36C++0x3
line.long 0x0 "V8HRT,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "HR_CNT_MAX_15_0,Hsync Rise Time Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "HR_CNT_MIN_15_0,Hsync Rise Time Minimum Value"
group.long 0x380++0xF
line.long 0x0 "V8CRCC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 29.--31. "IDBOE_2_0,Input Data Byte Order of Even line" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 26.--28. "Reserved_26,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 25. "Y420MD,YUV420 Mode" "0: Not YCbCr-420,1: YCbCr-420"
bitfld.long 0x0 24. "INSEL,Input Data Select" "0: Before image size clip,1: After image size clip"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 22. "IDRE,Input Data Reflection of Even line" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 18.--21. 1. "Reserved_18,Reserved"
bitfld.long 0x0 16.--17. "IDBLE_1_0,Input Data Byte length of Even line" "0: 1-byte data,1: 2-byte data,?,?"
newline
bitfld.long 0x0 13.--15. "IDBO_2_0,Input Data Byte Order" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 8.--12. 1. "PDBL_4_0,Polynomial Equation Coefficient Data Bit Length"
newline
bitfld.long 0x0 7. "ROR,Remainder Output Reflection" "0: No reflection,1: Apply reflection"
bitfld.long 0x0 6. "IDR,Input Data Reflection" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 2.--5. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "IDBL_1_0,Input Data Byte length" "0: 1-byte data,1: 2-byte data,?,?"
line.long 0x4 "V8CRPEC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "CPLYEC_31_0,CRC Polynomial Equation Coefficient"
line.long 0x8 "V8CRIR,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "CIR_31_0,CRC Initial Remainder"
line.long 0xC "V8CRXRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "CXORC_31_0,CRC Final XOR Coefficient"
group.long 0x3F0++0x7
line.long 0x0 "V8EE,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x0 16.--26. 1. "HREE_10_0,HW Redundancy Error Detection Interrupt Enable"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "CCEE,ECRC Comparison Error Detection Interrupt Enable" "0: ECRC comparison error detection interrupts are..,1: ECRC comparison error detection interrupts are.."
newline
bitfld.long 0x0 3. "EFEE,EDC of FIFO Error Detection Interrupt Enable" "0: EDC error of Write FIFO detection interrupts are..,1: EDC error of Write FIFO detection interrupts are.."
bitfld.long 0x0 2. "ECEE,EDC of Channel Selector Conversion Error Detection Interrupt Enable" "0: EDC error of Channel Selector conversion logic..,1: EDC error of Channel Selector conversion logic.."
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "SEE,Sync Interval Checker Error Detect Interrupt Enable" "0: Sync Interval Checker error detect interrupts..,1: Sync Interval Checker error detect interrupts.."
line.long 0x4 "V8ERS,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x4 16.--26. 1. "HRER_10_0,HW Redundancy Error Detection Interrupt Status"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "CCER,ECRC Comparison Error Detection Interrupt Status" "0,1"
newline
bitfld.long 0x4 3. "EFER,EDC of FIFO Error Detection Interrupt Status" "0,1"
bitfld.long 0x4 2. "ECER,EDC of Channel Selector Conversion Error Detection Interrupt Status" "0,1"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x4 0. "SER,Sync Interval Checker Error Detect Interrupt Status" "0,1"
tree.end
tree "VIN_9"
base ad:0xE6EF9000
group.long 0x0++0x3
line.long 0x0 "V9MC,Notes: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WLCEN,Write Line Counter Enable" "0: Disables the write line count,1: Enables the write line count"
hexmask.long.word 0x0 22.--30. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "FOC,Field Order Control" "0: Top field = Odd field,1: Top field = Even field"
rbitfld.long 0x0 19.--20. "Reserved_19,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 16.--18. "INF_2_0,Input Interface Format" "0: Setting prohibited,1: YUV422 8-bit or YUV420 8-bit input*1,?,?,?,?,?,?"
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "EXINF_1_0,Extension Interface Select" "0,1,2,3"
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "VUP,VIN Register Update Control" "0: The register contents are updated immediately..,1: The register contents are updated after a valid.."
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 6. "EN,Endian Type" "0: Image data is packed and allocated in little..,1: Image data is packed and allocated in big endian"
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 3.--4. "IM_1_0,Interlace Mode" "0: Odd-field,1: Odd-/even-field capture mode,?,?"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "ME,Module Enable" "0: The module operation is stopped,1: The module operation is enabled"
rgroup.long 0x4++0x3
line.long 0x0 "V9MS,Notes: Availability of channels: n = 0 to 15"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 3.--4. "FBS_1_0,Frame Buffer Status" "0: The latest valid frame buffer has the base..,1: The latest valid frame buffer has the base..,?,?"
newline
bitfld.long 0x0 2. "FS,Field Status" "0: The current field is an odd field,1: The current field is an even field"
bitfld.long 0x0 1. "AV,Active Video Status" "0: The current field is not in the active video area,1: The current field is in the active video area"
newline
bitfld.long 0x0 0. "CA,Video Capture Active Status" "0: Video capture is not operating,1: Video capture is operating"
group.long 0x8++0x13
line.long 0x0 "V9FC,Note: Availability of channels: n=0 to 15"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CC,Continuous Frame Capture Mode" "0: The continuous frame capture mode is not set,1: The continuous frame capture mode is set"
newline
bitfld.long 0x0 0. "SC,Single Frame Capture Mode" "0: The single frame capture mode is not set,1: The single frame capture mode is set"
line.long 0x4 "V9SLPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x4 0.--11. 1. "SLPrC_11_0,Start Line Pre-Clip"
line.long 0x8 "V9ELPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x8 0.--11. 1. "ELPrC_11_0,End Line Pre-Clip"
line.long 0xC "V9SPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0xC 0.--11. 1. "SPPrC_11_0,Start Pixel Pre-Clip"
line.long 0x10 "V9EPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x10 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x10 0.--11. 1. "EPPrC_11_0,End Pixel Pre-Clip"
group.long 0x2C++0xF
line.long 0x0 "V9IS,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 4.--15. 1. "IS_11_0,Image Stride"
newline
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved bits that indicate the lower-order four bits of the image stride."
line.long 0x4 "V9MB1,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 7.--31. 1. "MB1_24_0,Memory Base Address 1"
hexmask.long.byte 0x4 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 1 (a multiple of 128 bytes)."
line.long 0x8 "V9MB2,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "MB2_24_0,Memory Base Address 2"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 2 (a multiple of 128 bytes)."
line.long 0xC "V9MB3,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 7.--31. 1. "MB3_24_0,Memory Base Address 3"
hexmask.long.byte 0xC 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 3 (a multiple of 128 bytes)."
rgroup.long 0x3C++0x3
line.long 0x0 "V9LC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x0 0.--11. 1. "LC_11_0,Line Count"
group.long 0x40++0x7
line.long 0x0 "V9IE,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "FIE2,Field Interrupt Enable 2" "0: Field interrupts are disabled,1: Field interrupts are enabled"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x0 24. "WUE,Wake-up Notification Interrupt Enable" "0: Wake-up notification interrupts are disabled,1: Wake-up notification interrupts are enabled"
hexmask.long.byte 0x0 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "VFE,VSYNC Falling Edge Detect Interrupt Enable" "0: VSYNC falling edge detect interrupts are disabled,1: VSYNC falling edge detect interrupts are enabled"
bitfld.long 0x0 16. "VRE,VSYNC Rising Edge Detect Interrupt Enable" "0: VSYNC rising edge detect interrupts are disabled,1: VSYNC rising edge detect interrupts are enabled"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "FIE,Field Interrupt Enable" "0: Field-switching interrupts are disabled,1: Field-switching interrupts are enabled"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x0 1. "EFE,End of Frame Interrupt Enable" "0: End of frame interrupts are disabled,1: End of frame interrupts are enabled"
bitfld.long 0x0 0. "FOE,FIFO Overflow Interrupt Enable" "0: FIFO overflow interrupts are disabled,1: FIFO overflow interrupts are enabled"
line.long 0x4 "V9INTS,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x4 31. "FIS2,Field Interrupt Status 2" "0,1"
hexmask.long.byte 0x4 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x4 24. "WUS,Wake-up Notification Interrupt Status" "0,1"
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "VFS,VSYNC Falling Edge Detect Interrupt Status" "0,1"
bitfld.long 0x4 16. "VRS,VSYNC Rising Edge Detect Interrupt Status" "0,1"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "FIS,Field Interrupt Status" "0,1"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x4 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x4 1. "EFS,End of Frame Interrupt Status" "0,1"
bitfld.long 0x4 0. "FOS,FIFO Overflow Interrupt Status" "0,1"
group.long 0x58++0xB
line.long 0x0 "V9DMR,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "A8BIT_7_0,Alpha 8"
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x0 22. "FDS,Fill Data Select" "0: Fill data is 0,1: Fill data is sign data"
bitfld.long 0x0 19.--21. "RMODE_2_0,RAW Data Transfer Mode" "0: 8-bit RAW data,1: Setting prohibited,?,?,?,?,?,?"
newline
rbitfld.long 0x0 17.--18. "Reserved_17,Reserved" "0,1,2,3"
bitfld.long 0x0 16. "EVA,Even Field Address Offset" "0: Data are stored from the base address in..,1: Data are stored from the base address plus the.."
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 12.--14. "YMODE_2_0,YC Data Transfer Mode" "0: Both Y and CbCr data are transferred to memory,1: Only Y data is transferred to memory as 8-bit data,?,?,?,?,?,?"
newline
bitfld.long 0x0 11. "YC_THR,YC Data Through Mode" "0: Y and CbCr data are transferred to memory..,1: Y and CbCr data are transferred to memory as.."
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "EXRGB,Extension RGB Conversion Mode" "0: RGB data extension processing is not performed,1: Data is extended to 32-bit RGB conversion when.."
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "BPSM,Output Data Byte Swap Mode" "0: Bytes are not swapped in output data,1: Bytes are swapped in output data"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 2. "ABIT,Alpha Bit" "0: The alpha value is set to 0,1: The alpha value is set to 1"
bitfld.long 0x0 0.--1. "DTMD_1_0,Data Conversion Mode" "0: Data is not converted,1: RGB is converted to ARGB before output,?,?"
line.long 0x4 "V9DMR2,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "MFC,Multi Frame Capture Mode" "0: Disables multi frame capture mode,1: Enables multi frame capture mode"
newline
rbitfld.long 0x4 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x4 17. "FTEV,VSYNC Field Toggle Mode Enable" "0: The field toggle function according to the VSYNC..,1: The field toggle function according to the VSYNC.."
newline
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "VLV_3_0,VSYNC Field Toggle Mode Transition Period"
newline
hexmask.long.word 0x4 0.--11. 1. "Reserved_0,Reserved"
line.long 0x8 "V9UVAOF,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "UVAOF_24_0,UV Data Address Offset"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the 128-byte boundary of the UVAOF value."
rgroup.long 0xD4++0x3
line.long 0x0 "V9WLC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 30.--31. "SWFBS_1_0,Smallest Writing Frame Buffer Status" "0,1,2,3"
hexmask.long.word 0x0 16.--29. 1. "SWLC_13_0,Smallest Write Line Count"
newline
bitfld.long 0x0 14.--15. "WFBS_1_0,Writing Frame Buffer Status" "0: Frame buffer under writing has the base address..,1: Frame buffer under writing has the base address..,?,?"
hexmask.long.word 0x0 0.--13. 1. "WLC_13_0,Write Line Count"
group.long 0xF0++0xB
line.long 0x0 "V9IMWUCH,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WUMD,Wake Up Mode" "0: The WLC[13:0] bits value in the VnWLC,1: The SWLC[13:0] bits value in the VnWLC"
bitfld.long 0x0 30. "SVMD,Smallest Value Mode" "0: The SWLC[13:0] bits value between video channel..,1: The SWLC[13:0] bits value between the below.."
newline
hexmask.long.word 0x0 19.--29. 1. "Reserved_19,Reserved"
bitfld.long 0x0 18. "WUE3,Wake Up Enable 3" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
bitfld.long 0x0 17. "WUE2,Wake Up Enable 2" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
bitfld.long 0x0 16. "WUE1,Wake Up Enable 1" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "WUCH,Wake Up Enable" "0: Disables wake up notification to IMRn and VSPXn,1: Enables wake up notification to IMRn and VSPXn"
line.long 0x4 "V9IMWUL,Note: Availability of channels: n = 0 to 15"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "WUL2_13_0,Wake Up Line 2"
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "WUL1_13_0,Wake Up Line 1"
line.long 0x8 "V9IMWUL2,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x8 0.--13. 1. "WUL3_13_0,Wake Up Line 3"
group.long 0x320++0x1B
line.long 0x0 "V9FNSC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "HRCHK,HW Redundancy Error check" "0: Disable error of HW Redundancy detection,1: Enable error of HW Redundancy detection"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 26.--27. "HCEN_1_0,Enable Hsync Rise Time Measurement" "0: Disable Hsync rise time measurement,1: Enable minimum Hsync rise time measurement,?,?"
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 23. "CRM,CRC Calculation Mode" "0: Only calculate CRC,1: Input expected value and compare the CRC.."
rbitfld.long 0x0 21.--22. "Reserved_21,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 19.--20. "EDID_1_0,EDC ID" "0: Channel Selector,1: Prohibit,?,?"
bitfld.long 0x0 18. "FED_EN,FIFO EDC Enable" "0: Disable EDC error of Write FIFO detection,1: Enable EDC error of Write FIFO detection"
newline
bitfld.long 0x0 17. "CED_EN,Channel Selector EDC Enable" "0: Disable EDC error of channel selector detection,1: Enable EDC error of channel selector detection"
rbitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
bitfld.long 0x0 15. "EDCDEI,EDC Dummy Error Injection" "0: Not issue dummy EDC error,1: Issue dummy EDC error"
bitfld.long 0x0 14. "DEI,Dummy Error Injection" "0: Not issue dummy error,1: Issue dummy error"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
bitfld.long 0x0 11. "DEER_DM,Data Enable Assert Cycle Error Detection Mode" "0: Data enable assert cycle error is not detected,1: Data enable assert cycle error is detected"
newline
bitfld.long 0x0 9.--10. "DECE_1_0,Enable CLKENB Assert Cycle Measurement" "0: Disable Data enable assert cycle measurement,1: Enable minimum Data enable assert cycle..,?,?"
rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4.--5. "VSCE_1_0,Enable VSYNC Toggle Cycle Measurement" "0: Disable VSYNC toggle cycle measurement,1: Enable minimum VSYNC toggle cycle measurement,?,?"
bitfld.long 0x0 2.--3. "HSCE_1_0,Enable HSYNC Toggle Cycle Measurement" "0: Disable HSYNC toggle cycle measurement,1: Enable minimum HSYNC toggle cycle measurement,?,?"
newline
bitfld.long 0x0 0.--1. "FLCE_1_0,Enable FIELD Toggle Cycle Measurement" "0: Disable FIELD toggle cycle measurement,1: Enable minimum FIELD toggle cycle measurement,?,?"
line.long 0x4 "V9FTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "FLD_CNT_MIN_31_0,FIELD Toggle Cycle Minimum Value"
line.long 0x8 "V9FTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "FLD_CNT_MAX_31_0,FIELD Toggle Cycle Maximum Value"
line.long 0xC "V9HSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "HS_CNT_MIN_31_0,HSYNC Toggle Cycle Minimum Value"
line.long 0x10 "V9HSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x10 0.--31. 1. "HS_CNT_MAX_31_0,HSYNC Toggle Cycle Maximum Value"
line.long 0x14 "V9VSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x14 0.--31. 1. "VS_CNT_MIN_31_0,VSYNC Toggle Cycle Minimum Value"
line.long 0x18 "V9VSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x18 0.--31. 1. "VS_CNT_MAX_31_0,VSYNC Toggle Cycle Maximum Value"
group.long 0x344++0x3
line.long 0x0 "V9DET,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "DE_CNT_MAX_15_0,CLKENB Enable Cycle Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "DE_CNT_MIN_15_0,CLKENB Enable Cycle Minimum Value"
rgroup.long 0x354++0x3
line.long 0x0 "V9VCRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x0 0.--31. 1. "VCRC_31_0,VCRC Code"
group.long 0x36C++0x3
line.long 0x0 "V9HRT,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "HR_CNT_MAX_15_0,Hsync Rise Time Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "HR_CNT_MIN_15_0,Hsync Rise Time Minimum Value"
group.long 0x380++0xF
line.long 0x0 "V9CRCC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 29.--31. "IDBOE_2_0,Input Data Byte Order of Even line" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 26.--28. "Reserved_26,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 25. "Y420MD,YUV420 Mode" "0: Not YCbCr-420,1: YCbCr-420"
bitfld.long 0x0 24. "INSEL,Input Data Select" "0: Before image size clip,1: After image size clip"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 22. "IDRE,Input Data Reflection of Even line" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 18.--21. 1. "Reserved_18,Reserved"
bitfld.long 0x0 16.--17. "IDBLE_1_0,Input Data Byte length of Even line" "0: 1-byte data,1: 2-byte data,?,?"
newline
bitfld.long 0x0 13.--15. "IDBO_2_0,Input Data Byte Order" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 8.--12. 1. "PDBL_4_0,Polynomial Equation Coefficient Data Bit Length"
newline
bitfld.long 0x0 7. "ROR,Remainder Output Reflection" "0: No reflection,1: Apply reflection"
bitfld.long 0x0 6. "IDR,Input Data Reflection" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 2.--5. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "IDBL_1_0,Input Data Byte length" "0: 1-byte data,1: 2-byte data,?,?"
line.long 0x4 "V9CRPEC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "CPLYEC_31_0,CRC Polynomial Equation Coefficient"
line.long 0x8 "V9CRIR,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "CIR_31_0,CRC Initial Remainder"
line.long 0xC "V9CRXRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "CXORC_31_0,CRC Final XOR Coefficient"
group.long 0x3F0++0x7
line.long 0x0 "V9EE,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x0 16.--26. 1. "HREE_10_0,HW Redundancy Error Detection Interrupt Enable"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "CCEE,ECRC Comparison Error Detection Interrupt Enable" "0: ECRC comparison error detection interrupts are..,1: ECRC comparison error detection interrupts are.."
newline
bitfld.long 0x0 3. "EFEE,EDC of FIFO Error Detection Interrupt Enable" "0: EDC error of Write FIFO detection interrupts are..,1: EDC error of Write FIFO detection interrupts are.."
bitfld.long 0x0 2. "ECEE,EDC of Channel Selector Conversion Error Detection Interrupt Enable" "0: EDC error of Channel Selector conversion logic..,1: EDC error of Channel Selector conversion logic.."
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "SEE,Sync Interval Checker Error Detect Interrupt Enable" "0: Sync Interval Checker error detect interrupts..,1: Sync Interval Checker error detect interrupts.."
line.long 0x4 "V9ERS,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x4 16.--26. 1. "HRER_10_0,HW Redundancy Error Detection Interrupt Status"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "CCER,ECRC Comparison Error Detection Interrupt Status" "0,1"
newline
bitfld.long 0x4 3. "EFER,EDC of FIFO Error Detection Interrupt Status" "0,1"
bitfld.long 0x4 2. "ECER,EDC of Channel Selector Conversion Error Detection Interrupt Status" "0,1"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x4 0. "SER,Sync Interval Checker Error Detect Interrupt Status" "0,1"
tree.end
tree "VIN_10"
base ad:0xE6EFA000
group.long 0x0++0x3
line.long 0x0 "V10MC,Notes: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WLCEN,Write Line Counter Enable" "0: Disables the write line count,1: Enables the write line count"
hexmask.long.word 0x0 22.--30. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "FOC,Field Order Control" "0: Top field = Odd field,1: Top field = Even field"
rbitfld.long 0x0 19.--20. "Reserved_19,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 16.--18. "INF_2_0,Input Interface Format" "0: Setting prohibited,1: YUV422 8-bit or YUV420 8-bit input*1,?,?,?,?,?,?"
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "EXINF_1_0,Extension Interface Select" "0,1,2,3"
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "VUP,VIN Register Update Control" "0: The register contents are updated immediately..,1: The register contents are updated after a valid.."
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 6. "EN,Endian Type" "0: Image data is packed and allocated in little..,1: Image data is packed and allocated in big endian"
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 3.--4. "IM_1_0,Interlace Mode" "0: Odd-field,1: Odd-/even-field capture mode,?,?"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "ME,Module Enable" "0: The module operation is stopped,1: The module operation is enabled"
rgroup.long 0x4++0x3
line.long 0x0 "V10MS,Notes: Availability of channels: n = 0 to 15"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 3.--4. "FBS_1_0,Frame Buffer Status" "0: The latest valid frame buffer has the base..,1: The latest valid frame buffer has the base..,?,?"
newline
bitfld.long 0x0 2. "FS,Field Status" "0: The current field is an odd field,1: The current field is an even field"
bitfld.long 0x0 1. "AV,Active Video Status" "0: The current field is not in the active video area,1: The current field is in the active video area"
newline
bitfld.long 0x0 0. "CA,Video Capture Active Status" "0: Video capture is not operating,1: Video capture is operating"
group.long 0x8++0x13
line.long 0x0 "V10FC,Note: Availability of channels: n=0 to 15"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CC,Continuous Frame Capture Mode" "0: The continuous frame capture mode is not set,1: The continuous frame capture mode is set"
newline
bitfld.long 0x0 0. "SC,Single Frame Capture Mode" "0: The single frame capture mode is not set,1: The single frame capture mode is set"
line.long 0x4 "V10SLPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x4 0.--11. 1. "SLPrC_11_0,Start Line Pre-Clip"
line.long 0x8 "V10ELPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x8 0.--11. 1. "ELPrC_11_0,End Line Pre-Clip"
line.long 0xC "V10SPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0xC 0.--11. 1. "SPPrC_11_0,Start Pixel Pre-Clip"
line.long 0x10 "V10EPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x10 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x10 0.--11. 1. "EPPrC_11_0,End Pixel Pre-Clip"
group.long 0x2C++0xF
line.long 0x0 "V10IS,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 4.--15. 1. "IS_11_0,Image Stride"
newline
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved bits that indicate the lower-order four bits of the image stride."
line.long 0x4 "V10MB1,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 7.--31. 1. "MB1_24_0,Memory Base Address 1"
hexmask.long.byte 0x4 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 1 (a multiple of 128 bytes)."
line.long 0x8 "V10MB2,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "MB2_24_0,Memory Base Address 2"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 2 (a multiple of 128 bytes)."
line.long 0xC "V10MB3,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 7.--31. 1. "MB3_24_0,Memory Base Address 3"
hexmask.long.byte 0xC 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 3 (a multiple of 128 bytes)."
rgroup.long 0x3C++0x3
line.long 0x0 "V10LC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x0 0.--11. 1. "LC_11_0,Line Count"
group.long 0x40++0x7
line.long 0x0 "V10IE,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "FIE2,Field Interrupt Enable 2" "0: Field interrupts are disabled,1: Field interrupts are enabled"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x0 24. "WUE,Wake-up Notification Interrupt Enable" "0: Wake-up notification interrupts are disabled,1: Wake-up notification interrupts are enabled"
hexmask.long.byte 0x0 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "VFE,VSYNC Falling Edge Detect Interrupt Enable" "0: VSYNC falling edge detect interrupts are disabled,1: VSYNC falling edge detect interrupts are enabled"
bitfld.long 0x0 16. "VRE,VSYNC Rising Edge Detect Interrupt Enable" "0: VSYNC rising edge detect interrupts are disabled,1: VSYNC rising edge detect interrupts are enabled"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "FIE,Field Interrupt Enable" "0: Field-switching interrupts are disabled,1: Field-switching interrupts are enabled"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x0 1. "EFE,End of Frame Interrupt Enable" "0: End of frame interrupts are disabled,1: End of frame interrupts are enabled"
bitfld.long 0x0 0. "FOE,FIFO Overflow Interrupt Enable" "0: FIFO overflow interrupts are disabled,1: FIFO overflow interrupts are enabled"
line.long 0x4 "V10INTS,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x4 31. "FIS2,Field Interrupt Status 2" "0,1"
hexmask.long.byte 0x4 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x4 24. "WUS,Wake-up Notification Interrupt Status" "0,1"
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "VFS,VSYNC Falling Edge Detect Interrupt Status" "0,1"
bitfld.long 0x4 16. "VRS,VSYNC Rising Edge Detect Interrupt Status" "0,1"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "FIS,Field Interrupt Status" "0,1"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x4 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x4 1. "EFS,End of Frame Interrupt Status" "0,1"
bitfld.long 0x4 0. "FOS,FIFO Overflow Interrupt Status" "0,1"
group.long 0x58++0xB
line.long 0x0 "V10DMR,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "A8BIT_7_0,Alpha 8"
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x0 22. "FDS,Fill Data Select" "0: Fill data is 0,1: Fill data is sign data"
bitfld.long 0x0 19.--21. "RMODE_2_0,RAW Data Transfer Mode" "0: 8-bit RAW data,1: Setting prohibited,?,?,?,?,?,?"
newline
rbitfld.long 0x0 17.--18. "Reserved_17,Reserved" "0,1,2,3"
bitfld.long 0x0 16. "EVA,Even Field Address Offset" "0: Data are stored from the base address in..,1: Data are stored from the base address plus the.."
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 12.--14. "YMODE_2_0,YC Data Transfer Mode" "0: Both Y and CbCr data are transferred to memory,1: Only Y data is transferred to memory as 8-bit data,?,?,?,?,?,?"
newline
bitfld.long 0x0 11. "YC_THR,YC Data Through Mode" "0: Y and CbCr data are transferred to memory..,1: Y and CbCr data are transferred to memory as.."
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "EXRGB,Extension RGB Conversion Mode" "0: RGB data extension processing is not performed,1: Data is extended to 32-bit RGB conversion when.."
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "BPSM,Output Data Byte Swap Mode" "0: Bytes are not swapped in output data,1: Bytes are swapped in output data"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 2. "ABIT,Alpha Bit" "0: The alpha value is set to 0,1: The alpha value is set to 1"
bitfld.long 0x0 0.--1. "DTMD_1_0,Data Conversion Mode" "0: Data is not converted,1: RGB is converted to ARGB before output,?,?"
line.long 0x4 "V10DMR2,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "MFC,Multi Frame Capture Mode" "0: Disables multi frame capture mode,1: Enables multi frame capture mode"
newline
rbitfld.long 0x4 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x4 17. "FTEV,VSYNC Field Toggle Mode Enable" "0: The field toggle function according to the VSYNC..,1: The field toggle function according to the VSYNC.."
newline
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "VLV_3_0,VSYNC Field Toggle Mode Transition Period"
newline
hexmask.long.word 0x4 0.--11. 1. "Reserved_0,Reserved"
line.long 0x8 "V10UVAOF,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "UVAOF_24_0,UV Data Address Offset"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the 128-byte boundary of the UVAOF value."
rgroup.long 0xD4++0x3
line.long 0x0 "V10WLC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 30.--31. "SWFBS_1_0,Smallest Writing Frame Buffer Status" "0,1,2,3"
hexmask.long.word 0x0 16.--29. 1. "SWLC_13_0,Smallest Write Line Count"
newline
bitfld.long 0x0 14.--15. "WFBS_1_0,Writing Frame Buffer Status" "0: Frame buffer under writing has the base address..,1: Frame buffer under writing has the base address..,?,?"
hexmask.long.word 0x0 0.--13. 1. "WLC_13_0,Write Line Count"
group.long 0xF0++0xB
line.long 0x0 "V10IMWUCH,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WUMD,Wake Up Mode" "0: The WLC[13:0] bits value in the VnWLC,1: The SWLC[13:0] bits value in the VnWLC"
bitfld.long 0x0 30. "SVMD,Smallest Value Mode" "0: The SWLC[13:0] bits value between video channel..,1: The SWLC[13:0] bits value between the below.."
newline
hexmask.long.word 0x0 19.--29. 1. "Reserved_19,Reserved"
bitfld.long 0x0 18. "WUE3,Wake Up Enable 3" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
bitfld.long 0x0 17. "WUE2,Wake Up Enable 2" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
bitfld.long 0x0 16. "WUE1,Wake Up Enable 1" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "WUCH,Wake Up Enable" "0: Disables wake up notification to IMRn and VSPXn,1: Enables wake up notification to IMRn and VSPXn"
line.long 0x4 "V10IMWUL,Note: Availability of channels: n = 0 to 15"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "WUL2_13_0,Wake Up Line 2"
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "WUL1_13_0,Wake Up Line 1"
line.long 0x8 "V10IMWUL2,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x8 0.--13. 1. "WUL3_13_0,Wake Up Line 3"
group.long 0x320++0x1B
line.long 0x0 "V10FNSC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "HRCHK,HW Redundancy Error check" "0: Disable error of HW Redundancy detection,1: Enable error of HW Redundancy detection"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 26.--27. "HCEN_1_0,Enable Hsync Rise Time Measurement" "0: Disable Hsync rise time measurement,1: Enable minimum Hsync rise time measurement,?,?"
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 23. "CRM,CRC Calculation Mode" "0: Only calculate CRC,1: Input expected value and compare the CRC.."
rbitfld.long 0x0 21.--22. "Reserved_21,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 19.--20. "EDID_1_0,EDC ID" "0: Channel Selector,1: Prohibit,?,?"
bitfld.long 0x0 18. "FED_EN,FIFO EDC Enable" "0: Disable EDC error of Write FIFO detection,1: Enable EDC error of Write FIFO detection"
newline
bitfld.long 0x0 17. "CED_EN,Channel Selector EDC Enable" "0: Disable EDC error of channel selector detection,1: Enable EDC error of channel selector detection"
rbitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
bitfld.long 0x0 15. "EDCDEI,EDC Dummy Error Injection" "0: Not issue dummy EDC error,1: Issue dummy EDC error"
bitfld.long 0x0 14. "DEI,Dummy Error Injection" "0: Not issue dummy error,1: Issue dummy error"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
bitfld.long 0x0 11. "DEER_DM,Data Enable Assert Cycle Error Detection Mode" "0: Data enable assert cycle error is not detected,1: Data enable assert cycle error is detected"
newline
bitfld.long 0x0 9.--10. "DECE_1_0,Enable CLKENB Assert Cycle Measurement" "0: Disable Data enable assert cycle measurement,1: Enable minimum Data enable assert cycle..,?,?"
rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4.--5. "VSCE_1_0,Enable VSYNC Toggle Cycle Measurement" "0: Disable VSYNC toggle cycle measurement,1: Enable minimum VSYNC toggle cycle measurement,?,?"
bitfld.long 0x0 2.--3. "HSCE_1_0,Enable HSYNC Toggle Cycle Measurement" "0: Disable HSYNC toggle cycle measurement,1: Enable minimum HSYNC toggle cycle measurement,?,?"
newline
bitfld.long 0x0 0.--1. "FLCE_1_0,Enable FIELD Toggle Cycle Measurement" "0: Disable FIELD toggle cycle measurement,1: Enable minimum FIELD toggle cycle measurement,?,?"
line.long 0x4 "V10FTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "FLD_CNT_MIN_31_0,FIELD Toggle Cycle Minimum Value"
line.long 0x8 "V10FTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "FLD_CNT_MAX_31_0,FIELD Toggle Cycle Maximum Value"
line.long 0xC "V10HSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "HS_CNT_MIN_31_0,HSYNC Toggle Cycle Minimum Value"
line.long 0x10 "V10HSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x10 0.--31. 1. "HS_CNT_MAX_31_0,HSYNC Toggle Cycle Maximum Value"
line.long 0x14 "V10VSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x14 0.--31. 1. "VS_CNT_MIN_31_0,VSYNC Toggle Cycle Minimum Value"
line.long 0x18 "V10VSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x18 0.--31. 1. "VS_CNT_MAX_31_0,VSYNC Toggle Cycle Maximum Value"
group.long 0x344++0x3
line.long 0x0 "V10DET,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "DE_CNT_MAX_15_0,CLKENB Enable Cycle Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "DE_CNT_MIN_15_0,CLKENB Enable Cycle Minimum Value"
rgroup.long 0x354++0x3
line.long 0x0 "V10VCRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x0 0.--31. 1. "VCRC_31_0,VCRC Code"
group.long 0x36C++0x3
line.long 0x0 "V10HRT,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "HR_CNT_MAX_15_0,Hsync Rise Time Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "HR_CNT_MIN_15_0,Hsync Rise Time Minimum Value"
group.long 0x380++0xF
line.long 0x0 "V10CRCC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 29.--31. "IDBOE_2_0,Input Data Byte Order of Even line" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 26.--28. "Reserved_26,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 25. "Y420MD,YUV420 Mode" "0: Not YCbCr-420,1: YCbCr-420"
bitfld.long 0x0 24. "INSEL,Input Data Select" "0: Before image size clip,1: After image size clip"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 22. "IDRE,Input Data Reflection of Even line" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 18.--21. 1. "Reserved_18,Reserved"
bitfld.long 0x0 16.--17. "IDBLE_1_0,Input Data Byte length of Even line" "0: 1-byte data,1: 2-byte data,?,?"
newline
bitfld.long 0x0 13.--15. "IDBO_2_0,Input Data Byte Order" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 8.--12. 1. "PDBL_4_0,Polynomial Equation Coefficient Data Bit Length"
newline
bitfld.long 0x0 7. "ROR,Remainder Output Reflection" "0: No reflection,1: Apply reflection"
bitfld.long 0x0 6. "IDR,Input Data Reflection" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 2.--5. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "IDBL_1_0,Input Data Byte length" "0: 1-byte data,1: 2-byte data,?,?"
line.long 0x4 "V10CRPEC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "CPLYEC_31_0,CRC Polynomial Equation Coefficient"
line.long 0x8 "V10CRIR,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "CIR_31_0,CRC Initial Remainder"
line.long 0xC "V10CRXRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "CXORC_31_0,CRC Final XOR Coefficient"
group.long 0x3F0++0x7
line.long 0x0 "V10EE,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x0 16.--26. 1. "HREE_10_0,HW Redundancy Error Detection Interrupt Enable"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "CCEE,ECRC Comparison Error Detection Interrupt Enable" "0: ECRC comparison error detection interrupts are..,1: ECRC comparison error detection interrupts are.."
newline
bitfld.long 0x0 3. "EFEE,EDC of FIFO Error Detection Interrupt Enable" "0: EDC error of Write FIFO detection interrupts are..,1: EDC error of Write FIFO detection interrupts are.."
bitfld.long 0x0 2. "ECEE,EDC of Channel Selector Conversion Error Detection Interrupt Enable" "0: EDC error of Channel Selector conversion logic..,1: EDC error of Channel Selector conversion logic.."
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "SEE,Sync Interval Checker Error Detect Interrupt Enable" "0: Sync Interval Checker error detect interrupts..,1: Sync Interval Checker error detect interrupts.."
line.long 0x4 "V10ERS,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x4 16.--26. 1. "HRER_10_0,HW Redundancy Error Detection Interrupt Status"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "CCER,ECRC Comparison Error Detection Interrupt Status" "0,1"
newline
bitfld.long 0x4 3. "EFER,EDC of FIFO Error Detection Interrupt Status" "0,1"
bitfld.long 0x4 2. "ECER,EDC of Channel Selector Conversion Error Detection Interrupt Status" "0,1"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x4 0. "SER,Sync Interval Checker Error Detect Interrupt Status" "0,1"
tree.end
tree "VIN_11"
base ad:0xE6EFB000
group.long 0x0++0x3
line.long 0x0 "V11MC,Notes: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WLCEN,Write Line Counter Enable" "0: Disables the write line count,1: Enables the write line count"
hexmask.long.word 0x0 22.--30. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "FOC,Field Order Control" "0: Top field = Odd field,1: Top field = Even field"
rbitfld.long 0x0 19.--20. "Reserved_19,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 16.--18. "INF_2_0,Input Interface Format" "0: Setting prohibited,1: YUV422 8-bit or YUV420 8-bit input*1,?,?,?,?,?,?"
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "EXINF_1_0,Extension Interface Select" "0,1,2,3"
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "VUP,VIN Register Update Control" "0: The register contents are updated immediately..,1: The register contents are updated after a valid.."
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 6. "EN,Endian Type" "0: Image data is packed and allocated in little..,1: Image data is packed and allocated in big endian"
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 3.--4. "IM_1_0,Interlace Mode" "0: Odd-field,1: Odd-/even-field capture mode,?,?"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "ME,Module Enable" "0: The module operation is stopped,1: The module operation is enabled"
rgroup.long 0x4++0x3
line.long 0x0 "V11MS,Notes: Availability of channels: n = 0 to 15"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 3.--4. "FBS_1_0,Frame Buffer Status" "0: The latest valid frame buffer has the base..,1: The latest valid frame buffer has the base..,?,?"
newline
bitfld.long 0x0 2. "FS,Field Status" "0: The current field is an odd field,1: The current field is an even field"
bitfld.long 0x0 1. "AV,Active Video Status" "0: The current field is not in the active video area,1: The current field is in the active video area"
newline
bitfld.long 0x0 0. "CA,Video Capture Active Status" "0: Video capture is not operating,1: Video capture is operating"
group.long 0x8++0x13
line.long 0x0 "V11FC,Note: Availability of channels: n=0 to 15"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CC,Continuous Frame Capture Mode" "0: The continuous frame capture mode is not set,1: The continuous frame capture mode is set"
newline
bitfld.long 0x0 0. "SC,Single Frame Capture Mode" "0: The single frame capture mode is not set,1: The single frame capture mode is set"
line.long 0x4 "V11SLPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x4 0.--11. 1. "SLPrC_11_0,Start Line Pre-Clip"
line.long 0x8 "V11ELPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x8 0.--11. 1. "ELPrC_11_0,End Line Pre-Clip"
line.long 0xC "V11SPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0xC 0.--11. 1. "SPPrC_11_0,Start Pixel Pre-Clip"
line.long 0x10 "V11EPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x10 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x10 0.--11. 1. "EPPrC_11_0,End Pixel Pre-Clip"
group.long 0x2C++0xF
line.long 0x0 "V11IS,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 4.--15. 1. "IS_11_0,Image Stride"
newline
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved bits that indicate the lower-order four bits of the image stride."
line.long 0x4 "V11MB1,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 7.--31. 1. "MB1_24_0,Memory Base Address 1"
hexmask.long.byte 0x4 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 1 (a multiple of 128 bytes)."
line.long 0x8 "V11MB2,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "MB2_24_0,Memory Base Address 2"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 2 (a multiple of 128 bytes)."
line.long 0xC "V11MB3,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 7.--31. 1. "MB3_24_0,Memory Base Address 3"
hexmask.long.byte 0xC 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 3 (a multiple of 128 bytes)."
rgroup.long 0x3C++0x3
line.long 0x0 "V11LC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x0 0.--11. 1. "LC_11_0,Line Count"
group.long 0x40++0x7
line.long 0x0 "V11IE,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "FIE2,Field Interrupt Enable 2" "0: Field interrupts are disabled,1: Field interrupts are enabled"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x0 24. "WUE,Wake-up Notification Interrupt Enable" "0: Wake-up notification interrupts are disabled,1: Wake-up notification interrupts are enabled"
hexmask.long.byte 0x0 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "VFE,VSYNC Falling Edge Detect Interrupt Enable" "0: VSYNC falling edge detect interrupts are disabled,1: VSYNC falling edge detect interrupts are enabled"
bitfld.long 0x0 16. "VRE,VSYNC Rising Edge Detect Interrupt Enable" "0: VSYNC rising edge detect interrupts are disabled,1: VSYNC rising edge detect interrupts are enabled"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "FIE,Field Interrupt Enable" "0: Field-switching interrupts are disabled,1: Field-switching interrupts are enabled"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x0 1. "EFE,End of Frame Interrupt Enable" "0: End of frame interrupts are disabled,1: End of frame interrupts are enabled"
bitfld.long 0x0 0. "FOE,FIFO Overflow Interrupt Enable" "0: FIFO overflow interrupts are disabled,1: FIFO overflow interrupts are enabled"
line.long 0x4 "V11INTS,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x4 31. "FIS2,Field Interrupt Status 2" "0,1"
hexmask.long.byte 0x4 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x4 24. "WUS,Wake-up Notification Interrupt Status" "0,1"
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "VFS,VSYNC Falling Edge Detect Interrupt Status" "0,1"
bitfld.long 0x4 16. "VRS,VSYNC Rising Edge Detect Interrupt Status" "0,1"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "FIS,Field Interrupt Status" "0,1"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x4 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x4 1. "EFS,End of Frame Interrupt Status" "0,1"
bitfld.long 0x4 0. "FOS,FIFO Overflow Interrupt Status" "0,1"
group.long 0x58++0xB
line.long 0x0 "V11DMR,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "A8BIT_7_0,Alpha 8"
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x0 22. "FDS,Fill Data Select" "0: Fill data is 0,1: Fill data is sign data"
bitfld.long 0x0 19.--21. "RMODE_2_0,RAW Data Transfer Mode" "0: 8-bit RAW data,1: Setting prohibited,?,?,?,?,?,?"
newline
rbitfld.long 0x0 17.--18. "Reserved_17,Reserved" "0,1,2,3"
bitfld.long 0x0 16. "EVA,Even Field Address Offset" "0: Data are stored from the base address in..,1: Data are stored from the base address plus the.."
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 12.--14. "YMODE_2_0,YC Data Transfer Mode" "0: Both Y and CbCr data are transferred to memory,1: Only Y data is transferred to memory as 8-bit data,?,?,?,?,?,?"
newline
bitfld.long 0x0 11. "YC_THR,YC Data Through Mode" "0: Y and CbCr data are transferred to memory..,1: Y and CbCr data are transferred to memory as.."
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "EXRGB,Extension RGB Conversion Mode" "0: RGB data extension processing is not performed,1: Data is extended to 32-bit RGB conversion when.."
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "BPSM,Output Data Byte Swap Mode" "0: Bytes are not swapped in output data,1: Bytes are swapped in output data"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 2. "ABIT,Alpha Bit" "0: The alpha value is set to 0,1: The alpha value is set to 1"
bitfld.long 0x0 0.--1. "DTMD_1_0,Data Conversion Mode" "0: Data is not converted,1: RGB is converted to ARGB before output,?,?"
line.long 0x4 "V11DMR2,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "MFC,Multi Frame Capture Mode" "0: Disables multi frame capture mode,1: Enables multi frame capture mode"
newline
rbitfld.long 0x4 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x4 17. "FTEV,VSYNC Field Toggle Mode Enable" "0: The field toggle function according to the VSYNC..,1: The field toggle function according to the VSYNC.."
newline
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "VLV_3_0,VSYNC Field Toggle Mode Transition Period"
newline
hexmask.long.word 0x4 0.--11. 1. "Reserved_0,Reserved"
line.long 0x8 "V11UVAOF,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "UVAOF_24_0,UV Data Address Offset"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the 128-byte boundary of the UVAOF value."
rgroup.long 0xD4++0x3
line.long 0x0 "V11WLC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 30.--31. "SWFBS_1_0,Smallest Writing Frame Buffer Status" "0,1,2,3"
hexmask.long.word 0x0 16.--29. 1. "SWLC_13_0,Smallest Write Line Count"
newline
bitfld.long 0x0 14.--15. "WFBS_1_0,Writing Frame Buffer Status" "0: Frame buffer under writing has the base address..,1: Frame buffer under writing has the base address..,?,?"
hexmask.long.word 0x0 0.--13. 1. "WLC_13_0,Write Line Count"
group.long 0xF0++0xB
line.long 0x0 "V11IMWUCH,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WUMD,Wake Up Mode" "0: The WLC[13:0] bits value in the VnWLC,1: The SWLC[13:0] bits value in the VnWLC"
bitfld.long 0x0 30. "SVMD,Smallest Value Mode" "0: The SWLC[13:0] bits value between video channel..,1: The SWLC[13:0] bits value between the below.."
newline
hexmask.long.word 0x0 19.--29. 1. "Reserved_19,Reserved"
bitfld.long 0x0 18. "WUE3,Wake Up Enable 3" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
bitfld.long 0x0 17. "WUE2,Wake Up Enable 2" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
bitfld.long 0x0 16. "WUE1,Wake Up Enable 1" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "WUCH,Wake Up Enable" "0: Disables wake up notification to IMRn and VSPXn,1: Enables wake up notification to IMRn and VSPXn"
line.long 0x4 "V11IMWUL,Note: Availability of channels: n = 0 to 15"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "WUL2_13_0,Wake Up Line 2"
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "WUL1_13_0,Wake Up Line 1"
line.long 0x8 "V11IMWUL2,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x8 0.--13. 1. "WUL3_13_0,Wake Up Line 3"
group.long 0x320++0x1B
line.long 0x0 "V11FNSC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "HRCHK,HW Redundancy Error check" "0: Disable error of HW Redundancy detection,1: Enable error of HW Redundancy detection"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 26.--27. "HCEN_1_0,Enable Hsync Rise Time Measurement" "0: Disable Hsync rise time measurement,1: Enable minimum Hsync rise time measurement,?,?"
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 23. "CRM,CRC Calculation Mode" "0: Only calculate CRC,1: Input expected value and compare the CRC.."
rbitfld.long 0x0 21.--22. "Reserved_21,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 19.--20. "EDID_1_0,EDC ID" "0: Channel Selector,1: Prohibit,?,?"
bitfld.long 0x0 18. "FED_EN,FIFO EDC Enable" "0: Disable EDC error of Write FIFO detection,1: Enable EDC error of Write FIFO detection"
newline
bitfld.long 0x0 17. "CED_EN,Channel Selector EDC Enable" "0: Disable EDC error of channel selector detection,1: Enable EDC error of channel selector detection"
rbitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
bitfld.long 0x0 15. "EDCDEI,EDC Dummy Error Injection" "0: Not issue dummy EDC error,1: Issue dummy EDC error"
bitfld.long 0x0 14. "DEI,Dummy Error Injection" "0: Not issue dummy error,1: Issue dummy error"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
bitfld.long 0x0 11. "DEER_DM,Data Enable Assert Cycle Error Detection Mode" "0: Data enable assert cycle error is not detected,1: Data enable assert cycle error is detected"
newline
bitfld.long 0x0 9.--10. "DECE_1_0,Enable CLKENB Assert Cycle Measurement" "0: Disable Data enable assert cycle measurement,1: Enable minimum Data enable assert cycle..,?,?"
rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4.--5. "VSCE_1_0,Enable VSYNC Toggle Cycle Measurement" "0: Disable VSYNC toggle cycle measurement,1: Enable minimum VSYNC toggle cycle measurement,?,?"
bitfld.long 0x0 2.--3. "HSCE_1_0,Enable HSYNC Toggle Cycle Measurement" "0: Disable HSYNC toggle cycle measurement,1: Enable minimum HSYNC toggle cycle measurement,?,?"
newline
bitfld.long 0x0 0.--1. "FLCE_1_0,Enable FIELD Toggle Cycle Measurement" "0: Disable FIELD toggle cycle measurement,1: Enable minimum FIELD toggle cycle measurement,?,?"
line.long 0x4 "V11FTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "FLD_CNT_MIN_31_0,FIELD Toggle Cycle Minimum Value"
line.long 0x8 "V11FTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "FLD_CNT_MAX_31_0,FIELD Toggle Cycle Maximum Value"
line.long 0xC "V11HSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "HS_CNT_MIN_31_0,HSYNC Toggle Cycle Minimum Value"
line.long 0x10 "V11HSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x10 0.--31. 1. "HS_CNT_MAX_31_0,HSYNC Toggle Cycle Maximum Value"
line.long 0x14 "V11VSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x14 0.--31. 1. "VS_CNT_MIN_31_0,VSYNC Toggle Cycle Minimum Value"
line.long 0x18 "V11VSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x18 0.--31. 1. "VS_CNT_MAX_31_0,VSYNC Toggle Cycle Maximum Value"
group.long 0x344++0x3
line.long 0x0 "V11DET,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "DE_CNT_MAX_15_0,CLKENB Enable Cycle Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "DE_CNT_MIN_15_0,CLKENB Enable Cycle Minimum Value"
rgroup.long 0x354++0x3
line.long 0x0 "V11VCRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x0 0.--31. 1. "VCRC_31_0,VCRC Code"
group.long 0x36C++0x3
line.long 0x0 "V11HRT,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "HR_CNT_MAX_15_0,Hsync Rise Time Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "HR_CNT_MIN_15_0,Hsync Rise Time Minimum Value"
group.long 0x380++0xF
line.long 0x0 "V11CRCC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 29.--31. "IDBOE_2_0,Input Data Byte Order of Even line" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 26.--28. "Reserved_26,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 25. "Y420MD,YUV420 Mode" "0: Not YCbCr-420,1: YCbCr-420"
bitfld.long 0x0 24. "INSEL,Input Data Select" "0: Before image size clip,1: After image size clip"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 22. "IDRE,Input Data Reflection of Even line" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 18.--21. 1. "Reserved_18,Reserved"
bitfld.long 0x0 16.--17. "IDBLE_1_0,Input Data Byte length of Even line" "0: 1-byte data,1: 2-byte data,?,?"
newline
bitfld.long 0x0 13.--15. "IDBO_2_0,Input Data Byte Order" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 8.--12. 1. "PDBL_4_0,Polynomial Equation Coefficient Data Bit Length"
newline
bitfld.long 0x0 7. "ROR,Remainder Output Reflection" "0: No reflection,1: Apply reflection"
bitfld.long 0x0 6. "IDR,Input Data Reflection" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 2.--5. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "IDBL_1_0,Input Data Byte length" "0: 1-byte data,1: 2-byte data,?,?"
line.long 0x4 "V11CRPEC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "CPLYEC_31_0,CRC Polynomial Equation Coefficient"
line.long 0x8 "V11CRIR,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "CIR_31_0,CRC Initial Remainder"
line.long 0xC "V11CRXRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "CXORC_31_0,CRC Final XOR Coefficient"
group.long 0x3F0++0x7
line.long 0x0 "V11EE,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x0 16.--26. 1. "HREE_10_0,HW Redundancy Error Detection Interrupt Enable"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "CCEE,ECRC Comparison Error Detection Interrupt Enable" "0: ECRC comparison error detection interrupts are..,1: ECRC comparison error detection interrupts are.."
newline
bitfld.long 0x0 3. "EFEE,EDC of FIFO Error Detection Interrupt Enable" "0: EDC error of Write FIFO detection interrupts are..,1: EDC error of Write FIFO detection interrupts are.."
bitfld.long 0x0 2. "ECEE,EDC of Channel Selector Conversion Error Detection Interrupt Enable" "0: EDC error of Channel Selector conversion logic..,1: EDC error of Channel Selector conversion logic.."
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "SEE,Sync Interval Checker Error Detect Interrupt Enable" "0: Sync Interval Checker error detect interrupts..,1: Sync Interval Checker error detect interrupts.."
line.long 0x4 "V11ERS,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x4 16.--26. 1. "HRER_10_0,HW Redundancy Error Detection Interrupt Status"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "CCER,ECRC Comparison Error Detection Interrupt Status" "0,1"
newline
bitfld.long 0x4 3. "EFER,EDC of FIFO Error Detection Interrupt Status" "0,1"
bitfld.long 0x4 2. "ECER,EDC of Channel Selector Conversion Error Detection Interrupt Status" "0,1"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x4 0. "SER,Sync Interval Checker Error Detect Interrupt Status" "0,1"
tree.end
tree "VIN_12"
base ad:0xE6EFC000
group.long 0x0++0x3
line.long 0x0 "V12MC,Notes: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WLCEN,Write Line Counter Enable" "0: Disables the write line count,1: Enables the write line count"
hexmask.long.word 0x0 22.--30. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "FOC,Field Order Control" "0: Top field = Odd field,1: Top field = Even field"
rbitfld.long 0x0 19.--20. "Reserved_19,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 16.--18. "INF_2_0,Input Interface Format" "0: Setting prohibited,1: YUV422 8-bit or YUV420 8-bit input*1,?,?,?,?,?,?"
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "EXINF_1_0,Extension Interface Select" "0,1,2,3"
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "VUP,VIN Register Update Control" "0: The register contents are updated immediately..,1: The register contents are updated after a valid.."
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 6. "EN,Endian Type" "0: Image data is packed and allocated in little..,1: Image data is packed and allocated in big endian"
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 3.--4. "IM_1_0,Interlace Mode" "0: Odd-field,1: Odd-/even-field capture mode,?,?"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "ME,Module Enable" "0: The module operation is stopped,1: The module operation is enabled"
rgroup.long 0x4++0x3
line.long 0x0 "V12MS,Notes: Availability of channels: n = 0 to 15"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 3.--4. "FBS_1_0,Frame Buffer Status" "0: The latest valid frame buffer has the base..,1: The latest valid frame buffer has the base..,?,?"
newline
bitfld.long 0x0 2. "FS,Field Status" "0: The current field is an odd field,1: The current field is an even field"
bitfld.long 0x0 1. "AV,Active Video Status" "0: The current field is not in the active video area,1: The current field is in the active video area"
newline
bitfld.long 0x0 0. "CA,Video Capture Active Status" "0: Video capture is not operating,1: Video capture is operating"
group.long 0x8++0x13
line.long 0x0 "V12FC,Note: Availability of channels: n=0 to 15"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CC,Continuous Frame Capture Mode" "0: The continuous frame capture mode is not set,1: The continuous frame capture mode is set"
newline
bitfld.long 0x0 0. "SC,Single Frame Capture Mode" "0: The single frame capture mode is not set,1: The single frame capture mode is set"
line.long 0x4 "V12SLPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x4 0.--11. 1. "SLPrC_11_0,Start Line Pre-Clip"
line.long 0x8 "V12ELPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x8 0.--11. 1. "ELPrC_11_0,End Line Pre-Clip"
line.long 0xC "V12SPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0xC 0.--11. 1. "SPPrC_11_0,Start Pixel Pre-Clip"
line.long 0x10 "V12EPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x10 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x10 0.--11. 1. "EPPrC_11_0,End Pixel Pre-Clip"
group.long 0x2C++0xF
line.long 0x0 "V12IS,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 4.--15. 1. "IS_11_0,Image Stride"
newline
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved bits that indicate the lower-order four bits of the image stride."
line.long 0x4 "V12MB1,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 7.--31. 1. "MB1_24_0,Memory Base Address 1"
hexmask.long.byte 0x4 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 1 (a multiple of 128 bytes)."
line.long 0x8 "V12MB2,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "MB2_24_0,Memory Base Address 2"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 2 (a multiple of 128 bytes)."
line.long 0xC "V12MB3,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 7.--31. 1. "MB3_24_0,Memory Base Address 3"
hexmask.long.byte 0xC 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 3 (a multiple of 128 bytes)."
rgroup.long 0x3C++0x3
line.long 0x0 "V12LC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x0 0.--11. 1. "LC_11_0,Line Count"
group.long 0x40++0x7
line.long 0x0 "V12IE,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "FIE2,Field Interrupt Enable 2" "0: Field interrupts are disabled,1: Field interrupts are enabled"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x0 24. "WUE,Wake-up Notification Interrupt Enable" "0: Wake-up notification interrupts are disabled,1: Wake-up notification interrupts are enabled"
hexmask.long.byte 0x0 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "VFE,VSYNC Falling Edge Detect Interrupt Enable" "0: VSYNC falling edge detect interrupts are disabled,1: VSYNC falling edge detect interrupts are enabled"
bitfld.long 0x0 16. "VRE,VSYNC Rising Edge Detect Interrupt Enable" "0: VSYNC rising edge detect interrupts are disabled,1: VSYNC rising edge detect interrupts are enabled"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "FIE,Field Interrupt Enable" "0: Field-switching interrupts are disabled,1: Field-switching interrupts are enabled"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x0 1. "EFE,End of Frame Interrupt Enable" "0: End of frame interrupts are disabled,1: End of frame interrupts are enabled"
bitfld.long 0x0 0. "FOE,FIFO Overflow Interrupt Enable" "0: FIFO overflow interrupts are disabled,1: FIFO overflow interrupts are enabled"
line.long 0x4 "V12INTS,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x4 31. "FIS2,Field Interrupt Status 2" "0,1"
hexmask.long.byte 0x4 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x4 24. "WUS,Wake-up Notification Interrupt Status" "0,1"
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "VFS,VSYNC Falling Edge Detect Interrupt Status" "0,1"
bitfld.long 0x4 16. "VRS,VSYNC Rising Edge Detect Interrupt Status" "0,1"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "FIS,Field Interrupt Status" "0,1"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x4 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x4 1. "EFS,End of Frame Interrupt Status" "0,1"
bitfld.long 0x4 0. "FOS,FIFO Overflow Interrupt Status" "0,1"
group.long 0x58++0xB
line.long 0x0 "V12DMR,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "A8BIT_7_0,Alpha 8"
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x0 22. "FDS,Fill Data Select" "0: Fill data is 0,1: Fill data is sign data"
bitfld.long 0x0 19.--21. "RMODE_2_0,RAW Data Transfer Mode" "0: 8-bit RAW data,1: Setting prohibited,?,?,?,?,?,?"
newline
rbitfld.long 0x0 17.--18. "Reserved_17,Reserved" "0,1,2,3"
bitfld.long 0x0 16. "EVA,Even Field Address Offset" "0: Data are stored from the base address in..,1: Data are stored from the base address plus the.."
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 12.--14. "YMODE_2_0,YC Data Transfer Mode" "0: Both Y and CbCr data are transferred to memory,1: Only Y data is transferred to memory as 8-bit data,?,?,?,?,?,?"
newline
bitfld.long 0x0 11. "YC_THR,YC Data Through Mode" "0: Y and CbCr data are transferred to memory..,1: Y and CbCr data are transferred to memory as.."
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "EXRGB,Extension RGB Conversion Mode" "0: RGB data extension processing is not performed,1: Data is extended to 32-bit RGB conversion when.."
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "BPSM,Output Data Byte Swap Mode" "0: Bytes are not swapped in output data,1: Bytes are swapped in output data"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 2. "ABIT,Alpha Bit" "0: The alpha value is set to 0,1: The alpha value is set to 1"
bitfld.long 0x0 0.--1. "DTMD_1_0,Data Conversion Mode" "0: Data is not converted,1: RGB is converted to ARGB before output,?,?"
line.long 0x4 "V12DMR2,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "MFC,Multi Frame Capture Mode" "0: Disables multi frame capture mode,1: Enables multi frame capture mode"
newline
rbitfld.long 0x4 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x4 17. "FTEV,VSYNC Field Toggle Mode Enable" "0: The field toggle function according to the VSYNC..,1: The field toggle function according to the VSYNC.."
newline
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "VLV_3_0,VSYNC Field Toggle Mode Transition Period"
newline
hexmask.long.word 0x4 0.--11. 1. "Reserved_0,Reserved"
line.long 0x8 "V12UVAOF,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "UVAOF_24_0,UV Data Address Offset"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the 128-byte boundary of the UVAOF value."
rgroup.long 0xD4++0x3
line.long 0x0 "V12WLC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 30.--31. "SWFBS_1_0,Smallest Writing Frame Buffer Status" "0,1,2,3"
hexmask.long.word 0x0 16.--29. 1. "SWLC_13_0,Smallest Write Line Count"
newline
bitfld.long 0x0 14.--15. "WFBS_1_0,Writing Frame Buffer Status" "0: Frame buffer under writing has the base address..,1: Frame buffer under writing has the base address..,?,?"
hexmask.long.word 0x0 0.--13. 1. "WLC_13_0,Write Line Count"
group.long 0xF0++0xB
line.long 0x0 "V12IMWUCH,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WUMD,Wake Up Mode" "0: The WLC[13:0] bits value in the VnWLC,1: The SWLC[13:0] bits value in the VnWLC"
bitfld.long 0x0 30. "SVMD,Smallest Value Mode" "0: The SWLC[13:0] bits value between video channel..,1: The SWLC[13:0] bits value between the below.."
newline
hexmask.long.word 0x0 19.--29. 1. "Reserved_19,Reserved"
bitfld.long 0x0 18. "WUE3,Wake Up Enable 3" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
bitfld.long 0x0 17. "WUE2,Wake Up Enable 2" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
bitfld.long 0x0 16. "WUE1,Wake Up Enable 1" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "WUCH,Wake Up Enable" "0: Disables wake up notification to IMRn and VSPXn,1: Enables wake up notification to IMRn and VSPXn"
line.long 0x4 "V12IMWUL,Note: Availability of channels: n = 0 to 15"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "WUL2_13_0,Wake Up Line 2"
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "WUL1_13_0,Wake Up Line 1"
line.long 0x8 "V12IMWUL2,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x8 0.--13. 1. "WUL3_13_0,Wake Up Line 3"
group.long 0x320++0x1B
line.long 0x0 "V12FNSC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "HRCHK,HW Redundancy Error check" "0: Disable error of HW Redundancy detection,1: Enable error of HW Redundancy detection"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 26.--27. "HCEN_1_0,Enable Hsync Rise Time Measurement" "0: Disable Hsync rise time measurement,1: Enable minimum Hsync rise time measurement,?,?"
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 23. "CRM,CRC Calculation Mode" "0: Only calculate CRC,1: Input expected value and compare the CRC.."
rbitfld.long 0x0 21.--22. "Reserved_21,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 19.--20. "EDID_1_0,EDC ID" "0: Channel Selector,1: Prohibit,?,?"
bitfld.long 0x0 18. "FED_EN,FIFO EDC Enable" "0: Disable EDC error of Write FIFO detection,1: Enable EDC error of Write FIFO detection"
newline
bitfld.long 0x0 17. "CED_EN,Channel Selector EDC Enable" "0: Disable EDC error of channel selector detection,1: Enable EDC error of channel selector detection"
rbitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
bitfld.long 0x0 15. "EDCDEI,EDC Dummy Error Injection" "0: Not issue dummy EDC error,1: Issue dummy EDC error"
bitfld.long 0x0 14. "DEI,Dummy Error Injection" "0: Not issue dummy error,1: Issue dummy error"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
bitfld.long 0x0 11. "DEER_DM,Data Enable Assert Cycle Error Detection Mode" "0: Data enable assert cycle error is not detected,1: Data enable assert cycle error is detected"
newline
bitfld.long 0x0 9.--10. "DECE_1_0,Enable CLKENB Assert Cycle Measurement" "0: Disable Data enable assert cycle measurement,1: Enable minimum Data enable assert cycle..,?,?"
rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4.--5. "VSCE_1_0,Enable VSYNC Toggle Cycle Measurement" "0: Disable VSYNC toggle cycle measurement,1: Enable minimum VSYNC toggle cycle measurement,?,?"
bitfld.long 0x0 2.--3. "HSCE_1_0,Enable HSYNC Toggle Cycle Measurement" "0: Disable HSYNC toggle cycle measurement,1: Enable minimum HSYNC toggle cycle measurement,?,?"
newline
bitfld.long 0x0 0.--1. "FLCE_1_0,Enable FIELD Toggle Cycle Measurement" "0: Disable FIELD toggle cycle measurement,1: Enable minimum FIELD toggle cycle measurement,?,?"
line.long 0x4 "V12FTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "FLD_CNT_MIN_31_0,FIELD Toggle Cycle Minimum Value"
line.long 0x8 "V12FTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "FLD_CNT_MAX_31_0,FIELD Toggle Cycle Maximum Value"
line.long 0xC "V12HSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "HS_CNT_MIN_31_0,HSYNC Toggle Cycle Minimum Value"
line.long 0x10 "V12HSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x10 0.--31. 1. "HS_CNT_MAX_31_0,HSYNC Toggle Cycle Maximum Value"
line.long 0x14 "V12VSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x14 0.--31. 1. "VS_CNT_MIN_31_0,VSYNC Toggle Cycle Minimum Value"
line.long 0x18 "V12VSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x18 0.--31. 1. "VS_CNT_MAX_31_0,VSYNC Toggle Cycle Maximum Value"
group.long 0x344++0x3
line.long 0x0 "V12DET,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "DE_CNT_MAX_15_0,CLKENB Enable Cycle Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "DE_CNT_MIN_15_0,CLKENB Enable Cycle Minimum Value"
rgroup.long 0x354++0x3
line.long 0x0 "V12VCRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x0 0.--31. 1. "VCRC_31_0,VCRC Code"
group.long 0x36C++0x3
line.long 0x0 "V12HRT,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "HR_CNT_MAX_15_0,Hsync Rise Time Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "HR_CNT_MIN_15_0,Hsync Rise Time Minimum Value"
group.long 0x380++0xF
line.long 0x0 "V12CRCC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 29.--31. "IDBOE_2_0,Input Data Byte Order of Even line" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 26.--28. "Reserved_26,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 25. "Y420MD,YUV420 Mode" "0: Not YCbCr-420,1: YCbCr-420"
bitfld.long 0x0 24. "INSEL,Input Data Select" "0: Before image size clip,1: After image size clip"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 22. "IDRE,Input Data Reflection of Even line" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 18.--21. 1. "Reserved_18,Reserved"
bitfld.long 0x0 16.--17. "IDBLE_1_0,Input Data Byte length of Even line" "0: 1-byte data,1: 2-byte data,?,?"
newline
bitfld.long 0x0 13.--15. "IDBO_2_0,Input Data Byte Order" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 8.--12. 1. "PDBL_4_0,Polynomial Equation Coefficient Data Bit Length"
newline
bitfld.long 0x0 7. "ROR,Remainder Output Reflection" "0: No reflection,1: Apply reflection"
bitfld.long 0x0 6. "IDR,Input Data Reflection" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 2.--5. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "IDBL_1_0,Input Data Byte length" "0: 1-byte data,1: 2-byte data,?,?"
line.long 0x4 "V12CRPEC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "CPLYEC_31_0,CRC Polynomial Equation Coefficient"
line.long 0x8 "V12CRIR,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "CIR_31_0,CRC Initial Remainder"
line.long 0xC "V12CRXRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "CXORC_31_0,CRC Final XOR Coefficient"
group.long 0x3F0++0x7
line.long 0x0 "V12EE,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x0 16.--26. 1. "HREE_10_0,HW Redundancy Error Detection Interrupt Enable"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "CCEE,ECRC Comparison Error Detection Interrupt Enable" "0: ECRC comparison error detection interrupts are..,1: ECRC comparison error detection interrupts are.."
newline
bitfld.long 0x0 3. "EFEE,EDC of FIFO Error Detection Interrupt Enable" "0: EDC error of Write FIFO detection interrupts are..,1: EDC error of Write FIFO detection interrupts are.."
bitfld.long 0x0 2. "ECEE,EDC of Channel Selector Conversion Error Detection Interrupt Enable" "0: EDC error of Channel Selector conversion logic..,1: EDC error of Channel Selector conversion logic.."
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "SEE,Sync Interval Checker Error Detect Interrupt Enable" "0: Sync Interval Checker error detect interrupts..,1: Sync Interval Checker error detect interrupts.."
line.long 0x4 "V12ERS,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x4 16.--26. 1. "HRER_10_0,HW Redundancy Error Detection Interrupt Status"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "CCER,ECRC Comparison Error Detection Interrupt Status" "0,1"
newline
bitfld.long 0x4 3. "EFER,EDC of FIFO Error Detection Interrupt Status" "0,1"
bitfld.long 0x4 2. "ECER,EDC of Channel Selector Conversion Error Detection Interrupt Status" "0,1"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x4 0. "SER,Sync Interval Checker Error Detect Interrupt Status" "0,1"
tree.end
tree "VIN_13"
base ad:0xE6EFD000
group.long 0x0++0x3
line.long 0x0 "V13MC,Notes: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WLCEN,Write Line Counter Enable" "0: Disables the write line count,1: Enables the write line count"
hexmask.long.word 0x0 22.--30. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "FOC,Field Order Control" "0: Top field = Odd field,1: Top field = Even field"
rbitfld.long 0x0 19.--20. "Reserved_19,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 16.--18. "INF_2_0,Input Interface Format" "0: Setting prohibited,1: YUV422 8-bit or YUV420 8-bit input*1,?,?,?,?,?,?"
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "EXINF_1_0,Extension Interface Select" "0,1,2,3"
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "VUP,VIN Register Update Control" "0: The register contents are updated immediately..,1: The register contents are updated after a valid.."
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 6. "EN,Endian Type" "0: Image data is packed and allocated in little..,1: Image data is packed and allocated in big endian"
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 3.--4. "IM_1_0,Interlace Mode" "0: Odd-field,1: Odd-/even-field capture mode,?,?"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "ME,Module Enable" "0: The module operation is stopped,1: The module operation is enabled"
rgroup.long 0x4++0x3
line.long 0x0 "V13MS,Notes: Availability of channels: n = 0 to 15"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 3.--4. "FBS_1_0,Frame Buffer Status" "0: The latest valid frame buffer has the base..,1: The latest valid frame buffer has the base..,?,?"
newline
bitfld.long 0x0 2. "FS,Field Status" "0: The current field is an odd field,1: The current field is an even field"
bitfld.long 0x0 1. "AV,Active Video Status" "0: The current field is not in the active video area,1: The current field is in the active video area"
newline
bitfld.long 0x0 0. "CA,Video Capture Active Status" "0: Video capture is not operating,1: Video capture is operating"
group.long 0x8++0x13
line.long 0x0 "V13FC,Note: Availability of channels: n=0 to 15"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CC,Continuous Frame Capture Mode" "0: The continuous frame capture mode is not set,1: The continuous frame capture mode is set"
newline
bitfld.long 0x0 0. "SC,Single Frame Capture Mode" "0: The single frame capture mode is not set,1: The single frame capture mode is set"
line.long 0x4 "V13SLPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x4 0.--11. 1. "SLPrC_11_0,Start Line Pre-Clip"
line.long 0x8 "V13ELPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x8 0.--11. 1. "ELPrC_11_0,End Line Pre-Clip"
line.long 0xC "V13SPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0xC 0.--11. 1. "SPPrC_11_0,Start Pixel Pre-Clip"
line.long 0x10 "V13EPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x10 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x10 0.--11. 1. "EPPrC_11_0,End Pixel Pre-Clip"
group.long 0x2C++0xF
line.long 0x0 "V13IS,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 4.--15. 1. "IS_11_0,Image Stride"
newline
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved bits that indicate the lower-order four bits of the image stride."
line.long 0x4 "V13MB1,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 7.--31. 1. "MB1_24_0,Memory Base Address 1"
hexmask.long.byte 0x4 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 1 (a multiple of 128 bytes)."
line.long 0x8 "V13MB2,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "MB2_24_0,Memory Base Address 2"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 2 (a multiple of 128 bytes)."
line.long 0xC "V13MB3,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 7.--31. 1. "MB3_24_0,Memory Base Address 3"
hexmask.long.byte 0xC 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 3 (a multiple of 128 bytes)."
rgroup.long 0x3C++0x3
line.long 0x0 "V13LC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x0 0.--11. 1. "LC_11_0,Line Count"
group.long 0x40++0x7
line.long 0x0 "V13IE,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "FIE2,Field Interrupt Enable 2" "0: Field interrupts are disabled,1: Field interrupts are enabled"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x0 24. "WUE,Wake-up Notification Interrupt Enable" "0: Wake-up notification interrupts are disabled,1: Wake-up notification interrupts are enabled"
hexmask.long.byte 0x0 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "VFE,VSYNC Falling Edge Detect Interrupt Enable" "0: VSYNC falling edge detect interrupts are disabled,1: VSYNC falling edge detect interrupts are enabled"
bitfld.long 0x0 16. "VRE,VSYNC Rising Edge Detect Interrupt Enable" "0: VSYNC rising edge detect interrupts are disabled,1: VSYNC rising edge detect interrupts are enabled"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "FIE,Field Interrupt Enable" "0: Field-switching interrupts are disabled,1: Field-switching interrupts are enabled"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x0 1. "EFE,End of Frame Interrupt Enable" "0: End of frame interrupts are disabled,1: End of frame interrupts are enabled"
bitfld.long 0x0 0. "FOE,FIFO Overflow Interrupt Enable" "0: FIFO overflow interrupts are disabled,1: FIFO overflow interrupts are enabled"
line.long 0x4 "V13INTS,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x4 31. "FIS2,Field Interrupt Status 2" "0,1"
hexmask.long.byte 0x4 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x4 24. "WUS,Wake-up Notification Interrupt Status" "0,1"
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "VFS,VSYNC Falling Edge Detect Interrupt Status" "0,1"
bitfld.long 0x4 16. "VRS,VSYNC Rising Edge Detect Interrupt Status" "0,1"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "FIS,Field Interrupt Status" "0,1"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x4 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x4 1. "EFS,End of Frame Interrupt Status" "0,1"
bitfld.long 0x4 0. "FOS,FIFO Overflow Interrupt Status" "0,1"
group.long 0x58++0xB
line.long 0x0 "V13DMR,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "A8BIT_7_0,Alpha 8"
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x0 22. "FDS,Fill Data Select" "0: Fill data is 0,1: Fill data is sign data"
bitfld.long 0x0 19.--21. "RMODE_2_0,RAW Data Transfer Mode" "0: 8-bit RAW data,1: Setting prohibited,?,?,?,?,?,?"
newline
rbitfld.long 0x0 17.--18. "Reserved_17,Reserved" "0,1,2,3"
bitfld.long 0x0 16. "EVA,Even Field Address Offset" "0: Data are stored from the base address in..,1: Data are stored from the base address plus the.."
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 12.--14. "YMODE_2_0,YC Data Transfer Mode" "0: Both Y and CbCr data are transferred to memory,1: Only Y data is transferred to memory as 8-bit data,?,?,?,?,?,?"
newline
bitfld.long 0x0 11. "YC_THR,YC Data Through Mode" "0: Y and CbCr data are transferred to memory..,1: Y and CbCr data are transferred to memory as.."
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "EXRGB,Extension RGB Conversion Mode" "0: RGB data extension processing is not performed,1: Data is extended to 32-bit RGB conversion when.."
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "BPSM,Output Data Byte Swap Mode" "0: Bytes are not swapped in output data,1: Bytes are swapped in output data"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 2. "ABIT,Alpha Bit" "0: The alpha value is set to 0,1: The alpha value is set to 1"
bitfld.long 0x0 0.--1. "DTMD_1_0,Data Conversion Mode" "0: Data is not converted,1: RGB is converted to ARGB before output,?,?"
line.long 0x4 "V13DMR2,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "MFC,Multi Frame Capture Mode" "0: Disables multi frame capture mode,1: Enables multi frame capture mode"
newline
rbitfld.long 0x4 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x4 17. "FTEV,VSYNC Field Toggle Mode Enable" "0: The field toggle function according to the VSYNC..,1: The field toggle function according to the VSYNC.."
newline
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "VLV_3_0,VSYNC Field Toggle Mode Transition Period"
newline
hexmask.long.word 0x4 0.--11. 1. "Reserved_0,Reserved"
line.long 0x8 "V13UVAOF,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "UVAOF_24_0,UV Data Address Offset"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the 128-byte boundary of the UVAOF value."
rgroup.long 0xD4++0x3
line.long 0x0 "V13WLC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 30.--31. "SWFBS_1_0,Smallest Writing Frame Buffer Status" "0,1,2,3"
hexmask.long.word 0x0 16.--29. 1. "SWLC_13_0,Smallest Write Line Count"
newline
bitfld.long 0x0 14.--15. "WFBS_1_0,Writing Frame Buffer Status" "0: Frame buffer under writing has the base address..,1: Frame buffer under writing has the base address..,?,?"
hexmask.long.word 0x0 0.--13. 1. "WLC_13_0,Write Line Count"
group.long 0xF0++0xB
line.long 0x0 "V13IMWUCH,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WUMD,Wake Up Mode" "0: The WLC[13:0] bits value in the VnWLC,1: The SWLC[13:0] bits value in the VnWLC"
bitfld.long 0x0 30. "SVMD,Smallest Value Mode" "0: The SWLC[13:0] bits value between video channel..,1: The SWLC[13:0] bits value between the below.."
newline
hexmask.long.word 0x0 19.--29. 1. "Reserved_19,Reserved"
bitfld.long 0x0 18. "WUE3,Wake Up Enable 3" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
bitfld.long 0x0 17. "WUE2,Wake Up Enable 2" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
bitfld.long 0x0 16. "WUE1,Wake Up Enable 1" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "WUCH,Wake Up Enable" "0: Disables wake up notification to IMRn and VSPXn,1: Enables wake up notification to IMRn and VSPXn"
line.long 0x4 "V13IMWUL,Note: Availability of channels: n = 0 to 15"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "WUL2_13_0,Wake Up Line 2"
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "WUL1_13_0,Wake Up Line 1"
line.long 0x8 "V13IMWUL2,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x8 0.--13. 1. "WUL3_13_0,Wake Up Line 3"
group.long 0x320++0x1B
line.long 0x0 "V13FNSC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "HRCHK,HW Redundancy Error check" "0: Disable error of HW Redundancy detection,1: Enable error of HW Redundancy detection"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 26.--27. "HCEN_1_0,Enable Hsync Rise Time Measurement" "0: Disable Hsync rise time measurement,1: Enable minimum Hsync rise time measurement,?,?"
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 23. "CRM,CRC Calculation Mode" "0: Only calculate CRC,1: Input expected value and compare the CRC.."
rbitfld.long 0x0 21.--22. "Reserved_21,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 19.--20. "EDID_1_0,EDC ID" "0: Channel Selector,1: Prohibit,?,?"
bitfld.long 0x0 18. "FED_EN,FIFO EDC Enable" "0: Disable EDC error of Write FIFO detection,1: Enable EDC error of Write FIFO detection"
newline
bitfld.long 0x0 17. "CED_EN,Channel Selector EDC Enable" "0: Disable EDC error of channel selector detection,1: Enable EDC error of channel selector detection"
rbitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
bitfld.long 0x0 15. "EDCDEI,EDC Dummy Error Injection" "0: Not issue dummy EDC error,1: Issue dummy EDC error"
bitfld.long 0x0 14. "DEI,Dummy Error Injection" "0: Not issue dummy error,1: Issue dummy error"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
bitfld.long 0x0 11. "DEER_DM,Data Enable Assert Cycle Error Detection Mode" "0: Data enable assert cycle error is not detected,1: Data enable assert cycle error is detected"
newline
bitfld.long 0x0 9.--10. "DECE_1_0,Enable CLKENB Assert Cycle Measurement" "0: Disable Data enable assert cycle measurement,1: Enable minimum Data enable assert cycle..,?,?"
rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4.--5. "VSCE_1_0,Enable VSYNC Toggle Cycle Measurement" "0: Disable VSYNC toggle cycle measurement,1: Enable minimum VSYNC toggle cycle measurement,?,?"
bitfld.long 0x0 2.--3. "HSCE_1_0,Enable HSYNC Toggle Cycle Measurement" "0: Disable HSYNC toggle cycle measurement,1: Enable minimum HSYNC toggle cycle measurement,?,?"
newline
bitfld.long 0x0 0.--1. "FLCE_1_0,Enable FIELD Toggle Cycle Measurement" "0: Disable FIELD toggle cycle measurement,1: Enable minimum FIELD toggle cycle measurement,?,?"
line.long 0x4 "V13FTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "FLD_CNT_MIN_31_0,FIELD Toggle Cycle Minimum Value"
line.long 0x8 "V13FTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "FLD_CNT_MAX_31_0,FIELD Toggle Cycle Maximum Value"
line.long 0xC "V13HSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "HS_CNT_MIN_31_0,HSYNC Toggle Cycle Minimum Value"
line.long 0x10 "V13HSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x10 0.--31. 1. "HS_CNT_MAX_31_0,HSYNC Toggle Cycle Maximum Value"
line.long 0x14 "V13VSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x14 0.--31. 1. "VS_CNT_MIN_31_0,VSYNC Toggle Cycle Minimum Value"
line.long 0x18 "V13VSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x18 0.--31. 1. "VS_CNT_MAX_31_0,VSYNC Toggle Cycle Maximum Value"
group.long 0x344++0x3
line.long 0x0 "V13DET,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "DE_CNT_MAX_15_0,CLKENB Enable Cycle Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "DE_CNT_MIN_15_0,CLKENB Enable Cycle Minimum Value"
rgroup.long 0x354++0x3
line.long 0x0 "V13VCRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x0 0.--31. 1. "VCRC_31_0,VCRC Code"
group.long 0x36C++0x3
line.long 0x0 "V13HRT,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "HR_CNT_MAX_15_0,Hsync Rise Time Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "HR_CNT_MIN_15_0,Hsync Rise Time Minimum Value"
group.long 0x380++0xF
line.long 0x0 "V13CRCC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 29.--31. "IDBOE_2_0,Input Data Byte Order of Even line" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 26.--28. "Reserved_26,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 25. "Y420MD,YUV420 Mode" "0: Not YCbCr-420,1: YCbCr-420"
bitfld.long 0x0 24. "INSEL,Input Data Select" "0: Before image size clip,1: After image size clip"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 22. "IDRE,Input Data Reflection of Even line" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 18.--21. 1. "Reserved_18,Reserved"
bitfld.long 0x0 16.--17. "IDBLE_1_0,Input Data Byte length of Even line" "0: 1-byte data,1: 2-byte data,?,?"
newline
bitfld.long 0x0 13.--15. "IDBO_2_0,Input Data Byte Order" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 8.--12. 1. "PDBL_4_0,Polynomial Equation Coefficient Data Bit Length"
newline
bitfld.long 0x0 7. "ROR,Remainder Output Reflection" "0: No reflection,1: Apply reflection"
bitfld.long 0x0 6. "IDR,Input Data Reflection" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 2.--5. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "IDBL_1_0,Input Data Byte length" "0: 1-byte data,1: 2-byte data,?,?"
line.long 0x4 "V13CRPEC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "CPLYEC_31_0,CRC Polynomial Equation Coefficient"
line.long 0x8 "V13CRIR,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "CIR_31_0,CRC Initial Remainder"
line.long 0xC "V13CRXRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "CXORC_31_0,CRC Final XOR Coefficient"
group.long 0x3F0++0x7
line.long 0x0 "V13EE,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x0 16.--26. 1. "HREE_10_0,HW Redundancy Error Detection Interrupt Enable"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "CCEE,ECRC Comparison Error Detection Interrupt Enable" "0: ECRC comparison error detection interrupts are..,1: ECRC comparison error detection interrupts are.."
newline
bitfld.long 0x0 3. "EFEE,EDC of FIFO Error Detection Interrupt Enable" "0: EDC error of Write FIFO detection interrupts are..,1: EDC error of Write FIFO detection interrupts are.."
bitfld.long 0x0 2. "ECEE,EDC of Channel Selector Conversion Error Detection Interrupt Enable" "0: EDC error of Channel Selector conversion logic..,1: EDC error of Channel Selector conversion logic.."
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "SEE,Sync Interval Checker Error Detect Interrupt Enable" "0: Sync Interval Checker error detect interrupts..,1: Sync Interval Checker error detect interrupts.."
line.long 0x4 "V13ERS,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x4 16.--26. 1. "HRER_10_0,HW Redundancy Error Detection Interrupt Status"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "CCER,ECRC Comparison Error Detection Interrupt Status" "0,1"
newline
bitfld.long 0x4 3. "EFER,EDC of FIFO Error Detection Interrupt Status" "0,1"
bitfld.long 0x4 2. "ECER,EDC of Channel Selector Conversion Error Detection Interrupt Status" "0,1"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x4 0. "SER,Sync Interval Checker Error Detect Interrupt Status" "0,1"
tree.end
tree "VIN_14"
base ad:0xE6EFE000
group.long 0x0++0x3
line.long 0x0 "V14MC,Notes: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WLCEN,Write Line Counter Enable" "0: Disables the write line count,1: Enables the write line count"
hexmask.long.word 0x0 22.--30. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "FOC,Field Order Control" "0: Top field = Odd field,1: Top field = Even field"
rbitfld.long 0x0 19.--20. "Reserved_19,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 16.--18. "INF_2_0,Input Interface Format" "0: Setting prohibited,1: YUV422 8-bit or YUV420 8-bit input*1,?,?,?,?,?,?"
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "EXINF_1_0,Extension Interface Select" "0,1,2,3"
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "VUP,VIN Register Update Control" "0: The register contents are updated immediately..,1: The register contents are updated after a valid.."
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 6. "EN,Endian Type" "0: Image data is packed and allocated in little..,1: Image data is packed and allocated in big endian"
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 3.--4. "IM_1_0,Interlace Mode" "0: Odd-field,1: Odd-/even-field capture mode,?,?"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "ME,Module Enable" "0: The module operation is stopped,1: The module operation is enabled"
rgroup.long 0x4++0x3
line.long 0x0 "V14MS,Notes: Availability of channels: n = 0 to 15"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 3.--4. "FBS_1_0,Frame Buffer Status" "0: The latest valid frame buffer has the base..,1: The latest valid frame buffer has the base..,?,?"
newline
bitfld.long 0x0 2. "FS,Field Status" "0: The current field is an odd field,1: The current field is an even field"
bitfld.long 0x0 1. "AV,Active Video Status" "0: The current field is not in the active video area,1: The current field is in the active video area"
newline
bitfld.long 0x0 0. "CA,Video Capture Active Status" "0: Video capture is not operating,1: Video capture is operating"
group.long 0x8++0x13
line.long 0x0 "V14FC,Note: Availability of channels: n=0 to 15"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CC,Continuous Frame Capture Mode" "0: The continuous frame capture mode is not set,1: The continuous frame capture mode is set"
newline
bitfld.long 0x0 0. "SC,Single Frame Capture Mode" "0: The single frame capture mode is not set,1: The single frame capture mode is set"
line.long 0x4 "V14SLPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x4 0.--11. 1. "SLPrC_11_0,Start Line Pre-Clip"
line.long 0x8 "V14ELPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x8 0.--11. 1. "ELPrC_11_0,End Line Pre-Clip"
line.long 0xC "V14SPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0xC 0.--11. 1. "SPPrC_11_0,Start Pixel Pre-Clip"
line.long 0x10 "V14EPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x10 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x10 0.--11. 1. "EPPrC_11_0,End Pixel Pre-Clip"
group.long 0x2C++0xF
line.long 0x0 "V14IS,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 4.--15. 1. "IS_11_0,Image Stride"
newline
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved bits that indicate the lower-order four bits of the image stride."
line.long 0x4 "V14MB1,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 7.--31. 1. "MB1_24_0,Memory Base Address 1"
hexmask.long.byte 0x4 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 1 (a multiple of 128 bytes)."
line.long 0x8 "V14MB2,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "MB2_24_0,Memory Base Address 2"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 2 (a multiple of 128 bytes)."
line.long 0xC "V14MB3,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 7.--31. 1. "MB3_24_0,Memory Base Address 3"
hexmask.long.byte 0xC 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 3 (a multiple of 128 bytes)."
rgroup.long 0x3C++0x3
line.long 0x0 "V14LC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x0 0.--11. 1. "LC_11_0,Line Count"
group.long 0x40++0x7
line.long 0x0 "V14IE,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "FIE2,Field Interrupt Enable 2" "0: Field interrupts are disabled,1: Field interrupts are enabled"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x0 24. "WUE,Wake-up Notification Interrupt Enable" "0: Wake-up notification interrupts are disabled,1: Wake-up notification interrupts are enabled"
hexmask.long.byte 0x0 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "VFE,VSYNC Falling Edge Detect Interrupt Enable" "0: VSYNC falling edge detect interrupts are disabled,1: VSYNC falling edge detect interrupts are enabled"
bitfld.long 0x0 16. "VRE,VSYNC Rising Edge Detect Interrupt Enable" "0: VSYNC rising edge detect interrupts are disabled,1: VSYNC rising edge detect interrupts are enabled"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "FIE,Field Interrupt Enable" "0: Field-switching interrupts are disabled,1: Field-switching interrupts are enabled"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x0 1. "EFE,End of Frame Interrupt Enable" "0: End of frame interrupts are disabled,1: End of frame interrupts are enabled"
bitfld.long 0x0 0. "FOE,FIFO Overflow Interrupt Enable" "0: FIFO overflow interrupts are disabled,1: FIFO overflow interrupts are enabled"
line.long 0x4 "V14INTS,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x4 31. "FIS2,Field Interrupt Status 2" "0,1"
hexmask.long.byte 0x4 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x4 24. "WUS,Wake-up Notification Interrupt Status" "0,1"
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "VFS,VSYNC Falling Edge Detect Interrupt Status" "0,1"
bitfld.long 0x4 16. "VRS,VSYNC Rising Edge Detect Interrupt Status" "0,1"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "FIS,Field Interrupt Status" "0,1"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x4 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x4 1. "EFS,End of Frame Interrupt Status" "0,1"
bitfld.long 0x4 0. "FOS,FIFO Overflow Interrupt Status" "0,1"
group.long 0x58++0xB
line.long 0x0 "V14DMR,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "A8BIT_7_0,Alpha 8"
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x0 22. "FDS,Fill Data Select" "0: Fill data is 0,1: Fill data is sign data"
bitfld.long 0x0 19.--21. "RMODE_2_0,RAW Data Transfer Mode" "0: 8-bit RAW data,1: Setting prohibited,?,?,?,?,?,?"
newline
rbitfld.long 0x0 17.--18. "Reserved_17,Reserved" "0,1,2,3"
bitfld.long 0x0 16. "EVA,Even Field Address Offset" "0: Data are stored from the base address in..,1: Data are stored from the base address plus the.."
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 12.--14. "YMODE_2_0,YC Data Transfer Mode" "0: Both Y and CbCr data are transferred to memory,1: Only Y data is transferred to memory as 8-bit data,?,?,?,?,?,?"
newline
bitfld.long 0x0 11. "YC_THR,YC Data Through Mode" "0: Y and CbCr data are transferred to memory..,1: Y and CbCr data are transferred to memory as.."
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "EXRGB,Extension RGB Conversion Mode" "0: RGB data extension processing is not performed,1: Data is extended to 32-bit RGB conversion when.."
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "BPSM,Output Data Byte Swap Mode" "0: Bytes are not swapped in output data,1: Bytes are swapped in output data"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 2. "ABIT,Alpha Bit" "0: The alpha value is set to 0,1: The alpha value is set to 1"
bitfld.long 0x0 0.--1. "DTMD_1_0,Data Conversion Mode" "0: Data is not converted,1: RGB is converted to ARGB before output,?,?"
line.long 0x4 "V14DMR2,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "MFC,Multi Frame Capture Mode" "0: Disables multi frame capture mode,1: Enables multi frame capture mode"
newline
rbitfld.long 0x4 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x4 17. "FTEV,VSYNC Field Toggle Mode Enable" "0: The field toggle function according to the VSYNC..,1: The field toggle function according to the VSYNC.."
newline
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "VLV_3_0,VSYNC Field Toggle Mode Transition Period"
newline
hexmask.long.word 0x4 0.--11. 1. "Reserved_0,Reserved"
line.long 0x8 "V14UVAOF,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "UVAOF_24_0,UV Data Address Offset"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the 128-byte boundary of the UVAOF value."
rgroup.long 0xD4++0x3
line.long 0x0 "V14WLC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 30.--31. "SWFBS_1_0,Smallest Writing Frame Buffer Status" "0,1,2,3"
hexmask.long.word 0x0 16.--29. 1. "SWLC_13_0,Smallest Write Line Count"
newline
bitfld.long 0x0 14.--15. "WFBS_1_0,Writing Frame Buffer Status" "0: Frame buffer under writing has the base address..,1: Frame buffer under writing has the base address..,?,?"
hexmask.long.word 0x0 0.--13. 1. "WLC_13_0,Write Line Count"
group.long 0xF0++0xB
line.long 0x0 "V14IMWUCH,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WUMD,Wake Up Mode" "0: The WLC[13:0] bits value in the VnWLC,1: The SWLC[13:0] bits value in the VnWLC"
bitfld.long 0x0 30. "SVMD,Smallest Value Mode" "0: The SWLC[13:0] bits value between video channel..,1: The SWLC[13:0] bits value between the below.."
newline
hexmask.long.word 0x0 19.--29. 1. "Reserved_19,Reserved"
bitfld.long 0x0 18. "WUE3,Wake Up Enable 3" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
bitfld.long 0x0 17. "WUE2,Wake Up Enable 2" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
bitfld.long 0x0 16. "WUE1,Wake Up Enable 1" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "WUCH,Wake Up Enable" "0: Disables wake up notification to IMRn and VSPXn,1: Enables wake up notification to IMRn and VSPXn"
line.long 0x4 "V14IMWUL,Note: Availability of channels: n = 0 to 15"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "WUL2_13_0,Wake Up Line 2"
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "WUL1_13_0,Wake Up Line 1"
line.long 0x8 "V14IMWUL2,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x8 0.--13. 1. "WUL3_13_0,Wake Up Line 3"
group.long 0x320++0x1B
line.long 0x0 "V14FNSC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "HRCHK,HW Redundancy Error check" "0: Disable error of HW Redundancy detection,1: Enable error of HW Redundancy detection"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 26.--27. "HCEN_1_0,Enable Hsync Rise Time Measurement" "0: Disable Hsync rise time measurement,1: Enable minimum Hsync rise time measurement,?,?"
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 23. "CRM,CRC Calculation Mode" "0: Only calculate CRC,1: Input expected value and compare the CRC.."
rbitfld.long 0x0 21.--22. "Reserved_21,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 19.--20. "EDID_1_0,EDC ID" "0: Channel Selector,1: Prohibit,?,?"
bitfld.long 0x0 18. "FED_EN,FIFO EDC Enable" "0: Disable EDC error of Write FIFO detection,1: Enable EDC error of Write FIFO detection"
newline
bitfld.long 0x0 17. "CED_EN,Channel Selector EDC Enable" "0: Disable EDC error of channel selector detection,1: Enable EDC error of channel selector detection"
rbitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
bitfld.long 0x0 15. "EDCDEI,EDC Dummy Error Injection" "0: Not issue dummy EDC error,1: Issue dummy EDC error"
bitfld.long 0x0 14. "DEI,Dummy Error Injection" "0: Not issue dummy error,1: Issue dummy error"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
bitfld.long 0x0 11. "DEER_DM,Data Enable Assert Cycle Error Detection Mode" "0: Data enable assert cycle error is not detected,1: Data enable assert cycle error is detected"
newline
bitfld.long 0x0 9.--10. "DECE_1_0,Enable CLKENB Assert Cycle Measurement" "0: Disable Data enable assert cycle measurement,1: Enable minimum Data enable assert cycle..,?,?"
rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4.--5. "VSCE_1_0,Enable VSYNC Toggle Cycle Measurement" "0: Disable VSYNC toggle cycle measurement,1: Enable minimum VSYNC toggle cycle measurement,?,?"
bitfld.long 0x0 2.--3. "HSCE_1_0,Enable HSYNC Toggle Cycle Measurement" "0: Disable HSYNC toggle cycle measurement,1: Enable minimum HSYNC toggle cycle measurement,?,?"
newline
bitfld.long 0x0 0.--1. "FLCE_1_0,Enable FIELD Toggle Cycle Measurement" "0: Disable FIELD toggle cycle measurement,1: Enable minimum FIELD toggle cycle measurement,?,?"
line.long 0x4 "V14FTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "FLD_CNT_MIN_31_0,FIELD Toggle Cycle Minimum Value"
line.long 0x8 "V14FTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "FLD_CNT_MAX_31_0,FIELD Toggle Cycle Maximum Value"
line.long 0xC "V14HSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "HS_CNT_MIN_31_0,HSYNC Toggle Cycle Minimum Value"
line.long 0x10 "V14HSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x10 0.--31. 1. "HS_CNT_MAX_31_0,HSYNC Toggle Cycle Maximum Value"
line.long 0x14 "V14VSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x14 0.--31. 1. "VS_CNT_MIN_31_0,VSYNC Toggle Cycle Minimum Value"
line.long 0x18 "V14VSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x18 0.--31. 1. "VS_CNT_MAX_31_0,VSYNC Toggle Cycle Maximum Value"
group.long 0x344++0x3
line.long 0x0 "V14DET,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "DE_CNT_MAX_15_0,CLKENB Enable Cycle Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "DE_CNT_MIN_15_0,CLKENB Enable Cycle Minimum Value"
rgroup.long 0x354++0x3
line.long 0x0 "V14VCRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x0 0.--31. 1. "VCRC_31_0,VCRC Code"
group.long 0x36C++0x3
line.long 0x0 "V14HRT,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "HR_CNT_MAX_15_0,Hsync Rise Time Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "HR_CNT_MIN_15_0,Hsync Rise Time Minimum Value"
group.long 0x380++0xF
line.long 0x0 "V14CRCC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 29.--31. "IDBOE_2_0,Input Data Byte Order of Even line" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 26.--28. "Reserved_26,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 25. "Y420MD,YUV420 Mode" "0: Not YCbCr-420,1: YCbCr-420"
bitfld.long 0x0 24. "INSEL,Input Data Select" "0: Before image size clip,1: After image size clip"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 22. "IDRE,Input Data Reflection of Even line" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 18.--21. 1. "Reserved_18,Reserved"
bitfld.long 0x0 16.--17. "IDBLE_1_0,Input Data Byte length of Even line" "0: 1-byte data,1: 2-byte data,?,?"
newline
bitfld.long 0x0 13.--15. "IDBO_2_0,Input Data Byte Order" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 8.--12. 1. "PDBL_4_0,Polynomial Equation Coefficient Data Bit Length"
newline
bitfld.long 0x0 7. "ROR,Remainder Output Reflection" "0: No reflection,1: Apply reflection"
bitfld.long 0x0 6. "IDR,Input Data Reflection" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 2.--5. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "IDBL_1_0,Input Data Byte length" "0: 1-byte data,1: 2-byte data,?,?"
line.long 0x4 "V14CRPEC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "CPLYEC_31_0,CRC Polynomial Equation Coefficient"
line.long 0x8 "V14CRIR,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "CIR_31_0,CRC Initial Remainder"
line.long 0xC "V14CRXRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "CXORC_31_0,CRC Final XOR Coefficient"
group.long 0x3F0++0x7
line.long 0x0 "V14EE,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x0 16.--26. 1. "HREE_10_0,HW Redundancy Error Detection Interrupt Enable"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "CCEE,ECRC Comparison Error Detection Interrupt Enable" "0: ECRC comparison error detection interrupts are..,1: ECRC comparison error detection interrupts are.."
newline
bitfld.long 0x0 3. "EFEE,EDC of FIFO Error Detection Interrupt Enable" "0: EDC error of Write FIFO detection interrupts are..,1: EDC error of Write FIFO detection interrupts are.."
bitfld.long 0x0 2. "ECEE,EDC of Channel Selector Conversion Error Detection Interrupt Enable" "0: EDC error of Channel Selector conversion logic..,1: EDC error of Channel Selector conversion logic.."
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "SEE,Sync Interval Checker Error Detect Interrupt Enable" "0: Sync Interval Checker error detect interrupts..,1: Sync Interval Checker error detect interrupts.."
line.long 0x4 "V14ERS,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x4 16.--26. 1. "HRER_10_0,HW Redundancy Error Detection Interrupt Status"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "CCER,ECRC Comparison Error Detection Interrupt Status" "0,1"
newline
bitfld.long 0x4 3. "EFER,EDC of FIFO Error Detection Interrupt Status" "0,1"
bitfld.long 0x4 2. "ECER,EDC of Channel Selector Conversion Error Detection Interrupt Status" "0,1"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x4 0. "SER,Sync Interval Checker Error Detect Interrupt Status" "0,1"
tree.end
tree "VIN_15"
base ad:0xE6EFF000
group.long 0x0++0x3
line.long 0x0 "V15MC,Notes: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WLCEN,Write Line Counter Enable" "0: Disables the write line count,1: Enables the write line count"
hexmask.long.word 0x0 22.--30. 1. "Reserved_22,Reserved"
newline
bitfld.long 0x0 21. "FOC,Field Order Control" "0: Top field = Odd field,1: Top field = Even field"
rbitfld.long 0x0 19.--20. "Reserved_19,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 16.--18. "INF_2_0,Input Interface Format" "0: Setting prohibited,1: YUV422 8-bit or YUV420 8-bit input*1,?,?,?,?,?,?"
rbitfld.long 0x0 14.--15. "Reserved_14,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 12.--13. "EXINF_1_0,Extension Interface Select" "0,1,2,3"
rbitfld.long 0x0 11. "Reserved_11,Reserved" "0,1"
newline
bitfld.long 0x0 10. "VUP,VIN Register Update Control" "0: The register contents are updated immediately..,1: The register contents are updated after a valid.."
rbitfld.long 0x0 7.--9. "Reserved_7,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 6. "EN,Endian Type" "0: Image data is packed and allocated in little..,1: Image data is packed and allocated in big endian"
rbitfld.long 0x0 5. "Reserved_5,Reserved" "0,1"
newline
bitfld.long 0x0 3.--4. "IM_1_0,Interlace Mode" "0: Odd-field,1: Odd-/even-field capture mode,?,?"
rbitfld.long 0x0 1.--2. "Reserved_1,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 0. "ME,Module Enable" "0: The module operation is stopped,1: The module operation is enabled"
rgroup.long 0x4++0x3
line.long 0x0 "V15MS,Notes: Availability of channels: n = 0 to 15"
hexmask.long 0x0 5.--31. 1. "Reserved_5,Reserved"
bitfld.long 0x0 3.--4. "FBS_1_0,Frame Buffer Status" "0: The latest valid frame buffer has the base..,1: The latest valid frame buffer has the base..,?,?"
newline
bitfld.long 0x0 2. "FS,Field Status" "0: The current field is an odd field,1: The current field is an even field"
bitfld.long 0x0 1. "AV,Active Video Status" "0: The current field is not in the active video area,1: The current field is in the active video area"
newline
bitfld.long 0x0 0. "CA,Video Capture Active Status" "0: Video capture is not operating,1: Video capture is operating"
group.long 0x8++0x13
line.long 0x0 "V15FC,Note: Availability of channels: n=0 to 15"
hexmask.long 0x0 2.--31. 1. "Reserved_2,Reserved"
bitfld.long 0x0 1. "CC,Continuous Frame Capture Mode" "0: The continuous frame capture mode is not set,1: The continuous frame capture mode is set"
newline
bitfld.long 0x0 0. "SC,Single Frame Capture Mode" "0: The single frame capture mode is not set,1: The single frame capture mode is set"
line.long 0x4 "V15SLPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x4 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x4 0.--11. 1. "SLPrC_11_0,Start Line Pre-Clip"
line.long 0x8 "V15ELPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x8 0.--11. 1. "ELPrC_11_0,End Line Pre-Clip"
line.long 0xC "V15SPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0xC 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0xC 0.--11. 1. "SPPrC_11_0,Start Pixel Pre-Clip"
line.long 0x10 "V15EPPrC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x10 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x10 0.--11. 1. "EPPrC_11_0,End Pixel Pre-Clip"
group.long 0x2C++0xF
line.long 0x0 "V15IS,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "Reserved_16,Reserved"
hexmask.long.word 0x0 4.--15. 1. "IS_11_0,Image Stride"
newline
hexmask.long.byte 0x0 0.--3. 1. "Reserved_0,Reserved bits that indicate the lower-order four bits of the image stride."
line.long 0x4 "V15MB1,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 7.--31. 1. "MB1_24_0,Memory Base Address 1"
hexmask.long.byte 0x4 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 1 (a multiple of 128 bytes)."
line.long 0x8 "V15MB2,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "MB2_24_0,Memory Base Address 2"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 2 (a multiple of 128 bytes)."
line.long 0xC "V15MB3,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 7.--31. 1. "MB3_24_0,Memory Base Address 3"
hexmask.long.byte 0xC 0.--6. 1. "Reserved_0,Reserved bits that indicate the lower-order seven bits of memory base address 3 (a multiple of 128 bytes)."
rgroup.long 0x3C++0x3
line.long 0x0 "V15LC,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x0 12.--31. 1. "Reserved_12,Reserved"
hexmask.long.word 0x0 0.--11. 1. "LC_11_0,Line Count"
group.long 0x40++0x7
line.long 0x0 "V15IE,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "FIE2,Field Interrupt Enable 2" "0: Field interrupts are disabled,1: Field interrupts are enabled"
hexmask.long.byte 0x0 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x0 24. "WUE,Wake-up Notification Interrupt Enable" "0: Wake-up notification interrupts are disabled,1: Wake-up notification interrupts are enabled"
hexmask.long.byte 0x0 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x0 17. "VFE,VSYNC Falling Edge Detect Interrupt Enable" "0: VSYNC falling edge detect interrupts are disabled,1: VSYNC falling edge detect interrupts are enabled"
bitfld.long 0x0 16. "VRE,VSYNC Rising Edge Detect Interrupt Enable" "0: VSYNC rising edge detect interrupts are disabled,1: VSYNC rising edge detect interrupts are enabled"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "FIE,Field Interrupt Enable" "0: Field-switching interrupts are disabled,1: Field-switching interrupts are enabled"
newline
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x0 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x0 1. "EFE,End of Frame Interrupt Enable" "0: End of frame interrupts are disabled,1: End of frame interrupts are enabled"
bitfld.long 0x0 0. "FOE,FIFO Overflow Interrupt Enable" "0: FIFO overflow interrupts are disabled,1: FIFO overflow interrupts are enabled"
line.long 0x4 "V15INTS,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x4 31. "FIS2,Field Interrupt Status 2" "0,1"
hexmask.long.byte 0x4 25.--30. 1. "Reserved_25,Reserved"
newline
bitfld.long 0x4 24. "WUS,Wake-up Notification Interrupt Status" "0,1"
hexmask.long.byte 0x4 18.--23. 1. "Reserved_18,Reserved"
newline
bitfld.long 0x4 17. "VFS,VSYNC Falling Edge Detect Interrupt Status" "0,1"
bitfld.long 0x4 16. "VRS,VSYNC Rising Edge Detect Interrupt Status" "0,1"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "FIS,Field Interrupt Status" "0,1"
newline
rbitfld.long 0x4 3. "Reserved_3,Reserved" "0,1"
rbitfld.long 0x4 2. "Reserved_2,Reserved" "0,1"
newline
bitfld.long 0x4 1. "EFS,End of Frame Interrupt Status" "0,1"
bitfld.long 0x4 0. "FOS,FIFO Overflow Interrupt Status" "0,1"
group.long 0x58++0xB
line.long 0x0 "V15DMR,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 24.--31. 1. "A8BIT_7_0,Alpha 8"
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
newline
bitfld.long 0x0 22. "FDS,Fill Data Select" "0: Fill data is 0,1: Fill data is sign data"
bitfld.long 0x0 19.--21. "RMODE_2_0,RAW Data Transfer Mode" "0: 8-bit RAW data,1: Setting prohibited,?,?,?,?,?,?"
newline
rbitfld.long 0x0 17.--18. "Reserved_17,Reserved" "0,1,2,3"
bitfld.long 0x0 16. "EVA,Even Field Address Offset" "0: Data are stored from the base address in..,1: Data are stored from the base address plus the.."
newline
rbitfld.long 0x0 15. "Reserved_15,Reserved" "0,1"
bitfld.long 0x0 12.--14. "YMODE_2_0,YC Data Transfer Mode" "0: Both Y and CbCr data are transferred to memory,1: Only Y data is transferred to memory as 8-bit data,?,?,?,?,?,?"
newline
bitfld.long 0x0 11. "YC_THR,YC Data Through Mode" "0: Y and CbCr data are transferred to memory..,1: Y and CbCr data are transferred to memory as.."
rbitfld.long 0x0 9.--10. "Reserved_9,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 8. "EXRGB,Extension RGB Conversion Mode" "0: RGB data extension processing is not performed,1: Data is extended to 32-bit RGB conversion when.."
rbitfld.long 0x0 5.--7. "Reserved_5,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4. "BPSM,Output Data Byte Swap Mode" "0: Bytes are not swapped in output data,1: Bytes are swapped in output data"
rbitfld.long 0x0 3. "Reserved_3,Reserved" "0,1"
newline
bitfld.long 0x0 2. "ABIT,Alpha Bit" "0: The alpha value is set to 0,1: The alpha value is set to 1"
bitfld.long 0x0 0.--1. "DTMD_1_0,Data Conversion Mode" "0: Data is not converted,1: RGB is converted to ARGB before output,?,?"
line.long 0x4 "V15DMR2,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x4 21.--31. 1. "Reserved_21,Reserved"
bitfld.long 0x4 20. "MFC,Multi Frame Capture Mode" "0: Disables multi frame capture mode,1: Enables multi frame capture mode"
newline
rbitfld.long 0x4 18.--19. "Reserved_18,Reserved" "0,1,2,3"
bitfld.long 0x4 17. "FTEV,VSYNC Field Toggle Mode Enable" "0: The field toggle function according to the VSYNC..,1: The field toggle function according to the VSYNC.."
newline
rbitfld.long 0x4 16. "Reserved_16,Reserved" "0,1"
hexmask.long.byte 0x4 12.--15. 1. "VLV_3_0,VSYNC Field Toggle Mode Transition Period"
newline
hexmask.long.word 0x4 0.--11. 1. "Reserved_0,Reserved"
line.long 0x8 "V15UVAOF,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 7.--31. 1. "UVAOF_24_0,UV Data Address Offset"
hexmask.long.byte 0x8 0.--6. 1. "Reserved_0,Reserved bits that indicate the 128-byte boundary of the UVAOF value."
rgroup.long 0xD4++0x3
line.long 0x0 "V15WLC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 30.--31. "SWFBS_1_0,Smallest Writing Frame Buffer Status" "0,1,2,3"
hexmask.long.word 0x0 16.--29. 1. "SWLC_13_0,Smallest Write Line Count"
newline
bitfld.long 0x0 14.--15. "WFBS_1_0,Writing Frame Buffer Status" "0: Frame buffer under writing has the base address..,1: Frame buffer under writing has the base address..,?,?"
hexmask.long.word 0x0 0.--13. 1. "WLC_13_0,Write Line Count"
group.long 0xF0++0xB
line.long 0x0 "V15IMWUCH,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "WUMD,Wake Up Mode" "0: The WLC[13:0] bits value in the VnWLC,1: The SWLC[13:0] bits value in the VnWLC"
bitfld.long 0x0 30. "SVMD,Smallest Value Mode" "0: The SWLC[13:0] bits value between video channel..,1: The SWLC[13:0] bits value between the below.."
newline
hexmask.long.word 0x0 19.--29. 1. "Reserved_19,Reserved"
bitfld.long 0x0 18. "WUE3,Wake Up Enable 3" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
bitfld.long 0x0 17. "WUE2,Wake Up Enable 2" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
bitfld.long 0x0 16. "WUE1,Wake Up Enable 1" "0: Disables the issue of IMR/VSPX wake up..,1: Enables the issue of IMR/VSPX wake up.."
newline
hexmask.long.word 0x0 1.--15. 1. "Reserved_1,Reserved"
bitfld.long 0x0 0. "WUCH,Wake Up Enable" "0: Disables wake up notification to IMRn and VSPXn,1: Enables wake up notification to IMRn and VSPXn"
line.long 0x4 "V15IMWUL,Note: Availability of channels: n = 0 to 15"
rbitfld.long 0x4 30.--31. "Reserved_30,Reserved" "0,1,2,3"
hexmask.long.word 0x4 16.--29. 1. "WUL2_13_0,Wake Up Line 2"
newline
rbitfld.long 0x4 14.--15. "Reserved_14,Reserved" "0,1,2,3"
hexmask.long.word 0x4 0.--13. 1. "WUL1_13_0,Wake Up Line 1"
line.long 0x8 "V15IMWUL2,Note: Availability of channels: n = 0 to 15"
hexmask.long.tbyte 0x8 14.--31. 1. "Reserved_14,Reserved"
hexmask.long.word 0x8 0.--13. 1. "WUL3_13_0,Wake Up Line 3"
group.long 0x320++0x1B
line.long 0x0 "V15FNSC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 31. "HRCHK,HW Redundancy Error check" "0: Disable error of HW Redundancy detection,1: Enable error of HW Redundancy detection"
rbitfld.long 0x0 28.--30. "Reserved_28,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 26.--27. "HCEN_1_0,Enable Hsync Rise Time Measurement" "0: Disable Hsync rise time measurement,1: Enable minimum Hsync rise time measurement,?,?"
rbitfld.long 0x0 24.--25. "Reserved_24,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 23. "CRM,CRC Calculation Mode" "0: Only calculate CRC,1: Input expected value and compare the CRC.."
rbitfld.long 0x0 21.--22. "Reserved_21,Reserved" "0,1,2,3"
newline
bitfld.long 0x0 19.--20. "EDID_1_0,EDC ID" "0: Channel Selector,1: Prohibit,?,?"
bitfld.long 0x0 18. "FED_EN,FIFO EDC Enable" "0: Disable EDC error of Write FIFO detection,1: Enable EDC error of Write FIFO detection"
newline
bitfld.long 0x0 17. "CED_EN,Channel Selector EDC Enable" "0: Disable EDC error of channel selector detection,1: Enable EDC error of channel selector detection"
rbitfld.long 0x0 16. "Reserved_16,Reserved" "0,1"
newline
bitfld.long 0x0 15. "EDCDEI,EDC Dummy Error Injection" "0: Not issue dummy EDC error,1: Issue dummy EDC error"
bitfld.long 0x0 14. "DEI,Dummy Error Injection" "0: Not issue dummy error,1: Issue dummy error"
newline
rbitfld.long 0x0 12.--13. "Reserved_12,Reserved" "0,1,2,3"
bitfld.long 0x0 11. "DEER_DM,Data Enable Assert Cycle Error Detection Mode" "0: Data enable assert cycle error is not detected,1: Data enable assert cycle error is detected"
newline
bitfld.long 0x0 9.--10. "DECE_1_0,Enable CLKENB Assert Cycle Measurement" "0: Disable Data enable assert cycle measurement,1: Enable minimum Data enable assert cycle..,?,?"
rbitfld.long 0x0 6.--8. "Reserved_6,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 4.--5. "VSCE_1_0,Enable VSYNC Toggle Cycle Measurement" "0: Disable VSYNC toggle cycle measurement,1: Enable minimum VSYNC toggle cycle measurement,?,?"
bitfld.long 0x0 2.--3. "HSCE_1_0,Enable HSYNC Toggle Cycle Measurement" "0: Disable HSYNC toggle cycle measurement,1: Enable minimum HSYNC toggle cycle measurement,?,?"
newline
bitfld.long 0x0 0.--1. "FLCE_1_0,Enable FIELD Toggle Cycle Measurement" "0: Disable FIELD toggle cycle measurement,1: Enable minimum FIELD toggle cycle measurement,?,?"
line.long 0x4 "V15FTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "FLD_CNT_MIN_31_0,FIELD Toggle Cycle Minimum Value"
line.long 0x8 "V15FTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "FLD_CNT_MAX_31_0,FIELD Toggle Cycle Maximum Value"
line.long 0xC "V15HSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "HS_CNT_MIN_31_0,HSYNC Toggle Cycle Minimum Value"
line.long 0x10 "V15HSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x10 0.--31. 1. "HS_CNT_MAX_31_0,HSYNC Toggle Cycle Maximum Value"
line.long 0x14 "V15VSTMIN,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x14 0.--31. 1. "VS_CNT_MIN_31_0,VSYNC Toggle Cycle Minimum Value"
line.long 0x18 "V15VSTMAX,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x18 0.--31. 1. "VS_CNT_MAX_31_0,VSYNC Toggle Cycle Maximum Value"
group.long 0x344++0x3
line.long 0x0 "V15DET,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "DE_CNT_MAX_15_0,CLKENB Enable Cycle Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "DE_CNT_MIN_15_0,CLKENB Enable Cycle Minimum Value"
rgroup.long 0x354++0x3
line.long 0x0 "V15VCRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x0 0.--31. 1. "VCRC_31_0,VCRC Code"
group.long 0x36C++0x3
line.long 0x0 "V15HRT,Note: Availability of channels: n = 0 to 15"
hexmask.long.word 0x0 16.--31. 1. "HR_CNT_MAX_15_0,Hsync Rise Time Maximum Value"
hexmask.long.word 0x0 0.--15. 1. "HR_CNT_MIN_15_0,Hsync Rise Time Minimum Value"
group.long 0x380++0xF
line.long 0x0 "V15CRCC,Note: Availability of channels: n = 0 to 15"
bitfld.long 0x0 29.--31. "IDBOE_2_0,Input Data Byte Order of Even line" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 26.--28. "Reserved_26,Reserved" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 25. "Y420MD,YUV420 Mode" "0: Not YCbCr-420,1: YCbCr-420"
bitfld.long 0x0 24. "INSEL,Input Data Select" "0: Before image size clip,1: After image size clip"
newline
rbitfld.long 0x0 23. "Reserved_23,Reserved" "0,1"
bitfld.long 0x0 22. "IDRE,Input Data Reflection of Even line" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 18.--21. 1. "Reserved_18,Reserved"
bitfld.long 0x0 16.--17. "IDBLE_1_0,Input Data Byte length of Even line" "0: 1-byte data,1: 2-byte data,?,?"
newline
bitfld.long 0x0 13.--15. "IDBO_2_0,Input Data Byte Order" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 8.--12. 1. "PDBL_4_0,Polynomial Equation Coefficient Data Bit Length"
newline
bitfld.long 0x0 7. "ROR,Remainder Output Reflection" "0: No reflection,1: Apply reflection"
bitfld.long 0x0 6. "IDR,Input Data Reflection" "0: No reflection,1: Apply reflection"
newline
hexmask.long.byte 0x0 2.--5. 1. "Reserved_2,Reserved"
bitfld.long 0x0 0.--1. "IDBL_1_0,Input Data Byte length" "0: 1-byte data,1: 2-byte data,?,?"
line.long 0x4 "V15CRPEC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x4 0.--31. 1. "CPLYEC_31_0,CRC Polynomial Equation Coefficient"
line.long 0x8 "V15CRIR,Note: Availability of channels: n = 0 to 15"
hexmask.long 0x8 0.--31. 1. "CIR_31_0,CRC Initial Remainder"
line.long 0xC "V15CRXRC,Note: Availability of channels: n = 0 to 15"
hexmask.long 0xC 0.--31. 1. "CXORC_31_0,CRC Final XOR Coefficient"
group.long 0x3F0++0x7
line.long 0x0 "V15EE,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x0 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x0 16.--26. 1. "HREE_10_0,HW Redundancy Error Detection Interrupt Enable"
newline
hexmask.long.word 0x0 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x0 4. "CCEE,ECRC Comparison Error Detection Interrupt Enable" "0: ECRC comparison error detection interrupts are..,1: ECRC comparison error detection interrupts are.."
newline
bitfld.long 0x0 3. "EFEE,EDC of FIFO Error Detection Interrupt Enable" "0: EDC error of Write FIFO detection interrupts are..,1: EDC error of Write FIFO detection interrupts are.."
bitfld.long 0x0 2. "ECEE,EDC of Channel Selector Conversion Error Detection Interrupt Enable" "0: EDC error of Channel Selector conversion logic..,1: EDC error of Channel Selector conversion logic.."
newline
rbitfld.long 0x0 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x0 0. "SEE,Sync Interval Checker Error Detect Interrupt Enable" "0: Sync Interval Checker error detect interrupts..,1: Sync Interval Checker error detect interrupts.."
line.long 0x4 "V15ERS,Note: Availability of channels: n = 0 to 15"
hexmask.long.byte 0x4 27.--31. 1. "Reserved_27,Reserved"
hexmask.long.word 0x4 16.--26. 1. "HRER_10_0,HW Redundancy Error Detection Interrupt Status"
newline
hexmask.long.word 0x4 5.--15. 1. "Reserved_5,Reserved"
bitfld.long 0x4 4. "CCER,ECRC Comparison Error Detection Interrupt Status" "0,1"
newline
bitfld.long 0x4 3. "EFER,EDC of FIFO Error Detection Interrupt Status" "0,1"
bitfld.long 0x4 2. "ECER,EDC of Channel Selector Conversion Error Detection Interrupt Status" "0,1"
newline
rbitfld.long 0x4 1. "Reserved_1,Reserved" "0,1"
bitfld.long 0x4 0. "SER,Sync Interval Checker Error Detect Interrupt Status" "0,1"
tree.end
tree.end
tree "VisionIP"
base ad:0xE7A10000
group.long 0x40++0x1F
line.long 0x0 "CH_CTRL1,Channel activation ch1"
hexmask.long 0x0 1.--31. 1. "RSV,Reserved"
bitfld.long 0x0 0. "ACT,0: Inactive  transaction's address belongs to inactive channel will be assigned to double_quotationBy Passdouble_quotation channel" "0: Inactive,1: Channel activated"
line.long 0x4 "SRC_HSIZE1,Input picture Horizontal size ch1"
hexmask.long.byte 0x4 27.--31. 1. "RSV,Reserved"
hexmask.long 0x4 0.--26. 1. "HSIZE,Input picture Horizontal size"
line.long 0x8 "SRC_VSIZE1,Input picture vertical size ch1"
hexmask.long.tbyte 0x8 14.--31. 1. "RSV,Reserved"
hexmask.long.word 0x8 0.--13. 1. "VSIZE,Input picture vertical size"
line.long 0xC "SRC_FMT1,Input picture endianness ch1"
hexmask.long.word 0xC 16.--31. 1. "RSV0,Reserved"
hexmask.long.byte 0xC 12.--15. 1. "MSBOFS,MSB offset bit. Range: 0~15. It shall be fixed 0 in 1 Byte/pixel"
hexmask.long.byte 0xC 8.--11. 1. "LSBOFS,LSB offset bit. Range: 0~15. It shall be fixed 0 in 1 Byte/pixel"
rbitfld.long 0xC 5.--7. "RSV1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 4. "BPP,Byte per pixels" "0: 2 Bytes/pixel,1: 1 Byte/pixel"
rbitfld.long 0xC 1.--3. "RSV2,Reserved" "0,1,2,3,4,5,6,7"
rbitfld.long 0xC 0. "Reserved_0,Reserved. (This bit is always read as 0.)" "0,1"
line.long 0x10 "SRC_ADR1,Source picture memory stride ch1"
hexmask.long 0x10 0.--31. 1. "SRC_ADR,Source picture address (always align 8Bytes)"
line.long 0x14 "SRC_PSTRIDE1,Source picture memory stride ch1"
hexmask.long.word 0x14 20.--31. 1. "RSV,Reserved"
hexmask.long.byte 0x14 16.--19. 1. "CHAS,Channel address space"
hexmask.long.word 0x14 0.--15. 1. "PSTRIDE,Source picture memory stride (always align 8Bytes)"
line.long 0x18 "DST_FMT1,Reserved bit"
hexmask.long.word 0x18 16.--31. 1. "RSV0,Reserved"
hexmask.long.byte 0x18 12.--15. 1. "MSBOFS,MSB offset bit. Range: 0~15. It shall be fixed 0 in 1 Byte/pixel"
hexmask.long.byte 0x18 8.--11. 1. "LSBOFS,LSB offset bit. Range: 0~15. It shall be fixed 0 in 1 Byte/pixel"
rbitfld.long 0x18 5.--7. "RSV1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 4. "BPP,Byte per pixels" "0: 2 Bytes/pixel,1: 1 Byte/pixel"
rbitfld.long 0x18 1.--3. "RSV2,Reserved" "0,1,2,3,4,5,6,7"
rbitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "PAD_VALUE1,Padding value for LSB ch1"
hexmask.long.word 0x1C 16.--31. 1. "MSB_PAD,Padding value for MSB. Example if MSBOFS is 4  PAD_VALUE[19:16] are filled to 4 MSB output pixel"
hexmask.long.word 0x1C 0.--15. 1. "LSB_PAD,Padding value for LSB. Example if LSBOFS is 4  PAD_VALUE[3:0] are filled to 4 LSB output pixel"
group.long 0x70++0x1F
line.long 0x0 "CH_CTRL2,Channel activation ch2"
hexmask.long 0x0 1.--31. 1. "RSV,Reserved"
bitfld.long 0x0 0. "ACT,0: Inactive  transaction's address belongs to inactive channel will be assigned to double_quotationBy Passdouble_quotation channel" "0: Inactive,1: Channel activated"
line.long 0x4 "SRC_HSIZE2,Input picture Horizontal size ch2"
hexmask.long.byte 0x4 27.--31. 1. "RSV,Reserved"
hexmask.long 0x4 0.--26. 1. "HSIZE,Input picture Horizontal size"
line.long 0x8 "SRC_VSIZE2,Input picture vertical size ch2"
hexmask.long.tbyte 0x8 14.--31. 1. "RSV,Reserved"
hexmask.long.word 0x8 0.--13. 1. "VSIZE,Input picture vertical size"
line.long 0xC "SRC_FMT2,Input picture endianness ch2"
hexmask.long.word 0xC 16.--31. 1. "RSV0,Reserved"
hexmask.long.byte 0xC 12.--15. 1. "MSBOFS,MSB offset bit. Range: 0~15. It shall be fixed 0 in 1 Byte/pixel"
hexmask.long.byte 0xC 8.--11. 1. "LSBOFS,LSB offset bit. Range: 0~15. It shall be fixed 0 in 1 Byte/pixel"
rbitfld.long 0xC 5.--7. "RSV1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 4. "BPP,Byte per pixels" "0: 2 Bytes/pixel,1: 1 Byte/pixel"
rbitfld.long 0xC 1.--3. "RSV2,Reserved" "0,1,2,3,4,5,6,7"
rbitfld.long 0xC 0. "Reserved_0,Reserved. (This bit is always read as 0.)" "0,1"
line.long 0x10 "SRC_ADR2,Source picture memory stride ch2"
hexmask.long 0x10 0.--31. 1. "SRC_ADR,Source picture address (always align 8Bytes)"
line.long 0x14 "SRC_PSTRIDE2,Source picture memory stride ch2"
hexmask.long.word 0x14 20.--31. 1. "RSV,Reserved"
hexmask.long.byte 0x14 16.--19. 1. "CHAS,Channel address space"
hexmask.long.word 0x14 0.--15. 1. "PSTRIDE,Source picture memory stride (always align 8Bytes)"
line.long 0x18 "DST_FMT2,Reserved bit"
hexmask.long.word 0x18 16.--31. 1. "RSV0,Reserved"
hexmask.long.byte 0x18 12.--15. 1. "MSBOFS,MSB offset bit. Range: 0~15. It shall be fixed 0 in 1 Byte/pixel"
hexmask.long.byte 0x18 8.--11. 1. "LSBOFS,LSB offset bit. Range: 0~15. It shall be fixed 0 in 1 Byte/pixel"
rbitfld.long 0x18 5.--7. "RSV1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 4. "BPP,Byte per pixels" "0: 2 Bytes/pixel,1: 1 Byte/pixel"
rbitfld.long 0x18 1.--3. "RSV2,Reserved" "0,1,2,3,4,5,6,7"
rbitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "PAD_VALUE2,Padding value for LSB ch2"
hexmask.long.word 0x1C 16.--31. 1. "MSB_PAD,Padding value for MSB. Example if MSBOFS is 4  PAD_VALUE[19:16] are filled to 4 MSB output pixel"
hexmask.long.word 0x1C 0.--15. 1. "LSB_PAD,Padding value for LSB. Example if LSBOFS is 4  PAD_VALUE[3:0] are filled to 4 LSB output pixel"
group.long 0xA0++0x1F
line.long 0x0 "CH_CTRL3,Channel activation ch3"
hexmask.long 0x0 1.--31. 1. "RSV,Reserved"
bitfld.long 0x0 0. "ACT,0: Inactive  transaction's address belongs to inactive channel will be assigned to double_quotationBy Passdouble_quotation channel" "0: Inactive,1: Channel activated"
line.long 0x4 "SRC_HSIZE3,Input picture Horizontal size ch3"
hexmask.long.byte 0x4 27.--31. 1. "RSV,Reserved"
hexmask.long 0x4 0.--26. 1. "HSIZE,Input picture Horizontal size"
line.long 0x8 "SRC_VSIZE3,Input picture vertical size ch3"
hexmask.long.tbyte 0x8 14.--31. 1. "RSV,Reserved"
hexmask.long.word 0x8 0.--13. 1. "VSIZE,Input picture vertical size"
line.long 0xC "SRC_FMT3,Input picture endianness ch3"
hexmask.long.word 0xC 16.--31. 1. "RSV0,Reserved"
hexmask.long.byte 0xC 12.--15. 1. "MSBOFS,MSB offset bit. Range: 0~15. It shall be fixed 0 in 1 Byte/pixel"
hexmask.long.byte 0xC 8.--11. 1. "LSBOFS,LSB offset bit. Range: 0~15. It shall be fixed 0 in 1 Byte/pixel"
rbitfld.long 0xC 5.--7. "RSV1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 4. "BPP,Byte per pixels" "0: 2 Bytes/pixel,1: 1 Byte/pixel"
rbitfld.long 0xC 1.--3. "RSV2,Reserved" "0,1,2,3,4,5,6,7"
rbitfld.long 0xC 0. "Reserved_0,Reserved. (This bit is always read as 0.)" "0,1"
line.long 0x10 "SRC_ADR3,Source picture memory stride ch3"
hexmask.long 0x10 0.--31. 1. "SRC_ADR,Source picture address (always align 8Bytes)"
line.long 0x14 "SRC_PSTRIDE3,Source picture memory stride ch3"
hexmask.long.word 0x14 20.--31. 1. "RSV,Reserved"
hexmask.long.byte 0x14 16.--19. 1. "CHAS,Channel address space"
hexmask.long.word 0x14 0.--15. 1. "PSTRIDE,Source picture memory stride (always align 8Bytes)"
line.long 0x18 "DST_FMT3,Reserved bit"
hexmask.long.word 0x18 16.--31. 1. "RSV0,Reserved"
hexmask.long.byte 0x18 12.--15. 1. "MSBOFS,MSB offset bit. Range: 0~15. It shall be fixed 0 in 1 Byte/pixel"
hexmask.long.byte 0x18 8.--11. 1. "LSBOFS,LSB offset bit. Range: 0~15. It shall be fixed 0 in 1 Byte/pixel"
rbitfld.long 0x18 5.--7. "RSV1,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 4. "BPP,Byte per pixels" "0: 2 Bytes/pixel,1: 1 Byte/pixel"
rbitfld.long 0x18 1.--3. "RSV2,Reserved" "0,1,2,3,4,5,6,7"
rbitfld.long 0x18 0. "Reserved_0,Reserved" "0,1"
line.long 0x1C "PAD_VALUE3,Padding value for LSB ch3"
hexmask.long.word 0x1C 16.--31. 1. "MSB_PAD,Padding value for MSB. Example if MSBOFS is 4  PAD_VALUE[19:16] are filled to 4 MSB output pixel"
hexmask.long.word 0x1C 0.--15. 1. "LSB_PAD,Padding value for LSB. Example if LSBOFS is 4  PAD_VALUE[3:0] are filled to 4 LSB output pixel"
tree.end
tree "WDT (Watchdog Timer)"
base ad:0x0
tree "RWDT (RCLK Watchdog Timer)"
base ad:0xE6020000
group.long 0x0++0x3
line.long 0x0 "RWTCNT,1.0"
hexmask.long.word 0x0 16.--31. 1. "CODE_VAL,Code value 1"
hexmask.long.word 0x0 0.--15. 1. "RWTCNT,Timer Counter Bits"
group.long 0x0++0x3
line.long 0x0 "RWTCNT__16_L,1.0"
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.word 0x0 0.--15. 1. "RWTCNT,Timer Counter Bits"
group.long 0x0++0x7
line.long 0x0 "RWTCNT__16_H,1.0"
hexmask.long.word 0x0 16.--31. 1. "CODE_VAL,Code value 1"
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
line.long 0x4 "RWTCSRA,1.0"
hexmask.long.tbyte 0x4 8.--31. 1. "CODE_VAL2,Code value 2"
bitfld.long 0x4 7. "TME,Starts and stops timer operation." "0: Timer disabled: Count-up stops and RWTCNT value..,1: Timer enabled"
newline
rbitfld.long 0x4 6. "Reserved_6,Reserved" "0,1"
rbitfld.long 0x4 5. "WRFLG,Write Status Flag" "0,1"
newline
bitfld.long 0x4 4. "WOVF,Indicates that the RWTCNT has overflowed. This bit isn't initialized by a generated reset by an overflow of RWDT and section 154.3. System Watchdog Timer (SWDT). Write 0 to this bit before using the RWDT." "0: No overflow,1: RWTCNT has overflowed"
bitfld.long 0x4 3. "WOVFE,Overflow Interrupt Disable/Enable" "0: Disables interrupts due to overflow,1: Enables interrupts due to overflow"
newline
bitfld.long 0x4 0.--2. "CKS0,RTC Clock Select" "0: RCLK,1: RCLK/4,?,?,?,?,?,?"
group.long 0x4++0x3
line.long 0x0 "RWTCSRA__8_LL,1.0"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved0,Reserved"
bitfld.long 0x0 7. "TME,Starts and stops timer operation." "0: Timer disabled: Count-up stops and RWTCNT value..,1: Timer enabled"
newline
rbitfld.long 0x0 6. "Reserved_6,Reserved" "0,1"
rbitfld.long 0x0 5. "WRFLG,Write Status Flag" "0,1"
newline
bitfld.long 0x0 4. "WOVF,Indicates that the RWTCNT has overflowed. This bit isn't initialized by a generated reset by an overflow of RWDT and section 154.3. System Watchdog Timer (SWDT). Write 0 to this bit before using the RWDT." "0: No overflow,1: RWTCNT has overflowed"
bitfld.long 0x0 3. "WOVFE,Overflow Interrupt Disable/Enable" "0: Disables interrupts due to overflow,1: Enables interrupts due to overflow"
newline
bitfld.long 0x0 0.--2. "CKS0,RTC Clock Select" "0: RCLK,1: RCLK/4,?,?,?,?,?,?"
group.long 0x4++0x3
line.long 0x0 "RWTCSRA__8_LH,1.0"
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "CODE_VAL2,Code value 2"
newline
rbitfld.long 0x0 7. "Reserved1,Reserved" "0,1"
rbitfld.long 0x0 6. "Reserved2,Reserved" "0,1"
newline
rbitfld.long 0x0 5. "Reserved3,Reserved" "0,1"
rbitfld.long 0x0 4. "Reserved4,Reserved" "0,1"
newline
rbitfld.long 0x0 3. "Reserved5,Reserved" "0,1"
rbitfld.long 0x0 0.--2. "Reserved6,Reserved" "0,1,2,3,4,5,6,7"
group.long 0x4++0x3
line.long 0x0 "RWTCSRA__8_HL,1.0"
hexmask.long.word 0x0 16.--31. 1. "CODE_VAL2,Code value 2"
hexmask.long.byte 0x0 8.--15. 1. "Reserved0,Reserved"
newline
rbitfld.long 0x0 7. "Reserved1,Reserved" "0,1"
rbitfld.long 0x0 6. "Reserved2,Reserved" "0,1"
newline
rbitfld.long 0x0 5. "Reserved3,Reserved" "0,1"
rbitfld.long 0x0 4. "Reserved4,Reserved" "0,1"
newline
rbitfld.long 0x0 3. "Reserved5,Reserved" "0,1"
rbitfld.long 0x0 0.--2. "Reserved6,Reserved" "0,1,2,3,4,5,6,7"
group.long 0x4++0x7
line.long 0x0 "RWTCSRA__8_HH,1.0"
hexmask.long.byte 0x0 24.--31. 1. "CODE_VAL2,Code value 2"
hexmask.long.word 0x0 8.--23. 1. "Reserved0,Reserved"
newline
rbitfld.long 0x0 7. "Reserved1,Reserved" "0,1"
rbitfld.long 0x0 6. "Reserved2,Reserved" "0,1"
newline
rbitfld.long 0x0 5. "Reserved3,Reserved" "0,1"
rbitfld.long 0x0 4. "Reserved4,Reserved" "0,1"
newline
rbitfld.long 0x0 3. "Reserved5,Reserved" "0,1"
rbitfld.long 0x0 0.--2. "Reserved6,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4 "RWTCSRB,1.0"
hexmask.long.tbyte 0x4 8.--31. 1. "CODE_VAL3,Code value 3"
rbitfld.long 0x4 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x4 0.--5. 1. "CKS1,RCLK Select for RCLK Select Expanded Mode"
group.long 0x8++0x3
line.long 0x0 "RWTCSRB__8_LL,1.0"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved0,Reserved"
rbitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "CKS1,RCLK Select for RCLK Select Expanded Mode"
group.long 0x8++0x3
line.long 0x0 "RWTCSRB__8_LH,1.0"
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "CODE_VAL3,Code value 3"
newline
rbitfld.long 0x0 6.--7. "Reserved1,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 0.--5. 1. "Reserved2,Reserved"
group.long 0x8++0x3
line.long 0x0 "RWTCSRB__8_HL,1.0"
hexmask.long.word 0x0 16.--31. 1. "CODE_VAL3,Code value 3"
hexmask.long.byte 0x0 8.--15. 1. "Reserved0,Reserved"
newline
rbitfld.long 0x0 6.--7. "Reserved1,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 0.--5. 1. "Reserved2,Reserved"
group.long 0x8++0x3
line.long 0x0 "RWTCSRB__8_HH,1.0"
hexmask.long.byte 0x0 24.--31. 1. "CODE_VAL3,Code value 3"
hexmask.long.word 0x0 8.--23. 1. "Reserved0,Reserved"
newline
rbitfld.long 0x0 6.--7. "Reserved1,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 0.--5. 1. "Reserved2,Reserved"
tree.end
tree "SWDT (System Watchdog Timer)"
base ad:0xE6030000
group.long 0x0++0x3
line.long 0x0 "SWTCNT,1.0"
hexmask.long.word 0x0 16.--31. 1. "CODE_VAL1,Code value 1"
hexmask.long.word 0x0 0.--15. 1. "SWTCNT,Timer Counter Bits"
group.long 0x0++0x3
line.long 0x0 "SWTCNT__16_L,1.0"
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.word 0x0 0.--15. 1. "SWTCNT,Timer Counter Bits"
group.long 0x0++0x7
line.long 0x0 "SWTCNT__16_H,1.0"
hexmask.long.word 0x0 16.--31. 1. "CODE_VAL1,Code value 1"
hexmask.long.word 0x0 0.--15. 1. "Reserved1,Reserved"
line.long 0x4 "SWTCSRA,1.0"
hexmask.long.tbyte 0x4 8.--31. 1. "CODE_VAL2,Code value 2"
bitfld.long 0x4 7. "TME,Starts and stops timer operation." "0: Timer disabled: Count-up stops and SWTCNT value..,1: Timer enabled"
newline
rbitfld.long 0x4 6. "Reserved_6,Reserved" "0,1"
rbitfld.long 0x4 5. "WRFLG,Write Status Flag" "0,1"
newline
bitfld.long 0x4 4. "WOVF,Indicates that the SWTCNT has overflowed. This bit isn't initialized by a generated reset by an overflow of section 154.1. RCLK Watchdog Timer (RWDT) and System Watchdog Timer. Write 0 to this bit before using the System Watchdog Timer." "0: No overflow,1: SWTCNT has overflowed"
bitfld.long 0x4 3. "WOVFE,Overflow Interrupt Disable/Enable" "0: Disables interrupts due to overflow,1: Enables interrupts due to overflow"
newline
bitfld.long 0x4 0.--2. "CKS0,RTC Clock Select" "0: OSCCLK,1: OSCCLK /4,?,?,?,?,?,?"
group.long 0x4++0x3
line.long 0x0 "SWTCSRA__8_LL,1.0"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved0,Reserved"
bitfld.long 0x0 7. "TME,Starts and stops timer operation." "0: Timer disabled: Count-up stops and SWTCNT value..,1: Timer enabled"
newline
rbitfld.long 0x0 6. "Reserved_6,Reserved" "0,1"
rbitfld.long 0x0 5. "WRFLG,Write Status Flag" "0,1"
newline
bitfld.long 0x0 4. "WOVF,Indicates that the SWTCNT has overflowed. This bit isn't initialized by a generated reset by an overflow of section 154.1. RCLK Watchdog Timer (RWDT) and System Watchdog Timer. Write 0 to this bit before using the System Watchdog Timer." "0: No overflow,1: SWTCNT has overflowed"
bitfld.long 0x0 3. "WOVFE,Overflow Interrupt Disable/Enable" "0: Disables interrupts due to overflow,1: Enables interrupts due to overflow"
newline
bitfld.long 0x0 0.--2. "CKS0,RTC Clock Select" "0: OSCCLK,1: OSCCLK /4,?,?,?,?,?,?"
group.long 0x4++0x3
line.long 0x0 "SWTCSRA__8_LH,1.0"
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "CODE_VAL2,Code value 2"
newline
rbitfld.long 0x0 7. "Reserved1,Reserved" "0,1"
rbitfld.long 0x0 6. "Reserved2,Reserved" "0,1"
newline
rbitfld.long 0x0 5. "Reserved3,Reserved" "0,1"
rbitfld.long 0x0 4. "Reserved4,Reserved" "0,1"
newline
rbitfld.long 0x0 3. "Reserved5,Reserved" "0,1"
rbitfld.long 0x0 0.--2. "Reserved6,Reserved" "0,1,2,3,4,5,6,7"
group.long 0x4++0x3
line.long 0x0 "SWTCSRA__8_HL,1.0"
hexmask.long.word 0x0 16.--31. 1. "CODE_VAL2,Code value 2"
hexmask.long.byte 0x0 8.--15. 1. "Reserved0,Reserved"
newline
rbitfld.long 0x0 7. "Reserved1,Reserved" "0,1"
rbitfld.long 0x0 6. "Reserved2,Reserved" "0,1"
newline
rbitfld.long 0x0 5. "Reserved3,Reserved" "0,1"
rbitfld.long 0x0 4. "Reserved4,Reserved" "0,1"
newline
rbitfld.long 0x0 3. "Reserved5,Reserved" "0,1"
rbitfld.long 0x0 0.--2. "Reserved6,Reserved" "0,1,2,3,4,5,6,7"
group.long 0x4++0x7
line.long 0x0 "SWTCSRA__8_HH,1.0"
hexmask.long.byte 0x0 24.--31. 1. "CODE_VAL2,Code value 2"
hexmask.long.word 0x0 8.--23. 1. "Reserved0,Reserved"
newline
rbitfld.long 0x0 7. "Reserved1,Reserved" "0,1"
rbitfld.long 0x0 6. "Reserved2,Reserved" "0,1"
newline
rbitfld.long 0x0 5. "Reserved3,Reserved" "0,1"
rbitfld.long 0x0 4. "Reserved4,Reserved" "0,1"
newline
rbitfld.long 0x0 3. "Reserved5,Reserved" "0,1"
rbitfld.long 0x0 0.--2. "Reserved6,Reserved" "0,1,2,3,4,5,6,7"
line.long 0x4 "SWTCSRB,1.0"
hexmask.long.tbyte 0x4 8.--31. 1. "CODE_VAL3,Code value 3"
bitfld.long 0x4 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x4 0.--5. 1. "CKS1,OSCCLK Select for OSCCLK Select Expanded Mode"
group.long 0x8++0x3
line.long 0x0 "SWTCSRB__8_LL,1.0"
hexmask.long.tbyte 0x0 8.--31. 1. "Reserved0,Reserved"
bitfld.long 0x0 6.--7. "Reserved_6,Reserved" "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--5. 1. "CKS1,OSCCLK Select for OSCCLK Select Expanded Mode"
group.long 0x8++0x3
line.long 0x0 "SWTCSRB__8_LH,1.0"
hexmask.long.word 0x0 16.--31. 1. "Reserved0,Reserved"
hexmask.long.byte 0x0 8.--15. 1. "CODE_VAL3,Code value 3"
newline
rbitfld.long 0x0 6.--7. "Reserved1,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 0.--5. 1. "Reserved2,Reserved"
group.long 0x8++0x3
line.long 0x0 "SWTCSRB__8_HL,1.0"
hexmask.long.word 0x0 16.--31. 1. "CODE_VAL3,Code value 3"
hexmask.long.byte 0x0 8.--15. 1. "Reserved0,Reserved"
newline
rbitfld.long 0x0 6.--7. "Reserved1,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 0.--5. 1. "Reserved2,Reserved"
group.long 0x8++0x3
line.long 0x0 "SWTCSRB__8_HH,1.0"
hexmask.long.byte 0x0 24.--31. 1. "CODE_VAL3,Code value 3"
hexmask.long.word 0x0 8.--23. 1. "Reserved0,Reserved"
newline
rbitfld.long 0x0 6.--7. "Reserved1,Reserved" "0,1,2,3"
hexmask.long.byte 0x0 0.--5. 1. "Reserved2,Reserved"
tree.end
base ad:0x0
tree "WWDT (Window Watchdog Timer)"
tree "WWDT_0"
base ad:0xFFC90000
group.byte 0x0++0x0
line.byte 0x0 "WDTA0WDTE0,Note: n = 0 to 9"
bitfld.byte 0x0 7. "WDTA0RUN,Watchdog timer count start or stop." "0,1"
hexmask.byte 0x0 0.--6. 1. "Reserved_0,Reserved"
group.byte 0xC++0x0
line.byte 0x0 "WDTA0MD0,Note: n = 0 to 9"
rbitfld.byte 0x0 7. "Reserved_7,Reserved" "0,1"
bitfld.byte 0x0 6. "WDTA0OVF2,Interval time mode." "0,1"
bitfld.byte 0x0 5. "WDTA0OVF1,Interval time mode." "0,1"
bitfld.byte 0x0 4. "WDTA0OVF0,Interval time mode." "0,1"
bitfld.byte 0x0 3. "WDTA0WIE,75% interrupt enable" "0: 75% interrupt is disabled,1: 75% interrupt is enabled"
bitfld.byte 0x0 2. "WDTA0ERM,Error mode" "0: NMI mode,1: Reset mode"
bitfld.byte 0x0 1. "WDTA0WS1,Window Size selection" "0,1"
newline
bitfld.byte 0x0 0. "WDTA0WS0,Window Size selection" "0,1"
tree.end
tree "WWDT_1"
base ad:0xFFCA0000
group.byte 0x0++0x0
line.byte 0x0 "WDTA0WDTE1,Note: n = 0 to 9"
bitfld.byte 0x0 7. "WDTA0RUN,Watchdog timer count start or stop." "0,1"
hexmask.byte 0x0 0.--6. 1. "Reserved_0,Reserved"
group.byte 0xC++0x0
line.byte 0x0 "WDTA0MD1,Note: n = 0 to 9"
rbitfld.byte 0x0 7. "Reserved_7,Reserved" "0,1"
bitfld.byte 0x0 6. "WDTA0OVF2,Interval time mode." "0,1"
bitfld.byte 0x0 5. "WDTA0OVF1,Interval time mode." "0,1"
bitfld.byte 0x0 4. "WDTA0OVF0,Interval time mode." "0,1"
bitfld.byte 0x0 3. "WDTA0WIE,75% interrupt enable" "0: 75% interrupt is disabled,1: 75% interrupt is enabled"
bitfld.byte 0x0 2. "WDTA0ERM,Error mode" "0: NMI mode,1: Reset mode"
bitfld.byte 0x0 1. "WDTA0WS1,Window Size selection" "0,1"
newline
bitfld.byte 0x0 0. "WDTA0WS0,Window Size selection" "0,1"
tree.end
tree "WWDT_2"
base ad:0xFFCB0000
group.byte 0x0++0x0
line.byte 0x0 "WDTA0WDTE2,Note: n = 0 to 9"
bitfld.byte 0x0 7. "WDTA0RUN,Watchdog timer count start or stop." "0,1"
hexmask.byte 0x0 0.--6. 1. "Reserved_0,Reserved"
group.byte 0xC++0x0
line.byte 0x0 "WDTA0MD2,Note: n = 0 to 9"
rbitfld.byte 0x0 7. "Reserved_7,Reserved" "0,1"
bitfld.byte 0x0 6. "WDTA0OVF2,Interval time mode." "0,1"
bitfld.byte 0x0 5. "WDTA0OVF1,Interval time mode." "0,1"
bitfld.byte 0x0 4. "WDTA0OVF0,Interval time mode." "0,1"
bitfld.byte 0x0 3. "WDTA0WIE,75% interrupt enable" "0: 75% interrupt is disabled,1: 75% interrupt is enabled"
bitfld.byte 0x0 2. "WDTA0ERM,Error mode" "0: NMI mode,1: Reset mode"
bitfld.byte 0x0 1. "WDTA0WS1,Window Size selection" "0,1"
newline
bitfld.byte 0x0 0. "WDTA0WS0,Window Size selection" "0,1"
tree.end
tree "WWDT_3"
base ad:0xFFCC0000
group.byte 0x0++0x0
line.byte 0x0 "WDTA0WDTE3,Note: n = 0 to 9"
bitfld.byte 0x0 7. "WDTA0RUN,Watchdog timer count start or stop." "0,1"
hexmask.byte 0x0 0.--6. 1. "Reserved_0,Reserved"
group.byte 0xC++0x0
line.byte 0x0 "WDTA0MD3,Note: n = 0 to 9"
rbitfld.byte 0x0 7. "Reserved_7,Reserved" "0,1"
bitfld.byte 0x0 6. "WDTA0OVF2,Interval time mode." "0,1"
bitfld.byte 0x0 5. "WDTA0OVF1,Interval time mode." "0,1"
bitfld.byte 0x0 4. "WDTA0OVF0,Interval time mode." "0,1"
bitfld.byte 0x0 3. "WDTA0WIE,75% interrupt enable" "0: 75% interrupt is disabled,1: 75% interrupt is enabled"
bitfld.byte 0x0 2. "WDTA0ERM,Error mode" "0: NMI mode,1: Reset mode"
bitfld.byte 0x0 1. "WDTA0WS1,Window Size selection" "0,1"
newline
bitfld.byte 0x0 0. "WDTA0WS0,Window Size selection" "0,1"
tree.end
tree "WWDT_4"
base ad:0xFFCF0000
group.byte 0x0++0x0
line.byte 0x0 "WDTA0WDTE4,Note: n = 0 to 9"
bitfld.byte 0x0 7. "WDTA0RUN,Watchdog timer count start or stop." "0,1"
hexmask.byte 0x0 0.--6. 1. "Reserved_0,Reserved"
group.byte 0xC++0x0
line.byte 0x0 "WDTA0MD4,Note: n = 0 to 9"
rbitfld.byte 0x0 7. "Reserved_7,Reserved" "0,1"
bitfld.byte 0x0 6. "WDTA0OVF2,Interval time mode." "0,1"
bitfld.byte 0x0 5. "WDTA0OVF1,Interval time mode." "0,1"
bitfld.byte 0x0 4. "WDTA0OVF0,Interval time mode." "0,1"
bitfld.byte 0x0 3. "WDTA0WIE,75% interrupt enable" "0: 75% interrupt is disabled,1: 75% interrupt is enabled"
bitfld.byte 0x0 2. "WDTA0ERM,Error mode" "0: NMI mode,1: Reset mode"
bitfld.byte 0x0 1. "WDTA0WS1,Window Size selection" "0,1"
newline
bitfld.byte 0x0 0. "WDTA0WS0,Window Size selection" "0,1"
tree.end
tree "WWDT_5"
base ad:0xFFEF0000
group.byte 0x0++0x0
line.byte 0x0 "WDTA0WDTE5,Note: n = 0 to 9"
bitfld.byte 0x0 7. "WDTA0RUN,Watchdog timer count start or stop." "0,1"
hexmask.byte 0x0 0.--6. 1. "Reserved_0,Reserved"
group.byte 0xC++0x0
line.byte 0x0 "WDTA0MD5,Note: n = 0 to 9"
rbitfld.byte 0x0 7. "Reserved_7,Reserved" "0,1"
bitfld.byte 0x0 6. "WDTA0OVF2,Interval time mode." "0,1"
bitfld.byte 0x0 5. "WDTA0OVF1,Interval time mode." "0,1"
bitfld.byte 0x0 4. "WDTA0OVF0,Interval time mode." "0,1"
bitfld.byte 0x0 3. "WDTA0WIE,75% interrupt enable" "0: 75% interrupt is disabled,1: 75% interrupt is enabled"
bitfld.byte 0x0 2. "WDTA0ERM,Error mode" "0: NMI mode,1: Reset mode"
bitfld.byte 0x0 1. "WDTA0WS1,Window Size selection" "0,1"
newline
bitfld.byte 0x0 0. "WDTA0WS0,Window Size selection" "0,1"
tree.end
tree "WWDT_6"
base ad:0xFFF10000
group.byte 0x0++0x0
line.byte 0x0 "WDTA0WDTE6,Note: n = 0 to 9"
bitfld.byte 0x0 7. "WDTA0RUN,Watchdog timer count start or stop." "0,1"
hexmask.byte 0x0 0.--6. 1. "Reserved_0,Reserved"
group.byte 0xC++0x0
line.byte 0x0 "WDTA0MD6,Note: n = 0 to 9"
rbitfld.byte 0x0 7. "Reserved_7,Reserved" "0,1"
bitfld.byte 0x0 6. "WDTA0OVF2,Interval time mode." "0,1"
bitfld.byte 0x0 5. "WDTA0OVF1,Interval time mode." "0,1"
bitfld.byte 0x0 4. "WDTA0OVF0,Interval time mode." "0,1"
bitfld.byte 0x0 3. "WDTA0WIE,75% interrupt enable" "0: 75% interrupt is disabled,1: 75% interrupt is enabled"
bitfld.byte 0x0 2. "WDTA0ERM,Error mode" "0: NMI mode,1: Reset mode"
bitfld.byte 0x0 1. "WDTA0WS1,Window Size selection" "0,1"
newline
bitfld.byte 0x0 0. "WDTA0WS0,Window Size selection" "0,1"
tree.end
tree.end
tree.end
AUTOINDENT.OFF